authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-30 00:11:12+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-30 06:30:25+02:00
log1e9278d718f7eec0aaad4dc296757c70e7f0f68b
tree57a9975e245b95d85a308f07dbb4335bbbe98399
parent38e0f049c531e83ec2eec80d50b624e6c3b8c486
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: Remove `spir`/`spir64` architecture tags.

These were for very old OpenCL have been long abandoned in favor of SPIR-V. * https://github.com/KhronosGroup/SPIR * https://github.com/KhronosGroup/SPIR-Tools

6 files changed, 2 insertions(+), 35 deletions(-)

lib/compiler/aro/aro/target.zig-7
...@@ -53,7 +53,6 @@ pub fn intPtrType(target: std.Target) Type {...@@ -53,7 +53,6 @@ pub fn intPtrType(target: std.Target) Type {
53 .xcore,53 .xcore,
54 .hexagon,54 .hexagon,
55 .m68k,55 .m68k,
56 .spir,
57 .spirv32,56 .spirv32,
58 .arc,57 .arc,
59 .avr,58 .avr,
...@@ -473,7 +472,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {...@@ -473,7 +472,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
473 .x86,472 .x86,
474 .xcore,473 .xcore,
475 .nvptx,474 .nvptx,
476 .spir,
477 .kalimba,475 .kalimba,
478 .lanai,476 .lanai,
479 .wasm32,477 .wasm32,
...@@ -487,7 +485,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {...@@ -487,7 +485,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
487 .aarch64_be => copy.cpu.arch = .armeb,485 .aarch64_be => copy.cpu.arch = .armeb,
488 .nvptx64 => copy.cpu.arch = .nvptx,486 .nvptx64 => copy.cpu.arch = .nvptx,
489 .wasm64 => copy.cpu.arch = .wasm32,487 .wasm64 => copy.cpu.arch = .wasm32,
490 .spir64 => copy.cpu.arch = .spir,
491 .spirv64 => copy.cpu.arch = .spirv32,488 .spirv64 => copy.cpu.arch = .spirv32,
492 .loongarch64 => copy.cpu.arch = .loongarch32,489 .loongarch64 => copy.cpu.arch = .loongarch32,
493 .mips64 => copy.cpu.arch = .mips,490 .mips64 => copy.cpu.arch = .mips,
...@@ -526,7 +523,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -526,7 +523,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
526 .bpfel,523 .bpfel,
527 .nvptx64,524 .nvptx64,
528 .wasm64,525 .wasm64,
529 .spir64,
530 .spirv64,526 .spirv64,
531 .loongarch64,527 .loongarch64,
532 .mips64,528 .mips64,
...@@ -550,7 +546,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -550,7 +546,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
550 .powerpcle => copy.cpu.arch = .powerpc64le,546 .powerpcle => copy.cpu.arch = .powerpc64le,
551 .riscv32 => copy.cpu.arch = .riscv64,547 .riscv32 => copy.cpu.arch = .riscv64,
552 .sparc => copy.cpu.arch = .sparc64,548 .sparc => copy.cpu.arch = .sparc64,
553 .spir => copy.cpu.arch = .spir64,
554 .spirv32 => copy.cpu.arch = .spirv64,549 .spirv32 => copy.cpu.arch = .spirv64,
555 .thumb => copy.cpu.arch = .aarch64,550 .thumb => copy.cpu.arch = .aarch64,
556 .thumbeb => copy.cpu.arch = .aarch64_be,551 .thumbeb => copy.cpu.arch = .aarch64_be,
...@@ -607,8 +602,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -607,8 +602,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
607 .xtensa => "xtensa",602 .xtensa => "xtensa",
608 .nvptx => "nvptx",603 .nvptx => "nvptx",
609 .nvptx64 => "nvptx64",604 .nvptx64 => "nvptx64",
610 .spir => "spir",
611 .spir64 => "spir64",
612 .spirv32 => "spirv32",605 .spirv32 => "spirv32",
613 .spirv64 => "spirv64",606 .spirv64 => "spirv64",
614 .kalimba => "kalimba",607 .kalimba => "kalimba",
lib/std/Target.zig+2-16
...@@ -1027,8 +1027,6 @@ pub const Cpu = struct {...@@ -1027,8 +1027,6 @@ pub const Cpu = struct {
1027 xtensa,1027 xtensa,
1028 nvptx,1028 nvptx,
1029 nvptx64,1029 nvptx64,
1030 spir,
1031 spir64,
1032 spirv,1030 spirv,
1033 spirv32,1031 spirv32,
1034 spirv64,1032 spirv64,
...@@ -1048,6 +1046,8 @@ pub const Cpu = struct {...@@ -1048,6 +1046,8 @@ pub const Cpu = struct {
1048 // - amdil641046 // - amdil64
1049 // - hsail1047 // - hsail
1050 // - hsail641048 // - hsail64
1049 // - spir
1050 // - spir64
1051 // - shave1051 // - shave
1052 // - renderscript321052 // - renderscript32
1053 // - renderscript641053 // - renderscript64
...@@ -1178,7 +1178,6 @@ pub const Cpu = struct {...@@ -1178,7 +1178,6 @@ pub const Cpu = struct {
1178 .xcore => .XCORE,1178 .xcore => .XCORE,
1179 .xtensa => .XTENSA,1179 .xtensa => .XTENSA,
1180 .nvptx => .NONE,1180 .nvptx => .NONE,
1181 .spir => .NONE,
1182 .kalimba => .CSR_KALIMBA,1181 .kalimba => .CSR_KALIMBA,
1183 .lanai => .LANAI,1182 .lanai => .LANAI,
1184 .wasm32 => .NONE,1183 .wasm32 => .NONE,
...@@ -1191,7 +1190,6 @@ pub const Cpu = struct {...@@ -1191,7 +1190,6 @@ pub const Cpu = struct {
1191 .riscv64 => .RISCV,1190 .riscv64 => .RISCV,
1192 .x86_64 => .X86_64,1191 .x86_64 => .X86_64,
1193 .nvptx64 => .NONE,1192 .nvptx64 => .NONE,
1194 .spir64 => .NONE,
1195 .wasm64 => .NONE,1193 .wasm64 => .NONE,
1196 .amdgcn => .AMDGPU,1194 .amdgcn => .AMDGPU,
1197 .bpfel => .BPF,1195 .bpfel => .BPF,
...@@ -1231,7 +1229,6 @@ pub const Cpu = struct {...@@ -1231,7 +1229,6 @@ pub const Cpu = struct {
1231 .xcore => .Unknown,1229 .xcore => .Unknown,
1232 .xtensa => .Unknown,1230 .xtensa => .Unknown,
1233 .nvptx => .Unknown,1231 .nvptx => .Unknown,
1234 .spir => .Unknown,
1235 .kalimba => .Unknown,1232 .kalimba => .Unknown,
1236 .lanai => .Unknown,1233 .lanai => .Unknown,
1237 .wasm32 => .Unknown,1234 .wasm32 => .Unknown,
...@@ -1244,7 +1241,6 @@ pub const Cpu = struct {...@@ -1244,7 +1241,6 @@ pub const Cpu = struct {
1244 .riscv64 => .RISCV64,1241 .riscv64 => .RISCV64,
1245 .x86_64 => .X64,1242 .x86_64 => .X64,
1246 .nvptx64 => .Unknown,1243 .nvptx64 => .Unknown,
1247 .spir64 => .Unknown,
1248 .wasm64 => .Unknown,1244 .wasm64 => .Unknown,
1249 .amdgcn => .Unknown,1245 .amdgcn => .Unknown,
1250 .bpfel => .Unknown,1246 .bpfel => .Unknown,
...@@ -1289,8 +1285,6 @@ pub const Cpu = struct {...@@ -1289,8 +1285,6 @@ pub const Cpu = struct {
1289 .wasm64,1285 .wasm64,
1290 .xcore,1286 .xcore,
1291 .thumb,1287 .thumb,
1292 .spir,
1293 .spir64,
1294 .ve,1288 .ve,
1295 .spu_2,1289 .spu_2,
1296 // GPU bitness is opaque. For now, assume little endian.1290 // GPU bitness is opaque. For now, assume little endian.
...@@ -1769,8 +1763,6 @@ pub const DynamicLinker = struct {...@@ -1769,8 +1763,6 @@ pub const DynamicLinker = struct {
1769 .msp430,1763 .msp430,
1770 .amdgcn,1764 .amdgcn,
1771 .xcore,1765 .xcore,
1772 .spir,
1773 .spir64,
1774 .kalimba,1766 .kalimba,
1775 .lanai,1767 .lanai,
1776 .ve,1768 .ve,
...@@ -1868,7 +1860,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1868,7 +1860,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1868 .x86,1860 .x86,
1869 .xcore,1861 .xcore,
1870 .nvptx,1862 .nvptx,
1871 .spir,
1872 .kalimba,1863 .kalimba,
1873 .lanai,1864 .lanai,
1874 .wasm32,1865 .wasm32,
...@@ -1887,7 +1878,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1887,7 +1878,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1887 .riscv64,1878 .riscv64,
1888 .x86_64,1879 .x86_64,
1889 .nvptx64,1880 .nvptx64,
1890 .spir64,
1891 .wasm64,1881 .wasm64,
1892 .amdgcn,1882 .amdgcn,
1893 .bpfel,1883 .bpfel,
...@@ -2368,7 +2358,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2368,7 +2358,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2368 .xcore,2358 .xcore,
2369 .dxil,2359 .dxil,
2370 .loongarch32,2360 .loongarch32,
2371 .spir,
2372 .spirv32,2361 .spirv32,
2373 .kalimba,2362 .kalimba,
2374 .ve,2363 .ve,
...@@ -2391,7 +2380,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2391,7 +2380,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2391 .nvptx,2380 .nvptx,
2392 .nvptx64,2381 .nvptx64,
2393 .s390x,2382 .s390x,
2394 .spir64,
2395 .spirv64,2383 .spirv64,
2396 => 8,2384 => 8,
23972385
...@@ -2476,7 +2464,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2476,7 +2464,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2476 .xcore,2464 .xcore,
2477 .dxil,2465 .dxil,
2478 .loongarch32,2466 .loongarch32,
2479 .spir,
2480 .spirv32,2467 .spirv32,
2481 .kalimba,2468 .kalimba,
2482 .ve,2469 .ve,
...@@ -2506,7 +2493,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2506,7 +2493,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2506 .nvptx,2493 .nvptx,
2507 .nvptx64,2494 .nvptx64,
2508 .s390x,2495 .s390x,
2509 .spir64,
2510 .spirv64,2496 .spirv64,
2511 => 8,2497 => 8,
25122498
src/Type.zig-2
...@@ -1647,11 +1647,9 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {...@@ -1647,11 +1647,9 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1647 .csky,1647 .csky,
1648 .arc,1648 .arc,
1649 .m68k,1649 .m68k,
1650 .spir,
1651 .kalimba,1650 .kalimba,
1652 .spirv,1651 .spirv,
1653 .spirv32,1652 .spirv32,
1654 .spir64,
1655 .ve,1653 .ve,
1656 .spirv64,1654 .spirv64,
1657 .dxil,1655 .dxil,
src/Zcu.zig-2
...@@ -3253,7 +3253,6 @@ pub fn atomicPtrAlignment(...@@ -3253,7 +3253,6 @@ pub fn atomicPtrAlignment(
3253 .thumbeb,3253 .thumbeb,
3254 .x86,3254 .x86,
3255 .xcore,3255 .xcore,
3256 .spir,
3257 .kalimba,3256 .kalimba,
3258 .lanai,3257 .lanai,
3259 .wasm32,3258 .wasm32,
...@@ -3275,7 +3274,6 @@ pub fn atomicPtrAlignment(...@@ -3275,7 +3274,6 @@ pub fn atomicPtrAlignment(
3275 .riscv64,3274 .riscv64,
3276 .sparc64,3275 .sparc64,
3277 .s390x,3276 .s390x,
3278 .spir64,
3279 .wasm64,3277 .wasm64,
3280 .ve,3278 .ve,
3281 .spirv64,3279 .spirv64,
src/codegen/llvm.zig-6
...@@ -79,8 +79,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -79,8 +79,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
79 .xtensa => "xtensa",79 .xtensa => "xtensa",
80 .nvptx => "nvptx",80 .nvptx => "nvptx",
81 .nvptx64 => "nvptx64",81 .nvptx64 => "nvptx64",
82 .spir => "spir",
83 .spir64 => "spir64",
84 .spirv => "spirv",82 .spirv => "spirv",
85 .spirv32 => "spirv32",83 .spirv32 => "spirv32",
86 .spirv64 => "spirv64",84 .spirv64 => "spirv64",
...@@ -292,8 +290,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {...@@ -292,8 +290,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
292 .xtensa => .xtensa,290 .xtensa => .xtensa,
293 .nvptx => .nvptx,291 .nvptx => .nvptx,
294 .nvptx64 => .nvptx64,292 .nvptx64 => .nvptx64,
295 .spir => .spir,
296 .spir64 => .spir64,
297 .spirv => .spirv,293 .spirv => .spirv,
298 .spirv32 => .spirv32,294 .spirv32 => .spirv32,
299 .spirv64 => .spirv64,295 .spirv64 => .spirv64,
...@@ -12095,8 +12091,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {...@@ -12095,8 +12091,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
12095 },12091 },
1209612092
12097 // LLVM backends that have no initialization functions.12093 // LLVM backends that have no initialization functions.
12098 .spir,
12099 .spir64,
12100 .spirv,12094 .spirv,
12101 .spirv32,12095 .spirv32,
12102 .spirv64,12096 .spirv64,
src/target.zig-2
...@@ -148,8 +148,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -148,8 +148,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
148 .xtensa,148 .xtensa,
149 .nvptx,149 .nvptx,
150 .nvptx64,150 .nvptx64,
151 .spir,
152 .spir64,
153 .spirv,151 .spirv,
154 .spirv32,152 .spirv32,
155 .spirv64,153 .spirv64,