authorgravatar for koachan@protonmail.comKoakuma <koachan@protonmail.com> 2020-08-22 14:35:03+07:00
committergravatar for koachan@protonmail.comKoakuma <koachan@protonmail.com> 2020-10-24 19:59:04+07:00
log206f96d474cb24cd8c00721b7ade96633b6b239f
treea6a82c5b605911d01b582061fa6ec03882c83489
parentde06b0a635bb865715e60ce1ac3ba336cfe7c385

Add sparc64 linux C ABI

3 files changed, 8 insertions(+), 2 deletions(-)

src/stage1/analyze.cpp+3-2
...@@ -1016,6 +1016,7 @@ bool want_first_arg_sret(CodeGen *g, FnTypeId *fn_type_id) {...@@ -1016,6 +1016,7 @@ bool want_first_arg_sret(CodeGen *g, FnTypeId *fn_type_id) {
1016 target_is_arm(g->zig_target) ||1016 target_is_arm(g->zig_target) ||
1017 target_is_riscv(g->zig_target) ||1017 target_is_riscv(g->zig_target) ||
1018 target_is_wasm(g->zig_target) ||1018 target_is_wasm(g->zig_target) ||
1019 target_is_sparc(g->zig_target) ||
1019 target_is_ppc(g->zig_target))1020 target_is_ppc(g->zig_target))
1020 {1021 {
1021 X64CABIClass abi_class = type_c_abi_x86_64_class(g, fn_type_id->return_type);1022 X64CABIClass abi_class = type_c_abi_x86_64_class(g, fn_type_id->return_type);
...@@ -1988,7 +1989,7 @@ static ZigType *analyze_fn_type(CodeGen *g, AstNode *proto_node, Scope *child_sc...@@ -1988,7 +1989,7 @@ static ZigType *analyze_fn_type(CodeGen *g, AstNode *proto_node, Scope *child_sc
1988 // behaviour when checking expected alignment with `@ptrToInt(fn_ptr)`1989 // behaviour when checking expected alignment with `@ptrToInt(fn_ptr)`
1989 // or similar. This commit proposes to make `align` expressions a1990 // or similar. This commit proposes to make `align` expressions a
1990 // compile error when compiled to Wasm architecture.1991 // compile error when compiled to Wasm architecture.
1991 // 1992 //
1992 // Some references:1993 // Some references:
1993 // [1] [Mozilla: WebAssembly Tables](https://developer.mozilla.org/en-US/docs/WebAssembly/Understanding_the_text_format#WebAssembly_tables)1994 // [1] [Mozilla: WebAssembly Tables](https://developer.mozilla.org/en-US/docs/WebAssembly/Understanding_the_text_format#WebAssembly_tables)
1994 // [2] [Sunfishcode's Wasm Ref Manual](https://github.com/sunfishcode/wasm-reference-manual/blob/master/WebAssembly.md#indirect-call)1995 // [2] [Sunfishcode's Wasm Ref Manual](https://github.com/sunfishcode/wasm-reference-manual/blob/master/WebAssembly.md#indirect-call)
...@@ -9044,7 +9045,7 @@ static void resolve_llvm_types_optional(CodeGen *g, ZigType *type, ResolveStatus...@@ -9044,7 +9045,7 @@ static void resolve_llvm_types_optional(CodeGen *g, ZigType *type, ResolveStatus
9044 8 * child_type->abi_align,9045 8 * child_type->abi_align,
9045 val_offset_in_bits,9046 val_offset_in_bits,
9046 ZigLLVM_DIFlags_Zero, child_llvm_di_type);9047 ZigLLVM_DIFlags_Zero, child_llvm_di_type);
9047 di_element_types[maybe_null_index] = 9048 di_element_types[maybe_null_index] =
9048 ZigLLVMCreateDebugMemberType(g->dbuilder, ZigLLVMTypeToScope(type->llvm_di_type),9049 ZigLLVMCreateDebugMemberType(g->dbuilder, ZigLLVMTypeToScope(type->llvm_di_type),
9049 "maybe", di_file, line,9050 "maybe", di_file, line,
9050 8*g->builtin_types.entry_bool->abi_size,9051 8*g->builtin_types.entry_bool->abi_size,
src/stage1/target.cpp+4
...@@ -1196,6 +1196,10 @@ bool target_is_riscv(const ZigTarget *target) {...@@ -1196,6 +1196,10 @@ bool target_is_riscv(const ZigTarget *target) {
1196 return target->arch == ZigLLVM_riscv32 || target->arch == ZigLLVM_riscv64;1196 return target->arch == ZigLLVM_riscv32 || target->arch == ZigLLVM_riscv64;
1197}1197}
11981198
1199bool target_is_sparc(const ZigTarget *target) {
1200 return target->arch == ZigLLVM_sparc || target->arch == ZigLLVM_sparcv9;
1201}
1202
1199bool target_is_mips(const ZigTarget *target) {1203bool target_is_mips(const ZigTarget *target) {
1200 return target->arch == ZigLLVM_mips || target->arch == ZigLLVM_mipsel ||1204 return target->arch == ZigLLVM_mips || target->arch == ZigLLVM_mipsel ||
1201 target->arch == ZigLLVM_mips64 || target->arch == ZigLLVM_mips64el;1205 target->arch == ZigLLVM_mips64 || target->arch == ZigLLVM_mips64el;
src/stage1/target.hpp+1
...@@ -86,6 +86,7 @@ bool target_is_glibc(const ZigTarget *target);...@@ -86,6 +86,7 @@ bool target_is_glibc(const ZigTarget *target);
86bool target_is_musl(const ZigTarget *target);86bool target_is_musl(const ZigTarget *target);
87bool target_is_wasm(const ZigTarget *target);87bool target_is_wasm(const ZigTarget *target);
88bool target_is_riscv(const ZigTarget *target);88bool target_is_riscv(const ZigTarget *target);
89bool target_is_sparc(const ZigTarget *target);
89bool target_is_android(const ZigTarget *target);90bool target_is_android(const ZigTarget *target);
90bool target_has_debug_info(const ZigTarget *target);91bool target_has_debug_info(const ZigTarget *target);
91const char *target_arch_musl_name(ZigLLVM_ArchType arch);92const char *target_arch_musl_name(ZigLLVM_ArchType arch);