| ... | @@ -853,6 +853,36 @@ pub const HWCAP = switch (native_arch) { | ... | @@ -853,6 +853,36 @@ pub const HWCAP = switch (native_arch) { |
| 853 | pub const PCI_MIO = 1 << 21; | 853 | pub const PCI_MIO = 1 << 21; |
| 854 | pub const SIE = 1 << 22; | 854 | pub const SIE = 1 << 22; |
| 855 | }, | 855 | }, |
| | 856 | .sparc, .sparc64 => struct { |
| | 857 | pub const FLUSH = 1 << 0; |
| | 858 | pub const STBAR = 1 << 1; |
| | 859 | pub const SWAP = 1 << 2; |
| | 860 | pub const MULDIV = 1 << 3; |
| | 861 | pub const V9 = 1 << 4; |
| | 862 | pub const ULTRA3 = 1 << 5; |
| | 863 | pub const BLKINIT = 1 << 6; |
| | 864 | pub const N2 = 1 << 7; |
| | 865 | pub const MUL32 = 1 << 8; |
| | 866 | pub const DIV32 = 1 << 9; |
| | 867 | pub const FSMULD = 1 << 10; |
| | 868 | pub const V8PLUS = 1 << 11; |
| | 869 | pub const POPC = 1 << 12; |
| | 870 | pub const VIS = 1 << 13; |
| | 871 | pub const VIS2 = 1 << 14; |
| | 872 | pub const ASI_BLK_INIT = 1 << 15; |
| | 873 | pub const FMAF = 1 << 16; |
| | 874 | pub const VIS3 = 1 << 17; |
| | 875 | pub const HPC = 1 << 18; |
| | 876 | pub const RANDOM = 1 << 19; |
| | 877 | pub const TRANS = 1 << 20; |
| | 878 | pub const FJFMAU = 1 << 21; |
| | 879 | pub const IMA = 1 << 22; |
| | 880 | pub const ASI_CACHE_SPARING = 1 << 23; |
| | 881 | pub const PAUSE = 1 << 24; |
| | 882 | pub const CBCOND = 1 << 25; |
| | 883 | pub const CRYPTO = 1 << 26; |
| | 884 | pub const ADI = 1 << 27; |
| | 885 | }, |
| 856 | else => struct {}, | 886 | else => struct {}, |
| 857 | }; | 887 | }; |
| 858 | | 888 | |