authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-11-04 12:39:48+01:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-11-04 12:39:48+01:00
log2307cf73b044527464e63aa315e3af343d6584ad
tree83a729ceb1bba7320e0fd31bdd379d773490cbca
parent4050d9bbf918dee0195e88d57b653e89d5e25372
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.valgrind: Port doClientRequest() to all archs supported by Valgrind.

1 files changed, 90 insertions(+), 44 deletions(-)

lib/std/valgrind.zig+90-44
...@@ -7,50 +7,96 @@ pub fn doClientRequest(default: usize, request: usize, a1: usize, a2: usize, a3:...@@ -7,50 +7,96 @@ pub fn doClientRequest(default: usize, request: usize, a1: usize, a2: usize, a3:
7 return default;7 return default;
8 }8 }
99
10 switch (builtin.target.cpu.arch) {10 const args = &[_]usize{ request, a1, a2, a3, a4, a5 };
11 .x86 => {11
12 return asm volatile (12 return switch (builtin.cpu.arch) {
13 \\ roll $3, %%edi ; roll $13, %%edi13 .arm, .armeb, .thumb, .thumbeb => asm volatile (
14 \\ roll $29, %%edi ; roll $19, %%edi14 \\ mov r12, r12, ror #3 ; mov r12, r12, ror #13
15 \\ xchgl %%ebx,%%ebx15 \\ mov r12, r12, ror #29 ; mov r12, r12, ror #19
16 : [_] "={edx}" (-> usize),16 \\ orr r10, r10, r10
17 : [_] "{eax}" (&[_]usize{ request, a1, a2, a3, a4, a5 }),17 : [_] "={r3}" (-> usize),
18 [_] "0" (default),18 : [_] "{r4}" (args),
19 : "cc", "memory"19 [_] "{r3}" (default),
20 );20 : "cc", "memory"
21 },21 ),
22 .x86_64 => {22 .aarch64, .aarch64_be => asm volatile (
23 return asm volatile (23 \\ ror x12, x12, #3 ; ror x12, x12, #13
24 \\ rolq $3, %%rdi ; rolq $13, %%rdi24 \\ ror x12, x12, #51 ; ror x12, x12, #61
25 \\ rolq $61, %%rdi ; rolq $51, %%rdi25 \\ orr x10, x10, x10
26 \\ xchgq %%rbx,%%rbx26 : [_] "={x3}" (-> usize),
27 : [_] "={rdx}" (-> usize),27 : [_] "{x4}" (args),
28 : [_] "{rax}" (&[_]usize{ request, a1, a2, a3, a4, a5 }),28 [_] "{x3}" (default),
29 [_] "0" (default),29 : "cc", "memory"
30 : "cc", "memory"30 ),
31 );31 .mips, .mipsel => asm volatile (
32 },32 \\ srl $0, $0, 13
33 .aarch64 => {33 \\ srl $0, $0, 29
34 return asm volatile (34 \\ srl $0, $0, 3
35 \\ ror x12, x12, #3 ; ror x12, x12, #1335 \\ srl $0, $0, 19
36 \\ ror x12, x12, #51 ; ror x12, x12, #6136 \\ or $13, $13, $13
37 \\ orr x10, x10, x1037 : [_] "={$11}" (-> usize),
38 : [_] "={x3}" (-> usize),38 : [_] "{$12}" (args),
39 : [_] "{x4}" (&[_]usize{ request, a1, a2, a3, a4, a5 }),39 [_] "{$11}" (default),
40 [_] "0" (default),40 : "memory"
41 : "cc", "memory"41 ),
42 );42 .mips64, .mips64el => asm volatile (
43 },43 \\ dsll $0, $0, 3 ; dsll $0, $0, 13
44 // ppc3244 \\ dsll $0, $0, 29 ; dsll $0, $0, 19
45 // ppc6445 \\ or $13, $13, $13
46 // arm46 : [_] "={$11}" (-> usize),
47 // s390x47 : [_] "{$12}" (args),
48 // mips3248 [_] "{$11}" (default),
49 // mips6449 : "memory"
50 else => {50 ),
51 return default;51 .powerpc, .powerpcle => asm volatile (
52 },52 \\ rlwinm 0, 0, 3, 0, 31 ; rlwinm 0, 0, 13, 0, 31
53 }53 \\ rlwinm 0, 0, 29, 0, 31 ; rlwinm 0, 0, 19, 0, 31
54 \\ or 1, 1, 1
55 : [_] "={r3}" (-> usize),
56 : [_] "{r4}" (args),
57 [_] "{r3}" (default),
58 : "cc", "memory"
59 ),
60 .powerpc64, .powerpc64le => asm volatile (
61 \\ rotldi 0, 0, 3 ; rotldi 0, 0, 13
62 \\ rotldi 0, 0, 61 ; rotldi 0, 0, 51
63 \\ or 1, 1, 1
64 : [_] "={r3}" (-> usize),
65 : [_] "{r4}" (args),
66 [_] "{r3}" (default),
67 : "cc", "memory"
68 ),
69 .s390x => asm volatile (
70 \\ lr %%r15, %%r15
71 \\ lr %%r1, %%r1
72 \\ lr %%r2, %%r2
73 \\ lr %%r3, %%r3
74 \\ lr %%r2, %%r2
75 : [_] "={r3}" (-> usize),
76 : [_] "{r2}" (args),
77 [_] "{r3}" (default),
78 : "cc", "memory"
79 ),
80 .x86 => asm volatile (
81 \\ roll $3, %%edi ; roll $13, %%edi
82 \\ roll $29, %%edi ; roll $19, %%edi
83 \\ xchgl %%ebx, %%ebx
84 : [_] "={edx}" (-> usize),
85 : [_] "{eax}" (args),
86 [_] "{edx}" (default),
87 : "cc", "memory"
88 ),
89 .x86_64 => asm volatile (
90 \\ rolq $3, %%rdi ; rolq $13, %%rdi
91 \\ rolq $61, %%rdi ; rolq $51, %%rdi
92 \\ xchgq %%rbx, %%rbx
93 : [_] "={rdx}" (-> usize),
94 : [_] "{rax}" (args),
95 [_] "{rdx}" (default),
96 : "cc", "memory"
97 ),
98 else => default,
99 };
54}100}
55101
56pub const ClientRequest = enum(u32) {102pub const ClientRequest = enum(u32) {