| ... | ... | @@ -443,6 +443,7 @@ pub const X86 = enum(usize) { |
| 443 | 443 | futex_waitv = 449, |
| 444 | 444 | set_mempolicy_home_node = 450, |
| 445 | 445 | cachestat = 451, |
| 446 | fchmodat2 = 452, |
| 446 | 447 | }; |
| 447 | 448 | |
| 448 | 449 | pub const X64 = enum(usize) { |
| ... | ... | @@ -809,6 +810,8 @@ pub const X64 = enum(usize) { |
| 809 | 810 | futex_waitv = 449, |
| 810 | 811 | set_mempolicy_home_node = 450, |
| 811 | 812 | cachestat = 451, |
| 813 | fchmodat2 = 452, |
| 814 | map_shadow_stack = 453, |
| 812 | 815 | }; |
| 813 | 816 | |
| 814 | 817 | pub const Arm = enum(usize) { |
| ... | ... | @@ -1218,6 +1221,7 @@ pub const Arm = enum(usize) { |
| 1218 | 1221 | futex_waitv = 449, |
| 1219 | 1222 | set_mempolicy_home_node = 450, |
| 1220 | 1223 | cachestat = 451, |
| 1224 | fchmodat2 = 452, |
| 1221 | 1225 | |
| 1222 | 1226 | breakpoint = arm_base + 1, |
| 1223 | 1227 | cacheflush = arm_base + 2, |
| ... | ... | @@ -1611,6 +1615,7 @@ pub const Sparc64 = enum(usize) { |
| 1611 | 1615 | futex_waitv = 449, |
| 1612 | 1616 | set_mempolicy_home_node = 450, |
| 1613 | 1617 | cachestat = 451, |
| 1618 | fchmodat2 = 452, |
| 1614 | 1619 | }; |
| 1615 | 1620 | |
| 1616 | 1621 | pub const Mips = enum(usize) { |
| ... | ... | @@ -2035,6 +2040,7 @@ pub const Mips = enum(usize) { |
| 2035 | 2040 | futex_waitv = Linux + 449, |
| 2036 | 2041 | set_mempolicy_home_node = Linux + 450, |
| 2037 | 2042 | cachestat = Linux + 451, |
| 2043 | fchmodat2 = Linux + 452, |
| 2038 | 2044 | }; |
| 2039 | 2045 | |
| 2040 | 2046 | pub const Mips64 = enum(usize) { |
| ... | ... | @@ -2395,6 +2401,7 @@ pub const Mips64 = enum(usize) { |
| 2395 | 2401 | futex_waitv = Linux + 449, |
| 2396 | 2402 | set_mempolicy_home_node = Linux + 450, |
| 2397 | 2403 | cachestat = Linux + 451, |
| 2404 | fchmodat2 = Linux + 452, |
| 2398 | 2405 | }; |
| 2399 | 2406 | |
| 2400 | 2407 | pub const PowerPC = enum(usize) { |
| ... | ... | @@ -2830,6 +2837,7 @@ pub const PowerPC = enum(usize) { |
| 2830 | 2837 | futex_waitv = 449, |
| 2831 | 2838 | set_mempolicy_home_node = 450, |
| 2832 | 2839 | cachestat = 451, |
| 2840 | fchmodat2 = 452, |
| 2833 | 2841 | }; |
| 2834 | 2842 | |
| 2835 | 2843 | pub const PowerPC64 = enum(usize) { |
| ... | ... | @@ -3237,6 +3245,7 @@ pub const PowerPC64 = enum(usize) { |
| 3237 | 3245 | futex_waitv = 449, |
| 3238 | 3246 | set_mempolicy_home_node = 450, |
| 3239 | 3247 | cachestat = 451, |
| 3248 | fchmodat2 = 452, |
| 3240 | 3249 | }; |
| 3241 | 3250 | |
| 3242 | 3251 | pub const Arm64 = enum(usize) { |
| ... | ... | @@ -3547,6 +3556,7 @@ pub const Arm64 = enum(usize) { |
| 3547 | 3556 | futex_waitv = 449, |
| 3548 | 3557 | set_mempolicy_home_node = 450, |
| 3549 | 3558 | cachestat = 451, |
| 3559 | fchmodat2 = 452, |
| 3550 | 3560 | }; |
| 3551 | 3561 | |
| 3552 | 3562 | pub const RiscV64 = enum(usize) { |
| ... | ... | @@ -3858,6 +3868,7 @@ pub const RiscV64 = enum(usize) { |
| 3858 | 3868 | futex_waitv = 449, |
| 3859 | 3869 | set_mempolicy_home_node = 450, |
| 3860 | 3870 | cachestat = 451, |
| 3871 | fchmodat2 = 452, |
| 3861 | 3872 | |
| 3862 | 3873 | riscv_flush_icache = arch_specific_syscall + 15, |
| 3863 | 3874 | }; |