authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-11-03 07:58:18+01:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-11-04 08:29:42+01:00
log2958a90515859fa129880e0f7a39d7990dad853f
tree13398dc2241c946d4039faac1b1e77d70ae1fd22
parent2f65c3971547cb81d832c78da4fc4738dde4d1a7
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

test: Disable some vector behavior tests on aarch64_be.

See: https://github.com/ziglang/zig/issues/21893

2 files changed, 8 insertions(+), 0 deletions(-)

test/behavior/bitcast.zig+1
...@@ -402,6 +402,7 @@ test "bitcast vector to integer and back" {...@@ -402,6 +402,7 @@ test "bitcast vector to integer and back" {
402 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO402 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
403 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;403 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
404 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;404 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
405 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
405406
406 const arr: [16]bool = [_]bool{ true, false } ++ [_]bool{true} ** 14;407 const arr: [16]bool = [_]bool{ true, false } ++ [_]bool{true} ** 14;
407 var x: @Vector(16, bool) = @splat(true);408 var x: @Vector(16, bool) = @splat(true);
test/behavior/vector.zig+7
...@@ -1060,6 +1060,7 @@ test "@addWithOverflow" {...@@ -1060,6 +1060,7 @@ test "@addWithOverflow" {
1060 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1060 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1061 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1061 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1062 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1062 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1063 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
10631064
1064 const S = struct {1065 const S = struct {
1065 fn doTheTest() !void {1066 fn doTheTest() !void {
...@@ -1108,6 +1109,7 @@ test "@subWithOverflow" {...@@ -1108,6 +1109,7 @@ test "@subWithOverflow" {
1108 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1109 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1109 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1110 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1110 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1111 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1112 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
11111113
1112 const S = struct {1114 const S = struct {
1113 fn doTheTest() !void {1115 fn doTheTest() !void {
...@@ -1140,6 +1142,7 @@ test "@mulWithOverflow" {...@@ -1140,6 +1142,7 @@ test "@mulWithOverflow" {
1140 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1142 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1141 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1143 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1142 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1144 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1145 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
11431146
1144 const S = struct {1147 const S = struct {
1145 fn doTheTest() !void {1148 fn doTheTest() !void {
...@@ -1162,6 +1165,7 @@ test "@shlWithOverflow" {...@@ -1162,6 +1165,7 @@ test "@shlWithOverflow" {
1162 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1165 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1163 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1166 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1164 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1167 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1168 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
11651169
1166 const S = struct {1170 const S = struct {
1167 fn doTheTest() !void {1171 fn doTheTest() !void {
...@@ -1245,6 +1249,7 @@ test "byte vector initialized in inline function" {...@@ -1245,6 +1249,7 @@ test "byte vector initialized in inline function" {
1245 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1249 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1246 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1250 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1247 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1251 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1252 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
12481253
1249 if (comptime builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and1254 if (comptime builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and
1250 builtin.cpu.features.isEnabled(@intFromEnum(std.Target.x86.Feature.avx512f)))1255 builtin.cpu.features.isEnabled(@intFromEnum(std.Target.x86.Feature.avx512f)))
...@@ -1370,6 +1375,7 @@ test "store packed vector element" {...@@ -1370,6 +1375,7 @@ test "store packed vector element" {
1370 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO1375 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1371 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO1376 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
1372 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1377 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1378 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
13731379
1374 var v = @Vector(4, u1){ 1, 1, 1, 1 };1380 var v = @Vector(4, u1){ 1, 1, 1, 1 };
1375 try expectEqual(@Vector(4, u1){ 1, 1, 1, 1 }, v);1381 try expectEqual(@Vector(4, u1){ 1, 1, 1, 1 }, v);
...@@ -1406,6 +1412,7 @@ test "store vector with memset" {...@@ -1406,6 +1412,7 @@ test "store vector with memset" {
1406 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; // TODO1412 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; // TODO
1407 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO1413 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
1408 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1414 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1415 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
14091416
1410 var a: [5]@Vector(2, i1) = undefined;1417 var a: [5]@Vector(2, i1) = undefined;
1411 var b: [5]@Vector(2, u2) = undefined;1418 var b: [5]@Vector(2, u2) = undefined;