authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2023-10-13 16:04:47-07:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2023-10-13 16:04:47-07:00
log2d7d037c4855681c8a27d98f1f29a63badb55658
tree0bed078056fef2d5d169cfdf5823182c89bd4271
parent7aa85691b08262b4fd63f9307e4d9cd41230e08c
parentc919e9a2806aed62f8fe7cb23da4aa14808daea8
signaturebadge-question-mark Signed by PGP key 4AEE18F83AFDEB23

Merge pull request #17510 from Vexu/vector

Fix `@Vector` source locations being swapped

5 files changed, 10 insertions(+), 10 deletions(-)

lib/std/http/protocol.zig+1-1
...@@ -82,7 +82,7 @@ pub const HeadersParser = struct {...@@ -82,7 +82,7 @@ pub const HeadersParser = struct {
82 /// If the amount returned is less than `bytes.len`, you may assume that the parser is in a content state and the82 /// If the amount returned is less than `bytes.len`, you may assume that the parser is in a content state and the
83 /// first byte of content is located at `bytes[result]`.83 /// first byte of content is located at `bytes[result]`.
84 pub fn findHeadersEnd(r: *HeadersParser, bytes: []const u8) u32 {84 pub fn findHeadersEnd(r: *HeadersParser, bytes: []const u8) u32 {
85 const vector_len: comptime_int = comptime @max(std.simd.suggestVectorSize(u8) orelse 1, 8);85 const vector_len: comptime_int = @max(std.simd.suggestVectorSize(u8) orelse 1, 8);
86 const len = @as(u32, @intCast(bytes.len));86 const len = @as(u32, @intCast(bytes.len));
87 var index: u32 = 0;87 var index: u32 = 0;
8888
lib/std/mem.zig+4-4
...@@ -974,7 +974,7 @@ pub fn indexOfSentinel(comptime T: type, comptime sentinel: T, p: [*:sentinel]co...@@ -974,7 +974,7 @@ pub fn indexOfSentinel(comptime T: type, comptime sentinel: T, p: [*:sentinel]co
974 // The below branch assumes that reading past the end of the buffer is valid, as long974 // The below branch assumes that reading past the end of the buffer is valid, as long
975 // as we don't read into a new page. This should be the case for most architectures975 // as we don't read into a new page. This should be the case for most architectures
976 // which use paged memory, however should be confirmed before adding a new arch below.976 // which use paged memory, however should be confirmed before adding a new arch below.
977 .aarch64, .x86, .x86_64 => if (comptime std.simd.suggestVectorSize(T)) |block_len| {977 .aarch64, .x86, .x86_64 => if (std.simd.suggestVectorSize(T)) |block_len| {
978 comptime std.debug.assert(std.mem.page_size % block_len == 0);978 comptime std.debug.assert(std.mem.page_size % block_len == 0);
979 const Block = @Vector(block_len, T);979 const Block = @Vector(block_len, T);
980 const mask: Block = @splat(sentinel);980 const mask: Block = @splat(sentinel);
...@@ -1027,7 +1027,7 @@ test "indexOfSentinel vector paths" {...@@ -1027,7 +1027,7 @@ test "indexOfSentinel vector paths" {
1027 const allocator = std.testing.allocator;1027 const allocator = std.testing.allocator;
10281028
1029 inline for (Types) |T| {1029 inline for (Types) |T| {
1030 const block_len = comptime std.simd.suggestVectorSize(T) orelse continue;1030 const block_len = std.simd.suggestVectorSize(T) orelse continue;
10311031
1032 // Allocate three pages so we guarantee a page-crossing address with a full page after1032 // Allocate three pages so we guarantee a page-crossing address with a full page after
1033 const memory = try allocator.alloc(T, 3 * std.mem.page_size / @sizeOf(T));1033 const memory = try allocator.alloc(T, 3 * std.mem.page_size / @sizeOf(T));
...@@ -1118,11 +1118,11 @@ pub fn indexOfScalarPos(comptime T: type, slice: []const T, start_index: usize,...@@ -1118,11 +1118,11 @@ pub fn indexOfScalarPos(comptime T: type, slice: []const T, start_index: usize,
1118 !@inComptime() and1118 !@inComptime() and
1119 (@typeInfo(T) == .Int or @typeInfo(T) == .Float) and std.math.isPowerOfTwo(@bitSizeOf(T)))1119 (@typeInfo(T) == .Int or @typeInfo(T) == .Float) and std.math.isPowerOfTwo(@bitSizeOf(T)))
1120 {1120 {
1121 if (comptime std.simd.suggestVectorSize(T)) |block_len| {1121 if (std.simd.suggestVectorSize(T)) |block_len| {
1122 // For Intel Nehalem (2009) and AMD Bulldozer (2012) or later, unaligned loads on aligned data result1122 // For Intel Nehalem (2009) and AMD Bulldozer (2012) or later, unaligned loads on aligned data result
1123 // in the same execution as aligned loads. We ignore older arch's here and don't bother pre-aligning.1123 // in the same execution as aligned loads. We ignore older arch's here and don't bother pre-aligning.
1124 //1124 //
1125 // Use `comptime std.simd.suggestVectorSize(T)` to get the same alignment as used in this function1125 // Use `std.simd.suggestVectorSize(T)` to get the same alignment as used in this function
1126 // however this usually isn't necessary unless your arch has a performance penalty due to this.1126 // however this usually isn't necessary unless your arch has a performance penalty due to this.
1127 //1127 //
1128 // This may differ for other arch's. Arm for example costs a cycle when loading across a cache1128 // This may differ for other arch's. Arm for example costs a cycle when loading across a cache
lib/std/simd.zig+2-2
...@@ -6,7 +6,7 @@...@@ -6,7 +6,7 @@
6const std = @import("std");6const std = @import("std");
7const builtin = @import("builtin");7const builtin = @import("builtin");
88
9pub fn suggestVectorSizeForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?usize {9pub fn suggestVectorSizeForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?comptime_int {
10 // This is guesswork, if you have better suggestions can add it or edit the current here10 // This is guesswork, if you have better suggestions can add it or edit the current here
11 // This can run in comptime only, but stage 1 fails at it, stage 2 can understand it11 // This can run in comptime only, but stage 1 fails at it, stage 2 can understand it
12 const element_bit_size = @max(8, std.math.ceilPowerOfTwo(u16, @bitSizeOf(T)) catch unreachable);12 const element_bit_size = @max(8, std.math.ceilPowerOfTwo(u16, @bitSizeOf(T)) catch unreachable);
...@@ -55,7 +55,7 @@ pub fn suggestVectorSizeForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?...@@ -55,7 +55,7 @@ pub fn suggestVectorSizeForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?
5555
56/// Suggests a target-dependant vector size for a given type, or null if scalars are recommended.56/// Suggests a target-dependant vector size for a given type, or null if scalars are recommended.
57/// Not yet implemented for every CPU architecture.57/// Not yet implemented for every CPU architecture.
58pub fn suggestVectorSize(comptime T: type) ?usize {58pub fn suggestVectorSize(comptime T: type) ?comptime_int {
59 return suggestVectorSizeForCpu(T, builtin.cpu);59 return suggestVectorSizeForCpu(T, builtin.cpu);
60}60}
6161
lib/std/unicode.zig+1-1
...@@ -200,7 +200,7 @@ pub fn utf8CountCodepoints(s: []const u8) !usize {...@@ -200,7 +200,7 @@ pub fn utf8CountCodepoints(s: []const u8) !usize {
200pub fn utf8ValidateSlice(input: []const u8) bool {200pub fn utf8ValidateSlice(input: []const u8) bool {
201 var remaining = input;201 var remaining = input;
202202
203 const V_len = comptime std.simd.suggestVectorSize(usize) orelse 1;203 const V_len = std.simd.suggestVectorSize(usize) orelse 1;
204 const V = @Vector(V_len, usize);204 const V = @Vector(V_len, usize);
205 const u8s_in_vector = @sizeOf(usize) * V_len;205 const u8s_in_vector = @sizeOf(usize) * V_len;
206206
src/Sema.zig+2-2
...@@ -8235,8 +8235,8 @@ fn zirVectorElemType(sema: *Sema, block: *Block, inst: Zir.Inst.Index) CompileEr...@@ -8235,8 +8235,8 @@ fn zirVectorElemType(sema: *Sema, block: *Block, inst: Zir.Inst.Index) CompileEr
8235fn zirVectorType(sema: *Sema, block: *Block, inst: Zir.Inst.Index) CompileError!Air.Inst.Ref {8235fn zirVectorType(sema: *Sema, block: *Block, inst: Zir.Inst.Index) CompileError!Air.Inst.Ref {
8236 const mod = sema.mod;8236 const mod = sema.mod;
8237 const inst_data = sema.code.instructions.items(.data)[inst].pl_node;8237 const inst_data = sema.code.instructions.items(.data)[inst].pl_node;
8238 const elem_type_src: LazySrcLoc = .{ .node_offset_builtin_call_arg0 = inst_data.src_node };8238 const len_src: LazySrcLoc = .{ .node_offset_builtin_call_arg0 = inst_data.src_node };
8239 const len_src: LazySrcLoc = .{ .node_offset_builtin_call_arg1 = inst_data.src_node };8239 const elem_type_src: LazySrcLoc = .{ .node_offset_builtin_call_arg1 = inst_data.src_node };
8240 const extra = sema.code.extraData(Zir.Inst.Bin, inst_data.payload_index).data;8240 const extra = sema.code.extraData(Zir.Inst.Bin, inst_data.payload_index).data;
8241 const len: u32 = @intCast(try sema.resolveInt(block, len_src, extra.lhs, Type.u32, .{8241 const len: u32 = @intCast(try sema.resolveInt(block, len_src, extra.lhs, Type.u32, .{
8242 .needed_comptime_reason = "vector length must be comptime-known",8242 .needed_comptime_reason = "vector length must be comptime-known",