| ... | @@ -54,7 +54,7 @@ const TLSVariant = enum { | ... | @@ -54,7 +54,7 @@ const TLSVariant = enum { |
| 54 | | 54 | |
| 55 | const tls_variant = switch (builtin.arch) { | 55 | const tls_variant = switch (builtin.arch) { |
| 56 | .arm, .armeb, .aarch64, .aarch64_be, .riscv32, .riscv64, .mips, .mipsel, .powerpc, .powerpc64, .powerpc64le => TLSVariant.VariantI, | 56 | .arm, .armeb, .aarch64, .aarch64_be, .riscv32, .riscv64, .mips, .mipsel, .powerpc, .powerpc64, .powerpc64le => TLSVariant.VariantI, |
| 57 | .x86_64, .i386 => TLSVariant.VariantII, | 57 | .x86_64, .i386, .sparcv9 => TLSVariant.VariantII, |
| 58 | else => @compileError("undefined tls_variant for this architecture"), | 58 | else => @compileError("undefined tls_variant for this architecture"), |
| 59 | }; | 59 | }; |
| 60 | | 60 | |
| ... | @@ -168,6 +168,11 @@ pub fn setThreadPointer(addr: usize) void { | ... | @@ -168,6 +168,11 @@ pub fn setThreadPointer(addr: usize) void { |
| 168 | .powerpc, .powerpc64, .powerpc64le => { | 168 | .powerpc, .powerpc64, .powerpc64le => { |
| 169 | asm volatile ( | 169 | asm volatile ( |
| 170 | \\ mr 13, %[addr] | 170 | \\ mr 13, %[addr] |
| | 171 | ); |
| | 172 | }, |
| | 173 | .sparcv9 => { |
| | 174 | asm volatile ( |
| | 175 | \\ mov %[addr], %%g7 |
| 171 | : | 176 | : |
| 172 | : [addr] "r" (addr) | 177 | : [addr] "r" (addr) |
| 173 | ); | 178 | ); |