authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-08-04 21:46:49-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-08-04 21:46:49-07:00
log316b4bde6a118c0742eee0d45137268a1dc99a26
tree84e9fb5c41e5785d7efd58ab788b95bbd323e6df
parente2b9e2137ee21acaaaee0e58600216ef3c06c86f

update target CPU features from llvm 10 to 11rc1

13 files changed, 991 insertions(+), 67 deletions(-)

lib/std/target.zig+1-1
...@@ -485,7 +485,7 @@ pub const Target = struct {...@@ -485,7 +485,7 @@ pub const Target = struct {
485 pub const Set = struct {485 pub const Set = struct {
486 ints: [usize_count]usize,486 ints: [usize_count]usize,
487487
488 pub const needed_bit_count = 155;488 pub const needed_bit_count = 168;
489 pub const byte_count = (needed_bit_count + 7) / 8;489 pub const byte_count = (needed_bit_count + 7) / 8;
490 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);490 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
491 pub const Index = std.math.Log2Int(std.meta.Int(false, usize_count * @bitSizeOf(usize)));491 pub const Index = std.math.Log2Int(std.meta.Int(false, usize_count * @bitSizeOf(usize)));
lib/std/target/aarch64.zig+201-7
...@@ -3,6 +3,7 @@ const CpuFeature = std.Target.Cpu.Feature;...@@ -3,6 +3,7 @@ const CpuFeature = std.Target.Cpu.Feature;
3const CpuModel = std.Target.Cpu.Model;3const CpuModel = std.Target.Cpu.Model;
44
5pub const Feature = enum {5pub const Feature = enum {
6 a34,
6 a65,7 a65,
7 a76,8 a76,
8 aes,9 aes,
...@@ -10,6 +11,7 @@ pub const Feature = enum {...@@ -10,6 +11,7 @@ pub const Feature = enum {
10 alternate_sextload_cvt_f32_pattern,11 alternate_sextload_cvt_f32_pattern,
11 altnzcv,12 altnzcv,
12 am,13 am,
14 amvs,
13 apple_a10,15 apple_a10,
14 apple_a11,16 apple_a11,
15 apple_a12,17 apple_a12,
...@@ -18,6 +20,7 @@ pub const Feature = enum {...@@ -18,6 +20,7 @@ pub const Feature = enum {
18 arith_bcc_fusion,20 arith_bcc_fusion,
19 arith_cbz_fusion,21 arith_cbz_fusion,
20 balance_fp_ops,22 balance_fp_ops,
23 bf16,
21 bti,24 bti,
22 call_saved_x10,25 call_saved_x10,
23 call_saved_x11,26 call_saved_x11,
...@@ -38,9 +41,13 @@ pub const Feature = enum {...@@ -38,9 +41,13 @@ pub const Feature = enum {
38 disable_latency_sched_heuristic,41 disable_latency_sched_heuristic,
39 dit,42 dit,
40 dotprod,43 dotprod,
44 ecv,
41 ete,45 ete,
42 exynos_cheap_as_move,46 exynos_cheap_as_move,
43 exynosm4,47 exynosm4,
48 f32mm,
49 f64mm,
50 fgt,
44 fmi,51 fmi,
45 force_32bit_jump_tables,52 force_32bit_jump_tables,
46 fp_armv8,53 fp_armv8,
...@@ -53,6 +60,9 @@ pub const Feature = enum {...@@ -53,6 +60,9 @@ pub const Feature = enum {
53 fuse_crypto_eor,60 fuse_crypto_eor,
54 fuse_csel,61 fuse_csel,
55 fuse_literals,62 fuse_literals,
63 harden_sls_blr,
64 harden_sls_retbr,
65 i8mm,
56 jsconv,66 jsconv,
57 lor,67 lor,
58 lse,68 lse,
...@@ -96,6 +106,7 @@ pub const Feature = enum {...@@ -96,6 +106,7 @@ pub const Feature = enum {
96 reserve_x27,106 reserve_x27,
97 reserve_x28,107 reserve_x28,
98 reserve_x3,108 reserve_x3,
109 reserve_x30,
99 reserve_x4,110 reserve_x4,
100 reserve_x5,111 reserve_x5,
101 reserve_x6,112 reserve_x6,
...@@ -129,6 +140,7 @@ pub const Feature = enum {...@@ -129,6 +140,7 @@ pub const Feature = enum {
129 trbe,140 trbe,
130 uaops,141 uaops,
131 use_aa,142 use_aa,
143 use_experimental_zeroing_pseudos,
132 use_postra_scheduler,144 use_postra_scheduler,
133 use_reciprocal_square_root,145 use_reciprocal_square_root,
134 v8a,146 v8a,
...@@ -137,6 +149,7 @@ pub const Feature = enum {...@@ -137,6 +149,7 @@ pub const Feature = enum {
137 v8_3a,149 v8_3a,
138 v8_4a,150 v8_4a,
139 v8_5a,151 v8_5a,
152 v8_6a,
140 vh,153 vh,
141 zcm,154 zcm,
142 zcz,155 zcz,
...@@ -152,6 +165,16 @@ pub const all_features = blk: {...@@ -152,6 +165,16 @@ pub const all_features = blk: {
152 const len = @typeInfo(Feature).Enum.fields.len;165 const len = @typeInfo(Feature).Enum.fields.len;
153 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);166 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
154 var result: [len]CpuFeature = undefined;167 var result: [len]CpuFeature = undefined;
168 result[@enumToInt(Feature.a34)] = .{
169 .llvm_name = "a35",
170 .description = "Cortex-A34 ARM processors",
171 .dependencies = featureSet(&[_]Feature{
172 .crc,
173 .crypto,
174 .perfmon,
175 .v8a,
176 }),
177 };
155 result[@enumToInt(Feature.a65)] = .{178 result[@enumToInt(Feature.a65)] = .{
156 .llvm_name = "a65",179 .llvm_name = "a65",
157 .description = "Cortex-A65 ARM processors",180 .description = "Cortex-A65 ARM processors",
...@@ -206,6 +229,13 @@ pub const all_features = blk: {...@@ -206,6 +229,13 @@ pub const all_features = blk: {
206 .description = "Enable v8.4-A Activity Monitors extension",229 .description = "Enable v8.4-A Activity Monitors extension",
207 .dependencies = featureSet(&[_]Feature{}),230 .dependencies = featureSet(&[_]Feature{}),
208 };231 };
232 result[@enumToInt(Feature.amvs)] = .{
233 .llvm_name = "amvs",
234 .description = "Enable v8.6-A Activity Monitors Virtualization support",
235 .dependencies = featureSet(&[_]Feature{
236 .am,
237 }),
238 };
209 result[@enumToInt(Feature.apple_a10)] = .{239 result[@enumToInt(Feature.apple_a10)] = .{
210 .llvm_name = "apple-a10",240 .llvm_name = "apple-a10",
211 .description = "Apple A10",241 .description = "Apple A10",
...@@ -325,6 +355,11 @@ pub const all_features = blk: {...@@ -325,6 +355,11 @@ pub const all_features = blk: {
325 .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",355 .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
326 .dependencies = featureSet(&[_]Feature{}),356 .dependencies = featureSet(&[_]Feature{}),
327 };357 };
358 result[@enumToInt(Feature.bf16)] = .{
359 .llvm_name = "bf16",
360 .description = "Enable BFloat16 Extension",
361 .dependencies = featureSet(&[_]Feature{}),
362 };
328 result[@enumToInt(Feature.bti)] = .{363 result[@enumToInt(Feature.bti)] = .{
329 .llvm_name = "bti",364 .llvm_name = "bti",
330 .description = "Enable Branch Target Identification",365 .description = "Enable Branch Target Identification",
...@@ -431,6 +466,11 @@ pub const all_features = blk: {...@@ -431,6 +466,11 @@ pub const all_features = blk: {
431 .description = "Enable dot product support",466 .description = "Enable dot product support",
432 .dependencies = featureSet(&[_]Feature{}),467 .dependencies = featureSet(&[_]Feature{}),
433 };468 };
469 result[@enumToInt(Feature.ecv)] = .{
470 .llvm_name = "ecv",
471 .description = "Enable enhanced counter virtualization extension",
472 .dependencies = featureSet(&[_]Feature{}),
473 };
434 result[@enumToInt(Feature.ete)] = .{474 result[@enumToInt(Feature.ete)] = .{
435 .llvm_name = "ete",475 .llvm_name = "ete",
436 .description = "Enable Embedded Trace Extension",476 .description = "Enable Embedded Trace Extension",
...@@ -468,6 +508,25 @@ pub const all_features = blk: {...@@ -468,6 +508,25 @@ pub const all_features = blk: {
468 .zcz,508 .zcz,
469 }),509 }),
470 };510 };
511 result[@enumToInt(Feature.f32mm)] = .{
512 .llvm_name = "f32mm",
513 .description = "Enable Matrix Multiply FP32 Extension",
514 .dependencies = featureSet(&[_]Feature{
515 .sve,
516 }),
517 };
518 result[@enumToInt(Feature.f64mm)] = .{
519 .llvm_name = "f64mm",
520 .description = "Enable Matrix Multiply FP64 Extension",
521 .dependencies = featureSet(&[_]Feature{
522 .sve,
523 }),
524 };
525 result[@enumToInt(Feature.fgt)] = .{
526 .llvm_name = "fgt",
527 .description = "Enable fine grained virtualization traps extension",
528 .dependencies = featureSet(&[_]Feature{}),
529 };
471 result[@enumToInt(Feature.fmi)] = .{530 result[@enumToInt(Feature.fmi)] = .{
472 .llvm_name = "fmi",531 .llvm_name = "fmi",
473 .description = "Enable v8.4-A Flag Manipulation Instructions",532 .description = "Enable v8.4-A Flag Manipulation Instructions",
...@@ -532,9 +591,24 @@ pub const all_features = blk: {...@@ -532,9 +591,24 @@ pub const all_features = blk: {
532 .description = "CPU fuses literal generation operations",591 .description = "CPU fuses literal generation operations",
533 .dependencies = featureSet(&[_]Feature{}),592 .dependencies = featureSet(&[_]Feature{}),
534 };593 };
594 result[@enumToInt(Feature.harden_sls_blr)] = .{
595 .llvm_name = "harden-sls-blr",
596 .description = "Harden against straight line speculation across BLR instructions",
597 .dependencies = featureSet(&[_]Feature{}),
598 };
599 result[@enumToInt(Feature.harden_sls_retbr)] = .{
600 .llvm_name = "harden-sls-retbr",
601 .description = "Harden against straight line speculation across RET and BR instructions",
602 .dependencies = featureSet(&[_]Feature{}),
603 };
604 result[@enumToInt(Feature.i8mm)] = .{
605 .llvm_name = "i8mm",
606 .description = "Enable Matrix Multiply Int8 Extension",
607 .dependencies = featureSet(&[_]Feature{}),
608 };
535 result[@enumToInt(Feature.jsconv)] = .{609 result[@enumToInt(Feature.jsconv)] = .{
536 .llvm_name = "jsconv",610 .llvm_name = "jsconv",
537 .description = "Enable v8.3-A JavaScript FP conversion enchancement",611 .description = "Enable v8.3-A JavaScript FP conversion instructions",
538 .dependencies = featureSet(&[_]Feature{612 .dependencies = featureSet(&[_]Feature{
539 .fp_armv8,613 .fp_armv8,
540 }),614 }),
...@@ -607,12 +681,12 @@ pub const all_features = blk: {...@@ -607,12 +681,12 @@ pub const all_features = blk: {
607 };681 };
608 result[@enumToInt(Feature.nv)] = .{682 result[@enumToInt(Feature.nv)] = .{
609 .llvm_name = "nv",683 .llvm_name = "nv",
610 .description = "Enable v8.4-A Nested Virtualization Enchancement",684 .description = "Enable v8.4-A Nested Virtualization extension",
611 .dependencies = featureSet(&[_]Feature{}),685 .dependencies = featureSet(&[_]Feature{}),
612 };686 };
613 result[@enumToInt(Feature.pa)] = .{687 result[@enumToInt(Feature.pa)] = .{
614 .llvm_name = "pa",688 .llvm_name = "pa",
615 .description = "Enable v8.3-A Pointer Authentication enchancement",689 .description = "Enable v8.3-A Pointer Authentication extension",
616 .dependencies = featureSet(&[_]Feature{}),690 .dependencies = featureSet(&[_]Feature{}),
617 };691 };
618 result[@enumToInt(Feature.pan)] = .{692 result[@enumToInt(Feature.pan)] = .{
...@@ -776,6 +850,11 @@ pub const all_features = blk: {...@@ -776,6 +850,11 @@ pub const all_features = blk: {
776 .description = "Reserve X3, making it unavailable as a GPR",850 .description = "Reserve X3, making it unavailable as a GPR",
777 .dependencies = featureSet(&[_]Feature{}),851 .dependencies = featureSet(&[_]Feature{}),
778 };852 };
853 result[@enumToInt(Feature.reserve_x30)] = .{
854 .llvm_name = "reserve-x30",
855 .description = "Reserve X30, making it unavailable as a GPR",
856 .dependencies = featureSet(&[_]Feature{}),
857 };
779 result[@enumToInt(Feature.reserve_x4)] = .{858 result[@enumToInt(Feature.reserve_x4)] = .{
780 .llvm_name = "reserve-x4",859 .llvm_name = "reserve-x4",
781 .description = "Reserve X4, making it unavailable as a GPR",860 .description = "Reserve X4, making it unavailable as a GPR",
...@@ -961,6 +1040,11 @@ pub const all_features = blk: {...@@ -961,6 +1040,11 @@ pub const all_features = blk: {
961 .description = "Use alias analysis during codegen",1040 .description = "Use alias analysis during codegen",
962 .dependencies = featureSet(&[_]Feature{}),1041 .dependencies = featureSet(&[_]Feature{}),
963 };1042 };
1043 result[@enumToInt(Feature.use_experimental_zeroing_pseudos)] = .{
1044 .llvm_name = "use-experimental-zeroing-pseudos",
1045 .description = "Hint to the compiler that the MOVPRFX instruction is merged with destructive operations",
1046 .dependencies = featureSet(&[_]Feature{}),
1047 };
964 result[@enumToInt(Feature.use_postra_scheduler)] = .{1048 result[@enumToInt(Feature.use_postra_scheduler)] = .{
965 .llvm_name = "use-postra-scheduler",1049 .llvm_name = "use-postra-scheduler",
966 .description = "Schedule again after register allocation",1050 .description = "Schedule again after register allocation",
...@@ -1049,6 +1133,18 @@ pub const all_features = blk: {...@@ -1049,6 +1133,18 @@ pub const all_features = blk: {
1049 .v8_4a,1133 .v8_4a,
1050 }),1134 }),
1051 };1135 };
1136 result[@enumToInt(Feature.v8_6a)] = .{
1137 .llvm_name = "v8.6a",
1138 .description = "Support ARM v8.6a instructions",
1139 .dependencies = featureSet(&[_]Feature{
1140 .amvs,
1141 .bf16,
1142 .ecv,
1143 .fgt,
1144 .i8mm,
1145 .v8_5a,
1146 }),
1147 };
1052 result[@enumToInt(Feature.vh)] = .{1148 result[@enumToInt(Feature.vh)] = .{
1053 .llvm_name = "vh",1149 .llvm_name = "vh",
1054 .description = "Enables ARM v8.1 Virtual Host extension",1150 .description = "Enables ARM v8.1 Virtual Host extension",
...@@ -1091,6 +1187,21 @@ pub const all_features = blk: {...@@ -1091,6 +1187,21 @@ pub const all_features = blk: {
1091};1187};
10921188
1093pub const cpu = struct {1189pub const cpu = struct {
1190 pub const a64fx = CpuModel{
1191 .name = "a64fx",
1192 .llvm_name = "a64fx",
1193 .features = featureSet(&[_]Feature{
1194 .complxnum,
1195 .fp_armv8,
1196 .fullfp16,
1197 .neon,
1198 .perfmon,
1199 .sha2,
1200 .sve,
1201 .use_postra_scheduler,
1202 .v8_2a,
1203 }),
1204 };
1094 pub const apple_a10 = CpuModel{1205 pub const apple_a10 = CpuModel{
1095 .name = "apple_a10",1206 .name = "apple_a10",
1096 .llvm_name = "apple-a10",1207 .llvm_name = "apple-a10",
...@@ -1161,14 +1272,28 @@ pub const cpu = struct {...@@ -1161,14 +1272,28 @@ pub const cpu = struct {
1161 .apple_a12,1272 .apple_a12,
1162 }),1273 }),
1163 };1274 };
1275 pub const carmel = CpuModel{
1276 .name = "carmel",
1277 .llvm_name = "carmel",
1278 .features = featureSet(&[_]Feature{
1279 .crypto,
1280 .fullfp16,
1281 .neon,
1282 .v8_2a,
1283 }),
1284 };
1285 pub const cortex_a34 = CpuModel{
1286 .name = "cortex_a34",
1287 .llvm_name = "cortex-a34",
1288 .features = featureSet(&[_]Feature{
1289 .a34,
1290 }),
1291 };
1164 pub const cortex_a35 = CpuModel{1292 pub const cortex_a35 = CpuModel{
1165 .name = "cortex_a35",1293 .name = "cortex_a35",
1166 .llvm_name = "cortex-a35",1294 .llvm_name = "cortex-a35",
1167 .features = featureSet(&[_]Feature{1295 .features = featureSet(&[_]Feature{
1168 .crc,1296 .a34,
1169 .crypto,
1170 .perfmon,
1171 .v8a,
1172 }),1297 }),
1173 };1298 };
1174 pub const cortex_a53 = CpuModel{1299 pub const cortex_a53 = CpuModel{
...@@ -1278,6 +1403,54 @@ pub const cpu = struct {...@@ -1278,6 +1403,54 @@ pub const cpu = struct {
1278 .a76,1403 .a76,
1279 }),1404 }),
1280 };1405 };
1406 pub const cortex_a77 = CpuModel{
1407 .name = "cortex_a77",
1408 .llvm_name = "cortex-a77",
1409 .features = featureSet(&[_]Feature{
1410 .crypto,
1411 .dotprod,
1412 .fp_armv8,
1413 .fullfp16,
1414 .neon,
1415 .rcpc,
1416 .v8_2a,
1417 }),
1418 };
1419 pub const cortex_a78 = CpuModel{
1420 .name = "cortex_a78",
1421 .llvm_name = "cortex-a78",
1422 .features = featureSet(&[_]Feature{
1423 .crypto,
1424 .dotprod,
1425 .fp_armv8,
1426 .fullfp16,
1427 .fuse_aes,
1428 .neon,
1429 .perfmon,
1430 .rcpc,
1431 .spe,
1432 .ssbs,
1433 .use_postra_scheduler,
1434 .v8_2a,
1435 }),
1436 };
1437 pub const cortex_x1 = CpuModel{
1438 .name = "cortex_x1",
1439 .llvm_name = "cortex-x1",
1440 .features = featureSet(&[_]Feature{
1441 .crypto,
1442 .dotprod,
1443 .fp_armv8,
1444 .fullfp16,
1445 .fuse_aes,
1446 .neon,
1447 .perfmon,
1448 .rcpc,
1449 .spe,
1450 .use_postra_scheduler,
1451 .v8_2a,
1452 }),
1453 };
1281 pub const cyclone = CpuModel{1454 pub const cyclone = CpuModel{
1282 .name = "cyclone",1455 .name = "cyclone",
1283 .llvm_name = "cyclone",1456 .llvm_name = "cyclone",
...@@ -1452,6 +1625,27 @@ pub const cpu = struct {...@@ -1452,6 +1625,27 @@ pub const cpu = struct {
1452 .v8_1a,1625 .v8_1a,
1453 }),1626 }),
1454 };1627 };
1628 pub const thunderx3t110 = CpuModel{
1629 .name = "thunderx3t110",
1630 .llvm_name = "thunderx3t110",
1631 .features = featureSet(&[_]Feature{
1632 .aggressive_fma,
1633 .arith_bcc_fusion,
1634 .balance_fp_ops,
1635 .crc,
1636 .crypto,
1637 .fp_armv8,
1638 .lse,
1639 .neon,
1640 .pa,
1641 .perfmon,
1642 .predictable_select_expensive,
1643 .strict_align,
1644 .use_aa,
1645 .use_postra_scheduler,
1646 .v8_3a,
1647 }),
1648 };
1455 pub const thunderxt81 = CpuModel{1649 pub const thunderxt81 = CpuModel{
1456 .name = "thunderxt81",1650 .name = "thunderxt81",
1457 .llvm_name = "thunderxt81",1651 .llvm_name = "thunderxt81",
lib/std/target/amdgpu.zig+105-38
...@@ -5,6 +5,7 @@ const CpuModel = std.Target.Cpu.Model;...@@ -5,6 +5,7 @@ const CpuModel = std.Target.Cpu.Model;
5pub const Feature = enum {5pub const Feature = enum {
6 @"16_bit_insts",6 @"16_bit_insts",
7 DumpCode,7 DumpCode,
8 a16,
8 add_no_carry_insts,9 add_no_carry_insts,
9 aperture_regs,10 aperture_regs,
10 atomic_fadd_insts,11 atomic_fadd_insts,
...@@ -21,9 +22,11 @@ pub const Feature = enum {...@@ -21,9 +22,11 @@ pub const Feature = enum {
21 dot6_insts,22 dot6_insts,
22 dpp,23 dpp,
23 dpp8,24 dpp8,
25 ds_src2_insts,
24 dumpcode,26 dumpcode,
25 enable_ds128,27 enable_ds128,
26 enable_prt_strict_null,28 enable_prt_strict_null,
29 fast_denormal_f32,
27 fast_fmaf,30 fast_fmaf,
28 flat_address_space,31 flat_address_space,
29 flat_for_global,32 flat_for_global,
...@@ -33,15 +36,14 @@ pub const Feature = enum {...@@ -33,15 +36,14 @@ pub const Feature = enum {
33 flat_segment_offset_bug,36 flat_segment_offset_bug,
34 fma_mix_insts,37 fma_mix_insts,
35 fmaf,38 fmaf,
36 fp_exceptions,
37 fp16_denormals,
38 fp32_denormals,
39 fp64,39 fp64,
40 fp64_denormals,40 g16,
41 fp64_fp16_denormals,
42 gcn3_encoding,41 gcn3_encoding,
42 get_wave_id_inst,
43 gfx10,43 gfx10,
44 gfx10_3_insts,
44 gfx10_insts,45 gfx10_insts,
46 gfx10_b_encoding,
45 gfx7_gfx8_gfx9_insts,47 gfx7_gfx8_gfx9_insts,
46 gfx8_insts,48 gfx8_insts,
47 gfx9,49 gfx9,
...@@ -58,6 +60,7 @@ pub const Feature = enum {...@@ -58,6 +60,7 @@ pub const Feature = enum {
58 localmemorysize0,60 localmemorysize0,
59 localmemorysize32768,61 localmemorysize32768,
60 localmemorysize65536,62 localmemorysize65536,
63 mad_mac_f32_insts,
61 mad_mix_insts,64 mad_mix_insts,
62 mai_insts,65 mai_insts,
63 max_private_element_size_16,66 max_private_element_size_16,
...@@ -78,6 +81,7 @@ pub const Feature = enum {...@@ -78,6 +81,7 @@ pub const Feature = enum {
78 r128_a16,81 r128_a16,
79 register_banking,82 register_banking,
80 s_memrealtime,83 s_memrealtime,
84 s_memtime_inst,
81 scalar_atomics,85 scalar_atomics,
82 scalar_flat_scratch_insts,86 scalar_flat_scratch_insts,
83 scalar_stores,87 scalar_stores,
...@@ -129,6 +133,11 @@ pub const all_features = blk: {...@@ -129,6 +133,11 @@ pub const all_features = blk: {
129 .description = "Dump MachineInstrs in the CodeEmitter",133 .description = "Dump MachineInstrs in the CodeEmitter",
130 .dependencies = featureSet(&[_]Feature{}),134 .dependencies = featureSet(&[_]Feature{}),
131 };135 };
136 result[@enumToInt(Feature.a16)] = .{
137 .llvm_name = "a16",
138 .description = "Support gfx10-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands",
139 .dependencies = featureSet(&[_]Feature{}),
140 };
132 result[@enumToInt(Feature.add_no_carry_insts)] = .{141 result[@enumToInt(Feature.add_no_carry_insts)] = .{
133 .llvm_name = "add-no-carry-insts",142 .llvm_name = "add-no-carry-insts",
134 .description = "Have VALU add/sub instructions without carry out",143 .description = "Have VALU add/sub instructions without carry out",
...@@ -142,7 +151,9 @@ pub const all_features = blk: {...@@ -142,7 +151,9 @@ pub const all_features = blk: {
142 result[@enumToInt(Feature.atomic_fadd_insts)] = .{151 result[@enumToInt(Feature.atomic_fadd_insts)] = .{
143 .llvm_name = "atomic-fadd-insts",152 .llvm_name = "atomic-fadd-insts",
144 .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",153 .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
145 .dependencies = featureSet(&[_]Feature{}),154 .dependencies = featureSet(&[_]Feature{
155 .flat_global_insts,
156 }),
146 };157 };
147 result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{158 result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
148 .llvm_name = "auto-waitcnt-before-barrier",159 .llvm_name = "auto-waitcnt-before-barrier",
...@@ -209,6 +220,11 @@ pub const all_features = blk: {...@@ -209,6 +220,11 @@ pub const all_features = blk: {
209 .description = "Support DPP8 (Data Parallel Primitives) extension",220 .description = "Support DPP8 (Data Parallel Primitives) extension",
210 .dependencies = featureSet(&[_]Feature{}),221 .dependencies = featureSet(&[_]Feature{}),
211 };222 };
223 result[@enumToInt(Feature.ds_src2_insts)] = .{
224 .llvm_name = "ds-src2-insts",
225 .description = "Has ds_*_src2 instructions",
226 .dependencies = featureSet(&[_]Feature{}),
227 };
212 result[@enumToInt(Feature.dumpcode)] = .{228 result[@enumToInt(Feature.dumpcode)] = .{
213 .llvm_name = "dumpcode",229 .llvm_name = "dumpcode",
214 .description = "Dump MachineInstrs in the CodeEmitter",230 .description = "Dump MachineInstrs in the CodeEmitter",
...@@ -224,6 +240,11 @@ pub const all_features = blk: {...@@ -224,6 +240,11 @@ pub const all_features = blk: {
224 .description = "Enable zeroing of result registers for sparse texture fetches",240 .description = "Enable zeroing of result registers for sparse texture fetches",
225 .dependencies = featureSet(&[_]Feature{}),241 .dependencies = featureSet(&[_]Feature{}),
226 };242 };
243 result[@enumToInt(Feature.fast_denormal_f32)] = .{
244 .llvm_name = "fast-denormal-f32",
245 .description = "Enabling denormals does not cause f32 instructions to run at f64 rates",
246 .dependencies = featureSet(&[_]Feature{}),
247 };
227 result[@enumToInt(Feature.fast_fmaf)] = .{248 result[@enumToInt(Feature.fast_fmaf)] = .{
228 .llvm_name = "fast-fmaf",249 .llvm_name = "fast-fmaf",
229 .description = "Assuming f32 fma is at least as fast as mul + add",250 .description = "Assuming f32 fma is at least as fast as mul + add",
...@@ -269,58 +290,38 @@ pub const all_features = blk: {...@@ -269,58 +290,38 @@ pub const all_features = blk: {
269 .description = "Enable single precision FMA (not as fast as mul+add, but fused)",290 .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
270 .dependencies = featureSet(&[_]Feature{}),291 .dependencies = featureSet(&[_]Feature{}),
271 };292 };
272 result[@enumToInt(Feature.fp_exceptions)] = .{
273 .llvm_name = "fp-exceptions",
274 .description = "Enable floating point exceptions",
275 .dependencies = featureSet(&[_]Feature{}),
276 };
277 result[@enumToInt(Feature.fp16_denormals)] = .{
278 .llvm_name = "fp16-denormals",
279 .description = "Enable half precision denormal handling",
280 .dependencies = featureSet(&[_]Feature{
281 .fp64_fp16_denormals,
282 }),
283 };
284 result[@enumToInt(Feature.fp32_denormals)] = .{
285 .llvm_name = "fp32-denormals",
286 .description = "Enable single precision denormal handling",
287 .dependencies = featureSet(&[_]Feature{}),
288 };
289 result[@enumToInt(Feature.fp64)] = .{293 result[@enumToInt(Feature.fp64)] = .{
290 .llvm_name = "fp64",294 .llvm_name = "fp64",
291 .description = "Enable double precision operations",295 .description = "Enable double precision operations",
292 .dependencies = featureSet(&[_]Feature{}),296 .dependencies = featureSet(&[_]Feature{}),
293 };297 };
294 result[@enumToInt(Feature.fp64_denormals)] = .{298 result[@enumToInt(Feature.g16)] = .{
295 .llvm_name = "fp64-denormals",299 .llvm_name = "g16",
296 .description = "Enable double and half precision denormal handling",300 .description = "Support G16 for 16-bit gradient image operands",
297 .dependencies = featureSet(&[_]Feature{301 .dependencies = featureSet(&[_]Feature{}),
298 .fp64,
299 .fp64_fp16_denormals,
300 }),
301 };
302 result[@enumToInt(Feature.fp64_fp16_denormals)] = .{
303 .llvm_name = "fp64-fp16-denormals",
304 .description = "Enable double and half precision denormal handling",
305 .dependencies = featureSet(&[_]Feature{
306 .fp64,
307 }),
308 };302 };
309 result[@enumToInt(Feature.gcn3_encoding)] = .{303 result[@enumToInt(Feature.gcn3_encoding)] = .{
310 .llvm_name = "gcn3-encoding",304 .llvm_name = "gcn3-encoding",
311 .description = "Encoding format for VI",305 .description = "Encoding format for VI",
312 .dependencies = featureSet(&[_]Feature{}),306 .dependencies = featureSet(&[_]Feature{}),
313 };307 };
308 result[@enumToInt(Feature.get_wave_id_inst)] = .{
309 .llvm_name = "get-wave-id-inst",
310 .description = "Has s_get_waveid_in_workgroup instruction",
311 .dependencies = featureSet(&[_]Feature{}),
312 };
314 result[@enumToInt(Feature.gfx10)] = .{313 result[@enumToInt(Feature.gfx10)] = .{
315 .llvm_name = "gfx10",314 .llvm_name = "gfx10",
316 .description = "GFX10 GPU generation",315 .description = "GFX10 GPU generation",
317 .dependencies = featureSet(&[_]Feature{316 .dependencies = featureSet(&[_]Feature{
318 .@"16_bit_insts",317 .@"16_bit_insts",
318 .a16,
319 .add_no_carry_insts,319 .add_no_carry_insts,
320 .aperture_regs,320 .aperture_regs,
321 .ci_insts,321 .ci_insts,
322 .dpp,322 .dpp,
323 .dpp8,323 .dpp8,
324 .fast_denormal_f32,
324 .fast_fmaf,325 .fast_fmaf,
325 .flat_address_space,326 .flat_address_space,
326 .flat_global_insts,327 .flat_global_insts,
...@@ -328,6 +329,7 @@ pub const all_features = blk: {...@@ -328,6 +329,7 @@ pub const all_features = blk: {
328 .flat_scratch_insts,329 .flat_scratch_insts,
329 .fma_mix_insts,330 .fma_mix_insts,
330 .fp64,331 .fp64,
332 .g16,
331 .gfx10_insts,333 .gfx10_insts,
332 .gfx8_insts,334 .gfx8_insts,
333 .gfx9_insts,335 .gfx9_insts,
...@@ -351,11 +353,21 @@ pub const all_features = blk: {...@@ -351,11 +353,21 @@ pub const all_features = blk: {
351 .vscnt,353 .vscnt,
352 }),354 }),
353 };355 };
356 result[@enumToInt(Feature.gfx10_3_insts)] = .{
357 .llvm_name = "gfx10-3-insts",
358 .description = "Additional instructions for GFX10.3",
359 .dependencies = featureSet(&[_]Feature{}),
360 };
354 result[@enumToInt(Feature.gfx10_insts)] = .{361 result[@enumToInt(Feature.gfx10_insts)] = .{
355 .llvm_name = "gfx10-insts",362 .llvm_name = "gfx10-insts",
356 .description = "Additional instructions for GFX10+",363 .description = "Additional instructions for GFX10+",
357 .dependencies = featureSet(&[_]Feature{}),364 .dependencies = featureSet(&[_]Feature{}),
358 };365 };
366 result[@enumToInt(Feature.gfx10_b_encoding)] = .{
367 .llvm_name = "gfx10_b-encoding",
368 .description = "Encoding format GFX10_B",
369 .dependencies = featureSet(&[_]Feature{}),
370 };
359 result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{371 result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
360 .llvm_name = "gfx7-gfx8-gfx9-insts",372 .llvm_name = "gfx7-gfx8-gfx9-insts",
361 .description = "Instructions shared in GFX7, GFX8, GFX9",373 .description = "Instructions shared in GFX7, GFX8, GFX9",
...@@ -375,6 +387,8 @@ pub const all_features = blk: {...@@ -375,6 +387,8 @@ pub const all_features = blk: {
375 .aperture_regs,387 .aperture_regs,
376 .ci_insts,388 .ci_insts,
377 .dpp,389 .dpp,
390 .ds_src2_insts,
391 .fast_denormal_f32,
378 .fast_fmaf,392 .fast_fmaf,
379 .flat_address_space,393 .flat_address_space,
380 .flat_global_insts,394 .flat_global_insts,
...@@ -388,8 +402,10 @@ pub const all_features = blk: {...@@ -388,8 +402,10 @@ pub const all_features = blk: {
388 .int_clamp_insts,402 .int_clamp_insts,
389 .inv_2pi_inline_imm,403 .inv_2pi_inline_imm,
390 .localmemorysize65536,404 .localmemorysize65536,
405 .mad_mac_f32_insts,
391 .r128_a16,406 .r128_a16,
392 .s_memrealtime,407 .s_memrealtime,
408 .s_memtime_inst,
393 .scalar_atomics,409 .scalar_atomics,
394 .scalar_flat_scratch_insts,410 .scalar_flat_scratch_insts,
395 .scalar_stores,411 .scalar_stores,
...@@ -467,6 +483,11 @@ pub const all_features = blk: {...@@ -467,6 +483,11 @@ pub const all_features = blk: {
467 .description = "The size of local memory in bytes",483 .description = "The size of local memory in bytes",
468 .dependencies = featureSet(&[_]Feature{}),484 .dependencies = featureSet(&[_]Feature{}),
469 };485 };
486 result[@enumToInt(Feature.mad_mac_f32_insts)] = .{
487 .llvm_name = "mad-mac-f32-insts",
488 .description = "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions",
489 .dependencies = featureSet(&[_]Feature{}),
490 };
470 result[@enumToInt(Feature.mad_mix_insts)] = .{491 result[@enumToInt(Feature.mad_mix_insts)] = .{
471 .llvm_name = "mad-mix-insts",492 .llvm_name = "mad-mix-insts",
472 .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",493 .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
...@@ -554,7 +575,7 @@ pub const all_features = blk: {...@@ -554,7 +575,7 @@ pub const all_features = blk: {
554 };575 };
555 result[@enumToInt(Feature.r128_a16)] = .{576 result[@enumToInt(Feature.r128_a16)] = .{
556 .llvm_name = "r128-a16",577 .llvm_name = "r128-a16",
557 .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",578 .description = "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128",
558 .dependencies = featureSet(&[_]Feature{}),579 .dependencies = featureSet(&[_]Feature{}),
559 };580 };
560 result[@enumToInt(Feature.register_banking)] = .{581 result[@enumToInt(Feature.register_banking)] = .{
...@@ -567,6 +588,11 @@ pub const all_features = blk: {...@@ -567,6 +588,11 @@ pub const all_features = blk: {
567 .description = "Has s_memrealtime instruction",588 .description = "Has s_memrealtime instruction",
568 .dependencies = featureSet(&[_]Feature{}),589 .dependencies = featureSet(&[_]Feature{}),
569 };590 };
591 result[@enumToInt(Feature.s_memtime_inst)] = .{
592 .llvm_name = "s-memtime-inst",
593 .description = "Has s_memtime instruction",
594 .dependencies = featureSet(&[_]Feature{}),
595 };
570 result[@enumToInt(Feature.scalar_atomics)] = .{596 result[@enumToInt(Feature.scalar_atomics)] = .{
571 .llvm_name = "scalar-atomics",597 .llvm_name = "scalar-atomics",
572 .description = "Has atomic scalar memory instructions",598 .description = "Has atomic scalar memory instructions",
...@@ -617,13 +643,16 @@ pub const all_features = blk: {...@@ -617,13 +643,16 @@ pub const all_features = blk: {
617 .description = "SEA_ISLANDS GPU generation",643 .description = "SEA_ISLANDS GPU generation",
618 .dependencies = featureSet(&[_]Feature{644 .dependencies = featureSet(&[_]Feature{
619 .ci_insts,645 .ci_insts,
646 .ds_src2_insts,
620 .flat_address_space,647 .flat_address_space,
621 .fp64,648 .fp64,
622 .gfx7_gfx8_gfx9_insts,649 .gfx7_gfx8_gfx9_insts,
623 .localmemorysize65536,650 .localmemorysize65536,
651 .mad_mac_f32_insts,
624 .mimg_r128,652 .mimg_r128,
625 .movrel,653 .movrel,
626 .no_sram_ecc_support,654 .no_sram_ecc_support,
655 .s_memtime_inst,
627 .trig_reduced_range,656 .trig_reduced_range,
628 .wavefrontsize64,657 .wavefrontsize64,
629 }),658 }),
...@@ -647,13 +676,16 @@ pub const all_features = blk: {...@@ -647,13 +676,16 @@ pub const all_features = blk: {
647 .llvm_name = "southern-islands",676 .llvm_name = "southern-islands",
648 .description = "SOUTHERN_ISLANDS GPU generation",677 .description = "SOUTHERN_ISLANDS GPU generation",
649 .dependencies = featureSet(&[_]Feature{678 .dependencies = featureSet(&[_]Feature{
679 .ds_src2_insts,
650 .fp64,680 .fp64,
651 .ldsbankcount32,681 .ldsbankcount32,
652 .localmemorysize32768,682 .localmemorysize32768,
683 .mad_mac_f32_insts,
653 .mimg_r128,684 .mimg_r128,
654 .movrel,685 .movrel,
655 .no_sram_ecc_support,686 .no_sram_ecc_support,
656 .no_xnack_support,687 .no_xnack_support,
688 .s_memtime_inst,
657 .trig_reduced_range,689 .trig_reduced_range,
658 .wavefrontsize64,690 .wavefrontsize64,
659 }),691 }),
...@@ -720,6 +752,8 @@ pub const all_features = blk: {...@@ -720,6 +752,8 @@ pub const all_features = blk: {
720 .@"16_bit_insts",752 .@"16_bit_insts",
721 .ci_insts,753 .ci_insts,
722 .dpp,754 .dpp,
755 .ds_src2_insts,
756 .fast_denormal_f32,
723 .flat_address_space,757 .flat_address_space,
724 .fp64,758 .fp64,
725 .gcn3_encoding,759 .gcn3_encoding,
...@@ -728,10 +762,12 @@ pub const all_features = blk: {...@@ -728,10 +762,12 @@ pub const all_features = blk: {
728 .int_clamp_insts,762 .int_clamp_insts,
729 .inv_2pi_inline_imm,763 .inv_2pi_inline_imm,
730 .localmemorysize65536,764 .localmemorysize65536,
765 .mad_mac_f32_insts,
731 .mimg_r128,766 .mimg_r128,
732 .movrel,767 .movrel,
733 .no_sram_ecc_support,768 .no_sram_ecc_support,
734 .s_memrealtime,769 .s_memrealtime,
770 .s_memtime_inst,
735 .scalar_stores,771 .scalar_stores,
736 .sdwa,772 .sdwa,
737 .sdwa_mav,773 .sdwa_mav,
...@@ -840,16 +876,20 @@ pub const cpu = struct {...@@ -840,16 +876,20 @@ pub const cpu = struct {
840 .features = featureSet(&[_]Feature{876 .features = featureSet(&[_]Feature{
841 .code_object_v3,877 .code_object_v3,
842 .dl_insts,878 .dl_insts,
879 .ds_src2_insts,
843 .flat_segment_offset_bug,880 .flat_segment_offset_bug,
881 .get_wave_id_inst,
844 .gfx10,882 .gfx10,
845 .inst_fwd_prefetch_bug,883 .inst_fwd_prefetch_bug,
846 .lds_branch_vmem_war_hazard,884 .lds_branch_vmem_war_hazard,
847 .lds_misaligned_bug,885 .lds_misaligned_bug,
848 .ldsbankcount32,886 .ldsbankcount32,
887 .mad_mac_f32_insts,
849 .no_xnack_support,888 .no_xnack_support,
850 .nsa_encoding,889 .nsa_encoding,
851 .nsa_to_vmem_bug,890 .nsa_to_vmem_bug,
852 .offset_3f_bug,891 .offset_3f_bug,
892 .s_memtime_inst,
853 .scalar_atomics,893 .scalar_atomics,
854 .scalar_flat_scratch_insts,894 .scalar_flat_scratch_insts,
855 .scalar_stores,895 .scalar_stores,
...@@ -870,15 +910,19 @@ pub const cpu = struct {...@@ -870,15 +910,19 @@ pub const cpu = struct {
870 .dot2_insts,910 .dot2_insts,
871 .dot5_insts,911 .dot5_insts,
872 .dot6_insts,912 .dot6_insts,
913 .ds_src2_insts,
873 .flat_segment_offset_bug,914 .flat_segment_offset_bug,
915 .get_wave_id_inst,
874 .gfx10,916 .gfx10,
875 .inst_fwd_prefetch_bug,917 .inst_fwd_prefetch_bug,
876 .lds_branch_vmem_war_hazard,918 .lds_branch_vmem_war_hazard,
877 .ldsbankcount32,919 .ldsbankcount32,
920 .mad_mac_f32_insts,
878 .no_xnack_support,921 .no_xnack_support,
879 .nsa_encoding,922 .nsa_encoding,
880 .nsa_to_vmem_bug,923 .nsa_to_vmem_bug,
881 .offset_3f_bug,924 .offset_3f_bug,
925 .s_memtime_inst,
882 .scalar_atomics,926 .scalar_atomics,
883 .scalar_flat_scratch_insts,927 .scalar_flat_scratch_insts,
884 .scalar_stores,928 .scalar_stores,
...@@ -899,16 +943,20 @@ pub const cpu = struct {...@@ -899,16 +943,20 @@ pub const cpu = struct {
899 .dot2_insts,943 .dot2_insts,
900 .dot5_insts,944 .dot5_insts,
901 .dot6_insts,945 .dot6_insts,
946 .ds_src2_insts,
902 .flat_segment_offset_bug,947 .flat_segment_offset_bug,
948 .get_wave_id_inst,
903 .gfx10,949 .gfx10,
904 .inst_fwd_prefetch_bug,950 .inst_fwd_prefetch_bug,
905 .lds_branch_vmem_war_hazard,951 .lds_branch_vmem_war_hazard,
906 .lds_misaligned_bug,952 .lds_misaligned_bug,
907 .ldsbankcount32,953 .ldsbankcount32,
954 .mad_mac_f32_insts,
908 .no_xnack_support,955 .no_xnack_support,
909 .nsa_encoding,956 .nsa_encoding,
910 .nsa_to_vmem_bug,957 .nsa_to_vmem_bug,
911 .offset_3f_bug,958 .offset_3f_bug,
959 .s_memtime_inst,
912 .scalar_atomics,960 .scalar_atomics,
913 .scalar_flat_scratch_insts,961 .scalar_flat_scratch_insts,
914 .scalar_stores,962 .scalar_stores,
...@@ -919,6 +967,25 @@ pub const cpu = struct {...@@ -919,6 +967,25 @@ pub const cpu = struct {
919 .wavefrontsize32,967 .wavefrontsize32,
920 }),968 }),
921 };969 };
970 pub const gfx1030 = CpuModel{
971 .name = "gfx1030",
972 .llvm_name = "gfx1030",
973 .features = featureSet(&[_]Feature{
974 .code_object_v3,
975 .dl_insts,
976 .dot1_insts,
977 .dot2_insts,
978 .dot5_insts,
979 .dot6_insts,
980 .gfx10,
981 .gfx10_3_insts,
982 .gfx10_b_encoding,
983 .ldsbankcount32,
984 .no_xnack_support,
985 .nsa_encoding,
986 .wavefrontsize32,
987 }),
988 };
922 pub const gfx600 = CpuModel{989 pub const gfx600 = CpuModel{
923 .name = "gfx600",990 .name = "gfx600",
924 .llvm_name = "gfx600",991 .llvm_name = "gfx600",
lib/std/target/arm.zig+171
...@@ -11,6 +11,16 @@ pub const Feature = enum {...@@ -11,6 +11,16 @@ pub const Feature = enum {
11 aes,11 aes,
12 avoid_movs_shop,12 avoid_movs_shop,
13 avoid_partial_cpsr,13 avoid_partial_cpsr,
14 bf16,
15 cde,
16 cdecp0,
17 cdecp1,
18 cdecp2,
19 cdecp3,
20 cdecp4,
21 cdecp5,
22 cdecp6,
23 cdecp7,
14 cheap_predicable_cpsr,24 cheap_predicable_cpsr,
15 crc,25 crc,
16 crypto,26 crypto,
...@@ -53,11 +63,13 @@ pub const Feature = enum {...@@ -53,11 +63,13 @@ pub const Feature = enum {
53 has_v8_3a,63 has_v8_3a,
54 has_v8_4a,64 has_v8_4a,
55 has_v8_5a,65 has_v8_5a,
66 has_v8_6a,
56 has_v8,67 has_v8,
57 has_v8m,68 has_v8m,
58 has_v8m_main,69 has_v8m_main,
59 hwdiv,70 hwdiv,
60 hwdiv_arm,71 hwdiv_arm,
72 i8mm,
61 iwmmxt,73 iwmmxt,
62 iwmmxt2,74 iwmmxt2,
63 lob,75 lob,
...@@ -141,6 +153,7 @@ pub const Feature = enum {...@@ -141,6 +153,7 @@ pub const Feature = enum {
141 v8_3a,153 v8_3a,
142 v8_4a,154 v8_4a,
143 v8_5a,155 v8_5a,
156 v8_6a,
144 vfp2,157 vfp2,
145 vfp2sp,158 vfp2sp,
146 vfp3,159 vfp3,
...@@ -209,6 +222,76 @@ pub const all_features = blk: {...@@ -209,6 +222,76 @@ pub const all_features = blk: {
209 .description = "Avoid CPSR partial update for OOO execution",222 .description = "Avoid CPSR partial update for OOO execution",
210 .dependencies = featureSet(&[_]Feature{}),223 .dependencies = featureSet(&[_]Feature{}),
211 };224 };
225 result[@enumToInt(Feature.bf16)] = .{
226 .llvm_name = "bf16",
227 .description = "Enable support for BFloat16 instructions",
228 .dependencies = featureSet(&[_]Feature{
229 .neon,
230 }),
231 };
232 result[@enumToInt(Feature.cde)] = .{
233 .llvm_name = "cde",
234 .description = "Support CDE instructions",
235 .dependencies = featureSet(&[_]Feature{
236 .v8m_main,
237 }),
238 };
239 result[@enumToInt(Feature.cdecp0)] = .{
240 .llvm_name = "cdecp0",
241 .description = "Coprocessor 0 ISA is CDEv1",
242 .dependencies = featureSet(&[_]Feature{
243 .cde,
244 }),
245 };
246 result[@enumToInt(Feature.cdecp1)] = .{
247 .llvm_name = "cdecp1",
248 .description = "Coprocessor 1 ISA is CDEv1",
249 .dependencies = featureSet(&[_]Feature{
250 .cde,
251 }),
252 };
253 result[@enumToInt(Feature.cdecp2)] = .{
254 .llvm_name = "cdecp2",
255 .description = "Coprocessor 2 ISA is CDEv1",
256 .dependencies = featureSet(&[_]Feature{
257 .cde,
258 }),
259 };
260 result[@enumToInt(Feature.cdecp3)] = .{
261 .llvm_name = "cdecp3",
262 .description = "Coprocessor 3 ISA is CDEv1",
263 .dependencies = featureSet(&[_]Feature{
264 .cde,
265 }),
266 };
267 result[@enumToInt(Feature.cdecp4)] = .{
268 .llvm_name = "cdecp4",
269 .description = "Coprocessor 4 ISA is CDEv1",
270 .dependencies = featureSet(&[_]Feature{
271 .cde,
272 }),
273 };
274 result[@enumToInt(Feature.cdecp5)] = .{
275 .llvm_name = "cdecp5",
276 .description = "Coprocessor 5 ISA is CDEv1",
277 .dependencies = featureSet(&[_]Feature{
278 .cde,
279 }),
280 };
281 result[@enumToInt(Feature.cdecp6)] = .{
282 .llvm_name = "cdecp6",
283 .description = "Coprocessor 6 ISA is CDEv1",
284 .dependencies = featureSet(&[_]Feature{
285 .cde,
286 }),
287 };
288 result[@enumToInt(Feature.cdecp7)] = .{
289 .llvm_name = "cdecp7",
290 .description = "Coprocessor 7 ISA is CDEv1",
291 .dependencies = featureSet(&[_]Feature{
292 .cde,
293 }),
294 };
212 result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{295 result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
213 .llvm_name = "cheap-predicable-cpsr",296 .llvm_name = "cheap-predicable-cpsr",
214 .description = "Disable +1 predication cost for instructions updating CPSR",297 .description = "Disable +1 predication cost for instructions updating CPSR",
...@@ -508,6 +591,15 @@ pub const all_features = blk: {...@@ -508,6 +591,15 @@ pub const all_features = blk: {
508 .has_v8_4a,591 .has_v8_4a,
509 }),592 }),
510 };593 };
594 result[@enumToInt(Feature.has_v8_6a)] = .{
595 .llvm_name = "v8.6a",
596 .description = "Support ARM v8.6a instructions",
597 .dependencies = featureSet(&[_]Feature{
598 .bf16,
599 .i8mm,
600 .has_v8_5a,
601 }),
602 };
511 result[@enumToInt(Feature.has_v8m)] = .{603 result[@enumToInt(Feature.has_v8m)] = .{
512 .llvm_name = "v8m",604 .llvm_name = "v8m",
513 .description = "Support ARM v8M Baseline instructions",605 .description = "Support ARM v8M Baseline instructions",
...@@ -532,6 +624,13 @@ pub const all_features = blk: {...@@ -532,6 +624,13 @@ pub const all_features = blk: {
532 .description = "Enable divide instructions in ARM mode",624 .description = "Enable divide instructions in ARM mode",
533 .dependencies = featureSet(&[_]Feature{}),625 .dependencies = featureSet(&[_]Feature{}),
534 };626 };
627 result[@enumToInt(Feature.i8mm)] = .{
628 .llvm_name = "i8mm",
629 .description = "Enable Matrix Multiply Int8 Extension",
630 .dependencies = featureSet(&[_]Feature{
631 .neon,
632 }),
633 };
535 result[@enumToInt(Feature.iwmmxt)] = .{634 result[@enumToInt(Feature.iwmmxt)] = .{
536 .llvm_name = "iwmmxt",635 .llvm_name = "iwmmxt",
537 .description = "ARMv5te architecture",636 .description = "ARMv5te architecture",
...@@ -1177,6 +1276,25 @@ pub const all_features = blk: {...@@ -1177,6 +1276,25 @@ pub const all_features = blk: {
1177 .virtualization,1276 .virtualization,
1178 }),1277 }),
1179 };1278 };
1279 result[@enumToInt(Feature.v8_6a)] = .{
1280 .llvm_name = "armv8.6-a",
1281 .description = "ARMv86a architecture",
1282 .dependencies = featureSet(&[_]Feature{
1283 .aclass,
1284 .crc,
1285 .crypto,
1286 .db,
1287 .dotprod,
1288 .dsp,
1289 .fp_armv8,
1290 .mp,
1291 .neon,
1292 .ras,
1293 .trustzone,
1294 .has_v8_6a,
1295 .virtualization,
1296 }),
1297 };
1180 result[@enumToInt(Feature.vfp2)] = .{1298 result[@enumToInt(Feature.vfp2)] = .{
1181 .llvm_name = "vfp2",1299 .llvm_name = "vfp2",
1182 .description = "Enable VFP2 instructions",1300 .description = "Enable VFP2 instructions",
...@@ -1722,6 +1840,32 @@ pub const cpu = struct {...@@ -1722,6 +1840,32 @@ pub const cpu = struct {
1722 .hwdiv_arm,1840 .hwdiv_arm,
1723 }),1841 }),
1724 };1842 };
1843 pub const cortex_a77 = CpuModel{
1844 .name = "cortex_a77",
1845 .llvm_name = "cortex-a77",
1846 .features = featureSet(&[_]Feature{
1847 .v8_2a,
1848 .crc,
1849 .crypto,
1850 .dotprod,
1851 .fullfp16,
1852 .hwdiv,
1853 .hwdiv_arm,
1854 }),
1855 };
1856 pub const cortex_a78 = CpuModel{
1857 .name = "cortex_a78",
1858 .llvm_name = "cortex-a78",
1859 .features = featureSet(&[_]Feature{
1860 .v8_2a,
1861 .crc,
1862 .crypto,
1863 .dotprod,
1864 .fullfp16,
1865 .hwdiv,
1866 .hwdiv_arm,
1867 }),
1868 };
1725 pub const cortex_a8 = CpuModel{1869 pub const cortex_a8 = CpuModel{
1726 .name = "cortex_a8",1870 .name = "cortex_a8",
1727 .llvm_name = "cortex-a8",1871 .llvm_name = "cortex-a8",
...@@ -1837,6 +1981,20 @@ pub const cpu = struct {...@@ -1837,6 +1981,20 @@ pub const cpu = struct {
1837 .vfp4d16sp,1981 .vfp4d16sp,
1838 }),1982 }),
1839 };1983 };
1984 pub const cortex_m55 = CpuModel{
1985 .name = "cortex_m55",
1986 .llvm_name = "cortex-m55",
1987 .features = featureSet(&[_]Feature{
1988 .v8_1m_main,
1989 .dsp,
1990 .fp_armv8d16,
1991 .loop_align,
1992 .mve_fp,
1993 .no_branch_predictor,
1994 .slowfpvmlx,
1995 .use_misched,
1996 }),
1997 };
1840 pub const cortex_m7 = CpuModel{1998 pub const cortex_m7 = CpuModel{
1841 .name = "cortex_m7",1999 .name = "cortex_m7",
1842 .llvm_name = "cortex-m7",2000 .llvm_name = "cortex-m7",
...@@ -1924,6 +2082,19 @@ pub const cpu = struct {...@@ -1924,6 +2082,19 @@ pub const cpu = struct {
1924 .vfp3d16,2082 .vfp3d16,
1925 }),2083 }),
1926 };2084 };
2085 pub const cortex_x1 = CpuModel{
2086 .name = "cortex_x1",
2087 .llvm_name = "cortex-x1",
2088 .features = featureSet(&[_]Feature{
2089 .v8_2a,
2090 .crc,
2091 .crypto,
2092 .dotprod,
2093 .fullfp16,
2094 .hwdiv,
2095 .hwdiv_arm,
2096 }),
2097 };
1927 pub const cyclone = CpuModel{2098 pub const cyclone = CpuModel{
1928 .name = "cyclone",2099 .name = "cyclone",
1929 .llvm_name = "cyclone",2100 .llvm_name = "cyclone",
lib/std/target/avr.zig+22-1
...@@ -25,6 +25,7 @@ pub const Feature = enum {...@@ -25,6 +25,7 @@ pub const Feature = enum {
25 jmpcall,25 jmpcall,
26 lpm,26 lpm,
27 lpmx,27 lpmx,
28 memmappedregs,
28 movw,29 movw,
29 mul,30 mul,
30 rmw,31 rmw,
...@@ -60,6 +61,7 @@ pub const all_features = blk: {...@@ -60,6 +61,7 @@ pub const all_features = blk: {
60 .dependencies = featureSet(&[_]Feature{61 .dependencies = featureSet(&[_]Feature{
61 .avr0,62 .avr0,
62 .lpm,63 .lpm,
64 .memmappedregs,
63 }),65 }),
64 };66 };
65 result[@enumToInt(Feature.avr2)] = .{67 result[@enumToInt(Feature.avr2)] = .{
...@@ -156,6 +158,7 @@ pub const all_features = blk: {...@@ -156,6 +158,7 @@ pub const all_features = blk: {
156 .dependencies = featureSet(&[_]Feature{158 .dependencies = featureSet(&[_]Feature{
157 .avr0,159 .avr0,
158 .@"break",160 .@"break",
161 .memmappedregs,
159 .sram,162 .sram,
160 .tinyencoding,163 .tinyencoding,
161 }),164 }),
...@@ -205,6 +208,11 @@ pub const all_features = blk: {...@@ -205,6 +208,11 @@ pub const all_features = blk: {
205 .description = "The device supports the `LPM Rd, Z[+]` instruction",208 .description = "The device supports the `LPM Rd, Z[+]` instruction",
206 .dependencies = featureSet(&[_]Feature{}),209 .dependencies = featureSet(&[_]Feature{}),
207 };210 };
211 result[@enumToInt(Feature.memmappedregs)] = .{
212 .llvm_name = "memmappedregs",
213 .description = "The device has CPU registers mapped in data address space",
214 .dependencies = featureSet(&[_]Feature{}),
215 };
208 result[@enumToInt(Feature.movw)] = .{216 result[@enumToInt(Feature.movw)] = .{
209 .llvm_name = "movw",217 .llvm_name = "movw",
210 .description = "The device supports the 16-bit MOVW instruction",218 .description = "The device supports the 16-bit MOVW instruction",
...@@ -239,6 +247,7 @@ pub const all_features = blk: {...@@ -239,6 +247,7 @@ pub const all_features = blk: {
239 .jmpcall,247 .jmpcall,
240 .lpm,248 .lpm,
241 .lpmx,249 .lpmx,
250 .memmappedregs,
242 .movw,251 .movw,
243 .mul,252 .mul,
244 .rmw,253 .rmw,
...@@ -271,10 +280,22 @@ pub const all_features = blk: {...@@ -271,10 +280,22 @@ pub const all_features = blk: {
271 .llvm_name = "xmega",280 .llvm_name = "xmega",
272 .description = "The device is a part of the xmega family",281 .description = "The device is a part of the xmega family",
273 .dependencies = featureSet(&[_]Feature{282 .dependencies = featureSet(&[_]Feature{
274 .avr51,283 .addsubiw,
284 .avr0,
285 .@"break",
275 .des,286 .des,
276 .eijmpcall,287 .eijmpcall,
288 .elpm,
289 .elpmx,
290 .ijmpcall,
291 .jmpcall,
292 .lpm,
293 .lpmx,
294 .movw,
295 .mul,
296 .spm,
277 .spmx,297 .spmx,
298 .sram,
278 }),299 }),
279 };300 };
280 result[@enumToInt(Feature.xmegau)] = .{301 result[@enumToInt(Feature.xmegau)] = .{
lib/std/target/hexagon.zig+101
...@@ -3,6 +3,8 @@ const CpuFeature = std.Target.Cpu.Feature;...@@ -3,6 +3,8 @@ const CpuFeature = std.Target.Cpu.Feature;
3const CpuModel = std.Target.Cpu.Model;3const CpuModel = std.Target.Cpu.Model;
44
5pub const Feature = enum {5pub const Feature = enum {
6 audio,
7 compound,
6 duplex,8 duplex,
7 hvx,9 hvx,
8 hvx_length128b,10 hvx_length128b,
...@@ -11,6 +13,7 @@ pub const Feature = enum {...@@ -11,6 +13,7 @@ pub const Feature = enum {
11 hvxv62,13 hvxv62,
12 hvxv65,14 hvxv65,
13 hvxv66,15 hvxv66,
16 hvxv67,
14 long_calls,17 long_calls,
15 mem_noshuf,18 mem_noshuf,
16 memops,19 memops,
...@@ -18,14 +21,18 @@ pub const Feature = enum {...@@ -18,14 +21,18 @@ pub const Feature = enum {
18 nvj,21 nvj,
19 nvs,22 nvs,
20 packets,23 packets,
24 prev65,
21 reserved_r19,25 reserved_r19,
22 small_data,26 small_data,
27 tinycore,
28 unsafe_fp,
23 v5,29 v5,
24 v55,30 v55,
25 v60,31 v60,
26 v62,32 v62,
27 v65,33 v65,
28 v66,34 v66,
35 v67,
29 zreg,36 zreg,
30};37};
3138
...@@ -35,6 +42,16 @@ pub const all_features = blk: {...@@ -35,6 +42,16 @@ pub const all_features = blk: {
35 const len = @typeInfo(Feature).Enum.fields.len;42 const len = @typeInfo(Feature).Enum.fields.len;
36 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);43 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
37 var result: [len]CpuFeature = undefined;44 var result: [len]CpuFeature = undefined;
45 result[@enumToInt(Feature.audio)] = .{
46 .llvm_name = "audio",
47 .description = "Hexagon Audio extension instructions",
48 .dependencies = featureSet(&[_]Feature{}),
49 };
50 result[@enumToInt(Feature.compound)] = .{
51 .llvm_name = "compound",
52 .description = "Use compound instructions",
53 .dependencies = featureSet(&[_]Feature{}),
54 };
38 result[@enumToInt(Feature.duplex)] = .{55 result[@enumToInt(Feature.duplex)] = .{
39 .llvm_name = "duplex",56 .llvm_name = "duplex",
40 .description = "Enable generation of duplex instruction",57 .description = "Enable generation of duplex instruction",
...@@ -94,6 +111,16 @@ pub const all_features = blk: {...@@ -94,6 +111,16 @@ pub const all_features = blk: {
94 .zreg,111 .zreg,
95 }),112 }),
96 };113 };
114 result[@enumToInt(Feature.hvxv67)] = .{
115 .llvm_name = "hvxv67",
116 .description = "Hexagon HVX instructions",
117 .dependencies = featureSet(&[_]Feature{
118 .hvxv60,
119 .hvxv62,
120 .hvxv65,
121 .hvxv66,
122 }),
123 };
97 result[@enumToInt(Feature.long_calls)] = .{124 result[@enumToInt(Feature.long_calls)] = .{
98 .llvm_name = "long-calls",125 .llvm_name = "long-calls",
99 .description = "Use constant-extended calls",126 .description = "Use constant-extended calls",
...@@ -133,6 +160,11 @@ pub const all_features = blk: {...@@ -133,6 +160,11 @@ pub const all_features = blk: {
133 .description = "Support for instruction packets",160 .description = "Support for instruction packets",
134 .dependencies = featureSet(&[_]Feature{}),161 .dependencies = featureSet(&[_]Feature{}),
135 };162 };
163 result[@enumToInt(Feature.prev65)] = .{
164 .llvm_name = "prev65",
165 .description = "Support features deprecated in v65",
166 .dependencies = featureSet(&[_]Feature{}),
167 };
136 result[@enumToInt(Feature.reserved_r19)] = .{168 result[@enumToInt(Feature.reserved_r19)] = .{
137 .llvm_name = "reserved-r19",169 .llvm_name = "reserved-r19",
138 .description = "Reserve register R19",170 .description = "Reserve register R19",
...@@ -143,6 +175,16 @@ pub const all_features = blk: {...@@ -143,6 +175,16 @@ pub const all_features = blk: {
143 .description = "Allow GP-relative addressing of global variables",175 .description = "Allow GP-relative addressing of global variables",
144 .dependencies = featureSet(&[_]Feature{}),176 .dependencies = featureSet(&[_]Feature{}),
145 };177 };
178 result[@enumToInt(Feature.tinycore)] = .{
179 .llvm_name = "tinycore",
180 .description = "Hexagon Tiny Core",
181 .dependencies = featureSet(&[_]Feature{}),
182 };
183 result[@enumToInt(Feature.unsafe_fp)] = .{
184 .llvm_name = "unsafe-fp",
185 .description = "Use unsafe FP math",
186 .dependencies = featureSet(&[_]Feature{}),
187 };
146 result[@enumToInt(Feature.v5)] = .{188 result[@enumToInt(Feature.v5)] = .{
147 .llvm_name = "v5",189 .llvm_name = "v5",
148 .description = "Enable Hexagon V5 architecture",190 .description = "Enable Hexagon V5 architecture",
...@@ -173,6 +215,11 @@ pub const all_features = blk: {...@@ -173,6 +215,11 @@ pub const all_features = blk: {
173 .description = "Enable Hexagon V66 architecture",215 .description = "Enable Hexagon V66 architecture",
174 .dependencies = featureSet(&[_]Feature{}),216 .dependencies = featureSet(&[_]Feature{}),
175 };217 };
218 result[@enumToInt(Feature.v67)] = .{
219 .llvm_name = "v67",
220 .description = "Enable Hexagon V67 architecture",
221 .dependencies = featureSet(&[_]Feature{}),
222 };
176 result[@enumToInt(Feature.zreg)] = .{223 result[@enumToInt(Feature.zreg)] = .{
177 .llvm_name = "zreg",224 .llvm_name = "zreg",
178 .description = "Hexagon ZReg extension instructions",225 .description = "Hexagon ZReg extension instructions",
...@@ -191,11 +238,13 @@ pub const cpu = struct {...@@ -191,11 +238,13 @@ pub const cpu = struct {
191 .name = "generic",238 .name = "generic",
192 .llvm_name = "generic",239 .llvm_name = "generic",
193 .features = featureSet(&[_]Feature{240 .features = featureSet(&[_]Feature{
241 .compound,
194 .duplex,242 .duplex,
195 .memops,243 .memops,
196 .nvj,244 .nvj,
197 .nvs,245 .nvs,
198 .packets,246 .packets,
247 .prev65,
199 .small_data,248 .small_data,
200 .v5,249 .v5,
201 .v55,250 .v55,
...@@ -206,11 +255,13 @@ pub const cpu = struct {...@@ -206,11 +255,13 @@ pub const cpu = struct {
206 .name = "hexagonv5",255 .name = "hexagonv5",
207 .llvm_name = "hexagonv5",256 .llvm_name = "hexagonv5",
208 .features = featureSet(&[_]Feature{257 .features = featureSet(&[_]Feature{
258 .compound,
209 .duplex,259 .duplex,
210 .memops,260 .memops,
211 .nvj,261 .nvj,
212 .nvs,262 .nvs,
213 .packets,263 .packets,
264 .prev65,
214 .small_data,265 .small_data,
215 .v5,266 .v5,
216 }),267 }),
...@@ -219,11 +270,13 @@ pub const cpu = struct {...@@ -219,11 +270,13 @@ pub const cpu = struct {
219 .name = "hexagonv55",270 .name = "hexagonv55",
220 .llvm_name = "hexagonv55",271 .llvm_name = "hexagonv55",
221 .features = featureSet(&[_]Feature{272 .features = featureSet(&[_]Feature{
273 .compound,
222 .duplex,274 .duplex,
223 .memops,275 .memops,
224 .nvj,276 .nvj,
225 .nvs,277 .nvs,
226 .packets,278 .packets,
279 .prev65,
227 .small_data,280 .small_data,
228 .v5,281 .v5,
229 .v55,282 .v55,
...@@ -233,11 +286,13 @@ pub const cpu = struct {...@@ -233,11 +286,13 @@ pub const cpu = struct {
233 .name = "hexagonv60",286 .name = "hexagonv60",
234 .llvm_name = "hexagonv60",287 .llvm_name = "hexagonv60",
235 .features = featureSet(&[_]Feature{288 .features = featureSet(&[_]Feature{
289 .compound,
236 .duplex,290 .duplex,
237 .memops,291 .memops,
238 .nvj,292 .nvj,
239 .nvs,293 .nvs,
240 .packets,294 .packets,
295 .prev65,
241 .small_data,296 .small_data,
242 .v5,297 .v5,
243 .v55,298 .v55,
...@@ -248,11 +303,13 @@ pub const cpu = struct {...@@ -248,11 +303,13 @@ pub const cpu = struct {
248 .name = "hexagonv62",303 .name = "hexagonv62",
249 .llvm_name = "hexagonv62",304 .llvm_name = "hexagonv62",
250 .features = featureSet(&[_]Feature{305 .features = featureSet(&[_]Feature{
306 .compound,
251 .duplex,307 .duplex,
252 .memops,308 .memops,
253 .nvj,309 .nvj,
254 .nvs,310 .nvs,
255 .packets,311 .packets,
312 .prev65,
256 .small_data,313 .small_data,
257 .v5,314 .v5,
258 .v55,315 .v55,
...@@ -264,6 +321,7 @@ pub const cpu = struct {...@@ -264,6 +321,7 @@ pub const cpu = struct {
264 .name = "hexagonv65",321 .name = "hexagonv65",
265 .llvm_name = "hexagonv65",322 .llvm_name = "hexagonv65",
266 .features = featureSet(&[_]Feature{323 .features = featureSet(&[_]Feature{
324 .compound,
267 .duplex,325 .duplex,
268 .mem_noshuf,326 .mem_noshuf,
269 .memops,327 .memops,
...@@ -282,6 +340,7 @@ pub const cpu = struct {...@@ -282,6 +340,7 @@ pub const cpu = struct {
282 .name = "hexagonv66",340 .name = "hexagonv66",
283 .llvm_name = "hexagonv66",341 .llvm_name = "hexagonv66",
284 .features = featureSet(&[_]Feature{342 .features = featureSet(&[_]Feature{
343 .compound,
285 .duplex,344 .duplex,
286 .mem_noshuf,345 .mem_noshuf,
287 .memops,346 .memops,
...@@ -297,4 +356,46 @@ pub const cpu = struct {...@@ -297,4 +356,46 @@ pub const cpu = struct {
297 .v66,356 .v66,
298 }),357 }),
299 };358 };
359 pub const hexagonv67 = CpuModel{
360 .name = "hexagonv67",
361 .llvm_name = "hexagonv67",
362 .features = featureSet(&[_]Feature{
363 .compound,
364 .duplex,
365 .mem_noshuf,
366 .memops,
367 .nvj,
368 .nvs,
369 .packets,
370 .small_data,
371 .v5,
372 .v55,
373 .v60,
374 .v62,
375 .v65,
376 .v66,
377 .v67,
378 }),
379 };
380 pub const hexagonv67t = CpuModel{
381 .name = "hexagonv67t",
382 .llvm_name = "hexagonv67t",
383 .features = featureSet(&[_]Feature{
384 .audio,
385 .compound,
386 .mem_noshuf,
387 .memops,
388 .nvs,
389 .packets,
390 .small_data,
391 .tinycore,
392 .v5,
393 .v55,
394 .v60,
395 .v62,
396 .v65,
397 .v66,
398 .v67,
399 }),
400 };
300};401};
lib/std/target/mips.zig+6
...@@ -28,6 +28,7 @@ pub const Feature = enum {...@@ -28,6 +28,7 @@ pub const Feature = enum {
28 mips32r6,28 mips32r6,
29 mips3_32,29 mips3_32,
30 mips3_32r2,30 mips3_32r2,
31 mips3d,
31 mips4,32 mips4,
32 mips4_32,33 mips4_32,
33 mips4_32r2,34 mips4_32r2,
...@@ -222,6 +223,11 @@ pub const all_features = blk: {...@@ -222,6 +223,11 @@ pub const all_features = blk: {
222 .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",223 .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
223 .dependencies = featureSet(&[_]Feature{}),224 .dependencies = featureSet(&[_]Feature{}),
224 };225 };
226 result[@enumToInt(Feature.mips3d)] = .{
227 .llvm_name = "mips3d",
228 .description = "Mips 3D ASE",
229 .dependencies = featureSet(&[_]Feature{}),
230 };
225 result[@enumToInt(Feature.mips4)] = .{231 result[@enumToInt(Feature.mips4)] = .{
226 .llvm_name = "mips4",232 .llvm_name = "mips4",
227 .description = "MIPS IV ISA Support",233 .description = "MIPS IV ISA Support",
lib/std/target/nvptx.zig+26
...@@ -13,6 +13,8 @@ pub const Feature = enum {...@@ -13,6 +13,8 @@ pub const Feature = enum {
13 ptx61,13 ptx61,
14 ptx63,14 ptx63,
15 ptx64,15 ptx64,
16 ptx65,
17 ptx70,
16 sm_20,18 sm_20,
17 sm_21,19 sm_21,
18 sm_30,20 sm_30,
...@@ -28,6 +30,7 @@ pub const Feature = enum {...@@ -28,6 +30,7 @@ pub const Feature = enum {
28 sm_70,30 sm_70,
29 sm_72,31 sm_72,
30 sm_75,32 sm_75,
33 sm_80,
31};34};
3235
33pub usingnamespace CpuFeature.feature_set_fns(Feature);36pub usingnamespace CpuFeature.feature_set_fns(Feature);
...@@ -86,6 +89,16 @@ pub const all_features = blk: {...@@ -86,6 +89,16 @@ pub const all_features = blk: {
86 .description = "Use PTX version 6.4",89 .description = "Use PTX version 6.4",
87 .dependencies = featureSet(&[_]Feature{}),90 .dependencies = featureSet(&[_]Feature{}),
88 };91 };
92 result[@enumToInt(Feature.ptx65)] = .{
93 .llvm_name = "ptx65",
94 .description = "Use PTX version 6.5",
95 .dependencies = featureSet(&[_]Feature{}),
96 };
97 result[@enumToInt(Feature.ptx70)] = .{
98 .llvm_name = "ptx70",
99 .description = "Use PTX version 7.0",
100 .dependencies = featureSet(&[_]Feature{}),
101 };
89 result[@enumToInt(Feature.sm_20)] = .{102 result[@enumToInt(Feature.sm_20)] = .{
90 .llvm_name = "sm_20",103 .llvm_name = "sm_20",
91 .description = "Target SM 2.0",104 .description = "Target SM 2.0",
...@@ -161,6 +174,11 @@ pub const all_features = blk: {...@@ -161,6 +174,11 @@ pub const all_features = blk: {
161 .description = "Target SM 7.5",174 .description = "Target SM 7.5",
162 .dependencies = featureSet(&[_]Feature{}),175 .dependencies = featureSet(&[_]Feature{}),
163 };176 };
177 result[@enumToInt(Feature.sm_80)] = .{
178 .llvm_name = "sm_80",
179 .description = "Target SM 8.0",
180 .dependencies = featureSet(&[_]Feature{}),
181 };
164 const ti = @typeInfo(Feature);182 const ti = @typeInfo(Feature);
165 for (result) |*elem, i| {183 for (result) |*elem, i| {
166 elem.index = i;184 elem.index = i;
...@@ -286,4 +304,12 @@ pub const cpu = struct {...@@ -286,4 +304,12 @@ pub const cpu = struct {
286 .sm_75,304 .sm_75,
287 }),305 }),
288 };306 };
307 pub const sm_80 = CpuModel{
308 .name = "sm_80",
309 .llvm_name = "sm_80",
310 .features = featureSet(&[_]Feature{
311 .ptx70,
312 .sm_80,
313 }),
314 };
289};315};
lib/std/target/powerpc.zig+121-1
...@@ -25,11 +25,15 @@ pub const Feature = enum {...@@ -25,11 +25,15 @@ pub const Feature = enum {
25 frsqrte,25 frsqrte,
26 frsqrtes,26 frsqrtes,
27 fsqrt,27 fsqrt,
28 fuse_addi_load,
29 fuse_addis_load,
30 fusion,
28 hard_float,31 hard_float,
29 htm,32 htm,
30 icbt,33 icbt,
31 invariant_function_descriptors,34 invariant_function_descriptors,
32 isa_v30_instructions,35 isa_v30_instructions,
36 isa_v31_instructions,
33 isel,37 isel,
34 ldbrx,38 ldbrx,
35 lfiwax,39 lfiwax,
...@@ -37,7 +41,9 @@ pub const Feature = enum {...@@ -37,7 +41,9 @@ pub const Feature = enum {
37 mfocrf,41 mfocrf,
38 msync,42 msync,
39 partword_atomics,43 partword_atomics,
44 pcrelative_memops,
40 popcntd,45 popcntd,
46 power10_vector,
41 power8_altivec,47 power8_altivec,
42 power8_vector,48 power8_vector,
43 power9_altivec,49 power9_altivec,
...@@ -46,6 +52,8 @@ pub const Feature = enum {...@@ -46,6 +52,8 @@ pub const Feature = enum {
46 ppc_prera_sched,52 ppc_prera_sched,
47 ppc4xx,53 ppc4xx,
48 ppc6xx,54 ppc6xx,
55 predictable_select_expensive,
56 prefix_instrs,
49 qpx,57 qpx,
50 recipprec,58 recipprec,
51 secure_plt,59 secure_plt,
...@@ -201,6 +209,25 @@ pub const all_features = blk: {...@@ -201,6 +209,25 @@ pub const all_features = blk: {
201 .fpu,209 .fpu,
202 }),210 }),
203 };211 };
212 result[@enumToInt(Feature.fuse_addi_load)] = .{
213 .llvm_name = "fuse-addi-load",
214 .description = "Power8 Addi-Load fusion",
215 .dependencies = featureSet(&[_]Feature{
216 .fusion,
217 }),
218 };
219 result[@enumToInt(Feature.fuse_addis_load)] = .{
220 .llvm_name = "fuse-addis-load",
221 .description = "Power8 Addis-Load fusion",
222 .dependencies = featureSet(&[_]Feature{
223 .fusion,
224 }),
225 };
226 result[@enumToInt(Feature.fusion)] = .{
227 .llvm_name = "fusion",
228 .description = "Target supports instruction fusion",
229 .dependencies = featureSet(&[_]Feature{}),
230 };
204 result[@enumToInt(Feature.hard_float)] = .{231 result[@enumToInt(Feature.hard_float)] = .{
205 .llvm_name = "hard-float",232 .llvm_name = "hard-float",
206 .description = "Enable floating-point instructions",233 .description = "Enable floating-point instructions",
...@@ -223,9 +250,16 @@ pub const all_features = blk: {...@@ -223,9 +250,16 @@ pub const all_features = blk: {
223 };250 };
224 result[@enumToInt(Feature.isa_v30_instructions)] = .{251 result[@enumToInt(Feature.isa_v30_instructions)] = .{
225 .llvm_name = "isa-v30-instructions",252 .llvm_name = "isa-v30-instructions",
226 .description = "Enable instructions added in ISA 3.0.",253 .description = "Enable instructions in ISA 3.0.",
227 .dependencies = featureSet(&[_]Feature{}),254 .dependencies = featureSet(&[_]Feature{}),
228 };255 };
256 result[@enumToInt(Feature.isa_v31_instructions)] = .{
257 .llvm_name = "isa-v31-instructions",
258 .description = "Enable instructions in ISA 3.1.",
259 .dependencies = featureSet(&[_]Feature{
260 .isa_v30_instructions,
261 }),
262 };
229 result[@enumToInt(Feature.isel)] = .{263 result[@enumToInt(Feature.isel)] = .{
230 .llvm_name = "isel",264 .llvm_name = "isel",
231 .description = "Enable the isel instruction",265 .description = "Enable the isel instruction",
...@@ -265,11 +299,26 @@ pub const all_features = blk: {...@@ -265,11 +299,26 @@ pub const all_features = blk: {
265 .description = "Enable l[bh]arx and st[bh]cx.",299 .description = "Enable l[bh]arx and st[bh]cx.",
266 .dependencies = featureSet(&[_]Feature{}),300 .dependencies = featureSet(&[_]Feature{}),
267 };301 };
302 result[@enumToInt(Feature.pcrelative_memops)] = .{
303 .llvm_name = "pcrelative-memops",
304 .description = "Enable PC relative Memory Ops",
305 .dependencies = featureSet(&[_]Feature{
306 .isa_v30_instructions,
307 }),
308 };
268 result[@enumToInt(Feature.popcntd)] = .{309 result[@enumToInt(Feature.popcntd)] = .{
269 .llvm_name = "popcntd",310 .llvm_name = "popcntd",
270 .description = "Enable the popcnt[dw] instructions",311 .description = "Enable the popcnt[dw] instructions",
271 .dependencies = featureSet(&[_]Feature{}),312 .dependencies = featureSet(&[_]Feature{}),
272 };313 };
314 result[@enumToInt(Feature.power10_vector)] = .{
315 .llvm_name = "power10-vector",
316 .description = "Enable POWER10 vector instructions",
317 .dependencies = featureSet(&[_]Feature{
318 .isa_v31_instructions,
319 .power9_vector,
320 }),
321 };
273 result[@enumToInt(Feature.power8_altivec)] = .{322 result[@enumToInt(Feature.power8_altivec)] = .{
274 .llvm_name = "power8-altivec",323 .llvm_name = "power8-altivec",
275 .description = "Enable POWER8 Altivec instructions",324 .description = "Enable POWER8 Altivec instructions",
...@@ -322,6 +371,20 @@ pub const all_features = blk: {...@@ -322,6 +371,20 @@ pub const all_features = blk: {
322 .description = "Enable PPC 6xx instructions",371 .description = "Enable PPC 6xx instructions",
323 .dependencies = featureSet(&[_]Feature{}),372 .dependencies = featureSet(&[_]Feature{}),
324 };373 };
374 result[@enumToInt(Feature.predictable_select_expensive)] = .{
375 .llvm_name = "predictable-select-expensive",
376 .description = "Prefer likely predicted branches over selects",
377 .dependencies = featureSet(&[_]Feature{}),
378 };
379 result[@enumToInt(Feature.prefix_instrs)] = .{
380 .llvm_name = "prefix-instrs",
381 .description = "Enable prefixed instructions",
382 .dependencies = featureSet(&[_]Feature{
383 .isa_v30_instructions,
384 .power8_vector,
385 .power9_altivec,
386 }),
387 };
325 result[@enumToInt(Feature.qpx)] = .{388 result[@enumToInt(Feature.qpx)] = .{
326 .llvm_name = "qpx",389 .llvm_name = "qpx",
327 .description = "Enable QPX instructions",390 .description = "Enable QPX instructions",
...@@ -567,6 +630,7 @@ pub const cpu = struct {...@@ -567,6 +630,7 @@ pub const cpu = struct {
567 .booke,630 .booke,
568 .icbt,631 .icbt,
569 .isel,632 .isel,
633 .msync,
570 .spe,634 .spe,
571 }),635 }),
572 };636 };
...@@ -615,16 +679,21 @@ pub const cpu = struct {...@@ -615,16 +679,21 @@ pub const cpu = struct {
615 .htm,679 .htm,
616 .icbt,680 .icbt,
617 .isa_v30_instructions,681 .isa_v30_instructions,
682 .isa_v31_instructions,
618 .isel,683 .isel,
619 .ldbrx,684 .ldbrx,
620 .lfiwax,685 .lfiwax,
621 .mfocrf,686 .mfocrf,
622 .partword_atomics,687 .partword_atomics,
688 .pcrelative_memops,
623 .popcntd,689 .popcntd,
690 .power10_vector,
624 .power8_altivec,691 .power8_altivec,
625 .power8_vector,692 .power8_vector,
626 .power9_altivec,693 .power9_altivec,
627 .power9_vector,694 .power9_vector,
695 .predictable_select_expensive,
696 .prefix_instrs,
628 .recipprec,697 .recipprec,
629 .stfiwx,698 .stfiwx,
630 .two_const_nr,699 .two_const_nr,
...@@ -724,6 +793,8 @@ pub const cpu = struct {...@@ -724,6 +793,8 @@ pub const cpu = struct {
724 .frsqrte,793 .frsqrte,
725 .frsqrtes,794 .frsqrtes,
726 .fsqrt,795 .fsqrt,
796 .fuse_addi_load,
797 .fuse_addis_load,
727 .htm,798 .htm,
728 .icbt,799 .icbt,
729 .isel,800 .isel,
...@@ -734,6 +805,51 @@ pub const cpu = struct {...@@ -734,6 +805,51 @@ pub const cpu = struct {
734 .popcntd,805 .popcntd,
735 .power8_altivec,806 .power8_altivec,
736 .power8_vector,807 .power8_vector,
808 .predictable_select_expensive,
809 .recipprec,
810 .stfiwx,
811 .two_const_nr,
812 .vsx,
813 }),
814 };
815 pub const pwr10 = CpuModel{
816 .name = "pwr10",
817 .llvm_name = "pwr10",
818 .features = featureSet(&[_]Feature{
819 .@"64bit",
820 .allow_unaligned_fp_access,
821 .altivec,
822 .bpermd,
823 .cmpb,
824 .crypto,
825 .direct_move,
826 .extdiv,
827 .fcpsgn,
828 .fpcvt,
829 .fprnd,
830 .fre,
831 .fres,
832 .frsqrte,
833 .frsqrtes,
834 .fsqrt,
835 .htm,
836 .icbt,
837 .isa_v30_instructions,
838 .isa_v31_instructions,
839 .isel,
840 .ldbrx,
841 .lfiwax,
842 .mfocrf,
843 .partword_atomics,
844 .pcrelative_memops,
845 .popcntd,
846 .power10_vector,
847 .power8_altivec,
848 .power8_vector,
849 .power9_altivec,
850 .power9_vector,
851 .predictable_select_expensive,
852 .prefix_instrs,
737 .recipprec,853 .recipprec,
738 .stfiwx,854 .stfiwx,
739 .two_const_nr,855 .two_const_nr,
...@@ -885,6 +1001,8 @@ pub const cpu = struct {...@@ -885,6 +1001,8 @@ pub const cpu = struct {
885 .frsqrte,1001 .frsqrte,
886 .frsqrtes,1002 .frsqrtes,
887 .fsqrt,1003 .fsqrt,
1004 .fuse_addi_load,
1005 .fuse_addis_load,
888 .htm,1006 .htm,
889 .icbt,1007 .icbt,
890 .isel,1008 .isel,
...@@ -895,6 +1013,7 @@ pub const cpu = struct {...@@ -895,6 +1013,7 @@ pub const cpu = struct {
895 .popcntd,1013 .popcntd,
896 .power8_altivec,1014 .power8_altivec,
897 .power8_vector,1015 .power8_vector,
1016 .predictable_select_expensive,
898 .recipprec,1017 .recipprec,
899 .stfiwx,1018 .stfiwx,
900 .two_const_nr,1019 .two_const_nr,
...@@ -936,6 +1055,7 @@ pub const cpu = struct {...@@ -936,6 +1055,7 @@ pub const cpu = struct {
936 .power9_vector,1055 .power9_vector,
937 .ppc_postra_sched,1056 .ppc_postra_sched,
938 .ppc_prera_sched,1057 .ppc_prera_sched,
1058 .predictable_select_expensive,
939 .recipprec,1059 .recipprec,
940 .stfiwx,1060 .stfiwx,
941 .two_const_nr,1061 .two_const_nr,
lib/std/target/riscv.zig+130-12
...@@ -8,8 +8,21 @@ pub const Feature = enum {...@@ -8,8 +8,21 @@ pub const Feature = enum {
8 c,8 c,
9 d,9 d,
10 e,10 e,
11 experimental_b,
12 experimental_v,
13 experimental_zbb,
14 experimental_zbc,
15 experimental_zbe,
16 experimental_zbf,
17 experimental_zbm,
18 experimental_zbp,
19 experimental_zbproposedc,
20 experimental_zbr,
21 experimental_zbs,
22 experimental_zbt,
11 f,23 f,
12 m,24 m,
25 no_rvc_hints,
13 relax,26 relax,
14 reserve_x1,27 reserve_x1,
15 reserve_x10,28 reserve_x10,
...@@ -42,7 +55,7 @@ pub const Feature = enum {...@@ -42,7 +55,7 @@ pub const Feature = enum {
42 reserve_x7,55 reserve_x7,
43 reserve_x8,56 reserve_x8,
44 reserve_x9,57 reserve_x9,
45 rvc_hints,58 save_restore,
46};59};
4760
48pub usingnamespace CpuFeature.feature_set_fns(Feature);61pub usingnamespace CpuFeature.feature_set_fns(Feature);
...@@ -78,6 +91,78 @@ pub const all_features = blk: {...@@ -78,6 +91,78 @@ pub const all_features = blk: {
78 .description = "Implements RV32E (provides 16 rather than 32 GPRs)",91 .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
79 .dependencies = featureSet(&[_]Feature{}),92 .dependencies = featureSet(&[_]Feature{}),
80 };93 };
94 result[@enumToInt(Feature.experimental_b)] = .{
95 .llvm_name = "experimental-b",
96 .description = "'B' (Bit Manipulation Instructions)",
97 .dependencies = featureSet(&[_]Feature{
98 .experimental_zbb,
99 .experimental_zbc,
100 .experimental_zbe,
101 .experimental_zbf,
102 .experimental_zbm,
103 .experimental_zbp,
104 .experimental_zbr,
105 .experimental_zbs,
106 .experimental_zbt,
107 }),
108 };
109 result[@enumToInt(Feature.experimental_v)] = .{
110 .llvm_name = "experimental-v",
111 .description = "'V' (Vector Instructions)",
112 .dependencies = featureSet(&[_]Feature{
113 .f,
114 }),
115 };
116 result[@enumToInt(Feature.experimental_zbb)] = .{
117 .llvm_name = "experimental-zbb",
118 .description = "'Zbb' (Base 'B' Instructions)",
119 .dependencies = featureSet(&[_]Feature{}),
120 };
121 result[@enumToInt(Feature.experimental_zbc)] = .{
122 .llvm_name = "experimental-zbc",
123 .description = "'Zbc' (Carry-Less 'B' Instructions)",
124 .dependencies = featureSet(&[_]Feature{}),
125 };
126 result[@enumToInt(Feature.experimental_zbe)] = .{
127 .llvm_name = "experimental-zbe",
128 .description = "'Zbe' (Extract-Deposit 'B' Instructions)",
129 .dependencies = featureSet(&[_]Feature{}),
130 };
131 result[@enumToInt(Feature.experimental_zbf)] = .{
132 .llvm_name = "experimental-zbf",
133 .description = "'Zbf' (Bit-Field 'B' Instructions)",
134 .dependencies = featureSet(&[_]Feature{}),
135 };
136 result[@enumToInt(Feature.experimental_zbm)] = .{
137 .llvm_name = "experimental-zbm",
138 .description = "'Zbm' (Matrix 'B' Instructions)",
139 .dependencies = featureSet(&[_]Feature{}),
140 };
141 result[@enumToInt(Feature.experimental_zbp)] = .{
142 .llvm_name = "experimental-zbp",
143 .description = "'Zbp' (Permutation 'B' Instructions)",
144 .dependencies = featureSet(&[_]Feature{}),
145 };
146 result[@enumToInt(Feature.experimental_zbproposedc)] = .{
147 .llvm_name = "experimental-zbproposedc",
148 .description = "'Zbproposedc' (Proposed Compressed 'B' Instructions)",
149 .dependencies = featureSet(&[_]Feature{}),
150 };
151 result[@enumToInt(Feature.experimental_zbr)] = .{
152 .llvm_name = "experimental-zbr",
153 .description = "'Zbr' (Polynomial Reduction 'B' Instructions)",
154 .dependencies = featureSet(&[_]Feature{}),
155 };
156 result[@enumToInt(Feature.experimental_zbs)] = .{
157 .llvm_name = "experimental-zbs",
158 .description = "'Zbs' (Single-Bit 'B' Instructions)",
159 .dependencies = featureSet(&[_]Feature{}),
160 };
161 result[@enumToInt(Feature.experimental_zbt)] = .{
162 .llvm_name = "experimental-zbt",
163 .description = "'Zbt' (Ternary 'B' Instructions)",
164 .dependencies = featureSet(&[_]Feature{}),
165 };
81 result[@enumToInt(Feature.f)] = .{166 result[@enumToInt(Feature.f)] = .{
82 .llvm_name = "f",167 .llvm_name = "f",
83 .description = "'F' (Single-Precision Floating-Point)",168 .description = "'F' (Single-Precision Floating-Point)",
...@@ -88,6 +173,11 @@ pub const all_features = blk: {...@@ -88,6 +173,11 @@ pub const all_features = blk: {
88 .description = "'M' (Integer Multiplication and Division)",173 .description = "'M' (Integer Multiplication and Division)",
89 .dependencies = featureSet(&[_]Feature{}),174 .dependencies = featureSet(&[_]Feature{}),
90 };175 };
176 result[@enumToInt(Feature.no_rvc_hints)] = .{
177 .llvm_name = "no-rvc-hints",
178 .description = "Disable RVC Hint Instructions.",
179 .dependencies = featureSet(&[_]Feature{}),
180 };
91 result[@enumToInt(Feature.relax)] = .{181 result[@enumToInt(Feature.relax)] = .{
92 .llvm_name = "relax",182 .llvm_name = "relax",
93 .description = "Enable Linker relaxation.",183 .description = "Enable Linker relaxation.",
...@@ -248,9 +338,9 @@ pub const all_features = blk: {...@@ -248,9 +338,9 @@ pub const all_features = blk: {
248 .description = "Reserve X9",338 .description = "Reserve X9",
249 .dependencies = featureSet(&[_]Feature{}),339 .dependencies = featureSet(&[_]Feature{}),
250 };340 };
251 result[@enumToInt(Feature.rvc_hints)] = .{341 result[@enumToInt(Feature.save_restore)] = .{
252 .llvm_name = "rvc-hints",342 .llvm_name = "save-restore",
253 .description = "Enable RVC Hint Instructions.",343 .description = "Enable save/restore.",
254 .dependencies = featureSet(&[_]Feature{}),344 .dependencies = featureSet(&[_]Feature{}),
255 };345 };
256 const ti = @typeInfo(Feature);346 const ti = @typeInfo(Feature);
...@@ -273,7 +363,6 @@ pub const cpu = struct {...@@ -273,7 +363,6 @@ pub const cpu = struct {
273 .m,363 .m,
274 }),364 }),
275 };365 };
276
277 pub const baseline_rv64 = CpuModel{366 pub const baseline_rv64 = CpuModel{
278 .name = "baseline_rv64",367 .name = "baseline_rv64",
279 .llvm_name = null,368 .llvm_name = null,
...@@ -286,20 +375,49 @@ pub const cpu = struct {...@@ -286,20 +375,49 @@ pub const cpu = struct {
286 .m,375 .m,
287 }),376 }),
288 };377 };
289
290 pub const generic_rv32 = CpuModel{378 pub const generic_rv32 = CpuModel{
291 .name = "generic_rv32",379 .name = "generic_rv32",
292 .llvm_name = null,380 .llvm_name = "generic-rv32",
293 .features = featureSet(&[_]Feature{381 .features = featureSet(&[_]Feature{}),
294 .rvc_hints,
295 }),
296 };382 };
297 pub const generic_rv64 = CpuModel{383 pub const generic_rv64 = CpuModel{
298 .name = "generic_rv64",384 .name = "generic_rv64",
299 .llvm_name = null,385 .llvm_name = "generic-rv64",
300 .features = featureSet(&[_]Feature{386 .features = featureSet(&[_]Feature{
301 .@"64bit",387 .@"64bit",
302 .rvc_hints,388 }),
389 };
390 pub const rocket_rv32 = CpuModel{
391 .name = "rocket_rv32",
392 .llvm_name = "rocket-rv32",
393 .features = featureSet(&[_]Feature{}),
394 };
395 pub const rocket_rv64 = CpuModel{
396 .name = "rocket_rv64",
397 .llvm_name = "rocket-rv64",
398 .features = featureSet(&[_]Feature{
399 .@"64bit",
400 }),
401 };
402 pub const sifive_e31 = CpuModel{
403 .name = "sifive_e31",
404 .llvm_name = "sifive-e31",
405 .features = featureSet(&[_]Feature{
406 .a,
407 .c,
408 .m,
409 }),
410 };
411 pub const sifive_u54 = CpuModel{
412 .name = "sifive_u54",
413 .llvm_name = "sifive-u54",
414 .features = featureSet(&[_]Feature{
415 .@"64bit",
416 .a,
417 .c,
418 .d,
419 .f,
420 .m,
303 }),421 }),
304 };422 };
305};423};
lib/std/target/systemz.zig+6
...@@ -32,6 +32,7 @@ pub const Feature = enum {...@@ -32,6 +32,7 @@ pub const Feature = enum {
32 population_count,32 population_count,
33 processor_assist,33 processor_assist,
34 reset_reference_bits_multiple,34 reset_reference_bits_multiple,
35 soft_float,
35 transactional_execution,36 transactional_execution,
36 vector,37 vector,
37 vector_enhancements_1,38 vector_enhancements_1,
...@@ -191,6 +192,11 @@ pub const all_features = blk: {...@@ -191,6 +192,11 @@ pub const all_features = blk: {
191 .description = "Assume that the reset-reference-bits-multiple facility is installed",192 .description = "Assume that the reset-reference-bits-multiple facility is installed",
192 .dependencies = featureSet(&[_]Feature{}),193 .dependencies = featureSet(&[_]Feature{}),
193 };194 };
195 result[@enumToInt(Feature.soft_float)] = .{
196 .llvm_name = "soft-float",
197 .description = "Use software emulation for floating point",
198 .dependencies = featureSet(&[_]Feature{}),
199 };
194 result[@enumToInt(Feature.transactional_execution)] = .{200 result[@enumToInt(Feature.transactional_execution)] = .{
195 .llvm_name = "transactional-execution",201 .llvm_name = "transactional-execution",
196 .description = "Assume that the transactional-execution facility is installed",202 .description = "Assume that the transactional-execution facility is installed",
lib/std/target/wasm.zig+8
...@@ -9,6 +9,7 @@ pub const Feature = enum {...@@ -9,6 +9,7 @@ pub const Feature = enum {
9 multivalue,9 multivalue,
10 mutable_globals,10 mutable_globals,
11 nontrapping_fptoint,11 nontrapping_fptoint,
12 reference_types,
12 sign_ext,13 sign_ext,
13 simd128,14 simd128,
14 tail_call,15 tail_call,
...@@ -51,6 +52,11 @@ pub const all_features = blk: {...@@ -51,6 +52,11 @@ pub const all_features = blk: {
51 .description = "Enable non-trapping float-to-int conversion operators",52 .description = "Enable non-trapping float-to-int conversion operators",
52 .dependencies = featureSet(&[_]Feature{}),53 .dependencies = featureSet(&[_]Feature{}),
53 };54 };
55 result[@enumToInt(Feature.reference_types)] = .{
56 .llvm_name = "reference-types",
57 .description = "Enable reference types",
58 .dependencies = featureSet(&[_]Feature{}),
59 };
54 result[@enumToInt(Feature.sign_ext)] = .{60 result[@enumToInt(Feature.sign_ext)] = .{
55 .llvm_name = "sign-ext",61 .llvm_name = "sign-ext",
56 .description = "Enable sign extension operators",62 .description = "Enable sign extension operators",
...@@ -87,10 +93,12 @@ pub const cpu = struct {...@@ -87,10 +93,12 @@ pub const cpu = struct {
87 .llvm_name = "bleeding-edge",93 .llvm_name = "bleeding-edge",
88 .features = featureSet(&[_]Feature{94 .features = featureSet(&[_]Feature{
89 .atomics,95 .atomics,
96 .bulk_memory,
90 .mutable_globals,97 .mutable_globals,
91 .nontrapping_fptoint,98 .nontrapping_fptoint,
92 .sign_ext,99 .sign_ext,
93 .simd128,100 .simd128,
101 .tail_call,
94 }),102 }),
95 };103 };
96 pub const generic = CpuModel{104 pub const generic = CpuModel{
lib/std/target/x86.zig+93-7
...@@ -8,6 +8,9 @@ pub const Feature = enum {...@@ -8,6 +8,9 @@ pub const Feature = enum {
8 @"64bit",8 @"64bit",
9 adx,9 adx,
10 aes,10 aes,
11 amx_bf16,
12 amx_int8,
13 amx_tile,
11 avx,14 avx,
12 avx2,15 avx2,
13 avx512bf16,16 avx512bf16,
...@@ -42,6 +45,7 @@ pub const Feature = enum {...@@ -42,6 +45,7 @@ pub const Feature = enum {
42 false_deps_popcnt,45 false_deps_popcnt,
43 fast_11bytenop,46 fast_11bytenop,
44 fast_15bytenop,47 fast_15bytenop,
48 fast_7bytenop,
45 fast_bextr,49 fast_bextr,
46 fast_gather,50 fast_gather,
47 fast_hops,51 fast_hops,
...@@ -62,6 +66,8 @@ pub const Feature = enum {...@@ -62,6 +66,8 @@ pub const Feature = enum {
62 invpcid,66 invpcid,
63 lea_sp,67 lea_sp,
64 lea_uses_ag,68 lea_uses_ag,
69 lvi_cfi,
70 lvi_load_hardening,
65 lwp,71 lwp,
66 lzcnt,72 lzcnt,
67 macrofusion,73 macrofusion,
...@@ -93,6 +99,8 @@ pub const Feature = enum {...@@ -93,6 +99,8 @@ pub const Feature = enum {
93 retpoline_indirect_calls,99 retpoline_indirect_calls,
94 rtm,100 rtm,
95 sahf,101 sahf,
102 serialize,
103 seses,
96 sgx,104 sgx,
97 sha,105 sha,
98 shstk,106 shstk,
...@@ -115,6 +123,7 @@ pub const Feature = enum {...@@ -115,6 +123,7 @@ pub const Feature = enum {
115 sse4a,123 sse4a,
116 ssse3,124 ssse3,
117 tbm,125 tbm,
126 tsxldtrk,
118 use_aa,127 use_aa,
119 use_glm_div_sqrt_costs,128 use_glm_div_sqrt_costs,
120 vaes,129 vaes,
...@@ -167,6 +176,25 @@ pub const all_features = blk: {...@@ -167,6 +176,25 @@ pub const all_features = blk: {
167 .sse2,176 .sse2,
168 }),177 }),
169 };178 };
179 result[@enumToInt(Feature.amx_bf16)] = .{
180 .llvm_name = "amx-bf16",
181 .description = "Support AMX-BF16 instructions",
182 .dependencies = featureSet(&[_]Feature{
183 .amx_tile,
184 }),
185 };
186 result[@enumToInt(Feature.amx_int8)] = .{
187 .llvm_name = "amx-int8",
188 .description = "Support AMX-INT8 instructions",
189 .dependencies = featureSet(&[_]Feature{
190 .amx_tile,
191 }),
192 };
193 result[@enumToInt(Feature.amx_tile)] = .{
194 .llvm_name = "amx-tile",
195 .description = "Support AMX-TILE instructions",
196 .dependencies = featureSet(&[_]Feature{}),
197 };
170 result[@enumToInt(Feature.avx)] = .{198 result[@enumToInt(Feature.avx)] = .{
171 .llvm_name = "avx",199 .llvm_name = "avx",
172 .description = "Enable AVX instructions",200 .description = "Enable AVX instructions",
...@@ -377,6 +405,11 @@ pub const all_features = blk: {...@@ -377,6 +405,11 @@ pub const all_features = blk: {
377 .description = "Target can quickly decode up to 15 byte NOPs",405 .description = "Target can quickly decode up to 15 byte NOPs",
378 .dependencies = featureSet(&[_]Feature{}),406 .dependencies = featureSet(&[_]Feature{}),
379 };407 };
408 result[@enumToInt(Feature.fast_7bytenop)] = .{
409 .llvm_name = "fast-7bytenop",
410 .description = "Target can quickly decode up to 7 byte NOPs",
411 .dependencies = featureSet(&[_]Feature{}),
412 };
380 result[@enumToInt(Feature.fast_bextr)] = .{413 result[@enumToInt(Feature.fast_bextr)] = .{
381 .llvm_name = "fast-bextr",414 .llvm_name = "fast-bextr",
382 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",415 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
...@@ -484,6 +517,16 @@ pub const all_features = blk: {...@@ -484,6 +517,16 @@ pub const all_features = blk: {
484 .description = "LEA instruction needs inputs at AG stage",517 .description = "LEA instruction needs inputs at AG stage",
485 .dependencies = featureSet(&[_]Feature{}),518 .dependencies = featureSet(&[_]Feature{}),
486 };519 };
520 result[@enumToInt(Feature.lvi_cfi)] = .{
521 .llvm_name = "lvi-cfi",
522 .description = "Prevent indirect calls/branches from using a memory operand, and precede all indirect calls/branches from a register with an LFENCE instruction to serialize control flow. Also decompose RET instructions into a POP+LFENCE+JMP sequence.",
523 .dependencies = featureSet(&[_]Feature{}),
524 };
525 result[@enumToInt(Feature.lvi_load_hardening)] = .{
526 .llvm_name = "lvi-load-hardening",
527 .description = "Insert LFENCE instructions to prevent data speculatively injected into loads from being used maliciously.",
528 .dependencies = featureSet(&[_]Feature{}),
529 };
487 result[@enumToInt(Feature.lwp)] = .{530 result[@enumToInt(Feature.lwp)] = .{
488 .llvm_name = "lwp",531 .llvm_name = "lwp",
489 .description = "Enable LWP instructions",532 .description = "Enable LWP instructions",
...@@ -646,6 +689,18 @@ pub const all_features = blk: {...@@ -646,6 +689,18 @@ pub const all_features = blk: {
646 .description = "Support LAHF and SAHF instructions",689 .description = "Support LAHF and SAHF instructions",
647 .dependencies = featureSet(&[_]Feature{}),690 .dependencies = featureSet(&[_]Feature{}),
648 };691 };
692 result[@enumToInt(Feature.serialize)] = .{
693 .llvm_name = "serialize",
694 .description = "Has serialize instruction",
695 .dependencies = featureSet(&[_]Feature{}),
696 };
697 result[@enumToInt(Feature.seses)] = .{
698 .llvm_name = "seses",
699 .description = "Prevent speculative execution side channel timing attacks by inserting a speculation barrier before memory reads, memory writes, and conditional branches. Implies LVI Control Flow integrity.",
700 .dependencies = featureSet(&[_]Feature{
701 .lvi_cfi,
702 }),
703 };
649 result[@enumToInt(Feature.sgx)] = .{704 result[@enumToInt(Feature.sgx)] = .{
650 .llvm_name = "sgx",705 .llvm_name = "sgx",
651 .description = "Enable Software Guard Extensions",706 .description = "Enable Software Guard Extensions",
...@@ -770,6 +825,11 @@ pub const all_features = blk: {...@@ -770,6 +825,11 @@ pub const all_features = blk: {
770 .description = "Enable TBM instructions",825 .description = "Enable TBM instructions",
771 .dependencies = featureSet(&[_]Feature{}),826 .dependencies = featureSet(&[_]Feature{}),
772 };827 };
828 result[@enumToInt(Feature.tsxldtrk)] = .{
829 .llvm_name = "tsxldtrk",
830 .description = "Support TSXLDTRK instructions",
831 .dependencies = featureSet(&[_]Feature{}),
832 };
773 result[@enumToInt(Feature.use_aa)] = .{833 result[@enumToInt(Feature.use_aa)] = .{
774 .llvm_name = "use-aa",834 .llvm_name = "use-aa",
775 .description = "Use alias analysis during codegen",835 .description = "Use alias analysis during codegen",
...@@ -831,17 +891,23 @@ pub const all_features = blk: {...@@ -831,17 +891,23 @@ pub const all_features = blk: {
831 result[@enumToInt(Feature.xsavec)] = .{891 result[@enumToInt(Feature.xsavec)] = .{
832 .llvm_name = "xsavec",892 .llvm_name = "xsavec",
833 .description = "Support xsavec instructions",893 .description = "Support xsavec instructions",
834 .dependencies = featureSet(&[_]Feature{}),894 .dependencies = featureSet(&[_]Feature{
895 .xsave,
896 }),
835 };897 };
836 result[@enumToInt(Feature.xsaveopt)] = .{898 result[@enumToInt(Feature.xsaveopt)] = .{
837 .llvm_name = "xsaveopt",899 .llvm_name = "xsaveopt",
838 .description = "Support xsaveopt instructions",900 .description = "Support xsaveopt instructions",
839 .dependencies = featureSet(&[_]Feature{}),901 .dependencies = featureSet(&[_]Feature{
902 .xsave,
903 }),
840 };904 };
841 result[@enumToInt(Feature.xsaves)] = .{905 result[@enumToInt(Feature.xsaves)] = .{
842 .llvm_name = "xsaves",906 .llvm_name = "xsaves",
843 .description = "Support xsaves instructions",907 .description = "Support xsaves instructions",
844 .dependencies = featureSet(&[_]Feature{}),908 .dependencies = featureSet(&[_]Feature{
909 .xsave,
910 }),
845 };911 };
846 const ti = @typeInfo(Feature);912 const ti = @typeInfo(Feature);
847 for (result) |*elem, i| {913 for (result) |*elem, i| {
...@@ -866,6 +932,7 @@ pub const cpu = struct {...@@ -866,6 +932,7 @@ pub const cpu = struct {
866 .lzcnt,932 .lzcnt,
867 .nopl,933 .nopl,
868 .popcnt,934 .popcnt,
935 .prfchw,
869 .sahf,936 .sahf,
870 .slow_shld,937 .slow_shld,
871 .sse4a,938 .sse4a,
...@@ -1043,6 +1110,7 @@ pub const cpu = struct {...@@ -1043,6 +1110,7 @@ pub const cpu = struct {
1043 .lzcnt,1110 .lzcnt,
1044 .nopl,1111 .nopl,
1045 .popcnt,1112 .popcnt,
1113 .prfchw,
1046 .sahf,1114 .sahf,
1047 .slow_shld,1115 .slow_shld,
1048 .sse4a,1116 .sse4a,
...@@ -1169,11 +1237,13 @@ pub const cpu = struct {...@@ -1169,11 +1237,13 @@ pub const cpu = struct {
1169 .lwp,1237 .lwp,
1170 .lzcnt,1238 .lzcnt,
1171 .mmx,1239 .mmx,
1240 .movbe,
1172 .mwaitx,1241 .mwaitx,
1173 .nopl,1242 .nopl,
1174 .pclmul,1243 .pclmul,
1175 .popcnt,1244 .popcnt,
1176 .prfchw,1245 .prfchw,
1246 .rdrnd,
1177 .sahf,1247 .sahf,
1178 .slow_shld,1248 .slow_shld,
1179 .tbm,1249 .tbm,
...@@ -1226,6 +1296,7 @@ pub const cpu = struct {...@@ -1226,6 +1296,7 @@ pub const cpu = struct {
1226 .f16c,1296 .f16c,
1227 .false_deps_lzcnt_tzcnt,1297 .false_deps_lzcnt_tzcnt,
1228 .false_deps_popcnt,1298 .false_deps_popcnt,
1299 .fast_15bytenop,
1229 .fast_scalar_fsqrt,1300 .fast_scalar_fsqrt,
1230 .fast_shld_rotate,1301 .fast_shld_rotate,
1231 .fast_variable_shuffle,1302 .fast_variable_shuffle,
...@@ -1362,6 +1433,7 @@ pub const cpu = struct {...@@ -1362,6 +1433,7 @@ pub const cpu = struct {
1362 .cx8,1433 .cx8,
1363 .ermsb,1434 .ermsb,
1364 .f16c,1435 .f16c,
1436 .fast_15bytenop,
1365 .fast_gather,1437 .fast_gather,
1366 .fast_scalar_fsqrt,1438 .fast_scalar_fsqrt,
1367 .fast_shld_rotate,1439 .fast_shld_rotate,
...@@ -1423,6 +1495,7 @@ pub const cpu = struct {...@@ -1423,6 +1495,7 @@ pub const cpu = struct {
1423 .ermsb,1495 .ermsb,
1424 .f16c,1496 .f16c,
1425 .false_deps_popcnt,1497 .false_deps_popcnt,
1498 .fast_15bytenop,
1426 .fast_gather,1499 .fast_gather,
1427 .fast_scalar_fsqrt,1500 .fast_scalar_fsqrt,
1428 .fast_shld_rotate,1501 .fast_shld_rotate,
...@@ -1483,6 +1556,7 @@ pub const cpu = struct {...@@ -1483,6 +1556,7 @@ pub const cpu = struct {
1483 .ermsb,1556 .ermsb,
1484 .f16c,1557 .f16c,
1485 .false_deps_popcnt,1558 .false_deps_popcnt,
1559 .fast_15bytenop,
1486 .fast_gather,1560 .fast_gather,
1487 .fast_scalar_fsqrt,1561 .fast_scalar_fsqrt,
1488 .fast_shld_rotate,1562 .fast_shld_rotate,
...@@ -1528,6 +1602,7 @@ pub const cpu = struct {...@@ -1528,6 +1602,7 @@ pub const cpu = struct {
1528 .cx8,1602 .cx8,
1529 .f16c,1603 .f16c,
1530 .false_deps_popcnt,1604 .false_deps_popcnt,
1605 .fast_15bytenop,
1531 .fast_scalar_fsqrt,1606 .fast_scalar_fsqrt,
1532 .fast_shld_rotate,1607 .fast_shld_rotate,
1533 .fsgsbase,1608 .fsgsbase,
...@@ -1566,6 +1641,7 @@ pub const cpu = struct {...@@ -1566,6 +1641,7 @@ pub const cpu = struct {
1566 .f16c,1641 .f16c,
1567 .false_deps_lzcnt_tzcnt,1642 .false_deps_lzcnt_tzcnt,
1568 .false_deps_popcnt,1643 .false_deps_popcnt,
1644 .fast_15bytenop,
1569 .fast_scalar_fsqrt,1645 .fast_scalar_fsqrt,
1570 .fast_shld_rotate,1646 .fast_shld_rotate,
1571 .fast_variable_shuffle,1647 .fast_variable_shuffle,
...@@ -1640,6 +1716,7 @@ pub const cpu = struct {...@@ -1640,6 +1716,7 @@ pub const cpu = struct {
1640 .cx16,1716 .cx16,
1641 .cx8,1717 .cx8,
1642 .false_deps_popcnt,1718 .false_deps_popcnt,
1719 .fast_15bytenop,
1643 .fast_scalar_fsqrt,1720 .fast_scalar_fsqrt,
1644 .fast_shld_rotate,1721 .fast_shld_rotate,
1645 .fxsr,1722 .fxsr,
...@@ -1773,6 +1850,7 @@ pub const cpu = struct {...@@ -1773,6 +1850,7 @@ pub const cpu = struct {
1773 .f16c,1850 .f16c,
1774 .false_deps_lzcnt_tzcnt,1851 .false_deps_lzcnt_tzcnt,
1775 .false_deps_popcnt,1852 .false_deps_popcnt,
1853 .fast_15bytenop,
1776 .fast_scalar_fsqrt,1854 .fast_scalar_fsqrt,
1777 .fast_shld_rotate,1855 .fast_shld_rotate,
1778 .fast_variable_shuffle,1856 .fast_variable_shuffle,
...@@ -1867,6 +1945,7 @@ pub const cpu = struct {...@@ -1867,6 +1945,7 @@ pub const cpu = struct {
1867 .cx8,1945 .cx8,
1868 .ermsb,1946 .ermsb,
1869 .f16c,1947 .f16c,
1948 .fast_15bytenop,
1870 .fast_gather,1949 .fast_gather,
1871 .fast_scalar_fsqrt,1950 .fast_scalar_fsqrt,
1872 .fast_shld_rotate,1951 .fast_shld_rotate,
...@@ -1936,6 +2015,7 @@ pub const cpu = struct {...@@ -1936,6 +2015,7 @@ pub const cpu = struct {
1936 .cx8,2015 .cx8,
1937 .ermsb,2016 .ermsb,
1938 .f16c,2017 .f16c,
2018 .fast_15bytenop,
1939 .fast_gather,2019 .fast_gather,
1940 .fast_scalar_fsqrt,2020 .fast_scalar_fsqrt,
1941 .fast_shld_rotate,2021 .fast_shld_rotate,
...@@ -1989,6 +2069,7 @@ pub const cpu = struct {...@@ -1989,6 +2069,7 @@ pub const cpu = struct {
1989 .cx8,2069 .cx8,
1990 .f16c,2070 .f16c,
1991 .false_deps_popcnt,2071 .false_deps_popcnt,
2072 .fast_15bytenop,
1992 .fast_scalar_fsqrt,2073 .fast_scalar_fsqrt,
1993 .fast_shld_rotate,2074 .fast_shld_rotate,
1994 .fsgsbase,2075 .fsgsbase,
...@@ -2414,6 +2495,7 @@ pub const cpu = struct {...@@ -2414,6 +2495,7 @@ pub const cpu = struct {
2414 .cx16,2495 .cx16,
2415 .cx8,2496 .cx8,
2416 .false_deps_popcnt,2497 .false_deps_popcnt,
2498 .fast_15bytenop,
2417 .fast_scalar_fsqrt,2499 .fast_scalar_fsqrt,
2418 .fast_shld_rotate,2500 .fast_shld_rotate,
2419 .fxsr,2501 .fxsr,
...@@ -2443,6 +2525,7 @@ pub const cpu = struct {...@@ -2443,6 +2525,7 @@ pub const cpu = struct {
2443 .cx16,2525 .cx16,
2444 .cx8,2526 .cx8,
2445 .false_deps_popcnt,2527 .false_deps_popcnt,
2528 .fast_7bytenop,
2446 .fxsr,2529 .fxsr,
2447 .idivq_to_divl,2530 .idivq_to_divl,
2448 .mmx,2531 .mmx,
...@@ -2487,6 +2570,7 @@ pub const cpu = struct {...@@ -2487,6 +2570,7 @@ pub const cpu = struct {
2487 .ermsb,2570 .ermsb,
2488 .f16c,2571 .f16c,
2489 .false_deps_popcnt,2572 .false_deps_popcnt,
2573 .fast_15bytenop,
2490 .fast_gather,2574 .fast_gather,
2491 .fast_scalar_fsqrt,2575 .fast_scalar_fsqrt,
2492 .fast_shld_rotate,2576 .fast_shld_rotate,
...@@ -2539,6 +2623,7 @@ pub const cpu = struct {...@@ -2539,6 +2623,7 @@ pub const cpu = struct {
2539 .ermsb,2623 .ermsb,
2540 .f16c,2624 .f16c,
2541 .false_deps_popcnt,2625 .false_deps_popcnt,
2626 .fast_15bytenop,
2542 .fast_gather,2627 .fast_gather,
2543 .fast_scalar_fsqrt,2628 .fast_scalar_fsqrt,
2544 .fast_shld_rotate,2629 .fast_shld_rotate,
...@@ -2596,6 +2681,7 @@ pub const cpu = struct {...@@ -2596,6 +2681,7 @@ pub const cpu = struct {
2596 .ermsb,2681 .ermsb,
2597 .f16c,2682 .f16c,
2598 .false_deps_popcnt,2683 .false_deps_popcnt,
2684 .fast_15bytenop,
2599 .fast_gather,2685 .fast_gather,
2600 .fast_scalar_fsqrt,2686 .fast_scalar_fsqrt,
2601 .fast_shld_rotate,2687 .fast_shld_rotate,
...@@ -2639,6 +2725,7 @@ pub const cpu = struct {...@@ -2639,6 +2725,7 @@ pub const cpu = struct {
2639 .cx16,2725 .cx16,
2640 .cx8,2726 .cx8,
2641 .false_deps_popcnt,2727 .false_deps_popcnt,
2728 .fast_7bytenop,
2642 .fxsr,2729 .fxsr,
2643 .idivq_to_divl,2730 .idivq_to_divl,
2644 .mmx,2731 .mmx,
...@@ -2689,6 +2776,7 @@ pub const cpu = struct {...@@ -2689,6 +2776,7 @@ pub const cpu = struct {
2689 .cx8,2776 .cx8,
2690 .ermsb,2777 .ermsb,
2691 .f16c,2778 .f16c,
2779 .fast_15bytenop,
2692 .fast_gather,2780 .fast_gather,
2693 .fast_scalar_fsqrt,2781 .fast_scalar_fsqrt,
2694 .fast_shld_rotate,2782 .fast_shld_rotate,
...@@ -2738,8 +2826,8 @@ pub const cpu = struct {...@@ -2738,8 +2826,8 @@ pub const cpu = struct {
2738 .features = featureSet(&[_]Feature{2826 .features = featureSet(&[_]Feature{
2739 .@"64bit",2827 .@"64bit",
2740 .aes,2828 .aes,
2741 .cldemote,
2742 .clflushopt,2829 .clflushopt,
2830 .clwb,
2743 .cmov,2831 .cmov,
2744 .cx16,2832 .cx16,
2745 .cx8,2833 .cx8,
...@@ -2748,8 +2836,6 @@ pub const cpu = struct {...@@ -2748,8 +2836,6 @@ pub const cpu = struct {
2748 .gfni,2836 .gfni,
2749 .mmx,2837 .mmx,
2750 .movbe,2838 .movbe,
2751 .movdir64b,
2752 .movdiri,
2753 .nopl,2839 .nopl,
2754 .pclmul,2840 .pclmul,
2755 .popcnt,2841 .popcnt,
...@@ -2768,7 +2854,6 @@ pub const cpu = struct {...@@ -2768,7 +2854,6 @@ pub const cpu = struct {
2768 .ssse3,2854 .ssse3,
2769 .use_glm_div_sqrt_costs,2855 .use_glm_div_sqrt_costs,
2770 .vzeroupper,2856 .vzeroupper,
2771 .waitpkg,
2772 .x87,2857 .x87,
2773 .xsave,2858 .xsave,
2774 .xsavec,2859 .xsavec,
...@@ -2824,6 +2909,7 @@ pub const cpu = struct {...@@ -2824,6 +2909,7 @@ pub const cpu = struct {
2824 .cmov,2909 .cmov,
2825 .cx8,2910 .cx8,
2826 .fxsr,2911 .fxsr,
2912 .idivq_to_divl,
2827 .macrofusion,2913 .macrofusion,
2828 .mmx,2914 .mmx,
2829 .nopl,2915 .nopl,