authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-04-07 17:23:32+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-04-11 02:28:35+02:00
log382aa48f044ff87d50e1c185a12173be562275f2
treed5b0f111b85b9983d353adf98bb8d36092992876
parent0a5c088ecc2fbe4db5cae1cc5cf62eeba340375d
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

test: Disable a bunch of vector behavior tests for hexagon.

Most of the failures are: * https://github.com/llvm/llvm-project/issues/118879 * https://github.com/llvm/llvm-project/issues/134659 But some are also miscompilations leading to wrong results. I'm not going to investigate the latter further until all the backend crashes have been resolved.

5 files changed, 13 insertions(+), 1 deletions(-)

test/behavior.zig+5-1
...@@ -104,7 +104,11 @@ test {...@@ -104,7 +104,11 @@ test {
104 _ = @import("behavior/union_with_members.zig");104 _ = @import("behavior/union_with_members.zig");
105 _ = @import("behavior/usingnamespace.zig");105 _ = @import("behavior/usingnamespace.zig");
106 _ = @import("behavior/var_args.zig");106 _ = @import("behavior/var_args.zig");
107 _ = @import("behavior/vector.zig");107 // https://github.com/llvm/llvm-project/issues/118879
108 // https://github.com/llvm/llvm-project/issues/134659
109 if (!(builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon)) {
110 _ = @import("behavior/vector.zig");
111 }
108 _ = @import("behavior/void.zig");112 _ = @import("behavior/void.zig");
109 _ = @import("behavior/while.zig");113 _ = @import("behavior/while.zig");
110 _ = @import("behavior/widening.zig");114 _ = @import("behavior/widening.zig");
test/behavior/cast.zig+2
...@@ -621,6 +621,7 @@ test "@intCast on vector" {...@@ -621,6 +621,7 @@ test "@intCast on vector" {
621 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;621 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
622 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;622 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
623 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;623 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
624 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
624625
625 const S = struct {626 const S = struct {
626 fn doTheTest() !void {627 fn doTheTest() !void {
...@@ -2697,6 +2698,7 @@ test "@intCast vector of signed integer" {...@@ -2697,6 +2698,7 @@ test "@intCast vector of signed integer" {
2697 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO2698 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
2698 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;2699 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
2699 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;2700 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
2701 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
27002702
2701 var x: @Vector(4, i32) = .{ 1, 2, 3, 4 };2703 var x: @Vector(4, i32) = .{ 1, 2, 3, 4 };
2702 _ = &x;2704 _ = &x;
test/behavior/floatop.zig+4
...@@ -241,6 +241,7 @@ test "vector cmp f16" {...@@ -241,6 +241,7 @@ test "vector cmp f16" {
241 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;241 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
242 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;242 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
243 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;243 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
244 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
244245
245 try testCmpVector(f16);246 try testCmpVector(f16);
246 try comptime testCmpVector(f16);247 try comptime testCmpVector(f16);
...@@ -254,6 +255,7 @@ test "vector cmp f32" {...@@ -254,6 +255,7 @@ test "vector cmp f32" {
254 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;255 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
255 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;256 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
256 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;257 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
258 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
257259
258 try testCmpVector(f32);260 try testCmpVector(f32);
259 try comptime testCmpVector(f32);261 try comptime testCmpVector(f32);
...@@ -266,6 +268,7 @@ test "vector cmp f64" {...@@ -266,6 +268,7 @@ test "vector cmp f64" {
266 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;268 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
267 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;269 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
268 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;270 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
271 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
269272
270 try testCmpVector(f64);273 try testCmpVector(f64);
271 try comptime testCmpVector(f64);274 try comptime testCmpVector(f64);
...@@ -281,6 +284,7 @@ test "vector cmp f128" {...@@ -281,6 +284,7 @@ test "vector cmp f128" {
281 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;284 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
282 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;285 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
283 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;286 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
287 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
284288
285 try testCmpVector(f128);289 try testCmpVector(f128);
286 try comptime testCmpVector(f128);290 try comptime testCmpVector(f128);
test/behavior/math.zig+1
...@@ -1899,6 +1899,7 @@ test "partially-runtime integer vector division would be illegal if vector eleme...@@ -1899,6 +1899,7 @@ test "partially-runtime integer vector division would be illegal if vector eleme
1899 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1899 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1900 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1900 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1901 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1901 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1902 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
19021903
1903 var lhs: @Vector(2, i8) = .{ -128, 5 };1904 var lhs: @Vector(2, i8) = .{ -128, 5 };
1904 const rhs: @Vector(2, i8) = .{ 1, -1 };1905 const rhs: @Vector(2, i8) = .{ 1, -1 };
test/behavior/select.zig+1
...@@ -71,6 +71,7 @@ test "@select compare result" {...@@ -71,6 +71,7 @@ test "@select compare result" {
71 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;71 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
72 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;72 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
73 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;73 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
74 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
7475
75 const S = struct {76 const S = struct {
76 fn min(comptime V: type, lhs: V, rhs: V) V {77 fn min(comptime V: type, lhs: V, rhs: V) V {