| author |  Jakub Konka <kubkon@jakubkonka.com> 2020-11-18 10:12:39+01:00 |
| committer | Jakub Konka <kubkon@jakubkonka.com> 2020-11-18 10:12:39+01:00 |
| log | 39336fd2e9b7e471c3971b10adb91b5fd647c946 |
| tree | f9b827f19eecbf42fdd857795fb5a936b524ccf2 |
| parent | 5ff8dd179e0ccb17f894d8d76a9079e3080653cd |
stage2 aarch64: assert register is 64bits in PCrel
Thanks @joachimschmidt557 for pointing out this fix!1 files changed, 1 insertions(+), 0 deletions(-)
src- codegen
src/codegen/aarch64.zig+1
| ... | ... | @@ -417,6 +417,7 @@ pub const Instruction = union(enum) { |
| 417 | 417 | } |
| 418 | 418 | |
| 419 | 419 | fn pcRelativeAddress(rd: Register, imm21: i21, op: u1) Instruction { |
| 420 | assert(rd.size() == 64); | |
| 420 | 421 | const imm21_u = @bitCast(u21, imm21); |
| 421 | 422 | return Instruction{ |
| 422 | 423 | .PCRelativeAddress = .{ |