authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2017-08-26 13:06:13-04:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2017-08-26 13:06:13-04:00
log3a4ea41fe891b5b0b9b50cb80200a392e20cc31f
tree9744b57a1f2dbd99e9fb87567a73167e4738219c
parent2b8f98a52c64301ae5bfc83936434af6c88d77d7

add some asserts in switch analysis code

1 files changed, 2 insertions(+), 0 deletions(-)

src/ir.cpp+2
......@@ -14202,6 +14202,8 @@ static TypeTableEntry *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira
1420214202 if (!end_val)
1420314203 return ira->codegen->builtin_types.entry_invalid;
1420414204
14205 assert(start_val->type->id == TypeTableEntryIdInt || start_val->type->id == TypeTableEntryIdNumLitInt);
14206 assert(end_val->type->id == TypeTableEntryIdInt || end_val->type->id == TypeTableEntryIdNumLitInt);
1420514207 AstNode *prev_node = rangeset_add_range(&rs, &start_val->data.x_bigint, &end_val->data.x_bigint,
1420614208 start_value->source_node);
1420714209 if (prev_node != nullptr) {