authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-28 20:24:41+01:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-11-02 10:44:18+01:00
log3a5142af8dcafea7062588b9d217ae82735c0bac
tree381de778a5e4c03b001d8e1e97d720ca712ea744
parentbe8a527eb2ac2f0527e33ce9e34c3bccdfee76c3
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

compiler: Handle arm_aapcs16_vfp alongside arm_aapcs_vfp in some places.

4 files changed, 20 insertions(+), 9 deletions(-)

src/Zcu.zig+5-1
......@@ -3615,12 +3615,16 @@ pub fn callconvSupported(zcu: *Zcu, cc: std.builtin.CallingConvention) union(enu
36153615 .aarch64_vfabi,
36163616 .aarch64_vfabi_sve,
36173617 .arm_aapcs,
3618 .arm_aapcs_vfp,
36193618 .riscv64_lp64_v,
36203619 .riscv32_ilp32_v,
36213620 .m68k_rtd,
36223621 => |opts| opts.incoming_stack_alignment == null,
36233622
3623 .arm_aapcs_vfp,
3624 => |opts| opts.incoming_stack_alignment == null and target.os.tag != .watchos,
3625 .arm_aapcs16_vfp,
3626 => |opts| opts.incoming_stack_alignment == null and target.os.tag == .watchos,
3627
36243628 .x86_sysv,
36253629 .x86_win,
36263630 .x86_stdcall,
src/codegen/c.zig+1-1
......@@ -7623,7 +7623,7 @@ fn toCallingConvention(cc: std.builtin.CallingConvention, zcu: *Zcu) ?[]const u8
76237623 .aarch64_vfabi => "aarch64_vector_pcs",
76247624 .aarch64_vfabi_sve => "aarch64_sve_pcs",
76257625 .arm_aapcs => "pcs(\"aapcs\")",
7626 .arm_aapcs_vfp => "pcs(\"aapcs-vfp\")",
7626 .arm_aapcs_vfp, .arm_aapcs16_vfp => "pcs(\"aapcs-vfp\")",
76277627 .riscv64_lp64_v, .riscv32_ilp32_v => "riscv_vector_cc",
76287628 .m68k_rtd => "m68k_rtd",
76297629
src/codegen/llvm.zig+11-5
......@@ -11747,7 +11747,14 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
1174711747 .aarch64_vfabi_sve => .aarch64_sve_vector_pcs,
1174811748 .arm_apcs => .arm_apcscc,
1174911749 .arm_aapcs => .arm_aapcscc,
11750 .arm_aapcs_vfp => .arm_aapcs_vfpcc,
11750 .arm_aapcs_vfp => if (target.os.tag != .watchos)
11751 .arm_aapcs_vfpcc
11752 else
11753 null,
11754 .arm_aapcs16_vfp => if (target.os.tag == .watchos)
11755 .arm_aapcs_vfpcc
11756 else
11757 null,
1175111758 .riscv64_lp64_v => .riscv_vectorcallcc,
1175211759 .riscv32_ilp32_v => .riscv_vectorcallcc,
1175311760 .avr_builtin => .avr_builtincc,
......@@ -11777,7 +11784,6 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
1177711784 .aarch64_aapcs,
1177811785 .aarch64_aapcs_darwin,
1177911786 .aarch64_aapcs_win,
11780 .arm_aapcs16_vfp,
1178111787 .mips64_n64,
1178211788 .mips64_n32,
1178311789 .mips_o32,
......@@ -11957,7 +11963,7 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe
1195711963 .aarch64_aapcs_darwin,
1195811964 .aarch64_aapcs_win,
1195911965 => aarch64_c_abi.classifyType(return_type, zcu) == .memory,
11960 .arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
11966 .arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
1196111967 .memory, .i64_array => true,
1196211968 .i32_array => |size| size != 1,
1196311969 .byval => false,
......@@ -12007,7 +12013,7 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu
1200712013 .integer => return o.builder.intType(@intCast(return_type.bitSize(zcu))),
1200812014 .double_integer => return o.builder.arrayType(2, .i64),
1200912015 },
12010 .arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
12016 .arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
1201112017 .memory, .i64_array => return .void,
1201212018 .i32_array => |len| return if (len == 1) .i32 else .void,
1201312019 .byval => return o.lowerType(return_type),
......@@ -12256,7 +12262,7 @@ const ParamTypeIterator = struct {
1225612262 .double_integer => return Lowering{ .i64_array = 2 },
1225712263 }
1225812264 },
12259 .arm_aapcs, .arm_aapcs_vfp => {
12265 .arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => {
1226012266 it.zig_index += 1;
1226112267 it.llvm_index += 1;
1226212268 switch (arm_c_abi.classifyType(ty, zcu, .arg)) {
src/link/Dwarf.zig+3-2
......@@ -3433,8 +3433,9 @@ fn updateType(
34333433
34343434 .arm_apcs => .nocall,
34353435 .arm_aapcs => .LLVM_AAPCS,
3436 .arm_aapcs_vfp => .LLVM_AAPCS_VFP,
3437 .arm_aapcs16_vfp => .nocall,
3436 .arm_aapcs_vfp,
3437 .arm_aapcs16_vfp,
3438 => .LLVM_AAPCS_VFP,
34383439
34393440 .riscv64_lp64_v,
34403441 .riscv32_ilp32_v,