Commit 3a5142af8dcafea7062588b9d217ae82735c0bac | zig

author	Alex Rønne Petersen <alex@alexrp.com> 2024-10-28 20:24:41+01:00
committer	Alex Rønne Petersen <alex@alexrp.com> 2024-11-02 10:44:18+01:00
log	3a5142af8dcafea7062588b9d217ae82735c0bac
tree	381de778a5e4c03b001d8e1e97d720ca712ea744
parent	be8a527eb2ac2f0527e33ce9e34c3bccdfee76c3
signature	Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

compiler: Handle arm_aapcs16_vfp alongside arm_aapcs_vfp in some places.

4 files changed, 20 insertions(+), 9 deletions(-)

src
- Zcu.zig
- codegen
  - c.zig
  - llvm.zig
- link
  - Dwarf.zig

src/Zcu.zig+5-1

 @@ -3615,12 +3615,16 @@ pub fn callconvSupported(zcu: *Zcu, cc: std.builtin.CallingConvention) union(enu
                 .aarch64_vfabi,
                 .aarch64_vfabi_sve,
                 .arm_aapcs,
-                .arm_aapcs_vfp,
                 .riscv64_lp64_v,
                 .riscv32_ilp32_v,
                 .m68k_rtd,
                 => |opts| opts.incoming_stack_alignment == null,
+                .arm_aapcs_vfp,
+                => |opts| opts.incoming_stack_alignment == null and target.os.tag != .watchos,
+                .arm_aapcs16_vfp,
+                => |opts| opts.incoming_stack_alignment == null and target.os.tag == .watchos,
                 .x86_sysv,
                 .x86_win,
                 .x86_stdcall,

src/codegen/c.zig+1-1

...	@@ -7623,7 +7623,7 @@ fn toCallingConvention(cc: std.builtin.CallingConvention, zcu: *Zcu) ?[]const u8	...	@@ -7623,7 +7623,7 @@ fn toCallingConvention(cc: std.builtin.CallingConvention, zcu: *Zcu) ?[]const u8
7623	.aarch64_vfabi => "aarch64_vector_pcs",	7623	.aarch64_vfabi => "aarch64_vector_pcs",
7624	.aarch64_vfabi_sve => "aarch64_sve_pcs",	7624	.aarch64_vfabi_sve => "aarch64_sve_pcs",
7625	.arm_aapcs => "pcs(\"aapcs\")",	7625	.arm_aapcs => "pcs(\"aapcs\")",
7626	.arm_aapcs_vfp => "pcs(\"aapcs-vfp\")",	7626	.arm_aapcs_vfp, .arm_aapcs16_vfp => "pcs(\"aapcs-vfp\")",
7627	.riscv64_lp64_v, .riscv32_ilp32_v => "riscv_vector_cc",	7627	.riscv64_lp64_v, .riscv32_ilp32_v => "riscv_vector_cc",
7628	.m68k_rtd => "m68k_rtd",	7628	.m68k_rtd => "m68k_rtd",
7629		7629

src/codegen/llvm.zig+11-5

...	@@ -11747,7 +11747,14 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ	...	@@ -11747,7 +11747,14 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
11747	.aarch64_vfabi_sve => .aarch64_sve_vector_pcs,	11747	.aarch64_vfabi_sve => .aarch64_sve_vector_pcs,
11748	.arm_apcs => .arm_apcscc,	11748	.arm_apcs => .arm_apcscc,
11749	.arm_aapcs => .arm_aapcscc,	11749	.arm_aapcs => .arm_aapcscc,
11750	.arm_aapcs_vfp => .arm_aapcs_vfpcc,	11750	.arm_aapcs_vfp => if (target.os.tag != .watchos)
		11751	.arm_aapcs_vfpcc
		11752	else
		11753	null,
		11754	.arm_aapcs16_vfp => if (target.os.tag == .watchos)
		11755	.arm_aapcs_vfpcc
		11756	else
		11757	null,
11751	.riscv64_lp64_v => .riscv_vectorcallcc,	11758	.riscv64_lp64_v => .riscv_vectorcallcc,
11752	.riscv32_ilp32_v => .riscv_vectorcallcc,	11759	.riscv32_ilp32_v => .riscv_vectorcallcc,
11753	.avr_builtin => .avr_builtincc,	11760	.avr_builtin => .avr_builtincc,
...	@@ -11777,7 +11784,6 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ	...	@@ -11777,7 +11784,6 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
11777	.aarch64_aapcs,	11784	.aarch64_aapcs,
11778	.aarch64_aapcs_darwin,	11785	.aarch64_aapcs_darwin,
11779	.aarch64_aapcs_win,	11786	.aarch64_aapcs_win,
11780	.arm_aapcs16_vfp,
11781	.mips64_n64,	11787	.mips64_n64,
11782	.mips64_n32,	11788	.mips64_n32,
11783	.mips_o32,	11789	.mips_o32,
...	@@ -11957,7 +11963,7 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe	...	@@ -11957,7 +11963,7 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe
11957	.aarch64_aapcs_darwin,	11963	.aarch64_aapcs_darwin,
11958	.aarch64_aapcs_win,	11964	.aarch64_aapcs_win,
11959	=> aarch64_c_abi.classifyType(return_type, zcu) == .memory,	11965	=> aarch64_c_abi.classifyType(return_type, zcu) == .memory,
11960	.arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {	11966	.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
11961	.memory, .i64_array => true,	11967	.memory, .i64_array => true,
11962	.i32_array => \|size\| size != 1,	11968	.i32_array => \|size\| size != 1,
11963	.byval => false,	11969	.byval => false,
...	@@ -12007,7 +12013,7 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu	...	@@ -12007,7 +12013,7 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu
12007	.integer => return o.builder.intType(@intCast(return_type.bitSize(zcu))),	12013	.integer => return o.builder.intType(@intCast(return_type.bitSize(zcu))),
12008	.double_integer => return o.builder.arrayType(2, .i64),	12014	.double_integer => return o.builder.arrayType(2, .i64),
12009	},	12015	},
12010	.arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {	12016	.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
12011	.memory, .i64_array => return .void,	12017	.memory, .i64_array => return .void,
12012	.i32_array => \|len\| return if (len == 1) .i32 else .void,	12018	.i32_array => \|len\| return if (len == 1) .i32 else .void,
12013	.byval => return o.lowerType(return_type),	12019	.byval => return o.lowerType(return_type),
...	@@ -12256,7 +12262,7 @@ const ParamTypeIterator = struct {	...	@@ -12256,7 +12262,7 @@ const ParamTypeIterator = struct {
12256	.double_integer => return Lowering{ .i64_array = 2 },	12262	.double_integer => return Lowering{ .i64_array = 2 },
12257	}	12263	}
12258	},	12264	},
12259	.arm_aapcs, .arm_aapcs_vfp => {	12265	.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => {
12260	it.zig_index += 1;	12266	it.zig_index += 1;
12261	it.llvm_index += 1;	12267	it.llvm_index += 1;
12262	switch (arm_c_abi.classifyType(ty, zcu, .arg)) {	12268	switch (arm_c_abi.classifyType(ty, zcu, .arg)) {

src/link/Dwarf.zig+3-2

 @@ -3433,8 +3433,9 @@ fn updateType(
                     .arm_apcs => .nocall,
                     .arm_aapcs => .LLVM_AAPCS,
-                    .arm_aapcs_vfp => .LLVM_AAPCS_VFP,
+                    .arm_aapcs_vfp,
-                    .arm_aapcs16_vfp => .nocall,
+                    .arm_aapcs16_vfp,
+                    => .LLVM_AAPCS_VFP,
                     .riscv64_lp64_v,
                     .riscv32_ilp32_v,