authorgravatar for kenta@lithdew.netKenta Iwasaki <kenta@lithdew.net> 2021-06-01 18:35:13+09:00
committergravatar for kenta@lithdew.netKenta Iwasaki <kenta@lithdew.net> 2021-06-01 18:35:13+09:00
log4909aa1da43d227ad85b2fe03a58ef1a8c12b769
treec39ff79de9b7dbee19dcec1f5f0d8ca589e8f99f
parentaad8491dbd98052e97b395ea572b186482d3b38f

os/bits: remove duplicate `sockaddr_storage` for dragonfly

5 files changed, 28 insertions(+), 37 deletions(-)

lib/std/atomic.zig+3-3
......@@ -19,7 +19,7 @@ test "std.atomic" {
1919 _ = @import("atomic/Atomic.zig");
2020}
2121
22pub fn fence(comptime ordering: Ordering) callconv(.Inline) void {
22pub inline fn fence(comptime ordering: Ordering) void {
2323 switch (ordering) {
2424 .Acquire, .Release, .AcqRel, .SeqCst => {
2525 @fence(ordering);
......@@ -30,7 +30,7 @@ pub fn fence(comptime ordering: Ordering) callconv(.Inline) void {
3030 }
3131}
3232
33pub fn compilerFence(comptime ordering: Ordering) callconv(.Inline) void {
33pub inline fn compilerFence(comptime ordering: Ordering) void {
3434 switch (ordering) {
3535 .Acquire, .Release, .AcqRel, .SeqCst => asm volatile ("" ::: "memory"),
3636 else => @compileLog(ordering, " only applies to a given memory location"),
......@@ -45,7 +45,7 @@ test "fence/compilerFence" {
4545}
4646
4747/// Signals to the processor that the caller is inside a busy-wait spin-loop.
48pub fn spinLoopHint() callconv(.Inline) void {
48pub inline fn spinLoopHint() void {
4949 const hint_instruction = switch (target.cpu.arch) {
5050 // No-op instruction that can hint to save (or share with a hardware-thread) pipelining/power resources
5151 // https://software.intel.com/content/www/us/en/develop/articles/benefitting-power-and-performance-sleep-loops.html
lib/std/atomic/Atomic.zig+22-22
......@@ -48,38 +48,38 @@ pub fn Atomic(comptime T: type) type {
4848 };
4949 }
5050
51 pub fn swap(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
51 pub inline fn swap(self: *Self, value: T, comptime ordering: Ordering) T {
5252 return self.rmw(.Xchg, value, ordering);
5353 }
5454
55 pub fn compareAndSwap(
55 pub inline fn compareAndSwap(
5656 self: *Self,
5757 compare: T,
5858 exchange: T,
5959 comptime success: Ordering,
6060 comptime failure: Ordering,
61 ) callconv(.Inline) ?T {
61 ) ?T {
6262 return self.cmpxchg(true, compare, exchange, success, failure);
6363 }
6464
65 pub fn tryCompareAndSwap(
65 pub inline fn tryCompareAndSwap(
6666 self: *Self,
6767 compare: T,
6868 exchange: T,
6969 comptime success: Ordering,
7070 comptime failure: Ordering,
71 ) callconv(.Inline) ?T {
71 ) ?T {
7272 return self.cmpxchg(false, compare, exchange, success, failure);
7373 }
7474
75 fn cmpxchg(
75 inline fn cmpxchg(
7676 self: *Self,
7777 comptime is_strong: bool,
7878 compare: T,
7979 exchange: T,
8080 comptime success: Ordering,
8181 comptime failure: Ordering,
82 ) callconv(.Inline) ?T {
82 ) ?T {
8383 if (success == .Unordered or failure == .Unordered) {
8484 @compileError(@tagName(Ordering.Unordered) ++ " is only allowed on atomic loads and stores");
8585 }
......@@ -103,12 +103,12 @@ pub fn Atomic(comptime T: type) type {
103103 };
104104 }
105105
106 fn rmw(
106 inline fn rmw(
107107 self: *Self,
108108 comptime op: std.builtin.AtomicRmwOp,
109109 value: T,
110110 comptime ordering: Ordering,
111 ) callconv(.Inline) T {
111 ) T {
112112 return @atomicRmw(T, &self.value, op, value, ordering);
113113 }
114114
......@@ -117,37 +117,37 @@ pub fn Atomic(comptime T: type) type {
117117 }
118118
119119 pub usingnamespace exportWhen(std.meta.trait.isNumber(T), struct {
120 pub fn fetchAdd(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
120 pub inline fn fetchAdd(self: *Self, value: T, comptime ordering: Ordering) T {
121121 return self.rmw(.Add, value, ordering);
122122 }
123123
124 pub fn fetchSub(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
124 pub inline fn fetchSub(self: *Self, value: T, comptime ordering: Ordering) T {
125125 return self.rmw(.Sub, value, ordering);
126126 }
127127
128 pub fn fetchMin(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
128 pub inline fn fetchMin(self: *Self, value: T, comptime ordering: Ordering) T {
129129 return self.rmw(.Min, value, ordering);
130130 }
131131
132 pub fn fetchMax(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
132 pub inline fn fetchMax(self: *Self, value: T, comptime ordering: Ordering) T {
133133 return self.rmw(.Max, value, ordering);
134134 }
135135 });
136136
137137 pub usingnamespace exportWhen(std.meta.trait.isIntegral(T), struct {
138 pub fn fetchAnd(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
138 pub inline fn fetchAnd(self: *Self, value: T, comptime ordering: Ordering) T {
139139 return self.rmw(.And, value, ordering);
140140 }
141141
142 pub fn fetchNand(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
142 pub inline fn fetchNand(self: *Self, value: T, comptime ordering: Ordering) T {
143143 return self.rmw(.Nand, value, ordering);
144144 }
145145
146 pub fn fetchOr(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
146 pub inline fn fetchOr(self: *Self, value: T, comptime ordering: Ordering) T {
147147 return self.rmw(.Or, value, ordering);
148148 }
149149
150 pub fn fetchXor(self: *Self, value: T, comptime ordering: Ordering) callconv(.Inline) T {
150 pub inline fn fetchXor(self: *Self, value: T, comptime ordering: Ordering) T {
151151 return self.rmw(.Xor, value, ordering);
152152 }
153153
......@@ -158,24 +158,24 @@ pub fn Atomic(comptime T: type) type {
158158 Toggle,
159159 };
160160
161 pub fn bitSet(self: *Self, bit: Bit, comptime ordering: Ordering) callconv(.Inline) u1 {
161 pub inline fn bitSet(self: *Self, bit: Bit, comptime ordering: Ordering) u1 {
162162 return bitRmw(self, .Set, bit, ordering);
163163 }
164164
165 pub fn bitReset(self: *Self, bit: Bit, comptime ordering: Ordering) callconv(.Inline) u1 {
165 pub inline fn bitReset(self: *Self, bit: Bit, comptime ordering: Ordering) u1 {
166166 return bitRmw(self, .Reset, bit, ordering);
167167 }
168168
169 pub fn bitToggle(self: *Self, bit: Bit, comptime ordering: Ordering) callconv(.Inline) u1 {
169 pub inline fn bitToggle(self: *Self, bit: Bit, comptime ordering: Ordering) u1 {
170170 return bitRmw(self, .Toggle, bit, ordering);
171171 }
172172
173 fn bitRmw(
173 inline fn bitRmw(
174174 self: *Self,
175175 comptime op: BitRmwOp,
176176 bit: Bit,
177177 comptime ordering: Ordering,
178 ) callconv(.Inline) u1 {
178 ) u1 {
179179 // x86 supports dedicated bitwise instructions
180180 if (comptime target.cpu.arch.isX86() and @sizeOf(T) >= 2 and @sizeOf(T) <= 8) {
181181 const instruction = switch (op) {
lib/std/mem.zig+2-2
......@@ -1171,7 +1171,7 @@ test "mem.indexOf" {
11711171test "mem.indexOf multibyte" {
11721172 {
11731173 // make haystack and needle long enough to trigger boyer-moore-horspool algorithm
1174 const haystack = [1]u16{0} ** 100 ++ [_]u16 { 0xbbaa, 0xccbb, 0xddcc, 0xeedd, 0xffee, 0x00ff };
1174 const haystack = [1]u16{0} ** 100 ++ [_]u16{ 0xbbaa, 0xccbb, 0xddcc, 0xeedd, 0xffee, 0x00ff };
11751175 const needle = [_]u16{ 0xbbaa, 0xccbb, 0xddcc, 0xeedd, 0xffee };
11761176 try testing.expectEqual(indexOfPos(u16, &haystack, 0, &needle), 100);
11771177
......@@ -1184,7 +1184,7 @@ test "mem.indexOf multibyte" {
11841184
11851185 {
11861186 // make haystack and needle long enough to trigger boyer-moore-horspool algorithm
1187 const haystack = [_]u16 { 0xbbaa, 0xccbb, 0xddcc, 0xeedd, 0xffee, 0x00ff } ++ [1]u16{0} ** 100;
1187 const haystack = [_]u16{ 0xbbaa, 0xccbb, 0xddcc, 0xeedd, 0xffee, 0x00ff } ++ [1]u16{0} ** 100;
11881188 const needle = [_]u16{ 0xbbaa, 0xccbb, 0xddcc, 0xeedd, 0xffee };
11891189 try testing.expectEqual(lastIndexOf(u16, &haystack, &needle), 0);
11901190
lib/std/os/bits/dragonfly.zig-8
......@@ -696,14 +696,6 @@ pub const in_port_t = u16;
696696pub const sa_family_t = u8;
697697pub const socklen_t = u32;
698698
699pub const sockaddr_storage = extern struct {
700 ss_len: u8,
701 ss_family: sa_family_t,
702 __ss_pad1: [5]u8,
703 __ss_align: i64,
704 __ss_pad2: [112]u8,
705};
706
707699pub const sockaddr_in = extern struct {
708700 len: u8 = @sizeOf(sockaddr_in),
709701 family: sa_family_t = AF_INET,
lib/std/target.zig+1-2
......@@ -500,8 +500,7 @@ pub const Target = struct {
500500 .haiku,
501501 .windows,
502502 => return .gnu,
503 .uefi,
504 => return .msvc,
503 .uefi => return .msvc,
505504 .linux,
506505 .wasi,
507506 .emscripten,