| ... | ... | @@ -619,6 +619,138 @@ pub const O = switch (native_arch) { |
| 619 | 619 | }; |
| 620 | 620 | |
| 621 | 621 | pub const HWCAP = switch (native_arch) { |
| 622 | .aarch64, .aarch64_be => struct { |
| 623 | pub const FP = 1 << 0; |
| 624 | pub const ASIMD = 1 << 1; |
| 625 | pub const EVTSTRM = 1 << 2; |
| 626 | pub const AES = 1 << 3; |
| 627 | pub const PMULL = 1 << 4; |
| 628 | pub const SHA1 = 1 << 5; |
| 629 | pub const SHA2 = 1 << 6; |
| 630 | pub const CRC32 = 1 << 7; |
| 631 | pub const ATOMICS = 1 << 8; |
| 632 | pub const FPHP = 1 << 9; |
| 633 | pub const ASIMDHP = 1 << 10; |
| 634 | pub const CPUID = 1 << 11; |
| 635 | pub const ASIMDRDM = 1 << 12; |
| 636 | pub const JSCVT = 1 << 13; |
| 637 | pub const FCMA = 1 << 14; |
| 638 | pub const LRCPC = 1 << 15; |
| 639 | pub const DCPOP = 1 << 16; |
| 640 | pub const SHA3 = 1 << 17; |
| 641 | pub const SM3 = 1 << 18; |
| 642 | pub const SM4 = 1 << 19; |
| 643 | pub const ASIMDDP = 1 << 20; |
| 644 | pub const SHA512 = 1 << 21; |
| 645 | pub const SVE = 1 << 22; |
| 646 | pub const ASIMDFHM = 1 << 23; |
| 647 | pub const DIT = 1 << 24; |
| 648 | pub const USCAT = 1 << 25; |
| 649 | pub const ILRCPC = 1 << 26; |
| 650 | pub const FLAGM = 1 << 27; |
| 651 | pub const SSBS = 1 << 28; |
| 652 | pub const SB = 1 << 29; |
| 653 | pub const PACA = 1 << 30; |
| 654 | pub const PACG = 1 << 31; |
| 655 | pub const GCS = 1 << 32; |
| 656 | pub const CMPBR = 1 << 33; |
| 657 | pub const FPRCVT = 1 << 34; |
| 658 | pub const F8MM8 = 1 << 35; |
| 659 | pub const F8MM4 = 1 << 36; |
| 660 | pub const SVE_F16MM = 1 << 37; |
| 661 | pub const SVE_ELTPERM = 1 << 38; |
| 662 | pub const SVE_AES2 = 1 << 39; |
| 663 | pub const SVE_BFSCALE = 1 << 40; |
| 664 | pub const SVE2P2 = 1 << 41; |
| 665 | pub const SME2P2 = 1 << 42; |
| 666 | pub const SME_SBITPERM = 1 << 43; |
| 667 | pub const SME_AES = 1 << 44; |
| 668 | pub const SME_SFEXPA = 1 << 45; |
| 669 | pub const SME_STMOP = 1 << 46; |
| 670 | pub const SME_SMOP4 = 1 << 47; |
| 671 | |
| 672 | pub const @"2" = struct { |
| 673 | pub const DCPODP = 1 << 0; |
| 674 | pub const SVE2 = 1 << 1; |
| 675 | pub const SVEAES = 1 << 2; |
| 676 | pub const SVEPMULL = 1 << 3; |
| 677 | pub const SVEBITPERM = 1 << 4; |
| 678 | pub const SVESHA3 = 1 << 5; |
| 679 | pub const SVESM4 = 1 << 6; |
| 680 | pub const FLAGM2 = 1 << 7; |
| 681 | pub const FRINT = 1 << 8; |
| 682 | pub const SVEI8MM = 1 << 9; |
| 683 | pub const SVEF32MM = 1 << 10; |
| 684 | pub const SVEF64MM = 1 << 11; |
| 685 | pub const SVEBF16 = 1 << 12; |
| 686 | pub const I8MM = 1 << 13; |
| 687 | pub const BF16 = 1 << 14; |
| 688 | pub const DGH = 1 << 15; |
| 689 | pub const RNG = 1 << 16; |
| 690 | pub const BTI = 1 << 17; |
| 691 | pub const MTE = 1 << 18; |
| 692 | pub const ECV = 1 << 19; |
| 693 | pub const AFP = 1 << 20; |
| 694 | pub const RPRES = 1 << 21; |
| 695 | pub const MTE3 = 1 << 22; |
| 696 | pub const SME = 1 << 23; |
| 697 | pub const SME_I16I64 = 1 << 24; |
| 698 | pub const SME_F64F64 = 1 << 25; |
| 699 | pub const SME_I8I32 = 1 << 26; |
| 700 | pub const SME_F16F32 = 1 << 27; |
| 701 | pub const SME_B16F32 = 1 << 28; |
| 702 | pub const SME_F32F32 = 1 << 29; |
| 703 | pub const SME_FA64 = 1 << 30; |
| 704 | pub const WFXT = 1 << 31; |
| 705 | pub const EBF16 = 1 << 32; |
| 706 | pub const SVE_EBF16 = 1 << 33; |
| 707 | pub const CSSC = 1 << 34; |
| 708 | pub const RPRFM = 1 << 35; |
| 709 | pub const SVE2P1 = 1 << 36; |
| 710 | pub const SME2 = 1 << 37; |
| 711 | pub const SME2P1 = 1 << 38; |
| 712 | pub const SME_I16I32 = 1 << 39; |
| 713 | pub const SME_BI32I32 = 1 << 40; |
| 714 | pub const SME_B16B16 = 1 << 41; |
| 715 | pub const SME_F16F16 = 1 << 42; |
| 716 | pub const MOPS = 1 << 43; |
| 717 | pub const HBC = 1 << 44; |
| 718 | pub const SVE_B16B16 = 1 << 45; |
| 719 | pub const LRCPC3 = 1 << 46; |
| 720 | pub const LSE128 = 1 << 47; |
| 721 | pub const FPMR = 1 << 48; |
| 722 | pub const LUT = 1 << 49; |
| 723 | pub const FAMINMAX = 1 << 50; |
| 724 | pub const F8CVT = 1 << 51; |
| 725 | pub const F8FMA = 1 << 52; |
| 726 | pub const F8DP4 = 1 << 53; |
| 727 | pub const F8DP2 = 1 << 54; |
| 728 | pub const F8E4M3 = 1 << 55; |
| 729 | pub const F8E5M2 = 1 << 56; |
| 730 | pub const SME_LUTV2 = 1 << 57; |
| 731 | pub const SME_F8F16 = 1 << 58; |
| 732 | pub const SME_F8F32 = 1 << 59; |
| 733 | pub const SME_SF8FMA = 1 << 60; |
| 734 | pub const SME_SF8DP4 = 1 << 61; |
| 735 | pub const SME_SF8DP2 = 1 << 62; |
| 736 | pub const POE = 1 << 63; |
| 737 | }; |
| 738 | |
| 739 | pub const @"3" = struct { |
| 740 | pub const MTE_FAR = 1 << 0; |
| 741 | pub const MTE_STORE_ONLY = 1 << 1; |
| 742 | pub const LSFE = 1 << 2; |
| 743 | pub const LS64 = 1 << 3; |
| 744 | pub const SVE_B16MM = 1 << 4; |
| 745 | pub const SVE2P3 = 1 << 5; |
| 746 | pub const SME_LUT6 = 1 << 6; |
| 747 | pub const SME2P3 = 1 << 7; |
| 748 | pub const F16MM = 1 << 8; |
| 749 | pub const F16F32DOT = 1 << 9; |
| 750 | pub const F16F32MM = 1 << 10; |
| 751 | pub const SVE_LUT6 = 1 << 11; |
| 752 | }; |
| 753 | }, |
| 622 | 754 | .arm, .armeb, .thumb, .thumbeb => struct { |
| 623 | 755 | pub const SWP = 1 << 0; |
| 624 | 756 | pub const HALF = 1 << 1; |