authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2016-09-04 18:30:40-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2016-09-04 18:30:40-07:00
log4e7effd3d38894f4d00bb0bb51ed34e237a4167e
treeaf54811f004d71be72448d9560278daf53ea3ab2
parentf18e34c2c6b7884a76d98d86b41857044dbe0f06

port to llvm 3.9

8 files changed, 211 insertions(+), 117 deletions(-)

README.md+2-2
...@@ -70,8 +70,8 @@ compromises backward compatibility....@@ -70,8 +70,8 @@ compromises backward compatibility.
70### Dependencies70### Dependencies
7171
72 * cmake >= 2.8.572 * cmake >= 2.8.5
73 * LLVM == 3.8.073 * LLVM == 3.9.x
74 * libclang == 3.8.074 * libclang == 3.9.x
7575
76### Debug / Development Build76### Debug / Development Build
7777
cmake/Findclang.cmake+2-2
...@@ -8,14 +8,14 @@...@@ -8,14 +8,14 @@
88
9find_path(CLANG_INCLUDE_DIRS NAMES clang/Frontend/ASTUnit.h9find_path(CLANG_INCLUDE_DIRS NAMES clang/Frontend/ASTUnit.h
10 PATHS10 PATHS
11 /usr/lib/llvm-3.8/include11 /usr/lib/llvm-3.9/include
12 /mingw64/include)12 /mingw64/include)
1313
14macro(FIND_AND_ADD_CLANG_LIB _libname_)14macro(FIND_AND_ADD_CLANG_LIB _libname_)
15 string(TOUPPER ${_libname_} _prettylibname_)15 string(TOUPPER ${_libname_} _prettylibname_)
16 find_library(CLANG_${_prettylibname_}_LIB NAMES ${_libname_}16 find_library(CLANG_${_prettylibname_}_LIB NAMES ${_libname_}
17 PATHS17 PATHS
18 /usr/lib/llvm-3.8/lib18 /usr/lib/llvm-3.9/lib
19 /mingw64/lib)19 /mingw64/lib)
20 if(CLANG_${_prettylibname_}_LIB)20 if(CLANG_${_prettylibname_}_LIB)
21 set(CLANG_LIBRARIES ${CLANG_LIBRARIES} ${CLANG_${_prettylibname_}_LIB})21 set(CLANG_LIBRARIES ${CLANG_LIBRARIES} ${CLANG_${_prettylibname_}_LIB})
cmake/Findllvm.cmake+1-1
...@@ -7,7 +7,7 @@...@@ -7,7 +7,7 @@
7# LLVM_LIBRARIES7# LLVM_LIBRARIES
8# LLVM_LIBDIRS8# LLVM_LIBDIRS
99
10find_program(LLVM_CONFIG_EXE NAMES llvm-config llvm-config-3.8)10find_program(LLVM_CONFIG_EXE NAMES llvm-config llvm-config-3.9)
1111
12execute_process(12execute_process(
13 COMMAND ${LLVM_CONFIG_EXE} --libs13 COMMAND ${LLVM_CONFIG_EXE} --libs
src/codegen.cpp+1-1
...@@ -4847,7 +4847,7 @@ static void init(CodeGen *g, Buf *source_path) {...@@ -4847,7 +4847,7 @@ static void init(CodeGen *g, Buf *source_path) {
4847 g->target_machine = LLVMCreateTargetMachine(target_ref, buf_ptr(&g->triple_str),4847 g->target_machine = LLVMCreateTargetMachine(target_ref, buf_ptr(&g->triple_str),
4848 target_specific_cpu_args, target_specific_features, opt_level, reloc_mode, LLVMCodeModelDefault);4848 target_specific_cpu_args, target_specific_features, opt_level, reloc_mode, LLVMCodeModelDefault);
48494849
4850 g->target_data_ref = LLVMGetTargetMachineData(g->target_machine);4850 g->target_data_ref = LLVMCreateTargetDataLayout(g->target_machine);
48514851
4852 char *layout_str = LLVMCopyStringRepOfTargetData(g->target_data_ref);4852 char *layout_str = LLVMCopyStringRepOfTargetData(g->target_data_ref);
4853 LLVMSetDataLayout(g->module, layout_str);4853 LLVMSetDataLayout(g->module, layout_str);
src/parseh.cpp+55-20
...@@ -408,25 +408,7 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const...@@ -408,25 +408,7 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const
408 case BuiltinType::ObjCId:408 case BuiltinType::ObjCId:
409 case BuiltinType::ObjCClass:409 case BuiltinType::ObjCClass:
410 case BuiltinType::ObjCSel:410 case BuiltinType::ObjCSel:
411 case BuiltinType::OCLImage1d:
412 case BuiltinType::OCLImage1dArray:
413 case BuiltinType::OCLImage1dBuffer:
414 case BuiltinType::OCLImage2d:
415 case BuiltinType::OCLImage2dArray:
416 case BuiltinType::OCLImage2dArrayDepth:
417 case BuiltinType::OCLImage2dDepth:
418 case BuiltinType::OCLImage2dMSAA:
419 case BuiltinType::OCLImage2dArrayMSAA:
420 case BuiltinType::OCLImage2dMSAADepth:
421 case BuiltinType::OCLImage2dArrayMSAADepth:
422 case BuiltinType::OCLClkEvent:
423 case BuiltinType::OCLQueue:
424 case BuiltinType::OCLNDRange:
425 case BuiltinType::OCLReserveID:
426 case BuiltinType::OMPArraySection:411 case BuiltinType::OMPArraySection:
427 case BuiltinType::OCLImage3d:
428 case BuiltinType::OCLSampler:
429 case BuiltinType::OCLEvent:
430 case BuiltinType::Dependent:412 case BuiltinType::Dependent:
431 case BuiltinType::Overload:413 case BuiltinType::Overload:
432 case BuiltinType::BoundMember:414 case BuiltinType::BoundMember:
...@@ -434,6 +416,50 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const...@@ -434,6 +416,50 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const
434 case BuiltinType::UnknownAny:416 case BuiltinType::UnknownAny:
435 case BuiltinType::BuiltinFn:417 case BuiltinType::BuiltinFn:
436 case BuiltinType::ARCUnbridgedCast:418 case BuiltinType::ARCUnbridgedCast:
419
420 case BuiltinType::OCLImage1dRO:
421 case BuiltinType::OCLImage1dArrayRO:
422 case BuiltinType::OCLImage1dBufferRO:
423 case BuiltinType::OCLImage2dRO:
424 case BuiltinType::OCLImage2dArrayRO:
425 case BuiltinType::OCLImage2dDepthRO:
426 case BuiltinType::OCLImage2dArrayDepthRO:
427 case BuiltinType::OCLImage2dMSAARO:
428 case BuiltinType::OCLImage2dArrayMSAARO:
429 case BuiltinType::OCLImage2dMSAADepthRO:
430 case BuiltinType::OCLImage2dArrayMSAADepthRO:
431 case BuiltinType::OCLImage3dRO:
432 case BuiltinType::OCLImage1dWO:
433 case BuiltinType::OCLImage1dArrayWO:
434 case BuiltinType::OCLImage1dBufferWO:
435 case BuiltinType::OCLImage2dWO:
436 case BuiltinType::OCLImage2dArrayWO:
437 case BuiltinType::OCLImage2dDepthWO:
438 case BuiltinType::OCLImage2dArrayDepthWO:
439 case BuiltinType::OCLImage2dMSAAWO:
440 case BuiltinType::OCLImage2dArrayMSAAWO:
441 case BuiltinType::OCLImage2dMSAADepthWO:
442 case BuiltinType::OCLImage2dArrayMSAADepthWO:
443 case BuiltinType::OCLImage3dWO:
444 case BuiltinType::OCLImage1dRW:
445 case BuiltinType::OCLImage1dArrayRW:
446 case BuiltinType::OCLImage1dBufferRW:
447 case BuiltinType::OCLImage2dRW:
448 case BuiltinType::OCLImage2dArrayRW:
449 case BuiltinType::OCLImage2dDepthRW:
450 case BuiltinType::OCLImage2dArrayDepthRW:
451 case BuiltinType::OCLImage2dMSAARW:
452 case BuiltinType::OCLImage2dArrayMSAARW:
453 case BuiltinType::OCLImage2dMSAADepthRW:
454 case BuiltinType::OCLImage2dArrayMSAADepthRW:
455 case BuiltinType::OCLImage3dRW:
456 case BuiltinType::Float128:
457 case BuiltinType::OCLSampler:
458 case BuiltinType::OCLEvent:
459 case BuiltinType::OCLClkEvent:
460 case BuiltinType::OCLQueue:
461 case BuiltinType::OCLNDRange:
462 case BuiltinType::OCLReserveID:
437 emit_warning(c, decl, "missed a builtin type");463 emit_warning(c, decl, "missed a builtin type");
438 return c->codegen->builtin_types.entry_invalid;464 return c->codegen->builtin_types.entry_invalid;
439 }465 }
...@@ -554,8 +580,17 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const...@@ -554,8 +580,17 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const
554 case CC_SpirFunction: // default for OpenCL functions on SPIR target580 case CC_SpirFunction: // default for OpenCL functions on SPIR target
555 emit_warning(c, decl, "function type has SPIR function calling convention");581 emit_warning(c, decl, "function type has SPIR function calling convention");
556 return c->codegen->builtin_types.entry_invalid;582 return c->codegen->builtin_types.entry_invalid;
557 case CC_SpirKernel: // inferred for OpenCL kernels on SPIR target583 case CC_OpenCLKernel:
558 emit_warning(c, decl, "function type has SPIR kernel calling convention");584 emit_warning(c, decl, "function type has OpenCLKernel calling convention");
585 return c->codegen->builtin_types.entry_invalid;
586 case CC_Swift:
587 emit_warning(c, decl, "function type has Swift calling convention");
588 return c->codegen->builtin_types.entry_invalid;
589 case CC_PreserveMost:
590 emit_warning(c, decl, "function type has PreserveMost calling convention");
591 return c->codegen->builtin_types.entry_invalid;
592 case CC_PreserveAll:
593 emit_warning(c, decl, "function type has PreserveAll calling convention");
559 return c->codegen->builtin_types.entry_invalid;594 return c->codegen->builtin_types.entry_invalid;
560 }595 }
561596
src/target.cpp+78-31
...@@ -15,6 +15,8 @@ static const ArchType arch_list[] = {...@@ -15,6 +15,8 @@ static const ArchType arch_list[] = {
15 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_2a},15 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_2a},
16 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_1a},16 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_1a},
17 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8},17 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8},
18 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8m_baseline},
19 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8m_mainline},
18 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v7},20 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v7},
19 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v7em},21 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v7em},
20 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v7m},22 {ZigLLVM_arm, ZigLLVM_ARMSubArch_v7m},
...@@ -71,8 +73,11 @@ static const ArchType arch_list[] = {...@@ -71,8 +73,11 @@ static const ArchType arch_list[] = {
71 {ZigLLVM_kalimba, ZigLLVM_KalimbaSubArch_v5},73 {ZigLLVM_kalimba, ZigLLVM_KalimbaSubArch_v5},
7274
73 {ZigLLVM_shave, ZigLLVM_NoSubArch},75 {ZigLLVM_shave, ZigLLVM_NoSubArch},
76 {ZigLLVM_lanai, ZigLLVM_NoSubArch},
74 {ZigLLVM_wasm32, ZigLLVM_NoSubArch},77 {ZigLLVM_wasm32, ZigLLVM_NoSubArch},
75 {ZigLLVM_wasm64, ZigLLVM_NoSubArch},78 {ZigLLVM_wasm64, ZigLLVM_NoSubArch},
79 {ZigLLVM_renderscript32, ZigLLVM_NoSubArch},
80 {ZigLLVM_renderscript64, ZigLLVM_NoSubArch},
76};81};
7782
78static const ZigLLVM_VendorType vendor_list[] = {83static const ZigLLVM_VendorType vendor_list[] = {
...@@ -88,6 +93,8 @@ static const ZigLLVM_VendorType vendor_list[] = {...@@ -88,6 +93,8 @@ static const ZigLLVM_VendorType vendor_list[] = {
88 ZigLLVM_NVIDIA,93 ZigLLVM_NVIDIA,
89 ZigLLVM_CSR,94 ZigLLVM_CSR,
90 ZigLLVM_Myriad,95 ZigLLVM_Myriad,
96 ZigLLVM_AMD,
97 ZigLLVM_Mesa,
91};98};
9299
93static const ZigLLVM_OSType os_list[] = {100static const ZigLLVM_OSType os_list[] = {
...@@ -119,10 +126,12 @@ static const ZigLLVM_OSType os_list[] = {...@@ -119,10 +126,12 @@ static const ZigLLVM_OSType os_list[] = {
119 ZigLLVM_ELFIAMCU,126 ZigLLVM_ELFIAMCU,
120 ZigLLVM_TvOS,127 ZigLLVM_TvOS,
121 ZigLLVM_WatchOS,128 ZigLLVM_WatchOS,
129 ZigLLVM_Mesa3D,
122};130};
123131
124static const ZigLLVM_EnvironmentType environ_list[] = {132static const ZigLLVM_EnvironmentType environ_list[] = {
125 ZigLLVM_GNU,133 ZigLLVM_GNU,
134 ZigLLVM_GNUABI64,
126 ZigLLVM_GNUEABI,135 ZigLLVM_GNUEABI,
127 ZigLLVM_GNUEABIHF,136 ZigLLVM_GNUEABIHF,
128 ZigLLVM_GNUX32,137 ZigLLVM_GNUX32,
...@@ -130,6 +139,9 @@ static const ZigLLVM_EnvironmentType environ_list[] = {...@@ -130,6 +139,9 @@ static const ZigLLVM_EnvironmentType environ_list[] = {
130 ZigLLVM_EABI,139 ZigLLVM_EABI,
131 ZigLLVM_EABIHF,140 ZigLLVM_EABIHF,
132 ZigLLVM_Android,141 ZigLLVM_Android,
142 ZigLLVM_Musl,
143 ZigLLVM_MuslEABI,
144 ZigLLVM_MuslEABIHF,
133 ZigLLVM_MSVC,145 ZigLLVM_MSVC,
134 ZigLLVM_Itanium,146 ZigLLVM_Itanium,
135 ZigLLVM_Cygnus,147 ZigLLVM_Cygnus,
...@@ -289,42 +301,73 @@ void resolve_target_object_format(ZigTarget *target) {...@@ -289,42 +301,73 @@ void resolve_target_object_format(ZigTarget *target) {
289 if (target->oformat != ZigLLVM_UnknownObjectFormat) {301 if (target->oformat != ZigLLVM_UnknownObjectFormat) {
290 return;302 return;
291 }303 }
304
292 switch (target->arch.arch) {305 switch (target->arch.arch) {
293 default:306 case ZigLLVM_UnknownArch:
294 break;307 case ZigLLVM_aarch64:
295 case ZigLLVM_hexagon:308 case ZigLLVM_arm:
296 case ZigLLVM_mips:309 case ZigLLVM_thumb:
297 case ZigLLVM_mipsel:310 case ZigLLVM_x86:
298 case ZigLLVM_mips64:311 case ZigLLVM_x86_64:
299 case ZigLLVM_mips64el:312 if (is_os_darwin(target)) {
300 case ZigLLVM_r600:313 target->oformat = ZigLLVM_MachO;
301 case ZigLLVM_amdgcn:314 } else if (target->os == ZigLLVM_Win32) {
302 case ZigLLVM_sparc:315 target->oformat = ZigLLVM_COFF;
303 case ZigLLVM_sparcv9:316 } else {
304 case ZigLLVM_systemz:317 target->oformat = ZigLLVM_ELF;
305 case ZigLLVM_xcore:318 }
306 case ZigLLVM_ppc64le:319 return;
307 target->oformat = ZigLLVM_ELF;
308 return;
309320
310 case ZigLLVM_ppc:321 case ZigLLVM_aarch64_be:
311 case ZigLLVM_ppc64:322 case ZigLLVM_amdgcn:
312 if (is_os_darwin(target)) {323 case ZigLLVM_amdil:
313 target->oformat = ZigLLVM_MachO;324 case ZigLLVM_amdil64:
325 case ZigLLVM_armeb:
326 case ZigLLVM_avr:
327 case ZigLLVM_bpfeb:
328 case ZigLLVM_bpfel:
329 case ZigLLVM_hexagon:
330 case ZigLLVM_lanai:
331 case ZigLLVM_hsail:
332 case ZigLLVM_hsail64:
333 case ZigLLVM_kalimba:
334 case ZigLLVM_le32:
335 case ZigLLVM_le64:
336 case ZigLLVM_mips:
337 case ZigLLVM_mips64:
338 case ZigLLVM_mips64el:
339 case ZigLLVM_mipsel:
340 case ZigLLVM_msp430:
341 case ZigLLVM_nvptx:
342 case ZigLLVM_nvptx64:
343 case ZigLLVM_ppc64le:
344 case ZigLLVM_r600:
345 case ZigLLVM_renderscript32:
346 case ZigLLVM_renderscript64:
347 case ZigLLVM_shave:
348 case ZigLLVM_sparc:
349 case ZigLLVM_sparcel:
350 case ZigLLVM_sparcv9:
351 case ZigLLVM_spir:
352 case ZigLLVM_spir64:
353 case ZigLLVM_systemz:
354 case ZigLLVM_tce:
355 case ZigLLVM_thumbeb:
356 case ZigLLVM_wasm32:
357 case ZigLLVM_wasm64:
358 case ZigLLVM_xcore:
359 target->oformat= ZigLLVM_ELF;
314 return;360 return;
315 }
316 target->oformat = ZigLLVM_ELF;
317 return;
318 }
319361
320 if (is_os_darwin(target)) {362 case ZigLLVM_ppc:
321 target->oformat = ZigLLVM_MachO;363 case ZigLLVM_ppc64:
322 return;364 if (is_os_darwin(target)) {
323 } else if (target->os == ZigLLVM_Win32) {365 target->oformat = ZigLLVM_MachO;
324 target->oformat = ZigLLVM_COFF;366 } else {
325 return;367 target->oformat= ZigLLVM_ELF;
368 }
369 return;
326 }370 }
327 target->oformat = ZigLLVM_ELF;
328}371}
329372
330// See lib/Support/Triple.cpp in LLVM for the source of this data.373// See lib/Support/Triple.cpp in LLVM for the source of this data.
...@@ -357,8 +400,10 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) {...@@ -357,8 +400,10 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) {
357 case ZigLLVM_hsail:400 case ZigLLVM_hsail:
358 case ZigLLVM_spir:401 case ZigLLVM_spir:
359 case ZigLLVM_kalimba:402 case ZigLLVM_kalimba:
403 case ZigLLVM_lanai:
360 case ZigLLVM_shave:404 case ZigLLVM_shave:
361 case ZigLLVM_wasm32:405 case ZigLLVM_wasm32:
406 case ZigLLVM_renderscript32:
362 return 32;407 return 32;
363408
364 case ZigLLVM_aarch64:409 case ZigLLVM_aarch64:
...@@ -379,6 +424,7 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) {...@@ -379,6 +424,7 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) {
379 case ZigLLVM_hsail64:424 case ZigLLVM_hsail64:
380 case ZigLLVM_spir64:425 case ZigLLVM_spir64:
381 case ZigLLVM_wasm64:426 case ZigLLVM_wasm64:
427 case ZigLLVM_renderscript64:
382 return 64;428 return 64;
383 }429 }
384 zig_unreachable();430 zig_unreachable();
...@@ -446,6 +492,7 @@ int get_c_type_size_in_bits(const ZigTarget *target, CIntType id) {...@@ -446,6 +492,7 @@ int get_c_type_size_in_bits(const ZigTarget *target, CIntType id) {
446 case ZigLLVM_ELFIAMCU:492 case ZigLLVM_ELFIAMCU:
447 case ZigLLVM_TvOS:493 case ZigLLVM_TvOS:
448 case ZigLLVM_WatchOS:494 case ZigLLVM_WatchOS:
495 case ZigLLVM_Mesa3D:
449 zig_panic("TODO c type size in bits for this target");496 zig_panic("TODO c type size in bits for this target");
450 }497 }
451 zig_unreachable();498 zig_unreachable();
src/zig_llvm.cpp+13-13
...@@ -52,10 +52,6 @@ void LLVMZigInitializeLowerIntrinsicsPass(LLVMPassRegistryRef R) {...@@ -52,10 +52,6 @@ void LLVMZigInitializeLowerIntrinsicsPass(LLVMPassRegistryRef R) {
52 initializeLowerIntrinsicsPass(*unwrap(R));52 initializeLowerIntrinsicsPass(*unwrap(R));
53}53}
5454
55void LLVMZigInitializeUnreachableBlockElimPass(LLVMPassRegistryRef R) {
56 initializeUnreachableBlockElimPass(*unwrap(R));
57}
58
59char *LLVMZigGetHostCPUName(void) {55char *LLVMZigGetHostCPUName(void) {
60 std::string str = sys::getHostCPUName();56 std::string str = sys::getHostCPUName();
61 return strdup(str.c_str());57 return strdup(str.c_str());
...@@ -452,11 +448,11 @@ LLVMZigDICompileUnit *LLVMZigCreateCompileUnit(LLVMZigDIBuilder *dibuilder,...@@ -452,11 +448,11 @@ LLVMZigDICompileUnit *LLVMZigCreateCompileUnit(LLVMZigDIBuilder *dibuilder,
452 uint64_t dwo_id, bool emit_debug_info)448 uint64_t dwo_id, bool emit_debug_info)
453{449{
454 DICompileUnit *result = reinterpret_cast<DIBuilder*>(dibuilder)->createCompileUnit(450 DICompileUnit *result = reinterpret_cast<DIBuilder*>(dibuilder)->createCompileUnit(
455 lang, file, dir, producer, is_optimized, flags, runtime_version, split_name,451 lang, file, dir, producer, is_optimized, flags, runtime_version, split_name);
456 DIBuilder::FullDebug, dwo_id, emit_debug_info);
457 return reinterpret_cast<LLVMZigDICompileUnit*>(result);452 return reinterpret_cast<LLVMZigDICompileUnit*>(result);
458}453}
459454
455
460LLVMZigDIFile *LLVMZigCreateFile(LLVMZigDIBuilder *dibuilder, const char *filename, const char *directory) {456LLVMZigDIFile *LLVMZigCreateFile(LLVMZigDIBuilder *dibuilder, const char *filename, const char *directory) {
461 DIFile *result = reinterpret_cast<DIBuilder*>(dibuilder)->createFile(filename, directory);457 DIFile *result = reinterpret_cast<DIBuilder*>(dibuilder)->createFile(filename, directory);
462 return reinterpret_cast<LLVMZigDIFile*>(result);458 return reinterpret_cast<LLVMZigDIFile*>(result);
...@@ -603,6 +599,10 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {...@@ -603,6 +599,10 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
603 return "v8_1a";599 return "v8_1a";
604 case ZigLLVM_ARMSubArch_v8:600 case ZigLLVM_ARMSubArch_v8:
605 return "v8";601 return "v8";
602 case ZigLLVM_ARMSubArch_v8m_baseline:
603 return "v8m_baseline";
604 case ZigLLVM_ARMSubArch_v8m_mainline:
605 return "v8m_mainline";
606 case ZigLLVM_ARMSubArch_v7:606 case ZigLLVM_ARMSubArch_v7:
607 return "v7";607 return "v7";
608 case ZigLLVM_ARMSubArch_v7em:608 case ZigLLVM_ARMSubArch_v7em:
...@@ -648,13 +648,13 @@ unsigned ZigLLVMGetPrefTypeAlignment(LLVMTargetDataRef TD, LLVMTypeRef Ty) {...@@ -648,13 +648,13 @@ unsigned ZigLLVMGetPrefTypeAlignment(LLVMTargetDataRef TD, LLVMTypeRef Ty) {
648648
649static AtomicOrdering mapFromLLVMOrdering(LLVMAtomicOrdering Ordering) {649static AtomicOrdering mapFromLLVMOrdering(LLVMAtomicOrdering Ordering) {
650 switch (Ordering) {650 switch (Ordering) {
651 case LLVMAtomicOrderingNotAtomic: return NotAtomic;651 case LLVMAtomicOrderingNotAtomic: return AtomicOrdering::NotAtomic;
652 case LLVMAtomicOrderingUnordered: return Unordered;652 case LLVMAtomicOrderingUnordered: return AtomicOrdering::Unordered;
653 case LLVMAtomicOrderingMonotonic: return Monotonic;653 case LLVMAtomicOrderingMonotonic: return AtomicOrdering::Monotonic;
654 case LLVMAtomicOrderingAcquire: return Acquire;654 case LLVMAtomicOrderingAcquire: return AtomicOrdering::Acquire;
655 case LLVMAtomicOrderingRelease: return Release;655 case LLVMAtomicOrderingRelease: return AtomicOrdering::Release;
656 case LLVMAtomicOrderingAcquireRelease: return AcquireRelease;656 case LLVMAtomicOrderingAcquireRelease: return AtomicOrdering::AcquireRelease;
657 case LLVMAtomicOrderingSequentiallyConsistent: return SequentiallyConsistent;657 case LLVMAtomicOrderingSequentiallyConsistent: return AtomicOrdering::SequentiallyConsistent;
658 }658 }
659 abort();659 abort();
660}660}
src/zig_llvm.hpp+59-47
...@@ -29,7 +29,6 @@ struct LLVMZigInsertionPoint;...@@ -29,7 +29,6 @@ struct LLVMZigInsertionPoint;
2929
30void LLVMZigInitializeLoopStrengthReducePass(LLVMPassRegistryRef R);30void LLVMZigInitializeLoopStrengthReducePass(LLVMPassRegistryRef R);
31void LLVMZigInitializeLowerIntrinsicsPass(LLVMPassRegistryRef R);31void LLVMZigInitializeLowerIntrinsicsPass(LLVMPassRegistryRef R);
32void LLVMZigInitializeUnreachableBlockElimPass(LLVMPassRegistryRef R);
3332
34char *LLVMZigGetHostCPUName(void);33char *LLVMZigGetHostCPUName(void);
35char *LLVMZigGetNativeFeatures(void);34char *LLVMZigGetNativeFeatures(void);
...@@ -170,50 +169,53 @@ unsigned ZigLLVMGetPrefTypeAlignment(LLVMTargetDataRef TD, LLVMTypeRef Ty);...@@ -170,50 +169,53 @@ unsigned ZigLLVMGetPrefTypeAlignment(LLVMTargetDataRef TD, LLVMTypeRef Ty);
170enum ZigLLVM_ArchType {169enum ZigLLVM_ArchType {
171 ZigLLVM_UnknownArch,170 ZigLLVM_UnknownArch,
172171
173 ZigLLVM_arm, // ARM (little endian): arm, armv.*, xscale172 ZigLLVM_arm, // ARM (little endian): arm, armv.*, xscale
174 ZigLLVM_armeb, // ARM (big endian): armeb173 ZigLLVM_armeb, // ARM (big endian): armeb
175 ZigLLVM_aarch64, // AArch64 (little endian): aarch64174 ZigLLVM_aarch64, // AArch64 (little endian): aarch64
176 ZigLLVM_aarch64_be, // AArch64 (big endian): aarch64_be175 ZigLLVM_aarch64_be, // AArch64 (big endian): aarch64_be
177 ZigLLVM_avr, // AVR: Atmel AVR microcontroller176 ZigLLVM_avr, // AVR: Atmel AVR microcontroller
178 ZigLLVM_bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)177 ZigLLVM_bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
179 ZigLLVM_bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)178 ZigLLVM_bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
180 ZigLLVM_hexagon, // Hexagon: hexagon179 ZigLLVM_hexagon, // Hexagon: hexagon
181 ZigLLVM_mips, // MIPS: mips, mipsallegrex180 ZigLLVM_mips, // MIPS: mips, mipsallegrex
182 ZigLLVM_mipsel, // MIPSEL: mipsel, mipsallegrexel181 ZigLLVM_mipsel, // MIPSEL: mipsel, mipsallegrexel
183 ZigLLVM_mips64, // MIPS64: mips64182 ZigLLVM_mips64, // MIPS64: mips64
184 ZigLLVM_mips64el, // MIPS64EL: mips64el183 ZigLLVM_mips64el, // MIPS64EL: mips64el
185 ZigLLVM_msp430, // MSP430: msp430184 ZigLLVM_msp430, // MSP430: msp430
186 ZigLLVM_ppc, // PPC: powerpc185 ZigLLVM_ppc, // PPC: powerpc
187 ZigLLVM_ppc64, // PPC64: powerpc64, ppu186 ZigLLVM_ppc64, // PPC64: powerpc64, ppu
188 ZigLLVM_ppc64le, // PPC64LE: powerpc64le187 ZigLLVM_ppc64le, // PPC64LE: powerpc64le
189 ZigLLVM_r600, // R600: AMD GPUs HD2XXX - HD6XXX188 ZigLLVM_r600, // R600: AMD GPUs HD2XXX - HD6XXX
190 ZigLLVM_amdgcn, // AMDGCN: AMD GCN GPUs189 ZigLLVM_amdgcn, // AMDGCN: AMD GCN GPUs
191 ZigLLVM_sparc, // Sparc: sparc190 ZigLLVM_sparc, // Sparc: sparc
192 ZigLLVM_sparcv9, // Sparcv9: Sparcv9191 ZigLLVM_sparcv9, // Sparcv9: Sparcv9
193 ZigLLVM_sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant192 ZigLLVM_sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
194 ZigLLVM_systemz, // SystemZ: s390x193 ZigLLVM_systemz, // SystemZ: s390x
195 ZigLLVM_tce, // TCE (http://tce.cs.tut.fi/): tce194 ZigLLVM_tce, // TCE (http://tce.cs.tut.fi/): tce
196 ZigLLVM_thumb, // Thumb (little endian): thumb, thumbv.*195 ZigLLVM_thumb, // Thumb (little endian): thumb, thumbv.*
197 ZigLLVM_thumbeb, // Thumb (big endian): thumbeb196 ZigLLVM_thumbeb, // Thumb (big endian): thumbeb
198 ZigLLVM_x86, // X86: i[3-9]86197 ZigLLVM_x86, // X86: i[3-9]86
199 ZigLLVM_x86_64, // X86-64: amd64, x86_64198 ZigLLVM_x86_64, // X86-64: amd64, x86_64
200 ZigLLVM_xcore, // XCore: xcore199 ZigLLVM_xcore, // XCore: xcore
201 ZigLLVM_nvptx, // NVPTX: 32-bit200 ZigLLVM_nvptx, // NVPTX: 32-bit
202 ZigLLVM_nvptx64, // NVPTX: 64-bit201 ZigLLVM_nvptx64, // NVPTX: 64-bit
203 ZigLLVM_le32, // le32: generic little-endian 32-bit CPU (PNaCl)202 ZigLLVM_le32, // le32: generic little-endian 32-bit CPU (PNaCl)
204 ZigLLVM_le64, // le64: generic little-endian 64-bit CPU (PNaCl)203 ZigLLVM_le64, // le64: generic little-endian 64-bit CPU (PNaCl)
205 ZigLLVM_amdil, // AMDIL204 ZigLLVM_amdil, // AMDIL
206 ZigLLVM_amdil64, // AMDIL with 64-bit pointers205 ZigLLVM_amdil64, // AMDIL with 64-bit pointers
207 ZigLLVM_hsail, // AMD HSAIL206 ZigLLVM_hsail, // AMD HSAIL
208 ZigLLVM_hsail64, // AMD HSAIL with 64-bit pointers207 ZigLLVM_hsail64, // AMD HSAIL with 64-bit pointers
209 ZigLLVM_spir, // SPIR: standard portable IR for OpenCL 32-bit version208 ZigLLVM_spir, // SPIR: standard portable IR for OpenCL 32-bit version
210 ZigLLVM_spir64, // SPIR: standard portable IR for OpenCL 64-bit version209 ZigLLVM_spir64, // SPIR: standard portable IR for OpenCL 64-bit version
211 ZigLLVM_kalimba, // Kalimba: generic kalimba210 ZigLLVM_kalimba, // Kalimba: generic kalimba
212 ZigLLVM_shave, // SHAVE: Movidius vector VLIW processors211 ZigLLVM_shave, // SHAVE: Movidius vector VLIW processors
213 ZigLLVM_wasm32, // WebAssembly with 32-bit pointers212 ZigLLVM_lanai, // Lanai: Lanai 32-bit
214 ZigLLVM_wasm64, // WebAssembly with 64-bit pointers213 ZigLLVM_wasm32, // WebAssembly with 32-bit pointers
215214 ZigLLVM_wasm64, // WebAssembly with 64-bit pointers
216 ZigLLVM_LastArchType = ZigLLVM_wasm64215 ZigLLVM_renderscript32, // 32-bit RenderScript
216 ZigLLVM_renderscript64, // 64-bit RenderScript
217
218 ZigLLVM_LastArchType = ZigLLVM_renderscript64
217};219};
218220
219enum ZigLLVM_SubArchType {221enum ZigLLVM_SubArchType {
...@@ -222,6 +224,8 @@ enum ZigLLVM_SubArchType {...@@ -222,6 +224,8 @@ enum ZigLLVM_SubArchType {
222 ZigLLVM_ARMSubArch_v8_2a,224 ZigLLVM_ARMSubArch_v8_2a,
223 ZigLLVM_ARMSubArch_v8_1a,225 ZigLLVM_ARMSubArch_v8_1a,
224 ZigLLVM_ARMSubArch_v8,226 ZigLLVM_ARMSubArch_v8,
227 ZigLLVM_ARMSubArch_v8m_baseline,
228 ZigLLVM_ARMSubArch_v8m_mainline,
225 ZigLLVM_ARMSubArch_v7,229 ZigLLVM_ARMSubArch_v7,
226 ZigLLVM_ARMSubArch_v7em,230 ZigLLVM_ARMSubArch_v7em,
227 ZigLLVM_ARMSubArch_v7m,231 ZigLLVM_ARMSubArch_v7m,
...@@ -254,8 +258,10 @@ enum ZigLLVM_VendorType {...@@ -254,8 +258,10 @@ enum ZigLLVM_VendorType {
254 ZigLLVM_NVIDIA,258 ZigLLVM_NVIDIA,
255 ZigLLVM_CSR,259 ZigLLVM_CSR,
256 ZigLLVM_Myriad,260 ZigLLVM_Myriad,
261 ZigLLVM_AMD,
262 ZigLLVM_Mesa,
257263
258 ZigLLVM_LastVendorType = ZigLLVM_Myriad264 ZigLLVM_LastVendorType = ZigLLVM_Mesa
259};265};
260enum ZigLLVM_OSType {266enum ZigLLVM_OSType {
261 ZigLLVM_UnknownOS,267 ZigLLVM_UnknownOS,
...@@ -287,13 +293,15 @@ enum ZigLLVM_OSType {...@@ -287,13 +293,15 @@ enum ZigLLVM_OSType {
287 ZigLLVM_ELFIAMCU,293 ZigLLVM_ELFIAMCU,
288 ZigLLVM_TvOS, // Apple tvOS294 ZigLLVM_TvOS, // Apple tvOS
289 ZigLLVM_WatchOS, // Apple watchOS295 ZigLLVM_WatchOS, // Apple watchOS
296 ZigLLVM_Mesa3D,
290297
291 ZigLLVM_LastOSType = ZigLLVM_WatchOS298 ZigLLVM_LastOSType = ZigLLVM_Mesa3D
292};299};
293enum ZigLLVM_EnvironmentType {300enum ZigLLVM_EnvironmentType {
294 ZigLLVM_UnknownEnvironment,301 ZigLLVM_UnknownEnvironment,
295302
296 ZigLLVM_GNU,303 ZigLLVM_GNU,
304 ZigLLVM_GNUABI64,
297 ZigLLVM_GNUEABI,305 ZigLLVM_GNUEABI,
298 ZigLLVM_GNUEABIHF,306 ZigLLVM_GNUEABIHF,
299 ZigLLVM_GNUX32,307 ZigLLVM_GNUX32,
...@@ -301,12 +309,16 @@ enum ZigLLVM_EnvironmentType {...@@ -301,12 +309,16 @@ enum ZigLLVM_EnvironmentType {
301 ZigLLVM_EABI,309 ZigLLVM_EABI,
302 ZigLLVM_EABIHF,310 ZigLLVM_EABIHF,
303 ZigLLVM_Android,311 ZigLLVM_Android,
312 ZigLLVM_Musl,
313 ZigLLVM_MuslEABI,
314 ZigLLVM_MuslEABIHF,
304315
305 ZigLLVM_MSVC,316 ZigLLVM_MSVC,
306 ZigLLVM_Itanium,317 ZigLLVM_Itanium,
307 ZigLLVM_Cygnus,318 ZigLLVM_Cygnus,
308 ZigLLVM_AMDOpenCL,319 ZigLLVM_AMDOpenCL,
309 ZigLLVM_CoreCLR,320 ZigLLVM_CoreCLR,
321
310 ZigLLVM_LastEnvironmentType = ZigLLVM_CoreCLR322 ZigLLVM_LastEnvironmentType = ZigLLVM_CoreCLR
311};323};
312enum ZigLLVM_ObjectFormatType {324enum ZigLLVM_ObjectFormatType {