| ... | @@ -2497,6 +2497,8 @@ test "polyPackT1 / polyUnpackT1 roundtrip" { | ... | @@ -2497,6 +2497,8 @@ test "polyPackT1 / polyUnpackT1 roundtrip" { |
| 2497 | } | 2497 | } |
| 2498 | | 2498 | |
| 2499 | test "polyPackT0 / polyUnpackT0 roundtrip" { | 2499 | test "polyPackT0 / polyUnpackT0 roundtrip" { |
| | 2500 | if (builtin.zig_backend == .stage2_llvm and builtin.target.cpu.arch.isPowerpc64()) return error.SkipZigTest; // https://github.com/llvm/llvm-project/issues/229620 |
| | 2501 | |
| 2500 | // Create a test polynomial with coefficients in (Q-2^12, Q+2^12] | 2502 | // Create a test polynomial with coefficients in (Q-2^12, Q+2^12] |
| 2501 | // This is the range (-2^12, 2^12] represented as unsigned around Q | 2503 | // This is the range (-2^12, 2^12] represented as unsigned around Q |
| 2502 | const bound = 1 << 12; // 2^(D-1) where D=13 | 2504 | const bound = 1 << 12; // 2^(D-1) where D=13 |
| ... | @@ -2846,6 +2848,8 @@ fn testKeyGenerationBasic(comptime MlDsa: type, seed: [32]u8) !void { | ... | @@ -2846,6 +2848,8 @@ fn testKeyGenerationBasic(comptime MlDsa: type, seed: [32]u8) !void { |
| 2846 | } | 2848 | } |
| 2847 | | 2849 | |
| 2848 | test "Key generation basic - all variants" { | 2850 | test "Key generation basic - all variants" { |
| | 2851 | if (builtin.zig_backend == .stage2_llvm and builtin.target.cpu.arch.isPowerpc64()) return error.SkipZigTest; // https://github.com/llvm/llvm-project/issues/229620 |
| | 2852 | |
| 2849 | inline for (.{ | 2853 | inline for (.{ |
| 2850 | .{ .variant = MLDSA44, .seed_byte = 0x44 }, | 2854 | .{ .variant = MLDSA44, .seed_byte = 0x44 }, |
| 2851 | .{ .variant = MLDSA65, .seed_byte = 0x65 }, | 2855 | .{ .variant = MLDSA65, .seed_byte = 0x65 }, |
| ... | @@ -2857,6 +2861,8 @@ test "Key generation basic - all variants" { | ... | @@ -2857,6 +2861,8 @@ test "Key generation basic - all variants" { |
| 2857 | } | 2861 | } |
| 2858 | | 2862 | |
| 2859 | test "Key generation determinism" { | 2863 | test "Key generation determinism" { |
| | 2864 | if (builtin.zig_backend == .stage2_llvm and builtin.target.cpu.arch.isPowerpc64()) return error.SkipZigTest; // https://github.com/llvm/llvm-project/issues/229620 |
| | 2865 | |
| 2860 | const seed = [_]u8{ 0x12, 0x34, 0x56, 0x78 } ++ @as([28]u8, @splat(0xAB)); | 2866 | const seed = [_]u8{ 0x12, 0x34, 0x56, 0x78 } ++ @as([28]u8, @splat(0xAB)); |
| 2861 | | 2867 | |
| 2862 | // Generate two key pairs from the same seed | 2868 | // Generate two key pairs from the same seed |
Alex Rønne Petersen <alex@alexrp.com> 2026-10-07 03:48:50+02:00