authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2022-10-20 09:21:06-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2022-10-20 09:21:06-07:00
log5b9c8d1d6fed333486d15a5ad7ba2699c6bdb01f
tree29834e6fe53532f53a6174e22e13be88d9aa2f69
parentb41b35f5789f39ef12d07997a74a7dc35224538c

add m68k target CPU features


3 files changed, 220 insertions(+), 0 deletions(-)

lib/std/target.zig+2
...@@ -456,6 +456,7 @@ pub const Target = struct {...@@ -456,6 +456,7 @@ pub const Target = struct {
456 pub const bpf = @import("target/bpf.zig");456 pub const bpf = @import("target/bpf.zig");
457 pub const csky = @import("target/csky.zig");457 pub const csky = @import("target/csky.zig");
458 pub const hexagon = @import("target/hexagon.zig");458 pub const hexagon = @import("target/hexagon.zig");
459 pub const m68k = @import("target/m68k.zig");
459 pub const mips = @import("target/mips.zig");460 pub const mips = @import("target/mips.zig");
460 pub const msp430 = @import("target/msp430.zig");461 pub const msp430 = @import("target/msp430.zig");
461 pub const nvptx = @import("target/nvptx.zig");462 pub const nvptx = @import("target/nvptx.zig");
...@@ -1353,6 +1354,7 @@ pub const Target = struct {...@@ -1353,6 +1354,7 @@ pub const Target = struct {
1353 .avr => &avr.cpu.avr2,1354 .avr => &avr.cpu.avr2,
1354 .bpfel, .bpfeb => &bpf.cpu.generic,1355 .bpfel, .bpfeb => &bpf.cpu.generic,
1355 .hexagon => &hexagon.cpu.generic,1356 .hexagon => &hexagon.cpu.generic,
1357 .m68k => &m68k.cpu.generic,
1356 .mips, .mipsel => &mips.cpu.mips32,1358 .mips, .mipsel => &mips.cpu.mips32,
1357 .mips64, .mips64el => &mips.cpu.mips64,1359 .mips64, .mips64el => &mips.cpu.mips64,
1358 .msp430 => &msp430.cpu.generic,1360 .msp430 => &msp430.cpu.generic,
lib/std/target/m68k.zig created+213
...@@ -0,0 +1,213 @@
1//! This file is auto-generated by tools/update_cpu_features.zig.
2
3const std = @import("../std.zig");
4const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;
6
7pub const Feature = enum {
8 isa_68000,
9 isa_68010,
10 isa_68020,
11 isa_68030,
12 isa_68040,
13 isa_68060,
14 reserve_a0,
15 reserve_a1,
16 reserve_a2,
17 reserve_a3,
18 reserve_a4,
19 reserve_a5,
20 reserve_a6,
21 reserve_d0,
22 reserve_d1,
23 reserve_d2,
24 reserve_d3,
25 reserve_d4,
26 reserve_d5,
27 reserve_d6,
28 reserve_d7,
29};
30
31pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
32pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
33pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
34pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
35
36pub const all_features = blk: {
37 const len = @typeInfo(Feature).Enum.fields.len;
38 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
39 var result: [len]CpuFeature = undefined;
40 result[@enumToInt(Feature.isa_68000)] = .{
41 .llvm_name = "isa-68000",
42 .description = "Is M68000 ISA supported",
43 .dependencies = featureSet(&[_]Feature{}),
44 };
45 result[@enumToInt(Feature.isa_68010)] = .{
46 .llvm_name = "isa-68010",
47 .description = "Is M68010 ISA supported",
48 .dependencies = featureSet(&[_]Feature{
49 .isa_68000,
50 }),
51 };
52 result[@enumToInt(Feature.isa_68020)] = .{
53 .llvm_name = "isa-68020",
54 .description = "Is M68020 ISA supported",
55 .dependencies = featureSet(&[_]Feature{
56 .isa_68010,
57 }),
58 };
59 result[@enumToInt(Feature.isa_68030)] = .{
60 .llvm_name = "isa-68030",
61 .description = "Is M68030 ISA supported",
62 .dependencies = featureSet(&[_]Feature{
63 .isa_68020,
64 }),
65 };
66 result[@enumToInt(Feature.isa_68040)] = .{
67 .llvm_name = "isa-68040",
68 .description = "Is M68040 ISA supported",
69 .dependencies = featureSet(&[_]Feature{
70 .isa_68030,
71 }),
72 };
73 result[@enumToInt(Feature.isa_68060)] = .{
74 .llvm_name = "isa-68060",
75 .description = "Is M68060 ISA supported",
76 .dependencies = featureSet(&[_]Feature{
77 .isa_68040,
78 }),
79 };
80 result[@enumToInt(Feature.reserve_a0)] = .{
81 .llvm_name = "reserve-a0",
82 .description = "Reserve A0 register",
83 .dependencies = featureSet(&[_]Feature{}),
84 };
85 result[@enumToInt(Feature.reserve_a1)] = .{
86 .llvm_name = "reserve-a1",
87 .description = "Reserve A1 register",
88 .dependencies = featureSet(&[_]Feature{}),
89 };
90 result[@enumToInt(Feature.reserve_a2)] = .{
91 .llvm_name = "reserve-a2",
92 .description = "Reserve A2 register",
93 .dependencies = featureSet(&[_]Feature{}),
94 };
95 result[@enumToInt(Feature.reserve_a3)] = .{
96 .llvm_name = "reserve-a3",
97 .description = "Reserve A3 register",
98 .dependencies = featureSet(&[_]Feature{}),
99 };
100 result[@enumToInt(Feature.reserve_a4)] = .{
101 .llvm_name = "reserve-a4",
102 .description = "Reserve A4 register",
103 .dependencies = featureSet(&[_]Feature{}),
104 };
105 result[@enumToInt(Feature.reserve_a5)] = .{
106 .llvm_name = "reserve-a5",
107 .description = "Reserve A5 register",
108 .dependencies = featureSet(&[_]Feature{}),
109 };
110 result[@enumToInt(Feature.reserve_a6)] = .{
111 .llvm_name = "reserve-a6",
112 .description = "Reserve A6 register",
113 .dependencies = featureSet(&[_]Feature{}),
114 };
115 result[@enumToInt(Feature.reserve_d0)] = .{
116 .llvm_name = "reserve-d0",
117 .description = "Reserve D0 register",
118 .dependencies = featureSet(&[_]Feature{}),
119 };
120 result[@enumToInt(Feature.reserve_d1)] = .{
121 .llvm_name = "reserve-d1",
122 .description = "Reserve D1 register",
123 .dependencies = featureSet(&[_]Feature{}),
124 };
125 result[@enumToInt(Feature.reserve_d2)] = .{
126 .llvm_name = "reserve-d2",
127 .description = "Reserve D2 register",
128 .dependencies = featureSet(&[_]Feature{}),
129 };
130 result[@enumToInt(Feature.reserve_d3)] = .{
131 .llvm_name = "reserve-d3",
132 .description = "Reserve D3 register",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.reserve_d4)] = .{
136 .llvm_name = "reserve-d4",
137 .description = "Reserve D4 register",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.reserve_d5)] = .{
141 .llvm_name = "reserve-d5",
142 .description = "Reserve D5 register",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.reserve_d6)] = .{
146 .llvm_name = "reserve-d6",
147 .description = "Reserve D6 register",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.reserve_d7)] = .{
151 .llvm_name = "reserve-d7",
152 .description = "Reserve D7 register",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 const ti = @typeInfo(Feature);
156 for (result) |*elem, i| {
157 elem.index = i;
158 elem.name = ti.Enum.fields[i].name;
159 }
160 break :blk result;
161};
162
163pub const cpu = struct {
164 pub const generic = CpuModel{
165 .name = "generic",
166 .llvm_name = "generic",
167 .features = featureSet(&[_]Feature{
168 .isa_68000,
169 }),
170 };
171 pub const M68000 = CpuModel{
172 .name = "M68000",
173 .llvm_name = "M68000",
174 .features = featureSet(&[_]Feature{
175 .isa_68000,
176 }),
177 };
178 pub const M68010 = CpuModel{
179 .name = "M68010",
180 .llvm_name = "M68010",
181 .features = featureSet(&[_]Feature{
182 .isa_68010,
183 }),
184 };
185 pub const M68020 = CpuModel{
186 .name = "M68020",
187 .llvm_name = "M68020",
188 .features = featureSet(&[_]Feature{
189 .isa_68020,
190 }),
191 };
192 pub const M68030 = CpuModel{
193 .name = "M68030",
194 .llvm_name = "M68030",
195 .features = featureSet(&[_]Feature{
196 .isa_68030,
197 }),
198 };
199 pub const M68040 = CpuModel{
200 .name = "M68040",
201 .llvm_name = "M68040",
202 .features = featureSet(&[_]Feature{
203 .isa_68040,
204 }),
205 };
206 pub const M68060 = CpuModel{
207 .name = "M68060",
208 .llvm_name = "M68060",
209 .features = featureSet(&[_]Feature{
210 .isa_68060,
211 }),
212 };
213};
tools/update_cpu_features.zig+5
...@@ -753,6 +753,11 @@ const llvm_targets = [_]LlvmTarget{...@@ -753,6 +753,11 @@ const llvm_targets = [_]LlvmTarget{
753 .llvm_name = "Lanai",753 .llvm_name = "Lanai",
754 .td_name = "Lanai.td",754 .td_name = "Lanai.td",
755 },755 },
756 .{
757 .zig_name = "m68k",
758 .llvm_name = "M68k",
759 .td_name = "M68k.td",
760 },
756 .{761 .{
757 .zig_name = "msp430",762 .zig_name = "msp430",
758 .llvm_name = "MSP430",763 .llvm_name = "MSP430",