authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-02-15 16:07:48+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-02-15 21:04:40+01:00
log5bba041bae8d76b70e72c848ec1a7116e70a5464
tree5d0311237037472505658b6adac4571924530314
parent9c82f3ae6f96e41757cdb5985aae7793bd3907e4

aarch64: introduce MCValue.got_load and MCValue.direct_load

This matches the current design in x86_64 backend and significantly simplifies handling of PIE targets in aarch64 backend.

3 files changed, 138 insertions(+), 87 deletions(-)

src/arch/aarch64/CodeGen.zig+52-19
......@@ -115,6 +115,14 @@ const MCValue = union(enum) {
115115 /// The value is in memory at a hard-coded address.
116116 /// If the type is a pointer, it means the pointer address is at this memory location.
117117 memory: u64,
118 /// The value is in memory referenced indirectly via a GOT entry index.
119 /// If the type is a pointer, it means the pointer is referenced indirectly via GOT.
120 /// When lowered, linker will emit relocations of type ARM64_RELOC_GOT_LOAD_PAGE21 and ARM64_RELOC_GOT_LOAD_PAGEOFF12.
121 got_load: u32,
122 /// The value is in memory referenced directly via symbol index.
123 /// If the type is a pointer, it means the pointer is referenced directly via symbol index.
124 /// When lowered, linker will emit a relocation of type ARM64_RELOC_PAGE21 and ARM64_RELOC_PAGEOFF12.
125 direct_load: u32,
118126 /// The value is one of the stack variables.
119127 /// If the type is a pointer, it means the pointer address is in the stack at this offset.
120128 stack_offset: u32,
......@@ -1802,6 +1810,8 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
18021810 },
18031811 .memory,
18041812 .stack_offset,
1813 .got_load,
1814 .direct_load,
18051815 => {
18061816 const reg = try self.register_manager.allocReg(null);
18071817 self.register_manager.freezeRegs(&.{reg});
......@@ -1946,6 +1956,11 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
19461956 const addr_reg = try self.copyToTmpRegister(ptr_ty, ptr);
19471957 try self.store(.{ .register = addr_reg }, value, ptr_ty, value_ty);
19481958 },
1959 .got_load,
1960 .direct_load,
1961 => {
1962 return self.fail("TODO implement storing to {}", .{ptr});
1963 },
19491964 }
19501965}
19511966
......@@ -2114,6 +2129,8 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
21142129 .memory => unreachable,
21152130 .compare_flags_signed => unreachable,
21162131 .compare_flags_unsigned => unreachable,
2132 .got_load => unreachable,
2133 .direct_load => unreachable,
21172134 .register => |reg| {
21182135 try self.register_manager.getReg(reg, null);
21192136 try self.genSetReg(arg_ty, reg, arg_mcv);
......@@ -2160,10 +2177,8 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
21602177 } else if (self.bin_file.cast(link.File.MachO)) |macho_file| {
21612178 if (func_value.castTag(.function)) |func_payload| {
21622179 const func = func_payload.data;
2163 // TODO I'm hacking my way through here by repurposing .memory for storing
2164 // index to the GOT target symbol index.
21652180 try self.genSetReg(Type.initTag(.u64), .x30, .{
2166 .memory = func.owner_decl.link.macho.local_sym_index,
2181 .got_load = func.owner_decl.link.macho.local_sym_index,
21672182 });
21682183 // blr x30
21692184 _ = try self.addInst(.{
......@@ -3015,6 +3030,12 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
30153030 else => return self.fail("TODO implement storing other types abi_size={}", .{abi_size}),
30163031 }
30173032 },
3033 .got_load,
3034 .direct_load,
3035 => |sym_index| {
3036 _ = sym_index;
3037 return self.fail("TODO implement set stack variable from {}", .{mcv});
3038 },
30183039 .memory => |vaddr| {
30193040 _ = vaddr;
30203041 return self.fail("TODO implement set stack variable from memory vaddr", .{});
......@@ -3151,22 +3172,34 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
31513172 .data = .{ .rr = .{ .rd = reg, .rn = src_reg } },
31523173 });
31533174 },
3154 .memory => |addr| {
3155 const owner_decl = self.mod_fn.owner_decl;
3156 // TODO when refactoring LinkBlock, make this into a generic function.
3157 const atom_index = switch (self.bin_file.tag) {
3158 .macho => owner_decl.link.macho.local_sym_index,
3159 .elf => owner_decl.link.elf.local_sym_index,
3160 .plan9 => @intCast(u32, owner_decl.link.plan9.sym_index orelse 0),
3161 else => return self.fail("TODO handle aarch64 load memory in {}", .{self.bin_file.tag}),
3175 .got_load,
3176 .direct_load,
3177 => |sym_index| {
3178 const tag: Mir.Inst.Tag = switch (mcv) {
3179 .got_load => .load_memory_got,
3180 .direct_load => .load_memory_direct,
3181 else => unreachable,
31623182 };
3183 _ = try self.addInst(.{
3184 .tag = tag,
3185 .data = .{
3186 .payload = try self.addExtra(Mir.LoadMemoryPie{
3187 .register = @enumToInt(reg),
3188 .atom_index = self.mod_fn.owner_decl.link.macho.local_sym_index,
3189 .sym_index = sym_index,
3190 }),
3191 },
3192 });
3193 },
3194 .memory => |addr| {
31633195 _ = try self.addInst(.{
31643196 .tag = .load_memory,
3165 .data = .{ .payload = try self.addExtra(Mir.LoadMemory{
3166 .atom_index = atom_index,
3167 .register = @enumToInt(reg),
3168 .addr = @intCast(u32, addr),
3169 }) },
3197 .data = .{
3198 .load_memory = .{
3199 .register = @enumToInt(reg),
3200 .addr = @intCast(u32, addr),
3201 },
3202 },
31703203 });
31713204 },
31723205 .stack_offset => |unadjusted_off| {
......@@ -3385,9 +3418,9 @@ fn lowerDeclRef(self: *Self, tv: TypedValue, decl: *Module.Decl) InnerError!MCVa
33853418 const got_addr = got.p_vaddr + decl.link.elf.offset_table_index * ptr_bytes;
33863419 return MCValue{ .memory = got_addr };
33873420 } else if (self.bin_file.cast(link.File.MachO)) |_| {
3388 // TODO I'm hacking my way through here by repurposing .memory for storing
3389 // index to the GOT target symbol index.
3390 return MCValue{ .memory = decl.link.macho.local_sym_index };
3421 // Because MachO is PIE-always-on, we defer memory address resolution until
3422 // the linker has enough info to perform relocations.
3423 return MCValue{ .got_load = decl.link.macho.local_sym_index };
33913424 } else if (self.bin_file.cast(link.File.Coff)) |coff_file| {
33923425 const got_addr = coff_file.offset_table_virtual_address + decl.link.coff.offset_table_index * ptr_bytes;
33933426 return MCValue{ .memory = got_addr };
src/arch/aarch64/Emit.zig+72-62
......@@ -109,6 +109,8 @@ pub fn emitMir(
109109 .eor_shifted_register => try emit.mirLogicalShiftedRegister(inst),
110110
111111 .load_memory => try emit.mirLoadMemory(inst),
112 .load_memory_got => try emit.mirLoadMemoryPie(inst),
113 .load_memory_direct => try emit.mirLoadMemoryPie(inst),
112114
113115 .ldp => try emit.mirLoadStoreRegisterPair(inst),
114116 .stp => try emit.mirLoadStoreRegisterPair(inst),
......@@ -205,21 +207,18 @@ fn instructionSize(emit: *Emit, inst: Mir.Inst.Index) usize {
205207 }
206208
207209 switch (tag) {
210 .load_memory_got,
211 .load_memory_direct,
212 => return 2 * 4,
208213 .load_memory => {
209 if (emit.bin_file.options.pie) {
210 // adrp, ldr
211 return 2 * 4;
212 } else {
213 const payload = emit.mir.instructions.items(.data)[inst].payload;
214 const load_memory = emit.mir.extraData(Mir.LoadMemory, payload).data;
215 const addr = load_memory.addr;
216
217 // movz, [movk, ...], ldr
218 if (addr <= math.maxInt(u16)) return 2 * 4;
219 if (addr <= math.maxInt(u32)) return 3 * 4;
220 if (addr <= math.maxInt(u48)) return 4 * 4;
221 return 5 * 4;
222 }
214 const load_memory = emit.mir.instructions.items(.data)[inst].load_memory;
215 const addr = load_memory.addr;
216
217 // movz, [movk, ...], ldr
218 if (addr <= math.maxInt(u16)) return 2 * 4;
219 if (addr <= math.maxInt(u32)) return 3 * 4;
220 if (addr <= math.maxInt(u48)) return 4 * 4;
221 return 5 * 4;
223222 },
224223 .pop_regs, .push_regs => {
225224 const reg_list = emit.mir.instructions.items(.data)[inst].reg_list;
......@@ -658,58 +657,69 @@ fn mirLogicalShiftedRegister(emit: *Emit, inst: Mir.Inst.Index) !void {
658657
659658fn mirLoadMemory(emit: *Emit, inst: Mir.Inst.Index) !void {
660659 assert(emit.mir.instructions.items(.tag)[inst] == .load_memory);
661 const payload = emit.mir.instructions.items(.data)[inst].payload;
662 const load_memory = emit.mir.extraData(Mir.LoadMemory, payload).data;
660 const load_memory = emit.mir.instructions.items(.data)[inst].load_memory;
663661 const reg = @intToEnum(Register, load_memory.register);
664662 const addr = load_memory.addr;
663 // The value is in memory at a hard-coded address.
664 // If the type is a pointer, it means the pointer address is at this memory location.
665 try emit.moveImmediate(reg, addr);
666 try emit.writeInstruction(Instruction.ldr(
667 reg,
668 reg,
669 Instruction.LoadStoreOffset.none,
670 ));
671}
665672
666 if (emit.bin_file.options.pie) {
667 // PC-relative displacement to the entry in the GOT table.
668 // adrp
669 const offset = @intCast(u32, emit.code.items.len);
670 try emit.writeInstruction(Instruction.adrp(reg, 0));
671
672 // ldr reg, reg, offset
673 try emit.writeInstruction(Instruction.ldr(
674 reg,
675 reg,
676 Instruction.LoadStoreOffset.imm(0),
677 ));
678
679 if (emit.bin_file.cast(link.File.MachO)) |macho_file| {
680 const atom = macho_file.atom_by_index_table.get(load_memory.atom_index).?;
681 // Page reloc for adrp instruction.
682 try atom.relocs.append(emit.bin_file.allocator, .{
683 .offset = offset,
684 .target = .{ .local = addr },
685 .addend = 0,
686 .subtractor = null,
687 .pcrel = true,
688 .length = 2,
689 .@"type" = @enumToInt(std.macho.reloc_type_arm64.ARM64_RELOC_GOT_LOAD_PAGE21),
690 });
691 // Pageoff reloc for adrp instruction.
692 try atom.relocs.append(emit.bin_file.allocator, .{
693 .offset = offset + 4,
694 .target = .{ .local = addr },
695 .addend = 0,
696 .subtractor = null,
697 .pcrel = false,
698 .length = 2,
699 .@"type" = @enumToInt(std.macho.reloc_type_arm64.ARM64_RELOC_GOT_LOAD_PAGEOFF12),
700 });
701 } else {
702 return emit.fail("TODO implement load_memory for PIE GOT indirection on this platform", .{});
703 }
673fn mirLoadMemoryPie(emit: *Emit, inst: Mir.Inst.Index) !void {
674 const tag = emit.mir.instructions.items(.tag)[inst];
675 const payload = emit.mir.instructions.items(.data)[inst].payload;
676 const data = emit.mir.extraData(Mir.LoadMemoryPie, payload).data;
677 const reg = @intToEnum(Register, data.register);
678
679 // PC-relative displacement to the entry in the GOT table.
680 // adrp
681 const offset = @intCast(u32, emit.code.items.len);
682 try emit.writeInstruction(Instruction.adrp(reg, 0));
683
684 // ldr reg, reg, offset
685 try emit.writeInstruction(Instruction.ldr(
686 reg,
687 reg,
688 Instruction.LoadStoreOffset.imm(0),
689 ));
690
691 if (emit.bin_file.cast(link.File.MachO)) |macho_file| {
692 const atom = macho_file.atom_by_index_table.get(data.atom_index).?;
693 // Page reloc for adrp instruction.
694 try atom.relocs.append(emit.bin_file.allocator, .{
695 .offset = offset,
696 .target = .{ .local = data.sym_index },
697 .addend = 0,
698 .subtractor = null,
699 .pcrel = true,
700 .length = 2,
701 .@"type" = switch (tag) {
702 .load_memory_got => @enumToInt(std.macho.reloc_type_arm64.ARM64_RELOC_GOT_LOAD_PAGE21),
703 .load_memory_direct => @enumToInt(std.macho.reloc_type_arm64.ARM64_RELOC_PAGE21),
704 else => unreachable,
705 },
706 });
707 // Pageoff reloc for adrp instruction.
708 try atom.relocs.append(emit.bin_file.allocator, .{
709 .offset = offset + 4,
710 .target = .{ .local = data.sym_index },
711 .addend = 0,
712 .subtractor = null,
713 .pcrel = false,
714 .length = 2,
715 .@"type" = switch (tag) {
716 .load_memory_got => @enumToInt(std.macho.reloc_type_arm64.ARM64_RELOC_GOT_LOAD_PAGEOFF12),
717 .load_memory_direct => @enumToInt(std.macho.reloc_type_arm64.ARM64_RELOC_PAGEOFF12),
718 else => unreachable,
719 },
720 });
704721 } else {
705 // The value is in memory at a hard-coded address.
706 // If the type is a pointer, it means the pointer address is at this memory location.
707 try emit.moveImmediate(reg, addr);
708 try emit.writeInstruction(Instruction.ldr(
709 reg,
710 reg,
711 Instruction.LoadStoreOffset.none,
712 ));
722 return emit.fail("TODO implement load_memory for PIE GOT indirection on this platform", .{});
713723 }
714724}
715725
src/arch/aarch64/Mir.zig+14-6
......@@ -58,8 +58,12 @@ pub const Inst = struct {
5858 eor_shifted_register,
5959 /// Pseudo-instruction: Load memory
6060 ///
61 /// Payload is `LoadMemory`
61 /// Payload is `load_memory`
6262 load_memory,
63 /// Payload is `LoadMemoryPie`
64 load_memory_got,
65 /// Payload is `LoadMemoryPie`
66 load_memory_direct,
6367 /// Load Pair of Registers
6468 ldp,
6569 /// Pseudo-instruction: Load from stack
......@@ -157,8 +161,6 @@ pub const Inst = struct {
157161 /// Used by e.g. svc
158162 imm16: u16,
159163 /// Index into `extra`. Meaning of what can be found there is context-dependent.
160 ///
161 /// Used by e.g. load_memory
162164 payload: u32,
163165 /// A register
164166 ///
......@@ -298,6 +300,10 @@ pub const Inst = struct {
298300 line: u32,
299301 column: u32,
300302 },
303 load_memory: struct {
304 register: u32,
305 addr: u32,
306 },
301307 };
302308
303309 // Make sure we don't accidentally make instructions bigger than expected.
......@@ -335,8 +341,10 @@ pub fn extraData(mir: Mir, comptime T: type, index: usize) struct { data: T, end
335341 };
336342}
337343
338pub const LoadMemory = struct {
339 atom_index: u32,
344pub const LoadMemoryPie = struct {
340345 register: u32,
341 addr: u32,
346 /// Index of the containing atom.
347 atom_index: u32,
348 /// Index into the linker's symbol table.
349 sym_index: u32,
342350};