authorgravatar for sergpolkin@gmail.comserg <sergpolkin@gmail.com> 2023-04-16 10:59:11+03:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2023-04-18 18:37:15-07:00
log5bc35fa75bf62bc9a76305fc6bfc3530efba6aec
tree1c9c42b5e58c653773d3b8160d4dda8625f08d24
parent2b7334c3a9c873a637f8d601ad9077d783058863

std.target.riscv: fix baseline_rv32 missing feature "32bit"

2 files changed, 2 insertions(+), 1 deletions(-)

lib/std/target/riscv.zig+1
......@@ -748,6 +748,7 @@ pub const cpu = struct {
748748 .name = "baseline_rv32",
749749 .llvm_name = null,
750750 .features = featureSet(&[_]Feature{
751 .@"32bit",
751752 .a,
752753 .c,
753754 .d,
tools/update_cpu_features.zig+1-1
......@@ -866,7 +866,7 @@ const llvm_targets = [_]LlvmTarget{
866866 .{
867867 .llvm_name = null,
868868 .zig_name = "baseline_rv32",
869 .features = &.{ "a", "c", "d", "f", "m" },
869 .features = &.{ "32bit", "a", "c", "d", "f", "m" },
870870 },
871871 .{
872872 .llvm_name = null,