Commit 6217b02f2540e32acedee8d0f2f3830ea8ae0d28 | zig

lib/libc/musl/src/thread/powerpc/clone.s+5-4

...	...	@@ -16,8 +16,9 @@ __clone:
16	16
17	17	# store non-volatile regs r30, r31 on stack in order to put our
18	18	# start func and its arg there
19		stwu 30, -16(1)
20		stw 31, 4(1)
	19	stwu 1, -16(1)
	20	stw 30, 8(1)
	21	stw 31, 12(1)
21	22
22	23	# save r3 (func) into r30, and r6(arg) into r31
23	24	mr 30, 3
...	...	@@ -51,8 +52,8 @@ cmpwi cr7, 3, 0
51	52	# if not 0, restore stack and return
52	53	beq cr7, 2f
53	54
54		lwz 30, 0(1)
55		lwz 31, 4(1)
	55	lwz 30, 8(1)
	56	lwz 31, 12(1)
56	57	addi 1, 1, 16
57	58
58	59	blr

lib/std/Thread.zig+51-57

...	...	@@ -1166,29 +1166,29 @@ const LinuxThreadImpl = struct {
1166	1166	posix.sigprocmask(std.posix.SIG.BLOCK, &std.os.linux.sigfillset(), null);
1167	1167	switch (target.cpu.arch) {
1168	1168	.x86 => asm volatile (
1169		\\ movl $91, %%eax # SYS_munmap
1170		\\ int $128
1171		\\ movl $1, %%eax # SYS_exit
1172		\\ movl $0, %%ebx
1173		\\ int $128
	1169	\\ movl $91, %%eax # SYS_munmap
	1170	\\ int $128
	1171	\\ movl $1, %%eax # SYS_exit
	1172	\\ movl $0, %%ebx
	1173	\\ int $128
1174	1174	:
1175	1175	: [ptr] "{ebx}" (@intFromPtr(self.mapped.ptr)),
1176	1176	[len] "{ecx}" (self.mapped.len),
1177	1177	),
1178	1178	.x86_64 => asm volatile (switch (target.abi) {
1179	1179	.gnux32, .muslx32, .x32 =>
1180		\\ movl $0x4000000b, %%eax # SYS_munmap
1181		\\ syscall
1182		\\ movl $0x4000003c, %%eax # SYS_exit
1183		\\ xor %%rdi, %%rdi
1184		\\ syscall
	1180	\\ movl $0x4000000b, %%eax # SYS_munmap
	1181	\\ syscall
	1182	\\ movl $0x4000003c, %%eax # SYS_exit
	1183	\\ xor %%rdi, %%rdi
	1184	\\ syscall
1185	1185	,
1186	1186	else =>
1187		\\ movl $11, %%eax # SYS_munmap
1188		\\ syscall
1189		\\ movl $60, %%eax # SYS_exit
1190		\\ xor %%rdi, %%rdi
1191		\\ syscall
	1187	\\ movl $11, %%eax # SYS_munmap
	1188	\\ syscall
	1189	\\ movl $60, %%eax # SYS_exit
	1190	\\ xor %%rdi, %%rdi
	1191	\\ syscall
1192	1192	,
1193	1193	}
1194	1194	:
...	...	@@ -1196,21 +1196,21 @@ const LinuxThreadImpl = struct {
1196	1196	[len] "{rsi}" (self.mapped.len),
1197	1197	),
1198	1198	.arm, .armeb, .thumb, .thumbeb => asm volatile (
1199		\\ mov r7, #91 // SYS_munmap
1200		\\ svc 0
1201		\\ mov r7, #1 // SYS_exit
1202		\\ mov r0, #0
1203		\\ svc 0
	1199	\\ mov r7, #91 // SYS_munmap
	1200	\\ svc 0
	1201	\\ mov r7, #1 // SYS_exit
	1202	\\ mov r0, #0
	1203	\\ svc 0
1204	1204	:
1205	1205	: [ptr] "{r0}" (@intFromPtr(self.mapped.ptr)),
1206	1206	[len] "{r1}" (self.mapped.len),
1207	1207	),
1208	1208	.aarch64, .aarch64_be => asm volatile (
1209		\\ mov x8, #215 // SYS_munmap
1210		\\ svc 0
1211		\\ mov x8, #93 // SYS_exit
1212		\\ mov x0, #0
1213		\\ svc 0
	1209	\\ mov x8, #215 // SYS_munmap
	1210	\\ svc 0
	1211	\\ mov x8, #93 // SYS_exit
	1212	\\ mov x0, #0
	1213	\\ svc 0
1214	1214	:
1215	1215	: [ptr] "{x0}" (@intFromPtr(self.mapped.ptr)),
1216	1216	[len] "{x1}" (self.mapped.len),
...	...	@@ -1236,21 +1236,21 @@ const LinuxThreadImpl = struct {
1236	1236	[len] "{r1}" (self.mapped.len),
1237	1237	),
1238	1238	.hexagon => asm volatile (
1239		\\ r6 = #215 // SYS_munmap
1240		\\ trap0(#1)
1241		\\ r6 = #93 // SYS_exit
1242		\\ r0 = #0
1243		\\ trap0(#1)
	1239	\\ r6 = #215 // SYS_munmap
	1240	\\ trap0(#1)
	1241	\\ r6 = #93 // SYS_exit
	1242	\\ r0 = #0
	1243	\\ trap0(#1)
1244	1244	:
1245	1245	: [ptr] "{r0}" (@intFromPtr(self.mapped.ptr)),
1246	1246	[len] "{r1}" (self.mapped.len),
1247	1247	),
1248	1248	.hppa => asm volatile (
1249		\\ ldi 91, %%r20 /* SYS_munmap */
1250	1249	\\ ble 0x100(%%sr2, %%r0)
1251		\\ ldi 1, %%r20 /* SYS_exit */
	1250	\\ ldi 91, %%r20 /* SYS_munmap */
1252	1251	\\ ldi 0, %%r26
1253	1252	\\ ble 0x100(%%sr2, %%r0)
	1253	\\ ldi 1, %%r20 /* SYS_exit */
1254	1254	:
1255	1255	: [ptr] "{r26}" (@intFromPtr(self.mapped.ptr)),
1256	1256	[len] "{r25}" (self.mapped.len),
...	...	@@ -1275,12 +1275,7 @@ const LinuxThreadImpl = struct {
1275	1275	: [ptr] "{r5}" (@intFromPtr(self.mapped.ptr)),
1276	1276	[len] "{r6}" (self.mapped.len),
1277	1277	),
1278		// We set `sp` to the address of the current function as a workaround for a Linux
1279		// kernel bug that caused syscalls to return EFAULT if the stack pointer is invalid.
1280		// The bug was introduced in 46e12c07b3b9603c60fc1d421ff18618241cb081 and fixed in
1281		// 7928eb0370d1133d0d8cd2f5ddfca19c309079d5.
1282	1278	.mips, .mipsel => asm volatile (
1283		\\ move $sp, $t9
1284	1279	\\ li $v0, 4091 # SYS_munmap
1285	1280	\\ syscall
1286	1281	\\ li $v0, 4001 # SYS_exit
...	...	@@ -1314,37 +1309,36 @@ const LinuxThreadImpl = struct {
1314	1309	\\ l.ori r11, r0, 215 # SYS_munmap
1315	1310	\\ l.sys 1
1316	1311	\\ l.ori r11, r0, 93 # SYS_exit
1317		\\ l.ori r3, r0, r0
	1312	\\ l.ori r3, r0, 0
1318	1313	\\ l.sys 1
1319	1314	:
1320	1315	: [ptr] "{r3}" (@intFromPtr(self.mapped.ptr)),
1321	1316	[len] "{r4}" (self.mapped.len),
1322	1317	),
1323	1318	.powerpc, .powerpcle, .powerpc64, .powerpc64le => asm volatile (
1324		\\ li 0, 91 # SYS_munmap
1325		\\ sc
1326		\\ li 0, 1 # SYS_exit
1327		\\ li 3, 0
1328		\\ sc
1329		\\ blr
	1319	\\ li 0, 91 # SYS_munmap
	1320	\\ sc
	1321	\\ li 0, 1 # SYS_exit
	1322	\\ li 3, 0
	1323	\\ sc
1330	1324	:
1331	1325	: [ptr] "{r3}" (@intFromPtr(self.mapped.ptr)),
1332	1326	[len] "{r4}" (self.mapped.len),
1333	1327	),
1334	1328	.riscv32, .riscv64 => asm volatile (
1335		\\ li a7, 215 # SYS_munmap
1336		\\ ecall
1337		\\ li a7, 93 # SYS_exit
1338		\\ mv a0, zero
1339		\\ ecall
	1329	\\ li a7, 215 # SYS_munmap
	1330	\\ ecall
	1331	\\ li a7, 93 # SYS_exit
	1332	\\ mv a0, zero
	1333	\\ ecall
1340	1334	:
1341	1335	: [ptr] "{a0}" (@intFromPtr(self.mapped.ptr)),
1342	1336	[len] "{a1}" (self.mapped.len),
1343	1337	),
1344	1338	.s390x => asm volatile (
1345		\\ svc 91 # SYS_munmap
1346		\\ lghi %%r2, 0
1347		\\ svc 1 # SYS_exit
	1339	\\ svc 91 # SYS_munmap
	1340	\\ lghi %%r2, 0
	1341	\\ svc 1 # SYS_exit
1348	1342	:
1349	1343	: [ptr] "{r2}" (@intFromPtr(self.mapped.ptr)),
1350	1344	[len] "{r3}" (self.mapped.len),
...	...	@@ -1384,7 +1378,7 @@ const LinuxThreadImpl = struct {
1384	1378	: [ptr] "{g1}" (@intFromPtr(self.mapped.ptr)),
1385	1379	[len] "{g2}" (self.mapped.len),
1386	1380	[stack] "{g3}" (&sparc_exit_stack),
1387		: .{ .memory = true }),
	1381	),
1388	1382	.sparc64 => asm volatile (
1389	1383	\\ // Ensure that the kernel only has to flush the current register window.
1390	1384	\\ flushw
...	...	@@ -1403,7 +1397,7 @@ const LinuxThreadImpl = struct {
1403	1397	: [ptr] "{g1}" (@intFromPtr(self.mapped.ptr)),
1404	1398	[len] "{g2}" (self.mapped.len),
1405	1399	[stack] "{g3}" (&sparc_exit_stack),
1406		: .{ .memory = true }),
	1400	),
1407	1401	.loongarch32, .loongarch64 => asm volatile (
1408	1402	\\ ori $a7, $zero, 215 # SYS_munmap
1409	1403	\\ syscall 0 # call munmap
...	...	@@ -1413,7 +1407,7 @@ const LinuxThreadImpl = struct {
1413	1407	:
1414	1408	: [ptr] "{r4}" (@intFromPtr(self.mapped.ptr)),
1415	1409	[len] "{r5}" (self.mapped.len),
1416		: .{ .memory = true }),
	1410	),
1417	1411	.csky => asm volatile (
1418	1412	\\ movi r7, 215 # SYS_munmap
1419	1413	\\ trap 0
...	...	@@ -1423,7 +1417,7 @@ const LinuxThreadImpl = struct {
1423	1417	:
1424	1418	: [ptr] "{r0}" (@intFromPtr(self.mapped.ptr)),
1425	1419	[len] "{r1}" (self.mapped.len),
1426		: .{ .memory = true }),
	1420	),
1427	1421	.xtensa, .xtensaeb => asm volatile (
1428	1422	\\ movi a2, 81 // SYS_munmap
1429	1423	\\ syscall
...	...	@@ -1433,7 +1427,7 @@ const LinuxThreadImpl = struct {
1433	1427	:
1434	1428	: [ptr] "{a6}" (@intFromPtr(self.mapped.ptr)),
1435	1429	[len] "{a3}" (self.mapped.len),
1436		: .{ .memory = true }),
	1430	),
1437	1431	else => \|cpu_arch\| @compileError("Unsupported linux arch: " ++ @tagName(cpu_arch)),
1438	1432	}
1439	1433	unreachable;

lib/std/atomic.zig+19-2

...	...	@@ -377,13 +377,16 @@ pub inline fn spinLoopHint() void {
377	377	.aarch64_be,
378	378	=> asm volatile ("isb"),
379	379
380		// `yield` was introduced in v6k but is also available on v6m.
381	380	// https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm
382	381	.arm,
383	382	.armeb,
	383	=> if (comptime builtin.cpu.has(.arm, .has_v6k)) {
	384	asm volatile ("yield");
	385	},
	386
384	387	.thumb,
385	388	.thumbeb,
386		=> if (comptime builtin.cpu.hasAny(.arm, &.{ .has_v6k, .has_v6m })) {
	389	=> if (comptime builtin.cpu.hasAny(.arm, &.{ .has_v6m, .thumb2 })) {
387	390	asm volatile ("yield");
388	391	},
389	392
...	...	@@ -392,6 +395,14 @@ pub inline fn spinLoopHint() void {
392	395	.hexagon,
393	396	=> asm volatile ("pause(#1)"),
394	397
	398	.mips,
	399	.mipsel,
	400	.mips64,
	401	.mips64el,
	402	=> if (comptime builtin.cpu.has(.mips, .mips32r2)) {
	403	asm volatile ("pause");
	404	},
	405
395	406	.riscv32,
396	407	.riscv32be,
397	408	.riscv64,
...	...	@@ -400,6 +411,12 @@ pub inline fn spinLoopHint() void {
400	411	asm volatile ("pause");
401	412	},
402	413
	414	.sparc,
	415	.sparc64,
	416	=> if (comptime builtin.cpu.hasAny(.sparc, &.{ .v8plus, .v9 })) {
	417	asm volatile ("rd %%ccr, %%g0");
	418	},
	419
403	420	else => {},
404	421	}
405	422	}

lib/std/debug/Dwarf.zig+1-1

...	...	@@ -1462,7 +1462,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
1462	1462	.powerpc, .powerpcle, .powerpc64, .powerpc64le => 67,
1463	1463	.riscv32, .riscv32be, .riscv64, .riscv64be => 65,
1464	1464	.s390x => 65,
1465		.sparc, .sparc64 => 32,
	1465	.sparc, .sparc64 => 65,
1466	1466	.ve => 144,
1467	1467	.x86 => 8,
1468	1468	.x86_64 => 16,

lib/std/debug/cpu_context.zig+102-92

...	...	@@ -349,6 +349,7 @@ const Alpha = extern struct {
349	349	\\ stq $28, 0x0e0($0)
350	350	\\ stq $29, 0x0e8($0)
351	351	\\ stq $30, 0x0f0($0)
	352	\\ stq $31, 0x0f8($0)
352	353	\\
353	354	\\ br $1, 1f
354	355	\\1:
...	...	@@ -463,10 +464,11 @@ const Arm = struct {
463	464	\\ stm r0, {r0-r12}
464	465	\\ str r13, [r0, #0x34]
465	466	\\ str r14, [r0, #0x38]
466		\\ str r15, [r0, #0x3c]
	467	\\ mov r1, pc
	468	\\ str r1, [r0, #0x3c]
467	469	:
468	470	: [r] "{r0}" (&ctx.r),
469		: .{ .memory = true });
	471	: .{ .r1 = true, .memory = true });
470	472	return ctx;
471	473	}
472	474
...	...	@@ -636,8 +638,8 @@ const Hexagon = extern struct {
636	638	/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
637	639	const Kvx = extern struct {
638	640	r: [64]Gpr,
639		ra: Gpr,
640	641	pc: Gpr,
	642	ra: Gpr,
641	643
642	644	pub const Gpr = u64;
643	645
...	...	@@ -716,38 +718,38 @@ const Lanai = extern struct {
716	718	pub inline fn current() Lanai {
717	719	var ctx: Lanai = undefined;
718	720	asm volatile (
719		\\ st %%r0, 0[r9]
720		\\ st %%r1, 4[r9]
721		\\ st %%r2, 8[r9]
722		\\ st %%r3, 12[r9]
723		\\ st %%r4, 16[r9]
724		\\ st %%r5, 20[r9]
725		\\ st %%r6, 24[r9]
726		\\ st %%r7, 28[r9]
727		\\ st %%r8, 32[r9]
728		\\ st %%r9, 36[r9]
729		\\ st %%r10, 40[r9]
730		\\ st %%r11, 44[r9]
731		\\ st %%r12, 48[r9]
732		\\ st %%r13, 52[r9]
733		\\ st %%r14, 56[r9]
734		\\ st %%r15, 60[r9]
735		\\ st %%r16, 64[r9]
736		\\ st %%r17, 68[r9]
737		\\ st %%r18, 72[r9]
738		\\ st %%r19, 76[r9]
739		\\ st %%r20, 80[r9]
740		\\ st %%r21, 84[r9]
741		\\ st %%r22, 88[r9]
742		\\ st %%r23, 92[r9]
743		\\ st %%r24, 96[r9]
744		\\ st %%r25, 100[r9]
745		\\ st %%r26, 104[r9]
746		\\ st %%r27, 108[r9]
747		\\ st %%r28, 112[r9]
748		\\ st %%r29, 116[r9]
749		\\ st %%r30, 120[r9]
750		\\ st %%r31, 124[r9]
	721	\\ st %%r0, 0[%%r9]
	722	\\ st %%r1, 4[%%r9]
	723	\\ st %%r2, 8[%%r9]
	724	\\ st %%r3, 12[%%r9]
	725	\\ st %%r4, 16[%%r9]
	726	\\ st %%r5, 20[%%r9]
	727	\\ st %%r6, 24[%%r9]
	728	\\ st %%r7, 28[%%r9]
	729	\\ st %%r8, 32[%%r9]
	730	\\ st %%r9, 36[%%r9]
	731	\\ st %%r10, 40[%%r9]
	732	\\ st %%r11, 44[%%r9]
	733	\\ st %%r12, 48[%%r9]
	734	\\ st %%r13, 52[%%r9]
	735	\\ st %%r14, 56[%%r9]
	736	\\ st %%r15, 60[%%r9]
	737	\\ st %%r16, 64[%%r9]
	738	\\ st %%r17, 68[%%r9]
	739	\\ st %%r18, 72[%%r9]
	740	\\ st %%r19, 76[%%r9]
	741	\\ st %%r20, 80[%%r9]
	742	\\ st %%r21, 84[%%r9]
	743	\\ st %%r22, 88[%%r9]
	744	\\ st %%r23, 92[%%r9]
	745	\\ st %%r24, 96[%%r9]
	746	\\ st %%r25, 100[%%r9]
	747	\\ st %%r26, 104[%%r9]
	748	\\ st %%r27, 108[%%r9]
	749	\\ st %%r28, 112[%%r9]
	750	\\ st %%r29, 116[%%r9]
	751	\\ st %%r30, 120[%%r9]
	752	\\ st %%r31, 124[%%r9]
751	753	:
752	754	: [ctx] "{r9}" (&ctx),
753	755	: .{ .memory = true });
...	...	@@ -763,7 +765,7 @@ const Lanai = extern struct {
763	765
764	766	pub fn dwarfRegisterBytes(ctx: *Lanai, register_num: u16) DwarfRegisterError![]u8 {
765	767	switch (register_num) {
766		0...31 => return @ptrCast(&ctx.s[register_num]),
	768	0...31 => return @ptrCast(&ctx.r[register_num]),
767	769
768	770	else => return error.InvalidRegister,
769	771	}
...	...	@@ -1039,6 +1041,7 @@ const Mips = extern struct {
1039	1041	\\ sd $fp, 240($t0)
1040	1042	\\ sd $ra, 248($t0)
1041	1043	\\ bal 1f
	1044	\\ nop
1042	1045	\\1:
1043	1046	\\ sd $ra, 256($t0)
1044	1047	\\ .set pop
...	...	@@ -1080,6 +1083,7 @@ const Mips = extern struct {
1080	1083	\\ sw $fp, 120($t4)
1081	1084	\\ sw $ra, 124($t4)
1082	1085	\\ bal 1f
	1086	\\ nop
1083	1087	\\1:
1084	1088	\\ sw $ra, 128($t4)
1085	1089	\\ .set pop
...	...	@@ -1164,6 +1168,7 @@ const Or1k = extern struct {
1164	1168	\\ l.sw 120(r15), r30
1165	1169	\\ l.sw 124(r15), r31
1166	1170	\\ l.jal 1f
	1171	\\ l.nop
1167	1172	\\1:
1168	1173	\\ l.sw 128(r15), r9
1169	1174	:
...	...	@@ -1512,7 +1517,7 @@ const S390x = extern struct {
1512	1517
1513	1518	/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
1514	1519	const Sparc = extern struct {
1515		g: [8]Gpr,
	1520	g: [8]Gpr align(8), // Align to make `std` safe on 32-bit.
1516	1521	o: [8]Gpr,
1517	1522	l: [8]Gpr,
1518	1523	i: [8]Gpr,
...	...	@@ -1525,61 +1530,63 @@ const Sparc = extern struct {
1525	1530
1526	1531	var ctx: Sparc = undefined;
1527	1532	asm volatile (if (Gpr == u64)
1528		\\ stx %g0, [%l0 + 0]
1529		\\ stx %g1, [%l0 + 8]
1530		\\ stx %g2, [%l0 + 16]
1531		\\ stx %g3, [%l0 + 24]
1532		\\ stx %g4, [%l0 + 32]
1533		\\ stx %g5, [%l0 + 40]
1534		\\ stx %g6, [%l0 + 48]
1535		\\ stx %g7, [%l0 + 56]
1536		\\ stx %o0, [%l0 + 64]
1537		\\ stx %o1, [%l0 + 72]
1538		\\ stx %o2, [%l0 + 80]
1539		\\ stx %o3, [%l0 + 88]
1540		\\ stx %o4, [%l0 + 96]
1541		\\ stx %o5, [%l0 + 104]
1542		\\ stx %o6, [%l0 + 112]
1543		\\ stx %o7, [%l0 + 120]
1544		\\ stx %l0, [%l0 + 128]
1545		\\ stx %l1, [%l0 + 136]
1546		\\ stx %l2, [%l0 + 144]
1547		\\ stx %l3, [%l0 + 152]
1548		\\ stx %l4, [%l0 + 160]
1549		\\ stx %l5, [%l0 + 168]
1550		\\ stx %l6, [%l0 + 176]
1551		\\ stx %l7, [%l0 + 184]
1552		\\ stx %i0, [%l0 + 192]
1553		\\ stx %i1, [%l0 + 200]
1554		\\ stx %i2, [%l0 + 208]
1555		\\ stx %i3, [%l0 + 216]
1556		\\ stx %i4, [%l0 + 224]
1557		\\ stx %i5, [%l0 + 232]
1558		\\ stx %i6, [%l0 + 240]
1559		\\ stx %i7, [%l0 + 248]
	1533	\\ stx %%g0, [%%l0 + 0]
	1534	\\ stx %%g1, [%%l0 + 8]
	1535	\\ stx %%g2, [%%l0 + 16]
	1536	\\ stx %%g3, [%%l0 + 24]
	1537	\\ stx %%g4, [%%l0 + 32]
	1538	\\ stx %%g5, [%%l0 + 40]
	1539	\\ stx %%g6, [%%l0 + 48]
	1540	\\ stx %%g7, [%%l0 + 56]
	1541	\\ stx %%o0, [%%l0 + 64]
	1542	\\ stx %%o1, [%%l0 + 72]
	1543	\\ stx %%o2, [%%l0 + 80]
	1544	\\ stx %%o3, [%%l0 + 88]
	1545	\\ stx %%o4, [%%l0 + 96]
	1546	\\ stx %%o5, [%%l0 + 104]
	1547	\\ stx %%o6, [%%l0 + 112]
	1548	\\ stx %%o7, [%%l0 + 120]
	1549	\\ stx %%l0, [%%l0 + 128]
	1550	\\ stx %%l1, [%%l0 + 136]
	1551	\\ stx %%l2, [%%l0 + 144]
	1552	\\ stx %%l3, [%%l0 + 152]
	1553	\\ stx %%l4, [%%l0 + 160]
	1554	\\ stx %%l5, [%%l0 + 168]
	1555	\\ stx %%l6, [%%l0 + 176]
	1556	\\ stx %%l7, [%%l0 + 184]
	1557	\\ stx %%i0, [%%l0 + 192]
	1558	\\ stx %%i1, [%%l0 + 200]
	1559	\\ stx %%i2, [%%l0 + 208]
	1560	\\ stx %%i3, [%%l0 + 216]
	1561	\\ stx %%i4, [%%l0 + 224]
	1562	\\ stx %%i5, [%%l0 + 232]
	1563	\\ stx %%i6, [%%l0 + 240]
	1564	\\ stx %%i7, [%%l0 + 248]
1560	1565	\\ call 1f
	1566	\\ nop
1561	1567	\\1:
1562		\\ stx %o7, [%l0 + 256]
	1568	\\ stx %%o7, [%%l0 + 256]
1563	1569	else
1564		\\ std %g0, [%l0 + 0]
1565		\\ std %g2, [%l0 + 8]
1566		\\ std %g4, [%l0 + 16]
1567		\\ std %g6, [%l0 + 24]
1568		\\ std %o0, [%l0 + 32]
1569		\\ std %o2, [%l0 + 40]
1570		\\ std %o4, [%l0 + 48]
1571		\\ std %o6, [%l0 + 56]
1572		\\ std %l0, [%l0 + 64]
1573		\\ std %l2, [%l0 + 72]
1574		\\ std %l4, [%l0 + 80]
1575		\\ std %l6, [%l0 + 88]
1576		\\ std %i0, [%l0 + 96]
1577		\\ std %i2, [%l0 + 104]
1578		\\ std %i4, [%l0 + 112]
1579		\\ std %i6, [%l0 + 120]
	1570	\\ std %%g0, [%%l0 + 0]
	1571	\\ std %%g2, [%%l0 + 8]
	1572	\\ std %%g4, [%%l0 + 16]
	1573	\\ std %%g6, [%%l0 + 24]
	1574	\\ std %%o0, [%%l0 + 32]
	1575	\\ std %%o2, [%%l0 + 40]
	1576	\\ std %%o4, [%%l0 + 48]
	1577	\\ std %%o6, [%%l0 + 56]
	1578	\\ std %%l0, [%%l0 + 64]
	1579	\\ std %%l2, [%%l0 + 72]
	1580	\\ std %%l4, [%%l0 + 80]
	1581	\\ std %%l6, [%%l0 + 88]
	1582	\\ std %%i0, [%%l0 + 96]
	1583	\\ std %%i2, [%%l0 + 104]
	1584	\\ std %%i4, [%%l0 + 112]
	1585	\\ std %%i6, [%%l0 + 120]
1580	1586	\\ call 1f
	1587	\\ nop
1581	1588	\\1:
1582		\\ st %o7, [%l0 + 128]
	1589	\\ st %%o7, [%%l0 + 128]
1583	1590	:
1584	1591	: [ctx] "{l0}" (&ctx),
1585	1592	: .{ .o7 = true, .memory = true });
...	...	@@ -1608,7 +1615,11 @@ const Sparc = extern struct {
1608	1615	8...15 => return @ptrCast(&ctx.o[register_num - 8]),
1609	1616	16...23 => return @ptrCast(&ctx.l[register_num - 16]),
1610	1617	24...31 => return @ptrCast(&ctx.i[register_num - 24]),
1611		32 => return @ptrCast(&ctx.pc),
	1618	65 => return @ptrCast(&ctx.pc),
	1619
	1620	32...63 => return error.UnsupportedRegister, // F0-F31
	1621	64 => return error.UnsupportedRegister, // Y
	1622	72...87 => return error.UnsupportedRegister, // D0-D15
1612	1623
1613	1624	else => return error.InvalidRegister,
1614	1625	}
...	...	@@ -1689,9 +1700,8 @@ const Ve = extern struct {
1689	1700	\\ st %%s61, 488(, %%s8)
1690	1701	\\ st %%s62, 496(, %%s8)
1691	1702	\\ st %%s63, 504(, %%s8)
1692		\\ br.l 1f
1693		\\1:
1694		\\ st %%lr, 512(, %%s8)
	1703	\\ sic %%s10
	1704	\\ st %%s10, 512(, %%s8)
1695	1705	:
1696	1706	: [ctx] "{s8}" (&ctx),
1697	1707	: .{ .s10 = true, .memory = true });
...	...	@@ -1758,7 +1768,7 @@ const X86_16 = struct {
1758	1768	switch (register_num) {
1759	1769	4 => return @ptrCast(ctx.regs.getPtr(.sp)),
1760	1770	5 => return @ptrCast(ctx.regs.getPtr(.bp)),
1761		6 => return @ptrCast(ctx.regs.getPtr(.ip)),
	1771	8 => return @ptrCast(ctx.regs.getPtr(.ip)),
1762	1772	41 => return @ptrCast(ctx.regs.getPtr(.cs)),
1763	1773	42 => return @ptrCast(ctx.regs.getPtr(.ss)),
1764	1774	else => return error.InvalidRegister,

lib/std/os/linux/aarch64.zig+27-34

...	...	@@ -116,55 +116,48 @@ pub fn clone() callconv(.naked) u64 {
116	116	// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
117	117	// x8, x0, x1, x2, x3, x4
118	118	asm volatile (
119		\\ // align stack and save func,arg
120		\\ and x1,x1,#-16
121		\\ stp x0,x3,[x1,#-16]!
	119	\\ // align stack and save func,arg
	120	\\ and x1,x1,#-16
	121	\\ stp x0,x3,[x1,#-16]!
122	122	\\
123		\\ // syscall
124		\\ uxtw x0,w2
125		\\ mov x2,x4
126		\\ mov x3,x5
127		\\ mov x4,x6
128		\\ mov x8,#220 // SYS_clone
129		\\ svc #0
	123	\\ // syscall
	124	\\ uxtw x0,w2
	125	\\ mov x2,x4
	126	\\ mov x3,x5
	127	\\ mov x4,x6
	128	\\ mov x8,#220 // SYS_clone
	129	\\ svc #0
130	130	\\
131		\\ cbz x0,1f
132		\\ // parent
133		\\ ret
	131	\\ cbz x0,1f
	132	\\ // parent
	133	\\ ret
134	134	\\
135		\\ // child
	135	\\ // child
136	136	\\1:
137	137	);
138	138	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
139		\\ .cfi_undefined lr
	139	\\ .cfi_undefined lr
140	140	);
141	141	asm volatile (
142		\\ mov fp, 0
143		\\ mov lr, 0
	142	\\ mov fp, 0
	143	\\ mov lr, 0
144	144	\\
145		\\ ldp x1,x0,[sp],#16
146		\\ blr x1
147		\\ mov x8,#93 // SYS_exit
148		\\ svc #0
	145	\\ ldp x1,x0,[sp],#16
	146	\\ blr x1
	147	\\ mov x8,#93 // SYS_exit
	148	\\ svc #0
149	149	);
150	150	}
151	151
152	152	pub const restore = restore_rt;
153	153
154	154	pub fn restore_rt() callconv(.naked) noreturn {
155		switch (builtin.zig_backend) {
156		.stage2_c => asm volatile (
157		\\ mov w8, %[number]
158		\\ svc #0
159		:
160		: [number] "i" (@backingInt(SYS.rt_sigreturn)),
161		),
162		else => asm volatile (
163		\\ svc #0
164		:
165		: [number] "{x8}" (@backingInt(SYS.rt_sigreturn)),
166		),
167		}
	155	asm volatile (
	156	\\ mov w8, %[number]
	157	\\ svc #0
	158	:
	159	: [number] "i" (@backingInt(SYS.rt_sigreturn)),
	160	);
168	161	}
169	162
170	163	pub const VDSO = struct {

lib/std/os/linux/alpha.zig+8-8

...	...	@@ -295,8 +295,8 @@ pub fn clone() callconv(.naked) u64 {
295	295	// a0 = $16, a1 = $17, a2 = $18, a3 = $19,
296	296	// a4 = $20, a5 = $21, sp = $30, v0 = $0
297	297	\\ # Save function pointer and argument pointer on new thread stack
298		\\ ldi $1, -8
299		\\ and $17, $17, $1
	298	\\ ldi $1, -16
	299	\\ and $17, $1, $17
300	300	\\ lda $17, -16($17)
301	301	\\ stq $16, 0($17)
302	302	\\ stq $19, 8($17)
...	...	@@ -323,16 +323,16 @@ pub fn clone() callconv(.naked) u64 {
323	323	\\ .cfi_undefined $26
324	324	);
325	325	asm volatile (
326		// v0 = $0, t9 = $23, a0 = $16, ra = $26, sp = $30, fp = $15
	326	// v0 = $0, a0 = $16, ra = $26, sp = $30, fp = $15, pv = $27
327	327	\\ mov 0, $15
328	328	\\
329		\\ ldq $23, 0($30)
	329	\\ ldq $27, 0($30)
330	330	\\ ldq $16, 8($30)
331	331	\\ lda $30, 16($30)
332		\\ jsr $26, ($23)
	332	\\ jsr $26, ($27)
333	333	\\
334	334	\\ mov $0, $16
335		\\ ldi $0, 1 # SYS_EXIT
	335	\\ ldi $0, 1 # SYS_exit
336	336	\\ callsys
337	337	);
338	338	}
...	...	@@ -341,7 +341,7 @@ pub fn restore() noreturn {
341	341	asm volatile (
342	342	// v0 = $0, a0 = $16, sp = $30
343	343	\\ mov $30, $16
344		\\ ldi $0, 103 # SIGRETURN
	344	\\ ldi $0, 103 # SYS_sigreturn
345	345	\\ callsys
346	346	);
347	347	}
...	...	@@ -350,7 +350,7 @@ pub fn restore_rt() noreturn {
350	350	asm volatile (
351	351	// v0 = $0, a0 = $16, sp = $30
352	352	\\ mov $30, $16
353		\\ ldi $0, 351 # RT_SIGRETURN
	353	\\ ldi $0, 351 # SYS_rt_sigreturn
354	354	\\ callsys
355	355	);
356	356	}

lib/std/os/linux/arc.zig+29-36

...	...	@@ -116,56 +116,49 @@ pub fn clone() callconv(.naked) u32 {
116	116	// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
117	117	// r8 r0, r1, r2, r3, r4
118	118	asm volatile (
119		\\ // Align stack pointer
120		\\ and r1, r1, -16
121		\\ mov r10, r0
122		\\ mov r11, r3
123		\\ // Setup the arguments
124		\\ mov r0, r2
125		\\ mov r2, r4
126		\\ mov r3, r5
127		\\ mov r4, r6
128		\\ mov r8, 220 // SYS_clone
129		\\ trap_s 0
130		\\ cmp r0, 0
131		\\ beq 1f
132		\\ j [blink]
133		\\ // Child
134		\\ 1:
	119	\\ // Align stack pointer
	120	\\ and r1, r1, -16
	121	\\ mov r10, r0
	122	\\ mov r11, r3
	123	\\ // Setup the arguments
	124	\\ mov r0, r2
	125	\\ mov r2, r4
	126	\\ mov r3, r5
	127	\\ mov r4, r6
	128	\\ mov r8, 220 // SYS_clone
	129	\\ trap_s 0
	130	\\ cmp r0, 0
	131	\\ beq 1f
	132	\\ j [blink]
	133	\\ // Child
	134	\\1:
135	135	);
136	136	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
137	137	\\ .cfi_undefined blink
138	138	);
139	139
140	140	asm volatile (
141		\\ mov fp, 0
142		\\ mov blink, 0
	141	\\ mov fp, 0
	142	\\ mov blink, 0
143	143	\\
144		\\ mov r0, r11
145		\\ jl [r10]
	144	\\ mov r0, r11
	145	\\ jl [r10]
146	146	\\
147		\\ // Exit
148		\\ mov r8, 93 // SYS_exit
149		\\ trap_s 0
	147	\\ // Exit
	148	\\ mov r8, 93 // SYS_exit
	149	\\ trap_s 0
150	150	);
151	151	}
152	152
153	153	pub const restore = restore_rt;
154	154
155	155	pub fn restore_rt() callconv(.naked) noreturn {
156		switch (builtin.zig_backend) {
157		.stage2_c => asm volatile (
158		\\ mov r8, %[number]
159		\\ trap_s 0
160		:
161		: [number] "I" (@backingInt(SYS.rt_sigreturn)),
162		),
163		else => asm volatile (
164		\\ trap_s 0
165		:
166		: [number] "{r8}" (@backingInt(SYS.rt_sigreturn)),
167		),
168		}
	156	asm volatile (
	157	\\ mov r8, %[number]
	158	\\ trap_s 0
	159	:
	160	: [number] "I" (@backingInt(SYS.rt_sigreturn)),
	161	);
169	162	}
170	163
171	164	pub const time_t = i64;

lib/std/os/linux/arm.zig+37-49

...	...	@@ -116,65 +116,53 @@ pub fn clone() callconv(.naked) u32 {
116	116	// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
117	117	// r7 r0, r1, r2, r3, r4
118	118	asm volatile (
119		\\ stmfd sp!,{r4,r5,r6,r7}
120		\\ mov r7,#120 // SYS_clone
121		\\ mov r6,r3
122		\\ mov r5,r0
123		\\ mov r0,r2
124		\\ and r1,r1,#-16
125		\\ ldr r2,[sp,#16]
126		\\ ldr r3,[sp,#20]
127		\\ ldr r4,[sp,#24]
128		\\ svc 0
129		\\ tst r0,r0
130		\\ beq 1f
131		\\ ldmfd sp!,{r4,r5,r6,r7}
132		\\ bx lr
	119	\\ stmfd sp!,{r4,r5,r6,r7}
	120	\\ mov r7,#120 // SYS_clone
	121	\\ mov r6,r3
	122	\\ mov r5,r0
	123	\\ mov r0,r2
	124	\\ and r1,r1,#-16
	125	\\ ldr r2,[sp,#16]
	126	\\ ldr r3,[sp,#20]
	127	\\ ldr r4,[sp,#24]
	128	\\ svc 0
	129	\\ tst r0,r0
	130	\\ beq 1f
	131	\\ ldmfd sp!,{r4,r5,r6,r7}
	132	\\ bx lr
133	133	\\
134		\\ // https://github.com/llvm/llvm-project/issues/115891
135		\\1: mov r7, #0
136		\\ mov r11, #0
137		\\ mov lr, #0
	134	\\ // https://github.com/llvm/llvm-project/issues/115891
	135	\\1:
	136	\\ mov r7, #0
	137	\\ mov r11, #0
	138	\\ mov lr, #0
138	139	\\
139		\\ mov r0,r6
140		\\ bl 3f
141		\\ mov r7,#1 // SYS_exit
142		\\ svc 0
	140	\\ mov r0,r6
	141	\\ bl 3f
	142	\\ mov r7,#1 // SYS_exit
	143	\\ svc 0
143	144	\\
144		\\3: bx r5
	145	\\3:
	146	\\ bx r5
145	147	);
146	148	}
147	149
148	150	pub fn restore() callconv(.naked) noreturn {
149		switch (builtin.zig_backend) {
150		.stage2_c => asm volatile (
151		\\ mov r7, %[number]
152		\\ svc #0
153		:
154		: [number] "I" (@backingInt(SYS.sigreturn)),
155		),
156		else => asm volatile (
157		\\ svc #0
158		:
159		: [number] "{r7}" (@backingInt(SYS.sigreturn)),
160		),
161		}
	151	asm volatile (
	152	\\ mov r7, %[number]
	153	\\ svc #0
	154	:
	155	: [number] "I" (@backingInt(SYS.sigreturn)),
	156	);
162	157	}
163	158
164	159	pub fn restore_rt() callconv(.naked) noreturn {
165		switch (builtin.zig_backend) {
166		.stage2_c => asm volatile (
167		\\ mov r7, %[number]
168		\\ svc #0
169		:
170		: [number] "I" (@backingInt(SYS.rt_sigreturn)),
171		),
172		else => asm volatile (
173		\\ svc #0
174		:
175		: [number] "{r7}" (@backingInt(SYS.rt_sigreturn)),
176		),
177		}
	160	asm volatile (
	161	\\ mov r7, %[number]
	162	\\ svc #0
	163	:
	164	: [number] "I" (@backingInt(SYS.rt_sigreturn)),
	165	);
178	166	}
179	167
180	168	pub const VDSO = struct {

lib/std/os/linux/csky.zig+3-3

...	...	@@ -113,14 +113,14 @@ pub fn clone() callconv(.naked) u32 {
113	113	// __clone(func, stack, flags, arg, ptid, tls, ctid)
114	114	// r0, r1, r2, r3, +0, +4, +8
115	115	//
116		// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
117		// r7 r0, r1, r2, r3, r4
	116	// syscall(SYS_clone, flags, stack, ptid, ctid, tls)
	117	// r7 r0, r1, r2, r3, r4
118	118	asm volatile (
119	119	\\ // Preserve callee-saved registers.
120	120	\\ mov t0, r4
121	121	\\ mov t1, r7
122	122	\\
123		\\ andi r1, r1, -8
	123	\\ andni r1, r1, 7
124	124	\\
125	125	\\ subi r1, 8
126	126	\\ stw r0, (r1, 0)

lib/std/os/linux/mips.zig-10

...	...	@@ -10,7 +10,6 @@ pub fn syscall0(
10	10	return asm volatile (
11	11	\\ syscall
12	12	\\ beq $a3, $zero, 1f
13		\\ blez $v0, 1f
14	13	\\ subu $v0, $zero, $v0
15	14	\\1:
16	15	: [ret] "={$2}" (-> u32),
...	...	@@ -25,7 +24,6 @@ pub fn syscall1(
25	24	return asm volatile (
26	25	\\ syscall
27	26	\\ beq $a3, $zero, 1f
28		\\ blez $v0, 1f
29	27	\\ subu $v0, $zero, $v0
30	28	\\1:
31	29	: [ret] "={$2}" (-> u32),
...	...	@@ -42,7 +40,6 @@ pub fn syscall2(
42	40	return asm volatile (
43	41	\\ syscall
44	42	\\ beq $a3, $zero, 1f
45		\\ blez $v0, 1f
46	43	\\ subu $v0, $zero, $v0
47	44	\\1:
48	45	: [ret] "={$2}" (-> u32),
...	...	@@ -61,7 +58,6 @@ pub fn syscall3(
61	58	return asm volatile (
62	59	\\ syscall
63	60	\\ beq $a3, $zero, 1f
64		\\ blez $v0, 1f
65	61	\\ subu $v0, $zero, $v0
66	62	\\1:
67	63	: [ret] "={$2}" (-> u32),
...	...	@@ -82,7 +78,6 @@ pub fn syscall4(
82	78	return asm volatile (
83	79	\\ syscall
84	80	\\ beq $a3, $zero, 1f
85		\\ blez $v0, 1f
86	81	\\ subu $v0, $zero, $v0
87	82	\\1:
88	83	: [ret] "={$2}" (-> u32),
...	...	@@ -111,7 +106,6 @@ pub fn syscall5(
111	106	\\ syscall
112	107	\\ addu $sp, $sp, 24
113	108	\\ beq $a3, $zero, 1f
114		\\ blez $v0, 1f
115	109	\\ subu $v0, $zero, $v0
116	110	\\1:
117	111	: [ret] "={$2}" (-> u32),
...	...	@@ -140,7 +134,6 @@ pub fn syscall6(
140	134	\\ syscall
141	135	\\ addu $sp, $sp, 24
142	136	\\ beq $a3, $zero, 1f
143		\\ blez $v0, 1f
144	137	\\ subu $v0, $zero, $v0
145	138	\\1:
146	139	: [ret] "={$2}" (-> u32),
...	...	@@ -172,7 +165,6 @@ pub fn syscall7(
172	165	\\ syscall
173	166	\\ addu $sp, $sp, 32
174	167	\\ beq $a3, $zero, 1f
175		\\ blez $v0, 1f
176	168	\\ subu $v0, $zero, $v0
177	169	\\1:
178	170	: [ret] "={$2}" (-> u32),
...	...	@@ -193,7 +185,6 @@ pub fn syscall_pipe(
193	185	return asm volatile (
194	186	\\ syscall
195	187	\\ beq $a3, $zero, 1f
196		\\ blez $v0, 2f
197	188	\\ subu $v0, $zero, $v0
198	189	\\ b 2f
199	190	\\1:
...	...	@@ -229,7 +220,6 @@ pub fn clone() callconv(.naked) u32 {
229	220	\\ li $v0, 4120 # SYS_clone
230	221	\\ syscall
231	222	\\ beq $a3, $zero, 1f
232		\\ blez $v0, 2f
233	223	\\ subu $v0, $zero, $v0
234	224	\\ b 2f
235	225	\\1:

lib/std/os/linux/mips64.zig-9

...	...	@@ -10,7 +10,6 @@ pub fn syscall0(
10	10	return asm volatile (
11	11	\\ syscall
12	12	\\ beq $a3, $zero, 1f
13		\\ blez $v0, 1f
14	13	\\ dsubu $v0, $zero, $v0
15	14	\\1:
16	15	: [ret] "={$2}" (-> u64),
...	...	@@ -25,7 +24,6 @@ pub fn syscall1(
25	24	return asm volatile (
26	25	\\ syscall
27	26	\\ beq $a3, $zero, 1f
28		\\ blez $v0, 1f
29	27	\\ dsubu $v0, $zero, $v0
30	28	\\1:
31	29	: [ret] "={$2}" (-> u64),
...	...	@@ -42,7 +40,6 @@ pub fn syscall2(
42	40	return asm volatile (
43	41	\\ syscall
44	42	\\ beq $a3, $zero, 1f
45		\\ blez $v0, 1f
46	43	\\ dsubu $v0, $zero, $v0
47	44	\\1:
48	45	: [ret] "={$2}" (-> u64),
...	...	@@ -61,7 +58,6 @@ pub fn syscall3(
61	58	return asm volatile (
62	59	\\ syscall
63	60	\\ beq $a3, $zero, 1f
64		\\ blez $v0, 1f
65	61	\\ dsubu $v0, $zero, $v0
66	62	\\1:
67	63	: [ret] "={$2}" (-> u64),
...	...	@@ -82,7 +78,6 @@ pub fn syscall4(
82	78	return asm volatile (
83	79	\\ syscall
84	80	\\ beq $a3, $zero, 1f
85		\\ blez $v0, 1f
86	81	\\ dsubu $v0, $zero, $v0
87	82	\\1:
88	83	: [ret] "={$2}" (-> u64),
...	...	@@ -105,7 +100,6 @@ pub fn syscall5(
105	100	return asm volatile (
106	101	\\ syscall
107	102	\\ beq $a3, $zero, 1f
108		\\ blez $v0, 1f
109	103	\\ dsubu $v0, $zero, $v0
110	104	\\1:
111	105	: [ret] "={$2}" (-> u64),
...	...	@@ -130,7 +124,6 @@ pub fn syscall6(
130	124	return asm volatile (
131	125	\\ syscall
132	126	\\ beq $a3, $zero, 1f
133		\\ blez $v0, 1f
134	127	\\ dsubu $v0, $zero, $v0
135	128	\\1:
136	129	: [ret] "={$2}" (-> u64),
...	...	@@ -150,7 +143,6 @@ pub fn syscall_pipe(
150	143	return asm volatile (
151	144	\\ syscall
152	145	\\ beq $a3, $zero, 1f
153		\\ blez $v0, 2f
154	146	\\ dsubu $v0, $zero, $v0
155	147	\\ b 2f
156	148	\\1:
...	...	@@ -184,7 +176,6 @@ pub fn clone() callconv(.naked) u64 {
184	176	\\ li $v0, 5055 # SYS_clone
185	177	\\ syscall
186	178	\\ beq $a3, $zero, 1f
187		\\ blez $v0, 2f
188	179	\\ dsubu $v0, $zero, $v0
189	180	\\ b 2f
190	181	\\1:

lib/std/os/linux/mipsn32.zig-10

...	...	@@ -10,7 +10,6 @@ pub fn syscall0(
10	10	return asm volatile (
11	11	\\ syscall
12	12	\\ beq $a3, $zero, 1f
13		\\ blez $v0, 1f
14	13	\\ subu $v0, $zero, $v0
15	14	\\1:
16	15	: [ret] "={$2}" (-> u32),
...	...	@@ -25,7 +24,6 @@ pub fn syscall1(
25	24	return asm volatile (
26	25	\\ syscall
27	26	\\ beq $a3, $zero, 1f
28		\\ blez $v0, 1f
29	27	\\ subu $v0, $zero, $v0
30	28	\\1:
31	29	: [ret] "={$2}" (-> u32),
...	...	@@ -42,7 +40,6 @@ pub fn syscall2(
42	40	return asm volatile (
43	41	\\ syscall
44	42	\\ beq $a3, $zero, 1f
45		\\ blez $v0, 1f
46	43	\\ subu $v0, $zero, $v0
47	44	\\1:
48	45	: [ret] "={$2}" (-> u32),
...	...	@@ -61,7 +58,6 @@ pub fn syscall3(
61	58	return asm volatile (
62	59	\\ syscall
63	60	\\ beq $a3, $zero, 1f
64		\\ blez $v0, 1f
65	61	\\ subu $v0, $zero, $v0
66	62	\\1:
67	63	: [ret] "={$2}" (-> u32),
...	...	@@ -82,7 +78,6 @@ pub fn syscall4(
82	78	return asm volatile (
83	79	\\ syscall
84	80	\\ beq $a3, $zero, 1f
85		\\ blez $v0, 1f
86	81	\\ subu $v0, $zero, $v0
87	82	\\1:
88	83	: [ret] "={$2}" (-> u32),
...	...	@@ -105,7 +100,6 @@ pub fn syscall5(
105	100	return asm volatile (
106	101	\\ syscall
107	102	\\ beq $a3, $zero, 1f
108		\\ blez $v0, 1f
109	103	\\ subu $v0, $zero, $v0
110	104	\\1:
111	105	: [ret] "={$2}" (-> u32),
...	...	@@ -130,7 +124,6 @@ pub fn syscall6(
130	124	return asm volatile (
131	125	\\ syscall
132	126	\\ beq $a3, $zero, 1f
133		\\ blez $v0, 1f
134	127	\\ subu $v0, $zero, $v0
135	128	\\1:
136	129	: [ret] "={$2}" (-> u32),
...	...	@@ -150,7 +143,6 @@ pub fn syscall_pipe(
150	143	return asm volatile (
151	144	\\ syscall
152	145	\\ beq $a3, $zero, 1f
153		\\ blez $v0, 2f
154	146	\\ subu $v0, $zero, $v0
155	147	\\ b 2f
156	148	\\1:
...	...	@@ -171,7 +163,6 @@ pub fn syscall_lseek(
171	163	return asm volatile (
172	164	\\ syscall
173	165	\\ beq $a3, $zero, 1f
174		\\ blez $v0, 1f
175	166	\\ dsubu $v0, $zero, $v0
176	167	\\1:
177	168	: [ret] "={$2}" (-> u64),
...	...	@@ -203,7 +194,6 @@ pub fn clone() callconv(.naked) u32 {
203	194	\\ li $v0, 6055 # SYS_clone
204	195	\\ syscall
205	196	\\ beq $a3, $zero, 1f
206		\\ blez $v0, 2f
207	197	\\ subu $v0, $zero, $v0
208	198	\\ b 2f
209	199	\\1:

lib/std/os/linux/or1k.zig+5-1

...	...	@@ -124,7 +124,8 @@ pub fn clone() callconv(.naked) u32 {
124	124	// r11 r3, r4, r5, r6, r7
125	125	asm volatile (
126	126	\\ # Save function pointer and argument pointer on new thread stack
127		\\ l.andi r4, r4, -4
	127	\\ l.addi r13, r0, -4
	128	\\ l.and r4, r4, r13
128	129	\\ l.addi r4, r4, -8
129	130	\\ l.sw 0(r4), r3
130	131	\\ l.sw 4(r4), r6
...	...	@@ -138,7 +139,9 @@ pub fn clone() callconv(.naked) u32 {
138	139	\\ l.sys 1
139	140	\\ l.sfeqi r11, 0
140	141	\\ l.bf 1f
	142	\\ l.nop
141	143	\\ l.jr r9
	144	\\ l.nop
142	145	\\1:
143	146	);
144	147	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
...	...	@@ -151,6 +154,7 @@ pub fn clone() callconv(.naked) u32 {
151	154	\\ l.lwz r11, 0(r1)
152	155	\\ l.lwz r3, 4(r1)
153	156	\\ l.jalr r11
	157	\\ l.nop
154	158	\\
155	159	\\ l.ori r3, r11, 0
156	160	\\ l.ori r11, r0, 93 # SYS_exit

lib/std/os/linux/powerpc.zig+25-38

...	...	@@ -16,7 +16,7 @@ pub fn syscall0(
16	16	\\ sc
17	17	\\ bns+ 1f
18	18	\\ neg 3, 3
19		\\ 1:
	19	\\1:
20	20	: [ret] "={r3}" (-> u32),
21	21	[r0_out] "={r0}" (r0_out),
22	22	: [number] "{r0}" (@backingInt(number)),
...	...	@@ -33,7 +33,7 @@ pub fn syscall1(
33	33	\\ sc
34	34	\\ bns+ 1f
35	35	\\ neg 3, 3
36		\\ 1:
	36	\\1:
37	37	: [ret] "={r3}" (-> u32),
38	38	[r0_out] "={r0}" (r0_out),
39	39	: [number] "{r0}" (@backingInt(number)),
...	...	@@ -53,7 +53,7 @@ pub fn syscall2(
53	53	\\ sc
54	54	\\ bns+ 1f
55	55	\\ neg 3, 3
56		\\ 1:
	56	\\1:
57	57	: [ret] "={r3}" (-> u32),
58	58	[r0_out] "={r0}" (r0_out),
59	59	[r4_out] "={r4}" (r4_out),
...	...	@@ -77,7 +77,7 @@ pub fn syscall3(
77	77	\\ sc
78	78	\\ bns+ 1f
79	79	\\ neg 3, 3
80		\\ 1:
	80	\\1:
81	81	: [ret] "={r3}" (-> u32),
82	82	[r0_out] "={r0}" (r0_out),
83	83	[r4_out] "={r4}" (r4_out),
...	...	@@ -105,7 +105,7 @@ pub fn syscall4(
105	105	\\ sc
106	106	\\ bns+ 1f
107	107	\\ neg 3, 3
108		\\ 1:
	108	\\1:
109	109	: [ret] "={r3}" (-> u32),
110	110	[r0_out] "={r0}" (r0_out),
111	111	[r4_out] "={r4}" (r4_out),
...	...	@@ -137,7 +137,7 @@ pub fn syscall5(
137	137	\\ sc
138	138	\\ bns+ 1f
139	139	\\ neg 3, 3
140		\\ 1:
	140	\\1:
141	141	: [ret] "={r3}" (-> u32),
142	142	[r0_out] "={r0}" (r0_out),
143	143	[r4_out] "={r4}" (r4_out),
...	...	@@ -173,7 +173,7 @@ pub fn syscall6(
173	173	\\ sc
174	174	\\ bns+ 1f
175	175	\\ neg 3, 3
176		\\ 1:
	176	\\1:
177	177	: [ret] "={r3}" (-> u32),
178	178	[r0_out] "={r0}" (r0_out),
179	179	[r4_out] "={r4}" (r4_out),
...	...	@@ -200,8 +200,9 @@ pub fn clone() callconv(.naked) u32 {
200	200	asm volatile (
201	201	\\ # store non-volatile regs r29, r30 on stack in order to put our
202	202	\\ # start func and its arg there
203		\\ stwu 29, -16(1)
204		\\ stw 30, 4(1)
	203	\\ stwu 1, -16(1)
	204	\\ stw 29, 8(1)
	205	\\ stw 30, 12(1)
205	206	\\
206	207	\\ # save r3 (func) into r29, and r6(arg) into r30
207	208	\\ mr 29, 3
...	...	@@ -234,8 +235,8 @@ pub fn clone() callconv(.naked) u32 {
234	235	\\
235	236	\\ # if not 0, restore stack and return
236	237	\\ beq cr7, 2f
237		\\ lwz 29, 0(1)
238		\\ lwz 30, 4(1)
	238	\\ lwz 29, 8(1)
	239	\\ lwz 30, 12(1)
239	240	\\ addi 1, 1, 16
240	241	\\ blr
241	242	\\
...	...	@@ -247,7 +248,7 @@ pub fn clone() callconv(.naked) u32 {
247	248	);
248	249	asm volatile (
249	250	\\ li 31, 0
250		\\ mtlr 0
	251	\\ mtlr 31
251	252	\\
252	253	\\ #call funcptr: move arg (d) into r3
253	254	\\ mr 3, 30
...	...	@@ -262,35 +263,21 @@ pub fn clone() callconv(.naked) u32 {
262	263	}
263	264
264	265	pub fn restore() callconv(.naked) noreturn {
265		switch (builtin.zig_backend) {
266		.stage2_c => asm volatile (
267		\\ li 0, %[number]
268		\\ sc
269		:
270		: [number] "i" (@backingInt(SYS.sigreturn)),
271		),
272		else => asm volatile (
273		\\ sc
274		:
275		: [number] "{r0}" (@backingInt(SYS.sigreturn)),
276		),
277		}
	266	asm volatile (
	267	\\ li 0, %[number]
	268	\\ sc
	269	:
	270	: [number] "i" (@backingInt(SYS.sigreturn)),
	271	);
278	272	}
279	273
280	274	pub fn restore_rt() callconv(.naked) noreturn {
281		switch (builtin.zig_backend) {
282		.stage2_c => asm volatile (
283		\\ li 0, %[number]
284		\\ sc
285		:
286		: [number] "i" (@backingInt(SYS.rt_sigreturn)),
287		),
288		else => asm volatile (
289		\\ sc
290		:
291		: [number] "{r0}" (@backingInt(SYS.rt_sigreturn)),
292		),
293		}
	275	asm volatile (
	276	\\ li 0, %[number]
	277	\\ sc
	278	:
	279	: [number] "i" (@backingInt(SYS.rt_sigreturn)),
	280	);
294	281	}
295	282
296	283	pub const VDSO = struct {

lib/std/os/linux/powerpc64.zig+52-66

...	...	@@ -16,7 +16,7 @@ pub fn syscall0(
16	16	\\ sc
17	17	\\ bns+ 1f
18	18	\\ neg 3, 3
19		\\ 1:
	19	\\1:
20	20	: [ret] "={r3}" (-> u64),
21	21	[r0_out] "={r0}" (r0_out),
22	22	: [number] "{r0}" (@backingInt(number)),
...	...	@@ -33,7 +33,7 @@ pub fn syscall1(
33	33	\\ sc
34	34	\\ bns+ 1f
35	35	\\ neg 3, 3
36		\\ 1:
	36	\\1:
37	37	: [ret] "={r3}" (-> u64),
38	38	[r0_out] "={r0}" (r0_out),
39	39	: [number] "{r0}" (@backingInt(number)),
...	...	@@ -53,7 +53,7 @@ pub fn syscall2(
53	53	\\ sc
54	54	\\ bns+ 1f
55	55	\\ neg 3, 3
56		\\ 1:
	56	\\1:
57	57	: [ret] "={r3}" (-> u64),
58	58	[r0_out] "={r0}" (r0_out),
59	59	[r4_out] "={r4}" (r4_out),
...	...	@@ -77,7 +77,7 @@ pub fn syscall3(
77	77	\\ sc
78	78	\\ bns+ 1f
79	79	\\ neg 3, 3
80		\\ 1:
	80	\\1:
81	81	: [ret] "={r3}" (-> u64),
82	82	[r0_out] "={r0}" (r0_out),
83	83	[r4_out] "={r4}" (r4_out),
...	...	@@ -105,7 +105,7 @@ pub fn syscall4(
105	105	\\ sc
106	106	\\ bns+ 1f
107	107	\\ neg 3, 3
108		\\ 1:
	108	\\1:
109	109	: [ret] "={r3}" (-> u64),
110	110	[r0_out] "={r0}" (r0_out),
111	111	[r4_out] "={r4}" (r4_out),
...	...	@@ -137,7 +137,7 @@ pub fn syscall5(
137	137	\\ sc
138	138	\\ bns+ 1f
139	139	\\ neg 3, 3
140		\\ 1:
	140	\\1:
141	141	: [ret] "={r3}" (-> u64),
142	142	[r0_out] "={r0}" (r0_out),
143	143	[r4_out] "={r4}" (r4_out),
...	...	@@ -173,7 +173,7 @@ pub fn syscall6(
173	173	\\ sc
174	174	\\ bns+ 1f
175	175	\\ neg 3, 3
176		\\ 1:
	176	\\1:
177	177	: [ret] "={r3}" (-> u64),
178	178	[r0_out] "={r0}" (r0_out),
179	179	[r4_out] "={r4}" (r4_out),
...	...	@@ -198,84 +198,70 @@ pub fn clone() callconv(.naked) u64 {
198	198	// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
199	199	// 0 3, 4, 5, 6, 7
200	200	asm volatile (
201		\\ # create initial stack frame for new thread
202		\\ clrrdi 4, 4, 4
203		\\ li 0, 0
204		\\ stdu 0,-32(4)
	201	\\ # create initial stack frame for new thread
	202	\\ clrrdi 4, 4, 4
	203	\\ li 0, 0
	204	\\ stdu 0,-32(4)
205	205	\\
206		\\ # save fn and arg to child stack
207		\\ std 3, 8(4)
208		\\ std 6, 16(4)
	206	\\ # save fn and arg to child stack
	207	\\ std 3, 8(4)
	208	\\ std 6, 16(4)
209	209	\\
210		\\ # shuffle args into correct registers and call SYS_clone
211		\\ mr 3, 5
212		\\ #mr 4, 4
213		\\ mr 5, 7
214		\\ mr 6, 8
215		\\ mr 7, 9
216		\\ li 0, 120 # SYS_clone = 120
217		\\ sc
	210	\\ # shuffle args into correct registers and call SYS_clone
	211	\\ mr 3, 5
	212	\\ #mr 4, 4
	213	\\ mr 5, 7
	214	\\ mr 6, 8
	215	\\ mr 7, 9
	216	\\ li 0, 120 # SYS_clone = 120
	217	\\ sc
218	218	\\
219		\\ # if error, negate return (errno)
220		\\ bns+ 1f
221		\\ neg 3, 3
	219	\\ # if error, negate return (errno)
	220	\\ bns+ 1f
	221	\\ neg 3, 3
222	222	\\
223	223	\\1:
224		\\ # if we're the parent, return
225		\\ cmpwi cr7, 3, 0
226		\\ bnelr cr7
	224	\\ # if we're the parent, return
	225	\\ cmpwi cr7, 3, 0
	226	\\ bnelr cr7
227	227	\\
228		\\ # we're the child
	228	\\ # we're the child
229	229	);
230	230	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
231		\\ .cfi_undefined lr
	231	\\ .cfi_undefined lr
232	232	);
233	233	asm volatile (
234		\\ li 31, 0
235		\\ mtlr 0
	234	\\ li 31, 0
	235	\\ mtlr 31
236	236	\\
237		\\ # call fn(arg)
238		\\ ld 3, 16(1)
239		\\ ld 12, 8(1)
240		\\ mtctr 12
241		\\ bctrl
	237	\\ # call fn(arg)
	238	\\ ld 3, 16(1)
	239	\\ ld 12, 8(1)
	240	\\ mtctr 12
	241	\\ bctrl
242	242	\\
243		\\ # call SYS_exit. exit code is already in r3 from fn return value
244		\\ li 0, 1 # SYS_exit = 1
245		\\ sc
	243	\\ # call SYS_exit. exit code is already in r3 from fn return value
	244	\\ li 0, 1 # SYS_exit = 1
	245	\\ sc
246	246	);
247	247	}
248	248
249	249	pub fn restore() callconv(.naked) noreturn {
250		switch (builtin.zig_backend) {
251		.stage2_c => asm volatile (
252		\\ li 0, %[number]
253		\\ sc
254		:
255		: [number] "i" (@backingInt(SYS.sigreturn)),
256		),
257		else => asm volatile (
258		\\ sc
259		:
260		: [number] "{r0}" (@backingInt(SYS.sigreturn)),
261		),
262		}
	250	asm volatile (
	251	\\ li 0, %[number]
	252	\\ sc
	253	:
	254	: [number] "i" (@backingInt(SYS.sigreturn)),
	255	);
263	256	}
264	257
265	258	pub fn restore_rt() callconv(.naked) noreturn {
266		switch (builtin.zig_backend) {
267		.stage2_c => asm volatile (
268		\\ li 0, %[number]
269		\\ sc
270		:
271		: [number] "i" (@backingInt(SYS.rt_sigreturn)),
272		),
273		else => asm volatile (
274		\\ sc
275		:
276		: [number] "{r0}" (@backingInt(SYS.rt_sigreturn)),
277		),
278		}
	259	asm volatile (
	260	\\ li 0, %[number]
	261	\\ sc
	262	:
	263	: [number] "i" (@backingInt(SYS.rt_sigreturn)),
	264	);
279	265	}
280	266
281	267	pub const VDSO = struct {

lib/std/os/linux/riscv32.zig+25-24

...	...	@@ -116,40 +116,41 @@ pub fn clone() callconv(.naked) u32 {
116	116	// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
117	117	// a7 a0, a1, a2, a3, a4
118	118	asm volatile (
119		\\ # Save func and arg to stack
120		\\ addi a1, a1, -8
121		\\ sw a0, 0(a1)
122		\\ sw a3, 4(a1)
	119	\\ andi a1, a1, -16
	120	\\ # Save func and arg to stack
	121	\\ addi a1, a1, -16
	122	\\ sw a0, 0(a1)
	123	\\ sw a3, 4(a1)
123	124	\\
124		\\ # Call SYS_clone
125		\\ mv a0, a2
126		\\ mv a2, a4
127		\\ mv a3, a5
128		\\ mv a4, a6
129		\\ li a7, 220 # SYS_clone
130		\\ ecall
	125	\\ # Call SYS_clone
	126	\\ mv a0, a2
	127	\\ mv a2, a4
	128	\\ mv a3, a5
	129	\\ mv a4, a6
	130	\\ li a7, 220 # SYS_clone
	131	\\ ecall
131	132	\\
132		\\ beqz a0, 1f
133		\\ # Parent
134		\\ ret
	133	\\ beqz a0, 1f
	134	\\ # Parent
	135	\\ ret
135	136	\\
136		\\ # Child
	137	\\ # Child
137	138	\\1:
138	139	);
139	140	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
140		\\ .cfi_undefined ra
	141	\\ .cfi_undefined ra
141	142	);
142	143	asm volatile (
143		\\ mv fp, zero
144		\\ mv ra, zero
	144	\\ mv fp, zero
	145	\\ mv ra, zero
145	146	\\
146		\\ lw a1, 0(sp)
147		\\ lw a0, 4(sp)
148		\\ jalr a1
	147	\\ lw a1, 0(sp)
	148	\\ lw a0, 4(sp)
	149	\\ jalr a1
149	150	\\
150		\\ # Exit
151		\\ li a7, 93 # SYS_exit
152		\\ ecall
	151	\\ # Exit
	152	\\ li a7, 93 # SYS_exit
	153	\\ ecall
153	154	);
154	155	}
155	156

lib/std/os/linux/riscv64.zig+25-24

...	...	@@ -116,40 +116,41 @@ pub fn clone() callconv(.naked) u64 {
116	116	// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
117	117	// a7 a0, a1, a2, a3, a4
118	118	asm volatile (
119		\\ # Save func and arg to stack
120		\\ addi a1, a1, -16
121		\\ sd a0, 0(a1)
122		\\ sd a3, 8(a1)
	119	\\ andi a1, a1, -16
	120	\\ # Save func and arg to stack
	121	\\ addi a1, a1, -16
	122	\\ sd a0, 0(a1)
	123	\\ sd a3, 8(a1)
123	124	\\
124		\\ # Call SYS_clone
125		\\ mv a0, a2
126		\\ mv a2, a4
127		\\ mv a3, a5
128		\\ mv a4, a6
129		\\ li a7, 220 # SYS_clone
130		\\ ecall
	125	\\ # Call SYS_clone
	126	\\ mv a0, a2
	127	\\ mv a2, a4
	128	\\ mv a3, a5
	129	\\ mv a4, a6
	130	\\ li a7, 220 # SYS_clone
	131	\\ ecall
131	132	\\
132		\\ beqz a0, 1f
133		\\ # Parent
134		\\ ret
	133	\\ beqz a0, 1f
	134	\\ # Parent
	135	\\ ret
135	136	\\
136		\\ # Child
	137	\\ # Child
137	138	\\1:
138	139	);
139	140	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
140		\\ .cfi_undefined ra
	141	\\ .cfi_undefined ra
141	142	);
142	143	asm volatile (
143		\\ mv fp, zero
144		\\ mv ra, zero
	144	\\ mv fp, zero
	145	\\ mv ra, zero
145	146	\\
146		\\ ld a1, 0(sp)
147		\\ ld a0, 8(sp)
148		\\ jalr a1
	147	\\ ld a1, 0(sp)
	148	\\ ld a0, 8(sp)
	149	\\ jalr a1
149	150	\\
150		\\ # Exit
151		\\ li a7, 93 # SYS_exit
152		\\ ecall
	151	\\ # Exit
	152	\\ li a7, 93 # SYS_exit
	153	\\ ecall
153	154	);
154	155	}
155	156

lib/std/os/linux/s390x.zig+57-72

...	...	@@ -111,98 +111,83 @@ pub fn syscall6(
111	111
112	112	pub fn clone() callconv(.naked) u64 {
113	113	asm volatile (
114		\\# int clone(
115		\\# fn, a = r2
116		\\# stack, b = r3
117		\\# flags, c = r4
118		\\# arg, d = r5
119		\\# ptid, e = r6
120		\\# tls, f = *(r15+160)
121		\\# ctid) g = *(r15+168)
122		\\#
123		\\# pseudo C code:
124		\\# tid = syscall(SYS_clone,b,c,e,g,f);
125		\\# if (!tid) syscall(SYS_exit, a(d));
126		\\# return tid;
	114	\\ # int clone(
	115	\\ # fn, a = r2
	116	\\ # stack, b = r3
	117	\\ # flags, c = r4
	118	\\ # arg, d = r5
	119	\\ # ptid, e = r6
	120	\\ # tls, f = *(r15+160)
	121	\\ # ctid) g = *(r15+168)
	122	\\ #
	123	\\ # pseudo C code:
	124	\\ # tid = syscall(SYS_clone,b,c,e,g,f);
	125	\\ # if (!tid) syscall(SYS_exit, a(d));
	126	\\ # return tid;
127	127	\\
128		\\# preserve call-saved register used as syscall arg
129		\\stg %%r6, 48(%%r15)
	128	\\ # preserve call-saved register used as syscall arg
	129	\\ stg %%r6, 48(%%r15)
130	130	\\
131		\\# create initial stack frame for new thread
132		\\nill %%r3, 0xfff8
133		\\aghi %%r3, -160
134		\\lghi %%r0, 0
135		\\stg %%r0, 0(%%r3)
	131	\\ # create initial stack frame for new thread
	132	\\ nill %%r3, 0xfff8
	133	\\ aghi %%r3, -160
	134	\\ lghi %%r0, 0
	135	\\ stg %%r0, 0(%%r3)
136	136	\\
137		\\# save fn and arg to child stack
138		\\stg %%r2, 8(%%r3)
139		\\stg %%r5, 16(%%r3)
	137	\\ # save fn and arg to child stack
	138	\\ stg %%r2, 8(%%r3)
	139	\\ stg %%r5, 16(%%r3)
140	140	\\
141		\\# shuffle args into correct registers and call SYS_clone
142		\\lgr %%r2, %%r3
143		\\lgr %%r3, %%r4
144		\\lgr %%r4, %%r6
145		\\lg %%r5, 168(%%r15)
146		\\lg %%r6, 160(%%r15)
147		\\svc 120
	141	\\ # shuffle args into correct registers and call SYS_clone
	142	\\ lgr %%r2, %%r3
	143	\\ lgr %%r3, %%r4
	144	\\ lgr %%r4, %%r6
	145	\\ lg %%r5, 168(%%r15)
	146	\\ lg %%r6, 160(%%r15)
	147	\\ svc 120
148	148	\\
149		\\# restore call-saved register
150		\\lg %%r6, 48(%%r15)
	149	\\ # restore call-saved register
	150	\\ lg %%r6, 48(%%r15)
151	151	\\
152		\\# if error or if we're the parent, return
153		\\ltgr %%r2, %%r2
154		\\bnzr %%r14
	152	\\ # if error or if we're the parent, return
	153	\\ ltgr %%r2, %%r2
	154	\\ bnzr %%r14
155	155	\\
156		\\# we're the child
	156	\\ # we're the child
157	157	);
158	158	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
159		\\.cfi_undefined %%r14
	159	\\ .cfi_undefined %%r14
160	160	);
161	161	asm volatile (
162		\\lghi %%r11, 0
163		\\lghi %%r14, 0
	162	\\ lghi %%r11, 0
	163	\\ lghi %%r14, 0
164	164	\\
165		\\# call fn(arg)
166		\\lg %%r1, 8(%%r15)
167		\\lg %%r2, 16(%%r15)
168		\\basr %%r14, %%r1
169		\\
170		\\# call SYS_exit. exit code is already in r2 from fn return value
171		\\svc 1
	165	\\ # call fn(arg)
	166	\\ lg %%r1, 8(%%r15)
	167	\\ lg %%r2, 16(%%r15)
	168	\\ basr %%r14, %%r1
172	169	\\
	170	\\ # call SYS_exit. exit code is already in r2 from fn return value
	171	\\ svc 1
173	172	);
174	173	}
175	174
176	175	pub fn restore() callconv(.naked) noreturn {
177		switch (builtin.zig_backend) {
178		.stage2_c => asm volatile (
179		\\lghi %%r1, %[number]
180		\\svc 0
181		:
182		: [number] "K" (@backingInt(SYS.sigreturn)),
183		),
184		else => asm volatile (
185		\\svc 0
186		:
187		: [number] "{r1}" (@backingInt(SYS.sigreturn)),
188		),
189		}
	176	asm volatile (
	177	\\ lghi %%r1, %[number]
	178	\\ svc 0
	179	:
	180	: [number] "K" (@backingInt(SYS.sigreturn)),
	181	);
190	182	}
191	183
192	184	pub fn restore_rt() callconv(.naked) noreturn {
193		switch (builtin.zig_backend) {
194		.stage2_c => asm volatile (
195		\\lghi %%r1, %[number]
196		\\svc 0
197		:
198		: [number] "K" (@backingInt(SYS.rt_sigreturn)),
199		),
200		else => asm volatile (
201		\\svc 0
202		:
203		: [number] "{r1}" (@backingInt(SYS.rt_sigreturn)),
204		),
205		}
	185	asm volatile (
	186	\\ lghi %%r1, %[number]
	187	\\ svc 0
	188	:
	189	: [number] "K" (@backingInt(SYS.rt_sigreturn)),
	190	);
206	191	}
207	192
208	193	pub const time_t = i64;

lib/std/os/linux/sh.zig+2-2

...	...	@@ -167,8 +167,8 @@ pub fn clone() callconv(.naked) u32 {
167	167	\\ mov #120, r3 ! SYS_clone
168	168	\\ mov r6, r4
169	169	\\ mov.l @r15, r6
170		\\ mov.l @(r15, 8), r7
171		\\ mov.l @(r15, 4), r0
	170	\\ mov.l @(8, r15), r7
	171	\\ mov.l @(4, r15), r0
172	172	\\ trapa #31
173	173	\\ or r0, r0
174	174	\\ or r0, r0

lib/std/os/linux/sparc.zig+2-2

...	...	@@ -214,11 +214,11 @@ pub fn clone() callconv(.naked) u32 {
214	214	\\
215	215	\\ # Align, and add some extra space for the initial frame
216	216	\\ and %%i1, -8, %%i1
217		\\ sub %%i1, 96 + 2047, %%o1
	217	\\ sub %%i1, 96, %%o1
218	218	\\
219	219	\\ mov %%i4, %%o2
220	220	\\ mov %%i5, %%o3
221		\\ ld [%%fp + 92 + 2047], %%o4
	221	\\ ld [%%fp + 92], %%o4
222	222	\\ t 0x10
223	223	\\ bcs 1f
224	224	\\ nop

lib/std/os/linux/tls.zig+8-8

...	...	@@ -261,10 +261,9 @@ pub fn setThreadPointer(addr: usize) void {
261	261	},
262	262	.alpha => {
263	263	asm volatile (
264		\\ lda $16, 0(%[addr])
265	264	\\ wruniq
266	265	:
267		: [addr] "r" (addr),
	266	: [addr] "{$16}" (addr),
268	267	);
269	268	},
270	269	.arc, .arceb => {
...	...	@@ -282,7 +281,7 @@ pub fn setThreadPointer(addr: usize) void {
282	281	assert(rc == 0);
283	282	},
284	283	.m68k => {
285		const rc = linux.syscall1(.set_thread_area, addr);
	284	const rc = @call(.always_inline, linux.syscall1, .{ .set_thread_area, addr });
286	285	assert(rc == 0);
287	286	},
288	287	.hexagon => {
...	...	@@ -295,9 +294,10 @@ pub fn setThreadPointer(addr: usize) void {
295	294	.hppa => {
296	295	asm volatile (
297	296	\\ ble 0xe0(%%sr2, %%r0)
	297	\\ nop
298	298	:
299		: [addr] "={r26}" (addr),
300		: .{ .r29 = true });
	299	: [addr] "{r26}" (addr),
	300	: .{ .r31 = true });
301	301	},
302	302	.loongarch32, .loongarch64 => {
303	303	asm volatile (
...	...	@@ -357,7 +357,7 @@ pub fn setThreadPointer(addr: usize) void {
357	357	},
358	358	.sh, .sheb => {
359	359	asm volatile (
360		\\ ldc gbr, %[addr]
	360	\\ ldc %[addr], gbr
361	361	:
362	362	: [addr] "r" (addr),
363	363	);
...	...	@@ -417,7 +417,7 @@ pub fn getThreadPointer() usize {
417	417	\\ move %[ret], $tp
418	418	: [ret] "=r" (-> usize),
419	419	),
420		.m68k => linux.syscall1(.get_thread_area),
	420	.m68k => linux.syscall0(.get_thread_area),
421	421	.mips, .mipsel, .mips64, .mips64el => asm (
422	422	\\ rdhwr %[ret], $29
423	423	: [ret] "=r" (-> usize),
...	...	@@ -449,7 +449,7 @@ pub fn getThreadPointer() usize {
449	449	: [ret] "=r" (-> usize),
450	450	),
451	451	.sh, .sheb => asm (
452		\\ stc %[ret], gbr
	452	\\ stc gbr, %[ret]
453	453	: [ret] "=r" (-> usize),
454	454	),
455	455	.sparc, .sparc64 => asm (

lib/std/os/linux/x32.zig+27-35

...	...	@@ -125,54 +125,46 @@ pub fn syscall_lseek(
125	125
126	126	pub fn clone() callconv(.naked) u32 {
127	127	asm volatile (
128		\\ movl $0x40000038,%%eax // SYS_clone
129		\\ mov %%rdi,%%r11
130		\\ mov %%rdx,%%rdi
131		\\ mov %%r8,%%rdx
132		\\ mov %%r9,%%r8
133		\\ mov 8(%%rsp),%%r10d
134		\\ mov %%r11,%%r9
135		\\ and $-16,%%rsi
136		\\ sub $8,%%rsi
137		\\ mov %%rcx,(%%rsi)
138		\\ syscall
139		\\ test %%eax,%%eax
140		\\ jz 1f
141		\\ ret
	128	\\ movl $0x40000038,%%eax // SYS_clone
	129	\\ mov %%rdi,%%r11
	130	\\ mov %%rdx,%%rdi
	131	\\ mov %%r8,%%rdx
	132	\\ mov %%r9,%%r8
	133	\\ mov 8(%%rsp),%%r10d
	134	\\ mov %%r11,%%r9
	135	\\ and $-16,%%rsi
	136	\\ sub $8,%%rsi
	137	\\ mov %%rcx,(%%rsi)
	138	\\ syscall
	139	\\ test %%eax,%%eax
	140	\\ jz 1f
	141	\\ ret
142	142	\\
143	143	\\1:
144	144	);
145	145	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
146		\\ .cfi_undefined %%rip
	146	\\ .cfi_undefined %%rip
147	147	);
148	148	asm volatile (
149		\\ xor %%ebp,%%ebp
150		\\
151		\\ pop %%rdi
152		\\ call *%%r9
153		\\ mov %%eax,%%edi
154		\\ movl $0x4000003c,%%eax // SYS_exit
155		\\ syscall
	149	\\ xor %%ebp,%%ebp
156	150	\\
	151	\\ pop %%rdi
	152	\\ call *%%r9
	153	\\ mov %%eax,%%edi
	154	\\ movl $0x4000003c,%%eax // SYS_exit
	155	\\ syscall
157	156	);
158	157	}
159	158
160	159	pub const restore = restore_rt;
161	160
162	161	pub fn restore_rt() callconv(.naked) noreturn {
163		switch (builtin.zig_backend) {
164		.stage2_c => asm volatile (
165		\\ movl %[number], %%eax
166		\\ syscall
167		:
168		: [number] "i" (@backingInt(SYS.rt_sigreturn)),
169		),
170		else => asm volatile (
171		\\ syscall
172		:
173		: [number] "{rax}" (@backingInt(SYS.rt_sigreturn)),
174		),
175		}
	162	asm volatile (
	163	\\ movl %[number], %%eax
	164	\\ syscall
	165	:
	166	: [number] "i" (@backingInt(SYS.rt_sigreturn)),
	167	);
176	168	}
177	169
178	170	pub const time_t = i64;

lib/std/os/linux/x86.zig+46-61

...	...	@@ -142,81 +142,66 @@ pub fn clone() callconv(.naked) u32 {
142	142	// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
143	143	// eax, ebx, ecx, edx, esi, edi
144	144	asm volatile (
145		\\ pushl %%ebp
146		\\ movl %%esp,%%ebp
147		\\ pushl %%ebx
148		\\ pushl %%esi
149		\\ pushl %%edi
150		\\ // Setup the arguments
151		\\ movl 16(%%ebp),%%ebx
152		\\ movl 12(%%ebp),%%ecx
153		\\ andl $-16,%%ecx
154		\\ subl $20,%%ecx
155		\\ movl 20(%%ebp),%%eax
156		\\ movl %%eax,4(%%ecx)
157		\\ movl 8(%%ebp),%%eax
158		\\ movl %%eax,0(%%ecx)
159		\\ movl 24(%%ebp),%%edx
160		\\ movl 28(%%ebp),%%esi
161		\\ movl 32(%%ebp),%%edi
162		\\ movl $120,%%eax // SYS_clone
163		\\ int $128
164		\\ testl %%eax,%%eax
165		\\ jz 1f
166		\\ popl %%edi
167		\\ popl %%esi
168		\\ popl %%ebx
169		\\ popl %%ebp
170		\\ retl
	145	\\ pushl %%ebp
	146	\\ movl %%esp,%%ebp
	147	\\ pushl %%ebx
	148	\\ pushl %%esi
	149	\\ pushl %%edi
	150	\\ // Setup the arguments
	151	\\ movl 16(%%ebp),%%ebx
	152	\\ movl 12(%%ebp),%%ecx
	153	\\ andl $-16,%%ecx
	154	\\ subl $20,%%ecx
	155	\\ movl 20(%%ebp),%%eax
	156	\\ movl %%eax,4(%%ecx)
	157	\\ movl 8(%%ebp),%%eax
	158	\\ movl %%eax,0(%%ecx)
	159	\\ movl 24(%%ebp),%%edx
	160	\\ movl 28(%%ebp),%%esi
	161	\\ movl 32(%%ebp),%%edi
	162	\\ movl $120,%%eax // SYS_clone
	163	\\ int $128
	164	\\ testl %%eax,%%eax
	165	\\ jz 1f
	166	\\ popl %%edi
	167	\\ popl %%esi
	168	\\ popl %%ebx
	169	\\ popl %%ebp
	170	\\ retl
171	171	\\
172	172	\\1:
173	173	);
174	174	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
175		\\ .cfi_undefined %%eip
	175	\\ .cfi_undefined %%eip
176	176	);
177	177	asm volatile (
178		\\ xorl %%ebp,%%ebp
	178	\\ xorl %%ebp,%%ebp
179	179	\\
180		\\ popl %%eax
181		\\ calll *%%eax
182		\\ movl %%eax,%%ebx
183		\\ movl $1,%%eax // SYS_exit
184		\\ int $128
	180	\\ popl %%eax
	181	\\ calll *%%eax
	182	\\ movl %%eax,%%ebx
	183	\\ movl $1,%%eax // SYS_exit
	184	\\ int $128
185	185	);
186	186	}
187	187
188	188	pub fn restore() callconv(.naked) noreturn {
189		switch (builtin.zig_backend) {
190		.stage2_c => asm volatile (
191		\\ addl $4, %%esp
192		\\ movl %[number], %%eax
193		\\ int $0x80
194		:
195		: [number] "i" (@backingInt(SYS.sigreturn)),
196		),
197		else => asm volatile (
198		\\ addl $4, %%esp
199		\\ int $0x80
200		:
201		: [number] "{eax}" (@backingInt(SYS.sigreturn)),
202		),
203		}
	189	asm volatile (
	190	\\ addl $4, %%esp
	191	\\ movl %[number], %%eax
	192	\\ int $0x80
	193	:
	194	: [number] "i" (@backingInt(SYS.sigreturn)),
	195	);
204	196	}
205	197
206	198	pub fn restore_rt() callconv(.naked) noreturn {
207		switch (builtin.zig_backend) {
208		.stage2_c => asm volatile (
209		\\ movl %[number], %%eax
210		\\ int $0x80
211		:
212		: [number] "i" (@backingInt(SYS.rt_sigreturn)),
213		),
214		else => asm volatile (
215		\\ int $0x80
216		:
217		: [number] "{eax}" (@backingInt(SYS.rt_sigreturn)),
218		),
219		}
	199	asm volatile (
	200	\\ movl %[number], %%eax
	201	\\ int $0x80
	202	:
	203	: [number] "i" (@backingInt(SYS.rt_sigreturn)),
	204	);
220	205	}
221	206
222	207	pub const VDSO = struct {

lib/std/os/linux/x86_64.zig+27-35

...	...	@@ -111,54 +111,46 @@ pub fn syscall6(
111	111
112	112	pub fn clone() callconv(.naked) u64 {
113	113	asm volatile (
114		\\ movl $56,%%eax // SYS_clone
115		\\ movq %%rdi,%%r11
116		\\ movq %%rdx,%%rdi
117		\\ movq %%r8,%%rdx
118		\\ movq %%r9,%%r8
119		\\ movq 8(%%rsp),%%r10
120		\\ movq %%r11,%%r9
121		\\ andq $-16,%%rsi
122		\\ subq $8,%%rsi
123		\\ movq %%rcx,(%%rsi)
124		\\ syscall
125		\\ testq %%rax,%%rax
126		\\ jz 1f
127		\\ retq
	114	\\ movl $56,%%eax // SYS_clone
	115	\\ movq %%rdi,%%r11
	116	\\ movq %%rdx,%%rdi
	117	\\ movq %%r8,%%rdx
	118	\\ movq %%r9,%%r8
	119	\\ movq 8(%%rsp),%%r10
	120	\\ movq %%r11,%%r9
	121	\\ andq $-16,%%rsi
	122	\\ subq $8,%%rsi
	123	\\ movq %%rcx,(%%rsi)
	124	\\ syscall
	125	\\ testq %%rax,%%rax
	126	\\ jz 1f
	127	\\ retq
128	128	\\
129	129	\\1:
130	130	);
131	131	if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
132		\\ .cfi_undefined %%rip
	132	\\ .cfi_undefined %%rip
133	133	);
134	134	asm volatile (
135		\\ xorl %%ebp,%%ebp
136		\\
137		\\ popq %%rdi
138		\\ callq *%%r9
139		\\ movl %%eax,%%edi
140		\\ movl $60,%%eax // SYS_exit
141		\\ syscall
	135	\\ xorl %%ebp,%%ebp
142	136	\\
	137	\\ popq %%rdi
	138	\\ callq *%%r9
	139	\\ movl %%eax,%%edi
	140	\\ movl $60,%%eax // SYS_exit
	141	\\ syscall
143	142	);
144	143	}
145	144
146	145	pub const restore = restore_rt;
147	146
148	147	pub fn restore_rt() callconv(.naked) noreturn {
149		switch (builtin.zig_backend) {
150		.stage2_c => asm volatile (
151		\\ movl %[number], %%eax
152		\\ syscall
153		:
154		: [number] "i" (@backingInt(SYS.rt_sigreturn)),
155		),
156		else => asm volatile (
157		\\ syscall
158		:
159		: [number] "{rax}" (@backingInt(SYS.rt_sigreturn)),
160		),
161		}
	148	asm volatile (
	149	\\ movl %[number], %%eax
	150	\\ syscall
	151	:
	152	: [number] "i" (@backingInt(SYS.rt_sigreturn)),
	153	);
162	154	}
163	155
164	156	pub const time_t = i64;

lib/std/os/linux/xtensa.zig+6-13

...	...	@@ -173,19 +173,12 @@ pub fn clone() callconv(.naked) u32 {
173	173	pub const restore = restore_rt;
174	174
175	175	pub fn restore_rt() callconv(.naked) noreturn {
176		switch (builtin.zig_backend) {
177		.stage2_c => asm volatile (
178		\\ movi a2, %[number]
179		\\ syscall
180		:
181		: [number] "I" (@backingInt(SYS.rt_sigreturn)),
182		),
183		else => asm volatile (
184		\\ syscall
185		:
186		: [number] "{a2}" (@backingInt(SYS.rt_sigreturn)),
187		),
188		}
	176	asm volatile (
	177	\\ movi a2, %[number]
	178	\\ syscall
	179	:
	180	: [number] "I" (@backingInt(SYS.rt_sigreturn)),
	181	);
189	182	}
190	183
191	184	pub const VDSO = void;

lib/std/pie.zig+42-21

...	...	@@ -83,7 +83,7 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
83	83	\\ add %[ret], pc
84	84	\\ b 2f
85	85	\\1:
86		\\ .word _DYNAMIC-1b
	86	\\ .word _DYNAMIC - 1b
87	87	\\2:
88	88	: [ret] "=r" (-> [*]const elf.Dyn),
89	89	),
...	...	@@ -97,20 +97,29 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
97	97	),
98	98	// The compiler is not required to load the GP register, so do it ourselves.
99	99	.alpha => asm volatile (
	100	\\ .weak _DYNAMIC
	101	\\ .hidden _DYNAMIC
100	102	\\ br $29, 1f
101	103	\\1:
102	104	\\ ldgp $29, 0($29)
103		\\ ldq %[ret], -0x8000($29)
	105	\\ ldah %[ret], _DYNAMIC($29) !gprelhigh
	106	\\ lda %[ret], _DYNAMIC(%[ret]) !gprellow
104	107	: [ret] "=r" (-> [*]const elf.Dyn),
105	108	:
106		: .{ .r26 = true, .r29 = true }),
107		// The CSKY ABI requires the gb register to point to the GOT. Additionally, the first
108		// entry in the GOT is defined to hold the address of _DYNAMIC.
	109	: .{ .r29 = true }),
109	110	.csky => asm volatile (
110		\\ mov %[ret], gb
111		\\ ldw %[ret], %[ret]
	111	\\ .weak _DYNAMIC
	112	\\ .hidden _DYNAMIC
	113	\\ grs %[ret], 1f
	114	\\ br 2f
	115	\\1:
	116	\\ .long _DYNAMIC - 1b
	117	\\2:
	118	\\ ldw r12, (%[ret], 0)
	119	\\ addu %[ret], %[ret], r12
112	120	: [ret] "=r" (-> [*]const elf.Dyn),
113		),
	121	:
	122	: .{ .r12 = true }),
114	123	.hexagon => asm volatile (
115	124	\\ .weak _DYNAMIC
116	125	\\ .hidden _DYNAMIC
...	...	@@ -143,12 +152,20 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
143	152	\\ .hidden _DYNAMIC
144	153	\\ lea _DYNAMIC - . - 8, %[ret]
145	154	\\ lea (%[ret], %%pc), %[ret]
146		: [ret] "=r" (-> [*]const elf.Dyn),
	155	: [ret] "=a" (-> [*]const elf.Dyn),
147	156	),
148	157	.microblaze, .microblazeel => asm volatile (
149		\\ lwi %[ret], r20, 0
	158	\\ .weak _DYNAMIC
	159	\\ .hidden _DYNAMIC
	160	\\ mfs %[ret], rpc
	161	\\ bri 1f
	162	\\ .word _DYNAMIC - . + 8
	163	\\1:
	164	\\ lwi r18, %[ret], 8
	165	\\ add %[ret], %[ret], r18
150	166	: [ret] "=r" (-> [*]const elf.Dyn),
151		),
	167	:
	168	: .{ .r18 = true }),
152	169	.mips, .mipsel => asm volatile (
153	170	\\ .weak _DYNAMIC
154	171	\\ .hidden _DYNAMIC
...	...	@@ -190,6 +207,7 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
190	207	\\ .weak _DYNAMIC
191	208	\\ .hidden _DYNAMIC
192	209	\\ l.jal 1f
	210	\\ l.nop
193	211	\\ .word _DYNAMIC - .
194	212	\\1:
195	213	\\ l.lwz %[ret], 0(r9)
...	...	@@ -212,11 +230,13 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
212	230	.powerpc64, .powerpc64le => asm volatile (
213	231	\\ .weak _DYNAMIC
214	232	\\ .hidden _DYNAMIC
	233	\\ .balign 8
215	234	\\ bl 1f
	235	\\ nop
216	236	\\ .quad _DYNAMIC - .
217	237	\\1:
218	238	\\ mflr %[ret]
219		\\ ld 4, 0(%[ret])
	239	\\ ld 4, 4(%[ret])
220	240	\\ add %[ret], 4, %[ret]
221	241	: [ret] "=r" (-> [*]const elf.Dyn),
222	242	:
...	...	@@ -245,24 +265,25 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
245	265	\\ mov.l 1f, %[ret]
246	266	\\ add r0, %[ret]
247	267	\\ bra 2f
248		\\1:
	268	\\ nop
249	269	\\ .balign 4
250		\\ .long DYNAMIC - .
	270	\\1:
	271	\\ .long _DYNAMIC - .
251	272	\\2:
252	273	: [ret] "=r" (-> [*]const elf.Dyn),
253	274	:
254	275	: .{ .r0 = true }),
255		// The compiler does not necessarily have any obligation to load the `l7` register (pointing
256		// to the GOT), so do it ourselves just in case.
257	276	.sparc, .sparc64 => asm volatile (
258		\\ sethi %%hi(_GLOBAL_OFFSET_TABLE_ - 4), %%l7
	277	\\ .weak _DYNAMIC
	278	\\ .hidden _DYNAMIC
	279	\\ sethi %%pc22(_DYNAMIC - 4), %[ret]
259	280	\\ call 1f
260		\\ add %%l7, %%lo(_GLOBAL_OFFSET_TABLE_ + 4), %%l7
	281	\\ add %[ret], %%pc10(_DYNAMIC + 4), %[ret]
261	282	\\1:
262		\\ add %%l7, %%o7, %[ret]
	283	\\ add %[ret], %%o7, %[ret]
263	284	: [ret] "=r" (-> [*]const elf.Dyn),
264	285	:
265		: .{ .l7 = true }),
	286	: .{ .o7 = true }),
266	287	.xtensa, .xtensaeb => asm volatile (
267	288	\\ .weak _DYNAMIC
268	289	\\ .hidden _DYNAMIC
...	...	@@ -274,7 +295,7 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
274	295	\\ .balign 4
275	296	\\ .word _DYNAMIC - .
276	297	\\1:
277		\\ add a0, a0, 1
	298	\\ addi a0, a0, 1
278	299	\\ l32i a8, a0, 0
279	300	\\ add %[ret], a0, a8
280	301	: [ret] "=a" (-> [*]const elf.Dyn),

lib/std/start.zig+26-20

...	...	@@ -247,7 +247,7 @@ fn _start() callconv(.naked) noreturn {
247	247	\\ mov $30, $16
248	248	\\ ldi $1, -16
249	249	\\ and $30, $30, $1
250		\\ jsr $26, %[posixCallMainAndExit]
	250	\\ br $31, %[posixCallMainAndExit]
251	251	,
252	252	.arc, .arceb =>
253	253	// ARC v1 and v2 had a very low stack alignment requirement of 4; v3 increased it to 16.
...	...	@@ -276,14 +276,16 @@ fn _start() callconv(.naked) noreturn {
276	276	// `_DYNAMIC` as well.
277	277	// r8 = FP
278	278	\\ grs t0, 1f
279		\\ 1:
	279	\\1:
280	280	\\ lrw gb, 1b@GOTPC
281	281	\\ addu gb, t0
282	282	\\ movi r8, 0
283	283	\\ movi lr, 0
284	284	\\ mov a0, sp
285		\\ andi sp, sp, -8
286		\\ jmpi %[posixCallMainAndExit]
	285	\\ andni sp, sp, 7
	286	\\ lrw t1, %[posixCallMainAndExit]@GOTOFF
	287	\\ addu t1, gb
	288	\\ jmp t1
287	289	,
288	290	.hexagon =>
289	291	// r29 = SP, r30 = FP, r31 = LR
...	...	@@ -293,7 +295,7 @@ fn _start() callconv(.naked) noreturn {
293	295	\\ r29 = and(r29, #-8)
294	296	\\ memw(r29 + #-8) = r29
295	297	\\ r29 = add(r29, #-8)
296		\\ call %[posixCallMainAndExit]
	298	\\ jump %[posixCallMainAndExit]
297	299	,
298	300	.kvx =>
299	301	\\ make $fp = 0
...	...	@@ -324,15 +326,17 @@ fn _start() callconv(.naked) noreturn {
324	326	\\ l.ori r2, r0, 0
325	327	\\ l.ori r9, r0, 0
326	328	\\ l.ori r3, r1, 0
327		\\ l.andi r1, r1, -4
328		\\ l.jal %[posixCallMainAndExit]
	329	\\ l.addi r13, r0, -4
	330	\\ l.and r1, r1, r13
	331	\\ l.j %[posixCallMainAndExit]
	332	\\ l.nop
329	333	,
330	334	.riscv32, .riscv32be, .riscv64, .riscv64be =>
331	335	\\ li fp, 0
332	336	\\ li ra, 0
333	337	\\ mv a0, sp
334	338	\\ andi sp, sp, -16
335		\\ tail %[posixCallMainAndExit]@plt
	339	\\ tail %[posixCallMainAndExit]
336	340	,
337	341	.m68k =>
338	342	// Note that the - 8 is needed because pc in the jsr instruction points into the middle
...	...	@@ -354,7 +358,7 @@ fn _start() callconv(.naked) noreturn {
354	358	\\ or %%r1, %%r0, %%r0
355	359	\\ or %%r2, %%r31, %%r0
356	360	\\ clr %%r31, %%r31, 4<0>
357		\\ br.n %[posixCallMainAndExit]
	361	\\ br %[posixCallMainAndExit]
358	362	,
359	363	.microblaze, .microblazeel =>
360	364	// r1 = SP, r15 = LR, r19 = FP, r20 = GP
...	...	@@ -364,7 +368,7 @@ fn _start() callconv(.naked) noreturn {
364	368	\\ addi r20, r20, _GLOBAL_OFFSET_TABLE_ + 8
365	369	\\ ori r5, r1, 0
366	370	\\ andi r1, r1, -4
367		\\ brlid r15, %[posixCallMainAndExit]
	371	\\ bri %[posixCallMainAndExit]
368	372	,
369	373	.mips, .mipsel =>
370	374	\\ move $fp, $zero
...	...	@@ -383,7 +387,7 @@ fn _start() callconv(.naked) noreturn {
383	387	\\ move $a0, $sp
384	388	\\ and $sp, -8
385	389	\\ subu $sp, $sp, 16
386		\\ jalr $t9
	390	\\ jr $t9
387	391	,
388	392	.mips64, .mips64el => switch (builtin.abi) {
389	393	.gnuabin32, .muslabin32, .abin32 =>
...	...	@@ -399,9 +403,9 @@ fn _start() callconv(.naked) noreturn {
399	403	\\ addu $t9, $t9, $gp
400	404	\\ move $ra, $zero
401	405	\\ move $a0, $sp
402		\\ and $sp, -8
	406	\\ and $sp, -16
403	407	\\ subu $sp, $sp, 16
404		\\ jalr $t9
	408	\\ jr $t9
405	409	,
406	410	else =>
407	411	\\ move $fp, $zero
...	...	@@ -422,7 +426,7 @@ fn _start() callconv(.naked) noreturn {
422	426	\\ move $a0, $sp
423	427	\\ and $sp, -16
424	428	\\ dsubu $sp, $sp, 16
425		\\ jalr $t9
	429	\\ jr $t9
426	430	,
427	431	},
428	432	.powerpc, .powerpcle =>
...	...	@@ -434,7 +438,7 @@ fn _start() callconv(.naked) noreturn {
434	438	\\ stwu 1, -16(1)
435	439	\\ stw 0, 0(1)
436	440	\\ li 31, 0
437		\\ mtlr 0
	441	\\ mtlr 31
438	442	\\ b %[posixCallMainAndExit]
439	443	,
440	444	.powerpc64, .powerpc64le =>
...	...	@@ -447,7 +451,7 @@ fn _start() callconv(.naked) noreturn {
447	451	\\ li 0, 0
448	452	\\ stdu 0, -32(1)
449	453	\\ li 31, 0
450		\\ mtlr 0
	454	\\ mtlr 31
451	455	\\ b %[posixCallMainAndExit]
452	456	\\ nop
453	457	,
...	...	@@ -472,12 +476,14 @@ fn _start() callconv(.naked) noreturn {
472	476	\\ mov r15, r4
473	477	\\ mov #-4, r0
474	478	\\ and r0, r15
	479	\\ mova 2f, r0
475	480	\\ mov.l 2f, r1
476		\\1:
477		\\ bsrf r1
478		\\2:
	481	\\ add r0, r1
	482	\\ jmp @r1
	483	\\ nop
479	484	\\ .balign 4
480		\\ .long %[posixCallMainAndExit]@PCREL - (1b + 4 - .)
	485	\\1:
	486	\\ .long %[posixCallMainAndExit] - .
481	487	,
482	488	.sparc =>
483	489	// argc is stored after a register window (16 registers * 4 bytes).

author	Alex Rønne Petersen <alex@alexrp.com> 2026-08-10 22:18:25+02:00
committer	Alex Rønne Petersen <alex@alexrp.com> 2026-08-10 22:18:25+02:00
log	6217b02f2540e32acedee8d0f2f3830ea8ae0d28
tree	c96b867a46dc16a336d77c62cf9aad1fa7030c9a
parent	f6e32d1b3a5de1626c3fdf5527b565dae1c501a0
parent	8217f26ef8ddab9eb02a9d380d6509c39ac2d0f3

Merge pull request 'std: inline assembly cleanup and fixes' (#36459) from alexrp/zig:asm-cleanup into master