authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-02-20 13:51:13+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-02-22 21:56:34+01:00
log630da643c664591846c295d75277475ca1801d75
tree636bee53f5a374f2970c6d3022bfa3e5ff9fcb5b
parent478f7700533097b92820dafd3003af6320fd3c85

x64: pass pointer to stack for return value in .rdi register


1 files changed, 82 insertions(+), 208 deletions(-)

src/arch/x86_64/CodeGen.zig+82-208
......@@ -870,7 +870,7 @@ pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void
870870 assert(reg.to64() == reg_mcv.register.to64());
871871 const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
872872 try branch.inst_table.put(self.gpa, inst, stack_mcv);
873 try self.genSetStack(self.air.typeOfIndex(inst), stack_mcv.stack_offset, reg_mcv);
873 try self.genSetStack(self.air.typeOfIndex(inst), stack_mcv.stack_offset, .rbp, reg_mcv);
874874}
875875
876876/// Copies a value to a register without tracking the register. The register is not considered
......@@ -1146,8 +1146,8 @@ fn airSlice(self: *Self, inst: Air.Inst.Index) !void {
11461146 const len_ty = self.air.typeOf(bin_op.rhs);
11471147
11481148 const stack_offset = @intCast(i32, try self.allocMem(inst, 16, 16));
1149 try self.genSetStack(ptr_ty, stack_offset, ptr);
1150 try self.genSetStack(len_ty, stack_offset - 8, len);
1149 try self.genSetStack(ptr_ty, stack_offset, .rbp, ptr);
1150 try self.genSetStack(len_ty, stack_offset - 8, .rbp, len);
11511151 const result = MCValue{ .stack_offset = stack_offset };
11521152
11531153 return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none });
......@@ -1856,7 +1856,7 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void {
18561856 @intCast(u32, array_ty.abiSize(self.target.*)),
18571857 array_ty.abiAlignment(self.target.*),
18581858 ));
1859 try self.genSetStack(array_ty, off, array);
1859 try self.genSetStack(array_ty, off, .rbp, array);
18601860 break :inner off;
18611861 },
18621862 .stack_offset => |off| {
......@@ -2089,10 +2089,10 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
20892089 if (abi_size <= 8) {
20902090 const tmp_reg = try self.register_manager.allocReg(null);
20912091 try self.load(.{ .register = tmp_reg }, ptr, ptr_ty);
2092 return self.genSetStack(elem_ty, off, MCValue{ .register = tmp_reg });
2092 return self.genSetStack(elem_ty, off, .rbp, MCValue{ .register = tmp_reg });
20932093 }
20942094
2095 try self.genInlineMemcpy(off, .rbp, elem_ty, ptr);
2095 try self.genInlineMemcpy(off, elem_ty, ptr, .{});
20962096 },
20972097 else => return self.fail("TODO implement loading from register into {}", .{dst_mcv}),
20982098 }
......@@ -2187,7 +2187,7 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
21872187 try self.store(.{ .register = reg }, value, ptr_ty, value_ty);
21882188 },
21892189 .ptr_stack_offset => |off| {
2190 try self.genSetStack(value_ty, off, value);
2190 try self.genSetStack(value_ty, off, .rbp, value);
21912191 },
21922192 .ptr_embedded_in_code => |off| {
21932193 try self.setRegOrMem(value_ty, .{ .embedded_in_code = off }, value);
......@@ -2661,7 +2661,7 @@ fn genBinMathOpMir(self: *Self, mir_tag: Mir.Inst.Tag, dst_ty: Type, dst_mcv: MC
26612661
26622662 switch (src_mcv) {
26632663 .none => unreachable,
2664 .undef => return self.genSetStack(dst_ty, off, .undef),
2664 .undef => return self.genSetStack(dst_ty, off, .rbp, .undef),
26652665 .dead, .unreach => unreachable,
26662666 .ptr_stack_offset => unreachable,
26672667 .ptr_embedded_in_code => unreachable,
......@@ -2804,7 +2804,7 @@ fn genIMulOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: MCValue) !
28042804 .stack_offset => |off| {
28052805 switch (src_mcv) {
28062806 .none => unreachable,
2807 .undef => return self.genSetStack(dst_ty, off, .undef),
2807 .undef => return self.genSetStack(dst_ty, off, .rbp, .undef),
28082808 .dead, .unreach => unreachable,
28092809 .ptr_stack_offset => unreachable,
28102810 .ptr_embedded_in_code => unreachable,
......@@ -2822,7 +2822,7 @@ fn genIMulOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: MCValue) !
28222822 .data = undefined,
28232823 });
28242824 // copy dst_reg back out
2825 return self.genSetStack(dst_ty, off, MCValue{ .register = dst_reg });
2825 return self.genSetStack(dst_ty, off, .rbp, MCValue{ .register = dst_reg });
28262826 },
28272827 .immediate => |imm| {
28282828 _ = imm;
......@@ -2920,6 +2920,18 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
29202920 var info = try self.resolveCallingConventionValues(fn_ty);
29212921 defer info.deinit(self);
29222922
2923 if (info.return_value == .stack_offset) {
2924 const ret_ty = fn_ty.fnReturnType();
2925 const ret_abi_size = @intCast(u32, ret_ty.abiSize(self.target.*));
2926 const ret_abi_align = @intCast(u32, ret_ty.abiAlignment(self.target.*));
2927 const stack_offset = @intCast(i32, try self.allocMem(inst, ret_abi_size, ret_abi_align));
2928
2929 try self.register_manager.getReg(.rdi, inst);
2930 try self.genSetReg(Type.usize, .rdi, .{ .ptr_stack_offset = stack_offset });
2931
2932 info.return_value.stack_offset = stack_offset;
2933 }
2934
29232935 for (args) |arg, arg_i| {
29242936 const mc_arg = info.args[arg_i];
29252937 const arg_ty = self.air.typeOf(arg);
......@@ -3112,15 +3124,6 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
31123124 );
31133125 }
31143126 },
3115 .stack_offset => {
3116 // TODO what a waste...
3117 const ret_ty = fn_ty.fnReturnType();
3118 const ret_abi_size = @intCast(u32, ret_ty.abiSize(self.target.*));
3119 const ret_abi_align = @intCast(u32, ret_ty.abiAlignment(self.target.*));
3120 const stack_offset = @intCast(i32, try self.allocMem(inst, ret_abi_size, ret_abi_align));
3121 try self.genInlineMemcpyTODO(stack_offset, .rbp, ret_ty, info.return_value);
3122 break :result MCValue{ .stack_offset = stack_offset };
3123 },
31243127 else => {},
31253128 }
31263129 break :result info.return_value;
......@@ -3142,17 +3145,14 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
31423145
31433146fn ret(self: *Self, mcv: MCValue) !void {
31443147 const ret_ty = self.fn_type.fnReturnType();
3145 const ret_mcv = blk: {
3146 switch (self.ret_mcv) {
3147 .stack_offset => |off| {
3148 // Adjust the stack offset
3149 const offset = @intCast(i32, self.max_end_stack) - off + 16;
3150 break :blk MCValue{ .stack_offset = -offset };
3151 },
3152 else => break :blk self.ret_mcv,
3153 }
3154 };
3155 try self.setRegOrMem(ret_ty, ret_mcv, mcv);
3148 switch (self.ret_mcv) {
3149 .stack_offset => {
3150 try self.genSetStack(ret_ty, 0, .rdi, mcv);
3151 },
3152 else => {
3153 try self.setRegOrMem(ret_ty, self.ret_mcv, mcv);
3154 },
3155 }
31563156 // TODO when implementing defer, this will need to jump to the appropriate defer expression.
31573157 // TODO optimization opportunity: figure out when we can emit this as a 2 byte instruction
31583158 // which is available if the jump is 127 bytes or less forward.
......@@ -3879,7 +3879,7 @@ fn setRegOrMem(self: *Self, ty: Type, loc: MCValue, val: MCValue) !void {
38793879 .none => return,
38803880 .immediate => unreachable,
38813881 .register => |reg| return self.genSetReg(ty, reg, val),
3882 .stack_offset => |off| return self.genSetStack(ty, off, val),
3882 .stack_offset => |off| return self.genSetStack(ty, off, .rbp, val),
38833883 .memory => {
38843884 return self.fail("TODO implement setRegOrMem for memory", .{});
38853885 },
......@@ -3955,7 +3955,10 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
39553955 return self.genSetStackArg(ty, stack_offset, MCValue{ .register = reg });
39563956 }
39573957
3958 try self.genInlineMemcpy(stack_offset, .rsp, ty, mcv);
3958 try self.genInlineMemcpy(stack_offset, ty, mcv, .{
3959 .source_stack_base = .rbp,
3960 .dest_stack_base = .rsp,
3961 });
39593962 },
39603963 .register => |reg| {
39613964 _ = try self.addInst(.{
......@@ -3978,12 +3981,15 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
39783981 return self.genSetStackArg(ty, stack_offset, MCValue{ .register = reg });
39793982 }
39803983
3981 try self.genInlineMemcpy(stack_offset, .rsp, ty, mcv);
3984 try self.genInlineMemcpy(stack_offset, ty, mcv, .{
3985 .source_stack_base = .rbp,
3986 .dest_stack_base = .rsp,
3987 });
39823988 },
39833989 }
39843990}
39853991
3986fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerError!void {
3992fn genSetStack(self: *Self, ty: Type, stack_offset: i32, base_reg: Register, mcv: MCValue) InnerError!void {
39873993 const abi_size = ty.abiSize(self.target.*);
39883994 switch (mcv) {
39893995 .dead => unreachable,
......@@ -3994,18 +4000,18 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
39944000 return; // The already existing value will do just fine.
39954001 // TODO Upgrade this to a memset call when we have that available.
39964002 switch (ty.abiSize(self.target.*)) {
3997 1 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaa }),
3998 2 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaa }),
3999 4 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaa }),
4000 8 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
4001 else => return self.genInlineMemset(stack_offset, .rbp, ty, .{ .immediate = 0xaa }),
4003 1 => return self.genSetStack(ty, stack_offset, base_reg, .{ .immediate = 0xaa }),
4004 2 => return self.genSetStack(ty, stack_offset, base_reg, .{ .immediate = 0xaaaa }),
4005 4 => return self.genSetStack(ty, stack_offset, base_reg, .{ .immediate = 0xaaaaaaaa }),
4006 8 => return self.genSetStack(ty, stack_offset, base_reg, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
4007 else => return self.genInlineMemset(stack_offset, base_reg, ty, .{ .immediate = 0xaa }),
40024008 }
40034009 },
40044010 .compare_flags_unsigned,
40054011 .compare_flags_signed,
40064012 => {
40074013 const reg = try self.copyToTmpRegister(ty, mcv);
4008 return self.genSetStack(ty, stack_offset, .{ .register = reg });
4014 return self.genSetStack(ty, stack_offset, base_reg, .{ .register = reg });
40094015 },
40104016 .immediate => |x_big| {
40114017 switch (abi_size) {
......@@ -4017,7 +4023,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
40174023 _ = try self.addInst(.{
40184024 .tag = .mov_mem_imm,
40194025 .ops = (Mir.Ops{
4020 .reg1 = .rbp,
4026 .reg1 = base_reg,
40214027 .flags = switch (abi_size) {
40224028 1 => 0b00,
40234029 2 => 0b01,
......@@ -4039,7 +4045,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
40394045 _ = try self.addInst(.{
40404046 .tag = .mov_mem_imm,
40414047 .ops = (Mir.Ops{
4042 .reg1 = .rbp,
4048 .reg1 = base_reg,
40434049 .flags = 0b10,
40444050 }).encode(),
40454051 .data = .{ .payload = payload },
......@@ -4053,7 +4059,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
40534059 _ = try self.addInst(.{
40544060 .tag = .mov_mem_imm,
40554061 .ops = (Mir.Ops{
4056 .reg1 = .rbp,
4062 .reg1 = base_reg,
40574063 .flags = 0b10,
40584064 }).encode(),
40594065 .data = .{ .payload = payload },
......@@ -4085,7 +4091,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
40854091 _ = try self.addInst(.{
40864092 .tag = .mov,
40874093 .ops = (Mir.Ops{
4088 .reg1 = .rbp,
4094 .reg1 = base_reg,
40894095 .reg2 = registerAlias(tmp_reg, closest_power_of_two),
40904096 .flags = 0b10,
40914097 }).encode(),
......@@ -4110,7 +4116,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
41104116 _ = try self.addInst(.{
41114117 .tag = .mov,
41124118 .ops = (Mir.Ops{
4113 .reg1 = .rbp,
4119 .reg1 = base_reg,
41144120 .reg2 = registerAlias(reg, @intCast(u32, abi_size)),
41154121 .flags = 0b10,
41164122 }).encode(),
......@@ -4125,14 +4131,17 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
41254131 => {
41264132 if (abi_size <= 8) {
41274133 const reg = try self.copyToTmpRegister(ty, mcv);
4128 return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
4134 return self.genSetStack(ty, stack_offset, base_reg, MCValue{ .register = reg });
41294135 }
41304136
4131 try self.genInlineMemcpy(stack_offset, .rbp, ty, mcv);
4137 try self.genInlineMemcpy(stack_offset, ty, mcv, .{
4138 .source_stack_base = base_reg,
4139 .dest_stack_base = base_reg,
4140 });
41324141 },
41334142 .ptr_stack_offset => {
41344143 const reg = try self.copyToTmpRegister(ty, mcv);
4135 return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
4144 return self.genSetStack(ty, stack_offset, base_reg, MCValue{ .register = reg });
41364145 },
41374146 .stack_offset => |off| {
41384147 if (stack_offset == off) {
......@@ -4142,171 +4151,36 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
41424151
41434152 if (abi_size <= 8) {
41444153 const reg = try self.copyToTmpRegister(ty, mcv);
4145 return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
4154 return self.genSetStack(ty, stack_offset, base_reg, MCValue{ .register = reg });
41464155 }
41474156
4148 try self.genInlineMemcpy(stack_offset, .rbp, ty, mcv);
4157 try self.genInlineMemcpy(stack_offset, ty, mcv, .{
4158 .source_stack_base = base_reg,
4159 .dest_stack_base = base_reg,
4160 });
41494161 },
41504162 }
41514163}
41524164
4153fn genInlineMemcpyTODO(self: *Self, stack_offset: i32, stack_reg: Register, ty: Type, val: MCValue) InnerError!void {
4165const InlineMemcpyOpts = struct {
4166 source_stack_base: ?Register = null,
4167 dest_stack_base: ?Register = null,
4168};
4169
4170fn genInlineMemcpy(self: *Self, stack_offset: i32, ty: Type, val: MCValue, opts: InlineMemcpyOpts) InnerError!void {
41544171 const abi_size = ty.abiSize(self.target.*);
41554172
41564173 try self.register_manager.getReg(.rax, null);
41574174 try self.register_manager.getReg(.rcx, null);
41584175
4159 self.register_manager.freezeRegs(&.{ .rax, .rcx, .rbp });
4160 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx, .rbp });
4161
4162 const addr_reg: Register = blk: {
4163 switch (val) {
4164 .memory,
4165 .direct_load,
4166 .got_load,
4167 => {
4168 break :blk try self.loadMemPtrIntoRegister(Type.usize, val);
4169 },
4170 .stack_offset => |off| {
4171 const addr_reg = (try self.register_manager.allocReg(null)).to64();
4172 _ = try self.addInst(.{
4173 .tag = .lea,
4174 .ops = (Mir.Ops{
4175 .reg1 = addr_reg,
4176 .reg2 = .rsp,
4177 }).encode(),
4178 .data = .{ .imm = @bitCast(u32, -off) },
4179 });
4180 break :blk addr_reg;
4181 },
4182 .register => |reg| {
4183 const addr_reg = try self.register_manager.allocReg(null);
4184 _ = try self.addInst(.{
4185 .tag = .mov,
4186 .ops = (Mir.Ops{
4187 .reg1 = registerAlias(addr_reg, @divExact(reg.size(), 8)),
4188 .reg2 = reg,
4189 }).encode(),
4190 .data = undefined,
4191 });
4192 break :blk addr_reg.to64();
4193 },
4194 else => {
4195 return self.fail("TODO implement memcpy for setting stack from {}", .{val});
4196 },
4197 }
4198 };
4199
4200 self.register_manager.freezeRegs(&.{addr_reg});
4201 defer self.register_manager.unfreezeRegs(&.{addr_reg});
4202
4203 const regs = try self.register_manager.allocRegs(2, .{ null, null });
4204 const count_reg = regs[0].to64();
4205 const tmp_reg = regs[1].to8();
4206
4207 try self.genSetReg(Type.u32, count_reg, .{ .immediate = @intCast(u32, abi_size) });
4208
4209 // mov rcx, 0
4210 _ = try self.addInst(.{
4211 .tag = .mov,
4212 .ops = (Mir.Ops{
4213 .reg1 = .rcx,
4214 }).encode(),
4215 .data = .{ .imm = 0 },
4216 });
4217
4218 // mov rax, 0
4219 _ = try self.addInst(.{
4220 .tag = .mov,
4221 .ops = (Mir.Ops{
4222 .reg1 = .rax,
4223 }).encode(),
4224 .data = .{ .imm = 0 },
4225 });
4226
4227 // loop:
4228 // cmp count, 0
4229 const loop_start = try self.addInst(.{
4230 .tag = .cmp,
4231 .ops = (Mir.Ops{
4232 .reg1 = count_reg,
4233 }).encode(),
4234 .data = .{ .imm = 0 },
4235 });
4236
4237 // je end
4238 const loop_reloc = try self.addInst(.{
4239 .tag = .cond_jmp_eq_ne,
4240 .ops = (Mir.Ops{ .flags = 0b01 }).encode(),
4241 .data = .{ .inst = undefined },
4242 });
4243
4244 // mov tmp, [addr + rcx]
4245 _ = try self.addInst(.{
4246 .tag = .mov_scale_src,
4247 .ops = (Mir.Ops{
4248 .reg1 = tmp_reg.to8(),
4249 .reg2 = addr_reg,
4250 }).encode(),
4251 .data = .{ .imm = 0 },
4252 });
4253
4254 // mov [stack_offset + rax], tmp
4255 _ = try self.addInst(.{
4256 .tag = .mov_scale_dst,
4257 .ops = (Mir.Ops{
4258 .reg1 = stack_reg,
4259 .reg2 = tmp_reg.to8(),
4260 }).encode(),
4261 .data = .{ .imm = @bitCast(u32, -stack_offset) },
4262 });
4263
4264 // add rcx, 1
4265 _ = try self.addInst(.{
4266 .tag = .add,
4267 .ops = (Mir.Ops{
4268 .reg1 = .rcx,
4269 }).encode(),
4270 .data = .{ .imm = 1 },
4271 });
4272
4273 // add rax, 1
4274 _ = try self.addInst(.{
4275 .tag = .add,
4276 .ops = (Mir.Ops{
4277 .reg1 = .rax,
4278 }).encode(),
4279 .data = .{ .imm = 1 },
4280 });
4281
4282 // sub count, 1
4283 _ = try self.addInst(.{
4284 .tag = .sub,
4285 .ops = (Mir.Ops{
4286 .reg1 = count_reg,
4287 }).encode(),
4288 .data = .{ .imm = 1 },
4289 });
4290
4291 // jmp loop
4292 _ = try self.addInst(.{
4293 .tag = .jmp,
4294 .ops = (Mir.Ops{ .flags = 0b00 }).encode(),
4295 .data = .{ .inst = loop_start },
4296 });
4297
4298 // end:
4299 try self.performReloc(loop_reloc);
4300}
4301
4302fn genInlineMemcpy(self: *Self, stack_offset: i32, stack_reg: Register, ty: Type, val: MCValue) InnerError!void {
4303 const abi_size = ty.abiSize(self.target.*);
4176 self.register_manager.freezeRegs(&.{ .rax, .rcx });
4177 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx });
43044178
4305 try self.register_manager.getReg(.rax, null);
4306 try self.register_manager.getReg(.rcx, null);
4179 if (opts.source_stack_base) |reg| self.register_manager.freezeRegs(&.{reg});
4180 defer if (opts.source_stack_base) |reg| self.register_manager.unfreezeRegs(&.{reg});
43074181
4308 self.register_manager.freezeRegs(&.{ .rax, .rcx, .rbp });
4309 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx, .rbp });
4182 if (opts.dest_stack_base) |reg| self.register_manager.freezeRegs(&.{reg});
4183 defer if (opts.dest_stack_base) |reg| self.register_manager.unfreezeRegs(&.{reg});
43104184
43114185 const addr_reg: Register = blk: {
43124186 switch (val) {
......@@ -4322,7 +4196,7 @@ fn genInlineMemcpy(self: *Self, stack_offset: i32, stack_reg: Register, ty: Type
43224196 .tag = .lea,
43234197 .ops = (Mir.Ops{
43244198 .reg1 = addr_reg,
4325 .reg2 = .rbp,
4199 .reg2 = opts.source_stack_base orelse .rbp,
43264200 }).encode(),
43274201 .data = .{ .imm = @bitCast(u32, -off) },
43284202 });
......@@ -4404,7 +4278,7 @@ fn genInlineMemcpy(self: *Self, stack_offset: i32, stack_reg: Register, ty: Type
44044278 _ = try self.addInst(.{
44054279 .tag = .mov_scale_dst,
44064280 .ops = (Mir.Ops{
4407 .reg1 = stack_reg,
4281 .reg1 = opts.dest_stack_base orelse .rbp,
44084282 .reg2 = tmp_reg.to8(),
44094283 }).encode(),
44104284 .data = .{ .imm = @bitCast(u32, -stack_offset) },
......@@ -4850,8 +4724,8 @@ fn airArrayToSlice(self: *Self, inst: Air.Inst.Index) !void {
48504724 const array_len = array_ty.arrayLenIncludingSentinel();
48514725 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else blk: {
48524726 const stack_offset = @intCast(i32, try self.allocMem(inst, 16, 16));
4853 try self.genSetStack(ptr_ty, stack_offset, ptr);
4854 try self.genSetStack(Type.initTag(.u64), stack_offset - 8, .{ .immediate = array_len });
4727 try self.genSetStack(ptr_ty, stack_offset, .rbp, ptr);
4728 try self.genSetStack(Type.initTag(.u64), stack_offset - 8, .rbp, .{ .immediate = array_len });
48554729 break :blk .{ .stack_offset = stack_offset };
48564730 };
48574731 return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
......@@ -5249,10 +5123,10 @@ fn resolveCallingConventionValues(self: *Self, fn_ty: Type) !CallMCValues {
52495123 const aliased_reg = registerAlias(c_abi_int_return_regs[0], ret_ty_size);
52505124 result.return_value = .{ .register = aliased_reg };
52515125 } else {
5252 // TODO save the stack location in `.rdi` for C ABI compatible extern calls.
5253 const ret_ty_align = @intCast(u32, ret_ty.abiAlignment(self.target.*));
5254 const offset = mem.alignForwardGeneric(u32, ret_ty_size, ret_ty_align);
5255 result.return_value = .{ .stack_offset = @intCast(i32, offset) };
5126 // We simply make the return MCValue a stack offset. However, the actual value
5127 // for the offset will be populated later. We will also push the stack offset
5128 // value into .rdi register when we resolve the offset.
5129 result.return_value = .{ .stack_offset = 0 };
52565130 }
52575131 }
52585132