| author |  Andrew Kelley <andrew@ziglang.org> 2023-12-04 12:14:58-07:00 |
| committer | Andrew Kelley <andrew@ziglang.org> 2024-01-01 17:51:18-07:00 |
| log | 67d48b94d601521e15dd44c8789b1f528d09f10c |
| tree | a22e731af7b9ba3b02080704441a57ec74fd2b24 |
| parent | 767eb5da7793d83a7b5b666e5367727fc4f0160b |
std.Target: flatten
48 files changed, 28187 insertions(+), 28189 deletions(-)
CMakeLists.txt+16-16
| ... | @@ -480,22 +480,22 @@ set(ZIG_STAGE2_SOURCES | ... | @@ -480,22 +480,22 @@ set(ZIG_STAGE2_SOURCES |
| 480 | "${CMAKE_SOURCE_DIR}/lib/compiler_rt/unordtf2.zig" | 480 | "${CMAKE_SOURCE_DIR}/lib/compiler_rt/unordtf2.zig" |
| 481 | "${CMAKE_SOURCE_DIR}/lib/std/start.zig" | 481 | "${CMAKE_SOURCE_DIR}/lib/std/start.zig" |
| 482 | "${CMAKE_SOURCE_DIR}/lib/std/std.zig" | 482 | "${CMAKE_SOURCE_DIR}/lib/std/std.zig" |
| 483 | "${CMAKE_SOURCE_DIR}/lib/std/target.zig" | 483 | "${CMAKE_SOURCE_DIR}/lib/std/Target.zig" |
| 484 | "${CMAKE_SOURCE_DIR}/lib/std/target/aarch64.zig" | 484 | "${CMAKE_SOURCE_DIR}/lib/std/Target/aarch64.zig" |
| 485 | "${CMAKE_SOURCE_DIR}/lib/std/target/amdgpu.zig" | 485 | "${CMAKE_SOURCE_DIR}/lib/std/Target/amdgpu.zig" |
| 486 | "${CMAKE_SOURCE_DIR}/lib/std/target/arm.zig" | 486 | "${CMAKE_SOURCE_DIR}/lib/std/Target/arm.zig" |
| 487 | "${CMAKE_SOURCE_DIR}/lib/std/target/avr.zig" | 487 | "${CMAKE_SOURCE_DIR}/lib/std/Target/avr.zig" |
| 488 | "${CMAKE_SOURCE_DIR}/lib/std/target/bpf.zig" | 488 | "${CMAKE_SOURCE_DIR}/lib/std/Target/bpf.zig" |
| 489 | "${CMAKE_SOURCE_DIR}/lib/std/target/hexagon.zig" | 489 | "${CMAKE_SOURCE_DIR}/lib/std/Target/hexagon.zig" |
| 490 | "${CMAKE_SOURCE_DIR}/lib/std/target/mips.zig" | 490 | "${CMAKE_SOURCE_DIR}/lib/std/Target/mips.zig" |
| 491 | "${CMAKE_SOURCE_DIR}/lib/std/target/msp430.zig" | 491 | "${CMAKE_SOURCE_DIR}/lib/std/Target/msp430.zig" |
| 492 | "${CMAKE_SOURCE_DIR}/lib/std/target/nvptx.zig" | 492 | "${CMAKE_SOURCE_DIR}/lib/std/Target/nvptx.zig" |
| 493 | "${CMAKE_SOURCE_DIR}/lib/std/target/powerpc.zig" | 493 | "${CMAKE_SOURCE_DIR}/lib/std/Target/powerpc.zig" |
| 494 | "${CMAKE_SOURCE_DIR}/lib/std/target/riscv.zig" | 494 | "${CMAKE_SOURCE_DIR}/lib/std/Target/riscv.zig" |
| 495 | "${CMAKE_SOURCE_DIR}/lib/std/target/sparc.zig" | 495 | "${CMAKE_SOURCE_DIR}/lib/std/Target/sparc.zig" |
| 496 | "${CMAKE_SOURCE_DIR}/lib/std/target/s390x.zig" | 496 | "${CMAKE_SOURCE_DIR}/lib/std/Target/s390x.zig" |
| 497 | "${CMAKE_SOURCE_DIR}/lib/std/target/wasm.zig" | 497 | "${CMAKE_SOURCE_DIR}/lib/std/Target/wasm.zig" |
| 498 | "${CMAKE_SOURCE_DIR}/lib/std/target/x86.zig" | 498 | "${CMAKE_SOURCE_DIR}/lib/std/Target/x86.zig" |
| 499 | "${CMAKE_SOURCE_DIR}/lib/std/Thread.zig" | 499 | "${CMAKE_SOURCE_DIR}/lib/std/Thread.zig" |
| 500 | "${CMAKE_SOURCE_DIR}/lib/std/Thread/Futex.zig" | 500 | "${CMAKE_SOURCE_DIR}/lib/std/Thread/Futex.zig" |
| 501 | "${CMAKE_SOURCE_DIR}/lib/std/Thread/Mutex.zig" | 501 | "${CMAKE_SOURCE_DIR}/lib/std/Thread/Mutex.zig" |
lib/std/Target.zig created+2696
| ... | @@ -0,0 +1,2696 @@ | ||
| 1 | cpu: Cpu, | ||
| 2 | os: Os, | ||
| 3 | abi: Abi, | ||
| 4 | ofmt: ObjectFormat, | ||
| 5 | |||
| 6 | pub const Os = struct { | ||
| 7 | tag: Tag, | ||
| 8 | version_range: VersionRange, | ||
| 9 | |||
| 10 | pub const Tag = enum { | ||
| 11 | freestanding, | ||
| 12 | ananas, | ||
| 13 | cloudabi, | ||
| 14 | dragonfly, | ||
| 15 | freebsd, | ||
| 16 | fuchsia, | ||
| 17 | ios, | ||
| 18 | kfreebsd, | ||
| 19 | linux, | ||
| 20 | lv2, | ||
| 21 | macos, | ||
| 22 | netbsd, | ||
| 23 | openbsd, | ||
| 24 | solaris, | ||
| 25 | uefi, | ||
| 26 | windows, | ||
| 27 | zos, | ||
| 28 | haiku, | ||
| 29 | minix, | ||
| 30 | rtems, | ||
| 31 | nacl, | ||
| 32 | aix, | ||
| 33 | cuda, | ||
| 34 | nvcl, | ||
| 35 | amdhsa, | ||
| 36 | ps4, | ||
| 37 | ps5, | ||
| 38 | elfiamcu, | ||
| 39 | tvos, | ||
| 40 | watchos, | ||
| 41 | driverkit, | ||
| 42 | mesa3d, | ||
| 43 | contiki, | ||
| 44 | amdpal, | ||
| 45 | hermit, | ||
| 46 | hurd, | ||
| 47 | wasi, | ||
| 48 | emscripten, | ||
| 49 | shadermodel, | ||
| 50 | liteos, | ||
| 51 | opencl, | ||
| 52 | glsl450, | ||
| 53 | vulkan, | ||
| 54 | plan9, | ||
| 55 | illumos, | ||
| 56 | other, | ||
| 57 | |||
| 58 | pub inline fn isDarwin(tag: Tag) bool { | ||
| 59 | return switch (tag) { | ||
| 60 | .ios, .macos, .watchos, .tvos => true, | ||
| 61 | else => false, | ||
| 62 | }; | ||
| 63 | } | ||
| 64 | |||
| 65 | pub inline fn isBSD(tag: Tag) bool { | ||
| 66 | return tag.isDarwin() or switch (tag) { | ||
| 67 | .kfreebsd, .freebsd, .openbsd, .netbsd, .dragonfly => true, | ||
| 68 | else => false, | ||
| 69 | }; | ||
| 70 | } | ||
| 71 | |||
| 72 | pub inline fn isSolarish(tag: Tag) bool { | ||
| 73 | return tag == .solaris or tag == .illumos; | ||
| 74 | } | ||
| 75 | |||
| 76 | pub fn dynamicLibSuffix(tag: Tag) [:0]const u8 { | ||
| 77 | if (tag.isDarwin()) { | ||
| 78 | return ".dylib"; | ||
| 79 | } | ||
| 80 | switch (tag) { | ||
| 81 | .windows => return ".dll", | ||
| 82 | else => return ".so", | ||
| 83 | } | ||
| 84 | } | ||
| 85 | |||
| 86 | pub fn defaultVersionRange(tag: Tag, arch: Cpu.Arch) Os { | ||
| 87 | return .{ | ||
| 88 | .tag = tag, | ||
| 89 | .version_range = VersionRange.default(tag, arch), | ||
| 90 | }; | ||
| 91 | } | ||
| 92 | }; | ||
| 93 | |||
| 94 | /// Based on NTDDI version constants from | ||
| 95 | /// https://docs.microsoft.com/en-us/cpp/porting/modifying-winver-and-win32-winnt | ||
| 96 | pub const WindowsVersion = enum(u32) { | ||
| 97 | nt4 = 0x04000000, | ||
| 98 | win2k = 0x05000000, | ||
| 99 | xp = 0x05010000, | ||
| 100 | ws2003 = 0x05020000, | ||
| 101 | vista = 0x06000000, | ||
| 102 | win7 = 0x06010000, | ||
| 103 | win8 = 0x06020000, | ||
| 104 | win8_1 = 0x06030000, | ||
| 105 | win10 = 0x0A000000, //aka win10_th1 | ||
| 106 | win10_th2 = 0x0A000001, | ||
| 107 | win10_rs1 = 0x0A000002, | ||
| 108 | win10_rs2 = 0x0A000003, | ||
| 109 | win10_rs3 = 0x0A000004, | ||
| 110 | win10_rs4 = 0x0A000005, | ||
| 111 | win10_rs5 = 0x0A000006, | ||
| 112 | win10_19h1 = 0x0A000007, | ||
| 113 | win10_vb = 0x0A000008, //aka win10_19h2 | ||
| 114 | win10_mn = 0x0A000009, //aka win10_20h1 | ||
| 115 | win10_fe = 0x0A00000A, //aka win10_20h2 | ||
| 116 | _, | ||
| 117 | |||
| 118 | /// Latest Windows version that the Zig Standard Library is aware of | ||
| 119 | pub const latest = WindowsVersion.win10_fe; | ||
| 120 | |||
| 121 | /// Compared against build numbers reported by the runtime to distinguish win10 versions, | ||
| 122 | /// where 0x0A000000 + index corresponds to the WindowsVersion u32 value. | ||
| 123 | pub const known_win10_build_numbers = [_]u32{ | ||
| 124 | 10240, //win10 aka win10_th1 | ||
| 125 | 10586, //win10_th2 | ||
| 126 | 14393, //win10_rs1 | ||
| 127 | 15063, //win10_rs2 | ||
| 128 | 16299, //win10_rs3 | ||
| 129 | 17134, //win10_rs4 | ||
| 130 | 17763, //win10_rs5 | ||
| 131 | 18362, //win10_19h1 | ||
| 132 | 18363, //win10_vb aka win10_19h2 | ||
| 133 | 19041, //win10_mn aka win10_20h1 | ||
| 134 | 19042, //win10_fe aka win10_20h2 | ||
| 135 | }; | ||
| 136 | |||
| 137 | /// Returns whether the first version `self` is newer (greater) than or equal to the second version `ver`. | ||
| 138 | pub inline fn isAtLeast(self: WindowsVersion, ver: WindowsVersion) bool { | ||
| 139 | return @intFromEnum(self) >= @intFromEnum(ver); | ||
| 140 | } | ||
| 141 | |||
| 142 | pub const Range = struct { | ||
| 143 | min: WindowsVersion, | ||
| 144 | max: WindowsVersion, | ||
| 145 | |||
| 146 | pub inline fn includesVersion(self: Range, ver: WindowsVersion) bool { | ||
| 147 | return @intFromEnum(ver) >= @intFromEnum(self.min) and @intFromEnum(ver) <= @intFromEnum(self.max); | ||
| 148 | } | ||
| 149 | |||
| 150 | /// Checks if system is guaranteed to be at least `version` or older than `version`. | ||
| 151 | /// Returns `null` if a runtime check is required. | ||
| 152 | pub inline fn isAtLeast(self: Range, ver: WindowsVersion) ?bool { | ||
| 153 | if (@intFromEnum(self.min) >= @intFromEnum(ver)) return true; | ||
| 154 | if (@intFromEnum(self.max) < @intFromEnum(ver)) return false; | ||
| 155 | return null; | ||
| 156 | } | ||
| 157 | }; | ||
| 158 | |||
| 159 | /// This function is defined to serialize a Zig source code representation of this | ||
| 160 | /// type, that, when parsed, will deserialize into the same data. | ||
| 161 | pub fn format( | ||
| 162 | self: WindowsVersion, | ||
| 163 | comptime fmt: []const u8, | ||
| 164 | _: std.fmt.FormatOptions, | ||
| 165 | out_stream: anytype, | ||
| 166 | ) !void { | ||
| 167 | if (comptime std.mem.eql(u8, fmt, "s")) { | ||
| 168 | if (@intFromEnum(self) >= @intFromEnum(WindowsVersion.nt4) and @intFromEnum(self) <= @intFromEnum(WindowsVersion.latest)) { | ||
| 169 | try std.fmt.format(out_stream, ".{s}", .{@tagName(self)}); | ||
| 170 | } else { | ||
| 171 | // TODO this code path breaks zig triples, but it is used in `builtin` | ||
| 172 | try std.fmt.format(out_stream, "@enumFromInt(Target.Os.WindowsVersion, 0x{X:0>8})", .{@intFromEnum(self)}); | ||
| 173 | } | ||
| 174 | } else if (fmt.len == 0) { | ||
| 175 | if (@intFromEnum(self) >= @intFromEnum(WindowsVersion.nt4) and @intFromEnum(self) <= @intFromEnum(WindowsVersion.latest)) { | ||
| 176 | try std.fmt.format(out_stream, "WindowsVersion.{s}", .{@tagName(self)}); | ||
| 177 | } else { | ||
| 178 | try std.fmt.format(out_stream, "WindowsVersion(0x{X:0>8})", .{@intFromEnum(self)}); | ||
| 179 | } | ||
| 180 | } else { | ||
| 181 | std.fmt.invalidFmtError(fmt, self); | ||
| 182 | } | ||
| 183 | } | ||
| 184 | }; | ||
| 185 | |||
| 186 | pub const LinuxVersionRange = struct { | ||
| 187 | range: std.SemanticVersion.Range, | ||
| 188 | glibc: std.SemanticVersion, | ||
| 189 | |||
| 190 | pub inline fn includesVersion(self: LinuxVersionRange, ver: std.SemanticVersion) bool { | ||
| 191 | return self.range.includesVersion(ver); | ||
| 192 | } | ||
| 193 | |||
| 194 | /// Checks if system is guaranteed to be at least `version` or older than `version`. | ||
| 195 | /// Returns `null` if a runtime check is required. | ||
| 196 | pub inline fn isAtLeast(self: LinuxVersionRange, ver: std.SemanticVersion) ?bool { | ||
| 197 | return self.range.isAtLeast(ver); | ||
| 198 | } | ||
| 199 | }; | ||
| 200 | |||
| 201 | /// The version ranges here represent the minimum OS version to be supported | ||
| 202 | /// and the maximum OS version to be supported. The default values represent | ||
| 203 | /// the range that the Zig Standard Library bases its abstractions on. | ||
| 204 | /// | ||
| 205 | /// The minimum version of the range is the main setting to tweak for a target. | ||
| 206 | /// Usually, the maximum target OS version will remain the default, which is | ||
| 207 | /// the latest released version of the OS. | ||
| 208 | /// | ||
| 209 | /// To test at compile time if the target is guaranteed to support a given OS feature, | ||
| 210 | /// one should check that the minimum version of the range is greater than or equal to | ||
| 211 | /// the version the feature was introduced in. | ||
| 212 | /// | ||
| 213 | /// To test at compile time if the target certainly will not support a given OS feature, | ||
| 214 | /// one should check that the maximum version of the range is less than the version the | ||
| 215 | /// feature was introduced in. | ||
| 216 | /// | ||
| 217 | /// If neither of these cases apply, a runtime check should be used to determine if the | ||
| 218 | /// target supports a given OS feature. | ||
| 219 | /// | ||
| 220 | /// Binaries built with a given maximum version will continue to function on newer | ||
| 221 | /// operating system versions. However, such a binary may not take full advantage of the | ||
| 222 | /// newer operating system APIs. | ||
| 223 | /// | ||
| 224 | /// See `Os.isAtLeast`. | ||
| 225 | pub const VersionRange = union { | ||
| 226 | none: void, | ||
| 227 | semver: std.SemanticVersion.Range, | ||
| 228 | linux: LinuxVersionRange, | ||
| 229 | windows: WindowsVersion.Range, | ||
| 230 | |||
| 231 | /// The default `VersionRange` represents the range that the Zig Standard Library | ||
| 232 | /// bases its abstractions on. | ||
| 233 | pub fn default(tag: Tag, arch: Cpu.Arch) VersionRange { | ||
| 234 | switch (tag) { | ||
| 235 | .freestanding, | ||
| 236 | .ananas, | ||
| 237 | .cloudabi, | ||
| 238 | .fuchsia, | ||
| 239 | .kfreebsd, | ||
| 240 | .lv2, | ||
| 241 | .zos, | ||
| 242 | .haiku, | ||
| 243 | .minix, | ||
| 244 | .rtems, | ||
| 245 | .nacl, | ||
| 246 | .aix, | ||
| 247 | .cuda, | ||
| 248 | .nvcl, | ||
| 249 | .amdhsa, | ||
| 250 | .ps4, | ||
| 251 | .ps5, | ||
| 252 | .elfiamcu, | ||
| 253 | .mesa3d, | ||
| 254 | .contiki, | ||
| 255 | .amdpal, | ||
| 256 | .hermit, | ||
| 257 | .hurd, | ||
| 258 | .wasi, | ||
| 259 | .emscripten, | ||
| 260 | .driverkit, | ||
| 261 | .shadermodel, | ||
| 262 | .liteos, | ||
| 263 | .uefi, | ||
| 264 | .opencl, // TODO: OpenCL versions | ||
| 265 | .glsl450, // TODO: GLSL versions | ||
| 266 | .vulkan, | ||
| 267 | .plan9, | ||
| 268 | .illumos, | ||
| 269 | .other, | ||
| 270 | => return .{ .none = {} }, | ||
| 271 | |||
| 272 | .freebsd => return .{ | ||
| 273 | .semver = std.SemanticVersion.Range{ | ||
| 274 | .min = .{ .major = 12, .minor = 0, .patch = 0 }, | ||
| 275 | .max = .{ .major = 14, .minor = 0, .patch = 0 }, | ||
| 276 | }, | ||
| 277 | }, | ||
| 278 | .macos => return switch (arch) { | ||
| 279 | .aarch64 => VersionRange{ | ||
| 280 | .semver = .{ | ||
| 281 | .min = .{ .major = 11, .minor = 7, .patch = 1 }, | ||
| 282 | .max = .{ .major = 14, .minor = 1, .patch = 0 }, | ||
| 283 | }, | ||
| 284 | }, | ||
| 285 | .x86_64 => VersionRange{ | ||
| 286 | .semver = .{ | ||
| 287 | .min = .{ .major = 11, .minor = 7, .patch = 1 }, | ||
| 288 | .max = .{ .major = 14, .minor = 1, .patch = 0 }, | ||
| 289 | }, | ||
| 290 | }, | ||
| 291 | else => unreachable, | ||
| 292 | }, | ||
| 293 | .ios => return .{ | ||
| 294 | .semver = .{ | ||
| 295 | .min = .{ .major = 12, .minor = 0, .patch = 0 }, | ||
| 296 | .max = .{ .major = 17, .minor = 1, .patch = 0 }, | ||
| 297 | }, | ||
| 298 | }, | ||
| 299 | .watchos => return .{ | ||
| 300 | .semver = .{ | ||
| 301 | .min = .{ .major = 6, .minor = 0, .patch = 0 }, | ||
| 302 | .max = .{ .major = 10, .minor = 1, .patch = 0 }, | ||
| 303 | }, | ||
| 304 | }, | ||
| 305 | .tvos => return .{ | ||
| 306 | .semver = .{ | ||
| 307 | .min = .{ .major = 13, .minor = 0, .patch = 0 }, | ||
| 308 | .max = .{ .major = 17, .minor = 1, .patch = 0 }, | ||
| 309 | }, | ||
| 310 | }, | ||
| 311 | .netbsd => return .{ | ||
| 312 | .semver = .{ | ||
| 313 | .min = .{ .major = 8, .minor = 0, .patch = 0 }, | ||
| 314 | .max = .{ .major = 10, .minor = 0, .patch = 0 }, | ||
| 315 | }, | ||
| 316 | }, | ||
| 317 | .openbsd => return .{ | ||
| 318 | .semver = .{ | ||
| 319 | .min = .{ .major = 6, .minor = 8, .patch = 0 }, | ||
| 320 | .max = .{ .major = 7, .minor = 4, .patch = 0 }, | ||
| 321 | }, | ||
| 322 | }, | ||
| 323 | .dragonfly => return .{ | ||
| 324 | .semver = .{ | ||
| 325 | .min = .{ .major = 5, .minor = 8, .patch = 0 }, | ||
| 326 | .max = .{ .major = 6, .minor = 4, .patch = 0 }, | ||
| 327 | }, | ||
| 328 | }, | ||
| 329 | .solaris => return .{ | ||
| 330 | .semver = .{ | ||
| 331 | .min = .{ .major = 5, .minor = 11, .patch = 0 }, | ||
| 332 | .max = .{ .major = 5, .minor = 11, .patch = 0 }, | ||
| 333 | }, | ||
| 334 | }, | ||
| 335 | |||
| 336 | .linux => return .{ | ||
| 337 | .linux = .{ | ||
| 338 | .range = .{ | ||
| 339 | .min = .{ .major = 4, .minor = 19, .patch = 0 }, | ||
| 340 | .max = .{ .major = 6, .minor = 5, .patch = 7 }, | ||
| 341 | }, | ||
| 342 | .glibc = .{ .major = 2, .minor = 28, .patch = 0 }, | ||
| 343 | }, | ||
| 344 | }, | ||
| 345 | |||
| 346 | .windows => return .{ | ||
| 347 | .windows = .{ | ||
| 348 | .min = .win8_1, | ||
| 349 | .max = WindowsVersion.latest, | ||
| 350 | }, | ||
| 351 | }, | ||
| 352 | } | ||
| 353 | } | ||
| 354 | }; | ||
| 355 | |||
| 356 | pub const TaggedVersionRange = union(enum) { | ||
| 357 | none: void, | ||
| 358 | semver: std.SemanticVersion.Range, | ||
| 359 | linux: LinuxVersionRange, | ||
| 360 | windows: WindowsVersion.Range, | ||
| 361 | }; | ||
| 362 | |||
| 363 | /// Provides a tagged union. `Target` does not store the tag because it is | ||
| 364 | /// redundant with the OS tag; this function abstracts that part away. | ||
| 365 | pub inline fn getVersionRange(self: Os) TaggedVersionRange { | ||
| 366 | switch (self.tag) { | ||
| 367 | .linux => return TaggedVersionRange{ .linux = self.version_range.linux }, | ||
| 368 | .windows => return TaggedVersionRange{ .windows = self.version_range.windows }, | ||
| 369 | |||
| 370 | .freebsd, | ||
| 371 | .macos, | ||
| 372 | .ios, | ||
| 373 | .tvos, | ||
| 374 | .watchos, | ||
| 375 | .netbsd, | ||
| 376 | .openbsd, | ||
| 377 | .dragonfly, | ||
| 378 | .solaris, | ||
| 379 | => return TaggedVersionRange{ .semver = self.version_range.semver }, | ||
| 380 | |||
| 381 | else => return .none, | ||
| 382 | } | ||
| 383 | } | ||
| 384 | |||
| 385 | /// Checks if system is guaranteed to be at least `version` or older than `version`. | ||
| 386 | /// Returns `null` if a runtime check is required. | ||
| 387 | pub inline fn isAtLeast(self: Os, comptime tag: Tag, version: anytype) ?bool { | ||
| 388 | if (self.tag != tag) return false; | ||
| 389 | |||
| 390 | return switch (tag) { | ||
| 391 | .linux => self.version_range.linux.isAtLeast(version), | ||
| 392 | .windows => self.version_range.windows.isAtLeast(version), | ||
| 393 | else => self.version_range.semver.isAtLeast(version), | ||
| 394 | }; | ||
| 395 | } | ||
| 396 | |||
| 397 | /// On Darwin, we always link libSystem which contains libc. | ||
| 398 | /// Similarly on FreeBSD and NetBSD we always link system libc | ||
| 399 | /// since this is the stable syscall interface. | ||
| 400 | pub fn requiresLibC(os: Os) bool { | ||
| 401 | return switch (os.tag) { | ||
| 402 | .freebsd, | ||
| 403 | .netbsd, | ||
| 404 | .macos, | ||
| 405 | .ios, | ||
| 406 | .tvos, | ||
| 407 | .watchos, | ||
| 408 | .dragonfly, | ||
| 409 | .openbsd, | ||
| 410 | .haiku, | ||
| 411 | .solaris, | ||
| 412 | .illumos, | ||
| 413 | => true, | ||
| 414 | |||
| 415 | .linux, | ||
| 416 | .windows, | ||
| 417 | .freestanding, | ||
| 418 | .ananas, | ||
| 419 | .cloudabi, | ||
| 420 | .fuchsia, | ||
| 421 | .kfreebsd, | ||
| 422 | .lv2, | ||
| 423 | .zos, | ||
| 424 | .minix, | ||
| 425 | .rtems, | ||
| 426 | .nacl, | ||
| 427 | .aix, | ||
| 428 | .cuda, | ||
| 429 | .nvcl, | ||
| 430 | .amdhsa, | ||
| 431 | .ps4, | ||
| 432 | .ps5, | ||
| 433 | .elfiamcu, | ||
| 434 | .mesa3d, | ||
| 435 | .contiki, | ||
| 436 | .amdpal, | ||
| 437 | .hermit, | ||
| 438 | .hurd, | ||
| 439 | .wasi, | ||
| 440 | .emscripten, | ||
| 441 | .driverkit, | ||
| 442 | .shadermodel, | ||
| 443 | .liteos, | ||
| 444 | .uefi, | ||
| 445 | .opencl, | ||
| 446 | .glsl450, | ||
| 447 | .vulkan, | ||
| 448 | .plan9, | ||
| 449 | .other, | ||
| 450 | => false, | ||
| 451 | }; | ||
| 452 | } | ||
| 453 | }; | ||
| 454 | |||
| 455 | pub const aarch64 = @import("Target/aarch64.zig"); | ||
| 456 | pub const arc = @import("Target/arc.zig"); | ||
| 457 | pub const amdgpu = @import("Target/amdgpu.zig"); | ||
| 458 | pub const arm = @import("Target/arm.zig"); | ||
| 459 | pub const avr = @import("Target/avr.zig"); | ||
| 460 | pub const bpf = @import("Target/bpf.zig"); | ||
| 461 | pub const csky = @import("Target/csky.zig"); | ||
| 462 | pub const hexagon = @import("Target/hexagon.zig"); | ||
| 463 | pub const loongarch = @import("Target/loongarch.zig"); | ||
| 464 | pub const m68k = @import("Target/m68k.zig"); | ||
| 465 | pub const mips = @import("Target/mips.zig"); | ||
| 466 | pub const msp430 = @import("Target/msp430.zig"); | ||
| 467 | pub const nvptx = @import("Target/nvptx.zig"); | ||
| 468 | pub const powerpc = @import("Target/powerpc.zig"); | ||
| 469 | pub const riscv = @import("Target/riscv.zig"); | ||
| 470 | pub const sparc = @import("Target/sparc.zig"); | ||
| 471 | pub const spirv = @import("Target/spirv.zig"); | ||
| 472 | pub const s390x = @import("Target/s390x.zig"); | ||
| 473 | pub const ve = @import("Target/ve.zig"); | ||
| 474 | pub const wasm = @import("Target/wasm.zig"); | ||
| 475 | pub const x86 = @import("Target/x86.zig"); | ||
| 476 | pub const xtensa = @import("Target/xtensa.zig"); | ||
| 477 | |||
| 478 | pub const Abi = enum { | ||
| 479 | none, | ||
| 480 | gnu, | ||
| 481 | gnuabin32, | ||
| 482 | gnuabi64, | ||
| 483 | gnueabi, | ||
| 484 | gnueabihf, | ||
| 485 | gnuf32, | ||
| 486 | gnuf64, | ||
| 487 | gnusf, | ||
| 488 | gnux32, | ||
| 489 | gnuilp32, | ||
| 490 | code16, | ||
| 491 | eabi, | ||
| 492 | eabihf, | ||
| 493 | android, | ||
| 494 | musl, | ||
| 495 | musleabi, | ||
| 496 | musleabihf, | ||
| 497 | muslx32, | ||
| 498 | msvc, | ||
| 499 | itanium, | ||
| 500 | cygnus, | ||
| 501 | coreclr, | ||
| 502 | simulator, | ||
| 503 | macabi, | ||
| 504 | pixel, | ||
| 505 | vertex, | ||
| 506 | geometry, | ||
| 507 | hull, | ||
| 508 | domain, | ||
| 509 | compute, | ||
| 510 | library, | ||
| 511 | raygeneration, | ||
| 512 | intersection, | ||
| 513 | anyhit, | ||
| 514 | closesthit, | ||
| 515 | miss, | ||
| 516 | callable, | ||
| 517 | mesh, | ||
| 518 | amplification, | ||
| 519 | |||
| 520 | pub fn default(arch: Cpu.Arch, target_os: Os) Abi { | ||
| 521 | if (arch.isWasm()) { | ||
| 522 | return .musl; | ||
| 523 | } | ||
| 524 | switch (target_os.tag) { | ||
| 525 | .freestanding, | ||
| 526 | .ananas, | ||
| 527 | .cloudabi, | ||
| 528 | .dragonfly, | ||
| 529 | .lv2, | ||
| 530 | .zos, | ||
| 531 | .minix, | ||
| 532 | .rtems, | ||
| 533 | .nacl, | ||
| 534 | .aix, | ||
| 535 | .cuda, | ||
| 536 | .nvcl, | ||
| 537 | .amdhsa, | ||
| 538 | .ps4, | ||
| 539 | .ps5, | ||
| 540 | .elfiamcu, | ||
| 541 | .mesa3d, | ||
| 542 | .contiki, | ||
| 543 | .amdpal, | ||
| 544 | .hermit, | ||
| 545 | .other, | ||
| 546 | => return .eabi, | ||
| 547 | .openbsd, | ||
| 548 | .freebsd, | ||
| 549 | .fuchsia, | ||
| 550 | .kfreebsd, | ||
| 551 | .netbsd, | ||
| 552 | .hurd, | ||
| 553 | .haiku, | ||
| 554 | .windows, | ||
| 555 | => return .gnu, | ||
| 556 | .uefi => return .msvc, | ||
| 557 | .linux, | ||
| 558 | .wasi, | ||
| 559 | .emscripten, | ||
| 560 | => return .musl, | ||
| 561 | .opencl, // TODO: SPIR-V ABIs with Linkage capability | ||
| 562 | .glsl450, | ||
| 563 | .vulkan, | ||
| 564 | .plan9, // TODO specify abi | ||
| 565 | .macos, | ||
| 566 | .ios, | ||
| 567 | .tvos, | ||
| 568 | .watchos, | ||
| 569 | .driverkit, | ||
| 570 | .shadermodel, | ||
| 571 | .liteos, // TODO: audit this | ||
| 572 | .solaris, | ||
| 573 | .illumos, | ||
| 574 | => return .none, | ||
| 575 | } | ||
| 576 | } | ||
| 577 | |||
| 578 | pub inline fn isGnu(abi: Abi) bool { | ||
| 579 | return switch (abi) { | ||
| 580 | .gnu, .gnuabin32, .gnuabi64, .gnueabi, .gnueabihf, .gnux32 => true, | ||
| 581 | else => false, | ||
| 582 | }; | ||
| 583 | } | ||
| 584 | |||
| 585 | pub inline fn isMusl(abi: Abi) bool { | ||
| 586 | return switch (abi) { | ||
| 587 | .musl, .musleabi, .musleabihf => true, | ||
| 588 | else => false, | ||
| 589 | }; | ||
| 590 | } | ||
| 591 | |||
| 592 | pub inline fn floatAbi(abi: Abi) FloatAbi { | ||
| 593 | return switch (abi) { | ||
| 594 | .gnueabihf, | ||
| 595 | .eabihf, | ||
| 596 | .musleabihf, | ||
| 597 | => .hard, | ||
| 598 | else => .soft, | ||
| 599 | }; | ||
| 600 | } | ||
| 601 | }; | ||
| 602 | |||
| 603 | pub const ObjectFormat = enum { | ||
| 604 | /// Common Object File Format (Windows) | ||
| 605 | coff, | ||
| 606 | /// DirectX Container | ||
| 607 | dxcontainer, | ||
| 608 | /// Executable and Linking Format | ||
| 609 | elf, | ||
| 610 | /// macOS relocatables | ||
| 611 | macho, | ||
| 612 | /// Standard, Portable Intermediate Representation V | ||
| 613 | spirv, | ||
| 614 | /// WebAssembly | ||
| 615 | wasm, | ||
| 616 | /// C source code | ||
| 617 | c, | ||
| 618 | /// Intel IHEX | ||
| 619 | hex, | ||
| 620 | /// Machine code with no metadata. | ||
| 621 | raw, | ||
| 622 | /// Plan 9 from Bell Labs | ||
| 623 | plan9, | ||
| 624 | /// Nvidia PTX format | ||
| 625 | nvptx, | ||
| 626 | |||
| 627 | pub fn fileExt(of: ObjectFormat, cpu_arch: Cpu.Arch) [:0]const u8 { | ||
| 628 | return switch (of) { | ||
| 629 | .coff => ".obj", | ||
| 630 | .elf, .macho, .wasm => ".o", | ||
| 631 | .c => ".c", | ||
| 632 | .spirv => ".spv", | ||
| 633 | .hex => ".ihex", | ||
| 634 | .raw => ".bin", | ||
| 635 | .plan9 => plan9Ext(cpu_arch), | ||
| 636 | .nvptx => ".ptx", | ||
| 637 | .dxcontainer => ".dxil", | ||
| 638 | }; | ||
| 639 | } | ||
| 640 | |||
| 641 | pub fn default(os_tag: Os.Tag, cpu_arch: Cpu.Arch) ObjectFormat { | ||
| 642 | return switch (os_tag) { | ||
| 643 | .windows, .uefi => .coff, | ||
| 644 | .ios, .macos, .watchos, .tvos => .macho, | ||
| 645 | .plan9 => .plan9, | ||
| 646 | else => return switch (cpu_arch) { | ||
| 647 | .wasm32, .wasm64 => .wasm, | ||
| 648 | .spirv32, .spirv64 => .spirv, | ||
| 649 | .nvptx, .nvptx64 => .nvptx, | ||
| 650 | else => .elf, | ||
| 651 | }, | ||
| 652 | }; | ||
| 653 | } | ||
| 654 | }; | ||
| 655 | |||
| 656 | pub const SubSystem = enum { | ||
| 657 | Console, | ||
| 658 | Windows, | ||
| 659 | Posix, | ||
| 660 | Native, | ||
| 661 | EfiApplication, | ||
| 662 | EfiBootServiceDriver, | ||
| 663 | EfiRom, | ||
| 664 | EfiRuntimeDriver, | ||
| 665 | }; | ||
| 666 | |||
| 667 | pub const Cpu = struct { | ||
| 668 | /// Architecture | ||
| 669 | arch: Arch, | ||
| 670 | |||
| 671 | /// The CPU model to target. It has a set of features | ||
| 672 | /// which are overridden with the `features` field. | ||
| 673 | model: *const Model, | ||
| 674 | |||
| 675 | /// An explicit list of the entire CPU feature set. It may differ from the specific CPU model's features. | ||
| 676 | features: Feature.Set, | ||
| 677 | |||
| 678 | pub const Feature = struct { | ||
| 679 | /// The bit index into `Set`. Has a default value of `undefined` because the canonical | ||
| 680 | /// structures are populated via comptime logic. | ||
| 681 | index: Set.Index = undefined, | ||
| 682 | |||
| 683 | /// Has a default value of `undefined` because the canonical | ||
| 684 | /// structures are populated via comptime logic. | ||
| 685 | name: []const u8 = undefined, | ||
| 686 | |||
| 687 | /// If this corresponds to an LLVM-recognized feature, this will be populated; | ||
| 688 | /// otherwise null. | ||
| 689 | llvm_name: ?[:0]const u8, | ||
| 690 | |||
| 691 | /// Human-friendly UTF-8 text. | ||
| 692 | description: []const u8, | ||
| 693 | |||
| 694 | /// Sparse `Set` of features this depends on. | ||
| 695 | dependencies: Set, | ||
| 696 | |||
| 697 | /// A bit set of all the features. | ||
| 698 | pub const Set = struct { | ||
| 699 | ints: [usize_count]usize, | ||
| 700 | |||
| 701 | pub const needed_bit_count = 288; | ||
| 702 | pub const byte_count = (needed_bit_count + 7) / 8; | ||
| 703 | pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize); | ||
| 704 | pub const Index = std.math.Log2Int(std.meta.Int(.unsigned, usize_count * @bitSizeOf(usize))); | ||
| 705 | pub const ShiftInt = std.math.Log2Int(usize); | ||
| 706 | |||
| 707 | pub const empty = Set{ .ints = [1]usize{0} ** usize_count }; | ||
| 708 | |||
| 709 | pub fn isEmpty(set: Set) bool { | ||
| 710 | return for (set.ints) |x| { | ||
| 711 | if (x != 0) break false; | ||
| 712 | } else true; | ||
| 713 | } | ||
| 714 | |||
| 715 | pub fn isEnabled(set: Set, arch_feature_index: Index) bool { | ||
| 716 | const usize_index = arch_feature_index / @bitSizeOf(usize); | ||
| 717 | const bit_index = @as(ShiftInt, @intCast(arch_feature_index % @bitSizeOf(usize))); | ||
| 718 | return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0; | ||
| 719 | } | ||
| 720 | |||
| 721 | /// Adds the specified feature but not its dependencies. | ||
| 722 | pub fn addFeature(set: *Set, arch_feature_index: Index) void { | ||
| 723 | const usize_index = arch_feature_index / @bitSizeOf(usize); | ||
| 724 | const bit_index = @as(ShiftInt, @intCast(arch_feature_index % @bitSizeOf(usize))); | ||
| 725 | set.ints[usize_index] |= @as(usize, 1) << bit_index; | ||
| 726 | } | ||
| 727 | |||
| 728 | /// Adds the specified feature set but not its dependencies. | ||
| 729 | pub fn addFeatureSet(set: *Set, other_set: Set) void { | ||
| 730 | switch (builtin.zig_backend) { | ||
| 731 | .stage2_x86_64 => { | ||
| 732 | for (&set.ints, other_set.ints) |*set_int, other_set_int| set_int.* |= other_set_int; | ||
| 733 | }, | ||
| 734 | else => { | ||
| 735 | set.ints = @as(@Vector(usize_count, usize), set.ints) | @as(@Vector(usize_count, usize), other_set.ints); | ||
| 736 | }, | ||
| 737 | } | ||
| 738 | } | ||
| 739 | |||
| 740 | /// Removes the specified feature but not its dependents. | ||
| 741 | pub fn removeFeature(set: *Set, arch_feature_index: Index) void { | ||
| 742 | const usize_index = arch_feature_index / @bitSizeOf(usize); | ||
| 743 | const bit_index = @as(ShiftInt, @intCast(arch_feature_index % @bitSizeOf(usize))); | ||
| 744 | set.ints[usize_index] &= ~(@as(usize, 1) << bit_index); | ||
| 745 | } | ||
| 746 | |||
| 747 | /// Removes the specified feature but not its dependents. | ||
| 748 | pub fn removeFeatureSet(set: *Set, other_set: Set) void { | ||
| 749 | switch (builtin.zig_backend) { | ||
| 750 | .stage2_x86_64 => { | ||
| 751 | for (&set.ints, other_set.ints) |*set_int, other_set_int| set_int.* &= ~other_set_int; | ||
| 752 | }, | ||
| 753 | else => { | ||
| 754 | set.ints = @as(@Vector(usize_count, usize), set.ints) & ~@as(@Vector(usize_count, usize), other_set.ints); | ||
| 755 | }, | ||
| 756 | } | ||
| 757 | } | ||
| 758 | |||
| 759 | pub fn populateDependencies(set: *Set, all_features_list: []const Cpu.Feature) void { | ||
| 760 | @setEvalBranchQuota(1000000); | ||
| 761 | |||
| 762 | var old = set.ints; | ||
| 763 | while (true) { | ||
| 764 | for (all_features_list, 0..) |feature, index_usize| { | ||
| 765 | const index = @as(Index, @intCast(index_usize)); | ||
| 766 | if (set.isEnabled(index)) { | ||
| 767 | set.addFeatureSet(feature.dependencies); | ||
| 768 | } | ||
| 769 | } | ||
| 770 | const nothing_changed = std.mem.eql(usize, &old, &set.ints); | ||
| 771 | if (nothing_changed) return; | ||
| 772 | old = set.ints; | ||
| 773 | } | ||
| 774 | } | ||
| 775 | |||
| 776 | pub fn asBytes(set: *const Set) *const [byte_count]u8 { | ||
| 777 | return @as(*const [byte_count]u8, @ptrCast(&set.ints)); | ||
| 778 | } | ||
| 779 | |||
| 780 | pub fn eql(set: Set, other_set: Set) bool { | ||
| 781 | return std.mem.eql(usize, &set.ints, &other_set.ints); | ||
| 782 | } | ||
| 783 | |||
| 784 | pub fn isSuperSetOf(set: Set, other_set: Set) bool { | ||
| 785 | switch (builtin.zig_backend) { | ||
| 786 | .stage2_x86_64 => { | ||
| 787 | var result = true; | ||
| 788 | for (&set.ints, other_set.ints) |*set_int, other_set_int| | ||
| 789 | result = result and (set_int.* & other_set_int) == other_set_int; | ||
| 790 | return result; | ||
| 791 | }, | ||
| 792 | else => { | ||
| 793 | const V = @Vector(usize_count, usize); | ||
| 794 | const set_v: V = set.ints; | ||
| 795 | const other_v: V = other_set.ints; | ||
| 796 | return @reduce(.And, (set_v & other_v) == other_v); | ||
| 797 | }, | ||
| 798 | } | ||
| 799 | } | ||
| 800 | }; | ||
| 801 | |||
| 802 | pub fn feature_set_fns(comptime F: type) type { | ||
| 803 | return struct { | ||
| 804 | /// Populates only the feature bits specified. | ||
| 805 | pub fn featureSet(features: []const F) Set { | ||
| 806 | var x = Set.empty; | ||
| 807 | for (features) |feature| { | ||
| 808 | x.addFeature(@intFromEnum(feature)); | ||
| 809 | } | ||
| 810 | return x; | ||
| 811 | } | ||
| 812 | |||
| 813 | /// Returns true if the specified feature is enabled. | ||
| 814 | pub fn featureSetHas(set: Set, feature: F) bool { | ||
| 815 | return set.isEnabled(@intFromEnum(feature)); | ||
| 816 | } | ||
| 817 | |||
| 818 | /// Returns true if any specified feature is enabled. | ||
| 819 | pub fn featureSetHasAny(set: Set, features: anytype) bool { | ||
| 820 | inline for (features) |feature| { | ||
| 821 | if (set.isEnabled(@intFromEnum(@as(F, feature)))) return true; | ||
| 822 | } | ||
| 823 | return false; | ||
| 824 | } | ||
| 825 | |||
| 826 | /// Returns true if every specified feature is enabled. | ||
| 827 | pub fn featureSetHasAll(set: Set, features: anytype) bool { | ||
| 828 | inline for (features) |feature| { | ||
| 829 | if (!set.isEnabled(@intFromEnum(@as(F, feature)))) return false; | ||
| 830 | } | ||
| 831 | return true; | ||
| 832 | } | ||
| 833 | }; | ||
| 834 | } | ||
| 835 | }; | ||
| 836 | |||
| 837 | pub const Arch = enum { | ||
| 838 | arm, | ||
| 839 | armeb, | ||
| 840 | aarch64, | ||
| 841 | aarch64_be, | ||
| 842 | aarch64_32, | ||
| 843 | arc, | ||
| 844 | avr, | ||
| 845 | bpfel, | ||
| 846 | bpfeb, | ||
| 847 | csky, | ||
| 848 | dxil, | ||
| 849 | hexagon, | ||
| 850 | loongarch32, | ||
| 851 | loongarch64, | ||
| 852 | m68k, | ||
| 853 | mips, | ||
| 854 | mipsel, | ||
| 855 | mips64, | ||
| 856 | mips64el, | ||
| 857 | msp430, | ||
| 858 | powerpc, | ||
| 859 | powerpcle, | ||
| 860 | powerpc64, | ||
| 861 | powerpc64le, | ||
| 862 | r600, | ||
| 863 | amdgcn, | ||
| 864 | riscv32, | ||
| 865 | riscv64, | ||
| 866 | sparc, | ||
| 867 | sparc64, | ||
| 868 | sparcel, | ||
| 869 | s390x, | ||
| 870 | tce, | ||
| 871 | tcele, | ||
| 872 | thumb, | ||
| 873 | thumbeb, | ||
| 874 | x86, | ||
| 875 | x86_64, | ||
| 876 | xcore, | ||
| 877 | xtensa, | ||
| 878 | nvptx, | ||
| 879 | nvptx64, | ||
| 880 | le32, | ||
| 881 | le64, | ||
| 882 | amdil, | ||
| 883 | amdil64, | ||
| 884 | hsail, | ||
| 885 | hsail64, | ||
| 886 | spir, | ||
| 887 | spir64, | ||
| 888 | spirv32, | ||
| 889 | spirv64, | ||
| 890 | kalimba, | ||
| 891 | shave, | ||
| 892 | lanai, | ||
| 893 | wasm32, | ||
| 894 | wasm64, | ||
| 895 | renderscript32, | ||
| 896 | renderscript64, | ||
| 897 | ve, | ||
| 898 | // Stage1 currently assumes that architectures above this comment | ||
| 899 | // map one-to-one with the ZigLLVM_ArchType enum. | ||
| 900 | spu_2, | ||
| 901 | |||
| 902 | pub inline fn isX86(arch: Arch) bool { | ||
| 903 | return switch (arch) { | ||
| 904 | .x86, .x86_64 => true, | ||
| 905 | else => false, | ||
| 906 | }; | ||
| 907 | } | ||
| 908 | |||
| 909 | pub inline fn isARM(arch: Arch) bool { | ||
| 910 | return switch (arch) { | ||
| 911 | .arm, .armeb => true, | ||
| 912 | else => false, | ||
| 913 | }; | ||
| 914 | } | ||
| 915 | |||
| 916 | pub inline fn isAARCH64(arch: Arch) bool { | ||
| 917 | return switch (arch) { | ||
| 918 | .aarch64, .aarch64_be, .aarch64_32 => true, | ||
| 919 | else => false, | ||
| 920 | }; | ||
| 921 | } | ||
| 922 | |||
| 923 | pub inline fn isThumb(arch: Arch) bool { | ||
| 924 | return switch (arch) { | ||
| 925 | .thumb, .thumbeb => true, | ||
| 926 | else => false, | ||
| 927 | }; | ||
| 928 | } | ||
| 929 | |||
| 930 | pub inline fn isArmOrThumb(arch: Arch) bool { | ||
| 931 | return arch.isARM() or arch.isThumb(); | ||
| 932 | } | ||
| 933 | |||
| 934 | pub inline fn isWasm(arch: Arch) bool { | ||
| 935 | return switch (arch) { | ||
| 936 | .wasm32, .wasm64 => true, | ||
| 937 | else => false, | ||
| 938 | }; | ||
| 939 | } | ||
| 940 | |||
| 941 | pub inline fn isRISCV(arch: Arch) bool { | ||
| 942 | return switch (arch) { | ||
| 943 | .riscv32, .riscv64 => true, | ||
| 944 | else => false, | ||
| 945 | }; | ||
| 946 | } | ||
| 947 | |||
| 948 | pub inline fn isMIPS(arch: Arch) bool { | ||
| 949 | return switch (arch) { | ||
| 950 | .mips, .mipsel, .mips64, .mips64el => true, | ||
| 951 | else => false, | ||
| 952 | }; | ||
| 953 | } | ||
| 954 | |||
| 955 | pub inline fn isPPC(arch: Arch) bool { | ||
| 956 | return switch (arch) { | ||
| 957 | .powerpc, .powerpcle => true, | ||
| 958 | else => false, | ||
| 959 | }; | ||
| 960 | } | ||
| 961 | |||
| 962 | pub inline fn isPPC64(arch: Arch) bool { | ||
| 963 | return switch (arch) { | ||
| 964 | .powerpc64, .powerpc64le => true, | ||
| 965 | else => false, | ||
| 966 | }; | ||
| 967 | } | ||
| 968 | |||
| 969 | pub inline fn isSPARC(arch: Arch) bool { | ||
| 970 | return switch (arch) { | ||
| 971 | .sparc, .sparcel, .sparc64 => true, | ||
| 972 | else => false, | ||
| 973 | }; | ||
| 974 | } | ||
| 975 | |||
| 976 | pub inline fn isSpirV(arch: Arch) bool { | ||
| 977 | return switch (arch) { | ||
| 978 | .spirv32, .spirv64 => true, | ||
| 979 | else => false, | ||
| 980 | }; | ||
| 981 | } | ||
| 982 | |||
| 983 | pub inline fn isBpf(arch: Arch) bool { | ||
| 984 | return switch (arch) { | ||
| 985 | .bpfel, .bpfeb => true, | ||
| 986 | else => false, | ||
| 987 | }; | ||
| 988 | } | ||
| 989 | |||
| 990 | pub inline fn isNvptx(arch: Arch) bool { | ||
| 991 | return switch (arch) { | ||
| 992 | .nvptx, .nvptx64 => true, | ||
| 993 | else => false, | ||
| 994 | }; | ||
| 995 | } | ||
| 996 | |||
| 997 | pub fn parseCpuModel(arch: Arch, cpu_name: []const u8) !*const Cpu.Model { | ||
| 998 | for (arch.allCpuModels()) |cpu| { | ||
| 999 | if (std.mem.eql(u8, cpu_name, cpu.name)) { | ||
| 1000 | return cpu; | ||
| 1001 | } | ||
| 1002 | } | ||
| 1003 | return error.UnknownCpuModel; | ||
| 1004 | } | ||
| 1005 | |||
| 1006 | pub fn toElfMachine(arch: Arch) std.elf.EM { | ||
| 1007 | return switch (arch) { | ||
| 1008 | .avr => .AVR, | ||
| 1009 | .msp430 => .MSP430, | ||
| 1010 | .arc => .ARC, | ||
| 1011 | .arm => .ARM, | ||
| 1012 | .armeb => .ARM, | ||
| 1013 | .hexagon => .HEXAGON, | ||
| 1014 | .dxil => .NONE, | ||
| 1015 | .m68k => .@"68K", | ||
| 1016 | .le32 => .NONE, | ||
| 1017 | .mips => .MIPS, | ||
| 1018 | .mipsel => .MIPS_RS3_LE, | ||
| 1019 | .powerpc, .powerpcle => .PPC, | ||
| 1020 | .r600 => .NONE, | ||
| 1021 | .riscv32 => .RISCV, | ||
| 1022 | .sparc => .SPARC, | ||
| 1023 | .sparcel => .SPARC, | ||
| 1024 | .tce => .NONE, | ||
| 1025 | .tcele => .NONE, | ||
| 1026 | .thumb => .ARM, | ||
| 1027 | .thumbeb => .ARM, | ||
| 1028 | .x86 => .@"386", | ||
| 1029 | .xcore => .XCORE, | ||
| 1030 | .xtensa => .XTENSA, | ||
| 1031 | .nvptx => .NONE, | ||
| 1032 | .amdil => .NONE, | ||
| 1033 | .hsail => .NONE, | ||
| 1034 | .spir => .NONE, | ||
| 1035 | .kalimba => .CSR_KALIMBA, | ||
| 1036 | .shave => .NONE, | ||
| 1037 | .lanai => .LANAI, | ||
| 1038 | .wasm32 => .NONE, | ||
| 1039 | .renderscript32 => .NONE, | ||
| 1040 | .aarch64_32 => .AARCH64, | ||
| 1041 | .aarch64 => .AARCH64, | ||
| 1042 | .aarch64_be => .AARCH64, | ||
| 1043 | .mips64 => .MIPS, | ||
| 1044 | .mips64el => .MIPS_RS3_LE, | ||
| 1045 | .powerpc64 => .PPC64, | ||
| 1046 | .powerpc64le => .PPC64, | ||
| 1047 | .riscv64 => .RISCV, | ||
| 1048 | .x86_64 => .X86_64, | ||
| 1049 | .nvptx64 => .NONE, | ||
| 1050 | .le64 => .NONE, | ||
| 1051 | .amdil64 => .NONE, | ||
| 1052 | .hsail64 => .NONE, | ||
| 1053 | .spir64 => .NONE, | ||
| 1054 | .wasm64 => .NONE, | ||
| 1055 | .renderscript64 => .NONE, | ||
| 1056 | .amdgcn => .AMDGPU, | ||
| 1057 | .bpfel => .BPF, | ||
| 1058 | .bpfeb => .BPF, | ||
| 1059 | .csky => .CSKY, | ||
| 1060 | .sparc64 => .SPARCV9, | ||
| 1061 | .s390x => .S390, | ||
| 1062 | .ve => .NONE, | ||
| 1063 | .spu_2 => .SPU_2, | ||
| 1064 | .spirv32 => .NONE, | ||
| 1065 | .spirv64 => .NONE, | ||
| 1066 | .loongarch32 => .NONE, | ||
| 1067 | .loongarch64 => .NONE, | ||
| 1068 | }; | ||
| 1069 | } | ||
| 1070 | |||
| 1071 | pub fn toCoffMachine(arch: Arch) std.coff.MachineType { | ||
| 1072 | return switch (arch) { | ||
| 1073 | .avr => .Unknown, | ||
| 1074 | .msp430 => .Unknown, | ||
| 1075 | .arc => .Unknown, | ||
| 1076 | .arm => .ARM, | ||
| 1077 | .armeb => .Unknown, | ||
| 1078 | .dxil => .Unknown, | ||
| 1079 | .hexagon => .Unknown, | ||
| 1080 | .m68k => .Unknown, | ||
| 1081 | .le32 => .Unknown, | ||
| 1082 | .mips => .Unknown, | ||
| 1083 | .mipsel => .Unknown, | ||
| 1084 | .powerpc, .powerpcle => .POWERPC, | ||
| 1085 | .r600 => .Unknown, | ||
| 1086 | .riscv32 => .RISCV32, | ||
| 1087 | .sparc => .Unknown, | ||
| 1088 | .sparcel => .Unknown, | ||
| 1089 | .tce => .Unknown, | ||
| 1090 | .tcele => .Unknown, | ||
| 1091 | .thumb => .Thumb, | ||
| 1092 | .thumbeb => .Thumb, | ||
| 1093 | .x86 => .I386, | ||
| 1094 | .xcore => .Unknown, | ||
| 1095 | .xtensa => .Unknown, | ||
| 1096 | .nvptx => .Unknown, | ||
| 1097 | .amdil => .Unknown, | ||
| 1098 | .hsail => .Unknown, | ||
| 1099 | .spir => .Unknown, | ||
| 1100 | .kalimba => .Unknown, | ||
| 1101 | .shave => .Unknown, | ||
| 1102 | .lanai => .Unknown, | ||
| 1103 | .wasm32 => .Unknown, | ||
| 1104 | .renderscript32 => .Unknown, | ||
| 1105 | .aarch64_32 => .ARM64, | ||
| 1106 | .aarch64 => .ARM64, | ||
| 1107 | .aarch64_be => .ARM64, | ||
| 1108 | .mips64 => .Unknown, | ||
| 1109 | .mips64el => .Unknown, | ||
| 1110 | .powerpc64 => .Unknown, | ||
| 1111 | .powerpc64le => .Unknown, | ||
| 1112 | .riscv64 => .RISCV64, | ||
| 1113 | .x86_64 => .X64, | ||
| 1114 | .nvptx64 => .Unknown, | ||
| 1115 | .le64 => .Unknown, | ||
| 1116 | .amdil64 => .Unknown, | ||
| 1117 | .hsail64 => .Unknown, | ||
| 1118 | .spir64 => .Unknown, | ||
| 1119 | .wasm64 => .Unknown, | ||
| 1120 | .renderscript64 => .Unknown, | ||
| 1121 | .amdgcn => .Unknown, | ||
| 1122 | .bpfel => .Unknown, | ||
| 1123 | .bpfeb => .Unknown, | ||
| 1124 | .csky => .Unknown, | ||
| 1125 | .sparc64 => .Unknown, | ||
| 1126 | .s390x => .Unknown, | ||
| 1127 | .ve => .Unknown, | ||
| 1128 | .spu_2 => .Unknown, | ||
| 1129 | .spirv32 => .Unknown, | ||
| 1130 | .spirv64 => .Unknown, | ||
| 1131 | .loongarch32 => .Unknown, | ||
| 1132 | .loongarch64 => .Unknown, | ||
| 1133 | }; | ||
| 1134 | } | ||
| 1135 | |||
| 1136 | pub fn endian(arch: Arch) std.builtin.Endian { | ||
| 1137 | return switch (arch) { | ||
| 1138 | .avr, | ||
| 1139 | .arm, | ||
| 1140 | .aarch64_32, | ||
| 1141 | .aarch64, | ||
| 1142 | .amdgcn, | ||
| 1143 | .amdil, | ||
| 1144 | .amdil64, | ||
| 1145 | .bpfel, | ||
| 1146 | .csky, | ||
| 1147 | .xtensa, | ||
| 1148 | .hexagon, | ||
| 1149 | .hsail, | ||
| 1150 | .hsail64, | ||
| 1151 | .kalimba, | ||
| 1152 | .le32, | ||
| 1153 | .le64, | ||
| 1154 | .mipsel, | ||
| 1155 | .mips64el, | ||
| 1156 | .msp430, | ||
| 1157 | .nvptx, | ||
| 1158 | .nvptx64, | ||
| 1159 | .sparcel, | ||
| 1160 | .tcele, | ||
| 1161 | .powerpcle, | ||
| 1162 | .powerpc64le, | ||
| 1163 | .r600, | ||
| 1164 | .riscv32, | ||
| 1165 | .riscv64, | ||
| 1166 | .x86, | ||
| 1167 | .x86_64, | ||
| 1168 | .wasm32, | ||
| 1169 | .wasm64, | ||
| 1170 | .xcore, | ||
| 1171 | .thumb, | ||
| 1172 | .spir, | ||
| 1173 | .spir64, | ||
| 1174 | .renderscript32, | ||
| 1175 | .renderscript64, | ||
| 1176 | .shave, | ||
| 1177 | .ve, | ||
| 1178 | .spu_2, | ||
| 1179 | // GPU bitness is opaque. For now, assume little endian. | ||
| 1180 | .spirv32, | ||
| 1181 | .spirv64, | ||
| 1182 | .dxil, | ||
| 1183 | .loongarch32, | ||
| 1184 | .loongarch64, | ||
| 1185 | .arc, | ||
| 1186 | => .little, | ||
| 1187 | |||
| 1188 | .armeb, | ||
| 1189 | .aarch64_be, | ||
| 1190 | .bpfeb, | ||
| 1191 | .m68k, | ||
| 1192 | .mips, | ||
| 1193 | .mips64, | ||
| 1194 | .powerpc, | ||
| 1195 | .powerpc64, | ||
| 1196 | .thumbeb, | ||
| 1197 | .sparc, | ||
| 1198 | .sparc64, | ||
| 1199 | .tce, | ||
| 1200 | .lanai, | ||
| 1201 | .s390x, | ||
| 1202 | => .big, | ||
| 1203 | }; | ||
| 1204 | } | ||
| 1205 | |||
| 1206 | /// Returns whether this architecture supports the address space | ||
| 1207 | pub fn supportsAddressSpace(arch: Arch, address_space: std.builtin.AddressSpace) bool { | ||
| 1208 | const is_nvptx = arch == .nvptx or arch == .nvptx64; | ||
| 1209 | const is_spirv = arch == .spirv32 or arch == .spirv64; | ||
| 1210 | const is_gpu = is_nvptx or is_spirv or arch == .amdgcn; | ||
| 1211 | return switch (address_space) { | ||
| 1212 | .generic => true, | ||
| 1213 | .fs, .gs, .ss => arch == .x86_64 or arch == .x86, | ||
| 1214 | .global, .constant, .local, .shared => is_gpu, | ||
| 1215 | .param => is_nvptx, | ||
| 1216 | // TODO this should also check how many flash banks the cpu has | ||
| 1217 | .flash, .flash1, .flash2, .flash3, .flash4, .flash5 => arch == .avr, | ||
| 1218 | }; | ||
| 1219 | } | ||
| 1220 | |||
| 1221 | /// Returns a name that matches the lib/std/target/* source file name. | ||
| 1222 | pub fn genericName(arch: Arch) []const u8 { | ||
| 1223 | return switch (arch) { | ||
| 1224 | .arm, .armeb, .thumb, .thumbeb => "arm", | ||
| 1225 | .aarch64, .aarch64_be, .aarch64_32 => "aarch64", | ||
| 1226 | .bpfel, .bpfeb => "bpf", | ||
| 1227 | .loongarch32, .loongarch64 => "loongarch", | ||
| 1228 | .mips, .mipsel, .mips64, .mips64el => "mips", | ||
| 1229 | .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc", | ||
| 1230 | .amdgcn => "amdgpu", | ||
| 1231 | .riscv32, .riscv64 => "riscv", | ||
| 1232 | .sparc, .sparc64, .sparcel => "sparc", | ||
| 1233 | .s390x => "s390x", | ||
| 1234 | .x86, .x86_64 => "x86", | ||
| 1235 | .nvptx, .nvptx64 => "nvptx", | ||
| 1236 | .wasm32, .wasm64 => "wasm", | ||
| 1237 | .spirv32, .spirv64 => "spirv", | ||
| 1238 | else => @tagName(arch), | ||
| 1239 | }; | ||
| 1240 | } | ||
| 1241 | |||
| 1242 | /// All CPU features Zig is aware of, sorted lexicographically by name. | ||
| 1243 | pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { | ||
| 1244 | return switch (arch) { | ||
| 1245 | .arm, .armeb, .thumb, .thumbeb => &arm.all_features, | ||
| 1246 | .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features, | ||
| 1247 | .arc => &arc.all_features, | ||
| 1248 | .avr => &avr.all_features, | ||
| 1249 | .bpfel, .bpfeb => &bpf.all_features, | ||
| 1250 | .csky => &csky.all_features, | ||
| 1251 | .hexagon => &hexagon.all_features, | ||
| 1252 | .loongarch32, .loongarch64 => &loongarch.all_features, | ||
| 1253 | .m68k => &m68k.all_features, | ||
| 1254 | .mips, .mipsel, .mips64, .mips64el => &mips.all_features, | ||
| 1255 | .msp430 => &msp430.all_features, | ||
| 1256 | .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features, | ||
| 1257 | .amdgcn => &amdgpu.all_features, | ||
| 1258 | .riscv32, .riscv64 => &riscv.all_features, | ||
| 1259 | .sparc, .sparc64, .sparcel => &sparc.all_features, | ||
| 1260 | .spirv32, .spirv64 => &spirv.all_features, | ||
| 1261 | .s390x => &s390x.all_features, | ||
| 1262 | .x86, .x86_64 => &x86.all_features, | ||
| 1263 | .xtensa => &xtensa.all_features, | ||
| 1264 | .nvptx, .nvptx64 => &nvptx.all_features, | ||
| 1265 | .ve => &ve.all_features, | ||
| 1266 | .wasm32, .wasm64 => &wasm.all_features, | ||
| 1267 | |||
| 1268 | else => &[0]Cpu.Feature{}, | ||
| 1269 | }; | ||
| 1270 | } | ||
| 1271 | |||
| 1272 | /// All processors Zig is aware of, sorted lexicographically by name. | ||
| 1273 | pub fn allCpuModels(arch: Arch) []const *const Cpu.Model { | ||
| 1274 | return switch (arch) { | ||
| 1275 | .arc => comptime allCpusFromDecls(arc.cpu), | ||
| 1276 | .arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu), | ||
| 1277 | .aarch64, .aarch64_be, .aarch64_32 => comptime allCpusFromDecls(aarch64.cpu), | ||
| 1278 | .avr => comptime allCpusFromDecls(avr.cpu), | ||
| 1279 | .bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu), | ||
| 1280 | .csky => comptime allCpusFromDecls(csky.cpu), | ||
| 1281 | .hexagon => comptime allCpusFromDecls(hexagon.cpu), | ||
| 1282 | .loongarch32, .loongarch64 => comptime allCpusFromDecls(loongarch.cpu), | ||
| 1283 | .m68k => comptime allCpusFromDecls(m68k.cpu), | ||
| 1284 | .mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu), | ||
| 1285 | .msp430 => comptime allCpusFromDecls(msp430.cpu), | ||
| 1286 | .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu), | ||
| 1287 | .amdgcn => comptime allCpusFromDecls(amdgpu.cpu), | ||
| 1288 | .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu), | ||
| 1289 | .sparc, .sparc64, .sparcel => comptime allCpusFromDecls(sparc.cpu), | ||
| 1290 | .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu), | ||
| 1291 | .s390x => comptime allCpusFromDecls(s390x.cpu), | ||
| 1292 | .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu), | ||
| 1293 | .xtensa => comptime allCpusFromDecls(xtensa.cpu), | ||
| 1294 | .nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu), | ||
| 1295 | .ve => comptime allCpusFromDecls(ve.cpu), | ||
| 1296 | .wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu), | ||
| 1297 | |||
| 1298 | else => &[0]*const Model{}, | ||
| 1299 | }; | ||
| 1300 | } | ||
| 1301 | |||
| 1302 | fn allCpusFromDecls(comptime cpus: type) []const *const Cpu.Model { | ||
| 1303 | const decls = @typeInfo(cpus).Struct.decls; | ||
| 1304 | var array: [decls.len]*const Cpu.Model = undefined; | ||
| 1305 | for (decls, 0..) |decl, i| { | ||
| 1306 | array[i] = &@field(cpus, decl.name); | ||
| 1307 | } | ||
| 1308 | return &array; | ||
| 1309 | } | ||
| 1310 | }; | ||
| 1311 | |||
| 1312 | pub const Model = struct { | ||
| 1313 | name: []const u8, | ||
| 1314 | llvm_name: ?[:0]const u8, | ||
| 1315 | features: Feature.Set, | ||
| 1316 | |||
| 1317 | pub fn toCpu(model: *const Model, arch: Arch) Cpu { | ||
| 1318 | var features = model.features; | ||
| 1319 | features.populateDependencies(arch.allFeaturesList()); | ||
| 1320 | return .{ | ||
| 1321 | .arch = arch, | ||
| 1322 | .model = model, | ||
| 1323 | .features = features, | ||
| 1324 | }; | ||
| 1325 | } | ||
| 1326 | |||
| 1327 | pub fn generic(arch: Arch) *const Model { | ||
| 1328 | const S = struct { | ||
| 1329 | const generic_model = Model{ | ||
| 1330 | .name = "generic", | ||
| 1331 | .llvm_name = null, | ||
| 1332 | .features = Cpu.Feature.Set.empty, | ||
| 1333 | }; | ||
| 1334 | }; | ||
| 1335 | return switch (arch) { | ||
| 1336 | .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, | ||
| 1337 | .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, | ||
| 1338 | .avr => &avr.cpu.avr2, | ||
| 1339 | .bpfel, .bpfeb => &bpf.cpu.generic, | ||
| 1340 | .hexagon => &hexagon.cpu.generic, | ||
| 1341 | .loongarch32 => &loongarch.cpu.generic_la32, | ||
| 1342 | .loongarch64 => &loongarch.cpu.generic_la64, | ||
| 1343 | .m68k => &m68k.cpu.generic, | ||
| 1344 | .mips, .mipsel => &mips.cpu.mips32, | ||
| 1345 | .mips64, .mips64el => &mips.cpu.mips64, | ||
| 1346 | .msp430 => &msp430.cpu.generic, | ||
| 1347 | .powerpc => &powerpc.cpu.ppc, | ||
| 1348 | .powerpcle => &powerpc.cpu.ppc, | ||
| 1349 | .powerpc64 => &powerpc.cpu.ppc64, | ||
| 1350 | .powerpc64le => &powerpc.cpu.ppc64le, | ||
| 1351 | .amdgcn => &amdgpu.cpu.generic, | ||
| 1352 | .riscv32 => &riscv.cpu.generic_rv32, | ||
| 1353 | .riscv64 => &riscv.cpu.generic_rv64, | ||
| 1354 | .spirv32, .spirv64 => &spirv.cpu.generic, | ||
| 1355 | .sparc, .sparcel => &sparc.cpu.generic, | ||
| 1356 | .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline | ||
| 1357 | .s390x => &s390x.cpu.generic, | ||
| 1358 | .x86 => &x86.cpu.i386, | ||
| 1359 | .x86_64 => &x86.cpu.x86_64, | ||
| 1360 | .nvptx, .nvptx64 => &nvptx.cpu.sm_20, | ||
| 1361 | .ve => &ve.cpu.generic, | ||
| 1362 | .wasm32, .wasm64 => &wasm.cpu.generic, | ||
| 1363 | |||
| 1364 | else => &S.generic_model, | ||
| 1365 | }; | ||
| 1366 | } | ||
| 1367 | |||
| 1368 | pub fn baseline(arch: Arch) *const Model { | ||
| 1369 | return switch (arch) { | ||
| 1370 | .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline, | ||
| 1371 | .riscv32 => &riscv.cpu.baseline_rv32, | ||
| 1372 | .riscv64 => &riscv.cpu.baseline_rv64, | ||
| 1373 | .x86 => &x86.cpu.pentium4, | ||
| 1374 | .nvptx, .nvptx64 => &nvptx.cpu.sm_20, | ||
| 1375 | .sparc, .sparcel => &sparc.cpu.v8, | ||
| 1376 | |||
| 1377 | else => generic(arch), | ||
| 1378 | }; | ||
| 1379 | } | ||
| 1380 | }; | ||
| 1381 | |||
| 1382 | /// The "default" set of CPU features for cross-compiling. A conservative set | ||
| 1383 | /// of features that is expected to be supported on most available hardware. | ||
| 1384 | pub fn baseline(arch: Arch) Cpu { | ||
| 1385 | return Model.baseline(arch).toCpu(arch); | ||
| 1386 | } | ||
| 1387 | }; | ||
| 1388 | |||
| 1389 | pub fn zigTriple(self: Target, allocator: Allocator) ![]u8 { | ||
| 1390 | return std.zig.CrossTarget.fromTarget(self).zigTriple(allocator); | ||
| 1391 | } | ||
| 1392 | |||
| 1393 | pub fn linuxTripleSimple(allocator: Allocator, cpu_arch: Cpu.Arch, os_tag: Os.Tag, abi: Abi) ![]u8 { | ||
| 1394 | return std.fmt.allocPrint(allocator, "{s}-{s}-{s}", .{ @tagName(cpu_arch), @tagName(os_tag), @tagName(abi) }); | ||
| 1395 | } | ||
| 1396 | |||
| 1397 | pub fn linuxTriple(self: Target, allocator: Allocator) ![]u8 { | ||
| 1398 | return linuxTripleSimple(allocator, self.cpu.arch, self.os.tag, self.abi); | ||
| 1399 | } | ||
| 1400 | |||
| 1401 | pub fn exeFileExtSimple(cpu_arch: Cpu.Arch, os_tag: Os.Tag) [:0]const u8 { | ||
| 1402 | return switch (os_tag) { | ||
| 1403 | .windows => ".exe", | ||
| 1404 | .uefi => ".efi", | ||
| 1405 | .plan9 => plan9Ext(cpu_arch), | ||
| 1406 | else => switch (cpu_arch) { | ||
| 1407 | .wasm32, .wasm64 => ".wasm", | ||
| 1408 | else => "", | ||
| 1409 | }, | ||
| 1410 | }; | ||
| 1411 | } | ||
| 1412 | |||
| 1413 | pub fn exeFileExt(self: Target) [:0]const u8 { | ||
| 1414 | return exeFileExtSimple(self.cpu.arch, self.os.tag); | ||
| 1415 | } | ||
| 1416 | |||
| 1417 | pub fn staticLibSuffix_os_abi(os_tag: Os.Tag, abi: Abi) [:0]const u8 { | ||
| 1418 | if (abi == .msvc) { | ||
| 1419 | return ".lib"; | ||
| 1420 | } | ||
| 1421 | switch (os_tag) { | ||
| 1422 | .windows, .uefi => return ".lib", | ||
| 1423 | else => return ".a", | ||
| 1424 | } | ||
| 1425 | } | ||
| 1426 | |||
| 1427 | pub fn staticLibSuffix(self: Target) [:0]const u8 { | ||
| 1428 | return staticLibSuffix_os_abi(self.os.tag, self.abi); | ||
| 1429 | } | ||
| 1430 | |||
| 1431 | pub fn dynamicLibSuffix(self: Target) [:0]const u8 { | ||
| 1432 | return self.os.tag.dynamicLibSuffix(); | ||
| 1433 | } | ||
| 1434 | |||
| 1435 | pub fn libPrefix_os_abi(os_tag: Os.Tag, abi: Abi) [:0]const u8 { | ||
| 1436 | if (abi == .msvc) { | ||
| 1437 | return ""; | ||
| 1438 | } | ||
| 1439 | switch (os_tag) { | ||
| 1440 | .windows, .uefi => return "", | ||
| 1441 | else => return "lib", | ||
| 1442 | } | ||
| 1443 | } | ||
| 1444 | |||
| 1445 | pub fn libPrefix(self: Target) [:0]const u8 { | ||
| 1446 | return libPrefix_os_abi(self.os.tag, self.abi); | ||
| 1447 | } | ||
| 1448 | |||
| 1449 | pub inline fn isMinGW(self: Target) bool { | ||
| 1450 | return self.os.tag == .windows and self.isGnu(); | ||
| 1451 | } | ||
| 1452 | |||
| 1453 | pub inline fn isGnu(self: Target) bool { | ||
| 1454 | return self.abi.isGnu(); | ||
| 1455 | } | ||
| 1456 | |||
| 1457 | pub inline fn isMusl(self: Target) bool { | ||
| 1458 | return self.abi.isMusl(); | ||
| 1459 | } | ||
| 1460 | |||
| 1461 | pub inline fn isAndroid(self: Target) bool { | ||
| 1462 | return self.abi == .android; | ||
| 1463 | } | ||
| 1464 | |||
| 1465 | pub inline fn isWasm(self: Target) bool { | ||
| 1466 | return self.cpu.arch.isWasm(); | ||
| 1467 | } | ||
| 1468 | |||
| 1469 | pub inline fn isDarwin(self: Target) bool { | ||
| 1470 | return self.os.tag.isDarwin(); | ||
| 1471 | } | ||
| 1472 | |||
| 1473 | pub inline fn isBSD(self: Target) bool { | ||
| 1474 | return self.os.tag.isBSD(); | ||
| 1475 | } | ||
| 1476 | |||
| 1477 | pub inline fn isBpfFreestanding(self: Target) bool { | ||
| 1478 | return self.cpu.arch.isBpf() and self.os.tag == .freestanding; | ||
| 1479 | } | ||
| 1480 | |||
| 1481 | pub inline fn isGnuLibC_os_tag_abi(os_tag: Os.Tag, abi: Abi) bool { | ||
| 1482 | return os_tag == .linux and abi.isGnu(); | ||
| 1483 | } | ||
| 1484 | |||
| 1485 | pub inline fn isGnuLibC(self: Target) bool { | ||
| 1486 | return isGnuLibC_os_tag_abi(self.os.tag, self.abi); | ||
| 1487 | } | ||
| 1488 | |||
| 1489 | pub inline fn supportsNewStackCall(self: Target) bool { | ||
| 1490 | return !self.cpu.arch.isWasm(); | ||
| 1491 | } | ||
| 1492 | |||
| 1493 | pub inline fn isSpirV(self: Target) bool { | ||
| 1494 | return self.cpu.arch.isSpirV(); | ||
| 1495 | } | ||
| 1496 | |||
| 1497 | pub const FloatAbi = enum { | ||
| 1498 | hard, | ||
| 1499 | soft, | ||
| 1500 | }; | ||
| 1501 | |||
| 1502 | pub inline fn getFloatAbi(self: Target) FloatAbi { | ||
| 1503 | return self.abi.floatAbi(); | ||
| 1504 | } | ||
| 1505 | |||
| 1506 | pub inline fn hasDynamicLinker(self: Target) bool { | ||
| 1507 | if (self.cpu.arch.isWasm()) { | ||
| 1508 | return false; | ||
| 1509 | } | ||
| 1510 | switch (self.os.tag) { | ||
| 1511 | .freestanding, | ||
| 1512 | .ios, | ||
| 1513 | .tvos, | ||
| 1514 | .watchos, | ||
| 1515 | .macos, | ||
| 1516 | .uefi, | ||
| 1517 | .windows, | ||
| 1518 | .emscripten, | ||
| 1519 | .opencl, | ||
| 1520 | .glsl450, | ||
| 1521 | .vulkan, | ||
| 1522 | .plan9, | ||
| 1523 | .other, | ||
| 1524 | => return false, | ||
| 1525 | else => return true, | ||
| 1526 | } | ||
| 1527 | } | ||
| 1528 | |||
| 1529 | pub const DynamicLinker = struct { | ||
| 1530 | /// Contains the memory used to store the dynamic linker path. This field should | ||
| 1531 | /// not be used directly. See `get` and `set`. This field exists so that this API requires no allocator. | ||
| 1532 | buffer: [255]u8 = undefined, | ||
| 1533 | |||
| 1534 | /// Used to construct the dynamic linker path. This field should not be used | ||
| 1535 | /// directly. See `get` and `set`. | ||
| 1536 | max_byte: ?u8 = null, | ||
| 1537 | |||
| 1538 | /// Asserts that the length is less than or equal to 255 bytes. | ||
| 1539 | pub fn init(dl_or_null: ?[]const u8) DynamicLinker { | ||
| 1540 | var result: DynamicLinker = undefined; | ||
| 1541 | result.set(dl_or_null); | ||
| 1542 | return result; | ||
| 1543 | } | ||
| 1544 | |||
| 1545 | /// The returned memory has the same lifetime as the `DynamicLinker`. | ||
| 1546 | pub fn get(self: *const DynamicLinker) ?[]const u8 { | ||
| 1547 | const m: usize = self.max_byte orelse return null; | ||
| 1548 | return self.buffer[0 .. m + 1]; | ||
| 1549 | } | ||
| 1550 | |||
| 1551 | /// Asserts that the length is less than or equal to 255 bytes. | ||
| 1552 | pub fn set(self: *DynamicLinker, dl_or_null: ?[]const u8) void { | ||
| 1553 | if (dl_or_null) |dl| { | ||
| 1554 | @memcpy(self.buffer[0..dl.len], dl); | ||
| 1555 | self.max_byte = @as(u8, @intCast(dl.len - 1)); | ||
| 1556 | } else { | ||
| 1557 | self.max_byte = null; | ||
| 1558 | } | ||
| 1559 | } | ||
| 1560 | }; | ||
| 1561 | |||
| 1562 | pub fn standardDynamicLinkerPath(self: Target) DynamicLinker { | ||
| 1563 | var result: DynamicLinker = .{}; | ||
| 1564 | const S = struct { | ||
| 1565 | fn print(r: *DynamicLinker, comptime fmt: []const u8, args: anytype) DynamicLinker { | ||
| 1566 | r.max_byte = @as(u8, @intCast((std.fmt.bufPrint(&r.buffer, fmt, args) catch unreachable).len - 1)); | ||
| 1567 | return r.*; | ||
| 1568 | } | ||
| 1569 | fn copy(r: *DynamicLinker, s: []const u8) DynamicLinker { | ||
| 1570 | @memcpy(r.buffer[0..s.len], s); | ||
| 1571 | r.max_byte = @as(u8, @intCast(s.len - 1)); | ||
| 1572 | return r.*; | ||
| 1573 | } | ||
| 1574 | }; | ||
| 1575 | const print = S.print; | ||
| 1576 | const copy = S.copy; | ||
| 1577 | |||
| 1578 | if (self.abi == .android) { | ||
| 1579 | const suffix = if (self.ptrBitWidth() == 64) "64" else ""; | ||
| 1580 | return print(&result, "/system/bin/linker{s}", .{suffix}); | ||
| 1581 | } | ||
| 1582 | |||
| 1583 | if (self.abi.isMusl()) { | ||
| 1584 | const is_arm = switch (self.cpu.arch) { | ||
| 1585 | .arm, .armeb, .thumb, .thumbeb => true, | ||
| 1586 | else => false, | ||
| 1587 | }; | ||
| 1588 | const arch_part = switch (self.cpu.arch) { | ||
| 1589 | .arm, .thumb => "arm", | ||
| 1590 | .armeb, .thumbeb => "armeb", | ||
| 1591 | else => |arch| @tagName(arch), | ||
| 1592 | }; | ||
| 1593 | const arch_suffix = if (is_arm and self.abi.floatAbi() == .hard) "hf" else ""; | ||
| 1594 | return print(&result, "/lib/ld-musl-{s}{s}.so.1", .{ arch_part, arch_suffix }); | ||
| 1595 | } | ||
| 1596 | |||
| 1597 | switch (self.os.tag) { | ||
| 1598 | .freebsd => return copy(&result, "/libexec/ld-elf.so.1"), | ||
| 1599 | .netbsd => return copy(&result, "/libexec/ld.elf_so"), | ||
| 1600 | .openbsd => return copy(&result, "/usr/libexec/ld.so"), | ||
| 1601 | .dragonfly => return copy(&result, "/libexec/ld-elf.so.2"), | ||
| 1602 | .solaris, .illumos => return copy(&result, "/lib/64/ld.so.1"), | ||
| 1603 | .linux => switch (self.cpu.arch) { | ||
| 1604 | .x86, | ||
| 1605 | .sparc, | ||
| 1606 | .sparcel, | ||
| 1607 | => return copy(&result, "/lib/ld-linux.so.2"), | ||
| 1608 | |||
| 1609 | .aarch64 => return copy(&result, "/lib/ld-linux-aarch64.so.1"), | ||
| 1610 | .aarch64_be => return copy(&result, "/lib/ld-linux-aarch64_be.so.1"), | ||
| 1611 | .aarch64_32 => return copy(&result, "/lib/ld-linux-aarch64_32.so.1"), | ||
| 1612 | |||
| 1613 | .arm, | ||
| 1614 | .armeb, | ||
| 1615 | .thumb, | ||
| 1616 | .thumbeb, | ||
| 1617 | => return copy(&result, switch (self.abi.floatAbi()) { | ||
| 1618 | .hard => "/lib/ld-linux-armhf.so.3", | ||
| 1619 | else => "/lib/ld-linux.so.3", | ||
| 1620 | }), | ||
| 1621 | |||
| 1622 | .mips, | ||
| 1623 | .mipsel, | ||
| 1624 | .mips64, | ||
| 1625 | .mips64el, | ||
| 1626 | => { | ||
| 1627 | const lib_suffix = switch (self.abi) { | ||
| 1628 | .gnuabin32, .gnux32 => "32", | ||
| 1629 | .gnuabi64 => "64", | ||
| 1630 | else => "", | ||
| 1631 | }; | ||
| 1632 | const is_nan_2008 = mips.featureSetHas(self.cpu.features, .nan2008); | ||
| 1633 | const loader = if (is_nan_2008) "ld-linux-mipsn8.so.1" else "ld.so.1"; | ||
| 1634 | return print(&result, "/lib{s}/{s}", .{ lib_suffix, loader }); | ||
| 1635 | }, | ||
| 1636 | |||
| 1637 | .powerpc, .powerpcle => return copy(&result, "/lib/ld.so.1"), | ||
| 1638 | .powerpc64, .powerpc64le => return copy(&result, "/lib64/ld64.so.2"), | ||
| 1639 | .s390x => return copy(&result, "/lib64/ld64.so.1"), | ||
| 1640 | .sparc64 => return copy(&result, "/lib64/ld-linux.so.2"), | ||
| 1641 | .x86_64 => return copy(&result, switch (self.abi) { | ||
| 1642 | .gnux32 => "/libx32/ld-linux-x32.so.2", | ||
| 1643 | else => "/lib64/ld-linux-x86-64.so.2", | ||
| 1644 | }), | ||
| 1645 | |||
| 1646 | .riscv32 => return copy(&result, "/lib/ld-linux-riscv32-ilp32.so.1"), | ||
| 1647 | .riscv64 => return copy(&result, "/lib/ld-linux-riscv64-lp64.so.1"), | ||
| 1648 | |||
| 1649 | // Architectures in this list have been verified as not having a standard | ||
| 1650 | // dynamic linker path. | ||
| 1651 | .wasm32, | ||
| 1652 | .wasm64, | ||
| 1653 | .bpfel, | ||
| 1654 | .bpfeb, | ||
| 1655 | .nvptx, | ||
| 1656 | .nvptx64, | ||
| 1657 | .spu_2, | ||
| 1658 | .avr, | ||
| 1659 | .spirv32, | ||
| 1660 | .spirv64, | ||
| 1661 | => return result, | ||
| 1662 | |||
| 1663 | // TODO go over each item in this list and either move it to the above list, or | ||
| 1664 | // implement the standard dynamic linker path code for it. | ||
| 1665 | .arc, | ||
| 1666 | .csky, | ||
| 1667 | .hexagon, | ||
| 1668 | .m68k, | ||
| 1669 | .msp430, | ||
| 1670 | .r600, | ||
| 1671 | .amdgcn, | ||
| 1672 | .tce, | ||
| 1673 | .tcele, | ||
| 1674 | .xcore, | ||
| 1675 | .le32, | ||
| 1676 | .le64, | ||
| 1677 | .amdil, | ||
| 1678 | .amdil64, | ||
| 1679 | .hsail, | ||
| 1680 | .hsail64, | ||
| 1681 | .spir, | ||
| 1682 | .spir64, | ||
| 1683 | .kalimba, | ||
| 1684 | .shave, | ||
| 1685 | .lanai, | ||
| 1686 | .renderscript32, | ||
| 1687 | .renderscript64, | ||
| 1688 | .ve, | ||
| 1689 | .dxil, | ||
| 1690 | .loongarch32, | ||
| 1691 | .loongarch64, | ||
| 1692 | .xtensa, | ||
| 1693 | => return result, | ||
| 1694 | }, | ||
| 1695 | |||
| 1696 | .ios, | ||
| 1697 | .tvos, | ||
| 1698 | .watchos, | ||
| 1699 | .macos, | ||
| 1700 | => return copy(&result, "/usr/lib/dyld"), | ||
| 1701 | |||
| 1702 | // Operating systems in this list have been verified as not having a standard | ||
| 1703 | // dynamic linker path. | ||
| 1704 | .freestanding, | ||
| 1705 | .uefi, | ||
| 1706 | .windows, | ||
| 1707 | .emscripten, | ||
| 1708 | .wasi, | ||
| 1709 | .opencl, | ||
| 1710 | .glsl450, | ||
| 1711 | .vulkan, | ||
| 1712 | .other, | ||
| 1713 | .plan9, | ||
| 1714 | => return result, | ||
| 1715 | |||
| 1716 | // TODO revisit when multi-arch for Haiku is available | ||
| 1717 | .haiku => return copy(&result, "/system/runtime_loader"), | ||
| 1718 | |||
| 1719 | // TODO go over each item in this list and either move it to the above list, or | ||
| 1720 | // implement the standard dynamic linker path code for it. | ||
| 1721 | .ananas, | ||
| 1722 | .cloudabi, | ||
| 1723 | .fuchsia, | ||
| 1724 | .kfreebsd, | ||
| 1725 | .lv2, | ||
| 1726 | .zos, | ||
| 1727 | .minix, | ||
| 1728 | .rtems, | ||
| 1729 | .nacl, | ||
| 1730 | .aix, | ||
| 1731 | .cuda, | ||
| 1732 | .nvcl, | ||
| 1733 | .amdhsa, | ||
| 1734 | .ps4, | ||
| 1735 | .ps5, | ||
| 1736 | .elfiamcu, | ||
| 1737 | .mesa3d, | ||
| 1738 | .contiki, | ||
| 1739 | .amdpal, | ||
| 1740 | .hermit, | ||
| 1741 | .hurd, | ||
| 1742 | .driverkit, | ||
| 1743 | .shadermodel, | ||
| 1744 | .liteos, | ||
| 1745 | => return result, | ||
| 1746 | } | ||
| 1747 | } | ||
| 1748 | |||
| 1749 | /// 0c spim little-endian MIPS 3000 family | ||
| 1750 | /// 1c 68000 Motorola MC68000 | ||
| 1751 | /// 2c 68020 Motorola MC68020 | ||
| 1752 | /// 5c arm little-endian ARM | ||
| 1753 | /// 6c amd64 AMD64 and compatibles (e.g., Intel EM64T) | ||
| 1754 | /// 7c arm64 ARM64 (ARMv8) | ||
| 1755 | /// 8c 386 Intel x86, i486, Pentium, etc. | ||
| 1756 | /// kc sparc Sun SPARC | ||
| 1757 | /// qc power Power PC | ||
| 1758 | /// vc mips big-endian MIPS 3000 family | ||
| 1759 | pub fn plan9Ext(cpu_arch: Cpu.Arch) [:0]const u8 { | ||
| 1760 | return switch (cpu_arch) { | ||
| 1761 | .arm => ".5", | ||
| 1762 | .x86_64 => ".6", | ||
| 1763 | .aarch64 => ".7", | ||
| 1764 | .x86 => ".8", | ||
| 1765 | .sparc => ".k", | ||
| 1766 | .powerpc, .powerpcle => ".q", | ||
| 1767 | .mips, .mipsel => ".v", | ||
| 1768 | // ISAs without designated characters get 'X' for lack of a better option. | ||
| 1769 | else => ".X", | ||
| 1770 | }; | ||
| 1771 | } | ||
| 1772 | |||
| 1773 | pub fn maxIntAlignment(target: Target) u16 { | ||
| 1774 | return switch (target.cpu.arch) { | ||
| 1775 | .avr => 1, | ||
| 1776 | .msp430 => 2, | ||
| 1777 | .xcore => 4, | ||
| 1778 | |||
| 1779 | .arm, | ||
| 1780 | .armeb, | ||
| 1781 | .thumb, | ||
| 1782 | .thumbeb, | ||
| 1783 | .hexagon, | ||
| 1784 | .mips, | ||
| 1785 | .mipsel, | ||
| 1786 | .powerpc, | ||
| 1787 | .powerpcle, | ||
| 1788 | .r600, | ||
| 1789 | .amdgcn, | ||
| 1790 | .riscv32, | ||
| 1791 | .sparc, | ||
| 1792 | .sparcel, | ||
| 1793 | .s390x, | ||
| 1794 | .lanai, | ||
| 1795 | .wasm32, | ||
| 1796 | .wasm64, | ||
| 1797 | => 8, | ||
| 1798 | |||
| 1799 | .x86 => if (target.ofmt == .c) 16 else return switch (target.os.tag) { | ||
| 1800 | .windows, .uefi => 8, | ||
| 1801 | else => 4, | ||
| 1802 | }, | ||
| 1803 | |||
| 1804 | // For these, LLVMABIAlignmentOfType(i128) reports 8. Note that 16 | ||
| 1805 | // is a relevant number in three cases: | ||
| 1806 | // 1. Different machine code instruction when loading into SIMD register. | ||
| 1807 | // 2. The C ABI wants 16 for extern structs. | ||
| 1808 | // 3. 16-byte cmpxchg needs 16-byte alignment. | ||
| 1809 | // Same logic for powerpc64, mips64, sparc64. | ||
| 1810 | .x86_64, | ||
| 1811 | .powerpc64, | ||
| 1812 | .powerpc64le, | ||
| 1813 | .mips64, | ||
| 1814 | .mips64el, | ||
| 1815 | .sparc64, | ||
| 1816 | => return switch (target.ofmt) { | ||
| 1817 | .c => 16, | ||
| 1818 | else => 8, | ||
| 1819 | }, | ||
| 1820 | |||
| 1821 | // Even LLVMABIAlignmentOfType(i128) agrees on these targets. | ||
| 1822 | .aarch64, | ||
| 1823 | .aarch64_be, | ||
| 1824 | .aarch64_32, | ||
| 1825 | .riscv64, | ||
| 1826 | .bpfel, | ||
| 1827 | .bpfeb, | ||
| 1828 | .nvptx, | ||
| 1829 | .nvptx64, | ||
| 1830 | => 16, | ||
| 1831 | |||
| 1832 | // Below this comment are unverified but based on the fact that C requires | ||
| 1833 | // int128_t to be 16 bytes aligned, it's a safe default. | ||
| 1834 | .spu_2, | ||
| 1835 | .csky, | ||
| 1836 | .arc, | ||
| 1837 | .m68k, | ||
| 1838 | .tce, | ||
| 1839 | .tcele, | ||
| 1840 | .le32, | ||
| 1841 | .amdil, | ||
| 1842 | .hsail, | ||
| 1843 | .spir, | ||
| 1844 | .kalimba, | ||
| 1845 | .renderscript32, | ||
| 1846 | .spirv32, | ||
| 1847 | .shave, | ||
| 1848 | .le64, | ||
| 1849 | .amdil64, | ||
| 1850 | .hsail64, | ||
| 1851 | .spir64, | ||
| 1852 | .renderscript64, | ||
| 1853 | .ve, | ||
| 1854 | .spirv64, | ||
| 1855 | .dxil, | ||
| 1856 | .loongarch32, | ||
| 1857 | .loongarch64, | ||
| 1858 | .xtensa, | ||
| 1859 | => 16, | ||
| 1860 | }; | ||
| 1861 | } | ||
| 1862 | |||
| 1863 | pub fn ptrBitWidth(target: Target) u16 { | ||
| 1864 | switch (target.abi) { | ||
| 1865 | .gnux32, .muslx32, .gnuabin32, .gnuilp32 => return 32, | ||
| 1866 | .gnuabi64 => return 64, | ||
| 1867 | else => {}, | ||
| 1868 | } | ||
| 1869 | switch (target.cpu.arch) { | ||
| 1870 | .avr, | ||
| 1871 | .msp430, | ||
| 1872 | .spu_2, | ||
| 1873 | => return 16, | ||
| 1874 | |||
| 1875 | .arc, | ||
| 1876 | .arm, | ||
| 1877 | .armeb, | ||
| 1878 | .csky, | ||
| 1879 | .hexagon, | ||
| 1880 | .m68k, | ||
| 1881 | .le32, | ||
| 1882 | .mips, | ||
| 1883 | .mipsel, | ||
| 1884 | .powerpc, | ||
| 1885 | .powerpcle, | ||
| 1886 | .r600, | ||
| 1887 | .riscv32, | ||
| 1888 | .sparcel, | ||
| 1889 | .tce, | ||
| 1890 | .tcele, | ||
| 1891 | .thumb, | ||
| 1892 | .thumbeb, | ||
| 1893 | .x86, | ||
| 1894 | .xcore, | ||
| 1895 | .nvptx, | ||
| 1896 | .amdil, | ||
| 1897 | .hsail, | ||
| 1898 | .spir, | ||
| 1899 | .kalimba, | ||
| 1900 | .shave, | ||
| 1901 | .lanai, | ||
| 1902 | .wasm32, | ||
| 1903 | .renderscript32, | ||
| 1904 | .aarch64_32, | ||
| 1905 | .spirv32, | ||
| 1906 | .loongarch32, | ||
| 1907 | .dxil, | ||
| 1908 | .xtensa, | ||
| 1909 | => return 32, | ||
| 1910 | |||
| 1911 | .aarch64, | ||
| 1912 | .aarch64_be, | ||
| 1913 | .mips64, | ||
| 1914 | .mips64el, | ||
| 1915 | .powerpc64, | ||
| 1916 | .powerpc64le, | ||
| 1917 | .riscv64, | ||
| 1918 | .x86_64, | ||
| 1919 | .nvptx64, | ||
| 1920 | .le64, | ||
| 1921 | .amdil64, | ||
| 1922 | .hsail64, | ||
| 1923 | .spir64, | ||
| 1924 | .wasm64, | ||
| 1925 | .renderscript64, | ||
| 1926 | .amdgcn, | ||
| 1927 | .bpfel, | ||
| 1928 | .bpfeb, | ||
| 1929 | .sparc64, | ||
| 1930 | .s390x, | ||
| 1931 | .ve, | ||
| 1932 | .spirv64, | ||
| 1933 | .loongarch64, | ||
| 1934 | => return 64, | ||
| 1935 | |||
| 1936 | .sparc => return if (std.Target.sparc.featureSetHas(target.cpu.features, .v9)) 64 else 32, | ||
| 1937 | } | ||
| 1938 | } | ||
| 1939 | |||
| 1940 | pub fn stackAlignment(target: Target) u16 { | ||
| 1941 | return switch (target.cpu.arch) { | ||
| 1942 | .m68k => 2, | ||
| 1943 | .amdgcn => 4, | ||
| 1944 | .x86 => switch (target.os.tag) { | ||
| 1945 | .windows, .uefi => 4, | ||
| 1946 | else => 16, | ||
| 1947 | }, | ||
| 1948 | .arm, | ||
| 1949 | .armeb, | ||
| 1950 | .thumb, | ||
| 1951 | .thumbeb, | ||
| 1952 | .mips, | ||
| 1953 | .mipsel, | ||
| 1954 | .sparc, | ||
| 1955 | .sparcel, | ||
| 1956 | => 8, | ||
| 1957 | .aarch64, | ||
| 1958 | .aarch64_be, | ||
| 1959 | .aarch64_32, | ||
| 1960 | .bpfeb, | ||
| 1961 | .bpfel, | ||
| 1962 | .mips64, | ||
| 1963 | .mips64el, | ||
| 1964 | .riscv32, | ||
| 1965 | .riscv64, | ||
| 1966 | .sparc64, | ||
| 1967 | .x86_64, | ||
| 1968 | .ve, | ||
| 1969 | .wasm32, | ||
| 1970 | .wasm64, | ||
| 1971 | => 16, | ||
| 1972 | .powerpc64, | ||
| 1973 | .powerpc64le, | ||
| 1974 | => switch (target.os.tag) { | ||
| 1975 | else => 8, | ||
| 1976 | .linux => 16, | ||
| 1977 | }, | ||
| 1978 | else => @divExact(target.ptrBitWidth(), 8), | ||
| 1979 | }; | ||
| 1980 | } | ||
| 1981 | |||
| 1982 | /// Default signedness of `char` for the native C compiler for this target | ||
| 1983 | /// Note that char signedness is implementation-defined and many compilers provide | ||
| 1984 | /// an option to override the default signedness e.g. GCC's -funsigned-char / -fsigned-char | ||
| 1985 | pub fn charSignedness(target: Target) std.builtin.Signedness { | ||
| 1986 | switch (target.cpu.arch) { | ||
| 1987 | .aarch64, | ||
| 1988 | .aarch64_32, | ||
| 1989 | .aarch64_be, | ||
| 1990 | .arm, | ||
| 1991 | .armeb, | ||
| 1992 | .thumb, | ||
| 1993 | .thumbeb, | ||
| 1994 | => return if (target.os.tag.isDarwin() or target.os.tag == .windows) .signed else .unsigned, | ||
| 1995 | .powerpc, .powerpc64 => return if (target.os.tag.isDarwin()) .signed else .unsigned, | ||
| 1996 | .powerpcle, | ||
| 1997 | .powerpc64le, | ||
| 1998 | .s390x, | ||
| 1999 | .xcore, | ||
| 2000 | .arc, | ||
| 2001 | .msp430, | ||
| 2002 | .riscv32, | ||
| 2003 | .riscv64, | ||
| 2004 | => return .unsigned, | ||
| 2005 | else => return .signed, | ||
| 2006 | } | ||
| 2007 | } | ||
| 2008 | |||
| 2009 | pub const CType = enum { | ||
| 2010 | char, | ||
| 2011 | short, | ||
| 2012 | ushort, | ||
| 2013 | int, | ||
| 2014 | uint, | ||
| 2015 | long, | ||
| 2016 | ulong, | ||
| 2017 | longlong, | ||
| 2018 | ulonglong, | ||
| 2019 | float, | ||
| 2020 | double, | ||
| 2021 | longdouble, | ||
| 2022 | }; | ||
| 2023 | |||
| 2024 | pub fn c_type_byte_size(t: Target, c_type: CType) u16 { | ||
| 2025 | return switch (c_type) { | ||
| 2026 | .char, | ||
| 2027 | .short, | ||
| 2028 | .ushort, | ||
| 2029 | .int, | ||
| 2030 | .uint, | ||
| 2031 | .long, | ||
| 2032 | .ulong, | ||
| 2033 | .longlong, | ||
| 2034 | .ulonglong, | ||
| 2035 | .float, | ||
| 2036 | .double, | ||
| 2037 | => @divExact(c_type_bit_size(t, c_type), 8), | ||
| 2038 | |||
| 2039 | .longdouble => switch (c_type_bit_size(t, c_type)) { | ||
| 2040 | 16 => 2, | ||
| 2041 | 32 => 4, | ||
| 2042 | 64 => 8, | ||
| 2043 | 80 => @as(u16, @intCast(std.mem.alignForward(usize, 10, c_type_alignment(t, .longdouble)))), | ||
| 2044 | 128 => 16, | ||
| 2045 | else => unreachable, | ||
| 2046 | }, | ||
| 2047 | }; | ||
| 2048 | } | ||
| 2049 | |||
| 2050 | pub fn c_type_bit_size(target: Target, c_type: CType) u16 { | ||
| 2051 | switch (target.os.tag) { | ||
| 2052 | .freestanding, .other => switch (target.cpu.arch) { | ||
| 2053 | .msp430 => switch (c_type) { | ||
| 2054 | .char => return 8, | ||
| 2055 | .short, .ushort, .int, .uint => return 16, | ||
| 2056 | .float, .long, .ulong => return 32, | ||
| 2057 | .longlong, .ulonglong, .double, .longdouble => return 64, | ||
| 2058 | }, | ||
| 2059 | .avr => switch (c_type) { | ||
| 2060 | .char => return 8, | ||
| 2061 | .short, .ushort, .int, .uint => return 16, | ||
| 2062 | .long, .ulong, .float, .double, .longdouble => return 32, | ||
| 2063 | .longlong, .ulonglong => return 64, | ||
| 2064 | }, | ||
| 2065 | .tce, .tcele => switch (c_type) { | ||
| 2066 | .char => return 8, | ||
| 2067 | .short, .ushort => return 16, | ||
| 2068 | .int, .uint, .long, .ulong, .longlong, .ulonglong => return 32, | ||
| 2069 | .float, .double, .longdouble => return 32, | ||
| 2070 | }, | ||
| 2071 | .mips64, .mips64el => switch (c_type) { | ||
| 2072 | .char => return 8, | ||
| 2073 | .short, .ushort => return 16, | ||
| 2074 | .int, .uint, .float => return 32, | ||
| 2075 | .long, .ulong => return if (target.abi != .gnuabin32) 64 else 32, | ||
| 2076 | .longlong, .ulonglong, .double => return 64, | ||
| 2077 | .longdouble => return 128, | ||
| 2078 | }, | ||
| 2079 | .x86_64 => switch (c_type) { | ||
| 2080 | .char => return 8, | ||
| 2081 | .short, .ushort => return 16, | ||
| 2082 | .int, .uint, .float => return 32, | ||
| 2083 | .long, .ulong => switch (target.abi) { | ||
| 2084 | .gnux32, .muslx32 => return 32, | ||
| 2085 | else => return 64, | ||
| 2086 | }, | ||
| 2087 | .longlong, .ulonglong, .double => return 64, | ||
| 2088 | .longdouble => return 80, | ||
| 2089 | }, | ||
| 2090 | else => switch (c_type) { | ||
| 2091 | .char => return 8, | ||
| 2092 | .short, .ushort => return 16, | ||
| 2093 | .int, .uint, .float => return 32, | ||
| 2094 | .long, .ulong => return target.ptrBitWidth(), | ||
| 2095 | .longlong, .ulonglong, .double => return 64, | ||
| 2096 | .longdouble => switch (target.cpu.arch) { | ||
| 2097 | .x86 => switch (target.abi) { | ||
| 2098 | .android => return 64, | ||
| 2099 | else => return 80, | ||
| 2100 | }, | ||
| 2101 | |||
| 2102 | .powerpc, | ||
| 2103 | .powerpcle, | ||
| 2104 | .powerpc64, | ||
| 2105 | .powerpc64le, | ||
| 2106 | => switch (target.abi) { | ||
| 2107 | .musl, | ||
| 2108 | .musleabi, | ||
| 2109 | .musleabihf, | ||
| 2110 | .muslx32, | ||
| 2111 | => return 64, | ||
| 2112 | else => return 128, | ||
| 2113 | }, | ||
| 2114 | |||
| 2115 | .riscv32, | ||
| 2116 | .riscv64, | ||
| 2117 | .aarch64, | ||
| 2118 | .aarch64_be, | ||
| 2119 | .aarch64_32, | ||
| 2120 | .s390x, | ||
| 2121 | .sparc, | ||
| 2122 | .sparc64, | ||
| 2123 | .sparcel, | ||
| 2124 | .wasm32, | ||
| 2125 | .wasm64, | ||
| 2126 | => return 128, | ||
| 2127 | |||
| 2128 | else => return 64, | ||
| 2129 | }, | ||
| 2130 | }, | ||
| 2131 | }, | ||
| 2132 | |||
| 2133 | .linux, | ||
| 2134 | .freebsd, | ||
| 2135 | .netbsd, | ||
| 2136 | .dragonfly, | ||
| 2137 | .openbsd, | ||
| 2138 | .wasi, | ||
| 2139 | .emscripten, | ||
| 2140 | .plan9, | ||
| 2141 | .solaris, | ||
| 2142 | .illumos, | ||
| 2143 | .haiku, | ||
| 2144 | .ananas, | ||
| 2145 | .fuchsia, | ||
| 2146 | .minix, | ||
| 2147 | => switch (target.cpu.arch) { | ||
| 2148 | .msp430 => switch (c_type) { | ||
| 2149 | .char => return 8, | ||
| 2150 | .short, .ushort, .int, .uint => return 16, | ||
| 2151 | .long, .ulong, .float => return 32, | ||
| 2152 | .longlong, .ulonglong, .double, .longdouble => return 64, | ||
| 2153 | }, | ||
| 2154 | .avr => switch (c_type) { | ||
| 2155 | .char => return 8, | ||
| 2156 | .short, .ushort, .int, .uint => return 16, | ||
| 2157 | .long, .ulong, .float, .double, .longdouble => return 32, | ||
| 2158 | .longlong, .ulonglong => return 64, | ||
| 2159 | }, | ||
| 2160 | .tce, .tcele => switch (c_type) { | ||
| 2161 | .char => return 8, | ||
| 2162 | .short, .ushort => return 16, | ||
| 2163 | .int, .uint, .long, .ulong, .longlong, .ulonglong => return 32, | ||
| 2164 | .float, .double, .longdouble => return 32, | ||
| 2165 | }, | ||
| 2166 | .mips64, .mips64el => switch (c_type) { | ||
| 2167 | .char => return 8, | ||
| 2168 | .short, .ushort => return 16, | ||
| 2169 | .int, .uint, .float => return 32, | ||
| 2170 | .long, .ulong => return if (target.abi != .gnuabin32) 64 else 32, | ||
| 2171 | .longlong, .ulonglong, .double => return 64, | ||
| 2172 | .longdouble => if (target.os.tag == .freebsd) return 64 else return 128, | ||
| 2173 | }, | ||
| 2174 | .x86_64 => switch (c_type) { | ||
| 2175 | .char => return 8, | ||
| 2176 | .short, .ushort => return 16, | ||
| 2177 | .int, .uint, .float => return 32, | ||
| 2178 | .long, .ulong => switch (target.abi) { | ||
| 2179 | .gnux32, .muslx32 => return 32, | ||
| 2180 | else => return 64, | ||
| 2181 | }, | ||
| 2182 | .longlong, .ulonglong, .double => return 64, | ||
| 2183 | .longdouble => return 80, | ||
| 2184 | }, | ||
| 2185 | else => switch (c_type) { | ||
| 2186 | .char => return 8, | ||
| 2187 | .short, .ushort => return 16, | ||
| 2188 | .int, .uint, .float => return 32, | ||
| 2189 | .long, .ulong => return target.ptrBitWidth(), | ||
| 2190 | .longlong, .ulonglong, .double => return 64, | ||
| 2191 | .longdouble => switch (target.cpu.arch) { | ||
| 2192 | .x86 => switch (target.abi) { | ||
| 2193 | .android => return 64, | ||
| 2194 | else => return 80, | ||
| 2195 | }, | ||
| 2196 | |||
| 2197 | .powerpc, | ||
| 2198 | .powerpcle, | ||
| 2199 | => switch (target.abi) { | ||
| 2200 | .musl, | ||
| 2201 | .musleabi, | ||
| 2202 | .musleabihf, | ||
| 2203 | .muslx32, | ||
| 2204 | => return 64, | ||
| 2205 | else => switch (target.os.tag) { | ||
| 2206 | .freebsd, .netbsd, .openbsd => return 64, | ||
| 2207 | else => return 128, | ||
| 2208 | }, | ||
| 2209 | }, | ||
| 2210 | |||
| 2211 | .powerpc64, | ||
| 2212 | .powerpc64le, | ||
| 2213 | => switch (target.abi) { | ||
| 2214 | .musl, | ||
| 2215 | .musleabi, | ||
| 2216 | .musleabihf, | ||
| 2217 | .muslx32, | ||
| 2218 | => return 64, | ||
| 2219 | else => switch (target.os.tag) { | ||
| 2220 | .freebsd, .openbsd => return 64, | ||
| 2221 | else => return 128, | ||
| 2222 | }, | ||
| 2223 | }, | ||
| 2224 | |||
| 2225 | .riscv32, | ||
| 2226 | .riscv64, | ||
| 2227 | .aarch64, | ||
| 2228 | .aarch64_be, | ||
| 2229 | .aarch64_32, | ||
| 2230 | .s390x, | ||
| 2231 | .mips64, | ||
| 2232 | .mips64el, | ||
| 2233 | .sparc, | ||
| 2234 | .sparc64, | ||
| 2235 | .sparcel, | ||
| 2236 | .wasm32, | ||
| 2237 | .wasm64, | ||
| 2238 | => return 128, | ||
| 2239 | |||
| 2240 | else => return 64, | ||
| 2241 | }, | ||
| 2242 | }, | ||
| 2243 | }, | ||
| 2244 | |||
| 2245 | .windows, .uefi => switch (target.cpu.arch) { | ||
| 2246 | .x86 => switch (c_type) { | ||
| 2247 | .char => return 8, | ||
| 2248 | .short, .ushort => return 16, | ||
| 2249 | .int, .uint, .float => return 32, | ||
| 2250 | .long, .ulong => return 32, | ||
| 2251 | .longlong, .ulonglong, .double => return 64, | ||
| 2252 | .longdouble => switch (target.abi) { | ||
| 2253 | .gnu, .gnuilp32, .cygnus => return 80, | ||
| 2254 | else => return 64, | ||
| 2255 | }, | ||
| 2256 | }, | ||
| 2257 | .x86_64 => switch (c_type) { | ||
| 2258 | .char => return 8, | ||
| 2259 | .short, .ushort => return 16, | ||
| 2260 | .int, .uint, .float => return 32, | ||
| 2261 | .long, .ulong => switch (target.abi) { | ||
| 2262 | .cygnus => return 64, | ||
| 2263 | else => return 32, | ||
| 2264 | }, | ||
| 2265 | .longlong, .ulonglong, .double => return 64, | ||
| 2266 | .longdouble => switch (target.abi) { | ||
| 2267 | .gnu, .gnuilp32, .cygnus => return 80, | ||
| 2268 | else => return 64, | ||
| 2269 | }, | ||
| 2270 | }, | ||
| 2271 | else => switch (c_type) { | ||
| 2272 | .char => return 8, | ||
| 2273 | .short, .ushort => return 16, | ||
| 2274 | .int, .uint, .float => return 32, | ||
| 2275 | .long, .ulong => return 32, | ||
| 2276 | .longlong, .ulonglong, .double => return 64, | ||
| 2277 | .longdouble => return 64, | ||
| 2278 | }, | ||
| 2279 | }, | ||
| 2280 | |||
| 2281 | .macos, .ios, .tvos, .watchos => switch (c_type) { | ||
| 2282 | .char => return 8, | ||
| 2283 | .short, .ushort => return 16, | ||
| 2284 | .int, .uint, .float => return 32, | ||
| 2285 | .long, .ulong => switch (target.cpu.arch) { | ||
| 2286 | .x86, .arm, .aarch64_32 => return 32, | ||
| 2287 | .x86_64 => switch (target.abi) { | ||
| 2288 | .gnux32, .muslx32 => return 32, | ||
| 2289 | else => return 64, | ||
| 2290 | }, | ||
| 2291 | else => return 64, | ||
| 2292 | }, | ||
| 2293 | .longlong, .ulonglong, .double => return 64, | ||
| 2294 | .longdouble => switch (target.cpu.arch) { | ||
| 2295 | .x86 => switch (target.abi) { | ||
| 2296 | .android => return 64, | ||
| 2297 | else => return 80, | ||
| 2298 | }, | ||
| 2299 | .x86_64 => return 80, | ||
| 2300 | else => return 64, | ||
| 2301 | }, | ||
| 2302 | }, | ||
| 2303 | |||
| 2304 | .nvcl, .cuda => switch (c_type) { | ||
| 2305 | .char => return 8, | ||
| 2306 | .short, .ushort => return 16, | ||
| 2307 | .int, .uint, .float => return 32, | ||
| 2308 | .long, .ulong => switch (target.cpu.arch) { | ||
| 2309 | .nvptx => return 32, | ||
| 2310 | .nvptx64 => return 64, | ||
| 2311 | else => return 64, | ||
| 2312 | }, | ||
| 2313 | .longlong, .ulonglong, .double => return 64, | ||
| 2314 | .longdouble => return 64, | ||
| 2315 | }, | ||
| 2316 | |||
| 2317 | .amdhsa, .amdpal => switch (c_type) { | ||
| 2318 | .char => return 8, | ||
| 2319 | .short, .ushort => return 16, | ||
| 2320 | .int, .uint, .float => return 32, | ||
| 2321 | .long, .ulong, .longlong, .ulonglong, .double => return 64, | ||
| 2322 | .longdouble => return 128, | ||
| 2323 | }, | ||
| 2324 | |||
| 2325 | .opencl => switch (c_type) { | ||
| 2326 | .char => return 8, | ||
| 2327 | .short, .ushort => return 16, | ||
| 2328 | .int, .uint, .float => return 32, | ||
| 2329 | .long, .ulong, .double => return 64, | ||
| 2330 | .longlong, .ulonglong => return 128, | ||
| 2331 | // Note: The OpenCL specification does not guarantee a particular size for long double, | ||
| 2332 | // but clang uses 128 bits. | ||
| 2333 | .longdouble => return 128, | ||
| 2334 | }, | ||
| 2335 | |||
| 2336 | .ps4, .ps5 => switch (c_type) { | ||
| 2337 | .char => return 8, | ||
| 2338 | .short, .ushort => return 16, | ||
| 2339 | .int, .uint, .float => return 32, | ||
| 2340 | .long, .ulong => return 64, | ||
| 2341 | .longlong, .ulonglong, .double => return 64, | ||
| 2342 | .longdouble => return 80, | ||
| 2343 | }, | ||
| 2344 | |||
| 2345 | .cloudabi, | ||
| 2346 | .kfreebsd, | ||
| 2347 | .lv2, | ||
| 2348 | .zos, | ||
| 2349 | .rtems, | ||
| 2350 | .nacl, | ||
| 2351 | .aix, | ||
| 2352 | .elfiamcu, | ||
| 2353 | .mesa3d, | ||
| 2354 | .contiki, | ||
| 2355 | .hermit, | ||
| 2356 | .hurd, | ||
| 2357 | .glsl450, | ||
| 2358 | .vulkan, | ||
| 2359 | .driverkit, | ||
| 2360 | .shadermodel, | ||
| 2361 | .liteos, | ||
| 2362 | => @panic("TODO specify the C integer and float type sizes for this OS"), | ||
| 2363 | } | ||
| 2364 | } | ||
| 2365 | |||
| 2366 | pub fn c_type_alignment(target: Target, c_type: CType) u16 { | ||
| 2367 | // Overrides for unusual alignments | ||
| 2368 | switch (target.cpu.arch) { | ||
| 2369 | .avr => return 1, | ||
| 2370 | .x86 => switch (target.os.tag) { | ||
| 2371 | .windows, .uefi => switch (c_type) { | ||
| 2372 | .longlong, .ulonglong, .double => return 8, | ||
| 2373 | .longdouble => switch (target.abi) { | ||
| 2374 | .gnu, .gnuilp32, .cygnus => return 4, | ||
| 2375 | else => return 8, | ||
| 2376 | }, | ||
| 2377 | else => {}, | ||
| 2378 | }, | ||
| 2379 | else => {}, | ||
| 2380 | }, | ||
| 2381 | else => {}, | ||
| 2382 | } | ||
| 2383 | |||
| 2384 | // Next-power-of-two-aligned, up to a maximum. | ||
| 2385 | return @min( | ||
| 2386 | std.math.ceilPowerOfTwoAssert(u16, (c_type_bit_size(target, c_type) + 7) / 8), | ||
| 2387 | switch (target.cpu.arch) { | ||
| 2388 | .arm, .armeb, .thumb, .thumbeb => switch (target.os.tag) { | ||
| 2389 | .netbsd => switch (target.abi) { | ||
| 2390 | .gnueabi, | ||
| 2391 | .gnueabihf, | ||
| 2392 | .eabi, | ||
| 2393 | .eabihf, | ||
| 2394 | .android, | ||
| 2395 | .musleabi, | ||
| 2396 | .musleabihf, | ||
| 2397 | => 8, | ||
| 2398 | |||
| 2399 | else => @as(u16, 4), | ||
| 2400 | }, | ||
| 2401 | .ios, .tvos, .watchos => 4, | ||
| 2402 | else => 8, | ||
| 2403 | }, | ||
| 2404 | |||
| 2405 | .msp430, | ||
| 2406 | .avr, | ||
| 2407 | => 2, | ||
| 2408 | |||
| 2409 | .arc, | ||
| 2410 | .csky, | ||
| 2411 | .x86, | ||
| 2412 | .xcore, | ||
| 2413 | .dxil, | ||
| 2414 | .loongarch32, | ||
| 2415 | .tce, | ||
| 2416 | .tcele, | ||
| 2417 | .le32, | ||
| 2418 | .amdil, | ||
| 2419 | .hsail, | ||
| 2420 | .spir, | ||
| 2421 | .spirv32, | ||
| 2422 | .kalimba, | ||
| 2423 | .shave, | ||
| 2424 | .renderscript32, | ||
| 2425 | .ve, | ||
| 2426 | .spu_2, | ||
| 2427 | .xtensa, | ||
| 2428 | => 4, | ||
| 2429 | |||
| 2430 | .aarch64_32, | ||
| 2431 | .amdgcn, | ||
| 2432 | .amdil64, | ||
| 2433 | .bpfel, | ||
| 2434 | .bpfeb, | ||
| 2435 | .hexagon, | ||
| 2436 | .hsail64, | ||
| 2437 | .loongarch64, | ||
| 2438 | .m68k, | ||
| 2439 | .mips, | ||
| 2440 | .mipsel, | ||
| 2441 | .sparc, | ||
| 2442 | .sparcel, | ||
| 2443 | .sparc64, | ||
| 2444 | .lanai, | ||
| 2445 | .le64, | ||
| 2446 | .nvptx, | ||
| 2447 | .nvptx64, | ||
| 2448 | .r600, | ||
| 2449 | .s390x, | ||
| 2450 | .spir64, | ||
| 2451 | .spirv64, | ||
| 2452 | .renderscript64, | ||
| 2453 | => 8, | ||
| 2454 | |||
| 2455 | .aarch64, | ||
| 2456 | .aarch64_be, | ||
| 2457 | .mips64, | ||
| 2458 | .mips64el, | ||
| 2459 | .powerpc, | ||
| 2460 | .powerpcle, | ||
| 2461 | .powerpc64, | ||
| 2462 | .powerpc64le, | ||
| 2463 | .riscv32, | ||
| 2464 | .riscv64, | ||
| 2465 | .x86_64, | ||
| 2466 | .wasm32, | ||
| 2467 | .wasm64, | ||
| 2468 | => 16, | ||
| 2469 | }, | ||
| 2470 | ); | ||
| 2471 | } | ||
| 2472 | |||
| 2473 | pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { | ||
| 2474 | // Overrides for unusual alignments | ||
| 2475 | switch (target.cpu.arch) { | ||
| 2476 | .arm, .armeb, .thumb, .thumbeb => switch (target.os.tag) { | ||
| 2477 | .netbsd => switch (target.abi) { | ||
| 2478 | .gnueabi, | ||
| 2479 | .gnueabihf, | ||
| 2480 | .eabi, | ||
| 2481 | .eabihf, | ||
| 2482 | .android, | ||
| 2483 | .musleabi, | ||
| 2484 | .musleabihf, | ||
| 2485 | => {}, | ||
| 2486 | |||
| 2487 | else => switch (c_type) { | ||
| 2488 | .longdouble => return 4, | ||
| 2489 | else => {}, | ||
| 2490 | }, | ||
| 2491 | }, | ||
| 2492 | .ios, .tvos, .watchos => switch (c_type) { | ||
| 2493 | .longdouble => return 4, | ||
| 2494 | else => {}, | ||
| 2495 | }, | ||
| 2496 | else => {}, | ||
| 2497 | }, | ||
| 2498 | .arc => switch (c_type) { | ||
| 2499 | .longdouble => return 4, | ||
| 2500 | else => {}, | ||
| 2501 | }, | ||
| 2502 | .avr => switch (c_type) { | ||
| 2503 | .char, .int, .uint, .long, .ulong, .float, .longdouble => return 1, | ||
| 2504 | .short, .ushort => return 2, | ||
| 2505 | .double => return 4, | ||
| 2506 | .longlong, .ulonglong => return 8, | ||
| 2507 | }, | ||
| 2508 | .x86 => switch (target.os.tag) { | ||
| 2509 | .windows, .uefi => switch (c_type) { | ||
| 2510 | .longdouble => switch (target.abi) { | ||
| 2511 | .gnu, .gnuilp32, .cygnus => return 4, | ||
| 2512 | else => return 8, | ||
| 2513 | }, | ||
| 2514 | else => {}, | ||
| 2515 | }, | ||
| 2516 | else => switch (c_type) { | ||
| 2517 | .longdouble => return 4, | ||
| 2518 | else => {}, | ||
| 2519 | }, | ||
| 2520 | }, | ||
| 2521 | else => {}, | ||
| 2522 | } | ||
| 2523 | |||
| 2524 | // Next-power-of-two-aligned, up to a maximum. | ||
| 2525 | return @min( | ||
| 2526 | std.math.ceilPowerOfTwoAssert(u16, (c_type_bit_size(target, c_type) + 7) / 8), | ||
| 2527 | switch (target.cpu.arch) { | ||
| 2528 | .msp430 => @as(u16, 2), | ||
| 2529 | |||
| 2530 | .csky, | ||
| 2531 | .xcore, | ||
| 2532 | .dxil, | ||
| 2533 | .loongarch32, | ||
| 2534 | .tce, | ||
| 2535 | .tcele, | ||
| 2536 | .le32, | ||
| 2537 | .amdil, | ||
| 2538 | .hsail, | ||
| 2539 | .spir, | ||
| 2540 | .spirv32, | ||
| 2541 | .kalimba, | ||
| 2542 | .shave, | ||
| 2543 | .renderscript32, | ||
| 2544 | .ve, | ||
| 2545 | .spu_2, | ||
| 2546 | .xtensa, | ||
| 2547 | => 4, | ||
| 2548 | |||
| 2549 | .arc, | ||
| 2550 | .arm, | ||
| 2551 | .armeb, | ||
| 2552 | .avr, | ||
| 2553 | .thumb, | ||
| 2554 | .thumbeb, | ||
| 2555 | .aarch64_32, | ||
| 2556 | .amdgcn, | ||
| 2557 | .amdil64, | ||
| 2558 | .bpfel, | ||
| 2559 | .bpfeb, | ||
| 2560 | .hexagon, | ||
| 2561 | .hsail64, | ||
| 2562 | .x86, | ||
| 2563 | .loongarch64, | ||
| 2564 | .m68k, | ||
| 2565 | .mips, | ||
| 2566 | .mipsel, | ||
| 2567 | .sparc, | ||
| 2568 | .sparcel, | ||
| 2569 | .sparc64, | ||
| 2570 | .lanai, | ||
| 2571 | .le64, | ||
| 2572 | .nvptx, | ||
| 2573 | .nvptx64, | ||
| 2574 | .r600, | ||
| 2575 | .s390x, | ||
| 2576 | .spir64, | ||
| 2577 | .spirv64, | ||
| 2578 | .renderscript64, | ||
| 2579 | => 8, | ||
| 2580 | |||
| 2581 | .aarch64, | ||
| 2582 | .aarch64_be, | ||
| 2583 | .mips64, | ||
| 2584 | .mips64el, | ||
| 2585 | .powerpc, | ||
| 2586 | .powerpcle, | ||
| 2587 | .powerpc64, | ||
| 2588 | .powerpc64le, | ||
| 2589 | .riscv32, | ||
| 2590 | .riscv64, | ||
| 2591 | .x86_64, | ||
| 2592 | .wasm32, | ||
| 2593 | .wasm64, | ||
| 2594 | => 16, | ||
| 2595 | }, | ||
| 2596 | ); | ||
| 2597 | } | ||
| 2598 | |||
| 2599 | pub fn is_libc_lib_name(target: std.Target, name: []const u8) bool { | ||
| 2600 | const ignore_case = target.os.tag == .macos or target.os.tag == .windows; | ||
| 2601 | |||
| 2602 | if (eqlIgnoreCase(ignore_case, name, "c")) | ||
| 2603 | return true; | ||
| 2604 | |||
| 2605 | if (target.isMinGW()) { | ||
| 2606 | if (eqlIgnoreCase(ignore_case, name, "m")) | ||
| 2607 | return true; | ||
| 2608 | if (eqlIgnoreCase(ignore_case, name, "uuid")) | ||
| 2609 | return true; | ||
| 2610 | if (eqlIgnoreCase(ignore_case, name, "mingw32")) | ||
| 2611 | return true; | ||
| 2612 | if (eqlIgnoreCase(ignore_case, name, "msvcrt-os")) | ||
| 2613 | return true; | ||
| 2614 | if (eqlIgnoreCase(ignore_case, name, "mingwex")) | ||
| 2615 | return true; | ||
| 2616 | |||
| 2617 | return false; | ||
| 2618 | } | ||
| 2619 | |||
| 2620 | if (target.abi.isGnu() or target.abi.isMusl()) { | ||
| 2621 | if (eqlIgnoreCase(ignore_case, name, "m")) | ||
| 2622 | return true; | ||
| 2623 | if (eqlIgnoreCase(ignore_case, name, "rt")) | ||
| 2624 | return true; | ||
| 2625 | if (eqlIgnoreCase(ignore_case, name, "pthread")) | ||
| 2626 | return true; | ||
| 2627 | if (eqlIgnoreCase(ignore_case, name, "util")) | ||
| 2628 | return true; | ||
| 2629 | if (eqlIgnoreCase(ignore_case, name, "xnet")) | ||
| 2630 | return true; | ||
| 2631 | if (eqlIgnoreCase(ignore_case, name, "resolv")) | ||
| 2632 | return true; | ||
| 2633 | if (eqlIgnoreCase(ignore_case, name, "dl")) | ||
| 2634 | return true; | ||
| 2635 | } | ||
| 2636 | |||
| 2637 | if (target.abi.isMusl()) { | ||
| 2638 | if (eqlIgnoreCase(ignore_case, name, "crypt")) | ||
| 2639 | return true; | ||
| 2640 | } | ||
| 2641 | |||
| 2642 | if (target.os.tag.isDarwin()) { | ||
| 2643 | if (eqlIgnoreCase(ignore_case, name, "System")) | ||
| 2644 | return true; | ||
| 2645 | if (eqlIgnoreCase(ignore_case, name, "c")) | ||
| 2646 | return true; | ||
| 2647 | if (eqlIgnoreCase(ignore_case, name, "dbm")) | ||
| 2648 | return true; | ||
| 2649 | if (eqlIgnoreCase(ignore_case, name, "dl")) | ||
| 2650 | return true; | ||
| 2651 | if (eqlIgnoreCase(ignore_case, name, "info")) | ||
| 2652 | return true; | ||
| 2653 | if (eqlIgnoreCase(ignore_case, name, "m")) | ||
| 2654 | return true; | ||
| 2655 | if (eqlIgnoreCase(ignore_case, name, "poll")) | ||
| 2656 | return true; | ||
| 2657 | if (eqlIgnoreCase(ignore_case, name, "proc")) | ||
| 2658 | return true; | ||
| 2659 | if (eqlIgnoreCase(ignore_case, name, "pthread")) | ||
| 2660 | return true; | ||
| 2661 | if (eqlIgnoreCase(ignore_case, name, "rpcsvc")) | ||
| 2662 | return true; | ||
| 2663 | } | ||
| 2664 | |||
| 2665 | if (target.os.isAtLeast(.macos, .{ .major = 10, .minor = 8, .patch = 0 }) orelse false) { | ||
| 2666 | if (eqlIgnoreCase(ignore_case, name, "mx")) | ||
| 2667 | return true; | ||
| 2668 | } | ||
| 2669 | |||
| 2670 | return false; | ||
| 2671 | } | ||
| 2672 | |||
| 2673 | pub fn is_libcpp_lib_name(target: std.Target, name: []const u8) bool { | ||
| 2674 | const ignore_case = target.os.tag.isDarwin() or target.os.tag == .windows; | ||
| 2675 | |||
| 2676 | return eqlIgnoreCase(ignore_case, name, "c++") or | ||
| 2677 | eqlIgnoreCase(ignore_case, name, "stdc++") or | ||
| 2678 | eqlIgnoreCase(ignore_case, name, "c++abi"); | ||
| 2679 | } | ||
| 2680 | |||
| 2681 | fn eqlIgnoreCase(ignore_case: bool, a: []const u8, b: []const u8) bool { | ||
| 2682 | if (ignore_case) { | ||
| 2683 | return std.ascii.eqlIgnoreCase(a, b); | ||
| 2684 | } else { | ||
| 2685 | return std.mem.eql(u8, a, b); | ||
| 2686 | } | ||
| 2687 | } | ||
| 2688 | |||
| 2689 | const Target = @This(); | ||
| 2690 | const std = @import("std.zig"); | ||
| 2691 | const builtin = @import("builtin"); | ||
| 2692 | const Allocator = std.mem.Allocator; | ||
| 2693 | |||
| 2694 | test { | ||
| 2695 | std.testing.refAllDecls(Cpu.Arch); | ||
| 2696 | } | ||
lib/std/Target/aarch64.zig created+2656
| ... | @@ -0,0 +1,2656 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | a510, | ||
| 9 | a65, | ||
| 10 | a710, | ||
| 11 | a76, | ||
| 12 | a78, | ||
| 13 | a78c, | ||
| 14 | aes, | ||
| 15 | aggressive_fma, | ||
| 16 | alternate_sextload_cvt_f32_pattern, | ||
| 17 | altnzcv, | ||
| 18 | am, | ||
| 19 | amvs, | ||
| 20 | arith_bcc_fusion, | ||
| 21 | arith_cbz_fusion, | ||
| 22 | ascend_store_address, | ||
| 23 | b16b16, | ||
| 24 | balance_fp_ops, | ||
| 25 | bf16, | ||
| 26 | brbe, | ||
| 27 | bti, | ||
| 28 | call_saved_x10, | ||
| 29 | call_saved_x11, | ||
| 30 | call_saved_x12, | ||
| 31 | call_saved_x13, | ||
| 32 | call_saved_x14, | ||
| 33 | call_saved_x15, | ||
| 34 | call_saved_x18, | ||
| 35 | call_saved_x8, | ||
| 36 | call_saved_x9, | ||
| 37 | ccdp, | ||
| 38 | ccidx, | ||
| 39 | ccpp, | ||
| 40 | chk, | ||
| 41 | clrbhb, | ||
| 42 | cmp_bcc_fusion, | ||
| 43 | complxnum, | ||
| 44 | contextidr_el2, | ||
| 45 | cortex_r82, | ||
| 46 | crc, | ||
| 47 | crypto, | ||
| 48 | cssc, | ||
| 49 | custom_cheap_as_move, | ||
| 50 | d128, | ||
| 51 | disable_latency_sched_heuristic, | ||
| 52 | dit, | ||
| 53 | dotprod, | ||
| 54 | ecv, | ||
| 55 | el2vmsa, | ||
| 56 | el3, | ||
| 57 | enable_select_opt, | ||
| 58 | ete, | ||
| 59 | exynos_cheap_as_move, | ||
| 60 | f32mm, | ||
| 61 | f64mm, | ||
| 62 | fgt, | ||
| 63 | fix_cortex_a53_835769, | ||
| 64 | flagm, | ||
| 65 | fmv, | ||
| 66 | force_32bit_jump_tables, | ||
| 67 | fp16fml, | ||
| 68 | fp_armv8, | ||
| 69 | fptoint, | ||
| 70 | fullfp16, | ||
| 71 | fuse_address, | ||
| 72 | fuse_addsub_2reg_const1, | ||
| 73 | fuse_adrp_add, | ||
| 74 | fuse_aes, | ||
| 75 | fuse_arith_logic, | ||
| 76 | fuse_crypto_eor, | ||
| 77 | fuse_csel, | ||
| 78 | fuse_literals, | ||
| 79 | gcs, | ||
| 80 | harden_sls_blr, | ||
| 81 | harden_sls_nocomdat, | ||
| 82 | harden_sls_retbr, | ||
| 83 | hbc, | ||
| 84 | hcx, | ||
| 85 | i8mm, | ||
| 86 | ite, | ||
| 87 | jsconv, | ||
| 88 | lor, | ||
| 89 | ls64, | ||
| 90 | lse, | ||
| 91 | lse128, | ||
| 92 | lse2, | ||
| 93 | lsl_fast, | ||
| 94 | mec, | ||
| 95 | mops, | ||
| 96 | mpam, | ||
| 97 | mte, | ||
| 98 | neon, | ||
| 99 | nmi, | ||
| 100 | no_bti_at_return_twice, | ||
| 101 | no_neg_immediates, | ||
| 102 | no_sve_fp_ld1r, | ||
| 103 | no_zcz_fp, | ||
| 104 | nv, | ||
| 105 | outline_atomics, | ||
| 106 | pan, | ||
| 107 | pan_rwv, | ||
| 108 | pauth, | ||
| 109 | perfmon, | ||
| 110 | predictable_select_expensive, | ||
| 111 | predres, | ||
| 112 | prfm_slc_target, | ||
| 113 | rand, | ||
| 114 | ras, | ||
| 115 | rasv2, | ||
| 116 | rcpc, | ||
| 117 | rcpc3, | ||
| 118 | rcpc_immo, | ||
| 119 | rdm, | ||
| 120 | reserve_x1, | ||
| 121 | reserve_x10, | ||
| 122 | reserve_x11, | ||
| 123 | reserve_x12, | ||
| 124 | reserve_x13, | ||
| 125 | reserve_x14, | ||
| 126 | reserve_x15, | ||
| 127 | reserve_x18, | ||
| 128 | reserve_x2, | ||
| 129 | reserve_x20, | ||
| 130 | reserve_x21, | ||
| 131 | reserve_x22, | ||
| 132 | reserve_x23, | ||
| 133 | reserve_x24, | ||
| 134 | reserve_x25, | ||
| 135 | reserve_x26, | ||
| 136 | reserve_x27, | ||
| 137 | reserve_x28, | ||
| 138 | reserve_x3, | ||
| 139 | reserve_x30, | ||
| 140 | reserve_x4, | ||
| 141 | reserve_x5, | ||
| 142 | reserve_x6, | ||
| 143 | reserve_x7, | ||
| 144 | reserve_x9, | ||
| 145 | rme, | ||
| 146 | sb, | ||
| 147 | sel2, | ||
| 148 | sha2, | ||
| 149 | sha3, | ||
| 150 | slow_misaligned_128store, | ||
| 151 | slow_paired_128, | ||
| 152 | slow_strqro_store, | ||
| 153 | sm4, | ||
| 154 | sme, | ||
| 155 | sme2, | ||
| 156 | sme2p1, | ||
| 157 | sme_f16f16, | ||
| 158 | sme_f64f64, | ||
| 159 | sme_i16i64, | ||
| 160 | spe, | ||
| 161 | spe_eef, | ||
| 162 | specres2, | ||
| 163 | specrestrict, | ||
| 164 | ssbs, | ||
| 165 | strict_align, | ||
| 166 | sve, | ||
| 167 | sve2, | ||
| 168 | sve2_aes, | ||
| 169 | sve2_bitperm, | ||
| 170 | sve2_sha3, | ||
| 171 | sve2_sm4, | ||
| 172 | sve2p1, | ||
| 173 | tagged_globals, | ||
| 174 | the, | ||
| 175 | tlb_rmi, | ||
| 176 | tme, | ||
| 177 | tpidr_el1, | ||
| 178 | tpidr_el2, | ||
| 179 | tpidr_el3, | ||
| 180 | tpidrro_el0, | ||
| 181 | tracev8_4, | ||
| 182 | trbe, | ||
| 183 | uaops, | ||
| 184 | use_experimental_zeroing_pseudos, | ||
| 185 | use_postra_scheduler, | ||
| 186 | use_reciprocal_square_root, | ||
| 187 | use_scalar_inc_vl, | ||
| 188 | v8_1a, | ||
| 189 | v8_2a, | ||
| 190 | v8_3a, | ||
| 191 | v8_4a, | ||
| 192 | v8_5a, | ||
| 193 | v8_6a, | ||
| 194 | v8_7a, | ||
| 195 | v8_8a, | ||
| 196 | v8_9a, | ||
| 197 | v8a, | ||
| 198 | v8r, | ||
| 199 | v9_1a, | ||
| 200 | v9_2a, | ||
| 201 | v9_3a, | ||
| 202 | v9_4a, | ||
| 203 | v9a, | ||
| 204 | vh, | ||
| 205 | wfxt, | ||
| 206 | xs, | ||
| 207 | zcm, | ||
| 208 | zcz, | ||
| 209 | zcz_fp_workaround, | ||
| 210 | zcz_gp, | ||
| 211 | }; | ||
| 212 | |||
| 213 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 214 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 215 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 216 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 217 | |||
| 218 | pub const all_features = blk: { | ||
| 219 | @setEvalBranchQuota(2000); | ||
| 220 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 221 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 222 | var result: [len]CpuFeature = undefined; | ||
| 223 | result[@intFromEnum(Feature.a510)] = .{ | ||
| 224 | .llvm_name = "a510", | ||
| 225 | .description = "Cortex-A510 ARM processors", | ||
| 226 | .dependencies = featureSet(&[_]Feature{ | ||
| 227 | .fuse_adrp_add, | ||
| 228 | .fuse_aes, | ||
| 229 | .use_postra_scheduler, | ||
| 230 | }), | ||
| 231 | }; | ||
| 232 | result[@intFromEnum(Feature.a65)] = .{ | ||
| 233 | .llvm_name = "a65", | ||
| 234 | .description = "Cortex-A65 ARM processors", | ||
| 235 | .dependencies = featureSet(&[_]Feature{ | ||
| 236 | .enable_select_opt, | ||
| 237 | .fuse_address, | ||
| 238 | .fuse_adrp_add, | ||
| 239 | .fuse_aes, | ||
| 240 | .fuse_literals, | ||
| 241 | .predictable_select_expensive, | ||
| 242 | }), | ||
| 243 | }; | ||
| 244 | result[@intFromEnum(Feature.a710)] = .{ | ||
| 245 | .llvm_name = "a710", | ||
| 246 | .description = "Cortex-A710 ARM processors", | ||
| 247 | .dependencies = featureSet(&[_]Feature{ | ||
| 248 | .cmp_bcc_fusion, | ||
| 249 | .enable_select_opt, | ||
| 250 | .fuse_adrp_add, | ||
| 251 | .fuse_aes, | ||
| 252 | .lsl_fast, | ||
| 253 | .predictable_select_expensive, | ||
| 254 | .use_postra_scheduler, | ||
| 255 | }), | ||
| 256 | }; | ||
| 257 | result[@intFromEnum(Feature.a76)] = .{ | ||
| 258 | .llvm_name = "a76", | ||
| 259 | .description = "Cortex-A76 ARM processors", | ||
| 260 | .dependencies = featureSet(&[_]Feature{ | ||
| 261 | .enable_select_opt, | ||
| 262 | .fuse_adrp_add, | ||
| 263 | .fuse_aes, | ||
| 264 | .lsl_fast, | ||
| 265 | .predictable_select_expensive, | ||
| 266 | }), | ||
| 267 | }; | ||
| 268 | result[@intFromEnum(Feature.a78)] = .{ | ||
| 269 | .llvm_name = "a78", | ||
| 270 | .description = "Cortex-A78 ARM processors", | ||
| 271 | .dependencies = featureSet(&[_]Feature{ | ||
| 272 | .cmp_bcc_fusion, | ||
| 273 | .enable_select_opt, | ||
| 274 | .fuse_adrp_add, | ||
| 275 | .fuse_aes, | ||
| 276 | .lsl_fast, | ||
| 277 | .predictable_select_expensive, | ||
| 278 | .use_postra_scheduler, | ||
| 279 | }), | ||
| 280 | }; | ||
| 281 | result[@intFromEnum(Feature.a78c)] = .{ | ||
| 282 | .llvm_name = "a78c", | ||
| 283 | .description = "Cortex-A78C ARM processors", | ||
| 284 | .dependencies = featureSet(&[_]Feature{ | ||
| 285 | .cmp_bcc_fusion, | ||
| 286 | .enable_select_opt, | ||
| 287 | .fuse_adrp_add, | ||
| 288 | .fuse_aes, | ||
| 289 | .lsl_fast, | ||
| 290 | .predictable_select_expensive, | ||
| 291 | .use_postra_scheduler, | ||
| 292 | }), | ||
| 293 | }; | ||
| 294 | result[@intFromEnum(Feature.aes)] = .{ | ||
| 295 | .llvm_name = "aes", | ||
| 296 | .description = "Enable AES support (FEAT_AES, FEAT_PMULL)", | ||
| 297 | .dependencies = featureSet(&[_]Feature{ | ||
| 298 | .neon, | ||
| 299 | }), | ||
| 300 | }; | ||
| 301 | result[@intFromEnum(Feature.aggressive_fma)] = .{ | ||
| 302 | .llvm_name = "aggressive-fma", | ||
| 303 | .description = "Enable Aggressive FMA for floating-point.", | ||
| 304 | .dependencies = featureSet(&[_]Feature{}), | ||
| 305 | }; | ||
| 306 | result[@intFromEnum(Feature.alternate_sextload_cvt_f32_pattern)] = .{ | ||
| 307 | .llvm_name = "alternate-sextload-cvt-f32-pattern", | ||
| 308 | .description = "Use alternative pattern for sextload convert to f32", | ||
| 309 | .dependencies = featureSet(&[_]Feature{}), | ||
| 310 | }; | ||
| 311 | result[@intFromEnum(Feature.altnzcv)] = .{ | ||
| 312 | .llvm_name = "altnzcv", | ||
| 313 | .description = "Enable alternative NZCV format for floating point comparisons (FEAT_FlagM2)", | ||
| 314 | .dependencies = featureSet(&[_]Feature{}), | ||
| 315 | }; | ||
| 316 | result[@intFromEnum(Feature.am)] = .{ | ||
| 317 | .llvm_name = "am", | ||
| 318 | .description = "Enable v8.4-A Activity Monitors extension (FEAT_AMUv1)", | ||
| 319 | .dependencies = featureSet(&[_]Feature{}), | ||
| 320 | }; | ||
| 321 | result[@intFromEnum(Feature.amvs)] = .{ | ||
| 322 | .llvm_name = "amvs", | ||
| 323 | .description = "Enable v8.6-A Activity Monitors Virtualization support (FEAT_AMUv1p1)", | ||
| 324 | .dependencies = featureSet(&[_]Feature{ | ||
| 325 | .am, | ||
| 326 | }), | ||
| 327 | }; | ||
| 328 | result[@intFromEnum(Feature.arith_bcc_fusion)] = .{ | ||
| 329 | .llvm_name = "arith-bcc-fusion", | ||
| 330 | .description = "CPU fuses arithmetic+bcc operations", | ||
| 331 | .dependencies = featureSet(&[_]Feature{}), | ||
| 332 | }; | ||
| 333 | result[@intFromEnum(Feature.arith_cbz_fusion)] = .{ | ||
| 334 | .llvm_name = "arith-cbz-fusion", | ||
| 335 | .description = "CPU fuses arithmetic + cbz/cbnz operations", | ||
| 336 | .dependencies = featureSet(&[_]Feature{}), | ||
| 337 | }; | ||
| 338 | result[@intFromEnum(Feature.ascend_store_address)] = .{ | ||
| 339 | .llvm_name = "ascend-store-address", | ||
| 340 | .description = "Schedule vector stores by ascending address", | ||
| 341 | .dependencies = featureSet(&[_]Feature{}), | ||
| 342 | }; | ||
| 343 | result[@intFromEnum(Feature.b16b16)] = .{ | ||
| 344 | .llvm_name = "b16b16", | ||
| 345 | .description = "Enable SVE2.1 or SME2.1 non-widening BFloat16 to BFloat16 instructions (FEAT_B16B16)", | ||
| 346 | .dependencies = featureSet(&[_]Feature{}), | ||
| 347 | }; | ||
| 348 | result[@intFromEnum(Feature.balance_fp_ops)] = .{ | ||
| 349 | .llvm_name = "balance-fp-ops", | ||
| 350 | .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", | ||
| 351 | .dependencies = featureSet(&[_]Feature{}), | ||
| 352 | }; | ||
| 353 | result[@intFromEnum(Feature.bf16)] = .{ | ||
| 354 | .llvm_name = "bf16", | ||
| 355 | .description = "Enable BFloat16 Extension (FEAT_BF16)", | ||
| 356 | .dependencies = featureSet(&[_]Feature{}), | ||
| 357 | }; | ||
| 358 | result[@intFromEnum(Feature.brbe)] = .{ | ||
| 359 | .llvm_name = "brbe", | ||
| 360 | .description = "Enable Branch Record Buffer Extension (FEAT_BRBE)", | ||
| 361 | .dependencies = featureSet(&[_]Feature{}), | ||
| 362 | }; | ||
| 363 | result[@intFromEnum(Feature.bti)] = .{ | ||
| 364 | .llvm_name = "bti", | ||
| 365 | .description = "Enable Branch Target Identification (FEAT_BTI)", | ||
| 366 | .dependencies = featureSet(&[_]Feature{}), | ||
| 367 | }; | ||
| 368 | result[@intFromEnum(Feature.call_saved_x10)] = .{ | ||
| 369 | .llvm_name = "call-saved-x10", | ||
| 370 | .description = "Make X10 callee saved.", | ||
| 371 | .dependencies = featureSet(&[_]Feature{}), | ||
| 372 | }; | ||
| 373 | result[@intFromEnum(Feature.call_saved_x11)] = .{ | ||
| 374 | .llvm_name = "call-saved-x11", | ||
| 375 | .description = "Make X11 callee saved.", | ||
| 376 | .dependencies = featureSet(&[_]Feature{}), | ||
| 377 | }; | ||
| 378 | result[@intFromEnum(Feature.call_saved_x12)] = .{ | ||
| 379 | .llvm_name = "call-saved-x12", | ||
| 380 | .description = "Make X12 callee saved.", | ||
| 381 | .dependencies = featureSet(&[_]Feature{}), | ||
| 382 | }; | ||
| 383 | result[@intFromEnum(Feature.call_saved_x13)] = .{ | ||
| 384 | .llvm_name = "call-saved-x13", | ||
| 385 | .description = "Make X13 callee saved.", | ||
| 386 | .dependencies = featureSet(&[_]Feature{}), | ||
| 387 | }; | ||
| 388 | result[@intFromEnum(Feature.call_saved_x14)] = .{ | ||
| 389 | .llvm_name = "call-saved-x14", | ||
| 390 | .description = "Make X14 callee saved.", | ||
| 391 | .dependencies = featureSet(&[_]Feature{}), | ||
| 392 | }; | ||
| 393 | result[@intFromEnum(Feature.call_saved_x15)] = .{ | ||
| 394 | .llvm_name = "call-saved-x15", | ||
| 395 | .description = "Make X15 callee saved.", | ||
| 396 | .dependencies = featureSet(&[_]Feature{}), | ||
| 397 | }; | ||
| 398 | result[@intFromEnum(Feature.call_saved_x18)] = .{ | ||
| 399 | .llvm_name = "call-saved-x18", | ||
| 400 | .description = "Make X18 callee saved.", | ||
| 401 | .dependencies = featureSet(&[_]Feature{}), | ||
| 402 | }; | ||
| 403 | result[@intFromEnum(Feature.call_saved_x8)] = .{ | ||
| 404 | .llvm_name = "call-saved-x8", | ||
| 405 | .description = "Make X8 callee saved.", | ||
| 406 | .dependencies = featureSet(&[_]Feature{}), | ||
| 407 | }; | ||
| 408 | result[@intFromEnum(Feature.call_saved_x9)] = .{ | ||
| 409 | .llvm_name = "call-saved-x9", | ||
| 410 | .description = "Make X9 callee saved.", | ||
| 411 | .dependencies = featureSet(&[_]Feature{}), | ||
| 412 | }; | ||
| 413 | result[@intFromEnum(Feature.ccdp)] = .{ | ||
| 414 | .llvm_name = "ccdp", | ||
| 415 | .description = "Enable v8.5 Cache Clean to Point of Deep Persistence (FEAT_DPB2)", | ||
| 416 | .dependencies = featureSet(&[_]Feature{}), | ||
| 417 | }; | ||
| 418 | result[@intFromEnum(Feature.ccidx)] = .{ | ||
| 419 | .llvm_name = "ccidx", | ||
| 420 | .description = "Enable v8.3-A Extend of the CCSIDR number of sets (FEAT_CCIDX)", | ||
| 421 | .dependencies = featureSet(&[_]Feature{}), | ||
| 422 | }; | ||
| 423 | result[@intFromEnum(Feature.ccpp)] = .{ | ||
| 424 | .llvm_name = "ccpp", | ||
| 425 | .description = "Enable v8.2 data Cache Clean to Point of Persistence (FEAT_DPB)", | ||
| 426 | .dependencies = featureSet(&[_]Feature{}), | ||
| 427 | }; | ||
| 428 | result[@intFromEnum(Feature.chk)] = .{ | ||
| 429 | .llvm_name = "chk", | ||
| 430 | .description = "Enable Armv8.0-A Check Feature Status Extension (FEAT_CHK)", | ||
| 431 | .dependencies = featureSet(&[_]Feature{}), | ||
| 432 | }; | ||
| 433 | result[@intFromEnum(Feature.clrbhb)] = .{ | ||
| 434 | .llvm_name = "clrbhb", | ||
| 435 | .description = "Enable Clear BHB instruction (FEAT_CLRBHB)", | ||
| 436 | .dependencies = featureSet(&[_]Feature{}), | ||
| 437 | }; | ||
| 438 | result[@intFromEnum(Feature.cmp_bcc_fusion)] = .{ | ||
| 439 | .llvm_name = "cmp-bcc-fusion", | ||
| 440 | .description = "CPU fuses cmp+bcc operations", | ||
| 441 | .dependencies = featureSet(&[_]Feature{}), | ||
| 442 | }; | ||
| 443 | result[@intFromEnum(Feature.complxnum)] = .{ | ||
| 444 | .llvm_name = "complxnum", | ||
| 445 | .description = "Enable v8.3-A Floating-point complex number support (FEAT_FCMA)", | ||
| 446 | .dependencies = featureSet(&[_]Feature{ | ||
| 447 | .neon, | ||
| 448 | }), | ||
| 449 | }; | ||
| 450 | result[@intFromEnum(Feature.contextidr_el2)] = .{ | ||
| 451 | .llvm_name = "CONTEXTIDREL2", | ||
| 452 | .description = "Enable RW operand Context ID Register (EL2)", | ||
| 453 | .dependencies = featureSet(&[_]Feature{}), | ||
| 454 | }; | ||
| 455 | result[@intFromEnum(Feature.cortex_r82)] = .{ | ||
| 456 | .llvm_name = "cortex-r82", | ||
| 457 | .description = "Cortex-R82 ARM processors", | ||
| 458 | .dependencies = featureSet(&[_]Feature{ | ||
| 459 | .use_postra_scheduler, | ||
| 460 | }), | ||
| 461 | }; | ||
| 462 | result[@intFromEnum(Feature.crc)] = .{ | ||
| 463 | .llvm_name = "crc", | ||
| 464 | .description = "Enable ARMv8 CRC-32 checksum instructions (FEAT_CRC32)", | ||
| 465 | .dependencies = featureSet(&[_]Feature{}), | ||
| 466 | }; | ||
| 467 | result[@intFromEnum(Feature.crypto)] = .{ | ||
| 468 | .llvm_name = "crypto", | ||
| 469 | .description = "Enable cryptographic instructions", | ||
| 470 | .dependencies = featureSet(&[_]Feature{ | ||
| 471 | .aes, | ||
| 472 | .sha2, | ||
| 473 | }), | ||
| 474 | }; | ||
| 475 | result[@intFromEnum(Feature.cssc)] = .{ | ||
| 476 | .llvm_name = "cssc", | ||
| 477 | .description = "Enable Common Short Sequence Compression (CSSC) instructions (FEAT_CSSC)", | ||
| 478 | .dependencies = featureSet(&[_]Feature{}), | ||
| 479 | }; | ||
| 480 | result[@intFromEnum(Feature.custom_cheap_as_move)] = .{ | ||
| 481 | .llvm_name = "custom-cheap-as-move", | ||
| 482 | .description = "Use custom handling of cheap instructions", | ||
| 483 | .dependencies = featureSet(&[_]Feature{}), | ||
| 484 | }; | ||
| 485 | result[@intFromEnum(Feature.d128)] = .{ | ||
| 486 | .llvm_name = "d128", | ||
| 487 | .description = "Enable Armv9.4-A 128-bit Page Table Descriptors, System Registers and Instructions (FEAT_D128, FEAT_LVA3, FEAT_SYSREG128, FEAT_SYSINSTR128)", | ||
| 488 | .dependencies = featureSet(&[_]Feature{ | ||
| 489 | .lse128, | ||
| 490 | }), | ||
| 491 | }; | ||
| 492 | result[@intFromEnum(Feature.disable_latency_sched_heuristic)] = .{ | ||
| 493 | .llvm_name = "disable-latency-sched-heuristic", | ||
| 494 | .description = "Disable latency scheduling heuristic", | ||
| 495 | .dependencies = featureSet(&[_]Feature{}), | ||
| 496 | }; | ||
| 497 | result[@intFromEnum(Feature.dit)] = .{ | ||
| 498 | .llvm_name = "dit", | ||
| 499 | .description = "Enable v8.4-A Data Independent Timing instructions (FEAT_DIT)", | ||
| 500 | .dependencies = featureSet(&[_]Feature{}), | ||
| 501 | }; | ||
| 502 | result[@intFromEnum(Feature.dotprod)] = .{ | ||
| 503 | .llvm_name = "dotprod", | ||
| 504 | .description = "Enable dot product support (FEAT_DotProd)", | ||
| 505 | .dependencies = featureSet(&[_]Feature{}), | ||
| 506 | }; | ||
| 507 | result[@intFromEnum(Feature.ecv)] = .{ | ||
| 508 | .llvm_name = "ecv", | ||
| 509 | .description = "Enable enhanced counter virtualization extension (FEAT_ECV)", | ||
| 510 | .dependencies = featureSet(&[_]Feature{}), | ||
| 511 | }; | ||
| 512 | result[@intFromEnum(Feature.el2vmsa)] = .{ | ||
| 513 | .llvm_name = "el2vmsa", | ||
| 514 | .description = "Enable Exception Level 2 Virtual Memory System Architecture", | ||
| 515 | .dependencies = featureSet(&[_]Feature{}), | ||
| 516 | }; | ||
| 517 | result[@intFromEnum(Feature.el3)] = .{ | ||
| 518 | .llvm_name = "el3", | ||
| 519 | .description = "Enable Exception Level 3", | ||
| 520 | .dependencies = featureSet(&[_]Feature{}), | ||
| 521 | }; | ||
| 522 | result[@intFromEnum(Feature.enable_select_opt)] = .{ | ||
| 523 | .llvm_name = "enable-select-opt", | ||
| 524 | .description = "Enable the select optimize pass for select loop heuristics", | ||
| 525 | .dependencies = featureSet(&[_]Feature{}), | ||
| 526 | }; | ||
| 527 | result[@intFromEnum(Feature.ete)] = .{ | ||
| 528 | .llvm_name = "ete", | ||
| 529 | .description = "Enable Embedded Trace Extension (FEAT_ETE)", | ||
| 530 | .dependencies = featureSet(&[_]Feature{ | ||
| 531 | .trbe, | ||
| 532 | }), | ||
| 533 | }; | ||
| 534 | result[@intFromEnum(Feature.exynos_cheap_as_move)] = .{ | ||
| 535 | .llvm_name = "exynos-cheap-as-move", | ||
| 536 | .description = "Use Exynos specific handling of cheap instructions", | ||
| 537 | .dependencies = featureSet(&[_]Feature{ | ||
| 538 | .custom_cheap_as_move, | ||
| 539 | }), | ||
| 540 | }; | ||
| 541 | result[@intFromEnum(Feature.f32mm)] = .{ | ||
| 542 | .llvm_name = "f32mm", | ||
| 543 | .description = "Enable Matrix Multiply FP32 Extension (FEAT_F32MM)", | ||
| 544 | .dependencies = featureSet(&[_]Feature{ | ||
| 545 | .sve, | ||
| 546 | }), | ||
| 547 | }; | ||
| 548 | result[@intFromEnum(Feature.f64mm)] = .{ | ||
| 549 | .llvm_name = "f64mm", | ||
| 550 | .description = "Enable Matrix Multiply FP64 Extension (FEAT_F64MM)", | ||
| 551 | .dependencies = featureSet(&[_]Feature{ | ||
| 552 | .sve, | ||
| 553 | }), | ||
| 554 | }; | ||
| 555 | result[@intFromEnum(Feature.fgt)] = .{ | ||
| 556 | .llvm_name = "fgt", | ||
| 557 | .description = "Enable fine grained virtualization traps extension (FEAT_FGT)", | ||
| 558 | .dependencies = featureSet(&[_]Feature{}), | ||
| 559 | }; | ||
| 560 | result[@intFromEnum(Feature.fix_cortex_a53_835769)] = .{ | ||
| 561 | .llvm_name = "fix-cortex-a53-835769", | ||
| 562 | .description = "Mitigate Cortex-A53 Erratum 835769", | ||
| 563 | .dependencies = featureSet(&[_]Feature{}), | ||
| 564 | }; | ||
| 565 | result[@intFromEnum(Feature.flagm)] = .{ | ||
| 566 | .llvm_name = "flagm", | ||
| 567 | .description = "Enable v8.4-A Flag Manipulation Instructions (FEAT_FlagM)", | ||
| 568 | .dependencies = featureSet(&[_]Feature{}), | ||
| 569 | }; | ||
| 570 | result[@intFromEnum(Feature.fmv)] = .{ | ||
| 571 | .llvm_name = "fmv", | ||
| 572 | .description = "Enable Function Multi Versioning support.", | ||
| 573 | .dependencies = featureSet(&[_]Feature{}), | ||
| 574 | }; | ||
| 575 | result[@intFromEnum(Feature.force_32bit_jump_tables)] = .{ | ||
| 576 | .llvm_name = "force-32bit-jump-tables", | ||
| 577 | .description = "Force jump table entries to be 32-bits wide except at MinSize", | ||
| 578 | .dependencies = featureSet(&[_]Feature{}), | ||
| 579 | }; | ||
| 580 | result[@intFromEnum(Feature.fp16fml)] = .{ | ||
| 581 | .llvm_name = "fp16fml", | ||
| 582 | .description = "Enable FP16 FML instructions (FEAT_FHM)", | ||
| 583 | .dependencies = featureSet(&[_]Feature{ | ||
| 584 | .fullfp16, | ||
| 585 | }), | ||
| 586 | }; | ||
| 587 | result[@intFromEnum(Feature.fp_armv8)] = .{ | ||
| 588 | .llvm_name = "fp-armv8", | ||
| 589 | .description = "Enable ARMv8 FP (FEAT_FP)", | ||
| 590 | .dependencies = featureSet(&[_]Feature{}), | ||
| 591 | }; | ||
| 592 | result[@intFromEnum(Feature.fptoint)] = .{ | ||
| 593 | .llvm_name = "fptoint", | ||
| 594 | .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int (FEAT_FRINTTS)", | ||
| 595 | .dependencies = featureSet(&[_]Feature{}), | ||
| 596 | }; | ||
| 597 | result[@intFromEnum(Feature.fullfp16)] = .{ | ||
| 598 | .llvm_name = "fullfp16", | ||
| 599 | .description = "Full FP16 (FEAT_FP16)", | ||
| 600 | .dependencies = featureSet(&[_]Feature{ | ||
| 601 | .fp_armv8, | ||
| 602 | }), | ||
| 603 | }; | ||
| 604 | result[@intFromEnum(Feature.fuse_address)] = .{ | ||
| 605 | .llvm_name = "fuse-address", | ||
| 606 | .description = "CPU fuses address generation and memory operations", | ||
| 607 | .dependencies = featureSet(&[_]Feature{}), | ||
| 608 | }; | ||
| 609 | result[@intFromEnum(Feature.fuse_addsub_2reg_const1)] = .{ | ||
| 610 | .llvm_name = "fuse-addsub-2reg-const1", | ||
| 611 | .description = "CPU fuses (a + b + 1) and (a - b - 1)", | ||
| 612 | .dependencies = featureSet(&[_]Feature{}), | ||
| 613 | }; | ||
| 614 | result[@intFromEnum(Feature.fuse_adrp_add)] = .{ | ||
| 615 | .llvm_name = "fuse-adrp-add", | ||
| 616 | .description = "CPU fuses adrp+add operations", | ||
| 617 | .dependencies = featureSet(&[_]Feature{}), | ||
| 618 | }; | ||
| 619 | result[@intFromEnum(Feature.fuse_aes)] = .{ | ||
| 620 | .llvm_name = "fuse-aes", | ||
| 621 | .description = "CPU fuses AES crypto operations", | ||
| 622 | .dependencies = featureSet(&[_]Feature{}), | ||
| 623 | }; | ||
| 624 | result[@intFromEnum(Feature.fuse_arith_logic)] = .{ | ||
| 625 | .llvm_name = "fuse-arith-logic", | ||
| 626 | .description = "CPU fuses arithmetic and logic operations", | ||
| 627 | .dependencies = featureSet(&[_]Feature{}), | ||
| 628 | }; | ||
| 629 | result[@intFromEnum(Feature.fuse_crypto_eor)] = .{ | ||
| 630 | .llvm_name = "fuse-crypto-eor", | ||
| 631 | .description = "CPU fuses AES/PMULL and EOR operations", | ||
| 632 | .dependencies = featureSet(&[_]Feature{}), | ||
| 633 | }; | ||
| 634 | result[@intFromEnum(Feature.fuse_csel)] = .{ | ||
| 635 | .llvm_name = "fuse-csel", | ||
| 636 | .description = "CPU fuses conditional select operations", | ||
| 637 | .dependencies = featureSet(&[_]Feature{}), | ||
| 638 | }; | ||
| 639 | result[@intFromEnum(Feature.fuse_literals)] = .{ | ||
| 640 | .llvm_name = "fuse-literals", | ||
| 641 | .description = "CPU fuses literal generation operations", | ||
| 642 | .dependencies = featureSet(&[_]Feature{}), | ||
| 643 | }; | ||
| 644 | result[@intFromEnum(Feature.gcs)] = .{ | ||
| 645 | .llvm_name = "gcs", | ||
| 646 | .description = "Enable Armv9.4-A Guarded Call Stack Extension", | ||
| 647 | .dependencies = featureSet(&[_]Feature{ | ||
| 648 | .chk, | ||
| 649 | }), | ||
| 650 | }; | ||
| 651 | result[@intFromEnum(Feature.harden_sls_blr)] = .{ | ||
| 652 | .llvm_name = "harden-sls-blr", | ||
| 653 | .description = "Harden against straight line speculation across BLR instructions", | ||
| 654 | .dependencies = featureSet(&[_]Feature{}), | ||
| 655 | }; | ||
| 656 | result[@intFromEnum(Feature.harden_sls_nocomdat)] = .{ | ||
| 657 | .llvm_name = "harden-sls-nocomdat", | ||
| 658 | .description = "Generate thunk code for SLS mitigation in the normal text section", | ||
| 659 | .dependencies = featureSet(&[_]Feature{}), | ||
| 660 | }; | ||
| 661 | result[@intFromEnum(Feature.harden_sls_retbr)] = .{ | ||
| 662 | .llvm_name = "harden-sls-retbr", | ||
| 663 | .description = "Harden against straight line speculation across RET and BR instructions", | ||
| 664 | .dependencies = featureSet(&[_]Feature{}), | ||
| 665 | }; | ||
| 666 | result[@intFromEnum(Feature.hbc)] = .{ | ||
| 667 | .llvm_name = "hbc", | ||
| 668 | .description = "Enable Armv8.8-A Hinted Conditional Branches Extension (FEAT_HBC)", | ||
| 669 | .dependencies = featureSet(&[_]Feature{}), | ||
| 670 | }; | ||
| 671 | result[@intFromEnum(Feature.hcx)] = .{ | ||
| 672 | .llvm_name = "hcx", | ||
| 673 | .description = "Enable Armv8.7-A HCRX_EL2 system register (FEAT_HCX)", | ||
| 674 | .dependencies = featureSet(&[_]Feature{}), | ||
| 675 | }; | ||
| 676 | result[@intFromEnum(Feature.i8mm)] = .{ | ||
| 677 | .llvm_name = "i8mm", | ||
| 678 | .description = "Enable Matrix Multiply Int8 Extension (FEAT_I8MM)", | ||
| 679 | .dependencies = featureSet(&[_]Feature{}), | ||
| 680 | }; | ||
| 681 | result[@intFromEnum(Feature.ite)] = .{ | ||
| 682 | .llvm_name = "ite", | ||
| 683 | .description = "Enable Armv9.4-A Instrumentation Extension FEAT_ITE", | ||
| 684 | .dependencies = featureSet(&[_]Feature{ | ||
| 685 | .ete, | ||
| 686 | }), | ||
| 687 | }; | ||
| 688 | result[@intFromEnum(Feature.jsconv)] = .{ | ||
| 689 | .llvm_name = "jsconv", | ||
| 690 | .description = "Enable v8.3-A JavaScript FP conversion instructions (FEAT_JSCVT)", | ||
| 691 | .dependencies = featureSet(&[_]Feature{ | ||
| 692 | .fp_armv8, | ||
| 693 | }), | ||
| 694 | }; | ||
| 695 | result[@intFromEnum(Feature.lor)] = .{ | ||
| 696 | .llvm_name = "lor", | ||
| 697 | .description = "Enables ARM v8.1 Limited Ordering Regions extension (FEAT_LOR)", | ||
| 698 | .dependencies = featureSet(&[_]Feature{}), | ||
| 699 | }; | ||
| 700 | result[@intFromEnum(Feature.ls64)] = .{ | ||
| 701 | .llvm_name = "ls64", | ||
| 702 | .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension (FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA)", | ||
| 703 | .dependencies = featureSet(&[_]Feature{}), | ||
| 704 | }; | ||
| 705 | result[@intFromEnum(Feature.lse)] = .{ | ||
| 706 | .llvm_name = "lse", | ||
| 707 | .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions (FEAT_LSE)", | ||
| 708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.lse128)] = .{ | ||
| 711 | .llvm_name = "lse128", | ||
| 712 | .description = "Enable Armv9.4-A 128-bit Atomic Instructions (FEAT_LSE128)", | ||
| 713 | .dependencies = featureSet(&[_]Feature{ | ||
| 714 | .lse, | ||
| 715 | }), | ||
| 716 | }; | ||
| 717 | result[@intFromEnum(Feature.lse2)] = .{ | ||
| 718 | .llvm_name = "lse2", | ||
| 719 | .description = "Enable ARMv8.4 Large System Extension 2 (LSE2) atomicity rules (FEAT_LSE2)", | ||
| 720 | .dependencies = featureSet(&[_]Feature{}), | ||
| 721 | }; | ||
| 722 | result[@intFromEnum(Feature.lsl_fast)] = .{ | ||
| 723 | .llvm_name = "lsl-fast", | ||
| 724 | .description = "CPU has a fastpath logical shift of up to 3 places", | ||
| 725 | .dependencies = featureSet(&[_]Feature{}), | ||
| 726 | }; | ||
| 727 | result[@intFromEnum(Feature.mec)] = .{ | ||
| 728 | .llvm_name = "mec", | ||
| 729 | .description = "Enable Memory Encryption Contexts Extension", | ||
| 730 | .dependencies = featureSet(&[_]Feature{ | ||
| 731 | .rme, | ||
| 732 | }), | ||
| 733 | }; | ||
| 734 | result[@intFromEnum(Feature.mops)] = .{ | ||
| 735 | .llvm_name = "mops", | ||
| 736 | .description = "Enable Armv8.8-A memcpy and memset acceleration instructions (FEAT_MOPS)", | ||
| 737 | .dependencies = featureSet(&[_]Feature{}), | ||
| 738 | }; | ||
| 739 | result[@intFromEnum(Feature.mpam)] = .{ | ||
| 740 | .llvm_name = "mpam", | ||
| 741 | .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension (FEAT_MPAM)", | ||
| 742 | .dependencies = featureSet(&[_]Feature{}), | ||
| 743 | }; | ||
| 744 | result[@intFromEnum(Feature.mte)] = .{ | ||
| 745 | .llvm_name = "mte", | ||
| 746 | .description = "Enable Memory Tagging Extension (FEAT_MTE, FEAT_MTE2)", | ||
| 747 | .dependencies = featureSet(&[_]Feature{}), | ||
| 748 | }; | ||
| 749 | result[@intFromEnum(Feature.neon)] = .{ | ||
| 750 | .llvm_name = "neon", | ||
| 751 | .description = "Enable Advanced SIMD instructions (FEAT_AdvSIMD)", | ||
| 752 | .dependencies = featureSet(&[_]Feature{ | ||
| 753 | .fp_armv8, | ||
| 754 | }), | ||
| 755 | }; | ||
| 756 | result[@intFromEnum(Feature.nmi)] = .{ | ||
| 757 | .llvm_name = "nmi", | ||
| 758 | .description = "Enable Armv8.8-A Non-maskable Interrupts (FEAT_NMI, FEAT_GICv3_NMI)", | ||
| 759 | .dependencies = featureSet(&[_]Feature{}), | ||
| 760 | }; | ||
| 761 | result[@intFromEnum(Feature.no_bti_at_return_twice)] = .{ | ||
| 762 | .llvm_name = "no-bti-at-return-twice", | ||
| 763 | .description = "Don't place a BTI instruction after a return-twice", | ||
| 764 | .dependencies = featureSet(&[_]Feature{}), | ||
| 765 | }; | ||
| 766 | result[@intFromEnum(Feature.no_neg_immediates)] = .{ | ||
| 767 | .llvm_name = "no-neg-immediates", | ||
| 768 | .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", | ||
| 769 | .dependencies = featureSet(&[_]Feature{}), | ||
| 770 | }; | ||
| 771 | result[@intFromEnum(Feature.no_sve_fp_ld1r)] = .{ | ||
| 772 | .llvm_name = "no-sve-fp-ld1r", | ||
| 773 | .description = "Avoid using LD1RX instructions for FP", | ||
| 774 | .dependencies = featureSet(&[_]Feature{}), | ||
| 775 | }; | ||
| 776 | result[@intFromEnum(Feature.no_zcz_fp)] = .{ | ||
| 777 | .llvm_name = "no-zcz-fp", | ||
| 778 | .description = "Has no zero-cycle zeroing instructions for FP registers", | ||
| 779 | .dependencies = featureSet(&[_]Feature{}), | ||
| 780 | }; | ||
| 781 | result[@intFromEnum(Feature.nv)] = .{ | ||
| 782 | .llvm_name = "nv", | ||
| 783 | .description = "Enable v8.4-A Nested Virtualization Enchancement (FEAT_NV, FEAT_NV2)", | ||
| 784 | .dependencies = featureSet(&[_]Feature{}), | ||
| 785 | }; | ||
| 786 | result[@intFromEnum(Feature.outline_atomics)] = .{ | ||
| 787 | .llvm_name = "outline-atomics", | ||
| 788 | .description = "Enable out of line atomics to support LSE instructions", | ||
| 789 | .dependencies = featureSet(&[_]Feature{}), | ||
| 790 | }; | ||
| 791 | result[@intFromEnum(Feature.pan)] = .{ | ||
| 792 | .llvm_name = "pan", | ||
| 793 | .description = "Enables ARM v8.1 Privileged Access-Never extension (FEAT_PAN)", | ||
| 794 | .dependencies = featureSet(&[_]Feature{}), | ||
| 795 | }; | ||
| 796 | result[@intFromEnum(Feature.pan_rwv)] = .{ | ||
| 797 | .llvm_name = "pan-rwv", | ||
| 798 | .description = "Enable v8.2 PAN s1e1R and s1e1W Variants (FEAT_PAN2)", | ||
| 799 | .dependencies = featureSet(&[_]Feature{ | ||
| 800 | .pan, | ||
| 801 | }), | ||
| 802 | }; | ||
| 803 | result[@intFromEnum(Feature.pauth)] = .{ | ||
| 804 | .llvm_name = "pauth", | ||
| 805 | .description = "Enable v8.3-A Pointer Authentication extension (FEAT_PAuth)", | ||
| 806 | .dependencies = featureSet(&[_]Feature{}), | ||
| 807 | }; | ||
| 808 | result[@intFromEnum(Feature.perfmon)] = .{ | ||
| 809 | .llvm_name = "perfmon", | ||
| 810 | .description = "Enable Code Generation for ARMv8 PMUv3 Performance Monitors extension (FEAT_PMUv3)", | ||
| 811 | .dependencies = featureSet(&[_]Feature{}), | ||
| 812 | }; | ||
| 813 | result[@intFromEnum(Feature.predictable_select_expensive)] = .{ | ||
| 814 | .llvm_name = "predictable-select-expensive", | ||
| 815 | .description = "Prefer likely predicted branches over selects", | ||
| 816 | .dependencies = featureSet(&[_]Feature{}), | ||
| 817 | }; | ||
| 818 | result[@intFromEnum(Feature.predres)] = .{ | ||
| 819 | .llvm_name = "predres", | ||
| 820 | .description = "Enable v8.5a execution and data prediction invalidation instructions (FEAT_SPECRES)", | ||
| 821 | .dependencies = featureSet(&[_]Feature{}), | ||
| 822 | }; | ||
| 823 | result[@intFromEnum(Feature.prfm_slc_target)] = .{ | ||
| 824 | .llvm_name = "prfm-slc-target", | ||
| 825 | .description = "Enable SLC target for PRFM instruction", | ||
| 826 | .dependencies = featureSet(&[_]Feature{}), | ||
| 827 | }; | ||
| 828 | result[@intFromEnum(Feature.rand)] = .{ | ||
| 829 | .llvm_name = "rand", | ||
| 830 | .description = "Enable Random Number generation instructions (FEAT_RNG)", | ||
| 831 | .dependencies = featureSet(&[_]Feature{}), | ||
| 832 | }; | ||
| 833 | result[@intFromEnum(Feature.ras)] = .{ | ||
| 834 | .llvm_name = "ras", | ||
| 835 | .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions (FEAT_RAS, FEAT_RASv1p1)", | ||
| 836 | .dependencies = featureSet(&[_]Feature{}), | ||
| 837 | }; | ||
| 838 | result[@intFromEnum(Feature.rasv2)] = .{ | ||
| 839 | .llvm_name = "rasv2", | ||
| 840 | .description = "Enable ARMv8.9-A Reliability, Availability and Serviceability Extensions (FEAT_RASv2)", | ||
| 841 | .dependencies = featureSet(&[_]Feature{ | ||
| 842 | .ras, | ||
| 843 | }), | ||
| 844 | }; | ||
| 845 | result[@intFromEnum(Feature.rcpc)] = .{ | ||
| 846 | .llvm_name = "rcpc", | ||
| 847 | .description = "Enable support for RCPC extension (FEAT_LRCPC)", | ||
| 848 | .dependencies = featureSet(&[_]Feature{}), | ||
| 849 | }; | ||
| 850 | result[@intFromEnum(Feature.rcpc3)] = .{ | ||
| 851 | .llvm_name = "rcpc3", | ||
| 852 | .description = "Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set (FEAT_LRCPC3)", | ||
| 853 | .dependencies = featureSet(&[_]Feature{ | ||
| 854 | .rcpc_immo, | ||
| 855 | }), | ||
| 856 | }; | ||
| 857 | result[@intFromEnum(Feature.rcpc_immo)] = .{ | ||
| 858 | .llvm_name = "rcpc-immo", | ||
| 859 | .description = "Enable v8.4-A RCPC instructions with Immediate Offsets (FEAT_LRCPC2)", | ||
| 860 | .dependencies = featureSet(&[_]Feature{ | ||
| 861 | .rcpc, | ||
| 862 | }), | ||
| 863 | }; | ||
| 864 | result[@intFromEnum(Feature.rdm)] = .{ | ||
| 865 | .llvm_name = "rdm", | ||
| 866 | .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions (FEAT_RDM)", | ||
| 867 | .dependencies = featureSet(&[_]Feature{}), | ||
| 868 | }; | ||
| 869 | result[@intFromEnum(Feature.reserve_x1)] = .{ | ||
| 870 | .llvm_name = "reserve-x1", | ||
| 871 | .description = "Reserve X1, making it unavailable as a GPR", | ||
| 872 | .dependencies = featureSet(&[_]Feature{}), | ||
| 873 | }; | ||
| 874 | result[@intFromEnum(Feature.reserve_x10)] = .{ | ||
| 875 | .llvm_name = "reserve-x10", | ||
| 876 | .description = "Reserve X10, making it unavailable as a GPR", | ||
| 877 | .dependencies = featureSet(&[_]Feature{}), | ||
| 878 | }; | ||
| 879 | result[@intFromEnum(Feature.reserve_x11)] = .{ | ||
| 880 | .llvm_name = "reserve-x11", | ||
| 881 | .description = "Reserve X11, making it unavailable as a GPR", | ||
| 882 | .dependencies = featureSet(&[_]Feature{}), | ||
| 883 | }; | ||
| 884 | result[@intFromEnum(Feature.reserve_x12)] = .{ | ||
| 885 | .llvm_name = "reserve-x12", | ||
| 886 | .description = "Reserve X12, making it unavailable as a GPR", | ||
| 887 | .dependencies = featureSet(&[_]Feature{}), | ||
| 888 | }; | ||
| 889 | result[@intFromEnum(Feature.reserve_x13)] = .{ | ||
| 890 | .llvm_name = "reserve-x13", | ||
| 891 | .description = "Reserve X13, making it unavailable as a GPR", | ||
| 892 | .dependencies = featureSet(&[_]Feature{}), | ||
| 893 | }; | ||
| 894 | result[@intFromEnum(Feature.reserve_x14)] = .{ | ||
| 895 | .llvm_name = "reserve-x14", | ||
| 896 | .description = "Reserve X14, making it unavailable as a GPR", | ||
| 897 | .dependencies = featureSet(&[_]Feature{}), | ||
| 898 | }; | ||
| 899 | result[@intFromEnum(Feature.reserve_x15)] = .{ | ||
| 900 | .llvm_name = "reserve-x15", | ||
| 901 | .description = "Reserve X15, making it unavailable as a GPR", | ||
| 902 | .dependencies = featureSet(&[_]Feature{}), | ||
| 903 | }; | ||
| 904 | result[@intFromEnum(Feature.reserve_x18)] = .{ | ||
| 905 | .llvm_name = "reserve-x18", | ||
| 906 | .description = "Reserve X18, making it unavailable as a GPR", | ||
| 907 | .dependencies = featureSet(&[_]Feature{}), | ||
| 908 | }; | ||
| 909 | result[@intFromEnum(Feature.reserve_x2)] = .{ | ||
| 910 | .llvm_name = "reserve-x2", | ||
| 911 | .description = "Reserve X2, making it unavailable as a GPR", | ||
| 912 | .dependencies = featureSet(&[_]Feature{}), | ||
| 913 | }; | ||
| 914 | result[@intFromEnum(Feature.reserve_x20)] = .{ | ||
| 915 | .llvm_name = "reserve-x20", | ||
| 916 | .description = "Reserve X20, making it unavailable as a GPR", | ||
| 917 | .dependencies = featureSet(&[_]Feature{}), | ||
| 918 | }; | ||
| 919 | result[@intFromEnum(Feature.reserve_x21)] = .{ | ||
| 920 | .llvm_name = "reserve-x21", | ||
| 921 | .description = "Reserve X21, making it unavailable as a GPR", | ||
| 922 | .dependencies = featureSet(&[_]Feature{}), | ||
| 923 | }; | ||
| 924 | result[@intFromEnum(Feature.reserve_x22)] = .{ | ||
| 925 | .llvm_name = "reserve-x22", | ||
| 926 | .description = "Reserve X22, making it unavailable as a GPR", | ||
| 927 | .dependencies = featureSet(&[_]Feature{}), | ||
| 928 | }; | ||
| 929 | result[@intFromEnum(Feature.reserve_x23)] = .{ | ||
| 930 | .llvm_name = "reserve-x23", | ||
| 931 | .description = "Reserve X23, making it unavailable as a GPR", | ||
| 932 | .dependencies = featureSet(&[_]Feature{}), | ||
| 933 | }; | ||
| 934 | result[@intFromEnum(Feature.reserve_x24)] = .{ | ||
| 935 | .llvm_name = "reserve-x24", | ||
| 936 | .description = "Reserve X24, making it unavailable as a GPR", | ||
| 937 | .dependencies = featureSet(&[_]Feature{}), | ||
| 938 | }; | ||
| 939 | result[@intFromEnum(Feature.reserve_x25)] = .{ | ||
| 940 | .llvm_name = "reserve-x25", | ||
| 941 | .description = "Reserve X25, making it unavailable as a GPR", | ||
| 942 | .dependencies = featureSet(&[_]Feature{}), | ||
| 943 | }; | ||
| 944 | result[@intFromEnum(Feature.reserve_x26)] = .{ | ||
| 945 | .llvm_name = "reserve-x26", | ||
| 946 | .description = "Reserve X26, making it unavailable as a GPR", | ||
| 947 | .dependencies = featureSet(&[_]Feature{}), | ||
| 948 | }; | ||
| 949 | result[@intFromEnum(Feature.reserve_x27)] = .{ | ||
| 950 | .llvm_name = "reserve-x27", | ||
| 951 | .description = "Reserve X27, making it unavailable as a GPR", | ||
| 952 | .dependencies = featureSet(&[_]Feature{}), | ||
| 953 | }; | ||
| 954 | result[@intFromEnum(Feature.reserve_x28)] = .{ | ||
| 955 | .llvm_name = "reserve-x28", | ||
| 956 | .description = "Reserve X28, making it unavailable as a GPR", | ||
| 957 | .dependencies = featureSet(&[_]Feature{}), | ||
| 958 | }; | ||
| 959 | result[@intFromEnum(Feature.reserve_x3)] = .{ | ||
| 960 | .llvm_name = "reserve-x3", | ||
| 961 | .description = "Reserve X3, making it unavailable as a GPR", | ||
| 962 | .dependencies = featureSet(&[_]Feature{}), | ||
| 963 | }; | ||
| 964 | result[@intFromEnum(Feature.reserve_x30)] = .{ | ||
| 965 | .llvm_name = "reserve-x30", | ||
| 966 | .description = "Reserve X30, making it unavailable as a GPR", | ||
| 967 | .dependencies = featureSet(&[_]Feature{}), | ||
| 968 | }; | ||
| 969 | result[@intFromEnum(Feature.reserve_x4)] = .{ | ||
| 970 | .llvm_name = "reserve-x4", | ||
| 971 | .description = "Reserve X4, making it unavailable as a GPR", | ||
| 972 | .dependencies = featureSet(&[_]Feature{}), | ||
| 973 | }; | ||
| 974 | result[@intFromEnum(Feature.reserve_x5)] = .{ | ||
| 975 | .llvm_name = "reserve-x5", | ||
| 976 | .description = "Reserve X5, making it unavailable as a GPR", | ||
| 977 | .dependencies = featureSet(&[_]Feature{}), | ||
| 978 | }; | ||
| 979 | result[@intFromEnum(Feature.reserve_x6)] = .{ | ||
| 980 | .llvm_name = "reserve-x6", | ||
| 981 | .description = "Reserve X6, making it unavailable as a GPR", | ||
| 982 | .dependencies = featureSet(&[_]Feature{}), | ||
| 983 | }; | ||
| 984 | result[@intFromEnum(Feature.reserve_x7)] = .{ | ||
| 985 | .llvm_name = "reserve-x7", | ||
| 986 | .description = "Reserve X7, making it unavailable as a GPR", | ||
| 987 | .dependencies = featureSet(&[_]Feature{}), | ||
| 988 | }; | ||
| 989 | result[@intFromEnum(Feature.reserve_x9)] = .{ | ||
| 990 | .llvm_name = "reserve-x9", | ||
| 991 | .description = "Reserve X9, making it unavailable as a GPR", | ||
| 992 | .dependencies = featureSet(&[_]Feature{}), | ||
| 993 | }; | ||
| 994 | result[@intFromEnum(Feature.rme)] = .{ | ||
| 995 | .llvm_name = "rme", | ||
| 996 | .description = "Enable Realm Management Extension (FEAT_RME)", | ||
| 997 | .dependencies = featureSet(&[_]Feature{}), | ||
| 998 | }; | ||
| 999 | result[@intFromEnum(Feature.sb)] = .{ | ||
| 1000 | .llvm_name = "sb", | ||
| 1001 | .description = "Enable v8.5 Speculation Barrier (FEAT_SB)", | ||
| 1002 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1003 | }; | ||
| 1004 | result[@intFromEnum(Feature.sel2)] = .{ | ||
| 1005 | .llvm_name = "sel2", | ||
| 1006 | .description = "Enable v8.4-A Secure Exception Level 2 extension (FEAT_SEL2)", | ||
| 1007 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1008 | }; | ||
| 1009 | result[@intFromEnum(Feature.sha2)] = .{ | ||
| 1010 | .llvm_name = "sha2", | ||
| 1011 | .description = "Enable SHA1 and SHA256 support (FEAT_SHA1, FEAT_SHA256)", | ||
| 1012 | .dependencies = featureSet(&[_]Feature{ | ||
| 1013 | .neon, | ||
| 1014 | }), | ||
| 1015 | }; | ||
| 1016 | result[@intFromEnum(Feature.sha3)] = .{ | ||
| 1017 | .llvm_name = "sha3", | ||
| 1018 | .description = "Enable SHA512 and SHA3 support (FEAT_SHA3, FEAT_SHA512)", | ||
| 1019 | .dependencies = featureSet(&[_]Feature{ | ||
| 1020 | .sha2, | ||
| 1021 | }), | ||
| 1022 | }; | ||
| 1023 | result[@intFromEnum(Feature.slow_misaligned_128store)] = .{ | ||
| 1024 | .llvm_name = "slow-misaligned-128store", | ||
| 1025 | .description = "Misaligned 128 bit stores are slow", | ||
| 1026 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1027 | }; | ||
| 1028 | result[@intFromEnum(Feature.slow_paired_128)] = .{ | ||
| 1029 | .llvm_name = "slow-paired-128", | ||
| 1030 | .description = "Paired 128 bit loads and stores are slow", | ||
| 1031 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1032 | }; | ||
| 1033 | result[@intFromEnum(Feature.slow_strqro_store)] = .{ | ||
| 1034 | .llvm_name = "slow-strqro-store", | ||
| 1035 | .description = "STR of Q register with register offset is slow", | ||
| 1036 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1037 | }; | ||
| 1038 | result[@intFromEnum(Feature.sm4)] = .{ | ||
| 1039 | .llvm_name = "sm4", | ||
| 1040 | .description = "Enable SM3 and SM4 support (FEAT_SM4, FEAT_SM3)", | ||
| 1041 | .dependencies = featureSet(&[_]Feature{ | ||
| 1042 | .neon, | ||
| 1043 | }), | ||
| 1044 | }; | ||
| 1045 | result[@intFromEnum(Feature.sme)] = .{ | ||
| 1046 | .llvm_name = "sme", | ||
| 1047 | .description = "Enable Scalable Matrix Extension (SME) (FEAT_SME)", | ||
| 1048 | .dependencies = featureSet(&[_]Feature{ | ||
| 1049 | .bf16, | ||
| 1050 | .use_scalar_inc_vl, | ||
| 1051 | }), | ||
| 1052 | }; | ||
| 1053 | result[@intFromEnum(Feature.sme2)] = .{ | ||
| 1054 | .llvm_name = "sme2", | ||
| 1055 | .description = "Enable Scalable Matrix Extension 2 (SME2) instructions", | ||
| 1056 | .dependencies = featureSet(&[_]Feature{ | ||
| 1057 | .sme, | ||
| 1058 | }), | ||
| 1059 | }; | ||
| 1060 | result[@intFromEnum(Feature.sme2p1)] = .{ | ||
| 1061 | .llvm_name = "sme2p1", | ||
| 1062 | .description = "Enable Scalable Matrix Extension 2.1 (FEAT_SME2p1) instructions", | ||
| 1063 | .dependencies = featureSet(&[_]Feature{ | ||
| 1064 | .sme2, | ||
| 1065 | }), | ||
| 1066 | }; | ||
| 1067 | result[@intFromEnum(Feature.sme_f16f16)] = .{ | ||
| 1068 | .llvm_name = "sme-f16f16", | ||
| 1069 | .description = "Enable SME2.1 non-widening Float16 instructions (FEAT_SME_F16F16)", | ||
| 1070 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1071 | }; | ||
| 1072 | result[@intFromEnum(Feature.sme_f64f64)] = .{ | ||
| 1073 | .llvm_name = "sme-f64f64", | ||
| 1074 | .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions (FEAT_SME_F64F64)", | ||
| 1075 | .dependencies = featureSet(&[_]Feature{ | ||
| 1076 | .sme, | ||
| 1077 | }), | ||
| 1078 | }; | ||
| 1079 | result[@intFromEnum(Feature.sme_i16i64)] = .{ | ||
| 1080 | .llvm_name = "sme-i16i64", | ||
| 1081 | .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions (FEAT_SME_I16I64)", | ||
| 1082 | .dependencies = featureSet(&[_]Feature{ | ||
| 1083 | .sme, | ||
| 1084 | }), | ||
| 1085 | }; | ||
| 1086 | result[@intFromEnum(Feature.spe)] = .{ | ||
| 1087 | .llvm_name = "spe", | ||
| 1088 | .description = "Enable Statistical Profiling extension (FEAT_SPE)", | ||
| 1089 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1090 | }; | ||
| 1091 | result[@intFromEnum(Feature.spe_eef)] = .{ | ||
| 1092 | .llvm_name = "spe-eef", | ||
| 1093 | .description = "Enable extra register in the Statistical Profiling Extension (FEAT_SPEv1p2)", | ||
| 1094 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1095 | }; | ||
| 1096 | result[@intFromEnum(Feature.specres2)] = .{ | ||
| 1097 | .llvm_name = "specres2", | ||
| 1098 | .description = "Enable Speculation Restriction Instruction (FEAT_SPECRES2)", | ||
| 1099 | .dependencies = featureSet(&[_]Feature{ | ||
| 1100 | .predres, | ||
| 1101 | }), | ||
| 1102 | }; | ||
| 1103 | result[@intFromEnum(Feature.specrestrict)] = .{ | ||
| 1104 | .llvm_name = "specrestrict", | ||
| 1105 | .description = "Enable architectural speculation restriction (FEAT_CSV2_2)", | ||
| 1106 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1107 | }; | ||
| 1108 | result[@intFromEnum(Feature.ssbs)] = .{ | ||
| 1109 | .llvm_name = "ssbs", | ||
| 1110 | .description = "Enable Speculative Store Bypass Safe bit (FEAT_SSBS, FEAT_SSBS2)", | ||
| 1111 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1112 | }; | ||
| 1113 | result[@intFromEnum(Feature.strict_align)] = .{ | ||
| 1114 | .llvm_name = "strict-align", | ||
| 1115 | .description = "Disallow all unaligned memory access", | ||
| 1116 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1117 | }; | ||
| 1118 | result[@intFromEnum(Feature.sve)] = .{ | ||
| 1119 | .llvm_name = "sve", | ||
| 1120 | .description = "Enable Scalable Vector Extension (SVE) instructions (FEAT_SVE)", | ||
| 1121 | .dependencies = featureSet(&[_]Feature{ | ||
| 1122 | .fullfp16, | ||
| 1123 | }), | ||
| 1124 | }; | ||
| 1125 | result[@intFromEnum(Feature.sve2)] = .{ | ||
| 1126 | .llvm_name = "sve2", | ||
| 1127 | .description = "Enable Scalable Vector Extension 2 (SVE2) instructions (FEAT_SVE2)", | ||
| 1128 | .dependencies = featureSet(&[_]Feature{ | ||
| 1129 | .sve, | ||
| 1130 | .use_scalar_inc_vl, | ||
| 1131 | }), | ||
| 1132 | }; | ||
| 1133 | result[@intFromEnum(Feature.sve2_aes)] = .{ | ||
| 1134 | .llvm_name = "sve2-aes", | ||
| 1135 | .description = "Enable AES SVE2 instructions (FEAT_SVE_AES, FEAT_SVE_PMULL128)", | ||
| 1136 | .dependencies = featureSet(&[_]Feature{ | ||
| 1137 | .aes, | ||
| 1138 | .sve2, | ||
| 1139 | }), | ||
| 1140 | }; | ||
| 1141 | result[@intFromEnum(Feature.sve2_bitperm)] = .{ | ||
| 1142 | .llvm_name = "sve2-bitperm", | ||
| 1143 | .description = "Enable bit permutation SVE2 instructions (FEAT_SVE_BitPerm)", | ||
| 1144 | .dependencies = featureSet(&[_]Feature{ | ||
| 1145 | .sve2, | ||
| 1146 | }), | ||
| 1147 | }; | ||
| 1148 | result[@intFromEnum(Feature.sve2_sha3)] = .{ | ||
| 1149 | .llvm_name = "sve2-sha3", | ||
| 1150 | .description = "Enable SHA3 SVE2 instructions (FEAT_SVE_SHA3)", | ||
| 1151 | .dependencies = featureSet(&[_]Feature{ | ||
| 1152 | .sha3, | ||
| 1153 | .sve2, | ||
| 1154 | }), | ||
| 1155 | }; | ||
| 1156 | result[@intFromEnum(Feature.sve2_sm4)] = .{ | ||
| 1157 | .llvm_name = "sve2-sm4", | ||
| 1158 | .description = "Enable SM4 SVE2 instructions (FEAT_SVE_SM4)", | ||
| 1159 | .dependencies = featureSet(&[_]Feature{ | ||
| 1160 | .sm4, | ||
| 1161 | .sve2, | ||
| 1162 | }), | ||
| 1163 | }; | ||
| 1164 | result[@intFromEnum(Feature.sve2p1)] = .{ | ||
| 1165 | .llvm_name = "sve2p1", | ||
| 1166 | .description = "Enable Scalable Vector Extension 2.1 instructions", | ||
| 1167 | .dependencies = featureSet(&[_]Feature{ | ||
| 1168 | .sve2, | ||
| 1169 | }), | ||
| 1170 | }; | ||
| 1171 | result[@intFromEnum(Feature.tagged_globals)] = .{ | ||
| 1172 | .llvm_name = "tagged-globals", | ||
| 1173 | .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", | ||
| 1174 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1175 | }; | ||
| 1176 | result[@intFromEnum(Feature.the)] = .{ | ||
| 1177 | .llvm_name = "the", | ||
| 1178 | .description = "Enable Armv8.9-A Translation Hardening Extension (FEAT_THE)", | ||
| 1179 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1180 | }; | ||
| 1181 | result[@intFromEnum(Feature.tlb_rmi)] = .{ | ||
| 1182 | .llvm_name = "tlb-rmi", | ||
| 1183 | .description = "Enable v8.4-A TLB Range and Maintenance Instructions (FEAT_TLBIOS, FEAT_TLBIRANGE)", | ||
| 1184 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1185 | }; | ||
| 1186 | result[@intFromEnum(Feature.tme)] = .{ | ||
| 1187 | .llvm_name = "tme", | ||
| 1188 | .description = "Enable Transactional Memory Extension (FEAT_TME)", | ||
| 1189 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1190 | }; | ||
| 1191 | result[@intFromEnum(Feature.tpidr_el1)] = .{ | ||
| 1192 | .llvm_name = "tpidr-el1", | ||
| 1193 | .description = "Permit use of TPIDR_EL1 for the TLS base", | ||
| 1194 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1195 | }; | ||
| 1196 | result[@intFromEnum(Feature.tpidr_el2)] = .{ | ||
| 1197 | .llvm_name = "tpidr-el2", | ||
| 1198 | .description = "Permit use of TPIDR_EL2 for the TLS base", | ||
| 1199 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1200 | }; | ||
| 1201 | result[@intFromEnum(Feature.tpidr_el3)] = .{ | ||
| 1202 | .llvm_name = "tpidr-el3", | ||
| 1203 | .description = "Permit use of TPIDR_EL3 for the TLS base", | ||
| 1204 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1205 | }; | ||
| 1206 | result[@intFromEnum(Feature.tpidrro_el0)] = .{ | ||
| 1207 | .llvm_name = "tpidrro-el0", | ||
| 1208 | .description = "Permit use of TPIDRRO_EL0 for the TLS base", | ||
| 1209 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1210 | }; | ||
| 1211 | result[@intFromEnum(Feature.tracev8_4)] = .{ | ||
| 1212 | .llvm_name = "tracev8.4", | ||
| 1213 | .description = "Enable v8.4-A Trace extension (FEAT_TRF)", | ||
| 1214 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1215 | }; | ||
| 1216 | result[@intFromEnum(Feature.trbe)] = .{ | ||
| 1217 | .llvm_name = "trbe", | ||
| 1218 | .description = "Enable Trace Buffer Extension (FEAT_TRBE)", | ||
| 1219 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1220 | }; | ||
| 1221 | result[@intFromEnum(Feature.uaops)] = .{ | ||
| 1222 | .llvm_name = "uaops", | ||
| 1223 | .description = "Enable v8.2 UAO PState (FEAT_UAO)", | ||
| 1224 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1225 | }; | ||
| 1226 | result[@intFromEnum(Feature.use_experimental_zeroing_pseudos)] = .{ | ||
| 1227 | .llvm_name = "use-experimental-zeroing-pseudos", | ||
| 1228 | .description = "Hint to the compiler that the MOVPRFX instruction is merged with destructive operations", | ||
| 1229 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1230 | }; | ||
| 1231 | result[@intFromEnum(Feature.use_postra_scheduler)] = .{ | ||
| 1232 | .llvm_name = "use-postra-scheduler", | ||
| 1233 | .description = "Schedule again after register allocation", | ||
| 1234 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1235 | }; | ||
| 1236 | result[@intFromEnum(Feature.use_reciprocal_square_root)] = .{ | ||
| 1237 | .llvm_name = "use-reciprocal-square-root", | ||
| 1238 | .description = "Use the reciprocal square root approximation", | ||
| 1239 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1240 | }; | ||
| 1241 | result[@intFromEnum(Feature.use_scalar_inc_vl)] = .{ | ||
| 1242 | .llvm_name = "use-scalar-inc-vl", | ||
| 1243 | .description = "Prefer inc/dec over add+cnt", | ||
| 1244 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1245 | }; | ||
| 1246 | result[@intFromEnum(Feature.v8_1a)] = .{ | ||
| 1247 | .llvm_name = "v8.1a", | ||
| 1248 | .description = "Support ARM v8.1a instructions", | ||
| 1249 | .dependencies = featureSet(&[_]Feature{ | ||
| 1250 | .crc, | ||
| 1251 | .lor, | ||
| 1252 | .lse, | ||
| 1253 | .pan, | ||
| 1254 | .rdm, | ||
| 1255 | .v8a, | ||
| 1256 | .vh, | ||
| 1257 | }), | ||
| 1258 | }; | ||
| 1259 | result[@intFromEnum(Feature.v8_2a)] = .{ | ||
| 1260 | .llvm_name = "v8.2a", | ||
| 1261 | .description = "Support ARM v8.2a instructions", | ||
| 1262 | .dependencies = featureSet(&[_]Feature{ | ||
| 1263 | .ccpp, | ||
| 1264 | .pan_rwv, | ||
| 1265 | .ras, | ||
| 1266 | .uaops, | ||
| 1267 | .v8_1a, | ||
| 1268 | }), | ||
| 1269 | }; | ||
| 1270 | result[@intFromEnum(Feature.v8_3a)] = .{ | ||
| 1271 | .llvm_name = "v8.3a", | ||
| 1272 | .description = "Support ARM v8.3a instructions", | ||
| 1273 | .dependencies = featureSet(&[_]Feature{ | ||
| 1274 | .ccidx, | ||
| 1275 | .complxnum, | ||
| 1276 | .jsconv, | ||
| 1277 | .pauth, | ||
| 1278 | .rcpc, | ||
| 1279 | .v8_2a, | ||
| 1280 | }), | ||
| 1281 | }; | ||
| 1282 | result[@intFromEnum(Feature.v8_4a)] = .{ | ||
| 1283 | .llvm_name = "v8.4a", | ||
| 1284 | .description = "Support ARM v8.4a instructions", | ||
| 1285 | .dependencies = featureSet(&[_]Feature{ | ||
| 1286 | .am, | ||
| 1287 | .dit, | ||
| 1288 | .dotprod, | ||
| 1289 | .flagm, | ||
| 1290 | .lse2, | ||
| 1291 | .mpam, | ||
| 1292 | .nv, | ||
| 1293 | .rcpc_immo, | ||
| 1294 | .sel2, | ||
| 1295 | .tlb_rmi, | ||
| 1296 | .tracev8_4, | ||
| 1297 | .v8_3a, | ||
| 1298 | }), | ||
| 1299 | }; | ||
| 1300 | result[@intFromEnum(Feature.v8_5a)] = .{ | ||
| 1301 | .llvm_name = "v8.5a", | ||
| 1302 | .description = "Support ARM v8.5a instructions", | ||
| 1303 | .dependencies = featureSet(&[_]Feature{ | ||
| 1304 | .altnzcv, | ||
| 1305 | .bti, | ||
| 1306 | .ccdp, | ||
| 1307 | .fptoint, | ||
| 1308 | .predres, | ||
| 1309 | .sb, | ||
| 1310 | .specrestrict, | ||
| 1311 | .ssbs, | ||
| 1312 | .v8_4a, | ||
| 1313 | }), | ||
| 1314 | }; | ||
| 1315 | result[@intFromEnum(Feature.v8_6a)] = .{ | ||
| 1316 | .llvm_name = "v8.6a", | ||
| 1317 | .description = "Support ARM v8.6a instructions", | ||
| 1318 | .dependencies = featureSet(&[_]Feature{ | ||
| 1319 | .amvs, | ||
| 1320 | .bf16, | ||
| 1321 | .ecv, | ||
| 1322 | .fgt, | ||
| 1323 | .i8mm, | ||
| 1324 | .v8_5a, | ||
| 1325 | }), | ||
| 1326 | }; | ||
| 1327 | result[@intFromEnum(Feature.v8_7a)] = .{ | ||
| 1328 | .llvm_name = "v8.7a", | ||
| 1329 | .description = "Support ARM v8.7a instructions", | ||
| 1330 | .dependencies = featureSet(&[_]Feature{ | ||
| 1331 | .hcx, | ||
| 1332 | .v8_6a, | ||
| 1333 | .wfxt, | ||
| 1334 | .xs, | ||
| 1335 | }), | ||
| 1336 | }; | ||
| 1337 | result[@intFromEnum(Feature.v8_8a)] = .{ | ||
| 1338 | .llvm_name = "v8.8a", | ||
| 1339 | .description = "Support ARM v8.8a instructions", | ||
| 1340 | .dependencies = featureSet(&[_]Feature{ | ||
| 1341 | .hbc, | ||
| 1342 | .mops, | ||
| 1343 | .nmi, | ||
| 1344 | .v8_7a, | ||
| 1345 | }), | ||
| 1346 | }; | ||
| 1347 | result[@intFromEnum(Feature.v8_9a)] = .{ | ||
| 1348 | .llvm_name = "v8.9a", | ||
| 1349 | .description = "Support ARM v8.9a instructions", | ||
| 1350 | .dependencies = featureSet(&[_]Feature{ | ||
| 1351 | .chk, | ||
| 1352 | .clrbhb, | ||
| 1353 | .cssc, | ||
| 1354 | .prfm_slc_target, | ||
| 1355 | .rasv2, | ||
| 1356 | .specres2, | ||
| 1357 | .v8_8a, | ||
| 1358 | }), | ||
| 1359 | }; | ||
| 1360 | result[@intFromEnum(Feature.v8a)] = .{ | ||
| 1361 | .llvm_name = "v8a", | ||
| 1362 | .description = "Support ARM v8.0a instructions", | ||
| 1363 | .dependencies = featureSet(&[_]Feature{ | ||
| 1364 | .el2vmsa, | ||
| 1365 | .el3, | ||
| 1366 | .neon, | ||
| 1367 | }), | ||
| 1368 | }; | ||
| 1369 | result[@intFromEnum(Feature.v8r)] = .{ | ||
| 1370 | .llvm_name = "v8r", | ||
| 1371 | .description = "Support ARM v8r instructions", | ||
| 1372 | .dependencies = featureSet(&[_]Feature{ | ||
| 1373 | .ccidx, | ||
| 1374 | .ccpp, | ||
| 1375 | .complxnum, | ||
| 1376 | .contextidr_el2, | ||
| 1377 | .crc, | ||
| 1378 | .dit, | ||
| 1379 | .dotprod, | ||
| 1380 | .flagm, | ||
| 1381 | .jsconv, | ||
| 1382 | .lse, | ||
| 1383 | .pan_rwv, | ||
| 1384 | .pauth, | ||
| 1385 | .ras, | ||
| 1386 | .rcpc_immo, | ||
| 1387 | .rdm, | ||
| 1388 | .sel2, | ||
| 1389 | .specrestrict, | ||
| 1390 | .tlb_rmi, | ||
| 1391 | .tracev8_4, | ||
| 1392 | .uaops, | ||
| 1393 | }), | ||
| 1394 | }; | ||
| 1395 | result[@intFromEnum(Feature.v9_1a)] = .{ | ||
| 1396 | .llvm_name = "v9.1a", | ||
| 1397 | .description = "Support ARM v9.1a instructions", | ||
| 1398 | .dependencies = featureSet(&[_]Feature{ | ||
| 1399 | .v8_6a, | ||
| 1400 | .v9a, | ||
| 1401 | }), | ||
| 1402 | }; | ||
| 1403 | result[@intFromEnum(Feature.v9_2a)] = .{ | ||
| 1404 | .llvm_name = "v9.2a", | ||
| 1405 | .description = "Support ARM v9.2a instructions", | ||
| 1406 | .dependencies = featureSet(&[_]Feature{ | ||
| 1407 | .v8_7a, | ||
| 1408 | .v9_1a, | ||
| 1409 | }), | ||
| 1410 | }; | ||
| 1411 | result[@intFromEnum(Feature.v9_3a)] = .{ | ||
| 1412 | .llvm_name = "v9.3a", | ||
| 1413 | .description = "Support ARM v9.3a instructions", | ||
| 1414 | .dependencies = featureSet(&[_]Feature{ | ||
| 1415 | .v8_8a, | ||
| 1416 | .v9_2a, | ||
| 1417 | }), | ||
| 1418 | }; | ||
| 1419 | result[@intFromEnum(Feature.v9_4a)] = .{ | ||
| 1420 | .llvm_name = "v9.4a", | ||
| 1421 | .description = "Support ARM v9.4a instructions", | ||
| 1422 | .dependencies = featureSet(&[_]Feature{ | ||
| 1423 | .v8_9a, | ||
| 1424 | .v9_3a, | ||
| 1425 | }), | ||
| 1426 | }; | ||
| 1427 | result[@intFromEnum(Feature.v9a)] = .{ | ||
| 1428 | .llvm_name = "v9a", | ||
| 1429 | .description = "Support ARM v9a instructions", | ||
| 1430 | .dependencies = featureSet(&[_]Feature{ | ||
| 1431 | .mec, | ||
| 1432 | .sve2, | ||
| 1433 | .v8_5a, | ||
| 1434 | }), | ||
| 1435 | }; | ||
| 1436 | result[@intFromEnum(Feature.vh)] = .{ | ||
| 1437 | .llvm_name = "vh", | ||
| 1438 | .description = "Enables ARM v8.1 Virtual Host extension (FEAT_VHE)", | ||
| 1439 | .dependencies = featureSet(&[_]Feature{ | ||
| 1440 | .contextidr_el2, | ||
| 1441 | }), | ||
| 1442 | }; | ||
| 1443 | result[@intFromEnum(Feature.wfxt)] = .{ | ||
| 1444 | .llvm_name = "wfxt", | ||
| 1445 | .description = "Enable Armv8.7-A WFET and WFIT instruction (FEAT_WFxT)", | ||
| 1446 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1447 | }; | ||
| 1448 | result[@intFromEnum(Feature.xs)] = .{ | ||
| 1449 | .llvm_name = "xs", | ||
| 1450 | .description = "Enable Armv8.7-A limited-TLB-maintenance instruction (FEAT_XS)", | ||
| 1451 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1452 | }; | ||
| 1453 | result[@intFromEnum(Feature.zcm)] = .{ | ||
| 1454 | .llvm_name = "zcm", | ||
| 1455 | .description = "Has zero-cycle register moves", | ||
| 1456 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1457 | }; | ||
| 1458 | result[@intFromEnum(Feature.zcz)] = .{ | ||
| 1459 | .llvm_name = "zcz", | ||
| 1460 | .description = "Has zero-cycle zeroing instructions", | ||
| 1461 | .dependencies = featureSet(&[_]Feature{ | ||
| 1462 | .zcz_gp, | ||
| 1463 | }), | ||
| 1464 | }; | ||
| 1465 | result[@intFromEnum(Feature.zcz_fp_workaround)] = .{ | ||
| 1466 | .llvm_name = "zcz-fp-workaround", | ||
| 1467 | .description = "The zero-cycle floating-point zeroing instruction has a bug", | ||
| 1468 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1469 | }; | ||
| 1470 | result[@intFromEnum(Feature.zcz_gp)] = .{ | ||
| 1471 | .llvm_name = "zcz-gp", | ||
| 1472 | .description = "Has zero-cycle zeroing instructions for generic registers", | ||
| 1473 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1474 | }; | ||
| 1475 | const ti = @typeInfo(Feature); | ||
| 1476 | for (&result, 0..) |*elem, i| { | ||
| 1477 | elem.index = i; | ||
| 1478 | elem.name = ti.Enum.fields[i].name; | ||
| 1479 | } | ||
| 1480 | break :blk result; | ||
| 1481 | }; | ||
| 1482 | |||
| 1483 | pub const cpu = struct { | ||
| 1484 | pub const a64fx = CpuModel{ | ||
| 1485 | .name = "a64fx", | ||
| 1486 | .llvm_name = "a64fx", | ||
| 1487 | .features = featureSet(&[_]Feature{ | ||
| 1488 | .aggressive_fma, | ||
| 1489 | .arith_bcc_fusion, | ||
| 1490 | .complxnum, | ||
| 1491 | .perfmon, | ||
| 1492 | .predictable_select_expensive, | ||
| 1493 | .sha2, | ||
| 1494 | .sve, | ||
| 1495 | .use_postra_scheduler, | ||
| 1496 | .v8_2a, | ||
| 1497 | }), | ||
| 1498 | }; | ||
| 1499 | pub const ampere1 = CpuModel{ | ||
| 1500 | .name = "ampere1", | ||
| 1501 | .llvm_name = "ampere1", | ||
| 1502 | .features = featureSet(&[_]Feature{ | ||
| 1503 | .aes, | ||
| 1504 | .aggressive_fma, | ||
| 1505 | .arith_bcc_fusion, | ||
| 1506 | .cmp_bcc_fusion, | ||
| 1507 | .fuse_address, | ||
| 1508 | .fuse_aes, | ||
| 1509 | .fuse_literals, | ||
| 1510 | .lsl_fast, | ||
| 1511 | .perfmon, | ||
| 1512 | .rand, | ||
| 1513 | .sha3, | ||
| 1514 | .use_postra_scheduler, | ||
| 1515 | .v8_6a, | ||
| 1516 | }), | ||
| 1517 | }; | ||
| 1518 | pub const ampere1a = CpuModel{ | ||
| 1519 | .name = "ampere1a", | ||
| 1520 | .llvm_name = "ampere1a", | ||
| 1521 | .features = featureSet(&[_]Feature{ | ||
| 1522 | .aes, | ||
| 1523 | .aggressive_fma, | ||
| 1524 | .arith_bcc_fusion, | ||
| 1525 | .cmp_bcc_fusion, | ||
| 1526 | .fuse_address, | ||
| 1527 | .fuse_aes, | ||
| 1528 | .fuse_literals, | ||
| 1529 | .lsl_fast, | ||
| 1530 | .mte, | ||
| 1531 | .perfmon, | ||
| 1532 | .rand, | ||
| 1533 | .sha3, | ||
| 1534 | .sm4, | ||
| 1535 | .use_postra_scheduler, | ||
| 1536 | .v8_6a, | ||
| 1537 | }), | ||
| 1538 | }; | ||
| 1539 | pub const apple_a10 = CpuModel{ | ||
| 1540 | .name = "apple_a10", | ||
| 1541 | .llvm_name = "apple-a10", | ||
| 1542 | .features = featureSet(&[_]Feature{ | ||
| 1543 | .alternate_sextload_cvt_f32_pattern, | ||
| 1544 | .arith_bcc_fusion, | ||
| 1545 | .arith_cbz_fusion, | ||
| 1546 | .crc, | ||
| 1547 | .crypto, | ||
| 1548 | .disable_latency_sched_heuristic, | ||
| 1549 | .fuse_aes, | ||
| 1550 | .fuse_crypto_eor, | ||
| 1551 | .lor, | ||
| 1552 | .pan, | ||
| 1553 | .perfmon, | ||
| 1554 | .rdm, | ||
| 1555 | .v8a, | ||
| 1556 | .vh, | ||
| 1557 | .zcm, | ||
| 1558 | .zcz, | ||
| 1559 | }), | ||
| 1560 | }; | ||
| 1561 | pub const apple_a11 = CpuModel{ | ||
| 1562 | .name = "apple_a11", | ||
| 1563 | .llvm_name = "apple-a11", | ||
| 1564 | .features = featureSet(&[_]Feature{ | ||
| 1565 | .alternate_sextload_cvt_f32_pattern, | ||
| 1566 | .arith_bcc_fusion, | ||
| 1567 | .arith_cbz_fusion, | ||
| 1568 | .crypto, | ||
| 1569 | .disable_latency_sched_heuristic, | ||
| 1570 | .fullfp16, | ||
| 1571 | .fuse_aes, | ||
| 1572 | .fuse_crypto_eor, | ||
| 1573 | .perfmon, | ||
| 1574 | .v8_2a, | ||
| 1575 | .zcm, | ||
| 1576 | .zcz, | ||
| 1577 | }), | ||
| 1578 | }; | ||
| 1579 | pub const apple_a12 = CpuModel{ | ||
| 1580 | .name = "apple_a12", | ||
| 1581 | .llvm_name = "apple-a12", | ||
| 1582 | .features = featureSet(&[_]Feature{ | ||
| 1583 | .alternate_sextload_cvt_f32_pattern, | ||
| 1584 | .arith_bcc_fusion, | ||
| 1585 | .arith_cbz_fusion, | ||
| 1586 | .crypto, | ||
| 1587 | .disable_latency_sched_heuristic, | ||
| 1588 | .fullfp16, | ||
| 1589 | .fuse_aes, | ||
| 1590 | .fuse_crypto_eor, | ||
| 1591 | .perfmon, | ||
| 1592 | .v8_3a, | ||
| 1593 | .zcm, | ||
| 1594 | .zcz, | ||
| 1595 | }), | ||
| 1596 | }; | ||
| 1597 | pub const apple_a13 = CpuModel{ | ||
| 1598 | .name = "apple_a13", | ||
| 1599 | .llvm_name = "apple-a13", | ||
| 1600 | .features = featureSet(&[_]Feature{ | ||
| 1601 | .alternate_sextload_cvt_f32_pattern, | ||
| 1602 | .arith_bcc_fusion, | ||
| 1603 | .arith_cbz_fusion, | ||
| 1604 | .crypto, | ||
| 1605 | .disable_latency_sched_heuristic, | ||
| 1606 | .fp16fml, | ||
| 1607 | .fuse_aes, | ||
| 1608 | .fuse_crypto_eor, | ||
| 1609 | .perfmon, | ||
| 1610 | .sha3, | ||
| 1611 | .v8_4a, | ||
| 1612 | .zcm, | ||
| 1613 | .zcz, | ||
| 1614 | }), | ||
| 1615 | }; | ||
| 1616 | pub const apple_a14 = CpuModel{ | ||
| 1617 | .name = "apple_a14", | ||
| 1618 | .llvm_name = "apple-a14", | ||
| 1619 | .features = featureSet(&[_]Feature{ | ||
| 1620 | .aggressive_fma, | ||
| 1621 | .alternate_sextload_cvt_f32_pattern, | ||
| 1622 | .altnzcv, | ||
| 1623 | .arith_bcc_fusion, | ||
| 1624 | .arith_cbz_fusion, | ||
| 1625 | .ccdp, | ||
| 1626 | .crypto, | ||
| 1627 | .disable_latency_sched_heuristic, | ||
| 1628 | .fp16fml, | ||
| 1629 | .fptoint, | ||
| 1630 | .fuse_address, | ||
| 1631 | .fuse_adrp_add, | ||
| 1632 | .fuse_aes, | ||
| 1633 | .fuse_arith_logic, | ||
| 1634 | .fuse_crypto_eor, | ||
| 1635 | .fuse_csel, | ||
| 1636 | .fuse_literals, | ||
| 1637 | .perfmon, | ||
| 1638 | .predres, | ||
| 1639 | .sb, | ||
| 1640 | .sha3, | ||
| 1641 | .specrestrict, | ||
| 1642 | .ssbs, | ||
| 1643 | .v8_4a, | ||
| 1644 | .zcm, | ||
| 1645 | .zcz, | ||
| 1646 | }), | ||
| 1647 | }; | ||
| 1648 | pub const apple_a15 = CpuModel{ | ||
| 1649 | .name = "apple_a15", | ||
| 1650 | .llvm_name = "apple-a15", | ||
| 1651 | .features = featureSet(&[_]Feature{ | ||
| 1652 | .alternate_sextload_cvt_f32_pattern, | ||
| 1653 | .arith_bcc_fusion, | ||
| 1654 | .arith_cbz_fusion, | ||
| 1655 | .crypto, | ||
| 1656 | .disable_latency_sched_heuristic, | ||
| 1657 | .fp16fml, | ||
| 1658 | .fuse_address, | ||
| 1659 | .fuse_aes, | ||
| 1660 | .fuse_arith_logic, | ||
| 1661 | .fuse_crypto_eor, | ||
| 1662 | .fuse_csel, | ||
| 1663 | .fuse_literals, | ||
| 1664 | .perfmon, | ||
| 1665 | .sha3, | ||
| 1666 | .v8_6a, | ||
| 1667 | .zcm, | ||
| 1668 | .zcz, | ||
| 1669 | }), | ||
| 1670 | }; | ||
| 1671 | pub const apple_a16 = CpuModel{ | ||
| 1672 | .name = "apple_a16", | ||
| 1673 | .llvm_name = "apple-a16", | ||
| 1674 | .features = featureSet(&[_]Feature{ | ||
| 1675 | .alternate_sextload_cvt_f32_pattern, | ||
| 1676 | .arith_bcc_fusion, | ||
| 1677 | .arith_cbz_fusion, | ||
| 1678 | .crypto, | ||
| 1679 | .disable_latency_sched_heuristic, | ||
| 1680 | .fp16fml, | ||
| 1681 | .fuse_address, | ||
| 1682 | .fuse_aes, | ||
| 1683 | .fuse_arith_logic, | ||
| 1684 | .fuse_crypto_eor, | ||
| 1685 | .fuse_csel, | ||
| 1686 | .fuse_literals, | ||
| 1687 | .hcx, | ||
| 1688 | .perfmon, | ||
| 1689 | .sha3, | ||
| 1690 | .v8_6a, | ||
| 1691 | .zcm, | ||
| 1692 | .zcz, | ||
| 1693 | }), | ||
| 1694 | }; | ||
| 1695 | pub const apple_a7 = CpuModel{ | ||
| 1696 | .name = "apple_a7", | ||
| 1697 | .llvm_name = "apple-a7", | ||
| 1698 | .features = featureSet(&[_]Feature{ | ||
| 1699 | .alternate_sextload_cvt_f32_pattern, | ||
| 1700 | .arith_bcc_fusion, | ||
| 1701 | .arith_cbz_fusion, | ||
| 1702 | .crypto, | ||
| 1703 | .disable_latency_sched_heuristic, | ||
| 1704 | .fuse_aes, | ||
| 1705 | .fuse_crypto_eor, | ||
| 1706 | .perfmon, | ||
| 1707 | .v8a, | ||
| 1708 | .zcm, | ||
| 1709 | .zcz, | ||
| 1710 | .zcz_fp_workaround, | ||
| 1711 | }), | ||
| 1712 | }; | ||
| 1713 | pub const apple_a8 = CpuModel{ | ||
| 1714 | .name = "apple_a8", | ||
| 1715 | .llvm_name = "apple-a8", | ||
| 1716 | .features = featureSet(&[_]Feature{ | ||
| 1717 | .alternate_sextload_cvt_f32_pattern, | ||
| 1718 | .arith_bcc_fusion, | ||
| 1719 | .arith_cbz_fusion, | ||
| 1720 | .crypto, | ||
| 1721 | .disable_latency_sched_heuristic, | ||
| 1722 | .fuse_aes, | ||
| 1723 | .fuse_crypto_eor, | ||
| 1724 | .perfmon, | ||
| 1725 | .v8a, | ||
| 1726 | .zcm, | ||
| 1727 | .zcz, | ||
| 1728 | .zcz_fp_workaround, | ||
| 1729 | }), | ||
| 1730 | }; | ||
| 1731 | pub const apple_a9 = CpuModel{ | ||
| 1732 | .name = "apple_a9", | ||
| 1733 | .llvm_name = "apple-a9", | ||
| 1734 | .features = featureSet(&[_]Feature{ | ||
| 1735 | .alternate_sextload_cvt_f32_pattern, | ||
| 1736 | .arith_bcc_fusion, | ||
| 1737 | .arith_cbz_fusion, | ||
| 1738 | .crypto, | ||
| 1739 | .disable_latency_sched_heuristic, | ||
| 1740 | .fuse_aes, | ||
| 1741 | .fuse_crypto_eor, | ||
| 1742 | .perfmon, | ||
| 1743 | .v8a, | ||
| 1744 | .zcm, | ||
| 1745 | .zcz, | ||
| 1746 | .zcz_fp_workaround, | ||
| 1747 | }), | ||
| 1748 | }; | ||
| 1749 | pub const apple_latest = CpuModel{ | ||
| 1750 | .name = "apple_latest", | ||
| 1751 | .llvm_name = "apple-latest", | ||
| 1752 | .features = featureSet(&[_]Feature{ | ||
| 1753 | .alternate_sextload_cvt_f32_pattern, | ||
| 1754 | .arith_bcc_fusion, | ||
| 1755 | .arith_cbz_fusion, | ||
| 1756 | .crypto, | ||
| 1757 | .disable_latency_sched_heuristic, | ||
| 1758 | .fp16fml, | ||
| 1759 | .fuse_address, | ||
| 1760 | .fuse_aes, | ||
| 1761 | .fuse_arith_logic, | ||
| 1762 | .fuse_crypto_eor, | ||
| 1763 | .fuse_csel, | ||
| 1764 | .fuse_literals, | ||
| 1765 | .hcx, | ||
| 1766 | .perfmon, | ||
| 1767 | .sha3, | ||
| 1768 | .v8_6a, | ||
| 1769 | .zcm, | ||
| 1770 | .zcz, | ||
| 1771 | }), | ||
| 1772 | }; | ||
| 1773 | pub const apple_m1 = CpuModel{ | ||
| 1774 | .name = "apple_m1", | ||
| 1775 | .llvm_name = "apple-m1", | ||
| 1776 | .features = featureSet(&[_]Feature{ | ||
| 1777 | .aggressive_fma, | ||
| 1778 | .alternate_sextload_cvt_f32_pattern, | ||
| 1779 | .altnzcv, | ||
| 1780 | .arith_bcc_fusion, | ||
| 1781 | .arith_cbz_fusion, | ||
| 1782 | .ccdp, | ||
| 1783 | .crypto, | ||
| 1784 | .disable_latency_sched_heuristic, | ||
| 1785 | .fp16fml, | ||
| 1786 | .fptoint, | ||
| 1787 | .fuse_address, | ||
| 1788 | .fuse_adrp_add, | ||
| 1789 | .fuse_aes, | ||
| 1790 | .fuse_arith_logic, | ||
| 1791 | .fuse_crypto_eor, | ||
| 1792 | .fuse_csel, | ||
| 1793 | .fuse_literals, | ||
| 1794 | .perfmon, | ||
| 1795 | .predres, | ||
| 1796 | .sb, | ||
| 1797 | .sha3, | ||
| 1798 | .specrestrict, | ||
| 1799 | .ssbs, | ||
| 1800 | .v8_4a, | ||
| 1801 | .zcm, | ||
| 1802 | .zcz, | ||
| 1803 | }), | ||
| 1804 | }; | ||
| 1805 | pub const apple_m2 = CpuModel{ | ||
| 1806 | .name = "apple_m2", | ||
| 1807 | .llvm_name = "apple-m2", | ||
| 1808 | .features = featureSet(&[_]Feature{ | ||
| 1809 | .alternate_sextload_cvt_f32_pattern, | ||
| 1810 | .arith_bcc_fusion, | ||
| 1811 | .arith_cbz_fusion, | ||
| 1812 | .crypto, | ||
| 1813 | .disable_latency_sched_heuristic, | ||
| 1814 | .fp16fml, | ||
| 1815 | .fuse_address, | ||
| 1816 | .fuse_aes, | ||
| 1817 | .fuse_arith_logic, | ||
| 1818 | .fuse_crypto_eor, | ||
| 1819 | .fuse_csel, | ||
| 1820 | .fuse_literals, | ||
| 1821 | .perfmon, | ||
| 1822 | .sha3, | ||
| 1823 | .v8_6a, | ||
| 1824 | .zcm, | ||
| 1825 | .zcz, | ||
| 1826 | }), | ||
| 1827 | }; | ||
| 1828 | pub const apple_s4 = CpuModel{ | ||
| 1829 | .name = "apple_s4", | ||
| 1830 | .llvm_name = "apple-s4", | ||
| 1831 | .features = featureSet(&[_]Feature{ | ||
| 1832 | .alternate_sextload_cvt_f32_pattern, | ||
| 1833 | .arith_bcc_fusion, | ||
| 1834 | .arith_cbz_fusion, | ||
| 1835 | .crypto, | ||
| 1836 | .disable_latency_sched_heuristic, | ||
| 1837 | .fullfp16, | ||
| 1838 | .fuse_aes, | ||
| 1839 | .fuse_crypto_eor, | ||
| 1840 | .perfmon, | ||
| 1841 | .v8_3a, | ||
| 1842 | .zcm, | ||
| 1843 | .zcz, | ||
| 1844 | }), | ||
| 1845 | }; | ||
| 1846 | pub const apple_s5 = CpuModel{ | ||
| 1847 | .name = "apple_s5", | ||
| 1848 | .llvm_name = "apple-s5", | ||
| 1849 | .features = featureSet(&[_]Feature{ | ||
| 1850 | .alternate_sextload_cvt_f32_pattern, | ||
| 1851 | .arith_bcc_fusion, | ||
| 1852 | .arith_cbz_fusion, | ||
| 1853 | .crypto, | ||
| 1854 | .disable_latency_sched_heuristic, | ||
| 1855 | .fullfp16, | ||
| 1856 | .fuse_aes, | ||
| 1857 | .fuse_crypto_eor, | ||
| 1858 | .perfmon, | ||
| 1859 | .v8_3a, | ||
| 1860 | .zcm, | ||
| 1861 | .zcz, | ||
| 1862 | }), | ||
| 1863 | }; | ||
| 1864 | pub const carmel = CpuModel{ | ||
| 1865 | .name = "carmel", | ||
| 1866 | .llvm_name = "carmel", | ||
| 1867 | .features = featureSet(&[_]Feature{ | ||
| 1868 | .crypto, | ||
| 1869 | .fullfp16, | ||
| 1870 | .v8_2a, | ||
| 1871 | }), | ||
| 1872 | }; | ||
| 1873 | pub const cortex_a34 = CpuModel{ | ||
| 1874 | .name = "cortex_a34", | ||
| 1875 | .llvm_name = "cortex-a34", | ||
| 1876 | .features = featureSet(&[_]Feature{ | ||
| 1877 | .crc, | ||
| 1878 | .crypto, | ||
| 1879 | .perfmon, | ||
| 1880 | .v8a, | ||
| 1881 | }), | ||
| 1882 | }; | ||
| 1883 | pub const cortex_a35 = CpuModel{ | ||
| 1884 | .name = "cortex_a35", | ||
| 1885 | .llvm_name = "cortex-a35", | ||
| 1886 | .features = featureSet(&[_]Feature{ | ||
| 1887 | .crc, | ||
| 1888 | .crypto, | ||
| 1889 | .perfmon, | ||
| 1890 | .v8a, | ||
| 1891 | }), | ||
| 1892 | }; | ||
| 1893 | pub const cortex_a510 = CpuModel{ | ||
| 1894 | .name = "cortex_a510", | ||
| 1895 | .llvm_name = "cortex-a510", | ||
| 1896 | .features = featureSet(&[_]Feature{ | ||
| 1897 | .a510, | ||
| 1898 | .bf16, | ||
| 1899 | .ete, | ||
| 1900 | .fp16fml, | ||
| 1901 | .i8mm, | ||
| 1902 | .mte, | ||
| 1903 | .perfmon, | ||
| 1904 | .sve2_bitperm, | ||
| 1905 | .v9a, | ||
| 1906 | }), | ||
| 1907 | }; | ||
| 1908 | pub const cortex_a53 = CpuModel{ | ||
| 1909 | .name = "cortex_a53", | ||
| 1910 | .llvm_name = "cortex-a53", | ||
| 1911 | .features = featureSet(&[_]Feature{ | ||
| 1912 | .balance_fp_ops, | ||
| 1913 | .crc, | ||
| 1914 | .crypto, | ||
| 1915 | .custom_cheap_as_move, | ||
| 1916 | .fuse_adrp_add, | ||
| 1917 | .fuse_aes, | ||
| 1918 | .perfmon, | ||
| 1919 | .use_postra_scheduler, | ||
| 1920 | .v8a, | ||
| 1921 | }), | ||
| 1922 | }; | ||
| 1923 | pub const cortex_a55 = CpuModel{ | ||
| 1924 | .name = "cortex_a55", | ||
| 1925 | .llvm_name = "cortex-a55", | ||
| 1926 | .features = featureSet(&[_]Feature{ | ||
| 1927 | .crypto, | ||
| 1928 | .dotprod, | ||
| 1929 | .fullfp16, | ||
| 1930 | .fuse_address, | ||
| 1931 | .fuse_adrp_add, | ||
| 1932 | .fuse_aes, | ||
| 1933 | .perfmon, | ||
| 1934 | .rcpc, | ||
| 1935 | .use_postra_scheduler, | ||
| 1936 | .v8_2a, | ||
| 1937 | }), | ||
| 1938 | }; | ||
| 1939 | pub const cortex_a57 = CpuModel{ | ||
| 1940 | .name = "cortex_a57", | ||
| 1941 | .llvm_name = "cortex-a57", | ||
| 1942 | .features = featureSet(&[_]Feature{ | ||
| 1943 | .balance_fp_ops, | ||
| 1944 | .crc, | ||
| 1945 | .crypto, | ||
| 1946 | .custom_cheap_as_move, | ||
| 1947 | .enable_select_opt, | ||
| 1948 | .fuse_adrp_add, | ||
| 1949 | .fuse_aes, | ||
| 1950 | .fuse_literals, | ||
| 1951 | .perfmon, | ||
| 1952 | .predictable_select_expensive, | ||
| 1953 | .use_postra_scheduler, | ||
| 1954 | .v8a, | ||
| 1955 | }), | ||
| 1956 | }; | ||
| 1957 | pub const cortex_a65 = CpuModel{ | ||
| 1958 | .name = "cortex_a65", | ||
| 1959 | .llvm_name = "cortex-a65", | ||
| 1960 | .features = featureSet(&[_]Feature{ | ||
| 1961 | .a65, | ||
| 1962 | .crypto, | ||
| 1963 | .dotprod, | ||
| 1964 | .fullfp16, | ||
| 1965 | .perfmon, | ||
| 1966 | .rcpc, | ||
| 1967 | .ssbs, | ||
| 1968 | .v8_2a, | ||
| 1969 | }), | ||
| 1970 | }; | ||
| 1971 | pub const cortex_a65ae = CpuModel{ | ||
| 1972 | .name = "cortex_a65ae", | ||
| 1973 | .llvm_name = "cortex-a65ae", | ||
| 1974 | .features = featureSet(&[_]Feature{ | ||
| 1975 | .a65, | ||
| 1976 | .crypto, | ||
| 1977 | .dotprod, | ||
| 1978 | .fullfp16, | ||
| 1979 | .perfmon, | ||
| 1980 | .rcpc, | ||
| 1981 | .ssbs, | ||
| 1982 | .v8_2a, | ||
| 1983 | }), | ||
| 1984 | }; | ||
| 1985 | pub const cortex_a710 = CpuModel{ | ||
| 1986 | .name = "cortex_a710", | ||
| 1987 | .llvm_name = "cortex-a710", | ||
| 1988 | .features = featureSet(&[_]Feature{ | ||
| 1989 | .a710, | ||
| 1990 | .bf16, | ||
| 1991 | .ete, | ||
| 1992 | .fp16fml, | ||
| 1993 | .i8mm, | ||
| 1994 | .mte, | ||
| 1995 | .perfmon, | ||
| 1996 | .sve2_bitperm, | ||
| 1997 | .v9a, | ||
| 1998 | }), | ||
| 1999 | }; | ||
| 2000 | pub const cortex_a715 = CpuModel{ | ||
| 2001 | .name = "cortex_a715", | ||
| 2002 | .llvm_name = "cortex-a715", | ||
| 2003 | .features = featureSet(&[_]Feature{ | ||
| 2004 | .bf16, | ||
| 2005 | .cmp_bcc_fusion, | ||
| 2006 | .enable_select_opt, | ||
| 2007 | .ete, | ||
| 2008 | .fp16fml, | ||
| 2009 | .fuse_adrp_add, | ||
| 2010 | .fuse_aes, | ||
| 2011 | .i8mm, | ||
| 2012 | .lsl_fast, | ||
| 2013 | .mte, | ||
| 2014 | .perfmon, | ||
| 2015 | .predictable_select_expensive, | ||
| 2016 | .spe, | ||
| 2017 | .sve2_bitperm, | ||
| 2018 | .use_postra_scheduler, | ||
| 2019 | .v9a, | ||
| 2020 | }), | ||
| 2021 | }; | ||
| 2022 | pub const cortex_a72 = CpuModel{ | ||
| 2023 | .name = "cortex_a72", | ||
| 2024 | .llvm_name = "cortex-a72", | ||
| 2025 | .features = featureSet(&[_]Feature{ | ||
| 2026 | .crc, | ||
| 2027 | .crypto, | ||
| 2028 | .enable_select_opt, | ||
| 2029 | .fuse_adrp_add, | ||
| 2030 | .fuse_aes, | ||
| 2031 | .fuse_literals, | ||
| 2032 | .perfmon, | ||
| 2033 | .predictable_select_expensive, | ||
| 2034 | .v8a, | ||
| 2035 | }), | ||
| 2036 | }; | ||
| 2037 | pub const cortex_a73 = CpuModel{ | ||
| 2038 | .name = "cortex_a73", | ||
| 2039 | .llvm_name = "cortex-a73", | ||
| 2040 | .features = featureSet(&[_]Feature{ | ||
| 2041 | .crc, | ||
| 2042 | .crypto, | ||
| 2043 | .enable_select_opt, | ||
| 2044 | .fuse_adrp_add, | ||
| 2045 | .fuse_aes, | ||
| 2046 | .perfmon, | ||
| 2047 | .predictable_select_expensive, | ||
| 2048 | .v8a, | ||
| 2049 | }), | ||
| 2050 | }; | ||
| 2051 | pub const cortex_a75 = CpuModel{ | ||
| 2052 | .name = "cortex_a75", | ||
| 2053 | .llvm_name = "cortex-a75", | ||
| 2054 | .features = featureSet(&[_]Feature{ | ||
| 2055 | .crypto, | ||
| 2056 | .dotprod, | ||
| 2057 | .enable_select_opt, | ||
| 2058 | .fullfp16, | ||
| 2059 | .fuse_adrp_add, | ||
| 2060 | .fuse_aes, | ||
| 2061 | .perfmon, | ||
| 2062 | .predictable_select_expensive, | ||
| 2063 | .rcpc, | ||
| 2064 | .v8_2a, | ||
| 2065 | }), | ||
| 2066 | }; | ||
| 2067 | pub const cortex_a76 = CpuModel{ | ||
| 2068 | .name = "cortex_a76", | ||
| 2069 | .llvm_name = "cortex-a76", | ||
| 2070 | .features = featureSet(&[_]Feature{ | ||
| 2071 | .a76, | ||
| 2072 | .crypto, | ||
| 2073 | .dotprod, | ||
| 2074 | .fullfp16, | ||
| 2075 | .perfmon, | ||
| 2076 | .rcpc, | ||
| 2077 | .ssbs, | ||
| 2078 | .v8_2a, | ||
| 2079 | }), | ||
| 2080 | }; | ||
| 2081 | pub const cortex_a76ae = CpuModel{ | ||
| 2082 | .name = "cortex_a76ae", | ||
| 2083 | .llvm_name = "cortex-a76ae", | ||
| 2084 | .features = featureSet(&[_]Feature{ | ||
| 2085 | .a76, | ||
| 2086 | .crypto, | ||
| 2087 | .dotprod, | ||
| 2088 | .fullfp16, | ||
| 2089 | .perfmon, | ||
| 2090 | .rcpc, | ||
| 2091 | .ssbs, | ||
| 2092 | .v8_2a, | ||
| 2093 | }), | ||
| 2094 | }; | ||
| 2095 | pub const cortex_a77 = CpuModel{ | ||
| 2096 | .name = "cortex_a77", | ||
| 2097 | .llvm_name = "cortex-a77", | ||
| 2098 | .features = featureSet(&[_]Feature{ | ||
| 2099 | .cmp_bcc_fusion, | ||
| 2100 | .crypto, | ||
| 2101 | .dotprod, | ||
| 2102 | .enable_select_opt, | ||
| 2103 | .fullfp16, | ||
| 2104 | .fuse_adrp_add, | ||
| 2105 | .fuse_aes, | ||
| 2106 | .lsl_fast, | ||
| 2107 | .perfmon, | ||
| 2108 | .predictable_select_expensive, | ||
| 2109 | .rcpc, | ||
| 2110 | .ssbs, | ||
| 2111 | .v8_2a, | ||
| 2112 | }), | ||
| 2113 | }; | ||
| 2114 | pub const cortex_a78 = CpuModel{ | ||
| 2115 | .name = "cortex_a78", | ||
| 2116 | .llvm_name = "cortex-a78", | ||
| 2117 | .features = featureSet(&[_]Feature{ | ||
| 2118 | .a78, | ||
| 2119 | .crypto, | ||
| 2120 | .dotprod, | ||
| 2121 | .fullfp16, | ||
| 2122 | .perfmon, | ||
| 2123 | .rcpc, | ||
| 2124 | .spe, | ||
| 2125 | .ssbs, | ||
| 2126 | .v8_2a, | ||
| 2127 | }), | ||
| 2128 | }; | ||
| 2129 | pub const cortex_a78c = CpuModel{ | ||
| 2130 | .name = "cortex_a78c", | ||
| 2131 | .llvm_name = "cortex-a78c", | ||
| 2132 | .features = featureSet(&[_]Feature{ | ||
| 2133 | .a78c, | ||
| 2134 | .crypto, | ||
| 2135 | .dotprod, | ||
| 2136 | .flagm, | ||
| 2137 | .fp16fml, | ||
| 2138 | .pauth, | ||
| 2139 | .perfmon, | ||
| 2140 | .rcpc, | ||
| 2141 | .spe, | ||
| 2142 | .ssbs, | ||
| 2143 | .v8_2a, | ||
| 2144 | }), | ||
| 2145 | }; | ||
| 2146 | pub const cortex_r82 = CpuModel{ | ||
| 2147 | .name = "cortex_r82", | ||
| 2148 | .llvm_name = "cortex-r82", | ||
| 2149 | .features = featureSet(&[_]Feature{ | ||
| 2150 | .cortex_r82, | ||
| 2151 | .fp16fml, | ||
| 2152 | .perfmon, | ||
| 2153 | .predres, | ||
| 2154 | .sb, | ||
| 2155 | .ssbs, | ||
| 2156 | .v8r, | ||
| 2157 | }), | ||
| 2158 | }; | ||
| 2159 | pub const cortex_x1 = CpuModel{ | ||
| 2160 | .name = "cortex_x1", | ||
| 2161 | .llvm_name = "cortex-x1", | ||
| 2162 | .features = featureSet(&[_]Feature{ | ||
| 2163 | .cmp_bcc_fusion, | ||
| 2164 | .crypto, | ||
| 2165 | .dotprod, | ||
| 2166 | .enable_select_opt, | ||
| 2167 | .fullfp16, | ||
| 2168 | .fuse_adrp_add, | ||
| 2169 | .fuse_aes, | ||
| 2170 | .lsl_fast, | ||
| 2171 | .perfmon, | ||
| 2172 | .predictable_select_expensive, | ||
| 2173 | .rcpc, | ||
| 2174 | .spe, | ||
| 2175 | .ssbs, | ||
| 2176 | .use_postra_scheduler, | ||
| 2177 | .v8_2a, | ||
| 2178 | }), | ||
| 2179 | }; | ||
| 2180 | pub const cortex_x1c = CpuModel{ | ||
| 2181 | .name = "cortex_x1c", | ||
| 2182 | .llvm_name = "cortex-x1c", | ||
| 2183 | .features = featureSet(&[_]Feature{ | ||
| 2184 | .cmp_bcc_fusion, | ||
| 2185 | .crypto, | ||
| 2186 | .dotprod, | ||
| 2187 | .enable_select_opt, | ||
| 2188 | .flagm, | ||
| 2189 | .fullfp16, | ||
| 2190 | .fuse_adrp_add, | ||
| 2191 | .fuse_aes, | ||
| 2192 | .lse2, | ||
| 2193 | .lsl_fast, | ||
| 2194 | .pauth, | ||
| 2195 | .perfmon, | ||
| 2196 | .predictable_select_expensive, | ||
| 2197 | .rcpc_immo, | ||
| 2198 | .spe, | ||
| 2199 | .ssbs, | ||
| 2200 | .use_postra_scheduler, | ||
| 2201 | .v8_2a, | ||
| 2202 | }), | ||
| 2203 | }; | ||
| 2204 | pub const cortex_x2 = CpuModel{ | ||
| 2205 | .name = "cortex_x2", | ||
| 2206 | .llvm_name = "cortex-x2", | ||
| 2207 | .features = featureSet(&[_]Feature{ | ||
| 2208 | .bf16, | ||
| 2209 | .cmp_bcc_fusion, | ||
| 2210 | .enable_select_opt, | ||
| 2211 | .ete, | ||
| 2212 | .fp16fml, | ||
| 2213 | .fuse_adrp_add, | ||
| 2214 | .fuse_aes, | ||
| 2215 | .i8mm, | ||
| 2216 | .lsl_fast, | ||
| 2217 | .mte, | ||
| 2218 | .perfmon, | ||
| 2219 | .predictable_select_expensive, | ||
| 2220 | .sve2_bitperm, | ||
| 2221 | .use_postra_scheduler, | ||
| 2222 | .v9a, | ||
| 2223 | }), | ||
| 2224 | }; | ||
| 2225 | pub const cortex_x3 = CpuModel{ | ||
| 2226 | .name = "cortex_x3", | ||
| 2227 | .llvm_name = "cortex-x3", | ||
| 2228 | .features = featureSet(&[_]Feature{ | ||
| 2229 | .bf16, | ||
| 2230 | .enable_select_opt, | ||
| 2231 | .ete, | ||
| 2232 | .fp16fml, | ||
| 2233 | .fuse_adrp_add, | ||
| 2234 | .fuse_aes, | ||
| 2235 | .i8mm, | ||
| 2236 | .lsl_fast, | ||
| 2237 | .mte, | ||
| 2238 | .perfmon, | ||
| 2239 | .predictable_select_expensive, | ||
| 2240 | .spe, | ||
| 2241 | .sve2_bitperm, | ||
| 2242 | .use_postra_scheduler, | ||
| 2243 | .v9a, | ||
| 2244 | }), | ||
| 2245 | }; | ||
| 2246 | pub const cyclone = CpuModel{ | ||
| 2247 | .name = "cyclone", | ||
| 2248 | .llvm_name = "cyclone", | ||
| 2249 | .features = featureSet(&[_]Feature{ | ||
| 2250 | .alternate_sextload_cvt_f32_pattern, | ||
| 2251 | .arith_bcc_fusion, | ||
| 2252 | .arith_cbz_fusion, | ||
| 2253 | .crypto, | ||
| 2254 | .disable_latency_sched_heuristic, | ||
| 2255 | .fuse_aes, | ||
| 2256 | .fuse_crypto_eor, | ||
| 2257 | .perfmon, | ||
| 2258 | .v8a, | ||
| 2259 | .zcm, | ||
| 2260 | .zcz, | ||
| 2261 | .zcz_fp_workaround, | ||
| 2262 | }), | ||
| 2263 | }; | ||
| 2264 | pub const emag = CpuModel{ | ||
| 2265 | .name = "emag", | ||
| 2266 | .llvm_name = null, | ||
| 2267 | .features = featureSet(&[_]Feature{ | ||
| 2268 | .crc, | ||
| 2269 | .crypto, | ||
| 2270 | .perfmon, | ||
| 2271 | .v8a, | ||
| 2272 | }), | ||
| 2273 | }; | ||
| 2274 | pub const exynos_m1 = CpuModel{ | ||
| 2275 | .name = "exynos_m1", | ||
| 2276 | .llvm_name = null, | ||
| 2277 | .features = featureSet(&[_]Feature{ | ||
| 2278 | .crc, | ||
| 2279 | .crypto, | ||
| 2280 | .exynos_cheap_as_move, | ||
| 2281 | .force_32bit_jump_tables, | ||
| 2282 | .fuse_aes, | ||
| 2283 | .perfmon, | ||
| 2284 | .slow_misaligned_128store, | ||
| 2285 | .slow_paired_128, | ||
| 2286 | .use_postra_scheduler, | ||
| 2287 | .use_reciprocal_square_root, | ||
| 2288 | .v8a, | ||
| 2289 | }), | ||
| 2290 | }; | ||
| 2291 | pub const exynos_m2 = CpuModel{ | ||
| 2292 | .name = "exynos_m2", | ||
| 2293 | .llvm_name = null, | ||
| 2294 | .features = featureSet(&[_]Feature{ | ||
| 2295 | .crc, | ||
| 2296 | .crypto, | ||
| 2297 | .exynos_cheap_as_move, | ||
| 2298 | .force_32bit_jump_tables, | ||
| 2299 | .fuse_aes, | ||
| 2300 | .perfmon, | ||
| 2301 | .slow_misaligned_128store, | ||
| 2302 | .slow_paired_128, | ||
| 2303 | .use_postra_scheduler, | ||
| 2304 | .v8a, | ||
| 2305 | }), | ||
| 2306 | }; | ||
| 2307 | pub const exynos_m3 = CpuModel{ | ||
| 2308 | .name = "exynos_m3", | ||
| 2309 | .llvm_name = "exynos-m3", | ||
| 2310 | .features = featureSet(&[_]Feature{ | ||
| 2311 | .crc, | ||
| 2312 | .crypto, | ||
| 2313 | .exynos_cheap_as_move, | ||
| 2314 | .force_32bit_jump_tables, | ||
| 2315 | .fuse_address, | ||
| 2316 | .fuse_adrp_add, | ||
| 2317 | .fuse_aes, | ||
| 2318 | .fuse_csel, | ||
| 2319 | .fuse_literals, | ||
| 2320 | .lsl_fast, | ||
| 2321 | .perfmon, | ||
| 2322 | .predictable_select_expensive, | ||
| 2323 | .use_postra_scheduler, | ||
| 2324 | .v8a, | ||
| 2325 | }), | ||
| 2326 | }; | ||
| 2327 | pub const exynos_m4 = CpuModel{ | ||
| 2328 | .name = "exynos_m4", | ||
| 2329 | .llvm_name = "exynos-m4", | ||
| 2330 | .features = featureSet(&[_]Feature{ | ||
| 2331 | .arith_bcc_fusion, | ||
| 2332 | .arith_cbz_fusion, | ||
| 2333 | .crypto, | ||
| 2334 | .dotprod, | ||
| 2335 | .exynos_cheap_as_move, | ||
| 2336 | .force_32bit_jump_tables, | ||
| 2337 | .fullfp16, | ||
| 2338 | .fuse_address, | ||
| 2339 | .fuse_adrp_add, | ||
| 2340 | .fuse_aes, | ||
| 2341 | .fuse_arith_logic, | ||
| 2342 | .fuse_csel, | ||
| 2343 | .fuse_literals, | ||
| 2344 | .lsl_fast, | ||
| 2345 | .perfmon, | ||
| 2346 | .use_postra_scheduler, | ||
| 2347 | .v8_2a, | ||
| 2348 | .zcz, | ||
| 2349 | }), | ||
| 2350 | }; | ||
| 2351 | pub const exynos_m5 = CpuModel{ | ||
| 2352 | .name = "exynos_m5", | ||
| 2353 | .llvm_name = "exynos-m5", | ||
| 2354 | .features = featureSet(&[_]Feature{ | ||
| 2355 | .arith_bcc_fusion, | ||
| 2356 | .arith_cbz_fusion, | ||
| 2357 | .crypto, | ||
| 2358 | .dotprod, | ||
| 2359 | .exynos_cheap_as_move, | ||
| 2360 | .force_32bit_jump_tables, | ||
| 2361 | .fullfp16, | ||
| 2362 | .fuse_address, | ||
| 2363 | .fuse_adrp_add, | ||
| 2364 | .fuse_aes, | ||
| 2365 | .fuse_arith_logic, | ||
| 2366 | .fuse_csel, | ||
| 2367 | .fuse_literals, | ||
| 2368 | .lsl_fast, | ||
| 2369 | .perfmon, | ||
| 2370 | .use_postra_scheduler, | ||
| 2371 | .v8_2a, | ||
| 2372 | .zcz, | ||
| 2373 | }), | ||
| 2374 | }; | ||
| 2375 | pub const falkor = CpuModel{ | ||
| 2376 | .name = "falkor", | ||
| 2377 | .llvm_name = "falkor", | ||
| 2378 | .features = featureSet(&[_]Feature{ | ||
| 2379 | .crc, | ||
| 2380 | .crypto, | ||
| 2381 | .custom_cheap_as_move, | ||
| 2382 | .lsl_fast, | ||
| 2383 | .perfmon, | ||
| 2384 | .predictable_select_expensive, | ||
| 2385 | .rdm, | ||
| 2386 | .slow_strqro_store, | ||
| 2387 | .use_postra_scheduler, | ||
| 2388 | .v8a, | ||
| 2389 | .zcz, | ||
| 2390 | }), | ||
| 2391 | }; | ||
| 2392 | pub const generic = CpuModel{ | ||
| 2393 | .name = "generic", | ||
| 2394 | .llvm_name = "generic", | ||
| 2395 | .features = featureSet(&[_]Feature{ | ||
| 2396 | .enable_select_opt, | ||
| 2397 | .ete, | ||
| 2398 | .fuse_adrp_add, | ||
| 2399 | .fuse_aes, | ||
| 2400 | .neon, | ||
| 2401 | .use_postra_scheduler, | ||
| 2402 | }), | ||
| 2403 | }; | ||
| 2404 | pub const kryo = CpuModel{ | ||
| 2405 | .name = "kryo", | ||
| 2406 | .llvm_name = "kryo", | ||
| 2407 | .features = featureSet(&[_]Feature{ | ||
| 2408 | .crc, | ||
| 2409 | .crypto, | ||
| 2410 | .custom_cheap_as_move, | ||
| 2411 | .lsl_fast, | ||
| 2412 | .perfmon, | ||
| 2413 | .predictable_select_expensive, | ||
| 2414 | .use_postra_scheduler, | ||
| 2415 | .v8a, | ||
| 2416 | .zcz, | ||
| 2417 | }), | ||
| 2418 | }; | ||
| 2419 | pub const neoverse_512tvb = CpuModel{ | ||
| 2420 | .name = "neoverse_512tvb", | ||
| 2421 | .llvm_name = "neoverse-512tvb", | ||
| 2422 | .features = featureSet(&[_]Feature{ | ||
| 2423 | .bf16, | ||
| 2424 | .ccdp, | ||
| 2425 | .crypto, | ||
| 2426 | .enable_select_opt, | ||
| 2427 | .fp16fml, | ||
| 2428 | .fuse_adrp_add, | ||
| 2429 | .fuse_aes, | ||
| 2430 | .i8mm, | ||
| 2431 | .lsl_fast, | ||
| 2432 | .perfmon, | ||
| 2433 | .predictable_select_expensive, | ||
| 2434 | .rand, | ||
| 2435 | .spe, | ||
| 2436 | .ssbs, | ||
| 2437 | .sve, | ||
| 2438 | .use_postra_scheduler, | ||
| 2439 | .v8_4a, | ||
| 2440 | }), | ||
| 2441 | }; | ||
| 2442 | pub const neoverse_e1 = CpuModel{ | ||
| 2443 | .name = "neoverse_e1", | ||
| 2444 | .llvm_name = "neoverse-e1", | ||
| 2445 | .features = featureSet(&[_]Feature{ | ||
| 2446 | .crypto, | ||
| 2447 | .dotprod, | ||
| 2448 | .fullfp16, | ||
| 2449 | .fuse_adrp_add, | ||
| 2450 | .fuse_aes, | ||
| 2451 | .perfmon, | ||
| 2452 | .rcpc, | ||
| 2453 | .ssbs, | ||
| 2454 | .use_postra_scheduler, | ||
| 2455 | .v8_2a, | ||
| 2456 | }), | ||
| 2457 | }; | ||
| 2458 | pub const neoverse_n1 = CpuModel{ | ||
| 2459 | .name = "neoverse_n1", | ||
| 2460 | .llvm_name = "neoverse-n1", | ||
| 2461 | .features = featureSet(&[_]Feature{ | ||
| 2462 | .crypto, | ||
| 2463 | .dotprod, | ||
| 2464 | .enable_select_opt, | ||
| 2465 | .fullfp16, | ||
| 2466 | .fuse_adrp_add, | ||
| 2467 | .fuse_aes, | ||
| 2468 | .lsl_fast, | ||
| 2469 | .perfmon, | ||
| 2470 | .predictable_select_expensive, | ||
| 2471 | .rcpc, | ||
| 2472 | .spe, | ||
| 2473 | .ssbs, | ||
| 2474 | .use_postra_scheduler, | ||
| 2475 | .v8_2a, | ||
| 2476 | }), | ||
| 2477 | }; | ||
| 2478 | pub const neoverse_n2 = CpuModel{ | ||
| 2479 | .name = "neoverse_n2", | ||
| 2480 | .llvm_name = "neoverse-n2", | ||
| 2481 | .features = featureSet(&[_]Feature{ | ||
| 2482 | .bf16, | ||
| 2483 | .crypto, | ||
| 2484 | .enable_select_opt, | ||
| 2485 | .ete, | ||
| 2486 | .fuse_adrp_add, | ||
| 2487 | .fuse_aes, | ||
| 2488 | .i8mm, | ||
| 2489 | .lsl_fast, | ||
| 2490 | .mte, | ||
| 2491 | .perfmon, | ||
| 2492 | .predictable_select_expensive, | ||
| 2493 | .sve2_bitperm, | ||
| 2494 | .use_postra_scheduler, | ||
| 2495 | .v8_5a, | ||
| 2496 | }), | ||
| 2497 | }; | ||
| 2498 | pub const neoverse_v1 = CpuModel{ | ||
| 2499 | .name = "neoverse_v1", | ||
| 2500 | .llvm_name = "neoverse-v1", | ||
| 2501 | .features = featureSet(&[_]Feature{ | ||
| 2502 | .bf16, | ||
| 2503 | .ccdp, | ||
| 2504 | .crypto, | ||
| 2505 | .enable_select_opt, | ||
| 2506 | .fp16fml, | ||
| 2507 | .fuse_adrp_add, | ||
| 2508 | .fuse_aes, | ||
| 2509 | .i8mm, | ||
| 2510 | .lsl_fast, | ||
| 2511 | .no_sve_fp_ld1r, | ||
| 2512 | .perfmon, | ||
| 2513 | .predictable_select_expensive, | ||
| 2514 | .rand, | ||
| 2515 | .spe, | ||
| 2516 | .ssbs, | ||
| 2517 | .sve, | ||
| 2518 | .use_postra_scheduler, | ||
| 2519 | .v8_4a, | ||
| 2520 | }), | ||
| 2521 | }; | ||
| 2522 | pub const neoverse_v2 = CpuModel{ | ||
| 2523 | .name = "neoverse_v2", | ||
| 2524 | .llvm_name = "neoverse-v2", | ||
| 2525 | .features = featureSet(&[_]Feature{ | ||
| 2526 | .bf16, | ||
| 2527 | .enable_select_opt, | ||
| 2528 | .ete, | ||
| 2529 | .fp16fml, | ||
| 2530 | .fuse_aes, | ||
| 2531 | .i8mm, | ||
| 2532 | .lsl_fast, | ||
| 2533 | .mte, | ||
| 2534 | .perfmon, | ||
| 2535 | .predictable_select_expensive, | ||
| 2536 | .rand, | ||
| 2537 | .spe, | ||
| 2538 | .sve2_bitperm, | ||
| 2539 | .use_postra_scheduler, | ||
| 2540 | .v9a, | ||
| 2541 | }), | ||
| 2542 | }; | ||
| 2543 | pub const saphira = CpuModel{ | ||
| 2544 | .name = "saphira", | ||
| 2545 | .llvm_name = "saphira", | ||
| 2546 | .features = featureSet(&[_]Feature{ | ||
| 2547 | .crypto, | ||
| 2548 | .custom_cheap_as_move, | ||
| 2549 | .lsl_fast, | ||
| 2550 | .perfmon, | ||
| 2551 | .predictable_select_expensive, | ||
| 2552 | .spe, | ||
| 2553 | .use_postra_scheduler, | ||
| 2554 | .v8_4a, | ||
| 2555 | .zcz, | ||
| 2556 | }), | ||
| 2557 | }; | ||
| 2558 | pub const thunderx = CpuModel{ | ||
| 2559 | .name = "thunderx", | ||
| 2560 | .llvm_name = "thunderx", | ||
| 2561 | .features = featureSet(&[_]Feature{ | ||
| 2562 | .crc, | ||
| 2563 | .crypto, | ||
| 2564 | .perfmon, | ||
| 2565 | .predictable_select_expensive, | ||
| 2566 | .use_postra_scheduler, | ||
| 2567 | .v8a, | ||
| 2568 | }), | ||
| 2569 | }; | ||
| 2570 | pub const thunderx2t99 = CpuModel{ | ||
| 2571 | .name = "thunderx2t99", | ||
| 2572 | .llvm_name = "thunderx2t99", | ||
| 2573 | .features = featureSet(&[_]Feature{ | ||
| 2574 | .aggressive_fma, | ||
| 2575 | .arith_bcc_fusion, | ||
| 2576 | .crypto, | ||
| 2577 | .predictable_select_expensive, | ||
| 2578 | .use_postra_scheduler, | ||
| 2579 | .v8_1a, | ||
| 2580 | }), | ||
| 2581 | }; | ||
| 2582 | pub const thunderx3t110 = CpuModel{ | ||
| 2583 | .name = "thunderx3t110", | ||
| 2584 | .llvm_name = "thunderx3t110", | ||
| 2585 | .features = featureSet(&[_]Feature{ | ||
| 2586 | .aggressive_fma, | ||
| 2587 | .arith_bcc_fusion, | ||
| 2588 | .balance_fp_ops, | ||
| 2589 | .crypto, | ||
| 2590 | .perfmon, | ||
| 2591 | .predictable_select_expensive, | ||
| 2592 | .strict_align, | ||
| 2593 | .use_postra_scheduler, | ||
| 2594 | .v8_3a, | ||
| 2595 | }), | ||
| 2596 | }; | ||
| 2597 | pub const thunderxt81 = CpuModel{ | ||
| 2598 | .name = "thunderxt81", | ||
| 2599 | .llvm_name = "thunderxt81", | ||
| 2600 | .features = featureSet(&[_]Feature{ | ||
| 2601 | .crc, | ||
| 2602 | .crypto, | ||
| 2603 | .perfmon, | ||
| 2604 | .predictable_select_expensive, | ||
| 2605 | .use_postra_scheduler, | ||
| 2606 | .v8a, | ||
| 2607 | }), | ||
| 2608 | }; | ||
| 2609 | pub const thunderxt83 = CpuModel{ | ||
| 2610 | .name = "thunderxt83", | ||
| 2611 | .llvm_name = "thunderxt83", | ||
| 2612 | .features = featureSet(&[_]Feature{ | ||
| 2613 | .crc, | ||
| 2614 | .crypto, | ||
| 2615 | .perfmon, | ||
| 2616 | .predictable_select_expensive, | ||
| 2617 | .use_postra_scheduler, | ||
| 2618 | .v8a, | ||
| 2619 | }), | ||
| 2620 | }; | ||
| 2621 | pub const thunderxt88 = CpuModel{ | ||
| 2622 | .name = "thunderxt88", | ||
| 2623 | .llvm_name = "thunderxt88", | ||
| 2624 | .features = featureSet(&[_]Feature{ | ||
| 2625 | .crc, | ||
| 2626 | .crypto, | ||
| 2627 | .perfmon, | ||
| 2628 | .predictable_select_expensive, | ||
| 2629 | .use_postra_scheduler, | ||
| 2630 | .v8a, | ||
| 2631 | }), | ||
| 2632 | }; | ||
| 2633 | pub const tsv110 = CpuModel{ | ||
| 2634 | .name = "tsv110", | ||
| 2635 | .llvm_name = "tsv110", | ||
| 2636 | .features = featureSet(&[_]Feature{ | ||
| 2637 | .crypto, | ||
| 2638 | .custom_cheap_as_move, | ||
| 2639 | .dotprod, | ||
| 2640 | .fp16fml, | ||
| 2641 | .fuse_aes, | ||
| 2642 | .perfmon, | ||
| 2643 | .spe, | ||
| 2644 | .use_postra_scheduler, | ||
| 2645 | .v8_2a, | ||
| 2646 | }), | ||
| 2647 | }; | ||
| 2648 | pub const xgene1 = CpuModel{ | ||
| 2649 | .name = "xgene1", | ||
| 2650 | .llvm_name = null, | ||
| 2651 | .features = featureSet(&[_]Feature{ | ||
| 2652 | .perfmon, | ||
| 2653 | .v8a, | ||
| 2654 | }), | ||
| 2655 | }; | ||
| 2656 | }; | ||
lib/std/Target/amdgpu.zig created+2153
| ... | @@ -0,0 +1,2153 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"16_bit_insts", | ||
| 9 | a16, | ||
| 10 | add_no_carry_insts, | ||
| 11 | aperture_regs, | ||
| 12 | architected_flat_scratch, | ||
| 13 | architected_sgprs, | ||
| 14 | atomic_buffer_global_pk_add_f16_insts, | ||
| 15 | atomic_buffer_global_pk_add_f16_no_rtn_insts, | ||
| 16 | atomic_ds_pk_add_16_insts, | ||
| 17 | atomic_fadd_no_rtn_insts, | ||
| 18 | atomic_fadd_rtn_insts, | ||
| 19 | atomic_flat_pk_add_16_insts, | ||
| 20 | atomic_global_pk_add_bf16_inst, | ||
| 21 | auto_waitcnt_before_barrier, | ||
| 22 | back_off_barrier, | ||
| 23 | ci_insts, | ||
| 24 | cumode, | ||
| 25 | dl_insts, | ||
| 26 | dot10_insts, | ||
| 27 | dot1_insts, | ||
| 28 | dot2_insts, | ||
| 29 | dot3_insts, | ||
| 30 | dot4_insts, | ||
| 31 | dot5_insts, | ||
| 32 | dot6_insts, | ||
| 33 | dot7_insts, | ||
| 34 | dot8_insts, | ||
| 35 | dot9_insts, | ||
| 36 | dpp, | ||
| 37 | dpp8, | ||
| 38 | dpp_64bit, | ||
| 39 | ds128, | ||
| 40 | ds_src2_insts, | ||
| 41 | extended_image_insts, | ||
| 42 | fast_denormal_f32, | ||
| 43 | fast_fmaf, | ||
| 44 | flat_address_space, | ||
| 45 | flat_atomic_fadd_f32_inst, | ||
| 46 | flat_for_global, | ||
| 47 | flat_global_insts, | ||
| 48 | flat_inst_offsets, | ||
| 49 | flat_scratch, | ||
| 50 | flat_scratch_insts, | ||
| 51 | flat_segment_offset_bug, | ||
| 52 | fma_mix_insts, | ||
| 53 | fmacf64_inst, | ||
| 54 | fmaf, | ||
| 55 | force_store_sc0_sc1, | ||
| 56 | fp64, | ||
| 57 | fp8_insts, | ||
| 58 | full_rate_64_ops, | ||
| 59 | g16, | ||
| 60 | gcn3_encoding, | ||
| 61 | get_wave_id_inst, | ||
| 62 | gfx10, | ||
| 63 | gfx10_3_insts, | ||
| 64 | gfx10_a_encoding, | ||
| 65 | gfx10_b_encoding, | ||
| 66 | gfx10_insts, | ||
| 67 | gfx11, | ||
| 68 | gfx11_full_vgprs, | ||
| 69 | gfx11_insts, | ||
| 70 | gfx7_gfx8_gfx9_insts, | ||
| 71 | gfx8_insts, | ||
| 72 | gfx9, | ||
| 73 | gfx90a_insts, | ||
| 74 | gfx940_insts, | ||
| 75 | gfx9_insts, | ||
| 76 | half_rate_64_ops, | ||
| 77 | image_gather4_d16_bug, | ||
| 78 | image_insts, | ||
| 79 | image_store_d16_bug, | ||
| 80 | inst_fwd_prefetch_bug, | ||
| 81 | int_clamp_insts, | ||
| 82 | inv_2pi_inline_imm, | ||
| 83 | lds_branch_vmem_war_hazard, | ||
| 84 | lds_misaligned_bug, | ||
| 85 | ldsbankcount16, | ||
| 86 | ldsbankcount32, | ||
| 87 | load_store_opt, | ||
| 88 | localmemorysize32768, | ||
| 89 | localmemorysize65536, | ||
| 90 | mad_intra_fwd_bug, | ||
| 91 | mad_mac_f32_insts, | ||
| 92 | mad_mix_insts, | ||
| 93 | mai_insts, | ||
| 94 | max_private_element_size_16, | ||
| 95 | max_private_element_size_4, | ||
| 96 | max_private_element_size_8, | ||
| 97 | mfma_inline_literal_bug, | ||
| 98 | mimg_r128, | ||
| 99 | movrel, | ||
| 100 | negative_scratch_offset_bug, | ||
| 101 | negative_unaligned_scratch_offset_bug, | ||
| 102 | no_data_dep_hazard, | ||
| 103 | no_sdst_cmpx, | ||
| 104 | nsa_clause_bug, | ||
| 105 | nsa_encoding, | ||
| 106 | nsa_to_vmem_bug, | ||
| 107 | offset_3f_bug, | ||
| 108 | packed_fp32_ops, | ||
| 109 | packed_tid, | ||
| 110 | partial_nsa_encoding, | ||
| 111 | pk_fmac_f16_inst, | ||
| 112 | promote_alloca, | ||
| 113 | prt_strict_null, | ||
| 114 | r128_a16, | ||
| 115 | s_memrealtime, | ||
| 116 | s_memtime_inst, | ||
| 117 | scalar_atomics, | ||
| 118 | scalar_flat_scratch_insts, | ||
| 119 | scalar_stores, | ||
| 120 | sdwa, | ||
| 121 | sdwa_mav, | ||
| 122 | sdwa_omod, | ||
| 123 | sdwa_out_mods_vopc, | ||
| 124 | sdwa_scalar, | ||
| 125 | sdwa_sdst, | ||
| 126 | sea_islands, | ||
| 127 | sgpr_init_bug, | ||
| 128 | shader_cycles_register, | ||
| 129 | si_scheduler, | ||
| 130 | smem_to_vector_write_hazard, | ||
| 131 | southern_islands, | ||
| 132 | sramecc, | ||
| 133 | sramecc_support, | ||
| 134 | tgsplit, | ||
| 135 | trap_handler, | ||
| 136 | trig_reduced_range, | ||
| 137 | true16, | ||
| 138 | unaligned_access_mode, | ||
| 139 | unaligned_buffer_access, | ||
| 140 | unaligned_ds_access, | ||
| 141 | unaligned_scratch_access, | ||
| 142 | unpacked_d16_vmem, | ||
| 143 | unsafe_ds_offset_folding, | ||
| 144 | user_sgpr_init16_bug, | ||
| 145 | valu_trans_use_hazard, | ||
| 146 | vcmpx_exec_war_hazard, | ||
| 147 | vcmpx_permlane_hazard, | ||
| 148 | vgpr_index_mode, | ||
| 149 | vmem_to_scalar_write_hazard, | ||
| 150 | volcanic_islands, | ||
| 151 | vop3_literal, | ||
| 152 | vop3p, | ||
| 153 | vopd, | ||
| 154 | vscnt, | ||
| 155 | wavefrontsize16, | ||
| 156 | wavefrontsize32, | ||
| 157 | wavefrontsize64, | ||
| 158 | xnack, | ||
| 159 | xnack_support, | ||
| 160 | }; | ||
| 161 | |||
| 162 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 163 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 164 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 165 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 166 | |||
| 167 | pub const all_features = blk: { | ||
| 168 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 169 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 170 | var result: [len]CpuFeature = undefined; | ||
| 171 | result[@intFromEnum(Feature.@"16_bit_insts")] = .{ | ||
| 172 | .llvm_name = "16-bit-insts", | ||
| 173 | .description = "Has i16/f16 instructions", | ||
| 174 | .dependencies = featureSet(&[_]Feature{}), | ||
| 175 | }; | ||
| 176 | result[@intFromEnum(Feature.a16)] = .{ | ||
| 177 | .llvm_name = "a16", | ||
| 178 | .description = "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands", | ||
| 179 | .dependencies = featureSet(&[_]Feature{}), | ||
| 180 | }; | ||
| 181 | result[@intFromEnum(Feature.add_no_carry_insts)] = .{ | ||
| 182 | .llvm_name = "add-no-carry-insts", | ||
| 183 | .description = "Have VALU add/sub instructions without carry out", | ||
| 184 | .dependencies = featureSet(&[_]Feature{}), | ||
| 185 | }; | ||
| 186 | result[@intFromEnum(Feature.aperture_regs)] = .{ | ||
| 187 | .llvm_name = "aperture-regs", | ||
| 188 | .description = "Has Memory Aperture Base and Size Registers", | ||
| 189 | .dependencies = featureSet(&[_]Feature{}), | ||
| 190 | }; | ||
| 191 | result[@intFromEnum(Feature.architected_flat_scratch)] = .{ | ||
| 192 | .llvm_name = "architected-flat-scratch", | ||
| 193 | .description = "Flat Scratch register is a readonly SPI initialized architected register", | ||
| 194 | .dependencies = featureSet(&[_]Feature{}), | ||
| 195 | }; | ||
| 196 | result[@intFromEnum(Feature.architected_sgprs)] = .{ | ||
| 197 | .llvm_name = "architected-sgprs", | ||
| 198 | .description = "Enable the architected SGPRs", | ||
| 199 | .dependencies = featureSet(&[_]Feature{}), | ||
| 200 | }; | ||
| 201 | result[@intFromEnum(Feature.atomic_buffer_global_pk_add_f16_insts)] = .{ | ||
| 202 | .llvm_name = "atomic-buffer-global-pk-add-f16-insts", | ||
| 203 | .description = "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that can return original value", | ||
| 204 | .dependencies = featureSet(&[_]Feature{ | ||
| 205 | .flat_global_insts, | ||
| 206 | }), | ||
| 207 | }; | ||
| 208 | result[@intFromEnum(Feature.atomic_buffer_global_pk_add_f16_no_rtn_insts)] = .{ | ||
| 209 | .llvm_name = "atomic-buffer-global-pk-add-f16-no-rtn-insts", | ||
| 210 | .description = "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that don't return original value", | ||
| 211 | .dependencies = featureSet(&[_]Feature{ | ||
| 212 | .flat_global_insts, | ||
| 213 | }), | ||
| 214 | }; | ||
| 215 | result[@intFromEnum(Feature.atomic_ds_pk_add_16_insts)] = .{ | ||
| 216 | .llvm_name = "atomic-ds-pk-add-16-insts", | ||
| 217 | .description = "Has ds_pk_add_bf16, ds_pk_add_f16, ds_pk_add_rtn_bf16, ds_pk_add_rtn_f16 instructions", | ||
| 218 | .dependencies = featureSet(&[_]Feature{}), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.atomic_fadd_no_rtn_insts)] = .{ | ||
| 221 | .llvm_name = "atomic-fadd-no-rtn-insts", | ||
| 222 | .description = "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that don't return original value", | ||
| 223 | .dependencies = featureSet(&[_]Feature{ | ||
| 224 | .flat_global_insts, | ||
| 225 | }), | ||
| 226 | }; | ||
| 227 | result[@intFromEnum(Feature.atomic_fadd_rtn_insts)] = .{ | ||
| 228 | .llvm_name = "atomic-fadd-rtn-insts", | ||
| 229 | .description = "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that return original value", | ||
| 230 | .dependencies = featureSet(&[_]Feature{ | ||
| 231 | .flat_global_insts, | ||
| 232 | }), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.atomic_flat_pk_add_16_insts)] = .{ | ||
| 235 | .llvm_name = "atomic-flat-pk-add-16-insts", | ||
| 236 | .description = "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions", | ||
| 237 | .dependencies = featureSet(&[_]Feature{}), | ||
| 238 | }; | ||
| 239 | result[@intFromEnum(Feature.atomic_global_pk_add_bf16_inst)] = .{ | ||
| 240 | .llvm_name = "atomic-global-pk-add-bf16-inst", | ||
| 241 | .description = "Has global_atomic_pk_add_bf16 instruction", | ||
| 242 | .dependencies = featureSet(&[_]Feature{ | ||
| 243 | .flat_global_insts, | ||
| 244 | }), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.auto_waitcnt_before_barrier)] = .{ | ||
| 247 | .llvm_name = "auto-waitcnt-before-barrier", | ||
| 248 | .description = "Hardware automatically inserts waitcnt before barrier", | ||
| 249 | .dependencies = featureSet(&[_]Feature{}), | ||
| 250 | }; | ||
| 251 | result[@intFromEnum(Feature.back_off_barrier)] = .{ | ||
| 252 | .llvm_name = "back-off-barrier", | ||
| 253 | .description = "Hardware supports backing off s_barrier if an exception occurs", | ||
| 254 | .dependencies = featureSet(&[_]Feature{}), | ||
| 255 | }; | ||
| 256 | result[@intFromEnum(Feature.ci_insts)] = .{ | ||
| 257 | .llvm_name = "ci-insts", | ||
| 258 | .description = "Additional instructions for CI+", | ||
| 259 | .dependencies = featureSet(&[_]Feature{}), | ||
| 260 | }; | ||
| 261 | result[@intFromEnum(Feature.cumode)] = .{ | ||
| 262 | .llvm_name = "cumode", | ||
| 263 | .description = "Enable CU wavefront execution mode", | ||
| 264 | .dependencies = featureSet(&[_]Feature{}), | ||
| 265 | }; | ||
| 266 | result[@intFromEnum(Feature.dl_insts)] = .{ | ||
| 267 | .llvm_name = "dl-insts", | ||
| 268 | .description = "Has v_fmac_f32 and v_xnor_b32 instructions", | ||
| 269 | .dependencies = featureSet(&[_]Feature{}), | ||
| 270 | }; | ||
| 271 | result[@intFromEnum(Feature.dot10_insts)] = .{ | ||
| 272 | .llvm_name = "dot10-insts", | ||
| 273 | .description = "Has v_dot2_f32_f16 instruction", | ||
| 274 | .dependencies = featureSet(&[_]Feature{}), | ||
| 275 | }; | ||
| 276 | result[@intFromEnum(Feature.dot1_insts)] = .{ | ||
| 277 | .llvm_name = "dot1-insts", | ||
| 278 | .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", | ||
| 279 | .dependencies = featureSet(&[_]Feature{}), | ||
| 280 | }; | ||
| 281 | result[@intFromEnum(Feature.dot2_insts)] = .{ | ||
| 282 | .llvm_name = "dot2-insts", | ||
| 283 | .description = "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions", | ||
| 284 | .dependencies = featureSet(&[_]Feature{}), | ||
| 285 | }; | ||
| 286 | result[@intFromEnum(Feature.dot3_insts)] = .{ | ||
| 287 | .llvm_name = "dot3-insts", | ||
| 288 | .description = "Has v_dot8c_i32_i4 instruction", | ||
| 289 | .dependencies = featureSet(&[_]Feature{}), | ||
| 290 | }; | ||
| 291 | result[@intFromEnum(Feature.dot4_insts)] = .{ | ||
| 292 | .llvm_name = "dot4-insts", | ||
| 293 | .description = "Has v_dot2c_i32_i16 instruction", | ||
| 294 | .dependencies = featureSet(&[_]Feature{}), | ||
| 295 | }; | ||
| 296 | result[@intFromEnum(Feature.dot5_insts)] = .{ | ||
| 297 | .llvm_name = "dot5-insts", | ||
| 298 | .description = "Has v_dot2c_f32_f16 instruction", | ||
| 299 | .dependencies = featureSet(&[_]Feature{}), | ||
| 300 | }; | ||
| 301 | result[@intFromEnum(Feature.dot6_insts)] = .{ | ||
| 302 | .llvm_name = "dot6-insts", | ||
| 303 | .description = "Has v_dot4c_i32_i8 instruction", | ||
| 304 | .dependencies = featureSet(&[_]Feature{}), | ||
| 305 | }; | ||
| 306 | result[@intFromEnum(Feature.dot7_insts)] = .{ | ||
| 307 | .llvm_name = "dot7-insts", | ||
| 308 | .description = "Has v_dot4_u32_u8, v_dot8_u32_u4 instructions", | ||
| 309 | .dependencies = featureSet(&[_]Feature{}), | ||
| 310 | }; | ||
| 311 | result[@intFromEnum(Feature.dot8_insts)] = .{ | ||
| 312 | .llvm_name = "dot8-insts", | ||
| 313 | .description = "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions", | ||
| 314 | .dependencies = featureSet(&[_]Feature{}), | ||
| 315 | }; | ||
| 316 | result[@intFromEnum(Feature.dot9_insts)] = .{ | ||
| 317 | .llvm_name = "dot9-insts", | ||
| 318 | .description = "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16 instructions", | ||
| 319 | .dependencies = featureSet(&[_]Feature{}), | ||
| 320 | }; | ||
| 321 | result[@intFromEnum(Feature.dpp)] = .{ | ||
| 322 | .llvm_name = "dpp", | ||
| 323 | .description = "Support DPP (Data Parallel Primitives) extension", | ||
| 324 | .dependencies = featureSet(&[_]Feature{}), | ||
| 325 | }; | ||
| 326 | result[@intFromEnum(Feature.dpp8)] = .{ | ||
| 327 | .llvm_name = "dpp8", | ||
| 328 | .description = "Support DPP8 (Data Parallel Primitives) extension", | ||
| 329 | .dependencies = featureSet(&[_]Feature{}), | ||
| 330 | }; | ||
| 331 | result[@intFromEnum(Feature.dpp_64bit)] = .{ | ||
| 332 | .llvm_name = "dpp-64bit", | ||
| 333 | .description = "Support DPP (Data Parallel Primitives) extension", | ||
| 334 | .dependencies = featureSet(&[_]Feature{}), | ||
| 335 | }; | ||
| 336 | result[@intFromEnum(Feature.ds128)] = .{ | ||
| 337 | .llvm_name = "enable-ds128", | ||
| 338 | .description = "Use ds_{read|write}_b128", | ||
| 339 | .dependencies = featureSet(&[_]Feature{}), | ||
| 340 | }; | ||
| 341 | result[@intFromEnum(Feature.ds_src2_insts)] = .{ | ||
| 342 | .llvm_name = "ds-src2-insts", | ||
| 343 | .description = "Has ds_*_src2 instructions", | ||
| 344 | .dependencies = featureSet(&[_]Feature{}), | ||
| 345 | }; | ||
| 346 | result[@intFromEnum(Feature.extended_image_insts)] = .{ | ||
| 347 | .llvm_name = "extended-image-insts", | ||
| 348 | .description = "Support mips != 0, lod != 0, gather4, and get_lod", | ||
| 349 | .dependencies = featureSet(&[_]Feature{}), | ||
| 350 | }; | ||
| 351 | result[@intFromEnum(Feature.fast_denormal_f32)] = .{ | ||
| 352 | .llvm_name = "fast-denormal-f32", | ||
| 353 | .description = "Enabling denormals does not cause f32 instructions to run at f64 rates", | ||
| 354 | .dependencies = featureSet(&[_]Feature{}), | ||
| 355 | }; | ||
| 356 | result[@intFromEnum(Feature.fast_fmaf)] = .{ | ||
| 357 | .llvm_name = "fast-fmaf", | ||
| 358 | .description = "Assuming f32 fma is at least as fast as mul + add", | ||
| 359 | .dependencies = featureSet(&[_]Feature{}), | ||
| 360 | }; | ||
| 361 | result[@intFromEnum(Feature.flat_address_space)] = .{ | ||
| 362 | .llvm_name = "flat-address-space", | ||
| 363 | .description = "Support flat address space", | ||
| 364 | .dependencies = featureSet(&[_]Feature{}), | ||
| 365 | }; | ||
| 366 | result[@intFromEnum(Feature.flat_atomic_fadd_f32_inst)] = .{ | ||
| 367 | .llvm_name = "flat-atomic-fadd-f32-inst", | ||
| 368 | .description = "Has flat_atomic_add_f32 instruction", | ||
| 369 | .dependencies = featureSet(&[_]Feature{}), | ||
| 370 | }; | ||
| 371 | result[@intFromEnum(Feature.flat_for_global)] = .{ | ||
| 372 | .llvm_name = "flat-for-global", | ||
| 373 | .description = "Force to generate flat instruction for global", | ||
| 374 | .dependencies = featureSet(&[_]Feature{}), | ||
| 375 | }; | ||
| 376 | result[@intFromEnum(Feature.flat_global_insts)] = .{ | ||
| 377 | .llvm_name = "flat-global-insts", | ||
| 378 | .description = "Have global_* flat memory instructions", | ||
| 379 | .dependencies = featureSet(&[_]Feature{}), | ||
| 380 | }; | ||
| 381 | result[@intFromEnum(Feature.flat_inst_offsets)] = .{ | ||
| 382 | .llvm_name = "flat-inst-offsets", | ||
| 383 | .description = "Flat instructions have immediate offset addressing mode", | ||
| 384 | .dependencies = featureSet(&[_]Feature{}), | ||
| 385 | }; | ||
| 386 | result[@intFromEnum(Feature.flat_scratch)] = .{ | ||
| 387 | .llvm_name = "enable-flat-scratch", | ||
| 388 | .description = "Use scratch_* flat memory instructions to access scratch", | ||
| 389 | .dependencies = featureSet(&[_]Feature{}), | ||
| 390 | }; | ||
| 391 | result[@intFromEnum(Feature.flat_scratch_insts)] = .{ | ||
| 392 | .llvm_name = "flat-scratch-insts", | ||
| 393 | .description = "Have scratch_* flat memory instructions", | ||
| 394 | .dependencies = featureSet(&[_]Feature{}), | ||
| 395 | }; | ||
| 396 | result[@intFromEnum(Feature.flat_segment_offset_bug)] = .{ | ||
| 397 | .llvm_name = "flat-segment-offset-bug", | ||
| 398 | .description = "GFX10 bug where inst_offset is ignored when flat instructions access global memory", | ||
| 399 | .dependencies = featureSet(&[_]Feature{}), | ||
| 400 | }; | ||
| 401 | result[@intFromEnum(Feature.fma_mix_insts)] = .{ | ||
| 402 | .llvm_name = "fma-mix-insts", | ||
| 403 | .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", | ||
| 404 | .dependencies = featureSet(&[_]Feature{}), | ||
| 405 | }; | ||
| 406 | result[@intFromEnum(Feature.fmacf64_inst)] = .{ | ||
| 407 | .llvm_name = "fmacf64-inst", | ||
| 408 | .description = "Has v_fmac_f64 instruction", | ||
| 409 | .dependencies = featureSet(&[_]Feature{}), | ||
| 410 | }; | ||
| 411 | result[@intFromEnum(Feature.fmaf)] = .{ | ||
| 412 | .llvm_name = "fmaf", | ||
| 413 | .description = "Enable single precision FMA (not as fast as mul+add, but fused)", | ||
| 414 | .dependencies = featureSet(&[_]Feature{}), | ||
| 415 | }; | ||
| 416 | result[@intFromEnum(Feature.force_store_sc0_sc1)] = .{ | ||
| 417 | .llvm_name = "force-store-sc0-sc1", | ||
| 418 | .description = "Has SC0 and SC1 on stores", | ||
| 419 | .dependencies = featureSet(&[_]Feature{}), | ||
| 420 | }; | ||
| 421 | result[@intFromEnum(Feature.fp64)] = .{ | ||
| 422 | .llvm_name = "fp64", | ||
| 423 | .description = "Enable double precision operations", | ||
| 424 | .dependencies = featureSet(&[_]Feature{}), | ||
| 425 | }; | ||
| 426 | result[@intFromEnum(Feature.fp8_insts)] = .{ | ||
| 427 | .llvm_name = "fp8-insts", | ||
| 428 | .description = "Has fp8 and bf8 instructions", | ||
| 429 | .dependencies = featureSet(&[_]Feature{}), | ||
| 430 | }; | ||
| 431 | result[@intFromEnum(Feature.full_rate_64_ops)] = .{ | ||
| 432 | .llvm_name = "full-rate-64-ops", | ||
| 433 | .description = "Most fp64 instructions are full rate", | ||
| 434 | .dependencies = featureSet(&[_]Feature{}), | ||
| 435 | }; | ||
| 436 | result[@intFromEnum(Feature.g16)] = .{ | ||
| 437 | .llvm_name = "g16", | ||
| 438 | .description = "Support G16 for 16-bit gradient image operands", | ||
| 439 | .dependencies = featureSet(&[_]Feature{}), | ||
| 440 | }; | ||
| 441 | result[@intFromEnum(Feature.gcn3_encoding)] = .{ | ||
| 442 | .llvm_name = "gcn3-encoding", | ||
| 443 | .description = "Encoding format for VI", | ||
| 444 | .dependencies = featureSet(&[_]Feature{}), | ||
| 445 | }; | ||
| 446 | result[@intFromEnum(Feature.get_wave_id_inst)] = .{ | ||
| 447 | .llvm_name = "get-wave-id-inst", | ||
| 448 | .description = "Has s_get_waveid_in_workgroup instruction", | ||
| 449 | .dependencies = featureSet(&[_]Feature{}), | ||
| 450 | }; | ||
| 451 | result[@intFromEnum(Feature.gfx10)] = .{ | ||
| 452 | .llvm_name = "gfx10", | ||
| 453 | .description = "GFX10 GPU generation", | ||
| 454 | .dependencies = featureSet(&[_]Feature{ | ||
| 455 | .@"16_bit_insts", | ||
| 456 | .a16, | ||
| 457 | .add_no_carry_insts, | ||
| 458 | .aperture_regs, | ||
| 459 | .ci_insts, | ||
| 460 | .dpp, | ||
| 461 | .dpp8, | ||
| 462 | .extended_image_insts, | ||
| 463 | .fast_denormal_f32, | ||
| 464 | .fast_fmaf, | ||
| 465 | .flat_address_space, | ||
| 466 | .flat_global_insts, | ||
| 467 | .flat_inst_offsets, | ||
| 468 | .flat_scratch_insts, | ||
| 469 | .fma_mix_insts, | ||
| 470 | .fp64, | ||
| 471 | .g16, | ||
| 472 | .gfx10_insts, | ||
| 473 | .gfx8_insts, | ||
| 474 | .gfx9_insts, | ||
| 475 | .image_insts, | ||
| 476 | .int_clamp_insts, | ||
| 477 | .inv_2pi_inline_imm, | ||
| 478 | .localmemorysize65536, | ||
| 479 | .mimg_r128, | ||
| 480 | .movrel, | ||
| 481 | .no_data_dep_hazard, | ||
| 482 | .no_sdst_cmpx, | ||
| 483 | .pk_fmac_f16_inst, | ||
| 484 | .s_memrealtime, | ||
| 485 | .s_memtime_inst, | ||
| 486 | .sdwa, | ||
| 487 | .sdwa_omod, | ||
| 488 | .sdwa_scalar, | ||
| 489 | .sdwa_sdst, | ||
| 490 | .unaligned_buffer_access, | ||
| 491 | .unaligned_ds_access, | ||
| 492 | .vop3_literal, | ||
| 493 | .vop3p, | ||
| 494 | .vscnt, | ||
| 495 | }), | ||
| 496 | }; | ||
| 497 | result[@intFromEnum(Feature.gfx10_3_insts)] = .{ | ||
| 498 | .llvm_name = "gfx10-3-insts", | ||
| 499 | .description = "Additional instructions for GFX10.3", | ||
| 500 | .dependencies = featureSet(&[_]Feature{}), | ||
| 501 | }; | ||
| 502 | result[@intFromEnum(Feature.gfx10_a_encoding)] = .{ | ||
| 503 | .llvm_name = "gfx10_a-encoding", | ||
| 504 | .description = "Has BVH ray tracing instructions", | ||
| 505 | .dependencies = featureSet(&[_]Feature{}), | ||
| 506 | }; | ||
| 507 | result[@intFromEnum(Feature.gfx10_b_encoding)] = .{ | ||
| 508 | .llvm_name = "gfx10_b-encoding", | ||
| 509 | .description = "Encoding format GFX10_B", | ||
| 510 | .dependencies = featureSet(&[_]Feature{}), | ||
| 511 | }; | ||
| 512 | result[@intFromEnum(Feature.gfx10_insts)] = .{ | ||
| 513 | .llvm_name = "gfx10-insts", | ||
| 514 | .description = "Additional instructions for GFX10+", | ||
| 515 | .dependencies = featureSet(&[_]Feature{}), | ||
| 516 | }; | ||
| 517 | result[@intFromEnum(Feature.gfx11)] = .{ | ||
| 518 | .llvm_name = "gfx11", | ||
| 519 | .description = "GFX11 GPU generation", | ||
| 520 | .dependencies = featureSet(&[_]Feature{ | ||
| 521 | .@"16_bit_insts", | ||
| 522 | .a16, | ||
| 523 | .add_no_carry_insts, | ||
| 524 | .aperture_regs, | ||
| 525 | .ci_insts, | ||
| 526 | .dpp, | ||
| 527 | .dpp8, | ||
| 528 | .extended_image_insts, | ||
| 529 | .fast_denormal_f32, | ||
| 530 | .fast_fmaf, | ||
| 531 | .flat_address_space, | ||
| 532 | .flat_global_insts, | ||
| 533 | .flat_inst_offsets, | ||
| 534 | .flat_scratch_insts, | ||
| 535 | .fma_mix_insts, | ||
| 536 | .fp64, | ||
| 537 | .g16, | ||
| 538 | .gfx10_3_insts, | ||
| 539 | .gfx10_a_encoding, | ||
| 540 | .gfx10_b_encoding, | ||
| 541 | .gfx10_insts, | ||
| 542 | .gfx11_insts, | ||
| 543 | .gfx8_insts, | ||
| 544 | .gfx9_insts, | ||
| 545 | .int_clamp_insts, | ||
| 546 | .inv_2pi_inline_imm, | ||
| 547 | .localmemorysize65536, | ||
| 548 | .mimg_r128, | ||
| 549 | .movrel, | ||
| 550 | .no_data_dep_hazard, | ||
| 551 | .no_sdst_cmpx, | ||
| 552 | .pk_fmac_f16_inst, | ||
| 553 | .true16, | ||
| 554 | .unaligned_buffer_access, | ||
| 555 | .unaligned_ds_access, | ||
| 556 | .vop3_literal, | ||
| 557 | .vop3p, | ||
| 558 | .vopd, | ||
| 559 | .vscnt, | ||
| 560 | }), | ||
| 561 | }; | ||
| 562 | result[@intFromEnum(Feature.gfx11_full_vgprs)] = .{ | ||
| 563 | .llvm_name = "gfx11-full-vgprs", | ||
| 564 | .description = "GFX11 with 50% more physical VGPRs and 50% larger allocation granule than GFX10", | ||
| 565 | .dependencies = featureSet(&[_]Feature{}), | ||
| 566 | }; | ||
| 567 | result[@intFromEnum(Feature.gfx11_insts)] = .{ | ||
| 568 | .llvm_name = "gfx11-insts", | ||
| 569 | .description = "Additional instructions for GFX11+", | ||
| 570 | .dependencies = featureSet(&[_]Feature{}), | ||
| 571 | }; | ||
| 572 | result[@intFromEnum(Feature.gfx7_gfx8_gfx9_insts)] = .{ | ||
| 573 | .llvm_name = "gfx7-gfx8-gfx9-insts", | ||
| 574 | .description = "Instructions shared in GFX7, GFX8, GFX9", | ||
| 575 | .dependencies = featureSet(&[_]Feature{}), | ||
| 576 | }; | ||
| 577 | result[@intFromEnum(Feature.gfx8_insts)] = .{ | ||
| 578 | .llvm_name = "gfx8-insts", | ||
| 579 | .description = "Additional instructions for GFX8+", | ||
| 580 | .dependencies = featureSet(&[_]Feature{}), | ||
| 581 | }; | ||
| 582 | result[@intFromEnum(Feature.gfx9)] = .{ | ||
| 583 | .llvm_name = "gfx9", | ||
| 584 | .description = "GFX9 GPU generation", | ||
| 585 | .dependencies = featureSet(&[_]Feature{ | ||
| 586 | .@"16_bit_insts", | ||
| 587 | .a16, | ||
| 588 | .add_no_carry_insts, | ||
| 589 | .aperture_regs, | ||
| 590 | .ci_insts, | ||
| 591 | .dpp, | ||
| 592 | .fast_denormal_f32, | ||
| 593 | .fast_fmaf, | ||
| 594 | .flat_address_space, | ||
| 595 | .flat_global_insts, | ||
| 596 | .flat_inst_offsets, | ||
| 597 | .flat_scratch_insts, | ||
| 598 | .fp64, | ||
| 599 | .gcn3_encoding, | ||
| 600 | .gfx7_gfx8_gfx9_insts, | ||
| 601 | .gfx8_insts, | ||
| 602 | .gfx9_insts, | ||
| 603 | .int_clamp_insts, | ||
| 604 | .inv_2pi_inline_imm, | ||
| 605 | .localmemorysize65536, | ||
| 606 | .negative_scratch_offset_bug, | ||
| 607 | .r128_a16, | ||
| 608 | .s_memrealtime, | ||
| 609 | .s_memtime_inst, | ||
| 610 | .scalar_atomics, | ||
| 611 | .scalar_flat_scratch_insts, | ||
| 612 | .scalar_stores, | ||
| 613 | .sdwa, | ||
| 614 | .sdwa_omod, | ||
| 615 | .sdwa_scalar, | ||
| 616 | .sdwa_sdst, | ||
| 617 | .unaligned_buffer_access, | ||
| 618 | .unaligned_ds_access, | ||
| 619 | .vgpr_index_mode, | ||
| 620 | .vop3p, | ||
| 621 | .wavefrontsize64, | ||
| 622 | .xnack_support, | ||
| 623 | }), | ||
| 624 | }; | ||
| 625 | result[@intFromEnum(Feature.gfx90a_insts)] = .{ | ||
| 626 | .llvm_name = "gfx90a-insts", | ||
| 627 | .description = "Additional instructions for GFX90A+", | ||
| 628 | .dependencies = featureSet(&[_]Feature{}), | ||
| 629 | }; | ||
| 630 | result[@intFromEnum(Feature.gfx940_insts)] = .{ | ||
| 631 | .llvm_name = "gfx940-insts", | ||
| 632 | .description = "Additional instructions for GFX940+", | ||
| 633 | .dependencies = featureSet(&[_]Feature{}), | ||
| 634 | }; | ||
| 635 | result[@intFromEnum(Feature.gfx9_insts)] = .{ | ||
| 636 | .llvm_name = "gfx9-insts", | ||
| 637 | .description = "Additional instructions for GFX9+", | ||
| 638 | .dependencies = featureSet(&[_]Feature{}), | ||
| 639 | }; | ||
| 640 | result[@intFromEnum(Feature.half_rate_64_ops)] = .{ | ||
| 641 | .llvm_name = "half-rate-64-ops", | ||
| 642 | .description = "Most fp64 instructions are half rate instead of quarter", | ||
| 643 | .dependencies = featureSet(&[_]Feature{}), | ||
| 644 | }; | ||
| 645 | result[@intFromEnum(Feature.image_gather4_d16_bug)] = .{ | ||
| 646 | .llvm_name = "image-gather4-d16-bug", | ||
| 647 | .description = "Image Gather4 D16 hardware bug", | ||
| 648 | .dependencies = featureSet(&[_]Feature{}), | ||
| 649 | }; | ||
| 650 | result[@intFromEnum(Feature.image_insts)] = .{ | ||
| 651 | .llvm_name = "image-insts", | ||
| 652 | .description = "Support image instructions", | ||
| 653 | .dependencies = featureSet(&[_]Feature{}), | ||
| 654 | }; | ||
| 655 | result[@intFromEnum(Feature.image_store_d16_bug)] = .{ | ||
| 656 | .llvm_name = "image-store-d16-bug", | ||
| 657 | .description = "Image Store D16 hardware bug", | ||
| 658 | .dependencies = featureSet(&[_]Feature{}), | ||
| 659 | }; | ||
| 660 | result[@intFromEnum(Feature.inst_fwd_prefetch_bug)] = .{ | ||
| 661 | .llvm_name = "inst-fwd-prefetch-bug", | ||
| 662 | .description = "S_INST_PREFETCH instruction causes shader to hang", | ||
| 663 | .dependencies = featureSet(&[_]Feature{}), | ||
| 664 | }; | ||
| 665 | result[@intFromEnum(Feature.int_clamp_insts)] = .{ | ||
| 666 | .llvm_name = "int-clamp-insts", | ||
| 667 | .description = "Support clamp for integer destination", | ||
| 668 | .dependencies = featureSet(&[_]Feature{}), | ||
| 669 | }; | ||
| 670 | result[@intFromEnum(Feature.inv_2pi_inline_imm)] = .{ | ||
| 671 | .llvm_name = "inv-2pi-inline-imm", | ||
| 672 | .description = "Has 1 / (2 * pi) as inline immediate", | ||
| 673 | .dependencies = featureSet(&[_]Feature{}), | ||
| 674 | }; | ||
| 675 | result[@intFromEnum(Feature.lds_branch_vmem_war_hazard)] = .{ | ||
| 676 | .llvm_name = "lds-branch-vmem-war-hazard", | ||
| 677 | .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", | ||
| 678 | .dependencies = featureSet(&[_]Feature{}), | ||
| 679 | }; | ||
| 680 | result[@intFromEnum(Feature.lds_misaligned_bug)] = .{ | ||
| 681 | .llvm_name = "lds-misaligned-bug", | ||
| 682 | .description = "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode", | ||
| 683 | .dependencies = featureSet(&[_]Feature{}), | ||
| 684 | }; | ||
| 685 | result[@intFromEnum(Feature.ldsbankcount16)] = .{ | ||
| 686 | .llvm_name = "ldsbankcount16", | ||
| 687 | .description = "The number of LDS banks per compute unit.", | ||
| 688 | .dependencies = featureSet(&[_]Feature{}), | ||
| 689 | }; | ||
| 690 | result[@intFromEnum(Feature.ldsbankcount32)] = .{ | ||
| 691 | .llvm_name = "ldsbankcount32", | ||
| 692 | .description = "The number of LDS banks per compute unit.", | ||
| 693 | .dependencies = featureSet(&[_]Feature{}), | ||
| 694 | }; | ||
| 695 | result[@intFromEnum(Feature.load_store_opt)] = .{ | ||
| 696 | .llvm_name = "load-store-opt", | ||
| 697 | .description = "Enable SI load/store optimizer pass", | ||
| 698 | .dependencies = featureSet(&[_]Feature{}), | ||
| 699 | }; | ||
| 700 | result[@intFromEnum(Feature.localmemorysize32768)] = .{ | ||
| 701 | .llvm_name = "localmemorysize32768", | ||
| 702 | .description = "The size of local memory in bytes", | ||
| 703 | .dependencies = featureSet(&[_]Feature{}), | ||
| 704 | }; | ||
| 705 | result[@intFromEnum(Feature.localmemorysize65536)] = .{ | ||
| 706 | .llvm_name = "localmemorysize65536", | ||
| 707 | .description = "The size of local memory in bytes", | ||
| 708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.mad_intra_fwd_bug)] = .{ | ||
| 711 | .llvm_name = "mad-intra-fwd-bug", | ||
| 712 | .description = "MAD_U64/I64 intra instruction forwarding bug", | ||
| 713 | .dependencies = featureSet(&[_]Feature{}), | ||
| 714 | }; | ||
| 715 | result[@intFromEnum(Feature.mad_mac_f32_insts)] = .{ | ||
| 716 | .llvm_name = "mad-mac-f32-insts", | ||
| 717 | .description = "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions", | ||
| 718 | .dependencies = featureSet(&[_]Feature{}), | ||
| 719 | }; | ||
| 720 | result[@intFromEnum(Feature.mad_mix_insts)] = .{ | ||
| 721 | .llvm_name = "mad-mix-insts", | ||
| 722 | .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", | ||
| 723 | .dependencies = featureSet(&[_]Feature{}), | ||
| 724 | }; | ||
| 725 | result[@intFromEnum(Feature.mai_insts)] = .{ | ||
| 726 | .llvm_name = "mai-insts", | ||
| 727 | .description = "Has mAI instructions", | ||
| 728 | .dependencies = featureSet(&[_]Feature{}), | ||
| 729 | }; | ||
| 730 | result[@intFromEnum(Feature.max_private_element_size_16)] = .{ | ||
| 731 | .llvm_name = "max-private-element-size-16", | ||
| 732 | .description = "Maximum private access size may be 16", | ||
| 733 | .dependencies = featureSet(&[_]Feature{}), | ||
| 734 | }; | ||
| 735 | result[@intFromEnum(Feature.max_private_element_size_4)] = .{ | ||
| 736 | .llvm_name = "max-private-element-size-4", | ||
| 737 | .description = "Maximum private access size may be 4", | ||
| 738 | .dependencies = featureSet(&[_]Feature{}), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.max_private_element_size_8)] = .{ | ||
| 741 | .llvm_name = "max-private-element-size-8", | ||
| 742 | .description = "Maximum private access size may be 8", | ||
| 743 | .dependencies = featureSet(&[_]Feature{}), | ||
| 744 | }; | ||
| 745 | result[@intFromEnum(Feature.mfma_inline_literal_bug)] = .{ | ||
| 746 | .llvm_name = "mfma-inline-literal-bug", | ||
| 747 | .description = "MFMA cannot use inline literal as SrcC", | ||
| 748 | .dependencies = featureSet(&[_]Feature{}), | ||
| 749 | }; | ||
| 750 | result[@intFromEnum(Feature.mimg_r128)] = .{ | ||
| 751 | .llvm_name = "mimg-r128", | ||
| 752 | .description = "Support 128-bit texture resources", | ||
| 753 | .dependencies = featureSet(&[_]Feature{}), | ||
| 754 | }; | ||
| 755 | result[@intFromEnum(Feature.movrel)] = .{ | ||
| 756 | .llvm_name = "movrel", | ||
| 757 | .description = "Has v_movrel*_b32 instructions", | ||
| 758 | .dependencies = featureSet(&[_]Feature{}), | ||
| 759 | }; | ||
| 760 | result[@intFromEnum(Feature.negative_scratch_offset_bug)] = .{ | ||
| 761 | .llvm_name = "negative-scratch-offset-bug", | ||
| 762 | .description = "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9", | ||
| 763 | .dependencies = featureSet(&[_]Feature{}), | ||
| 764 | }; | ||
| 765 | result[@intFromEnum(Feature.negative_unaligned_scratch_offset_bug)] = .{ | ||
| 766 | .llvm_name = "negative-unaligned-scratch-offset-bug", | ||
| 767 | .description = "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10", | ||
| 768 | .dependencies = featureSet(&[_]Feature{}), | ||
| 769 | }; | ||
| 770 | result[@intFromEnum(Feature.no_data_dep_hazard)] = .{ | ||
| 771 | .llvm_name = "no-data-dep-hazard", | ||
| 772 | .description = "Does not need SW waitstates", | ||
| 773 | .dependencies = featureSet(&[_]Feature{}), | ||
| 774 | }; | ||
| 775 | result[@intFromEnum(Feature.no_sdst_cmpx)] = .{ | ||
| 776 | .llvm_name = "no-sdst-cmpx", | ||
| 777 | .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", | ||
| 778 | .dependencies = featureSet(&[_]Feature{}), | ||
| 779 | }; | ||
| 780 | result[@intFromEnum(Feature.nsa_clause_bug)] = .{ | ||
| 781 | .llvm_name = "nsa-clause-bug", | ||
| 782 | .description = "MIMG-NSA in a hard clause has unpredictable results on GFX10.1", | ||
| 783 | .dependencies = featureSet(&[_]Feature{}), | ||
| 784 | }; | ||
| 785 | result[@intFromEnum(Feature.nsa_encoding)] = .{ | ||
| 786 | .llvm_name = "nsa-encoding", | ||
| 787 | .description = "Support NSA encoding for image instructions", | ||
| 788 | .dependencies = featureSet(&[_]Feature{}), | ||
| 789 | }; | ||
| 790 | result[@intFromEnum(Feature.nsa_to_vmem_bug)] = .{ | ||
| 791 | .llvm_name = "nsa-to-vmem-bug", | ||
| 792 | .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", | ||
| 793 | .dependencies = featureSet(&[_]Feature{}), | ||
| 794 | }; | ||
| 795 | result[@intFromEnum(Feature.offset_3f_bug)] = .{ | ||
| 796 | .llvm_name = "offset-3f-bug", | ||
| 797 | .description = "Branch offset of 3f hardware bug", | ||
| 798 | .dependencies = featureSet(&[_]Feature{}), | ||
| 799 | }; | ||
| 800 | result[@intFromEnum(Feature.packed_fp32_ops)] = .{ | ||
| 801 | .llvm_name = "packed-fp32-ops", | ||
| 802 | .description = "Support packed fp32 instructions", | ||
| 803 | .dependencies = featureSet(&[_]Feature{}), | ||
| 804 | }; | ||
| 805 | result[@intFromEnum(Feature.packed_tid)] = .{ | ||
| 806 | .llvm_name = "packed-tid", | ||
| 807 | .description = "Workitem IDs are packed into v0 at kernel launch", | ||
| 808 | .dependencies = featureSet(&[_]Feature{}), | ||
| 809 | }; | ||
| 810 | result[@intFromEnum(Feature.partial_nsa_encoding)] = .{ | ||
| 811 | .llvm_name = "partial-nsa-encoding", | ||
| 812 | .description = "Support partial NSA encoding for image instructions", | ||
| 813 | .dependencies = featureSet(&[_]Feature{}), | ||
| 814 | }; | ||
| 815 | result[@intFromEnum(Feature.pk_fmac_f16_inst)] = .{ | ||
| 816 | .llvm_name = "pk-fmac-f16-inst", | ||
| 817 | .description = "Has v_pk_fmac_f16 instruction", | ||
| 818 | .dependencies = featureSet(&[_]Feature{}), | ||
| 819 | }; | ||
| 820 | result[@intFromEnum(Feature.promote_alloca)] = .{ | ||
| 821 | .llvm_name = "promote-alloca", | ||
| 822 | .description = "Enable promote alloca pass", | ||
| 823 | .dependencies = featureSet(&[_]Feature{}), | ||
| 824 | }; | ||
| 825 | result[@intFromEnum(Feature.prt_strict_null)] = .{ | ||
| 826 | .llvm_name = "enable-prt-strict-null", | ||
| 827 | .description = "Enable zeroing of result registers for sparse texture fetches", | ||
| 828 | .dependencies = featureSet(&[_]Feature{}), | ||
| 829 | }; | ||
| 830 | result[@intFromEnum(Feature.r128_a16)] = .{ | ||
| 831 | .llvm_name = "r128-a16", | ||
| 832 | .description = "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128", | ||
| 833 | .dependencies = featureSet(&[_]Feature{}), | ||
| 834 | }; | ||
| 835 | result[@intFromEnum(Feature.s_memrealtime)] = .{ | ||
| 836 | .llvm_name = "s-memrealtime", | ||
| 837 | .description = "Has s_memrealtime instruction", | ||
| 838 | .dependencies = featureSet(&[_]Feature{}), | ||
| 839 | }; | ||
| 840 | result[@intFromEnum(Feature.s_memtime_inst)] = .{ | ||
| 841 | .llvm_name = "s-memtime-inst", | ||
| 842 | .description = "Has s_memtime instruction", | ||
| 843 | .dependencies = featureSet(&[_]Feature{}), | ||
| 844 | }; | ||
| 845 | result[@intFromEnum(Feature.scalar_atomics)] = .{ | ||
| 846 | .llvm_name = "scalar-atomics", | ||
| 847 | .description = "Has atomic scalar memory instructions", | ||
| 848 | .dependencies = featureSet(&[_]Feature{}), | ||
| 849 | }; | ||
| 850 | result[@intFromEnum(Feature.scalar_flat_scratch_insts)] = .{ | ||
| 851 | .llvm_name = "scalar-flat-scratch-insts", | ||
| 852 | .description = "Have s_scratch_* flat memory instructions", | ||
| 853 | .dependencies = featureSet(&[_]Feature{}), | ||
| 854 | }; | ||
| 855 | result[@intFromEnum(Feature.scalar_stores)] = .{ | ||
| 856 | .llvm_name = "scalar-stores", | ||
| 857 | .description = "Has store scalar memory instructions", | ||
| 858 | .dependencies = featureSet(&[_]Feature{}), | ||
| 859 | }; | ||
| 860 | result[@intFromEnum(Feature.sdwa)] = .{ | ||
| 861 | .llvm_name = "sdwa", | ||
| 862 | .description = "Support SDWA (Sub-DWORD Addressing) extension", | ||
| 863 | .dependencies = featureSet(&[_]Feature{}), | ||
| 864 | }; | ||
| 865 | result[@intFromEnum(Feature.sdwa_mav)] = .{ | ||
| 866 | .llvm_name = "sdwa-mav", | ||
| 867 | .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", | ||
| 868 | .dependencies = featureSet(&[_]Feature{}), | ||
| 869 | }; | ||
| 870 | result[@intFromEnum(Feature.sdwa_omod)] = .{ | ||
| 871 | .llvm_name = "sdwa-omod", | ||
| 872 | .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", | ||
| 873 | .dependencies = featureSet(&[_]Feature{}), | ||
| 874 | }; | ||
| 875 | result[@intFromEnum(Feature.sdwa_out_mods_vopc)] = .{ | ||
| 876 | .llvm_name = "sdwa-out-mods-vopc", | ||
| 877 | .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", | ||
| 878 | .dependencies = featureSet(&[_]Feature{}), | ||
| 879 | }; | ||
| 880 | result[@intFromEnum(Feature.sdwa_scalar)] = .{ | ||
| 881 | .llvm_name = "sdwa-scalar", | ||
| 882 | .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", | ||
| 883 | .dependencies = featureSet(&[_]Feature{}), | ||
| 884 | }; | ||
| 885 | result[@intFromEnum(Feature.sdwa_sdst)] = .{ | ||
| 886 | .llvm_name = "sdwa-sdst", | ||
| 887 | .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", | ||
| 888 | .dependencies = featureSet(&[_]Feature{}), | ||
| 889 | }; | ||
| 890 | result[@intFromEnum(Feature.sea_islands)] = .{ | ||
| 891 | .llvm_name = "sea-islands", | ||
| 892 | .description = "SEA_ISLANDS GPU generation", | ||
| 893 | .dependencies = featureSet(&[_]Feature{ | ||
| 894 | .ci_insts, | ||
| 895 | .ds_src2_insts, | ||
| 896 | .extended_image_insts, | ||
| 897 | .flat_address_space, | ||
| 898 | .fp64, | ||
| 899 | .gfx7_gfx8_gfx9_insts, | ||
| 900 | .image_insts, | ||
| 901 | .localmemorysize65536, | ||
| 902 | .mad_mac_f32_insts, | ||
| 903 | .mimg_r128, | ||
| 904 | .movrel, | ||
| 905 | .s_memtime_inst, | ||
| 906 | .trig_reduced_range, | ||
| 907 | .unaligned_buffer_access, | ||
| 908 | .wavefrontsize64, | ||
| 909 | }), | ||
| 910 | }; | ||
| 911 | result[@intFromEnum(Feature.sgpr_init_bug)] = .{ | ||
| 912 | .llvm_name = "sgpr-init-bug", | ||
| 913 | .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", | ||
| 914 | .dependencies = featureSet(&[_]Feature{}), | ||
| 915 | }; | ||
| 916 | result[@intFromEnum(Feature.shader_cycles_register)] = .{ | ||
| 917 | .llvm_name = "shader-cycles-register", | ||
| 918 | .description = "Has SHADER_CYCLES hardware register", | ||
| 919 | .dependencies = featureSet(&[_]Feature{}), | ||
| 920 | }; | ||
| 921 | result[@intFromEnum(Feature.si_scheduler)] = .{ | ||
| 922 | .llvm_name = "si-scheduler", | ||
| 923 | .description = "Enable SI Machine Scheduler", | ||
| 924 | .dependencies = featureSet(&[_]Feature{}), | ||
| 925 | }; | ||
| 926 | result[@intFromEnum(Feature.smem_to_vector_write_hazard)] = .{ | ||
| 927 | .llvm_name = "smem-to-vector-write-hazard", | ||
| 928 | .description = "s_load_dword followed by v_cmp page faults", | ||
| 929 | .dependencies = featureSet(&[_]Feature{}), | ||
| 930 | }; | ||
| 931 | result[@intFromEnum(Feature.southern_islands)] = .{ | ||
| 932 | .llvm_name = "southern-islands", | ||
| 933 | .description = "SOUTHERN_ISLANDS GPU generation", | ||
| 934 | .dependencies = featureSet(&[_]Feature{ | ||
| 935 | .ds_src2_insts, | ||
| 936 | .extended_image_insts, | ||
| 937 | .fp64, | ||
| 938 | .image_insts, | ||
| 939 | .ldsbankcount32, | ||
| 940 | .localmemorysize32768, | ||
| 941 | .mad_mac_f32_insts, | ||
| 942 | .mimg_r128, | ||
| 943 | .movrel, | ||
| 944 | .s_memtime_inst, | ||
| 945 | .trig_reduced_range, | ||
| 946 | .wavefrontsize64, | ||
| 947 | }), | ||
| 948 | }; | ||
| 949 | result[@intFromEnum(Feature.sramecc)] = .{ | ||
| 950 | .llvm_name = "sramecc", | ||
| 951 | .description = "Enable SRAMECC", | ||
| 952 | .dependencies = featureSet(&[_]Feature{}), | ||
| 953 | }; | ||
| 954 | result[@intFromEnum(Feature.sramecc_support)] = .{ | ||
| 955 | .llvm_name = "sramecc-support", | ||
| 956 | .description = "Hardware supports SRAMECC", | ||
| 957 | .dependencies = featureSet(&[_]Feature{}), | ||
| 958 | }; | ||
| 959 | result[@intFromEnum(Feature.tgsplit)] = .{ | ||
| 960 | .llvm_name = "tgsplit", | ||
| 961 | .description = "Enable threadgroup split execution", | ||
| 962 | .dependencies = featureSet(&[_]Feature{}), | ||
| 963 | }; | ||
| 964 | result[@intFromEnum(Feature.trap_handler)] = .{ | ||
| 965 | .llvm_name = "trap-handler", | ||
| 966 | .description = "Trap handler support", | ||
| 967 | .dependencies = featureSet(&[_]Feature{}), | ||
| 968 | }; | ||
| 969 | result[@intFromEnum(Feature.trig_reduced_range)] = .{ | ||
| 970 | .llvm_name = "trig-reduced-range", | ||
| 971 | .description = "Requires use of fract on arguments to trig instructions", | ||
| 972 | .dependencies = featureSet(&[_]Feature{}), | ||
| 973 | }; | ||
| 974 | result[@intFromEnum(Feature.true16)] = .{ | ||
| 975 | .llvm_name = "true16", | ||
| 976 | .description = "True 16-bit operand instructions", | ||
| 977 | .dependencies = featureSet(&[_]Feature{}), | ||
| 978 | }; | ||
| 979 | result[@intFromEnum(Feature.unaligned_access_mode)] = .{ | ||
| 980 | .llvm_name = "unaligned-access-mode", | ||
| 981 | .description = "Enable unaligned global, local and region loads and stores if the hardware supports it", | ||
| 982 | .dependencies = featureSet(&[_]Feature{}), | ||
| 983 | }; | ||
| 984 | result[@intFromEnum(Feature.unaligned_buffer_access)] = .{ | ||
| 985 | .llvm_name = "unaligned-buffer-access", | ||
| 986 | .description = "Hardware supports unaligned global loads and stores", | ||
| 987 | .dependencies = featureSet(&[_]Feature{}), | ||
| 988 | }; | ||
| 989 | result[@intFromEnum(Feature.unaligned_ds_access)] = .{ | ||
| 990 | .llvm_name = "unaligned-ds-access", | ||
| 991 | .description = "Hardware supports unaligned local and region loads and stores", | ||
| 992 | .dependencies = featureSet(&[_]Feature{}), | ||
| 993 | }; | ||
| 994 | result[@intFromEnum(Feature.unaligned_scratch_access)] = .{ | ||
| 995 | .llvm_name = "unaligned-scratch-access", | ||
| 996 | .description = "Support unaligned scratch loads and stores", | ||
| 997 | .dependencies = featureSet(&[_]Feature{}), | ||
| 998 | }; | ||
| 999 | result[@intFromEnum(Feature.unpacked_d16_vmem)] = .{ | ||
| 1000 | .llvm_name = "unpacked-d16-vmem", | ||
| 1001 | .description = "Has unpacked d16 vmem instructions", | ||
| 1002 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1003 | }; | ||
| 1004 | result[@intFromEnum(Feature.unsafe_ds_offset_folding)] = .{ | ||
| 1005 | .llvm_name = "unsafe-ds-offset-folding", | ||
| 1006 | .description = "Force using DS instruction immediate offsets on SI", | ||
| 1007 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1008 | }; | ||
| 1009 | result[@intFromEnum(Feature.user_sgpr_init16_bug)] = .{ | ||
| 1010 | .llvm_name = "user-sgpr-init16-bug", | ||
| 1011 | .description = "Bug requiring at least 16 user+system SGPRs to be enabled", | ||
| 1012 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1013 | }; | ||
| 1014 | result[@intFromEnum(Feature.valu_trans_use_hazard)] = .{ | ||
| 1015 | .llvm_name = "valu-trans-use-hazard", | ||
| 1016 | .description = "Hazard when TRANS instructions are closely followed by a use of the result", | ||
| 1017 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1018 | }; | ||
| 1019 | result[@intFromEnum(Feature.vcmpx_exec_war_hazard)] = .{ | ||
| 1020 | .llvm_name = "vcmpx-exec-war-hazard", | ||
| 1021 | .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", | ||
| 1022 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1023 | }; | ||
| 1024 | result[@intFromEnum(Feature.vcmpx_permlane_hazard)] = .{ | ||
| 1025 | .llvm_name = "vcmpx-permlane-hazard", | ||
| 1026 | .description = "TODO: describe me", | ||
| 1027 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1028 | }; | ||
| 1029 | result[@intFromEnum(Feature.vgpr_index_mode)] = .{ | ||
| 1030 | .llvm_name = "vgpr-index-mode", | ||
| 1031 | .description = "Has VGPR mode register indexing", | ||
| 1032 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1033 | }; | ||
| 1034 | result[@intFromEnum(Feature.vmem_to_scalar_write_hazard)] = .{ | ||
| 1035 | .llvm_name = "vmem-to-scalar-write-hazard", | ||
| 1036 | .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", | ||
| 1037 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1038 | }; | ||
| 1039 | result[@intFromEnum(Feature.volcanic_islands)] = .{ | ||
| 1040 | .llvm_name = "volcanic-islands", | ||
| 1041 | .description = "VOLCANIC_ISLANDS GPU generation", | ||
| 1042 | .dependencies = featureSet(&[_]Feature{ | ||
| 1043 | .@"16_bit_insts", | ||
| 1044 | .ci_insts, | ||
| 1045 | .dpp, | ||
| 1046 | .ds_src2_insts, | ||
| 1047 | .extended_image_insts, | ||
| 1048 | .fast_denormal_f32, | ||
| 1049 | .flat_address_space, | ||
| 1050 | .fp64, | ||
| 1051 | .gcn3_encoding, | ||
| 1052 | .gfx7_gfx8_gfx9_insts, | ||
| 1053 | .gfx8_insts, | ||
| 1054 | .image_insts, | ||
| 1055 | .int_clamp_insts, | ||
| 1056 | .inv_2pi_inline_imm, | ||
| 1057 | .localmemorysize65536, | ||
| 1058 | .mad_mac_f32_insts, | ||
| 1059 | .mimg_r128, | ||
| 1060 | .movrel, | ||
| 1061 | .s_memrealtime, | ||
| 1062 | .s_memtime_inst, | ||
| 1063 | .scalar_stores, | ||
| 1064 | .sdwa, | ||
| 1065 | .sdwa_mav, | ||
| 1066 | .sdwa_out_mods_vopc, | ||
| 1067 | .trig_reduced_range, | ||
| 1068 | .unaligned_buffer_access, | ||
| 1069 | .vgpr_index_mode, | ||
| 1070 | .wavefrontsize64, | ||
| 1071 | }), | ||
| 1072 | }; | ||
| 1073 | result[@intFromEnum(Feature.vop3_literal)] = .{ | ||
| 1074 | .llvm_name = "vop3-literal", | ||
| 1075 | .description = "Can use one literal in VOP3", | ||
| 1076 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1077 | }; | ||
| 1078 | result[@intFromEnum(Feature.vop3p)] = .{ | ||
| 1079 | .llvm_name = "vop3p", | ||
| 1080 | .description = "Has VOP3P packed instructions", | ||
| 1081 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1082 | }; | ||
| 1083 | result[@intFromEnum(Feature.vopd)] = .{ | ||
| 1084 | .llvm_name = "vopd", | ||
| 1085 | .description = "Has VOPD dual issue wave32 instructions", | ||
| 1086 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1087 | }; | ||
| 1088 | result[@intFromEnum(Feature.vscnt)] = .{ | ||
| 1089 | .llvm_name = "vscnt", | ||
| 1090 | .description = "Has separate store vscnt counter", | ||
| 1091 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1092 | }; | ||
| 1093 | result[@intFromEnum(Feature.wavefrontsize16)] = .{ | ||
| 1094 | .llvm_name = "wavefrontsize16", | ||
| 1095 | .description = "The number of threads per wavefront", | ||
| 1096 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1097 | }; | ||
| 1098 | result[@intFromEnum(Feature.wavefrontsize32)] = .{ | ||
| 1099 | .llvm_name = "wavefrontsize32", | ||
| 1100 | .description = "The number of threads per wavefront", | ||
| 1101 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1102 | }; | ||
| 1103 | result[@intFromEnum(Feature.wavefrontsize64)] = .{ | ||
| 1104 | .llvm_name = "wavefrontsize64", | ||
| 1105 | .description = "The number of threads per wavefront", | ||
| 1106 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1107 | }; | ||
| 1108 | result[@intFromEnum(Feature.xnack)] = .{ | ||
| 1109 | .llvm_name = "xnack", | ||
| 1110 | .description = "Enable XNACK support", | ||
| 1111 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1112 | }; | ||
| 1113 | result[@intFromEnum(Feature.xnack_support)] = .{ | ||
| 1114 | .llvm_name = "xnack-support", | ||
| 1115 | .description = "Hardware supports XNACK", | ||
| 1116 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1117 | }; | ||
| 1118 | const ti = @typeInfo(Feature); | ||
| 1119 | for (&result, 0..) |*elem, i| { | ||
| 1120 | elem.index = i; | ||
| 1121 | elem.name = ti.Enum.fields[i].name; | ||
| 1122 | } | ||
| 1123 | break :blk result; | ||
| 1124 | }; | ||
| 1125 | |||
| 1126 | pub const cpu = struct { | ||
| 1127 | pub const bonaire = CpuModel{ | ||
| 1128 | .name = "bonaire", | ||
| 1129 | .llvm_name = "bonaire", | ||
| 1130 | .features = featureSet(&[_]Feature{ | ||
| 1131 | .ldsbankcount32, | ||
| 1132 | .sea_islands, | ||
| 1133 | }), | ||
| 1134 | }; | ||
| 1135 | pub const carrizo = CpuModel{ | ||
| 1136 | .name = "carrizo", | ||
| 1137 | .llvm_name = "carrizo", | ||
| 1138 | .features = featureSet(&[_]Feature{ | ||
| 1139 | .fast_fmaf, | ||
| 1140 | .half_rate_64_ops, | ||
| 1141 | .ldsbankcount32, | ||
| 1142 | .unpacked_d16_vmem, | ||
| 1143 | .volcanic_islands, | ||
| 1144 | .xnack_support, | ||
| 1145 | }), | ||
| 1146 | }; | ||
| 1147 | pub const fiji = CpuModel{ | ||
| 1148 | .name = "fiji", | ||
| 1149 | .llvm_name = "fiji", | ||
| 1150 | .features = featureSet(&[_]Feature{ | ||
| 1151 | .ldsbankcount32, | ||
| 1152 | .unpacked_d16_vmem, | ||
| 1153 | .volcanic_islands, | ||
| 1154 | }), | ||
| 1155 | }; | ||
| 1156 | pub const generic = CpuModel{ | ||
| 1157 | .name = "generic", | ||
| 1158 | .llvm_name = "generic", | ||
| 1159 | .features = featureSet(&[_]Feature{ | ||
| 1160 | .wavefrontsize64, | ||
| 1161 | }), | ||
| 1162 | }; | ||
| 1163 | pub const generic_hsa = CpuModel{ | ||
| 1164 | .name = "generic_hsa", | ||
| 1165 | .llvm_name = "generic-hsa", | ||
| 1166 | .features = featureSet(&[_]Feature{ | ||
| 1167 | .flat_address_space, | ||
| 1168 | .wavefrontsize64, | ||
| 1169 | }), | ||
| 1170 | }; | ||
| 1171 | pub const gfx1010 = CpuModel{ | ||
| 1172 | .name = "gfx1010", | ||
| 1173 | .llvm_name = "gfx1010", | ||
| 1174 | .features = featureSet(&[_]Feature{ | ||
| 1175 | .back_off_barrier, | ||
| 1176 | .dl_insts, | ||
| 1177 | .ds_src2_insts, | ||
| 1178 | .flat_segment_offset_bug, | ||
| 1179 | .get_wave_id_inst, | ||
| 1180 | .gfx10, | ||
| 1181 | .inst_fwd_prefetch_bug, | ||
| 1182 | .lds_branch_vmem_war_hazard, | ||
| 1183 | .lds_misaligned_bug, | ||
| 1184 | .ldsbankcount32, | ||
| 1185 | .mad_mac_f32_insts, | ||
| 1186 | .negative_unaligned_scratch_offset_bug, | ||
| 1187 | .nsa_clause_bug, | ||
| 1188 | .nsa_encoding, | ||
| 1189 | .nsa_to_vmem_bug, | ||
| 1190 | .offset_3f_bug, | ||
| 1191 | .scalar_atomics, | ||
| 1192 | .scalar_flat_scratch_insts, | ||
| 1193 | .scalar_stores, | ||
| 1194 | .smem_to_vector_write_hazard, | ||
| 1195 | .vcmpx_exec_war_hazard, | ||
| 1196 | .vcmpx_permlane_hazard, | ||
| 1197 | .vmem_to_scalar_write_hazard, | ||
| 1198 | .wavefrontsize32, | ||
| 1199 | .xnack_support, | ||
| 1200 | }), | ||
| 1201 | }; | ||
| 1202 | pub const gfx1011 = CpuModel{ | ||
| 1203 | .name = "gfx1011", | ||
| 1204 | .llvm_name = "gfx1011", | ||
| 1205 | .features = featureSet(&[_]Feature{ | ||
| 1206 | .back_off_barrier, | ||
| 1207 | .dl_insts, | ||
| 1208 | .dot10_insts, | ||
| 1209 | .dot1_insts, | ||
| 1210 | .dot2_insts, | ||
| 1211 | .dot5_insts, | ||
| 1212 | .dot6_insts, | ||
| 1213 | .dot7_insts, | ||
| 1214 | .ds_src2_insts, | ||
| 1215 | .flat_segment_offset_bug, | ||
| 1216 | .get_wave_id_inst, | ||
| 1217 | .gfx10, | ||
| 1218 | .inst_fwd_prefetch_bug, | ||
| 1219 | .lds_branch_vmem_war_hazard, | ||
| 1220 | .lds_misaligned_bug, | ||
| 1221 | .ldsbankcount32, | ||
| 1222 | .mad_mac_f32_insts, | ||
| 1223 | .negative_unaligned_scratch_offset_bug, | ||
| 1224 | .nsa_clause_bug, | ||
| 1225 | .nsa_encoding, | ||
| 1226 | .nsa_to_vmem_bug, | ||
| 1227 | .offset_3f_bug, | ||
| 1228 | .scalar_atomics, | ||
| 1229 | .scalar_flat_scratch_insts, | ||
| 1230 | .scalar_stores, | ||
| 1231 | .smem_to_vector_write_hazard, | ||
| 1232 | .vcmpx_exec_war_hazard, | ||
| 1233 | .vcmpx_permlane_hazard, | ||
| 1234 | .vmem_to_scalar_write_hazard, | ||
| 1235 | .wavefrontsize32, | ||
| 1236 | .xnack_support, | ||
| 1237 | }), | ||
| 1238 | }; | ||
| 1239 | pub const gfx1012 = CpuModel{ | ||
| 1240 | .name = "gfx1012", | ||
| 1241 | .llvm_name = "gfx1012", | ||
| 1242 | .features = featureSet(&[_]Feature{ | ||
| 1243 | .back_off_barrier, | ||
| 1244 | .dl_insts, | ||
| 1245 | .dot10_insts, | ||
| 1246 | .dot1_insts, | ||
| 1247 | .dot2_insts, | ||
| 1248 | .dot5_insts, | ||
| 1249 | .dot6_insts, | ||
| 1250 | .dot7_insts, | ||
| 1251 | .ds_src2_insts, | ||
| 1252 | .flat_segment_offset_bug, | ||
| 1253 | .get_wave_id_inst, | ||
| 1254 | .gfx10, | ||
| 1255 | .inst_fwd_prefetch_bug, | ||
| 1256 | .lds_branch_vmem_war_hazard, | ||
| 1257 | .lds_misaligned_bug, | ||
| 1258 | .ldsbankcount32, | ||
| 1259 | .mad_mac_f32_insts, | ||
| 1260 | .negative_unaligned_scratch_offset_bug, | ||
| 1261 | .nsa_clause_bug, | ||
| 1262 | .nsa_encoding, | ||
| 1263 | .nsa_to_vmem_bug, | ||
| 1264 | .offset_3f_bug, | ||
| 1265 | .scalar_atomics, | ||
| 1266 | .scalar_flat_scratch_insts, | ||
| 1267 | .scalar_stores, | ||
| 1268 | .smem_to_vector_write_hazard, | ||
| 1269 | .vcmpx_exec_war_hazard, | ||
| 1270 | .vcmpx_permlane_hazard, | ||
| 1271 | .vmem_to_scalar_write_hazard, | ||
| 1272 | .wavefrontsize32, | ||
| 1273 | .xnack_support, | ||
| 1274 | }), | ||
| 1275 | }; | ||
| 1276 | pub const gfx1013 = CpuModel{ | ||
| 1277 | .name = "gfx1013", | ||
| 1278 | .llvm_name = "gfx1013", | ||
| 1279 | .features = featureSet(&[_]Feature{ | ||
| 1280 | .back_off_barrier, | ||
| 1281 | .dl_insts, | ||
| 1282 | .ds_src2_insts, | ||
| 1283 | .flat_segment_offset_bug, | ||
| 1284 | .get_wave_id_inst, | ||
| 1285 | .gfx10, | ||
| 1286 | .gfx10_a_encoding, | ||
| 1287 | .inst_fwd_prefetch_bug, | ||
| 1288 | .lds_branch_vmem_war_hazard, | ||
| 1289 | .lds_misaligned_bug, | ||
| 1290 | .ldsbankcount32, | ||
| 1291 | .mad_mac_f32_insts, | ||
| 1292 | .negative_unaligned_scratch_offset_bug, | ||
| 1293 | .nsa_clause_bug, | ||
| 1294 | .nsa_encoding, | ||
| 1295 | .nsa_to_vmem_bug, | ||
| 1296 | .offset_3f_bug, | ||
| 1297 | .scalar_atomics, | ||
| 1298 | .scalar_flat_scratch_insts, | ||
| 1299 | .scalar_stores, | ||
| 1300 | .smem_to_vector_write_hazard, | ||
| 1301 | .vcmpx_exec_war_hazard, | ||
| 1302 | .vcmpx_permlane_hazard, | ||
| 1303 | .vmem_to_scalar_write_hazard, | ||
| 1304 | .wavefrontsize32, | ||
| 1305 | .xnack_support, | ||
| 1306 | }), | ||
| 1307 | }; | ||
| 1308 | pub const gfx1030 = CpuModel{ | ||
| 1309 | .name = "gfx1030", | ||
| 1310 | .llvm_name = "gfx1030", | ||
| 1311 | .features = featureSet(&[_]Feature{ | ||
| 1312 | .back_off_barrier, | ||
| 1313 | .dl_insts, | ||
| 1314 | .dot10_insts, | ||
| 1315 | .dot1_insts, | ||
| 1316 | .dot2_insts, | ||
| 1317 | .dot5_insts, | ||
| 1318 | .dot6_insts, | ||
| 1319 | .dot7_insts, | ||
| 1320 | .gfx10, | ||
| 1321 | .gfx10_3_insts, | ||
| 1322 | .gfx10_a_encoding, | ||
| 1323 | .gfx10_b_encoding, | ||
| 1324 | .ldsbankcount32, | ||
| 1325 | .nsa_encoding, | ||
| 1326 | .shader_cycles_register, | ||
| 1327 | .wavefrontsize32, | ||
| 1328 | }), | ||
| 1329 | }; | ||
| 1330 | pub const gfx1031 = CpuModel{ | ||
| 1331 | .name = "gfx1031", | ||
| 1332 | .llvm_name = "gfx1031", | ||
| 1333 | .features = featureSet(&[_]Feature{ | ||
| 1334 | .back_off_barrier, | ||
| 1335 | .dl_insts, | ||
| 1336 | .dot10_insts, | ||
| 1337 | .dot1_insts, | ||
| 1338 | .dot2_insts, | ||
| 1339 | .dot5_insts, | ||
| 1340 | .dot6_insts, | ||
| 1341 | .dot7_insts, | ||
| 1342 | .gfx10, | ||
| 1343 | .gfx10_3_insts, | ||
| 1344 | .gfx10_a_encoding, | ||
| 1345 | .gfx10_b_encoding, | ||
| 1346 | .ldsbankcount32, | ||
| 1347 | .nsa_encoding, | ||
| 1348 | .shader_cycles_register, | ||
| 1349 | .wavefrontsize32, | ||
| 1350 | }), | ||
| 1351 | }; | ||
| 1352 | pub const gfx1032 = CpuModel{ | ||
| 1353 | .name = "gfx1032", | ||
| 1354 | .llvm_name = "gfx1032", | ||
| 1355 | .features = featureSet(&[_]Feature{ | ||
| 1356 | .back_off_barrier, | ||
| 1357 | .dl_insts, | ||
| 1358 | .dot10_insts, | ||
| 1359 | .dot1_insts, | ||
| 1360 | .dot2_insts, | ||
| 1361 | .dot5_insts, | ||
| 1362 | .dot6_insts, | ||
| 1363 | .dot7_insts, | ||
| 1364 | .gfx10, | ||
| 1365 | .gfx10_3_insts, | ||
| 1366 | .gfx10_a_encoding, | ||
| 1367 | .gfx10_b_encoding, | ||
| 1368 | .ldsbankcount32, | ||
| 1369 | .nsa_encoding, | ||
| 1370 | .shader_cycles_register, | ||
| 1371 | .wavefrontsize32, | ||
| 1372 | }), | ||
| 1373 | }; | ||
| 1374 | pub const gfx1033 = CpuModel{ | ||
| 1375 | .name = "gfx1033", | ||
| 1376 | .llvm_name = "gfx1033", | ||
| 1377 | .features = featureSet(&[_]Feature{ | ||
| 1378 | .back_off_barrier, | ||
| 1379 | .dl_insts, | ||
| 1380 | .dot10_insts, | ||
| 1381 | .dot1_insts, | ||
| 1382 | .dot2_insts, | ||
| 1383 | .dot5_insts, | ||
| 1384 | .dot6_insts, | ||
| 1385 | .dot7_insts, | ||
| 1386 | .gfx10, | ||
| 1387 | .gfx10_3_insts, | ||
| 1388 | .gfx10_a_encoding, | ||
| 1389 | .gfx10_b_encoding, | ||
| 1390 | .ldsbankcount32, | ||
| 1391 | .nsa_encoding, | ||
| 1392 | .shader_cycles_register, | ||
| 1393 | .wavefrontsize32, | ||
| 1394 | }), | ||
| 1395 | }; | ||
| 1396 | pub const gfx1034 = CpuModel{ | ||
| 1397 | .name = "gfx1034", | ||
| 1398 | .llvm_name = "gfx1034", | ||
| 1399 | .features = featureSet(&[_]Feature{ | ||
| 1400 | .back_off_barrier, | ||
| 1401 | .dl_insts, | ||
| 1402 | .dot10_insts, | ||
| 1403 | .dot1_insts, | ||
| 1404 | .dot2_insts, | ||
| 1405 | .dot5_insts, | ||
| 1406 | .dot6_insts, | ||
| 1407 | .dot7_insts, | ||
| 1408 | .gfx10, | ||
| 1409 | .gfx10_3_insts, | ||
| 1410 | .gfx10_a_encoding, | ||
| 1411 | .gfx10_b_encoding, | ||
| 1412 | .ldsbankcount32, | ||
| 1413 | .nsa_encoding, | ||
| 1414 | .shader_cycles_register, | ||
| 1415 | .wavefrontsize32, | ||
| 1416 | }), | ||
| 1417 | }; | ||
| 1418 | pub const gfx1035 = CpuModel{ | ||
| 1419 | .name = "gfx1035", | ||
| 1420 | .llvm_name = "gfx1035", | ||
| 1421 | .features = featureSet(&[_]Feature{ | ||
| 1422 | .back_off_barrier, | ||
| 1423 | .dl_insts, | ||
| 1424 | .dot10_insts, | ||
| 1425 | .dot1_insts, | ||
| 1426 | .dot2_insts, | ||
| 1427 | .dot5_insts, | ||
| 1428 | .dot6_insts, | ||
| 1429 | .dot7_insts, | ||
| 1430 | .gfx10, | ||
| 1431 | .gfx10_3_insts, | ||
| 1432 | .gfx10_a_encoding, | ||
| 1433 | .gfx10_b_encoding, | ||
| 1434 | .ldsbankcount32, | ||
| 1435 | .nsa_encoding, | ||
| 1436 | .shader_cycles_register, | ||
| 1437 | .wavefrontsize32, | ||
| 1438 | }), | ||
| 1439 | }; | ||
| 1440 | pub const gfx1036 = CpuModel{ | ||
| 1441 | .name = "gfx1036", | ||
| 1442 | .llvm_name = "gfx1036", | ||
| 1443 | .features = featureSet(&[_]Feature{ | ||
| 1444 | .back_off_barrier, | ||
| 1445 | .dl_insts, | ||
| 1446 | .dot10_insts, | ||
| 1447 | .dot1_insts, | ||
| 1448 | .dot2_insts, | ||
| 1449 | .dot5_insts, | ||
| 1450 | .dot6_insts, | ||
| 1451 | .dot7_insts, | ||
| 1452 | .gfx10, | ||
| 1453 | .gfx10_3_insts, | ||
| 1454 | .gfx10_a_encoding, | ||
| 1455 | .gfx10_b_encoding, | ||
| 1456 | .ldsbankcount32, | ||
| 1457 | .nsa_encoding, | ||
| 1458 | .shader_cycles_register, | ||
| 1459 | .wavefrontsize32, | ||
| 1460 | }), | ||
| 1461 | }; | ||
| 1462 | pub const gfx1100 = CpuModel{ | ||
| 1463 | .name = "gfx1100", | ||
| 1464 | .llvm_name = "gfx1100", | ||
| 1465 | .features = featureSet(&[_]Feature{ | ||
| 1466 | .architected_flat_scratch, | ||
| 1467 | .atomic_fadd_no_rtn_insts, | ||
| 1468 | .atomic_fadd_rtn_insts, | ||
| 1469 | .dl_insts, | ||
| 1470 | .dot10_insts, | ||
| 1471 | .dot5_insts, | ||
| 1472 | .dot7_insts, | ||
| 1473 | .dot8_insts, | ||
| 1474 | .dot9_insts, | ||
| 1475 | .flat_atomic_fadd_f32_inst, | ||
| 1476 | .gfx11, | ||
| 1477 | .gfx11_full_vgprs, | ||
| 1478 | .image_insts, | ||
| 1479 | .ldsbankcount32, | ||
| 1480 | .mad_intra_fwd_bug, | ||
| 1481 | .nsa_encoding, | ||
| 1482 | .packed_tid, | ||
| 1483 | .partial_nsa_encoding, | ||
| 1484 | .shader_cycles_register, | ||
| 1485 | .user_sgpr_init16_bug, | ||
| 1486 | .valu_trans_use_hazard, | ||
| 1487 | .vcmpx_permlane_hazard, | ||
| 1488 | .wavefrontsize32, | ||
| 1489 | }), | ||
| 1490 | }; | ||
| 1491 | pub const gfx1101 = CpuModel{ | ||
| 1492 | .name = "gfx1101", | ||
| 1493 | .llvm_name = "gfx1101", | ||
| 1494 | .features = featureSet(&[_]Feature{ | ||
| 1495 | .architected_flat_scratch, | ||
| 1496 | .atomic_fadd_no_rtn_insts, | ||
| 1497 | .atomic_fadd_rtn_insts, | ||
| 1498 | .dl_insts, | ||
| 1499 | .dot10_insts, | ||
| 1500 | .dot5_insts, | ||
| 1501 | .dot7_insts, | ||
| 1502 | .dot8_insts, | ||
| 1503 | .dot9_insts, | ||
| 1504 | .flat_atomic_fadd_f32_inst, | ||
| 1505 | .gfx11, | ||
| 1506 | .gfx11_full_vgprs, | ||
| 1507 | .image_insts, | ||
| 1508 | .ldsbankcount32, | ||
| 1509 | .mad_intra_fwd_bug, | ||
| 1510 | .nsa_encoding, | ||
| 1511 | .packed_tid, | ||
| 1512 | .partial_nsa_encoding, | ||
| 1513 | .shader_cycles_register, | ||
| 1514 | .valu_trans_use_hazard, | ||
| 1515 | .vcmpx_permlane_hazard, | ||
| 1516 | .wavefrontsize32, | ||
| 1517 | }), | ||
| 1518 | }; | ||
| 1519 | pub const gfx1102 = CpuModel{ | ||
| 1520 | .name = "gfx1102", | ||
| 1521 | .llvm_name = "gfx1102", | ||
| 1522 | .features = featureSet(&[_]Feature{ | ||
| 1523 | .architected_flat_scratch, | ||
| 1524 | .atomic_fadd_no_rtn_insts, | ||
| 1525 | .atomic_fadd_rtn_insts, | ||
| 1526 | .dl_insts, | ||
| 1527 | .dot10_insts, | ||
| 1528 | .dot5_insts, | ||
| 1529 | .dot7_insts, | ||
| 1530 | .dot8_insts, | ||
| 1531 | .dot9_insts, | ||
| 1532 | .flat_atomic_fadd_f32_inst, | ||
| 1533 | .gfx11, | ||
| 1534 | .image_insts, | ||
| 1535 | .ldsbankcount32, | ||
| 1536 | .mad_intra_fwd_bug, | ||
| 1537 | .nsa_encoding, | ||
| 1538 | .packed_tid, | ||
| 1539 | .partial_nsa_encoding, | ||
| 1540 | .shader_cycles_register, | ||
| 1541 | .user_sgpr_init16_bug, | ||
| 1542 | .valu_trans_use_hazard, | ||
| 1543 | .vcmpx_permlane_hazard, | ||
| 1544 | .wavefrontsize32, | ||
| 1545 | }), | ||
| 1546 | }; | ||
| 1547 | pub const gfx1103 = CpuModel{ | ||
| 1548 | .name = "gfx1103", | ||
| 1549 | .llvm_name = "gfx1103", | ||
| 1550 | .features = featureSet(&[_]Feature{ | ||
| 1551 | .architected_flat_scratch, | ||
| 1552 | .atomic_fadd_no_rtn_insts, | ||
| 1553 | .atomic_fadd_rtn_insts, | ||
| 1554 | .dl_insts, | ||
| 1555 | .dot10_insts, | ||
| 1556 | .dot5_insts, | ||
| 1557 | .dot7_insts, | ||
| 1558 | .dot8_insts, | ||
| 1559 | .dot9_insts, | ||
| 1560 | .flat_atomic_fadd_f32_inst, | ||
| 1561 | .gfx11, | ||
| 1562 | .image_insts, | ||
| 1563 | .ldsbankcount32, | ||
| 1564 | .mad_intra_fwd_bug, | ||
| 1565 | .nsa_encoding, | ||
| 1566 | .packed_tid, | ||
| 1567 | .partial_nsa_encoding, | ||
| 1568 | .shader_cycles_register, | ||
| 1569 | .valu_trans_use_hazard, | ||
| 1570 | .vcmpx_permlane_hazard, | ||
| 1571 | .wavefrontsize32, | ||
| 1572 | }), | ||
| 1573 | }; | ||
| 1574 | pub const gfx1150 = CpuModel{ | ||
| 1575 | .name = "gfx1150", | ||
| 1576 | .llvm_name = "gfx1150", | ||
| 1577 | .features = featureSet(&[_]Feature{ | ||
| 1578 | .architected_flat_scratch, | ||
| 1579 | .atomic_fadd_no_rtn_insts, | ||
| 1580 | .atomic_fadd_rtn_insts, | ||
| 1581 | .dl_insts, | ||
| 1582 | .dot10_insts, | ||
| 1583 | .dot5_insts, | ||
| 1584 | .dot7_insts, | ||
| 1585 | .dot8_insts, | ||
| 1586 | .dot9_insts, | ||
| 1587 | .flat_atomic_fadd_f32_inst, | ||
| 1588 | .gfx11, | ||
| 1589 | .image_insts, | ||
| 1590 | .ldsbankcount32, | ||
| 1591 | .mad_intra_fwd_bug, | ||
| 1592 | .nsa_encoding, | ||
| 1593 | .packed_tid, | ||
| 1594 | .partial_nsa_encoding, | ||
| 1595 | .shader_cycles_register, | ||
| 1596 | .vcmpx_permlane_hazard, | ||
| 1597 | .wavefrontsize32, | ||
| 1598 | }), | ||
| 1599 | }; | ||
| 1600 | pub const gfx1151 = CpuModel{ | ||
| 1601 | .name = "gfx1151", | ||
| 1602 | .llvm_name = "gfx1151", | ||
| 1603 | .features = featureSet(&[_]Feature{ | ||
| 1604 | .architected_flat_scratch, | ||
| 1605 | .atomic_fadd_no_rtn_insts, | ||
| 1606 | .atomic_fadd_rtn_insts, | ||
| 1607 | .dl_insts, | ||
| 1608 | .dot10_insts, | ||
| 1609 | .dot5_insts, | ||
| 1610 | .dot7_insts, | ||
| 1611 | .dot8_insts, | ||
| 1612 | .dot9_insts, | ||
| 1613 | .flat_atomic_fadd_f32_inst, | ||
| 1614 | .gfx11, | ||
| 1615 | .gfx11_full_vgprs, | ||
| 1616 | .image_insts, | ||
| 1617 | .ldsbankcount32, | ||
| 1618 | .mad_intra_fwd_bug, | ||
| 1619 | .nsa_encoding, | ||
| 1620 | .packed_tid, | ||
| 1621 | .partial_nsa_encoding, | ||
| 1622 | .shader_cycles_register, | ||
| 1623 | .vcmpx_permlane_hazard, | ||
| 1624 | .wavefrontsize32, | ||
| 1625 | }), | ||
| 1626 | }; | ||
| 1627 | pub const gfx600 = CpuModel{ | ||
| 1628 | .name = "gfx600", | ||
| 1629 | .llvm_name = "gfx600", | ||
| 1630 | .features = featureSet(&[_]Feature{ | ||
| 1631 | .fast_fmaf, | ||
| 1632 | .half_rate_64_ops, | ||
| 1633 | .southern_islands, | ||
| 1634 | }), | ||
| 1635 | }; | ||
| 1636 | pub const gfx601 = CpuModel{ | ||
| 1637 | .name = "gfx601", | ||
| 1638 | .llvm_name = "gfx601", | ||
| 1639 | .features = featureSet(&[_]Feature{ | ||
| 1640 | .southern_islands, | ||
| 1641 | }), | ||
| 1642 | }; | ||
| 1643 | pub const gfx602 = CpuModel{ | ||
| 1644 | .name = "gfx602", | ||
| 1645 | .llvm_name = "gfx602", | ||
| 1646 | .features = featureSet(&[_]Feature{ | ||
| 1647 | .southern_islands, | ||
| 1648 | }), | ||
| 1649 | }; | ||
| 1650 | pub const gfx700 = CpuModel{ | ||
| 1651 | .name = "gfx700", | ||
| 1652 | .llvm_name = "gfx700", | ||
| 1653 | .features = featureSet(&[_]Feature{ | ||
| 1654 | .ldsbankcount32, | ||
| 1655 | .sea_islands, | ||
| 1656 | }), | ||
| 1657 | }; | ||
| 1658 | pub const gfx701 = CpuModel{ | ||
| 1659 | .name = "gfx701", | ||
| 1660 | .llvm_name = "gfx701", | ||
| 1661 | .features = featureSet(&[_]Feature{ | ||
| 1662 | .fast_fmaf, | ||
| 1663 | .half_rate_64_ops, | ||
| 1664 | .ldsbankcount32, | ||
| 1665 | .sea_islands, | ||
| 1666 | }), | ||
| 1667 | }; | ||
| 1668 | pub const gfx702 = CpuModel{ | ||
| 1669 | .name = "gfx702", | ||
| 1670 | .llvm_name = "gfx702", | ||
| 1671 | .features = featureSet(&[_]Feature{ | ||
| 1672 | .fast_fmaf, | ||
| 1673 | .ldsbankcount16, | ||
| 1674 | .sea_islands, | ||
| 1675 | }), | ||
| 1676 | }; | ||
| 1677 | pub const gfx703 = CpuModel{ | ||
| 1678 | .name = "gfx703", | ||
| 1679 | .llvm_name = "gfx703", | ||
| 1680 | .features = featureSet(&[_]Feature{ | ||
| 1681 | .ldsbankcount16, | ||
| 1682 | .sea_islands, | ||
| 1683 | }), | ||
| 1684 | }; | ||
| 1685 | pub const gfx704 = CpuModel{ | ||
| 1686 | .name = "gfx704", | ||
| 1687 | .llvm_name = "gfx704", | ||
| 1688 | .features = featureSet(&[_]Feature{ | ||
| 1689 | .ldsbankcount32, | ||
| 1690 | .sea_islands, | ||
| 1691 | }), | ||
| 1692 | }; | ||
| 1693 | pub const gfx705 = CpuModel{ | ||
| 1694 | .name = "gfx705", | ||
| 1695 | .llvm_name = "gfx705", | ||
| 1696 | .features = featureSet(&[_]Feature{ | ||
| 1697 | .ldsbankcount16, | ||
| 1698 | .sea_islands, | ||
| 1699 | }), | ||
| 1700 | }; | ||
| 1701 | pub const gfx801 = CpuModel{ | ||
| 1702 | .name = "gfx801", | ||
| 1703 | .llvm_name = "gfx801", | ||
| 1704 | .features = featureSet(&[_]Feature{ | ||
| 1705 | .fast_fmaf, | ||
| 1706 | .half_rate_64_ops, | ||
| 1707 | .ldsbankcount32, | ||
| 1708 | .unpacked_d16_vmem, | ||
| 1709 | .volcanic_islands, | ||
| 1710 | .xnack_support, | ||
| 1711 | }), | ||
| 1712 | }; | ||
| 1713 | pub const gfx802 = CpuModel{ | ||
| 1714 | .name = "gfx802", | ||
| 1715 | .llvm_name = "gfx802", | ||
| 1716 | .features = featureSet(&[_]Feature{ | ||
| 1717 | .ldsbankcount32, | ||
| 1718 | .sgpr_init_bug, | ||
| 1719 | .unpacked_d16_vmem, | ||
| 1720 | .volcanic_islands, | ||
| 1721 | }), | ||
| 1722 | }; | ||
| 1723 | pub const gfx803 = CpuModel{ | ||
| 1724 | .name = "gfx803", | ||
| 1725 | .llvm_name = "gfx803", | ||
| 1726 | .features = featureSet(&[_]Feature{ | ||
| 1727 | .ldsbankcount32, | ||
| 1728 | .unpacked_d16_vmem, | ||
| 1729 | .volcanic_islands, | ||
| 1730 | }), | ||
| 1731 | }; | ||
| 1732 | pub const gfx805 = CpuModel{ | ||
| 1733 | .name = "gfx805", | ||
| 1734 | .llvm_name = "gfx805", | ||
| 1735 | .features = featureSet(&[_]Feature{ | ||
| 1736 | .ldsbankcount32, | ||
| 1737 | .sgpr_init_bug, | ||
| 1738 | .unpacked_d16_vmem, | ||
| 1739 | .volcanic_islands, | ||
| 1740 | }), | ||
| 1741 | }; | ||
| 1742 | pub const gfx810 = CpuModel{ | ||
| 1743 | .name = "gfx810", | ||
| 1744 | .llvm_name = "gfx810", | ||
| 1745 | .features = featureSet(&[_]Feature{ | ||
| 1746 | .image_gather4_d16_bug, | ||
| 1747 | .image_store_d16_bug, | ||
| 1748 | .ldsbankcount16, | ||
| 1749 | .volcanic_islands, | ||
| 1750 | .xnack_support, | ||
| 1751 | }), | ||
| 1752 | }; | ||
| 1753 | pub const gfx900 = CpuModel{ | ||
| 1754 | .name = "gfx900", | ||
| 1755 | .llvm_name = "gfx900", | ||
| 1756 | .features = featureSet(&[_]Feature{ | ||
| 1757 | .ds_src2_insts, | ||
| 1758 | .extended_image_insts, | ||
| 1759 | .gfx9, | ||
| 1760 | .image_gather4_d16_bug, | ||
| 1761 | .image_insts, | ||
| 1762 | .ldsbankcount32, | ||
| 1763 | .mad_mac_f32_insts, | ||
| 1764 | .mad_mix_insts, | ||
| 1765 | }), | ||
| 1766 | }; | ||
| 1767 | pub const gfx902 = CpuModel{ | ||
| 1768 | .name = "gfx902", | ||
| 1769 | .llvm_name = "gfx902", | ||
| 1770 | .features = featureSet(&[_]Feature{ | ||
| 1771 | .ds_src2_insts, | ||
| 1772 | .extended_image_insts, | ||
| 1773 | .gfx9, | ||
| 1774 | .image_gather4_d16_bug, | ||
| 1775 | .image_insts, | ||
| 1776 | .ldsbankcount32, | ||
| 1777 | .mad_mac_f32_insts, | ||
| 1778 | .mad_mix_insts, | ||
| 1779 | }), | ||
| 1780 | }; | ||
| 1781 | pub const gfx904 = CpuModel{ | ||
| 1782 | .name = "gfx904", | ||
| 1783 | .llvm_name = "gfx904", | ||
| 1784 | .features = featureSet(&[_]Feature{ | ||
| 1785 | .ds_src2_insts, | ||
| 1786 | .extended_image_insts, | ||
| 1787 | .fma_mix_insts, | ||
| 1788 | .gfx9, | ||
| 1789 | .image_gather4_d16_bug, | ||
| 1790 | .image_insts, | ||
| 1791 | .ldsbankcount32, | ||
| 1792 | .mad_mac_f32_insts, | ||
| 1793 | }), | ||
| 1794 | }; | ||
| 1795 | pub const gfx906 = CpuModel{ | ||
| 1796 | .name = "gfx906", | ||
| 1797 | .llvm_name = "gfx906", | ||
| 1798 | .features = featureSet(&[_]Feature{ | ||
| 1799 | .dl_insts, | ||
| 1800 | .dot10_insts, | ||
| 1801 | .dot1_insts, | ||
| 1802 | .dot2_insts, | ||
| 1803 | .dot7_insts, | ||
| 1804 | .ds_src2_insts, | ||
| 1805 | .extended_image_insts, | ||
| 1806 | .fma_mix_insts, | ||
| 1807 | .gfx9, | ||
| 1808 | .half_rate_64_ops, | ||
| 1809 | .image_gather4_d16_bug, | ||
| 1810 | .image_insts, | ||
| 1811 | .ldsbankcount32, | ||
| 1812 | .mad_mac_f32_insts, | ||
| 1813 | .sramecc_support, | ||
| 1814 | }), | ||
| 1815 | }; | ||
| 1816 | pub const gfx908 = CpuModel{ | ||
| 1817 | .name = "gfx908", | ||
| 1818 | .llvm_name = "gfx908", | ||
| 1819 | .features = featureSet(&[_]Feature{ | ||
| 1820 | .atomic_buffer_global_pk_add_f16_no_rtn_insts, | ||
| 1821 | .atomic_fadd_no_rtn_insts, | ||
| 1822 | .dl_insts, | ||
| 1823 | .dot10_insts, | ||
| 1824 | .dot1_insts, | ||
| 1825 | .dot2_insts, | ||
| 1826 | .dot3_insts, | ||
| 1827 | .dot4_insts, | ||
| 1828 | .dot5_insts, | ||
| 1829 | .dot6_insts, | ||
| 1830 | .dot7_insts, | ||
| 1831 | .ds_src2_insts, | ||
| 1832 | .extended_image_insts, | ||
| 1833 | .fma_mix_insts, | ||
| 1834 | .gfx9, | ||
| 1835 | .half_rate_64_ops, | ||
| 1836 | .image_gather4_d16_bug, | ||
| 1837 | .image_insts, | ||
| 1838 | .ldsbankcount32, | ||
| 1839 | .mad_mac_f32_insts, | ||
| 1840 | .mai_insts, | ||
| 1841 | .mfma_inline_literal_bug, | ||
| 1842 | .pk_fmac_f16_inst, | ||
| 1843 | .sramecc_support, | ||
| 1844 | }), | ||
| 1845 | }; | ||
| 1846 | pub const gfx909 = CpuModel{ | ||
| 1847 | .name = "gfx909", | ||
| 1848 | .llvm_name = "gfx909", | ||
| 1849 | .features = featureSet(&[_]Feature{ | ||
| 1850 | .ds_src2_insts, | ||
| 1851 | .extended_image_insts, | ||
| 1852 | .gfx9, | ||
| 1853 | .image_gather4_d16_bug, | ||
| 1854 | .image_insts, | ||
| 1855 | .ldsbankcount32, | ||
| 1856 | .mad_mac_f32_insts, | ||
| 1857 | .mad_mix_insts, | ||
| 1858 | }), | ||
| 1859 | }; | ||
| 1860 | pub const gfx90a = CpuModel{ | ||
| 1861 | .name = "gfx90a", | ||
| 1862 | .llvm_name = "gfx90a", | ||
| 1863 | .features = featureSet(&[_]Feature{ | ||
| 1864 | .atomic_buffer_global_pk_add_f16_insts, | ||
| 1865 | .atomic_fadd_no_rtn_insts, | ||
| 1866 | .atomic_fadd_rtn_insts, | ||
| 1867 | .back_off_barrier, | ||
| 1868 | .dl_insts, | ||
| 1869 | .dot10_insts, | ||
| 1870 | .dot1_insts, | ||
| 1871 | .dot2_insts, | ||
| 1872 | .dot3_insts, | ||
| 1873 | .dot4_insts, | ||
| 1874 | .dot5_insts, | ||
| 1875 | .dot6_insts, | ||
| 1876 | .dot7_insts, | ||
| 1877 | .dpp_64bit, | ||
| 1878 | .fma_mix_insts, | ||
| 1879 | .fmacf64_inst, | ||
| 1880 | .full_rate_64_ops, | ||
| 1881 | .gfx9, | ||
| 1882 | .gfx90a_insts, | ||
| 1883 | .image_insts, | ||
| 1884 | .ldsbankcount32, | ||
| 1885 | .mad_mac_f32_insts, | ||
| 1886 | .mai_insts, | ||
| 1887 | .packed_fp32_ops, | ||
| 1888 | .packed_tid, | ||
| 1889 | .pk_fmac_f16_inst, | ||
| 1890 | .sramecc_support, | ||
| 1891 | }), | ||
| 1892 | }; | ||
| 1893 | pub const gfx90c = CpuModel{ | ||
| 1894 | .name = "gfx90c", | ||
| 1895 | .llvm_name = "gfx90c", | ||
| 1896 | .features = featureSet(&[_]Feature{ | ||
| 1897 | .ds_src2_insts, | ||
| 1898 | .extended_image_insts, | ||
| 1899 | .gfx9, | ||
| 1900 | .image_gather4_d16_bug, | ||
| 1901 | .image_insts, | ||
| 1902 | .ldsbankcount32, | ||
| 1903 | .mad_mac_f32_insts, | ||
| 1904 | .mad_mix_insts, | ||
| 1905 | }), | ||
| 1906 | }; | ||
| 1907 | pub const gfx940 = CpuModel{ | ||
| 1908 | .name = "gfx940", | ||
| 1909 | .llvm_name = "gfx940", | ||
| 1910 | .features = featureSet(&[_]Feature{ | ||
| 1911 | .architected_flat_scratch, | ||
| 1912 | .atomic_buffer_global_pk_add_f16_insts, | ||
| 1913 | .atomic_ds_pk_add_16_insts, | ||
| 1914 | .atomic_fadd_no_rtn_insts, | ||
| 1915 | .atomic_fadd_rtn_insts, | ||
| 1916 | .atomic_flat_pk_add_16_insts, | ||
| 1917 | .atomic_global_pk_add_bf16_inst, | ||
| 1918 | .back_off_barrier, | ||
| 1919 | .dl_insts, | ||
| 1920 | .dot10_insts, | ||
| 1921 | .dot1_insts, | ||
| 1922 | .dot2_insts, | ||
| 1923 | .dot3_insts, | ||
| 1924 | .dot4_insts, | ||
| 1925 | .dot5_insts, | ||
| 1926 | .dot6_insts, | ||
| 1927 | .dot7_insts, | ||
| 1928 | .dpp_64bit, | ||
| 1929 | .flat_atomic_fadd_f32_inst, | ||
| 1930 | .fma_mix_insts, | ||
| 1931 | .fmacf64_inst, | ||
| 1932 | .force_store_sc0_sc1, | ||
| 1933 | .fp8_insts, | ||
| 1934 | .full_rate_64_ops, | ||
| 1935 | .gfx9, | ||
| 1936 | .gfx90a_insts, | ||
| 1937 | .gfx940_insts, | ||
| 1938 | .ldsbankcount32, | ||
| 1939 | .mai_insts, | ||
| 1940 | .packed_fp32_ops, | ||
| 1941 | .packed_tid, | ||
| 1942 | .pk_fmac_f16_inst, | ||
| 1943 | .sramecc_support, | ||
| 1944 | }), | ||
| 1945 | }; | ||
| 1946 | pub const gfx941 = CpuModel{ | ||
| 1947 | .name = "gfx941", | ||
| 1948 | .llvm_name = "gfx941", | ||
| 1949 | .features = featureSet(&[_]Feature{ | ||
| 1950 | .architected_flat_scratch, | ||
| 1951 | .atomic_buffer_global_pk_add_f16_insts, | ||
| 1952 | .atomic_ds_pk_add_16_insts, | ||
| 1953 | .atomic_fadd_no_rtn_insts, | ||
| 1954 | .atomic_fadd_rtn_insts, | ||
| 1955 | .atomic_flat_pk_add_16_insts, | ||
| 1956 | .atomic_global_pk_add_bf16_inst, | ||
| 1957 | .back_off_barrier, | ||
| 1958 | .dl_insts, | ||
| 1959 | .dot10_insts, | ||
| 1960 | .dot1_insts, | ||
| 1961 | .dot2_insts, | ||
| 1962 | .dot3_insts, | ||
| 1963 | .dot4_insts, | ||
| 1964 | .dot5_insts, | ||
| 1965 | .dot6_insts, | ||
| 1966 | .dot7_insts, | ||
| 1967 | .dpp_64bit, | ||
| 1968 | .flat_atomic_fadd_f32_inst, | ||
| 1969 | .fma_mix_insts, | ||
| 1970 | .fmacf64_inst, | ||
| 1971 | .force_store_sc0_sc1, | ||
| 1972 | .fp8_insts, | ||
| 1973 | .full_rate_64_ops, | ||
| 1974 | .gfx9, | ||
| 1975 | .gfx90a_insts, | ||
| 1976 | .gfx940_insts, | ||
| 1977 | .ldsbankcount32, | ||
| 1978 | .mai_insts, | ||
| 1979 | .packed_fp32_ops, | ||
| 1980 | .packed_tid, | ||
| 1981 | .pk_fmac_f16_inst, | ||
| 1982 | .sramecc_support, | ||
| 1983 | }), | ||
| 1984 | }; | ||
| 1985 | pub const gfx942 = CpuModel{ | ||
| 1986 | .name = "gfx942", | ||
| 1987 | .llvm_name = "gfx942", | ||
| 1988 | .features = featureSet(&[_]Feature{ | ||
| 1989 | .architected_flat_scratch, | ||
| 1990 | .atomic_buffer_global_pk_add_f16_insts, | ||
| 1991 | .atomic_ds_pk_add_16_insts, | ||
| 1992 | .atomic_fadd_no_rtn_insts, | ||
| 1993 | .atomic_fadd_rtn_insts, | ||
| 1994 | .atomic_flat_pk_add_16_insts, | ||
| 1995 | .atomic_global_pk_add_bf16_inst, | ||
| 1996 | .back_off_barrier, | ||
| 1997 | .dl_insts, | ||
| 1998 | .dot10_insts, | ||
| 1999 | .dot1_insts, | ||
| 2000 | .dot2_insts, | ||
| 2001 | .dot3_insts, | ||
| 2002 | .dot4_insts, | ||
| 2003 | .dot5_insts, | ||
| 2004 | .dot6_insts, | ||
| 2005 | .dot7_insts, | ||
| 2006 | .dpp_64bit, | ||
| 2007 | .flat_atomic_fadd_f32_inst, | ||
| 2008 | .fma_mix_insts, | ||
| 2009 | .fmacf64_inst, | ||
| 2010 | .fp8_insts, | ||
| 2011 | .full_rate_64_ops, | ||
| 2012 | .gfx9, | ||
| 2013 | .gfx90a_insts, | ||
| 2014 | .gfx940_insts, | ||
| 2015 | .ldsbankcount32, | ||
| 2016 | .mai_insts, | ||
| 2017 | .packed_fp32_ops, | ||
| 2018 | .packed_tid, | ||
| 2019 | .pk_fmac_f16_inst, | ||
| 2020 | .sramecc_support, | ||
| 2021 | }), | ||
| 2022 | }; | ||
| 2023 | pub const hainan = CpuModel{ | ||
| 2024 | .name = "hainan", | ||
| 2025 | .llvm_name = "hainan", | ||
| 2026 | .features = featureSet(&[_]Feature{ | ||
| 2027 | .southern_islands, | ||
| 2028 | }), | ||
| 2029 | }; | ||
| 2030 | pub const hawaii = CpuModel{ | ||
| 2031 | .name = "hawaii", | ||
| 2032 | .llvm_name = "hawaii", | ||
| 2033 | .features = featureSet(&[_]Feature{ | ||
| 2034 | .fast_fmaf, | ||
| 2035 | .half_rate_64_ops, | ||
| 2036 | .ldsbankcount32, | ||
| 2037 | .sea_islands, | ||
| 2038 | }), | ||
| 2039 | }; | ||
| 2040 | pub const iceland = CpuModel{ | ||
| 2041 | .name = "iceland", | ||
| 2042 | .llvm_name = "iceland", | ||
| 2043 | .features = featureSet(&[_]Feature{ | ||
| 2044 | .ldsbankcount32, | ||
| 2045 | .sgpr_init_bug, | ||
| 2046 | .unpacked_d16_vmem, | ||
| 2047 | .volcanic_islands, | ||
| 2048 | }), | ||
| 2049 | }; | ||
| 2050 | pub const kabini = CpuModel{ | ||
| 2051 | .name = "kabini", | ||
| 2052 | .llvm_name = "kabini", | ||
| 2053 | .features = featureSet(&[_]Feature{ | ||
| 2054 | .ldsbankcount16, | ||
| 2055 | .sea_islands, | ||
| 2056 | }), | ||
| 2057 | }; | ||
| 2058 | pub const kaveri = CpuModel{ | ||
| 2059 | .name = "kaveri", | ||
| 2060 | .llvm_name = "kaveri", | ||
| 2061 | .features = featureSet(&[_]Feature{ | ||
| 2062 | .ldsbankcount32, | ||
| 2063 | .sea_islands, | ||
| 2064 | }), | ||
| 2065 | }; | ||
| 2066 | pub const mullins = CpuModel{ | ||
| 2067 | .name = "mullins", | ||
| 2068 | .llvm_name = "mullins", | ||
| 2069 | .features = featureSet(&[_]Feature{ | ||
| 2070 | .ldsbankcount16, | ||
| 2071 | .sea_islands, | ||
| 2072 | }), | ||
| 2073 | }; | ||
| 2074 | pub const oland = CpuModel{ | ||
| 2075 | .name = "oland", | ||
| 2076 | .llvm_name = "oland", | ||
| 2077 | .features = featureSet(&[_]Feature{ | ||
| 2078 | .southern_islands, | ||
| 2079 | }), | ||
| 2080 | }; | ||
| 2081 | pub const pitcairn = CpuModel{ | ||
| 2082 | .name = "pitcairn", | ||
| 2083 | .llvm_name = "pitcairn", | ||
| 2084 | .features = featureSet(&[_]Feature{ | ||
| 2085 | .southern_islands, | ||
| 2086 | }), | ||
| 2087 | }; | ||
| 2088 | pub const polaris10 = CpuModel{ | ||
| 2089 | .name = "polaris10", | ||
| 2090 | .llvm_name = "polaris10", | ||
| 2091 | .features = featureSet(&[_]Feature{ | ||
| 2092 | .ldsbankcount32, | ||
| 2093 | .unpacked_d16_vmem, | ||
| 2094 | .volcanic_islands, | ||
| 2095 | }), | ||
| 2096 | }; | ||
| 2097 | pub const polaris11 = CpuModel{ | ||
| 2098 | .name = "polaris11", | ||
| 2099 | .llvm_name = "polaris11", | ||
| 2100 | .features = featureSet(&[_]Feature{ | ||
| 2101 | .ldsbankcount32, | ||
| 2102 | .unpacked_d16_vmem, | ||
| 2103 | .volcanic_islands, | ||
| 2104 | }), | ||
| 2105 | }; | ||
| 2106 | pub const stoney = CpuModel{ | ||
| 2107 | .name = "stoney", | ||
| 2108 | .llvm_name = "stoney", | ||
| 2109 | .features = featureSet(&[_]Feature{ | ||
| 2110 | .image_gather4_d16_bug, | ||
| 2111 | .image_store_d16_bug, | ||
| 2112 | .ldsbankcount16, | ||
| 2113 | .volcanic_islands, | ||
| 2114 | .xnack_support, | ||
| 2115 | }), | ||
| 2116 | }; | ||
| 2117 | pub const tahiti = CpuModel{ | ||
| 2118 | .name = "tahiti", | ||
| 2119 | .llvm_name = "tahiti", | ||
| 2120 | .features = featureSet(&[_]Feature{ | ||
| 2121 | .fast_fmaf, | ||
| 2122 | .half_rate_64_ops, | ||
| 2123 | .southern_islands, | ||
| 2124 | }), | ||
| 2125 | }; | ||
| 2126 | pub const tonga = CpuModel{ | ||
| 2127 | .name = "tonga", | ||
| 2128 | .llvm_name = "tonga", | ||
| 2129 | .features = featureSet(&[_]Feature{ | ||
| 2130 | .ldsbankcount32, | ||
| 2131 | .sgpr_init_bug, | ||
| 2132 | .unpacked_d16_vmem, | ||
| 2133 | .volcanic_islands, | ||
| 2134 | }), | ||
| 2135 | }; | ||
| 2136 | pub const tongapro = CpuModel{ | ||
| 2137 | .name = "tongapro", | ||
| 2138 | .llvm_name = "tongapro", | ||
| 2139 | .features = featureSet(&[_]Feature{ | ||
| 2140 | .ldsbankcount32, | ||
| 2141 | .sgpr_init_bug, | ||
| 2142 | .unpacked_d16_vmem, | ||
| 2143 | .volcanic_islands, | ||
| 2144 | }), | ||
| 2145 | }; | ||
| 2146 | pub const verde = CpuModel{ | ||
| 2147 | .name = "verde", | ||
| 2148 | .llvm_name = "verde", | ||
| 2149 | .features = featureSet(&[_]Feature{ | ||
| 2150 | .southern_islands, | ||
| 2151 | }), | ||
| 2152 | }; | ||
| 2153 | }; | ||
lib/std/Target/arc.zig created+39
| ... | @@ -0,0 +1,39 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | norm, | ||
| 9 | }; | ||
| 10 | |||
| 11 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 12 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 13 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 14 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 15 | |||
| 16 | pub const all_features = blk: { | ||
| 17 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 18 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 19 | var result: [len]CpuFeature = undefined; | ||
| 20 | result[@intFromEnum(Feature.norm)] = .{ | ||
| 21 | .llvm_name = "norm", | ||
| 22 | .description = "Enable support for norm instruction.", | ||
| 23 | .dependencies = featureSet(&[_]Feature{}), | ||
| 24 | }; | ||
| 25 | const ti = @typeInfo(Feature); | ||
| 26 | for (&result, 0..) |*elem, i| { | ||
| 27 | elem.index = i; | ||
| 28 | elem.name = ti.Enum.fields[i].name; | ||
| 29 | } | ||
| 30 | break :blk result; | ||
| 31 | }; | ||
| 32 | |||
| 33 | pub const cpu = struct { | ||
| 34 | pub const generic = CpuModel{ | ||
| 35 | .name = "generic", | ||
| 36 | .llvm_name = "generic", | ||
| 37 | .features = featureSet(&[_]Feature{}), | ||
| 38 | }; | ||
| 39 | }; | ||
lib/std/Target/arm.zig created+2604
| ... | @@ -0,0 +1,2604 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"32bit", | ||
| 9 | @"8msecext", | ||
| 10 | a76, | ||
| 11 | aapcs_frame_chain, | ||
| 12 | aapcs_frame_chain_leaf, | ||
| 13 | aclass, | ||
| 14 | acquire_release, | ||
| 15 | aes, | ||
| 16 | atomics_32, | ||
| 17 | avoid_movs_shop, | ||
| 18 | avoid_partial_cpsr, | ||
| 19 | bf16, | ||
| 20 | big_endian_instructions, | ||
| 21 | cde, | ||
| 22 | cdecp0, | ||
| 23 | cdecp1, | ||
| 24 | cdecp2, | ||
| 25 | cdecp3, | ||
| 26 | cdecp4, | ||
| 27 | cdecp5, | ||
| 28 | cdecp6, | ||
| 29 | cdecp7, | ||
| 30 | cheap_predicable_cpsr, | ||
| 31 | clrbhb, | ||
| 32 | crc, | ||
| 33 | crypto, | ||
| 34 | d32, | ||
| 35 | db, | ||
| 36 | dfb, | ||
| 37 | disable_postra_scheduler, | ||
| 38 | dont_widen_vmovs, | ||
| 39 | dotprod, | ||
| 40 | dsp, | ||
| 41 | execute_only, | ||
| 42 | expand_fp_mlx, | ||
| 43 | exynos, | ||
| 44 | fix_cmse_cve_2021_35465, | ||
| 45 | fix_cortex_a57_aes_1742098, | ||
| 46 | fp16, | ||
| 47 | fp16fml, | ||
| 48 | fp64, | ||
| 49 | fp_armv8, | ||
| 50 | fp_armv8d16, | ||
| 51 | fp_armv8d16sp, | ||
| 52 | fp_armv8sp, | ||
| 53 | fpao, | ||
| 54 | fpregs, | ||
| 55 | fpregs16, | ||
| 56 | fpregs64, | ||
| 57 | fullfp16, | ||
| 58 | fuse_aes, | ||
| 59 | fuse_literals, | ||
| 60 | harden_sls_blr, | ||
| 61 | harden_sls_nocomdat, | ||
| 62 | harden_sls_retbr, | ||
| 63 | has_v4t, | ||
| 64 | has_v5t, | ||
| 65 | has_v5te, | ||
| 66 | has_v6, | ||
| 67 | has_v6k, | ||
| 68 | has_v6m, | ||
| 69 | has_v6t2, | ||
| 70 | has_v7, | ||
| 71 | has_v7clrex, | ||
| 72 | has_v8, | ||
| 73 | has_v8_1a, | ||
| 74 | has_v8_1m_main, | ||
| 75 | has_v8_2a, | ||
| 76 | has_v8_3a, | ||
| 77 | has_v8_4a, | ||
| 78 | has_v8_5a, | ||
| 79 | has_v8_6a, | ||
| 80 | has_v8_7a, | ||
| 81 | has_v8_8a, | ||
| 82 | has_v8_9a, | ||
| 83 | has_v8m, | ||
| 84 | has_v8m_main, | ||
| 85 | has_v9_1a, | ||
| 86 | has_v9_2a, | ||
| 87 | has_v9_3a, | ||
| 88 | has_v9_4a, | ||
| 89 | has_v9a, | ||
| 90 | hwdiv, | ||
| 91 | hwdiv_arm, | ||
| 92 | i8mm, | ||
| 93 | iwmmxt, | ||
| 94 | iwmmxt2, | ||
| 95 | lob, | ||
| 96 | long_calls, | ||
| 97 | loop_align, | ||
| 98 | m3, | ||
| 99 | mclass, | ||
| 100 | mp, | ||
| 101 | muxed_units, | ||
| 102 | mve, | ||
| 103 | mve1beat, | ||
| 104 | mve2beat, | ||
| 105 | mve4beat, | ||
| 106 | mve_fp, | ||
| 107 | nacl_trap, | ||
| 108 | neon, | ||
| 109 | neon_fpmovs, | ||
| 110 | neonfp, | ||
| 111 | no_branch_predictor, | ||
| 112 | no_bti_at_return_twice, | ||
| 113 | no_movt, | ||
| 114 | no_neg_immediates, | ||
| 115 | noarm, | ||
| 116 | nonpipelined_vfp, | ||
| 117 | pacbti, | ||
| 118 | perfmon, | ||
| 119 | prefer_ishst, | ||
| 120 | prefer_vmovsr, | ||
| 121 | prof_unpr, | ||
| 122 | r4, | ||
| 123 | ras, | ||
| 124 | rclass, | ||
| 125 | read_tp_tpidrprw, | ||
| 126 | read_tp_tpidruro, | ||
| 127 | read_tp_tpidrurw, | ||
| 128 | reserve_r9, | ||
| 129 | ret_addr_stack, | ||
| 130 | sb, | ||
| 131 | sha2, | ||
| 132 | slow_fp_brcc, | ||
| 133 | slow_load_D_subreg, | ||
| 134 | slow_odd_reg, | ||
| 135 | slow_vdup32, | ||
| 136 | slow_vgetlni32, | ||
| 137 | slowfpvfmx, | ||
| 138 | slowfpvmlx, | ||
| 139 | soft_float, | ||
| 140 | splat_vfp_neon, | ||
| 141 | strict_align, | ||
| 142 | swift, | ||
| 143 | thumb2, | ||
| 144 | thumb_mode, | ||
| 145 | trustzone, | ||
| 146 | use_mipipeliner, | ||
| 147 | use_misched, | ||
| 148 | v2, | ||
| 149 | v2a, | ||
| 150 | v3, | ||
| 151 | v3m, | ||
| 152 | v4, | ||
| 153 | v4t, | ||
| 154 | v5t, | ||
| 155 | v5te, | ||
| 156 | v5tej, | ||
| 157 | v6, | ||
| 158 | v6j, | ||
| 159 | v6k, | ||
| 160 | v6kz, | ||
| 161 | v6m, | ||
| 162 | v6sm, | ||
| 163 | v6t2, | ||
| 164 | v7a, | ||
| 165 | v7em, | ||
| 166 | v7k, | ||
| 167 | v7m, | ||
| 168 | v7r, | ||
| 169 | v7s, | ||
| 170 | v7ve, | ||
| 171 | v8_1a, | ||
| 172 | v8_1m_main, | ||
| 173 | v8_2a, | ||
| 174 | v8_3a, | ||
| 175 | v8_4a, | ||
| 176 | v8_5a, | ||
| 177 | v8_6a, | ||
| 178 | v8_7a, | ||
| 179 | v8_8a, | ||
| 180 | v8_9a, | ||
| 181 | v8a, | ||
| 182 | v8m, | ||
| 183 | v8m_main, | ||
| 184 | v8r, | ||
| 185 | v9_1a, | ||
| 186 | v9_2a, | ||
| 187 | v9_3a, | ||
| 188 | v9_4a, | ||
| 189 | v9a, | ||
| 190 | vfp2, | ||
| 191 | vfp2sp, | ||
| 192 | vfp3, | ||
| 193 | vfp3d16, | ||
| 194 | vfp3d16sp, | ||
| 195 | vfp3sp, | ||
| 196 | vfp4, | ||
| 197 | vfp4d16, | ||
| 198 | vfp4d16sp, | ||
| 199 | vfp4sp, | ||
| 200 | virtualization, | ||
| 201 | vldn_align, | ||
| 202 | vmlx_forwarding, | ||
| 203 | vmlx_hazards, | ||
| 204 | wide_stride_vfp, | ||
| 205 | xscale, | ||
| 206 | zcz, | ||
| 207 | }; | ||
| 208 | |||
| 209 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 210 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 211 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 212 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 213 | |||
| 214 | pub const all_features = blk: { | ||
| 215 | @setEvalBranchQuota(10000); | ||
| 216 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 217 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 218 | var result: [len]CpuFeature = undefined; | ||
| 219 | result[@intFromEnum(Feature.@"32bit")] = .{ | ||
| 220 | .llvm_name = "32bit", | ||
| 221 | .description = "Prefer 32-bit Thumb instrs", | ||
| 222 | .dependencies = featureSet(&[_]Feature{}), | ||
| 223 | }; | ||
| 224 | result[@intFromEnum(Feature.@"8msecext")] = .{ | ||
| 225 | .llvm_name = "8msecext", | ||
| 226 | .description = "Enable support for ARMv8-M Security Extensions", | ||
| 227 | .dependencies = featureSet(&[_]Feature{}), | ||
| 228 | }; | ||
| 229 | result[@intFromEnum(Feature.a76)] = .{ | ||
| 230 | .llvm_name = "a76", | ||
| 231 | .description = "Cortex-A76 ARM processors", | ||
| 232 | .dependencies = featureSet(&[_]Feature{}), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.aapcs_frame_chain)] = .{ | ||
| 235 | .llvm_name = "aapcs-frame-chain", | ||
| 236 | .description = "Create an AAPCS compliant frame chain", | ||
| 237 | .dependencies = featureSet(&[_]Feature{}), | ||
| 238 | }; | ||
| 239 | result[@intFromEnum(Feature.aapcs_frame_chain_leaf)] = .{ | ||
| 240 | .llvm_name = "aapcs-frame-chain-leaf", | ||
| 241 | .description = "Create an AAPCS compliant frame chain for leaf functions", | ||
| 242 | .dependencies = featureSet(&[_]Feature{ | ||
| 243 | .aapcs_frame_chain, | ||
| 244 | }), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.aclass)] = .{ | ||
| 247 | .llvm_name = "aclass", | ||
| 248 | .description = "Is application profile ('A' series)", | ||
| 249 | .dependencies = featureSet(&[_]Feature{}), | ||
| 250 | }; | ||
| 251 | result[@intFromEnum(Feature.acquire_release)] = .{ | ||
| 252 | .llvm_name = "acquire-release", | ||
| 253 | .description = "Has v8 acquire/release (lda/ldaex etc) instructions", | ||
| 254 | .dependencies = featureSet(&[_]Feature{}), | ||
| 255 | }; | ||
| 256 | result[@intFromEnum(Feature.aes)] = .{ | ||
| 257 | .llvm_name = "aes", | ||
| 258 | .description = "Enable AES support", | ||
| 259 | .dependencies = featureSet(&[_]Feature{ | ||
| 260 | .neon, | ||
| 261 | }), | ||
| 262 | }; | ||
| 263 | result[@intFromEnum(Feature.atomics_32)] = .{ | ||
| 264 | .llvm_name = "atomics-32", | ||
| 265 | .description = "Assume that lock-free 32-bit atomics are available", | ||
| 266 | .dependencies = featureSet(&[_]Feature{}), | ||
| 267 | }; | ||
| 268 | result[@intFromEnum(Feature.avoid_movs_shop)] = .{ | ||
| 269 | .llvm_name = "avoid-movs-shop", | ||
| 270 | .description = "Avoid movs instructions with shifter operand", | ||
| 271 | .dependencies = featureSet(&[_]Feature{}), | ||
| 272 | }; | ||
| 273 | result[@intFromEnum(Feature.avoid_partial_cpsr)] = .{ | ||
| 274 | .llvm_name = "avoid-partial-cpsr", | ||
| 275 | .description = "Avoid CPSR partial update for OOO execution", | ||
| 276 | .dependencies = featureSet(&[_]Feature{}), | ||
| 277 | }; | ||
| 278 | result[@intFromEnum(Feature.bf16)] = .{ | ||
| 279 | .llvm_name = "bf16", | ||
| 280 | .description = "Enable support for BFloat16 instructions", | ||
| 281 | .dependencies = featureSet(&[_]Feature{ | ||
| 282 | .neon, | ||
| 283 | }), | ||
| 284 | }; | ||
| 285 | result[@intFromEnum(Feature.big_endian_instructions)] = .{ | ||
| 286 | .llvm_name = "big-endian-instructions", | ||
| 287 | .description = "Expect instructions to be stored big-endian.", | ||
| 288 | .dependencies = featureSet(&[_]Feature{}), | ||
| 289 | }; | ||
| 290 | result[@intFromEnum(Feature.cde)] = .{ | ||
| 291 | .llvm_name = "cde", | ||
| 292 | .description = "Support CDE instructions", | ||
| 293 | .dependencies = featureSet(&[_]Feature{ | ||
| 294 | .has_v8m_main, | ||
| 295 | }), | ||
| 296 | }; | ||
| 297 | result[@intFromEnum(Feature.cdecp0)] = .{ | ||
| 298 | .llvm_name = "cdecp0", | ||
| 299 | .description = "Coprocessor 0 ISA is CDEv1", | ||
| 300 | .dependencies = featureSet(&[_]Feature{ | ||
| 301 | .cde, | ||
| 302 | }), | ||
| 303 | }; | ||
| 304 | result[@intFromEnum(Feature.cdecp1)] = .{ | ||
| 305 | .llvm_name = "cdecp1", | ||
| 306 | .description = "Coprocessor 1 ISA is CDEv1", | ||
| 307 | .dependencies = featureSet(&[_]Feature{ | ||
| 308 | .cde, | ||
| 309 | }), | ||
| 310 | }; | ||
| 311 | result[@intFromEnum(Feature.cdecp2)] = .{ | ||
| 312 | .llvm_name = "cdecp2", | ||
| 313 | .description = "Coprocessor 2 ISA is CDEv1", | ||
| 314 | .dependencies = featureSet(&[_]Feature{ | ||
| 315 | .cde, | ||
| 316 | }), | ||
| 317 | }; | ||
| 318 | result[@intFromEnum(Feature.cdecp3)] = .{ | ||
| 319 | .llvm_name = "cdecp3", | ||
| 320 | .description = "Coprocessor 3 ISA is CDEv1", | ||
| 321 | .dependencies = featureSet(&[_]Feature{ | ||
| 322 | .cde, | ||
| 323 | }), | ||
| 324 | }; | ||
| 325 | result[@intFromEnum(Feature.cdecp4)] = .{ | ||
| 326 | .llvm_name = "cdecp4", | ||
| 327 | .description = "Coprocessor 4 ISA is CDEv1", | ||
| 328 | .dependencies = featureSet(&[_]Feature{ | ||
| 329 | .cde, | ||
| 330 | }), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.cdecp5)] = .{ | ||
| 333 | .llvm_name = "cdecp5", | ||
| 334 | .description = "Coprocessor 5 ISA is CDEv1", | ||
| 335 | .dependencies = featureSet(&[_]Feature{ | ||
| 336 | .cde, | ||
| 337 | }), | ||
| 338 | }; | ||
| 339 | result[@intFromEnum(Feature.cdecp6)] = .{ | ||
| 340 | .llvm_name = "cdecp6", | ||
| 341 | .description = "Coprocessor 6 ISA is CDEv1", | ||
| 342 | .dependencies = featureSet(&[_]Feature{ | ||
| 343 | .cde, | ||
| 344 | }), | ||
| 345 | }; | ||
| 346 | result[@intFromEnum(Feature.cdecp7)] = .{ | ||
| 347 | .llvm_name = "cdecp7", | ||
| 348 | .description = "Coprocessor 7 ISA is CDEv1", | ||
| 349 | .dependencies = featureSet(&[_]Feature{ | ||
| 350 | .cde, | ||
| 351 | }), | ||
| 352 | }; | ||
| 353 | result[@intFromEnum(Feature.cheap_predicable_cpsr)] = .{ | ||
| 354 | .llvm_name = "cheap-predicable-cpsr", | ||
| 355 | .description = "Disable +1 predication cost for instructions updating CPSR", | ||
| 356 | .dependencies = featureSet(&[_]Feature{}), | ||
| 357 | }; | ||
| 358 | result[@intFromEnum(Feature.clrbhb)] = .{ | ||
| 359 | .llvm_name = "clrbhb", | ||
| 360 | .description = "Enable Clear BHB instruction", | ||
| 361 | .dependencies = featureSet(&[_]Feature{}), | ||
| 362 | }; | ||
| 363 | result[@intFromEnum(Feature.crc)] = .{ | ||
| 364 | .llvm_name = "crc", | ||
| 365 | .description = "Enable support for CRC instructions", | ||
| 366 | .dependencies = featureSet(&[_]Feature{}), | ||
| 367 | }; | ||
| 368 | result[@intFromEnum(Feature.crypto)] = .{ | ||
| 369 | .llvm_name = "crypto", | ||
| 370 | .description = "Enable support for Cryptography extensions", | ||
| 371 | .dependencies = featureSet(&[_]Feature{ | ||
| 372 | .aes, | ||
| 373 | .sha2, | ||
| 374 | }), | ||
| 375 | }; | ||
| 376 | result[@intFromEnum(Feature.d32)] = .{ | ||
| 377 | .llvm_name = "d32", | ||
| 378 | .description = "Extend FP to 32 double registers", | ||
| 379 | .dependencies = featureSet(&[_]Feature{}), | ||
| 380 | }; | ||
| 381 | result[@intFromEnum(Feature.db)] = .{ | ||
| 382 | .llvm_name = "db", | ||
| 383 | .description = "Has data barrier (dmb/dsb) instructions", | ||
| 384 | .dependencies = featureSet(&[_]Feature{}), | ||
| 385 | }; | ||
| 386 | result[@intFromEnum(Feature.dfb)] = .{ | ||
| 387 | .llvm_name = "dfb", | ||
| 388 | .description = "Has full data barrier (dfb) instruction", | ||
| 389 | .dependencies = featureSet(&[_]Feature{}), | ||
| 390 | }; | ||
| 391 | result[@intFromEnum(Feature.disable_postra_scheduler)] = .{ | ||
| 392 | .llvm_name = "disable-postra-scheduler", | ||
| 393 | .description = "Don't schedule again after register allocation", | ||
| 394 | .dependencies = featureSet(&[_]Feature{}), | ||
| 395 | }; | ||
| 396 | result[@intFromEnum(Feature.dont_widen_vmovs)] = .{ | ||
| 397 | .llvm_name = "dont-widen-vmovs", | ||
| 398 | .description = "Don't widen VMOVS to VMOVD", | ||
| 399 | .dependencies = featureSet(&[_]Feature{}), | ||
| 400 | }; | ||
| 401 | result[@intFromEnum(Feature.dotprod)] = .{ | ||
| 402 | .llvm_name = "dotprod", | ||
| 403 | .description = "Enable support for dot product instructions", | ||
| 404 | .dependencies = featureSet(&[_]Feature{ | ||
| 405 | .neon, | ||
| 406 | }), | ||
| 407 | }; | ||
| 408 | result[@intFromEnum(Feature.dsp)] = .{ | ||
| 409 | .llvm_name = "dsp", | ||
| 410 | .description = "Supports DSP instructions in ARM and/or Thumb2", | ||
| 411 | .dependencies = featureSet(&[_]Feature{}), | ||
| 412 | }; | ||
| 413 | result[@intFromEnum(Feature.execute_only)] = .{ | ||
| 414 | .llvm_name = "execute-only", | ||
| 415 | .description = "Enable the generation of execute only code.", | ||
| 416 | .dependencies = featureSet(&[_]Feature{}), | ||
| 417 | }; | ||
| 418 | result[@intFromEnum(Feature.expand_fp_mlx)] = .{ | ||
| 419 | .llvm_name = "expand-fp-mlx", | ||
| 420 | .description = "Expand VFP/NEON MLA/MLS instructions", | ||
| 421 | .dependencies = featureSet(&[_]Feature{}), | ||
| 422 | }; | ||
| 423 | result[@intFromEnum(Feature.exynos)] = .{ | ||
| 424 | .llvm_name = "exynos", | ||
| 425 | .description = "Samsung Exynos processors", | ||
| 426 | .dependencies = featureSet(&[_]Feature{ | ||
| 427 | .crc, | ||
| 428 | .crypto, | ||
| 429 | .expand_fp_mlx, | ||
| 430 | .fuse_aes, | ||
| 431 | .fuse_literals, | ||
| 432 | .hwdiv, | ||
| 433 | .hwdiv_arm, | ||
| 434 | .prof_unpr, | ||
| 435 | .ret_addr_stack, | ||
| 436 | .slow_fp_brcc, | ||
| 437 | .slow_vdup32, | ||
| 438 | .slow_vgetlni32, | ||
| 439 | .slowfpvfmx, | ||
| 440 | .slowfpvmlx, | ||
| 441 | .splat_vfp_neon, | ||
| 442 | .wide_stride_vfp, | ||
| 443 | .zcz, | ||
| 444 | }), | ||
| 445 | }; | ||
| 446 | result[@intFromEnum(Feature.fix_cmse_cve_2021_35465)] = .{ | ||
| 447 | .llvm_name = "fix-cmse-cve-2021-35465", | ||
| 448 | .description = "Mitigate against the cve-2021-35465 security vulnurability", | ||
| 449 | .dependencies = featureSet(&[_]Feature{}), | ||
| 450 | }; | ||
| 451 | result[@intFromEnum(Feature.fix_cortex_a57_aes_1742098)] = .{ | ||
| 452 | .llvm_name = "fix-cortex-a57-aes-1742098", | ||
| 453 | .description = "Work around Cortex-A57 Erratum 1742098 / Cortex-A72 Erratum 1655431 (AES)", | ||
| 454 | .dependencies = featureSet(&[_]Feature{}), | ||
| 455 | }; | ||
| 456 | result[@intFromEnum(Feature.fp16)] = .{ | ||
| 457 | .llvm_name = "fp16", | ||
| 458 | .description = "Enable half-precision floating point", | ||
| 459 | .dependencies = featureSet(&[_]Feature{}), | ||
| 460 | }; | ||
| 461 | result[@intFromEnum(Feature.fp16fml)] = .{ | ||
| 462 | .llvm_name = "fp16fml", | ||
| 463 | .description = "Enable full half-precision floating point fml instructions", | ||
| 464 | .dependencies = featureSet(&[_]Feature{ | ||
| 465 | .fullfp16, | ||
| 466 | }), | ||
| 467 | }; | ||
| 468 | result[@intFromEnum(Feature.fp64)] = .{ | ||
| 469 | .llvm_name = "fp64", | ||
| 470 | .description = "Floating point unit supports double precision", | ||
| 471 | .dependencies = featureSet(&[_]Feature{ | ||
| 472 | .fpregs64, | ||
| 473 | }), | ||
| 474 | }; | ||
| 475 | result[@intFromEnum(Feature.fp_armv8)] = .{ | ||
| 476 | .llvm_name = "fp-armv8", | ||
| 477 | .description = "Enable ARMv8 FP", | ||
| 478 | .dependencies = featureSet(&[_]Feature{ | ||
| 479 | .fp_armv8d16, | ||
| 480 | .fp_armv8sp, | ||
| 481 | .vfp4, | ||
| 482 | }), | ||
| 483 | }; | ||
| 484 | result[@intFromEnum(Feature.fp_armv8d16)] = .{ | ||
| 485 | .llvm_name = "fp-armv8d16", | ||
| 486 | .description = "Enable ARMv8 FP with only 16 d-registers", | ||
| 487 | .dependencies = featureSet(&[_]Feature{ | ||
| 488 | .fp_armv8d16sp, | ||
| 489 | .vfp4d16, | ||
| 490 | }), | ||
| 491 | }; | ||
| 492 | result[@intFromEnum(Feature.fp_armv8d16sp)] = .{ | ||
| 493 | .llvm_name = "fp-armv8d16sp", | ||
| 494 | .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", | ||
| 495 | .dependencies = featureSet(&[_]Feature{ | ||
| 496 | .vfp4d16sp, | ||
| 497 | }), | ||
| 498 | }; | ||
| 499 | result[@intFromEnum(Feature.fp_armv8sp)] = .{ | ||
| 500 | .llvm_name = "fp-armv8sp", | ||
| 501 | .description = "Enable ARMv8 FP with no double precision", | ||
| 502 | .dependencies = featureSet(&[_]Feature{ | ||
| 503 | .fp_armv8d16sp, | ||
| 504 | .vfp4sp, | ||
| 505 | }), | ||
| 506 | }; | ||
| 507 | result[@intFromEnum(Feature.fpao)] = .{ | ||
| 508 | .llvm_name = "fpao", | ||
| 509 | .description = "Enable fast computation of positive address offsets", | ||
| 510 | .dependencies = featureSet(&[_]Feature{}), | ||
| 511 | }; | ||
| 512 | result[@intFromEnum(Feature.fpregs)] = .{ | ||
| 513 | .llvm_name = "fpregs", | ||
| 514 | .description = "Enable FP registers", | ||
| 515 | .dependencies = featureSet(&[_]Feature{}), | ||
| 516 | }; | ||
| 517 | result[@intFromEnum(Feature.fpregs16)] = .{ | ||
| 518 | .llvm_name = "fpregs16", | ||
| 519 | .description = "Enable 16-bit FP registers", | ||
| 520 | .dependencies = featureSet(&[_]Feature{ | ||
| 521 | .fpregs, | ||
| 522 | }), | ||
| 523 | }; | ||
| 524 | result[@intFromEnum(Feature.fpregs64)] = .{ | ||
| 525 | .llvm_name = "fpregs64", | ||
| 526 | .description = "Enable 64-bit FP registers", | ||
| 527 | .dependencies = featureSet(&[_]Feature{ | ||
| 528 | .fpregs, | ||
| 529 | }), | ||
| 530 | }; | ||
| 531 | result[@intFromEnum(Feature.fullfp16)] = .{ | ||
| 532 | .llvm_name = "fullfp16", | ||
| 533 | .description = "Enable full half-precision floating point", | ||
| 534 | .dependencies = featureSet(&[_]Feature{ | ||
| 535 | .fp_armv8d16sp, | ||
| 536 | .fpregs16, | ||
| 537 | }), | ||
| 538 | }; | ||
| 539 | result[@intFromEnum(Feature.fuse_aes)] = .{ | ||
| 540 | .llvm_name = "fuse-aes", | ||
| 541 | .description = "CPU fuses AES crypto operations", | ||
| 542 | .dependencies = featureSet(&[_]Feature{}), | ||
| 543 | }; | ||
| 544 | result[@intFromEnum(Feature.fuse_literals)] = .{ | ||
| 545 | .llvm_name = "fuse-literals", | ||
| 546 | .description = "CPU fuses literal generation operations", | ||
| 547 | .dependencies = featureSet(&[_]Feature{}), | ||
| 548 | }; | ||
| 549 | result[@intFromEnum(Feature.harden_sls_blr)] = .{ | ||
| 550 | .llvm_name = "harden-sls-blr", | ||
| 551 | .description = "Harden against straight line speculation across indirect calls", | ||
| 552 | .dependencies = featureSet(&[_]Feature{}), | ||
| 553 | }; | ||
| 554 | result[@intFromEnum(Feature.harden_sls_nocomdat)] = .{ | ||
| 555 | .llvm_name = "harden-sls-nocomdat", | ||
| 556 | .description = "Generate thunk code for SLS mitigation in the normal text section", | ||
| 557 | .dependencies = featureSet(&[_]Feature{}), | ||
| 558 | }; | ||
| 559 | result[@intFromEnum(Feature.harden_sls_retbr)] = .{ | ||
| 560 | .llvm_name = "harden-sls-retbr", | ||
| 561 | .description = "Harden against straight line speculation across RETurn and BranchRegister instructions", | ||
| 562 | .dependencies = featureSet(&[_]Feature{}), | ||
| 563 | }; | ||
| 564 | result[@intFromEnum(Feature.has_v4t)] = .{ | ||
| 565 | .llvm_name = "v4t", | ||
| 566 | .description = "Support ARM v4T instructions", | ||
| 567 | .dependencies = featureSet(&[_]Feature{}), | ||
| 568 | }; | ||
| 569 | result[@intFromEnum(Feature.has_v5t)] = .{ | ||
| 570 | .llvm_name = "v5t", | ||
| 571 | .description = "Support ARM v5T instructions", | ||
| 572 | .dependencies = featureSet(&[_]Feature{ | ||
| 573 | .has_v4t, | ||
| 574 | }), | ||
| 575 | }; | ||
| 576 | result[@intFromEnum(Feature.has_v5te)] = .{ | ||
| 577 | .llvm_name = "v5te", | ||
| 578 | .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", | ||
| 579 | .dependencies = featureSet(&[_]Feature{ | ||
| 580 | .has_v5t, | ||
| 581 | }), | ||
| 582 | }; | ||
| 583 | result[@intFromEnum(Feature.has_v6)] = .{ | ||
| 584 | .llvm_name = "v6", | ||
| 585 | .description = "Support ARM v6 instructions", | ||
| 586 | .dependencies = featureSet(&[_]Feature{ | ||
| 587 | .has_v5te, | ||
| 588 | }), | ||
| 589 | }; | ||
| 590 | result[@intFromEnum(Feature.has_v6k)] = .{ | ||
| 591 | .llvm_name = "v6k", | ||
| 592 | .description = "Support ARM v6k instructions", | ||
| 593 | .dependencies = featureSet(&[_]Feature{ | ||
| 594 | .has_v6, | ||
| 595 | }), | ||
| 596 | }; | ||
| 597 | result[@intFromEnum(Feature.has_v6m)] = .{ | ||
| 598 | .llvm_name = "v6m", | ||
| 599 | .description = "Support ARM v6M instructions", | ||
| 600 | .dependencies = featureSet(&[_]Feature{ | ||
| 601 | .has_v6, | ||
| 602 | }), | ||
| 603 | }; | ||
| 604 | result[@intFromEnum(Feature.has_v6t2)] = .{ | ||
| 605 | .llvm_name = "v6t2", | ||
| 606 | .description = "Support ARM v6t2 instructions", | ||
| 607 | .dependencies = featureSet(&[_]Feature{ | ||
| 608 | .has_v6k, | ||
| 609 | .has_v8m, | ||
| 610 | .thumb2, | ||
| 611 | }), | ||
| 612 | }; | ||
| 613 | result[@intFromEnum(Feature.has_v7)] = .{ | ||
| 614 | .llvm_name = "v7", | ||
| 615 | .description = "Support ARM v7 instructions", | ||
| 616 | .dependencies = featureSet(&[_]Feature{ | ||
| 617 | .has_v6t2, | ||
| 618 | .has_v7clrex, | ||
| 619 | }), | ||
| 620 | }; | ||
| 621 | result[@intFromEnum(Feature.has_v7clrex)] = .{ | ||
| 622 | .llvm_name = "v7clrex", | ||
| 623 | .description = "Has v7 clrex instruction", | ||
| 624 | .dependencies = featureSet(&[_]Feature{}), | ||
| 625 | }; | ||
| 626 | result[@intFromEnum(Feature.has_v8)] = .{ | ||
| 627 | .llvm_name = "v8", | ||
| 628 | .description = "Support ARM v8 instructions", | ||
| 629 | .dependencies = featureSet(&[_]Feature{ | ||
| 630 | .acquire_release, | ||
| 631 | .has_v7, | ||
| 632 | .perfmon, | ||
| 633 | }), | ||
| 634 | }; | ||
| 635 | result[@intFromEnum(Feature.has_v8_1a)] = .{ | ||
| 636 | .llvm_name = "v8.1a", | ||
| 637 | .description = "Support ARM v8.1a instructions", | ||
| 638 | .dependencies = featureSet(&[_]Feature{ | ||
| 639 | .has_v8, | ||
| 640 | }), | ||
| 641 | }; | ||
| 642 | result[@intFromEnum(Feature.has_v8_1m_main)] = .{ | ||
| 643 | .llvm_name = "v8.1m.main", | ||
| 644 | .description = "Support ARM v8-1M Mainline instructions", | ||
| 645 | .dependencies = featureSet(&[_]Feature{ | ||
| 646 | .has_v8m_main, | ||
| 647 | }), | ||
| 648 | }; | ||
| 649 | result[@intFromEnum(Feature.has_v8_2a)] = .{ | ||
| 650 | .llvm_name = "v8.2a", | ||
| 651 | .description = "Support ARM v8.2a instructions", | ||
| 652 | .dependencies = featureSet(&[_]Feature{ | ||
| 653 | .has_v8_1a, | ||
| 654 | }), | ||
| 655 | }; | ||
| 656 | result[@intFromEnum(Feature.has_v8_3a)] = .{ | ||
| 657 | .llvm_name = "v8.3a", | ||
| 658 | .description = "Support ARM v8.3a instructions", | ||
| 659 | .dependencies = featureSet(&[_]Feature{ | ||
| 660 | .has_v8_2a, | ||
| 661 | }), | ||
| 662 | }; | ||
| 663 | result[@intFromEnum(Feature.has_v8_4a)] = .{ | ||
| 664 | .llvm_name = "v8.4a", | ||
| 665 | .description = "Support ARM v8.4a instructions", | ||
| 666 | .dependencies = featureSet(&[_]Feature{ | ||
| 667 | .dotprod, | ||
| 668 | .has_v8_3a, | ||
| 669 | }), | ||
| 670 | }; | ||
| 671 | result[@intFromEnum(Feature.has_v8_5a)] = .{ | ||
| 672 | .llvm_name = "v8.5a", | ||
| 673 | .description = "Support ARM v8.5a instructions", | ||
| 674 | .dependencies = featureSet(&[_]Feature{ | ||
| 675 | .has_v8_4a, | ||
| 676 | .sb, | ||
| 677 | }), | ||
| 678 | }; | ||
| 679 | result[@intFromEnum(Feature.has_v8_6a)] = .{ | ||
| 680 | .llvm_name = "v8.6a", | ||
| 681 | .description = "Support ARM v8.6a instructions", | ||
| 682 | .dependencies = featureSet(&[_]Feature{ | ||
| 683 | .bf16, | ||
| 684 | .has_v8_5a, | ||
| 685 | .i8mm, | ||
| 686 | }), | ||
| 687 | }; | ||
| 688 | result[@intFromEnum(Feature.has_v8_7a)] = .{ | ||
| 689 | .llvm_name = "v8.7a", | ||
| 690 | .description = "Support ARM v8.7a instructions", | ||
| 691 | .dependencies = featureSet(&[_]Feature{ | ||
| 692 | .has_v8_6a, | ||
| 693 | }), | ||
| 694 | }; | ||
| 695 | result[@intFromEnum(Feature.has_v8_8a)] = .{ | ||
| 696 | .llvm_name = "v8.8a", | ||
| 697 | .description = "Support ARM v8.8a instructions", | ||
| 698 | .dependencies = featureSet(&[_]Feature{ | ||
| 699 | .has_v8_7a, | ||
| 700 | }), | ||
| 701 | }; | ||
| 702 | result[@intFromEnum(Feature.has_v8_9a)] = .{ | ||
| 703 | .llvm_name = "v8.9a", | ||
| 704 | .description = "Support ARM v8.9a instructions", | ||
| 705 | .dependencies = featureSet(&[_]Feature{ | ||
| 706 | .clrbhb, | ||
| 707 | .has_v8_8a, | ||
| 708 | }), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.has_v8m)] = .{ | ||
| 711 | .llvm_name = "v8m", | ||
| 712 | .description = "Support ARM v8M Baseline instructions", | ||
| 713 | .dependencies = featureSet(&[_]Feature{ | ||
| 714 | .has_v6m, | ||
| 715 | }), | ||
| 716 | }; | ||
| 717 | result[@intFromEnum(Feature.has_v8m_main)] = .{ | ||
| 718 | .llvm_name = "v8m.main", | ||
| 719 | .description = "Support ARM v8M Mainline instructions", | ||
| 720 | .dependencies = featureSet(&[_]Feature{ | ||
| 721 | .has_v7, | ||
| 722 | }), | ||
| 723 | }; | ||
| 724 | result[@intFromEnum(Feature.has_v9_1a)] = .{ | ||
| 725 | .llvm_name = "v9.1a", | ||
| 726 | .description = "Support ARM v9.1a instructions", | ||
| 727 | .dependencies = featureSet(&[_]Feature{ | ||
| 728 | .has_v8_6a, | ||
| 729 | .has_v9a, | ||
| 730 | }), | ||
| 731 | }; | ||
| 732 | result[@intFromEnum(Feature.has_v9_2a)] = .{ | ||
| 733 | .llvm_name = "v9.2a", | ||
| 734 | .description = "Support ARM v9.2a instructions", | ||
| 735 | .dependencies = featureSet(&[_]Feature{ | ||
| 736 | .has_v8_7a, | ||
| 737 | .has_v9_1a, | ||
| 738 | }), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.has_v9_3a)] = .{ | ||
| 741 | .llvm_name = "v9.3a", | ||
| 742 | .description = "Support ARM v9.3a instructions", | ||
| 743 | .dependencies = featureSet(&[_]Feature{ | ||
| 744 | .has_v8_8a, | ||
| 745 | .has_v9_2a, | ||
| 746 | }), | ||
| 747 | }; | ||
| 748 | result[@intFromEnum(Feature.has_v9_4a)] = .{ | ||
| 749 | .llvm_name = "v9.4a", | ||
| 750 | .description = "Support ARM v9.4a instructions", | ||
| 751 | .dependencies = featureSet(&[_]Feature{ | ||
| 752 | .has_v8_9a, | ||
| 753 | .has_v9_3a, | ||
| 754 | }), | ||
| 755 | }; | ||
| 756 | result[@intFromEnum(Feature.has_v9a)] = .{ | ||
| 757 | .llvm_name = "v9a", | ||
| 758 | .description = "Support ARM v9a instructions", | ||
| 759 | .dependencies = featureSet(&[_]Feature{ | ||
| 760 | .has_v8_5a, | ||
| 761 | }), | ||
| 762 | }; | ||
| 763 | result[@intFromEnum(Feature.hwdiv)] = .{ | ||
| 764 | .llvm_name = "hwdiv", | ||
| 765 | .description = "Enable divide instructions in Thumb", | ||
| 766 | .dependencies = featureSet(&[_]Feature{}), | ||
| 767 | }; | ||
| 768 | result[@intFromEnum(Feature.hwdiv_arm)] = .{ | ||
| 769 | .llvm_name = "hwdiv-arm", | ||
| 770 | .description = "Enable divide instructions in ARM mode", | ||
| 771 | .dependencies = featureSet(&[_]Feature{}), | ||
| 772 | }; | ||
| 773 | result[@intFromEnum(Feature.i8mm)] = .{ | ||
| 774 | .llvm_name = "i8mm", | ||
| 775 | .description = "Enable Matrix Multiply Int8 Extension", | ||
| 776 | .dependencies = featureSet(&[_]Feature{ | ||
| 777 | .neon, | ||
| 778 | }), | ||
| 779 | }; | ||
| 780 | result[@intFromEnum(Feature.iwmmxt)] = .{ | ||
| 781 | .llvm_name = "iwmmxt", | ||
| 782 | .description = "ARMv5te architecture", | ||
| 783 | .dependencies = featureSet(&[_]Feature{ | ||
| 784 | .v5te, | ||
| 785 | }), | ||
| 786 | }; | ||
| 787 | result[@intFromEnum(Feature.iwmmxt2)] = .{ | ||
| 788 | .llvm_name = "iwmmxt2", | ||
| 789 | .description = "ARMv5te architecture", | ||
| 790 | .dependencies = featureSet(&[_]Feature{ | ||
| 791 | .v5te, | ||
| 792 | }), | ||
| 793 | }; | ||
| 794 | result[@intFromEnum(Feature.lob)] = .{ | ||
| 795 | .llvm_name = "lob", | ||
| 796 | .description = "Enable Low Overhead Branch extensions", | ||
| 797 | .dependencies = featureSet(&[_]Feature{}), | ||
| 798 | }; | ||
| 799 | result[@intFromEnum(Feature.long_calls)] = .{ | ||
| 800 | .llvm_name = "long-calls", | ||
| 801 | .description = "Generate calls via indirect call instructions", | ||
| 802 | .dependencies = featureSet(&[_]Feature{}), | ||
| 803 | }; | ||
| 804 | result[@intFromEnum(Feature.loop_align)] = .{ | ||
| 805 | .llvm_name = "loop-align", | ||
| 806 | .description = "Prefer 32-bit alignment for loops", | ||
| 807 | .dependencies = featureSet(&[_]Feature{}), | ||
| 808 | }; | ||
| 809 | result[@intFromEnum(Feature.m3)] = .{ | ||
| 810 | .llvm_name = "m3", | ||
| 811 | .description = "Cortex-M3 ARM processors", | ||
| 812 | .dependencies = featureSet(&[_]Feature{}), | ||
| 813 | }; | ||
| 814 | result[@intFromEnum(Feature.mclass)] = .{ | ||
| 815 | .llvm_name = "mclass", | ||
| 816 | .description = "Is microcontroller profile ('M' series)", | ||
| 817 | .dependencies = featureSet(&[_]Feature{}), | ||
| 818 | }; | ||
| 819 | result[@intFromEnum(Feature.mp)] = .{ | ||
| 820 | .llvm_name = "mp", | ||
| 821 | .description = "Supports Multiprocessing extension", | ||
| 822 | .dependencies = featureSet(&[_]Feature{}), | ||
| 823 | }; | ||
| 824 | result[@intFromEnum(Feature.muxed_units)] = .{ | ||
| 825 | .llvm_name = "muxed-units", | ||
| 826 | .description = "Has muxed AGU and NEON/FPU", | ||
| 827 | .dependencies = featureSet(&[_]Feature{}), | ||
| 828 | }; | ||
| 829 | result[@intFromEnum(Feature.mve)] = .{ | ||
| 830 | .llvm_name = "mve", | ||
| 831 | .description = "Support M-Class Vector Extension with integer ops", | ||
| 832 | .dependencies = featureSet(&[_]Feature{ | ||
| 833 | .dsp, | ||
| 834 | .fpregs16, | ||
| 835 | .fpregs64, | ||
| 836 | .has_v8_1m_main, | ||
| 837 | }), | ||
| 838 | }; | ||
| 839 | result[@intFromEnum(Feature.mve1beat)] = .{ | ||
| 840 | .llvm_name = "mve1beat", | ||
| 841 | .description = "Model MVE instructions as a 1 beat per tick architecture", | ||
| 842 | .dependencies = featureSet(&[_]Feature{}), | ||
| 843 | }; | ||
| 844 | result[@intFromEnum(Feature.mve2beat)] = .{ | ||
| 845 | .llvm_name = "mve2beat", | ||
| 846 | .description = "Model MVE instructions as a 2 beats per tick architecture", | ||
| 847 | .dependencies = featureSet(&[_]Feature{}), | ||
| 848 | }; | ||
| 849 | result[@intFromEnum(Feature.mve4beat)] = .{ | ||
| 850 | .llvm_name = "mve4beat", | ||
| 851 | .description = "Model MVE instructions as a 4 beats per tick architecture", | ||
| 852 | .dependencies = featureSet(&[_]Feature{}), | ||
| 853 | }; | ||
| 854 | result[@intFromEnum(Feature.mve_fp)] = .{ | ||
| 855 | .llvm_name = "mve.fp", | ||
| 856 | .description = "Support M-Class Vector Extension with integer and floating ops", | ||
| 857 | .dependencies = featureSet(&[_]Feature{ | ||
| 858 | .fullfp16, | ||
| 859 | .mve, | ||
| 860 | }), | ||
| 861 | }; | ||
| 862 | result[@intFromEnum(Feature.nacl_trap)] = .{ | ||
| 863 | .llvm_name = "nacl-trap", | ||
| 864 | .description = "NaCl trap", | ||
| 865 | .dependencies = featureSet(&[_]Feature{}), | ||
| 866 | }; | ||
| 867 | result[@intFromEnum(Feature.neon)] = .{ | ||
| 868 | .llvm_name = "neon", | ||
| 869 | .description = "Enable NEON instructions", | ||
| 870 | .dependencies = featureSet(&[_]Feature{ | ||
| 871 | .vfp3, | ||
| 872 | }), | ||
| 873 | }; | ||
| 874 | result[@intFromEnum(Feature.neon_fpmovs)] = .{ | ||
| 875 | .llvm_name = "neon-fpmovs", | ||
| 876 | .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", | ||
| 877 | .dependencies = featureSet(&[_]Feature{}), | ||
| 878 | }; | ||
| 879 | result[@intFromEnum(Feature.neonfp)] = .{ | ||
| 880 | .llvm_name = "neonfp", | ||
| 881 | .description = "Use NEON for single precision FP", | ||
| 882 | .dependencies = featureSet(&[_]Feature{}), | ||
| 883 | }; | ||
| 884 | result[@intFromEnum(Feature.no_branch_predictor)] = .{ | ||
| 885 | .llvm_name = "no-branch-predictor", | ||
| 886 | .description = "Has no branch predictor", | ||
| 887 | .dependencies = featureSet(&[_]Feature{}), | ||
| 888 | }; | ||
| 889 | result[@intFromEnum(Feature.no_bti_at_return_twice)] = .{ | ||
| 890 | .llvm_name = "no-bti-at-return-twice", | ||
| 891 | .description = "Don't place a BTI instruction after a return-twice", | ||
| 892 | .dependencies = featureSet(&[_]Feature{}), | ||
| 893 | }; | ||
| 894 | result[@intFromEnum(Feature.no_movt)] = .{ | ||
| 895 | .llvm_name = "no-movt", | ||
| 896 | .description = "Don't use movt/movw pairs for 32-bit imms", | ||
| 897 | .dependencies = featureSet(&[_]Feature{}), | ||
| 898 | }; | ||
| 899 | result[@intFromEnum(Feature.no_neg_immediates)] = .{ | ||
| 900 | .llvm_name = "no-neg-immediates", | ||
| 901 | .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", | ||
| 902 | .dependencies = featureSet(&[_]Feature{}), | ||
| 903 | }; | ||
| 904 | result[@intFromEnum(Feature.noarm)] = .{ | ||
| 905 | .llvm_name = "noarm", | ||
| 906 | .description = "Does not support ARM mode execution", | ||
| 907 | .dependencies = featureSet(&[_]Feature{}), | ||
| 908 | }; | ||
| 909 | result[@intFromEnum(Feature.nonpipelined_vfp)] = .{ | ||
| 910 | .llvm_name = "nonpipelined-vfp", | ||
| 911 | .description = "VFP instructions are not pipelined", | ||
| 912 | .dependencies = featureSet(&[_]Feature{}), | ||
| 913 | }; | ||
| 914 | result[@intFromEnum(Feature.pacbti)] = .{ | ||
| 915 | .llvm_name = "pacbti", | ||
| 916 | .description = "Enable Pointer Authentication and Branch Target Identification", | ||
| 917 | .dependencies = featureSet(&[_]Feature{}), | ||
| 918 | }; | ||
| 919 | result[@intFromEnum(Feature.perfmon)] = .{ | ||
| 920 | .llvm_name = "perfmon", | ||
| 921 | .description = "Enable support for Performance Monitor extensions", | ||
| 922 | .dependencies = featureSet(&[_]Feature{}), | ||
| 923 | }; | ||
| 924 | result[@intFromEnum(Feature.prefer_ishst)] = .{ | ||
| 925 | .llvm_name = "prefer-ishst", | ||
| 926 | .description = "Prefer ISHST barriers", | ||
| 927 | .dependencies = featureSet(&[_]Feature{}), | ||
| 928 | }; | ||
| 929 | result[@intFromEnum(Feature.prefer_vmovsr)] = .{ | ||
| 930 | .llvm_name = "prefer-vmovsr", | ||
| 931 | .description = "Prefer VMOVSR", | ||
| 932 | .dependencies = featureSet(&[_]Feature{}), | ||
| 933 | }; | ||
| 934 | result[@intFromEnum(Feature.prof_unpr)] = .{ | ||
| 935 | .llvm_name = "prof-unpr", | ||
| 936 | .description = "Is profitable to unpredicate", | ||
| 937 | .dependencies = featureSet(&[_]Feature{}), | ||
| 938 | }; | ||
| 939 | result[@intFromEnum(Feature.r4)] = .{ | ||
| 940 | .llvm_name = "r4", | ||
| 941 | .description = "Cortex-R4 ARM processors", | ||
| 942 | .dependencies = featureSet(&[_]Feature{}), | ||
| 943 | }; | ||
| 944 | result[@intFromEnum(Feature.ras)] = .{ | ||
| 945 | .llvm_name = "ras", | ||
| 946 | .description = "Enable Reliability, Availability and Serviceability extensions", | ||
| 947 | .dependencies = featureSet(&[_]Feature{}), | ||
| 948 | }; | ||
| 949 | result[@intFromEnum(Feature.rclass)] = .{ | ||
| 950 | .llvm_name = "rclass", | ||
| 951 | .description = "Is realtime profile ('R' series)", | ||
| 952 | .dependencies = featureSet(&[_]Feature{}), | ||
| 953 | }; | ||
| 954 | result[@intFromEnum(Feature.read_tp_tpidrprw)] = .{ | ||
| 955 | .llvm_name = "read-tp-tpidrprw", | ||
| 956 | .description = "Reading thread pointer from TPIDRPRW register", | ||
| 957 | .dependencies = featureSet(&[_]Feature{}), | ||
| 958 | }; | ||
| 959 | result[@intFromEnum(Feature.read_tp_tpidruro)] = .{ | ||
| 960 | .llvm_name = "read-tp-tpidruro", | ||
| 961 | .description = "Reading thread pointer from TPIDRURO register", | ||
| 962 | .dependencies = featureSet(&[_]Feature{}), | ||
| 963 | }; | ||
| 964 | result[@intFromEnum(Feature.read_tp_tpidrurw)] = .{ | ||
| 965 | .llvm_name = "read-tp-tpidrurw", | ||
| 966 | .description = "Reading thread pointer from TPIDRURW register", | ||
| 967 | .dependencies = featureSet(&[_]Feature{}), | ||
| 968 | }; | ||
| 969 | result[@intFromEnum(Feature.reserve_r9)] = .{ | ||
| 970 | .llvm_name = "reserve-r9", | ||
| 971 | .description = "Reserve R9, making it unavailable as GPR", | ||
| 972 | .dependencies = featureSet(&[_]Feature{}), | ||
| 973 | }; | ||
| 974 | result[@intFromEnum(Feature.ret_addr_stack)] = .{ | ||
| 975 | .llvm_name = "ret-addr-stack", | ||
| 976 | .description = "Has return address stack", | ||
| 977 | .dependencies = featureSet(&[_]Feature{}), | ||
| 978 | }; | ||
| 979 | result[@intFromEnum(Feature.sb)] = .{ | ||
| 980 | .llvm_name = "sb", | ||
| 981 | .description = "Enable v8.5a Speculation Barrier", | ||
| 982 | .dependencies = featureSet(&[_]Feature{}), | ||
| 983 | }; | ||
| 984 | result[@intFromEnum(Feature.sha2)] = .{ | ||
| 985 | .llvm_name = "sha2", | ||
| 986 | .description = "Enable SHA1 and SHA256 support", | ||
| 987 | .dependencies = featureSet(&[_]Feature{ | ||
| 988 | .neon, | ||
| 989 | }), | ||
| 990 | }; | ||
| 991 | result[@intFromEnum(Feature.slow_fp_brcc)] = .{ | ||
| 992 | .llvm_name = "slow-fp-brcc", | ||
| 993 | .description = "FP compare + branch is slow", | ||
| 994 | .dependencies = featureSet(&[_]Feature{}), | ||
| 995 | }; | ||
| 996 | result[@intFromEnum(Feature.slow_load_D_subreg)] = .{ | ||
| 997 | .llvm_name = "slow-load-D-subreg", | ||
| 998 | .description = "Loading into D subregs is slow", | ||
| 999 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1000 | }; | ||
| 1001 | result[@intFromEnum(Feature.slow_odd_reg)] = .{ | ||
| 1002 | .llvm_name = "slow-odd-reg", | ||
| 1003 | .description = "VLDM/VSTM starting with an odd register is slow", | ||
| 1004 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1005 | }; | ||
| 1006 | result[@intFromEnum(Feature.slow_vdup32)] = .{ | ||
| 1007 | .llvm_name = "slow-vdup32", | ||
| 1008 | .description = "Has slow VDUP32 - prefer VMOV", | ||
| 1009 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1010 | }; | ||
| 1011 | result[@intFromEnum(Feature.slow_vgetlni32)] = .{ | ||
| 1012 | .llvm_name = "slow-vgetlni32", | ||
| 1013 | .description = "Has slow VGETLNi32 - prefer VMOV", | ||
| 1014 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1015 | }; | ||
| 1016 | result[@intFromEnum(Feature.slowfpvfmx)] = .{ | ||
| 1017 | .llvm_name = "slowfpvfmx", | ||
| 1018 | .description = "Disable VFP / NEON FMA instructions", | ||
| 1019 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1020 | }; | ||
| 1021 | result[@intFromEnum(Feature.slowfpvmlx)] = .{ | ||
| 1022 | .llvm_name = "slowfpvmlx", | ||
| 1023 | .description = "Disable VFP / NEON MAC instructions", | ||
| 1024 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1025 | }; | ||
| 1026 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 1027 | .llvm_name = "soft-float", | ||
| 1028 | .description = "Use software floating point features.", | ||
| 1029 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1030 | }; | ||
| 1031 | result[@intFromEnum(Feature.splat_vfp_neon)] = .{ | ||
| 1032 | .llvm_name = "splat-vfp-neon", | ||
| 1033 | .description = "Splat register from VFP to NEON", | ||
| 1034 | .dependencies = featureSet(&[_]Feature{ | ||
| 1035 | .dont_widen_vmovs, | ||
| 1036 | }), | ||
| 1037 | }; | ||
| 1038 | result[@intFromEnum(Feature.strict_align)] = .{ | ||
| 1039 | .llvm_name = "strict-align", | ||
| 1040 | .description = "Disallow all unaligned memory access", | ||
| 1041 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1042 | }; | ||
| 1043 | result[@intFromEnum(Feature.swift)] = .{ | ||
| 1044 | .llvm_name = "swift", | ||
| 1045 | .description = "Swift ARM processors", | ||
| 1046 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1047 | }; | ||
| 1048 | result[@intFromEnum(Feature.thumb2)] = .{ | ||
| 1049 | .llvm_name = "thumb2", | ||
| 1050 | .description = "Enable Thumb2 instructions", | ||
| 1051 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1052 | }; | ||
| 1053 | result[@intFromEnum(Feature.thumb_mode)] = .{ | ||
| 1054 | .llvm_name = "thumb-mode", | ||
| 1055 | .description = "Thumb mode", | ||
| 1056 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1057 | }; | ||
| 1058 | result[@intFromEnum(Feature.trustzone)] = .{ | ||
| 1059 | .llvm_name = "trustzone", | ||
| 1060 | .description = "Enable support for TrustZone security extensions", | ||
| 1061 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1062 | }; | ||
| 1063 | result[@intFromEnum(Feature.use_mipipeliner)] = .{ | ||
| 1064 | .llvm_name = "use-mipipeliner", | ||
| 1065 | .description = "Use the MachinePipeliner", | ||
| 1066 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1067 | }; | ||
| 1068 | result[@intFromEnum(Feature.use_misched)] = .{ | ||
| 1069 | .llvm_name = "use-misched", | ||
| 1070 | .description = "Use the MachineScheduler", | ||
| 1071 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1072 | }; | ||
| 1073 | result[@intFromEnum(Feature.v2)] = .{ | ||
| 1074 | .llvm_name = null, | ||
| 1075 | .description = "ARMv2 architecture", | ||
| 1076 | .dependencies = featureSet(&[_]Feature{ | ||
| 1077 | .strict_align, | ||
| 1078 | }), | ||
| 1079 | }; | ||
| 1080 | result[@intFromEnum(Feature.v2a)] = .{ | ||
| 1081 | .llvm_name = null, | ||
| 1082 | .description = "ARMv2a architecture", | ||
| 1083 | .dependencies = featureSet(&[_]Feature{ | ||
| 1084 | .strict_align, | ||
| 1085 | }), | ||
| 1086 | }; | ||
| 1087 | result[@intFromEnum(Feature.v3)] = .{ | ||
| 1088 | .llvm_name = null, | ||
| 1089 | .description = "ARMv3 architecture", | ||
| 1090 | .dependencies = featureSet(&[_]Feature{ | ||
| 1091 | .strict_align, | ||
| 1092 | }), | ||
| 1093 | }; | ||
| 1094 | result[@intFromEnum(Feature.v3m)] = .{ | ||
| 1095 | .llvm_name = null, | ||
| 1096 | .description = "ARMv3m architecture", | ||
| 1097 | .dependencies = featureSet(&[_]Feature{ | ||
| 1098 | .strict_align, | ||
| 1099 | }), | ||
| 1100 | }; | ||
| 1101 | result[@intFromEnum(Feature.v4)] = .{ | ||
| 1102 | .llvm_name = "armv4", | ||
| 1103 | .description = "ARMv4 architecture", | ||
| 1104 | .dependencies = featureSet(&[_]Feature{ | ||
| 1105 | .strict_align, | ||
| 1106 | }), | ||
| 1107 | }; | ||
| 1108 | result[@intFromEnum(Feature.v4t)] = .{ | ||
| 1109 | .llvm_name = "armv4t", | ||
| 1110 | .description = "ARMv4t architecture", | ||
| 1111 | .dependencies = featureSet(&[_]Feature{ | ||
| 1112 | .has_v4t, | ||
| 1113 | .strict_align, | ||
| 1114 | }), | ||
| 1115 | }; | ||
| 1116 | result[@intFromEnum(Feature.v5t)] = .{ | ||
| 1117 | .llvm_name = "armv5t", | ||
| 1118 | .description = "ARMv5t architecture", | ||
| 1119 | .dependencies = featureSet(&[_]Feature{ | ||
| 1120 | .has_v5t, | ||
| 1121 | .strict_align, | ||
| 1122 | }), | ||
| 1123 | }; | ||
| 1124 | result[@intFromEnum(Feature.v5te)] = .{ | ||
| 1125 | .llvm_name = "armv5te", | ||
| 1126 | .description = "ARMv5te architecture", | ||
| 1127 | .dependencies = featureSet(&[_]Feature{ | ||
| 1128 | .has_v5te, | ||
| 1129 | .strict_align, | ||
| 1130 | }), | ||
| 1131 | }; | ||
| 1132 | result[@intFromEnum(Feature.v5tej)] = .{ | ||
| 1133 | .llvm_name = "armv5tej", | ||
| 1134 | .description = "ARMv5tej architecture", | ||
| 1135 | .dependencies = featureSet(&[_]Feature{ | ||
| 1136 | .has_v5te, | ||
| 1137 | .strict_align, | ||
| 1138 | }), | ||
| 1139 | }; | ||
| 1140 | result[@intFromEnum(Feature.v6)] = .{ | ||
| 1141 | .llvm_name = "armv6", | ||
| 1142 | .description = "ARMv6 architecture", | ||
| 1143 | .dependencies = featureSet(&[_]Feature{ | ||
| 1144 | .dsp, | ||
| 1145 | .has_v6, | ||
| 1146 | }), | ||
| 1147 | }; | ||
| 1148 | result[@intFromEnum(Feature.v6j)] = .{ | ||
| 1149 | .llvm_name = "armv6j", | ||
| 1150 | .description = "ARMv7a architecture", | ||
| 1151 | .dependencies = featureSet(&[_]Feature{ | ||
| 1152 | .v6, | ||
| 1153 | }), | ||
| 1154 | }; | ||
| 1155 | result[@intFromEnum(Feature.v6k)] = .{ | ||
| 1156 | .llvm_name = "armv6k", | ||
| 1157 | .description = "ARMv6k architecture", | ||
| 1158 | .dependencies = featureSet(&[_]Feature{ | ||
| 1159 | .has_v6k, | ||
| 1160 | }), | ||
| 1161 | }; | ||
| 1162 | result[@intFromEnum(Feature.v6kz)] = .{ | ||
| 1163 | .llvm_name = "armv6kz", | ||
| 1164 | .description = "ARMv6kz architecture", | ||
| 1165 | .dependencies = featureSet(&[_]Feature{ | ||
| 1166 | .has_v6k, | ||
| 1167 | .trustzone, | ||
| 1168 | }), | ||
| 1169 | }; | ||
| 1170 | result[@intFromEnum(Feature.v6m)] = .{ | ||
| 1171 | .llvm_name = "armv6-m", | ||
| 1172 | .description = "ARMv6m architecture", | ||
| 1173 | .dependencies = featureSet(&[_]Feature{ | ||
| 1174 | .db, | ||
| 1175 | .has_v6m, | ||
| 1176 | .mclass, | ||
| 1177 | .noarm, | ||
| 1178 | .strict_align, | ||
| 1179 | .thumb_mode, | ||
| 1180 | }), | ||
| 1181 | }; | ||
| 1182 | result[@intFromEnum(Feature.v6sm)] = .{ | ||
| 1183 | .llvm_name = "armv6s-m", | ||
| 1184 | .description = "ARMv6sm architecture", | ||
| 1185 | .dependencies = featureSet(&[_]Feature{ | ||
| 1186 | .db, | ||
| 1187 | .has_v6m, | ||
| 1188 | .mclass, | ||
| 1189 | .noarm, | ||
| 1190 | .strict_align, | ||
| 1191 | .thumb_mode, | ||
| 1192 | }), | ||
| 1193 | }; | ||
| 1194 | result[@intFromEnum(Feature.v6t2)] = .{ | ||
| 1195 | .llvm_name = "armv6t2", | ||
| 1196 | .description = "ARMv6t2 architecture", | ||
| 1197 | .dependencies = featureSet(&[_]Feature{ | ||
| 1198 | .dsp, | ||
| 1199 | .has_v6t2, | ||
| 1200 | }), | ||
| 1201 | }; | ||
| 1202 | result[@intFromEnum(Feature.v7a)] = .{ | ||
| 1203 | .llvm_name = "armv7-a", | ||
| 1204 | .description = "ARMv7a architecture", | ||
| 1205 | .dependencies = featureSet(&[_]Feature{ | ||
| 1206 | .aclass, | ||
| 1207 | .db, | ||
| 1208 | .dsp, | ||
| 1209 | .has_v7, | ||
| 1210 | .neon, | ||
| 1211 | .perfmon, | ||
| 1212 | }), | ||
| 1213 | }; | ||
| 1214 | result[@intFromEnum(Feature.v7em)] = .{ | ||
| 1215 | .llvm_name = "armv7e-m", | ||
| 1216 | .description = "ARMv7em architecture", | ||
| 1217 | .dependencies = featureSet(&[_]Feature{ | ||
| 1218 | .db, | ||
| 1219 | .dsp, | ||
| 1220 | .has_v7, | ||
| 1221 | .hwdiv, | ||
| 1222 | .mclass, | ||
| 1223 | .noarm, | ||
| 1224 | .thumb_mode, | ||
| 1225 | }), | ||
| 1226 | }; | ||
| 1227 | result[@intFromEnum(Feature.v7k)] = .{ | ||
| 1228 | .llvm_name = "armv7k", | ||
| 1229 | .description = "ARMv7a architecture", | ||
| 1230 | .dependencies = featureSet(&[_]Feature{ | ||
| 1231 | .v7a, | ||
| 1232 | }), | ||
| 1233 | }; | ||
| 1234 | result[@intFromEnum(Feature.v7m)] = .{ | ||
| 1235 | .llvm_name = "armv7-m", | ||
| 1236 | .description = "ARMv7m architecture", | ||
| 1237 | .dependencies = featureSet(&[_]Feature{ | ||
| 1238 | .db, | ||
| 1239 | .has_v7, | ||
| 1240 | .hwdiv, | ||
| 1241 | .mclass, | ||
| 1242 | .noarm, | ||
| 1243 | .thumb_mode, | ||
| 1244 | }), | ||
| 1245 | }; | ||
| 1246 | result[@intFromEnum(Feature.v7r)] = .{ | ||
| 1247 | .llvm_name = "armv7-r", | ||
| 1248 | .description = "ARMv7r architecture", | ||
| 1249 | .dependencies = featureSet(&[_]Feature{ | ||
| 1250 | .db, | ||
| 1251 | .dsp, | ||
| 1252 | .has_v7, | ||
| 1253 | .hwdiv, | ||
| 1254 | .perfmon, | ||
| 1255 | .rclass, | ||
| 1256 | }), | ||
| 1257 | }; | ||
| 1258 | result[@intFromEnum(Feature.v7s)] = .{ | ||
| 1259 | .llvm_name = "armv7s", | ||
| 1260 | .description = "ARMv7a architecture", | ||
| 1261 | .dependencies = featureSet(&[_]Feature{ | ||
| 1262 | .v7a, | ||
| 1263 | }), | ||
| 1264 | }; | ||
| 1265 | result[@intFromEnum(Feature.v7ve)] = .{ | ||
| 1266 | .llvm_name = "armv7ve", | ||
| 1267 | .description = "ARMv7ve architecture", | ||
| 1268 | .dependencies = featureSet(&[_]Feature{ | ||
| 1269 | .aclass, | ||
| 1270 | .db, | ||
| 1271 | .dsp, | ||
| 1272 | .has_v7, | ||
| 1273 | .mp, | ||
| 1274 | .neon, | ||
| 1275 | .perfmon, | ||
| 1276 | .trustzone, | ||
| 1277 | .virtualization, | ||
| 1278 | }), | ||
| 1279 | }; | ||
| 1280 | result[@intFromEnum(Feature.v8_1a)] = .{ | ||
| 1281 | .llvm_name = "armv8.1-a", | ||
| 1282 | .description = "ARMv81a architecture", | ||
| 1283 | .dependencies = featureSet(&[_]Feature{ | ||
| 1284 | .aclass, | ||
| 1285 | .crc, | ||
| 1286 | .crypto, | ||
| 1287 | .db, | ||
| 1288 | .dsp, | ||
| 1289 | .fp_armv8, | ||
| 1290 | .has_v8_1a, | ||
| 1291 | .mp, | ||
| 1292 | .trustzone, | ||
| 1293 | .virtualization, | ||
| 1294 | }), | ||
| 1295 | }; | ||
| 1296 | result[@intFromEnum(Feature.v8_1m_main)] = .{ | ||
| 1297 | .llvm_name = "armv8.1-m.main", | ||
| 1298 | .description = "ARMv81mMainline architecture", | ||
| 1299 | .dependencies = featureSet(&[_]Feature{ | ||
| 1300 | .@"8msecext", | ||
| 1301 | .acquire_release, | ||
| 1302 | .db, | ||
| 1303 | .has_v8_1m_main, | ||
| 1304 | .hwdiv, | ||
| 1305 | .lob, | ||
| 1306 | .mclass, | ||
| 1307 | .noarm, | ||
| 1308 | .ras, | ||
| 1309 | .thumb_mode, | ||
| 1310 | }), | ||
| 1311 | }; | ||
| 1312 | result[@intFromEnum(Feature.v8_2a)] = .{ | ||
| 1313 | .llvm_name = "armv8.2-a", | ||
| 1314 | .description = "ARMv82a architecture", | ||
| 1315 | .dependencies = featureSet(&[_]Feature{ | ||
| 1316 | .aclass, | ||
| 1317 | .crc, | ||
| 1318 | .crypto, | ||
| 1319 | .db, | ||
| 1320 | .dsp, | ||
| 1321 | .fp_armv8, | ||
| 1322 | .has_v8_2a, | ||
| 1323 | .mp, | ||
| 1324 | .ras, | ||
| 1325 | .trustzone, | ||
| 1326 | .virtualization, | ||
| 1327 | }), | ||
| 1328 | }; | ||
| 1329 | result[@intFromEnum(Feature.v8_3a)] = .{ | ||
| 1330 | .llvm_name = "armv8.3-a", | ||
| 1331 | .description = "ARMv83a architecture", | ||
| 1332 | .dependencies = featureSet(&[_]Feature{ | ||
| 1333 | .aclass, | ||
| 1334 | .crc, | ||
| 1335 | .crypto, | ||
| 1336 | .db, | ||
| 1337 | .dsp, | ||
| 1338 | .fp_armv8, | ||
| 1339 | .has_v8_3a, | ||
| 1340 | .mp, | ||
| 1341 | .ras, | ||
| 1342 | .trustzone, | ||
| 1343 | .virtualization, | ||
| 1344 | }), | ||
| 1345 | }; | ||
| 1346 | result[@intFromEnum(Feature.v8_4a)] = .{ | ||
| 1347 | .llvm_name = "armv8.4-a", | ||
| 1348 | .description = "ARMv84a architecture", | ||
| 1349 | .dependencies = featureSet(&[_]Feature{ | ||
| 1350 | .aclass, | ||
| 1351 | .crc, | ||
| 1352 | .crypto, | ||
| 1353 | .db, | ||
| 1354 | .dsp, | ||
| 1355 | .fp_armv8, | ||
| 1356 | .has_v8_4a, | ||
| 1357 | .mp, | ||
| 1358 | .ras, | ||
| 1359 | .trustzone, | ||
| 1360 | .virtualization, | ||
| 1361 | }), | ||
| 1362 | }; | ||
| 1363 | result[@intFromEnum(Feature.v8_5a)] = .{ | ||
| 1364 | .llvm_name = "armv8.5-a", | ||
| 1365 | .description = "ARMv85a architecture", | ||
| 1366 | .dependencies = featureSet(&[_]Feature{ | ||
| 1367 | .aclass, | ||
| 1368 | .crc, | ||
| 1369 | .crypto, | ||
| 1370 | .db, | ||
| 1371 | .dsp, | ||
| 1372 | .fp_armv8, | ||
| 1373 | .has_v8_5a, | ||
| 1374 | .mp, | ||
| 1375 | .ras, | ||
| 1376 | .trustzone, | ||
| 1377 | .virtualization, | ||
| 1378 | }), | ||
| 1379 | }; | ||
| 1380 | result[@intFromEnum(Feature.v8_6a)] = .{ | ||
| 1381 | .llvm_name = "armv8.6-a", | ||
| 1382 | .description = "ARMv86a architecture", | ||
| 1383 | .dependencies = featureSet(&[_]Feature{ | ||
| 1384 | .aclass, | ||
| 1385 | .crc, | ||
| 1386 | .crypto, | ||
| 1387 | .db, | ||
| 1388 | .dsp, | ||
| 1389 | .fp_armv8, | ||
| 1390 | .has_v8_6a, | ||
| 1391 | .mp, | ||
| 1392 | .ras, | ||
| 1393 | .trustzone, | ||
| 1394 | .virtualization, | ||
| 1395 | }), | ||
| 1396 | }; | ||
| 1397 | result[@intFromEnum(Feature.v8_7a)] = .{ | ||
| 1398 | .llvm_name = "armv8.7-a", | ||
| 1399 | .description = "ARMv87a architecture", | ||
| 1400 | .dependencies = featureSet(&[_]Feature{ | ||
| 1401 | .aclass, | ||
| 1402 | .crc, | ||
| 1403 | .crypto, | ||
| 1404 | .db, | ||
| 1405 | .dsp, | ||
| 1406 | .fp_armv8, | ||
| 1407 | .has_v8_7a, | ||
| 1408 | .mp, | ||
| 1409 | .ras, | ||
| 1410 | .trustzone, | ||
| 1411 | .virtualization, | ||
| 1412 | }), | ||
| 1413 | }; | ||
| 1414 | result[@intFromEnum(Feature.v8_8a)] = .{ | ||
| 1415 | .llvm_name = "armv8.8-a", | ||
| 1416 | .description = "ARMv88a architecture", | ||
| 1417 | .dependencies = featureSet(&[_]Feature{ | ||
| 1418 | .aclass, | ||
| 1419 | .crc, | ||
| 1420 | .crypto, | ||
| 1421 | .db, | ||
| 1422 | .dsp, | ||
| 1423 | .fp_armv8, | ||
| 1424 | .has_v8_8a, | ||
| 1425 | .mp, | ||
| 1426 | .ras, | ||
| 1427 | .trustzone, | ||
| 1428 | .virtualization, | ||
| 1429 | }), | ||
| 1430 | }; | ||
| 1431 | result[@intFromEnum(Feature.v8_9a)] = .{ | ||
| 1432 | .llvm_name = "armv8.9-a", | ||
| 1433 | .description = "ARMv89a architecture", | ||
| 1434 | .dependencies = featureSet(&[_]Feature{ | ||
| 1435 | .aclass, | ||
| 1436 | .crc, | ||
| 1437 | .crypto, | ||
| 1438 | .db, | ||
| 1439 | .dsp, | ||
| 1440 | .fp_armv8, | ||
| 1441 | .has_v8_9a, | ||
| 1442 | .mp, | ||
| 1443 | .ras, | ||
| 1444 | .trustzone, | ||
| 1445 | .virtualization, | ||
| 1446 | }), | ||
| 1447 | }; | ||
| 1448 | result[@intFromEnum(Feature.v8a)] = .{ | ||
| 1449 | .llvm_name = "armv8-a", | ||
| 1450 | .description = "ARMv8a architecture", | ||
| 1451 | .dependencies = featureSet(&[_]Feature{ | ||
| 1452 | .aclass, | ||
| 1453 | .crc, | ||
| 1454 | .crypto, | ||
| 1455 | .db, | ||
| 1456 | .dsp, | ||
| 1457 | .fp_armv8, | ||
| 1458 | .has_v8, | ||
| 1459 | .mp, | ||
| 1460 | .trustzone, | ||
| 1461 | .virtualization, | ||
| 1462 | }), | ||
| 1463 | }; | ||
| 1464 | result[@intFromEnum(Feature.v8m)] = .{ | ||
| 1465 | .llvm_name = "armv8-m.base", | ||
| 1466 | .description = "ARMv8mBaseline architecture", | ||
| 1467 | .dependencies = featureSet(&[_]Feature{ | ||
| 1468 | .@"8msecext", | ||
| 1469 | .acquire_release, | ||
| 1470 | .db, | ||
| 1471 | .has_v7clrex, | ||
| 1472 | .has_v8m, | ||
| 1473 | .hwdiv, | ||
| 1474 | .mclass, | ||
| 1475 | .noarm, | ||
| 1476 | .strict_align, | ||
| 1477 | .thumb_mode, | ||
| 1478 | }), | ||
| 1479 | }; | ||
| 1480 | result[@intFromEnum(Feature.v8m_main)] = .{ | ||
| 1481 | .llvm_name = "armv8-m.main", | ||
| 1482 | .description = "ARMv8mMainline architecture", | ||
| 1483 | .dependencies = featureSet(&[_]Feature{ | ||
| 1484 | .@"8msecext", | ||
| 1485 | .acquire_release, | ||
| 1486 | .db, | ||
| 1487 | .has_v8m_main, | ||
| 1488 | .hwdiv, | ||
| 1489 | .mclass, | ||
| 1490 | .noarm, | ||
| 1491 | .thumb_mode, | ||
| 1492 | }), | ||
| 1493 | }; | ||
| 1494 | result[@intFromEnum(Feature.v8r)] = .{ | ||
| 1495 | .llvm_name = "armv8-r", | ||
| 1496 | .description = "ARMv8r architecture", | ||
| 1497 | .dependencies = featureSet(&[_]Feature{ | ||
| 1498 | .crc, | ||
| 1499 | .db, | ||
| 1500 | .dfb, | ||
| 1501 | .dsp, | ||
| 1502 | .fp_armv8, | ||
| 1503 | .has_v8, | ||
| 1504 | .mp, | ||
| 1505 | .neon, | ||
| 1506 | .rclass, | ||
| 1507 | .virtualization, | ||
| 1508 | }), | ||
| 1509 | }; | ||
| 1510 | result[@intFromEnum(Feature.v9_1a)] = .{ | ||
| 1511 | .llvm_name = "armv9.1-a", | ||
| 1512 | .description = "ARMv91a architecture", | ||
| 1513 | .dependencies = featureSet(&[_]Feature{ | ||
| 1514 | .aclass, | ||
| 1515 | .crc, | ||
| 1516 | .db, | ||
| 1517 | .dsp, | ||
| 1518 | .fp_armv8, | ||
| 1519 | .has_v9_1a, | ||
| 1520 | .mp, | ||
| 1521 | .ras, | ||
| 1522 | .trustzone, | ||
| 1523 | .virtualization, | ||
| 1524 | }), | ||
| 1525 | }; | ||
| 1526 | result[@intFromEnum(Feature.v9_2a)] = .{ | ||
| 1527 | .llvm_name = "armv9.2-a", | ||
| 1528 | .description = "ARMv92a architecture", | ||
| 1529 | .dependencies = featureSet(&[_]Feature{ | ||
| 1530 | .aclass, | ||
| 1531 | .crc, | ||
| 1532 | .db, | ||
| 1533 | .dsp, | ||
| 1534 | .fp_armv8, | ||
| 1535 | .has_v9_2a, | ||
| 1536 | .mp, | ||
| 1537 | .ras, | ||
| 1538 | .trustzone, | ||
| 1539 | .virtualization, | ||
| 1540 | }), | ||
| 1541 | }; | ||
| 1542 | result[@intFromEnum(Feature.v9_3a)] = .{ | ||
| 1543 | .llvm_name = "armv9.3-a", | ||
| 1544 | .description = "ARMv93a architecture", | ||
| 1545 | .dependencies = featureSet(&[_]Feature{ | ||
| 1546 | .aclass, | ||
| 1547 | .crc, | ||
| 1548 | .crypto, | ||
| 1549 | .db, | ||
| 1550 | .dsp, | ||
| 1551 | .fp_armv8, | ||
| 1552 | .has_v9_3a, | ||
| 1553 | .mp, | ||
| 1554 | .ras, | ||
| 1555 | .trustzone, | ||
| 1556 | .virtualization, | ||
| 1557 | }), | ||
| 1558 | }; | ||
| 1559 | result[@intFromEnum(Feature.v9_4a)] = .{ | ||
| 1560 | .llvm_name = "armv9.4-a", | ||
| 1561 | .description = "ARMv94a architecture", | ||
| 1562 | .dependencies = featureSet(&[_]Feature{ | ||
| 1563 | .aclass, | ||
| 1564 | .crc, | ||
| 1565 | .db, | ||
| 1566 | .dsp, | ||
| 1567 | .fp_armv8, | ||
| 1568 | .has_v9_4a, | ||
| 1569 | .mp, | ||
| 1570 | .ras, | ||
| 1571 | .trustzone, | ||
| 1572 | .virtualization, | ||
| 1573 | }), | ||
| 1574 | }; | ||
| 1575 | result[@intFromEnum(Feature.v9a)] = .{ | ||
| 1576 | .llvm_name = "armv9-a", | ||
| 1577 | .description = "ARMv9a architecture", | ||
| 1578 | .dependencies = featureSet(&[_]Feature{ | ||
| 1579 | .aclass, | ||
| 1580 | .crc, | ||
| 1581 | .db, | ||
| 1582 | .dsp, | ||
| 1583 | .fp_armv8, | ||
| 1584 | .has_v9a, | ||
| 1585 | .mp, | ||
| 1586 | .ras, | ||
| 1587 | .trustzone, | ||
| 1588 | .virtualization, | ||
| 1589 | }), | ||
| 1590 | }; | ||
| 1591 | result[@intFromEnum(Feature.vfp2)] = .{ | ||
| 1592 | .llvm_name = "vfp2", | ||
| 1593 | .description = "Enable VFP2 instructions", | ||
| 1594 | .dependencies = featureSet(&[_]Feature{ | ||
| 1595 | .fp64, | ||
| 1596 | .vfp2sp, | ||
| 1597 | }), | ||
| 1598 | }; | ||
| 1599 | result[@intFromEnum(Feature.vfp2sp)] = .{ | ||
| 1600 | .llvm_name = "vfp2sp", | ||
| 1601 | .description = "Enable VFP2 instructions with no double precision", | ||
| 1602 | .dependencies = featureSet(&[_]Feature{ | ||
| 1603 | .fpregs, | ||
| 1604 | }), | ||
| 1605 | }; | ||
| 1606 | result[@intFromEnum(Feature.vfp3)] = .{ | ||
| 1607 | .llvm_name = "vfp3", | ||
| 1608 | .description = "Enable VFP3 instructions", | ||
| 1609 | .dependencies = featureSet(&[_]Feature{ | ||
| 1610 | .vfp3d16, | ||
| 1611 | .vfp3sp, | ||
| 1612 | }), | ||
| 1613 | }; | ||
| 1614 | result[@intFromEnum(Feature.vfp3d16)] = .{ | ||
| 1615 | .llvm_name = "vfp3d16", | ||
| 1616 | .description = "Enable VFP3 instructions with only 16 d-registers", | ||
| 1617 | .dependencies = featureSet(&[_]Feature{ | ||
| 1618 | .vfp2, | ||
| 1619 | .vfp3d16sp, | ||
| 1620 | }), | ||
| 1621 | }; | ||
| 1622 | result[@intFromEnum(Feature.vfp3d16sp)] = .{ | ||
| 1623 | .llvm_name = "vfp3d16sp", | ||
| 1624 | .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", | ||
| 1625 | .dependencies = featureSet(&[_]Feature{ | ||
| 1626 | .vfp2sp, | ||
| 1627 | }), | ||
| 1628 | }; | ||
| 1629 | result[@intFromEnum(Feature.vfp3sp)] = .{ | ||
| 1630 | .llvm_name = "vfp3sp", | ||
| 1631 | .description = "Enable VFP3 instructions with no double precision", | ||
| 1632 | .dependencies = featureSet(&[_]Feature{ | ||
| 1633 | .d32, | ||
| 1634 | .vfp3d16sp, | ||
| 1635 | }), | ||
| 1636 | }; | ||
| 1637 | result[@intFromEnum(Feature.vfp4)] = .{ | ||
| 1638 | .llvm_name = "vfp4", | ||
| 1639 | .description = "Enable VFP4 instructions", | ||
| 1640 | .dependencies = featureSet(&[_]Feature{ | ||
| 1641 | .vfp3, | ||
| 1642 | .vfp4d16, | ||
| 1643 | .vfp4sp, | ||
| 1644 | }), | ||
| 1645 | }; | ||
| 1646 | result[@intFromEnum(Feature.vfp4d16)] = .{ | ||
| 1647 | .llvm_name = "vfp4d16", | ||
| 1648 | .description = "Enable VFP4 instructions with only 16 d-registers", | ||
| 1649 | .dependencies = featureSet(&[_]Feature{ | ||
| 1650 | .vfp3d16, | ||
| 1651 | .vfp4d16sp, | ||
| 1652 | }), | ||
| 1653 | }; | ||
| 1654 | result[@intFromEnum(Feature.vfp4d16sp)] = .{ | ||
| 1655 | .llvm_name = "vfp4d16sp", | ||
| 1656 | .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", | ||
| 1657 | .dependencies = featureSet(&[_]Feature{ | ||
| 1658 | .fp16, | ||
| 1659 | .vfp3d16sp, | ||
| 1660 | }), | ||
| 1661 | }; | ||
| 1662 | result[@intFromEnum(Feature.vfp4sp)] = .{ | ||
| 1663 | .llvm_name = "vfp4sp", | ||
| 1664 | .description = "Enable VFP4 instructions with no double precision", | ||
| 1665 | .dependencies = featureSet(&[_]Feature{ | ||
| 1666 | .vfp3sp, | ||
| 1667 | .vfp4d16sp, | ||
| 1668 | }), | ||
| 1669 | }; | ||
| 1670 | result[@intFromEnum(Feature.virtualization)] = .{ | ||
| 1671 | .llvm_name = "virtualization", | ||
| 1672 | .description = "Supports Virtualization extension", | ||
| 1673 | .dependencies = featureSet(&[_]Feature{ | ||
| 1674 | .hwdiv, | ||
| 1675 | .hwdiv_arm, | ||
| 1676 | }), | ||
| 1677 | }; | ||
| 1678 | result[@intFromEnum(Feature.vldn_align)] = .{ | ||
| 1679 | .llvm_name = "vldn-align", | ||
| 1680 | .description = "Check for VLDn unaligned access", | ||
| 1681 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1682 | }; | ||
| 1683 | result[@intFromEnum(Feature.vmlx_forwarding)] = .{ | ||
| 1684 | .llvm_name = "vmlx-forwarding", | ||
| 1685 | .description = "Has multiplier accumulator forwarding", | ||
| 1686 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1687 | }; | ||
| 1688 | result[@intFromEnum(Feature.vmlx_hazards)] = .{ | ||
| 1689 | .llvm_name = "vmlx-hazards", | ||
| 1690 | .description = "Has VMLx hazards", | ||
| 1691 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1692 | }; | ||
| 1693 | result[@intFromEnum(Feature.wide_stride_vfp)] = .{ | ||
| 1694 | .llvm_name = "wide-stride-vfp", | ||
| 1695 | .description = "Use a wide stride when allocating VFP registers", | ||
| 1696 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1697 | }; | ||
| 1698 | result[@intFromEnum(Feature.xscale)] = .{ | ||
| 1699 | .llvm_name = "xscale", | ||
| 1700 | .description = "ARMv5te architecture", | ||
| 1701 | .dependencies = featureSet(&[_]Feature{ | ||
| 1702 | .v5te, | ||
| 1703 | }), | ||
| 1704 | }; | ||
| 1705 | result[@intFromEnum(Feature.zcz)] = .{ | ||
| 1706 | .llvm_name = "zcz", | ||
| 1707 | .description = "Has zero-cycle zeroing instructions", | ||
| 1708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1709 | }; | ||
| 1710 | const ti = @typeInfo(Feature); | ||
| 1711 | for (&result, 0..) |*elem, i| { | ||
| 1712 | elem.index = i; | ||
| 1713 | elem.name = ti.Enum.fields[i].name; | ||
| 1714 | } | ||
| 1715 | break :blk result; | ||
| 1716 | }; | ||
| 1717 | |||
| 1718 | pub const cpu = struct { | ||
| 1719 | pub const arm1020e = CpuModel{ | ||
| 1720 | .name = "arm1020e", | ||
| 1721 | .llvm_name = "arm1020e", | ||
| 1722 | .features = featureSet(&[_]Feature{ | ||
| 1723 | .v5te, | ||
| 1724 | }), | ||
| 1725 | }; | ||
| 1726 | pub const arm1020t = CpuModel{ | ||
| 1727 | .name = "arm1020t", | ||
| 1728 | .llvm_name = "arm1020t", | ||
| 1729 | .features = featureSet(&[_]Feature{ | ||
| 1730 | .v5t, | ||
| 1731 | }), | ||
| 1732 | }; | ||
| 1733 | pub const arm1022e = CpuModel{ | ||
| 1734 | .name = "arm1022e", | ||
| 1735 | .llvm_name = "arm1022e", | ||
| 1736 | .features = featureSet(&[_]Feature{ | ||
| 1737 | .v5te, | ||
| 1738 | }), | ||
| 1739 | }; | ||
| 1740 | pub const arm10e = CpuModel{ | ||
| 1741 | .name = "arm10e", | ||
| 1742 | .llvm_name = "arm10e", | ||
| 1743 | .features = featureSet(&[_]Feature{ | ||
| 1744 | .v5te, | ||
| 1745 | }), | ||
| 1746 | }; | ||
| 1747 | pub const arm10tdmi = CpuModel{ | ||
| 1748 | .name = "arm10tdmi", | ||
| 1749 | .llvm_name = "arm10tdmi", | ||
| 1750 | .features = featureSet(&[_]Feature{ | ||
| 1751 | .v5t, | ||
| 1752 | }), | ||
| 1753 | }; | ||
| 1754 | pub const arm1136j_s = CpuModel{ | ||
| 1755 | .name = "arm1136j_s", | ||
| 1756 | .llvm_name = "arm1136j-s", | ||
| 1757 | .features = featureSet(&[_]Feature{ | ||
| 1758 | .v6, | ||
| 1759 | }), | ||
| 1760 | }; | ||
| 1761 | pub const arm1136jf_s = CpuModel{ | ||
| 1762 | .name = "arm1136jf_s", | ||
| 1763 | .llvm_name = "arm1136jf-s", | ||
| 1764 | .features = featureSet(&[_]Feature{ | ||
| 1765 | .slowfpvmlx, | ||
| 1766 | .v6, | ||
| 1767 | .vfp2, | ||
| 1768 | }), | ||
| 1769 | }; | ||
| 1770 | pub const arm1156t2_s = CpuModel{ | ||
| 1771 | .name = "arm1156t2_s", | ||
| 1772 | .llvm_name = "arm1156t2-s", | ||
| 1773 | .features = featureSet(&[_]Feature{ | ||
| 1774 | .v6t2, | ||
| 1775 | }), | ||
| 1776 | }; | ||
| 1777 | pub const arm1156t2f_s = CpuModel{ | ||
| 1778 | .name = "arm1156t2f_s", | ||
| 1779 | .llvm_name = "arm1156t2f-s", | ||
| 1780 | .features = featureSet(&[_]Feature{ | ||
| 1781 | .slowfpvmlx, | ||
| 1782 | .v6t2, | ||
| 1783 | .vfp2, | ||
| 1784 | }), | ||
| 1785 | }; | ||
| 1786 | pub const arm1176jz_s = CpuModel{ | ||
| 1787 | .name = "arm1176jz_s", | ||
| 1788 | .llvm_name = "arm1176jz-s", | ||
| 1789 | .features = featureSet(&[_]Feature{ | ||
| 1790 | .v6kz, | ||
| 1791 | }), | ||
| 1792 | }; | ||
| 1793 | pub const arm1176jzf_s = CpuModel{ | ||
| 1794 | .name = "arm1176jzf_s", | ||
| 1795 | .llvm_name = "arm1176jzf-s", | ||
| 1796 | .features = featureSet(&[_]Feature{ | ||
| 1797 | .slowfpvmlx, | ||
| 1798 | .v6kz, | ||
| 1799 | .vfp2, | ||
| 1800 | }), | ||
| 1801 | }; | ||
| 1802 | pub const arm710t = CpuModel{ | ||
| 1803 | .name = "arm710t", | ||
| 1804 | .llvm_name = "arm710t", | ||
| 1805 | .features = featureSet(&[_]Feature{ | ||
| 1806 | .v4t, | ||
| 1807 | }), | ||
| 1808 | }; | ||
| 1809 | pub const arm720t = CpuModel{ | ||
| 1810 | .name = "arm720t", | ||
| 1811 | .llvm_name = "arm720t", | ||
| 1812 | .features = featureSet(&[_]Feature{ | ||
| 1813 | .v4t, | ||
| 1814 | }), | ||
| 1815 | }; | ||
| 1816 | pub const arm7tdmi = CpuModel{ | ||
| 1817 | .name = "arm7tdmi", | ||
| 1818 | .llvm_name = "arm7tdmi", | ||
| 1819 | .features = featureSet(&[_]Feature{ | ||
| 1820 | .v4t, | ||
| 1821 | }), | ||
| 1822 | }; | ||
| 1823 | pub const arm7tdmi_s = CpuModel{ | ||
| 1824 | .name = "arm7tdmi_s", | ||
| 1825 | .llvm_name = "arm7tdmi-s", | ||
| 1826 | .features = featureSet(&[_]Feature{ | ||
| 1827 | .v4t, | ||
| 1828 | }), | ||
| 1829 | }; | ||
| 1830 | pub const arm8 = CpuModel{ | ||
| 1831 | .name = "arm8", | ||
| 1832 | .llvm_name = "arm8", | ||
| 1833 | .features = featureSet(&[_]Feature{ | ||
| 1834 | .v4, | ||
| 1835 | }), | ||
| 1836 | }; | ||
| 1837 | pub const arm810 = CpuModel{ | ||
| 1838 | .name = "arm810", | ||
| 1839 | .llvm_name = "arm810", | ||
| 1840 | .features = featureSet(&[_]Feature{ | ||
| 1841 | .v4, | ||
| 1842 | }), | ||
| 1843 | }; | ||
| 1844 | pub const arm9 = CpuModel{ | ||
| 1845 | .name = "arm9", | ||
| 1846 | .llvm_name = "arm9", | ||
| 1847 | .features = featureSet(&[_]Feature{ | ||
| 1848 | .v4t, | ||
| 1849 | }), | ||
| 1850 | }; | ||
| 1851 | pub const arm920 = CpuModel{ | ||
| 1852 | .name = "arm920", | ||
| 1853 | .llvm_name = "arm920", | ||
| 1854 | .features = featureSet(&[_]Feature{ | ||
| 1855 | .v4t, | ||
| 1856 | }), | ||
| 1857 | }; | ||
| 1858 | pub const arm920t = CpuModel{ | ||
| 1859 | .name = "arm920t", | ||
| 1860 | .llvm_name = "arm920t", | ||
| 1861 | .features = featureSet(&[_]Feature{ | ||
| 1862 | .v4t, | ||
| 1863 | }), | ||
| 1864 | }; | ||
| 1865 | pub const arm922t = CpuModel{ | ||
| 1866 | .name = "arm922t", | ||
| 1867 | .llvm_name = "arm922t", | ||
| 1868 | .features = featureSet(&[_]Feature{ | ||
| 1869 | .v4t, | ||
| 1870 | }), | ||
| 1871 | }; | ||
| 1872 | pub const arm926ej_s = CpuModel{ | ||
| 1873 | .name = "arm926ej_s", | ||
| 1874 | .llvm_name = "arm926ej-s", | ||
| 1875 | .features = featureSet(&[_]Feature{ | ||
| 1876 | .v5te, | ||
| 1877 | }), | ||
| 1878 | }; | ||
| 1879 | pub const arm940t = CpuModel{ | ||
| 1880 | .name = "arm940t", | ||
| 1881 | .llvm_name = "arm940t", | ||
| 1882 | .features = featureSet(&[_]Feature{ | ||
| 1883 | .v4t, | ||
| 1884 | }), | ||
| 1885 | }; | ||
| 1886 | pub const arm946e_s = CpuModel{ | ||
| 1887 | .name = "arm946e_s", | ||
| 1888 | .llvm_name = "arm946e-s", | ||
| 1889 | .features = featureSet(&[_]Feature{ | ||
| 1890 | .v5te, | ||
| 1891 | }), | ||
| 1892 | }; | ||
| 1893 | pub const arm966e_s = CpuModel{ | ||
| 1894 | .name = "arm966e_s", | ||
| 1895 | .llvm_name = "arm966e-s", | ||
| 1896 | .features = featureSet(&[_]Feature{ | ||
| 1897 | .v5te, | ||
| 1898 | }), | ||
| 1899 | }; | ||
| 1900 | pub const arm968e_s = CpuModel{ | ||
| 1901 | .name = "arm968e_s", | ||
| 1902 | .llvm_name = "arm968e-s", | ||
| 1903 | .features = featureSet(&[_]Feature{ | ||
| 1904 | .v5te, | ||
| 1905 | }), | ||
| 1906 | }; | ||
| 1907 | pub const arm9e = CpuModel{ | ||
| 1908 | .name = "arm9e", | ||
| 1909 | .llvm_name = "arm9e", | ||
| 1910 | .features = featureSet(&[_]Feature{ | ||
| 1911 | .v5te, | ||
| 1912 | }), | ||
| 1913 | }; | ||
| 1914 | pub const arm9tdmi = CpuModel{ | ||
| 1915 | .name = "arm9tdmi", | ||
| 1916 | .llvm_name = "arm9tdmi", | ||
| 1917 | .features = featureSet(&[_]Feature{ | ||
| 1918 | .v4t, | ||
| 1919 | }), | ||
| 1920 | }; | ||
| 1921 | pub const baseline = CpuModel{ | ||
| 1922 | .name = "baseline", | ||
| 1923 | .llvm_name = "generic", | ||
| 1924 | .features = featureSet(&[_]Feature{ | ||
| 1925 | .v7a, | ||
| 1926 | }), | ||
| 1927 | }; | ||
| 1928 | pub const cortex_a12 = CpuModel{ | ||
| 1929 | .name = "cortex_a12", | ||
| 1930 | .llvm_name = "cortex-a12", | ||
| 1931 | .features = featureSet(&[_]Feature{ | ||
| 1932 | .avoid_partial_cpsr, | ||
| 1933 | .mp, | ||
| 1934 | .ret_addr_stack, | ||
| 1935 | .trustzone, | ||
| 1936 | .v7a, | ||
| 1937 | .vfp4, | ||
| 1938 | .virtualization, | ||
| 1939 | .vmlx_forwarding, | ||
| 1940 | }), | ||
| 1941 | }; | ||
| 1942 | pub const cortex_a15 = CpuModel{ | ||
| 1943 | .name = "cortex_a15", | ||
| 1944 | .llvm_name = "cortex-a15", | ||
| 1945 | .features = featureSet(&[_]Feature{ | ||
| 1946 | .avoid_partial_cpsr, | ||
| 1947 | .mp, | ||
| 1948 | .muxed_units, | ||
| 1949 | .ret_addr_stack, | ||
| 1950 | .splat_vfp_neon, | ||
| 1951 | .trustzone, | ||
| 1952 | .v7a, | ||
| 1953 | .vfp4, | ||
| 1954 | .virtualization, | ||
| 1955 | .vldn_align, | ||
| 1956 | }), | ||
| 1957 | }; | ||
| 1958 | pub const cortex_a17 = CpuModel{ | ||
| 1959 | .name = "cortex_a17", | ||
| 1960 | .llvm_name = "cortex-a17", | ||
| 1961 | .features = featureSet(&[_]Feature{ | ||
| 1962 | .avoid_partial_cpsr, | ||
| 1963 | .mp, | ||
| 1964 | .ret_addr_stack, | ||
| 1965 | .trustzone, | ||
| 1966 | .v7a, | ||
| 1967 | .vfp4, | ||
| 1968 | .virtualization, | ||
| 1969 | .vmlx_forwarding, | ||
| 1970 | }), | ||
| 1971 | }; | ||
| 1972 | pub const cortex_a32 = CpuModel{ | ||
| 1973 | .name = "cortex_a32", | ||
| 1974 | .llvm_name = "cortex-a32", | ||
| 1975 | .features = featureSet(&[_]Feature{ | ||
| 1976 | .v8a, | ||
| 1977 | }), | ||
| 1978 | }; | ||
| 1979 | pub const cortex_a35 = CpuModel{ | ||
| 1980 | .name = "cortex_a35", | ||
| 1981 | .llvm_name = "cortex-a35", | ||
| 1982 | .features = featureSet(&[_]Feature{ | ||
| 1983 | .v8a, | ||
| 1984 | }), | ||
| 1985 | }; | ||
| 1986 | pub const cortex_a5 = CpuModel{ | ||
| 1987 | .name = "cortex_a5", | ||
| 1988 | .llvm_name = "cortex-a5", | ||
| 1989 | .features = featureSet(&[_]Feature{ | ||
| 1990 | .mp, | ||
| 1991 | .ret_addr_stack, | ||
| 1992 | .slow_fp_brcc, | ||
| 1993 | .slowfpvfmx, | ||
| 1994 | .slowfpvmlx, | ||
| 1995 | .trustzone, | ||
| 1996 | .v7a, | ||
| 1997 | .vfp4, | ||
| 1998 | .vmlx_forwarding, | ||
| 1999 | }), | ||
| 2000 | }; | ||
| 2001 | pub const cortex_a53 = CpuModel{ | ||
| 2002 | .name = "cortex_a53", | ||
| 2003 | .llvm_name = "cortex-a53", | ||
| 2004 | .features = featureSet(&[_]Feature{ | ||
| 2005 | .fpao, | ||
| 2006 | .v8a, | ||
| 2007 | }), | ||
| 2008 | }; | ||
| 2009 | pub const cortex_a55 = CpuModel{ | ||
| 2010 | .name = "cortex_a55", | ||
| 2011 | .llvm_name = "cortex-a55", | ||
| 2012 | .features = featureSet(&[_]Feature{ | ||
| 2013 | .dotprod, | ||
| 2014 | .v8_2a, | ||
| 2015 | }), | ||
| 2016 | }; | ||
| 2017 | pub const cortex_a57 = CpuModel{ | ||
| 2018 | .name = "cortex_a57", | ||
| 2019 | .llvm_name = "cortex-a57", | ||
| 2020 | .features = featureSet(&[_]Feature{ | ||
| 2021 | .avoid_partial_cpsr, | ||
| 2022 | .cheap_predicable_cpsr, | ||
| 2023 | .fix_cortex_a57_aes_1742098, | ||
| 2024 | .fpao, | ||
| 2025 | .v8a, | ||
| 2026 | }), | ||
| 2027 | }; | ||
| 2028 | pub const cortex_a7 = CpuModel{ | ||
| 2029 | .name = "cortex_a7", | ||
| 2030 | .llvm_name = "cortex-a7", | ||
| 2031 | .features = featureSet(&[_]Feature{ | ||
| 2032 | .mp, | ||
| 2033 | .ret_addr_stack, | ||
| 2034 | .slow_fp_brcc, | ||
| 2035 | .slowfpvfmx, | ||
| 2036 | .slowfpvmlx, | ||
| 2037 | .trustzone, | ||
| 2038 | .v7a, | ||
| 2039 | .vfp4, | ||
| 2040 | .virtualization, | ||
| 2041 | .vmlx_forwarding, | ||
| 2042 | .vmlx_hazards, | ||
| 2043 | }), | ||
| 2044 | }; | ||
| 2045 | pub const cortex_a710 = CpuModel{ | ||
| 2046 | .name = "cortex_a710", | ||
| 2047 | .llvm_name = "cortex-a710", | ||
| 2048 | .features = featureSet(&[_]Feature{ | ||
| 2049 | .bf16, | ||
| 2050 | .fp16fml, | ||
| 2051 | .i8mm, | ||
| 2052 | .v9a, | ||
| 2053 | }), | ||
| 2054 | }; | ||
| 2055 | pub const cortex_a72 = CpuModel{ | ||
| 2056 | .name = "cortex_a72", | ||
| 2057 | .llvm_name = "cortex-a72", | ||
| 2058 | .features = featureSet(&[_]Feature{ | ||
| 2059 | .fix_cortex_a57_aes_1742098, | ||
| 2060 | .v8a, | ||
| 2061 | }), | ||
| 2062 | }; | ||
| 2063 | pub const cortex_a73 = CpuModel{ | ||
| 2064 | .name = "cortex_a73", | ||
| 2065 | .llvm_name = "cortex-a73", | ||
| 2066 | .features = featureSet(&[_]Feature{ | ||
| 2067 | .v8a, | ||
| 2068 | }), | ||
| 2069 | }; | ||
| 2070 | pub const cortex_a75 = CpuModel{ | ||
| 2071 | .name = "cortex_a75", | ||
| 2072 | .llvm_name = "cortex-a75", | ||
| 2073 | .features = featureSet(&[_]Feature{ | ||
| 2074 | .dotprod, | ||
| 2075 | .v8_2a, | ||
| 2076 | }), | ||
| 2077 | }; | ||
| 2078 | pub const cortex_a76 = CpuModel{ | ||
| 2079 | .name = "cortex_a76", | ||
| 2080 | .llvm_name = "cortex-a76", | ||
| 2081 | .features = featureSet(&[_]Feature{ | ||
| 2082 | .a76, | ||
| 2083 | .dotprod, | ||
| 2084 | .fullfp16, | ||
| 2085 | .v8_2a, | ||
| 2086 | }), | ||
| 2087 | }; | ||
| 2088 | pub const cortex_a76ae = CpuModel{ | ||
| 2089 | .name = "cortex_a76ae", | ||
| 2090 | .llvm_name = "cortex-a76ae", | ||
| 2091 | .features = featureSet(&[_]Feature{ | ||
| 2092 | .a76, | ||
| 2093 | .dotprod, | ||
| 2094 | .fullfp16, | ||
| 2095 | .v8_2a, | ||
| 2096 | }), | ||
| 2097 | }; | ||
| 2098 | pub const cortex_a77 = CpuModel{ | ||
| 2099 | .name = "cortex_a77", | ||
| 2100 | .llvm_name = "cortex-a77", | ||
| 2101 | .features = featureSet(&[_]Feature{ | ||
| 2102 | .dotprod, | ||
| 2103 | .fullfp16, | ||
| 2104 | .v8_2a, | ||
| 2105 | }), | ||
| 2106 | }; | ||
| 2107 | pub const cortex_a78 = CpuModel{ | ||
| 2108 | .name = "cortex_a78", | ||
| 2109 | .llvm_name = "cortex-a78", | ||
| 2110 | .features = featureSet(&[_]Feature{ | ||
| 2111 | .dotprod, | ||
| 2112 | .fullfp16, | ||
| 2113 | .v8_2a, | ||
| 2114 | }), | ||
| 2115 | }; | ||
| 2116 | pub const cortex_a78c = CpuModel{ | ||
| 2117 | .name = "cortex_a78c", | ||
| 2118 | .llvm_name = "cortex-a78c", | ||
| 2119 | .features = featureSet(&[_]Feature{ | ||
| 2120 | .dotprod, | ||
| 2121 | .fullfp16, | ||
| 2122 | .v8_2a, | ||
| 2123 | }), | ||
| 2124 | }; | ||
| 2125 | pub const cortex_a8 = CpuModel{ | ||
| 2126 | .name = "cortex_a8", | ||
| 2127 | .llvm_name = "cortex-a8", | ||
| 2128 | .features = featureSet(&[_]Feature{ | ||
| 2129 | .nonpipelined_vfp, | ||
| 2130 | .ret_addr_stack, | ||
| 2131 | .slow_fp_brcc, | ||
| 2132 | .slowfpvfmx, | ||
| 2133 | .slowfpvmlx, | ||
| 2134 | .trustzone, | ||
| 2135 | .v7a, | ||
| 2136 | .vmlx_forwarding, | ||
| 2137 | .vmlx_hazards, | ||
| 2138 | }), | ||
| 2139 | }; | ||
| 2140 | pub const cortex_a9 = CpuModel{ | ||
| 2141 | .name = "cortex_a9", | ||
| 2142 | .llvm_name = "cortex-a9", | ||
| 2143 | .features = featureSet(&[_]Feature{ | ||
| 2144 | .avoid_partial_cpsr, | ||
| 2145 | .expand_fp_mlx, | ||
| 2146 | .fp16, | ||
| 2147 | .mp, | ||
| 2148 | .muxed_units, | ||
| 2149 | .neon_fpmovs, | ||
| 2150 | .prefer_vmovsr, | ||
| 2151 | .ret_addr_stack, | ||
| 2152 | .trustzone, | ||
| 2153 | .v7a, | ||
| 2154 | .vldn_align, | ||
| 2155 | .vmlx_forwarding, | ||
| 2156 | .vmlx_hazards, | ||
| 2157 | }), | ||
| 2158 | }; | ||
| 2159 | pub const cortex_m0 = CpuModel{ | ||
| 2160 | .name = "cortex_m0", | ||
| 2161 | .llvm_name = "cortex-m0", | ||
| 2162 | .features = featureSet(&[_]Feature{ | ||
| 2163 | .no_branch_predictor, | ||
| 2164 | .v6m, | ||
| 2165 | }), | ||
| 2166 | }; | ||
| 2167 | pub const cortex_m0plus = CpuModel{ | ||
| 2168 | .name = "cortex_m0plus", | ||
| 2169 | .llvm_name = "cortex-m0plus", | ||
| 2170 | .features = featureSet(&[_]Feature{ | ||
| 2171 | .no_branch_predictor, | ||
| 2172 | .v6m, | ||
| 2173 | }), | ||
| 2174 | }; | ||
| 2175 | pub const cortex_m1 = CpuModel{ | ||
| 2176 | .name = "cortex_m1", | ||
| 2177 | .llvm_name = "cortex-m1", | ||
| 2178 | .features = featureSet(&[_]Feature{ | ||
| 2179 | .no_branch_predictor, | ||
| 2180 | .v6m, | ||
| 2181 | }), | ||
| 2182 | }; | ||
| 2183 | pub const cortex_m23 = CpuModel{ | ||
| 2184 | .name = "cortex_m23", | ||
| 2185 | .llvm_name = "cortex-m23", | ||
| 2186 | .features = featureSet(&[_]Feature{ | ||
| 2187 | .no_branch_predictor, | ||
| 2188 | .no_movt, | ||
| 2189 | .v8m, | ||
| 2190 | }), | ||
| 2191 | }; | ||
| 2192 | pub const cortex_m3 = CpuModel{ | ||
| 2193 | .name = "cortex_m3", | ||
| 2194 | .llvm_name = "cortex-m3", | ||
| 2195 | .features = featureSet(&[_]Feature{ | ||
| 2196 | .loop_align, | ||
| 2197 | .m3, | ||
| 2198 | .no_branch_predictor, | ||
| 2199 | .use_misched, | ||
| 2200 | .v7m, | ||
| 2201 | }), | ||
| 2202 | }; | ||
| 2203 | pub const cortex_m33 = CpuModel{ | ||
| 2204 | .name = "cortex_m33", | ||
| 2205 | .llvm_name = "cortex-m33", | ||
| 2206 | .features = featureSet(&[_]Feature{ | ||
| 2207 | .dsp, | ||
| 2208 | .fix_cmse_cve_2021_35465, | ||
| 2209 | .fp_armv8d16sp, | ||
| 2210 | .loop_align, | ||
| 2211 | .no_branch_predictor, | ||
| 2212 | .slowfpvfmx, | ||
| 2213 | .slowfpvmlx, | ||
| 2214 | .use_misched, | ||
| 2215 | .v8m_main, | ||
| 2216 | }), | ||
| 2217 | }; | ||
| 2218 | pub const cortex_m35p = CpuModel{ | ||
| 2219 | .name = "cortex_m35p", | ||
| 2220 | .llvm_name = "cortex-m35p", | ||
| 2221 | .features = featureSet(&[_]Feature{ | ||
| 2222 | .dsp, | ||
| 2223 | .fix_cmse_cve_2021_35465, | ||
| 2224 | .fp_armv8d16sp, | ||
| 2225 | .loop_align, | ||
| 2226 | .no_branch_predictor, | ||
| 2227 | .slowfpvfmx, | ||
| 2228 | .slowfpvmlx, | ||
| 2229 | .use_misched, | ||
| 2230 | .v8m_main, | ||
| 2231 | }), | ||
| 2232 | }; | ||
| 2233 | pub const cortex_m4 = CpuModel{ | ||
| 2234 | .name = "cortex_m4", | ||
| 2235 | .llvm_name = "cortex-m4", | ||
| 2236 | .features = featureSet(&[_]Feature{ | ||
| 2237 | .loop_align, | ||
| 2238 | .no_branch_predictor, | ||
| 2239 | .slowfpvfmx, | ||
| 2240 | .slowfpvmlx, | ||
| 2241 | .use_misched, | ||
| 2242 | .v7em, | ||
| 2243 | .vfp4d16sp, | ||
| 2244 | }), | ||
| 2245 | }; | ||
| 2246 | pub const cortex_m55 = CpuModel{ | ||
| 2247 | .name = "cortex_m55", | ||
| 2248 | .llvm_name = "cortex-m55", | ||
| 2249 | .features = featureSet(&[_]Feature{ | ||
| 2250 | .fix_cmse_cve_2021_35465, | ||
| 2251 | .fp_armv8d16, | ||
| 2252 | .loop_align, | ||
| 2253 | .mve_fp, | ||
| 2254 | .no_branch_predictor, | ||
| 2255 | .slowfpvmlx, | ||
| 2256 | .use_misched, | ||
| 2257 | .v8_1m_main, | ||
| 2258 | }), | ||
| 2259 | }; | ||
| 2260 | pub const cortex_m7 = CpuModel{ | ||
| 2261 | .name = "cortex_m7", | ||
| 2262 | .llvm_name = "cortex-m7", | ||
| 2263 | .features = featureSet(&[_]Feature{ | ||
| 2264 | .fp_armv8d16, | ||
| 2265 | .use_mipipeliner, | ||
| 2266 | .use_misched, | ||
| 2267 | .v7em, | ||
| 2268 | }), | ||
| 2269 | }; | ||
| 2270 | pub const cortex_m85 = CpuModel{ | ||
| 2271 | .name = "cortex_m85", | ||
| 2272 | .llvm_name = "cortex-m85", | ||
| 2273 | .features = featureSet(&[_]Feature{ | ||
| 2274 | .fp_armv8d16, | ||
| 2275 | .mve_fp, | ||
| 2276 | .pacbti, | ||
| 2277 | .use_misched, | ||
| 2278 | .v8_1m_main, | ||
| 2279 | }), | ||
| 2280 | }; | ||
| 2281 | pub const cortex_r4 = CpuModel{ | ||
| 2282 | .name = "cortex_r4", | ||
| 2283 | .llvm_name = "cortex-r4", | ||
| 2284 | .features = featureSet(&[_]Feature{ | ||
| 2285 | .avoid_partial_cpsr, | ||
| 2286 | .r4, | ||
| 2287 | .ret_addr_stack, | ||
| 2288 | .v7r, | ||
| 2289 | }), | ||
| 2290 | }; | ||
| 2291 | pub const cortex_r4f = CpuModel{ | ||
| 2292 | .name = "cortex_r4f", | ||
| 2293 | .llvm_name = "cortex-r4f", | ||
| 2294 | .features = featureSet(&[_]Feature{ | ||
| 2295 | .avoid_partial_cpsr, | ||
| 2296 | .r4, | ||
| 2297 | .ret_addr_stack, | ||
| 2298 | .slow_fp_brcc, | ||
| 2299 | .slowfpvfmx, | ||
| 2300 | .slowfpvmlx, | ||
| 2301 | .v7r, | ||
| 2302 | .vfp3d16, | ||
| 2303 | }), | ||
| 2304 | }; | ||
| 2305 | pub const cortex_r5 = CpuModel{ | ||
| 2306 | .name = "cortex_r5", | ||
| 2307 | .llvm_name = "cortex-r5", | ||
| 2308 | .features = featureSet(&[_]Feature{ | ||
| 2309 | .avoid_partial_cpsr, | ||
| 2310 | .hwdiv_arm, | ||
| 2311 | .ret_addr_stack, | ||
| 2312 | .slow_fp_brcc, | ||
| 2313 | .slowfpvfmx, | ||
| 2314 | .slowfpvmlx, | ||
| 2315 | .v7r, | ||
| 2316 | .vfp3d16, | ||
| 2317 | }), | ||
| 2318 | }; | ||
| 2319 | pub const cortex_r52 = CpuModel{ | ||
| 2320 | .name = "cortex_r52", | ||
| 2321 | .llvm_name = "cortex-r52", | ||
| 2322 | .features = featureSet(&[_]Feature{ | ||
| 2323 | .fpao, | ||
| 2324 | .use_misched, | ||
| 2325 | .v8r, | ||
| 2326 | }), | ||
| 2327 | }; | ||
| 2328 | pub const cortex_r7 = CpuModel{ | ||
| 2329 | .name = "cortex_r7", | ||
| 2330 | .llvm_name = "cortex-r7", | ||
| 2331 | .features = featureSet(&[_]Feature{ | ||
| 2332 | .avoid_partial_cpsr, | ||
| 2333 | .fp16, | ||
| 2334 | .hwdiv_arm, | ||
| 2335 | .mp, | ||
| 2336 | .ret_addr_stack, | ||
| 2337 | .slow_fp_brcc, | ||
| 2338 | .slowfpvfmx, | ||
| 2339 | .slowfpvmlx, | ||
| 2340 | .v7r, | ||
| 2341 | .vfp3d16, | ||
| 2342 | }), | ||
| 2343 | }; | ||
| 2344 | pub const cortex_r8 = CpuModel{ | ||
| 2345 | .name = "cortex_r8", | ||
| 2346 | .llvm_name = "cortex-r8", | ||
| 2347 | .features = featureSet(&[_]Feature{ | ||
| 2348 | .avoid_partial_cpsr, | ||
| 2349 | .fp16, | ||
| 2350 | .hwdiv_arm, | ||
| 2351 | .mp, | ||
| 2352 | .ret_addr_stack, | ||
| 2353 | .slow_fp_brcc, | ||
| 2354 | .slowfpvfmx, | ||
| 2355 | .slowfpvmlx, | ||
| 2356 | .v7r, | ||
| 2357 | .vfp3d16, | ||
| 2358 | }), | ||
| 2359 | }; | ||
| 2360 | pub const cortex_x1 = CpuModel{ | ||
| 2361 | .name = "cortex_x1", | ||
| 2362 | .llvm_name = "cortex-x1", | ||
| 2363 | .features = featureSet(&[_]Feature{ | ||
| 2364 | .dotprod, | ||
| 2365 | .fullfp16, | ||
| 2366 | .v8_2a, | ||
| 2367 | }), | ||
| 2368 | }; | ||
| 2369 | pub const cortex_x1c = CpuModel{ | ||
| 2370 | .name = "cortex_x1c", | ||
| 2371 | .llvm_name = "cortex-x1c", | ||
| 2372 | .features = featureSet(&[_]Feature{ | ||
| 2373 | .dotprod, | ||
| 2374 | .fullfp16, | ||
| 2375 | .v8_2a, | ||
| 2376 | }), | ||
| 2377 | }; | ||
| 2378 | pub const cyclone = CpuModel{ | ||
| 2379 | .name = "cyclone", | ||
| 2380 | .llvm_name = "cyclone", | ||
| 2381 | .features = featureSet(&[_]Feature{ | ||
| 2382 | .avoid_movs_shop, | ||
| 2383 | .avoid_partial_cpsr, | ||
| 2384 | .disable_postra_scheduler, | ||
| 2385 | .neonfp, | ||
| 2386 | .ret_addr_stack, | ||
| 2387 | .slowfpvfmx, | ||
| 2388 | .slowfpvmlx, | ||
| 2389 | .swift, | ||
| 2390 | .use_misched, | ||
| 2391 | .v8a, | ||
| 2392 | .zcz, | ||
| 2393 | }), | ||
| 2394 | }; | ||
| 2395 | pub const ep9312 = CpuModel{ | ||
| 2396 | .name = "ep9312", | ||
| 2397 | .llvm_name = "ep9312", | ||
| 2398 | .features = featureSet(&[_]Feature{ | ||
| 2399 | .v4t, | ||
| 2400 | }), | ||
| 2401 | }; | ||
| 2402 | pub const exynos_m1 = CpuModel{ | ||
| 2403 | .name = "exynos_m1", | ||
| 2404 | .llvm_name = null, | ||
| 2405 | .features = featureSet(&[_]Feature{ | ||
| 2406 | .exynos, | ||
| 2407 | .v8a, | ||
| 2408 | }), | ||
| 2409 | }; | ||
| 2410 | pub const exynos_m2 = CpuModel{ | ||
| 2411 | .name = "exynos_m2", | ||
| 2412 | .llvm_name = null, | ||
| 2413 | .features = featureSet(&[_]Feature{ | ||
| 2414 | .exynos, | ||
| 2415 | .v8a, | ||
| 2416 | }), | ||
| 2417 | }; | ||
| 2418 | pub const exynos_m3 = CpuModel{ | ||
| 2419 | .name = "exynos_m3", | ||
| 2420 | .llvm_name = "exynos-m3", | ||
| 2421 | .features = featureSet(&[_]Feature{ | ||
| 2422 | .exynos, | ||
| 2423 | .v8a, | ||
| 2424 | }), | ||
| 2425 | }; | ||
| 2426 | pub const exynos_m4 = CpuModel{ | ||
| 2427 | .name = "exynos_m4", | ||
| 2428 | .llvm_name = "exynos-m4", | ||
| 2429 | .features = featureSet(&[_]Feature{ | ||
| 2430 | .dotprod, | ||
| 2431 | .exynos, | ||
| 2432 | .fullfp16, | ||
| 2433 | .v8_2a, | ||
| 2434 | }), | ||
| 2435 | }; | ||
| 2436 | pub const exynos_m5 = CpuModel{ | ||
| 2437 | .name = "exynos_m5", | ||
| 2438 | .llvm_name = "exynos-m5", | ||
| 2439 | .features = featureSet(&[_]Feature{ | ||
| 2440 | .dotprod, | ||
| 2441 | .exynos, | ||
| 2442 | .fullfp16, | ||
| 2443 | .v8_2a, | ||
| 2444 | }), | ||
| 2445 | }; | ||
| 2446 | pub const generic = CpuModel{ | ||
| 2447 | .name = "generic", | ||
| 2448 | .llvm_name = "generic", | ||
| 2449 | .features = featureSet(&[_]Feature{}), | ||
| 2450 | }; | ||
| 2451 | pub const iwmmxt = CpuModel{ | ||
| 2452 | .name = "iwmmxt", | ||
| 2453 | .llvm_name = "iwmmxt", | ||
| 2454 | .features = featureSet(&[_]Feature{ | ||
| 2455 | .v5te, | ||
| 2456 | }), | ||
| 2457 | }; | ||
| 2458 | pub const krait = CpuModel{ | ||
| 2459 | .name = "krait", | ||
| 2460 | .llvm_name = "krait", | ||
| 2461 | .features = featureSet(&[_]Feature{ | ||
| 2462 | .avoid_partial_cpsr, | ||
| 2463 | .hwdiv, | ||
| 2464 | .hwdiv_arm, | ||
| 2465 | .muxed_units, | ||
| 2466 | .ret_addr_stack, | ||
| 2467 | .v7a, | ||
| 2468 | .vfp4, | ||
| 2469 | .vldn_align, | ||
| 2470 | .vmlx_forwarding, | ||
| 2471 | }), | ||
| 2472 | }; | ||
| 2473 | pub const kryo = CpuModel{ | ||
| 2474 | .name = "kryo", | ||
| 2475 | .llvm_name = "kryo", | ||
| 2476 | .features = featureSet(&[_]Feature{ | ||
| 2477 | .v8a, | ||
| 2478 | }), | ||
| 2479 | }; | ||
| 2480 | pub const mpcore = CpuModel{ | ||
| 2481 | .name = "mpcore", | ||
| 2482 | .llvm_name = "mpcore", | ||
| 2483 | .features = featureSet(&[_]Feature{ | ||
| 2484 | .slowfpvmlx, | ||
| 2485 | .v6k, | ||
| 2486 | .vfp2, | ||
| 2487 | }), | ||
| 2488 | }; | ||
| 2489 | pub const mpcorenovfp = CpuModel{ | ||
| 2490 | .name = "mpcorenovfp", | ||
| 2491 | .llvm_name = "mpcorenovfp", | ||
| 2492 | .features = featureSet(&[_]Feature{ | ||
| 2493 | .v6k, | ||
| 2494 | }), | ||
| 2495 | }; | ||
| 2496 | pub const neoverse_n1 = CpuModel{ | ||
| 2497 | .name = "neoverse_n1", | ||
| 2498 | .llvm_name = "neoverse-n1", | ||
| 2499 | .features = featureSet(&[_]Feature{ | ||
| 2500 | .dotprod, | ||
| 2501 | .v8_2a, | ||
| 2502 | }), | ||
| 2503 | }; | ||
| 2504 | pub const neoverse_n2 = CpuModel{ | ||
| 2505 | .name = "neoverse_n2", | ||
| 2506 | .llvm_name = "neoverse-n2", | ||
| 2507 | .features = featureSet(&[_]Feature{ | ||
| 2508 | .bf16, | ||
| 2509 | .i8mm, | ||
| 2510 | .v8_5a, | ||
| 2511 | }), | ||
| 2512 | }; | ||
| 2513 | pub const neoverse_v1 = CpuModel{ | ||
| 2514 | .name = "neoverse_v1", | ||
| 2515 | .llvm_name = "neoverse-v1", | ||
| 2516 | .features = featureSet(&[_]Feature{ | ||
| 2517 | .bf16, | ||
| 2518 | .fullfp16, | ||
| 2519 | .i8mm, | ||
| 2520 | .v8_4a, | ||
| 2521 | }), | ||
| 2522 | }; | ||
| 2523 | pub const sc000 = CpuModel{ | ||
| 2524 | .name = "sc000", | ||
| 2525 | .llvm_name = "sc000", | ||
| 2526 | .features = featureSet(&[_]Feature{ | ||
| 2527 | .no_branch_predictor, | ||
| 2528 | .v6m, | ||
| 2529 | }), | ||
| 2530 | }; | ||
| 2531 | pub const sc300 = CpuModel{ | ||
| 2532 | .name = "sc300", | ||
| 2533 | .llvm_name = "sc300", | ||
| 2534 | .features = featureSet(&[_]Feature{ | ||
| 2535 | .m3, | ||
| 2536 | .no_branch_predictor, | ||
| 2537 | .use_misched, | ||
| 2538 | .v7m, | ||
| 2539 | }), | ||
| 2540 | }; | ||
| 2541 | pub const strongarm = CpuModel{ | ||
| 2542 | .name = "strongarm", | ||
| 2543 | .llvm_name = "strongarm", | ||
| 2544 | .features = featureSet(&[_]Feature{ | ||
| 2545 | .v4, | ||
| 2546 | }), | ||
| 2547 | }; | ||
| 2548 | pub const strongarm110 = CpuModel{ | ||
| 2549 | .name = "strongarm110", | ||
| 2550 | .llvm_name = "strongarm110", | ||
| 2551 | .features = featureSet(&[_]Feature{ | ||
| 2552 | .v4, | ||
| 2553 | }), | ||
| 2554 | }; | ||
| 2555 | pub const strongarm1100 = CpuModel{ | ||
| 2556 | .name = "strongarm1100", | ||
| 2557 | .llvm_name = "strongarm1100", | ||
| 2558 | .features = featureSet(&[_]Feature{ | ||
| 2559 | .v4, | ||
| 2560 | }), | ||
| 2561 | }; | ||
| 2562 | pub const strongarm1110 = CpuModel{ | ||
| 2563 | .name = "strongarm1110", | ||
| 2564 | .llvm_name = "strongarm1110", | ||
| 2565 | .features = featureSet(&[_]Feature{ | ||
| 2566 | .v4, | ||
| 2567 | }), | ||
| 2568 | }; | ||
| 2569 | pub const swift = CpuModel{ | ||
| 2570 | .name = "swift", | ||
| 2571 | .llvm_name = "swift", | ||
| 2572 | .features = featureSet(&[_]Feature{ | ||
| 2573 | .avoid_movs_shop, | ||
| 2574 | .avoid_partial_cpsr, | ||
| 2575 | .disable_postra_scheduler, | ||
| 2576 | .hwdiv, | ||
| 2577 | .hwdiv_arm, | ||
| 2578 | .mp, | ||
| 2579 | .neonfp, | ||
| 2580 | .prefer_ishst, | ||
| 2581 | .prof_unpr, | ||
| 2582 | .ret_addr_stack, | ||
| 2583 | .slow_load_D_subreg, | ||
| 2584 | .slow_odd_reg, | ||
| 2585 | .slow_vdup32, | ||
| 2586 | .slow_vgetlni32, | ||
| 2587 | .slowfpvfmx, | ||
| 2588 | .slowfpvmlx, | ||
| 2589 | .swift, | ||
| 2590 | .use_misched, | ||
| 2591 | .v7a, | ||
| 2592 | .vfp4, | ||
| 2593 | .vmlx_hazards, | ||
| 2594 | .wide_stride_vfp, | ||
| 2595 | }), | ||
| 2596 | }; | ||
| 2597 | pub const xscale = CpuModel{ | ||
| 2598 | .name = "xscale", | ||
| 2599 | .llvm_name = "xscale", | ||
| 2600 | .features = featureSet(&[_]Feature{ | ||
| 2601 | .v5te, | ||
| 2602 | }), | ||
| 2603 | }; | ||
| 2604 | }; | ||
lib/std/Target/avr.zig created+2607
| ... | @@ -0,0 +1,2607 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | addsubiw, | ||
| 9 | avr0, | ||
| 10 | avr1, | ||
| 11 | avr2, | ||
| 12 | avr25, | ||
| 13 | avr3, | ||
| 14 | avr31, | ||
| 15 | avr35, | ||
| 16 | avr4, | ||
| 17 | avr5, | ||
| 18 | avr51, | ||
| 19 | avr6, | ||
| 20 | avrtiny, | ||
| 21 | @"break", | ||
| 22 | des, | ||
| 23 | eijmpcall, | ||
| 24 | elpm, | ||
| 25 | elpmx, | ||
| 26 | ijmpcall, | ||
| 27 | jmpcall, | ||
| 28 | lowbytefirst, | ||
| 29 | lpm, | ||
| 30 | lpmx, | ||
| 31 | memmappedregs, | ||
| 32 | movw, | ||
| 33 | mul, | ||
| 34 | rmw, | ||
| 35 | smallstack, | ||
| 36 | special, | ||
| 37 | spm, | ||
| 38 | spmx, | ||
| 39 | sram, | ||
| 40 | tinyencoding, | ||
| 41 | xmega, | ||
| 42 | xmega3, | ||
| 43 | xmegau, | ||
| 44 | }; | ||
| 45 | |||
| 46 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 47 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 48 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 49 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 50 | |||
| 51 | pub const all_features = blk: { | ||
| 52 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 53 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 54 | var result: [len]CpuFeature = undefined; | ||
| 55 | result[@intFromEnum(Feature.addsubiw)] = .{ | ||
| 56 | .llvm_name = "addsubiw", | ||
| 57 | .description = "Enable 16-bit register-immediate addition and subtraction instructions", | ||
| 58 | .dependencies = featureSet(&[_]Feature{}), | ||
| 59 | }; | ||
| 60 | result[@intFromEnum(Feature.avr0)] = .{ | ||
| 61 | .llvm_name = "avr0", | ||
| 62 | .description = "The device is a part of the avr0 family", | ||
| 63 | .dependencies = featureSet(&[_]Feature{}), | ||
| 64 | }; | ||
| 65 | result[@intFromEnum(Feature.avr1)] = .{ | ||
| 66 | .llvm_name = "avr1", | ||
| 67 | .description = "The device is a part of the avr1 family", | ||
| 68 | .dependencies = featureSet(&[_]Feature{ | ||
| 69 | .avr0, | ||
| 70 | .lpm, | ||
| 71 | .memmappedregs, | ||
| 72 | }), | ||
| 73 | }; | ||
| 74 | result[@intFromEnum(Feature.avr2)] = .{ | ||
| 75 | .llvm_name = "avr2", | ||
| 76 | .description = "The device is a part of the avr2 family", | ||
| 77 | .dependencies = featureSet(&[_]Feature{ | ||
| 78 | .addsubiw, | ||
| 79 | .avr1, | ||
| 80 | .ijmpcall, | ||
| 81 | .sram, | ||
| 82 | }), | ||
| 83 | }; | ||
| 84 | result[@intFromEnum(Feature.avr25)] = .{ | ||
| 85 | .llvm_name = "avr25", | ||
| 86 | .description = "The device is a part of the avr25 family", | ||
| 87 | .dependencies = featureSet(&[_]Feature{ | ||
| 88 | .avr2, | ||
| 89 | .@"break", | ||
| 90 | .lpmx, | ||
| 91 | .movw, | ||
| 92 | .spm, | ||
| 93 | }), | ||
| 94 | }; | ||
| 95 | result[@intFromEnum(Feature.avr3)] = .{ | ||
| 96 | .llvm_name = "avr3", | ||
| 97 | .description = "The device is a part of the avr3 family", | ||
| 98 | .dependencies = featureSet(&[_]Feature{ | ||
| 99 | .avr2, | ||
| 100 | .jmpcall, | ||
| 101 | }), | ||
| 102 | }; | ||
| 103 | result[@intFromEnum(Feature.avr31)] = .{ | ||
| 104 | .llvm_name = "avr31", | ||
| 105 | .description = "The device is a part of the avr31 family", | ||
| 106 | .dependencies = featureSet(&[_]Feature{ | ||
| 107 | .avr3, | ||
| 108 | .elpm, | ||
| 109 | }), | ||
| 110 | }; | ||
| 111 | result[@intFromEnum(Feature.avr35)] = .{ | ||
| 112 | .llvm_name = "avr35", | ||
| 113 | .description = "The device is a part of the avr35 family", | ||
| 114 | .dependencies = featureSet(&[_]Feature{ | ||
| 115 | .avr3, | ||
| 116 | .@"break", | ||
| 117 | .lpmx, | ||
| 118 | .movw, | ||
| 119 | .spm, | ||
| 120 | }), | ||
| 121 | }; | ||
| 122 | result[@intFromEnum(Feature.avr4)] = .{ | ||
| 123 | .llvm_name = "avr4", | ||
| 124 | .description = "The device is a part of the avr4 family", | ||
| 125 | .dependencies = featureSet(&[_]Feature{ | ||
| 126 | .avr2, | ||
| 127 | .@"break", | ||
| 128 | .lpmx, | ||
| 129 | .movw, | ||
| 130 | .mul, | ||
| 131 | .spm, | ||
| 132 | }), | ||
| 133 | }; | ||
| 134 | result[@intFromEnum(Feature.avr5)] = .{ | ||
| 135 | .llvm_name = "avr5", | ||
| 136 | .description = "The device is a part of the avr5 family", | ||
| 137 | .dependencies = featureSet(&[_]Feature{ | ||
| 138 | .avr3, | ||
| 139 | .@"break", | ||
| 140 | .lpmx, | ||
| 141 | .movw, | ||
| 142 | .mul, | ||
| 143 | .spm, | ||
| 144 | }), | ||
| 145 | }; | ||
| 146 | result[@intFromEnum(Feature.avr51)] = .{ | ||
| 147 | .llvm_name = "avr51", | ||
| 148 | .description = "The device is a part of the avr51 family", | ||
| 149 | .dependencies = featureSet(&[_]Feature{ | ||
| 150 | .avr5, | ||
| 151 | .elpm, | ||
| 152 | .elpmx, | ||
| 153 | }), | ||
| 154 | }; | ||
| 155 | result[@intFromEnum(Feature.avr6)] = .{ | ||
| 156 | .llvm_name = "avr6", | ||
| 157 | .description = "The device is a part of the avr6 family", | ||
| 158 | .dependencies = featureSet(&[_]Feature{ | ||
| 159 | .avr51, | ||
| 160 | .eijmpcall, | ||
| 161 | }), | ||
| 162 | }; | ||
| 163 | result[@intFromEnum(Feature.avrtiny)] = .{ | ||
| 164 | .llvm_name = "avrtiny", | ||
| 165 | .description = "The device is a part of the avrtiny family", | ||
| 166 | .dependencies = featureSet(&[_]Feature{ | ||
| 167 | .avr0, | ||
| 168 | .@"break", | ||
| 169 | .smallstack, | ||
| 170 | .sram, | ||
| 171 | .tinyencoding, | ||
| 172 | }), | ||
| 173 | }; | ||
| 174 | result[@intFromEnum(Feature.@"break")] = .{ | ||
| 175 | .llvm_name = "break", | ||
| 176 | .description = "The device supports the `BREAK` debugging instruction", | ||
| 177 | .dependencies = featureSet(&[_]Feature{}), | ||
| 178 | }; | ||
| 179 | result[@intFromEnum(Feature.des)] = .{ | ||
| 180 | .llvm_name = "des", | ||
| 181 | .description = "The device supports the `DES k` encryption instruction", | ||
| 182 | .dependencies = featureSet(&[_]Feature{}), | ||
| 183 | }; | ||
| 184 | result[@intFromEnum(Feature.eijmpcall)] = .{ | ||
| 185 | .llvm_name = "eijmpcall", | ||
| 186 | .description = "The device supports the `EIJMP`/`EICALL` instructions", | ||
| 187 | .dependencies = featureSet(&[_]Feature{}), | ||
| 188 | }; | ||
| 189 | result[@intFromEnum(Feature.elpm)] = .{ | ||
| 190 | .llvm_name = "elpm", | ||
| 191 | .description = "The device supports the ELPM instruction", | ||
| 192 | .dependencies = featureSet(&[_]Feature{}), | ||
| 193 | }; | ||
| 194 | result[@intFromEnum(Feature.elpmx)] = .{ | ||
| 195 | .llvm_name = "elpmx", | ||
| 196 | .description = "The device supports the `ELPM Rd, Z[+]` instructions", | ||
| 197 | .dependencies = featureSet(&[_]Feature{}), | ||
| 198 | }; | ||
| 199 | result[@intFromEnum(Feature.ijmpcall)] = .{ | ||
| 200 | .llvm_name = "ijmpcall", | ||
| 201 | .description = "The device supports `IJMP`/`ICALL`instructions", | ||
| 202 | .dependencies = featureSet(&[_]Feature{}), | ||
| 203 | }; | ||
| 204 | result[@intFromEnum(Feature.jmpcall)] = .{ | ||
| 205 | .llvm_name = "jmpcall", | ||
| 206 | .description = "The device supports the `JMP` and `CALL` instructions", | ||
| 207 | .dependencies = featureSet(&[_]Feature{}), | ||
| 208 | }; | ||
| 209 | result[@intFromEnum(Feature.lowbytefirst)] = .{ | ||
| 210 | .llvm_name = "lowbytefirst", | ||
| 211 | .description = "Do the low byte first when writing a 16-bit port or storing a 16-bit word", | ||
| 212 | .dependencies = featureSet(&[_]Feature{}), | ||
| 213 | }; | ||
| 214 | result[@intFromEnum(Feature.lpm)] = .{ | ||
| 215 | .llvm_name = "lpm", | ||
| 216 | .description = "The device supports the `LPM` instruction", | ||
| 217 | .dependencies = featureSet(&[_]Feature{}), | ||
| 218 | }; | ||
| 219 | result[@intFromEnum(Feature.lpmx)] = .{ | ||
| 220 | .llvm_name = "lpmx", | ||
| 221 | .description = "The device supports the `LPM Rd, Z[+]` instruction", | ||
| 222 | .dependencies = featureSet(&[_]Feature{}), | ||
| 223 | }; | ||
| 224 | result[@intFromEnum(Feature.memmappedregs)] = .{ | ||
| 225 | .llvm_name = "memmappedregs", | ||
| 226 | .description = "The device has CPU registers mapped in data address space", | ||
| 227 | .dependencies = featureSet(&[_]Feature{}), | ||
| 228 | }; | ||
| 229 | result[@intFromEnum(Feature.movw)] = .{ | ||
| 230 | .llvm_name = "movw", | ||
| 231 | .description = "The device supports the 16-bit MOVW instruction", | ||
| 232 | .dependencies = featureSet(&[_]Feature{}), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.mul)] = .{ | ||
| 235 | .llvm_name = "mul", | ||
| 236 | .description = "The device supports the multiplication instructions", | ||
| 237 | .dependencies = featureSet(&[_]Feature{}), | ||
| 238 | }; | ||
| 239 | result[@intFromEnum(Feature.rmw)] = .{ | ||
| 240 | .llvm_name = "rmw", | ||
| 241 | .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", | ||
| 242 | .dependencies = featureSet(&[_]Feature{}), | ||
| 243 | }; | ||
| 244 | result[@intFromEnum(Feature.smallstack)] = .{ | ||
| 245 | .llvm_name = "smallstack", | ||
| 246 | .description = "The device has an 8-bit stack pointer", | ||
| 247 | .dependencies = featureSet(&[_]Feature{}), | ||
| 248 | }; | ||
| 249 | result[@intFromEnum(Feature.special)] = .{ | ||
| 250 | .llvm_name = "special", | ||
| 251 | .description = "Enable use of the entire instruction set - used for debugging", | ||
| 252 | .dependencies = featureSet(&[_]Feature{ | ||
| 253 | .addsubiw, | ||
| 254 | .@"break", | ||
| 255 | .des, | ||
| 256 | .eijmpcall, | ||
| 257 | .elpm, | ||
| 258 | .elpmx, | ||
| 259 | .ijmpcall, | ||
| 260 | .jmpcall, | ||
| 261 | .lpm, | ||
| 262 | .lpmx, | ||
| 263 | .memmappedregs, | ||
| 264 | .movw, | ||
| 265 | .mul, | ||
| 266 | .rmw, | ||
| 267 | .spm, | ||
| 268 | .spmx, | ||
| 269 | .sram, | ||
| 270 | }), | ||
| 271 | }; | ||
| 272 | result[@intFromEnum(Feature.spm)] = .{ | ||
| 273 | .llvm_name = "spm", | ||
| 274 | .description = "The device supports the `SPM` instruction", | ||
| 275 | .dependencies = featureSet(&[_]Feature{}), | ||
| 276 | }; | ||
| 277 | result[@intFromEnum(Feature.spmx)] = .{ | ||
| 278 | .llvm_name = "spmx", | ||
| 279 | .description = "The device supports the `SPM Z+` instruction", | ||
| 280 | .dependencies = featureSet(&[_]Feature{}), | ||
| 281 | }; | ||
| 282 | result[@intFromEnum(Feature.sram)] = .{ | ||
| 283 | .llvm_name = "sram", | ||
| 284 | .description = "The device has random access memory", | ||
| 285 | .dependencies = featureSet(&[_]Feature{}), | ||
| 286 | }; | ||
| 287 | result[@intFromEnum(Feature.tinyencoding)] = .{ | ||
| 288 | .llvm_name = "tinyencoding", | ||
| 289 | .description = "The device has Tiny core specific instruction encodings", | ||
| 290 | .dependencies = featureSet(&[_]Feature{}), | ||
| 291 | }; | ||
| 292 | result[@intFromEnum(Feature.xmega)] = .{ | ||
| 293 | .llvm_name = "xmega", | ||
| 294 | .description = "The device is a part of the xmega family", | ||
| 295 | .dependencies = featureSet(&[_]Feature{ | ||
| 296 | .addsubiw, | ||
| 297 | .avr0, | ||
| 298 | .@"break", | ||
| 299 | .des, | ||
| 300 | .eijmpcall, | ||
| 301 | .elpm, | ||
| 302 | .elpmx, | ||
| 303 | .ijmpcall, | ||
| 304 | .jmpcall, | ||
| 305 | .lowbytefirst, | ||
| 306 | .lpm, | ||
| 307 | .lpmx, | ||
| 308 | .movw, | ||
| 309 | .mul, | ||
| 310 | .spm, | ||
| 311 | .spmx, | ||
| 312 | .sram, | ||
| 313 | }), | ||
| 314 | }; | ||
| 315 | result[@intFromEnum(Feature.xmega3)] = .{ | ||
| 316 | .llvm_name = "xmega3", | ||
| 317 | .description = "The device is a part of the xmega3 family", | ||
| 318 | .dependencies = featureSet(&[_]Feature{ | ||
| 319 | .addsubiw, | ||
| 320 | .avr0, | ||
| 321 | .@"break", | ||
| 322 | .ijmpcall, | ||
| 323 | .jmpcall, | ||
| 324 | .lowbytefirst, | ||
| 325 | .lpm, | ||
| 326 | .lpmx, | ||
| 327 | .movw, | ||
| 328 | .mul, | ||
| 329 | .sram, | ||
| 330 | }), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.xmegau)] = .{ | ||
| 333 | .llvm_name = "xmegau", | ||
| 334 | .description = "The device is a part of the xmegau family", | ||
| 335 | .dependencies = featureSet(&[_]Feature{ | ||
| 336 | .rmw, | ||
| 337 | .xmega, | ||
| 338 | }), | ||
| 339 | }; | ||
| 340 | const ti = @typeInfo(Feature); | ||
| 341 | for (&result, 0..) |*elem, i| { | ||
| 342 | elem.index = i; | ||
| 343 | elem.name = ti.Enum.fields[i].name; | ||
| 344 | } | ||
| 345 | break :blk result; | ||
| 346 | }; | ||
| 347 | |||
| 348 | pub const cpu = struct { | ||
| 349 | pub const at43usb320 = CpuModel{ | ||
| 350 | .name = "at43usb320", | ||
| 351 | .llvm_name = "at43usb320", | ||
| 352 | .features = featureSet(&[_]Feature{ | ||
| 353 | .avr31, | ||
| 354 | }), | ||
| 355 | }; | ||
| 356 | pub const at43usb355 = CpuModel{ | ||
| 357 | .name = "at43usb355", | ||
| 358 | .llvm_name = "at43usb355", | ||
| 359 | .features = featureSet(&[_]Feature{ | ||
| 360 | .avr3, | ||
| 361 | }), | ||
| 362 | }; | ||
| 363 | pub const at76c711 = CpuModel{ | ||
| 364 | .name = "at76c711", | ||
| 365 | .llvm_name = "at76c711", | ||
| 366 | .features = featureSet(&[_]Feature{ | ||
| 367 | .avr3, | ||
| 368 | }), | ||
| 369 | }; | ||
| 370 | pub const at86rf401 = CpuModel{ | ||
| 371 | .name = "at86rf401", | ||
| 372 | .llvm_name = "at86rf401", | ||
| 373 | .features = featureSet(&[_]Feature{ | ||
| 374 | .avr2, | ||
| 375 | .lpmx, | ||
| 376 | .movw, | ||
| 377 | }), | ||
| 378 | }; | ||
| 379 | pub const at90c8534 = CpuModel{ | ||
| 380 | .name = "at90c8534", | ||
| 381 | .llvm_name = "at90c8534", | ||
| 382 | .features = featureSet(&[_]Feature{ | ||
| 383 | .avr2, | ||
| 384 | }), | ||
| 385 | }; | ||
| 386 | pub const at90can128 = CpuModel{ | ||
| 387 | .name = "at90can128", | ||
| 388 | .llvm_name = "at90can128", | ||
| 389 | .features = featureSet(&[_]Feature{ | ||
| 390 | .avr51, | ||
| 391 | }), | ||
| 392 | }; | ||
| 393 | pub const at90can32 = CpuModel{ | ||
| 394 | .name = "at90can32", | ||
| 395 | .llvm_name = "at90can32", | ||
| 396 | .features = featureSet(&[_]Feature{ | ||
| 397 | .avr5, | ||
| 398 | }), | ||
| 399 | }; | ||
| 400 | pub const at90can64 = CpuModel{ | ||
| 401 | .name = "at90can64", | ||
| 402 | .llvm_name = "at90can64", | ||
| 403 | .features = featureSet(&[_]Feature{ | ||
| 404 | .avr5, | ||
| 405 | }), | ||
| 406 | }; | ||
| 407 | pub const at90pwm1 = CpuModel{ | ||
| 408 | .name = "at90pwm1", | ||
| 409 | .llvm_name = "at90pwm1", | ||
| 410 | .features = featureSet(&[_]Feature{ | ||
| 411 | .avr4, | ||
| 412 | }), | ||
| 413 | }; | ||
| 414 | pub const at90pwm161 = CpuModel{ | ||
| 415 | .name = "at90pwm161", | ||
| 416 | .llvm_name = "at90pwm161", | ||
| 417 | .features = featureSet(&[_]Feature{ | ||
| 418 | .avr5, | ||
| 419 | }), | ||
| 420 | }; | ||
| 421 | pub const at90pwm2 = CpuModel{ | ||
| 422 | .name = "at90pwm2", | ||
| 423 | .llvm_name = "at90pwm2", | ||
| 424 | .features = featureSet(&[_]Feature{ | ||
| 425 | .avr4, | ||
| 426 | }), | ||
| 427 | }; | ||
| 428 | pub const at90pwm216 = CpuModel{ | ||
| 429 | .name = "at90pwm216", | ||
| 430 | .llvm_name = "at90pwm216", | ||
| 431 | .features = featureSet(&[_]Feature{ | ||
| 432 | .avr5, | ||
| 433 | }), | ||
| 434 | }; | ||
| 435 | pub const at90pwm2b = CpuModel{ | ||
| 436 | .name = "at90pwm2b", | ||
| 437 | .llvm_name = "at90pwm2b", | ||
| 438 | .features = featureSet(&[_]Feature{ | ||
| 439 | .avr4, | ||
| 440 | }), | ||
| 441 | }; | ||
| 442 | pub const at90pwm3 = CpuModel{ | ||
| 443 | .name = "at90pwm3", | ||
| 444 | .llvm_name = "at90pwm3", | ||
| 445 | .features = featureSet(&[_]Feature{ | ||
| 446 | .avr4, | ||
| 447 | }), | ||
| 448 | }; | ||
| 449 | pub const at90pwm316 = CpuModel{ | ||
| 450 | .name = "at90pwm316", | ||
| 451 | .llvm_name = "at90pwm316", | ||
| 452 | .features = featureSet(&[_]Feature{ | ||
| 453 | .avr5, | ||
| 454 | }), | ||
| 455 | }; | ||
| 456 | pub const at90pwm3b = CpuModel{ | ||
| 457 | .name = "at90pwm3b", | ||
| 458 | .llvm_name = "at90pwm3b", | ||
| 459 | .features = featureSet(&[_]Feature{ | ||
| 460 | .avr4, | ||
| 461 | }), | ||
| 462 | }; | ||
| 463 | pub const at90pwm81 = CpuModel{ | ||
| 464 | .name = "at90pwm81", | ||
| 465 | .llvm_name = "at90pwm81", | ||
| 466 | .features = featureSet(&[_]Feature{ | ||
| 467 | .avr4, | ||
| 468 | }), | ||
| 469 | }; | ||
| 470 | pub const at90s1200 = CpuModel{ | ||
| 471 | .name = "at90s1200", | ||
| 472 | .llvm_name = "at90s1200", | ||
| 473 | .features = featureSet(&[_]Feature{ | ||
| 474 | .avr0, | ||
| 475 | .smallstack, | ||
| 476 | }), | ||
| 477 | }; | ||
| 478 | pub const at90s2313 = CpuModel{ | ||
| 479 | .name = "at90s2313", | ||
| 480 | .llvm_name = "at90s2313", | ||
| 481 | .features = featureSet(&[_]Feature{ | ||
| 482 | .avr2, | ||
| 483 | .smallstack, | ||
| 484 | }), | ||
| 485 | }; | ||
| 486 | pub const at90s2323 = CpuModel{ | ||
| 487 | .name = "at90s2323", | ||
| 488 | .llvm_name = "at90s2323", | ||
| 489 | .features = featureSet(&[_]Feature{ | ||
| 490 | .avr2, | ||
| 491 | .smallstack, | ||
| 492 | }), | ||
| 493 | }; | ||
| 494 | pub const at90s2333 = CpuModel{ | ||
| 495 | .name = "at90s2333", | ||
| 496 | .llvm_name = "at90s2333", | ||
| 497 | .features = featureSet(&[_]Feature{ | ||
| 498 | .avr2, | ||
| 499 | .smallstack, | ||
| 500 | }), | ||
| 501 | }; | ||
| 502 | pub const at90s2343 = CpuModel{ | ||
| 503 | .name = "at90s2343", | ||
| 504 | .llvm_name = "at90s2343", | ||
| 505 | .features = featureSet(&[_]Feature{ | ||
| 506 | .avr2, | ||
| 507 | .smallstack, | ||
| 508 | }), | ||
| 509 | }; | ||
| 510 | pub const at90s4414 = CpuModel{ | ||
| 511 | .name = "at90s4414", | ||
| 512 | .llvm_name = "at90s4414", | ||
| 513 | .features = featureSet(&[_]Feature{ | ||
| 514 | .avr2, | ||
| 515 | .smallstack, | ||
| 516 | }), | ||
| 517 | }; | ||
| 518 | pub const at90s4433 = CpuModel{ | ||
| 519 | .name = "at90s4433", | ||
| 520 | .llvm_name = "at90s4433", | ||
| 521 | .features = featureSet(&[_]Feature{ | ||
| 522 | .avr2, | ||
| 523 | .smallstack, | ||
| 524 | }), | ||
| 525 | }; | ||
| 526 | pub const at90s4434 = CpuModel{ | ||
| 527 | .name = "at90s4434", | ||
| 528 | .llvm_name = "at90s4434", | ||
| 529 | .features = featureSet(&[_]Feature{ | ||
| 530 | .avr2, | ||
| 531 | .smallstack, | ||
| 532 | }), | ||
| 533 | }; | ||
| 534 | pub const at90s8515 = CpuModel{ | ||
| 535 | .name = "at90s8515", | ||
| 536 | .llvm_name = "at90s8515", | ||
| 537 | .features = featureSet(&[_]Feature{ | ||
| 538 | .avr2, | ||
| 539 | }), | ||
| 540 | }; | ||
| 541 | pub const at90s8535 = CpuModel{ | ||
| 542 | .name = "at90s8535", | ||
| 543 | .llvm_name = "at90s8535", | ||
| 544 | .features = featureSet(&[_]Feature{ | ||
| 545 | .avr2, | ||
| 546 | }), | ||
| 547 | }; | ||
| 548 | pub const at90scr100 = CpuModel{ | ||
| 549 | .name = "at90scr100", | ||
| 550 | .llvm_name = "at90scr100", | ||
| 551 | .features = featureSet(&[_]Feature{ | ||
| 552 | .avr5, | ||
| 553 | }), | ||
| 554 | }; | ||
| 555 | pub const at90usb1286 = CpuModel{ | ||
| 556 | .name = "at90usb1286", | ||
| 557 | .llvm_name = "at90usb1286", | ||
| 558 | .features = featureSet(&[_]Feature{ | ||
| 559 | .avr51, | ||
| 560 | }), | ||
| 561 | }; | ||
| 562 | pub const at90usb1287 = CpuModel{ | ||
| 563 | .name = "at90usb1287", | ||
| 564 | .llvm_name = "at90usb1287", | ||
| 565 | .features = featureSet(&[_]Feature{ | ||
| 566 | .avr51, | ||
| 567 | }), | ||
| 568 | }; | ||
| 569 | pub const at90usb162 = CpuModel{ | ||
| 570 | .name = "at90usb162", | ||
| 571 | .llvm_name = "at90usb162", | ||
| 572 | .features = featureSet(&[_]Feature{ | ||
| 573 | .avr35, | ||
| 574 | }), | ||
| 575 | }; | ||
| 576 | pub const at90usb646 = CpuModel{ | ||
| 577 | .name = "at90usb646", | ||
| 578 | .llvm_name = "at90usb646", | ||
| 579 | .features = featureSet(&[_]Feature{ | ||
| 580 | .avr5, | ||
| 581 | }), | ||
| 582 | }; | ||
| 583 | pub const at90usb647 = CpuModel{ | ||
| 584 | .name = "at90usb647", | ||
| 585 | .llvm_name = "at90usb647", | ||
| 586 | .features = featureSet(&[_]Feature{ | ||
| 587 | .avr5, | ||
| 588 | }), | ||
| 589 | }; | ||
| 590 | pub const at90usb82 = CpuModel{ | ||
| 591 | .name = "at90usb82", | ||
| 592 | .llvm_name = "at90usb82", | ||
| 593 | .features = featureSet(&[_]Feature{ | ||
| 594 | .avr35, | ||
| 595 | }), | ||
| 596 | }; | ||
| 597 | pub const at94k = CpuModel{ | ||
| 598 | .name = "at94k", | ||
| 599 | .llvm_name = "at94k", | ||
| 600 | .features = featureSet(&[_]Feature{ | ||
| 601 | .avr3, | ||
| 602 | .lpmx, | ||
| 603 | .movw, | ||
| 604 | .mul, | ||
| 605 | }), | ||
| 606 | }; | ||
| 607 | pub const ata5272 = CpuModel{ | ||
| 608 | .name = "ata5272", | ||
| 609 | .llvm_name = "ata5272", | ||
| 610 | .features = featureSet(&[_]Feature{ | ||
| 611 | .avr25, | ||
| 612 | }), | ||
| 613 | }; | ||
| 614 | pub const ata5505 = CpuModel{ | ||
| 615 | .name = "ata5505", | ||
| 616 | .llvm_name = "ata5505", | ||
| 617 | .features = featureSet(&[_]Feature{ | ||
| 618 | .avr35, | ||
| 619 | }), | ||
| 620 | }; | ||
| 621 | pub const ata5702m322 = CpuModel{ | ||
| 622 | .name = "ata5702m322", | ||
| 623 | .llvm_name = "ata5702m322", | ||
| 624 | .features = featureSet(&[_]Feature{ | ||
| 625 | .avr5, | ||
| 626 | }), | ||
| 627 | }; | ||
| 628 | pub const ata5782 = CpuModel{ | ||
| 629 | .name = "ata5782", | ||
| 630 | .llvm_name = "ata5782", | ||
| 631 | .features = featureSet(&[_]Feature{ | ||
| 632 | .avr5, | ||
| 633 | }), | ||
| 634 | }; | ||
| 635 | pub const ata5790 = CpuModel{ | ||
| 636 | .name = "ata5790", | ||
| 637 | .llvm_name = "ata5790", | ||
| 638 | .features = featureSet(&[_]Feature{ | ||
| 639 | .avr5, | ||
| 640 | }), | ||
| 641 | }; | ||
| 642 | pub const ata5790n = CpuModel{ | ||
| 643 | .name = "ata5790n", | ||
| 644 | .llvm_name = "ata5790n", | ||
| 645 | .features = featureSet(&[_]Feature{ | ||
| 646 | .avr5, | ||
| 647 | }), | ||
| 648 | }; | ||
| 649 | pub const ata5791 = CpuModel{ | ||
| 650 | .name = "ata5791", | ||
| 651 | .llvm_name = "ata5791", | ||
| 652 | .features = featureSet(&[_]Feature{ | ||
| 653 | .avr5, | ||
| 654 | }), | ||
| 655 | }; | ||
| 656 | pub const ata5795 = CpuModel{ | ||
| 657 | .name = "ata5795", | ||
| 658 | .llvm_name = "ata5795", | ||
| 659 | .features = featureSet(&[_]Feature{ | ||
| 660 | .avr5, | ||
| 661 | }), | ||
| 662 | }; | ||
| 663 | pub const ata5831 = CpuModel{ | ||
| 664 | .name = "ata5831", | ||
| 665 | .llvm_name = "ata5831", | ||
| 666 | .features = featureSet(&[_]Feature{ | ||
| 667 | .avr5, | ||
| 668 | }), | ||
| 669 | }; | ||
| 670 | pub const ata6285 = CpuModel{ | ||
| 671 | .name = "ata6285", | ||
| 672 | .llvm_name = "ata6285", | ||
| 673 | .features = featureSet(&[_]Feature{ | ||
| 674 | .avr4, | ||
| 675 | }), | ||
| 676 | }; | ||
| 677 | pub const ata6286 = CpuModel{ | ||
| 678 | .name = "ata6286", | ||
| 679 | .llvm_name = "ata6286", | ||
| 680 | .features = featureSet(&[_]Feature{ | ||
| 681 | .avr4, | ||
| 682 | }), | ||
| 683 | }; | ||
| 684 | pub const ata6289 = CpuModel{ | ||
| 685 | .name = "ata6289", | ||
| 686 | .llvm_name = "ata6289", | ||
| 687 | .features = featureSet(&[_]Feature{ | ||
| 688 | .avr4, | ||
| 689 | }), | ||
| 690 | }; | ||
| 691 | pub const ata6612c = CpuModel{ | ||
| 692 | .name = "ata6612c", | ||
| 693 | .llvm_name = "ata6612c", | ||
| 694 | .features = featureSet(&[_]Feature{ | ||
| 695 | .avr4, | ||
| 696 | }), | ||
| 697 | }; | ||
| 698 | pub const ata6613c = CpuModel{ | ||
| 699 | .name = "ata6613c", | ||
| 700 | .llvm_name = "ata6613c", | ||
| 701 | .features = featureSet(&[_]Feature{ | ||
| 702 | .avr5, | ||
| 703 | }), | ||
| 704 | }; | ||
| 705 | pub const ata6614q = CpuModel{ | ||
| 706 | .name = "ata6614q", | ||
| 707 | .llvm_name = "ata6614q", | ||
| 708 | .features = featureSet(&[_]Feature{ | ||
| 709 | .avr5, | ||
| 710 | }), | ||
| 711 | }; | ||
| 712 | pub const ata6616c = CpuModel{ | ||
| 713 | .name = "ata6616c", | ||
| 714 | .llvm_name = "ata6616c", | ||
| 715 | .features = featureSet(&[_]Feature{ | ||
| 716 | .avr25, | ||
| 717 | }), | ||
| 718 | }; | ||
| 719 | pub const ata6617c = CpuModel{ | ||
| 720 | .name = "ata6617c", | ||
| 721 | .llvm_name = "ata6617c", | ||
| 722 | .features = featureSet(&[_]Feature{ | ||
| 723 | .avr35, | ||
| 724 | }), | ||
| 725 | }; | ||
| 726 | pub const ata664251 = CpuModel{ | ||
| 727 | .name = "ata664251", | ||
| 728 | .llvm_name = "ata664251", | ||
| 729 | .features = featureSet(&[_]Feature{ | ||
| 730 | .avr35, | ||
| 731 | }), | ||
| 732 | }; | ||
| 733 | pub const ata8210 = CpuModel{ | ||
| 734 | .name = "ata8210", | ||
| 735 | .llvm_name = "ata8210", | ||
| 736 | .features = featureSet(&[_]Feature{ | ||
| 737 | .avr5, | ||
| 738 | }), | ||
| 739 | }; | ||
| 740 | pub const ata8510 = CpuModel{ | ||
| 741 | .name = "ata8510", | ||
| 742 | .llvm_name = "ata8510", | ||
| 743 | .features = featureSet(&[_]Feature{ | ||
| 744 | .avr5, | ||
| 745 | }), | ||
| 746 | }; | ||
| 747 | pub const atmega103 = CpuModel{ | ||
| 748 | .name = "atmega103", | ||
| 749 | .llvm_name = "atmega103", | ||
| 750 | .features = featureSet(&[_]Feature{ | ||
| 751 | .avr31, | ||
| 752 | }), | ||
| 753 | }; | ||
| 754 | pub const atmega128 = CpuModel{ | ||
| 755 | .name = "atmega128", | ||
| 756 | .llvm_name = "atmega128", | ||
| 757 | .features = featureSet(&[_]Feature{ | ||
| 758 | .avr51, | ||
| 759 | }), | ||
| 760 | }; | ||
| 761 | pub const atmega1280 = CpuModel{ | ||
| 762 | .name = "atmega1280", | ||
| 763 | .llvm_name = "atmega1280", | ||
| 764 | .features = featureSet(&[_]Feature{ | ||
| 765 | .avr51, | ||
| 766 | }), | ||
| 767 | }; | ||
| 768 | pub const atmega1281 = CpuModel{ | ||
| 769 | .name = "atmega1281", | ||
| 770 | .llvm_name = "atmega1281", | ||
| 771 | .features = featureSet(&[_]Feature{ | ||
| 772 | .avr51, | ||
| 773 | }), | ||
| 774 | }; | ||
| 775 | pub const atmega1284 = CpuModel{ | ||
| 776 | .name = "atmega1284", | ||
| 777 | .llvm_name = "atmega1284", | ||
| 778 | .features = featureSet(&[_]Feature{ | ||
| 779 | .avr51, | ||
| 780 | }), | ||
| 781 | }; | ||
| 782 | pub const atmega1284p = CpuModel{ | ||
| 783 | .name = "atmega1284p", | ||
| 784 | .llvm_name = "atmega1284p", | ||
| 785 | .features = featureSet(&[_]Feature{ | ||
| 786 | .avr51, | ||
| 787 | }), | ||
| 788 | }; | ||
| 789 | pub const atmega1284rfr2 = CpuModel{ | ||
| 790 | .name = "atmega1284rfr2", | ||
| 791 | .llvm_name = "atmega1284rfr2", | ||
| 792 | .features = featureSet(&[_]Feature{ | ||
| 793 | .avr51, | ||
| 794 | }), | ||
| 795 | }; | ||
| 796 | pub const atmega128a = CpuModel{ | ||
| 797 | .name = "atmega128a", | ||
| 798 | .llvm_name = "atmega128a", | ||
| 799 | .features = featureSet(&[_]Feature{ | ||
| 800 | .avr51, | ||
| 801 | }), | ||
| 802 | }; | ||
| 803 | pub const atmega128rfa1 = CpuModel{ | ||
| 804 | .name = "atmega128rfa1", | ||
| 805 | .llvm_name = "atmega128rfa1", | ||
| 806 | .features = featureSet(&[_]Feature{ | ||
| 807 | .avr51, | ||
| 808 | }), | ||
| 809 | }; | ||
| 810 | pub const atmega128rfr2 = CpuModel{ | ||
| 811 | .name = "atmega128rfr2", | ||
| 812 | .llvm_name = "atmega128rfr2", | ||
| 813 | .features = featureSet(&[_]Feature{ | ||
| 814 | .avr51, | ||
| 815 | }), | ||
| 816 | }; | ||
| 817 | pub const atmega16 = CpuModel{ | ||
| 818 | .name = "atmega16", | ||
| 819 | .llvm_name = "atmega16", | ||
| 820 | .features = featureSet(&[_]Feature{ | ||
| 821 | .avr5, | ||
| 822 | }), | ||
| 823 | }; | ||
| 824 | pub const atmega1608 = CpuModel{ | ||
| 825 | .name = "atmega1608", | ||
| 826 | .llvm_name = "atmega1608", | ||
| 827 | .features = featureSet(&[_]Feature{ | ||
| 828 | .xmega3, | ||
| 829 | }), | ||
| 830 | }; | ||
| 831 | pub const atmega1609 = CpuModel{ | ||
| 832 | .name = "atmega1609", | ||
| 833 | .llvm_name = "atmega1609", | ||
| 834 | .features = featureSet(&[_]Feature{ | ||
| 835 | .xmega3, | ||
| 836 | }), | ||
| 837 | }; | ||
| 838 | pub const atmega161 = CpuModel{ | ||
| 839 | .name = "atmega161", | ||
| 840 | .llvm_name = "atmega161", | ||
| 841 | .features = featureSet(&[_]Feature{ | ||
| 842 | .avr3, | ||
| 843 | .lpmx, | ||
| 844 | .movw, | ||
| 845 | .mul, | ||
| 846 | .spm, | ||
| 847 | }), | ||
| 848 | }; | ||
| 849 | pub const atmega162 = CpuModel{ | ||
| 850 | .name = "atmega162", | ||
| 851 | .llvm_name = "atmega162", | ||
| 852 | .features = featureSet(&[_]Feature{ | ||
| 853 | .avr5, | ||
| 854 | }), | ||
| 855 | }; | ||
| 856 | pub const atmega163 = CpuModel{ | ||
| 857 | .name = "atmega163", | ||
| 858 | .llvm_name = "atmega163", | ||
| 859 | .features = featureSet(&[_]Feature{ | ||
| 860 | .avr3, | ||
| 861 | .lpmx, | ||
| 862 | .movw, | ||
| 863 | .mul, | ||
| 864 | .spm, | ||
| 865 | }), | ||
| 866 | }; | ||
| 867 | pub const atmega164a = CpuModel{ | ||
| 868 | .name = "atmega164a", | ||
| 869 | .llvm_name = "atmega164a", | ||
| 870 | .features = featureSet(&[_]Feature{ | ||
| 871 | .avr5, | ||
| 872 | }), | ||
| 873 | }; | ||
| 874 | pub const atmega164p = CpuModel{ | ||
| 875 | .name = "atmega164p", | ||
| 876 | .llvm_name = "atmega164p", | ||
| 877 | .features = featureSet(&[_]Feature{ | ||
| 878 | .avr5, | ||
| 879 | }), | ||
| 880 | }; | ||
| 881 | pub const atmega164pa = CpuModel{ | ||
| 882 | .name = "atmega164pa", | ||
| 883 | .llvm_name = "atmega164pa", | ||
| 884 | .features = featureSet(&[_]Feature{ | ||
| 885 | .avr5, | ||
| 886 | }), | ||
| 887 | }; | ||
| 888 | pub const atmega165 = CpuModel{ | ||
| 889 | .name = "atmega165", | ||
| 890 | .llvm_name = "atmega165", | ||
| 891 | .features = featureSet(&[_]Feature{ | ||
| 892 | .avr5, | ||
| 893 | }), | ||
| 894 | }; | ||
| 895 | pub const atmega165a = CpuModel{ | ||
| 896 | .name = "atmega165a", | ||
| 897 | .llvm_name = "atmega165a", | ||
| 898 | .features = featureSet(&[_]Feature{ | ||
| 899 | .avr5, | ||
| 900 | }), | ||
| 901 | }; | ||
| 902 | pub const atmega165p = CpuModel{ | ||
| 903 | .name = "atmega165p", | ||
| 904 | .llvm_name = "atmega165p", | ||
| 905 | .features = featureSet(&[_]Feature{ | ||
| 906 | .avr5, | ||
| 907 | }), | ||
| 908 | }; | ||
| 909 | pub const atmega165pa = CpuModel{ | ||
| 910 | .name = "atmega165pa", | ||
| 911 | .llvm_name = "atmega165pa", | ||
| 912 | .features = featureSet(&[_]Feature{ | ||
| 913 | .avr5, | ||
| 914 | }), | ||
| 915 | }; | ||
| 916 | pub const atmega168 = CpuModel{ | ||
| 917 | .name = "atmega168", | ||
| 918 | .llvm_name = "atmega168", | ||
| 919 | .features = featureSet(&[_]Feature{ | ||
| 920 | .avr5, | ||
| 921 | }), | ||
| 922 | }; | ||
| 923 | pub const atmega168a = CpuModel{ | ||
| 924 | .name = "atmega168a", | ||
| 925 | .llvm_name = "atmega168a", | ||
| 926 | .features = featureSet(&[_]Feature{ | ||
| 927 | .avr5, | ||
| 928 | }), | ||
| 929 | }; | ||
| 930 | pub const atmega168p = CpuModel{ | ||
| 931 | .name = "atmega168p", | ||
| 932 | .llvm_name = "atmega168p", | ||
| 933 | .features = featureSet(&[_]Feature{ | ||
| 934 | .avr5, | ||
| 935 | }), | ||
| 936 | }; | ||
| 937 | pub const atmega168pa = CpuModel{ | ||
| 938 | .name = "atmega168pa", | ||
| 939 | .llvm_name = "atmega168pa", | ||
| 940 | .features = featureSet(&[_]Feature{ | ||
| 941 | .avr5, | ||
| 942 | }), | ||
| 943 | }; | ||
| 944 | pub const atmega168pb = CpuModel{ | ||
| 945 | .name = "atmega168pb", | ||
| 946 | .llvm_name = "atmega168pb", | ||
| 947 | .features = featureSet(&[_]Feature{ | ||
| 948 | .avr5, | ||
| 949 | }), | ||
| 950 | }; | ||
| 951 | pub const atmega169 = CpuModel{ | ||
| 952 | .name = "atmega169", | ||
| 953 | .llvm_name = "atmega169", | ||
| 954 | .features = featureSet(&[_]Feature{ | ||
| 955 | .avr5, | ||
| 956 | }), | ||
| 957 | }; | ||
| 958 | pub const atmega169a = CpuModel{ | ||
| 959 | .name = "atmega169a", | ||
| 960 | .llvm_name = "atmega169a", | ||
| 961 | .features = featureSet(&[_]Feature{ | ||
| 962 | .avr5, | ||
| 963 | }), | ||
| 964 | }; | ||
| 965 | pub const atmega169p = CpuModel{ | ||
| 966 | .name = "atmega169p", | ||
| 967 | .llvm_name = "atmega169p", | ||
| 968 | .features = featureSet(&[_]Feature{ | ||
| 969 | .avr5, | ||
| 970 | }), | ||
| 971 | }; | ||
| 972 | pub const atmega169pa = CpuModel{ | ||
| 973 | .name = "atmega169pa", | ||
| 974 | .llvm_name = "atmega169pa", | ||
| 975 | .features = featureSet(&[_]Feature{ | ||
| 976 | .avr5, | ||
| 977 | }), | ||
| 978 | }; | ||
| 979 | pub const atmega16a = CpuModel{ | ||
| 980 | .name = "atmega16a", | ||
| 981 | .llvm_name = "atmega16a", | ||
| 982 | .features = featureSet(&[_]Feature{ | ||
| 983 | .avr5, | ||
| 984 | }), | ||
| 985 | }; | ||
| 986 | pub const atmega16hva = CpuModel{ | ||
| 987 | .name = "atmega16hva", | ||
| 988 | .llvm_name = "atmega16hva", | ||
| 989 | .features = featureSet(&[_]Feature{ | ||
| 990 | .avr5, | ||
| 991 | }), | ||
| 992 | }; | ||
| 993 | pub const atmega16hva2 = CpuModel{ | ||
| 994 | .name = "atmega16hva2", | ||
| 995 | .llvm_name = "atmega16hva2", | ||
| 996 | .features = featureSet(&[_]Feature{ | ||
| 997 | .avr5, | ||
| 998 | }), | ||
| 999 | }; | ||
| 1000 | pub const atmega16hvb = CpuModel{ | ||
| 1001 | .name = "atmega16hvb", | ||
| 1002 | .llvm_name = "atmega16hvb", | ||
| 1003 | .features = featureSet(&[_]Feature{ | ||
| 1004 | .avr5, | ||
| 1005 | }), | ||
| 1006 | }; | ||
| 1007 | pub const atmega16hvbrevb = CpuModel{ | ||
| 1008 | .name = "atmega16hvbrevb", | ||
| 1009 | .llvm_name = "atmega16hvbrevb", | ||
| 1010 | .features = featureSet(&[_]Feature{ | ||
| 1011 | .avr5, | ||
| 1012 | }), | ||
| 1013 | }; | ||
| 1014 | pub const atmega16m1 = CpuModel{ | ||
| 1015 | .name = "atmega16m1", | ||
| 1016 | .llvm_name = "atmega16m1", | ||
| 1017 | .features = featureSet(&[_]Feature{ | ||
| 1018 | .avr5, | ||
| 1019 | }), | ||
| 1020 | }; | ||
| 1021 | pub const atmega16u2 = CpuModel{ | ||
| 1022 | .name = "atmega16u2", | ||
| 1023 | .llvm_name = "atmega16u2", | ||
| 1024 | .features = featureSet(&[_]Feature{ | ||
| 1025 | .avr35, | ||
| 1026 | }), | ||
| 1027 | }; | ||
| 1028 | pub const atmega16u4 = CpuModel{ | ||
| 1029 | .name = "atmega16u4", | ||
| 1030 | .llvm_name = "atmega16u4", | ||
| 1031 | .features = featureSet(&[_]Feature{ | ||
| 1032 | .avr5, | ||
| 1033 | }), | ||
| 1034 | }; | ||
| 1035 | pub const atmega2560 = CpuModel{ | ||
| 1036 | .name = "atmega2560", | ||
| 1037 | .llvm_name = "atmega2560", | ||
| 1038 | .features = featureSet(&[_]Feature{ | ||
| 1039 | .avr6, | ||
| 1040 | }), | ||
| 1041 | }; | ||
| 1042 | pub const atmega2561 = CpuModel{ | ||
| 1043 | .name = "atmega2561", | ||
| 1044 | .llvm_name = "atmega2561", | ||
| 1045 | .features = featureSet(&[_]Feature{ | ||
| 1046 | .avr6, | ||
| 1047 | }), | ||
| 1048 | }; | ||
| 1049 | pub const atmega2564rfr2 = CpuModel{ | ||
| 1050 | .name = "atmega2564rfr2", | ||
| 1051 | .llvm_name = "atmega2564rfr2", | ||
| 1052 | .features = featureSet(&[_]Feature{ | ||
| 1053 | .avr6, | ||
| 1054 | }), | ||
| 1055 | }; | ||
| 1056 | pub const atmega256rfr2 = CpuModel{ | ||
| 1057 | .name = "atmega256rfr2", | ||
| 1058 | .llvm_name = "atmega256rfr2", | ||
| 1059 | .features = featureSet(&[_]Feature{ | ||
| 1060 | .avr6, | ||
| 1061 | }), | ||
| 1062 | }; | ||
| 1063 | pub const atmega32 = CpuModel{ | ||
| 1064 | .name = "atmega32", | ||
| 1065 | .llvm_name = "atmega32", | ||
| 1066 | .features = featureSet(&[_]Feature{ | ||
| 1067 | .avr5, | ||
| 1068 | }), | ||
| 1069 | }; | ||
| 1070 | pub const atmega3208 = CpuModel{ | ||
| 1071 | .name = "atmega3208", | ||
| 1072 | .llvm_name = "atmega3208", | ||
| 1073 | .features = featureSet(&[_]Feature{ | ||
| 1074 | .xmega3, | ||
| 1075 | }), | ||
| 1076 | }; | ||
| 1077 | pub const atmega3209 = CpuModel{ | ||
| 1078 | .name = "atmega3209", | ||
| 1079 | .llvm_name = "atmega3209", | ||
| 1080 | .features = featureSet(&[_]Feature{ | ||
| 1081 | .xmega3, | ||
| 1082 | }), | ||
| 1083 | }; | ||
| 1084 | pub const atmega323 = CpuModel{ | ||
| 1085 | .name = "atmega323", | ||
| 1086 | .llvm_name = "atmega323", | ||
| 1087 | .features = featureSet(&[_]Feature{ | ||
| 1088 | .avr5, | ||
| 1089 | }), | ||
| 1090 | }; | ||
| 1091 | pub const atmega324a = CpuModel{ | ||
| 1092 | .name = "atmega324a", | ||
| 1093 | .llvm_name = "atmega324a", | ||
| 1094 | .features = featureSet(&[_]Feature{ | ||
| 1095 | .avr5, | ||
| 1096 | }), | ||
| 1097 | }; | ||
| 1098 | pub const atmega324p = CpuModel{ | ||
| 1099 | .name = "atmega324p", | ||
| 1100 | .llvm_name = "atmega324p", | ||
| 1101 | .features = featureSet(&[_]Feature{ | ||
| 1102 | .avr5, | ||
| 1103 | }), | ||
| 1104 | }; | ||
| 1105 | pub const atmega324pa = CpuModel{ | ||
| 1106 | .name = "atmega324pa", | ||
| 1107 | .llvm_name = "atmega324pa", | ||
| 1108 | .features = featureSet(&[_]Feature{ | ||
| 1109 | .avr5, | ||
| 1110 | }), | ||
| 1111 | }; | ||
| 1112 | pub const atmega324pb = CpuModel{ | ||
| 1113 | .name = "atmega324pb", | ||
| 1114 | .llvm_name = "atmega324pb", | ||
| 1115 | .features = featureSet(&[_]Feature{ | ||
| 1116 | .avr5, | ||
| 1117 | }), | ||
| 1118 | }; | ||
| 1119 | pub const atmega325 = CpuModel{ | ||
| 1120 | .name = "atmega325", | ||
| 1121 | .llvm_name = "atmega325", | ||
| 1122 | .features = featureSet(&[_]Feature{ | ||
| 1123 | .avr5, | ||
| 1124 | }), | ||
| 1125 | }; | ||
| 1126 | pub const atmega3250 = CpuModel{ | ||
| 1127 | .name = "atmega3250", | ||
| 1128 | .llvm_name = "atmega3250", | ||
| 1129 | .features = featureSet(&[_]Feature{ | ||
| 1130 | .avr5, | ||
| 1131 | }), | ||
| 1132 | }; | ||
| 1133 | pub const atmega3250a = CpuModel{ | ||
| 1134 | .name = "atmega3250a", | ||
| 1135 | .llvm_name = "atmega3250a", | ||
| 1136 | .features = featureSet(&[_]Feature{ | ||
| 1137 | .avr5, | ||
| 1138 | }), | ||
| 1139 | }; | ||
| 1140 | pub const atmega3250p = CpuModel{ | ||
| 1141 | .name = "atmega3250p", | ||
| 1142 | .llvm_name = "atmega3250p", | ||
| 1143 | .features = featureSet(&[_]Feature{ | ||
| 1144 | .avr5, | ||
| 1145 | }), | ||
| 1146 | }; | ||
| 1147 | pub const atmega3250pa = CpuModel{ | ||
| 1148 | .name = "atmega3250pa", | ||
| 1149 | .llvm_name = "atmega3250pa", | ||
| 1150 | .features = featureSet(&[_]Feature{ | ||
| 1151 | .avr5, | ||
| 1152 | }), | ||
| 1153 | }; | ||
| 1154 | pub const atmega325a = CpuModel{ | ||
| 1155 | .name = "atmega325a", | ||
| 1156 | .llvm_name = "atmega325a", | ||
| 1157 | .features = featureSet(&[_]Feature{ | ||
| 1158 | .avr5, | ||
| 1159 | }), | ||
| 1160 | }; | ||
| 1161 | pub const atmega325p = CpuModel{ | ||
| 1162 | .name = "atmega325p", | ||
| 1163 | .llvm_name = "atmega325p", | ||
| 1164 | .features = featureSet(&[_]Feature{ | ||
| 1165 | .avr5, | ||
| 1166 | }), | ||
| 1167 | }; | ||
| 1168 | pub const atmega325pa = CpuModel{ | ||
| 1169 | .name = "atmega325pa", | ||
| 1170 | .llvm_name = "atmega325pa", | ||
| 1171 | .features = featureSet(&[_]Feature{ | ||
| 1172 | .avr5, | ||
| 1173 | }), | ||
| 1174 | }; | ||
| 1175 | pub const atmega328 = CpuModel{ | ||
| 1176 | .name = "atmega328", | ||
| 1177 | .llvm_name = "atmega328", | ||
| 1178 | .features = featureSet(&[_]Feature{ | ||
| 1179 | .avr5, | ||
| 1180 | }), | ||
| 1181 | }; | ||
| 1182 | pub const atmega328p = CpuModel{ | ||
| 1183 | .name = "atmega328p", | ||
| 1184 | .llvm_name = "atmega328p", | ||
| 1185 | .features = featureSet(&[_]Feature{ | ||
| 1186 | .avr5, | ||
| 1187 | }), | ||
| 1188 | }; | ||
| 1189 | pub const atmega328pb = CpuModel{ | ||
| 1190 | .name = "atmega328pb", | ||
| 1191 | .llvm_name = "atmega328pb", | ||
| 1192 | .features = featureSet(&[_]Feature{ | ||
| 1193 | .avr5, | ||
| 1194 | }), | ||
| 1195 | }; | ||
| 1196 | pub const atmega329 = CpuModel{ | ||
| 1197 | .name = "atmega329", | ||
| 1198 | .llvm_name = "atmega329", | ||
| 1199 | .features = featureSet(&[_]Feature{ | ||
| 1200 | .avr5, | ||
| 1201 | }), | ||
| 1202 | }; | ||
| 1203 | pub const atmega3290 = CpuModel{ | ||
| 1204 | .name = "atmega3290", | ||
| 1205 | .llvm_name = "atmega3290", | ||
| 1206 | .features = featureSet(&[_]Feature{ | ||
| 1207 | .avr5, | ||
| 1208 | }), | ||
| 1209 | }; | ||
| 1210 | pub const atmega3290a = CpuModel{ | ||
| 1211 | .name = "atmega3290a", | ||
| 1212 | .llvm_name = "atmega3290a", | ||
| 1213 | .features = featureSet(&[_]Feature{ | ||
| 1214 | .avr5, | ||
| 1215 | }), | ||
| 1216 | }; | ||
| 1217 | pub const atmega3290p = CpuModel{ | ||
| 1218 | .name = "atmega3290p", | ||
| 1219 | .llvm_name = "atmega3290p", | ||
| 1220 | .features = featureSet(&[_]Feature{ | ||
| 1221 | .avr5, | ||
| 1222 | }), | ||
| 1223 | }; | ||
| 1224 | pub const atmega3290pa = CpuModel{ | ||
| 1225 | .name = "atmega3290pa", | ||
| 1226 | .llvm_name = "atmega3290pa", | ||
| 1227 | .features = featureSet(&[_]Feature{ | ||
| 1228 | .avr5, | ||
| 1229 | }), | ||
| 1230 | }; | ||
| 1231 | pub const atmega329a = CpuModel{ | ||
| 1232 | .name = "atmega329a", | ||
| 1233 | .llvm_name = "atmega329a", | ||
| 1234 | .features = featureSet(&[_]Feature{ | ||
| 1235 | .avr5, | ||
| 1236 | }), | ||
| 1237 | }; | ||
| 1238 | pub const atmega329p = CpuModel{ | ||
| 1239 | .name = "atmega329p", | ||
| 1240 | .llvm_name = "atmega329p", | ||
| 1241 | .features = featureSet(&[_]Feature{ | ||
| 1242 | .avr5, | ||
| 1243 | }), | ||
| 1244 | }; | ||
| 1245 | pub const atmega329pa = CpuModel{ | ||
| 1246 | .name = "atmega329pa", | ||
| 1247 | .llvm_name = "atmega329pa", | ||
| 1248 | .features = featureSet(&[_]Feature{ | ||
| 1249 | .avr5, | ||
| 1250 | }), | ||
| 1251 | }; | ||
| 1252 | pub const atmega32a = CpuModel{ | ||
| 1253 | .name = "atmega32a", | ||
| 1254 | .llvm_name = "atmega32a", | ||
| 1255 | .features = featureSet(&[_]Feature{ | ||
| 1256 | .avr5, | ||
| 1257 | }), | ||
| 1258 | }; | ||
| 1259 | pub const atmega32c1 = CpuModel{ | ||
| 1260 | .name = "atmega32c1", | ||
| 1261 | .llvm_name = "atmega32c1", | ||
| 1262 | .features = featureSet(&[_]Feature{ | ||
| 1263 | .avr5, | ||
| 1264 | }), | ||
| 1265 | }; | ||
| 1266 | pub const atmega32hvb = CpuModel{ | ||
| 1267 | .name = "atmega32hvb", | ||
| 1268 | .llvm_name = "atmega32hvb", | ||
| 1269 | .features = featureSet(&[_]Feature{ | ||
| 1270 | .avr5, | ||
| 1271 | }), | ||
| 1272 | }; | ||
| 1273 | pub const atmega32hvbrevb = CpuModel{ | ||
| 1274 | .name = "atmega32hvbrevb", | ||
| 1275 | .llvm_name = "atmega32hvbrevb", | ||
| 1276 | .features = featureSet(&[_]Feature{ | ||
| 1277 | .avr5, | ||
| 1278 | }), | ||
| 1279 | }; | ||
| 1280 | pub const atmega32m1 = CpuModel{ | ||
| 1281 | .name = "atmega32m1", | ||
| 1282 | .llvm_name = "atmega32m1", | ||
| 1283 | .features = featureSet(&[_]Feature{ | ||
| 1284 | .avr5, | ||
| 1285 | }), | ||
| 1286 | }; | ||
| 1287 | pub const atmega32u2 = CpuModel{ | ||
| 1288 | .name = "atmega32u2", | ||
| 1289 | .llvm_name = "atmega32u2", | ||
| 1290 | .features = featureSet(&[_]Feature{ | ||
| 1291 | .avr35, | ||
| 1292 | }), | ||
| 1293 | }; | ||
| 1294 | pub const atmega32u4 = CpuModel{ | ||
| 1295 | .name = "atmega32u4", | ||
| 1296 | .llvm_name = "atmega32u4", | ||
| 1297 | .features = featureSet(&[_]Feature{ | ||
| 1298 | .avr5, | ||
| 1299 | }), | ||
| 1300 | }; | ||
| 1301 | pub const atmega32u6 = CpuModel{ | ||
| 1302 | .name = "atmega32u6", | ||
| 1303 | .llvm_name = "atmega32u6", | ||
| 1304 | .features = featureSet(&[_]Feature{ | ||
| 1305 | .avr5, | ||
| 1306 | }), | ||
| 1307 | }; | ||
| 1308 | pub const atmega406 = CpuModel{ | ||
| 1309 | .name = "atmega406", | ||
| 1310 | .llvm_name = "atmega406", | ||
| 1311 | .features = featureSet(&[_]Feature{ | ||
| 1312 | .avr5, | ||
| 1313 | }), | ||
| 1314 | }; | ||
| 1315 | pub const atmega48 = CpuModel{ | ||
| 1316 | .name = "atmega48", | ||
| 1317 | .llvm_name = "atmega48", | ||
| 1318 | .features = featureSet(&[_]Feature{ | ||
| 1319 | .avr4, | ||
| 1320 | }), | ||
| 1321 | }; | ||
| 1322 | pub const atmega4808 = CpuModel{ | ||
| 1323 | .name = "atmega4808", | ||
| 1324 | .llvm_name = "atmega4808", | ||
| 1325 | .features = featureSet(&[_]Feature{ | ||
| 1326 | .xmega3, | ||
| 1327 | }), | ||
| 1328 | }; | ||
| 1329 | pub const atmega4809 = CpuModel{ | ||
| 1330 | .name = "atmega4809", | ||
| 1331 | .llvm_name = "atmega4809", | ||
| 1332 | .features = featureSet(&[_]Feature{ | ||
| 1333 | .xmega3, | ||
| 1334 | }), | ||
| 1335 | }; | ||
| 1336 | pub const atmega48a = CpuModel{ | ||
| 1337 | .name = "atmega48a", | ||
| 1338 | .llvm_name = "atmega48a", | ||
| 1339 | .features = featureSet(&[_]Feature{ | ||
| 1340 | .avr4, | ||
| 1341 | }), | ||
| 1342 | }; | ||
| 1343 | pub const atmega48p = CpuModel{ | ||
| 1344 | .name = "atmega48p", | ||
| 1345 | .llvm_name = "atmega48p", | ||
| 1346 | .features = featureSet(&[_]Feature{ | ||
| 1347 | .avr4, | ||
| 1348 | }), | ||
| 1349 | }; | ||
| 1350 | pub const atmega48pa = CpuModel{ | ||
| 1351 | .name = "atmega48pa", | ||
| 1352 | .llvm_name = "atmega48pa", | ||
| 1353 | .features = featureSet(&[_]Feature{ | ||
| 1354 | .avr4, | ||
| 1355 | }), | ||
| 1356 | }; | ||
| 1357 | pub const atmega48pb = CpuModel{ | ||
| 1358 | .name = "atmega48pb", | ||
| 1359 | .llvm_name = "atmega48pb", | ||
| 1360 | .features = featureSet(&[_]Feature{ | ||
| 1361 | .avr4, | ||
| 1362 | }), | ||
| 1363 | }; | ||
| 1364 | pub const atmega64 = CpuModel{ | ||
| 1365 | .name = "atmega64", | ||
| 1366 | .llvm_name = "atmega64", | ||
| 1367 | .features = featureSet(&[_]Feature{ | ||
| 1368 | .avr5, | ||
| 1369 | }), | ||
| 1370 | }; | ||
| 1371 | pub const atmega640 = CpuModel{ | ||
| 1372 | .name = "atmega640", | ||
| 1373 | .llvm_name = "atmega640", | ||
| 1374 | .features = featureSet(&[_]Feature{ | ||
| 1375 | .avr5, | ||
| 1376 | }), | ||
| 1377 | }; | ||
| 1378 | pub const atmega644 = CpuModel{ | ||
| 1379 | .name = "atmega644", | ||
| 1380 | .llvm_name = "atmega644", | ||
| 1381 | .features = featureSet(&[_]Feature{ | ||
| 1382 | .avr5, | ||
| 1383 | }), | ||
| 1384 | }; | ||
| 1385 | pub const atmega644a = CpuModel{ | ||
| 1386 | .name = "atmega644a", | ||
| 1387 | .llvm_name = "atmega644a", | ||
| 1388 | .features = featureSet(&[_]Feature{ | ||
| 1389 | .avr5, | ||
| 1390 | }), | ||
| 1391 | }; | ||
| 1392 | pub const atmega644p = CpuModel{ | ||
| 1393 | .name = "atmega644p", | ||
| 1394 | .llvm_name = "atmega644p", | ||
| 1395 | .features = featureSet(&[_]Feature{ | ||
| 1396 | .avr5, | ||
| 1397 | }), | ||
| 1398 | }; | ||
| 1399 | pub const atmega644pa = CpuModel{ | ||
| 1400 | .name = "atmega644pa", | ||
| 1401 | .llvm_name = "atmega644pa", | ||
| 1402 | .features = featureSet(&[_]Feature{ | ||
| 1403 | .avr5, | ||
| 1404 | }), | ||
| 1405 | }; | ||
| 1406 | pub const atmega644rfr2 = CpuModel{ | ||
| 1407 | .name = "atmega644rfr2", | ||
| 1408 | .llvm_name = "atmega644rfr2", | ||
| 1409 | .features = featureSet(&[_]Feature{ | ||
| 1410 | .avr5, | ||
| 1411 | }), | ||
| 1412 | }; | ||
| 1413 | pub const atmega645 = CpuModel{ | ||
| 1414 | .name = "atmega645", | ||
| 1415 | .llvm_name = "atmega645", | ||
| 1416 | .features = featureSet(&[_]Feature{ | ||
| 1417 | .avr5, | ||
| 1418 | }), | ||
| 1419 | }; | ||
| 1420 | pub const atmega6450 = CpuModel{ | ||
| 1421 | .name = "atmega6450", | ||
| 1422 | .llvm_name = "atmega6450", | ||
| 1423 | .features = featureSet(&[_]Feature{ | ||
| 1424 | .avr5, | ||
| 1425 | }), | ||
| 1426 | }; | ||
| 1427 | pub const atmega6450a = CpuModel{ | ||
| 1428 | .name = "atmega6450a", | ||
| 1429 | .llvm_name = "atmega6450a", | ||
| 1430 | .features = featureSet(&[_]Feature{ | ||
| 1431 | .avr5, | ||
| 1432 | }), | ||
| 1433 | }; | ||
| 1434 | pub const atmega6450p = CpuModel{ | ||
| 1435 | .name = "atmega6450p", | ||
| 1436 | .llvm_name = "atmega6450p", | ||
| 1437 | .features = featureSet(&[_]Feature{ | ||
| 1438 | .avr5, | ||
| 1439 | }), | ||
| 1440 | }; | ||
| 1441 | pub const atmega645a = CpuModel{ | ||
| 1442 | .name = "atmega645a", | ||
| 1443 | .llvm_name = "atmega645a", | ||
| 1444 | .features = featureSet(&[_]Feature{ | ||
| 1445 | .avr5, | ||
| 1446 | }), | ||
| 1447 | }; | ||
| 1448 | pub const atmega645p = CpuModel{ | ||
| 1449 | .name = "atmega645p", | ||
| 1450 | .llvm_name = "atmega645p", | ||
| 1451 | .features = featureSet(&[_]Feature{ | ||
| 1452 | .avr5, | ||
| 1453 | }), | ||
| 1454 | }; | ||
| 1455 | pub const atmega649 = CpuModel{ | ||
| 1456 | .name = "atmega649", | ||
| 1457 | .llvm_name = "atmega649", | ||
| 1458 | .features = featureSet(&[_]Feature{ | ||
| 1459 | .avr5, | ||
| 1460 | }), | ||
| 1461 | }; | ||
| 1462 | pub const atmega6490 = CpuModel{ | ||
| 1463 | .name = "atmega6490", | ||
| 1464 | .llvm_name = "atmega6490", | ||
| 1465 | .features = featureSet(&[_]Feature{ | ||
| 1466 | .avr5, | ||
| 1467 | }), | ||
| 1468 | }; | ||
| 1469 | pub const atmega6490a = CpuModel{ | ||
| 1470 | .name = "atmega6490a", | ||
| 1471 | .llvm_name = "atmega6490a", | ||
| 1472 | .features = featureSet(&[_]Feature{ | ||
| 1473 | .avr5, | ||
| 1474 | }), | ||
| 1475 | }; | ||
| 1476 | pub const atmega6490p = CpuModel{ | ||
| 1477 | .name = "atmega6490p", | ||
| 1478 | .llvm_name = "atmega6490p", | ||
| 1479 | .features = featureSet(&[_]Feature{ | ||
| 1480 | .avr5, | ||
| 1481 | }), | ||
| 1482 | }; | ||
| 1483 | pub const atmega649a = CpuModel{ | ||
| 1484 | .name = "atmega649a", | ||
| 1485 | .llvm_name = "atmega649a", | ||
| 1486 | .features = featureSet(&[_]Feature{ | ||
| 1487 | .avr5, | ||
| 1488 | }), | ||
| 1489 | }; | ||
| 1490 | pub const atmega649p = CpuModel{ | ||
| 1491 | .name = "atmega649p", | ||
| 1492 | .llvm_name = "atmega649p", | ||
| 1493 | .features = featureSet(&[_]Feature{ | ||
| 1494 | .avr5, | ||
| 1495 | }), | ||
| 1496 | }; | ||
| 1497 | pub const atmega64a = CpuModel{ | ||
| 1498 | .name = "atmega64a", | ||
| 1499 | .llvm_name = "atmega64a", | ||
| 1500 | .features = featureSet(&[_]Feature{ | ||
| 1501 | .avr5, | ||
| 1502 | }), | ||
| 1503 | }; | ||
| 1504 | pub const atmega64c1 = CpuModel{ | ||
| 1505 | .name = "atmega64c1", | ||
| 1506 | .llvm_name = "atmega64c1", | ||
| 1507 | .features = featureSet(&[_]Feature{ | ||
| 1508 | .avr5, | ||
| 1509 | }), | ||
| 1510 | }; | ||
| 1511 | pub const atmega64hve = CpuModel{ | ||
| 1512 | .name = "atmega64hve", | ||
| 1513 | .llvm_name = "atmega64hve", | ||
| 1514 | .features = featureSet(&[_]Feature{ | ||
| 1515 | .avr5, | ||
| 1516 | }), | ||
| 1517 | }; | ||
| 1518 | pub const atmega64hve2 = CpuModel{ | ||
| 1519 | .name = "atmega64hve2", | ||
| 1520 | .llvm_name = "atmega64hve2", | ||
| 1521 | .features = featureSet(&[_]Feature{ | ||
| 1522 | .avr5, | ||
| 1523 | }), | ||
| 1524 | }; | ||
| 1525 | pub const atmega64m1 = CpuModel{ | ||
| 1526 | .name = "atmega64m1", | ||
| 1527 | .llvm_name = "atmega64m1", | ||
| 1528 | .features = featureSet(&[_]Feature{ | ||
| 1529 | .avr5, | ||
| 1530 | }), | ||
| 1531 | }; | ||
| 1532 | pub const atmega64rfr2 = CpuModel{ | ||
| 1533 | .name = "atmega64rfr2", | ||
| 1534 | .llvm_name = "atmega64rfr2", | ||
| 1535 | .features = featureSet(&[_]Feature{ | ||
| 1536 | .avr5, | ||
| 1537 | }), | ||
| 1538 | }; | ||
| 1539 | pub const atmega8 = CpuModel{ | ||
| 1540 | .name = "atmega8", | ||
| 1541 | .llvm_name = "atmega8", | ||
| 1542 | .features = featureSet(&[_]Feature{ | ||
| 1543 | .avr2, | ||
| 1544 | .lpmx, | ||
| 1545 | .movw, | ||
| 1546 | .mul, | ||
| 1547 | .spm, | ||
| 1548 | }), | ||
| 1549 | }; | ||
| 1550 | pub const atmega808 = CpuModel{ | ||
| 1551 | .name = "atmega808", | ||
| 1552 | .llvm_name = "atmega808", | ||
| 1553 | .features = featureSet(&[_]Feature{ | ||
| 1554 | .xmega3, | ||
| 1555 | }), | ||
| 1556 | }; | ||
| 1557 | pub const atmega809 = CpuModel{ | ||
| 1558 | .name = "atmega809", | ||
| 1559 | .llvm_name = "atmega809", | ||
| 1560 | .features = featureSet(&[_]Feature{ | ||
| 1561 | .xmega3, | ||
| 1562 | }), | ||
| 1563 | }; | ||
| 1564 | pub const atmega8515 = CpuModel{ | ||
| 1565 | .name = "atmega8515", | ||
| 1566 | .llvm_name = "atmega8515", | ||
| 1567 | .features = featureSet(&[_]Feature{ | ||
| 1568 | .avr2, | ||
| 1569 | .lpmx, | ||
| 1570 | .movw, | ||
| 1571 | .mul, | ||
| 1572 | .spm, | ||
| 1573 | }), | ||
| 1574 | }; | ||
| 1575 | pub const atmega8535 = CpuModel{ | ||
| 1576 | .name = "atmega8535", | ||
| 1577 | .llvm_name = "atmega8535", | ||
| 1578 | .features = featureSet(&[_]Feature{ | ||
| 1579 | .avr2, | ||
| 1580 | .lpmx, | ||
| 1581 | .movw, | ||
| 1582 | .mul, | ||
| 1583 | .spm, | ||
| 1584 | }), | ||
| 1585 | }; | ||
| 1586 | pub const atmega88 = CpuModel{ | ||
| 1587 | .name = "atmega88", | ||
| 1588 | .llvm_name = "atmega88", | ||
| 1589 | .features = featureSet(&[_]Feature{ | ||
| 1590 | .avr4, | ||
| 1591 | }), | ||
| 1592 | }; | ||
| 1593 | pub const atmega88a = CpuModel{ | ||
| 1594 | .name = "atmega88a", | ||
| 1595 | .llvm_name = "atmega88a", | ||
| 1596 | .features = featureSet(&[_]Feature{ | ||
| 1597 | .avr4, | ||
| 1598 | }), | ||
| 1599 | }; | ||
| 1600 | pub const atmega88p = CpuModel{ | ||
| 1601 | .name = "atmega88p", | ||
| 1602 | .llvm_name = "atmega88p", | ||
| 1603 | .features = featureSet(&[_]Feature{ | ||
| 1604 | .avr4, | ||
| 1605 | }), | ||
| 1606 | }; | ||
| 1607 | pub const atmega88pa = CpuModel{ | ||
| 1608 | .name = "atmega88pa", | ||
| 1609 | .llvm_name = "atmega88pa", | ||
| 1610 | .features = featureSet(&[_]Feature{ | ||
| 1611 | .avr4, | ||
| 1612 | }), | ||
| 1613 | }; | ||
| 1614 | pub const atmega88pb = CpuModel{ | ||
| 1615 | .name = "atmega88pb", | ||
| 1616 | .llvm_name = "atmega88pb", | ||
| 1617 | .features = featureSet(&[_]Feature{ | ||
| 1618 | .avr4, | ||
| 1619 | }), | ||
| 1620 | }; | ||
| 1621 | pub const atmega8a = CpuModel{ | ||
| 1622 | .name = "atmega8a", | ||
| 1623 | .llvm_name = "atmega8a", | ||
| 1624 | .features = featureSet(&[_]Feature{ | ||
| 1625 | .avr2, | ||
| 1626 | .lpmx, | ||
| 1627 | .movw, | ||
| 1628 | .mul, | ||
| 1629 | .spm, | ||
| 1630 | }), | ||
| 1631 | }; | ||
| 1632 | pub const atmega8hva = CpuModel{ | ||
| 1633 | .name = "atmega8hva", | ||
| 1634 | .llvm_name = "atmega8hva", | ||
| 1635 | .features = featureSet(&[_]Feature{ | ||
| 1636 | .avr4, | ||
| 1637 | }), | ||
| 1638 | }; | ||
| 1639 | pub const atmega8u2 = CpuModel{ | ||
| 1640 | .name = "atmega8u2", | ||
| 1641 | .llvm_name = "atmega8u2", | ||
| 1642 | .features = featureSet(&[_]Feature{ | ||
| 1643 | .avr35, | ||
| 1644 | }), | ||
| 1645 | }; | ||
| 1646 | pub const attiny10 = CpuModel{ | ||
| 1647 | .name = "attiny10", | ||
| 1648 | .llvm_name = "attiny10", | ||
| 1649 | .features = featureSet(&[_]Feature{ | ||
| 1650 | .avrtiny, | ||
| 1651 | }), | ||
| 1652 | }; | ||
| 1653 | pub const attiny102 = CpuModel{ | ||
| 1654 | .name = "attiny102", | ||
| 1655 | .llvm_name = "attiny102", | ||
| 1656 | .features = featureSet(&[_]Feature{ | ||
| 1657 | .avrtiny, | ||
| 1658 | }), | ||
| 1659 | }; | ||
| 1660 | pub const attiny104 = CpuModel{ | ||
| 1661 | .name = "attiny104", | ||
| 1662 | .llvm_name = "attiny104", | ||
| 1663 | .features = featureSet(&[_]Feature{ | ||
| 1664 | .avrtiny, | ||
| 1665 | }), | ||
| 1666 | }; | ||
| 1667 | pub const attiny11 = CpuModel{ | ||
| 1668 | .name = "attiny11", | ||
| 1669 | .llvm_name = "attiny11", | ||
| 1670 | .features = featureSet(&[_]Feature{ | ||
| 1671 | .avr1, | ||
| 1672 | .smallstack, | ||
| 1673 | }), | ||
| 1674 | }; | ||
| 1675 | pub const attiny12 = CpuModel{ | ||
| 1676 | .name = "attiny12", | ||
| 1677 | .llvm_name = "attiny12", | ||
| 1678 | .features = featureSet(&[_]Feature{ | ||
| 1679 | .avr1, | ||
| 1680 | .smallstack, | ||
| 1681 | }), | ||
| 1682 | }; | ||
| 1683 | pub const attiny13 = CpuModel{ | ||
| 1684 | .name = "attiny13", | ||
| 1685 | .llvm_name = "attiny13", | ||
| 1686 | .features = featureSet(&[_]Feature{ | ||
| 1687 | .avr25, | ||
| 1688 | .smallstack, | ||
| 1689 | }), | ||
| 1690 | }; | ||
| 1691 | pub const attiny13a = CpuModel{ | ||
| 1692 | .name = "attiny13a", | ||
| 1693 | .llvm_name = "attiny13a", | ||
| 1694 | .features = featureSet(&[_]Feature{ | ||
| 1695 | .avr25, | ||
| 1696 | .smallstack, | ||
| 1697 | }), | ||
| 1698 | }; | ||
| 1699 | pub const attiny15 = CpuModel{ | ||
| 1700 | .name = "attiny15", | ||
| 1701 | .llvm_name = "attiny15", | ||
| 1702 | .features = featureSet(&[_]Feature{ | ||
| 1703 | .avr1, | ||
| 1704 | .smallstack, | ||
| 1705 | }), | ||
| 1706 | }; | ||
| 1707 | pub const attiny1604 = CpuModel{ | ||
| 1708 | .name = "attiny1604", | ||
| 1709 | .llvm_name = "attiny1604", | ||
| 1710 | .features = featureSet(&[_]Feature{ | ||
| 1711 | .xmega3, | ||
| 1712 | }), | ||
| 1713 | }; | ||
| 1714 | pub const attiny1606 = CpuModel{ | ||
| 1715 | .name = "attiny1606", | ||
| 1716 | .llvm_name = "attiny1606", | ||
| 1717 | .features = featureSet(&[_]Feature{ | ||
| 1718 | .xmega3, | ||
| 1719 | }), | ||
| 1720 | }; | ||
| 1721 | pub const attiny1607 = CpuModel{ | ||
| 1722 | .name = "attiny1607", | ||
| 1723 | .llvm_name = "attiny1607", | ||
| 1724 | .features = featureSet(&[_]Feature{ | ||
| 1725 | .xmega3, | ||
| 1726 | }), | ||
| 1727 | }; | ||
| 1728 | pub const attiny1614 = CpuModel{ | ||
| 1729 | .name = "attiny1614", | ||
| 1730 | .llvm_name = "attiny1614", | ||
| 1731 | .features = featureSet(&[_]Feature{ | ||
| 1732 | .xmega3, | ||
| 1733 | }), | ||
| 1734 | }; | ||
| 1735 | pub const attiny1616 = CpuModel{ | ||
| 1736 | .name = "attiny1616", | ||
| 1737 | .llvm_name = "attiny1616", | ||
| 1738 | .features = featureSet(&[_]Feature{ | ||
| 1739 | .xmega3, | ||
| 1740 | }), | ||
| 1741 | }; | ||
| 1742 | pub const attiny1617 = CpuModel{ | ||
| 1743 | .name = "attiny1617", | ||
| 1744 | .llvm_name = "attiny1617", | ||
| 1745 | .features = featureSet(&[_]Feature{ | ||
| 1746 | .xmega3, | ||
| 1747 | }), | ||
| 1748 | }; | ||
| 1749 | pub const attiny1624 = CpuModel{ | ||
| 1750 | .name = "attiny1624", | ||
| 1751 | .llvm_name = "attiny1624", | ||
| 1752 | .features = featureSet(&[_]Feature{ | ||
| 1753 | .xmega3, | ||
| 1754 | }), | ||
| 1755 | }; | ||
| 1756 | pub const attiny1626 = CpuModel{ | ||
| 1757 | .name = "attiny1626", | ||
| 1758 | .llvm_name = "attiny1626", | ||
| 1759 | .features = featureSet(&[_]Feature{ | ||
| 1760 | .xmega3, | ||
| 1761 | }), | ||
| 1762 | }; | ||
| 1763 | pub const attiny1627 = CpuModel{ | ||
| 1764 | .name = "attiny1627", | ||
| 1765 | .llvm_name = "attiny1627", | ||
| 1766 | .features = featureSet(&[_]Feature{ | ||
| 1767 | .xmega3, | ||
| 1768 | }), | ||
| 1769 | }; | ||
| 1770 | pub const attiny1634 = CpuModel{ | ||
| 1771 | .name = "attiny1634", | ||
| 1772 | .llvm_name = "attiny1634", | ||
| 1773 | .features = featureSet(&[_]Feature{ | ||
| 1774 | .avr35, | ||
| 1775 | }), | ||
| 1776 | }; | ||
| 1777 | pub const attiny167 = CpuModel{ | ||
| 1778 | .name = "attiny167", | ||
| 1779 | .llvm_name = "attiny167", | ||
| 1780 | .features = featureSet(&[_]Feature{ | ||
| 1781 | .avr35, | ||
| 1782 | }), | ||
| 1783 | }; | ||
| 1784 | pub const attiny20 = CpuModel{ | ||
| 1785 | .name = "attiny20", | ||
| 1786 | .llvm_name = "attiny20", | ||
| 1787 | .features = featureSet(&[_]Feature{ | ||
| 1788 | .avrtiny, | ||
| 1789 | }), | ||
| 1790 | }; | ||
| 1791 | pub const attiny202 = CpuModel{ | ||
| 1792 | .name = "attiny202", | ||
| 1793 | .llvm_name = "attiny202", | ||
| 1794 | .features = featureSet(&[_]Feature{ | ||
| 1795 | .xmega3, | ||
| 1796 | }), | ||
| 1797 | }; | ||
| 1798 | pub const attiny204 = CpuModel{ | ||
| 1799 | .name = "attiny204", | ||
| 1800 | .llvm_name = "attiny204", | ||
| 1801 | .features = featureSet(&[_]Feature{ | ||
| 1802 | .xmega3, | ||
| 1803 | }), | ||
| 1804 | }; | ||
| 1805 | pub const attiny212 = CpuModel{ | ||
| 1806 | .name = "attiny212", | ||
| 1807 | .llvm_name = "attiny212", | ||
| 1808 | .features = featureSet(&[_]Feature{ | ||
| 1809 | .xmega3, | ||
| 1810 | }), | ||
| 1811 | }; | ||
| 1812 | pub const attiny214 = CpuModel{ | ||
| 1813 | .name = "attiny214", | ||
| 1814 | .llvm_name = "attiny214", | ||
| 1815 | .features = featureSet(&[_]Feature{ | ||
| 1816 | .xmega3, | ||
| 1817 | }), | ||
| 1818 | }; | ||
| 1819 | pub const attiny22 = CpuModel{ | ||
| 1820 | .name = "attiny22", | ||
| 1821 | .llvm_name = "attiny22", | ||
| 1822 | .features = featureSet(&[_]Feature{ | ||
| 1823 | .avr2, | ||
| 1824 | .smallstack, | ||
| 1825 | }), | ||
| 1826 | }; | ||
| 1827 | pub const attiny2313 = CpuModel{ | ||
| 1828 | .name = "attiny2313", | ||
| 1829 | .llvm_name = "attiny2313", | ||
| 1830 | .features = featureSet(&[_]Feature{ | ||
| 1831 | .avr25, | ||
| 1832 | .smallstack, | ||
| 1833 | }), | ||
| 1834 | }; | ||
| 1835 | pub const attiny2313a = CpuModel{ | ||
| 1836 | .name = "attiny2313a", | ||
| 1837 | .llvm_name = "attiny2313a", | ||
| 1838 | .features = featureSet(&[_]Feature{ | ||
| 1839 | .avr25, | ||
| 1840 | .smallstack, | ||
| 1841 | }), | ||
| 1842 | }; | ||
| 1843 | pub const attiny24 = CpuModel{ | ||
| 1844 | .name = "attiny24", | ||
| 1845 | .llvm_name = "attiny24", | ||
| 1846 | .features = featureSet(&[_]Feature{ | ||
| 1847 | .avr25, | ||
| 1848 | .smallstack, | ||
| 1849 | }), | ||
| 1850 | }; | ||
| 1851 | pub const attiny24a = CpuModel{ | ||
| 1852 | .name = "attiny24a", | ||
| 1853 | .llvm_name = "attiny24a", | ||
| 1854 | .features = featureSet(&[_]Feature{ | ||
| 1855 | .avr25, | ||
| 1856 | .smallstack, | ||
| 1857 | }), | ||
| 1858 | }; | ||
| 1859 | pub const attiny25 = CpuModel{ | ||
| 1860 | .name = "attiny25", | ||
| 1861 | .llvm_name = "attiny25", | ||
| 1862 | .features = featureSet(&[_]Feature{ | ||
| 1863 | .avr25, | ||
| 1864 | .smallstack, | ||
| 1865 | }), | ||
| 1866 | }; | ||
| 1867 | pub const attiny26 = CpuModel{ | ||
| 1868 | .name = "attiny26", | ||
| 1869 | .llvm_name = "attiny26", | ||
| 1870 | .features = featureSet(&[_]Feature{ | ||
| 1871 | .avr2, | ||
| 1872 | .lpmx, | ||
| 1873 | .smallstack, | ||
| 1874 | }), | ||
| 1875 | }; | ||
| 1876 | pub const attiny261 = CpuModel{ | ||
| 1877 | .name = "attiny261", | ||
| 1878 | .llvm_name = "attiny261", | ||
| 1879 | .features = featureSet(&[_]Feature{ | ||
| 1880 | .avr25, | ||
| 1881 | .smallstack, | ||
| 1882 | }), | ||
| 1883 | }; | ||
| 1884 | pub const attiny261a = CpuModel{ | ||
| 1885 | .name = "attiny261a", | ||
| 1886 | .llvm_name = "attiny261a", | ||
| 1887 | .features = featureSet(&[_]Feature{ | ||
| 1888 | .avr25, | ||
| 1889 | .smallstack, | ||
| 1890 | }), | ||
| 1891 | }; | ||
| 1892 | pub const attiny28 = CpuModel{ | ||
| 1893 | .name = "attiny28", | ||
| 1894 | .llvm_name = "attiny28", | ||
| 1895 | .features = featureSet(&[_]Feature{ | ||
| 1896 | .avr1, | ||
| 1897 | .smallstack, | ||
| 1898 | }), | ||
| 1899 | }; | ||
| 1900 | pub const attiny3216 = CpuModel{ | ||
| 1901 | .name = "attiny3216", | ||
| 1902 | .llvm_name = "attiny3216", | ||
| 1903 | .features = featureSet(&[_]Feature{ | ||
| 1904 | .xmega3, | ||
| 1905 | }), | ||
| 1906 | }; | ||
| 1907 | pub const attiny3217 = CpuModel{ | ||
| 1908 | .name = "attiny3217", | ||
| 1909 | .llvm_name = "attiny3217", | ||
| 1910 | .features = featureSet(&[_]Feature{ | ||
| 1911 | .xmega3, | ||
| 1912 | }), | ||
| 1913 | }; | ||
| 1914 | pub const attiny4 = CpuModel{ | ||
| 1915 | .name = "attiny4", | ||
| 1916 | .llvm_name = "attiny4", | ||
| 1917 | .features = featureSet(&[_]Feature{ | ||
| 1918 | .avrtiny, | ||
| 1919 | }), | ||
| 1920 | }; | ||
| 1921 | pub const attiny40 = CpuModel{ | ||
| 1922 | .name = "attiny40", | ||
| 1923 | .llvm_name = "attiny40", | ||
| 1924 | .features = featureSet(&[_]Feature{ | ||
| 1925 | .avrtiny, | ||
| 1926 | }), | ||
| 1927 | }; | ||
| 1928 | pub const attiny402 = CpuModel{ | ||
| 1929 | .name = "attiny402", | ||
| 1930 | .llvm_name = "attiny402", | ||
| 1931 | .features = featureSet(&[_]Feature{ | ||
| 1932 | .xmega3, | ||
| 1933 | }), | ||
| 1934 | }; | ||
| 1935 | pub const attiny404 = CpuModel{ | ||
| 1936 | .name = "attiny404", | ||
| 1937 | .llvm_name = "attiny404", | ||
| 1938 | .features = featureSet(&[_]Feature{ | ||
| 1939 | .xmega3, | ||
| 1940 | }), | ||
| 1941 | }; | ||
| 1942 | pub const attiny406 = CpuModel{ | ||
| 1943 | .name = "attiny406", | ||
| 1944 | .llvm_name = "attiny406", | ||
| 1945 | .features = featureSet(&[_]Feature{ | ||
| 1946 | .xmega3, | ||
| 1947 | }), | ||
| 1948 | }; | ||
| 1949 | pub const attiny412 = CpuModel{ | ||
| 1950 | .name = "attiny412", | ||
| 1951 | .llvm_name = "attiny412", | ||
| 1952 | .features = featureSet(&[_]Feature{ | ||
| 1953 | .xmega3, | ||
| 1954 | }), | ||
| 1955 | }; | ||
| 1956 | pub const attiny414 = CpuModel{ | ||
| 1957 | .name = "attiny414", | ||
| 1958 | .llvm_name = "attiny414", | ||
| 1959 | .features = featureSet(&[_]Feature{ | ||
| 1960 | .xmega3, | ||
| 1961 | }), | ||
| 1962 | }; | ||
| 1963 | pub const attiny416 = CpuModel{ | ||
| 1964 | .name = "attiny416", | ||
| 1965 | .llvm_name = "attiny416", | ||
| 1966 | .features = featureSet(&[_]Feature{ | ||
| 1967 | .xmega3, | ||
| 1968 | }), | ||
| 1969 | }; | ||
| 1970 | pub const attiny417 = CpuModel{ | ||
| 1971 | .name = "attiny417", | ||
| 1972 | .llvm_name = "attiny417", | ||
| 1973 | .features = featureSet(&[_]Feature{ | ||
| 1974 | .xmega3, | ||
| 1975 | }), | ||
| 1976 | }; | ||
| 1977 | pub const attiny4313 = CpuModel{ | ||
| 1978 | .name = "attiny4313", | ||
| 1979 | .llvm_name = "attiny4313", | ||
| 1980 | .features = featureSet(&[_]Feature{ | ||
| 1981 | .avr25, | ||
| 1982 | }), | ||
| 1983 | }; | ||
| 1984 | pub const attiny43u = CpuModel{ | ||
| 1985 | .name = "attiny43u", | ||
| 1986 | .llvm_name = "attiny43u", | ||
| 1987 | .features = featureSet(&[_]Feature{ | ||
| 1988 | .avr25, | ||
| 1989 | }), | ||
| 1990 | }; | ||
| 1991 | pub const attiny44 = CpuModel{ | ||
| 1992 | .name = "attiny44", | ||
| 1993 | .llvm_name = "attiny44", | ||
| 1994 | .features = featureSet(&[_]Feature{ | ||
| 1995 | .avr25, | ||
| 1996 | }), | ||
| 1997 | }; | ||
| 1998 | pub const attiny441 = CpuModel{ | ||
| 1999 | .name = "attiny441", | ||
| 2000 | .llvm_name = "attiny441", | ||
| 2001 | .features = featureSet(&[_]Feature{ | ||
| 2002 | .avr25, | ||
| 2003 | }), | ||
| 2004 | }; | ||
| 2005 | pub const attiny44a = CpuModel{ | ||
| 2006 | .name = "attiny44a", | ||
| 2007 | .llvm_name = "attiny44a", | ||
| 2008 | .features = featureSet(&[_]Feature{ | ||
| 2009 | .avr25, | ||
| 2010 | }), | ||
| 2011 | }; | ||
| 2012 | pub const attiny45 = CpuModel{ | ||
| 2013 | .name = "attiny45", | ||
| 2014 | .llvm_name = "attiny45", | ||
| 2015 | .features = featureSet(&[_]Feature{ | ||
| 2016 | .avr25, | ||
| 2017 | }), | ||
| 2018 | }; | ||
| 2019 | pub const attiny461 = CpuModel{ | ||
| 2020 | .name = "attiny461", | ||
| 2021 | .llvm_name = "attiny461", | ||
| 2022 | .features = featureSet(&[_]Feature{ | ||
| 2023 | .avr25, | ||
| 2024 | }), | ||
| 2025 | }; | ||
| 2026 | pub const attiny461a = CpuModel{ | ||
| 2027 | .name = "attiny461a", | ||
| 2028 | .llvm_name = "attiny461a", | ||
| 2029 | .features = featureSet(&[_]Feature{ | ||
| 2030 | .avr25, | ||
| 2031 | }), | ||
| 2032 | }; | ||
| 2033 | pub const attiny48 = CpuModel{ | ||
| 2034 | .name = "attiny48", | ||
| 2035 | .llvm_name = "attiny48", | ||
| 2036 | .features = featureSet(&[_]Feature{ | ||
| 2037 | .avr25, | ||
| 2038 | }), | ||
| 2039 | }; | ||
| 2040 | pub const attiny5 = CpuModel{ | ||
| 2041 | .name = "attiny5", | ||
| 2042 | .llvm_name = "attiny5", | ||
| 2043 | .features = featureSet(&[_]Feature{ | ||
| 2044 | .avrtiny, | ||
| 2045 | }), | ||
| 2046 | }; | ||
| 2047 | pub const attiny804 = CpuModel{ | ||
| 2048 | .name = "attiny804", | ||
| 2049 | .llvm_name = "attiny804", | ||
| 2050 | .features = featureSet(&[_]Feature{ | ||
| 2051 | .xmega3, | ||
| 2052 | }), | ||
| 2053 | }; | ||
| 2054 | pub const attiny806 = CpuModel{ | ||
| 2055 | .name = "attiny806", | ||
| 2056 | .llvm_name = "attiny806", | ||
| 2057 | .features = featureSet(&[_]Feature{ | ||
| 2058 | .xmega3, | ||
| 2059 | }), | ||
| 2060 | }; | ||
| 2061 | pub const attiny807 = CpuModel{ | ||
| 2062 | .name = "attiny807", | ||
| 2063 | .llvm_name = "attiny807", | ||
| 2064 | .features = featureSet(&[_]Feature{ | ||
| 2065 | .xmega3, | ||
| 2066 | }), | ||
| 2067 | }; | ||
| 2068 | pub const attiny814 = CpuModel{ | ||
| 2069 | .name = "attiny814", | ||
| 2070 | .llvm_name = "attiny814", | ||
| 2071 | .features = featureSet(&[_]Feature{ | ||
| 2072 | .xmega3, | ||
| 2073 | }), | ||
| 2074 | }; | ||
| 2075 | pub const attiny816 = CpuModel{ | ||
| 2076 | .name = "attiny816", | ||
| 2077 | .llvm_name = "attiny816", | ||
| 2078 | .features = featureSet(&[_]Feature{ | ||
| 2079 | .xmega3, | ||
| 2080 | }), | ||
| 2081 | }; | ||
| 2082 | pub const attiny817 = CpuModel{ | ||
| 2083 | .name = "attiny817", | ||
| 2084 | .llvm_name = "attiny817", | ||
| 2085 | .features = featureSet(&[_]Feature{ | ||
| 2086 | .xmega3, | ||
| 2087 | }), | ||
| 2088 | }; | ||
| 2089 | pub const attiny828 = CpuModel{ | ||
| 2090 | .name = "attiny828", | ||
| 2091 | .llvm_name = "attiny828", | ||
| 2092 | .features = featureSet(&[_]Feature{ | ||
| 2093 | .avr25, | ||
| 2094 | }), | ||
| 2095 | }; | ||
| 2096 | pub const attiny84 = CpuModel{ | ||
| 2097 | .name = "attiny84", | ||
| 2098 | .llvm_name = "attiny84", | ||
| 2099 | .features = featureSet(&[_]Feature{ | ||
| 2100 | .avr25, | ||
| 2101 | }), | ||
| 2102 | }; | ||
| 2103 | pub const attiny841 = CpuModel{ | ||
| 2104 | .name = "attiny841", | ||
| 2105 | .llvm_name = "attiny841", | ||
| 2106 | .features = featureSet(&[_]Feature{ | ||
| 2107 | .avr25, | ||
| 2108 | }), | ||
| 2109 | }; | ||
| 2110 | pub const attiny84a = CpuModel{ | ||
| 2111 | .name = "attiny84a", | ||
| 2112 | .llvm_name = "attiny84a", | ||
| 2113 | .features = featureSet(&[_]Feature{ | ||
| 2114 | .avr25, | ||
| 2115 | }), | ||
| 2116 | }; | ||
| 2117 | pub const attiny85 = CpuModel{ | ||
| 2118 | .name = "attiny85", | ||
| 2119 | .llvm_name = "attiny85", | ||
| 2120 | .features = featureSet(&[_]Feature{ | ||
| 2121 | .avr25, | ||
| 2122 | }), | ||
| 2123 | }; | ||
| 2124 | pub const attiny861 = CpuModel{ | ||
| 2125 | .name = "attiny861", | ||
| 2126 | .llvm_name = "attiny861", | ||
| 2127 | .features = featureSet(&[_]Feature{ | ||
| 2128 | .avr25, | ||
| 2129 | }), | ||
| 2130 | }; | ||
| 2131 | pub const attiny861a = CpuModel{ | ||
| 2132 | .name = "attiny861a", | ||
| 2133 | .llvm_name = "attiny861a", | ||
| 2134 | .features = featureSet(&[_]Feature{ | ||
| 2135 | .avr25, | ||
| 2136 | }), | ||
| 2137 | }; | ||
| 2138 | pub const attiny87 = CpuModel{ | ||
| 2139 | .name = "attiny87", | ||
| 2140 | .llvm_name = "attiny87", | ||
| 2141 | .features = featureSet(&[_]Feature{ | ||
| 2142 | .avr25, | ||
| 2143 | }), | ||
| 2144 | }; | ||
| 2145 | pub const attiny88 = CpuModel{ | ||
| 2146 | .name = "attiny88", | ||
| 2147 | .llvm_name = "attiny88", | ||
| 2148 | .features = featureSet(&[_]Feature{ | ||
| 2149 | .avr25, | ||
| 2150 | }), | ||
| 2151 | }; | ||
| 2152 | pub const attiny9 = CpuModel{ | ||
| 2153 | .name = "attiny9", | ||
| 2154 | .llvm_name = "attiny9", | ||
| 2155 | .features = featureSet(&[_]Feature{ | ||
| 2156 | .avrtiny, | ||
| 2157 | }), | ||
| 2158 | }; | ||
| 2159 | pub const atxmega128a1 = CpuModel{ | ||
| 2160 | .name = "atxmega128a1", | ||
| 2161 | .llvm_name = "atxmega128a1", | ||
| 2162 | .features = featureSet(&[_]Feature{ | ||
| 2163 | .xmega, | ||
| 2164 | }), | ||
| 2165 | }; | ||
| 2166 | pub const atxmega128a1u = CpuModel{ | ||
| 2167 | .name = "atxmega128a1u", | ||
| 2168 | .llvm_name = "atxmega128a1u", | ||
| 2169 | .features = featureSet(&[_]Feature{ | ||
| 2170 | .xmegau, | ||
| 2171 | }), | ||
| 2172 | }; | ||
| 2173 | pub const atxmega128a3 = CpuModel{ | ||
| 2174 | .name = "atxmega128a3", | ||
| 2175 | .llvm_name = "atxmega128a3", | ||
| 2176 | .features = featureSet(&[_]Feature{ | ||
| 2177 | .xmega, | ||
| 2178 | }), | ||
| 2179 | }; | ||
| 2180 | pub const atxmega128a3u = CpuModel{ | ||
| 2181 | .name = "atxmega128a3u", | ||
| 2182 | .llvm_name = "atxmega128a3u", | ||
| 2183 | .features = featureSet(&[_]Feature{ | ||
| 2184 | .xmegau, | ||
| 2185 | }), | ||
| 2186 | }; | ||
| 2187 | pub const atxmega128a4u = CpuModel{ | ||
| 2188 | .name = "atxmega128a4u", | ||
| 2189 | .llvm_name = "atxmega128a4u", | ||
| 2190 | .features = featureSet(&[_]Feature{ | ||
| 2191 | .xmegau, | ||
| 2192 | }), | ||
| 2193 | }; | ||
| 2194 | pub const atxmega128b1 = CpuModel{ | ||
| 2195 | .name = "atxmega128b1", | ||
| 2196 | .llvm_name = "atxmega128b1", | ||
| 2197 | .features = featureSet(&[_]Feature{ | ||
| 2198 | .xmegau, | ||
| 2199 | }), | ||
| 2200 | }; | ||
| 2201 | pub const atxmega128b3 = CpuModel{ | ||
| 2202 | .name = "atxmega128b3", | ||
| 2203 | .llvm_name = "atxmega128b3", | ||
| 2204 | .features = featureSet(&[_]Feature{ | ||
| 2205 | .xmegau, | ||
| 2206 | }), | ||
| 2207 | }; | ||
| 2208 | pub const atxmega128c3 = CpuModel{ | ||
| 2209 | .name = "atxmega128c3", | ||
| 2210 | .llvm_name = "atxmega128c3", | ||
| 2211 | .features = featureSet(&[_]Feature{ | ||
| 2212 | .xmegau, | ||
| 2213 | }), | ||
| 2214 | }; | ||
| 2215 | pub const atxmega128d3 = CpuModel{ | ||
| 2216 | .name = "atxmega128d3", | ||
| 2217 | .llvm_name = "atxmega128d3", | ||
| 2218 | .features = featureSet(&[_]Feature{ | ||
| 2219 | .xmega, | ||
| 2220 | }), | ||
| 2221 | }; | ||
| 2222 | pub const atxmega128d4 = CpuModel{ | ||
| 2223 | .name = "atxmega128d4", | ||
| 2224 | .llvm_name = "atxmega128d4", | ||
| 2225 | .features = featureSet(&[_]Feature{ | ||
| 2226 | .xmega, | ||
| 2227 | }), | ||
| 2228 | }; | ||
| 2229 | pub const atxmega16a4 = CpuModel{ | ||
| 2230 | .name = "atxmega16a4", | ||
| 2231 | .llvm_name = "atxmega16a4", | ||
| 2232 | .features = featureSet(&[_]Feature{ | ||
| 2233 | .xmega, | ||
| 2234 | }), | ||
| 2235 | }; | ||
| 2236 | pub const atxmega16a4u = CpuModel{ | ||
| 2237 | .name = "atxmega16a4u", | ||
| 2238 | .llvm_name = "atxmega16a4u", | ||
| 2239 | .features = featureSet(&[_]Feature{ | ||
| 2240 | .xmegau, | ||
| 2241 | }), | ||
| 2242 | }; | ||
| 2243 | pub const atxmega16c4 = CpuModel{ | ||
| 2244 | .name = "atxmega16c4", | ||
| 2245 | .llvm_name = "atxmega16c4", | ||
| 2246 | .features = featureSet(&[_]Feature{ | ||
| 2247 | .xmegau, | ||
| 2248 | }), | ||
| 2249 | }; | ||
| 2250 | pub const atxmega16d4 = CpuModel{ | ||
| 2251 | .name = "atxmega16d4", | ||
| 2252 | .llvm_name = "atxmega16d4", | ||
| 2253 | .features = featureSet(&[_]Feature{ | ||
| 2254 | .xmega, | ||
| 2255 | }), | ||
| 2256 | }; | ||
| 2257 | pub const atxmega16e5 = CpuModel{ | ||
| 2258 | .name = "atxmega16e5", | ||
| 2259 | .llvm_name = "atxmega16e5", | ||
| 2260 | .features = featureSet(&[_]Feature{ | ||
| 2261 | .xmegau, | ||
| 2262 | }), | ||
| 2263 | }; | ||
| 2264 | pub const atxmega192a3 = CpuModel{ | ||
| 2265 | .name = "atxmega192a3", | ||
| 2266 | .llvm_name = "atxmega192a3", | ||
| 2267 | .features = featureSet(&[_]Feature{ | ||
| 2268 | .xmega, | ||
| 2269 | }), | ||
| 2270 | }; | ||
| 2271 | pub const atxmega192a3u = CpuModel{ | ||
| 2272 | .name = "atxmega192a3u", | ||
| 2273 | .llvm_name = "atxmega192a3u", | ||
| 2274 | .features = featureSet(&[_]Feature{ | ||
| 2275 | .xmegau, | ||
| 2276 | }), | ||
| 2277 | }; | ||
| 2278 | pub const atxmega192c3 = CpuModel{ | ||
| 2279 | .name = "atxmega192c3", | ||
| 2280 | .llvm_name = "atxmega192c3", | ||
| 2281 | .features = featureSet(&[_]Feature{ | ||
| 2282 | .xmegau, | ||
| 2283 | }), | ||
| 2284 | }; | ||
| 2285 | pub const atxmega192d3 = CpuModel{ | ||
| 2286 | .name = "atxmega192d3", | ||
| 2287 | .llvm_name = "atxmega192d3", | ||
| 2288 | .features = featureSet(&[_]Feature{ | ||
| 2289 | .xmega, | ||
| 2290 | }), | ||
| 2291 | }; | ||
| 2292 | pub const atxmega256a3 = CpuModel{ | ||
| 2293 | .name = "atxmega256a3", | ||
| 2294 | .llvm_name = "atxmega256a3", | ||
| 2295 | .features = featureSet(&[_]Feature{ | ||
| 2296 | .xmega, | ||
| 2297 | }), | ||
| 2298 | }; | ||
| 2299 | pub const atxmega256a3b = CpuModel{ | ||
| 2300 | .name = "atxmega256a3b", | ||
| 2301 | .llvm_name = "atxmega256a3b", | ||
| 2302 | .features = featureSet(&[_]Feature{ | ||
| 2303 | .xmega, | ||
| 2304 | }), | ||
| 2305 | }; | ||
| 2306 | pub const atxmega256a3bu = CpuModel{ | ||
| 2307 | .name = "atxmega256a3bu", | ||
| 2308 | .llvm_name = "atxmega256a3bu", | ||
| 2309 | .features = featureSet(&[_]Feature{ | ||
| 2310 | .xmegau, | ||
| 2311 | }), | ||
| 2312 | }; | ||
| 2313 | pub const atxmega256a3u = CpuModel{ | ||
| 2314 | .name = "atxmega256a3u", | ||
| 2315 | .llvm_name = "atxmega256a3u", | ||
| 2316 | .features = featureSet(&[_]Feature{ | ||
| 2317 | .xmegau, | ||
| 2318 | }), | ||
| 2319 | }; | ||
| 2320 | pub const atxmega256c3 = CpuModel{ | ||
| 2321 | .name = "atxmega256c3", | ||
| 2322 | .llvm_name = "atxmega256c3", | ||
| 2323 | .features = featureSet(&[_]Feature{ | ||
| 2324 | .xmegau, | ||
| 2325 | }), | ||
| 2326 | }; | ||
| 2327 | pub const atxmega256d3 = CpuModel{ | ||
| 2328 | .name = "atxmega256d3", | ||
| 2329 | .llvm_name = "atxmega256d3", | ||
| 2330 | .features = featureSet(&[_]Feature{ | ||
| 2331 | .xmega, | ||
| 2332 | }), | ||
| 2333 | }; | ||
| 2334 | pub const atxmega32a4 = CpuModel{ | ||
| 2335 | .name = "atxmega32a4", | ||
| 2336 | .llvm_name = "atxmega32a4", | ||
| 2337 | .features = featureSet(&[_]Feature{ | ||
| 2338 | .xmega, | ||
| 2339 | }), | ||
| 2340 | }; | ||
| 2341 | pub const atxmega32a4u = CpuModel{ | ||
| 2342 | .name = "atxmega32a4u", | ||
| 2343 | .llvm_name = "atxmega32a4u", | ||
| 2344 | .features = featureSet(&[_]Feature{ | ||
| 2345 | .xmegau, | ||
| 2346 | }), | ||
| 2347 | }; | ||
| 2348 | pub const atxmega32c3 = CpuModel{ | ||
| 2349 | .name = "atxmega32c3", | ||
| 2350 | .llvm_name = "atxmega32c3", | ||
| 2351 | .features = featureSet(&[_]Feature{ | ||
| 2352 | .xmegau, | ||
| 2353 | }), | ||
| 2354 | }; | ||
| 2355 | pub const atxmega32c4 = CpuModel{ | ||
| 2356 | .name = "atxmega32c4", | ||
| 2357 | .llvm_name = "atxmega32c4", | ||
| 2358 | .features = featureSet(&[_]Feature{ | ||
| 2359 | .xmegau, | ||
| 2360 | }), | ||
| 2361 | }; | ||
| 2362 | pub const atxmega32d3 = CpuModel{ | ||
| 2363 | .name = "atxmega32d3", | ||
| 2364 | .llvm_name = "atxmega32d3", | ||
| 2365 | .features = featureSet(&[_]Feature{ | ||
| 2366 | .xmega, | ||
| 2367 | }), | ||
| 2368 | }; | ||
| 2369 | pub const atxmega32d4 = CpuModel{ | ||
| 2370 | .name = "atxmega32d4", | ||
| 2371 | .llvm_name = "atxmega32d4", | ||
| 2372 | .features = featureSet(&[_]Feature{ | ||
| 2373 | .xmega, | ||
| 2374 | }), | ||
| 2375 | }; | ||
| 2376 | pub const atxmega32e5 = CpuModel{ | ||
| 2377 | .name = "atxmega32e5", | ||
| 2378 | .llvm_name = "atxmega32e5", | ||
| 2379 | .features = featureSet(&[_]Feature{ | ||
| 2380 | .xmegau, | ||
| 2381 | }), | ||
| 2382 | }; | ||
| 2383 | pub const atxmega384c3 = CpuModel{ | ||
| 2384 | .name = "atxmega384c3", | ||
| 2385 | .llvm_name = "atxmega384c3", | ||
| 2386 | .features = featureSet(&[_]Feature{ | ||
| 2387 | .xmegau, | ||
| 2388 | }), | ||
| 2389 | }; | ||
| 2390 | pub const atxmega384d3 = CpuModel{ | ||
| 2391 | .name = "atxmega384d3", | ||
| 2392 | .llvm_name = "atxmega384d3", | ||
| 2393 | .features = featureSet(&[_]Feature{ | ||
| 2394 | .xmega, | ||
| 2395 | }), | ||
| 2396 | }; | ||
| 2397 | pub const atxmega64a1 = CpuModel{ | ||
| 2398 | .name = "atxmega64a1", | ||
| 2399 | .llvm_name = "atxmega64a1", | ||
| 2400 | .features = featureSet(&[_]Feature{ | ||
| 2401 | .xmega, | ||
| 2402 | }), | ||
| 2403 | }; | ||
| 2404 | pub const atxmega64a1u = CpuModel{ | ||
| 2405 | .name = "atxmega64a1u", | ||
| 2406 | .llvm_name = "atxmega64a1u", | ||
| 2407 | .features = featureSet(&[_]Feature{ | ||
| 2408 | .xmegau, | ||
| 2409 | }), | ||
| 2410 | }; | ||
| 2411 | pub const atxmega64a3 = CpuModel{ | ||
| 2412 | .name = "atxmega64a3", | ||
| 2413 | .llvm_name = "atxmega64a3", | ||
| 2414 | .features = featureSet(&[_]Feature{ | ||
| 2415 | .xmega, | ||
| 2416 | }), | ||
| 2417 | }; | ||
| 2418 | pub const atxmega64a3u = CpuModel{ | ||
| 2419 | .name = "atxmega64a3u", | ||
| 2420 | .llvm_name = "atxmega64a3u", | ||
| 2421 | .features = featureSet(&[_]Feature{ | ||
| 2422 | .xmegau, | ||
| 2423 | }), | ||
| 2424 | }; | ||
| 2425 | pub const atxmega64a4u = CpuModel{ | ||
| 2426 | .name = "atxmega64a4u", | ||
| 2427 | .llvm_name = "atxmega64a4u", | ||
| 2428 | .features = featureSet(&[_]Feature{ | ||
| 2429 | .xmegau, | ||
| 2430 | }), | ||
| 2431 | }; | ||
| 2432 | pub const atxmega64b1 = CpuModel{ | ||
| 2433 | .name = "atxmega64b1", | ||
| 2434 | .llvm_name = "atxmega64b1", | ||
| 2435 | .features = featureSet(&[_]Feature{ | ||
| 2436 | .xmegau, | ||
| 2437 | }), | ||
| 2438 | }; | ||
| 2439 | pub const atxmega64b3 = CpuModel{ | ||
| 2440 | .name = "atxmega64b3", | ||
| 2441 | .llvm_name = "atxmega64b3", | ||
| 2442 | .features = featureSet(&[_]Feature{ | ||
| 2443 | .xmegau, | ||
| 2444 | }), | ||
| 2445 | }; | ||
| 2446 | pub const atxmega64c3 = CpuModel{ | ||
| 2447 | .name = "atxmega64c3", | ||
| 2448 | .llvm_name = "atxmega64c3", | ||
| 2449 | .features = featureSet(&[_]Feature{ | ||
| 2450 | .xmegau, | ||
| 2451 | }), | ||
| 2452 | }; | ||
| 2453 | pub const atxmega64d3 = CpuModel{ | ||
| 2454 | .name = "atxmega64d3", | ||
| 2455 | .llvm_name = "atxmega64d3", | ||
| 2456 | .features = featureSet(&[_]Feature{ | ||
| 2457 | .xmega, | ||
| 2458 | }), | ||
| 2459 | }; | ||
| 2460 | pub const atxmega64d4 = CpuModel{ | ||
| 2461 | .name = "atxmega64d4", | ||
| 2462 | .llvm_name = "atxmega64d4", | ||
| 2463 | .features = featureSet(&[_]Feature{ | ||
| 2464 | .xmega, | ||
| 2465 | }), | ||
| 2466 | }; | ||
| 2467 | pub const atxmega8e5 = CpuModel{ | ||
| 2468 | .name = "atxmega8e5", | ||
| 2469 | .llvm_name = "atxmega8e5", | ||
| 2470 | .features = featureSet(&[_]Feature{ | ||
| 2471 | .xmegau, | ||
| 2472 | }), | ||
| 2473 | }; | ||
| 2474 | pub const avr1 = CpuModel{ | ||
| 2475 | .name = "avr1", | ||
| 2476 | .llvm_name = "avr1", | ||
| 2477 | .features = featureSet(&[_]Feature{ | ||
| 2478 | .avr1, | ||
| 2479 | }), | ||
| 2480 | }; | ||
| 2481 | pub const avr2 = CpuModel{ | ||
| 2482 | .name = "avr2", | ||
| 2483 | .llvm_name = "avr2", | ||
| 2484 | .features = featureSet(&[_]Feature{ | ||
| 2485 | .avr2, | ||
| 2486 | }), | ||
| 2487 | }; | ||
| 2488 | pub const avr25 = CpuModel{ | ||
| 2489 | .name = "avr25", | ||
| 2490 | .llvm_name = "avr25", | ||
| 2491 | .features = featureSet(&[_]Feature{ | ||
| 2492 | .avr25, | ||
| 2493 | }), | ||
| 2494 | }; | ||
| 2495 | pub const avr3 = CpuModel{ | ||
| 2496 | .name = "avr3", | ||
| 2497 | .llvm_name = "avr3", | ||
| 2498 | .features = featureSet(&[_]Feature{ | ||
| 2499 | .avr3, | ||
| 2500 | }), | ||
| 2501 | }; | ||
| 2502 | pub const avr31 = CpuModel{ | ||
| 2503 | .name = "avr31", | ||
| 2504 | .llvm_name = "avr31", | ||
| 2505 | .features = featureSet(&[_]Feature{ | ||
| 2506 | .avr31, | ||
| 2507 | }), | ||
| 2508 | }; | ||
| 2509 | pub const avr35 = CpuModel{ | ||
| 2510 | .name = "avr35", | ||
| 2511 | .llvm_name = "avr35", | ||
| 2512 | .features = featureSet(&[_]Feature{ | ||
| 2513 | .avr35, | ||
| 2514 | }), | ||
| 2515 | }; | ||
| 2516 | pub const avr4 = CpuModel{ | ||
| 2517 | .name = "avr4", | ||
| 2518 | .llvm_name = "avr4", | ||
| 2519 | .features = featureSet(&[_]Feature{ | ||
| 2520 | .avr4, | ||
| 2521 | }), | ||
| 2522 | }; | ||
| 2523 | pub const avr5 = CpuModel{ | ||
| 2524 | .name = "avr5", | ||
| 2525 | .llvm_name = "avr5", | ||
| 2526 | .features = featureSet(&[_]Feature{ | ||
| 2527 | .avr5, | ||
| 2528 | }), | ||
| 2529 | }; | ||
| 2530 | pub const avr51 = CpuModel{ | ||
| 2531 | .name = "avr51", | ||
| 2532 | .llvm_name = "avr51", | ||
| 2533 | .features = featureSet(&[_]Feature{ | ||
| 2534 | .avr51, | ||
| 2535 | }), | ||
| 2536 | }; | ||
| 2537 | pub const avr6 = CpuModel{ | ||
| 2538 | .name = "avr6", | ||
| 2539 | .llvm_name = "avr6", | ||
| 2540 | .features = featureSet(&[_]Feature{ | ||
| 2541 | .avr6, | ||
| 2542 | }), | ||
| 2543 | }; | ||
| 2544 | pub const avrtiny = CpuModel{ | ||
| 2545 | .name = "avrtiny", | ||
| 2546 | .llvm_name = "avrtiny", | ||
| 2547 | .features = featureSet(&[_]Feature{ | ||
| 2548 | .avrtiny, | ||
| 2549 | }), | ||
| 2550 | }; | ||
| 2551 | pub const avrxmega1 = CpuModel{ | ||
| 2552 | .name = "avrxmega1", | ||
| 2553 | .llvm_name = "avrxmega1", | ||
| 2554 | .features = featureSet(&[_]Feature{ | ||
| 2555 | .xmega, | ||
| 2556 | }), | ||
| 2557 | }; | ||
| 2558 | pub const avrxmega2 = CpuModel{ | ||
| 2559 | .name = "avrxmega2", | ||
| 2560 | .llvm_name = "avrxmega2", | ||
| 2561 | .features = featureSet(&[_]Feature{ | ||
| 2562 | .xmega, | ||
| 2563 | }), | ||
| 2564 | }; | ||
| 2565 | pub const avrxmega3 = CpuModel{ | ||
| 2566 | .name = "avrxmega3", | ||
| 2567 | .llvm_name = "avrxmega3", | ||
| 2568 | .features = featureSet(&[_]Feature{ | ||
| 2569 | .xmega3, | ||
| 2570 | }), | ||
| 2571 | }; | ||
| 2572 | pub const avrxmega4 = CpuModel{ | ||
| 2573 | .name = "avrxmega4", | ||
| 2574 | .llvm_name = "avrxmega4", | ||
| 2575 | .features = featureSet(&[_]Feature{ | ||
| 2576 | .xmega, | ||
| 2577 | }), | ||
| 2578 | }; | ||
| 2579 | pub const avrxmega5 = CpuModel{ | ||
| 2580 | .name = "avrxmega5", | ||
| 2581 | .llvm_name = "avrxmega5", | ||
| 2582 | .features = featureSet(&[_]Feature{ | ||
| 2583 | .xmega, | ||
| 2584 | }), | ||
| 2585 | }; | ||
| 2586 | pub const avrxmega6 = CpuModel{ | ||
| 2587 | .name = "avrxmega6", | ||
| 2588 | .llvm_name = "avrxmega6", | ||
| 2589 | .features = featureSet(&[_]Feature{ | ||
| 2590 | .xmega, | ||
| 2591 | }), | ||
| 2592 | }; | ||
| 2593 | pub const avrxmega7 = CpuModel{ | ||
| 2594 | .name = "avrxmega7", | ||
| 2595 | .llvm_name = "avrxmega7", | ||
| 2596 | .features = featureSet(&[_]Feature{ | ||
| 2597 | .xmega, | ||
| 2598 | }), | ||
| 2599 | }; | ||
| 2600 | pub const m3000 = CpuModel{ | ||
| 2601 | .name = "m3000", | ||
| 2602 | .llvm_name = "m3000", | ||
| 2603 | .features = featureSet(&[_]Feature{ | ||
| 2604 | .avr5, | ||
| 2605 | }), | ||
| 2606 | }; | ||
| 2607 | }; | ||
lib/std/Target/bpf.zig created+73
| ... | @@ -0,0 +1,73 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | alu32, | ||
| 9 | dummy, | ||
| 10 | dwarfris, | ||
| 11 | }; | ||
| 12 | |||
| 13 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 14 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 15 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 16 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 17 | |||
| 18 | pub const all_features = blk: { | ||
| 19 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 20 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 21 | var result: [len]CpuFeature = undefined; | ||
| 22 | result[@intFromEnum(Feature.alu32)] = .{ | ||
| 23 | .llvm_name = "alu32", | ||
| 24 | .description = "Enable ALU32 instructions", | ||
| 25 | .dependencies = featureSet(&[_]Feature{}), | ||
| 26 | }; | ||
| 27 | result[@intFromEnum(Feature.dummy)] = .{ | ||
| 28 | .llvm_name = "dummy", | ||
| 29 | .description = "unused feature", | ||
| 30 | .dependencies = featureSet(&[_]Feature{}), | ||
| 31 | }; | ||
| 32 | result[@intFromEnum(Feature.dwarfris)] = .{ | ||
| 33 | .llvm_name = "dwarfris", | ||
| 34 | .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", | ||
| 35 | .dependencies = featureSet(&[_]Feature{}), | ||
| 36 | }; | ||
| 37 | const ti = @typeInfo(Feature); | ||
| 38 | for (&result, 0..) |*elem, i| { | ||
| 39 | elem.index = i; | ||
| 40 | elem.name = ti.Enum.fields[i].name; | ||
| 41 | } | ||
| 42 | break :blk result; | ||
| 43 | }; | ||
| 44 | |||
| 45 | pub const cpu = struct { | ||
| 46 | pub const generic = CpuModel{ | ||
| 47 | .name = "generic", | ||
| 48 | .llvm_name = "generic", | ||
| 49 | .features = featureSet(&[_]Feature{}), | ||
| 50 | }; | ||
| 51 | pub const probe = CpuModel{ | ||
| 52 | .name = "probe", | ||
| 53 | .llvm_name = "probe", | ||
| 54 | .features = featureSet(&[_]Feature{}), | ||
| 55 | }; | ||
| 56 | pub const v1 = CpuModel{ | ||
| 57 | .name = "v1", | ||
| 58 | .llvm_name = "v1", | ||
| 59 | .features = featureSet(&[_]Feature{}), | ||
| 60 | }; | ||
| 61 | pub const v2 = CpuModel{ | ||
| 62 | .name = "v2", | ||
| 63 | .llvm_name = "v2", | ||
| 64 | .features = featureSet(&[_]Feature{}), | ||
| 65 | }; | ||
| 66 | pub const v3 = CpuModel{ | ||
| 67 | .name = "v3", | ||
| 68 | .llvm_name = "v3", | ||
| 69 | .features = featureSet(&[_]Feature{ | ||
| 70 | .alu32, | ||
| 71 | }), | ||
| 72 | }; | ||
| 73 | }; | ||
lib/std/Target/csky.zig created+3214
| ... | @@ -0,0 +1,3214 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"10e60", | ||
| 9 | @"2e3", | ||
| 10 | @"3e3r1", | ||
| 11 | @"3e3r2", | ||
| 12 | @"3e3r3", | ||
| 13 | @"3e7", | ||
| 14 | @"7e10", | ||
| 15 | btst16, | ||
| 16 | cache, | ||
| 17 | ccrt, | ||
| 18 | ck801, | ||
| 19 | ck802, | ||
| 20 | ck803, | ||
| 21 | ck803s, | ||
| 22 | ck804, | ||
| 23 | ck805, | ||
| 24 | ck807, | ||
| 25 | ck810, | ||
| 26 | ck810v, | ||
| 27 | ck860, | ||
| 28 | ck860v, | ||
| 29 | constpool, | ||
| 30 | doloop, | ||
| 31 | dsp1e2, | ||
| 32 | dsp_silan, | ||
| 33 | dspe60, | ||
| 34 | dspv2, | ||
| 35 | e1, | ||
| 36 | e2, | ||
| 37 | edsp, | ||
| 38 | elrw, | ||
| 39 | fdivdu, | ||
| 40 | float1e2, | ||
| 41 | float1e3, | ||
| 42 | float3e4, | ||
| 43 | float7e60, | ||
| 44 | floate1, | ||
| 45 | fpuv2_df, | ||
| 46 | fpuv2_sf, | ||
| 47 | fpuv3_df, | ||
| 48 | fpuv3_hf, | ||
| 49 | fpuv3_hi, | ||
| 50 | fpuv3_sf, | ||
| 51 | hard_float, | ||
| 52 | hard_float_abi, | ||
| 53 | hard_tp, | ||
| 54 | high_registers, | ||
| 55 | hwdiv, | ||
| 56 | istack, | ||
| 57 | java, | ||
| 58 | mp, | ||
| 59 | mp1e2, | ||
| 60 | multiple_stld, | ||
| 61 | nvic, | ||
| 62 | pushpop, | ||
| 63 | smart, | ||
| 64 | soft_tp, | ||
| 65 | stack_size, | ||
| 66 | trust, | ||
| 67 | vdsp2e3, | ||
| 68 | vdsp2e60f, | ||
| 69 | vdspv1, | ||
| 70 | vdspv2, | ||
| 71 | }; | ||
| 72 | |||
| 73 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 74 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 75 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 76 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 77 | |||
| 78 | pub const all_features = blk: { | ||
| 79 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 80 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 81 | var result: [len]CpuFeature = undefined; | ||
| 82 | result[@intFromEnum(Feature.@"10e60")] = .{ | ||
| 83 | .llvm_name = "10e60", | ||
| 84 | .description = "Support CSKY 10e60 instructions", | ||
| 85 | .dependencies = featureSet(&[_]Feature{ | ||
| 86 | .@"7e10", | ||
| 87 | }), | ||
| 88 | }; | ||
| 89 | result[@intFromEnum(Feature.@"2e3")] = .{ | ||
| 90 | .llvm_name = "2e3", | ||
| 91 | .description = "Support CSKY 2e3 instructions", | ||
| 92 | .dependencies = featureSet(&[_]Feature{ | ||
| 93 | .e2, | ||
| 94 | }), | ||
| 95 | }; | ||
| 96 | result[@intFromEnum(Feature.@"3e3r1")] = .{ | ||
| 97 | .llvm_name = "3e3r1", | ||
| 98 | .description = "Support CSKY 3e3r1 instructions", | ||
| 99 | .dependencies = featureSet(&[_]Feature{}), | ||
| 100 | }; | ||
| 101 | result[@intFromEnum(Feature.@"3e3r2")] = .{ | ||
| 102 | .llvm_name = "3e3r2", | ||
| 103 | .description = "Support CSKY 3e3r2 instructions", | ||
| 104 | .dependencies = featureSet(&[_]Feature{ | ||
| 105 | .@"3e3r1", | ||
| 106 | .doloop, | ||
| 107 | }), | ||
| 108 | }; | ||
| 109 | result[@intFromEnum(Feature.@"3e3r3")] = .{ | ||
| 110 | .llvm_name = "3e3r3", | ||
| 111 | .description = "Support CSKY 3e3r3 instructions", | ||
| 112 | .dependencies = featureSet(&[_]Feature{ | ||
| 113 | .doloop, | ||
| 114 | }), | ||
| 115 | }; | ||
| 116 | result[@intFromEnum(Feature.@"3e7")] = .{ | ||
| 117 | .llvm_name = "3e7", | ||
| 118 | .description = "Support CSKY 3e7 instructions", | ||
| 119 | .dependencies = featureSet(&[_]Feature{ | ||
| 120 | .@"2e3", | ||
| 121 | }), | ||
| 122 | }; | ||
| 123 | result[@intFromEnum(Feature.@"7e10")] = .{ | ||
| 124 | .llvm_name = "7e10", | ||
| 125 | .description = "Support CSKY 7e10 instructions", | ||
| 126 | .dependencies = featureSet(&[_]Feature{ | ||
| 127 | .@"3e7", | ||
| 128 | }), | ||
| 129 | }; | ||
| 130 | result[@intFromEnum(Feature.btst16)] = .{ | ||
| 131 | .llvm_name = "btst16", | ||
| 132 | .description = "Use the 16-bit btsti instruction", | ||
| 133 | .dependencies = featureSet(&[_]Feature{}), | ||
| 134 | }; | ||
| 135 | result[@intFromEnum(Feature.cache)] = .{ | ||
| 136 | .llvm_name = "cache", | ||
| 137 | .description = "Enable cache", | ||
| 138 | .dependencies = featureSet(&[_]Feature{}), | ||
| 139 | }; | ||
| 140 | result[@intFromEnum(Feature.ccrt)] = .{ | ||
| 141 | .llvm_name = "ccrt", | ||
| 142 | .description = "Use CSKY compiler runtime", | ||
| 143 | .dependencies = featureSet(&[_]Feature{}), | ||
| 144 | }; | ||
| 145 | result[@intFromEnum(Feature.ck801)] = .{ | ||
| 146 | .llvm_name = "ck801", | ||
| 147 | .description = "CSKY ck801 processors", | ||
| 148 | .dependencies = featureSet(&[_]Feature{}), | ||
| 149 | }; | ||
| 150 | result[@intFromEnum(Feature.ck802)] = .{ | ||
| 151 | .llvm_name = "ck802", | ||
| 152 | .description = "CSKY ck802 processors", | ||
| 153 | .dependencies = featureSet(&[_]Feature{}), | ||
| 154 | }; | ||
| 155 | result[@intFromEnum(Feature.ck803)] = .{ | ||
| 156 | .llvm_name = "ck803", | ||
| 157 | .description = "CSKY ck803 processors", | ||
| 158 | .dependencies = featureSet(&[_]Feature{}), | ||
| 159 | }; | ||
| 160 | result[@intFromEnum(Feature.ck803s)] = .{ | ||
| 161 | .llvm_name = "ck803s", | ||
| 162 | .description = "CSKY ck803s processors", | ||
| 163 | .dependencies = featureSet(&[_]Feature{}), | ||
| 164 | }; | ||
| 165 | result[@intFromEnum(Feature.ck804)] = .{ | ||
| 166 | .llvm_name = "ck804", | ||
| 167 | .description = "CSKY ck804 processors", | ||
| 168 | .dependencies = featureSet(&[_]Feature{}), | ||
| 169 | }; | ||
| 170 | result[@intFromEnum(Feature.ck805)] = .{ | ||
| 171 | .llvm_name = "ck805", | ||
| 172 | .description = "CSKY ck805 processors", | ||
| 173 | .dependencies = featureSet(&[_]Feature{}), | ||
| 174 | }; | ||
| 175 | result[@intFromEnum(Feature.ck807)] = .{ | ||
| 176 | .llvm_name = "ck807", | ||
| 177 | .description = "CSKY ck807 processors", | ||
| 178 | .dependencies = featureSet(&[_]Feature{}), | ||
| 179 | }; | ||
| 180 | result[@intFromEnum(Feature.ck810)] = .{ | ||
| 181 | .llvm_name = "ck810", | ||
| 182 | .description = "CSKY ck810 processors", | ||
| 183 | .dependencies = featureSet(&[_]Feature{}), | ||
| 184 | }; | ||
| 185 | result[@intFromEnum(Feature.ck810v)] = .{ | ||
| 186 | .llvm_name = "ck810v", | ||
| 187 | .description = "CSKY ck810v processors", | ||
| 188 | .dependencies = featureSet(&[_]Feature{}), | ||
| 189 | }; | ||
| 190 | result[@intFromEnum(Feature.ck860)] = .{ | ||
| 191 | .llvm_name = "ck860", | ||
| 192 | .description = "CSKY ck860 processors", | ||
| 193 | .dependencies = featureSet(&[_]Feature{}), | ||
| 194 | }; | ||
| 195 | result[@intFromEnum(Feature.ck860v)] = .{ | ||
| 196 | .llvm_name = "ck860v", | ||
| 197 | .description = "CSKY ck860v processors", | ||
| 198 | .dependencies = featureSet(&[_]Feature{}), | ||
| 199 | }; | ||
| 200 | result[@intFromEnum(Feature.constpool)] = .{ | ||
| 201 | .llvm_name = "constpool", | ||
| 202 | .description = "Dump the constant pool by compiler", | ||
| 203 | .dependencies = featureSet(&[_]Feature{}), | ||
| 204 | }; | ||
| 205 | result[@intFromEnum(Feature.doloop)] = .{ | ||
| 206 | .llvm_name = "doloop", | ||
| 207 | .description = "Enable doloop instructions", | ||
| 208 | .dependencies = featureSet(&[_]Feature{}), | ||
| 209 | }; | ||
| 210 | result[@intFromEnum(Feature.dsp1e2)] = .{ | ||
| 211 | .llvm_name = "dsp1e2", | ||
| 212 | .description = "Support CSKY dsp1e2 instructions", | ||
| 213 | .dependencies = featureSet(&[_]Feature{}), | ||
| 214 | }; | ||
| 215 | result[@intFromEnum(Feature.dsp_silan)] = .{ | ||
| 216 | .llvm_name = "dsp_silan", | ||
| 217 | .description = "Enable DSP Silan instrutions", | ||
| 218 | .dependencies = featureSet(&[_]Feature{}), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.dspe60)] = .{ | ||
| 221 | .llvm_name = "dspe60", | ||
| 222 | .description = "Support CSKY dspe60 instructions", | ||
| 223 | .dependencies = featureSet(&[_]Feature{}), | ||
| 224 | }; | ||
| 225 | result[@intFromEnum(Feature.dspv2)] = .{ | ||
| 226 | .llvm_name = "dspv2", | ||
| 227 | .description = "Enable DSP V2.0 instrutions", | ||
| 228 | .dependencies = featureSet(&[_]Feature{}), | ||
| 229 | }; | ||
| 230 | result[@intFromEnum(Feature.e1)] = .{ | ||
| 231 | .llvm_name = "e1", | ||
| 232 | .description = "Support CSKY e1 instructions", | ||
| 233 | .dependencies = featureSet(&[_]Feature{ | ||
| 234 | .elrw, | ||
| 235 | }), | ||
| 236 | }; | ||
| 237 | result[@intFromEnum(Feature.e2)] = .{ | ||
| 238 | .llvm_name = "e2", | ||
| 239 | .description = "Support CSKY e2 instructions", | ||
| 240 | .dependencies = featureSet(&[_]Feature{ | ||
| 241 | .e1, | ||
| 242 | }), | ||
| 243 | }; | ||
| 244 | result[@intFromEnum(Feature.edsp)] = .{ | ||
| 245 | .llvm_name = "edsp", | ||
| 246 | .description = "Enable DSP instrutions", | ||
| 247 | .dependencies = featureSet(&[_]Feature{}), | ||
| 248 | }; | ||
| 249 | result[@intFromEnum(Feature.elrw)] = .{ | ||
| 250 | .llvm_name = "elrw", | ||
| 251 | .description = "Use the extend LRW instruction", | ||
| 252 | .dependencies = featureSet(&[_]Feature{}), | ||
| 253 | }; | ||
| 254 | result[@intFromEnum(Feature.fdivdu)] = .{ | ||
| 255 | .llvm_name = "fdivdu", | ||
| 256 | .description = "Enable float divide instructions", | ||
| 257 | .dependencies = featureSet(&[_]Feature{}), | ||
| 258 | }; | ||
| 259 | result[@intFromEnum(Feature.float1e2)] = .{ | ||
| 260 | .llvm_name = "float1e2", | ||
| 261 | .description = "Support CSKY float1e2 instructions", | ||
| 262 | .dependencies = featureSet(&[_]Feature{}), | ||
| 263 | }; | ||
| 264 | result[@intFromEnum(Feature.float1e3)] = .{ | ||
| 265 | .llvm_name = "float1e3", | ||
| 266 | .description = "Support CSKY float1e3 instructions", | ||
| 267 | .dependencies = featureSet(&[_]Feature{}), | ||
| 268 | }; | ||
| 269 | result[@intFromEnum(Feature.float3e4)] = .{ | ||
| 270 | .llvm_name = "float3e4", | ||
| 271 | .description = "Support CSKY float3e4 instructions", | ||
| 272 | .dependencies = featureSet(&[_]Feature{}), | ||
| 273 | }; | ||
| 274 | result[@intFromEnum(Feature.float7e60)] = .{ | ||
| 275 | .llvm_name = "float7e60", | ||
| 276 | .description = "Support CSKY float7e60 instructions", | ||
| 277 | .dependencies = featureSet(&[_]Feature{}), | ||
| 278 | }; | ||
| 279 | result[@intFromEnum(Feature.floate1)] = .{ | ||
| 280 | .llvm_name = "floate1", | ||
| 281 | .description = "Support CSKY floate1 instructions", | ||
| 282 | .dependencies = featureSet(&[_]Feature{}), | ||
| 283 | }; | ||
| 284 | result[@intFromEnum(Feature.fpuv2_df)] = .{ | ||
| 285 | .llvm_name = "fpuv2_df", | ||
| 286 | .description = "Enable FPUv2 double float instructions", | ||
| 287 | .dependencies = featureSet(&[_]Feature{}), | ||
| 288 | }; | ||
| 289 | result[@intFromEnum(Feature.fpuv2_sf)] = .{ | ||
| 290 | .llvm_name = "fpuv2_sf", | ||
| 291 | .description = "Enable FPUv2 single float instructions", | ||
| 292 | .dependencies = featureSet(&[_]Feature{}), | ||
| 293 | }; | ||
| 294 | result[@intFromEnum(Feature.fpuv3_df)] = .{ | ||
| 295 | .llvm_name = "fpuv3_df", | ||
| 296 | .description = "Enable FPUv3 double float instructions", | ||
| 297 | .dependencies = featureSet(&[_]Feature{}), | ||
| 298 | }; | ||
| 299 | result[@intFromEnum(Feature.fpuv3_hf)] = .{ | ||
| 300 | .llvm_name = "fpuv3_hf", | ||
| 301 | .description = "Enable FPUv3 half precision operate instructions", | ||
| 302 | .dependencies = featureSet(&[_]Feature{}), | ||
| 303 | }; | ||
| 304 | result[@intFromEnum(Feature.fpuv3_hi)] = .{ | ||
| 305 | .llvm_name = "fpuv3_hi", | ||
| 306 | .description = "Enable FPUv3 half word converting instructions", | ||
| 307 | .dependencies = featureSet(&[_]Feature{}), | ||
| 308 | }; | ||
| 309 | result[@intFromEnum(Feature.fpuv3_sf)] = .{ | ||
| 310 | .llvm_name = "fpuv3_sf", | ||
| 311 | .description = "Enable FPUv3 single float instructions", | ||
| 312 | .dependencies = featureSet(&[_]Feature{}), | ||
| 313 | }; | ||
| 314 | result[@intFromEnum(Feature.hard_float)] = .{ | ||
| 315 | .llvm_name = "hard-float", | ||
| 316 | .description = "Use hard floating point features", | ||
| 317 | .dependencies = featureSet(&[_]Feature{}), | ||
| 318 | }; | ||
| 319 | result[@intFromEnum(Feature.hard_float_abi)] = .{ | ||
| 320 | .llvm_name = "hard-float-abi", | ||
| 321 | .description = "Use hard floating point ABI to pass args", | ||
| 322 | .dependencies = featureSet(&[_]Feature{}), | ||
| 323 | }; | ||
| 324 | result[@intFromEnum(Feature.hard_tp)] = .{ | ||
| 325 | .llvm_name = "hard-tp", | ||
| 326 | .description = "Enable TLS Pointer register", | ||
| 327 | .dependencies = featureSet(&[_]Feature{}), | ||
| 328 | }; | ||
| 329 | result[@intFromEnum(Feature.high_registers)] = .{ | ||
| 330 | .llvm_name = "high-registers", | ||
| 331 | .description = "Enable r16-r31 registers", | ||
| 332 | .dependencies = featureSet(&[_]Feature{}), | ||
| 333 | }; | ||
| 334 | result[@intFromEnum(Feature.hwdiv)] = .{ | ||
| 335 | .llvm_name = "hwdiv", | ||
| 336 | .description = "Enable divide instrutions", | ||
| 337 | .dependencies = featureSet(&[_]Feature{}), | ||
| 338 | }; | ||
| 339 | result[@intFromEnum(Feature.istack)] = .{ | ||
| 340 | .llvm_name = "istack", | ||
| 341 | .description = "Enable interrput attribute", | ||
| 342 | .dependencies = featureSet(&[_]Feature{}), | ||
| 343 | }; | ||
| 344 | result[@intFromEnum(Feature.java)] = .{ | ||
| 345 | .llvm_name = "java", | ||
| 346 | .description = "Enable java instructions", | ||
| 347 | .dependencies = featureSet(&[_]Feature{}), | ||
| 348 | }; | ||
| 349 | result[@intFromEnum(Feature.mp)] = .{ | ||
| 350 | .llvm_name = "mp", | ||
| 351 | .description = "Support CSKY mp instructions", | ||
| 352 | .dependencies = featureSet(&[_]Feature{ | ||
| 353 | .@"2e3", | ||
| 354 | }), | ||
| 355 | }; | ||
| 356 | result[@intFromEnum(Feature.mp1e2)] = .{ | ||
| 357 | .llvm_name = "mp1e2", | ||
| 358 | .description = "Support CSKY mp1e2 instructions", | ||
| 359 | .dependencies = featureSet(&[_]Feature{ | ||
| 360 | .@"3e7", | ||
| 361 | }), | ||
| 362 | }; | ||
| 363 | result[@intFromEnum(Feature.multiple_stld)] = .{ | ||
| 364 | .llvm_name = "multiple_stld", | ||
| 365 | .description = "Enable multiple load/store instrutions", | ||
| 366 | .dependencies = featureSet(&[_]Feature{}), | ||
| 367 | }; | ||
| 368 | result[@intFromEnum(Feature.nvic)] = .{ | ||
| 369 | .llvm_name = "nvic", | ||
| 370 | .description = "Enable NVIC", | ||
| 371 | .dependencies = featureSet(&[_]Feature{}), | ||
| 372 | }; | ||
| 373 | result[@intFromEnum(Feature.pushpop)] = .{ | ||
| 374 | .llvm_name = "pushpop", | ||
| 375 | .description = "Enable push/pop instrutions", | ||
| 376 | .dependencies = featureSet(&[_]Feature{}), | ||
| 377 | }; | ||
| 378 | result[@intFromEnum(Feature.smart)] = .{ | ||
| 379 | .llvm_name = "smart", | ||
| 380 | .description = "Let CPU work in Smart Mode", | ||
| 381 | .dependencies = featureSet(&[_]Feature{}), | ||
| 382 | }; | ||
| 383 | result[@intFromEnum(Feature.soft_tp)] = .{ | ||
| 384 | .llvm_name = "soft-tp", | ||
| 385 | .description = "Disable TLS Pointer register", | ||
| 386 | .dependencies = featureSet(&[_]Feature{}), | ||
| 387 | }; | ||
| 388 | result[@intFromEnum(Feature.stack_size)] = .{ | ||
| 389 | .llvm_name = "stack-size", | ||
| 390 | .description = "Output stack size information", | ||
| 391 | .dependencies = featureSet(&[_]Feature{}), | ||
| 392 | }; | ||
| 393 | result[@intFromEnum(Feature.trust)] = .{ | ||
| 394 | .llvm_name = "trust", | ||
| 395 | .description = "Enable trust instructions", | ||
| 396 | .dependencies = featureSet(&[_]Feature{}), | ||
| 397 | }; | ||
| 398 | result[@intFromEnum(Feature.vdsp2e3)] = .{ | ||
| 399 | .llvm_name = "vdsp2e3", | ||
| 400 | .description = "Support CSKY vdsp2e3 instructions", | ||
| 401 | .dependencies = featureSet(&[_]Feature{}), | ||
| 402 | }; | ||
| 403 | result[@intFromEnum(Feature.vdsp2e60f)] = .{ | ||
| 404 | .llvm_name = "vdsp2e60f", | ||
| 405 | .description = "Support CSKY vdsp2e60f instructions", | ||
| 406 | .dependencies = featureSet(&[_]Feature{}), | ||
| 407 | }; | ||
| 408 | result[@intFromEnum(Feature.vdspv1)] = .{ | ||
| 409 | .llvm_name = "vdspv1", | ||
| 410 | .description = "Enable 128bit vdsp-v1 instructions", | ||
| 411 | .dependencies = featureSet(&[_]Feature{}), | ||
| 412 | }; | ||
| 413 | result[@intFromEnum(Feature.vdspv2)] = .{ | ||
| 414 | .llvm_name = "vdspv2", | ||
| 415 | .description = "Enable vdsp-v2 instructions", | ||
| 416 | .dependencies = featureSet(&[_]Feature{}), | ||
| 417 | }; | ||
| 418 | const ti = @typeInfo(Feature); | ||
| 419 | for (&result, 0..) |*elem, i| { | ||
| 420 | elem.index = i; | ||
| 421 | elem.name = ti.Enum.fields[i].name; | ||
| 422 | } | ||
| 423 | break :blk result; | ||
| 424 | }; | ||
| 425 | |||
| 426 | pub const cpu = struct { | ||
| 427 | pub const c807 = CpuModel{ | ||
| 428 | .name = "c807", | ||
| 429 | .llvm_name = "c807", | ||
| 430 | .features = featureSet(&[_]Feature{ | ||
| 431 | .cache, | ||
| 432 | .ck807, | ||
| 433 | .dsp1e2, | ||
| 434 | .dspe60, | ||
| 435 | .edsp, | ||
| 436 | .hard_tp, | ||
| 437 | .high_registers, | ||
| 438 | .hwdiv, | ||
| 439 | .mp, | ||
| 440 | .mp1e2, | ||
| 441 | .nvic, | ||
| 442 | .trust, | ||
| 443 | }), | ||
| 444 | }; | ||
| 445 | pub const c807f = CpuModel{ | ||
| 446 | .name = "c807f", | ||
| 447 | .llvm_name = "c807f", | ||
| 448 | .features = featureSet(&[_]Feature{ | ||
| 449 | .cache, | ||
| 450 | .ck807, | ||
| 451 | .dsp1e2, | ||
| 452 | .dspe60, | ||
| 453 | .edsp, | ||
| 454 | .fdivdu, | ||
| 455 | .float1e2, | ||
| 456 | .float1e3, | ||
| 457 | .float3e4, | ||
| 458 | .floate1, | ||
| 459 | .fpuv2_df, | ||
| 460 | .fpuv2_sf, | ||
| 461 | .hard_tp, | ||
| 462 | .high_registers, | ||
| 463 | .hwdiv, | ||
| 464 | .mp, | ||
| 465 | .mp1e2, | ||
| 466 | .nvic, | ||
| 467 | .trust, | ||
| 468 | }), | ||
| 469 | }; | ||
| 470 | pub const c810 = CpuModel{ | ||
| 471 | .name = "c810", | ||
| 472 | .llvm_name = "c810", | ||
| 473 | .features = featureSet(&[_]Feature{ | ||
| 474 | .@"7e10", | ||
| 475 | .cache, | ||
| 476 | .ck810, | ||
| 477 | .dsp1e2, | ||
| 478 | .dspe60, | ||
| 479 | .edsp, | ||
| 480 | .fdivdu, | ||
| 481 | .float1e2, | ||
| 482 | .floate1, | ||
| 483 | .fpuv2_df, | ||
| 484 | .fpuv2_sf, | ||
| 485 | .hard_tp, | ||
| 486 | .high_registers, | ||
| 487 | .hwdiv, | ||
| 488 | .mp, | ||
| 489 | .mp1e2, | ||
| 490 | .nvic, | ||
| 491 | .trust, | ||
| 492 | }), | ||
| 493 | }; | ||
| 494 | pub const c810t = CpuModel{ | ||
| 495 | .name = "c810t", | ||
| 496 | .llvm_name = "c810t", | ||
| 497 | .features = featureSet(&[_]Feature{ | ||
| 498 | .@"7e10", | ||
| 499 | .cache, | ||
| 500 | .ck810, | ||
| 501 | .dsp1e2, | ||
| 502 | .dspe60, | ||
| 503 | .edsp, | ||
| 504 | .fdivdu, | ||
| 505 | .float1e2, | ||
| 506 | .floate1, | ||
| 507 | .fpuv2_df, | ||
| 508 | .fpuv2_sf, | ||
| 509 | .hard_tp, | ||
| 510 | .high_registers, | ||
| 511 | .hwdiv, | ||
| 512 | .mp, | ||
| 513 | .mp1e2, | ||
| 514 | .nvic, | ||
| 515 | .trust, | ||
| 516 | }), | ||
| 517 | }; | ||
| 518 | pub const c810tv = CpuModel{ | ||
| 519 | .name = "c810tv", | ||
| 520 | .llvm_name = "c810tv", | ||
| 521 | .features = featureSet(&[_]Feature{ | ||
| 522 | .@"7e10", | ||
| 523 | .cache, | ||
| 524 | .ck810, | ||
| 525 | .ck810v, | ||
| 526 | .dsp1e2, | ||
| 527 | .dspe60, | ||
| 528 | .edsp, | ||
| 529 | .fdivdu, | ||
| 530 | .float1e2, | ||
| 531 | .floate1, | ||
| 532 | .fpuv2_df, | ||
| 533 | .fpuv2_sf, | ||
| 534 | .hard_tp, | ||
| 535 | .high_registers, | ||
| 536 | .hwdiv, | ||
| 537 | .mp, | ||
| 538 | .mp1e2, | ||
| 539 | .nvic, | ||
| 540 | .trust, | ||
| 541 | .vdspv1, | ||
| 542 | }), | ||
| 543 | }; | ||
| 544 | pub const c810v = CpuModel{ | ||
| 545 | .name = "c810v", | ||
| 546 | .llvm_name = "c810v", | ||
| 547 | .features = featureSet(&[_]Feature{ | ||
| 548 | .@"7e10", | ||
| 549 | .cache, | ||
| 550 | .ck810, | ||
| 551 | .ck810v, | ||
| 552 | .dsp1e2, | ||
| 553 | .dspe60, | ||
| 554 | .edsp, | ||
| 555 | .fdivdu, | ||
| 556 | .float1e2, | ||
| 557 | .floate1, | ||
| 558 | .fpuv2_df, | ||
| 559 | .fpuv2_sf, | ||
| 560 | .hard_tp, | ||
| 561 | .high_registers, | ||
| 562 | .hwdiv, | ||
| 563 | .mp, | ||
| 564 | .mp1e2, | ||
| 565 | .nvic, | ||
| 566 | .trust, | ||
| 567 | .vdspv1, | ||
| 568 | }), | ||
| 569 | }; | ||
| 570 | pub const c860 = CpuModel{ | ||
| 571 | .name = "c860", | ||
| 572 | .llvm_name = "c860", | ||
| 573 | .features = featureSet(&[_]Feature{ | ||
| 574 | .@"10e60", | ||
| 575 | .@"3e3r2", | ||
| 576 | .@"3e3r3", | ||
| 577 | .btst16, | ||
| 578 | .cache, | ||
| 579 | .ck860, | ||
| 580 | .dspe60, | ||
| 581 | .float7e60, | ||
| 582 | .fpuv3_df, | ||
| 583 | .fpuv3_hf, | ||
| 584 | .fpuv3_hi, | ||
| 585 | .fpuv3_sf, | ||
| 586 | .hard_tp, | ||
| 587 | .high_registers, | ||
| 588 | .hwdiv, | ||
| 589 | .mp, | ||
| 590 | .mp1e2, | ||
| 591 | .nvic, | ||
| 592 | .trust, | ||
| 593 | }), | ||
| 594 | }; | ||
| 595 | pub const c860v = CpuModel{ | ||
| 596 | .name = "c860v", | ||
| 597 | .llvm_name = "c860v", | ||
| 598 | .features = featureSet(&[_]Feature{ | ||
| 599 | .@"10e60", | ||
| 600 | .@"3e3r2", | ||
| 601 | .@"3e3r3", | ||
| 602 | .btst16, | ||
| 603 | .cache, | ||
| 604 | .ck860, | ||
| 605 | .ck860v, | ||
| 606 | .dspe60, | ||
| 607 | .float7e60, | ||
| 608 | .fpuv3_df, | ||
| 609 | .fpuv3_hf, | ||
| 610 | .fpuv3_hi, | ||
| 611 | .fpuv3_sf, | ||
| 612 | .hard_tp, | ||
| 613 | .high_registers, | ||
| 614 | .hwdiv, | ||
| 615 | .mp, | ||
| 616 | .mp1e2, | ||
| 617 | .nvic, | ||
| 618 | .trust, | ||
| 619 | .vdsp2e60f, | ||
| 620 | .vdspv2, | ||
| 621 | }), | ||
| 622 | }; | ||
| 623 | pub const ck801 = CpuModel{ | ||
| 624 | .name = "ck801", | ||
| 625 | .llvm_name = "ck801", | ||
| 626 | .features = featureSet(&[_]Feature{ | ||
| 627 | .btst16, | ||
| 628 | .ck801, | ||
| 629 | .e1, | ||
| 630 | .trust, | ||
| 631 | }), | ||
| 632 | }; | ||
| 633 | pub const ck801t = CpuModel{ | ||
| 634 | .name = "ck801t", | ||
| 635 | .llvm_name = "ck801t", | ||
| 636 | .features = featureSet(&[_]Feature{ | ||
| 637 | .btst16, | ||
| 638 | .ck801, | ||
| 639 | .e1, | ||
| 640 | .trust, | ||
| 641 | }), | ||
| 642 | }; | ||
| 643 | pub const ck802 = CpuModel{ | ||
| 644 | .name = "ck802", | ||
| 645 | .llvm_name = "ck802", | ||
| 646 | .features = featureSet(&[_]Feature{ | ||
| 647 | .btst16, | ||
| 648 | .ck802, | ||
| 649 | .e2, | ||
| 650 | .nvic, | ||
| 651 | .trust, | ||
| 652 | }), | ||
| 653 | }; | ||
| 654 | pub const ck802j = CpuModel{ | ||
| 655 | .name = "ck802j", | ||
| 656 | .llvm_name = "ck802j", | ||
| 657 | .features = featureSet(&[_]Feature{ | ||
| 658 | .btst16, | ||
| 659 | .ck802, | ||
| 660 | .e2, | ||
| 661 | .java, | ||
| 662 | .nvic, | ||
| 663 | .trust, | ||
| 664 | }), | ||
| 665 | }; | ||
| 666 | pub const ck802t = CpuModel{ | ||
| 667 | .name = "ck802t", | ||
| 668 | .llvm_name = "ck802t", | ||
| 669 | .features = featureSet(&[_]Feature{ | ||
| 670 | .btst16, | ||
| 671 | .ck802, | ||
| 672 | .e2, | ||
| 673 | .nvic, | ||
| 674 | .trust, | ||
| 675 | }), | ||
| 676 | }; | ||
| 677 | pub const ck803 = CpuModel{ | ||
| 678 | .name = "ck803", | ||
| 679 | .llvm_name = "ck803", | ||
| 680 | .features = featureSet(&[_]Feature{ | ||
| 681 | .btst16, | ||
| 682 | .ck803, | ||
| 683 | .hwdiv, | ||
| 684 | .mp, | ||
| 685 | .nvic, | ||
| 686 | .trust, | ||
| 687 | }), | ||
| 688 | }; | ||
| 689 | pub const ck803e = CpuModel{ | ||
| 690 | .name = "ck803e", | ||
| 691 | .llvm_name = "ck803e", | ||
| 692 | .features = featureSet(&[_]Feature{ | ||
| 693 | .btst16, | ||
| 694 | .ck803, | ||
| 695 | .dsp1e2, | ||
| 696 | .dspe60, | ||
| 697 | .edsp, | ||
| 698 | .hwdiv, | ||
| 699 | .mp, | ||
| 700 | .nvic, | ||
| 701 | .trust, | ||
| 702 | }), | ||
| 703 | }; | ||
| 704 | pub const ck803ef = CpuModel{ | ||
| 705 | .name = "ck803ef", | ||
| 706 | .llvm_name = "ck803ef", | ||
| 707 | .features = featureSet(&[_]Feature{ | ||
| 708 | .btst16, | ||
| 709 | .ck803, | ||
| 710 | .dsp1e2, | ||
| 711 | .dspe60, | ||
| 712 | .edsp, | ||
| 713 | .float1e3, | ||
| 714 | .floate1, | ||
| 715 | .fpuv2_sf, | ||
| 716 | .hwdiv, | ||
| 717 | .mp, | ||
| 718 | .nvic, | ||
| 719 | .trust, | ||
| 720 | }), | ||
| 721 | }; | ||
| 722 | pub const ck803efh = CpuModel{ | ||
| 723 | .name = "ck803efh", | ||
| 724 | .llvm_name = "ck803efh", | ||
| 725 | .features = featureSet(&[_]Feature{ | ||
| 726 | .btst16, | ||
| 727 | .ck803, | ||
| 728 | .dsp1e2, | ||
| 729 | .dspe60, | ||
| 730 | .edsp, | ||
| 731 | .float1e3, | ||
| 732 | .floate1, | ||
| 733 | .fpuv2_sf, | ||
| 734 | .hwdiv, | ||
| 735 | .mp, | ||
| 736 | .nvic, | ||
| 737 | .trust, | ||
| 738 | }), | ||
| 739 | }; | ||
| 740 | pub const ck803efhr1 = CpuModel{ | ||
| 741 | .name = "ck803efhr1", | ||
| 742 | .llvm_name = "ck803efhr1", | ||
| 743 | .features = featureSet(&[_]Feature{ | ||
| 744 | .@"3e3r1", | ||
| 745 | .btst16, | ||
| 746 | .ck803, | ||
| 747 | .dsp1e2, | ||
| 748 | .dspe60, | ||
| 749 | .dspv2, | ||
| 750 | .edsp, | ||
| 751 | .float1e3, | ||
| 752 | .floate1, | ||
| 753 | .fpuv2_sf, | ||
| 754 | .high_registers, | ||
| 755 | .hwdiv, | ||
| 756 | .mp, | ||
| 757 | .nvic, | ||
| 758 | .trust, | ||
| 759 | }), | ||
| 760 | }; | ||
| 761 | pub const ck803efhr2 = CpuModel{ | ||
| 762 | .name = "ck803efhr2", | ||
| 763 | .llvm_name = "ck803efhr2", | ||
| 764 | .features = featureSet(&[_]Feature{ | ||
| 765 | .@"3e3r2", | ||
| 766 | .@"3e3r3", | ||
| 767 | .btst16, | ||
| 768 | .ck803, | ||
| 769 | .dsp1e2, | ||
| 770 | .dspe60, | ||
| 771 | .dspv2, | ||
| 772 | .edsp, | ||
| 773 | .float1e3, | ||
| 774 | .floate1, | ||
| 775 | .fpuv2_sf, | ||
| 776 | .high_registers, | ||
| 777 | .hwdiv, | ||
| 778 | .mp, | ||
| 779 | .nvic, | ||
| 780 | .trust, | ||
| 781 | }), | ||
| 782 | }; | ||
| 783 | pub const ck803efhr3 = CpuModel{ | ||
| 784 | .name = "ck803efhr3", | ||
| 785 | .llvm_name = "ck803efhr3", | ||
| 786 | .features = featureSet(&[_]Feature{ | ||
| 787 | .@"3e3r2", | ||
| 788 | .@"3e3r3", | ||
| 789 | .btst16, | ||
| 790 | .ck803, | ||
| 791 | .dsp1e2, | ||
| 792 | .dspe60, | ||
| 793 | .dspv2, | ||
| 794 | .edsp, | ||
| 795 | .float1e3, | ||
| 796 | .floate1, | ||
| 797 | .fpuv2_sf, | ||
| 798 | .high_registers, | ||
| 799 | .hwdiv, | ||
| 800 | .mp, | ||
| 801 | .nvic, | ||
| 802 | .trust, | ||
| 803 | }), | ||
| 804 | }; | ||
| 805 | pub const ck803efht = CpuModel{ | ||
| 806 | .name = "ck803efht", | ||
| 807 | .llvm_name = "ck803efht", | ||
| 808 | .features = featureSet(&[_]Feature{ | ||
| 809 | .btst16, | ||
| 810 | .ck803, | ||
| 811 | .dsp1e2, | ||
| 812 | .dspe60, | ||
| 813 | .edsp, | ||
| 814 | .float1e3, | ||
| 815 | .floate1, | ||
| 816 | .fpuv2_sf, | ||
| 817 | .hwdiv, | ||
| 818 | .mp, | ||
| 819 | .nvic, | ||
| 820 | .trust, | ||
| 821 | }), | ||
| 822 | }; | ||
| 823 | pub const ck803efhtr1 = CpuModel{ | ||
| 824 | .name = "ck803efhtr1", | ||
| 825 | .llvm_name = "ck803efhtr1", | ||
| 826 | .features = featureSet(&[_]Feature{ | ||
| 827 | .@"3e3r1", | ||
| 828 | .btst16, | ||
| 829 | .ck803, | ||
| 830 | .dsp1e2, | ||
| 831 | .dspe60, | ||
| 832 | .dspv2, | ||
| 833 | .edsp, | ||
| 834 | .float1e3, | ||
| 835 | .floate1, | ||
| 836 | .fpuv2_sf, | ||
| 837 | .high_registers, | ||
| 838 | .hwdiv, | ||
| 839 | .mp, | ||
| 840 | .nvic, | ||
| 841 | .trust, | ||
| 842 | }), | ||
| 843 | }; | ||
| 844 | pub const ck803efhtr2 = CpuModel{ | ||
| 845 | .name = "ck803efhtr2", | ||
| 846 | .llvm_name = "ck803efhtr2", | ||
| 847 | .features = featureSet(&[_]Feature{ | ||
| 848 | .@"3e3r2", | ||
| 849 | .@"3e3r3", | ||
| 850 | .btst16, | ||
| 851 | .ck803, | ||
| 852 | .dsp1e2, | ||
| 853 | .dspe60, | ||
| 854 | .dspv2, | ||
| 855 | .edsp, | ||
| 856 | .float1e3, | ||
| 857 | .floate1, | ||
| 858 | .fpuv2_sf, | ||
| 859 | .high_registers, | ||
| 860 | .hwdiv, | ||
| 861 | .mp, | ||
| 862 | .nvic, | ||
| 863 | .trust, | ||
| 864 | }), | ||
| 865 | }; | ||
| 866 | pub const ck803efhtr3 = CpuModel{ | ||
| 867 | .name = "ck803efhtr3", | ||
| 868 | .llvm_name = "ck803efhtr3", | ||
| 869 | .features = featureSet(&[_]Feature{ | ||
| 870 | .@"3e3r2", | ||
| 871 | .@"3e3r3", | ||
| 872 | .btst16, | ||
| 873 | .ck803, | ||
| 874 | .dsp1e2, | ||
| 875 | .dspe60, | ||
| 876 | .dspv2, | ||
| 877 | .edsp, | ||
| 878 | .float1e3, | ||
| 879 | .floate1, | ||
| 880 | .fpuv2_sf, | ||
| 881 | .high_registers, | ||
| 882 | .hwdiv, | ||
| 883 | .mp, | ||
| 884 | .nvic, | ||
| 885 | .trust, | ||
| 886 | }), | ||
| 887 | }; | ||
| 888 | pub const ck803efr1 = CpuModel{ | ||
| 889 | .name = "ck803efr1", | ||
| 890 | .llvm_name = "ck803efr1", | ||
| 891 | .features = featureSet(&[_]Feature{ | ||
| 892 | .@"3e3r1", | ||
| 893 | .btst16, | ||
| 894 | .ck803, | ||
| 895 | .dsp1e2, | ||
| 896 | .dspe60, | ||
| 897 | .dspv2, | ||
| 898 | .edsp, | ||
| 899 | .float1e3, | ||
| 900 | .floate1, | ||
| 901 | .fpuv2_sf, | ||
| 902 | .high_registers, | ||
| 903 | .hwdiv, | ||
| 904 | .mp, | ||
| 905 | .nvic, | ||
| 906 | .trust, | ||
| 907 | }), | ||
| 908 | }; | ||
| 909 | pub const ck803efr2 = CpuModel{ | ||
| 910 | .name = "ck803efr2", | ||
| 911 | .llvm_name = "ck803efr2", | ||
| 912 | .features = featureSet(&[_]Feature{ | ||
| 913 | .@"3e3r2", | ||
| 914 | .@"3e3r3", | ||
| 915 | .btst16, | ||
| 916 | .ck803, | ||
| 917 | .dsp1e2, | ||
| 918 | .dspe60, | ||
| 919 | .dspv2, | ||
| 920 | .edsp, | ||
| 921 | .float1e3, | ||
| 922 | .floate1, | ||
| 923 | .fpuv2_sf, | ||
| 924 | .high_registers, | ||
| 925 | .hwdiv, | ||
| 926 | .mp, | ||
| 927 | .nvic, | ||
| 928 | .trust, | ||
| 929 | }), | ||
| 930 | }; | ||
| 931 | pub const ck803efr3 = CpuModel{ | ||
| 932 | .name = "ck803efr3", | ||
| 933 | .llvm_name = "ck803efr3", | ||
| 934 | .features = featureSet(&[_]Feature{ | ||
| 935 | .@"3e3r2", | ||
| 936 | .@"3e3r3", | ||
| 937 | .btst16, | ||
| 938 | .ck803, | ||
| 939 | .dsp1e2, | ||
| 940 | .dspe60, | ||
| 941 | .dspv2, | ||
| 942 | .edsp, | ||
| 943 | .float1e3, | ||
| 944 | .floate1, | ||
| 945 | .fpuv2_sf, | ||
| 946 | .high_registers, | ||
| 947 | .hwdiv, | ||
| 948 | .mp, | ||
| 949 | .nvic, | ||
| 950 | .trust, | ||
| 951 | }), | ||
| 952 | }; | ||
| 953 | pub const ck803eft = CpuModel{ | ||
| 954 | .name = "ck803eft", | ||
| 955 | .llvm_name = "ck803eft", | ||
| 956 | .features = featureSet(&[_]Feature{ | ||
| 957 | .btst16, | ||
| 958 | .ck803, | ||
| 959 | .dsp1e2, | ||
| 960 | .dspe60, | ||
| 961 | .edsp, | ||
| 962 | .float1e3, | ||
| 963 | .floate1, | ||
| 964 | .fpuv2_sf, | ||
| 965 | .hwdiv, | ||
| 966 | .mp, | ||
| 967 | .nvic, | ||
| 968 | .trust, | ||
| 969 | }), | ||
| 970 | }; | ||
| 971 | pub const ck803eftr1 = CpuModel{ | ||
| 972 | .name = "ck803eftr1", | ||
| 973 | .llvm_name = "ck803eftr1", | ||
| 974 | .features = featureSet(&[_]Feature{ | ||
| 975 | .@"3e3r1", | ||
| 976 | .btst16, | ||
| 977 | .ck803, | ||
| 978 | .dsp1e2, | ||
| 979 | .dspe60, | ||
| 980 | .dspv2, | ||
| 981 | .edsp, | ||
| 982 | .float1e3, | ||
| 983 | .floate1, | ||
| 984 | .fpuv2_sf, | ||
| 985 | .high_registers, | ||
| 986 | .hwdiv, | ||
| 987 | .mp, | ||
| 988 | .nvic, | ||
| 989 | .trust, | ||
| 990 | }), | ||
| 991 | }; | ||
| 992 | pub const ck803eftr2 = CpuModel{ | ||
| 993 | .name = "ck803eftr2", | ||
| 994 | .llvm_name = "ck803eftr2", | ||
| 995 | .features = featureSet(&[_]Feature{ | ||
| 996 | .@"3e3r2", | ||
| 997 | .@"3e3r3", | ||
| 998 | .btst16, | ||
| 999 | .ck803, | ||
| 1000 | .dsp1e2, | ||
| 1001 | .dspe60, | ||
| 1002 | .dspv2, | ||
| 1003 | .edsp, | ||
| 1004 | .float1e3, | ||
| 1005 | .floate1, | ||
| 1006 | .fpuv2_sf, | ||
| 1007 | .high_registers, | ||
| 1008 | .hwdiv, | ||
| 1009 | .mp, | ||
| 1010 | .nvic, | ||
| 1011 | .trust, | ||
| 1012 | }), | ||
| 1013 | }; | ||
| 1014 | pub const ck803eftr3 = CpuModel{ | ||
| 1015 | .name = "ck803eftr3", | ||
| 1016 | .llvm_name = "ck803eftr3", | ||
| 1017 | .features = featureSet(&[_]Feature{ | ||
| 1018 | .@"3e3r2", | ||
| 1019 | .@"3e3r3", | ||
| 1020 | .btst16, | ||
| 1021 | .ck803, | ||
| 1022 | .dsp1e2, | ||
| 1023 | .dspe60, | ||
| 1024 | .dspv2, | ||
| 1025 | .edsp, | ||
| 1026 | .float1e3, | ||
| 1027 | .floate1, | ||
| 1028 | .fpuv2_sf, | ||
| 1029 | .high_registers, | ||
| 1030 | .hwdiv, | ||
| 1031 | .mp, | ||
| 1032 | .nvic, | ||
| 1033 | .trust, | ||
| 1034 | }), | ||
| 1035 | }; | ||
| 1036 | pub const ck803eh = CpuModel{ | ||
| 1037 | .name = "ck803eh", | ||
| 1038 | .llvm_name = "ck803eh", | ||
| 1039 | .features = featureSet(&[_]Feature{ | ||
| 1040 | .btst16, | ||
| 1041 | .ck803, | ||
| 1042 | .dsp1e2, | ||
| 1043 | .dspe60, | ||
| 1044 | .edsp, | ||
| 1045 | .hwdiv, | ||
| 1046 | .mp, | ||
| 1047 | .nvic, | ||
| 1048 | .trust, | ||
| 1049 | }), | ||
| 1050 | }; | ||
| 1051 | pub const ck803ehr1 = CpuModel{ | ||
| 1052 | .name = "ck803ehr1", | ||
| 1053 | .llvm_name = "ck803ehr1", | ||
| 1054 | .features = featureSet(&[_]Feature{ | ||
| 1055 | .@"3e3r1", | ||
| 1056 | .@"3e3r3", | ||
| 1057 | .btst16, | ||
| 1058 | .ck803, | ||
| 1059 | .dsp1e2, | ||
| 1060 | .dspe60, | ||
| 1061 | .dspv2, | ||
| 1062 | .edsp, | ||
| 1063 | .high_registers, | ||
| 1064 | .hwdiv, | ||
| 1065 | .mp, | ||
| 1066 | .nvic, | ||
| 1067 | .trust, | ||
| 1068 | }), | ||
| 1069 | }; | ||
| 1070 | pub const ck803ehr2 = CpuModel{ | ||
| 1071 | .name = "ck803ehr2", | ||
| 1072 | .llvm_name = "ck803ehr2", | ||
| 1073 | .features = featureSet(&[_]Feature{ | ||
| 1074 | .@"3e3r2", | ||
| 1075 | .@"3e3r3", | ||
| 1076 | .btst16, | ||
| 1077 | .ck803, | ||
| 1078 | .dsp1e2, | ||
| 1079 | .dspe60, | ||
| 1080 | .dspv2, | ||
| 1081 | .edsp, | ||
| 1082 | .high_registers, | ||
| 1083 | .hwdiv, | ||
| 1084 | .mp, | ||
| 1085 | .nvic, | ||
| 1086 | .trust, | ||
| 1087 | }), | ||
| 1088 | }; | ||
| 1089 | pub const ck803ehr3 = CpuModel{ | ||
| 1090 | .name = "ck803ehr3", | ||
| 1091 | .llvm_name = "ck803ehr3", | ||
| 1092 | .features = featureSet(&[_]Feature{ | ||
| 1093 | .@"3e3r2", | ||
| 1094 | .@"3e3r3", | ||
| 1095 | .btst16, | ||
| 1096 | .ck803, | ||
| 1097 | .dsp1e2, | ||
| 1098 | .dspe60, | ||
| 1099 | .dspv2, | ||
| 1100 | .edsp, | ||
| 1101 | .high_registers, | ||
| 1102 | .hwdiv, | ||
| 1103 | .mp, | ||
| 1104 | .nvic, | ||
| 1105 | .trust, | ||
| 1106 | }), | ||
| 1107 | }; | ||
| 1108 | pub const ck803eht = CpuModel{ | ||
| 1109 | .name = "ck803eht", | ||
| 1110 | .llvm_name = "ck803eht", | ||
| 1111 | .features = featureSet(&[_]Feature{ | ||
| 1112 | .btst16, | ||
| 1113 | .ck803, | ||
| 1114 | .dsp1e2, | ||
| 1115 | .dspe60, | ||
| 1116 | .edsp, | ||
| 1117 | .hwdiv, | ||
| 1118 | .mp, | ||
| 1119 | .nvic, | ||
| 1120 | .trust, | ||
| 1121 | }), | ||
| 1122 | }; | ||
| 1123 | pub const ck803ehtr1 = CpuModel{ | ||
| 1124 | .name = "ck803ehtr1", | ||
| 1125 | .llvm_name = "ck803ehtr1", | ||
| 1126 | .features = featureSet(&[_]Feature{ | ||
| 1127 | .@"3e3r1", | ||
| 1128 | .@"3e3r3", | ||
| 1129 | .btst16, | ||
| 1130 | .ck803, | ||
| 1131 | .dsp1e2, | ||
| 1132 | .dspe60, | ||
| 1133 | .dspv2, | ||
| 1134 | .edsp, | ||
| 1135 | .high_registers, | ||
| 1136 | .hwdiv, | ||
| 1137 | .mp, | ||
| 1138 | .nvic, | ||
| 1139 | .trust, | ||
| 1140 | }), | ||
| 1141 | }; | ||
| 1142 | pub const ck803ehtr2 = CpuModel{ | ||
| 1143 | .name = "ck803ehtr2", | ||
| 1144 | .llvm_name = "ck803ehtr2", | ||
| 1145 | .features = featureSet(&[_]Feature{ | ||
| 1146 | .@"3e3r2", | ||
| 1147 | .@"3e3r3", | ||
| 1148 | .btst16, | ||
| 1149 | .ck803, | ||
| 1150 | .dsp1e2, | ||
| 1151 | .dspe60, | ||
| 1152 | .dspv2, | ||
| 1153 | .edsp, | ||
| 1154 | .high_registers, | ||
| 1155 | .hwdiv, | ||
| 1156 | .mp, | ||
| 1157 | .nvic, | ||
| 1158 | .trust, | ||
| 1159 | }), | ||
| 1160 | }; | ||
| 1161 | pub const ck803ehtr3 = CpuModel{ | ||
| 1162 | .name = "ck803ehtr3", | ||
| 1163 | .llvm_name = "ck803ehtr3", | ||
| 1164 | .features = featureSet(&[_]Feature{ | ||
| 1165 | .@"3e3r2", | ||
| 1166 | .@"3e3r3", | ||
| 1167 | .btst16, | ||
| 1168 | .ck803, | ||
| 1169 | .dsp1e2, | ||
| 1170 | .dspe60, | ||
| 1171 | .dspv2, | ||
| 1172 | .edsp, | ||
| 1173 | .high_registers, | ||
| 1174 | .hwdiv, | ||
| 1175 | .mp, | ||
| 1176 | .nvic, | ||
| 1177 | .trust, | ||
| 1178 | }), | ||
| 1179 | }; | ||
| 1180 | pub const ck803er1 = CpuModel{ | ||
| 1181 | .name = "ck803er1", | ||
| 1182 | .llvm_name = "ck803er1", | ||
| 1183 | .features = featureSet(&[_]Feature{ | ||
| 1184 | .@"3e3r1", | ||
| 1185 | .@"3e3r3", | ||
| 1186 | .btst16, | ||
| 1187 | .ck803, | ||
| 1188 | .dsp1e2, | ||
| 1189 | .dspe60, | ||
| 1190 | .dspv2, | ||
| 1191 | .edsp, | ||
| 1192 | .high_registers, | ||
| 1193 | .hwdiv, | ||
| 1194 | .mp, | ||
| 1195 | .nvic, | ||
| 1196 | .trust, | ||
| 1197 | }), | ||
| 1198 | }; | ||
| 1199 | pub const ck803er2 = CpuModel{ | ||
| 1200 | .name = "ck803er2", | ||
| 1201 | .llvm_name = "ck803er2", | ||
| 1202 | .features = featureSet(&[_]Feature{ | ||
| 1203 | .@"3e3r2", | ||
| 1204 | .@"3e3r3", | ||
| 1205 | .btst16, | ||
| 1206 | .ck803, | ||
| 1207 | .dsp1e2, | ||
| 1208 | .dspe60, | ||
| 1209 | .dspv2, | ||
| 1210 | .edsp, | ||
| 1211 | .high_registers, | ||
| 1212 | .hwdiv, | ||
| 1213 | .mp, | ||
| 1214 | .nvic, | ||
| 1215 | .trust, | ||
| 1216 | }), | ||
| 1217 | }; | ||
| 1218 | pub const ck803er3 = CpuModel{ | ||
| 1219 | .name = "ck803er3", | ||
| 1220 | .llvm_name = "ck803er3", | ||
| 1221 | .features = featureSet(&[_]Feature{ | ||
| 1222 | .@"3e3r2", | ||
| 1223 | .@"3e3r3", | ||
| 1224 | .btst16, | ||
| 1225 | .ck803, | ||
| 1226 | .dsp1e2, | ||
| 1227 | .dspe60, | ||
| 1228 | .dspv2, | ||
| 1229 | .edsp, | ||
| 1230 | .high_registers, | ||
| 1231 | .hwdiv, | ||
| 1232 | .mp, | ||
| 1233 | .nvic, | ||
| 1234 | .trust, | ||
| 1235 | }), | ||
| 1236 | }; | ||
| 1237 | pub const ck803et = CpuModel{ | ||
| 1238 | .name = "ck803et", | ||
| 1239 | .llvm_name = "ck803et", | ||
| 1240 | .features = featureSet(&[_]Feature{ | ||
| 1241 | .btst16, | ||
| 1242 | .ck803, | ||
| 1243 | .dsp1e2, | ||
| 1244 | .dspe60, | ||
| 1245 | .edsp, | ||
| 1246 | .hwdiv, | ||
| 1247 | .mp, | ||
| 1248 | .nvic, | ||
| 1249 | .trust, | ||
| 1250 | }), | ||
| 1251 | }; | ||
| 1252 | pub const ck803etr1 = CpuModel{ | ||
| 1253 | .name = "ck803etr1", | ||
| 1254 | .llvm_name = "ck803etr1", | ||
| 1255 | .features = featureSet(&[_]Feature{ | ||
| 1256 | .@"3e3r1", | ||
| 1257 | .@"3e3r3", | ||
| 1258 | .btst16, | ||
| 1259 | .ck803, | ||
| 1260 | .dsp1e2, | ||
| 1261 | .dspe60, | ||
| 1262 | .dspv2, | ||
| 1263 | .edsp, | ||
| 1264 | .high_registers, | ||
| 1265 | .hwdiv, | ||
| 1266 | .mp, | ||
| 1267 | .nvic, | ||
| 1268 | .trust, | ||
| 1269 | }), | ||
| 1270 | }; | ||
| 1271 | pub const ck803etr2 = CpuModel{ | ||
| 1272 | .name = "ck803etr2", | ||
| 1273 | .llvm_name = "ck803etr2", | ||
| 1274 | .features = featureSet(&[_]Feature{ | ||
| 1275 | .@"3e3r2", | ||
| 1276 | .@"3e3r3", | ||
| 1277 | .btst16, | ||
| 1278 | .ck803, | ||
| 1279 | .dsp1e2, | ||
| 1280 | .dspe60, | ||
| 1281 | .dspv2, | ||
| 1282 | .edsp, | ||
| 1283 | .high_registers, | ||
| 1284 | .hwdiv, | ||
| 1285 | .mp, | ||
| 1286 | .nvic, | ||
| 1287 | .trust, | ||
| 1288 | }), | ||
| 1289 | }; | ||
| 1290 | pub const ck803etr3 = CpuModel{ | ||
| 1291 | .name = "ck803etr3", | ||
| 1292 | .llvm_name = "ck803etr3", | ||
| 1293 | .features = featureSet(&[_]Feature{ | ||
| 1294 | .@"3e3r2", | ||
| 1295 | .@"3e3r3", | ||
| 1296 | .btst16, | ||
| 1297 | .ck803, | ||
| 1298 | .dsp1e2, | ||
| 1299 | .dspe60, | ||
| 1300 | .dspv2, | ||
| 1301 | .edsp, | ||
| 1302 | .high_registers, | ||
| 1303 | .hwdiv, | ||
| 1304 | .mp, | ||
| 1305 | .nvic, | ||
| 1306 | .trust, | ||
| 1307 | }), | ||
| 1308 | }; | ||
| 1309 | pub const ck803f = CpuModel{ | ||
| 1310 | .name = "ck803f", | ||
| 1311 | .llvm_name = "ck803f", | ||
| 1312 | .features = featureSet(&[_]Feature{ | ||
| 1313 | .btst16, | ||
| 1314 | .ck803, | ||
| 1315 | .float1e3, | ||
| 1316 | .floate1, | ||
| 1317 | .fpuv2_sf, | ||
| 1318 | .hwdiv, | ||
| 1319 | .mp, | ||
| 1320 | .nvic, | ||
| 1321 | .trust, | ||
| 1322 | }), | ||
| 1323 | }; | ||
| 1324 | pub const ck803fh = CpuModel{ | ||
| 1325 | .name = "ck803fh", | ||
| 1326 | .llvm_name = "ck803fh", | ||
| 1327 | .features = featureSet(&[_]Feature{ | ||
| 1328 | .btst16, | ||
| 1329 | .ck803, | ||
| 1330 | .float1e3, | ||
| 1331 | .floate1, | ||
| 1332 | .fpuv2_sf, | ||
| 1333 | .hwdiv, | ||
| 1334 | .mp, | ||
| 1335 | .nvic, | ||
| 1336 | .trust, | ||
| 1337 | }), | ||
| 1338 | }; | ||
| 1339 | pub const ck803fhr1 = CpuModel{ | ||
| 1340 | .name = "ck803fhr1", | ||
| 1341 | .llvm_name = "ck803fhr1", | ||
| 1342 | .features = featureSet(&[_]Feature{ | ||
| 1343 | .@"3e3r1", | ||
| 1344 | .@"3e3r3", | ||
| 1345 | .btst16, | ||
| 1346 | .ck803, | ||
| 1347 | .dspv2, | ||
| 1348 | .float1e3, | ||
| 1349 | .floate1, | ||
| 1350 | .fpuv2_sf, | ||
| 1351 | .hwdiv, | ||
| 1352 | .mp, | ||
| 1353 | .nvic, | ||
| 1354 | .trust, | ||
| 1355 | }), | ||
| 1356 | }; | ||
| 1357 | pub const ck803fhr2 = CpuModel{ | ||
| 1358 | .name = "ck803fhr2", | ||
| 1359 | .llvm_name = "ck803fhr2", | ||
| 1360 | .features = featureSet(&[_]Feature{ | ||
| 1361 | .@"3e3r2", | ||
| 1362 | .@"3e3r3", | ||
| 1363 | .btst16, | ||
| 1364 | .ck803, | ||
| 1365 | .dspv2, | ||
| 1366 | .float1e3, | ||
| 1367 | .floate1, | ||
| 1368 | .fpuv2_sf, | ||
| 1369 | .hwdiv, | ||
| 1370 | .mp, | ||
| 1371 | .nvic, | ||
| 1372 | .trust, | ||
| 1373 | }), | ||
| 1374 | }; | ||
| 1375 | pub const ck803fhr3 = CpuModel{ | ||
| 1376 | .name = "ck803fhr3", | ||
| 1377 | .llvm_name = "ck803fhr3", | ||
| 1378 | .features = featureSet(&[_]Feature{ | ||
| 1379 | .@"3e3r2", | ||
| 1380 | .@"3e3r3", | ||
| 1381 | .btst16, | ||
| 1382 | .ck803, | ||
| 1383 | .dspv2, | ||
| 1384 | .float1e3, | ||
| 1385 | .floate1, | ||
| 1386 | .fpuv2_sf, | ||
| 1387 | .hwdiv, | ||
| 1388 | .mp, | ||
| 1389 | .nvic, | ||
| 1390 | .trust, | ||
| 1391 | }), | ||
| 1392 | }; | ||
| 1393 | pub const ck803fr1 = CpuModel{ | ||
| 1394 | .name = "ck803fr1", | ||
| 1395 | .llvm_name = "ck803fr1", | ||
| 1396 | .features = featureSet(&[_]Feature{ | ||
| 1397 | .@"3e3r1", | ||
| 1398 | .@"3e3r3", | ||
| 1399 | .btst16, | ||
| 1400 | .ck803, | ||
| 1401 | .dspv2, | ||
| 1402 | .float1e3, | ||
| 1403 | .floate1, | ||
| 1404 | .fpuv2_sf, | ||
| 1405 | .hwdiv, | ||
| 1406 | .mp, | ||
| 1407 | .nvic, | ||
| 1408 | .trust, | ||
| 1409 | }), | ||
| 1410 | }; | ||
| 1411 | pub const ck803fr2 = CpuModel{ | ||
| 1412 | .name = "ck803fr2", | ||
| 1413 | .llvm_name = "ck803fr2", | ||
| 1414 | .features = featureSet(&[_]Feature{ | ||
| 1415 | .@"3e3r2", | ||
| 1416 | .@"3e3r3", | ||
| 1417 | .btst16, | ||
| 1418 | .ck803, | ||
| 1419 | .dspv2, | ||
| 1420 | .float1e3, | ||
| 1421 | .floate1, | ||
| 1422 | .fpuv2_sf, | ||
| 1423 | .hwdiv, | ||
| 1424 | .mp, | ||
| 1425 | .nvic, | ||
| 1426 | .trust, | ||
| 1427 | }), | ||
| 1428 | }; | ||
| 1429 | pub const ck803fr3 = CpuModel{ | ||
| 1430 | .name = "ck803fr3", | ||
| 1431 | .llvm_name = "ck803fr3", | ||
| 1432 | .features = featureSet(&[_]Feature{ | ||
| 1433 | .@"3e3r2", | ||
| 1434 | .@"3e3r3", | ||
| 1435 | .btst16, | ||
| 1436 | .ck803, | ||
| 1437 | .dspv2, | ||
| 1438 | .float1e3, | ||
| 1439 | .floate1, | ||
| 1440 | .fpuv2_sf, | ||
| 1441 | .hwdiv, | ||
| 1442 | .mp, | ||
| 1443 | .nvic, | ||
| 1444 | .trust, | ||
| 1445 | }), | ||
| 1446 | }; | ||
| 1447 | pub const ck803ft = CpuModel{ | ||
| 1448 | .name = "ck803ft", | ||
| 1449 | .llvm_name = "ck803ft", | ||
| 1450 | .features = featureSet(&[_]Feature{ | ||
| 1451 | .btst16, | ||
| 1452 | .ck803, | ||
| 1453 | .float1e3, | ||
| 1454 | .floate1, | ||
| 1455 | .fpuv2_sf, | ||
| 1456 | .hwdiv, | ||
| 1457 | .mp, | ||
| 1458 | .nvic, | ||
| 1459 | .trust, | ||
| 1460 | }), | ||
| 1461 | }; | ||
| 1462 | pub const ck803ftr1 = CpuModel{ | ||
| 1463 | .name = "ck803ftr1", | ||
| 1464 | .llvm_name = "ck803ftr1", | ||
| 1465 | .features = featureSet(&[_]Feature{ | ||
| 1466 | .@"3e3r1", | ||
| 1467 | .btst16, | ||
| 1468 | .ck803, | ||
| 1469 | .dspv2, | ||
| 1470 | .float1e3, | ||
| 1471 | .floate1, | ||
| 1472 | .fpuv2_sf, | ||
| 1473 | .hwdiv, | ||
| 1474 | .mp, | ||
| 1475 | .nvic, | ||
| 1476 | .trust, | ||
| 1477 | }), | ||
| 1478 | }; | ||
| 1479 | pub const ck803ftr2 = CpuModel{ | ||
| 1480 | .name = "ck803ftr2", | ||
| 1481 | .llvm_name = "ck803ftr2", | ||
| 1482 | .features = featureSet(&[_]Feature{ | ||
| 1483 | .@"3e3r2", | ||
| 1484 | .@"3e3r3", | ||
| 1485 | .btst16, | ||
| 1486 | .ck803, | ||
| 1487 | .dspv2, | ||
| 1488 | .float1e3, | ||
| 1489 | .floate1, | ||
| 1490 | .fpuv2_sf, | ||
| 1491 | .hwdiv, | ||
| 1492 | .mp, | ||
| 1493 | .nvic, | ||
| 1494 | .trust, | ||
| 1495 | }), | ||
| 1496 | }; | ||
| 1497 | pub const ck803ftr3 = CpuModel{ | ||
| 1498 | .name = "ck803ftr3", | ||
| 1499 | .llvm_name = "ck803ftr3", | ||
| 1500 | .features = featureSet(&[_]Feature{ | ||
| 1501 | .@"3e3r2", | ||
| 1502 | .@"3e3r3", | ||
| 1503 | .btst16, | ||
| 1504 | .ck803, | ||
| 1505 | .dspv2, | ||
| 1506 | .float1e3, | ||
| 1507 | .floate1, | ||
| 1508 | .fpuv2_sf, | ||
| 1509 | .hwdiv, | ||
| 1510 | .mp, | ||
| 1511 | .nvic, | ||
| 1512 | .trust, | ||
| 1513 | }), | ||
| 1514 | }; | ||
| 1515 | pub const ck803h = CpuModel{ | ||
| 1516 | .name = "ck803h", | ||
| 1517 | .llvm_name = "ck803h", | ||
| 1518 | .features = featureSet(&[_]Feature{ | ||
| 1519 | .btst16, | ||
| 1520 | .ck803, | ||
| 1521 | .hwdiv, | ||
| 1522 | .mp, | ||
| 1523 | .nvic, | ||
| 1524 | .trust, | ||
| 1525 | }), | ||
| 1526 | }; | ||
| 1527 | pub const ck803hr1 = CpuModel{ | ||
| 1528 | .name = "ck803hr1", | ||
| 1529 | .llvm_name = "ck803hr1", | ||
| 1530 | .features = featureSet(&[_]Feature{ | ||
| 1531 | .@"3e3r1", | ||
| 1532 | .@"3e3r3", | ||
| 1533 | .btst16, | ||
| 1534 | .ck803, | ||
| 1535 | .dspv2, | ||
| 1536 | .hwdiv, | ||
| 1537 | .mp, | ||
| 1538 | .nvic, | ||
| 1539 | .trust, | ||
| 1540 | }), | ||
| 1541 | }; | ||
| 1542 | pub const ck803hr2 = CpuModel{ | ||
| 1543 | .name = "ck803hr2", | ||
| 1544 | .llvm_name = "ck803hr2", | ||
| 1545 | .features = featureSet(&[_]Feature{ | ||
| 1546 | .@"3e3r2", | ||
| 1547 | .@"3e3r3", | ||
| 1548 | .btst16, | ||
| 1549 | .ck803, | ||
| 1550 | .dspv2, | ||
| 1551 | .hwdiv, | ||
| 1552 | .mp, | ||
| 1553 | .nvic, | ||
| 1554 | .trust, | ||
| 1555 | }), | ||
| 1556 | }; | ||
| 1557 | pub const ck803hr3 = CpuModel{ | ||
| 1558 | .name = "ck803hr3", | ||
| 1559 | .llvm_name = "ck803hr3", | ||
| 1560 | .features = featureSet(&[_]Feature{ | ||
| 1561 | .@"3e3r2", | ||
| 1562 | .@"3e3r3", | ||
| 1563 | .btst16, | ||
| 1564 | .ck803, | ||
| 1565 | .dspv2, | ||
| 1566 | .hwdiv, | ||
| 1567 | .mp, | ||
| 1568 | .nvic, | ||
| 1569 | .trust, | ||
| 1570 | }), | ||
| 1571 | }; | ||
| 1572 | pub const ck803ht = CpuModel{ | ||
| 1573 | .name = "ck803ht", | ||
| 1574 | .llvm_name = "ck803ht", | ||
| 1575 | .features = featureSet(&[_]Feature{ | ||
| 1576 | .btst16, | ||
| 1577 | .ck803, | ||
| 1578 | .hwdiv, | ||
| 1579 | .mp, | ||
| 1580 | .nvic, | ||
| 1581 | .trust, | ||
| 1582 | }), | ||
| 1583 | }; | ||
| 1584 | pub const ck803htr1 = CpuModel{ | ||
| 1585 | .name = "ck803htr1", | ||
| 1586 | .llvm_name = "ck803htr1", | ||
| 1587 | .features = featureSet(&[_]Feature{ | ||
| 1588 | .@"3e3r1", | ||
| 1589 | .@"3e3r3", | ||
| 1590 | .btst16, | ||
| 1591 | .ck803, | ||
| 1592 | .dspv2, | ||
| 1593 | .hwdiv, | ||
| 1594 | .mp, | ||
| 1595 | .nvic, | ||
| 1596 | .trust, | ||
| 1597 | }), | ||
| 1598 | }; | ||
| 1599 | pub const ck803htr2 = CpuModel{ | ||
| 1600 | .name = "ck803htr2", | ||
| 1601 | .llvm_name = "ck803htr2", | ||
| 1602 | .features = featureSet(&[_]Feature{ | ||
| 1603 | .@"3e3r2", | ||
| 1604 | .@"3e3r3", | ||
| 1605 | .btst16, | ||
| 1606 | .ck803, | ||
| 1607 | .dspv2, | ||
| 1608 | .hwdiv, | ||
| 1609 | .mp, | ||
| 1610 | .nvic, | ||
| 1611 | .trust, | ||
| 1612 | }), | ||
| 1613 | }; | ||
| 1614 | pub const ck803htr3 = CpuModel{ | ||
| 1615 | .name = "ck803htr3", | ||
| 1616 | .llvm_name = "ck803htr3", | ||
| 1617 | .features = featureSet(&[_]Feature{ | ||
| 1618 | .@"3e3r2", | ||
| 1619 | .@"3e3r3", | ||
| 1620 | .btst16, | ||
| 1621 | .ck803, | ||
| 1622 | .dspv2, | ||
| 1623 | .hwdiv, | ||
| 1624 | .mp, | ||
| 1625 | .nvic, | ||
| 1626 | .trust, | ||
| 1627 | }), | ||
| 1628 | }; | ||
| 1629 | pub const ck803r1 = CpuModel{ | ||
| 1630 | .name = "ck803r1", | ||
| 1631 | .llvm_name = "ck803r1", | ||
| 1632 | .features = featureSet(&[_]Feature{ | ||
| 1633 | .@"3e3r1", | ||
| 1634 | .@"3e3r3", | ||
| 1635 | .btst16, | ||
| 1636 | .ck803, | ||
| 1637 | .dspv2, | ||
| 1638 | .hwdiv, | ||
| 1639 | .mp, | ||
| 1640 | .nvic, | ||
| 1641 | .trust, | ||
| 1642 | }), | ||
| 1643 | }; | ||
| 1644 | pub const ck803r2 = CpuModel{ | ||
| 1645 | .name = "ck803r2", | ||
| 1646 | .llvm_name = "ck803r2", | ||
| 1647 | .features = featureSet(&[_]Feature{ | ||
| 1648 | .@"3e3r2", | ||
| 1649 | .@"3e3r3", | ||
| 1650 | .btst16, | ||
| 1651 | .ck803, | ||
| 1652 | .dspv2, | ||
| 1653 | .hwdiv, | ||
| 1654 | .mp, | ||
| 1655 | .nvic, | ||
| 1656 | .trust, | ||
| 1657 | }), | ||
| 1658 | }; | ||
| 1659 | pub const ck803r3 = CpuModel{ | ||
| 1660 | .name = "ck803r3", | ||
| 1661 | .llvm_name = "ck803r3", | ||
| 1662 | .features = featureSet(&[_]Feature{ | ||
| 1663 | .@"3e3r2", | ||
| 1664 | .@"3e3r3", | ||
| 1665 | .btst16, | ||
| 1666 | .ck803, | ||
| 1667 | .dspv2, | ||
| 1668 | .hwdiv, | ||
| 1669 | .mp, | ||
| 1670 | .nvic, | ||
| 1671 | .trust, | ||
| 1672 | }), | ||
| 1673 | }; | ||
| 1674 | pub const ck803s = CpuModel{ | ||
| 1675 | .name = "ck803s", | ||
| 1676 | .llvm_name = "ck803s", | ||
| 1677 | .features = featureSet(&[_]Feature{ | ||
| 1678 | .@"3e3r1", | ||
| 1679 | .btst16, | ||
| 1680 | .ck803, | ||
| 1681 | .ck803s, | ||
| 1682 | .hwdiv, | ||
| 1683 | .mp, | ||
| 1684 | .nvic, | ||
| 1685 | .trust, | ||
| 1686 | }), | ||
| 1687 | }; | ||
| 1688 | pub const ck803se = CpuModel{ | ||
| 1689 | .name = "ck803se", | ||
| 1690 | .llvm_name = "ck803se", | ||
| 1691 | .features = featureSet(&[_]Feature{ | ||
| 1692 | .@"3e3r1", | ||
| 1693 | .btst16, | ||
| 1694 | .ck803, | ||
| 1695 | .ck803s, | ||
| 1696 | .dsp1e2, | ||
| 1697 | .dspe60, | ||
| 1698 | .edsp, | ||
| 1699 | .hwdiv, | ||
| 1700 | .mp, | ||
| 1701 | .nvic, | ||
| 1702 | .trust, | ||
| 1703 | }), | ||
| 1704 | }; | ||
| 1705 | pub const ck803sef = CpuModel{ | ||
| 1706 | .name = "ck803sef", | ||
| 1707 | .llvm_name = "ck803sef", | ||
| 1708 | .features = featureSet(&[_]Feature{ | ||
| 1709 | .@"3e3r1", | ||
| 1710 | .btst16, | ||
| 1711 | .ck803, | ||
| 1712 | .ck803s, | ||
| 1713 | .dsp1e2, | ||
| 1714 | .dspe60, | ||
| 1715 | .edsp, | ||
| 1716 | .float1e3, | ||
| 1717 | .floate1, | ||
| 1718 | .fpuv2_sf, | ||
| 1719 | .hwdiv, | ||
| 1720 | .mp, | ||
| 1721 | .nvic, | ||
| 1722 | .trust, | ||
| 1723 | }), | ||
| 1724 | }; | ||
| 1725 | pub const ck803sefn = CpuModel{ | ||
| 1726 | .name = "ck803sefn", | ||
| 1727 | .llvm_name = "ck803sefn", | ||
| 1728 | .features = featureSet(&[_]Feature{ | ||
| 1729 | .@"3e3r1", | ||
| 1730 | .btst16, | ||
| 1731 | .ck803, | ||
| 1732 | .ck803s, | ||
| 1733 | .dsp1e2, | ||
| 1734 | .dsp_silan, | ||
| 1735 | .dspe60, | ||
| 1736 | .edsp, | ||
| 1737 | .float1e3, | ||
| 1738 | .floate1, | ||
| 1739 | .fpuv2_sf, | ||
| 1740 | .hwdiv, | ||
| 1741 | .mp, | ||
| 1742 | .nvic, | ||
| 1743 | .trust, | ||
| 1744 | }), | ||
| 1745 | }; | ||
| 1746 | pub const ck803sefnt = CpuModel{ | ||
| 1747 | .name = "ck803sefnt", | ||
| 1748 | .llvm_name = "ck803sefnt", | ||
| 1749 | .features = featureSet(&[_]Feature{ | ||
| 1750 | .@"3e3r1", | ||
| 1751 | .btst16, | ||
| 1752 | .ck803, | ||
| 1753 | .ck803s, | ||
| 1754 | .dsp1e2, | ||
| 1755 | .dsp_silan, | ||
| 1756 | .dspe60, | ||
| 1757 | .edsp, | ||
| 1758 | .float1e3, | ||
| 1759 | .floate1, | ||
| 1760 | .fpuv2_sf, | ||
| 1761 | .hwdiv, | ||
| 1762 | .mp, | ||
| 1763 | .nvic, | ||
| 1764 | .trust, | ||
| 1765 | }), | ||
| 1766 | }; | ||
| 1767 | pub const ck803seft = CpuModel{ | ||
| 1768 | .name = "ck803seft", | ||
| 1769 | .llvm_name = "ck803seft", | ||
| 1770 | .features = featureSet(&[_]Feature{ | ||
| 1771 | .@"3e3r1", | ||
| 1772 | .btst16, | ||
| 1773 | .ck803, | ||
| 1774 | .ck803s, | ||
| 1775 | .dsp1e2, | ||
| 1776 | .dspe60, | ||
| 1777 | .edsp, | ||
| 1778 | .float1e3, | ||
| 1779 | .floate1, | ||
| 1780 | .fpuv2_sf, | ||
| 1781 | .hwdiv, | ||
| 1782 | .mp, | ||
| 1783 | .nvic, | ||
| 1784 | .trust, | ||
| 1785 | }), | ||
| 1786 | }; | ||
| 1787 | pub const ck803sen = CpuModel{ | ||
| 1788 | .name = "ck803sen", | ||
| 1789 | .llvm_name = "ck803sen", | ||
| 1790 | .features = featureSet(&[_]Feature{ | ||
| 1791 | .@"3e3r1", | ||
| 1792 | .btst16, | ||
| 1793 | .ck803, | ||
| 1794 | .ck803s, | ||
| 1795 | .dsp1e2, | ||
| 1796 | .dsp_silan, | ||
| 1797 | .dspe60, | ||
| 1798 | .edsp, | ||
| 1799 | .hwdiv, | ||
| 1800 | .mp, | ||
| 1801 | .nvic, | ||
| 1802 | .trust, | ||
| 1803 | }), | ||
| 1804 | }; | ||
| 1805 | pub const ck803sf = CpuModel{ | ||
| 1806 | .name = "ck803sf", | ||
| 1807 | .llvm_name = "ck803sf", | ||
| 1808 | .features = featureSet(&[_]Feature{ | ||
| 1809 | .@"3e3r1", | ||
| 1810 | .btst16, | ||
| 1811 | .ck803, | ||
| 1812 | .ck803s, | ||
| 1813 | .float1e3, | ||
| 1814 | .floate1, | ||
| 1815 | .fpuv2_sf, | ||
| 1816 | .hwdiv, | ||
| 1817 | .mp, | ||
| 1818 | .nvic, | ||
| 1819 | .trust, | ||
| 1820 | }), | ||
| 1821 | }; | ||
| 1822 | pub const ck803sfn = CpuModel{ | ||
| 1823 | .name = "ck803sfn", | ||
| 1824 | .llvm_name = "ck803sfn", | ||
| 1825 | .features = featureSet(&[_]Feature{ | ||
| 1826 | .@"3e3r1", | ||
| 1827 | .btst16, | ||
| 1828 | .ck803, | ||
| 1829 | .ck803s, | ||
| 1830 | .dsp_silan, | ||
| 1831 | .float1e3, | ||
| 1832 | .floate1, | ||
| 1833 | .fpuv2_sf, | ||
| 1834 | .hwdiv, | ||
| 1835 | .mp, | ||
| 1836 | .nvic, | ||
| 1837 | .trust, | ||
| 1838 | }), | ||
| 1839 | }; | ||
| 1840 | pub const ck803sn = CpuModel{ | ||
| 1841 | .name = "ck803sn", | ||
| 1842 | .llvm_name = "ck803sn", | ||
| 1843 | .features = featureSet(&[_]Feature{ | ||
| 1844 | .@"3e3r1", | ||
| 1845 | .btst16, | ||
| 1846 | .ck803, | ||
| 1847 | .ck803s, | ||
| 1848 | .dsp_silan, | ||
| 1849 | .hwdiv, | ||
| 1850 | .mp, | ||
| 1851 | .nvic, | ||
| 1852 | .trust, | ||
| 1853 | }), | ||
| 1854 | }; | ||
| 1855 | pub const ck803snt = CpuModel{ | ||
| 1856 | .name = "ck803snt", | ||
| 1857 | .llvm_name = "ck803snt", | ||
| 1858 | .features = featureSet(&[_]Feature{ | ||
| 1859 | .@"3e3r1", | ||
| 1860 | .btst16, | ||
| 1861 | .ck803, | ||
| 1862 | .ck803s, | ||
| 1863 | .dsp_silan, | ||
| 1864 | .hwdiv, | ||
| 1865 | .mp, | ||
| 1866 | .nvic, | ||
| 1867 | .trust, | ||
| 1868 | }), | ||
| 1869 | }; | ||
| 1870 | pub const ck803st = CpuModel{ | ||
| 1871 | .name = "ck803st", | ||
| 1872 | .llvm_name = "ck803st", | ||
| 1873 | .features = featureSet(&[_]Feature{ | ||
| 1874 | .@"3e3r1", | ||
| 1875 | .btst16, | ||
| 1876 | .ck803, | ||
| 1877 | .ck803s, | ||
| 1878 | .hwdiv, | ||
| 1879 | .mp, | ||
| 1880 | .nvic, | ||
| 1881 | .trust, | ||
| 1882 | }), | ||
| 1883 | }; | ||
| 1884 | pub const ck803t = CpuModel{ | ||
| 1885 | .name = "ck803t", | ||
| 1886 | .llvm_name = "ck803t", | ||
| 1887 | .features = featureSet(&[_]Feature{ | ||
| 1888 | .btst16, | ||
| 1889 | .ck803, | ||
| 1890 | .hwdiv, | ||
| 1891 | .mp, | ||
| 1892 | .nvic, | ||
| 1893 | .trust, | ||
| 1894 | }), | ||
| 1895 | }; | ||
| 1896 | pub const ck803tr1 = CpuModel{ | ||
| 1897 | .name = "ck803tr1", | ||
| 1898 | .llvm_name = "ck803tr1", | ||
| 1899 | .features = featureSet(&[_]Feature{ | ||
| 1900 | .@"3e3r1", | ||
| 1901 | .@"3e3r3", | ||
| 1902 | .btst16, | ||
| 1903 | .ck803, | ||
| 1904 | .dspv2, | ||
| 1905 | .hwdiv, | ||
| 1906 | .mp, | ||
| 1907 | .nvic, | ||
| 1908 | .trust, | ||
| 1909 | }), | ||
| 1910 | }; | ||
| 1911 | pub const ck803tr2 = CpuModel{ | ||
| 1912 | .name = "ck803tr2", | ||
| 1913 | .llvm_name = "ck803tr2", | ||
| 1914 | .features = featureSet(&[_]Feature{ | ||
| 1915 | .@"3e3r2", | ||
| 1916 | .@"3e3r3", | ||
| 1917 | .btst16, | ||
| 1918 | .ck803, | ||
| 1919 | .dspv2, | ||
| 1920 | .hwdiv, | ||
| 1921 | .mp, | ||
| 1922 | .nvic, | ||
| 1923 | .trust, | ||
| 1924 | }), | ||
| 1925 | }; | ||
| 1926 | pub const ck803tr3 = CpuModel{ | ||
| 1927 | .name = "ck803tr3", | ||
| 1928 | .llvm_name = "ck803tr3", | ||
| 1929 | .features = featureSet(&[_]Feature{ | ||
| 1930 | .@"3e3r2", | ||
| 1931 | .@"3e3r3", | ||
| 1932 | .btst16, | ||
| 1933 | .ck803, | ||
| 1934 | .dspv2, | ||
| 1935 | .hwdiv, | ||
| 1936 | .mp, | ||
| 1937 | .nvic, | ||
| 1938 | .trust, | ||
| 1939 | }), | ||
| 1940 | }; | ||
| 1941 | pub const ck804 = CpuModel{ | ||
| 1942 | .name = "ck804", | ||
| 1943 | .llvm_name = "ck804", | ||
| 1944 | .features = featureSet(&[_]Feature{ | ||
| 1945 | .@"3e3r2", | ||
| 1946 | .@"3e3r3", | ||
| 1947 | .btst16, | ||
| 1948 | .ck803, | ||
| 1949 | .ck804, | ||
| 1950 | .hwdiv, | ||
| 1951 | .mp, | ||
| 1952 | .nvic, | ||
| 1953 | .trust, | ||
| 1954 | }), | ||
| 1955 | }; | ||
| 1956 | pub const ck804e = CpuModel{ | ||
| 1957 | .name = "ck804e", | ||
| 1958 | .llvm_name = "ck804e", | ||
| 1959 | .features = featureSet(&[_]Feature{ | ||
| 1960 | .@"3e3r2", | ||
| 1961 | .@"3e3r3", | ||
| 1962 | .btst16, | ||
| 1963 | .ck803, | ||
| 1964 | .ck804, | ||
| 1965 | .dspv2, | ||
| 1966 | .high_registers, | ||
| 1967 | .hwdiv, | ||
| 1968 | .mp, | ||
| 1969 | .nvic, | ||
| 1970 | .trust, | ||
| 1971 | }), | ||
| 1972 | }; | ||
| 1973 | pub const ck804ef = CpuModel{ | ||
| 1974 | .name = "ck804ef", | ||
| 1975 | .llvm_name = "ck804ef", | ||
| 1976 | .features = featureSet(&[_]Feature{ | ||
| 1977 | .@"3e3r2", | ||
| 1978 | .@"3e3r3", | ||
| 1979 | .btst16, | ||
| 1980 | .ck803, | ||
| 1981 | .ck804, | ||
| 1982 | .dspv2, | ||
| 1983 | .float1e3, | ||
| 1984 | .floate1, | ||
| 1985 | .fpuv2_sf, | ||
| 1986 | .high_registers, | ||
| 1987 | .hwdiv, | ||
| 1988 | .mp, | ||
| 1989 | .nvic, | ||
| 1990 | .trust, | ||
| 1991 | }), | ||
| 1992 | }; | ||
| 1993 | pub const ck804efh = CpuModel{ | ||
| 1994 | .name = "ck804efh", | ||
| 1995 | .llvm_name = "ck804efh", | ||
| 1996 | .features = featureSet(&[_]Feature{ | ||
| 1997 | .@"3e3r2", | ||
| 1998 | .@"3e3r3", | ||
| 1999 | .btst16, | ||
| 2000 | .ck803, | ||
| 2001 | .ck804, | ||
| 2002 | .dspv2, | ||
| 2003 | .float1e3, | ||
| 2004 | .floate1, | ||
| 2005 | .fpuv2_sf, | ||
| 2006 | .high_registers, | ||
| 2007 | .hwdiv, | ||
| 2008 | .mp, | ||
| 2009 | .nvic, | ||
| 2010 | .trust, | ||
| 2011 | }), | ||
| 2012 | }; | ||
| 2013 | pub const ck804efht = CpuModel{ | ||
| 2014 | .name = "ck804efht", | ||
| 2015 | .llvm_name = "ck804efht", | ||
| 2016 | .features = featureSet(&[_]Feature{ | ||
| 2017 | .@"3e3r2", | ||
| 2018 | .@"3e3r3", | ||
| 2019 | .btst16, | ||
| 2020 | .ck803, | ||
| 2021 | .ck804, | ||
| 2022 | .dspv2, | ||
| 2023 | .float1e3, | ||
| 2024 | .floate1, | ||
| 2025 | .fpuv2_sf, | ||
| 2026 | .high_registers, | ||
| 2027 | .hwdiv, | ||
| 2028 | .mp, | ||
| 2029 | .nvic, | ||
| 2030 | .trust, | ||
| 2031 | }), | ||
| 2032 | }; | ||
| 2033 | pub const ck804eft = CpuModel{ | ||
| 2034 | .name = "ck804eft", | ||
| 2035 | .llvm_name = "ck804eft", | ||
| 2036 | .features = featureSet(&[_]Feature{ | ||
| 2037 | .@"3e3r2", | ||
| 2038 | .@"3e3r3", | ||
| 2039 | .btst16, | ||
| 2040 | .ck803, | ||
| 2041 | .ck804, | ||
| 2042 | .dspv2, | ||
| 2043 | .float1e3, | ||
| 2044 | .floate1, | ||
| 2045 | .fpuv2_sf, | ||
| 2046 | .high_registers, | ||
| 2047 | .hwdiv, | ||
| 2048 | .mp, | ||
| 2049 | .nvic, | ||
| 2050 | .trust, | ||
| 2051 | }), | ||
| 2052 | }; | ||
| 2053 | pub const ck804eh = CpuModel{ | ||
| 2054 | .name = "ck804eh", | ||
| 2055 | .llvm_name = "ck804eh", | ||
| 2056 | .features = featureSet(&[_]Feature{ | ||
| 2057 | .@"3e3r2", | ||
| 2058 | .@"3e3r3", | ||
| 2059 | .btst16, | ||
| 2060 | .ck803, | ||
| 2061 | .ck804, | ||
| 2062 | .dspv2, | ||
| 2063 | .high_registers, | ||
| 2064 | .hwdiv, | ||
| 2065 | .mp, | ||
| 2066 | .nvic, | ||
| 2067 | .trust, | ||
| 2068 | }), | ||
| 2069 | }; | ||
| 2070 | pub const ck804eht = CpuModel{ | ||
| 2071 | .name = "ck804eht", | ||
| 2072 | .llvm_name = "ck804eht", | ||
| 2073 | .features = featureSet(&[_]Feature{ | ||
| 2074 | .@"3e3r2", | ||
| 2075 | .@"3e3r3", | ||
| 2076 | .btst16, | ||
| 2077 | .ck803, | ||
| 2078 | .ck804, | ||
| 2079 | .dspv2, | ||
| 2080 | .high_registers, | ||
| 2081 | .hwdiv, | ||
| 2082 | .mp, | ||
| 2083 | .nvic, | ||
| 2084 | .trust, | ||
| 2085 | }), | ||
| 2086 | }; | ||
| 2087 | pub const ck804et = CpuModel{ | ||
| 2088 | .name = "ck804et", | ||
| 2089 | .llvm_name = "ck804et", | ||
| 2090 | .features = featureSet(&[_]Feature{ | ||
| 2091 | .@"3e3r2", | ||
| 2092 | .@"3e3r3", | ||
| 2093 | .btst16, | ||
| 2094 | .ck803, | ||
| 2095 | .ck804, | ||
| 2096 | .dspv2, | ||
| 2097 | .high_registers, | ||
| 2098 | .hwdiv, | ||
| 2099 | .mp, | ||
| 2100 | .nvic, | ||
| 2101 | .trust, | ||
| 2102 | }), | ||
| 2103 | }; | ||
| 2104 | pub const ck804f = CpuModel{ | ||
| 2105 | .name = "ck804f", | ||
| 2106 | .llvm_name = "ck804f", | ||
| 2107 | .features = featureSet(&[_]Feature{ | ||
| 2108 | .@"3e3r2", | ||
| 2109 | .@"3e3r3", | ||
| 2110 | .btst16, | ||
| 2111 | .ck803, | ||
| 2112 | .ck804, | ||
| 2113 | .float1e3, | ||
| 2114 | .floate1, | ||
| 2115 | .fpuv2_sf, | ||
| 2116 | .hwdiv, | ||
| 2117 | .mp, | ||
| 2118 | .nvic, | ||
| 2119 | .trust, | ||
| 2120 | }), | ||
| 2121 | }; | ||
| 2122 | pub const ck804fh = CpuModel{ | ||
| 2123 | .name = "ck804fh", | ||
| 2124 | .llvm_name = "ck804fh", | ||
| 2125 | .features = featureSet(&[_]Feature{ | ||
| 2126 | .@"3e3r2", | ||
| 2127 | .@"3e3r3", | ||
| 2128 | .btst16, | ||
| 2129 | .ck803, | ||
| 2130 | .ck804, | ||
| 2131 | .float1e3, | ||
| 2132 | .floate1, | ||
| 2133 | .fpuv2_sf, | ||
| 2134 | .hwdiv, | ||
| 2135 | .mp, | ||
| 2136 | .nvic, | ||
| 2137 | .trust, | ||
| 2138 | }), | ||
| 2139 | }; | ||
| 2140 | pub const ck804ft = CpuModel{ | ||
| 2141 | .name = "ck804ft", | ||
| 2142 | .llvm_name = "ck804ft", | ||
| 2143 | .features = featureSet(&[_]Feature{ | ||
| 2144 | .@"3e3r2", | ||
| 2145 | .@"3e3r3", | ||
| 2146 | .btst16, | ||
| 2147 | .ck803, | ||
| 2148 | .ck804, | ||
| 2149 | .float1e3, | ||
| 2150 | .floate1, | ||
| 2151 | .fpuv2_sf, | ||
| 2152 | .hwdiv, | ||
| 2153 | .mp, | ||
| 2154 | .nvic, | ||
| 2155 | .trust, | ||
| 2156 | }), | ||
| 2157 | }; | ||
| 2158 | pub const ck804h = CpuModel{ | ||
| 2159 | .name = "ck804h", | ||
| 2160 | .llvm_name = "ck804h", | ||
| 2161 | .features = featureSet(&[_]Feature{ | ||
| 2162 | .@"3e3r2", | ||
| 2163 | .@"3e3r3", | ||
| 2164 | .btst16, | ||
| 2165 | .ck803, | ||
| 2166 | .ck804, | ||
| 2167 | .hwdiv, | ||
| 2168 | .mp, | ||
| 2169 | .nvic, | ||
| 2170 | .trust, | ||
| 2171 | }), | ||
| 2172 | }; | ||
| 2173 | pub const ck804ht = CpuModel{ | ||
| 2174 | .name = "ck804ht", | ||
| 2175 | .llvm_name = "ck804ht", | ||
| 2176 | .features = featureSet(&[_]Feature{ | ||
| 2177 | .@"3e3r2", | ||
| 2178 | .@"3e3r3", | ||
| 2179 | .btst16, | ||
| 2180 | .ck803, | ||
| 2181 | .ck804, | ||
| 2182 | .hwdiv, | ||
| 2183 | .mp, | ||
| 2184 | .nvic, | ||
| 2185 | .trust, | ||
| 2186 | }), | ||
| 2187 | }; | ||
| 2188 | pub const ck804t = CpuModel{ | ||
| 2189 | .name = "ck804t", | ||
| 2190 | .llvm_name = "ck804t", | ||
| 2191 | .features = featureSet(&[_]Feature{ | ||
| 2192 | .@"3e3r2", | ||
| 2193 | .@"3e3r3", | ||
| 2194 | .btst16, | ||
| 2195 | .ck803, | ||
| 2196 | .ck804, | ||
| 2197 | .hwdiv, | ||
| 2198 | .mp, | ||
| 2199 | .nvic, | ||
| 2200 | .trust, | ||
| 2201 | }), | ||
| 2202 | }; | ||
| 2203 | pub const ck805 = CpuModel{ | ||
| 2204 | .name = "ck805", | ||
| 2205 | .llvm_name = "ck805", | ||
| 2206 | .features = featureSet(&[_]Feature{ | ||
| 2207 | .@"3e3r2", | ||
| 2208 | .@"3e3r3", | ||
| 2209 | .btst16, | ||
| 2210 | .ck803, | ||
| 2211 | .ck805, | ||
| 2212 | .high_registers, | ||
| 2213 | .hwdiv, | ||
| 2214 | .mp, | ||
| 2215 | .nvic, | ||
| 2216 | .trust, | ||
| 2217 | .vdsp2e3, | ||
| 2218 | .vdspv2, | ||
| 2219 | }), | ||
| 2220 | }; | ||
| 2221 | pub const ck805e = CpuModel{ | ||
| 2222 | .name = "ck805e", | ||
| 2223 | .llvm_name = "ck805e", | ||
| 2224 | .features = featureSet(&[_]Feature{ | ||
| 2225 | .@"3e3r2", | ||
| 2226 | .@"3e3r3", | ||
| 2227 | .btst16, | ||
| 2228 | .ck803, | ||
| 2229 | .ck805, | ||
| 2230 | .dspv2, | ||
| 2231 | .high_registers, | ||
| 2232 | .hwdiv, | ||
| 2233 | .mp, | ||
| 2234 | .nvic, | ||
| 2235 | .trust, | ||
| 2236 | .vdsp2e3, | ||
| 2237 | .vdspv2, | ||
| 2238 | }), | ||
| 2239 | }; | ||
| 2240 | pub const ck805ef = CpuModel{ | ||
| 2241 | .name = "ck805ef", | ||
| 2242 | .llvm_name = "ck805ef", | ||
| 2243 | .features = featureSet(&[_]Feature{ | ||
| 2244 | .@"3e3r2", | ||
| 2245 | .@"3e3r3", | ||
| 2246 | .btst16, | ||
| 2247 | .ck803, | ||
| 2248 | .ck805, | ||
| 2249 | .dspv2, | ||
| 2250 | .float1e3, | ||
| 2251 | .floate1, | ||
| 2252 | .fpuv2_sf, | ||
| 2253 | .high_registers, | ||
| 2254 | .hwdiv, | ||
| 2255 | .mp, | ||
| 2256 | .nvic, | ||
| 2257 | .trust, | ||
| 2258 | .vdsp2e3, | ||
| 2259 | .vdspv2, | ||
| 2260 | }), | ||
| 2261 | }; | ||
| 2262 | pub const ck805eft = CpuModel{ | ||
| 2263 | .name = "ck805eft", | ||
| 2264 | .llvm_name = "ck805eft", | ||
| 2265 | .features = featureSet(&[_]Feature{ | ||
| 2266 | .@"3e3r2", | ||
| 2267 | .@"3e3r3", | ||
| 2268 | .btst16, | ||
| 2269 | .ck803, | ||
| 2270 | .ck805, | ||
| 2271 | .dspv2, | ||
| 2272 | .float1e3, | ||
| 2273 | .floate1, | ||
| 2274 | .fpuv2_sf, | ||
| 2275 | .high_registers, | ||
| 2276 | .hwdiv, | ||
| 2277 | .mp, | ||
| 2278 | .nvic, | ||
| 2279 | .trust, | ||
| 2280 | .vdsp2e3, | ||
| 2281 | .vdspv2, | ||
| 2282 | }), | ||
| 2283 | }; | ||
| 2284 | pub const ck805et = CpuModel{ | ||
| 2285 | .name = "ck805et", | ||
| 2286 | .llvm_name = "ck805et", | ||
| 2287 | .features = featureSet(&[_]Feature{ | ||
| 2288 | .@"3e3r2", | ||
| 2289 | .@"3e3r3", | ||
| 2290 | .btst16, | ||
| 2291 | .ck803, | ||
| 2292 | .ck805, | ||
| 2293 | .dspv2, | ||
| 2294 | .high_registers, | ||
| 2295 | .hwdiv, | ||
| 2296 | .mp, | ||
| 2297 | .nvic, | ||
| 2298 | .trust, | ||
| 2299 | .vdsp2e3, | ||
| 2300 | .vdspv2, | ||
| 2301 | }), | ||
| 2302 | }; | ||
| 2303 | pub const ck805f = CpuModel{ | ||
| 2304 | .name = "ck805f", | ||
| 2305 | .llvm_name = "ck805f", | ||
| 2306 | .features = featureSet(&[_]Feature{ | ||
| 2307 | .@"3e3r2", | ||
| 2308 | .@"3e3r3", | ||
| 2309 | .btst16, | ||
| 2310 | .ck803, | ||
| 2311 | .ck805, | ||
| 2312 | .float1e3, | ||
| 2313 | .floate1, | ||
| 2314 | .fpuv2_sf, | ||
| 2315 | .high_registers, | ||
| 2316 | .hwdiv, | ||
| 2317 | .mp, | ||
| 2318 | .nvic, | ||
| 2319 | .trust, | ||
| 2320 | .vdsp2e3, | ||
| 2321 | .vdspv2, | ||
| 2322 | }), | ||
| 2323 | }; | ||
| 2324 | pub const ck805ft = CpuModel{ | ||
| 2325 | .name = "ck805ft", | ||
| 2326 | .llvm_name = "ck805ft", | ||
| 2327 | .features = featureSet(&[_]Feature{ | ||
| 2328 | .@"3e3r2", | ||
| 2329 | .@"3e3r3", | ||
| 2330 | .btst16, | ||
| 2331 | .ck803, | ||
| 2332 | .ck805, | ||
| 2333 | .float1e3, | ||
| 2334 | .floate1, | ||
| 2335 | .fpuv2_sf, | ||
| 2336 | .high_registers, | ||
| 2337 | .hwdiv, | ||
| 2338 | .mp, | ||
| 2339 | .nvic, | ||
| 2340 | .trust, | ||
| 2341 | .vdsp2e3, | ||
| 2342 | .vdspv2, | ||
| 2343 | }), | ||
| 2344 | }; | ||
| 2345 | pub const ck805t = CpuModel{ | ||
| 2346 | .name = "ck805t", | ||
| 2347 | .llvm_name = "ck805t", | ||
| 2348 | .features = featureSet(&[_]Feature{ | ||
| 2349 | .@"3e3r2", | ||
| 2350 | .@"3e3r3", | ||
| 2351 | .btst16, | ||
| 2352 | .ck803, | ||
| 2353 | .ck805, | ||
| 2354 | .high_registers, | ||
| 2355 | .hwdiv, | ||
| 2356 | .mp, | ||
| 2357 | .nvic, | ||
| 2358 | .trust, | ||
| 2359 | .vdsp2e3, | ||
| 2360 | .vdspv2, | ||
| 2361 | }), | ||
| 2362 | }; | ||
| 2363 | pub const ck807 = CpuModel{ | ||
| 2364 | .name = "ck807", | ||
| 2365 | .llvm_name = "ck807", | ||
| 2366 | .features = featureSet(&[_]Feature{ | ||
| 2367 | .cache, | ||
| 2368 | .ck807, | ||
| 2369 | .dsp1e2, | ||
| 2370 | .dspe60, | ||
| 2371 | .edsp, | ||
| 2372 | .hard_tp, | ||
| 2373 | .high_registers, | ||
| 2374 | .hwdiv, | ||
| 2375 | .mp, | ||
| 2376 | .mp1e2, | ||
| 2377 | .nvic, | ||
| 2378 | .trust, | ||
| 2379 | }), | ||
| 2380 | }; | ||
| 2381 | pub const ck807e = CpuModel{ | ||
| 2382 | .name = "ck807e", | ||
| 2383 | .llvm_name = "ck807e", | ||
| 2384 | .features = featureSet(&[_]Feature{ | ||
| 2385 | .cache, | ||
| 2386 | .ck807, | ||
| 2387 | .dsp1e2, | ||
| 2388 | .dspe60, | ||
| 2389 | .edsp, | ||
| 2390 | .hard_tp, | ||
| 2391 | .high_registers, | ||
| 2392 | .hwdiv, | ||
| 2393 | .mp, | ||
| 2394 | .mp1e2, | ||
| 2395 | .nvic, | ||
| 2396 | .trust, | ||
| 2397 | }), | ||
| 2398 | }; | ||
| 2399 | pub const ck807ef = CpuModel{ | ||
| 2400 | .name = "ck807ef", | ||
| 2401 | .llvm_name = "ck807ef", | ||
| 2402 | .features = featureSet(&[_]Feature{ | ||
| 2403 | .cache, | ||
| 2404 | .ck807, | ||
| 2405 | .dsp1e2, | ||
| 2406 | .dspe60, | ||
| 2407 | .edsp, | ||
| 2408 | .fdivdu, | ||
| 2409 | .float1e2, | ||
| 2410 | .float1e3, | ||
| 2411 | .float3e4, | ||
| 2412 | .floate1, | ||
| 2413 | .fpuv2_df, | ||
| 2414 | .fpuv2_sf, | ||
| 2415 | .hard_tp, | ||
| 2416 | .high_registers, | ||
| 2417 | .hwdiv, | ||
| 2418 | .mp, | ||
| 2419 | .mp1e2, | ||
| 2420 | .nvic, | ||
| 2421 | .trust, | ||
| 2422 | }), | ||
| 2423 | }; | ||
| 2424 | pub const ck807f = CpuModel{ | ||
| 2425 | .name = "ck807f", | ||
| 2426 | .llvm_name = "ck807f", | ||
| 2427 | .features = featureSet(&[_]Feature{ | ||
| 2428 | .cache, | ||
| 2429 | .ck807, | ||
| 2430 | .dsp1e2, | ||
| 2431 | .dspe60, | ||
| 2432 | .edsp, | ||
| 2433 | .fdivdu, | ||
| 2434 | .float1e2, | ||
| 2435 | .float1e3, | ||
| 2436 | .float3e4, | ||
| 2437 | .floate1, | ||
| 2438 | .fpuv2_df, | ||
| 2439 | .fpuv2_sf, | ||
| 2440 | .hard_tp, | ||
| 2441 | .high_registers, | ||
| 2442 | .hwdiv, | ||
| 2443 | .mp, | ||
| 2444 | .mp1e2, | ||
| 2445 | .nvic, | ||
| 2446 | .trust, | ||
| 2447 | }), | ||
| 2448 | }; | ||
| 2449 | pub const ck810 = CpuModel{ | ||
| 2450 | .name = "ck810", | ||
| 2451 | .llvm_name = "ck810", | ||
| 2452 | .features = featureSet(&[_]Feature{ | ||
| 2453 | .@"7e10", | ||
| 2454 | .cache, | ||
| 2455 | .ck810, | ||
| 2456 | .dsp1e2, | ||
| 2457 | .dspe60, | ||
| 2458 | .edsp, | ||
| 2459 | .hard_tp, | ||
| 2460 | .high_registers, | ||
| 2461 | .hwdiv, | ||
| 2462 | .mp, | ||
| 2463 | .mp1e2, | ||
| 2464 | .nvic, | ||
| 2465 | .trust, | ||
| 2466 | }), | ||
| 2467 | }; | ||
| 2468 | pub const ck810e = CpuModel{ | ||
| 2469 | .name = "ck810e", | ||
| 2470 | .llvm_name = "ck810e", | ||
| 2471 | .features = featureSet(&[_]Feature{ | ||
| 2472 | .@"7e10", | ||
| 2473 | .cache, | ||
| 2474 | .ck810, | ||
| 2475 | .dsp1e2, | ||
| 2476 | .dspe60, | ||
| 2477 | .edsp, | ||
| 2478 | .hard_tp, | ||
| 2479 | .high_registers, | ||
| 2480 | .hwdiv, | ||
| 2481 | .mp, | ||
| 2482 | .mp1e2, | ||
| 2483 | .nvic, | ||
| 2484 | .trust, | ||
| 2485 | }), | ||
| 2486 | }; | ||
| 2487 | pub const ck810ef = CpuModel{ | ||
| 2488 | .name = "ck810ef", | ||
| 2489 | .llvm_name = "ck810ef", | ||
| 2490 | .features = featureSet(&[_]Feature{ | ||
| 2491 | .@"7e10", | ||
| 2492 | .cache, | ||
| 2493 | .ck810, | ||
| 2494 | .dsp1e2, | ||
| 2495 | .dspe60, | ||
| 2496 | .edsp, | ||
| 2497 | .fdivdu, | ||
| 2498 | .float1e2, | ||
| 2499 | .floate1, | ||
| 2500 | .fpuv2_df, | ||
| 2501 | .fpuv2_sf, | ||
| 2502 | .hard_tp, | ||
| 2503 | .high_registers, | ||
| 2504 | .hwdiv, | ||
| 2505 | .mp, | ||
| 2506 | .mp1e2, | ||
| 2507 | .nvic, | ||
| 2508 | .trust, | ||
| 2509 | }), | ||
| 2510 | }; | ||
| 2511 | pub const ck810eft = CpuModel{ | ||
| 2512 | .name = "ck810eft", | ||
| 2513 | .llvm_name = "ck810eft", | ||
| 2514 | .features = featureSet(&[_]Feature{ | ||
| 2515 | .@"7e10", | ||
| 2516 | .cache, | ||
| 2517 | .ck810, | ||
| 2518 | .dsp1e2, | ||
| 2519 | .dspe60, | ||
| 2520 | .edsp, | ||
| 2521 | .fdivdu, | ||
| 2522 | .float1e2, | ||
| 2523 | .floate1, | ||
| 2524 | .fpuv2_df, | ||
| 2525 | .fpuv2_sf, | ||
| 2526 | .hard_tp, | ||
| 2527 | .high_registers, | ||
| 2528 | .hwdiv, | ||
| 2529 | .mp, | ||
| 2530 | .mp1e2, | ||
| 2531 | .nvic, | ||
| 2532 | .trust, | ||
| 2533 | }), | ||
| 2534 | }; | ||
| 2535 | pub const ck810eftv = CpuModel{ | ||
| 2536 | .name = "ck810eftv", | ||
| 2537 | .llvm_name = "ck810eftv", | ||
| 2538 | .features = featureSet(&[_]Feature{ | ||
| 2539 | .@"7e10", | ||
| 2540 | .cache, | ||
| 2541 | .ck810, | ||
| 2542 | .ck810v, | ||
| 2543 | .dsp1e2, | ||
| 2544 | .dspe60, | ||
| 2545 | .edsp, | ||
| 2546 | .fdivdu, | ||
| 2547 | .float1e2, | ||
| 2548 | .floate1, | ||
| 2549 | .fpuv2_df, | ||
| 2550 | .fpuv2_sf, | ||
| 2551 | .hard_tp, | ||
| 2552 | .high_registers, | ||
| 2553 | .hwdiv, | ||
| 2554 | .mp, | ||
| 2555 | .mp1e2, | ||
| 2556 | .nvic, | ||
| 2557 | .trust, | ||
| 2558 | .vdspv1, | ||
| 2559 | }), | ||
| 2560 | }; | ||
| 2561 | pub const ck810efv = CpuModel{ | ||
| 2562 | .name = "ck810efv", | ||
| 2563 | .llvm_name = "ck810efv", | ||
| 2564 | .features = featureSet(&[_]Feature{ | ||
| 2565 | .@"7e10", | ||
| 2566 | .cache, | ||
| 2567 | .ck810, | ||
| 2568 | .ck810v, | ||
| 2569 | .dsp1e2, | ||
| 2570 | .dspe60, | ||
| 2571 | .edsp, | ||
| 2572 | .fdivdu, | ||
| 2573 | .float1e2, | ||
| 2574 | .floate1, | ||
| 2575 | .fpuv2_df, | ||
| 2576 | .fpuv2_sf, | ||
| 2577 | .hard_tp, | ||
| 2578 | .high_registers, | ||
| 2579 | .hwdiv, | ||
| 2580 | .mp, | ||
| 2581 | .mp1e2, | ||
| 2582 | .nvic, | ||
| 2583 | .trust, | ||
| 2584 | .vdspv1, | ||
| 2585 | }), | ||
| 2586 | }; | ||
| 2587 | pub const ck810et = CpuModel{ | ||
| 2588 | .name = "ck810et", | ||
| 2589 | .llvm_name = "ck810et", | ||
| 2590 | .features = featureSet(&[_]Feature{ | ||
| 2591 | .@"7e10", | ||
| 2592 | .cache, | ||
| 2593 | .ck810, | ||
| 2594 | .dsp1e2, | ||
| 2595 | .dspe60, | ||
| 2596 | .edsp, | ||
| 2597 | .hard_tp, | ||
| 2598 | .high_registers, | ||
| 2599 | .hwdiv, | ||
| 2600 | .mp, | ||
| 2601 | .mp1e2, | ||
| 2602 | .nvic, | ||
| 2603 | .trust, | ||
| 2604 | }), | ||
| 2605 | }; | ||
| 2606 | pub const ck810etv = CpuModel{ | ||
| 2607 | .name = "ck810etv", | ||
| 2608 | .llvm_name = "ck810etv", | ||
| 2609 | .features = featureSet(&[_]Feature{ | ||
| 2610 | .@"7e10", | ||
| 2611 | .cache, | ||
| 2612 | .ck810, | ||
| 2613 | .ck810v, | ||
| 2614 | .dsp1e2, | ||
| 2615 | .dspe60, | ||
| 2616 | .edsp, | ||
| 2617 | .hard_tp, | ||
| 2618 | .high_registers, | ||
| 2619 | .hwdiv, | ||
| 2620 | .mp, | ||
| 2621 | .mp1e2, | ||
| 2622 | .nvic, | ||
| 2623 | .trust, | ||
| 2624 | .vdspv1, | ||
| 2625 | }), | ||
| 2626 | }; | ||
| 2627 | pub const ck810ev = CpuModel{ | ||
| 2628 | .name = "ck810ev", | ||
| 2629 | .llvm_name = "ck810ev", | ||
| 2630 | .features = featureSet(&[_]Feature{ | ||
| 2631 | .@"7e10", | ||
| 2632 | .cache, | ||
| 2633 | .ck810, | ||
| 2634 | .ck810v, | ||
| 2635 | .dsp1e2, | ||
| 2636 | .dspe60, | ||
| 2637 | .edsp, | ||
| 2638 | .hard_tp, | ||
| 2639 | .high_registers, | ||
| 2640 | .hwdiv, | ||
| 2641 | .mp, | ||
| 2642 | .mp1e2, | ||
| 2643 | .nvic, | ||
| 2644 | .trust, | ||
| 2645 | .vdspv1, | ||
| 2646 | }), | ||
| 2647 | }; | ||
| 2648 | pub const ck810f = CpuModel{ | ||
| 2649 | .name = "ck810f", | ||
| 2650 | .llvm_name = "ck810f", | ||
| 2651 | .features = featureSet(&[_]Feature{ | ||
| 2652 | .@"7e10", | ||
| 2653 | .cache, | ||
| 2654 | .ck810, | ||
| 2655 | .dsp1e2, | ||
| 2656 | .dspe60, | ||
| 2657 | .edsp, | ||
| 2658 | .fdivdu, | ||
| 2659 | .float1e2, | ||
| 2660 | .floate1, | ||
| 2661 | .fpuv2_df, | ||
| 2662 | .fpuv2_sf, | ||
| 2663 | .hard_tp, | ||
| 2664 | .high_registers, | ||
| 2665 | .hwdiv, | ||
| 2666 | .mp, | ||
| 2667 | .mp1e2, | ||
| 2668 | .nvic, | ||
| 2669 | .trust, | ||
| 2670 | }), | ||
| 2671 | }; | ||
| 2672 | pub const ck810ft = CpuModel{ | ||
| 2673 | .name = "ck810ft", | ||
| 2674 | .llvm_name = "ck810ft", | ||
| 2675 | .features = featureSet(&[_]Feature{ | ||
| 2676 | .@"7e10", | ||
| 2677 | .cache, | ||
| 2678 | .ck810, | ||
| 2679 | .dsp1e2, | ||
| 2680 | .dspe60, | ||
| 2681 | .edsp, | ||
| 2682 | .fdivdu, | ||
| 2683 | .float1e2, | ||
| 2684 | .floate1, | ||
| 2685 | .fpuv2_df, | ||
| 2686 | .fpuv2_sf, | ||
| 2687 | .hard_tp, | ||
| 2688 | .high_registers, | ||
| 2689 | .hwdiv, | ||
| 2690 | .mp, | ||
| 2691 | .mp1e2, | ||
| 2692 | .nvic, | ||
| 2693 | .trust, | ||
| 2694 | }), | ||
| 2695 | }; | ||
| 2696 | pub const ck810ftv = CpuModel{ | ||
| 2697 | .name = "ck810ftv", | ||
| 2698 | .llvm_name = "ck810ftv", | ||
| 2699 | .features = featureSet(&[_]Feature{ | ||
| 2700 | .@"7e10", | ||
| 2701 | .cache, | ||
| 2702 | .ck810, | ||
| 2703 | .ck810v, | ||
| 2704 | .dsp1e2, | ||
| 2705 | .dspe60, | ||
| 2706 | .edsp, | ||
| 2707 | .fdivdu, | ||
| 2708 | .float1e2, | ||
| 2709 | .floate1, | ||
| 2710 | .fpuv2_df, | ||
| 2711 | .fpuv2_sf, | ||
| 2712 | .hard_tp, | ||
| 2713 | .high_registers, | ||
| 2714 | .hwdiv, | ||
| 2715 | .mp, | ||
| 2716 | .mp1e2, | ||
| 2717 | .nvic, | ||
| 2718 | .trust, | ||
| 2719 | .vdspv1, | ||
| 2720 | }), | ||
| 2721 | }; | ||
| 2722 | pub const ck810fv = CpuModel{ | ||
| 2723 | .name = "ck810fv", | ||
| 2724 | .llvm_name = "ck810fv", | ||
| 2725 | .features = featureSet(&[_]Feature{ | ||
| 2726 | .@"7e10", | ||
| 2727 | .cache, | ||
| 2728 | .ck810, | ||
| 2729 | .ck810v, | ||
| 2730 | .dsp1e2, | ||
| 2731 | .dspe60, | ||
| 2732 | .edsp, | ||
| 2733 | .fdivdu, | ||
| 2734 | .float1e2, | ||
| 2735 | .floate1, | ||
| 2736 | .fpuv2_df, | ||
| 2737 | .fpuv2_sf, | ||
| 2738 | .hard_tp, | ||
| 2739 | .high_registers, | ||
| 2740 | .hwdiv, | ||
| 2741 | .mp, | ||
| 2742 | .mp1e2, | ||
| 2743 | .nvic, | ||
| 2744 | .trust, | ||
| 2745 | .vdspv1, | ||
| 2746 | }), | ||
| 2747 | }; | ||
| 2748 | pub const ck810t = CpuModel{ | ||
| 2749 | .name = "ck810t", | ||
| 2750 | .llvm_name = "ck810t", | ||
| 2751 | .features = featureSet(&[_]Feature{ | ||
| 2752 | .@"7e10", | ||
| 2753 | .cache, | ||
| 2754 | .ck810, | ||
| 2755 | .dsp1e2, | ||
| 2756 | .dspe60, | ||
| 2757 | .edsp, | ||
| 2758 | .hard_tp, | ||
| 2759 | .high_registers, | ||
| 2760 | .hwdiv, | ||
| 2761 | .mp, | ||
| 2762 | .mp1e2, | ||
| 2763 | .nvic, | ||
| 2764 | .trust, | ||
| 2765 | }), | ||
| 2766 | }; | ||
| 2767 | pub const ck810tv = CpuModel{ | ||
| 2768 | .name = "ck810tv", | ||
| 2769 | .llvm_name = "ck810tv", | ||
| 2770 | .features = featureSet(&[_]Feature{ | ||
| 2771 | .@"7e10", | ||
| 2772 | .cache, | ||
| 2773 | .ck810, | ||
| 2774 | .ck810v, | ||
| 2775 | .dsp1e2, | ||
| 2776 | .dspe60, | ||
| 2777 | .edsp, | ||
| 2778 | .hard_tp, | ||
| 2779 | .high_registers, | ||
| 2780 | .hwdiv, | ||
| 2781 | .mp, | ||
| 2782 | .mp1e2, | ||
| 2783 | .nvic, | ||
| 2784 | .trust, | ||
| 2785 | .vdspv1, | ||
| 2786 | }), | ||
| 2787 | }; | ||
| 2788 | pub const ck810v = CpuModel{ | ||
| 2789 | .name = "ck810v", | ||
| 2790 | .llvm_name = "ck810v", | ||
| 2791 | .features = featureSet(&[_]Feature{ | ||
| 2792 | .@"7e10", | ||
| 2793 | .cache, | ||
| 2794 | .ck810, | ||
| 2795 | .ck810v, | ||
| 2796 | .dsp1e2, | ||
| 2797 | .dspe60, | ||
| 2798 | .edsp, | ||
| 2799 | .hard_tp, | ||
| 2800 | .high_registers, | ||
| 2801 | .hwdiv, | ||
| 2802 | .mp, | ||
| 2803 | .mp1e2, | ||
| 2804 | .nvic, | ||
| 2805 | .trust, | ||
| 2806 | .vdspv1, | ||
| 2807 | }), | ||
| 2808 | }; | ||
| 2809 | pub const ck860 = CpuModel{ | ||
| 2810 | .name = "ck860", | ||
| 2811 | .llvm_name = "ck860", | ||
| 2812 | .features = featureSet(&[_]Feature{ | ||
| 2813 | .@"10e60", | ||
| 2814 | .@"3e3r2", | ||
| 2815 | .@"3e3r3", | ||
| 2816 | .btst16, | ||
| 2817 | .cache, | ||
| 2818 | .ck860, | ||
| 2819 | .dspe60, | ||
| 2820 | .hard_tp, | ||
| 2821 | .high_registers, | ||
| 2822 | .hwdiv, | ||
| 2823 | .mp, | ||
| 2824 | .mp1e2, | ||
| 2825 | .nvic, | ||
| 2826 | .trust, | ||
| 2827 | }), | ||
| 2828 | }; | ||
| 2829 | pub const ck860f = CpuModel{ | ||
| 2830 | .name = "ck860f", | ||
| 2831 | .llvm_name = "ck860f", | ||
| 2832 | .features = featureSet(&[_]Feature{ | ||
| 2833 | .@"10e60", | ||
| 2834 | .@"3e3r2", | ||
| 2835 | .@"3e3r3", | ||
| 2836 | .btst16, | ||
| 2837 | .cache, | ||
| 2838 | .ck860, | ||
| 2839 | .dspe60, | ||
| 2840 | .float7e60, | ||
| 2841 | .fpuv3_df, | ||
| 2842 | .fpuv3_hf, | ||
| 2843 | .fpuv3_hi, | ||
| 2844 | .fpuv3_sf, | ||
| 2845 | .hard_tp, | ||
| 2846 | .high_registers, | ||
| 2847 | .hwdiv, | ||
| 2848 | .mp, | ||
| 2849 | .mp1e2, | ||
| 2850 | .nvic, | ||
| 2851 | .trust, | ||
| 2852 | }), | ||
| 2853 | }; | ||
| 2854 | pub const ck860fv = CpuModel{ | ||
| 2855 | .name = "ck860fv", | ||
| 2856 | .llvm_name = "ck860fv", | ||
| 2857 | .features = featureSet(&[_]Feature{ | ||
| 2858 | .@"10e60", | ||
| 2859 | .@"3e3r2", | ||
| 2860 | .@"3e3r3", | ||
| 2861 | .btst16, | ||
| 2862 | .cache, | ||
| 2863 | .ck860, | ||
| 2864 | .ck860v, | ||
| 2865 | .dspe60, | ||
| 2866 | .float7e60, | ||
| 2867 | .fpuv3_df, | ||
| 2868 | .fpuv3_hf, | ||
| 2869 | .fpuv3_hi, | ||
| 2870 | .fpuv3_sf, | ||
| 2871 | .hard_tp, | ||
| 2872 | .high_registers, | ||
| 2873 | .hwdiv, | ||
| 2874 | .mp, | ||
| 2875 | .mp1e2, | ||
| 2876 | .nvic, | ||
| 2877 | .trust, | ||
| 2878 | .vdsp2e60f, | ||
| 2879 | .vdspv2, | ||
| 2880 | }), | ||
| 2881 | }; | ||
| 2882 | pub const ck860v = CpuModel{ | ||
| 2883 | .name = "ck860v", | ||
| 2884 | .llvm_name = "ck860v", | ||
| 2885 | .features = featureSet(&[_]Feature{ | ||
| 2886 | .@"10e60", | ||
| 2887 | .@"3e3r2", | ||
| 2888 | .@"3e3r3", | ||
| 2889 | .btst16, | ||
| 2890 | .cache, | ||
| 2891 | .ck860, | ||
| 2892 | .ck860v, | ||
| 2893 | .dspe60, | ||
| 2894 | .hard_tp, | ||
| 2895 | .high_registers, | ||
| 2896 | .hwdiv, | ||
| 2897 | .mp, | ||
| 2898 | .mp1e2, | ||
| 2899 | .nvic, | ||
| 2900 | .trust, | ||
| 2901 | .vdsp2e60f, | ||
| 2902 | .vdspv2, | ||
| 2903 | }), | ||
| 2904 | }; | ||
| 2905 | pub const e801 = CpuModel{ | ||
| 2906 | .name = "e801", | ||
| 2907 | .llvm_name = "e801", | ||
| 2908 | .features = featureSet(&[_]Feature{ | ||
| 2909 | .btst16, | ||
| 2910 | .ck801, | ||
| 2911 | .e1, | ||
| 2912 | .trust, | ||
| 2913 | }), | ||
| 2914 | }; | ||
| 2915 | pub const e802 = CpuModel{ | ||
| 2916 | .name = "e802", | ||
| 2917 | .llvm_name = "e802", | ||
| 2918 | .features = featureSet(&[_]Feature{ | ||
| 2919 | .btst16, | ||
| 2920 | .ck802, | ||
| 2921 | .e2, | ||
| 2922 | .nvic, | ||
| 2923 | .trust, | ||
| 2924 | }), | ||
| 2925 | }; | ||
| 2926 | pub const e802t = CpuModel{ | ||
| 2927 | .name = "e802t", | ||
| 2928 | .llvm_name = "e802t", | ||
| 2929 | .features = featureSet(&[_]Feature{ | ||
| 2930 | .btst16, | ||
| 2931 | .ck802, | ||
| 2932 | .e2, | ||
| 2933 | .nvic, | ||
| 2934 | .trust, | ||
| 2935 | }), | ||
| 2936 | }; | ||
| 2937 | pub const e803 = CpuModel{ | ||
| 2938 | .name = "e803", | ||
| 2939 | .llvm_name = "e803", | ||
| 2940 | .features = featureSet(&[_]Feature{ | ||
| 2941 | .@"3e3r2", | ||
| 2942 | .@"3e3r3", | ||
| 2943 | .btst16, | ||
| 2944 | .ck803, | ||
| 2945 | .hwdiv, | ||
| 2946 | .mp, | ||
| 2947 | .nvic, | ||
| 2948 | .trust, | ||
| 2949 | }), | ||
| 2950 | }; | ||
| 2951 | pub const e803t = CpuModel{ | ||
| 2952 | .name = "e803t", | ||
| 2953 | .llvm_name = "e803t", | ||
| 2954 | .features = featureSet(&[_]Feature{ | ||
| 2955 | .@"3e3r2", | ||
| 2956 | .@"3e3r3", | ||
| 2957 | .btst16, | ||
| 2958 | .ck803, | ||
| 2959 | .hwdiv, | ||
| 2960 | .mp, | ||
| 2961 | .nvic, | ||
| 2962 | .trust, | ||
| 2963 | }), | ||
| 2964 | }; | ||
| 2965 | pub const e804d = CpuModel{ | ||
| 2966 | .name = "e804d", | ||
| 2967 | .llvm_name = "e804d", | ||
| 2968 | .features = featureSet(&[_]Feature{ | ||
| 2969 | .@"3e3r2", | ||
| 2970 | .@"3e3r3", | ||
| 2971 | .btst16, | ||
| 2972 | .ck803, | ||
| 2973 | .ck804, | ||
| 2974 | .dspv2, | ||
| 2975 | .high_registers, | ||
| 2976 | .hwdiv, | ||
| 2977 | .mp, | ||
| 2978 | .nvic, | ||
| 2979 | .trust, | ||
| 2980 | }), | ||
| 2981 | }; | ||
| 2982 | pub const e804df = CpuModel{ | ||
| 2983 | .name = "e804df", | ||
| 2984 | .llvm_name = "e804df", | ||
| 2985 | .features = featureSet(&[_]Feature{ | ||
| 2986 | .@"3e3r2", | ||
| 2987 | .@"3e3r3", | ||
| 2988 | .btst16, | ||
| 2989 | .ck803, | ||
| 2990 | .ck804, | ||
| 2991 | .dspv2, | ||
| 2992 | .float1e3, | ||
| 2993 | .floate1, | ||
| 2994 | .fpuv2_sf, | ||
| 2995 | .high_registers, | ||
| 2996 | .hwdiv, | ||
| 2997 | .mp, | ||
| 2998 | .nvic, | ||
| 2999 | .trust, | ||
| 3000 | }), | ||
| 3001 | }; | ||
| 3002 | pub const e804dft = CpuModel{ | ||
| 3003 | .name = "e804dft", | ||
| 3004 | .llvm_name = "e804dft", | ||
| 3005 | .features = featureSet(&[_]Feature{ | ||
| 3006 | .@"3e3r2", | ||
| 3007 | .@"3e3r3", | ||
| 3008 | .btst16, | ||
| 3009 | .ck803, | ||
| 3010 | .ck804, | ||
| 3011 | .dspv2, | ||
| 3012 | .float1e3, | ||
| 3013 | .floate1, | ||
| 3014 | .fpuv2_sf, | ||
| 3015 | .high_registers, | ||
| 3016 | .hwdiv, | ||
| 3017 | .mp, | ||
| 3018 | .nvic, | ||
| 3019 | .trust, | ||
| 3020 | }), | ||
| 3021 | }; | ||
| 3022 | pub const e804dt = CpuModel{ | ||
| 3023 | .name = "e804dt", | ||
| 3024 | .llvm_name = "e804dt", | ||
| 3025 | .features = featureSet(&[_]Feature{ | ||
| 3026 | .@"3e3r2", | ||
| 3027 | .@"3e3r3", | ||
| 3028 | .btst16, | ||
| 3029 | .ck803, | ||
| 3030 | .ck804, | ||
| 3031 | .dspv2, | ||
| 3032 | .high_registers, | ||
| 3033 | .hwdiv, | ||
| 3034 | .mp, | ||
| 3035 | .nvic, | ||
| 3036 | .trust, | ||
| 3037 | }), | ||
| 3038 | }; | ||
| 3039 | pub const e804f = CpuModel{ | ||
| 3040 | .name = "e804f", | ||
| 3041 | .llvm_name = "e804f", | ||
| 3042 | .features = featureSet(&[_]Feature{ | ||
| 3043 | .@"3e3r2", | ||
| 3044 | .@"3e3r3", | ||
| 3045 | .btst16, | ||
| 3046 | .ck803, | ||
| 3047 | .ck804, | ||
| 3048 | .float1e3, | ||
| 3049 | .floate1, | ||
| 3050 | .fpuv2_sf, | ||
| 3051 | .hwdiv, | ||
| 3052 | .mp, | ||
| 3053 | .nvic, | ||
| 3054 | .trust, | ||
| 3055 | }), | ||
| 3056 | }; | ||
| 3057 | pub const e804ft = CpuModel{ | ||
| 3058 | .name = "e804ft", | ||
| 3059 | .llvm_name = "e804ft", | ||
| 3060 | .features = featureSet(&[_]Feature{ | ||
| 3061 | .@"3e3r2", | ||
| 3062 | .@"3e3r3", | ||
| 3063 | .btst16, | ||
| 3064 | .ck803, | ||
| 3065 | .ck804, | ||
| 3066 | .float1e3, | ||
| 3067 | .floate1, | ||
| 3068 | .fpuv2_sf, | ||
| 3069 | .hwdiv, | ||
| 3070 | .mp, | ||
| 3071 | .nvic, | ||
| 3072 | .trust, | ||
| 3073 | }), | ||
| 3074 | }; | ||
| 3075 | pub const generic = CpuModel{ | ||
| 3076 | .name = "generic", | ||
| 3077 | .llvm_name = "generic", | ||
| 3078 | .features = featureSet(&[_]Feature{ | ||
| 3079 | .btst16, | ||
| 3080 | }), | ||
| 3081 | }; | ||
| 3082 | pub const @"i805" = CpuModel{ | ||
| 3083 | .name = "i805", | ||
| 3084 | .llvm_name = "i805", | ||
| 3085 | .features = featureSet(&[_]Feature{ | ||
| 3086 | .@"3e3r2", | ||
| 3087 | .@"3e3r3", | ||
| 3088 | .btst16, | ||
| 3089 | .ck803, | ||
| 3090 | .ck805, | ||
| 3091 | .high_registers, | ||
| 3092 | .hwdiv, | ||
| 3093 | .mp, | ||
| 3094 | .nvic, | ||
| 3095 | .trust, | ||
| 3096 | .vdsp2e3, | ||
| 3097 | .vdspv2, | ||
| 3098 | }), | ||
| 3099 | }; | ||
| 3100 | pub const i805f = CpuModel{ | ||
| 3101 | .name = "i805f", | ||
| 3102 | .llvm_name = "i805f", | ||
| 3103 | .features = featureSet(&[_]Feature{ | ||
| 3104 | .@"3e3r2", | ||
| 3105 | .@"3e3r3", | ||
| 3106 | .btst16, | ||
| 3107 | .ck803, | ||
| 3108 | .ck805, | ||
| 3109 | .float1e3, | ||
| 3110 | .floate1, | ||
| 3111 | .fpuv2_sf, | ||
| 3112 | .high_registers, | ||
| 3113 | .hwdiv, | ||
| 3114 | .mp, | ||
| 3115 | .nvic, | ||
| 3116 | .trust, | ||
| 3117 | .vdsp2e3, | ||
| 3118 | .vdspv2, | ||
| 3119 | }), | ||
| 3120 | }; | ||
| 3121 | pub const r807 = CpuModel{ | ||
| 3122 | .name = "r807", | ||
| 3123 | .llvm_name = "r807", | ||
| 3124 | .features = featureSet(&[_]Feature{ | ||
| 3125 | .cache, | ||
| 3126 | .ck807, | ||
| 3127 | .dsp1e2, | ||
| 3128 | .dspe60, | ||
| 3129 | .edsp, | ||
| 3130 | .hard_tp, | ||
| 3131 | .high_registers, | ||
| 3132 | .hwdiv, | ||
| 3133 | .mp, | ||
| 3134 | .mp1e2, | ||
| 3135 | .nvic, | ||
| 3136 | .trust, | ||
| 3137 | }), | ||
| 3138 | }; | ||
| 3139 | pub const r807f = CpuModel{ | ||
| 3140 | .name = "r807f", | ||
| 3141 | .llvm_name = "r807f", | ||
| 3142 | .features = featureSet(&[_]Feature{ | ||
| 3143 | .cache, | ||
| 3144 | .ck807, | ||
| 3145 | .dsp1e2, | ||
| 3146 | .dspe60, | ||
| 3147 | .edsp, | ||
| 3148 | .fdivdu, | ||
| 3149 | .float1e2, | ||
| 3150 | .float1e3, | ||
| 3151 | .float3e4, | ||
| 3152 | .floate1, | ||
| 3153 | .fpuv2_df, | ||
| 3154 | .fpuv2_sf, | ||
| 3155 | .hard_tp, | ||
| 3156 | .high_registers, | ||
| 3157 | .hwdiv, | ||
| 3158 | .mp, | ||
| 3159 | .mp1e2, | ||
| 3160 | .nvic, | ||
| 3161 | .trust, | ||
| 3162 | }), | ||
| 3163 | }; | ||
| 3164 | pub const s802 = CpuModel{ | ||
| 3165 | .name = "s802", | ||
| 3166 | .llvm_name = "s802", | ||
| 3167 | .features = featureSet(&[_]Feature{ | ||
| 3168 | .btst16, | ||
| 3169 | .ck802, | ||
| 3170 | .e2, | ||
| 3171 | .nvic, | ||
| 3172 | .trust, | ||
| 3173 | }), | ||
| 3174 | }; | ||
| 3175 | pub const s802t = CpuModel{ | ||
| 3176 | .name = "s802t", | ||
| 3177 | .llvm_name = "s802t", | ||
| 3178 | .features = featureSet(&[_]Feature{ | ||
| 3179 | .btst16, | ||
| 3180 | .ck802, | ||
| 3181 | .e2, | ||
| 3182 | .nvic, | ||
| 3183 | .trust, | ||
| 3184 | }), | ||
| 3185 | }; | ||
| 3186 | pub const s803 = CpuModel{ | ||
| 3187 | .name = "s803", | ||
| 3188 | .llvm_name = "s803", | ||
| 3189 | .features = featureSet(&[_]Feature{ | ||
| 3190 | .@"3e3r2", | ||
| 3191 | .@"3e3r3", | ||
| 3192 | .btst16, | ||
| 3193 | .ck803, | ||
| 3194 | .hwdiv, | ||
| 3195 | .mp, | ||
| 3196 | .nvic, | ||
| 3197 | .trust, | ||
| 3198 | }), | ||
| 3199 | }; | ||
| 3200 | pub const s803t = CpuModel{ | ||
| 3201 | .name = "s803t", | ||
| 3202 | .llvm_name = "s803t", | ||
| 3203 | .features = featureSet(&[_]Feature{ | ||
| 3204 | .@"3e3r2", | ||
| 3205 | .@"3e3r3", | ||
| 3206 | .btst16, | ||
| 3207 | .ck803, | ||
| 3208 | .hwdiv, | ||
| 3209 | .mp, | ||
| 3210 | .nvic, | ||
| 3211 | .trust, | ||
| 3212 | }), | ||
| 3213 | }; | ||
| 3214 | }; | ||
lib/std/Target/hexagon.zig created+586
| ... | @@ -0,0 +1,586 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | audio, | ||
| 9 | cabac, | ||
| 10 | compound, | ||
| 11 | duplex, | ||
| 12 | hvx, | ||
| 13 | hvx_ieee_fp, | ||
| 14 | hvx_length128b, | ||
| 15 | hvx_length64b, | ||
| 16 | hvx_qfloat, | ||
| 17 | hvxv60, | ||
| 18 | hvxv62, | ||
| 19 | hvxv65, | ||
| 20 | hvxv66, | ||
| 21 | hvxv67, | ||
| 22 | hvxv68, | ||
| 23 | hvxv69, | ||
| 24 | hvxv71, | ||
| 25 | hvxv73, | ||
| 26 | long_calls, | ||
| 27 | mem_noshuf, | ||
| 28 | memops, | ||
| 29 | noreturn_stack_elim, | ||
| 30 | nvj, | ||
| 31 | nvs, | ||
| 32 | packets, | ||
| 33 | prev65, | ||
| 34 | reserved_r19, | ||
| 35 | small_data, | ||
| 36 | tinycore, | ||
| 37 | unsafe_fp, | ||
| 38 | v5, | ||
| 39 | v55, | ||
| 40 | v60, | ||
| 41 | v62, | ||
| 42 | v65, | ||
| 43 | v66, | ||
| 44 | v67, | ||
| 45 | v68, | ||
| 46 | v69, | ||
| 47 | v71, | ||
| 48 | v73, | ||
| 49 | zreg, | ||
| 50 | }; | ||
| 51 | |||
| 52 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 53 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 54 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 55 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 56 | |||
| 57 | pub const all_features = blk: { | ||
| 58 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 59 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 60 | var result: [len]CpuFeature = undefined; | ||
| 61 | result[@intFromEnum(Feature.audio)] = .{ | ||
| 62 | .llvm_name = "audio", | ||
| 63 | .description = "Hexagon Audio extension instructions", | ||
| 64 | .dependencies = featureSet(&[_]Feature{}), | ||
| 65 | }; | ||
| 66 | result[@intFromEnum(Feature.cabac)] = .{ | ||
| 67 | .llvm_name = "cabac", | ||
| 68 | .description = "Emit the CABAC instruction", | ||
| 69 | .dependencies = featureSet(&[_]Feature{}), | ||
| 70 | }; | ||
| 71 | result[@intFromEnum(Feature.compound)] = .{ | ||
| 72 | .llvm_name = "compound", | ||
| 73 | .description = "Use compound instructions", | ||
| 74 | .dependencies = featureSet(&[_]Feature{}), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.duplex)] = .{ | ||
| 77 | .llvm_name = "duplex", | ||
| 78 | .description = "Enable generation of duplex instruction", | ||
| 79 | .dependencies = featureSet(&[_]Feature{}), | ||
| 80 | }; | ||
| 81 | result[@intFromEnum(Feature.hvx)] = .{ | ||
| 82 | .llvm_name = "hvx", | ||
| 83 | .description = "Hexagon HVX instructions", | ||
| 84 | .dependencies = featureSet(&[_]Feature{}), | ||
| 85 | }; | ||
| 86 | result[@intFromEnum(Feature.hvx_ieee_fp)] = .{ | ||
| 87 | .llvm_name = "hvx-ieee-fp", | ||
| 88 | .description = "Hexagon HVX IEEE floating point instructions", | ||
| 89 | .dependencies = featureSet(&[_]Feature{}), | ||
| 90 | }; | ||
| 91 | result[@intFromEnum(Feature.hvx_length128b)] = .{ | ||
| 92 | .llvm_name = "hvx-length128b", | ||
| 93 | .description = "Hexagon HVX 128B instructions", | ||
| 94 | .dependencies = featureSet(&[_]Feature{ | ||
| 95 | .hvx, | ||
| 96 | }), | ||
| 97 | }; | ||
| 98 | result[@intFromEnum(Feature.hvx_length64b)] = .{ | ||
| 99 | .llvm_name = "hvx-length64b", | ||
| 100 | .description = "Hexagon HVX 64B instructions", | ||
| 101 | .dependencies = featureSet(&[_]Feature{ | ||
| 102 | .hvx, | ||
| 103 | }), | ||
| 104 | }; | ||
| 105 | result[@intFromEnum(Feature.hvx_qfloat)] = .{ | ||
| 106 | .llvm_name = "hvx-qfloat", | ||
| 107 | .description = "Hexagon HVX QFloating point instructions", | ||
| 108 | .dependencies = featureSet(&[_]Feature{}), | ||
| 109 | }; | ||
| 110 | result[@intFromEnum(Feature.hvxv60)] = .{ | ||
| 111 | .llvm_name = "hvxv60", | ||
| 112 | .description = "Hexagon HVX instructions", | ||
| 113 | .dependencies = featureSet(&[_]Feature{ | ||
| 114 | .hvx, | ||
| 115 | }), | ||
| 116 | }; | ||
| 117 | result[@intFromEnum(Feature.hvxv62)] = .{ | ||
| 118 | .llvm_name = "hvxv62", | ||
| 119 | .description = "Hexagon HVX instructions", | ||
| 120 | .dependencies = featureSet(&[_]Feature{ | ||
| 121 | .hvxv60, | ||
| 122 | }), | ||
| 123 | }; | ||
| 124 | result[@intFromEnum(Feature.hvxv65)] = .{ | ||
| 125 | .llvm_name = "hvxv65", | ||
| 126 | .description = "Hexagon HVX instructions", | ||
| 127 | .dependencies = featureSet(&[_]Feature{ | ||
| 128 | .hvxv62, | ||
| 129 | }), | ||
| 130 | }; | ||
| 131 | result[@intFromEnum(Feature.hvxv66)] = .{ | ||
| 132 | .llvm_name = "hvxv66", | ||
| 133 | .description = "Hexagon HVX instructions", | ||
| 134 | .dependencies = featureSet(&[_]Feature{ | ||
| 135 | .hvxv65, | ||
| 136 | .zreg, | ||
| 137 | }), | ||
| 138 | }; | ||
| 139 | result[@intFromEnum(Feature.hvxv67)] = .{ | ||
| 140 | .llvm_name = "hvxv67", | ||
| 141 | .description = "Hexagon HVX instructions", | ||
| 142 | .dependencies = featureSet(&[_]Feature{ | ||
| 143 | .hvxv66, | ||
| 144 | }), | ||
| 145 | }; | ||
| 146 | result[@intFromEnum(Feature.hvxv68)] = .{ | ||
| 147 | .llvm_name = "hvxv68", | ||
| 148 | .description = "Hexagon HVX instructions", | ||
| 149 | .dependencies = featureSet(&[_]Feature{ | ||
| 150 | .hvxv67, | ||
| 151 | }), | ||
| 152 | }; | ||
| 153 | result[@intFromEnum(Feature.hvxv69)] = .{ | ||
| 154 | .llvm_name = "hvxv69", | ||
| 155 | .description = "Hexagon HVX instructions", | ||
| 156 | .dependencies = featureSet(&[_]Feature{ | ||
| 157 | .hvxv68, | ||
| 158 | }), | ||
| 159 | }; | ||
| 160 | result[@intFromEnum(Feature.hvxv71)] = .{ | ||
| 161 | .llvm_name = "hvxv71", | ||
| 162 | .description = "Hexagon HVX instructions", | ||
| 163 | .dependencies = featureSet(&[_]Feature{ | ||
| 164 | .hvxv69, | ||
| 165 | }), | ||
| 166 | }; | ||
| 167 | result[@intFromEnum(Feature.hvxv73)] = .{ | ||
| 168 | .llvm_name = "hvxv73", | ||
| 169 | .description = "Hexagon HVX instructions", | ||
| 170 | .dependencies = featureSet(&[_]Feature{ | ||
| 171 | .hvxv71, | ||
| 172 | }), | ||
| 173 | }; | ||
| 174 | result[@intFromEnum(Feature.long_calls)] = .{ | ||
| 175 | .llvm_name = "long-calls", | ||
| 176 | .description = "Use constant-extended calls", | ||
| 177 | .dependencies = featureSet(&[_]Feature{}), | ||
| 178 | }; | ||
| 179 | result[@intFromEnum(Feature.mem_noshuf)] = .{ | ||
| 180 | .llvm_name = "mem_noshuf", | ||
| 181 | .description = "Supports mem_noshuf feature", | ||
| 182 | .dependencies = featureSet(&[_]Feature{}), | ||
| 183 | }; | ||
| 184 | result[@intFromEnum(Feature.memops)] = .{ | ||
| 185 | .llvm_name = "memops", | ||
| 186 | .description = "Use memop instructions", | ||
| 187 | .dependencies = featureSet(&[_]Feature{}), | ||
| 188 | }; | ||
| 189 | result[@intFromEnum(Feature.noreturn_stack_elim)] = .{ | ||
| 190 | .llvm_name = "noreturn-stack-elim", | ||
| 191 | .description = "Eliminate stack allocation in a noreturn function when possible", | ||
| 192 | .dependencies = featureSet(&[_]Feature{}), | ||
| 193 | }; | ||
| 194 | result[@intFromEnum(Feature.nvj)] = .{ | ||
| 195 | .llvm_name = "nvj", | ||
| 196 | .description = "Support for new-value jumps", | ||
| 197 | .dependencies = featureSet(&[_]Feature{ | ||
| 198 | .packets, | ||
| 199 | }), | ||
| 200 | }; | ||
| 201 | result[@intFromEnum(Feature.nvs)] = .{ | ||
| 202 | .llvm_name = "nvs", | ||
| 203 | .description = "Support for new-value stores", | ||
| 204 | .dependencies = featureSet(&[_]Feature{ | ||
| 205 | .packets, | ||
| 206 | }), | ||
| 207 | }; | ||
| 208 | result[@intFromEnum(Feature.packets)] = .{ | ||
| 209 | .llvm_name = "packets", | ||
| 210 | .description = "Support for instruction packets", | ||
| 211 | .dependencies = featureSet(&[_]Feature{}), | ||
| 212 | }; | ||
| 213 | result[@intFromEnum(Feature.prev65)] = .{ | ||
| 214 | .llvm_name = "prev65", | ||
| 215 | .description = "Support features deprecated in v65", | ||
| 216 | .dependencies = featureSet(&[_]Feature{}), | ||
| 217 | }; | ||
| 218 | result[@intFromEnum(Feature.reserved_r19)] = .{ | ||
| 219 | .llvm_name = "reserved-r19", | ||
| 220 | .description = "Reserve register R19", | ||
| 221 | .dependencies = featureSet(&[_]Feature{}), | ||
| 222 | }; | ||
| 223 | result[@intFromEnum(Feature.small_data)] = .{ | ||
| 224 | .llvm_name = "small-data", | ||
| 225 | .description = "Allow GP-relative addressing of global variables", | ||
| 226 | .dependencies = featureSet(&[_]Feature{}), | ||
| 227 | }; | ||
| 228 | result[@intFromEnum(Feature.tinycore)] = .{ | ||
| 229 | .llvm_name = "tinycore", | ||
| 230 | .description = "Hexagon Tiny Core", | ||
| 231 | .dependencies = featureSet(&[_]Feature{}), | ||
| 232 | }; | ||
| 233 | result[@intFromEnum(Feature.unsafe_fp)] = .{ | ||
| 234 | .llvm_name = "unsafe-fp", | ||
| 235 | .description = "Use unsafe FP math", | ||
| 236 | .dependencies = featureSet(&[_]Feature{}), | ||
| 237 | }; | ||
| 238 | result[@intFromEnum(Feature.v5)] = .{ | ||
| 239 | .llvm_name = "v5", | ||
| 240 | .description = "Enable Hexagon V5 architecture", | ||
| 241 | .dependencies = featureSet(&[_]Feature{}), | ||
| 242 | }; | ||
| 243 | result[@intFromEnum(Feature.v55)] = .{ | ||
| 244 | .llvm_name = "v55", | ||
| 245 | .description = "Enable Hexagon V55 architecture", | ||
| 246 | .dependencies = featureSet(&[_]Feature{}), | ||
| 247 | }; | ||
| 248 | result[@intFromEnum(Feature.v60)] = .{ | ||
| 249 | .llvm_name = "v60", | ||
| 250 | .description = "Enable Hexagon V60 architecture", | ||
| 251 | .dependencies = featureSet(&[_]Feature{}), | ||
| 252 | }; | ||
| 253 | result[@intFromEnum(Feature.v62)] = .{ | ||
| 254 | .llvm_name = "v62", | ||
| 255 | .description = "Enable Hexagon V62 architecture", | ||
| 256 | .dependencies = featureSet(&[_]Feature{}), | ||
| 257 | }; | ||
| 258 | result[@intFromEnum(Feature.v65)] = .{ | ||
| 259 | .llvm_name = "v65", | ||
| 260 | .description = "Enable Hexagon V65 architecture", | ||
| 261 | .dependencies = featureSet(&[_]Feature{}), | ||
| 262 | }; | ||
| 263 | result[@intFromEnum(Feature.v66)] = .{ | ||
| 264 | .llvm_name = "v66", | ||
| 265 | .description = "Enable Hexagon V66 architecture", | ||
| 266 | .dependencies = featureSet(&[_]Feature{}), | ||
| 267 | }; | ||
| 268 | result[@intFromEnum(Feature.v67)] = .{ | ||
| 269 | .llvm_name = "v67", | ||
| 270 | .description = "Enable Hexagon V67 architecture", | ||
| 271 | .dependencies = featureSet(&[_]Feature{}), | ||
| 272 | }; | ||
| 273 | result[@intFromEnum(Feature.v68)] = .{ | ||
| 274 | .llvm_name = "v68", | ||
| 275 | .description = "Enable Hexagon V68 architecture", | ||
| 276 | .dependencies = featureSet(&[_]Feature{}), | ||
| 277 | }; | ||
| 278 | result[@intFromEnum(Feature.v69)] = .{ | ||
| 279 | .llvm_name = "v69", | ||
| 280 | .description = "Enable Hexagon V69 architecture", | ||
| 281 | .dependencies = featureSet(&[_]Feature{}), | ||
| 282 | }; | ||
| 283 | result[@intFromEnum(Feature.v71)] = .{ | ||
| 284 | .llvm_name = "v71", | ||
| 285 | .description = "Enable Hexagon V71 architecture", | ||
| 286 | .dependencies = featureSet(&[_]Feature{}), | ||
| 287 | }; | ||
| 288 | result[@intFromEnum(Feature.v73)] = .{ | ||
| 289 | .llvm_name = "v73", | ||
| 290 | .description = "Enable Hexagon V73 architecture", | ||
| 291 | .dependencies = featureSet(&[_]Feature{}), | ||
| 292 | }; | ||
| 293 | result[@intFromEnum(Feature.zreg)] = .{ | ||
| 294 | .llvm_name = "zreg", | ||
| 295 | .description = "Hexagon ZReg extension instructions", | ||
| 296 | .dependencies = featureSet(&[_]Feature{}), | ||
| 297 | }; | ||
| 298 | const ti = @typeInfo(Feature); | ||
| 299 | for (&result, 0..) |*elem, i| { | ||
| 300 | elem.index = i; | ||
| 301 | elem.name = ti.Enum.fields[i].name; | ||
| 302 | } | ||
| 303 | break :blk result; | ||
| 304 | }; | ||
| 305 | |||
| 306 | pub const cpu = struct { | ||
| 307 | pub const generic = CpuModel{ | ||
| 308 | .name = "generic", | ||
| 309 | .llvm_name = "generic", | ||
| 310 | .features = featureSet(&[_]Feature{ | ||
| 311 | .cabac, | ||
| 312 | .compound, | ||
| 313 | .duplex, | ||
| 314 | .memops, | ||
| 315 | .nvj, | ||
| 316 | .nvs, | ||
| 317 | .prev65, | ||
| 318 | .small_data, | ||
| 319 | .v5, | ||
| 320 | .v55, | ||
| 321 | .v60, | ||
| 322 | }), | ||
| 323 | }; | ||
| 324 | pub const hexagonv5 = CpuModel{ | ||
| 325 | .name = "hexagonv5", | ||
| 326 | .llvm_name = "hexagonv5", | ||
| 327 | .features = featureSet(&[_]Feature{ | ||
| 328 | .cabac, | ||
| 329 | .compound, | ||
| 330 | .duplex, | ||
| 331 | .memops, | ||
| 332 | .nvj, | ||
| 333 | .nvs, | ||
| 334 | .prev65, | ||
| 335 | .small_data, | ||
| 336 | .v5, | ||
| 337 | }), | ||
| 338 | }; | ||
| 339 | pub const hexagonv55 = CpuModel{ | ||
| 340 | .name = "hexagonv55", | ||
| 341 | .llvm_name = "hexagonv55", | ||
| 342 | .features = featureSet(&[_]Feature{ | ||
| 343 | .cabac, | ||
| 344 | .compound, | ||
| 345 | .duplex, | ||
| 346 | .memops, | ||
| 347 | .nvj, | ||
| 348 | .nvs, | ||
| 349 | .prev65, | ||
| 350 | .small_data, | ||
| 351 | .v5, | ||
| 352 | .v55, | ||
| 353 | }), | ||
| 354 | }; | ||
| 355 | pub const hexagonv60 = CpuModel{ | ||
| 356 | .name = "hexagonv60", | ||
| 357 | .llvm_name = "hexagonv60", | ||
| 358 | .features = featureSet(&[_]Feature{ | ||
| 359 | .cabac, | ||
| 360 | .compound, | ||
| 361 | .duplex, | ||
| 362 | .memops, | ||
| 363 | .nvj, | ||
| 364 | .nvs, | ||
| 365 | .prev65, | ||
| 366 | .small_data, | ||
| 367 | .v5, | ||
| 368 | .v55, | ||
| 369 | .v60, | ||
| 370 | }), | ||
| 371 | }; | ||
| 372 | pub const hexagonv62 = CpuModel{ | ||
| 373 | .name = "hexagonv62", | ||
| 374 | .llvm_name = "hexagonv62", | ||
| 375 | .features = featureSet(&[_]Feature{ | ||
| 376 | .cabac, | ||
| 377 | .compound, | ||
| 378 | .duplex, | ||
| 379 | .memops, | ||
| 380 | .nvj, | ||
| 381 | .nvs, | ||
| 382 | .prev65, | ||
| 383 | .small_data, | ||
| 384 | .v5, | ||
| 385 | .v55, | ||
| 386 | .v60, | ||
| 387 | .v62, | ||
| 388 | }), | ||
| 389 | }; | ||
| 390 | pub const hexagonv65 = CpuModel{ | ||
| 391 | .name = "hexagonv65", | ||
| 392 | .llvm_name = "hexagonv65", | ||
| 393 | .features = featureSet(&[_]Feature{ | ||
| 394 | .cabac, | ||
| 395 | .compound, | ||
| 396 | .duplex, | ||
| 397 | .mem_noshuf, | ||
| 398 | .memops, | ||
| 399 | .nvj, | ||
| 400 | .nvs, | ||
| 401 | .small_data, | ||
| 402 | .v5, | ||
| 403 | .v55, | ||
| 404 | .v60, | ||
| 405 | .v62, | ||
| 406 | .v65, | ||
| 407 | }), | ||
| 408 | }; | ||
| 409 | pub const hexagonv66 = CpuModel{ | ||
| 410 | .name = "hexagonv66", | ||
| 411 | .llvm_name = "hexagonv66", | ||
| 412 | .features = featureSet(&[_]Feature{ | ||
| 413 | .cabac, | ||
| 414 | .compound, | ||
| 415 | .duplex, | ||
| 416 | .mem_noshuf, | ||
| 417 | .memops, | ||
| 418 | .nvj, | ||
| 419 | .nvs, | ||
| 420 | .small_data, | ||
| 421 | .v5, | ||
| 422 | .v55, | ||
| 423 | .v60, | ||
| 424 | .v62, | ||
| 425 | .v65, | ||
| 426 | .v66, | ||
| 427 | }), | ||
| 428 | }; | ||
| 429 | pub const hexagonv67 = CpuModel{ | ||
| 430 | .name = "hexagonv67", | ||
| 431 | .llvm_name = "hexagonv67", | ||
| 432 | .features = featureSet(&[_]Feature{ | ||
| 433 | .cabac, | ||
| 434 | .compound, | ||
| 435 | .duplex, | ||
| 436 | .mem_noshuf, | ||
| 437 | .memops, | ||
| 438 | .nvj, | ||
| 439 | .nvs, | ||
| 440 | .small_data, | ||
| 441 | .v5, | ||
| 442 | .v55, | ||
| 443 | .v60, | ||
| 444 | .v62, | ||
| 445 | .v65, | ||
| 446 | .v66, | ||
| 447 | .v67, | ||
| 448 | }), | ||
| 449 | }; | ||
| 450 | pub const hexagonv67t = CpuModel{ | ||
| 451 | .name = "hexagonv67t", | ||
| 452 | .llvm_name = "hexagonv67t", | ||
| 453 | .features = featureSet(&[_]Feature{ | ||
| 454 | .audio, | ||
| 455 | .compound, | ||
| 456 | .mem_noshuf, | ||
| 457 | .memops, | ||
| 458 | .nvs, | ||
| 459 | .small_data, | ||
| 460 | .tinycore, | ||
| 461 | .v5, | ||
| 462 | .v55, | ||
| 463 | .v60, | ||
| 464 | .v62, | ||
| 465 | .v65, | ||
| 466 | .v66, | ||
| 467 | .v67, | ||
| 468 | }), | ||
| 469 | }; | ||
| 470 | pub const hexagonv68 = CpuModel{ | ||
| 471 | .name = "hexagonv68", | ||
| 472 | .llvm_name = "hexagonv68", | ||
| 473 | .features = featureSet(&[_]Feature{ | ||
| 474 | .cabac, | ||
| 475 | .compound, | ||
| 476 | .duplex, | ||
| 477 | .mem_noshuf, | ||
| 478 | .memops, | ||
| 479 | .nvj, | ||
| 480 | .nvs, | ||
| 481 | .small_data, | ||
| 482 | .v5, | ||
| 483 | .v55, | ||
| 484 | .v60, | ||
| 485 | .v62, | ||
| 486 | .v65, | ||
| 487 | .v66, | ||
| 488 | .v67, | ||
| 489 | .v68, | ||
| 490 | }), | ||
| 491 | }; | ||
| 492 | pub const hexagonv69 = CpuModel{ | ||
| 493 | .name = "hexagonv69", | ||
| 494 | .llvm_name = "hexagonv69", | ||
| 495 | .features = featureSet(&[_]Feature{ | ||
| 496 | .cabac, | ||
| 497 | .compound, | ||
| 498 | .duplex, | ||
| 499 | .mem_noshuf, | ||
| 500 | .memops, | ||
| 501 | .nvj, | ||
| 502 | .nvs, | ||
| 503 | .small_data, | ||
| 504 | .v5, | ||
| 505 | .v55, | ||
| 506 | .v60, | ||
| 507 | .v62, | ||
| 508 | .v65, | ||
| 509 | .v66, | ||
| 510 | .v67, | ||
| 511 | .v68, | ||
| 512 | .v69, | ||
| 513 | }), | ||
| 514 | }; | ||
| 515 | pub const hexagonv71 = CpuModel{ | ||
| 516 | .name = "hexagonv71", | ||
| 517 | .llvm_name = "hexagonv71", | ||
| 518 | .features = featureSet(&[_]Feature{ | ||
| 519 | .cabac, | ||
| 520 | .compound, | ||
| 521 | .duplex, | ||
| 522 | .mem_noshuf, | ||
| 523 | .memops, | ||
| 524 | .nvj, | ||
| 525 | .nvs, | ||
| 526 | .small_data, | ||
| 527 | .v5, | ||
| 528 | .v55, | ||
| 529 | .v60, | ||
| 530 | .v62, | ||
| 531 | .v65, | ||
| 532 | .v66, | ||
| 533 | .v67, | ||
| 534 | .v68, | ||
| 535 | .v69, | ||
| 536 | .v71, | ||
| 537 | }), | ||
| 538 | }; | ||
| 539 | pub const hexagonv71t = CpuModel{ | ||
| 540 | .name = "hexagonv71t", | ||
| 541 | .llvm_name = "hexagonv71t", | ||
| 542 | .features = featureSet(&[_]Feature{ | ||
| 543 | .audio, | ||
| 544 | .compound, | ||
| 545 | .mem_noshuf, | ||
| 546 | .memops, | ||
| 547 | .nvs, | ||
| 548 | .small_data, | ||
| 549 | .tinycore, | ||
| 550 | .v5, | ||
| 551 | .v55, | ||
| 552 | .v60, | ||
| 553 | .v62, | ||
| 554 | .v65, | ||
| 555 | .v66, | ||
| 556 | .v67, | ||
| 557 | .v68, | ||
| 558 | .v69, | ||
| 559 | .v71, | ||
| 560 | }), | ||
| 561 | }; | ||
| 562 | pub const hexagonv73 = CpuModel{ | ||
| 563 | .name = "hexagonv73", | ||
| 564 | .llvm_name = "hexagonv73", | ||
| 565 | .features = featureSet(&[_]Feature{ | ||
| 566 | .compound, | ||
| 567 | .duplex, | ||
| 568 | .mem_noshuf, | ||
| 569 | .memops, | ||
| 570 | .nvj, | ||
| 571 | .nvs, | ||
| 572 | .small_data, | ||
| 573 | .v5, | ||
| 574 | .v55, | ||
| 575 | .v60, | ||
| 576 | .v62, | ||
| 577 | .v65, | ||
| 578 | .v66, | ||
| 579 | .v67, | ||
| 580 | .v68, | ||
| 581 | .v69, | ||
| 582 | .v71, | ||
| 583 | .v73, | ||
| 584 | }), | ||
| 585 | }; | ||
| 586 | }; | ||
lib/std/Target/loongarch.zig created+146
| ... | @@ -0,0 +1,146 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"32bit", | ||
| 9 | @"64bit", | ||
| 10 | d, | ||
| 11 | f, | ||
| 12 | la_global_with_abs, | ||
| 13 | la_global_with_pcrel, | ||
| 14 | la_local_with_abs, | ||
| 15 | lasx, | ||
| 16 | lbt, | ||
| 17 | lsx, | ||
| 18 | lvz, | ||
| 19 | ual, | ||
| 20 | }; | ||
| 21 | |||
| 22 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 23 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 24 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 25 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 26 | |||
| 27 | pub const all_features = blk: { | ||
| 28 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 29 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 30 | var result: [len]CpuFeature = undefined; | ||
| 31 | result[@intFromEnum(Feature.@"32bit")] = .{ | ||
| 32 | .llvm_name = "32bit", | ||
| 33 | .description = "LA32 Basic Integer and Privilege Instruction Set", | ||
| 34 | .dependencies = featureSet(&[_]Feature{}), | ||
| 35 | }; | ||
| 36 | result[@intFromEnum(Feature.@"64bit")] = .{ | ||
| 37 | .llvm_name = "64bit", | ||
| 38 | .description = "LA64 Basic Integer and Privilege Instruction Set", | ||
| 39 | .dependencies = featureSet(&[_]Feature{}), | ||
| 40 | }; | ||
| 41 | result[@intFromEnum(Feature.d)] = .{ | ||
| 42 | .llvm_name = "d", | ||
| 43 | .description = "'D' (Double-Precision Floating-Point)", | ||
| 44 | .dependencies = featureSet(&[_]Feature{ | ||
| 45 | .f, | ||
| 46 | }), | ||
| 47 | }; | ||
| 48 | result[@intFromEnum(Feature.f)] = .{ | ||
| 49 | .llvm_name = "f", | ||
| 50 | .description = "'F' (Single-Precision Floating-Point)", | ||
| 51 | .dependencies = featureSet(&[_]Feature{}), | ||
| 52 | }; | ||
| 53 | result[@intFromEnum(Feature.la_global_with_abs)] = .{ | ||
| 54 | .llvm_name = "la-global-with-abs", | ||
| 55 | .description = "Expand la.global as la.abs", | ||
| 56 | .dependencies = featureSet(&[_]Feature{}), | ||
| 57 | }; | ||
| 58 | result[@intFromEnum(Feature.la_global_with_pcrel)] = .{ | ||
| 59 | .llvm_name = "la-global-with-pcrel", | ||
| 60 | .description = "Expand la.global as la.pcrel", | ||
| 61 | .dependencies = featureSet(&[_]Feature{}), | ||
| 62 | }; | ||
| 63 | result[@intFromEnum(Feature.la_local_with_abs)] = .{ | ||
| 64 | .llvm_name = "la-local-with-abs", | ||
| 65 | .description = "Expand la.local as la.abs", | ||
| 66 | .dependencies = featureSet(&[_]Feature{}), | ||
| 67 | }; | ||
| 68 | result[@intFromEnum(Feature.lasx)] = .{ | ||
| 69 | .llvm_name = "lasx", | ||
| 70 | .description = "'LASX' (Loongson Advanced SIMD Extension)", | ||
| 71 | .dependencies = featureSet(&[_]Feature{ | ||
| 72 | .lsx, | ||
| 73 | }), | ||
| 74 | }; | ||
| 75 | result[@intFromEnum(Feature.lbt)] = .{ | ||
| 76 | .llvm_name = "lbt", | ||
| 77 | .description = "'LBT' (Loongson Binary Translation Extension)", | ||
| 78 | .dependencies = featureSet(&[_]Feature{}), | ||
| 79 | }; | ||
| 80 | result[@intFromEnum(Feature.lsx)] = .{ | ||
| 81 | .llvm_name = "lsx", | ||
| 82 | .description = "'LSX' (Loongson SIMD Extension)", | ||
| 83 | .dependencies = featureSet(&[_]Feature{ | ||
| 84 | .d, | ||
| 85 | }), | ||
| 86 | }; | ||
| 87 | result[@intFromEnum(Feature.lvz)] = .{ | ||
| 88 | .llvm_name = "lvz", | ||
| 89 | .description = "'LVZ' (Loongson Virtualization Extension)", | ||
| 90 | .dependencies = featureSet(&[_]Feature{}), | ||
| 91 | }; | ||
| 92 | result[@intFromEnum(Feature.ual)] = .{ | ||
| 93 | .llvm_name = "ual", | ||
| 94 | .description = "Allow memory accesses to be unaligned", | ||
| 95 | .dependencies = featureSet(&[_]Feature{}), | ||
| 96 | }; | ||
| 97 | const ti = @typeInfo(Feature); | ||
| 98 | for (&result, 0..) |*elem, i| { | ||
| 99 | elem.index = i; | ||
| 100 | elem.name = ti.Enum.fields[i].name; | ||
| 101 | } | ||
| 102 | break :blk result; | ||
| 103 | }; | ||
| 104 | |||
| 105 | pub const cpu = struct { | ||
| 106 | pub const generic = CpuModel{ | ||
| 107 | .name = "generic", | ||
| 108 | .llvm_name = "generic", | ||
| 109 | .features = featureSet(&[_]Feature{}), | ||
| 110 | }; | ||
| 111 | pub const generic_la32 = CpuModel{ | ||
| 112 | .name = "generic_la32", | ||
| 113 | .llvm_name = "generic-la32", | ||
| 114 | .features = featureSet(&[_]Feature{ | ||
| 115 | .@"32bit", | ||
| 116 | }), | ||
| 117 | }; | ||
| 118 | pub const generic_la64 = CpuModel{ | ||
| 119 | .name = "generic_la64", | ||
| 120 | .llvm_name = "generic-la64", | ||
| 121 | .features = featureSet(&[_]Feature{ | ||
| 122 | .@"64bit", | ||
| 123 | .ual, | ||
| 124 | }), | ||
| 125 | }; | ||
| 126 | pub const la464 = CpuModel{ | ||
| 127 | .name = "la464", | ||
| 128 | .llvm_name = "la464", | ||
| 129 | .features = featureSet(&[_]Feature{ | ||
| 130 | .@"64bit", | ||
| 131 | .lasx, | ||
| 132 | .lbt, | ||
| 133 | .lvz, | ||
| 134 | .ual, | ||
| 135 | }), | ||
| 136 | }; | ||
| 137 | pub const loongarch64 = CpuModel{ | ||
| 138 | .name = "loongarch64", | ||
| 139 | .llvm_name = "loongarch64", | ||
| 140 | .features = featureSet(&[_]Feature{ | ||
| 141 | .@"64bit", | ||
| 142 | .d, | ||
| 143 | .ual, | ||
| 144 | }), | ||
| 145 | }; | ||
| 146 | }; | ||
lib/std/Target/m68k.zig created+228
| ... | @@ -0,0 +1,228 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | isa_68000, | ||
| 9 | isa_68010, | ||
| 10 | isa_68020, | ||
| 11 | isa_68030, | ||
| 12 | isa_68040, | ||
| 13 | isa_68060, | ||
| 14 | isa_68881, | ||
| 15 | isa_68882, | ||
| 16 | reserve_a0, | ||
| 17 | reserve_a1, | ||
| 18 | reserve_a2, | ||
| 19 | reserve_a3, | ||
| 20 | reserve_a4, | ||
| 21 | reserve_a5, | ||
| 22 | reserve_a6, | ||
| 23 | reserve_d0, | ||
| 24 | reserve_d1, | ||
| 25 | reserve_d2, | ||
| 26 | reserve_d3, | ||
| 27 | reserve_d4, | ||
| 28 | reserve_d5, | ||
| 29 | reserve_d6, | ||
| 30 | reserve_d7, | ||
| 31 | }; | ||
| 32 | |||
| 33 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 34 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 35 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 36 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 37 | |||
| 38 | pub const all_features = blk: { | ||
| 39 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 40 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 41 | var result: [len]CpuFeature = undefined; | ||
| 42 | result[@intFromEnum(Feature.isa_68000)] = .{ | ||
| 43 | .llvm_name = "isa-68000", | ||
| 44 | .description = "Is M68000 ISA supported", | ||
| 45 | .dependencies = featureSet(&[_]Feature{}), | ||
| 46 | }; | ||
| 47 | result[@intFromEnum(Feature.isa_68010)] = .{ | ||
| 48 | .llvm_name = "isa-68010", | ||
| 49 | .description = "Is M68010 ISA supported", | ||
| 50 | .dependencies = featureSet(&[_]Feature{ | ||
| 51 | .isa_68000, | ||
| 52 | }), | ||
| 53 | }; | ||
| 54 | result[@intFromEnum(Feature.isa_68020)] = .{ | ||
| 55 | .llvm_name = "isa-68020", | ||
| 56 | .description = "Is M68020 ISA supported", | ||
| 57 | .dependencies = featureSet(&[_]Feature{ | ||
| 58 | .isa_68010, | ||
| 59 | }), | ||
| 60 | }; | ||
| 61 | result[@intFromEnum(Feature.isa_68030)] = .{ | ||
| 62 | .llvm_name = "isa-68030", | ||
| 63 | .description = "Is M68030 ISA supported", | ||
| 64 | .dependencies = featureSet(&[_]Feature{ | ||
| 65 | .isa_68020, | ||
| 66 | }), | ||
| 67 | }; | ||
| 68 | result[@intFromEnum(Feature.isa_68040)] = .{ | ||
| 69 | .llvm_name = "isa-68040", | ||
| 70 | .description = "Is M68040 ISA supported", | ||
| 71 | .dependencies = featureSet(&[_]Feature{ | ||
| 72 | .isa_68030, | ||
| 73 | .isa_68882, | ||
| 74 | }), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.isa_68060)] = .{ | ||
| 77 | .llvm_name = "isa-68060", | ||
| 78 | .description = "Is M68060 ISA supported", | ||
| 79 | .dependencies = featureSet(&[_]Feature{ | ||
| 80 | .isa_68040, | ||
| 81 | }), | ||
| 82 | }; | ||
| 83 | result[@intFromEnum(Feature.isa_68881)] = .{ | ||
| 84 | .llvm_name = "isa-68881", | ||
| 85 | .description = "Is M68881 (FPU) ISA supported", | ||
| 86 | .dependencies = featureSet(&[_]Feature{}), | ||
| 87 | }; | ||
| 88 | result[@intFromEnum(Feature.isa_68882)] = .{ | ||
| 89 | .llvm_name = "isa-68882", | ||
| 90 | .description = "Is M68882 (FPU) ISA supported", | ||
| 91 | .dependencies = featureSet(&[_]Feature{ | ||
| 92 | .isa_68881, | ||
| 93 | }), | ||
| 94 | }; | ||
| 95 | result[@intFromEnum(Feature.reserve_a0)] = .{ | ||
| 96 | .llvm_name = "reserve-a0", | ||
| 97 | .description = "Reserve A0 register", | ||
| 98 | .dependencies = featureSet(&[_]Feature{}), | ||
| 99 | }; | ||
| 100 | result[@intFromEnum(Feature.reserve_a1)] = .{ | ||
| 101 | .llvm_name = "reserve-a1", | ||
| 102 | .description = "Reserve A1 register", | ||
| 103 | .dependencies = featureSet(&[_]Feature{}), | ||
| 104 | }; | ||
| 105 | result[@intFromEnum(Feature.reserve_a2)] = .{ | ||
| 106 | .llvm_name = "reserve-a2", | ||
| 107 | .description = "Reserve A2 register", | ||
| 108 | .dependencies = featureSet(&[_]Feature{}), | ||
| 109 | }; | ||
| 110 | result[@intFromEnum(Feature.reserve_a3)] = .{ | ||
| 111 | .llvm_name = "reserve-a3", | ||
| 112 | .description = "Reserve A3 register", | ||
| 113 | .dependencies = featureSet(&[_]Feature{}), | ||
| 114 | }; | ||
| 115 | result[@intFromEnum(Feature.reserve_a4)] = .{ | ||
| 116 | .llvm_name = "reserve-a4", | ||
| 117 | .description = "Reserve A4 register", | ||
| 118 | .dependencies = featureSet(&[_]Feature{}), | ||
| 119 | }; | ||
| 120 | result[@intFromEnum(Feature.reserve_a5)] = .{ | ||
| 121 | .llvm_name = "reserve-a5", | ||
| 122 | .description = "Reserve A5 register", | ||
| 123 | .dependencies = featureSet(&[_]Feature{}), | ||
| 124 | }; | ||
| 125 | result[@intFromEnum(Feature.reserve_a6)] = .{ | ||
| 126 | .llvm_name = "reserve-a6", | ||
| 127 | .description = "Reserve A6 register", | ||
| 128 | .dependencies = featureSet(&[_]Feature{}), | ||
| 129 | }; | ||
| 130 | result[@intFromEnum(Feature.reserve_d0)] = .{ | ||
| 131 | .llvm_name = "reserve-d0", | ||
| 132 | .description = "Reserve D0 register", | ||
| 133 | .dependencies = featureSet(&[_]Feature{}), | ||
| 134 | }; | ||
| 135 | result[@intFromEnum(Feature.reserve_d1)] = .{ | ||
| 136 | .llvm_name = "reserve-d1", | ||
| 137 | .description = "Reserve D1 register", | ||
| 138 | .dependencies = featureSet(&[_]Feature{}), | ||
| 139 | }; | ||
| 140 | result[@intFromEnum(Feature.reserve_d2)] = .{ | ||
| 141 | .llvm_name = "reserve-d2", | ||
| 142 | .description = "Reserve D2 register", | ||
| 143 | .dependencies = featureSet(&[_]Feature{}), | ||
| 144 | }; | ||
| 145 | result[@intFromEnum(Feature.reserve_d3)] = .{ | ||
| 146 | .llvm_name = "reserve-d3", | ||
| 147 | .description = "Reserve D3 register", | ||
| 148 | .dependencies = featureSet(&[_]Feature{}), | ||
| 149 | }; | ||
| 150 | result[@intFromEnum(Feature.reserve_d4)] = .{ | ||
| 151 | .llvm_name = "reserve-d4", | ||
| 152 | .description = "Reserve D4 register", | ||
| 153 | .dependencies = featureSet(&[_]Feature{}), | ||
| 154 | }; | ||
| 155 | result[@intFromEnum(Feature.reserve_d5)] = .{ | ||
| 156 | .llvm_name = "reserve-d5", | ||
| 157 | .description = "Reserve D5 register", | ||
| 158 | .dependencies = featureSet(&[_]Feature{}), | ||
| 159 | }; | ||
| 160 | result[@intFromEnum(Feature.reserve_d6)] = .{ | ||
| 161 | .llvm_name = "reserve-d6", | ||
| 162 | .description = "Reserve D6 register", | ||
| 163 | .dependencies = featureSet(&[_]Feature{}), | ||
| 164 | }; | ||
| 165 | result[@intFromEnum(Feature.reserve_d7)] = .{ | ||
| 166 | .llvm_name = "reserve-d7", | ||
| 167 | .description = "Reserve D7 register", | ||
| 168 | .dependencies = featureSet(&[_]Feature{}), | ||
| 169 | }; | ||
| 170 | const ti = @typeInfo(Feature); | ||
| 171 | for (&result, 0..) |*elem, i| { | ||
| 172 | elem.index = i; | ||
| 173 | elem.name = ti.Enum.fields[i].name; | ||
| 174 | } | ||
| 175 | break :blk result; | ||
| 176 | }; | ||
| 177 | |||
| 178 | pub const cpu = struct { | ||
| 179 | pub const generic = CpuModel{ | ||
| 180 | .name = "generic", | ||
| 181 | .llvm_name = "generic", | ||
| 182 | .features = featureSet(&[_]Feature{ | ||
| 183 | .isa_68000, | ||
| 184 | }), | ||
| 185 | }; | ||
| 186 | pub const M68000 = CpuModel{ | ||
| 187 | .name = "M68000", | ||
| 188 | .llvm_name = "M68000", | ||
| 189 | .features = featureSet(&[_]Feature{ | ||
| 190 | .isa_68000, | ||
| 191 | }), | ||
| 192 | }; | ||
| 193 | pub const M68010 = CpuModel{ | ||
| 194 | .name = "M68010", | ||
| 195 | .llvm_name = "M68010", | ||
| 196 | .features = featureSet(&[_]Feature{ | ||
| 197 | .isa_68010, | ||
| 198 | }), | ||
| 199 | }; | ||
| 200 | pub const M68020 = CpuModel{ | ||
| 201 | .name = "M68020", | ||
| 202 | .llvm_name = "M68020", | ||
| 203 | .features = featureSet(&[_]Feature{ | ||
| 204 | .isa_68020, | ||
| 205 | }), | ||
| 206 | }; | ||
| 207 | pub const M68030 = CpuModel{ | ||
| 208 | .name = "M68030", | ||
| 209 | .llvm_name = "M68030", | ||
| 210 | .features = featureSet(&[_]Feature{ | ||
| 211 | .isa_68030, | ||
| 212 | }), | ||
| 213 | }; | ||
| 214 | pub const M68040 = CpuModel{ | ||
| 215 | .name = "M68040", | ||
| 216 | .llvm_name = "M68040", | ||
| 217 | .features = featureSet(&[_]Feature{ | ||
| 218 | .isa_68040, | ||
| 219 | }), | ||
| 220 | }; | ||
| 221 | pub const M68060 = CpuModel{ | ||
| 222 | .name = "M68060", | ||
| 223 | .llvm_name = "M68060", | ||
| 224 | .features = featureSet(&[_]Feature{ | ||
| 225 | .isa_68060, | ||
| 226 | }), | ||
| 227 | }; | ||
| 228 | }; | ||
lib/std/Target/mips.zig created+531
| ... | @@ -0,0 +1,531 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | abs2008, | ||
| 9 | cnmips, | ||
| 10 | cnmipsp, | ||
| 11 | crc, | ||
| 12 | dsp, | ||
| 13 | dspr2, | ||
| 14 | dspr3, | ||
| 15 | eva, | ||
| 16 | fp64, | ||
| 17 | fpxx, | ||
| 18 | ginv, | ||
| 19 | gp64, | ||
| 20 | long_calls, | ||
| 21 | micromips, | ||
| 22 | mips1, | ||
| 23 | mips16, | ||
| 24 | mips2, | ||
| 25 | mips3, | ||
| 26 | mips32, | ||
| 27 | mips32r2, | ||
| 28 | mips32r3, | ||
| 29 | mips32r5, | ||
| 30 | mips32r6, | ||
| 31 | mips3_32, | ||
| 32 | mips3_32r2, | ||
| 33 | mips3d, | ||
| 34 | mips4, | ||
| 35 | mips4_32, | ||
| 36 | mips4_32r2, | ||
| 37 | mips5, | ||
| 38 | mips5_32r2, | ||
| 39 | mips64, | ||
| 40 | mips64r2, | ||
| 41 | mips64r3, | ||
| 42 | mips64r5, | ||
| 43 | mips64r6, | ||
| 44 | msa, | ||
| 45 | mt, | ||
| 46 | nan2008, | ||
| 47 | noabicalls, | ||
| 48 | nomadd4, | ||
| 49 | nooddspreg, | ||
| 50 | p5600, | ||
| 51 | ptr64, | ||
| 52 | single_float, | ||
| 53 | soft_float, | ||
| 54 | sym32, | ||
| 55 | use_indirect_jump_hazard, | ||
| 56 | use_tcc_in_div, | ||
| 57 | vfpu, | ||
| 58 | virt, | ||
| 59 | xgot, | ||
| 60 | }; | ||
| 61 | |||
| 62 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 63 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 64 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 65 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 66 | |||
| 67 | pub const all_features = blk: { | ||
| 68 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 69 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 70 | var result: [len]CpuFeature = undefined; | ||
| 71 | result[@intFromEnum(Feature.abs2008)] = .{ | ||
| 72 | .llvm_name = "abs2008", | ||
| 73 | .description = "Disable IEEE 754-2008 abs.fmt mode", | ||
| 74 | .dependencies = featureSet(&[_]Feature{}), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.cnmips)] = .{ | ||
| 77 | .llvm_name = "cnmips", | ||
| 78 | .description = "Octeon cnMIPS Support", | ||
| 79 | .dependencies = featureSet(&[_]Feature{ | ||
| 80 | .mips64r2, | ||
| 81 | }), | ||
| 82 | }; | ||
| 83 | result[@intFromEnum(Feature.cnmipsp)] = .{ | ||
| 84 | .llvm_name = "cnmipsp", | ||
| 85 | .description = "Octeon+ cnMIPS Support", | ||
| 86 | .dependencies = featureSet(&[_]Feature{ | ||
| 87 | .cnmips, | ||
| 88 | }), | ||
| 89 | }; | ||
| 90 | result[@intFromEnum(Feature.crc)] = .{ | ||
| 91 | .llvm_name = "crc", | ||
| 92 | .description = "Mips R6 CRC ASE", | ||
| 93 | .dependencies = featureSet(&[_]Feature{}), | ||
| 94 | }; | ||
| 95 | result[@intFromEnum(Feature.dsp)] = .{ | ||
| 96 | .llvm_name = "dsp", | ||
| 97 | .description = "Mips DSP ASE", | ||
| 98 | .dependencies = featureSet(&[_]Feature{}), | ||
| 99 | }; | ||
| 100 | result[@intFromEnum(Feature.dspr2)] = .{ | ||
| 101 | .llvm_name = "dspr2", | ||
| 102 | .description = "Mips DSP-R2 ASE", | ||
| 103 | .dependencies = featureSet(&[_]Feature{ | ||
| 104 | .dsp, | ||
| 105 | }), | ||
| 106 | }; | ||
| 107 | result[@intFromEnum(Feature.dspr3)] = .{ | ||
| 108 | .llvm_name = "dspr3", | ||
| 109 | .description = "Mips DSP-R3 ASE", | ||
| 110 | .dependencies = featureSet(&[_]Feature{ | ||
| 111 | .dspr2, | ||
| 112 | }), | ||
| 113 | }; | ||
| 114 | result[@intFromEnum(Feature.eva)] = .{ | ||
| 115 | .llvm_name = "eva", | ||
| 116 | .description = "Mips EVA ASE", | ||
| 117 | .dependencies = featureSet(&[_]Feature{}), | ||
| 118 | }; | ||
| 119 | result[@intFromEnum(Feature.fp64)] = .{ | ||
| 120 | .llvm_name = "fp64", | ||
| 121 | .description = "Support 64-bit FP registers", | ||
| 122 | .dependencies = featureSet(&[_]Feature{}), | ||
| 123 | }; | ||
| 124 | result[@intFromEnum(Feature.fpxx)] = .{ | ||
| 125 | .llvm_name = "fpxx", | ||
| 126 | .description = "Support for FPXX", | ||
| 127 | .dependencies = featureSet(&[_]Feature{}), | ||
| 128 | }; | ||
| 129 | result[@intFromEnum(Feature.ginv)] = .{ | ||
| 130 | .llvm_name = "ginv", | ||
| 131 | .description = "Mips Global Invalidate ASE", | ||
| 132 | .dependencies = featureSet(&[_]Feature{}), | ||
| 133 | }; | ||
| 134 | result[@intFromEnum(Feature.gp64)] = .{ | ||
| 135 | .llvm_name = "gp64", | ||
| 136 | .description = "General Purpose Registers are 64-bit wide", | ||
| 137 | .dependencies = featureSet(&[_]Feature{}), | ||
| 138 | }; | ||
| 139 | result[@intFromEnum(Feature.long_calls)] = .{ | ||
| 140 | .llvm_name = "long-calls", | ||
| 141 | .description = "Disable use of the jal instruction", | ||
| 142 | .dependencies = featureSet(&[_]Feature{}), | ||
| 143 | }; | ||
| 144 | result[@intFromEnum(Feature.micromips)] = .{ | ||
| 145 | .llvm_name = "micromips", | ||
| 146 | .description = "microMips mode", | ||
| 147 | .dependencies = featureSet(&[_]Feature{}), | ||
| 148 | }; | ||
| 149 | result[@intFromEnum(Feature.mips1)] = .{ | ||
| 150 | .llvm_name = "mips1", | ||
| 151 | .description = "Mips I ISA Support [highly experimental]", | ||
| 152 | .dependencies = featureSet(&[_]Feature{}), | ||
| 153 | }; | ||
| 154 | result[@intFromEnum(Feature.mips16)] = .{ | ||
| 155 | .llvm_name = "mips16", | ||
| 156 | .description = "Mips16 mode", | ||
| 157 | .dependencies = featureSet(&[_]Feature{}), | ||
| 158 | }; | ||
| 159 | result[@intFromEnum(Feature.mips2)] = .{ | ||
| 160 | .llvm_name = "mips2", | ||
| 161 | .description = "Mips II ISA Support [highly experimental]", | ||
| 162 | .dependencies = featureSet(&[_]Feature{ | ||
| 163 | .mips1, | ||
| 164 | }), | ||
| 165 | }; | ||
| 166 | result[@intFromEnum(Feature.mips3)] = .{ | ||
| 167 | .llvm_name = "mips3", | ||
| 168 | .description = "MIPS III ISA Support [highly experimental]", | ||
| 169 | .dependencies = featureSet(&[_]Feature{ | ||
| 170 | .fp64, | ||
| 171 | .gp64, | ||
| 172 | .mips2, | ||
| 173 | .mips3_32, | ||
| 174 | .mips3_32r2, | ||
| 175 | }), | ||
| 176 | }; | ||
| 177 | result[@intFromEnum(Feature.mips32)] = .{ | ||
| 178 | .llvm_name = "mips32", | ||
| 179 | .description = "Mips32 ISA Support", | ||
| 180 | .dependencies = featureSet(&[_]Feature{ | ||
| 181 | .mips2, | ||
| 182 | .mips3_32, | ||
| 183 | .mips4_32, | ||
| 184 | }), | ||
| 185 | }; | ||
| 186 | result[@intFromEnum(Feature.mips32r2)] = .{ | ||
| 187 | .llvm_name = "mips32r2", | ||
| 188 | .description = "Mips32r2 ISA Support", | ||
| 189 | .dependencies = featureSet(&[_]Feature{ | ||
| 190 | .mips32, | ||
| 191 | .mips3_32r2, | ||
| 192 | .mips4_32r2, | ||
| 193 | .mips5_32r2, | ||
| 194 | }), | ||
| 195 | }; | ||
| 196 | result[@intFromEnum(Feature.mips32r3)] = .{ | ||
| 197 | .llvm_name = "mips32r3", | ||
| 198 | .description = "Mips32r3 ISA Support", | ||
| 199 | .dependencies = featureSet(&[_]Feature{ | ||
| 200 | .mips32r2, | ||
| 201 | }), | ||
| 202 | }; | ||
| 203 | result[@intFromEnum(Feature.mips32r5)] = .{ | ||
| 204 | .llvm_name = "mips32r5", | ||
| 205 | .description = "Mips32r5 ISA Support", | ||
| 206 | .dependencies = featureSet(&[_]Feature{ | ||
| 207 | .mips32r3, | ||
| 208 | }), | ||
| 209 | }; | ||
| 210 | result[@intFromEnum(Feature.mips32r6)] = .{ | ||
| 211 | .llvm_name = "mips32r6", | ||
| 212 | .description = "Mips32r6 ISA Support [experimental]", | ||
| 213 | .dependencies = featureSet(&[_]Feature{ | ||
| 214 | .abs2008, | ||
| 215 | .fp64, | ||
| 216 | .mips32r5, | ||
| 217 | .nan2008, | ||
| 218 | }), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.mips3_32)] = .{ | ||
| 221 | .llvm_name = "mips3_32", | ||
| 222 | .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", | ||
| 223 | .dependencies = featureSet(&[_]Feature{}), | ||
| 224 | }; | ||
| 225 | result[@intFromEnum(Feature.mips3_32r2)] = .{ | ||
| 226 | .llvm_name = "mips3_32r2", | ||
| 227 | .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", | ||
| 228 | .dependencies = featureSet(&[_]Feature{}), | ||
| 229 | }; | ||
| 230 | result[@intFromEnum(Feature.mips3d)] = .{ | ||
| 231 | .llvm_name = "mips3d", | ||
| 232 | .description = "Mips 3D ASE", | ||
| 233 | .dependencies = featureSet(&[_]Feature{}), | ||
| 234 | }; | ||
| 235 | result[@intFromEnum(Feature.mips4)] = .{ | ||
| 236 | .llvm_name = "mips4", | ||
| 237 | .description = "MIPS IV ISA Support", | ||
| 238 | .dependencies = featureSet(&[_]Feature{ | ||
| 239 | .mips3, | ||
| 240 | .mips4_32, | ||
| 241 | .mips4_32r2, | ||
| 242 | }), | ||
| 243 | }; | ||
| 244 | result[@intFromEnum(Feature.mips4_32)] = .{ | ||
| 245 | .llvm_name = "mips4_32", | ||
| 246 | .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", | ||
| 247 | .dependencies = featureSet(&[_]Feature{}), | ||
| 248 | }; | ||
| 249 | result[@intFromEnum(Feature.mips4_32r2)] = .{ | ||
| 250 | .llvm_name = "mips4_32r2", | ||
| 251 | .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", | ||
| 252 | .dependencies = featureSet(&[_]Feature{}), | ||
| 253 | }; | ||
| 254 | result[@intFromEnum(Feature.mips5)] = .{ | ||
| 255 | .llvm_name = "mips5", | ||
| 256 | .description = "MIPS V ISA Support [highly experimental]", | ||
| 257 | .dependencies = featureSet(&[_]Feature{ | ||
| 258 | .mips4, | ||
| 259 | .mips5_32r2, | ||
| 260 | }), | ||
| 261 | }; | ||
| 262 | result[@intFromEnum(Feature.mips5_32r2)] = .{ | ||
| 263 | .llvm_name = "mips5_32r2", | ||
| 264 | .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", | ||
| 265 | .dependencies = featureSet(&[_]Feature{}), | ||
| 266 | }; | ||
| 267 | result[@intFromEnum(Feature.mips64)] = .{ | ||
| 268 | .llvm_name = "mips64", | ||
| 269 | .description = "Mips64 ISA Support", | ||
| 270 | .dependencies = featureSet(&[_]Feature{ | ||
| 271 | .mips32, | ||
| 272 | .mips5, | ||
| 273 | }), | ||
| 274 | }; | ||
| 275 | result[@intFromEnum(Feature.mips64r2)] = .{ | ||
| 276 | .llvm_name = "mips64r2", | ||
| 277 | .description = "Mips64r2 ISA Support", | ||
| 278 | .dependencies = featureSet(&[_]Feature{ | ||
| 279 | .mips32r2, | ||
| 280 | .mips64, | ||
| 281 | }), | ||
| 282 | }; | ||
| 283 | result[@intFromEnum(Feature.mips64r3)] = .{ | ||
| 284 | .llvm_name = "mips64r3", | ||
| 285 | .description = "Mips64r3 ISA Support", | ||
| 286 | .dependencies = featureSet(&[_]Feature{ | ||
| 287 | .mips32r3, | ||
| 288 | .mips64r2, | ||
| 289 | }), | ||
| 290 | }; | ||
| 291 | result[@intFromEnum(Feature.mips64r5)] = .{ | ||
| 292 | .llvm_name = "mips64r5", | ||
| 293 | .description = "Mips64r5 ISA Support", | ||
| 294 | .dependencies = featureSet(&[_]Feature{ | ||
| 295 | .mips32r5, | ||
| 296 | .mips64r3, | ||
| 297 | }), | ||
| 298 | }; | ||
| 299 | result[@intFromEnum(Feature.mips64r6)] = .{ | ||
| 300 | .llvm_name = "mips64r6", | ||
| 301 | .description = "Mips64r6 ISA Support [experimental]", | ||
| 302 | .dependencies = featureSet(&[_]Feature{ | ||
| 303 | .mips32r6, | ||
| 304 | .mips64r5, | ||
| 305 | }), | ||
| 306 | }; | ||
| 307 | result[@intFromEnum(Feature.msa)] = .{ | ||
| 308 | .llvm_name = "msa", | ||
| 309 | .description = "Mips MSA ASE", | ||
| 310 | .dependencies = featureSet(&[_]Feature{}), | ||
| 311 | }; | ||
| 312 | result[@intFromEnum(Feature.mt)] = .{ | ||
| 313 | .llvm_name = "mt", | ||
| 314 | .description = "Mips MT ASE", | ||
| 315 | .dependencies = featureSet(&[_]Feature{}), | ||
| 316 | }; | ||
| 317 | result[@intFromEnum(Feature.nan2008)] = .{ | ||
| 318 | .llvm_name = "nan2008", | ||
| 319 | .description = "IEEE 754-2008 NaN encoding", | ||
| 320 | .dependencies = featureSet(&[_]Feature{}), | ||
| 321 | }; | ||
| 322 | result[@intFromEnum(Feature.noabicalls)] = .{ | ||
| 323 | .llvm_name = "noabicalls", | ||
| 324 | .description = "Disable SVR4-style position-independent code", | ||
| 325 | .dependencies = featureSet(&[_]Feature{}), | ||
| 326 | }; | ||
| 327 | result[@intFromEnum(Feature.nomadd4)] = .{ | ||
| 328 | .llvm_name = "nomadd4", | ||
| 329 | .description = "Disable 4-operand madd.fmt and related instructions", | ||
| 330 | .dependencies = featureSet(&[_]Feature{}), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.nooddspreg)] = .{ | ||
| 333 | .llvm_name = "nooddspreg", | ||
| 334 | .description = "Disable odd numbered single-precision registers", | ||
| 335 | .dependencies = featureSet(&[_]Feature{}), | ||
| 336 | }; | ||
| 337 | result[@intFromEnum(Feature.p5600)] = .{ | ||
| 338 | .llvm_name = "p5600", | ||
| 339 | .description = "The P5600 Processor", | ||
| 340 | .dependencies = featureSet(&[_]Feature{ | ||
| 341 | .mips32r5, | ||
| 342 | }), | ||
| 343 | }; | ||
| 344 | result[@intFromEnum(Feature.ptr64)] = .{ | ||
| 345 | .llvm_name = "ptr64", | ||
| 346 | .description = "Pointers are 64-bit wide", | ||
| 347 | .dependencies = featureSet(&[_]Feature{}), | ||
| 348 | }; | ||
| 349 | result[@intFromEnum(Feature.single_float)] = .{ | ||
| 350 | .llvm_name = "single-float", | ||
| 351 | .description = "Only supports single precision float", | ||
| 352 | .dependencies = featureSet(&[_]Feature{}), | ||
| 353 | }; | ||
| 354 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 355 | .llvm_name = "soft-float", | ||
| 356 | .description = "Does not support floating point instructions", | ||
| 357 | .dependencies = featureSet(&[_]Feature{}), | ||
| 358 | }; | ||
| 359 | result[@intFromEnum(Feature.sym32)] = .{ | ||
| 360 | .llvm_name = "sym32", | ||
| 361 | .description = "Symbols are 32 bit on Mips64", | ||
| 362 | .dependencies = featureSet(&[_]Feature{}), | ||
| 363 | }; | ||
| 364 | result[@intFromEnum(Feature.use_indirect_jump_hazard)] = .{ | ||
| 365 | .llvm_name = "use-indirect-jump-hazard", | ||
| 366 | .description = "Use indirect jump guards to prevent certain speculation based attacks", | ||
| 367 | .dependencies = featureSet(&[_]Feature{}), | ||
| 368 | }; | ||
| 369 | result[@intFromEnum(Feature.use_tcc_in_div)] = .{ | ||
| 370 | .llvm_name = "use-tcc-in-div", | ||
| 371 | .description = "Force the assembler to use trapping", | ||
| 372 | .dependencies = featureSet(&[_]Feature{}), | ||
| 373 | }; | ||
| 374 | result[@intFromEnum(Feature.vfpu)] = .{ | ||
| 375 | .llvm_name = "vfpu", | ||
| 376 | .description = "Enable vector FPU instructions", | ||
| 377 | .dependencies = featureSet(&[_]Feature{}), | ||
| 378 | }; | ||
| 379 | result[@intFromEnum(Feature.virt)] = .{ | ||
| 380 | .llvm_name = "virt", | ||
| 381 | .description = "Mips Virtualization ASE", | ||
| 382 | .dependencies = featureSet(&[_]Feature{}), | ||
| 383 | }; | ||
| 384 | result[@intFromEnum(Feature.xgot)] = .{ | ||
| 385 | .llvm_name = "xgot", | ||
| 386 | .description = "Assume 32-bit GOT", | ||
| 387 | .dependencies = featureSet(&[_]Feature{}), | ||
| 388 | }; | ||
| 389 | const ti = @typeInfo(Feature); | ||
| 390 | for (&result, 0..) |*elem, i| { | ||
| 391 | elem.index = i; | ||
| 392 | elem.name = ti.Enum.fields[i].name; | ||
| 393 | } | ||
| 394 | break :blk result; | ||
| 395 | }; | ||
| 396 | |||
| 397 | pub const cpu = struct { | ||
| 398 | pub const generic = CpuModel{ | ||
| 399 | .name = "generic", | ||
| 400 | .llvm_name = "generic", | ||
| 401 | .features = featureSet(&[_]Feature{ | ||
| 402 | .mips32, | ||
| 403 | }), | ||
| 404 | }; | ||
| 405 | pub const mips1 = CpuModel{ | ||
| 406 | .name = "mips1", | ||
| 407 | .llvm_name = "mips1", | ||
| 408 | .features = featureSet(&[_]Feature{ | ||
| 409 | .mips1, | ||
| 410 | }), | ||
| 411 | }; | ||
| 412 | pub const mips2 = CpuModel{ | ||
| 413 | .name = "mips2", | ||
| 414 | .llvm_name = "mips2", | ||
| 415 | .features = featureSet(&[_]Feature{ | ||
| 416 | .mips2, | ||
| 417 | }), | ||
| 418 | }; | ||
| 419 | pub const mips3 = CpuModel{ | ||
| 420 | .name = "mips3", | ||
| 421 | .llvm_name = "mips3", | ||
| 422 | .features = featureSet(&[_]Feature{ | ||
| 423 | .mips3, | ||
| 424 | }), | ||
| 425 | }; | ||
| 426 | pub const mips32 = CpuModel{ | ||
| 427 | .name = "mips32", | ||
| 428 | .llvm_name = "mips32", | ||
| 429 | .features = featureSet(&[_]Feature{ | ||
| 430 | .mips32, | ||
| 431 | }), | ||
| 432 | }; | ||
| 433 | pub const mips32r2 = CpuModel{ | ||
| 434 | .name = "mips32r2", | ||
| 435 | .llvm_name = "mips32r2", | ||
| 436 | .features = featureSet(&[_]Feature{ | ||
| 437 | .mips32r2, | ||
| 438 | }), | ||
| 439 | }; | ||
| 440 | pub const mips32r3 = CpuModel{ | ||
| 441 | .name = "mips32r3", | ||
| 442 | .llvm_name = "mips32r3", | ||
| 443 | .features = featureSet(&[_]Feature{ | ||
| 444 | .mips32r3, | ||
| 445 | }), | ||
| 446 | }; | ||
| 447 | pub const mips32r5 = CpuModel{ | ||
| 448 | .name = "mips32r5", | ||
| 449 | .llvm_name = "mips32r5", | ||
| 450 | .features = featureSet(&[_]Feature{ | ||
| 451 | .mips32r5, | ||
| 452 | }), | ||
| 453 | }; | ||
| 454 | pub const mips32r6 = CpuModel{ | ||
| 455 | .name = "mips32r6", | ||
| 456 | .llvm_name = "mips32r6", | ||
| 457 | .features = featureSet(&[_]Feature{ | ||
| 458 | .mips32r6, | ||
| 459 | }), | ||
| 460 | }; | ||
| 461 | pub const mips4 = CpuModel{ | ||
| 462 | .name = "mips4", | ||
| 463 | .llvm_name = "mips4", | ||
| 464 | .features = featureSet(&[_]Feature{ | ||
| 465 | .mips4, | ||
| 466 | }), | ||
| 467 | }; | ||
| 468 | pub const mips5 = CpuModel{ | ||
| 469 | .name = "mips5", | ||
| 470 | .llvm_name = "mips5", | ||
| 471 | .features = featureSet(&[_]Feature{ | ||
| 472 | .mips5, | ||
| 473 | }), | ||
| 474 | }; | ||
| 475 | pub const mips64 = CpuModel{ | ||
| 476 | .name = "mips64", | ||
| 477 | .llvm_name = "mips64", | ||
| 478 | .features = featureSet(&[_]Feature{ | ||
| 479 | .mips64, | ||
| 480 | }), | ||
| 481 | }; | ||
| 482 | pub const mips64r2 = CpuModel{ | ||
| 483 | .name = "mips64r2", | ||
| 484 | .llvm_name = "mips64r2", | ||
| 485 | .features = featureSet(&[_]Feature{ | ||
| 486 | .mips64r2, | ||
| 487 | }), | ||
| 488 | }; | ||
| 489 | pub const mips64r3 = CpuModel{ | ||
| 490 | .name = "mips64r3", | ||
| 491 | .llvm_name = "mips64r3", | ||
| 492 | .features = featureSet(&[_]Feature{ | ||
| 493 | .mips64r3, | ||
| 494 | }), | ||
| 495 | }; | ||
| 496 | pub const mips64r5 = CpuModel{ | ||
| 497 | .name = "mips64r5", | ||
| 498 | .llvm_name = "mips64r5", | ||
| 499 | .features = featureSet(&[_]Feature{ | ||
| 500 | .mips64r5, | ||
| 501 | }), | ||
| 502 | }; | ||
| 503 | pub const mips64r6 = CpuModel{ | ||
| 504 | .name = "mips64r6", | ||
| 505 | .llvm_name = "mips64r6", | ||
| 506 | .features = featureSet(&[_]Feature{ | ||
| 507 | .mips64r6, | ||
| 508 | }), | ||
| 509 | }; | ||
| 510 | pub const octeon = CpuModel{ | ||
| 511 | .name = "octeon", | ||
| 512 | .llvm_name = "octeon", | ||
| 513 | .features = featureSet(&[_]Feature{ | ||
| 514 | .cnmips, | ||
| 515 | }), | ||
| 516 | }; | ||
| 517 | pub const @"octeon+" = CpuModel{ | ||
| 518 | .name = "octeon+", | ||
| 519 | .llvm_name = "octeon+", | ||
| 520 | .features = featureSet(&[_]Feature{ | ||
| 521 | .cnmipsp, | ||
| 522 | }), | ||
| 523 | }; | ||
| 524 | pub const p5600 = CpuModel{ | ||
| 525 | .name = "p5600", | ||
| 526 | .llvm_name = "p5600", | ||
| 527 | .features = featureSet(&[_]Feature{ | ||
| 528 | .p5600, | ||
| 529 | }), | ||
| 530 | }; | ||
| 531 | }; | ||
lib/std/Target/msp430.zig created+69
| ... | @@ -0,0 +1,69 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | ext, | ||
| 9 | hwmult16, | ||
| 10 | hwmult32, | ||
| 11 | hwmultf5, | ||
| 12 | }; | ||
| 13 | |||
| 14 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 15 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 16 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 17 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 18 | |||
| 19 | pub const all_features = blk: { | ||
| 20 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 21 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 22 | var result: [len]CpuFeature = undefined; | ||
| 23 | result[@intFromEnum(Feature.ext)] = .{ | ||
| 24 | .llvm_name = "ext", | ||
| 25 | .description = "Enable MSP430-X extensions", | ||
| 26 | .dependencies = featureSet(&[_]Feature{}), | ||
| 27 | }; | ||
| 28 | result[@intFromEnum(Feature.hwmult16)] = .{ | ||
| 29 | .llvm_name = "hwmult16", | ||
| 30 | .description = "Enable 16-bit hardware multiplier", | ||
| 31 | .dependencies = featureSet(&[_]Feature{}), | ||
| 32 | }; | ||
| 33 | result[@intFromEnum(Feature.hwmult32)] = .{ | ||
| 34 | .llvm_name = "hwmult32", | ||
| 35 | .description = "Enable 32-bit hardware multiplier", | ||
| 36 | .dependencies = featureSet(&[_]Feature{}), | ||
| 37 | }; | ||
| 38 | result[@intFromEnum(Feature.hwmultf5)] = .{ | ||
| 39 | .llvm_name = "hwmultf5", | ||
| 40 | .description = "Enable F5 series hardware multiplier", | ||
| 41 | .dependencies = featureSet(&[_]Feature{}), | ||
| 42 | }; | ||
| 43 | const ti = @typeInfo(Feature); | ||
| 44 | for (&result, 0..) |*elem, i| { | ||
| 45 | elem.index = i; | ||
| 46 | elem.name = ti.Enum.fields[i].name; | ||
| 47 | } | ||
| 48 | break :blk result; | ||
| 49 | }; | ||
| 50 | |||
| 51 | pub const cpu = struct { | ||
| 52 | pub const generic = CpuModel{ | ||
| 53 | .name = "generic", | ||
| 54 | .llvm_name = "generic", | ||
| 55 | .features = featureSet(&[_]Feature{}), | ||
| 56 | }; | ||
| 57 | pub const msp430 = CpuModel{ | ||
| 58 | .name = "msp430", | ||
| 59 | .llvm_name = "msp430", | ||
| 60 | .features = featureSet(&[_]Feature{}), | ||
| 61 | }; | ||
| 62 | pub const msp430x = CpuModel{ | ||
| 63 | .name = "msp430x", | ||
| 64 | .llvm_name = "msp430x", | ||
| 65 | .features = featureSet(&[_]Feature{ | ||
| 66 | .ext, | ||
| 67 | }), | ||
| 68 | }; | ||
| 69 | }; | ||
lib/std/Target/nvptx.zig created+439
| ... | @@ -0,0 +1,439 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | ptx32, | ||
| 9 | ptx40, | ||
| 10 | ptx41, | ||
| 11 | ptx42, | ||
| 12 | ptx43, | ||
| 13 | ptx50, | ||
| 14 | ptx60, | ||
| 15 | ptx61, | ||
| 16 | ptx63, | ||
| 17 | ptx64, | ||
| 18 | ptx65, | ||
| 19 | ptx70, | ||
| 20 | ptx71, | ||
| 21 | ptx72, | ||
| 22 | ptx73, | ||
| 23 | ptx74, | ||
| 24 | ptx75, | ||
| 25 | ptx76, | ||
| 26 | ptx77, | ||
| 27 | ptx78, | ||
| 28 | ptx80, | ||
| 29 | ptx81, | ||
| 30 | sm_20, | ||
| 31 | sm_21, | ||
| 32 | sm_30, | ||
| 33 | sm_32, | ||
| 34 | sm_35, | ||
| 35 | sm_37, | ||
| 36 | sm_50, | ||
| 37 | sm_52, | ||
| 38 | sm_53, | ||
| 39 | sm_60, | ||
| 40 | sm_61, | ||
| 41 | sm_62, | ||
| 42 | sm_70, | ||
| 43 | sm_72, | ||
| 44 | sm_75, | ||
| 45 | sm_80, | ||
| 46 | sm_86, | ||
| 47 | sm_87, | ||
| 48 | sm_89, | ||
| 49 | sm_90, | ||
| 50 | }; | ||
| 51 | |||
| 52 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 53 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 54 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 55 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 56 | |||
| 57 | pub const all_features = blk: { | ||
| 58 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 59 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 60 | var result: [len]CpuFeature = undefined; | ||
| 61 | result[@intFromEnum(Feature.ptx32)] = .{ | ||
| 62 | .llvm_name = "ptx32", | ||
| 63 | .description = "Use PTX version 32", | ||
| 64 | .dependencies = featureSet(&[_]Feature{}), | ||
| 65 | }; | ||
| 66 | result[@intFromEnum(Feature.ptx40)] = .{ | ||
| 67 | .llvm_name = "ptx40", | ||
| 68 | .description = "Use PTX version 40", | ||
| 69 | .dependencies = featureSet(&[_]Feature{}), | ||
| 70 | }; | ||
| 71 | result[@intFromEnum(Feature.ptx41)] = .{ | ||
| 72 | .llvm_name = "ptx41", | ||
| 73 | .description = "Use PTX version 41", | ||
| 74 | .dependencies = featureSet(&[_]Feature{}), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.ptx42)] = .{ | ||
| 77 | .llvm_name = "ptx42", | ||
| 78 | .description = "Use PTX version 42", | ||
| 79 | .dependencies = featureSet(&[_]Feature{}), | ||
| 80 | }; | ||
| 81 | result[@intFromEnum(Feature.ptx43)] = .{ | ||
| 82 | .llvm_name = "ptx43", | ||
| 83 | .description = "Use PTX version 43", | ||
| 84 | .dependencies = featureSet(&[_]Feature{}), | ||
| 85 | }; | ||
| 86 | result[@intFromEnum(Feature.ptx50)] = .{ | ||
| 87 | .llvm_name = "ptx50", | ||
| 88 | .description = "Use PTX version 50", | ||
| 89 | .dependencies = featureSet(&[_]Feature{}), | ||
| 90 | }; | ||
| 91 | result[@intFromEnum(Feature.ptx60)] = .{ | ||
| 92 | .llvm_name = "ptx60", | ||
| 93 | .description = "Use PTX version 60", | ||
| 94 | .dependencies = featureSet(&[_]Feature{}), | ||
| 95 | }; | ||
| 96 | result[@intFromEnum(Feature.ptx61)] = .{ | ||
| 97 | .llvm_name = "ptx61", | ||
| 98 | .description = "Use PTX version 61", | ||
| 99 | .dependencies = featureSet(&[_]Feature{}), | ||
| 100 | }; | ||
| 101 | result[@intFromEnum(Feature.ptx63)] = .{ | ||
| 102 | .llvm_name = "ptx63", | ||
| 103 | .description = "Use PTX version 63", | ||
| 104 | .dependencies = featureSet(&[_]Feature{}), | ||
| 105 | }; | ||
| 106 | result[@intFromEnum(Feature.ptx64)] = .{ | ||
| 107 | .llvm_name = "ptx64", | ||
| 108 | .description = "Use PTX version 64", | ||
| 109 | .dependencies = featureSet(&[_]Feature{}), | ||
| 110 | }; | ||
| 111 | result[@intFromEnum(Feature.ptx65)] = .{ | ||
| 112 | .llvm_name = "ptx65", | ||
| 113 | .description = "Use PTX version 65", | ||
| 114 | .dependencies = featureSet(&[_]Feature{}), | ||
| 115 | }; | ||
| 116 | result[@intFromEnum(Feature.ptx70)] = .{ | ||
| 117 | .llvm_name = "ptx70", | ||
| 118 | .description = "Use PTX version 70", | ||
| 119 | .dependencies = featureSet(&[_]Feature{}), | ||
| 120 | }; | ||
| 121 | result[@intFromEnum(Feature.ptx71)] = .{ | ||
| 122 | .llvm_name = "ptx71", | ||
| 123 | .description = "Use PTX version 71", | ||
| 124 | .dependencies = featureSet(&[_]Feature{}), | ||
| 125 | }; | ||
| 126 | result[@intFromEnum(Feature.ptx72)] = .{ | ||
| 127 | .llvm_name = "ptx72", | ||
| 128 | .description = "Use PTX version 72", | ||
| 129 | .dependencies = featureSet(&[_]Feature{}), | ||
| 130 | }; | ||
| 131 | result[@intFromEnum(Feature.ptx73)] = .{ | ||
| 132 | .llvm_name = "ptx73", | ||
| 133 | .description = "Use PTX version 73", | ||
| 134 | .dependencies = featureSet(&[_]Feature{}), | ||
| 135 | }; | ||
| 136 | result[@intFromEnum(Feature.ptx74)] = .{ | ||
| 137 | .llvm_name = "ptx74", | ||
| 138 | .description = "Use PTX version 74", | ||
| 139 | .dependencies = featureSet(&[_]Feature{}), | ||
| 140 | }; | ||
| 141 | result[@intFromEnum(Feature.ptx75)] = .{ | ||
| 142 | .llvm_name = "ptx75", | ||
| 143 | .description = "Use PTX version 75", | ||
| 144 | .dependencies = featureSet(&[_]Feature{}), | ||
| 145 | }; | ||
| 146 | result[@intFromEnum(Feature.ptx76)] = .{ | ||
| 147 | .llvm_name = "ptx76", | ||
| 148 | .description = "Use PTX version 76", | ||
| 149 | .dependencies = featureSet(&[_]Feature{}), | ||
| 150 | }; | ||
| 151 | result[@intFromEnum(Feature.ptx77)] = .{ | ||
| 152 | .llvm_name = "ptx77", | ||
| 153 | .description = "Use PTX version 77", | ||
| 154 | .dependencies = featureSet(&[_]Feature{}), | ||
| 155 | }; | ||
| 156 | result[@intFromEnum(Feature.ptx78)] = .{ | ||
| 157 | .llvm_name = "ptx78", | ||
| 158 | .description = "Use PTX version 78", | ||
| 159 | .dependencies = featureSet(&[_]Feature{}), | ||
| 160 | }; | ||
| 161 | result[@intFromEnum(Feature.ptx80)] = .{ | ||
| 162 | .llvm_name = "ptx80", | ||
| 163 | .description = "Use PTX version 80", | ||
| 164 | .dependencies = featureSet(&[_]Feature{}), | ||
| 165 | }; | ||
| 166 | result[@intFromEnum(Feature.ptx81)] = .{ | ||
| 167 | .llvm_name = "ptx81", | ||
| 168 | .description = "Use PTX version 81", | ||
| 169 | .dependencies = featureSet(&[_]Feature{}), | ||
| 170 | }; | ||
| 171 | result[@intFromEnum(Feature.sm_20)] = .{ | ||
| 172 | .llvm_name = "sm_20", | ||
| 173 | .description = "Target SM 20", | ||
| 174 | .dependencies = featureSet(&[_]Feature{}), | ||
| 175 | }; | ||
| 176 | result[@intFromEnum(Feature.sm_21)] = .{ | ||
| 177 | .llvm_name = "sm_21", | ||
| 178 | .description = "Target SM 21", | ||
| 179 | .dependencies = featureSet(&[_]Feature{}), | ||
| 180 | }; | ||
| 181 | result[@intFromEnum(Feature.sm_30)] = .{ | ||
| 182 | .llvm_name = "sm_30", | ||
| 183 | .description = "Target SM 30", | ||
| 184 | .dependencies = featureSet(&[_]Feature{}), | ||
| 185 | }; | ||
| 186 | result[@intFromEnum(Feature.sm_32)] = .{ | ||
| 187 | .llvm_name = "sm_32", | ||
| 188 | .description = "Target SM 32", | ||
| 189 | .dependencies = featureSet(&[_]Feature{}), | ||
| 190 | }; | ||
| 191 | result[@intFromEnum(Feature.sm_35)] = .{ | ||
| 192 | .llvm_name = "sm_35", | ||
| 193 | .description = "Target SM 35", | ||
| 194 | .dependencies = featureSet(&[_]Feature{}), | ||
| 195 | }; | ||
| 196 | result[@intFromEnum(Feature.sm_37)] = .{ | ||
| 197 | .llvm_name = "sm_37", | ||
| 198 | .description = "Target SM 37", | ||
| 199 | .dependencies = featureSet(&[_]Feature{}), | ||
| 200 | }; | ||
| 201 | result[@intFromEnum(Feature.sm_50)] = .{ | ||
| 202 | .llvm_name = "sm_50", | ||
| 203 | .description = "Target SM 50", | ||
| 204 | .dependencies = featureSet(&[_]Feature{}), | ||
| 205 | }; | ||
| 206 | result[@intFromEnum(Feature.sm_52)] = .{ | ||
| 207 | .llvm_name = "sm_52", | ||
| 208 | .description = "Target SM 52", | ||
| 209 | .dependencies = featureSet(&[_]Feature{}), | ||
| 210 | }; | ||
| 211 | result[@intFromEnum(Feature.sm_53)] = .{ | ||
| 212 | .llvm_name = "sm_53", | ||
| 213 | .description = "Target SM 53", | ||
| 214 | .dependencies = featureSet(&[_]Feature{}), | ||
| 215 | }; | ||
| 216 | result[@intFromEnum(Feature.sm_60)] = .{ | ||
| 217 | .llvm_name = "sm_60", | ||
| 218 | .description = "Target SM 60", | ||
| 219 | .dependencies = featureSet(&[_]Feature{}), | ||
| 220 | }; | ||
| 221 | result[@intFromEnum(Feature.sm_61)] = .{ | ||
| 222 | .llvm_name = "sm_61", | ||
| 223 | .description = "Target SM 61", | ||
| 224 | .dependencies = featureSet(&[_]Feature{}), | ||
| 225 | }; | ||
| 226 | result[@intFromEnum(Feature.sm_62)] = .{ | ||
| 227 | .llvm_name = "sm_62", | ||
| 228 | .description = "Target SM 62", | ||
| 229 | .dependencies = featureSet(&[_]Feature{}), | ||
| 230 | }; | ||
| 231 | result[@intFromEnum(Feature.sm_70)] = .{ | ||
| 232 | .llvm_name = "sm_70", | ||
| 233 | .description = "Target SM 70", | ||
| 234 | .dependencies = featureSet(&[_]Feature{}), | ||
| 235 | }; | ||
| 236 | result[@intFromEnum(Feature.sm_72)] = .{ | ||
| 237 | .llvm_name = "sm_72", | ||
| 238 | .description = "Target SM 72", | ||
| 239 | .dependencies = featureSet(&[_]Feature{}), | ||
| 240 | }; | ||
| 241 | result[@intFromEnum(Feature.sm_75)] = .{ | ||
| 242 | .llvm_name = "sm_75", | ||
| 243 | .description = "Target SM 75", | ||
| 244 | .dependencies = featureSet(&[_]Feature{}), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.sm_80)] = .{ | ||
| 247 | .llvm_name = "sm_80", | ||
| 248 | .description = "Target SM 80", | ||
| 249 | .dependencies = featureSet(&[_]Feature{}), | ||
| 250 | }; | ||
| 251 | result[@intFromEnum(Feature.sm_86)] = .{ | ||
| 252 | .llvm_name = "sm_86", | ||
| 253 | .description = "Target SM 86", | ||
| 254 | .dependencies = featureSet(&[_]Feature{}), | ||
| 255 | }; | ||
| 256 | result[@intFromEnum(Feature.sm_87)] = .{ | ||
| 257 | .llvm_name = "sm_87", | ||
| 258 | .description = "Target SM 87", | ||
| 259 | .dependencies = featureSet(&[_]Feature{}), | ||
| 260 | }; | ||
| 261 | result[@intFromEnum(Feature.sm_89)] = .{ | ||
| 262 | .llvm_name = "sm_89", | ||
| 263 | .description = "Target SM 89", | ||
| 264 | .dependencies = featureSet(&[_]Feature{}), | ||
| 265 | }; | ||
| 266 | result[@intFromEnum(Feature.sm_90)] = .{ | ||
| 267 | .llvm_name = "sm_90", | ||
| 268 | .description = "Target SM 90", | ||
| 269 | .dependencies = featureSet(&[_]Feature{}), | ||
| 270 | }; | ||
| 271 | const ti = @typeInfo(Feature); | ||
| 272 | for (&result, 0..) |*elem, i| { | ||
| 273 | elem.index = i; | ||
| 274 | elem.name = ti.Enum.fields[i].name; | ||
| 275 | } | ||
| 276 | break :blk result; | ||
| 277 | }; | ||
| 278 | |||
| 279 | pub const cpu = struct { | ||
| 280 | pub const sm_20 = CpuModel{ | ||
| 281 | .name = "sm_20", | ||
| 282 | .llvm_name = "sm_20", | ||
| 283 | .features = featureSet(&[_]Feature{ | ||
| 284 | .ptx32, | ||
| 285 | .sm_20, | ||
| 286 | }), | ||
| 287 | }; | ||
| 288 | pub const sm_21 = CpuModel{ | ||
| 289 | .name = "sm_21", | ||
| 290 | .llvm_name = "sm_21", | ||
| 291 | .features = featureSet(&[_]Feature{ | ||
| 292 | .ptx32, | ||
| 293 | .sm_21, | ||
| 294 | }), | ||
| 295 | }; | ||
| 296 | pub const sm_30 = CpuModel{ | ||
| 297 | .name = "sm_30", | ||
| 298 | .llvm_name = "sm_30", | ||
| 299 | .features = featureSet(&[_]Feature{ | ||
| 300 | .sm_30, | ||
| 301 | }), | ||
| 302 | }; | ||
| 303 | pub const sm_32 = CpuModel{ | ||
| 304 | .name = "sm_32", | ||
| 305 | .llvm_name = "sm_32", | ||
| 306 | .features = featureSet(&[_]Feature{ | ||
| 307 | .ptx40, | ||
| 308 | .sm_32, | ||
| 309 | }), | ||
| 310 | }; | ||
| 311 | pub const sm_35 = CpuModel{ | ||
| 312 | .name = "sm_35", | ||
| 313 | .llvm_name = "sm_35", | ||
| 314 | .features = featureSet(&[_]Feature{ | ||
| 315 | .ptx32, | ||
| 316 | .sm_35, | ||
| 317 | }), | ||
| 318 | }; | ||
| 319 | pub const sm_37 = CpuModel{ | ||
| 320 | .name = "sm_37", | ||
| 321 | .llvm_name = "sm_37", | ||
| 322 | .features = featureSet(&[_]Feature{ | ||
| 323 | .ptx41, | ||
| 324 | .sm_37, | ||
| 325 | }), | ||
| 326 | }; | ||
| 327 | pub const sm_50 = CpuModel{ | ||
| 328 | .name = "sm_50", | ||
| 329 | .llvm_name = "sm_50", | ||
| 330 | .features = featureSet(&[_]Feature{ | ||
| 331 | .ptx40, | ||
| 332 | .sm_50, | ||
| 333 | }), | ||
| 334 | }; | ||
| 335 | pub const sm_52 = CpuModel{ | ||
| 336 | .name = "sm_52", | ||
| 337 | .llvm_name = "sm_52", | ||
| 338 | .features = featureSet(&[_]Feature{ | ||
| 339 | .ptx41, | ||
| 340 | .sm_52, | ||
| 341 | }), | ||
| 342 | }; | ||
| 343 | pub const sm_53 = CpuModel{ | ||
| 344 | .name = "sm_53", | ||
| 345 | .llvm_name = "sm_53", | ||
| 346 | .features = featureSet(&[_]Feature{ | ||
| 347 | .ptx42, | ||
| 348 | .sm_53, | ||
| 349 | }), | ||
| 350 | }; | ||
| 351 | pub const sm_60 = CpuModel{ | ||
| 352 | .name = "sm_60", | ||
| 353 | .llvm_name = "sm_60", | ||
| 354 | .features = featureSet(&[_]Feature{ | ||
| 355 | .ptx50, | ||
| 356 | .sm_60, | ||
| 357 | }), | ||
| 358 | }; | ||
| 359 | pub const sm_61 = CpuModel{ | ||
| 360 | .name = "sm_61", | ||
| 361 | .llvm_name = "sm_61", | ||
| 362 | .features = featureSet(&[_]Feature{ | ||
| 363 | .ptx50, | ||
| 364 | .sm_61, | ||
| 365 | }), | ||
| 366 | }; | ||
| 367 | pub const sm_62 = CpuModel{ | ||
| 368 | .name = "sm_62", | ||
| 369 | .llvm_name = "sm_62", | ||
| 370 | .features = featureSet(&[_]Feature{ | ||
| 371 | .ptx50, | ||
| 372 | .sm_62, | ||
| 373 | }), | ||
| 374 | }; | ||
| 375 | pub const sm_70 = CpuModel{ | ||
| 376 | .name = "sm_70", | ||
| 377 | .llvm_name = "sm_70", | ||
| 378 | .features = featureSet(&[_]Feature{ | ||
| 379 | .ptx60, | ||
| 380 | .sm_70, | ||
| 381 | }), | ||
| 382 | }; | ||
| 383 | pub const sm_72 = CpuModel{ | ||
| 384 | .name = "sm_72", | ||
| 385 | .llvm_name = "sm_72", | ||
| 386 | .features = featureSet(&[_]Feature{ | ||
| 387 | .ptx61, | ||
| 388 | .sm_72, | ||
| 389 | }), | ||
| 390 | }; | ||
| 391 | pub const sm_75 = CpuModel{ | ||
| 392 | .name = "sm_75", | ||
| 393 | .llvm_name = "sm_75", | ||
| 394 | .features = featureSet(&[_]Feature{ | ||
| 395 | .ptx63, | ||
| 396 | .sm_75, | ||
| 397 | }), | ||
| 398 | }; | ||
| 399 | pub const sm_80 = CpuModel{ | ||
| 400 | .name = "sm_80", | ||
| 401 | .llvm_name = "sm_80", | ||
| 402 | .features = featureSet(&[_]Feature{ | ||
| 403 | .ptx70, | ||
| 404 | .sm_80, | ||
| 405 | }), | ||
| 406 | }; | ||
| 407 | pub const sm_86 = CpuModel{ | ||
| 408 | .name = "sm_86", | ||
| 409 | .llvm_name = "sm_86", | ||
| 410 | .features = featureSet(&[_]Feature{ | ||
| 411 | .ptx71, | ||
| 412 | .sm_86, | ||
| 413 | }), | ||
| 414 | }; | ||
| 415 | pub const sm_87 = CpuModel{ | ||
| 416 | .name = "sm_87", | ||
| 417 | .llvm_name = "sm_87", | ||
| 418 | .features = featureSet(&[_]Feature{ | ||
| 419 | .ptx74, | ||
| 420 | .sm_87, | ||
| 421 | }), | ||
| 422 | }; | ||
| 423 | pub const sm_89 = CpuModel{ | ||
| 424 | .name = "sm_89", | ||
| 425 | .llvm_name = "sm_89", | ||
| 426 | .features = featureSet(&[_]Feature{ | ||
| 427 | .ptx78, | ||
| 428 | .sm_89, | ||
| 429 | }), | ||
| 430 | }; | ||
| 431 | pub const sm_90 = CpuModel{ | ||
| 432 | .name = "sm_90", | ||
| 433 | .llvm_name = "sm_90", | ||
| 434 | .features = featureSet(&[_]Feature{ | ||
| 435 | .ptx78, | ||
| 436 | .sm_90, | ||
| 437 | }), | ||
| 438 | }; | ||
| 439 | }; | ||
lib/std/Target/powerpc.zig created+1192
| ... | @@ -0,0 +1,1192 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"64bit", | ||
| 9 | @"64bitregs", | ||
| 10 | aix, | ||
| 11 | allow_unaligned_fp_access, | ||
| 12 | altivec, | ||
| 13 | booke, | ||
| 14 | bpermd, | ||
| 15 | cmpb, | ||
| 16 | crbits, | ||
| 17 | crypto, | ||
| 18 | direct_move, | ||
| 19 | e500, | ||
| 20 | efpu2, | ||
| 21 | extdiv, | ||
| 22 | fast_MFLR, | ||
| 23 | fcpsgn, | ||
| 24 | float128, | ||
| 25 | fpcvt, | ||
| 26 | fprnd, | ||
| 27 | fpu, | ||
| 28 | fre, | ||
| 29 | fres, | ||
| 30 | frsqrte, | ||
| 31 | frsqrtes, | ||
| 32 | fsqrt, | ||
| 33 | fuse_add_logical, | ||
| 34 | fuse_addi_load, | ||
| 35 | fuse_addis_load, | ||
| 36 | fuse_arith_add, | ||
| 37 | fuse_back2back, | ||
| 38 | fuse_cmp, | ||
| 39 | fuse_logical, | ||
| 40 | fuse_logical_add, | ||
| 41 | fuse_sha3, | ||
| 42 | fuse_store, | ||
| 43 | fuse_wideimm, | ||
| 44 | fuse_zeromove, | ||
| 45 | fusion, | ||
| 46 | hard_float, | ||
| 47 | htm, | ||
| 48 | icbt, | ||
| 49 | invariant_function_descriptors, | ||
| 50 | isa_future_instructions, | ||
| 51 | isa_v206_instructions, | ||
| 52 | isa_v207_instructions, | ||
| 53 | isa_v30_instructions, | ||
| 54 | isa_v31_instructions, | ||
| 55 | isel, | ||
| 56 | ldbrx, | ||
| 57 | lfiwax, | ||
| 58 | longcall, | ||
| 59 | mfocrf, | ||
| 60 | mma, | ||
| 61 | modern_aix_as, | ||
| 62 | msync, | ||
| 63 | paired_vector_memops, | ||
| 64 | partword_atomics, | ||
| 65 | pcrelative_memops, | ||
| 66 | popcntd, | ||
| 67 | power10_vector, | ||
| 68 | power8_altivec, | ||
| 69 | power8_vector, | ||
| 70 | power9_altivec, | ||
| 71 | power9_vector, | ||
| 72 | ppc4xx, | ||
| 73 | ppc6xx, | ||
| 74 | ppc_postra_sched, | ||
| 75 | ppc_prera_sched, | ||
| 76 | predictable_select_expensive, | ||
| 77 | prefix_instrs, | ||
| 78 | privileged, | ||
| 79 | quadword_atomics, | ||
| 80 | recipprec, | ||
| 81 | rop_protect, | ||
| 82 | secure_plt, | ||
| 83 | slow_popcntd, | ||
| 84 | spe, | ||
| 85 | stfiwx, | ||
| 86 | two_const_nr, | ||
| 87 | vectors_use_two_units, | ||
| 88 | vsx, | ||
| 89 | }; | ||
| 90 | |||
| 91 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 92 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 93 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 94 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 95 | |||
| 96 | pub const all_features = blk: { | ||
| 97 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 98 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 99 | var result: [len]CpuFeature = undefined; | ||
| 100 | result[@intFromEnum(Feature.@"64bit")] = .{ | ||
| 101 | .llvm_name = "64bit", | ||
| 102 | .description = "Enable 64-bit instructions", | ||
| 103 | .dependencies = featureSet(&[_]Feature{}), | ||
| 104 | }; | ||
| 105 | result[@intFromEnum(Feature.@"64bitregs")] = .{ | ||
| 106 | .llvm_name = "64bitregs", | ||
| 107 | .description = "Enable 64-bit registers usage for ppc32 [beta]", | ||
| 108 | .dependencies = featureSet(&[_]Feature{}), | ||
| 109 | }; | ||
| 110 | result[@intFromEnum(Feature.aix)] = .{ | ||
| 111 | .llvm_name = "aix", | ||
| 112 | .description = "AIX OS", | ||
| 113 | .dependencies = featureSet(&[_]Feature{}), | ||
| 114 | }; | ||
| 115 | result[@intFromEnum(Feature.allow_unaligned_fp_access)] = .{ | ||
| 116 | .llvm_name = "allow-unaligned-fp-access", | ||
| 117 | .description = "CPU does not trap on unaligned FP access", | ||
| 118 | .dependencies = featureSet(&[_]Feature{}), | ||
| 119 | }; | ||
| 120 | result[@intFromEnum(Feature.altivec)] = .{ | ||
| 121 | .llvm_name = "altivec", | ||
| 122 | .description = "Enable Altivec instructions", | ||
| 123 | .dependencies = featureSet(&[_]Feature{ | ||
| 124 | .fpu, | ||
| 125 | }), | ||
| 126 | }; | ||
| 127 | result[@intFromEnum(Feature.booke)] = .{ | ||
| 128 | .llvm_name = "booke", | ||
| 129 | .description = "Enable Book E instructions", | ||
| 130 | .dependencies = featureSet(&[_]Feature{ | ||
| 131 | .icbt, | ||
| 132 | }), | ||
| 133 | }; | ||
| 134 | result[@intFromEnum(Feature.bpermd)] = .{ | ||
| 135 | .llvm_name = "bpermd", | ||
| 136 | .description = "Enable the bpermd instruction", | ||
| 137 | .dependencies = featureSet(&[_]Feature{}), | ||
| 138 | }; | ||
| 139 | result[@intFromEnum(Feature.cmpb)] = .{ | ||
| 140 | .llvm_name = "cmpb", | ||
| 141 | .description = "Enable the cmpb instruction", | ||
| 142 | .dependencies = featureSet(&[_]Feature{}), | ||
| 143 | }; | ||
| 144 | result[@intFromEnum(Feature.crbits)] = .{ | ||
| 145 | .llvm_name = "crbits", | ||
| 146 | .description = "Use condition-register bits individually", | ||
| 147 | .dependencies = featureSet(&[_]Feature{}), | ||
| 148 | }; | ||
| 149 | result[@intFromEnum(Feature.crypto)] = .{ | ||
| 150 | .llvm_name = "crypto", | ||
| 151 | .description = "Enable POWER8 Crypto instructions", | ||
| 152 | .dependencies = featureSet(&[_]Feature{ | ||
| 153 | .power8_altivec, | ||
| 154 | }), | ||
| 155 | }; | ||
| 156 | result[@intFromEnum(Feature.direct_move)] = .{ | ||
| 157 | .llvm_name = "direct-move", | ||
| 158 | .description = "Enable Power8 direct move instructions", | ||
| 159 | .dependencies = featureSet(&[_]Feature{ | ||
| 160 | .vsx, | ||
| 161 | }), | ||
| 162 | }; | ||
| 163 | result[@intFromEnum(Feature.e500)] = .{ | ||
| 164 | .llvm_name = "e500", | ||
| 165 | .description = "Enable E500/E500mc instructions", | ||
| 166 | .dependencies = featureSet(&[_]Feature{}), | ||
| 167 | }; | ||
| 168 | result[@intFromEnum(Feature.efpu2)] = .{ | ||
| 169 | .llvm_name = "efpu2", | ||
| 170 | .description = "Enable Embedded Floating-Point APU 2 instructions", | ||
| 171 | .dependencies = featureSet(&[_]Feature{ | ||
| 172 | .spe, | ||
| 173 | }), | ||
| 174 | }; | ||
| 175 | result[@intFromEnum(Feature.extdiv)] = .{ | ||
| 176 | .llvm_name = "extdiv", | ||
| 177 | .description = "Enable extended divide instructions", | ||
| 178 | .dependencies = featureSet(&[_]Feature{}), | ||
| 179 | }; | ||
| 180 | result[@intFromEnum(Feature.fast_MFLR)] = .{ | ||
| 181 | .llvm_name = "fast-MFLR", | ||
| 182 | .description = "MFLR is a fast instruction", | ||
| 183 | .dependencies = featureSet(&[_]Feature{}), | ||
| 184 | }; | ||
| 185 | result[@intFromEnum(Feature.fcpsgn)] = .{ | ||
| 186 | .llvm_name = "fcpsgn", | ||
| 187 | .description = "Enable the fcpsgn instruction", | ||
| 188 | .dependencies = featureSet(&[_]Feature{ | ||
| 189 | .fpu, | ||
| 190 | }), | ||
| 191 | }; | ||
| 192 | result[@intFromEnum(Feature.float128)] = .{ | ||
| 193 | .llvm_name = "float128", | ||
| 194 | .description = "Enable the __float128 data type for IEEE-754R Binary128.", | ||
| 195 | .dependencies = featureSet(&[_]Feature{ | ||
| 196 | .vsx, | ||
| 197 | }), | ||
| 198 | }; | ||
| 199 | result[@intFromEnum(Feature.fpcvt)] = .{ | ||
| 200 | .llvm_name = "fpcvt", | ||
| 201 | .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", | ||
| 202 | .dependencies = featureSet(&[_]Feature{ | ||
| 203 | .fpu, | ||
| 204 | }), | ||
| 205 | }; | ||
| 206 | result[@intFromEnum(Feature.fprnd)] = .{ | ||
| 207 | .llvm_name = "fprnd", | ||
| 208 | .description = "Enable the fri[mnpz] instructions", | ||
| 209 | .dependencies = featureSet(&[_]Feature{ | ||
| 210 | .fpu, | ||
| 211 | }), | ||
| 212 | }; | ||
| 213 | result[@intFromEnum(Feature.fpu)] = .{ | ||
| 214 | .llvm_name = "fpu", | ||
| 215 | .description = "Enable classic FPU instructions", | ||
| 216 | .dependencies = featureSet(&[_]Feature{ | ||
| 217 | .hard_float, | ||
| 218 | }), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.fre)] = .{ | ||
| 221 | .llvm_name = "fre", | ||
| 222 | .description = "Enable the fre instruction", | ||
| 223 | .dependencies = featureSet(&[_]Feature{ | ||
| 224 | .fpu, | ||
| 225 | }), | ||
| 226 | }; | ||
| 227 | result[@intFromEnum(Feature.fres)] = .{ | ||
| 228 | .llvm_name = "fres", | ||
| 229 | .description = "Enable the fres instruction", | ||
| 230 | .dependencies = featureSet(&[_]Feature{ | ||
| 231 | .fpu, | ||
| 232 | }), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.frsqrte)] = .{ | ||
| 235 | .llvm_name = "frsqrte", | ||
| 236 | .description = "Enable the frsqrte instruction", | ||
| 237 | .dependencies = featureSet(&[_]Feature{ | ||
| 238 | .fpu, | ||
| 239 | }), | ||
| 240 | }; | ||
| 241 | result[@intFromEnum(Feature.frsqrtes)] = .{ | ||
| 242 | .llvm_name = "frsqrtes", | ||
| 243 | .description = "Enable the frsqrtes instruction", | ||
| 244 | .dependencies = featureSet(&[_]Feature{ | ||
| 245 | .fpu, | ||
| 246 | }), | ||
| 247 | }; | ||
| 248 | result[@intFromEnum(Feature.fsqrt)] = .{ | ||
| 249 | .llvm_name = "fsqrt", | ||
| 250 | .description = "Enable the fsqrt instruction", | ||
| 251 | .dependencies = featureSet(&[_]Feature{ | ||
| 252 | .fpu, | ||
| 253 | }), | ||
| 254 | }; | ||
| 255 | result[@intFromEnum(Feature.fuse_add_logical)] = .{ | ||
| 256 | .llvm_name = "fuse-add-logical", | ||
| 257 | .description = "Target supports Add with Logical Operations fusion", | ||
| 258 | .dependencies = featureSet(&[_]Feature{ | ||
| 259 | .fusion, | ||
| 260 | }), | ||
| 261 | }; | ||
| 262 | result[@intFromEnum(Feature.fuse_addi_load)] = .{ | ||
| 263 | .llvm_name = "fuse-addi-load", | ||
| 264 | .description = "Power8 Addi-Load fusion", | ||
| 265 | .dependencies = featureSet(&[_]Feature{ | ||
| 266 | .fusion, | ||
| 267 | }), | ||
| 268 | }; | ||
| 269 | result[@intFromEnum(Feature.fuse_addis_load)] = .{ | ||
| 270 | .llvm_name = "fuse-addis-load", | ||
| 271 | .description = "Power8 Addis-Load fusion", | ||
| 272 | .dependencies = featureSet(&[_]Feature{ | ||
| 273 | .fusion, | ||
| 274 | }), | ||
| 275 | }; | ||
| 276 | result[@intFromEnum(Feature.fuse_arith_add)] = .{ | ||
| 277 | .llvm_name = "fuse-arith-add", | ||
| 278 | .description = "Target supports Arithmetic Operations with Add fusion", | ||
| 279 | .dependencies = featureSet(&[_]Feature{ | ||
| 280 | .fusion, | ||
| 281 | }), | ||
| 282 | }; | ||
| 283 | result[@intFromEnum(Feature.fuse_back2back)] = .{ | ||
| 284 | .llvm_name = "fuse-back2back", | ||
| 285 | .description = "Target supports general back to back fusion", | ||
| 286 | .dependencies = featureSet(&[_]Feature{ | ||
| 287 | .fusion, | ||
| 288 | }), | ||
| 289 | }; | ||
| 290 | result[@intFromEnum(Feature.fuse_cmp)] = .{ | ||
| 291 | .llvm_name = "fuse-cmp", | ||
| 292 | .description = "Target supports Comparison Operations fusion", | ||
| 293 | .dependencies = featureSet(&[_]Feature{ | ||
| 294 | .fusion, | ||
| 295 | }), | ||
| 296 | }; | ||
| 297 | result[@intFromEnum(Feature.fuse_logical)] = .{ | ||
| 298 | .llvm_name = "fuse-logical", | ||
| 299 | .description = "Target supports Logical Operations fusion", | ||
| 300 | .dependencies = featureSet(&[_]Feature{ | ||
| 301 | .fusion, | ||
| 302 | }), | ||
| 303 | }; | ||
| 304 | result[@intFromEnum(Feature.fuse_logical_add)] = .{ | ||
| 305 | .llvm_name = "fuse-logical-add", | ||
| 306 | .description = "Target supports Logical with Add Operations fusion", | ||
| 307 | .dependencies = featureSet(&[_]Feature{ | ||
| 308 | .fusion, | ||
| 309 | }), | ||
| 310 | }; | ||
| 311 | result[@intFromEnum(Feature.fuse_sha3)] = .{ | ||
| 312 | .llvm_name = "fuse-sha3", | ||
| 313 | .description = "Target supports SHA3 assist fusion", | ||
| 314 | .dependencies = featureSet(&[_]Feature{ | ||
| 315 | .fusion, | ||
| 316 | }), | ||
| 317 | }; | ||
| 318 | result[@intFromEnum(Feature.fuse_store)] = .{ | ||
| 319 | .llvm_name = "fuse-store", | ||
| 320 | .description = "Target supports store clustering", | ||
| 321 | .dependencies = featureSet(&[_]Feature{ | ||
| 322 | .fusion, | ||
| 323 | }), | ||
| 324 | }; | ||
| 325 | result[@intFromEnum(Feature.fuse_wideimm)] = .{ | ||
| 326 | .llvm_name = "fuse-wideimm", | ||
| 327 | .description = "Target supports Wide-Immediate fusion", | ||
| 328 | .dependencies = featureSet(&[_]Feature{ | ||
| 329 | .fusion, | ||
| 330 | }), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.fuse_zeromove)] = .{ | ||
| 333 | .llvm_name = "fuse-zeromove", | ||
| 334 | .description = "Target supports move to SPR with branch fusion", | ||
| 335 | .dependencies = featureSet(&[_]Feature{ | ||
| 336 | .fusion, | ||
| 337 | }), | ||
| 338 | }; | ||
| 339 | result[@intFromEnum(Feature.fusion)] = .{ | ||
| 340 | .llvm_name = "fusion", | ||
| 341 | .description = "Target supports instruction fusion", | ||
| 342 | .dependencies = featureSet(&[_]Feature{}), | ||
| 343 | }; | ||
| 344 | result[@intFromEnum(Feature.hard_float)] = .{ | ||
| 345 | .llvm_name = "hard-float", | ||
| 346 | .description = "Enable floating-point instructions", | ||
| 347 | .dependencies = featureSet(&[_]Feature{}), | ||
| 348 | }; | ||
| 349 | result[@intFromEnum(Feature.htm)] = .{ | ||
| 350 | .llvm_name = "htm", | ||
| 351 | .description = "Enable Hardware Transactional Memory instructions", | ||
| 352 | .dependencies = featureSet(&[_]Feature{}), | ||
| 353 | }; | ||
| 354 | result[@intFromEnum(Feature.icbt)] = .{ | ||
| 355 | .llvm_name = "icbt", | ||
| 356 | .description = "Enable icbt instruction", | ||
| 357 | .dependencies = featureSet(&[_]Feature{}), | ||
| 358 | }; | ||
| 359 | result[@intFromEnum(Feature.invariant_function_descriptors)] = .{ | ||
| 360 | .llvm_name = "invariant-function-descriptors", | ||
| 361 | .description = "Assume function descriptors are invariant", | ||
| 362 | .dependencies = featureSet(&[_]Feature{}), | ||
| 363 | }; | ||
| 364 | result[@intFromEnum(Feature.isa_future_instructions)] = .{ | ||
| 365 | .llvm_name = "isa-future-instructions", | ||
| 366 | .description = "Enable instructions for Future ISA.", | ||
| 367 | .dependencies = featureSet(&[_]Feature{ | ||
| 368 | .isa_v31_instructions, | ||
| 369 | }), | ||
| 370 | }; | ||
| 371 | result[@intFromEnum(Feature.isa_v206_instructions)] = .{ | ||
| 372 | .llvm_name = "isa-v206-instructions", | ||
| 373 | .description = "Enable instructions in ISA 2.06.", | ||
| 374 | .dependencies = featureSet(&[_]Feature{}), | ||
| 375 | }; | ||
| 376 | result[@intFromEnum(Feature.isa_v207_instructions)] = .{ | ||
| 377 | .llvm_name = "isa-v207-instructions", | ||
| 378 | .description = "Enable instructions in ISA 2.07.", | ||
| 379 | .dependencies = featureSet(&[_]Feature{}), | ||
| 380 | }; | ||
| 381 | result[@intFromEnum(Feature.isa_v30_instructions)] = .{ | ||
| 382 | .llvm_name = "isa-v30-instructions", | ||
| 383 | .description = "Enable instructions in ISA 3.0.", | ||
| 384 | .dependencies = featureSet(&[_]Feature{ | ||
| 385 | .isa_v207_instructions, | ||
| 386 | }), | ||
| 387 | }; | ||
| 388 | result[@intFromEnum(Feature.isa_v31_instructions)] = .{ | ||
| 389 | .llvm_name = "isa-v31-instructions", | ||
| 390 | .description = "Enable instructions in ISA 3.1.", | ||
| 391 | .dependencies = featureSet(&[_]Feature{ | ||
| 392 | .isa_v30_instructions, | ||
| 393 | }), | ||
| 394 | }; | ||
| 395 | result[@intFromEnum(Feature.isel)] = .{ | ||
| 396 | .llvm_name = "isel", | ||
| 397 | .description = "Enable the isel instruction", | ||
| 398 | .dependencies = featureSet(&[_]Feature{}), | ||
| 399 | }; | ||
| 400 | result[@intFromEnum(Feature.ldbrx)] = .{ | ||
| 401 | .llvm_name = "ldbrx", | ||
| 402 | .description = "Enable the ldbrx instruction", | ||
| 403 | .dependencies = featureSet(&[_]Feature{}), | ||
| 404 | }; | ||
| 405 | result[@intFromEnum(Feature.lfiwax)] = .{ | ||
| 406 | .llvm_name = "lfiwax", | ||
| 407 | .description = "Enable the lfiwax instruction", | ||
| 408 | .dependencies = featureSet(&[_]Feature{ | ||
| 409 | .fpu, | ||
| 410 | }), | ||
| 411 | }; | ||
| 412 | result[@intFromEnum(Feature.longcall)] = .{ | ||
| 413 | .llvm_name = "longcall", | ||
| 414 | .description = "Always use indirect calls", | ||
| 415 | .dependencies = featureSet(&[_]Feature{}), | ||
| 416 | }; | ||
| 417 | result[@intFromEnum(Feature.mfocrf)] = .{ | ||
| 418 | .llvm_name = "mfocrf", | ||
| 419 | .description = "Enable the MFOCRF instruction", | ||
| 420 | .dependencies = featureSet(&[_]Feature{}), | ||
| 421 | }; | ||
| 422 | result[@intFromEnum(Feature.mma)] = .{ | ||
| 423 | .llvm_name = "mma", | ||
| 424 | .description = "Enable MMA instructions", | ||
| 425 | .dependencies = featureSet(&[_]Feature{ | ||
| 426 | .paired_vector_memops, | ||
| 427 | .power8_vector, | ||
| 428 | .power9_altivec, | ||
| 429 | }), | ||
| 430 | }; | ||
| 431 | result[@intFromEnum(Feature.modern_aix_as)] = .{ | ||
| 432 | .llvm_name = "modern-aix-as", | ||
| 433 | .description = "AIX system assembler is modern enough to support new mnes", | ||
| 434 | .dependencies = featureSet(&[_]Feature{}), | ||
| 435 | }; | ||
| 436 | result[@intFromEnum(Feature.msync)] = .{ | ||
| 437 | .llvm_name = "msync", | ||
| 438 | .description = "Has only the msync instruction instead of sync", | ||
| 439 | .dependencies = featureSet(&[_]Feature{ | ||
| 440 | .booke, | ||
| 441 | }), | ||
| 442 | }; | ||
| 443 | result[@intFromEnum(Feature.paired_vector_memops)] = .{ | ||
| 444 | .llvm_name = "paired-vector-memops", | ||
| 445 | .description = "32Byte load and store instructions", | ||
| 446 | .dependencies = featureSet(&[_]Feature{ | ||
| 447 | .isa_v30_instructions, | ||
| 448 | }), | ||
| 449 | }; | ||
| 450 | result[@intFromEnum(Feature.partword_atomics)] = .{ | ||
| 451 | .llvm_name = "partword-atomics", | ||
| 452 | .description = "Enable l[bh]arx and st[bh]cx.", | ||
| 453 | .dependencies = featureSet(&[_]Feature{}), | ||
| 454 | }; | ||
| 455 | result[@intFromEnum(Feature.pcrelative_memops)] = .{ | ||
| 456 | .llvm_name = "pcrelative-memops", | ||
| 457 | .description = "Enable PC relative Memory Ops", | ||
| 458 | .dependencies = featureSet(&[_]Feature{ | ||
| 459 | .prefix_instrs, | ||
| 460 | }), | ||
| 461 | }; | ||
| 462 | result[@intFromEnum(Feature.popcntd)] = .{ | ||
| 463 | .llvm_name = "popcntd", | ||
| 464 | .description = "Enable the popcnt[dw] instructions", | ||
| 465 | .dependencies = featureSet(&[_]Feature{}), | ||
| 466 | }; | ||
| 467 | result[@intFromEnum(Feature.power10_vector)] = .{ | ||
| 468 | .llvm_name = "power10-vector", | ||
| 469 | .description = "Enable POWER10 vector instructions", | ||
| 470 | .dependencies = featureSet(&[_]Feature{ | ||
| 471 | .isa_v31_instructions, | ||
| 472 | .power9_vector, | ||
| 473 | }), | ||
| 474 | }; | ||
| 475 | result[@intFromEnum(Feature.power8_altivec)] = .{ | ||
| 476 | .llvm_name = "power8-altivec", | ||
| 477 | .description = "Enable POWER8 Altivec instructions", | ||
| 478 | .dependencies = featureSet(&[_]Feature{ | ||
| 479 | .altivec, | ||
| 480 | }), | ||
| 481 | }; | ||
| 482 | result[@intFromEnum(Feature.power8_vector)] = .{ | ||
| 483 | .llvm_name = "power8-vector", | ||
| 484 | .description = "Enable POWER8 vector instructions", | ||
| 485 | .dependencies = featureSet(&[_]Feature{ | ||
| 486 | .power8_altivec, | ||
| 487 | .vsx, | ||
| 488 | }), | ||
| 489 | }; | ||
| 490 | result[@intFromEnum(Feature.power9_altivec)] = .{ | ||
| 491 | .llvm_name = "power9-altivec", | ||
| 492 | .description = "Enable POWER9 Altivec instructions", | ||
| 493 | .dependencies = featureSet(&[_]Feature{ | ||
| 494 | .isa_v30_instructions, | ||
| 495 | .power8_altivec, | ||
| 496 | }), | ||
| 497 | }; | ||
| 498 | result[@intFromEnum(Feature.power9_vector)] = .{ | ||
| 499 | .llvm_name = "power9-vector", | ||
| 500 | .description = "Enable POWER9 vector instructions", | ||
| 501 | .dependencies = featureSet(&[_]Feature{ | ||
| 502 | .power8_vector, | ||
| 503 | .power9_altivec, | ||
| 504 | }), | ||
| 505 | }; | ||
| 506 | result[@intFromEnum(Feature.ppc4xx)] = .{ | ||
| 507 | .llvm_name = "ppc4xx", | ||
| 508 | .description = "Enable PPC 4xx instructions", | ||
| 509 | .dependencies = featureSet(&[_]Feature{}), | ||
| 510 | }; | ||
| 511 | result[@intFromEnum(Feature.ppc6xx)] = .{ | ||
| 512 | .llvm_name = "ppc6xx", | ||
| 513 | .description = "Enable PPC 6xx instructions", | ||
| 514 | .dependencies = featureSet(&[_]Feature{}), | ||
| 515 | }; | ||
| 516 | result[@intFromEnum(Feature.ppc_postra_sched)] = .{ | ||
| 517 | .llvm_name = "ppc-postra-sched", | ||
| 518 | .description = "Use PowerPC post-RA scheduling strategy", | ||
| 519 | .dependencies = featureSet(&[_]Feature{}), | ||
| 520 | }; | ||
| 521 | result[@intFromEnum(Feature.ppc_prera_sched)] = .{ | ||
| 522 | .llvm_name = "ppc-prera-sched", | ||
| 523 | .description = "Use PowerPC pre-RA scheduling strategy", | ||
| 524 | .dependencies = featureSet(&[_]Feature{}), | ||
| 525 | }; | ||
| 526 | result[@intFromEnum(Feature.predictable_select_expensive)] = .{ | ||
| 527 | .llvm_name = "predictable-select-expensive", | ||
| 528 | .description = "Prefer likely predicted branches over selects", | ||
| 529 | .dependencies = featureSet(&[_]Feature{}), | ||
| 530 | }; | ||
| 531 | result[@intFromEnum(Feature.prefix_instrs)] = .{ | ||
| 532 | .llvm_name = "prefix-instrs", | ||
| 533 | .description = "Enable prefixed instructions", | ||
| 534 | .dependencies = featureSet(&[_]Feature{ | ||
| 535 | .power8_vector, | ||
| 536 | .power9_altivec, | ||
| 537 | }), | ||
| 538 | }; | ||
| 539 | result[@intFromEnum(Feature.privileged)] = .{ | ||
| 540 | .llvm_name = "privileged", | ||
| 541 | .description = "Add privileged instructions", | ||
| 542 | .dependencies = featureSet(&[_]Feature{}), | ||
| 543 | }; | ||
| 544 | result[@intFromEnum(Feature.quadword_atomics)] = .{ | ||
| 545 | .llvm_name = "quadword-atomics", | ||
| 546 | .description = "Enable lqarx and stqcx.", | ||
| 547 | .dependencies = featureSet(&[_]Feature{}), | ||
| 548 | }; | ||
| 549 | result[@intFromEnum(Feature.recipprec)] = .{ | ||
| 550 | .llvm_name = "recipprec", | ||
| 551 | .description = "Assume higher precision reciprocal estimates", | ||
| 552 | .dependencies = featureSet(&[_]Feature{}), | ||
| 553 | }; | ||
| 554 | result[@intFromEnum(Feature.rop_protect)] = .{ | ||
| 555 | .llvm_name = "rop-protect", | ||
| 556 | .description = "Add ROP protect", | ||
| 557 | .dependencies = featureSet(&[_]Feature{}), | ||
| 558 | }; | ||
| 559 | result[@intFromEnum(Feature.secure_plt)] = .{ | ||
| 560 | .llvm_name = "secure-plt", | ||
| 561 | .description = "Enable secure plt mode", | ||
| 562 | .dependencies = featureSet(&[_]Feature{}), | ||
| 563 | }; | ||
| 564 | result[@intFromEnum(Feature.slow_popcntd)] = .{ | ||
| 565 | .llvm_name = "slow-popcntd", | ||
| 566 | .description = "Has slow popcnt[dw] instructions", | ||
| 567 | .dependencies = featureSet(&[_]Feature{}), | ||
| 568 | }; | ||
| 569 | result[@intFromEnum(Feature.spe)] = .{ | ||
| 570 | .llvm_name = "spe", | ||
| 571 | .description = "Enable SPE instructions", | ||
| 572 | .dependencies = featureSet(&[_]Feature{ | ||
| 573 | .hard_float, | ||
| 574 | }), | ||
| 575 | }; | ||
| 576 | result[@intFromEnum(Feature.stfiwx)] = .{ | ||
| 577 | .llvm_name = "stfiwx", | ||
| 578 | .description = "Enable the stfiwx instruction", | ||
| 579 | .dependencies = featureSet(&[_]Feature{ | ||
| 580 | .fpu, | ||
| 581 | }), | ||
| 582 | }; | ||
| 583 | result[@intFromEnum(Feature.two_const_nr)] = .{ | ||
| 584 | .llvm_name = "two-const-nr", | ||
| 585 | .description = "Requires two constant Newton-Raphson computation", | ||
| 586 | .dependencies = featureSet(&[_]Feature{}), | ||
| 587 | }; | ||
| 588 | result[@intFromEnum(Feature.vectors_use_two_units)] = .{ | ||
| 589 | .llvm_name = "vectors-use-two-units", | ||
| 590 | .description = "Vectors use two units", | ||
| 591 | .dependencies = featureSet(&[_]Feature{}), | ||
| 592 | }; | ||
| 593 | result[@intFromEnum(Feature.vsx)] = .{ | ||
| 594 | .llvm_name = "vsx", | ||
| 595 | .description = "Enable VSX instructions", | ||
| 596 | .dependencies = featureSet(&[_]Feature{ | ||
| 597 | .altivec, | ||
| 598 | }), | ||
| 599 | }; | ||
| 600 | const ti = @typeInfo(Feature); | ||
| 601 | for (&result, 0..) |*elem, i| { | ||
| 602 | elem.index = i; | ||
| 603 | elem.name = ti.Enum.fields[i].name; | ||
| 604 | } | ||
| 605 | break :blk result; | ||
| 606 | }; | ||
| 607 | |||
| 608 | pub const cpu = struct { | ||
| 609 | pub const @"440" = CpuModel{ | ||
| 610 | .name = "440", | ||
| 611 | .llvm_name = "440", | ||
| 612 | .features = featureSet(&[_]Feature{ | ||
| 613 | .fres, | ||
| 614 | .frsqrte, | ||
| 615 | .isel, | ||
| 616 | .msync, | ||
| 617 | }), | ||
| 618 | }; | ||
| 619 | pub const @"450" = CpuModel{ | ||
| 620 | .name = "450", | ||
| 621 | .llvm_name = "450", | ||
| 622 | .features = featureSet(&[_]Feature{ | ||
| 623 | .fres, | ||
| 624 | .frsqrte, | ||
| 625 | .isel, | ||
| 626 | .msync, | ||
| 627 | }), | ||
| 628 | }; | ||
| 629 | pub const @"601" = CpuModel{ | ||
| 630 | .name = "601", | ||
| 631 | .llvm_name = "601", | ||
| 632 | .features = featureSet(&[_]Feature{ | ||
| 633 | .fpu, | ||
| 634 | }), | ||
| 635 | }; | ||
| 636 | pub const @"602" = CpuModel{ | ||
| 637 | .name = "602", | ||
| 638 | .llvm_name = "602", | ||
| 639 | .features = featureSet(&[_]Feature{ | ||
| 640 | .fpu, | ||
| 641 | }), | ||
| 642 | }; | ||
| 643 | pub const @"603" = CpuModel{ | ||
| 644 | .name = "603", | ||
| 645 | .llvm_name = "603", | ||
| 646 | .features = featureSet(&[_]Feature{ | ||
| 647 | .fres, | ||
| 648 | .frsqrte, | ||
| 649 | }), | ||
| 650 | }; | ||
| 651 | pub const @"603e" = CpuModel{ | ||
| 652 | .name = "603e", | ||
| 653 | .llvm_name = "603e", | ||
| 654 | .features = featureSet(&[_]Feature{ | ||
| 655 | .fres, | ||
| 656 | .frsqrte, | ||
| 657 | }), | ||
| 658 | }; | ||
| 659 | pub const @"603ev" = CpuModel{ | ||
| 660 | .name = "603ev", | ||
| 661 | .llvm_name = "603ev", | ||
| 662 | .features = featureSet(&[_]Feature{ | ||
| 663 | .fres, | ||
| 664 | .frsqrte, | ||
| 665 | }), | ||
| 666 | }; | ||
| 667 | pub const @"604" = CpuModel{ | ||
| 668 | .name = "604", | ||
| 669 | .llvm_name = "604", | ||
| 670 | .features = featureSet(&[_]Feature{ | ||
| 671 | .fres, | ||
| 672 | .frsqrte, | ||
| 673 | }), | ||
| 674 | }; | ||
| 675 | pub const @"604e" = CpuModel{ | ||
| 676 | .name = "604e", | ||
| 677 | .llvm_name = "604e", | ||
| 678 | .features = featureSet(&[_]Feature{ | ||
| 679 | .fres, | ||
| 680 | .frsqrte, | ||
| 681 | }), | ||
| 682 | }; | ||
| 683 | pub const @"620" = CpuModel{ | ||
| 684 | .name = "620", | ||
| 685 | .llvm_name = "620", | ||
| 686 | .features = featureSet(&[_]Feature{ | ||
| 687 | .fres, | ||
| 688 | .frsqrte, | ||
| 689 | }), | ||
| 690 | }; | ||
| 691 | pub const @"7400" = CpuModel{ | ||
| 692 | .name = "7400", | ||
| 693 | .llvm_name = "7400", | ||
| 694 | .features = featureSet(&[_]Feature{ | ||
| 695 | .altivec, | ||
| 696 | .fres, | ||
| 697 | .frsqrte, | ||
| 698 | }), | ||
| 699 | }; | ||
| 700 | pub const @"7450" = CpuModel{ | ||
| 701 | .name = "7450", | ||
| 702 | .llvm_name = "7450", | ||
| 703 | .features = featureSet(&[_]Feature{ | ||
| 704 | .altivec, | ||
| 705 | .fres, | ||
| 706 | .frsqrte, | ||
| 707 | }), | ||
| 708 | }; | ||
| 709 | pub const @"750" = CpuModel{ | ||
| 710 | .name = "750", | ||
| 711 | .llvm_name = "750", | ||
| 712 | .features = featureSet(&[_]Feature{ | ||
| 713 | .fres, | ||
| 714 | .frsqrte, | ||
| 715 | }), | ||
| 716 | }; | ||
| 717 | pub const @"970" = CpuModel{ | ||
| 718 | .name = "970", | ||
| 719 | .llvm_name = "970", | ||
| 720 | .features = featureSet(&[_]Feature{ | ||
| 721 | .@"64bit", | ||
| 722 | .altivec, | ||
| 723 | .fres, | ||
| 724 | .frsqrte, | ||
| 725 | .fsqrt, | ||
| 726 | .mfocrf, | ||
| 727 | .stfiwx, | ||
| 728 | }), | ||
| 729 | }; | ||
| 730 | pub const a2 = CpuModel{ | ||
| 731 | .name = "a2", | ||
| 732 | .llvm_name = "a2", | ||
| 733 | .features = featureSet(&[_]Feature{ | ||
| 734 | .@"64bit", | ||
| 735 | .booke, | ||
| 736 | .cmpb, | ||
| 737 | .fcpsgn, | ||
| 738 | .fpcvt, | ||
| 739 | .fprnd, | ||
| 740 | .fre, | ||
| 741 | .fres, | ||
| 742 | .frsqrte, | ||
| 743 | .frsqrtes, | ||
| 744 | .fsqrt, | ||
| 745 | .isa_v206_instructions, | ||
| 746 | .isel, | ||
| 747 | .ldbrx, | ||
| 748 | .lfiwax, | ||
| 749 | .mfocrf, | ||
| 750 | .recipprec, | ||
| 751 | .slow_popcntd, | ||
| 752 | .stfiwx, | ||
| 753 | }), | ||
| 754 | }; | ||
| 755 | pub const e500 = CpuModel{ | ||
| 756 | .name = "e500", | ||
| 757 | .llvm_name = "e500", | ||
| 758 | .features = featureSet(&[_]Feature{ | ||
| 759 | .isel, | ||
| 760 | .msync, | ||
| 761 | .spe, | ||
| 762 | }), | ||
| 763 | }; | ||
| 764 | pub const e500mc = CpuModel{ | ||
| 765 | .name = "e500mc", | ||
| 766 | .llvm_name = "e500mc", | ||
| 767 | .features = featureSet(&[_]Feature{ | ||
| 768 | .booke, | ||
| 769 | .isel, | ||
| 770 | .stfiwx, | ||
| 771 | }), | ||
| 772 | }; | ||
| 773 | pub const e5500 = CpuModel{ | ||
| 774 | .name = "e5500", | ||
| 775 | .llvm_name = "e5500", | ||
| 776 | .features = featureSet(&[_]Feature{ | ||
| 777 | .@"64bit", | ||
| 778 | .booke, | ||
| 779 | .isel, | ||
| 780 | .mfocrf, | ||
| 781 | .stfiwx, | ||
| 782 | }), | ||
| 783 | }; | ||
| 784 | pub const future = CpuModel{ | ||
| 785 | .name = "future", | ||
| 786 | .llvm_name = "future", | ||
| 787 | .features = featureSet(&[_]Feature{ | ||
| 788 | .@"64bit", | ||
| 789 | .allow_unaligned_fp_access, | ||
| 790 | .bpermd, | ||
| 791 | .cmpb, | ||
| 792 | .crbits, | ||
| 793 | .crypto, | ||
| 794 | .direct_move, | ||
| 795 | .extdiv, | ||
| 796 | .fast_MFLR, | ||
| 797 | .fcpsgn, | ||
| 798 | .fpcvt, | ||
| 799 | .fprnd, | ||
| 800 | .fre, | ||
| 801 | .fres, | ||
| 802 | .frsqrte, | ||
| 803 | .frsqrtes, | ||
| 804 | .fsqrt, | ||
| 805 | .fuse_add_logical, | ||
| 806 | .fuse_arith_add, | ||
| 807 | .fuse_logical, | ||
| 808 | .fuse_logical_add, | ||
| 809 | .fuse_sha3, | ||
| 810 | .fuse_store, | ||
| 811 | .htm, | ||
| 812 | .icbt, | ||
| 813 | .isa_future_instructions, | ||
| 814 | .isa_v206_instructions, | ||
| 815 | .isel, | ||
| 816 | .ldbrx, | ||
| 817 | .lfiwax, | ||
| 818 | .mfocrf, | ||
| 819 | .mma, | ||
| 820 | .partword_atomics, | ||
| 821 | .pcrelative_memops, | ||
| 822 | .popcntd, | ||
| 823 | .power10_vector, | ||
| 824 | .ppc_postra_sched, | ||
| 825 | .ppc_prera_sched, | ||
| 826 | .predictable_select_expensive, | ||
| 827 | .quadword_atomics, | ||
| 828 | .recipprec, | ||
| 829 | .stfiwx, | ||
| 830 | .two_const_nr, | ||
| 831 | }), | ||
| 832 | }; | ||
| 833 | pub const g3 = CpuModel{ | ||
| 834 | .name = "g3", | ||
| 835 | .llvm_name = "g3", | ||
| 836 | .features = featureSet(&[_]Feature{ | ||
| 837 | .fres, | ||
| 838 | .frsqrte, | ||
| 839 | }), | ||
| 840 | }; | ||
| 841 | pub const g4 = CpuModel{ | ||
| 842 | .name = "g4", | ||
| 843 | .llvm_name = "g4", | ||
| 844 | .features = featureSet(&[_]Feature{ | ||
| 845 | .altivec, | ||
| 846 | .fres, | ||
| 847 | .frsqrte, | ||
| 848 | }), | ||
| 849 | }; | ||
| 850 | pub const @"g4+" = CpuModel{ | ||
| 851 | .name = "g4+", | ||
| 852 | .llvm_name = "g4+", | ||
| 853 | .features = featureSet(&[_]Feature{ | ||
| 854 | .altivec, | ||
| 855 | .fres, | ||
| 856 | .frsqrte, | ||
| 857 | }), | ||
| 858 | }; | ||
| 859 | pub const g5 = CpuModel{ | ||
| 860 | .name = "g5", | ||
| 861 | .llvm_name = "g5", | ||
| 862 | .features = featureSet(&[_]Feature{ | ||
| 863 | .@"64bit", | ||
| 864 | .altivec, | ||
| 865 | .fres, | ||
| 866 | .frsqrte, | ||
| 867 | .fsqrt, | ||
| 868 | .mfocrf, | ||
| 869 | .stfiwx, | ||
| 870 | }), | ||
| 871 | }; | ||
| 872 | pub const generic = CpuModel{ | ||
| 873 | .name = "generic", | ||
| 874 | .llvm_name = "generic", | ||
| 875 | .features = featureSet(&[_]Feature{ | ||
| 876 | .hard_float, | ||
| 877 | }), | ||
| 878 | }; | ||
| 879 | pub const ppc = CpuModel{ | ||
| 880 | .name = "ppc", | ||
| 881 | .llvm_name = "ppc", | ||
| 882 | .features = featureSet(&[_]Feature{ | ||
| 883 | .hard_float, | ||
| 884 | }), | ||
| 885 | }; | ||
| 886 | pub const ppc64 = CpuModel{ | ||
| 887 | .name = "ppc64", | ||
| 888 | .llvm_name = "ppc64", | ||
| 889 | .features = featureSet(&[_]Feature{ | ||
| 890 | .@"64bit", | ||
| 891 | .altivec, | ||
| 892 | .fres, | ||
| 893 | .frsqrte, | ||
| 894 | .fsqrt, | ||
| 895 | .mfocrf, | ||
| 896 | .stfiwx, | ||
| 897 | }), | ||
| 898 | }; | ||
| 899 | pub const ppc64le = CpuModel{ | ||
| 900 | .name = "ppc64le", | ||
| 901 | .llvm_name = "ppc64le", | ||
| 902 | .features = featureSet(&[_]Feature{ | ||
| 903 | .@"64bit", | ||
| 904 | .allow_unaligned_fp_access, | ||
| 905 | .bpermd, | ||
| 906 | .cmpb, | ||
| 907 | .crbits, | ||
| 908 | .crypto, | ||
| 909 | .direct_move, | ||
| 910 | .extdiv, | ||
| 911 | .fcpsgn, | ||
| 912 | .fpcvt, | ||
| 913 | .fprnd, | ||
| 914 | .fre, | ||
| 915 | .fres, | ||
| 916 | .frsqrte, | ||
| 917 | .frsqrtes, | ||
| 918 | .fsqrt, | ||
| 919 | .fuse_addi_load, | ||
| 920 | .fuse_addis_load, | ||
| 921 | .htm, | ||
| 922 | .icbt, | ||
| 923 | .isa_v206_instructions, | ||
| 924 | .isa_v207_instructions, | ||
| 925 | .isel, | ||
| 926 | .ldbrx, | ||
| 927 | .lfiwax, | ||
| 928 | .mfocrf, | ||
| 929 | .partword_atomics, | ||
| 930 | .popcntd, | ||
| 931 | .power8_vector, | ||
| 932 | .predictable_select_expensive, | ||
| 933 | .quadword_atomics, | ||
| 934 | .recipprec, | ||
| 935 | .stfiwx, | ||
| 936 | .two_const_nr, | ||
| 937 | }), | ||
| 938 | }; | ||
| 939 | pub const pwr10 = CpuModel{ | ||
| 940 | .name = "pwr10", | ||
| 941 | .llvm_name = "pwr10", | ||
| 942 | .features = featureSet(&[_]Feature{ | ||
| 943 | .@"64bit", | ||
| 944 | .allow_unaligned_fp_access, | ||
| 945 | .bpermd, | ||
| 946 | .cmpb, | ||
| 947 | .crbits, | ||
| 948 | .crypto, | ||
| 949 | .direct_move, | ||
| 950 | .extdiv, | ||
| 951 | .fast_MFLR, | ||
| 952 | .fcpsgn, | ||
| 953 | .fpcvt, | ||
| 954 | .fprnd, | ||
| 955 | .fre, | ||
| 956 | .fres, | ||
| 957 | .frsqrte, | ||
| 958 | .frsqrtes, | ||
| 959 | .fsqrt, | ||
| 960 | .fuse_add_logical, | ||
| 961 | .fuse_arith_add, | ||
| 962 | .fuse_logical, | ||
| 963 | .fuse_logical_add, | ||
| 964 | .fuse_sha3, | ||
| 965 | .fuse_store, | ||
| 966 | .htm, | ||
| 967 | .icbt, | ||
| 968 | .isa_v206_instructions, | ||
| 969 | .isel, | ||
| 970 | .ldbrx, | ||
| 971 | .lfiwax, | ||
| 972 | .mfocrf, | ||
| 973 | .mma, | ||
| 974 | .partword_atomics, | ||
| 975 | .pcrelative_memops, | ||
| 976 | .popcntd, | ||
| 977 | .power10_vector, | ||
| 978 | .ppc_postra_sched, | ||
| 979 | .ppc_prera_sched, | ||
| 980 | .predictable_select_expensive, | ||
| 981 | .quadword_atomics, | ||
| 982 | .recipprec, | ||
| 983 | .stfiwx, | ||
| 984 | .two_const_nr, | ||
| 985 | }), | ||
| 986 | }; | ||
| 987 | pub const pwr3 = CpuModel{ | ||
| 988 | .name = "pwr3", | ||
| 989 | .llvm_name = "pwr3", | ||
| 990 | .features = featureSet(&[_]Feature{ | ||
| 991 | .@"64bit", | ||
| 992 | .altivec, | ||
| 993 | .fres, | ||
| 994 | .frsqrte, | ||
| 995 | .mfocrf, | ||
| 996 | .stfiwx, | ||
| 997 | }), | ||
| 998 | }; | ||
| 999 | pub const pwr4 = CpuModel{ | ||
| 1000 | .name = "pwr4", | ||
| 1001 | .llvm_name = "pwr4", | ||
| 1002 | .features = featureSet(&[_]Feature{ | ||
| 1003 | .@"64bit", | ||
| 1004 | .altivec, | ||
| 1005 | .fres, | ||
| 1006 | .frsqrte, | ||
| 1007 | .fsqrt, | ||
| 1008 | .mfocrf, | ||
| 1009 | .stfiwx, | ||
| 1010 | }), | ||
| 1011 | }; | ||
| 1012 | pub const pwr5 = CpuModel{ | ||
| 1013 | .name = "pwr5", | ||
| 1014 | .llvm_name = "pwr5", | ||
| 1015 | .features = featureSet(&[_]Feature{ | ||
| 1016 | .@"64bit", | ||
| 1017 | .altivec, | ||
| 1018 | .fre, | ||
| 1019 | .fres, | ||
| 1020 | .frsqrte, | ||
| 1021 | .frsqrtes, | ||
| 1022 | .fsqrt, | ||
| 1023 | .mfocrf, | ||
| 1024 | .stfiwx, | ||
| 1025 | }), | ||
| 1026 | }; | ||
| 1027 | pub const pwr5x = CpuModel{ | ||
| 1028 | .name = "pwr5x", | ||
| 1029 | .llvm_name = "pwr5x", | ||
| 1030 | .features = featureSet(&[_]Feature{ | ||
| 1031 | .@"64bit", | ||
| 1032 | .altivec, | ||
| 1033 | .fprnd, | ||
| 1034 | .fre, | ||
| 1035 | .fres, | ||
| 1036 | .frsqrte, | ||
| 1037 | .frsqrtes, | ||
| 1038 | .fsqrt, | ||
| 1039 | .mfocrf, | ||
| 1040 | .stfiwx, | ||
| 1041 | }), | ||
| 1042 | }; | ||
| 1043 | pub const pwr6 = CpuModel{ | ||
| 1044 | .name = "pwr6", | ||
| 1045 | .llvm_name = "pwr6", | ||
| 1046 | .features = featureSet(&[_]Feature{ | ||
| 1047 | .@"64bit", | ||
| 1048 | .altivec, | ||
| 1049 | .cmpb, | ||
| 1050 | .fcpsgn, | ||
| 1051 | .fprnd, | ||
| 1052 | .fre, | ||
| 1053 | .fres, | ||
| 1054 | .frsqrte, | ||
| 1055 | .frsqrtes, | ||
| 1056 | .fsqrt, | ||
| 1057 | .lfiwax, | ||
| 1058 | .mfocrf, | ||
| 1059 | .recipprec, | ||
| 1060 | .stfiwx, | ||
| 1061 | }), | ||
| 1062 | }; | ||
| 1063 | pub const pwr6x = CpuModel{ | ||
| 1064 | .name = "pwr6x", | ||
| 1065 | .llvm_name = "pwr6x", | ||
| 1066 | .features = featureSet(&[_]Feature{ | ||
| 1067 | .@"64bit", | ||
| 1068 | .altivec, | ||
| 1069 | .cmpb, | ||
| 1070 | .fcpsgn, | ||
| 1071 | .fprnd, | ||
| 1072 | .fre, | ||
| 1073 | .fres, | ||
| 1074 | .frsqrte, | ||
| 1075 | .frsqrtes, | ||
| 1076 | .fsqrt, | ||
| 1077 | .lfiwax, | ||
| 1078 | .mfocrf, | ||
| 1079 | .recipprec, | ||
| 1080 | .stfiwx, | ||
| 1081 | }), | ||
| 1082 | }; | ||
| 1083 | pub const pwr7 = CpuModel{ | ||
| 1084 | .name = "pwr7", | ||
| 1085 | .llvm_name = "pwr7", | ||
| 1086 | .features = featureSet(&[_]Feature{ | ||
| 1087 | .@"64bit", | ||
| 1088 | .allow_unaligned_fp_access, | ||
| 1089 | .bpermd, | ||
| 1090 | .cmpb, | ||
| 1091 | .extdiv, | ||
| 1092 | .fcpsgn, | ||
| 1093 | .fpcvt, | ||
| 1094 | .fprnd, | ||
| 1095 | .fre, | ||
| 1096 | .fres, | ||
| 1097 | .frsqrte, | ||
| 1098 | .frsqrtes, | ||
| 1099 | .fsqrt, | ||
| 1100 | .isa_v206_instructions, | ||
| 1101 | .isel, | ||
| 1102 | .ldbrx, | ||
| 1103 | .lfiwax, | ||
| 1104 | .mfocrf, | ||
| 1105 | .popcntd, | ||
| 1106 | .recipprec, | ||
| 1107 | .stfiwx, | ||
| 1108 | .two_const_nr, | ||
| 1109 | .vsx, | ||
| 1110 | }), | ||
| 1111 | }; | ||
| 1112 | pub const pwr8 = CpuModel{ | ||
| 1113 | .name = "pwr8", | ||
| 1114 | .llvm_name = "pwr8", | ||
| 1115 | .features = featureSet(&[_]Feature{ | ||
| 1116 | .@"64bit", | ||
| 1117 | .allow_unaligned_fp_access, | ||
| 1118 | .bpermd, | ||
| 1119 | .cmpb, | ||
| 1120 | .crbits, | ||
| 1121 | .crypto, | ||
| 1122 | .direct_move, | ||
| 1123 | .extdiv, | ||
| 1124 | .fcpsgn, | ||
| 1125 | .fpcvt, | ||
| 1126 | .fprnd, | ||
| 1127 | .fre, | ||
| 1128 | .fres, | ||
| 1129 | .frsqrte, | ||
| 1130 | .frsqrtes, | ||
| 1131 | .fsqrt, | ||
| 1132 | .fuse_addi_load, | ||
| 1133 | .fuse_addis_load, | ||
| 1134 | .htm, | ||
| 1135 | .icbt, | ||
| 1136 | .isa_v206_instructions, | ||
| 1137 | .isa_v207_instructions, | ||
| 1138 | .isel, | ||
| 1139 | .ldbrx, | ||
| 1140 | .lfiwax, | ||
| 1141 | .mfocrf, | ||
| 1142 | .partword_atomics, | ||
| 1143 | .popcntd, | ||
| 1144 | .power8_vector, | ||
| 1145 | .predictable_select_expensive, | ||
| 1146 | .quadword_atomics, | ||
| 1147 | .recipprec, | ||
| 1148 | .stfiwx, | ||
| 1149 | .two_const_nr, | ||
| 1150 | }), | ||
| 1151 | }; | ||
| 1152 | pub const pwr9 = CpuModel{ | ||
| 1153 | .name = "pwr9", | ||
| 1154 | .llvm_name = "pwr9", | ||
| 1155 | .features = featureSet(&[_]Feature{ | ||
| 1156 | .@"64bit", | ||
| 1157 | .allow_unaligned_fp_access, | ||
| 1158 | .bpermd, | ||
| 1159 | .cmpb, | ||
| 1160 | .crbits, | ||
| 1161 | .crypto, | ||
| 1162 | .direct_move, | ||
| 1163 | .extdiv, | ||
| 1164 | .fcpsgn, | ||
| 1165 | .fpcvt, | ||
| 1166 | .fprnd, | ||
| 1167 | .fre, | ||
| 1168 | .fres, | ||
| 1169 | .frsqrte, | ||
| 1170 | .frsqrtes, | ||
| 1171 | .fsqrt, | ||
| 1172 | .htm, | ||
| 1173 | .icbt, | ||
| 1174 | .isa_v206_instructions, | ||
| 1175 | .isel, | ||
| 1176 | .ldbrx, | ||
| 1177 | .lfiwax, | ||
| 1178 | .mfocrf, | ||
| 1179 | .partword_atomics, | ||
| 1180 | .popcntd, | ||
| 1181 | .power9_vector, | ||
| 1182 | .ppc_postra_sched, | ||
| 1183 | .ppc_prera_sched, | ||
| 1184 | .predictable_select_expensive, | ||
| 1185 | .quadword_atomics, | ||
| 1186 | .recipprec, | ||
| 1187 | .stfiwx, | ||
| 1188 | .two_const_nr, | ||
| 1189 | .vectors_use_two_units, | ||
| 1190 | }), | ||
| 1191 | }; | ||
| 1192 | }; | ||
lib/std/Target/riscv.zig created+1341
| ... | @@ -0,0 +1,1341 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"32bit", | ||
| 9 | @"64bit", | ||
| 10 | a, | ||
| 11 | c, | ||
| 12 | d, | ||
| 13 | dlen_factor_2, | ||
| 14 | e, | ||
| 15 | experimental_smaia, | ||
| 16 | experimental_ssaia, | ||
| 17 | experimental_zacas, | ||
| 18 | experimental_zfa, | ||
| 19 | experimental_zfbfmin, | ||
| 20 | experimental_zicond, | ||
| 21 | experimental_zihintntl, | ||
| 22 | experimental_ztso, | ||
| 23 | experimental_zvbb, | ||
| 24 | experimental_zvbc, | ||
| 25 | experimental_zvfbfmin, | ||
| 26 | experimental_zvfbfwma, | ||
| 27 | experimental_zvkg, | ||
| 28 | experimental_zvkn, | ||
| 29 | experimental_zvknc, | ||
| 30 | experimental_zvkned, | ||
| 31 | experimental_zvkng, | ||
| 32 | experimental_zvknha, | ||
| 33 | experimental_zvknhb, | ||
| 34 | experimental_zvks, | ||
| 35 | experimental_zvksc, | ||
| 36 | experimental_zvksed, | ||
| 37 | experimental_zvksg, | ||
| 38 | experimental_zvksh, | ||
| 39 | experimental_zvkt, | ||
| 40 | f, | ||
| 41 | forced_atomics, | ||
| 42 | h, | ||
| 43 | lui_addi_fusion, | ||
| 44 | m, | ||
| 45 | no_default_unroll, | ||
| 46 | no_optimized_zero_stride_load, | ||
| 47 | no_rvc_hints, | ||
| 48 | relax, | ||
| 49 | reserve_x1, | ||
| 50 | reserve_x10, | ||
| 51 | reserve_x11, | ||
| 52 | reserve_x12, | ||
| 53 | reserve_x13, | ||
| 54 | reserve_x14, | ||
| 55 | reserve_x15, | ||
| 56 | reserve_x16, | ||
| 57 | reserve_x17, | ||
| 58 | reserve_x18, | ||
| 59 | reserve_x19, | ||
| 60 | reserve_x2, | ||
| 61 | reserve_x20, | ||
| 62 | reserve_x21, | ||
| 63 | reserve_x22, | ||
| 64 | reserve_x23, | ||
| 65 | reserve_x24, | ||
| 66 | reserve_x25, | ||
| 67 | reserve_x26, | ||
| 68 | reserve_x27, | ||
| 69 | reserve_x28, | ||
| 70 | reserve_x29, | ||
| 71 | reserve_x3, | ||
| 72 | reserve_x30, | ||
| 73 | reserve_x31, | ||
| 74 | reserve_x4, | ||
| 75 | reserve_x5, | ||
| 76 | reserve_x6, | ||
| 77 | reserve_x7, | ||
| 78 | reserve_x8, | ||
| 79 | reserve_x9, | ||
| 80 | save_restore, | ||
| 81 | seq_cst_trailing_fence, | ||
| 82 | short_forward_branch_opt, | ||
| 83 | svinval, | ||
| 84 | svnapot, | ||
| 85 | svpbmt, | ||
| 86 | tagged_globals, | ||
| 87 | unaligned_scalar_mem, | ||
| 88 | unaligned_vector_mem, | ||
| 89 | v, | ||
| 90 | xcvbitmanip, | ||
| 91 | xcvmac, | ||
| 92 | xsfcie, | ||
| 93 | xsfvcp, | ||
| 94 | xtheadba, | ||
| 95 | xtheadbb, | ||
| 96 | xtheadbs, | ||
| 97 | xtheadcmo, | ||
| 98 | xtheadcondmov, | ||
| 99 | xtheadfmemidx, | ||
| 100 | xtheadmac, | ||
| 101 | xtheadmemidx, | ||
| 102 | xtheadmempair, | ||
| 103 | xtheadsync, | ||
| 104 | xtheadvdot, | ||
| 105 | xventanacondops, | ||
| 106 | zawrs, | ||
| 107 | zba, | ||
| 108 | zbb, | ||
| 109 | zbc, | ||
| 110 | zbkb, | ||
| 111 | zbkc, | ||
| 112 | zbkx, | ||
| 113 | zbs, | ||
| 114 | zca, | ||
| 115 | zcb, | ||
| 116 | zcd, | ||
| 117 | zce, | ||
| 118 | zcf, | ||
| 119 | zcmp, | ||
| 120 | zcmt, | ||
| 121 | zdinx, | ||
| 122 | zfh, | ||
| 123 | zfhmin, | ||
| 124 | zfinx, | ||
| 125 | zhinx, | ||
| 126 | zhinxmin, | ||
| 127 | zicbom, | ||
| 128 | zicbop, | ||
| 129 | zicboz, | ||
| 130 | zicntr, | ||
| 131 | zicsr, | ||
| 132 | zifencei, | ||
| 133 | zihintpause, | ||
| 134 | zihpm, | ||
| 135 | zk, | ||
| 136 | zkn, | ||
| 137 | zknd, | ||
| 138 | zkne, | ||
| 139 | zknh, | ||
| 140 | zkr, | ||
| 141 | zks, | ||
| 142 | zksed, | ||
| 143 | zksh, | ||
| 144 | zkt, | ||
| 145 | zmmul, | ||
| 146 | zve32f, | ||
| 147 | zve32x, | ||
| 148 | zve64d, | ||
| 149 | zve64f, | ||
| 150 | zve64x, | ||
| 151 | zvfh, | ||
| 152 | zvl1024b, | ||
| 153 | zvl128b, | ||
| 154 | zvl16384b, | ||
| 155 | zvl2048b, | ||
| 156 | zvl256b, | ||
| 157 | zvl32768b, | ||
| 158 | zvl32b, | ||
| 159 | zvl4096b, | ||
| 160 | zvl512b, | ||
| 161 | zvl64b, | ||
| 162 | zvl65536b, | ||
| 163 | zvl8192b, | ||
| 164 | }; | ||
| 165 | |||
| 166 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 167 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 168 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 169 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 170 | |||
| 171 | pub const all_features = blk: { | ||
| 172 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 173 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 174 | var result: [len]CpuFeature = undefined; | ||
| 175 | result[@intFromEnum(Feature.@"32bit")] = .{ | ||
| 176 | .llvm_name = "32bit", | ||
| 177 | .description = "Implements RV32", | ||
| 178 | .dependencies = featureSet(&[_]Feature{}), | ||
| 179 | }; | ||
| 180 | result[@intFromEnum(Feature.@"64bit")] = .{ | ||
| 181 | .llvm_name = "64bit", | ||
| 182 | .description = "Implements RV64", | ||
| 183 | .dependencies = featureSet(&[_]Feature{}), | ||
| 184 | }; | ||
| 185 | result[@intFromEnum(Feature.a)] = .{ | ||
| 186 | .llvm_name = "a", | ||
| 187 | .description = "'A' (Atomic Instructions)", | ||
| 188 | .dependencies = featureSet(&[_]Feature{}), | ||
| 189 | }; | ||
| 190 | result[@intFromEnum(Feature.c)] = .{ | ||
| 191 | .llvm_name = "c", | ||
| 192 | .description = "'C' (Compressed Instructions)", | ||
| 193 | .dependencies = featureSet(&[_]Feature{}), | ||
| 194 | }; | ||
| 195 | result[@intFromEnum(Feature.d)] = .{ | ||
| 196 | .llvm_name = "d", | ||
| 197 | .description = "'D' (Double-Precision Floating-Point)", | ||
| 198 | .dependencies = featureSet(&[_]Feature{ | ||
| 199 | .f, | ||
| 200 | }), | ||
| 201 | }; | ||
| 202 | result[@intFromEnum(Feature.dlen_factor_2)] = .{ | ||
| 203 | .llvm_name = "dlen-factor-2", | ||
| 204 | .description = "Vector unit DLEN(data path width) is half of VLEN", | ||
| 205 | .dependencies = featureSet(&[_]Feature{}), | ||
| 206 | }; | ||
| 207 | result[@intFromEnum(Feature.e)] = .{ | ||
| 208 | .llvm_name = "e", | ||
| 209 | .description = "Implements RV{32,64}E (provides 16 rather than 32 GPRs)", | ||
| 210 | .dependencies = featureSet(&[_]Feature{}), | ||
| 211 | }; | ||
| 212 | result[@intFromEnum(Feature.experimental_smaia)] = .{ | ||
| 213 | .llvm_name = "experimental-smaia", | ||
| 214 | .description = "'Smaia' (Smaia encompasses all added CSRs and all modifications to interrupt response behavior that the AIA specifies for a hart, over all privilege levels.)", | ||
| 215 | .dependencies = featureSet(&[_]Feature{}), | ||
| 216 | }; | ||
| 217 | result[@intFromEnum(Feature.experimental_ssaia)] = .{ | ||
| 218 | .llvm_name = "experimental-ssaia", | ||
| 219 | .description = "'Ssaia' (Ssaia is essentially the same as Smaia except excluding the machine-level CSRs and behavior not directly visible to supervisor level.)", | ||
| 220 | .dependencies = featureSet(&[_]Feature{}), | ||
| 221 | }; | ||
| 222 | result[@intFromEnum(Feature.experimental_zacas)] = .{ | ||
| 223 | .llvm_name = "experimental-zacas", | ||
| 224 | .description = "'Zacas' (Atomic Compare-And-Swap Instructions)", | ||
| 225 | .dependencies = featureSet(&[_]Feature{}), | ||
| 226 | }; | ||
| 227 | result[@intFromEnum(Feature.experimental_zfa)] = .{ | ||
| 228 | .llvm_name = "experimental-zfa", | ||
| 229 | .description = "'Zfa' (Additional Floating-Point)", | ||
| 230 | .dependencies = featureSet(&[_]Feature{ | ||
| 231 | .f, | ||
| 232 | }), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.experimental_zfbfmin)] = .{ | ||
| 235 | .llvm_name = "experimental-zfbfmin", | ||
| 236 | .description = "'Zfbfmin' (Scalar BF16 Converts)", | ||
| 237 | .dependencies = featureSet(&[_]Feature{ | ||
| 238 | .f, | ||
| 239 | }), | ||
| 240 | }; | ||
| 241 | result[@intFromEnum(Feature.experimental_zicond)] = .{ | ||
| 242 | .llvm_name = "experimental-zicond", | ||
| 243 | .description = "'Zicond' (Integer Conditional Operations)", | ||
| 244 | .dependencies = featureSet(&[_]Feature{}), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.experimental_zihintntl)] = .{ | ||
| 247 | .llvm_name = "experimental-zihintntl", | ||
| 248 | .description = "'Zihintntl' (Non-Temporal Locality Hints)", | ||
| 249 | .dependencies = featureSet(&[_]Feature{}), | ||
| 250 | }; | ||
| 251 | result[@intFromEnum(Feature.experimental_ztso)] = .{ | ||
| 252 | .llvm_name = "experimental-ztso", | ||
| 253 | .description = "'Ztso' (Memory Model - Total Store Order)", | ||
| 254 | .dependencies = featureSet(&[_]Feature{}), | ||
| 255 | }; | ||
| 256 | result[@intFromEnum(Feature.experimental_zvbb)] = .{ | ||
| 257 | .llvm_name = "experimental-zvbb", | ||
| 258 | .description = "'Zvbb' (Vector Bit-manipulation used in Cryptography)", | ||
| 259 | .dependencies = featureSet(&[_]Feature{}), | ||
| 260 | }; | ||
| 261 | result[@intFromEnum(Feature.experimental_zvbc)] = .{ | ||
| 262 | .llvm_name = "experimental-zvbc", | ||
| 263 | .description = "'Zvbc' (Vector Carryless Multiplication)", | ||
| 264 | .dependencies = featureSet(&[_]Feature{}), | ||
| 265 | }; | ||
| 266 | result[@intFromEnum(Feature.experimental_zvfbfmin)] = .{ | ||
| 267 | .llvm_name = "experimental-zvfbfmin", | ||
| 268 | .description = "'Zvbfmin' (Vector BF16 Converts)", | ||
| 269 | .dependencies = featureSet(&[_]Feature{ | ||
| 270 | .zve32f, | ||
| 271 | }), | ||
| 272 | }; | ||
| 273 | result[@intFromEnum(Feature.experimental_zvfbfwma)] = .{ | ||
| 274 | .llvm_name = "experimental-zvfbfwma", | ||
| 275 | .description = "'Zvfbfwma' (Vector BF16 widening mul-add)", | ||
| 276 | .dependencies = featureSet(&[_]Feature{ | ||
| 277 | .zve32f, | ||
| 278 | }), | ||
| 279 | }; | ||
| 280 | result[@intFromEnum(Feature.experimental_zvkg)] = .{ | ||
| 281 | .llvm_name = "experimental-zvkg", | ||
| 282 | .description = "'Zvkg' (Vector GCM instructions for Cryptography)", | ||
| 283 | .dependencies = featureSet(&[_]Feature{}), | ||
| 284 | }; | ||
| 285 | result[@intFromEnum(Feature.experimental_zvkn)] = .{ | ||
| 286 | .llvm_name = "experimental-zvkn", | ||
| 287 | .description = "This extension is shorthand for the following set of other extensions: Zvkned, Zvknhb, Zvbb, Zvbc, and Zvkt.", | ||
| 288 | .dependencies = featureSet(&[_]Feature{}), | ||
| 289 | }; | ||
| 290 | result[@intFromEnum(Feature.experimental_zvknc)] = .{ | ||
| 291 | .llvm_name = "experimental-zvknc", | ||
| 292 | .description = "This extension is shorthand for the following set of other extensions: Zvkn and Zvbc.", | ||
| 293 | .dependencies = featureSet(&[_]Feature{}), | ||
| 294 | }; | ||
| 295 | result[@intFromEnum(Feature.experimental_zvkned)] = .{ | ||
| 296 | .llvm_name = "experimental-zvkned", | ||
| 297 | .description = "'Zvkned' (Vector AES Encryption & Decryption (Single Round))", | ||
| 298 | .dependencies = featureSet(&[_]Feature{}), | ||
| 299 | }; | ||
| 300 | result[@intFromEnum(Feature.experimental_zvkng)] = .{ | ||
| 301 | .llvm_name = "experimental-zvkng", | ||
| 302 | .description = "This extension is shorthand for the following set of other extensions: Zvkn and Zvkg.", | ||
| 303 | .dependencies = featureSet(&[_]Feature{}), | ||
| 304 | }; | ||
| 305 | result[@intFromEnum(Feature.experimental_zvknha)] = .{ | ||
| 306 | .llvm_name = "experimental-zvknha", | ||
| 307 | .description = "'Zvknha' (Vector SHA-2 (SHA-256 only))", | ||
| 308 | .dependencies = featureSet(&[_]Feature{}), | ||
| 309 | }; | ||
| 310 | result[@intFromEnum(Feature.experimental_zvknhb)] = .{ | ||
| 311 | .llvm_name = "experimental-zvknhb", | ||
| 312 | .description = "'Zvknhb' (Vector SHA-2 (SHA-256 and SHA-512))", | ||
| 313 | .dependencies = featureSet(&[_]Feature{ | ||
| 314 | .experimental_zvknha, | ||
| 315 | }), | ||
| 316 | }; | ||
| 317 | result[@intFromEnum(Feature.experimental_zvks)] = .{ | ||
| 318 | .llvm_name = "experimental-zvks", | ||
| 319 | .description = "This extension is shorthand for the following set of other extensions: Zvksed, Zvksh, Zvbb, Zvbc, and Zvkt.", | ||
| 320 | .dependencies = featureSet(&[_]Feature{}), | ||
| 321 | }; | ||
| 322 | result[@intFromEnum(Feature.experimental_zvksc)] = .{ | ||
| 323 | .llvm_name = "experimental-zvksc", | ||
| 324 | .description = "This extension is shorthand for the following set of other extensions: Zvks and Zvbc.", | ||
| 325 | .dependencies = featureSet(&[_]Feature{}), | ||
| 326 | }; | ||
| 327 | result[@intFromEnum(Feature.experimental_zvksed)] = .{ | ||
| 328 | .llvm_name = "experimental-zvksed", | ||
| 329 | .description = "'Zvksed' (SM4 Block Cipher Instructions)", | ||
| 330 | .dependencies = featureSet(&[_]Feature{}), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.experimental_zvksg)] = .{ | ||
| 333 | .llvm_name = "experimental-zvksg", | ||
| 334 | .description = "This extension is shorthand for the following set of other extensions: Zvks and Zvkg.", | ||
| 335 | .dependencies = featureSet(&[_]Feature{}), | ||
| 336 | }; | ||
| 337 | result[@intFromEnum(Feature.experimental_zvksh)] = .{ | ||
| 338 | .llvm_name = "experimental-zvksh", | ||
| 339 | .description = "'Zvksh' (SM3 Hash Function Instructions)", | ||
| 340 | .dependencies = featureSet(&[_]Feature{}), | ||
| 341 | }; | ||
| 342 | result[@intFromEnum(Feature.experimental_zvkt)] = .{ | ||
| 343 | .llvm_name = "experimental-zvkt", | ||
| 344 | .description = "'Zvkt' (Vector Data-Independent Execution Latency)", | ||
| 345 | .dependencies = featureSet(&[_]Feature{}), | ||
| 346 | }; | ||
| 347 | result[@intFromEnum(Feature.f)] = .{ | ||
| 348 | .llvm_name = "f", | ||
| 349 | .description = "'F' (Single-Precision Floating-Point)", | ||
| 350 | .dependencies = featureSet(&[_]Feature{ | ||
| 351 | .zicsr, | ||
| 352 | }), | ||
| 353 | }; | ||
| 354 | result[@intFromEnum(Feature.forced_atomics)] = .{ | ||
| 355 | .llvm_name = "forced-atomics", | ||
| 356 | .description = "Assume that lock-free native-width atomics are available", | ||
| 357 | .dependencies = featureSet(&[_]Feature{}), | ||
| 358 | }; | ||
| 359 | result[@intFromEnum(Feature.h)] = .{ | ||
| 360 | .llvm_name = "h", | ||
| 361 | .description = "'H' (Hypervisor)", | ||
| 362 | .dependencies = featureSet(&[_]Feature{}), | ||
| 363 | }; | ||
| 364 | result[@intFromEnum(Feature.lui_addi_fusion)] = .{ | ||
| 365 | .llvm_name = "lui-addi-fusion", | ||
| 366 | .description = "Enable LUI+ADDI macrofusion", | ||
| 367 | .dependencies = featureSet(&[_]Feature{}), | ||
| 368 | }; | ||
| 369 | result[@intFromEnum(Feature.m)] = .{ | ||
| 370 | .llvm_name = "m", | ||
| 371 | .description = "'M' (Integer Multiplication and Division)", | ||
| 372 | .dependencies = featureSet(&[_]Feature{}), | ||
| 373 | }; | ||
| 374 | result[@intFromEnum(Feature.no_default_unroll)] = .{ | ||
| 375 | .llvm_name = "no-default-unroll", | ||
| 376 | .description = "Disable default unroll preference.", | ||
| 377 | .dependencies = featureSet(&[_]Feature{}), | ||
| 378 | }; | ||
| 379 | result[@intFromEnum(Feature.no_optimized_zero_stride_load)] = .{ | ||
| 380 | .llvm_name = "no-optimized-zero-stride-load", | ||
| 381 | .description = "Hasn't optimized (perform fewer memory operations)zero-stride vector load", | ||
| 382 | .dependencies = featureSet(&[_]Feature{}), | ||
| 383 | }; | ||
| 384 | result[@intFromEnum(Feature.no_rvc_hints)] = .{ | ||
| 385 | .llvm_name = "no-rvc-hints", | ||
| 386 | .description = "Disable RVC Hint Instructions.", | ||
| 387 | .dependencies = featureSet(&[_]Feature{}), | ||
| 388 | }; | ||
| 389 | result[@intFromEnum(Feature.relax)] = .{ | ||
| 390 | .llvm_name = "relax", | ||
| 391 | .description = "Enable Linker relaxation.", | ||
| 392 | .dependencies = featureSet(&[_]Feature{}), | ||
| 393 | }; | ||
| 394 | result[@intFromEnum(Feature.reserve_x1)] = .{ | ||
| 395 | .llvm_name = "reserve-x1", | ||
| 396 | .description = "Reserve X1", | ||
| 397 | .dependencies = featureSet(&[_]Feature{}), | ||
| 398 | }; | ||
| 399 | result[@intFromEnum(Feature.reserve_x10)] = .{ | ||
| 400 | .llvm_name = "reserve-x10", | ||
| 401 | .description = "Reserve X10", | ||
| 402 | .dependencies = featureSet(&[_]Feature{}), | ||
| 403 | }; | ||
| 404 | result[@intFromEnum(Feature.reserve_x11)] = .{ | ||
| 405 | .llvm_name = "reserve-x11", | ||
| 406 | .description = "Reserve X11", | ||
| 407 | .dependencies = featureSet(&[_]Feature{}), | ||
| 408 | }; | ||
| 409 | result[@intFromEnum(Feature.reserve_x12)] = .{ | ||
| 410 | .llvm_name = "reserve-x12", | ||
| 411 | .description = "Reserve X12", | ||
| 412 | .dependencies = featureSet(&[_]Feature{}), | ||
| 413 | }; | ||
| 414 | result[@intFromEnum(Feature.reserve_x13)] = .{ | ||
| 415 | .llvm_name = "reserve-x13", | ||
| 416 | .description = "Reserve X13", | ||
| 417 | .dependencies = featureSet(&[_]Feature{}), | ||
| 418 | }; | ||
| 419 | result[@intFromEnum(Feature.reserve_x14)] = .{ | ||
| 420 | .llvm_name = "reserve-x14", | ||
| 421 | .description = "Reserve X14", | ||
| 422 | .dependencies = featureSet(&[_]Feature{}), | ||
| 423 | }; | ||
| 424 | result[@intFromEnum(Feature.reserve_x15)] = .{ | ||
| 425 | .llvm_name = "reserve-x15", | ||
| 426 | .description = "Reserve X15", | ||
| 427 | .dependencies = featureSet(&[_]Feature{}), | ||
| 428 | }; | ||
| 429 | result[@intFromEnum(Feature.reserve_x16)] = .{ | ||
| 430 | .llvm_name = "reserve-x16", | ||
| 431 | .description = "Reserve X16", | ||
| 432 | .dependencies = featureSet(&[_]Feature{}), | ||
| 433 | }; | ||
| 434 | result[@intFromEnum(Feature.reserve_x17)] = .{ | ||
| 435 | .llvm_name = "reserve-x17", | ||
| 436 | .description = "Reserve X17", | ||
| 437 | .dependencies = featureSet(&[_]Feature{}), | ||
| 438 | }; | ||
| 439 | result[@intFromEnum(Feature.reserve_x18)] = .{ | ||
| 440 | .llvm_name = "reserve-x18", | ||
| 441 | .description = "Reserve X18", | ||
| 442 | .dependencies = featureSet(&[_]Feature{}), | ||
| 443 | }; | ||
| 444 | result[@intFromEnum(Feature.reserve_x19)] = .{ | ||
| 445 | .llvm_name = "reserve-x19", | ||
| 446 | .description = "Reserve X19", | ||
| 447 | .dependencies = featureSet(&[_]Feature{}), | ||
| 448 | }; | ||
| 449 | result[@intFromEnum(Feature.reserve_x2)] = .{ | ||
| 450 | .llvm_name = "reserve-x2", | ||
| 451 | .description = "Reserve X2", | ||
| 452 | .dependencies = featureSet(&[_]Feature{}), | ||
| 453 | }; | ||
| 454 | result[@intFromEnum(Feature.reserve_x20)] = .{ | ||
| 455 | .llvm_name = "reserve-x20", | ||
| 456 | .description = "Reserve X20", | ||
| 457 | .dependencies = featureSet(&[_]Feature{}), | ||
| 458 | }; | ||
| 459 | result[@intFromEnum(Feature.reserve_x21)] = .{ | ||
| 460 | .llvm_name = "reserve-x21", | ||
| 461 | .description = "Reserve X21", | ||
| 462 | .dependencies = featureSet(&[_]Feature{}), | ||
| 463 | }; | ||
| 464 | result[@intFromEnum(Feature.reserve_x22)] = .{ | ||
| 465 | .llvm_name = "reserve-x22", | ||
| 466 | .description = "Reserve X22", | ||
| 467 | .dependencies = featureSet(&[_]Feature{}), | ||
| 468 | }; | ||
| 469 | result[@intFromEnum(Feature.reserve_x23)] = .{ | ||
| 470 | .llvm_name = "reserve-x23", | ||
| 471 | .description = "Reserve X23", | ||
| 472 | .dependencies = featureSet(&[_]Feature{}), | ||
| 473 | }; | ||
| 474 | result[@intFromEnum(Feature.reserve_x24)] = .{ | ||
| 475 | .llvm_name = "reserve-x24", | ||
| 476 | .description = "Reserve X24", | ||
| 477 | .dependencies = featureSet(&[_]Feature{}), | ||
| 478 | }; | ||
| 479 | result[@intFromEnum(Feature.reserve_x25)] = .{ | ||
| 480 | .llvm_name = "reserve-x25", | ||
| 481 | .description = "Reserve X25", | ||
| 482 | .dependencies = featureSet(&[_]Feature{}), | ||
| 483 | }; | ||
| 484 | result[@intFromEnum(Feature.reserve_x26)] = .{ | ||
| 485 | .llvm_name = "reserve-x26", | ||
| 486 | .description = "Reserve X26", | ||
| 487 | .dependencies = featureSet(&[_]Feature{}), | ||
| 488 | }; | ||
| 489 | result[@intFromEnum(Feature.reserve_x27)] = .{ | ||
| 490 | .llvm_name = "reserve-x27", | ||
| 491 | .description = "Reserve X27", | ||
| 492 | .dependencies = featureSet(&[_]Feature{}), | ||
| 493 | }; | ||
| 494 | result[@intFromEnum(Feature.reserve_x28)] = .{ | ||
| 495 | .llvm_name = "reserve-x28", | ||
| 496 | .description = "Reserve X28", | ||
| 497 | .dependencies = featureSet(&[_]Feature{}), | ||
| 498 | }; | ||
| 499 | result[@intFromEnum(Feature.reserve_x29)] = .{ | ||
| 500 | .llvm_name = "reserve-x29", | ||
| 501 | .description = "Reserve X29", | ||
| 502 | .dependencies = featureSet(&[_]Feature{}), | ||
| 503 | }; | ||
| 504 | result[@intFromEnum(Feature.reserve_x3)] = .{ | ||
| 505 | .llvm_name = "reserve-x3", | ||
| 506 | .description = "Reserve X3", | ||
| 507 | .dependencies = featureSet(&[_]Feature{}), | ||
| 508 | }; | ||
| 509 | result[@intFromEnum(Feature.reserve_x30)] = .{ | ||
| 510 | .llvm_name = "reserve-x30", | ||
| 511 | .description = "Reserve X30", | ||
| 512 | .dependencies = featureSet(&[_]Feature{}), | ||
| 513 | }; | ||
| 514 | result[@intFromEnum(Feature.reserve_x31)] = .{ | ||
| 515 | .llvm_name = "reserve-x31", | ||
| 516 | .description = "Reserve X31", | ||
| 517 | .dependencies = featureSet(&[_]Feature{}), | ||
| 518 | }; | ||
| 519 | result[@intFromEnum(Feature.reserve_x4)] = .{ | ||
| 520 | .llvm_name = "reserve-x4", | ||
| 521 | .description = "Reserve X4", | ||
| 522 | .dependencies = featureSet(&[_]Feature{}), | ||
| 523 | }; | ||
| 524 | result[@intFromEnum(Feature.reserve_x5)] = .{ | ||
| 525 | .llvm_name = "reserve-x5", | ||
| 526 | .description = "Reserve X5", | ||
| 527 | .dependencies = featureSet(&[_]Feature{}), | ||
| 528 | }; | ||
| 529 | result[@intFromEnum(Feature.reserve_x6)] = .{ | ||
| 530 | .llvm_name = "reserve-x6", | ||
| 531 | .description = "Reserve X6", | ||
| 532 | .dependencies = featureSet(&[_]Feature{}), | ||
| 533 | }; | ||
| 534 | result[@intFromEnum(Feature.reserve_x7)] = .{ | ||
| 535 | .llvm_name = "reserve-x7", | ||
| 536 | .description = "Reserve X7", | ||
| 537 | .dependencies = featureSet(&[_]Feature{}), | ||
| 538 | }; | ||
| 539 | result[@intFromEnum(Feature.reserve_x8)] = .{ | ||
| 540 | .llvm_name = "reserve-x8", | ||
| 541 | .description = "Reserve X8", | ||
| 542 | .dependencies = featureSet(&[_]Feature{}), | ||
| 543 | }; | ||
| 544 | result[@intFromEnum(Feature.reserve_x9)] = .{ | ||
| 545 | .llvm_name = "reserve-x9", | ||
| 546 | .description = "Reserve X9", | ||
| 547 | .dependencies = featureSet(&[_]Feature{}), | ||
| 548 | }; | ||
| 549 | result[@intFromEnum(Feature.save_restore)] = .{ | ||
| 550 | .llvm_name = "save-restore", | ||
| 551 | .description = "Enable save/restore.", | ||
| 552 | .dependencies = featureSet(&[_]Feature{}), | ||
| 553 | }; | ||
| 554 | result[@intFromEnum(Feature.seq_cst_trailing_fence)] = .{ | ||
| 555 | .llvm_name = "seq-cst-trailing-fence", | ||
| 556 | .description = "Enable trailing fence for seq-cst store.", | ||
| 557 | .dependencies = featureSet(&[_]Feature{}), | ||
| 558 | }; | ||
| 559 | result[@intFromEnum(Feature.short_forward_branch_opt)] = .{ | ||
| 560 | .llvm_name = "short-forward-branch-opt", | ||
| 561 | .description = "Enable short forward branch optimization", | ||
| 562 | .dependencies = featureSet(&[_]Feature{}), | ||
| 563 | }; | ||
| 564 | result[@intFromEnum(Feature.svinval)] = .{ | ||
| 565 | .llvm_name = "svinval", | ||
| 566 | .description = "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)", | ||
| 567 | .dependencies = featureSet(&[_]Feature{}), | ||
| 568 | }; | ||
| 569 | result[@intFromEnum(Feature.svnapot)] = .{ | ||
| 570 | .llvm_name = "svnapot", | ||
| 571 | .description = "'Svnapot' (NAPOT Translation Contiguity)", | ||
| 572 | .dependencies = featureSet(&[_]Feature{}), | ||
| 573 | }; | ||
| 574 | result[@intFromEnum(Feature.svpbmt)] = .{ | ||
| 575 | .llvm_name = "svpbmt", | ||
| 576 | .description = "'Svpbmt' (Page-Based Memory Types)", | ||
| 577 | .dependencies = featureSet(&[_]Feature{}), | ||
| 578 | }; | ||
| 579 | result[@intFromEnum(Feature.tagged_globals)] = .{ | ||
| 580 | .llvm_name = "tagged-globals", | ||
| 581 | .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", | ||
| 582 | .dependencies = featureSet(&[_]Feature{}), | ||
| 583 | }; | ||
| 584 | result[@intFromEnum(Feature.unaligned_scalar_mem)] = .{ | ||
| 585 | .llvm_name = "unaligned-scalar-mem", | ||
| 586 | .description = "Has reasonably performant unaligned scalar loads and stores", | ||
| 587 | .dependencies = featureSet(&[_]Feature{}), | ||
| 588 | }; | ||
| 589 | result[@intFromEnum(Feature.unaligned_vector_mem)] = .{ | ||
| 590 | .llvm_name = "unaligned-vector-mem", | ||
| 591 | .description = "Has reasonably performant unaligned vector loads and stores", | ||
| 592 | .dependencies = featureSet(&[_]Feature{}), | ||
| 593 | }; | ||
| 594 | result[@intFromEnum(Feature.v)] = .{ | ||
| 595 | .llvm_name = "v", | ||
| 596 | .description = "'V' (Vector Extension for Application Processors)", | ||
| 597 | .dependencies = featureSet(&[_]Feature{ | ||
| 598 | .zve64d, | ||
| 599 | .zvl128b, | ||
| 600 | }), | ||
| 601 | }; | ||
| 602 | result[@intFromEnum(Feature.xcvbitmanip)] = .{ | ||
| 603 | .llvm_name = "xcvbitmanip", | ||
| 604 | .description = "'XCVbitmanip' (CORE-V Bit Manipulation)", | ||
| 605 | .dependencies = featureSet(&[_]Feature{}), | ||
| 606 | }; | ||
| 607 | result[@intFromEnum(Feature.xcvmac)] = .{ | ||
| 608 | .llvm_name = "xcvmac", | ||
| 609 | .description = "'XCVmac' (CORE-V Multiply-Accumulate)", | ||
| 610 | .dependencies = featureSet(&[_]Feature{}), | ||
| 611 | }; | ||
| 612 | result[@intFromEnum(Feature.xsfcie)] = .{ | ||
| 613 | .llvm_name = "xsfcie", | ||
| 614 | .description = "'XSfcie' (SiFive Custom Instruction Extension SCIE.)", | ||
| 615 | .dependencies = featureSet(&[_]Feature{}), | ||
| 616 | }; | ||
| 617 | result[@intFromEnum(Feature.xsfvcp)] = .{ | ||
| 618 | .llvm_name = "xsfvcp", | ||
| 619 | .description = "'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions)", | ||
| 620 | .dependencies = featureSet(&[_]Feature{ | ||
| 621 | .zve32x, | ||
| 622 | }), | ||
| 623 | }; | ||
| 624 | result[@intFromEnum(Feature.xtheadba)] = .{ | ||
| 625 | .llvm_name = "xtheadba", | ||
| 626 | .description = "'xtheadba' (T-Head address calculation instructions)", | ||
| 627 | .dependencies = featureSet(&[_]Feature{}), | ||
| 628 | }; | ||
| 629 | result[@intFromEnum(Feature.xtheadbb)] = .{ | ||
| 630 | .llvm_name = "xtheadbb", | ||
| 631 | .description = "'xtheadbb' (T-Head basic bit-manipulation instructions)", | ||
| 632 | .dependencies = featureSet(&[_]Feature{}), | ||
| 633 | }; | ||
| 634 | result[@intFromEnum(Feature.xtheadbs)] = .{ | ||
| 635 | .llvm_name = "xtheadbs", | ||
| 636 | .description = "'xtheadbs' (T-Head single-bit instructions)", | ||
| 637 | .dependencies = featureSet(&[_]Feature{}), | ||
| 638 | }; | ||
| 639 | result[@intFromEnum(Feature.xtheadcmo)] = .{ | ||
| 640 | .llvm_name = "xtheadcmo", | ||
| 641 | .description = "'xtheadcmo' (T-Head cache management instructions)", | ||
| 642 | .dependencies = featureSet(&[_]Feature{}), | ||
| 643 | }; | ||
| 644 | result[@intFromEnum(Feature.xtheadcondmov)] = .{ | ||
| 645 | .llvm_name = "xtheadcondmov", | ||
| 646 | .description = "'xtheadcondmov' (T-Head conditional move instructions)", | ||
| 647 | .dependencies = featureSet(&[_]Feature{}), | ||
| 648 | }; | ||
| 649 | result[@intFromEnum(Feature.xtheadfmemidx)] = .{ | ||
| 650 | .llvm_name = "xtheadfmemidx", | ||
| 651 | .description = "'xtheadfmemidx' (T-Head FP Indexed Memory Operations)", | ||
| 652 | .dependencies = featureSet(&[_]Feature{ | ||
| 653 | .f, | ||
| 654 | }), | ||
| 655 | }; | ||
| 656 | result[@intFromEnum(Feature.xtheadmac)] = .{ | ||
| 657 | .llvm_name = "xtheadmac", | ||
| 658 | .description = "'xtheadmac' (T-Head Multiply-Accumulate Instructions)", | ||
| 659 | .dependencies = featureSet(&[_]Feature{}), | ||
| 660 | }; | ||
| 661 | result[@intFromEnum(Feature.xtheadmemidx)] = .{ | ||
| 662 | .llvm_name = "xtheadmemidx", | ||
| 663 | .description = "'xtheadmemidx' (T-Head Indexed Memory Operations)", | ||
| 664 | .dependencies = featureSet(&[_]Feature{}), | ||
| 665 | }; | ||
| 666 | result[@intFromEnum(Feature.xtheadmempair)] = .{ | ||
| 667 | .llvm_name = "xtheadmempair", | ||
| 668 | .description = "'xtheadmempair' (T-Head two-GPR Memory Operations)", | ||
| 669 | .dependencies = featureSet(&[_]Feature{}), | ||
| 670 | }; | ||
| 671 | result[@intFromEnum(Feature.xtheadsync)] = .{ | ||
| 672 | .llvm_name = "xtheadsync", | ||
| 673 | .description = "'xtheadsync' (T-Head multicore synchronization instructions)", | ||
| 674 | .dependencies = featureSet(&[_]Feature{}), | ||
| 675 | }; | ||
| 676 | result[@intFromEnum(Feature.xtheadvdot)] = .{ | ||
| 677 | .llvm_name = "xtheadvdot", | ||
| 678 | .description = "'xtheadvdot' (T-Head Vector Extensions for Dot)", | ||
| 679 | .dependencies = featureSet(&[_]Feature{ | ||
| 680 | .v, | ||
| 681 | }), | ||
| 682 | }; | ||
| 683 | result[@intFromEnum(Feature.xventanacondops)] = .{ | ||
| 684 | .llvm_name = "xventanacondops", | ||
| 685 | .description = "'XVentanaCondOps' (Ventana Conditional Ops)", | ||
| 686 | .dependencies = featureSet(&[_]Feature{}), | ||
| 687 | }; | ||
| 688 | result[@intFromEnum(Feature.zawrs)] = .{ | ||
| 689 | .llvm_name = "zawrs", | ||
| 690 | .description = "'Zawrs' (Wait on Reservation Set)", | ||
| 691 | .dependencies = featureSet(&[_]Feature{}), | ||
| 692 | }; | ||
| 693 | result[@intFromEnum(Feature.zba)] = .{ | ||
| 694 | .llvm_name = "zba", | ||
| 695 | .description = "'Zba' (Address Generation Instructions)", | ||
| 696 | .dependencies = featureSet(&[_]Feature{}), | ||
| 697 | }; | ||
| 698 | result[@intFromEnum(Feature.zbb)] = .{ | ||
| 699 | .llvm_name = "zbb", | ||
| 700 | .description = "'Zbb' (Basic Bit-Manipulation)", | ||
| 701 | .dependencies = featureSet(&[_]Feature{}), | ||
| 702 | }; | ||
| 703 | result[@intFromEnum(Feature.zbc)] = .{ | ||
| 704 | .llvm_name = "zbc", | ||
| 705 | .description = "'Zbc' (Carry-Less Multiplication)", | ||
| 706 | .dependencies = featureSet(&[_]Feature{}), | ||
| 707 | }; | ||
| 708 | result[@intFromEnum(Feature.zbkb)] = .{ | ||
| 709 | .llvm_name = "zbkb", | ||
| 710 | .description = "'Zbkb' (Bitmanip instructions for Cryptography)", | ||
| 711 | .dependencies = featureSet(&[_]Feature{}), | ||
| 712 | }; | ||
| 713 | result[@intFromEnum(Feature.zbkc)] = .{ | ||
| 714 | .llvm_name = "zbkc", | ||
| 715 | .description = "'Zbkc' (Carry-less multiply instructions for Cryptography)", | ||
| 716 | .dependencies = featureSet(&[_]Feature{}), | ||
| 717 | }; | ||
| 718 | result[@intFromEnum(Feature.zbkx)] = .{ | ||
| 719 | .llvm_name = "zbkx", | ||
| 720 | .description = "'Zbkx' (Crossbar permutation instructions)", | ||
| 721 | .dependencies = featureSet(&[_]Feature{}), | ||
| 722 | }; | ||
| 723 | result[@intFromEnum(Feature.zbs)] = .{ | ||
| 724 | .llvm_name = "zbs", | ||
| 725 | .description = "'Zbs' (Single-Bit Instructions)", | ||
| 726 | .dependencies = featureSet(&[_]Feature{}), | ||
| 727 | }; | ||
| 728 | result[@intFromEnum(Feature.zca)] = .{ | ||
| 729 | .llvm_name = "zca", | ||
| 730 | .description = "'Zca' (part of the C extension, excluding compressed floating point loads/stores)", | ||
| 731 | .dependencies = featureSet(&[_]Feature{}), | ||
| 732 | }; | ||
| 733 | result[@intFromEnum(Feature.zcb)] = .{ | ||
| 734 | .llvm_name = "zcb", | ||
| 735 | .description = "'Zcb' (Compressed basic bit manipulation instructions)", | ||
| 736 | .dependencies = featureSet(&[_]Feature{ | ||
| 737 | .zca, | ||
| 738 | }), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.zcd)] = .{ | ||
| 741 | .llvm_name = "zcd", | ||
| 742 | .description = "'Zcd' (Compressed Double-Precision Floating-Point Instructions)", | ||
| 743 | .dependencies = featureSet(&[_]Feature{ | ||
| 744 | .zca, | ||
| 745 | }), | ||
| 746 | }; | ||
| 747 | result[@intFromEnum(Feature.zce)] = .{ | ||
| 748 | .llvm_name = "zce", | ||
| 749 | .description = "'Zce' (Compressed extensions for microcontrollers)", | ||
| 750 | .dependencies = featureSet(&[_]Feature{ | ||
| 751 | .zcb, | ||
| 752 | .zcmp, | ||
| 753 | .zcmt, | ||
| 754 | }), | ||
| 755 | }; | ||
| 756 | result[@intFromEnum(Feature.zcf)] = .{ | ||
| 757 | .llvm_name = "zcf", | ||
| 758 | .description = "'Zcf' (Compressed Single-Precision Floating-Point Instructions)", | ||
| 759 | .dependencies = featureSet(&[_]Feature{ | ||
| 760 | .zca, | ||
| 761 | }), | ||
| 762 | }; | ||
| 763 | result[@intFromEnum(Feature.zcmp)] = .{ | ||
| 764 | .llvm_name = "zcmp", | ||
| 765 | .description = "'Zcmp' (sequenced instuctions for code-size reduction)", | ||
| 766 | .dependencies = featureSet(&[_]Feature{ | ||
| 767 | .zca, | ||
| 768 | }), | ||
| 769 | }; | ||
| 770 | result[@intFromEnum(Feature.zcmt)] = .{ | ||
| 771 | .llvm_name = "zcmt", | ||
| 772 | .description = "'Zcmt' (table jump instuctions for code-size reduction)", | ||
| 773 | .dependencies = featureSet(&[_]Feature{ | ||
| 774 | .zca, | ||
| 775 | .zicsr, | ||
| 776 | }), | ||
| 777 | }; | ||
| 778 | result[@intFromEnum(Feature.zdinx)] = .{ | ||
| 779 | .llvm_name = "zdinx", | ||
| 780 | .description = "'Zdinx' (Double in Integer)", | ||
| 781 | .dependencies = featureSet(&[_]Feature{ | ||
| 782 | .zfinx, | ||
| 783 | }), | ||
| 784 | }; | ||
| 785 | result[@intFromEnum(Feature.zfh)] = .{ | ||
| 786 | .llvm_name = "zfh", | ||
| 787 | .description = "'Zfh' (Half-Precision Floating-Point)", | ||
| 788 | .dependencies = featureSet(&[_]Feature{ | ||
| 789 | .f, | ||
| 790 | }), | ||
| 791 | }; | ||
| 792 | result[@intFromEnum(Feature.zfhmin)] = .{ | ||
| 793 | .llvm_name = "zfhmin", | ||
| 794 | .description = "'Zfhmin' (Half-Precision Floating-Point Minimal)", | ||
| 795 | .dependencies = featureSet(&[_]Feature{ | ||
| 796 | .f, | ||
| 797 | }), | ||
| 798 | }; | ||
| 799 | result[@intFromEnum(Feature.zfinx)] = .{ | ||
| 800 | .llvm_name = "zfinx", | ||
| 801 | .description = "'Zfinx' (Float in Integer)", | ||
| 802 | .dependencies = featureSet(&[_]Feature{ | ||
| 803 | .zicsr, | ||
| 804 | }), | ||
| 805 | }; | ||
| 806 | result[@intFromEnum(Feature.zhinx)] = .{ | ||
| 807 | .llvm_name = "zhinx", | ||
| 808 | .description = "'Zhinx' (Half Float in Integer)", | ||
| 809 | .dependencies = featureSet(&[_]Feature{ | ||
| 810 | .zfinx, | ||
| 811 | }), | ||
| 812 | }; | ||
| 813 | result[@intFromEnum(Feature.zhinxmin)] = .{ | ||
| 814 | .llvm_name = "zhinxmin", | ||
| 815 | .description = "'Zhinxmin' (Half Float in Integer Minimal)", | ||
| 816 | .dependencies = featureSet(&[_]Feature{ | ||
| 817 | .zfinx, | ||
| 818 | }), | ||
| 819 | }; | ||
| 820 | result[@intFromEnum(Feature.zicbom)] = .{ | ||
| 821 | .llvm_name = "zicbom", | ||
| 822 | .description = "'Zicbom' (Cache-Block Management Instructions)", | ||
| 823 | .dependencies = featureSet(&[_]Feature{}), | ||
| 824 | }; | ||
| 825 | result[@intFromEnum(Feature.zicbop)] = .{ | ||
| 826 | .llvm_name = "zicbop", | ||
| 827 | .description = "'Zicbop' (Cache-Block Prefetch Instructions)", | ||
| 828 | .dependencies = featureSet(&[_]Feature{}), | ||
| 829 | }; | ||
| 830 | result[@intFromEnum(Feature.zicboz)] = .{ | ||
| 831 | .llvm_name = "zicboz", | ||
| 832 | .description = "'Zicboz' (Cache-Block Zero Instructions)", | ||
| 833 | .dependencies = featureSet(&[_]Feature{}), | ||
| 834 | }; | ||
| 835 | result[@intFromEnum(Feature.zicntr)] = .{ | ||
| 836 | .llvm_name = "zicntr", | ||
| 837 | .description = "'Zicntr' (Base Counters and Timers)", | ||
| 838 | .dependencies = featureSet(&[_]Feature{ | ||
| 839 | .zicsr, | ||
| 840 | }), | ||
| 841 | }; | ||
| 842 | result[@intFromEnum(Feature.zicsr)] = .{ | ||
| 843 | .llvm_name = "zicsr", | ||
| 844 | .description = "'zicsr' (CSRs)", | ||
| 845 | .dependencies = featureSet(&[_]Feature{}), | ||
| 846 | }; | ||
| 847 | result[@intFromEnum(Feature.zifencei)] = .{ | ||
| 848 | .llvm_name = "zifencei", | ||
| 849 | .description = "'Zifencei' (fence.i)", | ||
| 850 | .dependencies = featureSet(&[_]Feature{}), | ||
| 851 | }; | ||
| 852 | result[@intFromEnum(Feature.zihintpause)] = .{ | ||
| 853 | .llvm_name = "zihintpause", | ||
| 854 | .description = "'Zihintpause' (Pause Hint)", | ||
| 855 | .dependencies = featureSet(&[_]Feature{}), | ||
| 856 | }; | ||
| 857 | result[@intFromEnum(Feature.zihpm)] = .{ | ||
| 858 | .llvm_name = "zihpm", | ||
| 859 | .description = "'Zihpm' (Hardware Performance Counters)", | ||
| 860 | .dependencies = featureSet(&[_]Feature{ | ||
| 861 | .zicsr, | ||
| 862 | }), | ||
| 863 | }; | ||
| 864 | result[@intFromEnum(Feature.zk)] = .{ | ||
| 865 | .llvm_name = "zk", | ||
| 866 | .description = "'Zk' (Standard scalar cryptography extension)", | ||
| 867 | .dependencies = featureSet(&[_]Feature{ | ||
| 868 | .zkn, | ||
| 869 | .zkr, | ||
| 870 | .zkt, | ||
| 871 | }), | ||
| 872 | }; | ||
| 873 | result[@intFromEnum(Feature.zkn)] = .{ | ||
| 874 | .llvm_name = "zkn", | ||
| 875 | .description = "'Zkn' (NIST Algorithm Suite)", | ||
| 876 | .dependencies = featureSet(&[_]Feature{ | ||
| 877 | .zbkb, | ||
| 878 | .zbkc, | ||
| 879 | .zbkx, | ||
| 880 | .zknd, | ||
| 881 | .zkne, | ||
| 882 | .zknh, | ||
| 883 | }), | ||
| 884 | }; | ||
| 885 | result[@intFromEnum(Feature.zknd)] = .{ | ||
| 886 | .llvm_name = "zknd", | ||
| 887 | .description = "'Zknd' (NIST Suite: AES Decryption)", | ||
| 888 | .dependencies = featureSet(&[_]Feature{}), | ||
| 889 | }; | ||
| 890 | result[@intFromEnum(Feature.zkne)] = .{ | ||
| 891 | .llvm_name = "zkne", | ||
| 892 | .description = "'Zkne' (NIST Suite: AES Encryption)", | ||
| 893 | .dependencies = featureSet(&[_]Feature{}), | ||
| 894 | }; | ||
| 895 | result[@intFromEnum(Feature.zknh)] = .{ | ||
| 896 | .llvm_name = "zknh", | ||
| 897 | .description = "'Zknh' (NIST Suite: Hash Function Instructions)", | ||
| 898 | .dependencies = featureSet(&[_]Feature{}), | ||
| 899 | }; | ||
| 900 | result[@intFromEnum(Feature.zkr)] = .{ | ||
| 901 | .llvm_name = "zkr", | ||
| 902 | .description = "'Zkr' (Entropy Source Extension)", | ||
| 903 | .dependencies = featureSet(&[_]Feature{}), | ||
| 904 | }; | ||
| 905 | result[@intFromEnum(Feature.zks)] = .{ | ||
| 906 | .llvm_name = "zks", | ||
| 907 | .description = "'Zks' (ShangMi Algorithm Suite)", | ||
| 908 | .dependencies = featureSet(&[_]Feature{ | ||
| 909 | .zbkb, | ||
| 910 | .zbkc, | ||
| 911 | .zbkx, | ||
| 912 | .zksed, | ||
| 913 | .zksh, | ||
| 914 | }), | ||
| 915 | }; | ||
| 916 | result[@intFromEnum(Feature.zksed)] = .{ | ||
| 917 | .llvm_name = "zksed", | ||
| 918 | .description = "'Zksed' (ShangMi Suite: SM4 Block Cipher Instructions)", | ||
| 919 | .dependencies = featureSet(&[_]Feature{}), | ||
| 920 | }; | ||
| 921 | result[@intFromEnum(Feature.zksh)] = .{ | ||
| 922 | .llvm_name = "zksh", | ||
| 923 | .description = "'Zksh' (ShangMi Suite: SM3 Hash Function Instructions)", | ||
| 924 | .dependencies = featureSet(&[_]Feature{}), | ||
| 925 | }; | ||
| 926 | result[@intFromEnum(Feature.zkt)] = .{ | ||
| 927 | .llvm_name = "zkt", | ||
| 928 | .description = "'Zkt' (Data Independent Execution Latency)", | ||
| 929 | .dependencies = featureSet(&[_]Feature{}), | ||
| 930 | }; | ||
| 931 | result[@intFromEnum(Feature.zmmul)] = .{ | ||
| 932 | .llvm_name = "zmmul", | ||
| 933 | .description = "'Zmmul' (Integer Multiplication)", | ||
| 934 | .dependencies = featureSet(&[_]Feature{}), | ||
| 935 | }; | ||
| 936 | result[@intFromEnum(Feature.zve32f)] = .{ | ||
| 937 | .llvm_name = "zve32f", | ||
| 938 | .description = "'Zve32f' (Vector Extensions for Embedded Processors with maximal 32 EEW and F extension)", | ||
| 939 | .dependencies = featureSet(&[_]Feature{ | ||
| 940 | .f, | ||
| 941 | .zve32x, | ||
| 942 | }), | ||
| 943 | }; | ||
| 944 | result[@intFromEnum(Feature.zve32x)] = .{ | ||
| 945 | .llvm_name = "zve32x", | ||
| 946 | .description = "'Zve32x' (Vector Extensions for Embedded Processors with maximal 32 EEW)", | ||
| 947 | .dependencies = featureSet(&[_]Feature{ | ||
| 948 | .zicsr, | ||
| 949 | .zvl32b, | ||
| 950 | }), | ||
| 951 | }; | ||
| 952 | result[@intFromEnum(Feature.zve64d)] = .{ | ||
| 953 | .llvm_name = "zve64d", | ||
| 954 | .description = "'Zve64d' (Vector Extensions for Embedded Processors with maximal 64 EEW, F and D extension)", | ||
| 955 | .dependencies = featureSet(&[_]Feature{ | ||
| 956 | .d, | ||
| 957 | .zve64f, | ||
| 958 | }), | ||
| 959 | }; | ||
| 960 | result[@intFromEnum(Feature.zve64f)] = .{ | ||
| 961 | .llvm_name = "zve64f", | ||
| 962 | .description = "'Zve64f' (Vector Extensions for Embedded Processors with maximal 64 EEW and F extension)", | ||
| 963 | .dependencies = featureSet(&[_]Feature{ | ||
| 964 | .zve32f, | ||
| 965 | .zve64x, | ||
| 966 | }), | ||
| 967 | }; | ||
| 968 | result[@intFromEnum(Feature.zve64x)] = .{ | ||
| 969 | .llvm_name = "zve64x", | ||
| 970 | .description = "'Zve64x' (Vector Extensions for Embedded Processors with maximal 64 EEW)", | ||
| 971 | .dependencies = featureSet(&[_]Feature{ | ||
| 972 | .zve32x, | ||
| 973 | .zvl64b, | ||
| 974 | }), | ||
| 975 | }; | ||
| 976 | result[@intFromEnum(Feature.zvfh)] = .{ | ||
| 977 | .llvm_name = "zvfh", | ||
| 978 | .description = "'Zvfh' (Vector Half-Precision Floating-Point)", | ||
| 979 | .dependencies = featureSet(&[_]Feature{ | ||
| 980 | .zfhmin, | ||
| 981 | .zve32f, | ||
| 982 | }), | ||
| 983 | }; | ||
| 984 | result[@intFromEnum(Feature.zvl1024b)] = .{ | ||
| 985 | .llvm_name = "zvl1024b", | ||
| 986 | .description = "'Zvl' (Minimum Vector Length) 1024", | ||
| 987 | .dependencies = featureSet(&[_]Feature{ | ||
| 988 | .zvl512b, | ||
| 989 | }), | ||
| 990 | }; | ||
| 991 | result[@intFromEnum(Feature.zvl128b)] = .{ | ||
| 992 | .llvm_name = "zvl128b", | ||
| 993 | .description = "'Zvl' (Minimum Vector Length) 128", | ||
| 994 | .dependencies = featureSet(&[_]Feature{ | ||
| 995 | .zvl64b, | ||
| 996 | }), | ||
| 997 | }; | ||
| 998 | result[@intFromEnum(Feature.zvl16384b)] = .{ | ||
| 999 | .llvm_name = "zvl16384b", | ||
| 1000 | .description = "'Zvl' (Minimum Vector Length) 16384", | ||
| 1001 | .dependencies = featureSet(&[_]Feature{ | ||
| 1002 | .zvl8192b, | ||
| 1003 | }), | ||
| 1004 | }; | ||
| 1005 | result[@intFromEnum(Feature.zvl2048b)] = .{ | ||
| 1006 | .llvm_name = "zvl2048b", | ||
| 1007 | .description = "'Zvl' (Minimum Vector Length) 2048", | ||
| 1008 | .dependencies = featureSet(&[_]Feature{ | ||
| 1009 | .zvl1024b, | ||
| 1010 | }), | ||
| 1011 | }; | ||
| 1012 | result[@intFromEnum(Feature.zvl256b)] = .{ | ||
| 1013 | .llvm_name = "zvl256b", | ||
| 1014 | .description = "'Zvl' (Minimum Vector Length) 256", | ||
| 1015 | .dependencies = featureSet(&[_]Feature{ | ||
| 1016 | .zvl128b, | ||
| 1017 | }), | ||
| 1018 | }; | ||
| 1019 | result[@intFromEnum(Feature.zvl32768b)] = .{ | ||
| 1020 | .llvm_name = "zvl32768b", | ||
| 1021 | .description = "'Zvl' (Minimum Vector Length) 32768", | ||
| 1022 | .dependencies = featureSet(&[_]Feature{ | ||
| 1023 | .zvl16384b, | ||
| 1024 | }), | ||
| 1025 | }; | ||
| 1026 | result[@intFromEnum(Feature.zvl32b)] = .{ | ||
| 1027 | .llvm_name = "zvl32b", | ||
| 1028 | .description = "'Zvl' (Minimum Vector Length) 32", | ||
| 1029 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1030 | }; | ||
| 1031 | result[@intFromEnum(Feature.zvl4096b)] = .{ | ||
| 1032 | .llvm_name = "zvl4096b", | ||
| 1033 | .description = "'Zvl' (Minimum Vector Length) 4096", | ||
| 1034 | .dependencies = featureSet(&[_]Feature{ | ||
| 1035 | .zvl2048b, | ||
| 1036 | }), | ||
| 1037 | }; | ||
| 1038 | result[@intFromEnum(Feature.zvl512b)] = .{ | ||
| 1039 | .llvm_name = "zvl512b", | ||
| 1040 | .description = "'Zvl' (Minimum Vector Length) 512", | ||
| 1041 | .dependencies = featureSet(&[_]Feature{ | ||
| 1042 | .zvl256b, | ||
| 1043 | }), | ||
| 1044 | }; | ||
| 1045 | result[@intFromEnum(Feature.zvl64b)] = .{ | ||
| 1046 | .llvm_name = "zvl64b", | ||
| 1047 | .description = "'Zvl' (Minimum Vector Length) 64", | ||
| 1048 | .dependencies = featureSet(&[_]Feature{ | ||
| 1049 | .zvl32b, | ||
| 1050 | }), | ||
| 1051 | }; | ||
| 1052 | result[@intFromEnum(Feature.zvl65536b)] = .{ | ||
| 1053 | .llvm_name = "zvl65536b", | ||
| 1054 | .description = "'Zvl' (Minimum Vector Length) 65536", | ||
| 1055 | .dependencies = featureSet(&[_]Feature{ | ||
| 1056 | .zvl32768b, | ||
| 1057 | }), | ||
| 1058 | }; | ||
| 1059 | result[@intFromEnum(Feature.zvl8192b)] = .{ | ||
| 1060 | .llvm_name = "zvl8192b", | ||
| 1061 | .description = "'Zvl' (Minimum Vector Length) 8192", | ||
| 1062 | .dependencies = featureSet(&[_]Feature{ | ||
| 1063 | .zvl4096b, | ||
| 1064 | }), | ||
| 1065 | }; | ||
| 1066 | const ti = @typeInfo(Feature); | ||
| 1067 | for (&result, 0..) |*elem, i| { | ||
| 1068 | elem.index = i; | ||
| 1069 | elem.name = ti.Enum.fields[i].name; | ||
| 1070 | } | ||
| 1071 | break :blk result; | ||
| 1072 | }; | ||
| 1073 | |||
| 1074 | pub const cpu = struct { | ||
| 1075 | pub const baseline_rv32 = CpuModel{ | ||
| 1076 | .name = "baseline_rv32", | ||
| 1077 | .llvm_name = null, | ||
| 1078 | .features = featureSet(&[_]Feature{ | ||
| 1079 | .@"32bit", | ||
| 1080 | .a, | ||
| 1081 | .c, | ||
| 1082 | .d, | ||
| 1083 | .m, | ||
| 1084 | }), | ||
| 1085 | }; | ||
| 1086 | pub const baseline_rv64 = CpuModel{ | ||
| 1087 | .name = "baseline_rv64", | ||
| 1088 | .llvm_name = null, | ||
| 1089 | .features = featureSet(&[_]Feature{ | ||
| 1090 | .@"64bit", | ||
| 1091 | .a, | ||
| 1092 | .c, | ||
| 1093 | .d, | ||
| 1094 | .m, | ||
| 1095 | }), | ||
| 1096 | }; | ||
| 1097 | pub const generic = CpuModel{ | ||
| 1098 | .name = "generic", | ||
| 1099 | .llvm_name = "generic", | ||
| 1100 | .features = featureSet(&[_]Feature{}), | ||
| 1101 | }; | ||
| 1102 | pub const generic_rv32 = CpuModel{ | ||
| 1103 | .name = "generic_rv32", | ||
| 1104 | .llvm_name = "generic-rv32", | ||
| 1105 | .features = featureSet(&[_]Feature{ | ||
| 1106 | .@"32bit", | ||
| 1107 | }), | ||
| 1108 | }; | ||
| 1109 | pub const generic_rv64 = CpuModel{ | ||
| 1110 | .name = "generic_rv64", | ||
| 1111 | .llvm_name = "generic-rv64", | ||
| 1112 | .features = featureSet(&[_]Feature{ | ||
| 1113 | .@"64bit", | ||
| 1114 | }), | ||
| 1115 | }; | ||
| 1116 | pub const rocket = CpuModel{ | ||
| 1117 | .name = "rocket", | ||
| 1118 | .llvm_name = "rocket", | ||
| 1119 | .features = featureSet(&[_]Feature{}), | ||
| 1120 | }; | ||
| 1121 | pub const rocket_rv32 = CpuModel{ | ||
| 1122 | .name = "rocket_rv32", | ||
| 1123 | .llvm_name = "rocket-rv32", | ||
| 1124 | .features = featureSet(&[_]Feature{ | ||
| 1125 | .@"32bit", | ||
| 1126 | .zicsr, | ||
| 1127 | .zifencei, | ||
| 1128 | }), | ||
| 1129 | }; | ||
| 1130 | pub const rocket_rv64 = CpuModel{ | ||
| 1131 | .name = "rocket_rv64", | ||
| 1132 | .llvm_name = "rocket-rv64", | ||
| 1133 | .features = featureSet(&[_]Feature{ | ||
| 1134 | .@"64bit", | ||
| 1135 | .zicsr, | ||
| 1136 | .zifencei, | ||
| 1137 | }), | ||
| 1138 | }; | ||
| 1139 | pub const sifive_7_series = CpuModel{ | ||
| 1140 | .name = "sifive_7_series", | ||
| 1141 | .llvm_name = "sifive-7-series", | ||
| 1142 | .features = featureSet(&[_]Feature{ | ||
| 1143 | .no_default_unroll, | ||
| 1144 | .short_forward_branch_opt, | ||
| 1145 | }), | ||
| 1146 | }; | ||
| 1147 | pub const sifive_e20 = CpuModel{ | ||
| 1148 | .name = "sifive_e20", | ||
| 1149 | .llvm_name = "sifive-e20", | ||
| 1150 | .features = featureSet(&[_]Feature{ | ||
| 1151 | .@"32bit", | ||
| 1152 | .c, | ||
| 1153 | .m, | ||
| 1154 | .zicsr, | ||
| 1155 | .zifencei, | ||
| 1156 | }), | ||
| 1157 | }; | ||
| 1158 | pub const sifive_e21 = CpuModel{ | ||
| 1159 | .name = "sifive_e21", | ||
| 1160 | .llvm_name = "sifive-e21", | ||
| 1161 | .features = featureSet(&[_]Feature{ | ||
| 1162 | .@"32bit", | ||
| 1163 | .a, | ||
| 1164 | .c, | ||
| 1165 | .m, | ||
| 1166 | .zicsr, | ||
| 1167 | .zifencei, | ||
| 1168 | }), | ||
| 1169 | }; | ||
| 1170 | pub const sifive_e24 = CpuModel{ | ||
| 1171 | .name = "sifive_e24", | ||
| 1172 | .llvm_name = "sifive-e24", | ||
| 1173 | .features = featureSet(&[_]Feature{ | ||
| 1174 | .@"32bit", | ||
| 1175 | .a, | ||
| 1176 | .c, | ||
| 1177 | .f, | ||
| 1178 | .m, | ||
| 1179 | .zifencei, | ||
| 1180 | }), | ||
| 1181 | }; | ||
| 1182 | pub const sifive_e31 = CpuModel{ | ||
| 1183 | .name = "sifive_e31", | ||
| 1184 | .llvm_name = "sifive-e31", | ||
| 1185 | .features = featureSet(&[_]Feature{ | ||
| 1186 | .@"32bit", | ||
| 1187 | .a, | ||
| 1188 | .c, | ||
| 1189 | .m, | ||
| 1190 | .zicsr, | ||
| 1191 | .zifencei, | ||
| 1192 | }), | ||
| 1193 | }; | ||
| 1194 | pub const sifive_e34 = CpuModel{ | ||
| 1195 | .name = "sifive_e34", | ||
| 1196 | .llvm_name = "sifive-e34", | ||
| 1197 | .features = featureSet(&[_]Feature{ | ||
| 1198 | .@"32bit", | ||
| 1199 | .a, | ||
| 1200 | .c, | ||
| 1201 | .f, | ||
| 1202 | .m, | ||
| 1203 | .zifencei, | ||
| 1204 | }), | ||
| 1205 | }; | ||
| 1206 | pub const sifive_e76 = CpuModel{ | ||
| 1207 | .name = "sifive_e76", | ||
| 1208 | .llvm_name = "sifive-e76", | ||
| 1209 | .features = featureSet(&[_]Feature{ | ||
| 1210 | .@"32bit", | ||
| 1211 | .a, | ||
| 1212 | .c, | ||
| 1213 | .f, | ||
| 1214 | .m, | ||
| 1215 | .no_default_unroll, | ||
| 1216 | .short_forward_branch_opt, | ||
| 1217 | .zifencei, | ||
| 1218 | }), | ||
| 1219 | }; | ||
| 1220 | pub const sifive_s21 = CpuModel{ | ||
| 1221 | .name = "sifive_s21", | ||
| 1222 | .llvm_name = "sifive-s21", | ||
| 1223 | .features = featureSet(&[_]Feature{ | ||
| 1224 | .@"64bit", | ||
| 1225 | .a, | ||
| 1226 | .c, | ||
| 1227 | .m, | ||
| 1228 | .zicsr, | ||
| 1229 | .zifencei, | ||
| 1230 | }), | ||
| 1231 | }; | ||
| 1232 | pub const sifive_s51 = CpuModel{ | ||
| 1233 | .name = "sifive_s51", | ||
| 1234 | .llvm_name = "sifive-s51", | ||
| 1235 | .features = featureSet(&[_]Feature{ | ||
| 1236 | .@"64bit", | ||
| 1237 | .a, | ||
| 1238 | .c, | ||
| 1239 | .m, | ||
| 1240 | .zicsr, | ||
| 1241 | .zifencei, | ||
| 1242 | }), | ||
| 1243 | }; | ||
| 1244 | pub const sifive_s54 = CpuModel{ | ||
| 1245 | .name = "sifive_s54", | ||
| 1246 | .llvm_name = "sifive-s54", | ||
| 1247 | .features = featureSet(&[_]Feature{ | ||
| 1248 | .@"64bit", | ||
| 1249 | .a, | ||
| 1250 | .c, | ||
| 1251 | .d, | ||
| 1252 | .m, | ||
| 1253 | .zifencei, | ||
| 1254 | }), | ||
| 1255 | }; | ||
| 1256 | pub const sifive_s76 = CpuModel{ | ||
| 1257 | .name = "sifive_s76", | ||
| 1258 | .llvm_name = "sifive-s76", | ||
| 1259 | .features = featureSet(&[_]Feature{ | ||
| 1260 | .@"64bit", | ||
| 1261 | .a, | ||
| 1262 | .c, | ||
| 1263 | .d, | ||
| 1264 | .m, | ||
| 1265 | .no_default_unroll, | ||
| 1266 | .short_forward_branch_opt, | ||
| 1267 | .xsfcie, | ||
| 1268 | .zifencei, | ||
| 1269 | .zihintpause, | ||
| 1270 | }), | ||
| 1271 | }; | ||
| 1272 | pub const sifive_u54 = CpuModel{ | ||
| 1273 | .name = "sifive_u54", | ||
| 1274 | .llvm_name = "sifive-u54", | ||
| 1275 | .features = featureSet(&[_]Feature{ | ||
| 1276 | .@"64bit", | ||
| 1277 | .a, | ||
| 1278 | .c, | ||
| 1279 | .d, | ||
| 1280 | .m, | ||
| 1281 | .zifencei, | ||
| 1282 | }), | ||
| 1283 | }; | ||
| 1284 | pub const sifive_u74 = CpuModel{ | ||
| 1285 | .name = "sifive_u74", | ||
| 1286 | .llvm_name = "sifive-u74", | ||
| 1287 | .features = featureSet(&[_]Feature{ | ||
| 1288 | .@"64bit", | ||
| 1289 | .a, | ||
| 1290 | .c, | ||
| 1291 | .d, | ||
| 1292 | .m, | ||
| 1293 | .no_default_unroll, | ||
| 1294 | .short_forward_branch_opt, | ||
| 1295 | .zifencei, | ||
| 1296 | }), | ||
| 1297 | }; | ||
| 1298 | pub const sifive_x280 = CpuModel{ | ||
| 1299 | .name = "sifive_x280", | ||
| 1300 | .llvm_name = "sifive-x280", | ||
| 1301 | .features = featureSet(&[_]Feature{ | ||
| 1302 | .@"64bit", | ||
| 1303 | .a, | ||
| 1304 | .c, | ||
| 1305 | .dlen_factor_2, | ||
| 1306 | .m, | ||
| 1307 | .no_default_unroll, | ||
| 1308 | .short_forward_branch_opt, | ||
| 1309 | .v, | ||
| 1310 | .zba, | ||
| 1311 | .zbb, | ||
| 1312 | .zfh, | ||
| 1313 | .zifencei, | ||
| 1314 | .zvfh, | ||
| 1315 | .zvl512b, | ||
| 1316 | }), | ||
| 1317 | }; | ||
| 1318 | pub const syntacore_scr1_base = CpuModel{ | ||
| 1319 | .name = "syntacore_scr1_base", | ||
| 1320 | .llvm_name = "syntacore-scr1-base", | ||
| 1321 | .features = featureSet(&[_]Feature{ | ||
| 1322 | .@"32bit", | ||
| 1323 | .c, | ||
| 1324 | .no_default_unroll, | ||
| 1325 | .zicsr, | ||
| 1326 | .zifencei, | ||
| 1327 | }), | ||
| 1328 | }; | ||
| 1329 | pub const syntacore_scr1_max = CpuModel{ | ||
| 1330 | .name = "syntacore_scr1_max", | ||
| 1331 | .llvm_name = "syntacore-scr1-max", | ||
| 1332 | .features = featureSet(&[_]Feature{ | ||
| 1333 | .@"32bit", | ||
| 1334 | .c, | ||
| 1335 | .m, | ||
| 1336 | .no_default_unroll, | ||
| 1337 | .zicsr, | ||
| 1338 | .zifencei, | ||
| 1339 | }), | ||
| 1340 | }; | ||
| 1341 | }; | ||
lib/std/Target/s390x.zig created+667
| ... | @@ -0,0 +1,667 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | bear_enhancement, | ||
| 9 | deflate_conversion, | ||
| 10 | dfp_packed_conversion, | ||
| 11 | dfp_zoned_conversion, | ||
| 12 | distinct_ops, | ||
| 13 | enhanced_dat_2, | ||
| 14 | enhanced_sort, | ||
| 15 | execution_hint, | ||
| 16 | fast_serialization, | ||
| 17 | fp_extension, | ||
| 18 | guarded_storage, | ||
| 19 | high_word, | ||
| 20 | insert_reference_bits_multiple, | ||
| 21 | interlocked_access1, | ||
| 22 | load_and_trap, | ||
| 23 | load_and_zero_rightmost_byte, | ||
| 24 | load_store_on_cond, | ||
| 25 | load_store_on_cond_2, | ||
| 26 | message_security_assist_extension3, | ||
| 27 | message_security_assist_extension4, | ||
| 28 | message_security_assist_extension5, | ||
| 29 | message_security_assist_extension7, | ||
| 30 | message_security_assist_extension8, | ||
| 31 | message_security_assist_extension9, | ||
| 32 | miscellaneous_extensions, | ||
| 33 | miscellaneous_extensions_2, | ||
| 34 | miscellaneous_extensions_3, | ||
| 35 | nnp_assist, | ||
| 36 | population_count, | ||
| 37 | processor_activity_instrumentation, | ||
| 38 | processor_assist, | ||
| 39 | reset_dat_protection, | ||
| 40 | reset_reference_bits_multiple, | ||
| 41 | soft_float, | ||
| 42 | transactional_execution, | ||
| 43 | vector, | ||
| 44 | vector_enhancements_1, | ||
| 45 | vector_enhancements_2, | ||
| 46 | vector_packed_decimal, | ||
| 47 | vector_packed_decimal_enhancement, | ||
| 48 | vector_packed_decimal_enhancement_2, | ||
| 49 | }; | ||
| 50 | |||
| 51 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 52 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 53 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 54 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 55 | |||
| 56 | pub const all_features = blk: { | ||
| 57 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 58 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 59 | var result: [len]CpuFeature = undefined; | ||
| 60 | result[@intFromEnum(Feature.bear_enhancement)] = .{ | ||
| 61 | .llvm_name = "bear-enhancement", | ||
| 62 | .description = "Assume that the BEAR-enhancement facility is installed", | ||
| 63 | .dependencies = featureSet(&[_]Feature{}), | ||
| 64 | }; | ||
| 65 | result[@intFromEnum(Feature.deflate_conversion)] = .{ | ||
| 66 | .llvm_name = "deflate-conversion", | ||
| 67 | .description = "Assume that the deflate-conversion facility is installed", | ||
| 68 | .dependencies = featureSet(&[_]Feature{}), | ||
| 69 | }; | ||
| 70 | result[@intFromEnum(Feature.dfp_packed_conversion)] = .{ | ||
| 71 | .llvm_name = "dfp-packed-conversion", | ||
| 72 | .description = "Assume that the DFP packed-conversion facility is installed", | ||
| 73 | .dependencies = featureSet(&[_]Feature{}), | ||
| 74 | }; | ||
| 75 | result[@intFromEnum(Feature.dfp_zoned_conversion)] = .{ | ||
| 76 | .llvm_name = "dfp-zoned-conversion", | ||
| 77 | .description = "Assume that the DFP zoned-conversion facility is installed", | ||
| 78 | .dependencies = featureSet(&[_]Feature{}), | ||
| 79 | }; | ||
| 80 | result[@intFromEnum(Feature.distinct_ops)] = .{ | ||
| 81 | .llvm_name = "distinct-ops", | ||
| 82 | .description = "Assume that the distinct-operands facility is installed", | ||
| 83 | .dependencies = featureSet(&[_]Feature{}), | ||
| 84 | }; | ||
| 85 | result[@intFromEnum(Feature.enhanced_dat_2)] = .{ | ||
| 86 | .llvm_name = "enhanced-dat-2", | ||
| 87 | .description = "Assume that the enhanced-DAT facility 2 is installed", | ||
| 88 | .dependencies = featureSet(&[_]Feature{}), | ||
| 89 | }; | ||
| 90 | result[@intFromEnum(Feature.enhanced_sort)] = .{ | ||
| 91 | .llvm_name = "enhanced-sort", | ||
| 92 | .description = "Assume that the enhanced-sort facility is installed", | ||
| 93 | .dependencies = featureSet(&[_]Feature{}), | ||
| 94 | }; | ||
| 95 | result[@intFromEnum(Feature.execution_hint)] = .{ | ||
| 96 | .llvm_name = "execution-hint", | ||
| 97 | .description = "Assume that the execution-hint facility is installed", | ||
| 98 | .dependencies = featureSet(&[_]Feature{}), | ||
| 99 | }; | ||
| 100 | result[@intFromEnum(Feature.fast_serialization)] = .{ | ||
| 101 | .llvm_name = "fast-serialization", | ||
| 102 | .description = "Assume that the fast-serialization facility is installed", | ||
| 103 | .dependencies = featureSet(&[_]Feature{}), | ||
| 104 | }; | ||
| 105 | result[@intFromEnum(Feature.fp_extension)] = .{ | ||
| 106 | .llvm_name = "fp-extension", | ||
| 107 | .description = "Assume that the floating-point extension facility is installed", | ||
| 108 | .dependencies = featureSet(&[_]Feature{}), | ||
| 109 | }; | ||
| 110 | result[@intFromEnum(Feature.guarded_storage)] = .{ | ||
| 111 | .llvm_name = "guarded-storage", | ||
| 112 | .description = "Assume that the guarded-storage facility is installed", | ||
| 113 | .dependencies = featureSet(&[_]Feature{}), | ||
| 114 | }; | ||
| 115 | result[@intFromEnum(Feature.high_word)] = .{ | ||
| 116 | .llvm_name = "high-word", | ||
| 117 | .description = "Assume that the high-word facility is installed", | ||
| 118 | .dependencies = featureSet(&[_]Feature{}), | ||
| 119 | }; | ||
| 120 | result[@intFromEnum(Feature.insert_reference_bits_multiple)] = .{ | ||
| 121 | .llvm_name = "insert-reference-bits-multiple", | ||
| 122 | .description = "Assume that the insert-reference-bits-multiple facility is installed", | ||
| 123 | .dependencies = featureSet(&[_]Feature{}), | ||
| 124 | }; | ||
| 125 | result[@intFromEnum(Feature.interlocked_access1)] = .{ | ||
| 126 | .llvm_name = "interlocked-access1", | ||
| 127 | .description = "Assume that interlocked-access facility 1 is installed", | ||
| 128 | .dependencies = featureSet(&[_]Feature{}), | ||
| 129 | }; | ||
| 130 | result[@intFromEnum(Feature.load_and_trap)] = .{ | ||
| 131 | .llvm_name = "load-and-trap", | ||
| 132 | .description = "Assume that the load-and-trap facility is installed", | ||
| 133 | .dependencies = featureSet(&[_]Feature{}), | ||
| 134 | }; | ||
| 135 | result[@intFromEnum(Feature.load_and_zero_rightmost_byte)] = .{ | ||
| 136 | .llvm_name = "load-and-zero-rightmost-byte", | ||
| 137 | .description = "Assume that the load-and-zero-rightmost-byte facility is installed", | ||
| 138 | .dependencies = featureSet(&[_]Feature{}), | ||
| 139 | }; | ||
| 140 | result[@intFromEnum(Feature.load_store_on_cond)] = .{ | ||
| 141 | .llvm_name = "load-store-on-cond", | ||
| 142 | .description = "Assume that the load/store-on-condition facility is installed", | ||
| 143 | .dependencies = featureSet(&[_]Feature{}), | ||
| 144 | }; | ||
| 145 | result[@intFromEnum(Feature.load_store_on_cond_2)] = .{ | ||
| 146 | .llvm_name = "load-store-on-cond-2", | ||
| 147 | .description = "Assume that the load/store-on-condition facility 2 is installed", | ||
| 148 | .dependencies = featureSet(&[_]Feature{}), | ||
| 149 | }; | ||
| 150 | result[@intFromEnum(Feature.message_security_assist_extension3)] = .{ | ||
| 151 | .llvm_name = "message-security-assist-extension3", | ||
| 152 | .description = "Assume that the message-security-assist extension facility 3 is installed", | ||
| 153 | .dependencies = featureSet(&[_]Feature{}), | ||
| 154 | }; | ||
| 155 | result[@intFromEnum(Feature.message_security_assist_extension4)] = .{ | ||
| 156 | .llvm_name = "message-security-assist-extension4", | ||
| 157 | .description = "Assume that the message-security-assist extension facility 4 is installed", | ||
| 158 | .dependencies = featureSet(&[_]Feature{}), | ||
| 159 | }; | ||
| 160 | result[@intFromEnum(Feature.message_security_assist_extension5)] = .{ | ||
| 161 | .llvm_name = "message-security-assist-extension5", | ||
| 162 | .description = "Assume that the message-security-assist extension facility 5 is installed", | ||
| 163 | .dependencies = featureSet(&[_]Feature{}), | ||
| 164 | }; | ||
| 165 | result[@intFromEnum(Feature.message_security_assist_extension7)] = .{ | ||
| 166 | .llvm_name = "message-security-assist-extension7", | ||
| 167 | .description = "Assume that the message-security-assist extension facility 7 is installed", | ||
| 168 | .dependencies = featureSet(&[_]Feature{}), | ||
| 169 | }; | ||
| 170 | result[@intFromEnum(Feature.message_security_assist_extension8)] = .{ | ||
| 171 | .llvm_name = "message-security-assist-extension8", | ||
| 172 | .description = "Assume that the message-security-assist extension facility 8 is installed", | ||
| 173 | .dependencies = featureSet(&[_]Feature{}), | ||
| 174 | }; | ||
| 175 | result[@intFromEnum(Feature.message_security_assist_extension9)] = .{ | ||
| 176 | .llvm_name = "message-security-assist-extension9", | ||
| 177 | .description = "Assume that the message-security-assist extension facility 9 is installed", | ||
| 178 | .dependencies = featureSet(&[_]Feature{}), | ||
| 179 | }; | ||
| 180 | result[@intFromEnum(Feature.miscellaneous_extensions)] = .{ | ||
| 181 | .llvm_name = "miscellaneous-extensions", | ||
| 182 | .description = "Assume that the miscellaneous-extensions facility is installed", | ||
| 183 | .dependencies = featureSet(&[_]Feature{}), | ||
| 184 | }; | ||
| 185 | result[@intFromEnum(Feature.miscellaneous_extensions_2)] = .{ | ||
| 186 | .llvm_name = "miscellaneous-extensions-2", | ||
| 187 | .description = "Assume that the miscellaneous-extensions facility 2 is installed", | ||
| 188 | .dependencies = featureSet(&[_]Feature{}), | ||
| 189 | }; | ||
| 190 | result[@intFromEnum(Feature.miscellaneous_extensions_3)] = .{ | ||
| 191 | .llvm_name = "miscellaneous-extensions-3", | ||
| 192 | .description = "Assume that the miscellaneous-extensions facility 3 is installed", | ||
| 193 | .dependencies = featureSet(&[_]Feature{}), | ||
| 194 | }; | ||
| 195 | result[@intFromEnum(Feature.nnp_assist)] = .{ | ||
| 196 | .llvm_name = "nnp-assist", | ||
| 197 | .description = "Assume that the NNP-assist facility is installed", | ||
| 198 | .dependencies = featureSet(&[_]Feature{}), | ||
| 199 | }; | ||
| 200 | result[@intFromEnum(Feature.population_count)] = .{ | ||
| 201 | .llvm_name = "population-count", | ||
| 202 | .description = "Assume that the population-count facility is installed", | ||
| 203 | .dependencies = featureSet(&[_]Feature{}), | ||
| 204 | }; | ||
| 205 | result[@intFromEnum(Feature.processor_activity_instrumentation)] = .{ | ||
| 206 | .llvm_name = "processor-activity-instrumentation", | ||
| 207 | .description = "Assume that the processor-activity-instrumentation facility is installed", | ||
| 208 | .dependencies = featureSet(&[_]Feature{}), | ||
| 209 | }; | ||
| 210 | result[@intFromEnum(Feature.processor_assist)] = .{ | ||
| 211 | .llvm_name = "processor-assist", | ||
| 212 | .description = "Assume that the processor-assist facility is installed", | ||
| 213 | .dependencies = featureSet(&[_]Feature{}), | ||
| 214 | }; | ||
| 215 | result[@intFromEnum(Feature.reset_dat_protection)] = .{ | ||
| 216 | .llvm_name = "reset-dat-protection", | ||
| 217 | .description = "Assume that the reset-DAT-protection facility is installed", | ||
| 218 | .dependencies = featureSet(&[_]Feature{}), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.reset_reference_bits_multiple)] = .{ | ||
| 221 | .llvm_name = "reset-reference-bits-multiple", | ||
| 222 | .description = "Assume that the reset-reference-bits-multiple facility is installed", | ||
| 223 | .dependencies = featureSet(&[_]Feature{}), | ||
| 224 | }; | ||
| 225 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 226 | .llvm_name = "soft-float", | ||
| 227 | .description = "Use software emulation for floating point", | ||
| 228 | .dependencies = featureSet(&[_]Feature{}), | ||
| 229 | }; | ||
| 230 | result[@intFromEnum(Feature.transactional_execution)] = .{ | ||
| 231 | .llvm_name = "transactional-execution", | ||
| 232 | .description = "Assume that the transactional-execution facility is installed", | ||
| 233 | .dependencies = featureSet(&[_]Feature{}), | ||
| 234 | }; | ||
| 235 | result[@intFromEnum(Feature.vector)] = .{ | ||
| 236 | .llvm_name = "vector", | ||
| 237 | .description = "Assume that the vectory facility is installed", | ||
| 238 | .dependencies = featureSet(&[_]Feature{}), | ||
| 239 | }; | ||
| 240 | result[@intFromEnum(Feature.vector_enhancements_1)] = .{ | ||
| 241 | .llvm_name = "vector-enhancements-1", | ||
| 242 | .description = "Assume that the vector enhancements facility 1 is installed", | ||
| 243 | .dependencies = featureSet(&[_]Feature{}), | ||
| 244 | }; | ||
| 245 | result[@intFromEnum(Feature.vector_enhancements_2)] = .{ | ||
| 246 | .llvm_name = "vector-enhancements-2", | ||
| 247 | .description = "Assume that the vector enhancements facility 2 is installed", | ||
| 248 | .dependencies = featureSet(&[_]Feature{}), | ||
| 249 | }; | ||
| 250 | result[@intFromEnum(Feature.vector_packed_decimal)] = .{ | ||
| 251 | .llvm_name = "vector-packed-decimal", | ||
| 252 | .description = "Assume that the vector packed decimal facility is installed", | ||
| 253 | .dependencies = featureSet(&[_]Feature{}), | ||
| 254 | }; | ||
| 255 | result[@intFromEnum(Feature.vector_packed_decimal_enhancement)] = .{ | ||
| 256 | .llvm_name = "vector-packed-decimal-enhancement", | ||
| 257 | .description = "Assume that the vector packed decimal enhancement facility is installed", | ||
| 258 | .dependencies = featureSet(&[_]Feature{}), | ||
| 259 | }; | ||
| 260 | result[@intFromEnum(Feature.vector_packed_decimal_enhancement_2)] = .{ | ||
| 261 | .llvm_name = "vector-packed-decimal-enhancement-2", | ||
| 262 | .description = "Assume that the vector packed decimal enhancement facility 2 is installed", | ||
| 263 | .dependencies = featureSet(&[_]Feature{}), | ||
| 264 | }; | ||
| 265 | const ti = @typeInfo(Feature); | ||
| 266 | for (&result, 0..) |*elem, i| { | ||
| 267 | elem.index = i; | ||
| 268 | elem.name = ti.Enum.fields[i].name; | ||
| 269 | } | ||
| 270 | break :blk result; | ||
| 271 | }; | ||
| 272 | |||
| 273 | pub const cpu = struct { | ||
| 274 | pub const arch10 = CpuModel{ | ||
| 275 | .name = "arch10", | ||
| 276 | .llvm_name = "arch10", | ||
| 277 | .features = featureSet(&[_]Feature{ | ||
| 278 | .dfp_zoned_conversion, | ||
| 279 | .distinct_ops, | ||
| 280 | .enhanced_dat_2, | ||
| 281 | .execution_hint, | ||
| 282 | .fast_serialization, | ||
| 283 | .fp_extension, | ||
| 284 | .high_word, | ||
| 285 | .interlocked_access1, | ||
| 286 | .load_and_trap, | ||
| 287 | .load_store_on_cond, | ||
| 288 | .message_security_assist_extension3, | ||
| 289 | .message_security_assist_extension4, | ||
| 290 | .miscellaneous_extensions, | ||
| 291 | .population_count, | ||
| 292 | .processor_assist, | ||
| 293 | .reset_reference_bits_multiple, | ||
| 294 | .transactional_execution, | ||
| 295 | }), | ||
| 296 | }; | ||
| 297 | pub const arch11 = CpuModel{ | ||
| 298 | .name = "arch11", | ||
| 299 | .llvm_name = "arch11", | ||
| 300 | .features = featureSet(&[_]Feature{ | ||
| 301 | .dfp_packed_conversion, | ||
| 302 | .dfp_zoned_conversion, | ||
| 303 | .distinct_ops, | ||
| 304 | .enhanced_dat_2, | ||
| 305 | .execution_hint, | ||
| 306 | .fast_serialization, | ||
| 307 | .fp_extension, | ||
| 308 | .high_word, | ||
| 309 | .interlocked_access1, | ||
| 310 | .load_and_trap, | ||
| 311 | .load_and_zero_rightmost_byte, | ||
| 312 | .load_store_on_cond, | ||
| 313 | .load_store_on_cond_2, | ||
| 314 | .message_security_assist_extension3, | ||
| 315 | .message_security_assist_extension4, | ||
| 316 | .message_security_assist_extension5, | ||
| 317 | .miscellaneous_extensions, | ||
| 318 | .population_count, | ||
| 319 | .processor_assist, | ||
| 320 | .reset_reference_bits_multiple, | ||
| 321 | .transactional_execution, | ||
| 322 | .vector, | ||
| 323 | }), | ||
| 324 | }; | ||
| 325 | pub const arch12 = CpuModel{ | ||
| 326 | .name = "arch12", | ||
| 327 | .llvm_name = "arch12", | ||
| 328 | .features = featureSet(&[_]Feature{ | ||
| 329 | .dfp_packed_conversion, | ||
| 330 | .dfp_zoned_conversion, | ||
| 331 | .distinct_ops, | ||
| 332 | .enhanced_dat_2, | ||
| 333 | .execution_hint, | ||
| 334 | .fast_serialization, | ||
| 335 | .fp_extension, | ||
| 336 | .guarded_storage, | ||
| 337 | .high_word, | ||
| 338 | .insert_reference_bits_multiple, | ||
| 339 | .interlocked_access1, | ||
| 340 | .load_and_trap, | ||
| 341 | .load_and_zero_rightmost_byte, | ||
| 342 | .load_store_on_cond, | ||
| 343 | .load_store_on_cond_2, | ||
| 344 | .message_security_assist_extension3, | ||
| 345 | .message_security_assist_extension4, | ||
| 346 | .message_security_assist_extension5, | ||
| 347 | .message_security_assist_extension7, | ||
| 348 | .message_security_assist_extension8, | ||
| 349 | .miscellaneous_extensions, | ||
| 350 | .miscellaneous_extensions_2, | ||
| 351 | .population_count, | ||
| 352 | .processor_assist, | ||
| 353 | .reset_reference_bits_multiple, | ||
| 354 | .transactional_execution, | ||
| 355 | .vector, | ||
| 356 | .vector_enhancements_1, | ||
| 357 | .vector_packed_decimal, | ||
| 358 | }), | ||
| 359 | }; | ||
| 360 | pub const arch13 = CpuModel{ | ||
| 361 | .name = "arch13", | ||
| 362 | .llvm_name = "arch13", | ||
| 363 | .features = featureSet(&[_]Feature{ | ||
| 364 | .deflate_conversion, | ||
| 365 | .dfp_packed_conversion, | ||
| 366 | .dfp_zoned_conversion, | ||
| 367 | .distinct_ops, | ||
| 368 | .enhanced_dat_2, | ||
| 369 | .enhanced_sort, | ||
| 370 | .execution_hint, | ||
| 371 | .fast_serialization, | ||
| 372 | .fp_extension, | ||
| 373 | .guarded_storage, | ||
| 374 | .high_word, | ||
| 375 | .insert_reference_bits_multiple, | ||
| 376 | .interlocked_access1, | ||
| 377 | .load_and_trap, | ||
| 378 | .load_and_zero_rightmost_byte, | ||
| 379 | .load_store_on_cond, | ||
| 380 | .load_store_on_cond_2, | ||
| 381 | .message_security_assist_extension3, | ||
| 382 | .message_security_assist_extension4, | ||
| 383 | .message_security_assist_extension5, | ||
| 384 | .message_security_assist_extension7, | ||
| 385 | .message_security_assist_extension8, | ||
| 386 | .message_security_assist_extension9, | ||
| 387 | .miscellaneous_extensions, | ||
| 388 | .miscellaneous_extensions_2, | ||
| 389 | .miscellaneous_extensions_3, | ||
| 390 | .population_count, | ||
| 391 | .processor_assist, | ||
| 392 | .reset_reference_bits_multiple, | ||
| 393 | .transactional_execution, | ||
| 394 | .vector, | ||
| 395 | .vector_enhancements_1, | ||
| 396 | .vector_enhancements_2, | ||
| 397 | .vector_packed_decimal, | ||
| 398 | .vector_packed_decimal_enhancement, | ||
| 399 | }), | ||
| 400 | }; | ||
| 401 | pub const arch14 = CpuModel{ | ||
| 402 | .name = "arch14", | ||
| 403 | .llvm_name = "arch14", | ||
| 404 | .features = featureSet(&[_]Feature{ | ||
| 405 | .bear_enhancement, | ||
| 406 | .deflate_conversion, | ||
| 407 | .dfp_packed_conversion, | ||
| 408 | .dfp_zoned_conversion, | ||
| 409 | .distinct_ops, | ||
| 410 | .enhanced_dat_2, | ||
| 411 | .enhanced_sort, | ||
| 412 | .execution_hint, | ||
| 413 | .fast_serialization, | ||
| 414 | .fp_extension, | ||
| 415 | .guarded_storage, | ||
| 416 | .high_word, | ||
| 417 | .insert_reference_bits_multiple, | ||
| 418 | .interlocked_access1, | ||
| 419 | .load_and_trap, | ||
| 420 | .load_and_zero_rightmost_byte, | ||
| 421 | .load_store_on_cond, | ||
| 422 | .load_store_on_cond_2, | ||
| 423 | .message_security_assist_extension3, | ||
| 424 | .message_security_assist_extension4, | ||
| 425 | .message_security_assist_extension5, | ||
| 426 | .message_security_assist_extension7, | ||
| 427 | .message_security_assist_extension8, | ||
| 428 | .message_security_assist_extension9, | ||
| 429 | .miscellaneous_extensions, | ||
| 430 | .miscellaneous_extensions_2, | ||
| 431 | .miscellaneous_extensions_3, | ||
| 432 | .nnp_assist, | ||
| 433 | .population_count, | ||
| 434 | .processor_activity_instrumentation, | ||
| 435 | .processor_assist, | ||
| 436 | .reset_dat_protection, | ||
| 437 | .reset_reference_bits_multiple, | ||
| 438 | .transactional_execution, | ||
| 439 | .vector, | ||
| 440 | .vector_enhancements_1, | ||
| 441 | .vector_enhancements_2, | ||
| 442 | .vector_packed_decimal, | ||
| 443 | .vector_packed_decimal_enhancement, | ||
| 444 | .vector_packed_decimal_enhancement_2, | ||
| 445 | }), | ||
| 446 | }; | ||
| 447 | pub const arch8 = CpuModel{ | ||
| 448 | .name = "arch8", | ||
| 449 | .llvm_name = "arch8", | ||
| 450 | .features = featureSet(&[_]Feature{}), | ||
| 451 | }; | ||
| 452 | pub const arch9 = CpuModel{ | ||
| 453 | .name = "arch9", | ||
| 454 | .llvm_name = "arch9", | ||
| 455 | .features = featureSet(&[_]Feature{ | ||
| 456 | .distinct_ops, | ||
| 457 | .fast_serialization, | ||
| 458 | .fp_extension, | ||
| 459 | .high_word, | ||
| 460 | .interlocked_access1, | ||
| 461 | .load_store_on_cond, | ||
| 462 | .message_security_assist_extension3, | ||
| 463 | .message_security_assist_extension4, | ||
| 464 | .population_count, | ||
| 465 | .reset_reference_bits_multiple, | ||
| 466 | }), | ||
| 467 | }; | ||
| 468 | pub const generic = CpuModel{ | ||
| 469 | .name = "generic", | ||
| 470 | .llvm_name = "generic", | ||
| 471 | .features = featureSet(&[_]Feature{}), | ||
| 472 | }; | ||
| 473 | pub const z10 = CpuModel{ | ||
| 474 | .name = "z10", | ||
| 475 | .llvm_name = "z10", | ||
| 476 | .features = featureSet(&[_]Feature{}), | ||
| 477 | }; | ||
| 478 | pub const z13 = CpuModel{ | ||
| 479 | .name = "z13", | ||
| 480 | .llvm_name = "z13", | ||
| 481 | .features = featureSet(&[_]Feature{ | ||
| 482 | .dfp_packed_conversion, | ||
| 483 | .dfp_zoned_conversion, | ||
| 484 | .distinct_ops, | ||
| 485 | .enhanced_dat_2, | ||
| 486 | .execution_hint, | ||
| 487 | .fast_serialization, | ||
| 488 | .fp_extension, | ||
| 489 | .high_word, | ||
| 490 | .interlocked_access1, | ||
| 491 | .load_and_trap, | ||
| 492 | .load_and_zero_rightmost_byte, | ||
| 493 | .load_store_on_cond, | ||
| 494 | .load_store_on_cond_2, | ||
| 495 | .message_security_assist_extension3, | ||
| 496 | .message_security_assist_extension4, | ||
| 497 | .message_security_assist_extension5, | ||
| 498 | .miscellaneous_extensions, | ||
| 499 | .population_count, | ||
| 500 | .processor_assist, | ||
| 501 | .reset_reference_bits_multiple, | ||
| 502 | .transactional_execution, | ||
| 503 | .vector, | ||
| 504 | }), | ||
| 505 | }; | ||
| 506 | pub const z14 = CpuModel{ | ||
| 507 | .name = "z14", | ||
| 508 | .llvm_name = "z14", | ||
| 509 | .features = featureSet(&[_]Feature{ | ||
| 510 | .dfp_packed_conversion, | ||
| 511 | .dfp_zoned_conversion, | ||
| 512 | .distinct_ops, | ||
| 513 | .enhanced_dat_2, | ||
| 514 | .execution_hint, | ||
| 515 | .fast_serialization, | ||
| 516 | .fp_extension, | ||
| 517 | .guarded_storage, | ||
| 518 | .high_word, | ||
| 519 | .insert_reference_bits_multiple, | ||
| 520 | .interlocked_access1, | ||
| 521 | .load_and_trap, | ||
| 522 | .load_and_zero_rightmost_byte, | ||
| 523 | .load_store_on_cond, | ||
| 524 | .load_store_on_cond_2, | ||
| 525 | .message_security_assist_extension3, | ||
| 526 | .message_security_assist_extension4, | ||
| 527 | .message_security_assist_extension5, | ||
| 528 | .message_security_assist_extension7, | ||
| 529 | .message_security_assist_extension8, | ||
| 530 | .miscellaneous_extensions, | ||
| 531 | .miscellaneous_extensions_2, | ||
| 532 | .population_count, | ||
| 533 | .processor_assist, | ||
| 534 | .reset_reference_bits_multiple, | ||
| 535 | .transactional_execution, | ||
| 536 | .vector, | ||
| 537 | .vector_enhancements_1, | ||
| 538 | .vector_packed_decimal, | ||
| 539 | }), | ||
| 540 | }; | ||
| 541 | pub const z15 = CpuModel{ | ||
| 542 | .name = "z15", | ||
| 543 | .llvm_name = "z15", | ||
| 544 | .features = featureSet(&[_]Feature{ | ||
| 545 | .deflate_conversion, | ||
| 546 | .dfp_packed_conversion, | ||
| 547 | .dfp_zoned_conversion, | ||
| 548 | .distinct_ops, | ||
| 549 | .enhanced_dat_2, | ||
| 550 | .enhanced_sort, | ||
| 551 | .execution_hint, | ||
| 552 | .fast_serialization, | ||
| 553 | .fp_extension, | ||
| 554 | .guarded_storage, | ||
| 555 | .high_word, | ||
| 556 | .insert_reference_bits_multiple, | ||
| 557 | .interlocked_access1, | ||
| 558 | .load_and_trap, | ||
| 559 | .load_and_zero_rightmost_byte, | ||
| 560 | .load_store_on_cond, | ||
| 561 | .load_store_on_cond_2, | ||
| 562 | .message_security_assist_extension3, | ||
| 563 | .message_security_assist_extension4, | ||
| 564 | .message_security_assist_extension5, | ||
| 565 | .message_security_assist_extension7, | ||
| 566 | .message_security_assist_extension8, | ||
| 567 | .message_security_assist_extension9, | ||
| 568 | .miscellaneous_extensions, | ||
| 569 | .miscellaneous_extensions_2, | ||
| 570 | .miscellaneous_extensions_3, | ||
| 571 | .population_count, | ||
| 572 | .processor_assist, | ||
| 573 | .reset_reference_bits_multiple, | ||
| 574 | .transactional_execution, | ||
| 575 | .vector, | ||
| 576 | .vector_enhancements_1, | ||
| 577 | .vector_enhancements_2, | ||
| 578 | .vector_packed_decimal, | ||
| 579 | .vector_packed_decimal_enhancement, | ||
| 580 | }), | ||
| 581 | }; | ||
| 582 | pub const z16 = CpuModel{ | ||
| 583 | .name = "z16", | ||
| 584 | .llvm_name = "z16", | ||
| 585 | .features = featureSet(&[_]Feature{ | ||
| 586 | .bear_enhancement, | ||
| 587 | .deflate_conversion, | ||
| 588 | .dfp_packed_conversion, | ||
| 589 | .dfp_zoned_conversion, | ||
| 590 | .distinct_ops, | ||
| 591 | .enhanced_dat_2, | ||
| 592 | .enhanced_sort, | ||
| 593 | .execution_hint, | ||
| 594 | .fast_serialization, | ||
| 595 | .fp_extension, | ||
| 596 | .guarded_storage, | ||
| 597 | .high_word, | ||
| 598 | .insert_reference_bits_multiple, | ||
| 599 | .interlocked_access1, | ||
| 600 | .load_and_trap, | ||
| 601 | .load_and_zero_rightmost_byte, | ||
| 602 | .load_store_on_cond, | ||
| 603 | .load_store_on_cond_2, | ||
| 604 | .message_security_assist_extension3, | ||
| 605 | .message_security_assist_extension4, | ||
| 606 | .message_security_assist_extension5, | ||
| 607 | .message_security_assist_extension7, | ||
| 608 | .message_security_assist_extension8, | ||
| 609 | .message_security_assist_extension9, | ||
| 610 | .miscellaneous_extensions, | ||
| 611 | .miscellaneous_extensions_2, | ||
| 612 | .miscellaneous_extensions_3, | ||
| 613 | .nnp_assist, | ||
| 614 | .population_count, | ||
| 615 | .processor_activity_instrumentation, | ||
| 616 | .processor_assist, | ||
| 617 | .reset_dat_protection, | ||
| 618 | .reset_reference_bits_multiple, | ||
| 619 | .transactional_execution, | ||
| 620 | .vector, | ||
| 621 | .vector_enhancements_1, | ||
| 622 | .vector_enhancements_2, | ||
| 623 | .vector_packed_decimal, | ||
| 624 | .vector_packed_decimal_enhancement, | ||
| 625 | .vector_packed_decimal_enhancement_2, | ||
| 626 | }), | ||
| 627 | }; | ||
| 628 | pub const z196 = CpuModel{ | ||
| 629 | .name = "z196", | ||
| 630 | .llvm_name = "z196", | ||
| 631 | .features = featureSet(&[_]Feature{ | ||
| 632 | .distinct_ops, | ||
| 633 | .fast_serialization, | ||
| 634 | .fp_extension, | ||
| 635 | .high_word, | ||
| 636 | .interlocked_access1, | ||
| 637 | .load_store_on_cond, | ||
| 638 | .message_security_assist_extension3, | ||
| 639 | .message_security_assist_extension4, | ||
| 640 | .population_count, | ||
| 641 | .reset_reference_bits_multiple, | ||
| 642 | }), | ||
| 643 | }; | ||
| 644 | pub const zEC12 = CpuModel{ | ||
| 645 | .name = "zEC12", | ||
| 646 | .llvm_name = "zEC12", | ||
| 647 | .features = featureSet(&[_]Feature{ | ||
| 648 | .dfp_zoned_conversion, | ||
| 649 | .distinct_ops, | ||
| 650 | .enhanced_dat_2, | ||
| 651 | .execution_hint, | ||
| 652 | .fast_serialization, | ||
| 653 | .fp_extension, | ||
| 654 | .high_word, | ||
| 655 | .interlocked_access1, | ||
| 656 | .load_and_trap, | ||
| 657 | .load_store_on_cond, | ||
| 658 | .message_security_assist_extension3, | ||
| 659 | .message_security_assist_extension4, | ||
| 660 | .miscellaneous_extensions, | ||
| 661 | .population_count, | ||
| 662 | .processor_assist, | ||
| 663 | .reset_reference_bits_multiple, | ||
| 664 | .transactional_execution, | ||
| 665 | }), | ||
| 666 | }; | ||
| 667 | }; | ||
lib/std/Target/sparc.zig created+455
| ... | @@ -0,0 +1,455 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | deprecated_v8, | ||
| 9 | detectroundchange, | ||
| 10 | fixallfdivsqrt, | ||
| 11 | hard_quad_float, | ||
| 12 | hasleoncasa, | ||
| 13 | hasumacsmac, | ||
| 14 | insertnopload, | ||
| 15 | leon, | ||
| 16 | leoncyclecounter, | ||
| 17 | leonpwrpsr, | ||
| 18 | no_fmuls, | ||
| 19 | no_fsmuld, | ||
| 20 | popc, | ||
| 21 | soft_float, | ||
| 22 | soft_mul_div, | ||
| 23 | v9, | ||
| 24 | vis, | ||
| 25 | vis2, | ||
| 26 | vis3, | ||
| 27 | }; | ||
| 28 | |||
| 29 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 30 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 31 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 32 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 33 | |||
| 34 | pub const all_features = blk: { | ||
| 35 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 36 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 37 | var result: [len]CpuFeature = undefined; | ||
| 38 | result[@intFromEnum(Feature.deprecated_v8)] = .{ | ||
| 39 | .llvm_name = "deprecated-v8", | ||
| 40 | .description = "Enable deprecated V8 instructions in V9 mode", | ||
| 41 | .dependencies = featureSet(&[_]Feature{}), | ||
| 42 | }; | ||
| 43 | result[@intFromEnum(Feature.detectroundchange)] = .{ | ||
| 44 | .llvm_name = "detectroundchange", | ||
| 45 | .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", | ||
| 46 | .dependencies = featureSet(&[_]Feature{}), | ||
| 47 | }; | ||
| 48 | result[@intFromEnum(Feature.fixallfdivsqrt)] = .{ | ||
| 49 | .llvm_name = "fixallfdivsqrt", | ||
| 50 | .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", | ||
| 51 | .dependencies = featureSet(&[_]Feature{}), | ||
| 52 | }; | ||
| 53 | result[@intFromEnum(Feature.hard_quad_float)] = .{ | ||
| 54 | .llvm_name = "hard-quad-float", | ||
| 55 | .description = "Enable quad-word floating point instructions", | ||
| 56 | .dependencies = featureSet(&[_]Feature{}), | ||
| 57 | }; | ||
| 58 | result[@intFromEnum(Feature.hasleoncasa)] = .{ | ||
| 59 | .llvm_name = "hasleoncasa", | ||
| 60 | .description = "Enable CASA instruction for LEON3 and LEON4 processors", | ||
| 61 | .dependencies = featureSet(&[_]Feature{}), | ||
| 62 | }; | ||
| 63 | result[@intFromEnum(Feature.hasumacsmac)] = .{ | ||
| 64 | .llvm_name = "hasumacsmac", | ||
| 65 | .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", | ||
| 66 | .dependencies = featureSet(&[_]Feature{}), | ||
| 67 | }; | ||
| 68 | result[@intFromEnum(Feature.insertnopload)] = .{ | ||
| 69 | .llvm_name = "insertnopload", | ||
| 70 | .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", | ||
| 71 | .dependencies = featureSet(&[_]Feature{}), | ||
| 72 | }; | ||
| 73 | result[@intFromEnum(Feature.leon)] = .{ | ||
| 74 | .llvm_name = "leon", | ||
| 75 | .description = "Enable LEON extensions", | ||
| 76 | .dependencies = featureSet(&[_]Feature{}), | ||
| 77 | }; | ||
| 78 | result[@intFromEnum(Feature.leoncyclecounter)] = .{ | ||
| 79 | .llvm_name = "leoncyclecounter", | ||
| 80 | .description = "Use the Leon cycle counter register", | ||
| 81 | .dependencies = featureSet(&[_]Feature{}), | ||
| 82 | }; | ||
| 83 | result[@intFromEnum(Feature.leonpwrpsr)] = .{ | ||
| 84 | .llvm_name = "leonpwrpsr", | ||
| 85 | .description = "Enable the PWRPSR instruction", | ||
| 86 | .dependencies = featureSet(&[_]Feature{}), | ||
| 87 | }; | ||
| 88 | result[@intFromEnum(Feature.no_fmuls)] = .{ | ||
| 89 | .llvm_name = "no-fmuls", | ||
| 90 | .description = "Disable the fmuls instruction.", | ||
| 91 | .dependencies = featureSet(&[_]Feature{}), | ||
| 92 | }; | ||
| 93 | result[@intFromEnum(Feature.no_fsmuld)] = .{ | ||
| 94 | .llvm_name = "no-fsmuld", | ||
| 95 | .description = "Disable the fsmuld instruction.", | ||
| 96 | .dependencies = featureSet(&[_]Feature{}), | ||
| 97 | }; | ||
| 98 | result[@intFromEnum(Feature.popc)] = .{ | ||
| 99 | .llvm_name = "popc", | ||
| 100 | .description = "Use the popc (population count) instruction", | ||
| 101 | .dependencies = featureSet(&[_]Feature{}), | ||
| 102 | }; | ||
| 103 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 104 | .llvm_name = "soft-float", | ||
| 105 | .description = "Use software emulation for floating point", | ||
| 106 | .dependencies = featureSet(&[_]Feature{}), | ||
| 107 | }; | ||
| 108 | result[@intFromEnum(Feature.soft_mul_div)] = .{ | ||
| 109 | .llvm_name = "soft-mul-div", | ||
| 110 | .description = "Use software emulation for integer multiply and divide", | ||
| 111 | .dependencies = featureSet(&[_]Feature{}), | ||
| 112 | }; | ||
| 113 | result[@intFromEnum(Feature.v9)] = .{ | ||
| 114 | .llvm_name = "v9", | ||
| 115 | .description = "Enable SPARC-V9 instructions", | ||
| 116 | .dependencies = featureSet(&[_]Feature{}), | ||
| 117 | }; | ||
| 118 | result[@intFromEnum(Feature.vis)] = .{ | ||
| 119 | .llvm_name = "vis", | ||
| 120 | .description = "Enable UltraSPARC Visual Instruction Set extensions", | ||
| 121 | .dependencies = featureSet(&[_]Feature{}), | ||
| 122 | }; | ||
| 123 | result[@intFromEnum(Feature.vis2)] = .{ | ||
| 124 | .llvm_name = "vis2", | ||
| 125 | .description = "Enable Visual Instruction Set extensions II", | ||
| 126 | .dependencies = featureSet(&[_]Feature{}), | ||
| 127 | }; | ||
| 128 | result[@intFromEnum(Feature.vis3)] = .{ | ||
| 129 | .llvm_name = "vis3", | ||
| 130 | .description = "Enable Visual Instruction Set extensions III", | ||
| 131 | .dependencies = featureSet(&[_]Feature{}), | ||
| 132 | }; | ||
| 133 | const ti = @typeInfo(Feature); | ||
| 134 | for (&result, 0..) |*elem, i| { | ||
| 135 | elem.index = i; | ||
| 136 | elem.name = ti.Enum.fields[i].name; | ||
| 137 | } | ||
| 138 | break :blk result; | ||
| 139 | }; | ||
| 140 | |||
| 141 | pub const cpu = struct { | ||
| 142 | pub const at697e = CpuModel{ | ||
| 143 | .name = "at697e", | ||
| 144 | .llvm_name = "at697e", | ||
| 145 | .features = featureSet(&[_]Feature{ | ||
| 146 | .insertnopload, | ||
| 147 | .leon, | ||
| 148 | }), | ||
| 149 | }; | ||
| 150 | pub const at697f = CpuModel{ | ||
| 151 | .name = "at697f", | ||
| 152 | .llvm_name = "at697f", | ||
| 153 | .features = featureSet(&[_]Feature{ | ||
| 154 | .insertnopload, | ||
| 155 | .leon, | ||
| 156 | }), | ||
| 157 | }; | ||
| 158 | pub const f934 = CpuModel{ | ||
| 159 | .name = "f934", | ||
| 160 | .llvm_name = "f934", | ||
| 161 | .features = featureSet(&[_]Feature{}), | ||
| 162 | }; | ||
| 163 | pub const generic = CpuModel{ | ||
| 164 | .name = "generic", | ||
| 165 | .llvm_name = "generic", | ||
| 166 | .features = featureSet(&[_]Feature{}), | ||
| 167 | }; | ||
| 168 | pub const gr712rc = CpuModel{ | ||
| 169 | .name = "gr712rc", | ||
| 170 | .llvm_name = "gr712rc", | ||
| 171 | .features = featureSet(&[_]Feature{ | ||
| 172 | .hasleoncasa, | ||
| 173 | .leon, | ||
| 174 | }), | ||
| 175 | }; | ||
| 176 | pub const gr740 = CpuModel{ | ||
| 177 | .name = "gr740", | ||
| 178 | .llvm_name = "gr740", | ||
| 179 | .features = featureSet(&[_]Feature{ | ||
| 180 | .hasleoncasa, | ||
| 181 | .hasumacsmac, | ||
| 182 | .leon, | ||
| 183 | .leoncyclecounter, | ||
| 184 | .leonpwrpsr, | ||
| 185 | }), | ||
| 186 | }; | ||
| 187 | pub const hypersparc = CpuModel{ | ||
| 188 | .name = "hypersparc", | ||
| 189 | .llvm_name = "hypersparc", | ||
| 190 | .features = featureSet(&[_]Feature{}), | ||
| 191 | }; | ||
| 192 | pub const leon2 = CpuModel{ | ||
| 193 | .name = "leon2", | ||
| 194 | .llvm_name = "leon2", | ||
| 195 | .features = featureSet(&[_]Feature{ | ||
| 196 | .leon, | ||
| 197 | }), | ||
| 198 | }; | ||
| 199 | pub const leon3 = CpuModel{ | ||
| 200 | .name = "leon3", | ||
| 201 | .llvm_name = "leon3", | ||
| 202 | .features = featureSet(&[_]Feature{ | ||
| 203 | .hasumacsmac, | ||
| 204 | .leon, | ||
| 205 | }), | ||
| 206 | }; | ||
| 207 | pub const leon4 = CpuModel{ | ||
| 208 | .name = "leon4", | ||
| 209 | .llvm_name = "leon4", | ||
| 210 | .features = featureSet(&[_]Feature{ | ||
| 211 | .hasleoncasa, | ||
| 212 | .hasumacsmac, | ||
| 213 | .leon, | ||
| 214 | }), | ||
| 215 | }; | ||
| 216 | pub const ma2080 = CpuModel{ | ||
| 217 | .name = "ma2080", | ||
| 218 | .llvm_name = "ma2080", | ||
| 219 | .features = featureSet(&[_]Feature{ | ||
| 220 | .hasleoncasa, | ||
| 221 | .leon, | ||
| 222 | }), | ||
| 223 | }; | ||
| 224 | pub const ma2085 = CpuModel{ | ||
| 225 | .name = "ma2085", | ||
| 226 | .llvm_name = "ma2085", | ||
| 227 | .features = featureSet(&[_]Feature{ | ||
| 228 | .hasleoncasa, | ||
| 229 | .leon, | ||
| 230 | }), | ||
| 231 | }; | ||
| 232 | pub const ma2100 = CpuModel{ | ||
| 233 | .name = "ma2100", | ||
| 234 | .llvm_name = "ma2100", | ||
| 235 | .features = featureSet(&[_]Feature{ | ||
| 236 | .hasleoncasa, | ||
| 237 | .leon, | ||
| 238 | }), | ||
| 239 | }; | ||
| 240 | pub const ma2150 = CpuModel{ | ||
| 241 | .name = "ma2150", | ||
| 242 | .llvm_name = "ma2150", | ||
| 243 | .features = featureSet(&[_]Feature{ | ||
| 244 | .hasleoncasa, | ||
| 245 | .leon, | ||
| 246 | }), | ||
| 247 | }; | ||
| 248 | pub const ma2155 = CpuModel{ | ||
| 249 | .name = "ma2155", | ||
| 250 | .llvm_name = "ma2155", | ||
| 251 | .features = featureSet(&[_]Feature{ | ||
| 252 | .hasleoncasa, | ||
| 253 | .leon, | ||
| 254 | }), | ||
| 255 | }; | ||
| 256 | pub const ma2450 = CpuModel{ | ||
| 257 | .name = "ma2450", | ||
| 258 | .llvm_name = "ma2450", | ||
| 259 | .features = featureSet(&[_]Feature{ | ||
| 260 | .hasleoncasa, | ||
| 261 | .leon, | ||
| 262 | }), | ||
| 263 | }; | ||
| 264 | pub const ma2455 = CpuModel{ | ||
| 265 | .name = "ma2455", | ||
| 266 | .llvm_name = "ma2455", | ||
| 267 | .features = featureSet(&[_]Feature{ | ||
| 268 | .hasleoncasa, | ||
| 269 | .leon, | ||
| 270 | }), | ||
| 271 | }; | ||
| 272 | pub const ma2480 = CpuModel{ | ||
| 273 | .name = "ma2480", | ||
| 274 | .llvm_name = "ma2480", | ||
| 275 | .features = featureSet(&[_]Feature{ | ||
| 276 | .hasleoncasa, | ||
| 277 | .leon, | ||
| 278 | }), | ||
| 279 | }; | ||
| 280 | pub const ma2485 = CpuModel{ | ||
| 281 | .name = "ma2485", | ||
| 282 | .llvm_name = "ma2485", | ||
| 283 | .features = featureSet(&[_]Feature{ | ||
| 284 | .hasleoncasa, | ||
| 285 | .leon, | ||
| 286 | }), | ||
| 287 | }; | ||
| 288 | pub const ma2x5x = CpuModel{ | ||
| 289 | .name = "ma2x5x", | ||
| 290 | .llvm_name = "ma2x5x", | ||
| 291 | .features = featureSet(&[_]Feature{ | ||
| 292 | .hasleoncasa, | ||
| 293 | .leon, | ||
| 294 | }), | ||
| 295 | }; | ||
| 296 | pub const ma2x8x = CpuModel{ | ||
| 297 | .name = "ma2x8x", | ||
| 298 | .llvm_name = "ma2x8x", | ||
| 299 | .features = featureSet(&[_]Feature{ | ||
| 300 | .hasleoncasa, | ||
| 301 | .leon, | ||
| 302 | }), | ||
| 303 | }; | ||
| 304 | pub const myriad2 = CpuModel{ | ||
| 305 | .name = "myriad2", | ||
| 306 | .llvm_name = "myriad2", | ||
| 307 | .features = featureSet(&[_]Feature{ | ||
| 308 | .hasleoncasa, | ||
| 309 | .leon, | ||
| 310 | }), | ||
| 311 | }; | ||
| 312 | pub const myriad2_1 = CpuModel{ | ||
| 313 | .name = "myriad2_1", | ||
| 314 | .llvm_name = "myriad2.1", | ||
| 315 | .features = featureSet(&[_]Feature{ | ||
| 316 | .hasleoncasa, | ||
| 317 | .leon, | ||
| 318 | }), | ||
| 319 | }; | ||
| 320 | pub const myriad2_2 = CpuModel{ | ||
| 321 | .name = "myriad2_2", | ||
| 322 | .llvm_name = "myriad2.2", | ||
| 323 | .features = featureSet(&[_]Feature{ | ||
| 324 | .hasleoncasa, | ||
| 325 | .leon, | ||
| 326 | }), | ||
| 327 | }; | ||
| 328 | pub const myriad2_3 = CpuModel{ | ||
| 329 | .name = "myriad2_3", | ||
| 330 | .llvm_name = "myriad2.3", | ||
| 331 | .features = featureSet(&[_]Feature{ | ||
| 332 | .hasleoncasa, | ||
| 333 | .leon, | ||
| 334 | }), | ||
| 335 | }; | ||
| 336 | pub const niagara = CpuModel{ | ||
| 337 | .name = "niagara", | ||
| 338 | .llvm_name = "niagara", | ||
| 339 | .features = featureSet(&[_]Feature{ | ||
| 340 | .deprecated_v8, | ||
| 341 | .v9, | ||
| 342 | .vis, | ||
| 343 | .vis2, | ||
| 344 | }), | ||
| 345 | }; | ||
| 346 | pub const niagara2 = CpuModel{ | ||
| 347 | .name = "niagara2", | ||
| 348 | .llvm_name = "niagara2", | ||
| 349 | .features = featureSet(&[_]Feature{ | ||
| 350 | .deprecated_v8, | ||
| 351 | .popc, | ||
| 352 | .v9, | ||
| 353 | .vis, | ||
| 354 | .vis2, | ||
| 355 | }), | ||
| 356 | }; | ||
| 357 | pub const niagara3 = CpuModel{ | ||
| 358 | .name = "niagara3", | ||
| 359 | .llvm_name = "niagara3", | ||
| 360 | .features = featureSet(&[_]Feature{ | ||
| 361 | .deprecated_v8, | ||
| 362 | .popc, | ||
| 363 | .v9, | ||
| 364 | .vis, | ||
| 365 | .vis2, | ||
| 366 | }), | ||
| 367 | }; | ||
| 368 | pub const niagara4 = CpuModel{ | ||
| 369 | .name = "niagara4", | ||
| 370 | .llvm_name = "niagara4", | ||
| 371 | .features = featureSet(&[_]Feature{ | ||
| 372 | .deprecated_v8, | ||
| 373 | .popc, | ||
| 374 | .v9, | ||
| 375 | .vis, | ||
| 376 | .vis2, | ||
| 377 | .vis3, | ||
| 378 | }), | ||
| 379 | }; | ||
| 380 | pub const sparclet = CpuModel{ | ||
| 381 | .name = "sparclet", | ||
| 382 | .llvm_name = "sparclet", | ||
| 383 | .features = featureSet(&[_]Feature{}), | ||
| 384 | }; | ||
| 385 | pub const sparclite = CpuModel{ | ||
| 386 | .name = "sparclite", | ||
| 387 | .llvm_name = "sparclite", | ||
| 388 | .features = featureSet(&[_]Feature{}), | ||
| 389 | }; | ||
| 390 | pub const sparclite86x = CpuModel{ | ||
| 391 | .name = "sparclite86x", | ||
| 392 | .llvm_name = "sparclite86x", | ||
| 393 | .features = featureSet(&[_]Feature{}), | ||
| 394 | }; | ||
| 395 | pub const supersparc = CpuModel{ | ||
| 396 | .name = "supersparc", | ||
| 397 | .llvm_name = "supersparc", | ||
| 398 | .features = featureSet(&[_]Feature{}), | ||
| 399 | }; | ||
| 400 | pub const tsc701 = CpuModel{ | ||
| 401 | .name = "tsc701", | ||
| 402 | .llvm_name = "tsc701", | ||
| 403 | .features = featureSet(&[_]Feature{}), | ||
| 404 | }; | ||
| 405 | pub const ultrasparc = CpuModel{ | ||
| 406 | .name = "ultrasparc", | ||
| 407 | .llvm_name = "ultrasparc", | ||
| 408 | .features = featureSet(&[_]Feature{ | ||
| 409 | .deprecated_v8, | ||
| 410 | .v9, | ||
| 411 | .vis, | ||
| 412 | }), | ||
| 413 | }; | ||
| 414 | pub const ultrasparc3 = CpuModel{ | ||
| 415 | .name = "ultrasparc3", | ||
| 416 | .llvm_name = "ultrasparc3", | ||
| 417 | .features = featureSet(&[_]Feature{ | ||
| 418 | .deprecated_v8, | ||
| 419 | .v9, | ||
| 420 | .vis, | ||
| 421 | .vis2, | ||
| 422 | }), | ||
| 423 | }; | ||
| 424 | pub const ut699 = CpuModel{ | ||
| 425 | .name = "ut699", | ||
| 426 | .llvm_name = "ut699", | ||
| 427 | .features = featureSet(&[_]Feature{ | ||
| 428 | .fixallfdivsqrt, | ||
| 429 | .insertnopload, | ||
| 430 | .leon, | ||
| 431 | .no_fmuls, | ||
| 432 | .no_fsmuld, | ||
| 433 | }), | ||
| 434 | }; | ||
| 435 | pub const v7 = CpuModel{ | ||
| 436 | .name = "v7", | ||
| 437 | .llvm_name = "v7", | ||
| 438 | .features = featureSet(&[_]Feature{ | ||
| 439 | .no_fsmuld, | ||
| 440 | .soft_mul_div, | ||
| 441 | }), | ||
| 442 | }; | ||
| 443 | pub const v8 = CpuModel{ | ||
| 444 | .name = "v8", | ||
| 445 | .llvm_name = "v8", | ||
| 446 | .features = featureSet(&[_]Feature{}), | ||
| 447 | }; | ||
| 448 | pub const v9 = CpuModel{ | ||
| 449 | .name = "v9", | ||
| 450 | .llvm_name = "v9", | ||
| 451 | .features = featureSet(&[_]Feature{ | ||
| 452 | .v9, | ||
| 453 | }), | ||
| 454 | }; | ||
| 455 | }; | ||
lib/std/Target/spirv.zig created+2091
| ... | @@ -0,0 +1,2091 @@ | ||
| 1 | //! This file is auto-generated by tools/update_spirv_features.zig. | ||
| 2 | //! TODO: Dependencies of capabilities on extensions. | ||
| 3 | //! TODO: Dependencies of extensions on extensions. | ||
| 4 | //! TODO: Dependencies of extensions on versions. | ||
| 5 | |||
| 6 | const std = @import("../std.zig"); | ||
| 7 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 8 | const CpuModel = std.Target.Cpu.Model; | ||
| 9 | |||
| 10 | pub const Feature = enum { | ||
| 11 | v1_1, | ||
| 12 | v1_2, | ||
| 13 | v1_3, | ||
| 14 | v1_4, | ||
| 15 | v1_5, | ||
| 16 | SPV_AMD_shader_fragment_mask, | ||
| 17 | SPV_AMD_gpu_shader_int16, | ||
| 18 | SPV_AMD_gpu_shader_half_float, | ||
| 19 | SPV_AMD_texture_gather_bias_lod, | ||
| 20 | SPV_AMD_shader_ballot, | ||
| 21 | SPV_AMD_gcn_shader, | ||
| 22 | SPV_AMD_shader_image_load_store_lod, | ||
| 23 | SPV_AMD_shader_explicit_vertex_parameter, | ||
| 24 | SPV_AMD_shader_trinary_minmax, | ||
| 25 | SPV_AMD_gpu_shader_half_float_fetch, | ||
| 26 | SPV_GOOGLE_hlsl_functionality1, | ||
| 27 | SPV_GOOGLE_user_type, | ||
| 28 | SPV_GOOGLE_decorate_string, | ||
| 29 | SPV_EXT_demote_to_helper_invocation, | ||
| 30 | SPV_EXT_descriptor_indexing, | ||
| 31 | SPV_EXT_fragment_fully_covered, | ||
| 32 | SPV_EXT_shader_stencil_export, | ||
| 33 | SPV_EXT_physical_storage_buffer, | ||
| 34 | SPV_EXT_shader_atomic_float_add, | ||
| 35 | SPV_EXT_shader_atomic_float_min_max, | ||
| 36 | SPV_EXT_shader_image_int64, | ||
| 37 | SPV_EXT_fragment_shader_interlock, | ||
| 38 | SPV_EXT_fragment_invocation_density, | ||
| 39 | SPV_EXT_shader_viewport_index_layer, | ||
| 40 | SPV_INTEL_loop_fuse, | ||
| 41 | SPV_INTEL_fpga_dsp_control, | ||
| 42 | SPV_INTEL_fpga_reg, | ||
| 43 | SPV_INTEL_fpga_memory_accesses, | ||
| 44 | SPV_INTEL_fpga_loop_controls, | ||
| 45 | SPV_INTEL_io_pipes, | ||
| 46 | SPV_INTEL_unstructured_loop_controls, | ||
| 47 | SPV_INTEL_blocking_pipes, | ||
| 48 | SPV_INTEL_device_side_avc_motion_estimation, | ||
| 49 | SPV_INTEL_fpga_memory_attributes, | ||
| 50 | SPV_INTEL_fp_fast_math_mode, | ||
| 51 | SPV_INTEL_media_block_io, | ||
| 52 | SPV_INTEL_shader_integer_functions2, | ||
| 53 | SPV_INTEL_subgroups, | ||
| 54 | SPV_INTEL_fpga_cluster_attributes, | ||
| 55 | SPV_INTEL_kernel_attributes, | ||
| 56 | SPV_INTEL_arbitrary_precision_integers, | ||
| 57 | SPV_KHR_8bit_storage, | ||
| 58 | SPV_KHR_shader_clock, | ||
| 59 | SPV_KHR_device_group, | ||
| 60 | SPV_KHR_16bit_storage, | ||
| 61 | SPV_KHR_variable_pointers, | ||
| 62 | SPV_KHR_no_integer_wrap_decoration, | ||
| 63 | SPV_KHR_subgroup_vote, | ||
| 64 | SPV_KHR_multiview, | ||
| 65 | SPV_KHR_shader_ballot, | ||
| 66 | SPV_KHR_vulkan_memory_model, | ||
| 67 | SPV_KHR_physical_storage_buffer, | ||
| 68 | SPV_KHR_workgroup_memory_explicit_layout, | ||
| 69 | SPV_KHR_fragment_shading_rate, | ||
| 70 | SPV_KHR_shader_atomic_counter_ops, | ||
| 71 | SPV_KHR_shader_draw_parameters, | ||
| 72 | SPV_KHR_storage_buffer_storage_class, | ||
| 73 | SPV_KHR_linkonce_odr, | ||
| 74 | SPV_KHR_terminate_invocation, | ||
| 75 | SPV_KHR_non_semantic_info, | ||
| 76 | SPV_KHR_post_depth_coverage, | ||
| 77 | SPV_KHR_expect_assume, | ||
| 78 | SPV_KHR_ray_tracing, | ||
| 79 | SPV_KHR_ray_query, | ||
| 80 | SPV_KHR_float_controls, | ||
| 81 | SPV_NV_viewport_array2, | ||
| 82 | SPV_NV_shader_subgroup_partitioned, | ||
| 83 | SPV_NVX_multiview_per_view_attributes, | ||
| 84 | SPV_NV_ray_tracing, | ||
| 85 | SPV_NV_shader_image_footprint, | ||
| 86 | SPV_NV_shading_rate, | ||
| 87 | SPV_NV_stereo_view_rendering, | ||
| 88 | SPV_NV_compute_shader_derivatives, | ||
| 89 | SPV_NV_shader_sm_builtins, | ||
| 90 | SPV_NV_mesh_shader, | ||
| 91 | SPV_NV_geometry_shader_passthrough, | ||
| 92 | SPV_NV_fragment_shader_barycentric, | ||
| 93 | SPV_NV_cooperative_matrix, | ||
| 94 | SPV_NV_sample_mask_override_coverage, | ||
| 95 | Matrix, | ||
| 96 | Shader, | ||
| 97 | Geometry, | ||
| 98 | Tessellation, | ||
| 99 | Addresses, | ||
| 100 | Linkage, | ||
| 101 | Kernel, | ||
| 102 | Vector16, | ||
| 103 | Float16Buffer, | ||
| 104 | Float16, | ||
| 105 | Float64, | ||
| 106 | Int64, | ||
| 107 | Int64Atomics, | ||
| 108 | ImageBasic, | ||
| 109 | ImageReadWrite, | ||
| 110 | ImageMipmap, | ||
| 111 | Pipes, | ||
| 112 | Groups, | ||
| 113 | DeviceEnqueue, | ||
| 114 | LiteralSampler, | ||
| 115 | AtomicStorage, | ||
| 116 | Int16, | ||
| 117 | TessellationPointSize, | ||
| 118 | GeometryPointSize, | ||
| 119 | ImageGatherExtended, | ||
| 120 | StorageImageMultisample, | ||
| 121 | UniformBufferArrayDynamicIndexing, | ||
| 122 | SampledImageArrayDynamicIndexing, | ||
| 123 | StorageBufferArrayDynamicIndexing, | ||
| 124 | StorageImageArrayDynamicIndexing, | ||
| 125 | ClipDistance, | ||
| 126 | CullDistance, | ||
| 127 | ImageCubeArray, | ||
| 128 | SampleRateShading, | ||
| 129 | ImageRect, | ||
| 130 | SampledRect, | ||
| 131 | GenericPointer, | ||
| 132 | Int8, | ||
| 133 | InputAttachment, | ||
| 134 | SparseResidency, | ||
| 135 | MinLod, | ||
| 136 | Sampled1D, | ||
| 137 | Image1D, | ||
| 138 | SampledCubeArray, | ||
| 139 | SampledBuffer, | ||
| 140 | ImageBuffer, | ||
| 141 | ImageMSArray, | ||
| 142 | StorageImageExtendedFormats, | ||
| 143 | ImageQuery, | ||
| 144 | DerivativeControl, | ||
| 145 | InterpolationFunction, | ||
| 146 | TransformFeedback, | ||
| 147 | GeometryStreams, | ||
| 148 | StorageImageReadWithoutFormat, | ||
| 149 | StorageImageWriteWithoutFormat, | ||
| 150 | MultiViewport, | ||
| 151 | SubgroupDispatch, | ||
| 152 | NamedBarrier, | ||
| 153 | PipeStorage, | ||
| 154 | GroupNonUniform, | ||
| 155 | GroupNonUniformVote, | ||
| 156 | GroupNonUniformArithmetic, | ||
| 157 | GroupNonUniformBallot, | ||
| 158 | GroupNonUniformShuffle, | ||
| 159 | GroupNonUniformShuffleRelative, | ||
| 160 | GroupNonUniformClustered, | ||
| 161 | GroupNonUniformQuad, | ||
| 162 | ShaderLayer, | ||
| 163 | ShaderViewportIndex, | ||
| 164 | FragmentShadingRateKHR, | ||
| 165 | SubgroupBallotKHR, | ||
| 166 | DrawParameters, | ||
| 167 | WorkgroupMemoryExplicitLayoutKHR, | ||
| 168 | WorkgroupMemoryExplicitLayout8BitAccessKHR, | ||
| 169 | WorkgroupMemoryExplicitLayout16BitAccessKHR, | ||
| 170 | SubgroupVoteKHR, | ||
| 171 | StorageBuffer16BitAccess, | ||
| 172 | StorageUniformBufferBlock16, | ||
| 173 | UniformAndStorageBuffer16BitAccess, | ||
| 174 | StorageUniform16, | ||
| 175 | StoragePushConstant16, | ||
| 176 | StorageInputOutput16, | ||
| 177 | DeviceGroup, | ||
| 178 | MultiView, | ||
| 179 | VariablePointersStorageBuffer, | ||
| 180 | VariablePointers, | ||
| 181 | AtomicStorageOps, | ||
| 182 | SampleMaskPostDepthCoverage, | ||
| 183 | StorageBuffer8BitAccess, | ||
| 184 | UniformAndStorageBuffer8BitAccess, | ||
| 185 | StoragePushConstant8, | ||
| 186 | DenormPreserve, | ||
| 187 | DenormFlushToZero, | ||
| 188 | SignedZeroInfNanPreserve, | ||
| 189 | RoundingModeRTE, | ||
| 190 | RoundingModeRTZ, | ||
| 191 | RayQueryProvisionalKHR, | ||
| 192 | RayQueryKHR, | ||
| 193 | RayTraversalPrimitiveCullingKHR, | ||
| 194 | RayTracingKHR, | ||
| 195 | Float16ImageAMD, | ||
| 196 | ImageGatherBiasLodAMD, | ||
| 197 | FragmentMaskAMD, | ||
| 198 | StencilExportEXT, | ||
| 199 | ImageReadWriteLodAMD, | ||
| 200 | Int64ImageEXT, | ||
| 201 | ShaderClockKHR, | ||
| 202 | SampleMaskOverrideCoverageNV, | ||
| 203 | GeometryShaderPassthroughNV, | ||
| 204 | ShaderViewportIndexLayerEXT, | ||
| 205 | ShaderViewportIndexLayerNV, | ||
| 206 | ShaderViewportMaskNV, | ||
| 207 | ShaderStereoViewNV, | ||
| 208 | PerViewAttributesNV, | ||
| 209 | FragmentFullyCoveredEXT, | ||
| 210 | MeshShadingNV, | ||
| 211 | ImageFootprintNV, | ||
| 212 | FragmentBarycentricNV, | ||
| 213 | ComputeDerivativeGroupQuadsNV, | ||
| 214 | FragmentDensityEXT, | ||
| 215 | ShadingRateNV, | ||
| 216 | GroupNonUniformPartitionedNV, | ||
| 217 | ShaderNonUniform, | ||
| 218 | ShaderNonUniformEXT, | ||
| 219 | RuntimeDescriptorArray, | ||
| 220 | RuntimeDescriptorArrayEXT, | ||
| 221 | InputAttachmentArrayDynamicIndexing, | ||
| 222 | InputAttachmentArrayDynamicIndexingEXT, | ||
| 223 | UniformTexelBufferArrayDynamicIndexing, | ||
| 224 | UniformTexelBufferArrayDynamicIndexingEXT, | ||
| 225 | StorageTexelBufferArrayDynamicIndexing, | ||
| 226 | StorageTexelBufferArrayDynamicIndexingEXT, | ||
| 227 | UniformBufferArrayNonUniformIndexing, | ||
| 228 | UniformBufferArrayNonUniformIndexingEXT, | ||
| 229 | SampledImageArrayNonUniformIndexing, | ||
| 230 | SampledImageArrayNonUniformIndexingEXT, | ||
| 231 | StorageBufferArrayNonUniformIndexing, | ||
| 232 | StorageBufferArrayNonUniformIndexingEXT, | ||
| 233 | StorageImageArrayNonUniformIndexing, | ||
| 234 | StorageImageArrayNonUniformIndexingEXT, | ||
| 235 | InputAttachmentArrayNonUniformIndexing, | ||
| 236 | InputAttachmentArrayNonUniformIndexingEXT, | ||
| 237 | UniformTexelBufferArrayNonUniformIndexing, | ||
| 238 | UniformTexelBufferArrayNonUniformIndexingEXT, | ||
| 239 | StorageTexelBufferArrayNonUniformIndexing, | ||
| 240 | StorageTexelBufferArrayNonUniformIndexingEXT, | ||
| 241 | RayTracingNV, | ||
| 242 | VulkanMemoryModel, | ||
| 243 | VulkanMemoryModelKHR, | ||
| 244 | VulkanMemoryModelDeviceScope, | ||
| 245 | VulkanMemoryModelDeviceScopeKHR, | ||
| 246 | PhysicalStorageBufferAddresses, | ||
| 247 | PhysicalStorageBufferAddressesEXT, | ||
| 248 | ComputeDerivativeGroupLinearNV, | ||
| 249 | RayTracingProvisionalKHR, | ||
| 250 | CooperativeMatrixNV, | ||
| 251 | FragmentShaderSampleInterlockEXT, | ||
| 252 | FragmentShaderShadingRateInterlockEXT, | ||
| 253 | ShaderSMBuiltinsNV, | ||
| 254 | FragmentShaderPixelInterlockEXT, | ||
| 255 | DemoteToHelperInvocationEXT, | ||
| 256 | SubgroupShuffleINTEL, | ||
| 257 | SubgroupBufferBlockIOINTEL, | ||
| 258 | SubgroupImageBlockIOINTEL, | ||
| 259 | SubgroupImageMediaBlockIOINTEL, | ||
| 260 | RoundToInfinityINTEL, | ||
| 261 | FloatingPointModeINTEL, | ||
| 262 | IntegerFunctions2INTEL, | ||
| 263 | FunctionPointersINTEL, | ||
| 264 | IndirectReferencesINTEL, | ||
| 265 | AsmINTEL, | ||
| 266 | AtomicFloat32MinMaxEXT, | ||
| 267 | AtomicFloat64MinMaxEXT, | ||
| 268 | AtomicFloat16MinMaxEXT, | ||
| 269 | VectorComputeINTEL, | ||
| 270 | VectorAnyINTEL, | ||
| 271 | ExpectAssumeKHR, | ||
| 272 | SubgroupAvcMotionEstimationINTEL, | ||
| 273 | SubgroupAvcMotionEstimationIntraINTEL, | ||
| 274 | SubgroupAvcMotionEstimationChromaINTEL, | ||
| 275 | VariableLengthArrayINTEL, | ||
| 276 | FunctionFloatControlINTEL, | ||
| 277 | FPGAMemoryAttributesINTEL, | ||
| 278 | FPFastMathModeINTEL, | ||
| 279 | ArbitraryPrecisionIntegersINTEL, | ||
| 280 | UnstructuredLoopControlsINTEL, | ||
| 281 | FPGALoopControlsINTEL, | ||
| 282 | KernelAttributesINTEL, | ||
| 283 | FPGAKernelAttributesINTEL, | ||
| 284 | FPGAMemoryAccessesINTEL, | ||
| 285 | FPGAClusterAttributesINTEL, | ||
| 286 | LoopFuseINTEL, | ||
| 287 | FPGABufferLocationINTEL, | ||
| 288 | USMStorageClassesINTEL, | ||
| 289 | IOPipesINTEL, | ||
| 290 | BlockingPipesINTEL, | ||
| 291 | FPGARegINTEL, | ||
| 292 | AtomicFloat32AddEXT, | ||
| 293 | AtomicFloat64AddEXT, | ||
| 294 | LongConstantCompositeINTEL, | ||
| 295 | }; | ||
| 296 | |||
| 297 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 298 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 299 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 300 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 301 | |||
| 302 | pub const all_features = blk: { | ||
| 303 | @setEvalBranchQuota(2000); | ||
| 304 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 305 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 306 | var result: [len]CpuFeature = undefined; | ||
| 307 | result[@intFromEnum(Feature.v1_1)] = .{ | ||
| 308 | .llvm_name = null, | ||
| 309 | .description = "SPIR-V version 1.1", | ||
| 310 | .dependencies = featureSet(&[_]Feature{}), | ||
| 311 | }; | ||
| 312 | result[@intFromEnum(Feature.v1_2)] = .{ | ||
| 313 | .llvm_name = null, | ||
| 314 | .description = "SPIR-V version 1.2", | ||
| 315 | .dependencies = featureSet(&[_]Feature{ | ||
| 316 | .v1_1, | ||
| 317 | }), | ||
| 318 | }; | ||
| 319 | result[@intFromEnum(Feature.v1_3)] = .{ | ||
| 320 | .llvm_name = null, | ||
| 321 | .description = "SPIR-V version 1.3", | ||
| 322 | .dependencies = featureSet(&[_]Feature{ | ||
| 323 | .v1_2, | ||
| 324 | }), | ||
| 325 | }; | ||
| 326 | result[@intFromEnum(Feature.v1_4)] = .{ | ||
| 327 | .llvm_name = null, | ||
| 328 | .description = "SPIR-V version 1.4", | ||
| 329 | .dependencies = featureSet(&[_]Feature{ | ||
| 330 | .v1_3, | ||
| 331 | }), | ||
| 332 | }; | ||
| 333 | result[@intFromEnum(Feature.v1_5)] = .{ | ||
| 334 | .llvm_name = null, | ||
| 335 | .description = "SPIR-V version 1.5", | ||
| 336 | .dependencies = featureSet(&[_]Feature{ | ||
| 337 | .v1_4, | ||
| 338 | }), | ||
| 339 | }; | ||
| 340 | result[@intFromEnum(Feature.SPV_AMD_shader_fragment_mask)] = .{ | ||
| 341 | .llvm_name = null, | ||
| 342 | .description = "SPIR-V extension SPV_AMD_shader_fragment_mask", | ||
| 343 | .dependencies = featureSet(&[_]Feature{}), | ||
| 344 | }; | ||
| 345 | result[@intFromEnum(Feature.SPV_AMD_gpu_shader_int16)] = .{ | ||
| 346 | .llvm_name = null, | ||
| 347 | .description = "SPIR-V extension SPV_AMD_gpu_shader_int16", | ||
| 348 | .dependencies = featureSet(&[_]Feature{}), | ||
| 349 | }; | ||
| 350 | result[@intFromEnum(Feature.SPV_AMD_gpu_shader_half_float)] = .{ | ||
| 351 | .llvm_name = null, | ||
| 352 | .description = "SPIR-V extension SPV_AMD_gpu_shader_half_float", | ||
| 353 | .dependencies = featureSet(&[_]Feature{}), | ||
| 354 | }; | ||
| 355 | result[@intFromEnum(Feature.SPV_AMD_texture_gather_bias_lod)] = .{ | ||
| 356 | .llvm_name = null, | ||
| 357 | .description = "SPIR-V extension SPV_AMD_texture_gather_bias_lod", | ||
| 358 | .dependencies = featureSet(&[_]Feature{}), | ||
| 359 | }; | ||
| 360 | result[@intFromEnum(Feature.SPV_AMD_shader_ballot)] = .{ | ||
| 361 | .llvm_name = null, | ||
| 362 | .description = "SPIR-V extension SPV_AMD_shader_ballot", | ||
| 363 | .dependencies = featureSet(&[_]Feature{}), | ||
| 364 | }; | ||
| 365 | result[@intFromEnum(Feature.SPV_AMD_gcn_shader)] = .{ | ||
| 366 | .llvm_name = null, | ||
| 367 | .description = "SPIR-V extension SPV_AMD_gcn_shader", | ||
| 368 | .dependencies = featureSet(&[_]Feature{}), | ||
| 369 | }; | ||
| 370 | result[@intFromEnum(Feature.SPV_AMD_shader_image_load_store_lod)] = .{ | ||
| 371 | .llvm_name = null, | ||
| 372 | .description = "SPIR-V extension SPV_AMD_shader_image_load_store_lod", | ||
| 373 | .dependencies = featureSet(&[_]Feature{}), | ||
| 374 | }; | ||
| 375 | result[@intFromEnum(Feature.SPV_AMD_shader_explicit_vertex_parameter)] = .{ | ||
| 376 | .llvm_name = null, | ||
| 377 | .description = "SPIR-V extension SPV_AMD_shader_explicit_vertex_parameter", | ||
| 378 | .dependencies = featureSet(&[_]Feature{}), | ||
| 379 | }; | ||
| 380 | result[@intFromEnum(Feature.SPV_AMD_shader_trinary_minmax)] = .{ | ||
| 381 | .llvm_name = null, | ||
| 382 | .description = "SPIR-V extension SPV_AMD_shader_trinary_minmax", | ||
| 383 | .dependencies = featureSet(&[_]Feature{}), | ||
| 384 | }; | ||
| 385 | result[@intFromEnum(Feature.SPV_AMD_gpu_shader_half_float_fetch)] = .{ | ||
| 386 | .llvm_name = null, | ||
| 387 | .description = "SPIR-V extension SPV_AMD_gpu_shader_half_float_fetch", | ||
| 388 | .dependencies = featureSet(&[_]Feature{}), | ||
| 389 | }; | ||
| 390 | result[@intFromEnum(Feature.SPV_GOOGLE_hlsl_functionality1)] = .{ | ||
| 391 | .llvm_name = null, | ||
| 392 | .description = "SPIR-V extension SPV_GOOGLE_hlsl_functionality1", | ||
| 393 | .dependencies = featureSet(&[_]Feature{}), | ||
| 394 | }; | ||
| 395 | result[@intFromEnum(Feature.SPV_GOOGLE_user_type)] = .{ | ||
| 396 | .llvm_name = null, | ||
| 397 | .description = "SPIR-V extension SPV_GOOGLE_user_type", | ||
| 398 | .dependencies = featureSet(&[_]Feature{}), | ||
| 399 | }; | ||
| 400 | result[@intFromEnum(Feature.SPV_GOOGLE_decorate_string)] = .{ | ||
| 401 | .llvm_name = null, | ||
| 402 | .description = "SPIR-V extension SPV_GOOGLE_decorate_string", | ||
| 403 | .dependencies = featureSet(&[_]Feature{}), | ||
| 404 | }; | ||
| 405 | result[@intFromEnum(Feature.SPV_EXT_demote_to_helper_invocation)] = .{ | ||
| 406 | .llvm_name = null, | ||
| 407 | .description = "SPIR-V extension SPV_EXT_demote_to_helper_invocation", | ||
| 408 | .dependencies = featureSet(&[_]Feature{}), | ||
| 409 | }; | ||
| 410 | result[@intFromEnum(Feature.SPV_EXT_descriptor_indexing)] = .{ | ||
| 411 | .llvm_name = null, | ||
| 412 | .description = "SPIR-V extension SPV_EXT_descriptor_indexing", | ||
| 413 | .dependencies = featureSet(&[_]Feature{}), | ||
| 414 | }; | ||
| 415 | result[@intFromEnum(Feature.SPV_EXT_fragment_fully_covered)] = .{ | ||
| 416 | .llvm_name = null, | ||
| 417 | .description = "SPIR-V extension SPV_EXT_fragment_fully_covered", | ||
| 418 | .dependencies = featureSet(&[_]Feature{}), | ||
| 419 | }; | ||
| 420 | result[@intFromEnum(Feature.SPV_EXT_shader_stencil_export)] = .{ | ||
| 421 | .llvm_name = null, | ||
| 422 | .description = "SPIR-V extension SPV_EXT_shader_stencil_export", | ||
| 423 | .dependencies = featureSet(&[_]Feature{}), | ||
| 424 | }; | ||
| 425 | result[@intFromEnum(Feature.SPV_EXT_physical_storage_buffer)] = .{ | ||
| 426 | .llvm_name = null, | ||
| 427 | .description = "SPIR-V extension SPV_EXT_physical_storage_buffer", | ||
| 428 | .dependencies = featureSet(&[_]Feature{}), | ||
| 429 | }; | ||
| 430 | result[@intFromEnum(Feature.SPV_EXT_shader_atomic_float_add)] = .{ | ||
| 431 | .llvm_name = null, | ||
| 432 | .description = "SPIR-V extension SPV_EXT_shader_atomic_float_add", | ||
| 433 | .dependencies = featureSet(&[_]Feature{}), | ||
| 434 | }; | ||
| 435 | result[@intFromEnum(Feature.SPV_EXT_shader_atomic_float_min_max)] = .{ | ||
| 436 | .llvm_name = null, | ||
| 437 | .description = "SPIR-V extension SPV_EXT_shader_atomic_float_min_max", | ||
| 438 | .dependencies = featureSet(&[_]Feature{}), | ||
| 439 | }; | ||
| 440 | result[@intFromEnum(Feature.SPV_EXT_shader_image_int64)] = .{ | ||
| 441 | .llvm_name = null, | ||
| 442 | .description = "SPIR-V extension SPV_EXT_shader_image_int64", | ||
| 443 | .dependencies = featureSet(&[_]Feature{}), | ||
| 444 | }; | ||
| 445 | result[@intFromEnum(Feature.SPV_EXT_fragment_shader_interlock)] = .{ | ||
| 446 | .llvm_name = null, | ||
| 447 | .description = "SPIR-V extension SPV_EXT_fragment_shader_interlock", | ||
| 448 | .dependencies = featureSet(&[_]Feature{}), | ||
| 449 | }; | ||
| 450 | result[@intFromEnum(Feature.SPV_EXT_fragment_invocation_density)] = .{ | ||
| 451 | .llvm_name = null, | ||
| 452 | .description = "SPIR-V extension SPV_EXT_fragment_invocation_density", | ||
| 453 | .dependencies = featureSet(&[_]Feature{}), | ||
| 454 | }; | ||
| 455 | result[@intFromEnum(Feature.SPV_EXT_shader_viewport_index_layer)] = .{ | ||
| 456 | .llvm_name = null, | ||
| 457 | .description = "SPIR-V extension SPV_EXT_shader_viewport_index_layer", | ||
| 458 | .dependencies = featureSet(&[_]Feature{}), | ||
| 459 | }; | ||
| 460 | result[@intFromEnum(Feature.SPV_INTEL_loop_fuse)] = .{ | ||
| 461 | .llvm_name = null, | ||
| 462 | .description = "SPIR-V extension SPV_INTEL_loop_fuse", | ||
| 463 | .dependencies = featureSet(&[_]Feature{}), | ||
| 464 | }; | ||
| 465 | result[@intFromEnum(Feature.SPV_INTEL_fpga_dsp_control)] = .{ | ||
| 466 | .llvm_name = null, | ||
| 467 | .description = "SPIR-V extension SPV_INTEL_fpga_dsp_control", | ||
| 468 | .dependencies = featureSet(&[_]Feature{}), | ||
| 469 | }; | ||
| 470 | result[@intFromEnum(Feature.SPV_INTEL_fpga_reg)] = .{ | ||
| 471 | .llvm_name = null, | ||
| 472 | .description = "SPIR-V extension SPV_INTEL_fpga_reg", | ||
| 473 | .dependencies = featureSet(&[_]Feature{}), | ||
| 474 | }; | ||
| 475 | result[@intFromEnum(Feature.SPV_INTEL_fpga_memory_accesses)] = .{ | ||
| 476 | .llvm_name = null, | ||
| 477 | .description = "SPIR-V extension SPV_INTEL_fpga_memory_accesses", | ||
| 478 | .dependencies = featureSet(&[_]Feature{}), | ||
| 479 | }; | ||
| 480 | result[@intFromEnum(Feature.SPV_INTEL_fpga_loop_controls)] = .{ | ||
| 481 | .llvm_name = null, | ||
| 482 | .description = "SPIR-V extension SPV_INTEL_fpga_loop_controls", | ||
| 483 | .dependencies = featureSet(&[_]Feature{}), | ||
| 484 | }; | ||
| 485 | result[@intFromEnum(Feature.SPV_INTEL_io_pipes)] = .{ | ||
| 486 | .llvm_name = null, | ||
| 487 | .description = "SPIR-V extension SPV_INTEL_io_pipes", | ||
| 488 | .dependencies = featureSet(&[_]Feature{}), | ||
| 489 | }; | ||
| 490 | result[@intFromEnum(Feature.SPV_INTEL_unstructured_loop_controls)] = .{ | ||
| 491 | .llvm_name = null, | ||
| 492 | .description = "SPIR-V extension SPV_INTEL_unstructured_loop_controls", | ||
| 493 | .dependencies = featureSet(&[_]Feature{}), | ||
| 494 | }; | ||
| 495 | result[@intFromEnum(Feature.SPV_INTEL_blocking_pipes)] = .{ | ||
| 496 | .llvm_name = null, | ||
| 497 | .description = "SPIR-V extension SPV_INTEL_blocking_pipes", | ||
| 498 | .dependencies = featureSet(&[_]Feature{}), | ||
| 499 | }; | ||
| 500 | result[@intFromEnum(Feature.SPV_INTEL_device_side_avc_motion_estimation)] = .{ | ||
| 501 | .llvm_name = null, | ||
| 502 | .description = "SPIR-V extension SPV_INTEL_device_side_avc_motion_estimation", | ||
| 503 | .dependencies = featureSet(&[_]Feature{}), | ||
| 504 | }; | ||
| 505 | result[@intFromEnum(Feature.SPV_INTEL_fpga_memory_attributes)] = .{ | ||
| 506 | .llvm_name = null, | ||
| 507 | .description = "SPIR-V extension SPV_INTEL_fpga_memory_attributes", | ||
| 508 | .dependencies = featureSet(&[_]Feature{}), | ||
| 509 | }; | ||
| 510 | result[@intFromEnum(Feature.SPV_INTEL_fp_fast_math_mode)] = .{ | ||
| 511 | .llvm_name = null, | ||
| 512 | .description = "SPIR-V extension SPV_INTEL_fp_fast_math_mode", | ||
| 513 | .dependencies = featureSet(&[_]Feature{}), | ||
| 514 | }; | ||
| 515 | result[@intFromEnum(Feature.SPV_INTEL_media_block_io)] = .{ | ||
| 516 | .llvm_name = null, | ||
| 517 | .description = "SPIR-V extension SPV_INTEL_media_block_io", | ||
| 518 | .dependencies = featureSet(&[_]Feature{}), | ||
| 519 | }; | ||
| 520 | result[@intFromEnum(Feature.SPV_INTEL_shader_integer_functions2)] = .{ | ||
| 521 | .llvm_name = null, | ||
| 522 | .description = "SPIR-V extension SPV_INTEL_shader_integer_functions2", | ||
| 523 | .dependencies = featureSet(&[_]Feature{}), | ||
| 524 | }; | ||
| 525 | result[@intFromEnum(Feature.SPV_INTEL_subgroups)] = .{ | ||
| 526 | .llvm_name = null, | ||
| 527 | .description = "SPIR-V extension SPV_INTEL_subgroups", | ||
| 528 | .dependencies = featureSet(&[_]Feature{}), | ||
| 529 | }; | ||
| 530 | result[@intFromEnum(Feature.SPV_INTEL_fpga_cluster_attributes)] = .{ | ||
| 531 | .llvm_name = null, | ||
| 532 | .description = "SPIR-V extension SPV_INTEL_fpga_cluster_attributes", | ||
| 533 | .dependencies = featureSet(&[_]Feature{}), | ||
| 534 | }; | ||
| 535 | result[@intFromEnum(Feature.SPV_INTEL_kernel_attributes)] = .{ | ||
| 536 | .llvm_name = null, | ||
| 537 | .description = "SPIR-V extension SPV_INTEL_kernel_attributes", | ||
| 538 | .dependencies = featureSet(&[_]Feature{}), | ||
| 539 | }; | ||
| 540 | result[@intFromEnum(Feature.SPV_INTEL_arbitrary_precision_integers)] = .{ | ||
| 541 | .llvm_name = null, | ||
| 542 | .description = "SPIR-V extension SPV_INTEL_arbitrary_precision_integers", | ||
| 543 | .dependencies = featureSet(&[_]Feature{}), | ||
| 544 | }; | ||
| 545 | result[@intFromEnum(Feature.SPV_KHR_8bit_storage)] = .{ | ||
| 546 | .llvm_name = null, | ||
| 547 | .description = "SPIR-V extension SPV_KHR_8bit_storage", | ||
| 548 | .dependencies = featureSet(&[_]Feature{}), | ||
| 549 | }; | ||
| 550 | result[@intFromEnum(Feature.SPV_KHR_shader_clock)] = .{ | ||
| 551 | .llvm_name = null, | ||
| 552 | .description = "SPIR-V extension SPV_KHR_shader_clock", | ||
| 553 | .dependencies = featureSet(&[_]Feature{}), | ||
| 554 | }; | ||
| 555 | result[@intFromEnum(Feature.SPV_KHR_device_group)] = .{ | ||
| 556 | .llvm_name = null, | ||
| 557 | .description = "SPIR-V extension SPV_KHR_device_group", | ||
| 558 | .dependencies = featureSet(&[_]Feature{}), | ||
| 559 | }; | ||
| 560 | result[@intFromEnum(Feature.SPV_KHR_16bit_storage)] = .{ | ||
| 561 | .llvm_name = null, | ||
| 562 | .description = "SPIR-V extension SPV_KHR_16bit_storage", | ||
| 563 | .dependencies = featureSet(&[_]Feature{}), | ||
| 564 | }; | ||
| 565 | result[@intFromEnum(Feature.SPV_KHR_variable_pointers)] = .{ | ||
| 566 | .llvm_name = null, | ||
| 567 | .description = "SPIR-V extension SPV_KHR_variable_pointers", | ||
| 568 | .dependencies = featureSet(&[_]Feature{}), | ||
| 569 | }; | ||
| 570 | result[@intFromEnum(Feature.SPV_KHR_no_integer_wrap_decoration)] = .{ | ||
| 571 | .llvm_name = null, | ||
| 572 | .description = "SPIR-V extension SPV_KHR_no_integer_wrap_decoration", | ||
| 573 | .dependencies = featureSet(&[_]Feature{}), | ||
| 574 | }; | ||
| 575 | result[@intFromEnum(Feature.SPV_KHR_subgroup_vote)] = .{ | ||
| 576 | .llvm_name = null, | ||
| 577 | .description = "SPIR-V extension SPV_KHR_subgroup_vote", | ||
| 578 | .dependencies = featureSet(&[_]Feature{}), | ||
| 579 | }; | ||
| 580 | result[@intFromEnum(Feature.SPV_KHR_multiview)] = .{ | ||
| 581 | .llvm_name = null, | ||
| 582 | .description = "SPIR-V extension SPV_KHR_multiview", | ||
| 583 | .dependencies = featureSet(&[_]Feature{}), | ||
| 584 | }; | ||
| 585 | result[@intFromEnum(Feature.SPV_KHR_shader_ballot)] = .{ | ||
| 586 | .llvm_name = null, | ||
| 587 | .description = "SPIR-V extension SPV_KHR_shader_ballot", | ||
| 588 | .dependencies = featureSet(&[_]Feature{}), | ||
| 589 | }; | ||
| 590 | result[@intFromEnum(Feature.SPV_KHR_vulkan_memory_model)] = .{ | ||
| 591 | .llvm_name = null, | ||
| 592 | .description = "SPIR-V extension SPV_KHR_vulkan_memory_model", | ||
| 593 | .dependencies = featureSet(&[_]Feature{}), | ||
| 594 | }; | ||
| 595 | result[@intFromEnum(Feature.SPV_KHR_physical_storage_buffer)] = .{ | ||
| 596 | .llvm_name = null, | ||
| 597 | .description = "SPIR-V extension SPV_KHR_physical_storage_buffer", | ||
| 598 | .dependencies = featureSet(&[_]Feature{}), | ||
| 599 | }; | ||
| 600 | result[@intFromEnum(Feature.SPV_KHR_workgroup_memory_explicit_layout)] = .{ | ||
| 601 | .llvm_name = null, | ||
| 602 | .description = "SPIR-V extension SPV_KHR_workgroup_memory_explicit_layout", | ||
| 603 | .dependencies = featureSet(&[_]Feature{}), | ||
| 604 | }; | ||
| 605 | result[@intFromEnum(Feature.SPV_KHR_fragment_shading_rate)] = .{ | ||
| 606 | .llvm_name = null, | ||
| 607 | .description = "SPIR-V extension SPV_KHR_fragment_shading_rate", | ||
| 608 | .dependencies = featureSet(&[_]Feature{}), | ||
| 609 | }; | ||
| 610 | result[@intFromEnum(Feature.SPV_KHR_shader_atomic_counter_ops)] = .{ | ||
| 611 | .llvm_name = null, | ||
| 612 | .description = "SPIR-V extension SPV_KHR_shader_atomic_counter_ops", | ||
| 613 | .dependencies = featureSet(&[_]Feature{}), | ||
| 614 | }; | ||
| 615 | result[@intFromEnum(Feature.SPV_KHR_shader_draw_parameters)] = .{ | ||
| 616 | .llvm_name = null, | ||
| 617 | .description = "SPIR-V extension SPV_KHR_shader_draw_parameters", | ||
| 618 | .dependencies = featureSet(&[_]Feature{}), | ||
| 619 | }; | ||
| 620 | result[@intFromEnum(Feature.SPV_KHR_storage_buffer_storage_class)] = .{ | ||
| 621 | .llvm_name = null, | ||
| 622 | .description = "SPIR-V extension SPV_KHR_storage_buffer_storage_class", | ||
| 623 | .dependencies = featureSet(&[_]Feature{}), | ||
| 624 | }; | ||
| 625 | result[@intFromEnum(Feature.SPV_KHR_linkonce_odr)] = .{ | ||
| 626 | .llvm_name = null, | ||
| 627 | .description = "SPIR-V extension SPV_KHR_linkonce_odr", | ||
| 628 | .dependencies = featureSet(&[_]Feature{}), | ||
| 629 | }; | ||
| 630 | result[@intFromEnum(Feature.SPV_KHR_terminate_invocation)] = .{ | ||
| 631 | .llvm_name = null, | ||
| 632 | .description = "SPIR-V extension SPV_KHR_terminate_invocation", | ||
| 633 | .dependencies = featureSet(&[_]Feature{}), | ||
| 634 | }; | ||
| 635 | result[@intFromEnum(Feature.SPV_KHR_non_semantic_info)] = .{ | ||
| 636 | .llvm_name = null, | ||
| 637 | .description = "SPIR-V extension SPV_KHR_non_semantic_info", | ||
| 638 | .dependencies = featureSet(&[_]Feature{}), | ||
| 639 | }; | ||
| 640 | result[@intFromEnum(Feature.SPV_KHR_post_depth_coverage)] = .{ | ||
| 641 | .llvm_name = null, | ||
| 642 | .description = "SPIR-V extension SPV_KHR_post_depth_coverage", | ||
| 643 | .dependencies = featureSet(&[_]Feature{}), | ||
| 644 | }; | ||
| 645 | result[@intFromEnum(Feature.SPV_KHR_expect_assume)] = .{ | ||
| 646 | .llvm_name = null, | ||
| 647 | .description = "SPIR-V extension SPV_KHR_expect_assume", | ||
| 648 | .dependencies = featureSet(&[_]Feature{}), | ||
| 649 | }; | ||
| 650 | result[@intFromEnum(Feature.SPV_KHR_ray_tracing)] = .{ | ||
| 651 | .llvm_name = null, | ||
| 652 | .description = "SPIR-V extension SPV_KHR_ray_tracing", | ||
| 653 | .dependencies = featureSet(&[_]Feature{}), | ||
| 654 | }; | ||
| 655 | result[@intFromEnum(Feature.SPV_KHR_ray_query)] = .{ | ||
| 656 | .llvm_name = null, | ||
| 657 | .description = "SPIR-V extension SPV_KHR_ray_query", | ||
| 658 | .dependencies = featureSet(&[_]Feature{}), | ||
| 659 | }; | ||
| 660 | result[@intFromEnum(Feature.SPV_KHR_float_controls)] = .{ | ||
| 661 | .llvm_name = null, | ||
| 662 | .description = "SPIR-V extension SPV_KHR_float_controls", | ||
| 663 | .dependencies = featureSet(&[_]Feature{}), | ||
| 664 | }; | ||
| 665 | result[@intFromEnum(Feature.SPV_NV_viewport_array2)] = .{ | ||
| 666 | .llvm_name = null, | ||
| 667 | .description = "SPIR-V extension SPV_NV_viewport_array2", | ||
| 668 | .dependencies = featureSet(&[_]Feature{}), | ||
| 669 | }; | ||
| 670 | result[@intFromEnum(Feature.SPV_NV_shader_subgroup_partitioned)] = .{ | ||
| 671 | .llvm_name = null, | ||
| 672 | .description = "SPIR-V extension SPV_NV_shader_subgroup_partitioned", | ||
| 673 | .dependencies = featureSet(&[_]Feature{}), | ||
| 674 | }; | ||
| 675 | result[@intFromEnum(Feature.SPV_NVX_multiview_per_view_attributes)] = .{ | ||
| 676 | .llvm_name = null, | ||
| 677 | .description = "SPIR-V extension SPV_NVX_multiview_per_view_attributes", | ||
| 678 | .dependencies = featureSet(&[_]Feature{}), | ||
| 679 | }; | ||
| 680 | result[@intFromEnum(Feature.SPV_NV_ray_tracing)] = .{ | ||
| 681 | .llvm_name = null, | ||
| 682 | .description = "SPIR-V extension SPV_NV_ray_tracing", | ||
| 683 | .dependencies = featureSet(&[_]Feature{}), | ||
| 684 | }; | ||
| 685 | result[@intFromEnum(Feature.SPV_NV_shader_image_footprint)] = .{ | ||
| 686 | .llvm_name = null, | ||
| 687 | .description = "SPIR-V extension SPV_NV_shader_image_footprint", | ||
| 688 | .dependencies = featureSet(&[_]Feature{}), | ||
| 689 | }; | ||
| 690 | result[@intFromEnum(Feature.SPV_NV_shading_rate)] = .{ | ||
| 691 | .llvm_name = null, | ||
| 692 | .description = "SPIR-V extension SPV_NV_shading_rate", | ||
| 693 | .dependencies = featureSet(&[_]Feature{}), | ||
| 694 | }; | ||
| 695 | result[@intFromEnum(Feature.SPV_NV_stereo_view_rendering)] = .{ | ||
| 696 | .llvm_name = null, | ||
| 697 | .description = "SPIR-V extension SPV_NV_stereo_view_rendering", | ||
| 698 | .dependencies = featureSet(&[_]Feature{}), | ||
| 699 | }; | ||
| 700 | result[@intFromEnum(Feature.SPV_NV_compute_shader_derivatives)] = .{ | ||
| 701 | .llvm_name = null, | ||
| 702 | .description = "SPIR-V extension SPV_NV_compute_shader_derivatives", | ||
| 703 | .dependencies = featureSet(&[_]Feature{}), | ||
| 704 | }; | ||
| 705 | result[@intFromEnum(Feature.SPV_NV_shader_sm_builtins)] = .{ | ||
| 706 | .llvm_name = null, | ||
| 707 | .description = "SPIR-V extension SPV_NV_shader_sm_builtins", | ||
| 708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.SPV_NV_mesh_shader)] = .{ | ||
| 711 | .llvm_name = null, | ||
| 712 | .description = "SPIR-V extension SPV_NV_mesh_shader", | ||
| 713 | .dependencies = featureSet(&[_]Feature{}), | ||
| 714 | }; | ||
| 715 | result[@intFromEnum(Feature.SPV_NV_geometry_shader_passthrough)] = .{ | ||
| 716 | .llvm_name = null, | ||
| 717 | .description = "SPIR-V extension SPV_NV_geometry_shader_passthrough", | ||
| 718 | .dependencies = featureSet(&[_]Feature{}), | ||
| 719 | }; | ||
| 720 | result[@intFromEnum(Feature.SPV_NV_fragment_shader_barycentric)] = .{ | ||
| 721 | .llvm_name = null, | ||
| 722 | .description = "SPIR-V extension SPV_NV_fragment_shader_barycentric", | ||
| 723 | .dependencies = featureSet(&[_]Feature{}), | ||
| 724 | }; | ||
| 725 | result[@intFromEnum(Feature.SPV_NV_cooperative_matrix)] = .{ | ||
| 726 | .llvm_name = null, | ||
| 727 | .description = "SPIR-V extension SPV_NV_cooperative_matrix", | ||
| 728 | .dependencies = featureSet(&[_]Feature{}), | ||
| 729 | }; | ||
| 730 | result[@intFromEnum(Feature.SPV_NV_sample_mask_override_coverage)] = .{ | ||
| 731 | .llvm_name = null, | ||
| 732 | .description = "SPIR-V extension SPV_NV_sample_mask_override_coverage", | ||
| 733 | .dependencies = featureSet(&[_]Feature{}), | ||
| 734 | }; | ||
| 735 | result[@intFromEnum(Feature.Matrix)] = .{ | ||
| 736 | .llvm_name = null, | ||
| 737 | .description = "Enable SPIR-V capability Matrix", | ||
| 738 | .dependencies = featureSet(&[_]Feature{}), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.Shader)] = .{ | ||
| 741 | .llvm_name = null, | ||
| 742 | .description = "Enable SPIR-V capability Shader", | ||
| 743 | .dependencies = featureSet(&[_]Feature{ | ||
| 744 | .Matrix, | ||
| 745 | }), | ||
| 746 | }; | ||
| 747 | result[@intFromEnum(Feature.Geometry)] = .{ | ||
| 748 | .llvm_name = null, | ||
| 749 | .description = "Enable SPIR-V capability Geometry", | ||
| 750 | .dependencies = featureSet(&[_]Feature{ | ||
| 751 | .Shader, | ||
| 752 | }), | ||
| 753 | }; | ||
| 754 | result[@intFromEnum(Feature.Tessellation)] = .{ | ||
| 755 | .llvm_name = null, | ||
| 756 | .description = "Enable SPIR-V capability Tessellation", | ||
| 757 | .dependencies = featureSet(&[_]Feature{ | ||
| 758 | .Shader, | ||
| 759 | }), | ||
| 760 | }; | ||
| 761 | result[@intFromEnum(Feature.Addresses)] = .{ | ||
| 762 | .llvm_name = null, | ||
| 763 | .description = "Enable SPIR-V capability Addresses", | ||
| 764 | .dependencies = featureSet(&[_]Feature{}), | ||
| 765 | }; | ||
| 766 | result[@intFromEnum(Feature.Linkage)] = .{ | ||
| 767 | .llvm_name = null, | ||
| 768 | .description = "Enable SPIR-V capability Linkage", | ||
| 769 | .dependencies = featureSet(&[_]Feature{}), | ||
| 770 | }; | ||
| 771 | result[@intFromEnum(Feature.Kernel)] = .{ | ||
| 772 | .llvm_name = null, | ||
| 773 | .description = "Enable SPIR-V capability Kernel", | ||
| 774 | .dependencies = featureSet(&[_]Feature{}), | ||
| 775 | }; | ||
| 776 | result[@intFromEnum(Feature.Vector16)] = .{ | ||
| 777 | .llvm_name = null, | ||
| 778 | .description = "Enable SPIR-V capability Vector16", | ||
| 779 | .dependencies = featureSet(&[_]Feature{ | ||
| 780 | .Kernel, | ||
| 781 | }), | ||
| 782 | }; | ||
| 783 | result[@intFromEnum(Feature.Float16Buffer)] = .{ | ||
| 784 | .llvm_name = null, | ||
| 785 | .description = "Enable SPIR-V capability Float16Buffer", | ||
| 786 | .dependencies = featureSet(&[_]Feature{ | ||
| 787 | .Kernel, | ||
| 788 | }), | ||
| 789 | }; | ||
| 790 | result[@intFromEnum(Feature.Float16)] = .{ | ||
| 791 | .llvm_name = null, | ||
| 792 | .description = "Enable SPIR-V capability Float16", | ||
| 793 | .dependencies = featureSet(&[_]Feature{}), | ||
| 794 | }; | ||
| 795 | result[@intFromEnum(Feature.Float64)] = .{ | ||
| 796 | .llvm_name = null, | ||
| 797 | .description = "Enable SPIR-V capability Float64", | ||
| 798 | .dependencies = featureSet(&[_]Feature{}), | ||
| 799 | }; | ||
| 800 | result[@intFromEnum(Feature.Int64)] = .{ | ||
| 801 | .llvm_name = null, | ||
| 802 | .description = "Enable SPIR-V capability Int64", | ||
| 803 | .dependencies = featureSet(&[_]Feature{}), | ||
| 804 | }; | ||
| 805 | result[@intFromEnum(Feature.Int64Atomics)] = .{ | ||
| 806 | .llvm_name = null, | ||
| 807 | .description = "Enable SPIR-V capability Int64Atomics", | ||
| 808 | .dependencies = featureSet(&[_]Feature{ | ||
| 809 | .Int64, | ||
| 810 | }), | ||
| 811 | }; | ||
| 812 | result[@intFromEnum(Feature.ImageBasic)] = .{ | ||
| 813 | .llvm_name = null, | ||
| 814 | .description = "Enable SPIR-V capability ImageBasic", | ||
| 815 | .dependencies = featureSet(&[_]Feature{ | ||
| 816 | .Kernel, | ||
| 817 | }), | ||
| 818 | }; | ||
| 819 | result[@intFromEnum(Feature.ImageReadWrite)] = .{ | ||
| 820 | .llvm_name = null, | ||
| 821 | .description = "Enable SPIR-V capability ImageReadWrite", | ||
| 822 | .dependencies = featureSet(&[_]Feature{ | ||
| 823 | .ImageBasic, | ||
| 824 | }), | ||
| 825 | }; | ||
| 826 | result[@intFromEnum(Feature.ImageMipmap)] = .{ | ||
| 827 | .llvm_name = null, | ||
| 828 | .description = "Enable SPIR-V capability ImageMipmap", | ||
| 829 | .dependencies = featureSet(&[_]Feature{ | ||
| 830 | .ImageBasic, | ||
| 831 | }), | ||
| 832 | }; | ||
| 833 | result[@intFromEnum(Feature.Pipes)] = .{ | ||
| 834 | .llvm_name = null, | ||
| 835 | .description = "Enable SPIR-V capability Pipes", | ||
| 836 | .dependencies = featureSet(&[_]Feature{ | ||
| 837 | .Kernel, | ||
| 838 | }), | ||
| 839 | }; | ||
| 840 | result[@intFromEnum(Feature.Groups)] = .{ | ||
| 841 | .llvm_name = null, | ||
| 842 | .description = "Enable SPIR-V capability Groups", | ||
| 843 | .dependencies = featureSet(&[_]Feature{}), | ||
| 844 | }; | ||
| 845 | result[@intFromEnum(Feature.DeviceEnqueue)] = .{ | ||
| 846 | .llvm_name = null, | ||
| 847 | .description = "Enable SPIR-V capability DeviceEnqueue", | ||
| 848 | .dependencies = featureSet(&[_]Feature{ | ||
| 849 | .Kernel, | ||
| 850 | }), | ||
| 851 | }; | ||
| 852 | result[@intFromEnum(Feature.LiteralSampler)] = .{ | ||
| 853 | .llvm_name = null, | ||
| 854 | .description = "Enable SPIR-V capability LiteralSampler", | ||
| 855 | .dependencies = featureSet(&[_]Feature{ | ||
| 856 | .Kernel, | ||
| 857 | }), | ||
| 858 | }; | ||
| 859 | result[@intFromEnum(Feature.AtomicStorage)] = .{ | ||
| 860 | .llvm_name = null, | ||
| 861 | .description = "Enable SPIR-V capability AtomicStorage", | ||
| 862 | .dependencies = featureSet(&[_]Feature{ | ||
| 863 | .Shader, | ||
| 864 | }), | ||
| 865 | }; | ||
| 866 | result[@intFromEnum(Feature.Int16)] = .{ | ||
| 867 | .llvm_name = null, | ||
| 868 | .description = "Enable SPIR-V capability Int16", | ||
| 869 | .dependencies = featureSet(&[_]Feature{}), | ||
| 870 | }; | ||
| 871 | result[@intFromEnum(Feature.TessellationPointSize)] = .{ | ||
| 872 | .llvm_name = null, | ||
| 873 | .description = "Enable SPIR-V capability TessellationPointSize", | ||
| 874 | .dependencies = featureSet(&[_]Feature{ | ||
| 875 | .Tessellation, | ||
| 876 | }), | ||
| 877 | }; | ||
| 878 | result[@intFromEnum(Feature.GeometryPointSize)] = .{ | ||
| 879 | .llvm_name = null, | ||
| 880 | .description = "Enable SPIR-V capability GeometryPointSize", | ||
| 881 | .dependencies = featureSet(&[_]Feature{ | ||
| 882 | .Geometry, | ||
| 883 | }), | ||
| 884 | }; | ||
| 885 | result[@intFromEnum(Feature.ImageGatherExtended)] = .{ | ||
| 886 | .llvm_name = null, | ||
| 887 | .description = "Enable SPIR-V capability ImageGatherExtended", | ||
| 888 | .dependencies = featureSet(&[_]Feature{ | ||
| 889 | .Shader, | ||
| 890 | }), | ||
| 891 | }; | ||
| 892 | result[@intFromEnum(Feature.StorageImageMultisample)] = .{ | ||
| 893 | .llvm_name = null, | ||
| 894 | .description = "Enable SPIR-V capability StorageImageMultisample", | ||
| 895 | .dependencies = featureSet(&[_]Feature{ | ||
| 896 | .Shader, | ||
| 897 | }), | ||
| 898 | }; | ||
| 899 | result[@intFromEnum(Feature.UniformBufferArrayDynamicIndexing)] = .{ | ||
| 900 | .llvm_name = null, | ||
| 901 | .description = "Enable SPIR-V capability UniformBufferArrayDynamicIndexing", | ||
| 902 | .dependencies = featureSet(&[_]Feature{ | ||
| 903 | .Shader, | ||
| 904 | }), | ||
| 905 | }; | ||
| 906 | result[@intFromEnum(Feature.SampledImageArrayDynamicIndexing)] = .{ | ||
| 907 | .llvm_name = null, | ||
| 908 | .description = "Enable SPIR-V capability SampledImageArrayDynamicIndexing", | ||
| 909 | .dependencies = featureSet(&[_]Feature{ | ||
| 910 | .Shader, | ||
| 911 | }), | ||
| 912 | }; | ||
| 913 | result[@intFromEnum(Feature.StorageBufferArrayDynamicIndexing)] = .{ | ||
| 914 | .llvm_name = null, | ||
| 915 | .description = "Enable SPIR-V capability StorageBufferArrayDynamicIndexing", | ||
| 916 | .dependencies = featureSet(&[_]Feature{ | ||
| 917 | .Shader, | ||
| 918 | }), | ||
| 919 | }; | ||
| 920 | result[@intFromEnum(Feature.StorageImageArrayDynamicIndexing)] = .{ | ||
| 921 | .llvm_name = null, | ||
| 922 | .description = "Enable SPIR-V capability StorageImageArrayDynamicIndexing", | ||
| 923 | .dependencies = featureSet(&[_]Feature{ | ||
| 924 | .Shader, | ||
| 925 | }), | ||
| 926 | }; | ||
| 927 | result[@intFromEnum(Feature.ClipDistance)] = .{ | ||
| 928 | .llvm_name = null, | ||
| 929 | .description = "Enable SPIR-V capability ClipDistance", | ||
| 930 | .dependencies = featureSet(&[_]Feature{ | ||
| 931 | .Shader, | ||
| 932 | }), | ||
| 933 | }; | ||
| 934 | result[@intFromEnum(Feature.CullDistance)] = .{ | ||
| 935 | .llvm_name = null, | ||
| 936 | .description = "Enable SPIR-V capability CullDistance", | ||
| 937 | .dependencies = featureSet(&[_]Feature{ | ||
| 938 | .Shader, | ||
| 939 | }), | ||
| 940 | }; | ||
| 941 | result[@intFromEnum(Feature.ImageCubeArray)] = .{ | ||
| 942 | .llvm_name = null, | ||
| 943 | .description = "Enable SPIR-V capability ImageCubeArray", | ||
| 944 | .dependencies = featureSet(&[_]Feature{ | ||
| 945 | .SampledCubeArray, | ||
| 946 | }), | ||
| 947 | }; | ||
| 948 | result[@intFromEnum(Feature.SampleRateShading)] = .{ | ||
| 949 | .llvm_name = null, | ||
| 950 | .description = "Enable SPIR-V capability SampleRateShading", | ||
| 951 | .dependencies = featureSet(&[_]Feature{ | ||
| 952 | .Shader, | ||
| 953 | }), | ||
| 954 | }; | ||
| 955 | result[@intFromEnum(Feature.ImageRect)] = .{ | ||
| 956 | .llvm_name = null, | ||
| 957 | .description = "Enable SPIR-V capability ImageRect", | ||
| 958 | .dependencies = featureSet(&[_]Feature{ | ||
| 959 | .SampledRect, | ||
| 960 | }), | ||
| 961 | }; | ||
| 962 | result[@intFromEnum(Feature.SampledRect)] = .{ | ||
| 963 | .llvm_name = null, | ||
| 964 | .description = "Enable SPIR-V capability SampledRect", | ||
| 965 | .dependencies = featureSet(&[_]Feature{ | ||
| 966 | .Shader, | ||
| 967 | }), | ||
| 968 | }; | ||
| 969 | result[@intFromEnum(Feature.GenericPointer)] = .{ | ||
| 970 | .llvm_name = null, | ||
| 971 | .description = "Enable SPIR-V capability GenericPointer", | ||
| 972 | .dependencies = featureSet(&[_]Feature{ | ||
| 973 | .Addresses, | ||
| 974 | }), | ||
| 975 | }; | ||
| 976 | result[@intFromEnum(Feature.Int8)] = .{ | ||
| 977 | .llvm_name = null, | ||
| 978 | .description = "Enable SPIR-V capability Int8", | ||
| 979 | .dependencies = featureSet(&[_]Feature{}), | ||
| 980 | }; | ||
| 981 | result[@intFromEnum(Feature.InputAttachment)] = .{ | ||
| 982 | .llvm_name = null, | ||
| 983 | .description = "Enable SPIR-V capability InputAttachment", | ||
| 984 | .dependencies = featureSet(&[_]Feature{ | ||
| 985 | .Shader, | ||
| 986 | }), | ||
| 987 | }; | ||
| 988 | result[@intFromEnum(Feature.SparseResidency)] = .{ | ||
| 989 | .llvm_name = null, | ||
| 990 | .description = "Enable SPIR-V capability SparseResidency", | ||
| 991 | .dependencies = featureSet(&[_]Feature{ | ||
| 992 | .Shader, | ||
| 993 | }), | ||
| 994 | }; | ||
| 995 | result[@intFromEnum(Feature.MinLod)] = .{ | ||
| 996 | .llvm_name = null, | ||
| 997 | .description = "Enable SPIR-V capability MinLod", | ||
| 998 | .dependencies = featureSet(&[_]Feature{ | ||
| 999 | .Shader, | ||
| 1000 | }), | ||
| 1001 | }; | ||
| 1002 | result[@intFromEnum(Feature.Sampled1D)] = .{ | ||
| 1003 | .llvm_name = null, | ||
| 1004 | .description = "Enable SPIR-V capability Sampled1D", | ||
| 1005 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1006 | }; | ||
| 1007 | result[@intFromEnum(Feature.Image1D)] = .{ | ||
| 1008 | .llvm_name = null, | ||
| 1009 | .description = "Enable SPIR-V capability Image1D", | ||
| 1010 | .dependencies = featureSet(&[_]Feature{ | ||
| 1011 | .Sampled1D, | ||
| 1012 | }), | ||
| 1013 | }; | ||
| 1014 | result[@intFromEnum(Feature.SampledCubeArray)] = .{ | ||
| 1015 | .llvm_name = null, | ||
| 1016 | .description = "Enable SPIR-V capability SampledCubeArray", | ||
| 1017 | .dependencies = featureSet(&[_]Feature{ | ||
| 1018 | .Shader, | ||
| 1019 | }), | ||
| 1020 | }; | ||
| 1021 | result[@intFromEnum(Feature.SampledBuffer)] = .{ | ||
| 1022 | .llvm_name = null, | ||
| 1023 | .description = "Enable SPIR-V capability SampledBuffer", | ||
| 1024 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1025 | }; | ||
| 1026 | result[@intFromEnum(Feature.ImageBuffer)] = .{ | ||
| 1027 | .llvm_name = null, | ||
| 1028 | .description = "Enable SPIR-V capability ImageBuffer", | ||
| 1029 | .dependencies = featureSet(&[_]Feature{ | ||
| 1030 | .SampledBuffer, | ||
| 1031 | }), | ||
| 1032 | }; | ||
| 1033 | result[@intFromEnum(Feature.ImageMSArray)] = .{ | ||
| 1034 | .llvm_name = null, | ||
| 1035 | .description = "Enable SPIR-V capability ImageMSArray", | ||
| 1036 | .dependencies = featureSet(&[_]Feature{ | ||
| 1037 | .Shader, | ||
| 1038 | }), | ||
| 1039 | }; | ||
| 1040 | result[@intFromEnum(Feature.StorageImageExtendedFormats)] = .{ | ||
| 1041 | .llvm_name = null, | ||
| 1042 | .description = "Enable SPIR-V capability StorageImageExtendedFormats", | ||
| 1043 | .dependencies = featureSet(&[_]Feature{ | ||
| 1044 | .Shader, | ||
| 1045 | }), | ||
| 1046 | }; | ||
| 1047 | result[@intFromEnum(Feature.ImageQuery)] = .{ | ||
| 1048 | .llvm_name = null, | ||
| 1049 | .description = "Enable SPIR-V capability ImageQuery", | ||
| 1050 | .dependencies = featureSet(&[_]Feature{ | ||
| 1051 | .Shader, | ||
| 1052 | }), | ||
| 1053 | }; | ||
| 1054 | result[@intFromEnum(Feature.DerivativeControl)] = .{ | ||
| 1055 | .llvm_name = null, | ||
| 1056 | .description = "Enable SPIR-V capability DerivativeControl", | ||
| 1057 | .dependencies = featureSet(&[_]Feature{ | ||
| 1058 | .Shader, | ||
| 1059 | }), | ||
| 1060 | }; | ||
| 1061 | result[@intFromEnum(Feature.InterpolationFunction)] = .{ | ||
| 1062 | .llvm_name = null, | ||
| 1063 | .description = "Enable SPIR-V capability InterpolationFunction", | ||
| 1064 | .dependencies = featureSet(&[_]Feature{ | ||
| 1065 | .Shader, | ||
| 1066 | }), | ||
| 1067 | }; | ||
| 1068 | result[@intFromEnum(Feature.TransformFeedback)] = .{ | ||
| 1069 | .llvm_name = null, | ||
| 1070 | .description = "Enable SPIR-V capability TransformFeedback", | ||
| 1071 | .dependencies = featureSet(&[_]Feature{ | ||
| 1072 | .Shader, | ||
| 1073 | }), | ||
| 1074 | }; | ||
| 1075 | result[@intFromEnum(Feature.GeometryStreams)] = .{ | ||
| 1076 | .llvm_name = null, | ||
| 1077 | .description = "Enable SPIR-V capability GeometryStreams", | ||
| 1078 | .dependencies = featureSet(&[_]Feature{ | ||
| 1079 | .Geometry, | ||
| 1080 | }), | ||
| 1081 | }; | ||
| 1082 | result[@intFromEnum(Feature.StorageImageReadWithoutFormat)] = .{ | ||
| 1083 | .llvm_name = null, | ||
| 1084 | .description = "Enable SPIR-V capability StorageImageReadWithoutFormat", | ||
| 1085 | .dependencies = featureSet(&[_]Feature{ | ||
| 1086 | .Shader, | ||
| 1087 | }), | ||
| 1088 | }; | ||
| 1089 | result[@intFromEnum(Feature.StorageImageWriteWithoutFormat)] = .{ | ||
| 1090 | .llvm_name = null, | ||
| 1091 | .description = "Enable SPIR-V capability StorageImageWriteWithoutFormat", | ||
| 1092 | .dependencies = featureSet(&[_]Feature{ | ||
| 1093 | .Shader, | ||
| 1094 | }), | ||
| 1095 | }; | ||
| 1096 | result[@intFromEnum(Feature.MultiViewport)] = .{ | ||
| 1097 | .llvm_name = null, | ||
| 1098 | .description = "Enable SPIR-V capability MultiViewport", | ||
| 1099 | .dependencies = featureSet(&[_]Feature{ | ||
| 1100 | .Geometry, | ||
| 1101 | }), | ||
| 1102 | }; | ||
| 1103 | result[@intFromEnum(Feature.SubgroupDispatch)] = .{ | ||
| 1104 | .llvm_name = null, | ||
| 1105 | .description = "Enable SPIR-V capability SubgroupDispatch", | ||
| 1106 | .dependencies = featureSet(&[_]Feature{ | ||
| 1107 | .v1_1, | ||
| 1108 | .DeviceEnqueue, | ||
| 1109 | }), | ||
| 1110 | }; | ||
| 1111 | result[@intFromEnum(Feature.NamedBarrier)] = .{ | ||
| 1112 | .llvm_name = null, | ||
| 1113 | .description = "Enable SPIR-V capability NamedBarrier", | ||
| 1114 | .dependencies = featureSet(&[_]Feature{ | ||
| 1115 | .v1_1, | ||
| 1116 | .Kernel, | ||
| 1117 | }), | ||
| 1118 | }; | ||
| 1119 | result[@intFromEnum(Feature.PipeStorage)] = .{ | ||
| 1120 | .llvm_name = null, | ||
| 1121 | .description = "Enable SPIR-V capability PipeStorage", | ||
| 1122 | .dependencies = featureSet(&[_]Feature{ | ||
| 1123 | .v1_1, | ||
| 1124 | .Pipes, | ||
| 1125 | }), | ||
| 1126 | }; | ||
| 1127 | result[@intFromEnum(Feature.GroupNonUniform)] = .{ | ||
| 1128 | .llvm_name = null, | ||
| 1129 | .description = "Enable SPIR-V capability GroupNonUniform", | ||
| 1130 | .dependencies = featureSet(&[_]Feature{ | ||
| 1131 | .v1_3, | ||
| 1132 | }), | ||
| 1133 | }; | ||
| 1134 | result[@intFromEnum(Feature.GroupNonUniformVote)] = .{ | ||
| 1135 | .llvm_name = null, | ||
| 1136 | .description = "Enable SPIR-V capability GroupNonUniformVote", | ||
| 1137 | .dependencies = featureSet(&[_]Feature{ | ||
| 1138 | .v1_3, | ||
| 1139 | .GroupNonUniform, | ||
| 1140 | }), | ||
| 1141 | }; | ||
| 1142 | result[@intFromEnum(Feature.GroupNonUniformArithmetic)] = .{ | ||
| 1143 | .llvm_name = null, | ||
| 1144 | .description = "Enable SPIR-V capability GroupNonUniformArithmetic", | ||
| 1145 | .dependencies = featureSet(&[_]Feature{ | ||
| 1146 | .v1_3, | ||
| 1147 | .GroupNonUniform, | ||
| 1148 | }), | ||
| 1149 | }; | ||
| 1150 | result[@intFromEnum(Feature.GroupNonUniformBallot)] = .{ | ||
| 1151 | .llvm_name = null, | ||
| 1152 | .description = "Enable SPIR-V capability GroupNonUniformBallot", | ||
| 1153 | .dependencies = featureSet(&[_]Feature{ | ||
| 1154 | .v1_3, | ||
| 1155 | .GroupNonUniform, | ||
| 1156 | }), | ||
| 1157 | }; | ||
| 1158 | result[@intFromEnum(Feature.GroupNonUniformShuffle)] = .{ | ||
| 1159 | .llvm_name = null, | ||
| 1160 | .description = "Enable SPIR-V capability GroupNonUniformShuffle", | ||
| 1161 | .dependencies = featureSet(&[_]Feature{ | ||
| 1162 | .v1_3, | ||
| 1163 | .GroupNonUniform, | ||
| 1164 | }), | ||
| 1165 | }; | ||
| 1166 | result[@intFromEnum(Feature.GroupNonUniformShuffleRelative)] = .{ | ||
| 1167 | .llvm_name = null, | ||
| 1168 | .description = "Enable SPIR-V capability GroupNonUniformShuffleRelative", | ||
| 1169 | .dependencies = featureSet(&[_]Feature{ | ||
| 1170 | .v1_3, | ||
| 1171 | .GroupNonUniform, | ||
| 1172 | }), | ||
| 1173 | }; | ||
| 1174 | result[@intFromEnum(Feature.GroupNonUniformClustered)] = .{ | ||
| 1175 | .llvm_name = null, | ||
| 1176 | .description = "Enable SPIR-V capability GroupNonUniformClustered", | ||
| 1177 | .dependencies = featureSet(&[_]Feature{ | ||
| 1178 | .v1_3, | ||
| 1179 | .GroupNonUniform, | ||
| 1180 | }), | ||
| 1181 | }; | ||
| 1182 | result[@intFromEnum(Feature.GroupNonUniformQuad)] = .{ | ||
| 1183 | .llvm_name = null, | ||
| 1184 | .description = "Enable SPIR-V capability GroupNonUniformQuad", | ||
| 1185 | .dependencies = featureSet(&[_]Feature{ | ||
| 1186 | .v1_3, | ||
| 1187 | .GroupNonUniform, | ||
| 1188 | }), | ||
| 1189 | }; | ||
| 1190 | result[@intFromEnum(Feature.ShaderLayer)] = .{ | ||
| 1191 | .llvm_name = null, | ||
| 1192 | .description = "Enable SPIR-V capability ShaderLayer", | ||
| 1193 | .dependencies = featureSet(&[_]Feature{ | ||
| 1194 | .v1_5, | ||
| 1195 | }), | ||
| 1196 | }; | ||
| 1197 | result[@intFromEnum(Feature.ShaderViewportIndex)] = .{ | ||
| 1198 | .llvm_name = null, | ||
| 1199 | .description = "Enable SPIR-V capability ShaderViewportIndex", | ||
| 1200 | .dependencies = featureSet(&[_]Feature{ | ||
| 1201 | .v1_5, | ||
| 1202 | }), | ||
| 1203 | }; | ||
| 1204 | result[@intFromEnum(Feature.FragmentShadingRateKHR)] = .{ | ||
| 1205 | .llvm_name = null, | ||
| 1206 | .description = "Enable SPIR-V capability FragmentShadingRateKHR", | ||
| 1207 | .dependencies = featureSet(&[_]Feature{ | ||
| 1208 | .Shader, | ||
| 1209 | }), | ||
| 1210 | }; | ||
| 1211 | result[@intFromEnum(Feature.SubgroupBallotKHR)] = .{ | ||
| 1212 | .llvm_name = null, | ||
| 1213 | .description = "Enable SPIR-V capability SubgroupBallotKHR", | ||
| 1214 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1215 | }; | ||
| 1216 | result[@intFromEnum(Feature.DrawParameters)] = .{ | ||
| 1217 | .llvm_name = null, | ||
| 1218 | .description = "Enable SPIR-V capability DrawParameters", | ||
| 1219 | .dependencies = featureSet(&[_]Feature{ | ||
| 1220 | .v1_3, | ||
| 1221 | .Shader, | ||
| 1222 | }), | ||
| 1223 | }; | ||
| 1224 | result[@intFromEnum(Feature.WorkgroupMemoryExplicitLayoutKHR)] = .{ | ||
| 1225 | .llvm_name = null, | ||
| 1226 | .description = "Enable SPIR-V capability WorkgroupMemoryExplicitLayoutKHR", | ||
| 1227 | .dependencies = featureSet(&[_]Feature{ | ||
| 1228 | .Shader, | ||
| 1229 | }), | ||
| 1230 | }; | ||
| 1231 | result[@intFromEnum(Feature.WorkgroupMemoryExplicitLayout8BitAccessKHR)] = .{ | ||
| 1232 | .llvm_name = null, | ||
| 1233 | .description = "Enable SPIR-V capability WorkgroupMemoryExplicitLayout8BitAccessKHR", | ||
| 1234 | .dependencies = featureSet(&[_]Feature{ | ||
| 1235 | .WorkgroupMemoryExplicitLayoutKHR, | ||
| 1236 | }), | ||
| 1237 | }; | ||
| 1238 | result[@intFromEnum(Feature.WorkgroupMemoryExplicitLayout16BitAccessKHR)] = .{ | ||
| 1239 | .llvm_name = null, | ||
| 1240 | .description = "Enable SPIR-V capability WorkgroupMemoryExplicitLayout16BitAccessKHR", | ||
| 1241 | .dependencies = featureSet(&[_]Feature{ | ||
| 1242 | .Shader, | ||
| 1243 | }), | ||
| 1244 | }; | ||
| 1245 | result[@intFromEnum(Feature.SubgroupVoteKHR)] = .{ | ||
| 1246 | .llvm_name = null, | ||
| 1247 | .description = "Enable SPIR-V capability SubgroupVoteKHR", | ||
| 1248 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1249 | }; | ||
| 1250 | result[@intFromEnum(Feature.StorageBuffer16BitAccess)] = .{ | ||
| 1251 | .llvm_name = null, | ||
| 1252 | .description = "Enable SPIR-V capability StorageBuffer16BitAccess", | ||
| 1253 | .dependencies = featureSet(&[_]Feature{ | ||
| 1254 | .v1_3, | ||
| 1255 | }), | ||
| 1256 | }; | ||
| 1257 | result[@intFromEnum(Feature.StorageUniformBufferBlock16)] = .{ | ||
| 1258 | .llvm_name = null, | ||
| 1259 | .description = "Enable SPIR-V capability StorageUniformBufferBlock16", | ||
| 1260 | .dependencies = featureSet(&[_]Feature{ | ||
| 1261 | .v1_3, | ||
| 1262 | }), | ||
| 1263 | }; | ||
| 1264 | result[@intFromEnum(Feature.UniformAndStorageBuffer16BitAccess)] = .{ | ||
| 1265 | .llvm_name = null, | ||
| 1266 | .description = "Enable SPIR-V capability UniformAndStorageBuffer16BitAccess", | ||
| 1267 | .dependencies = featureSet(&[_]Feature{ | ||
| 1268 | .v1_3, | ||
| 1269 | .StorageBuffer16BitAccess, | ||
| 1270 | .StorageUniformBufferBlock16, | ||
| 1271 | }), | ||
| 1272 | }; | ||
| 1273 | result[@intFromEnum(Feature.StorageUniform16)] = .{ | ||
| 1274 | .llvm_name = null, | ||
| 1275 | .description = "Enable SPIR-V capability StorageUniform16", | ||
| 1276 | .dependencies = featureSet(&[_]Feature{ | ||
| 1277 | .v1_3, | ||
| 1278 | .StorageBuffer16BitAccess, | ||
| 1279 | .StorageUniformBufferBlock16, | ||
| 1280 | }), | ||
| 1281 | }; | ||
| 1282 | result[@intFromEnum(Feature.StoragePushConstant16)] = .{ | ||
| 1283 | .llvm_name = null, | ||
| 1284 | .description = "Enable SPIR-V capability StoragePushConstant16", | ||
| 1285 | .dependencies = featureSet(&[_]Feature{ | ||
| 1286 | .v1_3, | ||
| 1287 | }), | ||
| 1288 | }; | ||
| 1289 | result[@intFromEnum(Feature.StorageInputOutput16)] = .{ | ||
| 1290 | .llvm_name = null, | ||
| 1291 | .description = "Enable SPIR-V capability StorageInputOutput16", | ||
| 1292 | .dependencies = featureSet(&[_]Feature{ | ||
| 1293 | .v1_3, | ||
| 1294 | }), | ||
| 1295 | }; | ||
| 1296 | result[@intFromEnum(Feature.DeviceGroup)] = .{ | ||
| 1297 | .llvm_name = null, | ||
| 1298 | .description = "Enable SPIR-V capability DeviceGroup", | ||
| 1299 | .dependencies = featureSet(&[_]Feature{ | ||
| 1300 | .v1_3, | ||
| 1301 | }), | ||
| 1302 | }; | ||
| 1303 | result[@intFromEnum(Feature.MultiView)] = .{ | ||
| 1304 | .llvm_name = null, | ||
| 1305 | .description = "Enable SPIR-V capability MultiView", | ||
| 1306 | .dependencies = featureSet(&[_]Feature{ | ||
| 1307 | .v1_3, | ||
| 1308 | .Shader, | ||
| 1309 | }), | ||
| 1310 | }; | ||
| 1311 | result[@intFromEnum(Feature.VariablePointersStorageBuffer)] = .{ | ||
| 1312 | .llvm_name = null, | ||
| 1313 | .description = "Enable SPIR-V capability VariablePointersStorageBuffer", | ||
| 1314 | .dependencies = featureSet(&[_]Feature{ | ||
| 1315 | .v1_3, | ||
| 1316 | .Shader, | ||
| 1317 | }), | ||
| 1318 | }; | ||
| 1319 | result[@intFromEnum(Feature.VariablePointers)] = .{ | ||
| 1320 | .llvm_name = null, | ||
| 1321 | .description = "Enable SPIR-V capability VariablePointers", | ||
| 1322 | .dependencies = featureSet(&[_]Feature{ | ||
| 1323 | .v1_3, | ||
| 1324 | .VariablePointersStorageBuffer, | ||
| 1325 | }), | ||
| 1326 | }; | ||
| 1327 | result[@intFromEnum(Feature.AtomicStorageOps)] = .{ | ||
| 1328 | .llvm_name = null, | ||
| 1329 | .description = "Enable SPIR-V capability AtomicStorageOps", | ||
| 1330 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1331 | }; | ||
| 1332 | result[@intFromEnum(Feature.SampleMaskPostDepthCoverage)] = .{ | ||
| 1333 | .llvm_name = null, | ||
| 1334 | .description = "Enable SPIR-V capability SampleMaskPostDepthCoverage", | ||
| 1335 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1336 | }; | ||
| 1337 | result[@intFromEnum(Feature.StorageBuffer8BitAccess)] = .{ | ||
| 1338 | .llvm_name = null, | ||
| 1339 | .description = "Enable SPIR-V capability StorageBuffer8BitAccess", | ||
| 1340 | .dependencies = featureSet(&[_]Feature{ | ||
| 1341 | .v1_5, | ||
| 1342 | }), | ||
| 1343 | }; | ||
| 1344 | result[@intFromEnum(Feature.UniformAndStorageBuffer8BitAccess)] = .{ | ||
| 1345 | .llvm_name = null, | ||
| 1346 | .description = "Enable SPIR-V capability UniformAndStorageBuffer8BitAccess", | ||
| 1347 | .dependencies = featureSet(&[_]Feature{ | ||
| 1348 | .v1_5, | ||
| 1349 | .StorageBuffer8BitAccess, | ||
| 1350 | }), | ||
| 1351 | }; | ||
| 1352 | result[@intFromEnum(Feature.StoragePushConstant8)] = .{ | ||
| 1353 | .llvm_name = null, | ||
| 1354 | .description = "Enable SPIR-V capability StoragePushConstant8", | ||
| 1355 | .dependencies = featureSet(&[_]Feature{ | ||
| 1356 | .v1_5, | ||
| 1357 | }), | ||
| 1358 | }; | ||
| 1359 | result[@intFromEnum(Feature.DenormPreserve)] = .{ | ||
| 1360 | .llvm_name = null, | ||
| 1361 | .description = "Enable SPIR-V capability DenormPreserve", | ||
| 1362 | .dependencies = featureSet(&[_]Feature{ | ||
| 1363 | .v1_4, | ||
| 1364 | }), | ||
| 1365 | }; | ||
| 1366 | result[@intFromEnum(Feature.DenormFlushToZero)] = .{ | ||
| 1367 | .llvm_name = null, | ||
| 1368 | .description = "Enable SPIR-V capability DenormFlushToZero", | ||
| 1369 | .dependencies = featureSet(&[_]Feature{ | ||
| 1370 | .v1_4, | ||
| 1371 | }), | ||
| 1372 | }; | ||
| 1373 | result[@intFromEnum(Feature.SignedZeroInfNanPreserve)] = .{ | ||
| 1374 | .llvm_name = null, | ||
| 1375 | .description = "Enable SPIR-V capability SignedZeroInfNanPreserve", | ||
| 1376 | .dependencies = featureSet(&[_]Feature{ | ||
| 1377 | .v1_4, | ||
| 1378 | }), | ||
| 1379 | }; | ||
| 1380 | result[@intFromEnum(Feature.RoundingModeRTE)] = .{ | ||
| 1381 | .llvm_name = null, | ||
| 1382 | .description = "Enable SPIR-V capability RoundingModeRTE", | ||
| 1383 | .dependencies = featureSet(&[_]Feature{ | ||
| 1384 | .v1_4, | ||
| 1385 | }), | ||
| 1386 | }; | ||
| 1387 | result[@intFromEnum(Feature.RoundingModeRTZ)] = .{ | ||
| 1388 | .llvm_name = null, | ||
| 1389 | .description = "Enable SPIR-V capability RoundingModeRTZ", | ||
| 1390 | .dependencies = featureSet(&[_]Feature{ | ||
| 1391 | .v1_4, | ||
| 1392 | }), | ||
| 1393 | }; | ||
| 1394 | result[@intFromEnum(Feature.RayQueryProvisionalKHR)] = .{ | ||
| 1395 | .llvm_name = null, | ||
| 1396 | .description = "Enable SPIR-V capability RayQueryProvisionalKHR", | ||
| 1397 | .dependencies = featureSet(&[_]Feature{ | ||
| 1398 | .Shader, | ||
| 1399 | }), | ||
| 1400 | }; | ||
| 1401 | result[@intFromEnum(Feature.RayQueryKHR)] = .{ | ||
| 1402 | .llvm_name = null, | ||
| 1403 | .description = "Enable SPIR-V capability RayQueryKHR", | ||
| 1404 | .dependencies = featureSet(&[_]Feature{ | ||
| 1405 | .Shader, | ||
| 1406 | }), | ||
| 1407 | }; | ||
| 1408 | result[@intFromEnum(Feature.RayTraversalPrimitiveCullingKHR)] = .{ | ||
| 1409 | .llvm_name = null, | ||
| 1410 | .description = "Enable SPIR-V capability RayTraversalPrimitiveCullingKHR", | ||
| 1411 | .dependencies = featureSet(&[_]Feature{ | ||
| 1412 | .RayQueryKHR, | ||
| 1413 | .RayTracingKHR, | ||
| 1414 | }), | ||
| 1415 | }; | ||
| 1416 | result[@intFromEnum(Feature.RayTracingKHR)] = .{ | ||
| 1417 | .llvm_name = null, | ||
| 1418 | .description = "Enable SPIR-V capability RayTracingKHR", | ||
| 1419 | .dependencies = featureSet(&[_]Feature{ | ||
| 1420 | .Shader, | ||
| 1421 | }), | ||
| 1422 | }; | ||
| 1423 | result[@intFromEnum(Feature.Float16ImageAMD)] = .{ | ||
| 1424 | .llvm_name = null, | ||
| 1425 | .description = "Enable SPIR-V capability Float16ImageAMD", | ||
| 1426 | .dependencies = featureSet(&[_]Feature{ | ||
| 1427 | .Shader, | ||
| 1428 | }), | ||
| 1429 | }; | ||
| 1430 | result[@intFromEnum(Feature.ImageGatherBiasLodAMD)] = .{ | ||
| 1431 | .llvm_name = null, | ||
| 1432 | .description = "Enable SPIR-V capability ImageGatherBiasLodAMD", | ||
| 1433 | .dependencies = featureSet(&[_]Feature{ | ||
| 1434 | .Shader, | ||
| 1435 | }), | ||
| 1436 | }; | ||
| 1437 | result[@intFromEnum(Feature.FragmentMaskAMD)] = .{ | ||
| 1438 | .llvm_name = null, | ||
| 1439 | .description = "Enable SPIR-V capability FragmentMaskAMD", | ||
| 1440 | .dependencies = featureSet(&[_]Feature{ | ||
| 1441 | .Shader, | ||
| 1442 | }), | ||
| 1443 | }; | ||
| 1444 | result[@intFromEnum(Feature.StencilExportEXT)] = .{ | ||
| 1445 | .llvm_name = null, | ||
| 1446 | .description = "Enable SPIR-V capability StencilExportEXT", | ||
| 1447 | .dependencies = featureSet(&[_]Feature{ | ||
| 1448 | .Shader, | ||
| 1449 | }), | ||
| 1450 | }; | ||
| 1451 | result[@intFromEnum(Feature.ImageReadWriteLodAMD)] = .{ | ||
| 1452 | .llvm_name = null, | ||
| 1453 | .description = "Enable SPIR-V capability ImageReadWriteLodAMD", | ||
| 1454 | .dependencies = featureSet(&[_]Feature{ | ||
| 1455 | .Shader, | ||
| 1456 | }), | ||
| 1457 | }; | ||
| 1458 | result[@intFromEnum(Feature.Int64ImageEXT)] = .{ | ||
| 1459 | .llvm_name = null, | ||
| 1460 | .description = "Enable SPIR-V capability Int64ImageEXT", | ||
| 1461 | .dependencies = featureSet(&[_]Feature{ | ||
| 1462 | .Shader, | ||
| 1463 | }), | ||
| 1464 | }; | ||
| 1465 | result[@intFromEnum(Feature.ShaderClockKHR)] = .{ | ||
| 1466 | .llvm_name = null, | ||
| 1467 | .description = "Enable SPIR-V capability ShaderClockKHR", | ||
| 1468 | .dependencies = featureSet(&[_]Feature{ | ||
| 1469 | .Shader, | ||
| 1470 | }), | ||
| 1471 | }; | ||
| 1472 | result[@intFromEnum(Feature.SampleMaskOverrideCoverageNV)] = .{ | ||
| 1473 | .llvm_name = null, | ||
| 1474 | .description = "Enable SPIR-V capability SampleMaskOverrideCoverageNV", | ||
| 1475 | .dependencies = featureSet(&[_]Feature{ | ||
| 1476 | .SampleRateShading, | ||
| 1477 | }), | ||
| 1478 | }; | ||
| 1479 | result[@intFromEnum(Feature.GeometryShaderPassthroughNV)] = .{ | ||
| 1480 | .llvm_name = null, | ||
| 1481 | .description = "Enable SPIR-V capability GeometryShaderPassthroughNV", | ||
| 1482 | .dependencies = featureSet(&[_]Feature{ | ||
| 1483 | .Geometry, | ||
| 1484 | }), | ||
| 1485 | }; | ||
| 1486 | result[@intFromEnum(Feature.ShaderViewportIndexLayerEXT)] = .{ | ||
| 1487 | .llvm_name = null, | ||
| 1488 | .description = "Enable SPIR-V capability ShaderViewportIndexLayerEXT", | ||
| 1489 | .dependencies = featureSet(&[_]Feature{ | ||
| 1490 | .MultiViewport, | ||
| 1491 | }), | ||
| 1492 | }; | ||
| 1493 | result[@intFromEnum(Feature.ShaderViewportIndexLayerNV)] = .{ | ||
| 1494 | .llvm_name = null, | ||
| 1495 | .description = "Enable SPIR-V capability ShaderViewportIndexLayerNV", | ||
| 1496 | .dependencies = featureSet(&[_]Feature{ | ||
| 1497 | .MultiViewport, | ||
| 1498 | }), | ||
| 1499 | }; | ||
| 1500 | result[@intFromEnum(Feature.ShaderViewportMaskNV)] = .{ | ||
| 1501 | .llvm_name = null, | ||
| 1502 | .description = "Enable SPIR-V capability ShaderViewportMaskNV", | ||
| 1503 | .dependencies = featureSet(&[_]Feature{ | ||
| 1504 | .ShaderViewportIndexLayerNV, | ||
| 1505 | }), | ||
| 1506 | }; | ||
| 1507 | result[@intFromEnum(Feature.ShaderStereoViewNV)] = .{ | ||
| 1508 | .llvm_name = null, | ||
| 1509 | .description = "Enable SPIR-V capability ShaderStereoViewNV", | ||
| 1510 | .dependencies = featureSet(&[_]Feature{ | ||
| 1511 | .ShaderViewportMaskNV, | ||
| 1512 | }), | ||
| 1513 | }; | ||
| 1514 | result[@intFromEnum(Feature.PerViewAttributesNV)] = .{ | ||
| 1515 | .llvm_name = null, | ||
| 1516 | .description = "Enable SPIR-V capability PerViewAttributesNV", | ||
| 1517 | .dependencies = featureSet(&[_]Feature{ | ||
| 1518 | .MultiView, | ||
| 1519 | }), | ||
| 1520 | }; | ||
| 1521 | result[@intFromEnum(Feature.FragmentFullyCoveredEXT)] = .{ | ||
| 1522 | .llvm_name = null, | ||
| 1523 | .description = "Enable SPIR-V capability FragmentFullyCoveredEXT", | ||
| 1524 | .dependencies = featureSet(&[_]Feature{ | ||
| 1525 | .Shader, | ||
| 1526 | }), | ||
| 1527 | }; | ||
| 1528 | result[@intFromEnum(Feature.MeshShadingNV)] = .{ | ||
| 1529 | .llvm_name = null, | ||
| 1530 | .description = "Enable SPIR-V capability MeshShadingNV", | ||
| 1531 | .dependencies = featureSet(&[_]Feature{ | ||
| 1532 | .Shader, | ||
| 1533 | }), | ||
| 1534 | }; | ||
| 1535 | result[@intFromEnum(Feature.ImageFootprintNV)] = .{ | ||
| 1536 | .llvm_name = null, | ||
| 1537 | .description = "Enable SPIR-V capability ImageFootprintNV", | ||
| 1538 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1539 | }; | ||
| 1540 | result[@intFromEnum(Feature.FragmentBarycentricNV)] = .{ | ||
| 1541 | .llvm_name = null, | ||
| 1542 | .description = "Enable SPIR-V capability FragmentBarycentricNV", | ||
| 1543 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1544 | }; | ||
| 1545 | result[@intFromEnum(Feature.ComputeDerivativeGroupQuadsNV)] = .{ | ||
| 1546 | .llvm_name = null, | ||
| 1547 | .description = "Enable SPIR-V capability ComputeDerivativeGroupQuadsNV", | ||
| 1548 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1549 | }; | ||
| 1550 | result[@intFromEnum(Feature.FragmentDensityEXT)] = .{ | ||
| 1551 | .llvm_name = null, | ||
| 1552 | .description = "Enable SPIR-V capability FragmentDensityEXT", | ||
| 1553 | .dependencies = featureSet(&[_]Feature{ | ||
| 1554 | .Shader, | ||
| 1555 | }), | ||
| 1556 | }; | ||
| 1557 | result[@intFromEnum(Feature.ShadingRateNV)] = .{ | ||
| 1558 | .llvm_name = null, | ||
| 1559 | .description = "Enable SPIR-V capability ShadingRateNV", | ||
| 1560 | .dependencies = featureSet(&[_]Feature{ | ||
| 1561 | .Shader, | ||
| 1562 | }), | ||
| 1563 | }; | ||
| 1564 | result[@intFromEnum(Feature.GroupNonUniformPartitionedNV)] = .{ | ||
| 1565 | .llvm_name = null, | ||
| 1566 | .description = "Enable SPIR-V capability GroupNonUniformPartitionedNV", | ||
| 1567 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1568 | }; | ||
| 1569 | result[@intFromEnum(Feature.ShaderNonUniform)] = .{ | ||
| 1570 | .llvm_name = null, | ||
| 1571 | .description = "Enable SPIR-V capability ShaderNonUniform", | ||
| 1572 | .dependencies = featureSet(&[_]Feature{ | ||
| 1573 | .v1_5, | ||
| 1574 | .Shader, | ||
| 1575 | }), | ||
| 1576 | }; | ||
| 1577 | result[@intFromEnum(Feature.ShaderNonUniformEXT)] = .{ | ||
| 1578 | .llvm_name = null, | ||
| 1579 | .description = "Enable SPIR-V capability ShaderNonUniformEXT", | ||
| 1580 | .dependencies = featureSet(&[_]Feature{ | ||
| 1581 | .v1_5, | ||
| 1582 | .Shader, | ||
| 1583 | }), | ||
| 1584 | }; | ||
| 1585 | result[@intFromEnum(Feature.RuntimeDescriptorArray)] = .{ | ||
| 1586 | .llvm_name = null, | ||
| 1587 | .description = "Enable SPIR-V capability RuntimeDescriptorArray", | ||
| 1588 | .dependencies = featureSet(&[_]Feature{ | ||
| 1589 | .v1_5, | ||
| 1590 | .Shader, | ||
| 1591 | }), | ||
| 1592 | }; | ||
| 1593 | result[@intFromEnum(Feature.RuntimeDescriptorArrayEXT)] = .{ | ||
| 1594 | .llvm_name = null, | ||
| 1595 | .description = "Enable SPIR-V capability RuntimeDescriptorArrayEXT", | ||
| 1596 | .dependencies = featureSet(&[_]Feature{ | ||
| 1597 | .v1_5, | ||
| 1598 | .Shader, | ||
| 1599 | }), | ||
| 1600 | }; | ||
| 1601 | result[@intFromEnum(Feature.InputAttachmentArrayDynamicIndexing)] = .{ | ||
| 1602 | .llvm_name = null, | ||
| 1603 | .description = "Enable SPIR-V capability InputAttachmentArrayDynamicIndexing", | ||
| 1604 | .dependencies = featureSet(&[_]Feature{ | ||
| 1605 | .v1_5, | ||
| 1606 | .InputAttachment, | ||
| 1607 | }), | ||
| 1608 | }; | ||
| 1609 | result[@intFromEnum(Feature.InputAttachmentArrayDynamicIndexingEXT)] = .{ | ||
| 1610 | .llvm_name = null, | ||
| 1611 | .description = "Enable SPIR-V capability InputAttachmentArrayDynamicIndexingEXT", | ||
| 1612 | .dependencies = featureSet(&[_]Feature{ | ||
| 1613 | .v1_5, | ||
| 1614 | .InputAttachment, | ||
| 1615 | }), | ||
| 1616 | }; | ||
| 1617 | result[@intFromEnum(Feature.UniformTexelBufferArrayDynamicIndexing)] = .{ | ||
| 1618 | .llvm_name = null, | ||
| 1619 | .description = "Enable SPIR-V capability UniformTexelBufferArrayDynamicIndexing", | ||
| 1620 | .dependencies = featureSet(&[_]Feature{ | ||
| 1621 | .v1_5, | ||
| 1622 | .SampledBuffer, | ||
| 1623 | }), | ||
| 1624 | }; | ||
| 1625 | result[@intFromEnum(Feature.UniformTexelBufferArrayDynamicIndexingEXT)] = .{ | ||
| 1626 | .llvm_name = null, | ||
| 1627 | .description = "Enable SPIR-V capability UniformTexelBufferArrayDynamicIndexingEXT", | ||
| 1628 | .dependencies = featureSet(&[_]Feature{ | ||
| 1629 | .v1_5, | ||
| 1630 | .SampledBuffer, | ||
| 1631 | }), | ||
| 1632 | }; | ||
| 1633 | result[@intFromEnum(Feature.StorageTexelBufferArrayDynamicIndexing)] = .{ | ||
| 1634 | .llvm_name = null, | ||
| 1635 | .description = "Enable SPIR-V capability StorageTexelBufferArrayDynamicIndexing", | ||
| 1636 | .dependencies = featureSet(&[_]Feature{ | ||
| 1637 | .v1_5, | ||
| 1638 | .ImageBuffer, | ||
| 1639 | }), | ||
| 1640 | }; | ||
| 1641 | result[@intFromEnum(Feature.StorageTexelBufferArrayDynamicIndexingEXT)] = .{ | ||
| 1642 | .llvm_name = null, | ||
| 1643 | .description = "Enable SPIR-V capability StorageTexelBufferArrayDynamicIndexingEXT", | ||
| 1644 | .dependencies = featureSet(&[_]Feature{ | ||
| 1645 | .v1_5, | ||
| 1646 | .ImageBuffer, | ||
| 1647 | }), | ||
| 1648 | }; | ||
| 1649 | result[@intFromEnum(Feature.UniformBufferArrayNonUniformIndexing)] = .{ | ||
| 1650 | .llvm_name = null, | ||
| 1651 | .description = "Enable SPIR-V capability UniformBufferArrayNonUniformIndexing", | ||
| 1652 | .dependencies = featureSet(&[_]Feature{ | ||
| 1653 | .v1_5, | ||
| 1654 | .ShaderNonUniform, | ||
| 1655 | }), | ||
| 1656 | }; | ||
| 1657 | result[@intFromEnum(Feature.UniformBufferArrayNonUniformIndexingEXT)] = .{ | ||
| 1658 | .llvm_name = null, | ||
| 1659 | .description = "Enable SPIR-V capability UniformBufferArrayNonUniformIndexingEXT", | ||
| 1660 | .dependencies = featureSet(&[_]Feature{ | ||
| 1661 | .v1_5, | ||
| 1662 | .ShaderNonUniform, | ||
| 1663 | }), | ||
| 1664 | }; | ||
| 1665 | result[@intFromEnum(Feature.SampledImageArrayNonUniformIndexing)] = .{ | ||
| 1666 | .llvm_name = null, | ||
| 1667 | .description = "Enable SPIR-V capability SampledImageArrayNonUniformIndexing", | ||
| 1668 | .dependencies = featureSet(&[_]Feature{ | ||
| 1669 | .v1_5, | ||
| 1670 | .ShaderNonUniform, | ||
| 1671 | }), | ||
| 1672 | }; | ||
| 1673 | result[@intFromEnum(Feature.SampledImageArrayNonUniformIndexingEXT)] = .{ | ||
| 1674 | .llvm_name = null, | ||
| 1675 | .description = "Enable SPIR-V capability SampledImageArrayNonUniformIndexingEXT", | ||
| 1676 | .dependencies = featureSet(&[_]Feature{ | ||
| 1677 | .v1_5, | ||
| 1678 | .ShaderNonUniform, | ||
| 1679 | }), | ||
| 1680 | }; | ||
| 1681 | result[@intFromEnum(Feature.StorageBufferArrayNonUniformIndexing)] = .{ | ||
| 1682 | .llvm_name = null, | ||
| 1683 | .description = "Enable SPIR-V capability StorageBufferArrayNonUniformIndexing", | ||
| 1684 | .dependencies = featureSet(&[_]Feature{ | ||
| 1685 | .v1_5, | ||
| 1686 | .ShaderNonUniform, | ||
| 1687 | }), | ||
| 1688 | }; | ||
| 1689 | result[@intFromEnum(Feature.StorageBufferArrayNonUniformIndexingEXT)] = .{ | ||
| 1690 | .llvm_name = null, | ||
| 1691 | .description = "Enable SPIR-V capability StorageBufferArrayNonUniformIndexingEXT", | ||
| 1692 | .dependencies = featureSet(&[_]Feature{ | ||
| 1693 | .v1_5, | ||
| 1694 | .ShaderNonUniform, | ||
| 1695 | }), | ||
| 1696 | }; | ||
| 1697 | result[@intFromEnum(Feature.StorageImageArrayNonUniformIndexing)] = .{ | ||
| 1698 | .llvm_name = null, | ||
| 1699 | .description = "Enable SPIR-V capability StorageImageArrayNonUniformIndexing", | ||
| 1700 | .dependencies = featureSet(&[_]Feature{ | ||
| 1701 | .v1_5, | ||
| 1702 | .ShaderNonUniform, | ||
| 1703 | }), | ||
| 1704 | }; | ||
| 1705 | result[@intFromEnum(Feature.StorageImageArrayNonUniformIndexingEXT)] = .{ | ||
| 1706 | .llvm_name = null, | ||
| 1707 | .description = "Enable SPIR-V capability StorageImageArrayNonUniformIndexingEXT", | ||
| 1708 | .dependencies = featureSet(&[_]Feature{ | ||
| 1709 | .v1_5, | ||
| 1710 | .ShaderNonUniform, | ||
| 1711 | }), | ||
| 1712 | }; | ||
| 1713 | result[@intFromEnum(Feature.InputAttachmentArrayNonUniformIndexing)] = .{ | ||
| 1714 | .llvm_name = null, | ||
| 1715 | .description = "Enable SPIR-V capability InputAttachmentArrayNonUniformIndexing", | ||
| 1716 | .dependencies = featureSet(&[_]Feature{ | ||
| 1717 | .v1_5, | ||
| 1718 | .InputAttachment, | ||
| 1719 | .ShaderNonUniform, | ||
| 1720 | }), | ||
| 1721 | }; | ||
| 1722 | result[@intFromEnum(Feature.InputAttachmentArrayNonUniformIndexingEXT)] = .{ | ||
| 1723 | .llvm_name = null, | ||
| 1724 | .description = "Enable SPIR-V capability InputAttachmentArrayNonUniformIndexingEXT", | ||
| 1725 | .dependencies = featureSet(&[_]Feature{ | ||
| 1726 | .v1_5, | ||
| 1727 | .InputAttachment, | ||
| 1728 | .ShaderNonUniform, | ||
| 1729 | }), | ||
| 1730 | }; | ||
| 1731 | result[@intFromEnum(Feature.UniformTexelBufferArrayNonUniformIndexing)] = .{ | ||
| 1732 | .llvm_name = null, | ||
| 1733 | .description = "Enable SPIR-V capability UniformTexelBufferArrayNonUniformIndexing", | ||
| 1734 | .dependencies = featureSet(&[_]Feature{ | ||
| 1735 | .v1_5, | ||
| 1736 | .SampledBuffer, | ||
| 1737 | .ShaderNonUniform, | ||
| 1738 | }), | ||
| 1739 | }; | ||
| 1740 | result[@intFromEnum(Feature.UniformTexelBufferArrayNonUniformIndexingEXT)] = .{ | ||
| 1741 | .llvm_name = null, | ||
| 1742 | .description = "Enable SPIR-V capability UniformTexelBufferArrayNonUniformIndexingEXT", | ||
| 1743 | .dependencies = featureSet(&[_]Feature{ | ||
| 1744 | .v1_5, | ||
| 1745 | .SampledBuffer, | ||
| 1746 | .ShaderNonUniform, | ||
| 1747 | }), | ||
| 1748 | }; | ||
| 1749 | result[@intFromEnum(Feature.StorageTexelBufferArrayNonUniformIndexing)] = .{ | ||
| 1750 | .llvm_name = null, | ||
| 1751 | .description = "Enable SPIR-V capability StorageTexelBufferArrayNonUniformIndexing", | ||
| 1752 | .dependencies = featureSet(&[_]Feature{ | ||
| 1753 | .v1_5, | ||
| 1754 | .ImageBuffer, | ||
| 1755 | .ShaderNonUniform, | ||
| 1756 | }), | ||
| 1757 | }; | ||
| 1758 | result[@intFromEnum(Feature.StorageTexelBufferArrayNonUniformIndexingEXT)] = .{ | ||
| 1759 | .llvm_name = null, | ||
| 1760 | .description = "Enable SPIR-V capability StorageTexelBufferArrayNonUniformIndexingEXT", | ||
| 1761 | .dependencies = featureSet(&[_]Feature{ | ||
| 1762 | .v1_5, | ||
| 1763 | .ImageBuffer, | ||
| 1764 | .ShaderNonUniform, | ||
| 1765 | }), | ||
| 1766 | }; | ||
| 1767 | result[@intFromEnum(Feature.RayTracingNV)] = .{ | ||
| 1768 | .llvm_name = null, | ||
| 1769 | .description = "Enable SPIR-V capability RayTracingNV", | ||
| 1770 | .dependencies = featureSet(&[_]Feature{ | ||
| 1771 | .Shader, | ||
| 1772 | }), | ||
| 1773 | }; | ||
| 1774 | result[@intFromEnum(Feature.VulkanMemoryModel)] = .{ | ||
| 1775 | .llvm_name = null, | ||
| 1776 | .description = "Enable SPIR-V capability VulkanMemoryModel", | ||
| 1777 | .dependencies = featureSet(&[_]Feature{ | ||
| 1778 | .v1_5, | ||
| 1779 | }), | ||
| 1780 | }; | ||
| 1781 | result[@intFromEnum(Feature.VulkanMemoryModelKHR)] = .{ | ||
| 1782 | .llvm_name = null, | ||
| 1783 | .description = "Enable SPIR-V capability VulkanMemoryModelKHR", | ||
| 1784 | .dependencies = featureSet(&[_]Feature{ | ||
| 1785 | .v1_5, | ||
| 1786 | }), | ||
| 1787 | }; | ||
| 1788 | result[@intFromEnum(Feature.VulkanMemoryModelDeviceScope)] = .{ | ||
| 1789 | .llvm_name = null, | ||
| 1790 | .description = "Enable SPIR-V capability VulkanMemoryModelDeviceScope", | ||
| 1791 | .dependencies = featureSet(&[_]Feature{ | ||
| 1792 | .v1_5, | ||
| 1793 | }), | ||
| 1794 | }; | ||
| 1795 | result[@intFromEnum(Feature.VulkanMemoryModelDeviceScopeKHR)] = .{ | ||
| 1796 | .llvm_name = null, | ||
| 1797 | .description = "Enable SPIR-V capability VulkanMemoryModelDeviceScopeKHR", | ||
| 1798 | .dependencies = featureSet(&[_]Feature{ | ||
| 1799 | .v1_5, | ||
| 1800 | }), | ||
| 1801 | }; | ||
| 1802 | result[@intFromEnum(Feature.PhysicalStorageBufferAddresses)] = .{ | ||
| 1803 | .llvm_name = null, | ||
| 1804 | .description = "Enable SPIR-V capability PhysicalStorageBufferAddresses", | ||
| 1805 | .dependencies = featureSet(&[_]Feature{ | ||
| 1806 | .v1_5, | ||
| 1807 | .Shader, | ||
| 1808 | }), | ||
| 1809 | }; | ||
| 1810 | result[@intFromEnum(Feature.PhysicalStorageBufferAddressesEXT)] = .{ | ||
| 1811 | .llvm_name = null, | ||
| 1812 | .description = "Enable SPIR-V capability PhysicalStorageBufferAddressesEXT", | ||
| 1813 | .dependencies = featureSet(&[_]Feature{ | ||
| 1814 | .v1_5, | ||
| 1815 | .Shader, | ||
| 1816 | }), | ||
| 1817 | }; | ||
| 1818 | result[@intFromEnum(Feature.ComputeDerivativeGroupLinearNV)] = .{ | ||
| 1819 | .llvm_name = null, | ||
| 1820 | .description = "Enable SPIR-V capability ComputeDerivativeGroupLinearNV", | ||
| 1821 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1822 | }; | ||
| 1823 | result[@intFromEnum(Feature.RayTracingProvisionalKHR)] = .{ | ||
| 1824 | .llvm_name = null, | ||
| 1825 | .description = "Enable SPIR-V capability RayTracingProvisionalKHR", | ||
| 1826 | .dependencies = featureSet(&[_]Feature{ | ||
| 1827 | .Shader, | ||
| 1828 | }), | ||
| 1829 | }; | ||
| 1830 | result[@intFromEnum(Feature.CooperativeMatrixNV)] = .{ | ||
| 1831 | .llvm_name = null, | ||
| 1832 | .description = "Enable SPIR-V capability CooperativeMatrixNV", | ||
| 1833 | .dependencies = featureSet(&[_]Feature{ | ||
| 1834 | .Shader, | ||
| 1835 | }), | ||
| 1836 | }; | ||
| 1837 | result[@intFromEnum(Feature.FragmentShaderSampleInterlockEXT)] = .{ | ||
| 1838 | .llvm_name = null, | ||
| 1839 | .description = "Enable SPIR-V capability FragmentShaderSampleInterlockEXT", | ||
| 1840 | .dependencies = featureSet(&[_]Feature{ | ||
| 1841 | .Shader, | ||
| 1842 | }), | ||
| 1843 | }; | ||
| 1844 | result[@intFromEnum(Feature.FragmentShaderShadingRateInterlockEXT)] = .{ | ||
| 1845 | .llvm_name = null, | ||
| 1846 | .description = "Enable SPIR-V capability FragmentShaderShadingRateInterlockEXT", | ||
| 1847 | .dependencies = featureSet(&[_]Feature{ | ||
| 1848 | .Shader, | ||
| 1849 | }), | ||
| 1850 | }; | ||
| 1851 | result[@intFromEnum(Feature.ShaderSMBuiltinsNV)] = .{ | ||
| 1852 | .llvm_name = null, | ||
| 1853 | .description = "Enable SPIR-V capability ShaderSMBuiltinsNV", | ||
| 1854 | .dependencies = featureSet(&[_]Feature{ | ||
| 1855 | .Shader, | ||
| 1856 | }), | ||
| 1857 | }; | ||
| 1858 | result[@intFromEnum(Feature.FragmentShaderPixelInterlockEXT)] = .{ | ||
| 1859 | .llvm_name = null, | ||
| 1860 | .description = "Enable SPIR-V capability FragmentShaderPixelInterlockEXT", | ||
| 1861 | .dependencies = featureSet(&[_]Feature{ | ||
| 1862 | .Shader, | ||
| 1863 | }), | ||
| 1864 | }; | ||
| 1865 | result[@intFromEnum(Feature.DemoteToHelperInvocationEXT)] = .{ | ||
| 1866 | .llvm_name = null, | ||
| 1867 | .description = "Enable SPIR-V capability DemoteToHelperInvocationEXT", | ||
| 1868 | .dependencies = featureSet(&[_]Feature{ | ||
| 1869 | .Shader, | ||
| 1870 | }), | ||
| 1871 | }; | ||
| 1872 | result[@intFromEnum(Feature.SubgroupShuffleINTEL)] = .{ | ||
| 1873 | .llvm_name = null, | ||
| 1874 | .description = "Enable SPIR-V capability SubgroupShuffleINTEL", | ||
| 1875 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1876 | }; | ||
| 1877 | result[@intFromEnum(Feature.SubgroupBufferBlockIOINTEL)] = .{ | ||
| 1878 | .llvm_name = null, | ||
| 1879 | .description = "Enable SPIR-V capability SubgroupBufferBlockIOINTEL", | ||
| 1880 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1881 | }; | ||
| 1882 | result[@intFromEnum(Feature.SubgroupImageBlockIOINTEL)] = .{ | ||
| 1883 | .llvm_name = null, | ||
| 1884 | .description = "Enable SPIR-V capability SubgroupImageBlockIOINTEL", | ||
| 1885 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1886 | }; | ||
| 1887 | result[@intFromEnum(Feature.SubgroupImageMediaBlockIOINTEL)] = .{ | ||
| 1888 | .llvm_name = null, | ||
| 1889 | .description = "Enable SPIR-V capability SubgroupImageMediaBlockIOINTEL", | ||
| 1890 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1891 | }; | ||
| 1892 | result[@intFromEnum(Feature.RoundToInfinityINTEL)] = .{ | ||
| 1893 | .llvm_name = null, | ||
| 1894 | .description = "Enable SPIR-V capability RoundToInfinityINTEL", | ||
| 1895 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1896 | }; | ||
| 1897 | result[@intFromEnum(Feature.FloatingPointModeINTEL)] = .{ | ||
| 1898 | .llvm_name = null, | ||
| 1899 | .description = "Enable SPIR-V capability FloatingPointModeINTEL", | ||
| 1900 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1901 | }; | ||
| 1902 | result[@intFromEnum(Feature.IntegerFunctions2INTEL)] = .{ | ||
| 1903 | .llvm_name = null, | ||
| 1904 | .description = "Enable SPIR-V capability IntegerFunctions2INTEL", | ||
| 1905 | .dependencies = featureSet(&[_]Feature{ | ||
| 1906 | .Shader, | ||
| 1907 | }), | ||
| 1908 | }; | ||
| 1909 | result[@intFromEnum(Feature.FunctionPointersINTEL)] = .{ | ||
| 1910 | .llvm_name = null, | ||
| 1911 | .description = "Enable SPIR-V capability FunctionPointersINTEL", | ||
| 1912 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1913 | }; | ||
| 1914 | result[@intFromEnum(Feature.IndirectReferencesINTEL)] = .{ | ||
| 1915 | .llvm_name = null, | ||
| 1916 | .description = "Enable SPIR-V capability IndirectReferencesINTEL", | ||
| 1917 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1918 | }; | ||
| 1919 | result[@intFromEnum(Feature.AsmINTEL)] = .{ | ||
| 1920 | .llvm_name = null, | ||
| 1921 | .description = "Enable SPIR-V capability AsmINTEL", | ||
| 1922 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1923 | }; | ||
| 1924 | result[@intFromEnum(Feature.AtomicFloat32MinMaxEXT)] = .{ | ||
| 1925 | .llvm_name = null, | ||
| 1926 | .description = "Enable SPIR-V capability AtomicFloat32MinMaxEXT", | ||
| 1927 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1928 | }; | ||
| 1929 | result[@intFromEnum(Feature.AtomicFloat64MinMaxEXT)] = .{ | ||
| 1930 | .llvm_name = null, | ||
| 1931 | .description = "Enable SPIR-V capability AtomicFloat64MinMaxEXT", | ||
| 1932 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1933 | }; | ||
| 1934 | result[@intFromEnum(Feature.AtomicFloat16MinMaxEXT)] = .{ | ||
| 1935 | .llvm_name = null, | ||
| 1936 | .description = "Enable SPIR-V capability AtomicFloat16MinMaxEXT", | ||
| 1937 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1938 | }; | ||
| 1939 | result[@intFromEnum(Feature.VectorComputeINTEL)] = .{ | ||
| 1940 | .llvm_name = null, | ||
| 1941 | .description = "Enable SPIR-V capability VectorComputeINTEL", | ||
| 1942 | .dependencies = featureSet(&[_]Feature{ | ||
| 1943 | .VectorAnyINTEL, | ||
| 1944 | }), | ||
| 1945 | }; | ||
| 1946 | result[@intFromEnum(Feature.VectorAnyINTEL)] = .{ | ||
| 1947 | .llvm_name = null, | ||
| 1948 | .description = "Enable SPIR-V capability VectorAnyINTEL", | ||
| 1949 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1950 | }; | ||
| 1951 | result[@intFromEnum(Feature.ExpectAssumeKHR)] = .{ | ||
| 1952 | .llvm_name = null, | ||
| 1953 | .description = "Enable SPIR-V capability ExpectAssumeKHR", | ||
| 1954 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1955 | }; | ||
| 1956 | result[@intFromEnum(Feature.SubgroupAvcMotionEstimationINTEL)] = .{ | ||
| 1957 | .llvm_name = null, | ||
| 1958 | .description = "Enable SPIR-V capability SubgroupAvcMotionEstimationINTEL", | ||
| 1959 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1960 | }; | ||
| 1961 | result[@intFromEnum(Feature.SubgroupAvcMotionEstimationIntraINTEL)] = .{ | ||
| 1962 | .llvm_name = null, | ||
| 1963 | .description = "Enable SPIR-V capability SubgroupAvcMotionEstimationIntraINTEL", | ||
| 1964 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1965 | }; | ||
| 1966 | result[@intFromEnum(Feature.SubgroupAvcMotionEstimationChromaINTEL)] = .{ | ||
| 1967 | .llvm_name = null, | ||
| 1968 | .description = "Enable SPIR-V capability SubgroupAvcMotionEstimationChromaINTEL", | ||
| 1969 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1970 | }; | ||
| 1971 | result[@intFromEnum(Feature.VariableLengthArrayINTEL)] = .{ | ||
| 1972 | .llvm_name = null, | ||
| 1973 | .description = "Enable SPIR-V capability VariableLengthArrayINTEL", | ||
| 1974 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1975 | }; | ||
| 1976 | result[@intFromEnum(Feature.FunctionFloatControlINTEL)] = .{ | ||
| 1977 | .llvm_name = null, | ||
| 1978 | .description = "Enable SPIR-V capability FunctionFloatControlINTEL", | ||
| 1979 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1980 | }; | ||
| 1981 | result[@intFromEnum(Feature.FPGAMemoryAttributesINTEL)] = .{ | ||
| 1982 | .llvm_name = null, | ||
| 1983 | .description = "Enable SPIR-V capability FPGAMemoryAttributesINTEL", | ||
| 1984 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1985 | }; | ||
| 1986 | result[@intFromEnum(Feature.FPFastMathModeINTEL)] = .{ | ||
| 1987 | .llvm_name = null, | ||
| 1988 | .description = "Enable SPIR-V capability FPFastMathModeINTEL", | ||
| 1989 | .dependencies = featureSet(&[_]Feature{ | ||
| 1990 | .Kernel, | ||
| 1991 | }), | ||
| 1992 | }; | ||
| 1993 | result[@intFromEnum(Feature.ArbitraryPrecisionIntegersINTEL)] = .{ | ||
| 1994 | .llvm_name = null, | ||
| 1995 | .description = "Enable SPIR-V capability ArbitraryPrecisionIntegersINTEL", | ||
| 1996 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1997 | }; | ||
| 1998 | result[@intFromEnum(Feature.UnstructuredLoopControlsINTEL)] = .{ | ||
| 1999 | .llvm_name = null, | ||
| 2000 | .description = "Enable SPIR-V capability UnstructuredLoopControlsINTEL", | ||
| 2001 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2002 | }; | ||
| 2003 | result[@intFromEnum(Feature.FPGALoopControlsINTEL)] = .{ | ||
| 2004 | .llvm_name = null, | ||
| 2005 | .description = "Enable SPIR-V capability FPGALoopControlsINTEL", | ||
| 2006 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2007 | }; | ||
| 2008 | result[@intFromEnum(Feature.KernelAttributesINTEL)] = .{ | ||
| 2009 | .llvm_name = null, | ||
| 2010 | .description = "Enable SPIR-V capability KernelAttributesINTEL", | ||
| 2011 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2012 | }; | ||
| 2013 | result[@intFromEnum(Feature.FPGAKernelAttributesINTEL)] = .{ | ||
| 2014 | .llvm_name = null, | ||
| 2015 | .description = "Enable SPIR-V capability FPGAKernelAttributesINTEL", | ||
| 2016 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2017 | }; | ||
| 2018 | result[@intFromEnum(Feature.FPGAMemoryAccessesINTEL)] = .{ | ||
| 2019 | .llvm_name = null, | ||
| 2020 | .description = "Enable SPIR-V capability FPGAMemoryAccessesINTEL", | ||
| 2021 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2022 | }; | ||
| 2023 | result[@intFromEnum(Feature.FPGAClusterAttributesINTEL)] = .{ | ||
| 2024 | .llvm_name = null, | ||
| 2025 | .description = "Enable SPIR-V capability FPGAClusterAttributesINTEL", | ||
| 2026 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2027 | }; | ||
| 2028 | result[@intFromEnum(Feature.LoopFuseINTEL)] = .{ | ||
| 2029 | .llvm_name = null, | ||
| 2030 | .description = "Enable SPIR-V capability LoopFuseINTEL", | ||
| 2031 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2032 | }; | ||
| 2033 | result[@intFromEnum(Feature.FPGABufferLocationINTEL)] = .{ | ||
| 2034 | .llvm_name = null, | ||
| 2035 | .description = "Enable SPIR-V capability FPGABufferLocationINTEL", | ||
| 2036 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2037 | }; | ||
| 2038 | result[@intFromEnum(Feature.USMStorageClassesINTEL)] = .{ | ||
| 2039 | .llvm_name = null, | ||
| 2040 | .description = "Enable SPIR-V capability USMStorageClassesINTEL", | ||
| 2041 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2042 | }; | ||
| 2043 | result[@intFromEnum(Feature.IOPipesINTEL)] = .{ | ||
| 2044 | .llvm_name = null, | ||
| 2045 | .description = "Enable SPIR-V capability IOPipesINTEL", | ||
| 2046 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2047 | }; | ||
| 2048 | result[@intFromEnum(Feature.BlockingPipesINTEL)] = .{ | ||
| 2049 | .llvm_name = null, | ||
| 2050 | .description = "Enable SPIR-V capability BlockingPipesINTEL", | ||
| 2051 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2052 | }; | ||
| 2053 | result[@intFromEnum(Feature.FPGARegINTEL)] = .{ | ||
| 2054 | .llvm_name = null, | ||
| 2055 | .description = "Enable SPIR-V capability FPGARegINTEL", | ||
| 2056 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2057 | }; | ||
| 2058 | result[@intFromEnum(Feature.AtomicFloat32AddEXT)] = .{ | ||
| 2059 | .llvm_name = null, | ||
| 2060 | .description = "Enable SPIR-V capability AtomicFloat32AddEXT", | ||
| 2061 | .dependencies = featureSet(&[_]Feature{ | ||
| 2062 | .Shader, | ||
| 2063 | }), | ||
| 2064 | }; | ||
| 2065 | result[@intFromEnum(Feature.AtomicFloat64AddEXT)] = .{ | ||
| 2066 | .llvm_name = null, | ||
| 2067 | .description = "Enable SPIR-V capability AtomicFloat64AddEXT", | ||
| 2068 | .dependencies = featureSet(&[_]Feature{ | ||
| 2069 | .Shader, | ||
| 2070 | }), | ||
| 2071 | }; | ||
| 2072 | result[@intFromEnum(Feature.LongConstantCompositeINTEL)] = .{ | ||
| 2073 | .llvm_name = null, | ||
| 2074 | .description = "Enable SPIR-V capability LongConstantCompositeINTEL", | ||
| 2075 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2076 | }; | ||
| 2077 | const ti = @typeInfo(Feature); | ||
| 2078 | for (&result, 0..) |*elem, i| { | ||
| 2079 | elem.index = i; | ||
| 2080 | elem.name = ti.Enum.fields[i].name; | ||
| 2081 | } | ||
| 2082 | break :blk result; | ||
| 2083 | }; | ||
| 2084 | |||
| 2085 | pub const cpu = struct { | ||
| 2086 | pub const generic = CpuModel{ | ||
| 2087 | .name = "generic", | ||
| 2088 | .llvm_name = "generic", | ||
| 2089 | .features = featureSet(&[_]Feature{}), | ||
| 2090 | }; | ||
| 2091 | }; | ||
lib/std/Target/ve.zig created+39
| ... | @@ -0,0 +1,39 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | vpu, | ||
| 9 | }; | ||
| 10 | |||
| 11 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 12 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 13 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 14 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 15 | |||
| 16 | pub const all_features = blk: { | ||
| 17 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 18 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 19 | var result: [len]CpuFeature = undefined; | ||
| 20 | result[@intFromEnum(Feature.vpu)] = .{ | ||
| 21 | .llvm_name = "vpu", | ||
| 22 | .description = "Enable the VPU", | ||
| 23 | .dependencies = featureSet(&[_]Feature{}), | ||
| 24 | }; | ||
| 25 | const ti = @typeInfo(Feature); | ||
| 26 | for (&result, 0..) |*elem, i| { | ||
| 27 | elem.index = i; | ||
| 28 | elem.name = ti.Enum.fields[i].name; | ||
| 29 | } | ||
| 30 | break :blk result; | ||
| 31 | }; | ||
| 32 | |||
| 33 | pub const cpu = struct { | ||
| 34 | pub const generic = CpuModel{ | ||
| 35 | .name = "generic", | ||
| 36 | .llvm_name = "generic", | ||
| 37 | .features = featureSet(&[_]Feature{}), | ||
| 38 | }; | ||
| 39 | }; | ||
lib/std/Target/wasm.zig created+126
| ... | @@ -0,0 +1,126 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | atomics, | ||
| 9 | bulk_memory, | ||
| 10 | exception_handling, | ||
| 11 | extended_const, | ||
| 12 | multivalue, | ||
| 13 | mutable_globals, | ||
| 14 | nontrapping_fptoint, | ||
| 15 | reference_types, | ||
| 16 | relaxed_simd, | ||
| 17 | sign_ext, | ||
| 18 | simd128, | ||
| 19 | tail_call, | ||
| 20 | }; | ||
| 21 | |||
| 22 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 23 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 24 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 25 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 26 | |||
| 27 | pub const all_features = blk: { | ||
| 28 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 29 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 30 | var result: [len]CpuFeature = undefined; | ||
| 31 | result[@intFromEnum(Feature.atomics)] = .{ | ||
| 32 | .llvm_name = "atomics", | ||
| 33 | .description = "Enable Atomics", | ||
| 34 | .dependencies = featureSet(&[_]Feature{}), | ||
| 35 | }; | ||
| 36 | result[@intFromEnum(Feature.bulk_memory)] = .{ | ||
| 37 | .llvm_name = "bulk-memory", | ||
| 38 | .description = "Enable bulk memory operations", | ||
| 39 | .dependencies = featureSet(&[_]Feature{}), | ||
| 40 | }; | ||
| 41 | result[@intFromEnum(Feature.exception_handling)] = .{ | ||
| 42 | .llvm_name = "exception-handling", | ||
| 43 | .description = "Enable Wasm exception handling", | ||
| 44 | .dependencies = featureSet(&[_]Feature{}), | ||
| 45 | }; | ||
| 46 | result[@intFromEnum(Feature.extended_const)] = .{ | ||
| 47 | .llvm_name = "extended-const", | ||
| 48 | .description = "Enable extended const expressions", | ||
| 49 | .dependencies = featureSet(&[_]Feature{}), | ||
| 50 | }; | ||
| 51 | result[@intFromEnum(Feature.multivalue)] = .{ | ||
| 52 | .llvm_name = "multivalue", | ||
| 53 | .description = "Enable multivalue blocks, instructions, and functions", | ||
| 54 | .dependencies = featureSet(&[_]Feature{}), | ||
| 55 | }; | ||
| 56 | result[@intFromEnum(Feature.mutable_globals)] = .{ | ||
| 57 | .llvm_name = "mutable-globals", | ||
| 58 | .description = "Enable mutable globals", | ||
| 59 | .dependencies = featureSet(&[_]Feature{}), | ||
| 60 | }; | ||
| 61 | result[@intFromEnum(Feature.nontrapping_fptoint)] = .{ | ||
| 62 | .llvm_name = "nontrapping-fptoint", | ||
| 63 | .description = "Enable non-trapping float-to-int conversion operators", | ||
| 64 | .dependencies = featureSet(&[_]Feature{}), | ||
| 65 | }; | ||
| 66 | result[@intFromEnum(Feature.reference_types)] = .{ | ||
| 67 | .llvm_name = "reference-types", | ||
| 68 | .description = "Enable reference types", | ||
| 69 | .dependencies = featureSet(&[_]Feature{}), | ||
| 70 | }; | ||
| 71 | result[@intFromEnum(Feature.relaxed_simd)] = .{ | ||
| 72 | .llvm_name = "relaxed-simd", | ||
| 73 | .description = "Enable relaxed-simd instructions", | ||
| 74 | .dependencies = featureSet(&[_]Feature{}), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.sign_ext)] = .{ | ||
| 77 | .llvm_name = "sign-ext", | ||
| 78 | .description = "Enable sign extension operators", | ||
| 79 | .dependencies = featureSet(&[_]Feature{}), | ||
| 80 | }; | ||
| 81 | result[@intFromEnum(Feature.simd128)] = .{ | ||
| 82 | .llvm_name = "simd128", | ||
| 83 | .description = "Enable 128-bit SIMD", | ||
| 84 | .dependencies = featureSet(&[_]Feature{}), | ||
| 85 | }; | ||
| 86 | result[@intFromEnum(Feature.tail_call)] = .{ | ||
| 87 | .llvm_name = "tail-call", | ||
| 88 | .description = "Enable tail call instructions", | ||
| 89 | .dependencies = featureSet(&[_]Feature{}), | ||
| 90 | }; | ||
| 91 | const ti = @typeInfo(Feature); | ||
| 92 | for (&result, 0..) |*elem, i| { | ||
| 93 | elem.index = i; | ||
| 94 | elem.name = ti.Enum.fields[i].name; | ||
| 95 | } | ||
| 96 | break :blk result; | ||
| 97 | }; | ||
| 98 | |||
| 99 | pub const cpu = struct { | ||
| 100 | pub const bleeding_edge = CpuModel{ | ||
| 101 | .name = "bleeding_edge", | ||
| 102 | .llvm_name = "bleeding-edge", | ||
| 103 | .features = featureSet(&[_]Feature{ | ||
| 104 | .atomics, | ||
| 105 | .bulk_memory, | ||
| 106 | .mutable_globals, | ||
| 107 | .nontrapping_fptoint, | ||
| 108 | .sign_ext, | ||
| 109 | .simd128, | ||
| 110 | .tail_call, | ||
| 111 | }), | ||
| 112 | }; | ||
| 113 | pub const generic = CpuModel{ | ||
| 114 | .name = "generic", | ||
| 115 | .llvm_name = "generic", | ||
| 116 | .features = featureSet(&[_]Feature{ | ||
| 117 | .mutable_globals, | ||
| 118 | .sign_ext, | ||
| 119 | }), | ||
| 120 | }; | ||
| 121 | pub const mvp = CpuModel{ | ||
| 122 | .name = "mvp", | ||
| 123 | .llvm_name = "mvp", | ||
| 124 | .features = featureSet(&[_]Feature{}), | ||
| 125 | }; | ||
| 126 | }; | ||
lib/std/Target/x86.zig created+4179
| ... | @@ -0,0 +1,4179 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"16bit_mode", | ||
| 9 | @"32bit_mode", | ||
| 10 | @"3dnow", | ||
| 11 | @"3dnowa", | ||
| 12 | @"64bit", | ||
| 13 | adx, | ||
| 14 | aes, | ||
| 15 | allow_light_256_bit, | ||
| 16 | amx_bf16, | ||
| 17 | amx_complex, | ||
| 18 | amx_fp16, | ||
| 19 | amx_int8, | ||
| 20 | amx_tile, | ||
| 21 | avx, | ||
| 22 | avx2, | ||
| 23 | avx512bf16, | ||
| 24 | avx512bitalg, | ||
| 25 | avx512bw, | ||
| 26 | avx512cd, | ||
| 27 | avx512dq, | ||
| 28 | avx512er, | ||
| 29 | avx512f, | ||
| 30 | avx512fp16, | ||
| 31 | avx512ifma, | ||
| 32 | avx512pf, | ||
| 33 | avx512vbmi, | ||
| 34 | avx512vbmi2, | ||
| 35 | avx512vl, | ||
| 36 | avx512vnni, | ||
| 37 | avx512vp2intersect, | ||
| 38 | avx512vpopcntdq, | ||
| 39 | avxifma, | ||
| 40 | avxneconvert, | ||
| 41 | avxvnni, | ||
| 42 | avxvnniint16, | ||
| 43 | avxvnniint8, | ||
| 44 | bmi, | ||
| 45 | bmi2, | ||
| 46 | branchfusion, | ||
| 47 | cldemote, | ||
| 48 | clflushopt, | ||
| 49 | clwb, | ||
| 50 | clzero, | ||
| 51 | cmov, | ||
| 52 | cmpccxadd, | ||
| 53 | crc32, | ||
| 54 | cx16, | ||
| 55 | cx8, | ||
| 56 | enqcmd, | ||
| 57 | ermsb, | ||
| 58 | f16c, | ||
| 59 | false_deps_getmant, | ||
| 60 | false_deps_lzcnt_tzcnt, | ||
| 61 | false_deps_mulc, | ||
| 62 | false_deps_mullq, | ||
| 63 | false_deps_perm, | ||
| 64 | false_deps_popcnt, | ||
| 65 | false_deps_range, | ||
| 66 | fast_11bytenop, | ||
| 67 | fast_15bytenop, | ||
| 68 | fast_7bytenop, | ||
| 69 | fast_bextr, | ||
| 70 | fast_gather, | ||
| 71 | fast_hops, | ||
| 72 | fast_lzcnt, | ||
| 73 | fast_movbe, | ||
| 74 | fast_scalar_fsqrt, | ||
| 75 | fast_scalar_shift_masks, | ||
| 76 | fast_shld_rotate, | ||
| 77 | fast_variable_crosslane_shuffle, | ||
| 78 | fast_variable_perlane_shuffle, | ||
| 79 | fast_vector_fsqrt, | ||
| 80 | fast_vector_shift_masks, | ||
| 81 | faster_shift_than_shuffle, | ||
| 82 | fma, | ||
| 83 | fma4, | ||
| 84 | fsgsbase, | ||
| 85 | fsrm, | ||
| 86 | fxsr, | ||
| 87 | gfni, | ||
| 88 | harden_sls_ijmp, | ||
| 89 | harden_sls_ret, | ||
| 90 | hreset, | ||
| 91 | idivl_to_divb, | ||
| 92 | idivq_to_divl, | ||
| 93 | invpcid, | ||
| 94 | kl, | ||
| 95 | lea_sp, | ||
| 96 | lea_uses_ag, | ||
| 97 | lvi_cfi, | ||
| 98 | lvi_load_hardening, | ||
| 99 | lwp, | ||
| 100 | lzcnt, | ||
| 101 | macrofusion, | ||
| 102 | mmx, | ||
| 103 | movbe, | ||
| 104 | movdir64b, | ||
| 105 | movdiri, | ||
| 106 | mwaitx, | ||
| 107 | no_bypass_delay, | ||
| 108 | no_bypass_delay_blend, | ||
| 109 | no_bypass_delay_mov, | ||
| 110 | no_bypass_delay_shuffle, | ||
| 111 | nopl, | ||
| 112 | pad_short_functions, | ||
| 113 | pclmul, | ||
| 114 | pconfig, | ||
| 115 | pku, | ||
| 116 | popcnt, | ||
| 117 | prefer_128_bit, | ||
| 118 | prefer_256_bit, | ||
| 119 | prefer_mask_registers, | ||
| 120 | prefer_movmsk_over_vtest, | ||
| 121 | prefetchi, | ||
| 122 | prefetchwt1, | ||
| 123 | prfchw, | ||
| 124 | ptwrite, | ||
| 125 | raoint, | ||
| 126 | rdpid, | ||
| 127 | rdpru, | ||
| 128 | rdrnd, | ||
| 129 | rdseed, | ||
| 130 | retpoline, | ||
| 131 | retpoline_external_thunk, | ||
| 132 | retpoline_indirect_branches, | ||
| 133 | retpoline_indirect_calls, | ||
| 134 | rtm, | ||
| 135 | sahf, | ||
| 136 | sbb_dep_breaking, | ||
| 137 | serialize, | ||
| 138 | seses, | ||
| 139 | sgx, | ||
| 140 | sha, | ||
| 141 | sha512, | ||
| 142 | shstk, | ||
| 143 | slow_3ops_lea, | ||
| 144 | slow_incdec, | ||
| 145 | slow_lea, | ||
| 146 | slow_pmaddwd, | ||
| 147 | slow_pmulld, | ||
| 148 | slow_shld, | ||
| 149 | slow_two_mem_ops, | ||
| 150 | slow_unaligned_mem_16, | ||
| 151 | slow_unaligned_mem_32, | ||
| 152 | sm3, | ||
| 153 | sm4, | ||
| 154 | soft_float, | ||
| 155 | sse, | ||
| 156 | sse2, | ||
| 157 | sse3, | ||
| 158 | sse4_1, | ||
| 159 | sse4_2, | ||
| 160 | sse4a, | ||
| 161 | sse_unaligned_mem, | ||
| 162 | ssse3, | ||
| 163 | tagged_globals, | ||
| 164 | tbm, | ||
| 165 | tsxldtrk, | ||
| 166 | tuning_fast_imm_vector_shift, | ||
| 167 | uintr, | ||
| 168 | use_glm_div_sqrt_costs, | ||
| 169 | use_slm_arith_costs, | ||
| 170 | vaes, | ||
| 171 | vpclmulqdq, | ||
| 172 | vzeroupper, | ||
| 173 | waitpkg, | ||
| 174 | wbnoinvd, | ||
| 175 | widekl, | ||
| 176 | x87, | ||
| 177 | xop, | ||
| 178 | xsave, | ||
| 179 | xsavec, | ||
| 180 | xsaveopt, | ||
| 181 | xsaves, | ||
| 182 | }; | ||
| 183 | |||
| 184 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 185 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 186 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 187 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 188 | |||
| 189 | pub const all_features = blk: { | ||
| 190 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 191 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 192 | var result: [len]CpuFeature = undefined; | ||
| 193 | result[@intFromEnum(Feature.@"16bit_mode")] = .{ | ||
| 194 | .llvm_name = "16bit-mode", | ||
| 195 | .description = "16-bit mode (i8086)", | ||
| 196 | .dependencies = featureSet(&[_]Feature{}), | ||
| 197 | }; | ||
| 198 | result[@intFromEnum(Feature.@"32bit_mode")] = .{ | ||
| 199 | .llvm_name = "32bit-mode", | ||
| 200 | .description = "32-bit mode (80386)", | ||
| 201 | .dependencies = featureSet(&[_]Feature{}), | ||
| 202 | }; | ||
| 203 | result[@intFromEnum(Feature.@"3dnow")] = .{ | ||
| 204 | .llvm_name = "3dnow", | ||
| 205 | .description = "Enable 3DNow! instructions", | ||
| 206 | .dependencies = featureSet(&[_]Feature{ | ||
| 207 | .mmx, | ||
| 208 | }), | ||
| 209 | }; | ||
| 210 | result[@intFromEnum(Feature.@"3dnowa")] = .{ | ||
| 211 | .llvm_name = "3dnowa", | ||
| 212 | .description = "Enable 3DNow! Athlon instructions", | ||
| 213 | .dependencies = featureSet(&[_]Feature{ | ||
| 214 | .@"3dnow", | ||
| 215 | }), | ||
| 216 | }; | ||
| 217 | result[@intFromEnum(Feature.@"64bit")] = .{ | ||
| 218 | .llvm_name = "64bit", | ||
| 219 | .description = "Support 64-bit instructions", | ||
| 220 | .dependencies = featureSet(&[_]Feature{}), | ||
| 221 | }; | ||
| 222 | result[@intFromEnum(Feature.adx)] = .{ | ||
| 223 | .llvm_name = "adx", | ||
| 224 | .description = "Support ADX instructions", | ||
| 225 | .dependencies = featureSet(&[_]Feature{}), | ||
| 226 | }; | ||
| 227 | result[@intFromEnum(Feature.aes)] = .{ | ||
| 228 | .llvm_name = "aes", | ||
| 229 | .description = "Enable AES instructions", | ||
| 230 | .dependencies = featureSet(&[_]Feature{ | ||
| 231 | .sse2, | ||
| 232 | }), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.allow_light_256_bit)] = .{ | ||
| 235 | .llvm_name = "allow-light-256-bit", | ||
| 236 | .description = "Enable generation of 256-bit load/stores even if we prefer 128-bit", | ||
| 237 | .dependencies = featureSet(&[_]Feature{}), | ||
| 238 | }; | ||
| 239 | result[@intFromEnum(Feature.amx_bf16)] = .{ | ||
| 240 | .llvm_name = "amx-bf16", | ||
| 241 | .description = "Support AMX-BF16 instructions", | ||
| 242 | .dependencies = featureSet(&[_]Feature{ | ||
| 243 | .amx_tile, | ||
| 244 | }), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.amx_complex)] = .{ | ||
| 247 | .llvm_name = "amx-complex", | ||
| 248 | .description = "Support AMX-COMPLEX instructions", | ||
| 249 | .dependencies = featureSet(&[_]Feature{ | ||
| 250 | .amx_tile, | ||
| 251 | }), | ||
| 252 | }; | ||
| 253 | result[@intFromEnum(Feature.amx_fp16)] = .{ | ||
| 254 | .llvm_name = "amx-fp16", | ||
| 255 | .description = "Support AMX amx-fp16 instructions", | ||
| 256 | .dependencies = featureSet(&[_]Feature{ | ||
| 257 | .amx_tile, | ||
| 258 | }), | ||
| 259 | }; | ||
| 260 | result[@intFromEnum(Feature.amx_int8)] = .{ | ||
| 261 | .llvm_name = "amx-int8", | ||
| 262 | .description = "Support AMX-INT8 instructions", | ||
| 263 | .dependencies = featureSet(&[_]Feature{ | ||
| 264 | .amx_tile, | ||
| 265 | }), | ||
| 266 | }; | ||
| 267 | result[@intFromEnum(Feature.amx_tile)] = .{ | ||
| 268 | .llvm_name = "amx-tile", | ||
| 269 | .description = "Support AMX-TILE instructions", | ||
| 270 | .dependencies = featureSet(&[_]Feature{}), | ||
| 271 | }; | ||
| 272 | result[@intFromEnum(Feature.avx)] = .{ | ||
| 273 | .llvm_name = "avx", | ||
| 274 | .description = "Enable AVX instructions", | ||
| 275 | .dependencies = featureSet(&[_]Feature{ | ||
| 276 | .sse4_2, | ||
| 277 | }), | ||
| 278 | }; | ||
| 279 | result[@intFromEnum(Feature.avx2)] = .{ | ||
| 280 | .llvm_name = "avx2", | ||
| 281 | .description = "Enable AVX2 instructions", | ||
| 282 | .dependencies = featureSet(&[_]Feature{ | ||
| 283 | .avx, | ||
| 284 | }), | ||
| 285 | }; | ||
| 286 | result[@intFromEnum(Feature.avx512bf16)] = .{ | ||
| 287 | .llvm_name = "avx512bf16", | ||
| 288 | .description = "Support bfloat16 floating point", | ||
| 289 | .dependencies = featureSet(&[_]Feature{ | ||
| 290 | .avx512bw, | ||
| 291 | }), | ||
| 292 | }; | ||
| 293 | result[@intFromEnum(Feature.avx512bitalg)] = .{ | ||
| 294 | .llvm_name = "avx512bitalg", | ||
| 295 | .description = "Enable AVX-512 Bit Algorithms", | ||
| 296 | .dependencies = featureSet(&[_]Feature{ | ||
| 297 | .avx512bw, | ||
| 298 | }), | ||
| 299 | }; | ||
| 300 | result[@intFromEnum(Feature.avx512bw)] = .{ | ||
| 301 | .llvm_name = "avx512bw", | ||
| 302 | .description = "Enable AVX-512 Byte and Word Instructions", | ||
| 303 | .dependencies = featureSet(&[_]Feature{ | ||
| 304 | .avx512f, | ||
| 305 | }), | ||
| 306 | }; | ||
| 307 | result[@intFromEnum(Feature.avx512cd)] = .{ | ||
| 308 | .llvm_name = "avx512cd", | ||
| 309 | .description = "Enable AVX-512 Conflict Detection Instructions", | ||
| 310 | .dependencies = featureSet(&[_]Feature{ | ||
| 311 | .avx512f, | ||
| 312 | }), | ||
| 313 | }; | ||
| 314 | result[@intFromEnum(Feature.avx512dq)] = .{ | ||
| 315 | .llvm_name = "avx512dq", | ||
| 316 | .description = "Enable AVX-512 Doubleword and Quadword Instructions", | ||
| 317 | .dependencies = featureSet(&[_]Feature{ | ||
| 318 | .avx512f, | ||
| 319 | }), | ||
| 320 | }; | ||
| 321 | result[@intFromEnum(Feature.avx512er)] = .{ | ||
| 322 | .llvm_name = "avx512er", | ||
| 323 | .description = "Enable AVX-512 Exponential and Reciprocal Instructions", | ||
| 324 | .dependencies = featureSet(&[_]Feature{ | ||
| 325 | .avx512f, | ||
| 326 | }), | ||
| 327 | }; | ||
| 328 | result[@intFromEnum(Feature.avx512f)] = .{ | ||
| 329 | .llvm_name = "avx512f", | ||
| 330 | .description = "Enable AVX-512 instructions", | ||
| 331 | .dependencies = featureSet(&[_]Feature{ | ||
| 332 | .avx2, | ||
| 333 | .f16c, | ||
| 334 | .fma, | ||
| 335 | }), | ||
| 336 | }; | ||
| 337 | result[@intFromEnum(Feature.avx512fp16)] = .{ | ||
| 338 | .llvm_name = "avx512fp16", | ||
| 339 | .description = "Support 16-bit floating point", | ||
| 340 | .dependencies = featureSet(&[_]Feature{ | ||
| 341 | .avx512bw, | ||
| 342 | .avx512dq, | ||
| 343 | .avx512vl, | ||
| 344 | }), | ||
| 345 | }; | ||
| 346 | result[@intFromEnum(Feature.avx512ifma)] = .{ | ||
| 347 | .llvm_name = "avx512ifma", | ||
| 348 | .description = "Enable AVX-512 Integer Fused Multiple-Add", | ||
| 349 | .dependencies = featureSet(&[_]Feature{ | ||
| 350 | .avx512f, | ||
| 351 | }), | ||
| 352 | }; | ||
| 353 | result[@intFromEnum(Feature.avx512pf)] = .{ | ||
| 354 | .llvm_name = "avx512pf", | ||
| 355 | .description = "Enable AVX-512 PreFetch Instructions", | ||
| 356 | .dependencies = featureSet(&[_]Feature{ | ||
| 357 | .avx512f, | ||
| 358 | }), | ||
| 359 | }; | ||
| 360 | result[@intFromEnum(Feature.avx512vbmi)] = .{ | ||
| 361 | .llvm_name = "avx512vbmi", | ||
| 362 | .description = "Enable AVX-512 Vector Byte Manipulation Instructions", | ||
| 363 | .dependencies = featureSet(&[_]Feature{ | ||
| 364 | .avx512bw, | ||
| 365 | }), | ||
| 366 | }; | ||
| 367 | result[@intFromEnum(Feature.avx512vbmi2)] = .{ | ||
| 368 | .llvm_name = "avx512vbmi2", | ||
| 369 | .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", | ||
| 370 | .dependencies = featureSet(&[_]Feature{ | ||
| 371 | .avx512bw, | ||
| 372 | }), | ||
| 373 | }; | ||
| 374 | result[@intFromEnum(Feature.avx512vl)] = .{ | ||
| 375 | .llvm_name = "avx512vl", | ||
| 376 | .description = "Enable AVX-512 Vector Length eXtensions", | ||
| 377 | .dependencies = featureSet(&[_]Feature{ | ||
| 378 | .avx512f, | ||
| 379 | }), | ||
| 380 | }; | ||
| 381 | result[@intFromEnum(Feature.avx512vnni)] = .{ | ||
| 382 | .llvm_name = "avx512vnni", | ||
| 383 | .description = "Enable AVX-512 Vector Neural Network Instructions", | ||
| 384 | .dependencies = featureSet(&[_]Feature{ | ||
| 385 | .avx512f, | ||
| 386 | }), | ||
| 387 | }; | ||
| 388 | result[@intFromEnum(Feature.avx512vp2intersect)] = .{ | ||
| 389 | .llvm_name = "avx512vp2intersect", | ||
| 390 | .description = "Enable AVX-512 vp2intersect", | ||
| 391 | .dependencies = featureSet(&[_]Feature{ | ||
| 392 | .avx512f, | ||
| 393 | }), | ||
| 394 | }; | ||
| 395 | result[@intFromEnum(Feature.avx512vpopcntdq)] = .{ | ||
| 396 | .llvm_name = "avx512vpopcntdq", | ||
| 397 | .description = "Enable AVX-512 Population Count Instructions", | ||
| 398 | .dependencies = featureSet(&[_]Feature{ | ||
| 399 | .avx512f, | ||
| 400 | }), | ||
| 401 | }; | ||
| 402 | result[@intFromEnum(Feature.avxifma)] = .{ | ||
| 403 | .llvm_name = "avxifma", | ||
| 404 | .description = "Enable AVX-IFMA", | ||
| 405 | .dependencies = featureSet(&[_]Feature{ | ||
| 406 | .avx2, | ||
| 407 | }), | ||
| 408 | }; | ||
| 409 | result[@intFromEnum(Feature.avxneconvert)] = .{ | ||
| 410 | .llvm_name = "avxneconvert", | ||
| 411 | .description = "Support AVX-NE-CONVERT instructions", | ||
| 412 | .dependencies = featureSet(&[_]Feature{ | ||
| 413 | .avx2, | ||
| 414 | }), | ||
| 415 | }; | ||
| 416 | result[@intFromEnum(Feature.avxvnni)] = .{ | ||
| 417 | .llvm_name = "avxvnni", | ||
| 418 | .description = "Support AVX_VNNI encoding", | ||
| 419 | .dependencies = featureSet(&[_]Feature{ | ||
| 420 | .avx2, | ||
| 421 | }), | ||
| 422 | }; | ||
| 423 | result[@intFromEnum(Feature.avxvnniint16)] = .{ | ||
| 424 | .llvm_name = "avxvnniint16", | ||
| 425 | .description = "Enable AVX-VNNI-INT16", | ||
| 426 | .dependencies = featureSet(&[_]Feature{ | ||
| 427 | .avx2, | ||
| 428 | }), | ||
| 429 | }; | ||
| 430 | result[@intFromEnum(Feature.avxvnniint8)] = .{ | ||
| 431 | .llvm_name = "avxvnniint8", | ||
| 432 | .description = "Enable AVX-VNNI-INT8", | ||
| 433 | .dependencies = featureSet(&[_]Feature{ | ||
| 434 | .avx2, | ||
| 435 | }), | ||
| 436 | }; | ||
| 437 | result[@intFromEnum(Feature.bmi)] = .{ | ||
| 438 | .llvm_name = "bmi", | ||
| 439 | .description = "Support BMI instructions", | ||
| 440 | .dependencies = featureSet(&[_]Feature{}), | ||
| 441 | }; | ||
| 442 | result[@intFromEnum(Feature.bmi2)] = .{ | ||
| 443 | .llvm_name = "bmi2", | ||
| 444 | .description = "Support BMI2 instructions", | ||
| 445 | .dependencies = featureSet(&[_]Feature{}), | ||
| 446 | }; | ||
| 447 | result[@intFromEnum(Feature.branchfusion)] = .{ | ||
| 448 | .llvm_name = "branchfusion", | ||
| 449 | .description = "CMP/TEST can be fused with conditional branches", | ||
| 450 | .dependencies = featureSet(&[_]Feature{}), | ||
| 451 | }; | ||
| 452 | result[@intFromEnum(Feature.cldemote)] = .{ | ||
| 453 | .llvm_name = "cldemote", | ||
| 454 | .description = "Enable Cache Line Demote", | ||
| 455 | .dependencies = featureSet(&[_]Feature{}), | ||
| 456 | }; | ||
| 457 | result[@intFromEnum(Feature.clflushopt)] = .{ | ||
| 458 | .llvm_name = "clflushopt", | ||
| 459 | .description = "Flush A Cache Line Optimized", | ||
| 460 | .dependencies = featureSet(&[_]Feature{}), | ||
| 461 | }; | ||
| 462 | result[@intFromEnum(Feature.clwb)] = .{ | ||
| 463 | .llvm_name = "clwb", | ||
| 464 | .description = "Cache Line Write Back", | ||
| 465 | .dependencies = featureSet(&[_]Feature{}), | ||
| 466 | }; | ||
| 467 | result[@intFromEnum(Feature.clzero)] = .{ | ||
| 468 | .llvm_name = "clzero", | ||
| 469 | .description = "Enable Cache Line Zero", | ||
| 470 | .dependencies = featureSet(&[_]Feature{}), | ||
| 471 | }; | ||
| 472 | result[@intFromEnum(Feature.cmov)] = .{ | ||
| 473 | .llvm_name = "cmov", | ||
| 474 | .description = "Enable conditional move instructions", | ||
| 475 | .dependencies = featureSet(&[_]Feature{}), | ||
| 476 | }; | ||
| 477 | result[@intFromEnum(Feature.cmpccxadd)] = .{ | ||
| 478 | .llvm_name = "cmpccxadd", | ||
| 479 | .description = "Support CMPCCXADD instructions", | ||
| 480 | .dependencies = featureSet(&[_]Feature{}), | ||
| 481 | }; | ||
| 482 | result[@intFromEnum(Feature.crc32)] = .{ | ||
| 483 | .llvm_name = "crc32", | ||
| 484 | .description = "Enable SSE 4.2 CRC32 instruction (used when SSE4.2 is supported but function is GPR only)", | ||
| 485 | .dependencies = featureSet(&[_]Feature{}), | ||
| 486 | }; | ||
| 487 | result[@intFromEnum(Feature.cx16)] = .{ | ||
| 488 | .llvm_name = "cx16", | ||
| 489 | .description = "64-bit with cmpxchg16b (this is true for most x86-64 chips, but not the first AMD chips)", | ||
| 490 | .dependencies = featureSet(&[_]Feature{ | ||
| 491 | .cx8, | ||
| 492 | }), | ||
| 493 | }; | ||
| 494 | result[@intFromEnum(Feature.cx8)] = .{ | ||
| 495 | .llvm_name = "cx8", | ||
| 496 | .description = "Support CMPXCHG8B instructions", | ||
| 497 | .dependencies = featureSet(&[_]Feature{}), | ||
| 498 | }; | ||
| 499 | result[@intFromEnum(Feature.enqcmd)] = .{ | ||
| 500 | .llvm_name = "enqcmd", | ||
| 501 | .description = "Has ENQCMD instructions", | ||
| 502 | .dependencies = featureSet(&[_]Feature{}), | ||
| 503 | }; | ||
| 504 | result[@intFromEnum(Feature.ermsb)] = .{ | ||
| 505 | .llvm_name = "ermsb", | ||
| 506 | .description = "REP MOVS/STOS are fast", | ||
| 507 | .dependencies = featureSet(&[_]Feature{}), | ||
| 508 | }; | ||
| 509 | result[@intFromEnum(Feature.f16c)] = .{ | ||
| 510 | .llvm_name = "f16c", | ||
| 511 | .description = "Support 16-bit floating point conversion instructions", | ||
| 512 | .dependencies = featureSet(&[_]Feature{ | ||
| 513 | .avx, | ||
| 514 | }), | ||
| 515 | }; | ||
| 516 | result[@intFromEnum(Feature.false_deps_getmant)] = .{ | ||
| 517 | .llvm_name = "false-deps-getmant", | ||
| 518 | .description = "VGETMANTSS/SD/SH and VGETMANDPS/PD(memory version) has a false dependency on dest register", | ||
| 519 | .dependencies = featureSet(&[_]Feature{}), | ||
| 520 | }; | ||
| 521 | result[@intFromEnum(Feature.false_deps_lzcnt_tzcnt)] = .{ | ||
| 522 | .llvm_name = "false-deps-lzcnt-tzcnt", | ||
| 523 | .description = "LZCNT/TZCNT have a false dependency on dest register", | ||
| 524 | .dependencies = featureSet(&[_]Feature{}), | ||
| 525 | }; | ||
| 526 | result[@intFromEnum(Feature.false_deps_mulc)] = .{ | ||
| 527 | .llvm_name = "false-deps-mulc", | ||
| 528 | .description = "VF[C]MULCPH/SH has a false dependency on dest register", | ||
| 529 | .dependencies = featureSet(&[_]Feature{}), | ||
| 530 | }; | ||
| 531 | result[@intFromEnum(Feature.false_deps_mullq)] = .{ | ||
| 532 | .llvm_name = "false-deps-mullq", | ||
| 533 | .description = "VPMULLQ has a false dependency on dest register", | ||
| 534 | .dependencies = featureSet(&[_]Feature{}), | ||
| 535 | }; | ||
| 536 | result[@intFromEnum(Feature.false_deps_perm)] = .{ | ||
| 537 | .llvm_name = "false-deps-perm", | ||
| 538 | .description = "VPERMD/Q/PS/PD has a false dependency on dest register", | ||
| 539 | .dependencies = featureSet(&[_]Feature{}), | ||
| 540 | }; | ||
| 541 | result[@intFromEnum(Feature.false_deps_popcnt)] = .{ | ||
| 542 | .llvm_name = "false-deps-popcnt", | ||
| 543 | .description = "POPCNT has a false dependency on dest register", | ||
| 544 | .dependencies = featureSet(&[_]Feature{}), | ||
| 545 | }; | ||
| 546 | result[@intFromEnum(Feature.false_deps_range)] = .{ | ||
| 547 | .llvm_name = "false-deps-range", | ||
| 548 | .description = "VRANGEPD/PS/SD/SS has a false dependency on dest register", | ||
| 549 | .dependencies = featureSet(&[_]Feature{}), | ||
| 550 | }; | ||
| 551 | result[@intFromEnum(Feature.fast_11bytenop)] = .{ | ||
| 552 | .llvm_name = "fast-11bytenop", | ||
| 553 | .description = "Target can quickly decode up to 11 byte NOPs", | ||
| 554 | .dependencies = featureSet(&[_]Feature{}), | ||
| 555 | }; | ||
| 556 | result[@intFromEnum(Feature.fast_15bytenop)] = .{ | ||
| 557 | .llvm_name = "fast-15bytenop", | ||
| 558 | .description = "Target can quickly decode up to 15 byte NOPs", | ||
| 559 | .dependencies = featureSet(&[_]Feature{}), | ||
| 560 | }; | ||
| 561 | result[@intFromEnum(Feature.fast_7bytenop)] = .{ | ||
| 562 | .llvm_name = "fast-7bytenop", | ||
| 563 | .description = "Target can quickly decode up to 7 byte NOPs", | ||
| 564 | .dependencies = featureSet(&[_]Feature{}), | ||
| 565 | }; | ||
| 566 | result[@intFromEnum(Feature.fast_bextr)] = .{ | ||
| 567 | .llvm_name = "fast-bextr", | ||
| 568 | .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", | ||
| 569 | .dependencies = featureSet(&[_]Feature{}), | ||
| 570 | }; | ||
| 571 | result[@intFromEnum(Feature.fast_gather)] = .{ | ||
| 572 | .llvm_name = "fast-gather", | ||
| 573 | .description = "Indicates if gather is reasonably fast (this is true for Skylake client and all AVX-512 CPUs)", | ||
| 574 | .dependencies = featureSet(&[_]Feature{}), | ||
| 575 | }; | ||
| 576 | result[@intFromEnum(Feature.fast_hops)] = .{ | ||
| 577 | .llvm_name = "fast-hops", | ||
| 578 | .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", | ||
| 579 | .dependencies = featureSet(&[_]Feature{}), | ||
| 580 | }; | ||
| 581 | result[@intFromEnum(Feature.fast_lzcnt)] = .{ | ||
| 582 | .llvm_name = "fast-lzcnt", | ||
| 583 | .description = "LZCNT instructions are as fast as most simple integer ops", | ||
| 584 | .dependencies = featureSet(&[_]Feature{}), | ||
| 585 | }; | ||
| 586 | result[@intFromEnum(Feature.fast_movbe)] = .{ | ||
| 587 | .llvm_name = "fast-movbe", | ||
| 588 | .description = "Prefer a movbe over a single-use load + bswap / single-use bswap + store", | ||
| 589 | .dependencies = featureSet(&[_]Feature{}), | ||
| 590 | }; | ||
| 591 | result[@intFromEnum(Feature.fast_scalar_fsqrt)] = .{ | ||
| 592 | .llvm_name = "fast-scalar-fsqrt", | ||
| 593 | .description = "Scalar SQRT is fast (disable Newton-Raphson)", | ||
| 594 | .dependencies = featureSet(&[_]Feature{}), | ||
| 595 | }; | ||
| 596 | result[@intFromEnum(Feature.fast_scalar_shift_masks)] = .{ | ||
| 597 | .llvm_name = "fast-scalar-shift-masks", | ||
| 598 | .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", | ||
| 599 | .dependencies = featureSet(&[_]Feature{}), | ||
| 600 | }; | ||
| 601 | result[@intFromEnum(Feature.fast_shld_rotate)] = .{ | ||
| 602 | .llvm_name = "fast-shld-rotate", | ||
| 603 | .description = "SHLD can be used as a faster rotate", | ||
| 604 | .dependencies = featureSet(&[_]Feature{}), | ||
| 605 | }; | ||
| 606 | result[@intFromEnum(Feature.fast_variable_crosslane_shuffle)] = .{ | ||
| 607 | .llvm_name = "fast-variable-crosslane-shuffle", | ||
| 608 | .description = "Cross-lane shuffles with variable masks are fast", | ||
| 609 | .dependencies = featureSet(&[_]Feature{}), | ||
| 610 | }; | ||
| 611 | result[@intFromEnum(Feature.fast_variable_perlane_shuffle)] = .{ | ||
| 612 | .llvm_name = "fast-variable-perlane-shuffle", | ||
| 613 | .description = "Per-lane shuffles with variable masks are fast", | ||
| 614 | .dependencies = featureSet(&[_]Feature{}), | ||
| 615 | }; | ||
| 616 | result[@intFromEnum(Feature.fast_vector_fsqrt)] = .{ | ||
| 617 | .llvm_name = "fast-vector-fsqrt", | ||
| 618 | .description = "Vector SQRT is fast (disable Newton-Raphson)", | ||
| 619 | .dependencies = featureSet(&[_]Feature{}), | ||
| 620 | }; | ||
| 621 | result[@intFromEnum(Feature.fast_vector_shift_masks)] = .{ | ||
| 622 | .llvm_name = "fast-vector-shift-masks", | ||
| 623 | .description = "Prefer a left/right vector logical shift pair over a shift+and pair", | ||
| 624 | .dependencies = featureSet(&[_]Feature{}), | ||
| 625 | }; | ||
| 626 | result[@intFromEnum(Feature.faster_shift_than_shuffle)] = .{ | ||
| 627 | .llvm_name = "faster-shift-than-shuffle", | ||
| 628 | .description = "Shifts are faster (or as fast) as shuffle", | ||
| 629 | .dependencies = featureSet(&[_]Feature{}), | ||
| 630 | }; | ||
| 631 | result[@intFromEnum(Feature.fma)] = .{ | ||
| 632 | .llvm_name = "fma", | ||
| 633 | .description = "Enable three-operand fused multiple-add", | ||
| 634 | .dependencies = featureSet(&[_]Feature{ | ||
| 635 | .avx, | ||
| 636 | }), | ||
| 637 | }; | ||
| 638 | result[@intFromEnum(Feature.fma4)] = .{ | ||
| 639 | .llvm_name = "fma4", | ||
| 640 | .description = "Enable four-operand fused multiple-add", | ||
| 641 | .dependencies = featureSet(&[_]Feature{ | ||
| 642 | .avx, | ||
| 643 | .sse4a, | ||
| 644 | }), | ||
| 645 | }; | ||
| 646 | result[@intFromEnum(Feature.fsgsbase)] = .{ | ||
| 647 | .llvm_name = "fsgsbase", | ||
| 648 | .description = "Support FS/GS Base instructions", | ||
| 649 | .dependencies = featureSet(&[_]Feature{}), | ||
| 650 | }; | ||
| 651 | result[@intFromEnum(Feature.fsrm)] = .{ | ||
| 652 | .llvm_name = "fsrm", | ||
| 653 | .description = "REP MOVSB of short lengths is faster", | ||
| 654 | .dependencies = featureSet(&[_]Feature{}), | ||
| 655 | }; | ||
| 656 | result[@intFromEnum(Feature.fxsr)] = .{ | ||
| 657 | .llvm_name = "fxsr", | ||
| 658 | .description = "Support fxsave/fxrestore instructions", | ||
| 659 | .dependencies = featureSet(&[_]Feature{}), | ||
| 660 | }; | ||
| 661 | result[@intFromEnum(Feature.gfni)] = .{ | ||
| 662 | .llvm_name = "gfni", | ||
| 663 | .description = "Enable Galois Field Arithmetic Instructions", | ||
| 664 | .dependencies = featureSet(&[_]Feature{ | ||
| 665 | .sse2, | ||
| 666 | }), | ||
| 667 | }; | ||
| 668 | result[@intFromEnum(Feature.harden_sls_ijmp)] = .{ | ||
| 669 | .llvm_name = "harden-sls-ijmp", | ||
| 670 | .description = "Harden against straight line speculation across indirect JMP instructions.", | ||
| 671 | .dependencies = featureSet(&[_]Feature{}), | ||
| 672 | }; | ||
| 673 | result[@intFromEnum(Feature.harden_sls_ret)] = .{ | ||
| 674 | .llvm_name = "harden-sls-ret", | ||
| 675 | .description = "Harden against straight line speculation across RET instructions.", | ||
| 676 | .dependencies = featureSet(&[_]Feature{}), | ||
| 677 | }; | ||
| 678 | result[@intFromEnum(Feature.hreset)] = .{ | ||
| 679 | .llvm_name = "hreset", | ||
| 680 | .description = "Has hreset instruction", | ||
| 681 | .dependencies = featureSet(&[_]Feature{}), | ||
| 682 | }; | ||
| 683 | result[@intFromEnum(Feature.idivl_to_divb)] = .{ | ||
| 684 | .llvm_name = "idivl-to-divb", | ||
| 685 | .description = "Use 8-bit divide for positive values less than 256", | ||
| 686 | .dependencies = featureSet(&[_]Feature{}), | ||
| 687 | }; | ||
| 688 | result[@intFromEnum(Feature.idivq_to_divl)] = .{ | ||
| 689 | .llvm_name = "idivq-to-divl", | ||
| 690 | .description = "Use 32-bit divide for positive values less than 2^32", | ||
| 691 | .dependencies = featureSet(&[_]Feature{}), | ||
| 692 | }; | ||
| 693 | result[@intFromEnum(Feature.invpcid)] = .{ | ||
| 694 | .llvm_name = "invpcid", | ||
| 695 | .description = "Invalidate Process-Context Identifier", | ||
| 696 | .dependencies = featureSet(&[_]Feature{}), | ||
| 697 | }; | ||
| 698 | result[@intFromEnum(Feature.kl)] = .{ | ||
| 699 | .llvm_name = "kl", | ||
| 700 | .description = "Support Key Locker kl Instructions", | ||
| 701 | .dependencies = featureSet(&[_]Feature{ | ||
| 702 | .sse2, | ||
| 703 | }), | ||
| 704 | }; | ||
| 705 | result[@intFromEnum(Feature.lea_sp)] = .{ | ||
| 706 | .llvm_name = "lea-sp", | ||
| 707 | .description = "Use LEA for adjusting the stack pointer (this is an optimization for Intel Atom processors)", | ||
| 708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.lea_uses_ag)] = .{ | ||
| 711 | .llvm_name = "lea-uses-ag", | ||
| 712 | .description = "LEA instruction needs inputs at AG stage", | ||
| 713 | .dependencies = featureSet(&[_]Feature{}), | ||
| 714 | }; | ||
| 715 | result[@intFromEnum(Feature.lvi_cfi)] = .{ | ||
| 716 | .llvm_name = "lvi-cfi", | ||
| 717 | .description = "Prevent indirect calls/branches from using a memory operand, and precede all indirect calls/branches from a register with an LFENCE instruction to serialize control flow. Also decompose RET instructions into a POP+LFENCE+JMP sequence.", | ||
| 718 | .dependencies = featureSet(&[_]Feature{}), | ||
| 719 | }; | ||
| 720 | result[@intFromEnum(Feature.lvi_load_hardening)] = .{ | ||
| 721 | .llvm_name = "lvi-load-hardening", | ||
| 722 | .description = "Insert LFENCE instructions to prevent data speculatively injected into loads from being used maliciously.", | ||
| 723 | .dependencies = featureSet(&[_]Feature{}), | ||
| 724 | }; | ||
| 725 | result[@intFromEnum(Feature.lwp)] = .{ | ||
| 726 | .llvm_name = "lwp", | ||
| 727 | .description = "Enable LWP instructions", | ||
| 728 | .dependencies = featureSet(&[_]Feature{}), | ||
| 729 | }; | ||
| 730 | result[@intFromEnum(Feature.lzcnt)] = .{ | ||
| 731 | .llvm_name = "lzcnt", | ||
| 732 | .description = "Support LZCNT instruction", | ||
| 733 | .dependencies = featureSet(&[_]Feature{}), | ||
| 734 | }; | ||
| 735 | result[@intFromEnum(Feature.macrofusion)] = .{ | ||
| 736 | .llvm_name = "macrofusion", | ||
| 737 | .description = "Various instructions can be fused with conditional branches", | ||
| 738 | .dependencies = featureSet(&[_]Feature{}), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.mmx)] = .{ | ||
| 741 | .llvm_name = "mmx", | ||
| 742 | .description = "Enable MMX instructions", | ||
| 743 | .dependencies = featureSet(&[_]Feature{}), | ||
| 744 | }; | ||
| 745 | result[@intFromEnum(Feature.movbe)] = .{ | ||
| 746 | .llvm_name = "movbe", | ||
| 747 | .description = "Support MOVBE instruction", | ||
| 748 | .dependencies = featureSet(&[_]Feature{}), | ||
| 749 | }; | ||
| 750 | result[@intFromEnum(Feature.movdir64b)] = .{ | ||
| 751 | .llvm_name = "movdir64b", | ||
| 752 | .description = "Support movdir64b instruction (direct store 64 bytes)", | ||
| 753 | .dependencies = featureSet(&[_]Feature{}), | ||
| 754 | }; | ||
| 755 | result[@intFromEnum(Feature.movdiri)] = .{ | ||
| 756 | .llvm_name = "movdiri", | ||
| 757 | .description = "Support movdiri instruction (direct store integer)", | ||
| 758 | .dependencies = featureSet(&[_]Feature{}), | ||
| 759 | }; | ||
| 760 | result[@intFromEnum(Feature.mwaitx)] = .{ | ||
| 761 | .llvm_name = "mwaitx", | ||
| 762 | .description = "Enable MONITORX/MWAITX timer functionality", | ||
| 763 | .dependencies = featureSet(&[_]Feature{}), | ||
| 764 | }; | ||
| 765 | result[@intFromEnum(Feature.no_bypass_delay)] = .{ | ||
| 766 | .llvm_name = "no-bypass-delay", | ||
| 767 | .description = "Has no bypass delay when using the 'wrong' domain", | ||
| 768 | .dependencies = featureSet(&[_]Feature{}), | ||
| 769 | }; | ||
| 770 | result[@intFromEnum(Feature.no_bypass_delay_blend)] = .{ | ||
| 771 | .llvm_name = "no-bypass-delay-blend", | ||
| 772 | .description = "Has no bypass delay when using the 'wrong' blend type", | ||
| 773 | .dependencies = featureSet(&[_]Feature{}), | ||
| 774 | }; | ||
| 775 | result[@intFromEnum(Feature.no_bypass_delay_mov)] = .{ | ||
| 776 | .llvm_name = "no-bypass-delay-mov", | ||
| 777 | .description = "Has no bypass delay when using the 'wrong' mov type", | ||
| 778 | .dependencies = featureSet(&[_]Feature{}), | ||
| 779 | }; | ||
| 780 | result[@intFromEnum(Feature.no_bypass_delay_shuffle)] = .{ | ||
| 781 | .llvm_name = "no-bypass-delay-shuffle", | ||
| 782 | .description = "Has no bypass delay when using the 'wrong' shuffle type", | ||
| 783 | .dependencies = featureSet(&[_]Feature{}), | ||
| 784 | }; | ||
| 785 | result[@intFromEnum(Feature.nopl)] = .{ | ||
| 786 | .llvm_name = "nopl", | ||
| 787 | .description = "Enable NOPL instruction (generally pentium pro+)", | ||
| 788 | .dependencies = featureSet(&[_]Feature{}), | ||
| 789 | }; | ||
| 790 | result[@intFromEnum(Feature.pad_short_functions)] = .{ | ||
| 791 | .llvm_name = "pad-short-functions", | ||
| 792 | .description = "Pad short functions (to prevent a stall when returning too early)", | ||
| 793 | .dependencies = featureSet(&[_]Feature{}), | ||
| 794 | }; | ||
| 795 | result[@intFromEnum(Feature.pclmul)] = .{ | ||
| 796 | .llvm_name = "pclmul", | ||
| 797 | .description = "Enable packed carry-less multiplication instructions", | ||
| 798 | .dependencies = featureSet(&[_]Feature{ | ||
| 799 | .sse2, | ||
| 800 | }), | ||
| 801 | }; | ||
| 802 | result[@intFromEnum(Feature.pconfig)] = .{ | ||
| 803 | .llvm_name = "pconfig", | ||
| 804 | .description = "platform configuration instruction", | ||
| 805 | .dependencies = featureSet(&[_]Feature{}), | ||
| 806 | }; | ||
| 807 | result[@intFromEnum(Feature.pku)] = .{ | ||
| 808 | .llvm_name = "pku", | ||
| 809 | .description = "Enable protection keys", | ||
| 810 | .dependencies = featureSet(&[_]Feature{}), | ||
| 811 | }; | ||
| 812 | result[@intFromEnum(Feature.popcnt)] = .{ | ||
| 813 | .llvm_name = "popcnt", | ||
| 814 | .description = "Support POPCNT instruction", | ||
| 815 | .dependencies = featureSet(&[_]Feature{}), | ||
| 816 | }; | ||
| 817 | result[@intFromEnum(Feature.prefer_128_bit)] = .{ | ||
| 818 | .llvm_name = "prefer-128-bit", | ||
| 819 | .description = "Prefer 128-bit AVX instructions", | ||
| 820 | .dependencies = featureSet(&[_]Feature{}), | ||
| 821 | }; | ||
| 822 | result[@intFromEnum(Feature.prefer_256_bit)] = .{ | ||
| 823 | .llvm_name = "prefer-256-bit", | ||
| 824 | .description = "Prefer 256-bit AVX instructions", | ||
| 825 | .dependencies = featureSet(&[_]Feature{}), | ||
| 826 | }; | ||
| 827 | result[@intFromEnum(Feature.prefer_mask_registers)] = .{ | ||
| 828 | .llvm_name = "prefer-mask-registers", | ||
| 829 | .description = "Prefer AVX512 mask registers over PTEST/MOVMSK", | ||
| 830 | .dependencies = featureSet(&[_]Feature{}), | ||
| 831 | }; | ||
| 832 | result[@intFromEnum(Feature.prefer_movmsk_over_vtest)] = .{ | ||
| 833 | .llvm_name = "prefer-movmsk-over-vtest", | ||
| 834 | .description = "Prefer movmsk over vtest instruction", | ||
| 835 | .dependencies = featureSet(&[_]Feature{}), | ||
| 836 | }; | ||
| 837 | result[@intFromEnum(Feature.prefetchi)] = .{ | ||
| 838 | .llvm_name = "prefetchi", | ||
| 839 | .description = "Prefetch instruction with T0 or T1 Hint", | ||
| 840 | .dependencies = featureSet(&[_]Feature{}), | ||
| 841 | }; | ||
| 842 | result[@intFromEnum(Feature.prefetchwt1)] = .{ | ||
| 843 | .llvm_name = "prefetchwt1", | ||
| 844 | .description = "Prefetch with Intent to Write and T1 Hint", | ||
| 845 | .dependencies = featureSet(&[_]Feature{}), | ||
| 846 | }; | ||
| 847 | result[@intFromEnum(Feature.prfchw)] = .{ | ||
| 848 | .llvm_name = "prfchw", | ||
| 849 | .description = "Support PRFCHW instructions", | ||
| 850 | .dependencies = featureSet(&[_]Feature{}), | ||
| 851 | }; | ||
| 852 | result[@intFromEnum(Feature.ptwrite)] = .{ | ||
| 853 | .llvm_name = "ptwrite", | ||
| 854 | .description = "Support ptwrite instruction", | ||
| 855 | .dependencies = featureSet(&[_]Feature{}), | ||
| 856 | }; | ||
| 857 | result[@intFromEnum(Feature.raoint)] = .{ | ||
| 858 | .llvm_name = "raoint", | ||
| 859 | .description = "Support RAO-INT instructions", | ||
| 860 | .dependencies = featureSet(&[_]Feature{}), | ||
| 861 | }; | ||
| 862 | result[@intFromEnum(Feature.rdpid)] = .{ | ||
| 863 | .llvm_name = "rdpid", | ||
| 864 | .description = "Support RDPID instructions", | ||
| 865 | .dependencies = featureSet(&[_]Feature{}), | ||
| 866 | }; | ||
| 867 | result[@intFromEnum(Feature.rdpru)] = .{ | ||
| 868 | .llvm_name = "rdpru", | ||
| 869 | .description = "Support RDPRU instructions", | ||
| 870 | .dependencies = featureSet(&[_]Feature{}), | ||
| 871 | }; | ||
| 872 | result[@intFromEnum(Feature.rdrnd)] = .{ | ||
| 873 | .llvm_name = "rdrnd", | ||
| 874 | .description = "Support RDRAND instruction", | ||
| 875 | .dependencies = featureSet(&[_]Feature{}), | ||
| 876 | }; | ||
| 877 | result[@intFromEnum(Feature.rdseed)] = .{ | ||
| 878 | .llvm_name = "rdseed", | ||
| 879 | .description = "Support RDSEED instruction", | ||
| 880 | .dependencies = featureSet(&[_]Feature{}), | ||
| 881 | }; | ||
| 882 | result[@intFromEnum(Feature.retpoline)] = .{ | ||
| 883 | .llvm_name = "retpoline", | ||
| 884 | .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", | ||
| 885 | .dependencies = featureSet(&[_]Feature{ | ||
| 886 | .retpoline_indirect_branches, | ||
| 887 | .retpoline_indirect_calls, | ||
| 888 | }), | ||
| 889 | }; | ||
| 890 | result[@intFromEnum(Feature.retpoline_external_thunk)] = .{ | ||
| 891 | .llvm_name = "retpoline-external-thunk", | ||
| 892 | .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", | ||
| 893 | .dependencies = featureSet(&[_]Feature{ | ||
| 894 | .retpoline_indirect_calls, | ||
| 895 | }), | ||
| 896 | }; | ||
| 897 | result[@intFromEnum(Feature.retpoline_indirect_branches)] = .{ | ||
| 898 | .llvm_name = "retpoline-indirect-branches", | ||
| 899 | .description = "Remove speculation of indirect branches from the generated code", | ||
| 900 | .dependencies = featureSet(&[_]Feature{}), | ||
| 901 | }; | ||
| 902 | result[@intFromEnum(Feature.retpoline_indirect_calls)] = .{ | ||
| 903 | .llvm_name = "retpoline-indirect-calls", | ||
| 904 | .description = "Remove speculation of indirect calls from the generated code", | ||
| 905 | .dependencies = featureSet(&[_]Feature{}), | ||
| 906 | }; | ||
| 907 | result[@intFromEnum(Feature.rtm)] = .{ | ||
| 908 | .llvm_name = "rtm", | ||
| 909 | .description = "Support RTM instructions", | ||
| 910 | .dependencies = featureSet(&[_]Feature{}), | ||
| 911 | }; | ||
| 912 | result[@intFromEnum(Feature.sahf)] = .{ | ||
| 913 | .llvm_name = "sahf", | ||
| 914 | .description = "Support LAHF and SAHF instructions in 64-bit mode", | ||
| 915 | .dependencies = featureSet(&[_]Feature{}), | ||
| 916 | }; | ||
| 917 | result[@intFromEnum(Feature.sbb_dep_breaking)] = .{ | ||
| 918 | .llvm_name = "sbb-dep-breaking", | ||
| 919 | .description = "SBB with same register has no source dependency", | ||
| 920 | .dependencies = featureSet(&[_]Feature{}), | ||
| 921 | }; | ||
| 922 | result[@intFromEnum(Feature.serialize)] = .{ | ||
| 923 | .llvm_name = "serialize", | ||
| 924 | .description = "Has serialize instruction", | ||
| 925 | .dependencies = featureSet(&[_]Feature{}), | ||
| 926 | }; | ||
| 927 | result[@intFromEnum(Feature.seses)] = .{ | ||
| 928 | .llvm_name = "seses", | ||
| 929 | .description = "Prevent speculative execution side channel timing attacks by inserting a speculation barrier before memory reads, memory writes, and conditional branches. Implies LVI Control Flow integrity.", | ||
| 930 | .dependencies = featureSet(&[_]Feature{ | ||
| 931 | .lvi_cfi, | ||
| 932 | }), | ||
| 933 | }; | ||
| 934 | result[@intFromEnum(Feature.sgx)] = .{ | ||
| 935 | .llvm_name = "sgx", | ||
| 936 | .description = "Enable Software Guard Extensions", | ||
| 937 | .dependencies = featureSet(&[_]Feature{}), | ||
| 938 | }; | ||
| 939 | result[@intFromEnum(Feature.sha)] = .{ | ||
| 940 | .llvm_name = "sha", | ||
| 941 | .description = "Enable SHA instructions", | ||
| 942 | .dependencies = featureSet(&[_]Feature{ | ||
| 943 | .sse2, | ||
| 944 | }), | ||
| 945 | }; | ||
| 946 | result[@intFromEnum(Feature.sha512)] = .{ | ||
| 947 | .llvm_name = "sha512", | ||
| 948 | .description = "Support SHA512 instructions", | ||
| 949 | .dependencies = featureSet(&[_]Feature{ | ||
| 950 | .avx, | ||
| 951 | }), | ||
| 952 | }; | ||
| 953 | result[@intFromEnum(Feature.shstk)] = .{ | ||
| 954 | .llvm_name = "shstk", | ||
| 955 | .description = "Support CET Shadow-Stack instructions", | ||
| 956 | .dependencies = featureSet(&[_]Feature{}), | ||
| 957 | }; | ||
| 958 | result[@intFromEnum(Feature.slow_3ops_lea)] = .{ | ||
| 959 | .llvm_name = "slow-3ops-lea", | ||
| 960 | .description = "LEA instruction with 3 ops or certain registers is slow", | ||
| 961 | .dependencies = featureSet(&[_]Feature{}), | ||
| 962 | }; | ||
| 963 | result[@intFromEnum(Feature.slow_incdec)] = .{ | ||
| 964 | .llvm_name = "slow-incdec", | ||
| 965 | .description = "INC and DEC instructions are slower than ADD and SUB", | ||
| 966 | .dependencies = featureSet(&[_]Feature{}), | ||
| 967 | }; | ||
| 968 | result[@intFromEnum(Feature.slow_lea)] = .{ | ||
| 969 | .llvm_name = "slow-lea", | ||
| 970 | .description = "LEA instruction with certain arguments is slow", | ||
| 971 | .dependencies = featureSet(&[_]Feature{}), | ||
| 972 | }; | ||
| 973 | result[@intFromEnum(Feature.slow_pmaddwd)] = .{ | ||
| 974 | .llvm_name = "slow-pmaddwd", | ||
| 975 | .description = "PMADDWD is slower than PMULLD", | ||
| 976 | .dependencies = featureSet(&[_]Feature{}), | ||
| 977 | }; | ||
| 978 | result[@intFromEnum(Feature.slow_pmulld)] = .{ | ||
| 979 | .llvm_name = "slow-pmulld", | ||
| 980 | .description = "PMULLD instruction is slow (compared to PMULLW/PMULHW and PMULUDQ)", | ||
| 981 | .dependencies = featureSet(&[_]Feature{}), | ||
| 982 | }; | ||
| 983 | result[@intFromEnum(Feature.slow_shld)] = .{ | ||
| 984 | .llvm_name = "slow-shld", | ||
| 985 | .description = "SHLD instruction is slow", | ||
| 986 | .dependencies = featureSet(&[_]Feature{}), | ||
| 987 | }; | ||
| 988 | result[@intFromEnum(Feature.slow_two_mem_ops)] = .{ | ||
| 989 | .llvm_name = "slow-two-mem-ops", | ||
| 990 | .description = "Two memory operand instructions are slow", | ||
| 991 | .dependencies = featureSet(&[_]Feature{}), | ||
| 992 | }; | ||
| 993 | result[@intFromEnum(Feature.slow_unaligned_mem_16)] = .{ | ||
| 994 | .llvm_name = "slow-unaligned-mem-16", | ||
| 995 | .description = "Slow unaligned 16-byte memory access", | ||
| 996 | .dependencies = featureSet(&[_]Feature{}), | ||
| 997 | }; | ||
| 998 | result[@intFromEnum(Feature.slow_unaligned_mem_32)] = .{ | ||
| 999 | .llvm_name = "slow-unaligned-mem-32", | ||
| 1000 | .description = "Slow unaligned 32-byte memory access", | ||
| 1001 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1002 | }; | ||
| 1003 | result[@intFromEnum(Feature.sm3)] = .{ | ||
| 1004 | .llvm_name = "sm3", | ||
| 1005 | .description = "Support SM3 instructions", | ||
| 1006 | .dependencies = featureSet(&[_]Feature{ | ||
| 1007 | .avx, | ||
| 1008 | }), | ||
| 1009 | }; | ||
| 1010 | result[@intFromEnum(Feature.sm4)] = .{ | ||
| 1011 | .llvm_name = "sm4", | ||
| 1012 | .description = "Support SM4 instructions", | ||
| 1013 | .dependencies = featureSet(&[_]Feature{ | ||
| 1014 | .avx, | ||
| 1015 | }), | ||
| 1016 | }; | ||
| 1017 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 1018 | .llvm_name = "soft-float", | ||
| 1019 | .description = "Use software floating point features", | ||
| 1020 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1021 | }; | ||
| 1022 | result[@intFromEnum(Feature.sse)] = .{ | ||
| 1023 | .llvm_name = "sse", | ||
| 1024 | .description = "Enable SSE instructions", | ||
| 1025 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1026 | }; | ||
| 1027 | result[@intFromEnum(Feature.sse2)] = .{ | ||
| 1028 | .llvm_name = "sse2", | ||
| 1029 | .description = "Enable SSE2 instructions", | ||
| 1030 | .dependencies = featureSet(&[_]Feature{ | ||
| 1031 | .sse, | ||
| 1032 | }), | ||
| 1033 | }; | ||
| 1034 | result[@intFromEnum(Feature.sse3)] = .{ | ||
| 1035 | .llvm_name = "sse3", | ||
| 1036 | .description = "Enable SSE3 instructions", | ||
| 1037 | .dependencies = featureSet(&[_]Feature{ | ||
| 1038 | .sse2, | ||
| 1039 | }), | ||
| 1040 | }; | ||
| 1041 | result[@intFromEnum(Feature.sse4_1)] = .{ | ||
| 1042 | .llvm_name = "sse4.1", | ||
| 1043 | .description = "Enable SSE 4.1 instructions", | ||
| 1044 | .dependencies = featureSet(&[_]Feature{ | ||
| 1045 | .ssse3, | ||
| 1046 | }), | ||
| 1047 | }; | ||
| 1048 | result[@intFromEnum(Feature.sse4_2)] = .{ | ||
| 1049 | .llvm_name = "sse4.2", | ||
| 1050 | .description = "Enable SSE 4.2 instructions", | ||
| 1051 | .dependencies = featureSet(&[_]Feature{ | ||
| 1052 | .sse4_1, | ||
| 1053 | }), | ||
| 1054 | }; | ||
| 1055 | result[@intFromEnum(Feature.sse4a)] = .{ | ||
| 1056 | .llvm_name = "sse4a", | ||
| 1057 | .description = "Support SSE 4a instructions", | ||
| 1058 | .dependencies = featureSet(&[_]Feature{ | ||
| 1059 | .sse3, | ||
| 1060 | }), | ||
| 1061 | }; | ||
| 1062 | result[@intFromEnum(Feature.sse_unaligned_mem)] = .{ | ||
| 1063 | .llvm_name = "sse-unaligned-mem", | ||
| 1064 | .description = "Allow unaligned memory operands with SSE instructions (this may require setting a configuration bit in the processor)", | ||
| 1065 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1066 | }; | ||
| 1067 | result[@intFromEnum(Feature.ssse3)] = .{ | ||
| 1068 | .llvm_name = "ssse3", | ||
| 1069 | .description = "Enable SSSE3 instructions", | ||
| 1070 | .dependencies = featureSet(&[_]Feature{ | ||
| 1071 | .sse3, | ||
| 1072 | }), | ||
| 1073 | }; | ||
| 1074 | result[@intFromEnum(Feature.tagged_globals)] = .{ | ||
| 1075 | .llvm_name = "tagged-globals", | ||
| 1076 | .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits.", | ||
| 1077 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1078 | }; | ||
| 1079 | result[@intFromEnum(Feature.tbm)] = .{ | ||
| 1080 | .llvm_name = "tbm", | ||
| 1081 | .description = "Enable TBM instructions", | ||
| 1082 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1083 | }; | ||
| 1084 | result[@intFromEnum(Feature.tsxldtrk)] = .{ | ||
| 1085 | .llvm_name = "tsxldtrk", | ||
| 1086 | .description = "Support TSXLDTRK instructions", | ||
| 1087 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1088 | }; | ||
| 1089 | result[@intFromEnum(Feature.tuning_fast_imm_vector_shift)] = .{ | ||
| 1090 | .llvm_name = "tuning-fast-imm-vector-shift", | ||
| 1091 | .description = "Vector shifts are fast (2/cycle) as opposed to slow (1/cycle)", | ||
| 1092 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1093 | }; | ||
| 1094 | result[@intFromEnum(Feature.uintr)] = .{ | ||
| 1095 | .llvm_name = "uintr", | ||
| 1096 | .description = "Has UINTR Instructions", | ||
| 1097 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1098 | }; | ||
| 1099 | result[@intFromEnum(Feature.use_glm_div_sqrt_costs)] = .{ | ||
| 1100 | .llvm_name = "use-glm-div-sqrt-costs", | ||
| 1101 | .description = "Use Goldmont specific floating point div/sqrt costs", | ||
| 1102 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1103 | }; | ||
| 1104 | result[@intFromEnum(Feature.use_slm_arith_costs)] = .{ | ||
| 1105 | .llvm_name = "use-slm-arith-costs", | ||
| 1106 | .description = "Use Silvermont specific arithmetic costs", | ||
| 1107 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1108 | }; | ||
| 1109 | result[@intFromEnum(Feature.vaes)] = .{ | ||
| 1110 | .llvm_name = "vaes", | ||
| 1111 | .description = "Promote selected AES instructions to AVX512/AVX registers", | ||
| 1112 | .dependencies = featureSet(&[_]Feature{ | ||
| 1113 | .aes, | ||
| 1114 | .avx, | ||
| 1115 | }), | ||
| 1116 | }; | ||
| 1117 | result[@intFromEnum(Feature.vpclmulqdq)] = .{ | ||
| 1118 | .llvm_name = "vpclmulqdq", | ||
| 1119 | .description = "Enable vpclmulqdq instructions", | ||
| 1120 | .dependencies = featureSet(&[_]Feature{ | ||
| 1121 | .avx, | ||
| 1122 | .pclmul, | ||
| 1123 | }), | ||
| 1124 | }; | ||
| 1125 | result[@intFromEnum(Feature.vzeroupper)] = .{ | ||
| 1126 | .llvm_name = "vzeroupper", | ||
| 1127 | .description = "Should insert vzeroupper instructions", | ||
| 1128 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1129 | }; | ||
| 1130 | result[@intFromEnum(Feature.waitpkg)] = .{ | ||
| 1131 | .llvm_name = "waitpkg", | ||
| 1132 | .description = "Wait and pause enhancements", | ||
| 1133 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1134 | }; | ||
| 1135 | result[@intFromEnum(Feature.wbnoinvd)] = .{ | ||
| 1136 | .llvm_name = "wbnoinvd", | ||
| 1137 | .description = "Write Back No Invalidate", | ||
| 1138 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1139 | }; | ||
| 1140 | result[@intFromEnum(Feature.widekl)] = .{ | ||
| 1141 | .llvm_name = "widekl", | ||
| 1142 | .description = "Support Key Locker wide Instructions", | ||
| 1143 | .dependencies = featureSet(&[_]Feature{ | ||
| 1144 | .kl, | ||
| 1145 | }), | ||
| 1146 | }; | ||
| 1147 | result[@intFromEnum(Feature.x87)] = .{ | ||
| 1148 | .llvm_name = "x87", | ||
| 1149 | .description = "Enable X87 float instructions", | ||
| 1150 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1151 | }; | ||
| 1152 | result[@intFromEnum(Feature.xop)] = .{ | ||
| 1153 | .llvm_name = "xop", | ||
| 1154 | .description = "Enable XOP instructions", | ||
| 1155 | .dependencies = featureSet(&[_]Feature{ | ||
| 1156 | .fma4, | ||
| 1157 | }), | ||
| 1158 | }; | ||
| 1159 | result[@intFromEnum(Feature.xsave)] = .{ | ||
| 1160 | .llvm_name = "xsave", | ||
| 1161 | .description = "Support xsave instructions", | ||
| 1162 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1163 | }; | ||
| 1164 | result[@intFromEnum(Feature.xsavec)] = .{ | ||
| 1165 | .llvm_name = "xsavec", | ||
| 1166 | .description = "Support xsavec instructions", | ||
| 1167 | .dependencies = featureSet(&[_]Feature{ | ||
| 1168 | .xsave, | ||
| 1169 | }), | ||
| 1170 | }; | ||
| 1171 | result[@intFromEnum(Feature.xsaveopt)] = .{ | ||
| 1172 | .llvm_name = "xsaveopt", | ||
| 1173 | .description = "Support xsaveopt instructions", | ||
| 1174 | .dependencies = featureSet(&[_]Feature{ | ||
| 1175 | .xsave, | ||
| 1176 | }), | ||
| 1177 | }; | ||
| 1178 | result[@intFromEnum(Feature.xsaves)] = .{ | ||
| 1179 | .llvm_name = "xsaves", | ||
| 1180 | .description = "Support xsaves instructions", | ||
| 1181 | .dependencies = featureSet(&[_]Feature{ | ||
| 1182 | .xsave, | ||
| 1183 | }), | ||
| 1184 | }; | ||
| 1185 | const ti = @typeInfo(Feature); | ||
| 1186 | for (&result, 0..) |*elem, i| { | ||
| 1187 | elem.index = i; | ||
| 1188 | elem.name = ti.Enum.fields[i].name; | ||
| 1189 | } | ||
| 1190 | break :blk result; | ||
| 1191 | }; | ||
| 1192 | |||
| 1193 | pub const cpu = struct { | ||
| 1194 | pub const alderlake = CpuModel{ | ||
| 1195 | .name = "alderlake", | ||
| 1196 | .llvm_name = "alderlake", | ||
| 1197 | .features = featureSet(&[_]Feature{ | ||
| 1198 | .@"64bit", | ||
| 1199 | .adx, | ||
| 1200 | .allow_light_256_bit, | ||
| 1201 | .avxvnni, | ||
| 1202 | .bmi, | ||
| 1203 | .bmi2, | ||
| 1204 | .cldemote, | ||
| 1205 | .clflushopt, | ||
| 1206 | .clwb, | ||
| 1207 | .cmov, | ||
| 1208 | .crc32, | ||
| 1209 | .cx16, | ||
| 1210 | .f16c, | ||
| 1211 | .false_deps_perm, | ||
| 1212 | .false_deps_popcnt, | ||
| 1213 | .fast_15bytenop, | ||
| 1214 | .fast_gather, | ||
| 1215 | .fast_scalar_fsqrt, | ||
| 1216 | .fast_shld_rotate, | ||
| 1217 | .fast_variable_crosslane_shuffle, | ||
| 1218 | .fast_variable_perlane_shuffle, | ||
| 1219 | .fast_vector_fsqrt, | ||
| 1220 | .fma, | ||
| 1221 | .fsgsbase, | ||
| 1222 | .fxsr, | ||
| 1223 | .gfni, | ||
| 1224 | .hreset, | ||
| 1225 | .idivq_to_divl, | ||
| 1226 | .invpcid, | ||
| 1227 | .lzcnt, | ||
| 1228 | .macrofusion, | ||
| 1229 | .mmx, | ||
| 1230 | .movbe, | ||
| 1231 | .movdir64b, | ||
| 1232 | .movdiri, | ||
| 1233 | .no_bypass_delay_blend, | ||
| 1234 | .no_bypass_delay_mov, | ||
| 1235 | .no_bypass_delay_shuffle, | ||
| 1236 | .nopl, | ||
| 1237 | .pconfig, | ||
| 1238 | .pku, | ||
| 1239 | .popcnt, | ||
| 1240 | .prefer_movmsk_over_vtest, | ||
| 1241 | .prfchw, | ||
| 1242 | .ptwrite, | ||
| 1243 | .rdpid, | ||
| 1244 | .rdrnd, | ||
| 1245 | .rdseed, | ||
| 1246 | .sahf, | ||
| 1247 | .serialize, | ||
| 1248 | .sha, | ||
| 1249 | .shstk, | ||
| 1250 | .slow_3ops_lea, | ||
| 1251 | .tuning_fast_imm_vector_shift, | ||
| 1252 | .vaes, | ||
| 1253 | .vpclmulqdq, | ||
| 1254 | .vzeroupper, | ||
| 1255 | .waitpkg, | ||
| 1256 | .widekl, | ||
| 1257 | .x87, | ||
| 1258 | .xsavec, | ||
| 1259 | .xsaveopt, | ||
| 1260 | .xsaves, | ||
| 1261 | }), | ||
| 1262 | }; | ||
| 1263 | pub const amdfam10 = CpuModel{ | ||
| 1264 | .name = "amdfam10", | ||
| 1265 | .llvm_name = "amdfam10", | ||
| 1266 | .features = featureSet(&[_]Feature{ | ||
| 1267 | .@"3dnowa", | ||
| 1268 | .@"64bit", | ||
| 1269 | .cmov, | ||
| 1270 | .cx16, | ||
| 1271 | .fast_scalar_shift_masks, | ||
| 1272 | .fxsr, | ||
| 1273 | .lzcnt, | ||
| 1274 | .nopl, | ||
| 1275 | .popcnt, | ||
| 1276 | .prfchw, | ||
| 1277 | .sahf, | ||
| 1278 | .sbb_dep_breaking, | ||
| 1279 | .slow_shld, | ||
| 1280 | .sse4a, | ||
| 1281 | .vzeroupper, | ||
| 1282 | .x87, | ||
| 1283 | }), | ||
| 1284 | }; | ||
| 1285 | pub const athlon = CpuModel{ | ||
| 1286 | .name = "athlon", | ||
| 1287 | .llvm_name = "athlon", | ||
| 1288 | .features = featureSet(&[_]Feature{ | ||
| 1289 | .@"3dnowa", | ||
| 1290 | .cmov, | ||
| 1291 | .cx8, | ||
| 1292 | .nopl, | ||
| 1293 | .slow_shld, | ||
| 1294 | .slow_unaligned_mem_16, | ||
| 1295 | .vzeroupper, | ||
| 1296 | .x87, | ||
| 1297 | }), | ||
| 1298 | }; | ||
| 1299 | pub const athlon64 = CpuModel{ | ||
| 1300 | .name = "athlon64", | ||
| 1301 | .llvm_name = "athlon64", | ||
| 1302 | .features = featureSet(&[_]Feature{ | ||
| 1303 | .@"3dnowa", | ||
| 1304 | .@"64bit", | ||
| 1305 | .cmov, | ||
| 1306 | .cx8, | ||
| 1307 | .fast_scalar_shift_masks, | ||
| 1308 | .fxsr, | ||
| 1309 | .nopl, | ||
| 1310 | .sbb_dep_breaking, | ||
| 1311 | .slow_shld, | ||
| 1312 | .slow_unaligned_mem_16, | ||
| 1313 | .sse2, | ||
| 1314 | .vzeroupper, | ||
| 1315 | .x87, | ||
| 1316 | }), | ||
| 1317 | }; | ||
| 1318 | pub const athlon64_sse3 = CpuModel{ | ||
| 1319 | .name = "athlon64_sse3", | ||
| 1320 | .llvm_name = "athlon64-sse3", | ||
| 1321 | .features = featureSet(&[_]Feature{ | ||
| 1322 | .@"3dnowa", | ||
| 1323 | .@"64bit", | ||
| 1324 | .cmov, | ||
| 1325 | .cx16, | ||
| 1326 | .fast_scalar_shift_masks, | ||
| 1327 | .fxsr, | ||
| 1328 | .nopl, | ||
| 1329 | .sbb_dep_breaking, | ||
| 1330 | .slow_shld, | ||
| 1331 | .slow_unaligned_mem_16, | ||
| 1332 | .sse3, | ||
| 1333 | .vzeroupper, | ||
| 1334 | .x87, | ||
| 1335 | }), | ||
| 1336 | }; | ||
| 1337 | pub const athlon_4 = CpuModel{ | ||
| 1338 | .name = "athlon_4", | ||
| 1339 | .llvm_name = "athlon-4", | ||
| 1340 | .features = featureSet(&[_]Feature{ | ||
| 1341 | .@"3dnowa", | ||
| 1342 | .cmov, | ||
| 1343 | .cx8, | ||
| 1344 | .fxsr, | ||
| 1345 | .nopl, | ||
| 1346 | .slow_shld, | ||
| 1347 | .slow_unaligned_mem_16, | ||
| 1348 | .sse, | ||
| 1349 | .vzeroupper, | ||
| 1350 | .x87, | ||
| 1351 | }), | ||
| 1352 | }; | ||
| 1353 | pub const athlon_fx = CpuModel{ | ||
| 1354 | .name = "athlon_fx", | ||
| 1355 | .llvm_name = "athlon-fx", | ||
| 1356 | .features = featureSet(&[_]Feature{ | ||
| 1357 | .@"3dnowa", | ||
| 1358 | .@"64bit", | ||
| 1359 | .cmov, | ||
| 1360 | .cx8, | ||
| 1361 | .fast_scalar_shift_masks, | ||
| 1362 | .fxsr, | ||
| 1363 | .nopl, | ||
| 1364 | .sbb_dep_breaking, | ||
| 1365 | .slow_shld, | ||
| 1366 | .slow_unaligned_mem_16, | ||
| 1367 | .sse2, | ||
| 1368 | .vzeroupper, | ||
| 1369 | .x87, | ||
| 1370 | }), | ||
| 1371 | }; | ||
| 1372 | pub const athlon_mp = CpuModel{ | ||
| 1373 | .name = "athlon_mp", | ||
| 1374 | .llvm_name = "athlon-mp", | ||
| 1375 | .features = featureSet(&[_]Feature{ | ||
| 1376 | .@"3dnowa", | ||
| 1377 | .cmov, | ||
| 1378 | .cx8, | ||
| 1379 | .fxsr, | ||
| 1380 | .nopl, | ||
| 1381 | .slow_shld, | ||
| 1382 | .slow_unaligned_mem_16, | ||
| 1383 | .sse, | ||
| 1384 | .vzeroupper, | ||
| 1385 | .x87, | ||
| 1386 | }), | ||
| 1387 | }; | ||
| 1388 | pub const athlon_tbird = CpuModel{ | ||
| 1389 | .name = "athlon_tbird", | ||
| 1390 | .llvm_name = "athlon-tbird", | ||
| 1391 | .features = featureSet(&[_]Feature{ | ||
| 1392 | .@"3dnowa", | ||
| 1393 | .cmov, | ||
| 1394 | .cx8, | ||
| 1395 | .nopl, | ||
| 1396 | .slow_shld, | ||
| 1397 | .slow_unaligned_mem_16, | ||
| 1398 | .vzeroupper, | ||
| 1399 | .x87, | ||
| 1400 | }), | ||
| 1401 | }; | ||
| 1402 | pub const athlon_xp = CpuModel{ | ||
| 1403 | .name = "athlon_xp", | ||
| 1404 | .llvm_name = "athlon-xp", | ||
| 1405 | .features = featureSet(&[_]Feature{ | ||
| 1406 | .@"3dnowa", | ||
| 1407 | .cmov, | ||
| 1408 | .cx8, | ||
| 1409 | .fxsr, | ||
| 1410 | .nopl, | ||
| 1411 | .slow_shld, | ||
| 1412 | .slow_unaligned_mem_16, | ||
| 1413 | .sse, | ||
| 1414 | .vzeroupper, | ||
| 1415 | .x87, | ||
| 1416 | }), | ||
| 1417 | }; | ||
| 1418 | pub const atom = CpuModel{ | ||
| 1419 | .name = "atom", | ||
| 1420 | .llvm_name = "atom", | ||
| 1421 | .features = featureSet(&[_]Feature{ | ||
| 1422 | .@"64bit", | ||
| 1423 | .cmov, | ||
| 1424 | .cx16, | ||
| 1425 | .fxsr, | ||
| 1426 | .idivl_to_divb, | ||
| 1427 | .idivq_to_divl, | ||
| 1428 | .lea_sp, | ||
| 1429 | .lea_uses_ag, | ||
| 1430 | .mmx, | ||
| 1431 | .movbe, | ||
| 1432 | .no_bypass_delay, | ||
| 1433 | .nopl, | ||
| 1434 | .pad_short_functions, | ||
| 1435 | .sahf, | ||
| 1436 | .slow_two_mem_ops, | ||
| 1437 | .slow_unaligned_mem_16, | ||
| 1438 | .ssse3, | ||
| 1439 | .vzeroupper, | ||
| 1440 | .x87, | ||
| 1441 | }), | ||
| 1442 | }; | ||
| 1443 | pub const atom_sse4_2_movbe = CpuModel{ | ||
| 1444 | .name = "atom_sse4_2_movbe", | ||
| 1445 | .llvm_name = "atom_sse4_2_movbe", | ||
| 1446 | .features = featureSet(&[_]Feature{ | ||
| 1447 | .@"64bit", | ||
| 1448 | .aes, | ||
| 1449 | .clflushopt, | ||
| 1450 | .cmov, | ||
| 1451 | .crc32, | ||
| 1452 | .cx16, | ||
| 1453 | .false_deps_popcnt, | ||
| 1454 | .fast_7bytenop, | ||
| 1455 | .fast_movbe, | ||
| 1456 | .fsgsbase, | ||
| 1457 | .fxsr, | ||
| 1458 | .idivq_to_divl, | ||
| 1459 | .mmx, | ||
| 1460 | .movbe, | ||
| 1461 | .no_bypass_delay, | ||
| 1462 | .nopl, | ||
| 1463 | .pclmul, | ||
| 1464 | .popcnt, | ||
| 1465 | .prfchw, | ||
| 1466 | .rdrnd, | ||
| 1467 | .rdseed, | ||
| 1468 | .sahf, | ||
| 1469 | .sha, | ||
| 1470 | .slow_incdec, | ||
| 1471 | .slow_lea, | ||
| 1472 | .slow_pmulld, | ||
| 1473 | .slow_two_mem_ops, | ||
| 1474 | .sse4_2, | ||
| 1475 | .use_slm_arith_costs, | ||
| 1476 | .vzeroupper, | ||
| 1477 | .x87, | ||
| 1478 | .xsavec, | ||
| 1479 | .xsaveopt, | ||
| 1480 | .xsaves, | ||
| 1481 | }), | ||
| 1482 | }; | ||
| 1483 | pub const barcelona = CpuModel{ | ||
| 1484 | .name = "barcelona", | ||
| 1485 | .llvm_name = "barcelona", | ||
| 1486 | .features = featureSet(&[_]Feature{ | ||
| 1487 | .@"3dnowa", | ||
| 1488 | .@"64bit", | ||
| 1489 | .cmov, | ||
| 1490 | .cx16, | ||
| 1491 | .fast_scalar_shift_masks, | ||
| 1492 | .fxsr, | ||
| 1493 | .lzcnt, | ||
| 1494 | .nopl, | ||
| 1495 | .popcnt, | ||
| 1496 | .prfchw, | ||
| 1497 | .sahf, | ||
| 1498 | .sbb_dep_breaking, | ||
| 1499 | .slow_shld, | ||
| 1500 | .sse4a, | ||
| 1501 | .vzeroupper, | ||
| 1502 | .x87, | ||
| 1503 | }), | ||
| 1504 | }; | ||
| 1505 | pub const bdver1 = CpuModel{ | ||
| 1506 | .name = "bdver1", | ||
| 1507 | .llvm_name = "bdver1", | ||
| 1508 | .features = featureSet(&[_]Feature{ | ||
| 1509 | .@"64bit", | ||
| 1510 | .aes, | ||
| 1511 | .branchfusion, | ||
| 1512 | .cmov, | ||
| 1513 | .crc32, | ||
| 1514 | .cx16, | ||
| 1515 | .fast_11bytenop, | ||
| 1516 | .fast_scalar_shift_masks, | ||
| 1517 | .fxsr, | ||
| 1518 | .lwp, | ||
| 1519 | .lzcnt, | ||
| 1520 | .mmx, | ||
| 1521 | .nopl, | ||
| 1522 | .pclmul, | ||
| 1523 | .popcnt, | ||
| 1524 | .prfchw, | ||
| 1525 | .sahf, | ||
| 1526 | .sbb_dep_breaking, | ||
| 1527 | .slow_shld, | ||
| 1528 | .vzeroupper, | ||
| 1529 | .x87, | ||
| 1530 | .xop, | ||
| 1531 | .xsave, | ||
| 1532 | }), | ||
| 1533 | }; | ||
| 1534 | pub const bdver2 = CpuModel{ | ||
| 1535 | .name = "bdver2", | ||
| 1536 | .llvm_name = "bdver2", | ||
| 1537 | .features = featureSet(&[_]Feature{ | ||
| 1538 | .@"64bit", | ||
| 1539 | .aes, | ||
| 1540 | .bmi, | ||
| 1541 | .branchfusion, | ||
| 1542 | .cmov, | ||
| 1543 | .crc32, | ||
| 1544 | .cx16, | ||
| 1545 | .f16c, | ||
| 1546 | .fast_11bytenop, | ||
| 1547 | .fast_bextr, | ||
| 1548 | .fast_movbe, | ||
| 1549 | .fast_scalar_shift_masks, | ||
| 1550 | .fma, | ||
| 1551 | .fxsr, | ||
| 1552 | .lwp, | ||
| 1553 | .lzcnt, | ||
| 1554 | .mmx, | ||
| 1555 | .nopl, | ||
| 1556 | .pclmul, | ||
| 1557 | .popcnt, | ||
| 1558 | .prfchw, | ||
| 1559 | .sahf, | ||
| 1560 | .sbb_dep_breaking, | ||
| 1561 | .slow_shld, | ||
| 1562 | .tbm, | ||
| 1563 | .vzeroupper, | ||
| 1564 | .x87, | ||
| 1565 | .xop, | ||
| 1566 | .xsave, | ||
| 1567 | }), | ||
| 1568 | }; | ||
| 1569 | pub const bdver3 = CpuModel{ | ||
| 1570 | .name = "bdver3", | ||
| 1571 | .llvm_name = "bdver3", | ||
| 1572 | .features = featureSet(&[_]Feature{ | ||
| 1573 | .@"64bit", | ||
| 1574 | .aes, | ||
| 1575 | .bmi, | ||
| 1576 | .branchfusion, | ||
| 1577 | .cmov, | ||
| 1578 | .crc32, | ||
| 1579 | .cx16, | ||
| 1580 | .f16c, | ||
| 1581 | .fast_11bytenop, | ||
| 1582 | .fast_bextr, | ||
| 1583 | .fast_movbe, | ||
| 1584 | .fast_scalar_shift_masks, | ||
| 1585 | .fma, | ||
| 1586 | .fsgsbase, | ||
| 1587 | .fxsr, | ||
| 1588 | .lwp, | ||
| 1589 | .lzcnt, | ||
| 1590 | .mmx, | ||
| 1591 | .nopl, | ||
| 1592 | .pclmul, | ||
| 1593 | .popcnt, | ||
| 1594 | .prfchw, | ||
| 1595 | .sahf, | ||
| 1596 | .sbb_dep_breaking, | ||
| 1597 | .slow_shld, | ||
| 1598 | .tbm, | ||
| 1599 | .vzeroupper, | ||
| 1600 | .x87, | ||
| 1601 | .xop, | ||
| 1602 | .xsaveopt, | ||
| 1603 | }), | ||
| 1604 | }; | ||
| 1605 | pub const bdver4 = CpuModel{ | ||
| 1606 | .name = "bdver4", | ||
| 1607 | .llvm_name = "bdver4", | ||
| 1608 | .features = featureSet(&[_]Feature{ | ||
| 1609 | .@"64bit", | ||
| 1610 | .aes, | ||
| 1611 | .avx2, | ||
| 1612 | .bmi, | ||
| 1613 | .bmi2, | ||
| 1614 | .branchfusion, | ||
| 1615 | .cmov, | ||
| 1616 | .crc32, | ||
| 1617 | .cx16, | ||
| 1618 | .f16c, | ||
| 1619 | .fast_11bytenop, | ||
| 1620 | .fast_bextr, | ||
| 1621 | .fast_movbe, | ||
| 1622 | .fast_scalar_shift_masks, | ||
| 1623 | .fma, | ||
| 1624 | .fsgsbase, | ||
| 1625 | .fxsr, | ||
| 1626 | .lwp, | ||
| 1627 | .lzcnt, | ||
| 1628 | .mmx, | ||
| 1629 | .movbe, | ||
| 1630 | .mwaitx, | ||
| 1631 | .nopl, | ||
| 1632 | .pclmul, | ||
| 1633 | .popcnt, | ||
| 1634 | .prfchw, | ||
| 1635 | .rdrnd, | ||
| 1636 | .sahf, | ||
| 1637 | .sbb_dep_breaking, | ||
| 1638 | .slow_shld, | ||
| 1639 | .tbm, | ||
| 1640 | .vzeroupper, | ||
| 1641 | .x87, | ||
| 1642 | .xop, | ||
| 1643 | .xsaveopt, | ||
| 1644 | }), | ||
| 1645 | }; | ||
| 1646 | pub const bonnell = CpuModel{ | ||
| 1647 | .name = "bonnell", | ||
| 1648 | .llvm_name = "bonnell", | ||
| 1649 | .features = featureSet(&[_]Feature{ | ||
| 1650 | .@"64bit", | ||
| 1651 | .cmov, | ||
| 1652 | .cx16, | ||
| 1653 | .fxsr, | ||
| 1654 | .idivl_to_divb, | ||
| 1655 | .idivq_to_divl, | ||
| 1656 | .lea_sp, | ||
| 1657 | .lea_uses_ag, | ||
| 1658 | .mmx, | ||
| 1659 | .movbe, | ||
| 1660 | .no_bypass_delay, | ||
| 1661 | .nopl, | ||
| 1662 | .pad_short_functions, | ||
| 1663 | .sahf, | ||
| 1664 | .slow_two_mem_ops, | ||
| 1665 | .slow_unaligned_mem_16, | ||
| 1666 | .ssse3, | ||
| 1667 | .vzeroupper, | ||
| 1668 | .x87, | ||
| 1669 | }), | ||
| 1670 | }; | ||
| 1671 | pub const broadwell = CpuModel{ | ||
| 1672 | .name = "broadwell", | ||
| 1673 | .llvm_name = "broadwell", | ||
| 1674 | .features = featureSet(&[_]Feature{ | ||
| 1675 | .@"64bit", | ||
| 1676 | .adx, | ||
| 1677 | .allow_light_256_bit, | ||
| 1678 | .avx2, | ||
| 1679 | .bmi, | ||
| 1680 | .bmi2, | ||
| 1681 | .cmov, | ||
| 1682 | .crc32, | ||
| 1683 | .cx16, | ||
| 1684 | .ermsb, | ||
| 1685 | .f16c, | ||
| 1686 | .false_deps_lzcnt_tzcnt, | ||
| 1687 | .false_deps_popcnt, | ||
| 1688 | .fast_15bytenop, | ||
| 1689 | .fast_scalar_fsqrt, | ||
| 1690 | .fast_shld_rotate, | ||
| 1691 | .fast_variable_crosslane_shuffle, | ||
| 1692 | .fast_variable_perlane_shuffle, | ||
| 1693 | .fma, | ||
| 1694 | .fsgsbase, | ||
| 1695 | .fxsr, | ||
| 1696 | .idivq_to_divl, | ||
| 1697 | .invpcid, | ||
| 1698 | .lzcnt, | ||
| 1699 | .macrofusion, | ||
| 1700 | .mmx, | ||
| 1701 | .movbe, | ||
| 1702 | .no_bypass_delay_mov, | ||
| 1703 | .no_bypass_delay_shuffle, | ||
| 1704 | .nopl, | ||
| 1705 | .pclmul, | ||
| 1706 | .popcnt, | ||
| 1707 | .prfchw, | ||
| 1708 | .rdrnd, | ||
| 1709 | .rdseed, | ||
| 1710 | .sahf, | ||
| 1711 | .slow_3ops_lea, | ||
| 1712 | .vzeroupper, | ||
| 1713 | .x87, | ||
| 1714 | .xsaveopt, | ||
| 1715 | }), | ||
| 1716 | }; | ||
| 1717 | pub const btver1 = CpuModel{ | ||
| 1718 | .name = "btver1", | ||
| 1719 | .llvm_name = "btver1", | ||
| 1720 | .features = featureSet(&[_]Feature{ | ||
| 1721 | .@"64bit", | ||
| 1722 | .cmov, | ||
| 1723 | .cx16, | ||
| 1724 | .fast_15bytenop, | ||
| 1725 | .fast_scalar_shift_masks, | ||
| 1726 | .fast_vector_shift_masks, | ||
| 1727 | .fxsr, | ||
| 1728 | .lzcnt, | ||
| 1729 | .mmx, | ||
| 1730 | .nopl, | ||
| 1731 | .popcnt, | ||
| 1732 | .prfchw, | ||
| 1733 | .sahf, | ||
| 1734 | .sbb_dep_breaking, | ||
| 1735 | .slow_shld, | ||
| 1736 | .sse4a, | ||
| 1737 | .ssse3, | ||
| 1738 | .vzeroupper, | ||
| 1739 | .x87, | ||
| 1740 | }), | ||
| 1741 | }; | ||
| 1742 | pub const btver2 = CpuModel{ | ||
| 1743 | .name = "btver2", | ||
| 1744 | .llvm_name = "btver2", | ||
| 1745 | .features = featureSet(&[_]Feature{ | ||
| 1746 | .@"64bit", | ||
| 1747 | .aes, | ||
| 1748 | .bmi, | ||
| 1749 | .cmov, | ||
| 1750 | .crc32, | ||
| 1751 | .cx16, | ||
| 1752 | .f16c, | ||
| 1753 | .fast_15bytenop, | ||
| 1754 | .fast_bextr, | ||
| 1755 | .fast_hops, | ||
| 1756 | .fast_lzcnt, | ||
| 1757 | .fast_movbe, | ||
| 1758 | .fast_scalar_shift_masks, | ||
| 1759 | .fast_vector_shift_masks, | ||
| 1760 | .fxsr, | ||
| 1761 | .lzcnt, | ||
| 1762 | .mmx, | ||
| 1763 | .movbe, | ||
| 1764 | .nopl, | ||
| 1765 | .pclmul, | ||
| 1766 | .popcnt, | ||
| 1767 | .prfchw, | ||
| 1768 | .sahf, | ||
| 1769 | .sbb_dep_breaking, | ||
| 1770 | .slow_shld, | ||
| 1771 | .sse4a, | ||
| 1772 | .x87, | ||
| 1773 | .xsaveopt, | ||
| 1774 | }), | ||
| 1775 | }; | ||
| 1776 | pub const c3 = CpuModel{ | ||
| 1777 | .name = "c3", | ||
| 1778 | .llvm_name = "c3", | ||
| 1779 | .features = featureSet(&[_]Feature{ | ||
| 1780 | .@"3dnow", | ||
| 1781 | .slow_unaligned_mem_16, | ||
| 1782 | .vzeroupper, | ||
| 1783 | .x87, | ||
| 1784 | }), | ||
| 1785 | }; | ||
| 1786 | pub const c3_2 = CpuModel{ | ||
| 1787 | .name = "c3_2", | ||
| 1788 | .llvm_name = "c3-2", | ||
| 1789 | .features = featureSet(&[_]Feature{ | ||
| 1790 | .cmov, | ||
| 1791 | .cx8, | ||
| 1792 | .fxsr, | ||
| 1793 | .mmx, | ||
| 1794 | .slow_unaligned_mem_16, | ||
| 1795 | .sse, | ||
| 1796 | .vzeroupper, | ||
| 1797 | .x87, | ||
| 1798 | }), | ||
| 1799 | }; | ||
| 1800 | pub const cannonlake = CpuModel{ | ||
| 1801 | .name = "cannonlake", | ||
| 1802 | .llvm_name = "cannonlake", | ||
| 1803 | .features = featureSet(&[_]Feature{ | ||
| 1804 | .@"64bit", | ||
| 1805 | .adx, | ||
| 1806 | .aes, | ||
| 1807 | .allow_light_256_bit, | ||
| 1808 | .avx512cd, | ||
| 1809 | .avx512dq, | ||
| 1810 | .avx512ifma, | ||
| 1811 | .avx512vbmi, | ||
| 1812 | .avx512vl, | ||
| 1813 | .bmi, | ||
| 1814 | .bmi2, | ||
| 1815 | .clflushopt, | ||
| 1816 | .cmov, | ||
| 1817 | .crc32, | ||
| 1818 | .cx16, | ||
| 1819 | .ermsb, | ||
| 1820 | .fast_15bytenop, | ||
| 1821 | .fast_gather, | ||
| 1822 | .fast_scalar_fsqrt, | ||
| 1823 | .fast_shld_rotate, | ||
| 1824 | .fast_variable_crosslane_shuffle, | ||
| 1825 | .fast_variable_perlane_shuffle, | ||
| 1826 | .fast_vector_fsqrt, | ||
| 1827 | .fsgsbase, | ||
| 1828 | .fxsr, | ||
| 1829 | .idivq_to_divl, | ||
| 1830 | .invpcid, | ||
| 1831 | .lzcnt, | ||
| 1832 | .macrofusion, | ||
| 1833 | .mmx, | ||
| 1834 | .movbe, | ||
| 1835 | .no_bypass_delay_blend, | ||
| 1836 | .no_bypass_delay_mov, | ||
| 1837 | .no_bypass_delay_shuffle, | ||
| 1838 | .nopl, | ||
| 1839 | .pclmul, | ||
| 1840 | .pku, | ||
| 1841 | .popcnt, | ||
| 1842 | .prefer_256_bit, | ||
| 1843 | .prfchw, | ||
| 1844 | .rdrnd, | ||
| 1845 | .rdseed, | ||
| 1846 | .sahf, | ||
| 1847 | .sha, | ||
| 1848 | .slow_3ops_lea, | ||
| 1849 | .tuning_fast_imm_vector_shift, | ||
| 1850 | .vzeroupper, | ||
| 1851 | .x87, | ||
| 1852 | .xsavec, | ||
| 1853 | .xsaveopt, | ||
| 1854 | .xsaves, | ||
| 1855 | }), | ||
| 1856 | }; | ||
| 1857 | pub const cascadelake = CpuModel{ | ||
| 1858 | .name = "cascadelake", | ||
| 1859 | .llvm_name = "cascadelake", | ||
| 1860 | .features = featureSet(&[_]Feature{ | ||
| 1861 | .@"64bit", | ||
| 1862 | .adx, | ||
| 1863 | .aes, | ||
| 1864 | .allow_light_256_bit, | ||
| 1865 | .avx512bw, | ||
| 1866 | .avx512cd, | ||
| 1867 | .avx512dq, | ||
| 1868 | .avx512vl, | ||
| 1869 | .avx512vnni, | ||
| 1870 | .bmi, | ||
| 1871 | .bmi2, | ||
| 1872 | .clflushopt, | ||
| 1873 | .clwb, | ||
| 1874 | .cmov, | ||
| 1875 | .crc32, | ||
| 1876 | .cx16, | ||
| 1877 | .ermsb, | ||
| 1878 | .false_deps_popcnt, | ||
| 1879 | .fast_15bytenop, | ||
| 1880 | .fast_gather, | ||
| 1881 | .fast_scalar_fsqrt, | ||
| 1882 | .fast_shld_rotate, | ||
| 1883 | .fast_variable_crosslane_shuffle, | ||
| 1884 | .fast_variable_perlane_shuffle, | ||
| 1885 | .fast_vector_fsqrt, | ||
| 1886 | .faster_shift_than_shuffle, | ||
| 1887 | .fsgsbase, | ||
| 1888 | .fxsr, | ||
| 1889 | .idivq_to_divl, | ||
| 1890 | .invpcid, | ||
| 1891 | .lzcnt, | ||
| 1892 | .macrofusion, | ||
| 1893 | .mmx, | ||
| 1894 | .movbe, | ||
| 1895 | .no_bypass_delay_blend, | ||
| 1896 | .no_bypass_delay_mov, | ||
| 1897 | .no_bypass_delay_shuffle, | ||
| 1898 | .nopl, | ||
| 1899 | .pclmul, | ||
| 1900 | .pku, | ||
| 1901 | .popcnt, | ||
| 1902 | .prefer_256_bit, | ||
| 1903 | .prfchw, | ||
| 1904 | .rdrnd, | ||
| 1905 | .rdseed, | ||
| 1906 | .sahf, | ||
| 1907 | .slow_3ops_lea, | ||
| 1908 | .tuning_fast_imm_vector_shift, | ||
| 1909 | .vzeroupper, | ||
| 1910 | .x87, | ||
| 1911 | .xsavec, | ||
| 1912 | .xsaveopt, | ||
| 1913 | .xsaves, | ||
| 1914 | }), | ||
| 1915 | }; | ||
| 1916 | pub const cooperlake = CpuModel{ | ||
| 1917 | .name = "cooperlake", | ||
| 1918 | .llvm_name = "cooperlake", | ||
| 1919 | .features = featureSet(&[_]Feature{ | ||
| 1920 | .@"64bit", | ||
| 1921 | .adx, | ||
| 1922 | .aes, | ||
| 1923 | .allow_light_256_bit, | ||
| 1924 | .avx512bf16, | ||
| 1925 | .avx512cd, | ||
| 1926 | .avx512dq, | ||
| 1927 | .avx512vl, | ||
| 1928 | .avx512vnni, | ||
| 1929 | .bmi, | ||
| 1930 | .bmi2, | ||
| 1931 | .clflushopt, | ||
| 1932 | .clwb, | ||
| 1933 | .cmov, | ||
| 1934 | .crc32, | ||
| 1935 | .cx16, | ||
| 1936 | .ermsb, | ||
| 1937 | .false_deps_popcnt, | ||
| 1938 | .fast_15bytenop, | ||
| 1939 | .fast_gather, | ||
| 1940 | .fast_scalar_fsqrt, | ||
| 1941 | .fast_shld_rotate, | ||
| 1942 | .fast_variable_crosslane_shuffle, | ||
| 1943 | .fast_variable_perlane_shuffle, | ||
| 1944 | .fast_vector_fsqrt, | ||
| 1945 | .faster_shift_than_shuffle, | ||
| 1946 | .fsgsbase, | ||
| 1947 | .fxsr, | ||
| 1948 | .idivq_to_divl, | ||
| 1949 | .invpcid, | ||
| 1950 | .lzcnt, | ||
| 1951 | .macrofusion, | ||
| 1952 | .mmx, | ||
| 1953 | .movbe, | ||
| 1954 | .no_bypass_delay_blend, | ||
| 1955 | .no_bypass_delay_mov, | ||
| 1956 | .no_bypass_delay_shuffle, | ||
| 1957 | .nopl, | ||
| 1958 | .pclmul, | ||
| 1959 | .pku, | ||
| 1960 | .popcnt, | ||
| 1961 | .prefer_256_bit, | ||
| 1962 | .prfchw, | ||
| 1963 | .rdrnd, | ||
| 1964 | .rdseed, | ||
| 1965 | .sahf, | ||
| 1966 | .slow_3ops_lea, | ||
| 1967 | .tuning_fast_imm_vector_shift, | ||
| 1968 | .vzeroupper, | ||
| 1969 | .x87, | ||
| 1970 | .xsavec, | ||
| 1971 | .xsaveopt, | ||
| 1972 | .xsaves, | ||
| 1973 | }), | ||
| 1974 | }; | ||
| 1975 | pub const core2 = CpuModel{ | ||
| 1976 | .name = "core2", | ||
| 1977 | .llvm_name = "core2", | ||
| 1978 | .features = featureSet(&[_]Feature{ | ||
| 1979 | .@"64bit", | ||
| 1980 | .cmov, | ||
| 1981 | .cx16, | ||
| 1982 | .fxsr, | ||
| 1983 | .macrofusion, | ||
| 1984 | .mmx, | ||
| 1985 | .nopl, | ||
| 1986 | .sahf, | ||
| 1987 | .slow_unaligned_mem_16, | ||
| 1988 | .ssse3, | ||
| 1989 | .vzeroupper, | ||
| 1990 | .x87, | ||
| 1991 | }), | ||
| 1992 | }; | ||
| 1993 | pub const corei7 = CpuModel{ | ||
| 1994 | .name = "corei7", | ||
| 1995 | .llvm_name = "corei7", | ||
| 1996 | .features = featureSet(&[_]Feature{ | ||
| 1997 | .@"64bit", | ||
| 1998 | .cmov, | ||
| 1999 | .crc32, | ||
| 2000 | .cx16, | ||
| 2001 | .fxsr, | ||
| 2002 | .macrofusion, | ||
| 2003 | .mmx, | ||
| 2004 | .no_bypass_delay_mov, | ||
| 2005 | .nopl, | ||
| 2006 | .popcnt, | ||
| 2007 | .sahf, | ||
| 2008 | .sse4_2, | ||
| 2009 | .vzeroupper, | ||
| 2010 | .x87, | ||
| 2011 | }), | ||
| 2012 | }; | ||
| 2013 | pub const emeraldrapids = CpuModel{ | ||
| 2014 | .name = "emeraldrapids", | ||
| 2015 | .llvm_name = "emeraldrapids", | ||
| 2016 | .features = featureSet(&[_]Feature{ | ||
| 2017 | .@"64bit", | ||
| 2018 | .adx, | ||
| 2019 | .allow_light_256_bit, | ||
| 2020 | .amx_bf16, | ||
| 2021 | .amx_int8, | ||
| 2022 | .avx512bf16, | ||
| 2023 | .avx512bitalg, | ||
| 2024 | .avx512cd, | ||
| 2025 | .avx512fp16, | ||
| 2026 | .avx512ifma, | ||
| 2027 | .avx512vbmi, | ||
| 2028 | .avx512vbmi2, | ||
| 2029 | .avx512vnni, | ||
| 2030 | .avx512vpopcntdq, | ||
| 2031 | .avxvnni, | ||
| 2032 | .bmi, | ||
| 2033 | .bmi2, | ||
| 2034 | .cldemote, | ||
| 2035 | .clflushopt, | ||
| 2036 | .clwb, | ||
| 2037 | .cmov, | ||
| 2038 | .crc32, | ||
| 2039 | .cx16, | ||
| 2040 | .enqcmd, | ||
| 2041 | .ermsb, | ||
| 2042 | .false_deps_getmant, | ||
| 2043 | .false_deps_mulc, | ||
| 2044 | .false_deps_mullq, | ||
| 2045 | .false_deps_perm, | ||
| 2046 | .false_deps_range, | ||
| 2047 | .fast_15bytenop, | ||
| 2048 | .fast_gather, | ||
| 2049 | .fast_scalar_fsqrt, | ||
| 2050 | .fast_shld_rotate, | ||
| 2051 | .fast_variable_crosslane_shuffle, | ||
| 2052 | .fast_variable_perlane_shuffle, | ||
| 2053 | .fast_vector_fsqrt, | ||
| 2054 | .fsgsbase, | ||
| 2055 | .fsrm, | ||
| 2056 | .fxsr, | ||
| 2057 | .gfni, | ||
| 2058 | .idivq_to_divl, | ||
| 2059 | .invpcid, | ||
| 2060 | .lzcnt, | ||
| 2061 | .macrofusion, | ||
| 2062 | .mmx, | ||
| 2063 | .movbe, | ||
| 2064 | .movdir64b, | ||
| 2065 | .movdiri, | ||
| 2066 | .no_bypass_delay_blend, | ||
| 2067 | .no_bypass_delay_mov, | ||
| 2068 | .no_bypass_delay_shuffle, | ||
| 2069 | .nopl, | ||
| 2070 | .pconfig, | ||
| 2071 | .pku, | ||
| 2072 | .popcnt, | ||
| 2073 | .prefer_256_bit, | ||
| 2074 | .prfchw, | ||
| 2075 | .ptwrite, | ||
| 2076 | .rdpid, | ||
| 2077 | .rdrnd, | ||
| 2078 | .rdseed, | ||
| 2079 | .sahf, | ||
| 2080 | .serialize, | ||
| 2081 | .sha, | ||
| 2082 | .shstk, | ||
| 2083 | .tsxldtrk, | ||
| 2084 | .tuning_fast_imm_vector_shift, | ||
| 2085 | .uintr, | ||
| 2086 | .vaes, | ||
| 2087 | .vpclmulqdq, | ||
| 2088 | .vzeroupper, | ||
| 2089 | .waitpkg, | ||
| 2090 | .wbnoinvd, | ||
| 2091 | .x87, | ||
| 2092 | .xsavec, | ||
| 2093 | .xsaveopt, | ||
| 2094 | .xsaves, | ||
| 2095 | }), | ||
| 2096 | }; | ||
| 2097 | pub const generic = CpuModel{ | ||
| 2098 | .name = "generic", | ||
| 2099 | .llvm_name = "generic", | ||
| 2100 | .features = featureSet(&[_]Feature{ | ||
| 2101 | .@"64bit", | ||
| 2102 | .cx8, | ||
| 2103 | .fast_15bytenop, | ||
| 2104 | .fast_scalar_fsqrt, | ||
| 2105 | .idivq_to_divl, | ||
| 2106 | .macrofusion, | ||
| 2107 | .slow_3ops_lea, | ||
| 2108 | .vzeroupper, | ||
| 2109 | .x87, | ||
| 2110 | }), | ||
| 2111 | }; | ||
| 2112 | pub const geode = CpuModel{ | ||
| 2113 | .name = "geode", | ||
| 2114 | .llvm_name = "geode", | ||
| 2115 | .features = featureSet(&[_]Feature{ | ||
| 2116 | .@"3dnowa", | ||
| 2117 | .cx8, | ||
| 2118 | .slow_unaligned_mem_16, | ||
| 2119 | .vzeroupper, | ||
| 2120 | .x87, | ||
| 2121 | }), | ||
| 2122 | }; | ||
| 2123 | pub const goldmont = CpuModel{ | ||
| 2124 | .name = "goldmont", | ||
| 2125 | .llvm_name = "goldmont", | ||
| 2126 | .features = featureSet(&[_]Feature{ | ||
| 2127 | .@"64bit", | ||
| 2128 | .aes, | ||
| 2129 | .clflushopt, | ||
| 2130 | .cmov, | ||
| 2131 | .crc32, | ||
| 2132 | .cx16, | ||
| 2133 | .false_deps_popcnt, | ||
| 2134 | .fast_movbe, | ||
| 2135 | .fsgsbase, | ||
| 2136 | .fxsr, | ||
| 2137 | .mmx, | ||
| 2138 | .movbe, | ||
| 2139 | .no_bypass_delay, | ||
| 2140 | .nopl, | ||
| 2141 | .pclmul, | ||
| 2142 | .popcnt, | ||
| 2143 | .prfchw, | ||
| 2144 | .rdrnd, | ||
| 2145 | .rdseed, | ||
| 2146 | .sahf, | ||
| 2147 | .sha, | ||
| 2148 | .slow_incdec, | ||
| 2149 | .slow_lea, | ||
| 2150 | .slow_two_mem_ops, | ||
| 2151 | .sse4_2, | ||
| 2152 | .use_glm_div_sqrt_costs, | ||
| 2153 | .vzeroupper, | ||
| 2154 | .x87, | ||
| 2155 | .xsavec, | ||
| 2156 | .xsaveopt, | ||
| 2157 | .xsaves, | ||
| 2158 | }), | ||
| 2159 | }; | ||
| 2160 | pub const goldmont_plus = CpuModel{ | ||
| 2161 | .name = "goldmont_plus", | ||
| 2162 | .llvm_name = "goldmont-plus", | ||
| 2163 | .features = featureSet(&[_]Feature{ | ||
| 2164 | .@"64bit", | ||
| 2165 | .aes, | ||
| 2166 | .clflushopt, | ||
| 2167 | .cmov, | ||
| 2168 | .crc32, | ||
| 2169 | .cx16, | ||
| 2170 | .fast_movbe, | ||
| 2171 | .fsgsbase, | ||
| 2172 | .fxsr, | ||
| 2173 | .mmx, | ||
| 2174 | .movbe, | ||
| 2175 | .no_bypass_delay, | ||
| 2176 | .nopl, | ||
| 2177 | .pclmul, | ||
| 2178 | .popcnt, | ||
| 2179 | .prfchw, | ||
| 2180 | .ptwrite, | ||
| 2181 | .rdpid, | ||
| 2182 | .rdrnd, | ||
| 2183 | .rdseed, | ||
| 2184 | .sahf, | ||
| 2185 | .sha, | ||
| 2186 | .slow_incdec, | ||
| 2187 | .slow_lea, | ||
| 2188 | .slow_two_mem_ops, | ||
| 2189 | .sse4_2, | ||
| 2190 | .use_glm_div_sqrt_costs, | ||
| 2191 | .vzeroupper, | ||
| 2192 | .x87, | ||
| 2193 | .xsavec, | ||
| 2194 | .xsaveopt, | ||
| 2195 | .xsaves, | ||
| 2196 | }), | ||
| 2197 | }; | ||
| 2198 | pub const grandridge = CpuModel{ | ||
| 2199 | .name = "grandridge", | ||
| 2200 | .llvm_name = "grandridge", | ||
| 2201 | .features = featureSet(&[_]Feature{ | ||
| 2202 | .@"64bit", | ||
| 2203 | .adx, | ||
| 2204 | .avxifma, | ||
| 2205 | .avxneconvert, | ||
| 2206 | .avxvnni, | ||
| 2207 | .avxvnniint8, | ||
| 2208 | .bmi, | ||
| 2209 | .bmi2, | ||
| 2210 | .cldemote, | ||
| 2211 | .clflushopt, | ||
| 2212 | .clwb, | ||
| 2213 | .cmov, | ||
| 2214 | .cmpccxadd, | ||
| 2215 | .crc32, | ||
| 2216 | .cx16, | ||
| 2217 | .enqcmd, | ||
| 2218 | .f16c, | ||
| 2219 | .fast_movbe, | ||
| 2220 | .fma, | ||
| 2221 | .fsgsbase, | ||
| 2222 | .fxsr, | ||
| 2223 | .gfni, | ||
| 2224 | .hreset, | ||
| 2225 | .invpcid, | ||
| 2226 | .lzcnt, | ||
| 2227 | .mmx, | ||
| 2228 | .movbe, | ||
| 2229 | .movdir64b, | ||
| 2230 | .movdiri, | ||
| 2231 | .no_bypass_delay, | ||
| 2232 | .nopl, | ||
| 2233 | .pconfig, | ||
| 2234 | .pku, | ||
| 2235 | .popcnt, | ||
| 2236 | .prfchw, | ||
| 2237 | .ptwrite, | ||
| 2238 | .raoint, | ||
| 2239 | .rdpid, | ||
| 2240 | .rdrnd, | ||
| 2241 | .rdseed, | ||
| 2242 | .sahf, | ||
| 2243 | .serialize, | ||
| 2244 | .sha, | ||
| 2245 | .shstk, | ||
| 2246 | .slow_incdec, | ||
| 2247 | .slow_lea, | ||
| 2248 | .slow_two_mem_ops, | ||
| 2249 | .uintr, | ||
| 2250 | .use_glm_div_sqrt_costs, | ||
| 2251 | .vaes, | ||
| 2252 | .vpclmulqdq, | ||
| 2253 | .vzeroupper, | ||
| 2254 | .waitpkg, | ||
| 2255 | .widekl, | ||
| 2256 | .x87, | ||
| 2257 | .xsavec, | ||
| 2258 | .xsaveopt, | ||
| 2259 | .xsaves, | ||
| 2260 | }), | ||
| 2261 | }; | ||
| 2262 | pub const graniterapids = CpuModel{ | ||
| 2263 | .name = "graniterapids", | ||
| 2264 | .llvm_name = "graniterapids", | ||
| 2265 | .features = featureSet(&[_]Feature{ | ||
| 2266 | .@"64bit", | ||
| 2267 | .adx, | ||
| 2268 | .allow_light_256_bit, | ||
| 2269 | .amx_bf16, | ||
| 2270 | .amx_fp16, | ||
| 2271 | .amx_int8, | ||
| 2272 | .avx512bf16, | ||
| 2273 | .avx512bitalg, | ||
| 2274 | .avx512cd, | ||
| 2275 | .avx512fp16, | ||
| 2276 | .avx512ifma, | ||
| 2277 | .avx512vbmi, | ||
| 2278 | .avx512vbmi2, | ||
| 2279 | .avx512vnni, | ||
| 2280 | .avx512vpopcntdq, | ||
| 2281 | .avxvnni, | ||
| 2282 | .bmi, | ||
| 2283 | .bmi2, | ||
| 2284 | .cldemote, | ||
| 2285 | .clflushopt, | ||
| 2286 | .clwb, | ||
| 2287 | .cmov, | ||
| 2288 | .crc32, | ||
| 2289 | .cx16, | ||
| 2290 | .enqcmd, | ||
| 2291 | .ermsb, | ||
| 2292 | .false_deps_getmant, | ||
| 2293 | .false_deps_mulc, | ||
| 2294 | .false_deps_mullq, | ||
| 2295 | .false_deps_perm, | ||
| 2296 | .false_deps_range, | ||
| 2297 | .fast_15bytenop, | ||
| 2298 | .fast_gather, | ||
| 2299 | .fast_scalar_fsqrt, | ||
| 2300 | .fast_shld_rotate, | ||
| 2301 | .fast_variable_crosslane_shuffle, | ||
| 2302 | .fast_variable_perlane_shuffle, | ||
| 2303 | .fast_vector_fsqrt, | ||
| 2304 | .fsgsbase, | ||
| 2305 | .fsrm, | ||
| 2306 | .fxsr, | ||
| 2307 | .gfni, | ||
| 2308 | .idivq_to_divl, | ||
| 2309 | .invpcid, | ||
| 2310 | .lzcnt, | ||
| 2311 | .macrofusion, | ||
| 2312 | .mmx, | ||
| 2313 | .movbe, | ||
| 2314 | .movdir64b, | ||
| 2315 | .movdiri, | ||
| 2316 | .no_bypass_delay_blend, | ||
| 2317 | .no_bypass_delay_mov, | ||
| 2318 | .no_bypass_delay_shuffle, | ||
| 2319 | .nopl, | ||
| 2320 | .pconfig, | ||
| 2321 | .pku, | ||
| 2322 | .popcnt, | ||
| 2323 | .prefer_256_bit, | ||
| 2324 | .prefetchi, | ||
| 2325 | .prfchw, | ||
| 2326 | .ptwrite, | ||
| 2327 | .rdpid, | ||
| 2328 | .rdrnd, | ||
| 2329 | .rdseed, | ||
| 2330 | .sahf, | ||
| 2331 | .serialize, | ||
| 2332 | .sha, | ||
| 2333 | .shstk, | ||
| 2334 | .tsxldtrk, | ||
| 2335 | .tuning_fast_imm_vector_shift, | ||
| 2336 | .uintr, | ||
| 2337 | .vaes, | ||
| 2338 | .vpclmulqdq, | ||
| 2339 | .vzeroupper, | ||
| 2340 | .waitpkg, | ||
| 2341 | .wbnoinvd, | ||
| 2342 | .x87, | ||
| 2343 | .xsavec, | ||
| 2344 | .xsaveopt, | ||
| 2345 | .xsaves, | ||
| 2346 | }), | ||
| 2347 | }; | ||
| 2348 | pub const graniterapids_d = CpuModel{ | ||
| 2349 | .name = "graniterapids_d", | ||
| 2350 | .llvm_name = "graniterapids-d", | ||
| 2351 | .features = featureSet(&[_]Feature{ | ||
| 2352 | .@"64bit", | ||
| 2353 | .adx, | ||
| 2354 | .allow_light_256_bit, | ||
| 2355 | .amx_bf16, | ||
| 2356 | .amx_complex, | ||
| 2357 | .amx_fp16, | ||
| 2358 | .amx_int8, | ||
| 2359 | .avx512bf16, | ||
| 2360 | .avx512bitalg, | ||
| 2361 | .avx512cd, | ||
| 2362 | .avx512fp16, | ||
| 2363 | .avx512ifma, | ||
| 2364 | .avx512vbmi, | ||
| 2365 | .avx512vbmi2, | ||
| 2366 | .avx512vnni, | ||
| 2367 | .avx512vpopcntdq, | ||
| 2368 | .avxvnni, | ||
| 2369 | .bmi, | ||
| 2370 | .bmi2, | ||
| 2371 | .cldemote, | ||
| 2372 | .clflushopt, | ||
| 2373 | .clwb, | ||
| 2374 | .cmov, | ||
| 2375 | .crc32, | ||
| 2376 | .cx16, | ||
| 2377 | .enqcmd, | ||
| 2378 | .ermsb, | ||
| 2379 | .false_deps_getmant, | ||
| 2380 | .false_deps_mulc, | ||
| 2381 | .false_deps_mullq, | ||
| 2382 | .false_deps_perm, | ||
| 2383 | .false_deps_range, | ||
| 2384 | .fast_15bytenop, | ||
| 2385 | .fast_gather, | ||
| 2386 | .fast_scalar_fsqrt, | ||
| 2387 | .fast_shld_rotate, | ||
| 2388 | .fast_variable_crosslane_shuffle, | ||
| 2389 | .fast_variable_perlane_shuffle, | ||
| 2390 | .fast_vector_fsqrt, | ||
| 2391 | .fsgsbase, | ||
| 2392 | .fsrm, | ||
| 2393 | .fxsr, | ||
| 2394 | .gfni, | ||
| 2395 | .idivq_to_divl, | ||
| 2396 | .invpcid, | ||
| 2397 | .lzcnt, | ||
| 2398 | .macrofusion, | ||
| 2399 | .mmx, | ||
| 2400 | .movbe, | ||
| 2401 | .movdir64b, | ||
| 2402 | .movdiri, | ||
| 2403 | .no_bypass_delay_blend, | ||
| 2404 | .no_bypass_delay_mov, | ||
| 2405 | .no_bypass_delay_shuffle, | ||
| 2406 | .nopl, | ||
| 2407 | .pconfig, | ||
| 2408 | .pku, | ||
| 2409 | .popcnt, | ||
| 2410 | .prefer_256_bit, | ||
| 2411 | .prefetchi, | ||
| 2412 | .prfchw, | ||
| 2413 | .ptwrite, | ||
| 2414 | .rdpid, | ||
| 2415 | .rdrnd, | ||
| 2416 | .rdseed, | ||
| 2417 | .sahf, | ||
| 2418 | .serialize, | ||
| 2419 | .sha, | ||
| 2420 | .shstk, | ||
| 2421 | .tsxldtrk, | ||
| 2422 | .tuning_fast_imm_vector_shift, | ||
| 2423 | .uintr, | ||
| 2424 | .vaes, | ||
| 2425 | .vpclmulqdq, | ||
| 2426 | .vzeroupper, | ||
| 2427 | .waitpkg, | ||
| 2428 | .wbnoinvd, | ||
| 2429 | .x87, | ||
| 2430 | .xsavec, | ||
| 2431 | .xsaveopt, | ||
| 2432 | .xsaves, | ||
| 2433 | }), | ||
| 2434 | }; | ||
| 2435 | pub const haswell = CpuModel{ | ||
| 2436 | .name = "haswell", | ||
| 2437 | .llvm_name = "haswell", | ||
| 2438 | .features = featureSet(&[_]Feature{ | ||
| 2439 | .@"64bit", | ||
| 2440 | .allow_light_256_bit, | ||
| 2441 | .avx2, | ||
| 2442 | .bmi, | ||
| 2443 | .bmi2, | ||
| 2444 | .cmov, | ||
| 2445 | .crc32, | ||
| 2446 | .cx16, | ||
| 2447 | .ermsb, | ||
| 2448 | .f16c, | ||
| 2449 | .false_deps_lzcnt_tzcnt, | ||
| 2450 | .false_deps_popcnt, | ||
| 2451 | .fast_15bytenop, | ||
| 2452 | .fast_scalar_fsqrt, | ||
| 2453 | .fast_shld_rotate, | ||
| 2454 | .fast_variable_crosslane_shuffle, | ||
| 2455 | .fast_variable_perlane_shuffle, | ||
| 2456 | .fma, | ||
| 2457 | .fsgsbase, | ||
| 2458 | .fxsr, | ||
| 2459 | .idivq_to_divl, | ||
| 2460 | .invpcid, | ||
| 2461 | .lzcnt, | ||
| 2462 | .macrofusion, | ||
| 2463 | .mmx, | ||
| 2464 | .movbe, | ||
| 2465 | .no_bypass_delay_mov, | ||
| 2466 | .no_bypass_delay_shuffle, | ||
| 2467 | .nopl, | ||
| 2468 | .pclmul, | ||
| 2469 | .popcnt, | ||
| 2470 | .rdrnd, | ||
| 2471 | .sahf, | ||
| 2472 | .slow_3ops_lea, | ||
| 2473 | .vzeroupper, | ||
| 2474 | .x87, | ||
| 2475 | .xsaveopt, | ||
| 2476 | }), | ||
| 2477 | }; | ||
| 2478 | pub const @"i386" = CpuModel{ | ||
| 2479 | .name = "i386", | ||
| 2480 | .llvm_name = "i386", | ||
| 2481 | .features = featureSet(&[_]Feature{ | ||
| 2482 | .slow_unaligned_mem_16, | ||
| 2483 | .vzeroupper, | ||
| 2484 | .x87, | ||
| 2485 | }), | ||
| 2486 | }; | ||
| 2487 | pub const @"i486" = CpuModel{ | ||
| 2488 | .name = "i486", | ||
| 2489 | .llvm_name = "i486", | ||
| 2490 | .features = featureSet(&[_]Feature{ | ||
| 2491 | .slow_unaligned_mem_16, | ||
| 2492 | .vzeroupper, | ||
| 2493 | .x87, | ||
| 2494 | }), | ||
| 2495 | }; | ||
| 2496 | pub const @"i586" = CpuModel{ | ||
| 2497 | .name = "i586", | ||
| 2498 | .llvm_name = "i586", | ||
| 2499 | .features = featureSet(&[_]Feature{ | ||
| 2500 | .cx8, | ||
| 2501 | .slow_unaligned_mem_16, | ||
| 2502 | .vzeroupper, | ||
| 2503 | .x87, | ||
| 2504 | }), | ||
| 2505 | }; | ||
| 2506 | pub const @"i686" = CpuModel{ | ||
| 2507 | .name = "i686", | ||
| 2508 | .llvm_name = "i686", | ||
| 2509 | .features = featureSet(&[_]Feature{ | ||
| 2510 | .cmov, | ||
| 2511 | .cx8, | ||
| 2512 | .slow_unaligned_mem_16, | ||
| 2513 | .vzeroupper, | ||
| 2514 | .x87, | ||
| 2515 | }), | ||
| 2516 | }; | ||
| 2517 | pub const icelake_client = CpuModel{ | ||
| 2518 | .name = "icelake_client", | ||
| 2519 | .llvm_name = "icelake-client", | ||
| 2520 | .features = featureSet(&[_]Feature{ | ||
| 2521 | .@"64bit", | ||
| 2522 | .adx, | ||
| 2523 | .allow_light_256_bit, | ||
| 2524 | .avx512bitalg, | ||
| 2525 | .avx512cd, | ||
| 2526 | .avx512dq, | ||
| 2527 | .avx512ifma, | ||
| 2528 | .avx512vbmi, | ||
| 2529 | .avx512vbmi2, | ||
| 2530 | .avx512vl, | ||
| 2531 | .avx512vnni, | ||
| 2532 | .avx512vpopcntdq, | ||
| 2533 | .bmi, | ||
| 2534 | .bmi2, | ||
| 2535 | .clflushopt, | ||
| 2536 | .cmov, | ||
| 2537 | .crc32, | ||
| 2538 | .cx16, | ||
| 2539 | .ermsb, | ||
| 2540 | .fast_15bytenop, | ||
| 2541 | .fast_gather, | ||
| 2542 | .fast_scalar_fsqrt, | ||
| 2543 | .fast_shld_rotate, | ||
| 2544 | .fast_variable_crosslane_shuffle, | ||
| 2545 | .fast_variable_perlane_shuffle, | ||
| 2546 | .fast_vector_fsqrt, | ||
| 2547 | .fsgsbase, | ||
| 2548 | .fsrm, | ||
| 2549 | .fxsr, | ||
| 2550 | .gfni, | ||
| 2551 | .idivq_to_divl, | ||
| 2552 | .invpcid, | ||
| 2553 | .lzcnt, | ||
| 2554 | .macrofusion, | ||
| 2555 | .mmx, | ||
| 2556 | .movbe, | ||
| 2557 | .no_bypass_delay_blend, | ||
| 2558 | .no_bypass_delay_mov, | ||
| 2559 | .no_bypass_delay_shuffle, | ||
| 2560 | .nopl, | ||
| 2561 | .pku, | ||
| 2562 | .popcnt, | ||
| 2563 | .prefer_256_bit, | ||
| 2564 | .prfchw, | ||
| 2565 | .rdpid, | ||
| 2566 | .rdrnd, | ||
| 2567 | .rdseed, | ||
| 2568 | .sahf, | ||
| 2569 | .sha, | ||
| 2570 | .tuning_fast_imm_vector_shift, | ||
| 2571 | .vaes, | ||
| 2572 | .vpclmulqdq, | ||
| 2573 | .vzeroupper, | ||
| 2574 | .x87, | ||
| 2575 | .xsavec, | ||
| 2576 | .xsaveopt, | ||
| 2577 | .xsaves, | ||
| 2578 | }), | ||
| 2579 | }; | ||
| 2580 | pub const icelake_server = CpuModel{ | ||
| 2581 | .name = "icelake_server", | ||
| 2582 | .llvm_name = "icelake-server", | ||
| 2583 | .features = featureSet(&[_]Feature{ | ||
| 2584 | .@"64bit", | ||
| 2585 | .adx, | ||
| 2586 | .allow_light_256_bit, | ||
| 2587 | .avx512bitalg, | ||
| 2588 | .avx512cd, | ||
| 2589 | .avx512dq, | ||
| 2590 | .avx512ifma, | ||
| 2591 | .avx512vbmi, | ||
| 2592 | .avx512vbmi2, | ||
| 2593 | .avx512vl, | ||
| 2594 | .avx512vnni, | ||
| 2595 | .avx512vpopcntdq, | ||
| 2596 | .bmi, | ||
| 2597 | .bmi2, | ||
| 2598 | .clflushopt, | ||
| 2599 | .clwb, | ||
| 2600 | .cmov, | ||
| 2601 | .crc32, | ||
| 2602 | .cx16, | ||
| 2603 | .ermsb, | ||
| 2604 | .fast_15bytenop, | ||
| 2605 | .fast_gather, | ||
| 2606 | .fast_scalar_fsqrt, | ||
| 2607 | .fast_shld_rotate, | ||
| 2608 | .fast_variable_crosslane_shuffle, | ||
| 2609 | .fast_variable_perlane_shuffle, | ||
| 2610 | .fast_vector_fsqrt, | ||
| 2611 | .fsgsbase, | ||
| 2612 | .fsrm, | ||
| 2613 | .fxsr, | ||
| 2614 | .gfni, | ||
| 2615 | .idivq_to_divl, | ||
| 2616 | .invpcid, | ||
| 2617 | .lzcnt, | ||
| 2618 | .macrofusion, | ||
| 2619 | .mmx, | ||
| 2620 | .movbe, | ||
| 2621 | .no_bypass_delay_blend, | ||
| 2622 | .no_bypass_delay_mov, | ||
| 2623 | .no_bypass_delay_shuffle, | ||
| 2624 | .nopl, | ||
| 2625 | .pconfig, | ||
| 2626 | .pku, | ||
| 2627 | .popcnt, | ||
| 2628 | .prefer_256_bit, | ||
| 2629 | .prfchw, | ||
| 2630 | .rdpid, | ||
| 2631 | .rdrnd, | ||
| 2632 | .rdseed, | ||
| 2633 | .sahf, | ||
| 2634 | .sha, | ||
| 2635 | .tuning_fast_imm_vector_shift, | ||
| 2636 | .vaes, | ||
| 2637 | .vpclmulqdq, | ||
| 2638 | .vzeroupper, | ||
| 2639 | .wbnoinvd, | ||
| 2640 | .x87, | ||
| 2641 | .xsavec, | ||
| 2642 | .xsaveopt, | ||
| 2643 | .xsaves, | ||
| 2644 | }), | ||
| 2645 | }; | ||
| 2646 | pub const ivybridge = CpuModel{ | ||
| 2647 | .name = "ivybridge", | ||
| 2648 | .llvm_name = "ivybridge", | ||
| 2649 | .features = featureSet(&[_]Feature{ | ||
| 2650 | .@"64bit", | ||
| 2651 | .cmov, | ||
| 2652 | .crc32, | ||
| 2653 | .cx16, | ||
| 2654 | .f16c, | ||
| 2655 | .false_deps_popcnt, | ||
| 2656 | .fast_15bytenop, | ||
| 2657 | .fast_scalar_fsqrt, | ||
| 2658 | .fast_shld_rotate, | ||
| 2659 | .fsgsbase, | ||
| 2660 | .fxsr, | ||
| 2661 | .idivq_to_divl, | ||
| 2662 | .macrofusion, | ||
| 2663 | .mmx, | ||
| 2664 | .no_bypass_delay_mov, | ||
| 2665 | .nopl, | ||
| 2666 | .pclmul, | ||
| 2667 | .popcnt, | ||
| 2668 | .rdrnd, | ||
| 2669 | .sahf, | ||
| 2670 | .slow_3ops_lea, | ||
| 2671 | .slow_unaligned_mem_32, | ||
| 2672 | .vzeroupper, | ||
| 2673 | .x87, | ||
| 2674 | .xsaveopt, | ||
| 2675 | }), | ||
| 2676 | }; | ||
| 2677 | pub const k6 = CpuModel{ | ||
| 2678 | .name = "k6", | ||
| 2679 | .llvm_name = "k6", | ||
| 2680 | .features = featureSet(&[_]Feature{ | ||
| 2681 | .cx8, | ||
| 2682 | .mmx, | ||
| 2683 | .slow_unaligned_mem_16, | ||
| 2684 | .vzeroupper, | ||
| 2685 | .x87, | ||
| 2686 | }), | ||
| 2687 | }; | ||
| 2688 | pub const k6_2 = CpuModel{ | ||
| 2689 | .name = "k6_2", | ||
| 2690 | .llvm_name = "k6-2", | ||
| 2691 | .features = featureSet(&[_]Feature{ | ||
| 2692 | .@"3dnow", | ||
| 2693 | .cx8, | ||
| 2694 | .slow_unaligned_mem_16, | ||
| 2695 | .vzeroupper, | ||
| 2696 | .x87, | ||
| 2697 | }), | ||
| 2698 | }; | ||
| 2699 | pub const k6_3 = CpuModel{ | ||
| 2700 | .name = "k6_3", | ||
| 2701 | .llvm_name = "k6-3", | ||
| 2702 | .features = featureSet(&[_]Feature{ | ||
| 2703 | .@"3dnow", | ||
| 2704 | .cx8, | ||
| 2705 | .slow_unaligned_mem_16, | ||
| 2706 | .vzeroupper, | ||
| 2707 | .x87, | ||
| 2708 | }), | ||
| 2709 | }; | ||
| 2710 | pub const k8 = CpuModel{ | ||
| 2711 | .name = "k8", | ||
| 2712 | .llvm_name = "k8", | ||
| 2713 | .features = featureSet(&[_]Feature{ | ||
| 2714 | .@"3dnowa", | ||
| 2715 | .@"64bit", | ||
| 2716 | .cmov, | ||
| 2717 | .cx8, | ||
| 2718 | .fast_scalar_shift_masks, | ||
| 2719 | .fxsr, | ||
| 2720 | .nopl, | ||
| 2721 | .sbb_dep_breaking, | ||
| 2722 | .slow_shld, | ||
| 2723 | .slow_unaligned_mem_16, | ||
| 2724 | .sse2, | ||
| 2725 | .vzeroupper, | ||
| 2726 | .x87, | ||
| 2727 | }), | ||
| 2728 | }; | ||
| 2729 | pub const k8_sse3 = CpuModel{ | ||
| 2730 | .name = "k8_sse3", | ||
| 2731 | .llvm_name = "k8-sse3", | ||
| 2732 | .features = featureSet(&[_]Feature{ | ||
| 2733 | .@"3dnowa", | ||
| 2734 | .@"64bit", | ||
| 2735 | .cmov, | ||
| 2736 | .cx16, | ||
| 2737 | .fast_scalar_shift_masks, | ||
| 2738 | .fxsr, | ||
| 2739 | .nopl, | ||
| 2740 | .sbb_dep_breaking, | ||
| 2741 | .slow_shld, | ||
| 2742 | .slow_unaligned_mem_16, | ||
| 2743 | .sse3, | ||
| 2744 | .vzeroupper, | ||
| 2745 | .x87, | ||
| 2746 | }), | ||
| 2747 | }; | ||
| 2748 | pub const knl = CpuModel{ | ||
| 2749 | .name = "knl", | ||
| 2750 | .llvm_name = "knl", | ||
| 2751 | .features = featureSet(&[_]Feature{ | ||
| 2752 | .@"64bit", | ||
| 2753 | .adx, | ||
| 2754 | .aes, | ||
| 2755 | .avx512cd, | ||
| 2756 | .avx512er, | ||
| 2757 | .avx512pf, | ||
| 2758 | .bmi, | ||
| 2759 | .bmi2, | ||
| 2760 | .cmov, | ||
| 2761 | .crc32, | ||
| 2762 | .cx16, | ||
| 2763 | .fast_gather, | ||
| 2764 | .fast_movbe, | ||
| 2765 | .fsgsbase, | ||
| 2766 | .fxsr, | ||
| 2767 | .idivq_to_divl, | ||
| 2768 | .lzcnt, | ||
| 2769 | .mmx, | ||
| 2770 | .movbe, | ||
| 2771 | .nopl, | ||
| 2772 | .pclmul, | ||
| 2773 | .popcnt, | ||
| 2774 | .prefer_mask_registers, | ||
| 2775 | .prefetchwt1, | ||
| 2776 | .prfchw, | ||
| 2777 | .rdrnd, | ||
| 2778 | .rdseed, | ||
| 2779 | .sahf, | ||
| 2780 | .slow_3ops_lea, | ||
| 2781 | .slow_incdec, | ||
| 2782 | .slow_pmaddwd, | ||
| 2783 | .slow_two_mem_ops, | ||
| 2784 | .x87, | ||
| 2785 | .xsaveopt, | ||
| 2786 | }), | ||
| 2787 | }; | ||
| 2788 | pub const knm = CpuModel{ | ||
| 2789 | .name = "knm", | ||
| 2790 | .llvm_name = "knm", | ||
| 2791 | .features = featureSet(&[_]Feature{ | ||
| 2792 | .@"64bit", | ||
| 2793 | .adx, | ||
| 2794 | .aes, | ||
| 2795 | .avx512cd, | ||
| 2796 | .avx512er, | ||
| 2797 | .avx512pf, | ||
| 2798 | .avx512vpopcntdq, | ||
| 2799 | .bmi, | ||
| 2800 | .bmi2, | ||
| 2801 | .cmov, | ||
| 2802 | .crc32, | ||
| 2803 | .cx16, | ||
| 2804 | .fast_gather, | ||
| 2805 | .fast_movbe, | ||
| 2806 | .fsgsbase, | ||
| 2807 | .fxsr, | ||
| 2808 | .idivq_to_divl, | ||
| 2809 | .lzcnt, | ||
| 2810 | .mmx, | ||
| 2811 | .movbe, | ||
| 2812 | .nopl, | ||
| 2813 | .pclmul, | ||
| 2814 | .popcnt, | ||
| 2815 | .prefer_mask_registers, | ||
| 2816 | .prefetchwt1, | ||
| 2817 | .prfchw, | ||
| 2818 | .rdrnd, | ||
| 2819 | .rdseed, | ||
| 2820 | .sahf, | ||
| 2821 | .slow_3ops_lea, | ||
| 2822 | .slow_incdec, | ||
| 2823 | .slow_pmaddwd, | ||
| 2824 | .slow_two_mem_ops, | ||
| 2825 | .x87, | ||
| 2826 | .xsaveopt, | ||
| 2827 | }), | ||
| 2828 | }; | ||
| 2829 | pub const lakemont = CpuModel{ | ||
| 2830 | .name = "lakemont", | ||
| 2831 | .llvm_name = "lakemont", | ||
| 2832 | .features = featureSet(&[_]Feature{ | ||
| 2833 | .cx8, | ||
| 2834 | .slow_unaligned_mem_16, | ||
| 2835 | .soft_float, | ||
| 2836 | .vzeroupper, | ||
| 2837 | }), | ||
| 2838 | }; | ||
| 2839 | pub const meteorlake = CpuModel{ | ||
| 2840 | .name = "meteorlake", | ||
| 2841 | .llvm_name = "meteorlake", | ||
| 2842 | .features = featureSet(&[_]Feature{ | ||
| 2843 | .@"64bit", | ||
| 2844 | .adx, | ||
| 2845 | .allow_light_256_bit, | ||
| 2846 | .avxvnni, | ||
| 2847 | .bmi, | ||
| 2848 | .bmi2, | ||
| 2849 | .cldemote, | ||
| 2850 | .clflushopt, | ||
| 2851 | .clwb, | ||
| 2852 | .cmov, | ||
| 2853 | .crc32, | ||
| 2854 | .cx16, | ||
| 2855 | .f16c, | ||
| 2856 | .false_deps_perm, | ||
| 2857 | .false_deps_popcnt, | ||
| 2858 | .fast_15bytenop, | ||
| 2859 | .fast_gather, | ||
| 2860 | .fast_scalar_fsqrt, | ||
| 2861 | .fast_shld_rotate, | ||
| 2862 | .fast_variable_crosslane_shuffle, | ||
| 2863 | .fast_variable_perlane_shuffle, | ||
| 2864 | .fast_vector_fsqrt, | ||
| 2865 | .fma, | ||
| 2866 | .fsgsbase, | ||
| 2867 | .fxsr, | ||
| 2868 | .gfni, | ||
| 2869 | .hreset, | ||
| 2870 | .idivq_to_divl, | ||
| 2871 | .invpcid, | ||
| 2872 | .lzcnt, | ||
| 2873 | .macrofusion, | ||
| 2874 | .mmx, | ||
| 2875 | .movbe, | ||
| 2876 | .movdir64b, | ||
| 2877 | .movdiri, | ||
| 2878 | .no_bypass_delay_blend, | ||
| 2879 | .no_bypass_delay_mov, | ||
| 2880 | .no_bypass_delay_shuffle, | ||
| 2881 | .nopl, | ||
| 2882 | .pconfig, | ||
| 2883 | .pku, | ||
| 2884 | .popcnt, | ||
| 2885 | .prefer_movmsk_over_vtest, | ||
| 2886 | .prfchw, | ||
| 2887 | .ptwrite, | ||
| 2888 | .rdpid, | ||
| 2889 | .rdrnd, | ||
| 2890 | .rdseed, | ||
| 2891 | .sahf, | ||
| 2892 | .serialize, | ||
| 2893 | .sha, | ||
| 2894 | .shstk, | ||
| 2895 | .slow_3ops_lea, | ||
| 2896 | .tuning_fast_imm_vector_shift, | ||
| 2897 | .vaes, | ||
| 2898 | .vpclmulqdq, | ||
| 2899 | .vzeroupper, | ||
| 2900 | .waitpkg, | ||
| 2901 | .widekl, | ||
| 2902 | .x87, | ||
| 2903 | .xsavec, | ||
| 2904 | .xsaveopt, | ||
| 2905 | .xsaves, | ||
| 2906 | }), | ||
| 2907 | }; | ||
| 2908 | pub const nehalem = CpuModel{ | ||
| 2909 | .name = "nehalem", | ||
| 2910 | .llvm_name = "nehalem", | ||
| 2911 | .features = featureSet(&[_]Feature{ | ||
| 2912 | .@"64bit", | ||
| 2913 | .cmov, | ||
| 2914 | .crc32, | ||
| 2915 | .cx16, | ||
| 2916 | .fxsr, | ||
| 2917 | .macrofusion, | ||
| 2918 | .mmx, | ||
| 2919 | .no_bypass_delay_mov, | ||
| 2920 | .nopl, | ||
| 2921 | .popcnt, | ||
| 2922 | .sahf, | ||
| 2923 | .sse4_2, | ||
| 2924 | .vzeroupper, | ||
| 2925 | .x87, | ||
| 2926 | }), | ||
| 2927 | }; | ||
| 2928 | pub const nocona = CpuModel{ | ||
| 2929 | .name = "nocona", | ||
| 2930 | .llvm_name = "nocona", | ||
| 2931 | .features = featureSet(&[_]Feature{ | ||
| 2932 | .@"64bit", | ||
| 2933 | .cmov, | ||
| 2934 | .cx16, | ||
| 2935 | .fxsr, | ||
| 2936 | .mmx, | ||
| 2937 | .nopl, | ||
| 2938 | .slow_unaligned_mem_16, | ||
| 2939 | .sse3, | ||
| 2940 | .vzeroupper, | ||
| 2941 | .x87, | ||
| 2942 | }), | ||
| 2943 | }; | ||
| 2944 | pub const opteron = CpuModel{ | ||
| 2945 | .name = "opteron", | ||
| 2946 | .llvm_name = "opteron", | ||
| 2947 | .features = featureSet(&[_]Feature{ | ||
| 2948 | .@"3dnowa", | ||
| 2949 | .@"64bit", | ||
| 2950 | .cmov, | ||
| 2951 | .cx8, | ||
| 2952 | .fast_scalar_shift_masks, | ||
| 2953 | .fxsr, | ||
| 2954 | .nopl, | ||
| 2955 | .sbb_dep_breaking, | ||
| 2956 | .slow_shld, | ||
| 2957 | .slow_unaligned_mem_16, | ||
| 2958 | .sse2, | ||
| 2959 | .vzeroupper, | ||
| 2960 | .x87, | ||
| 2961 | }), | ||
| 2962 | }; | ||
| 2963 | pub const opteron_sse3 = CpuModel{ | ||
| 2964 | .name = "opteron_sse3", | ||
| 2965 | .llvm_name = "opteron-sse3", | ||
| 2966 | .features = featureSet(&[_]Feature{ | ||
| 2967 | .@"3dnowa", | ||
| 2968 | .@"64bit", | ||
| 2969 | .cmov, | ||
| 2970 | .cx16, | ||
| 2971 | .fast_scalar_shift_masks, | ||
| 2972 | .fxsr, | ||
| 2973 | .nopl, | ||
| 2974 | .sbb_dep_breaking, | ||
| 2975 | .slow_shld, | ||
| 2976 | .slow_unaligned_mem_16, | ||
| 2977 | .sse3, | ||
| 2978 | .vzeroupper, | ||
| 2979 | .x87, | ||
| 2980 | }), | ||
| 2981 | }; | ||
| 2982 | pub const penryn = CpuModel{ | ||
| 2983 | .name = "penryn", | ||
| 2984 | .llvm_name = "penryn", | ||
| 2985 | .features = featureSet(&[_]Feature{ | ||
| 2986 | .@"64bit", | ||
| 2987 | .cmov, | ||
| 2988 | .cx16, | ||
| 2989 | .fxsr, | ||
| 2990 | .macrofusion, | ||
| 2991 | .mmx, | ||
| 2992 | .nopl, | ||
| 2993 | .sahf, | ||
| 2994 | .slow_unaligned_mem_16, | ||
| 2995 | .sse4_1, | ||
| 2996 | .vzeroupper, | ||
| 2997 | .x87, | ||
| 2998 | }), | ||
| 2999 | }; | ||
| 3000 | pub const pentium = CpuModel{ | ||
| 3001 | .name = "pentium", | ||
| 3002 | .llvm_name = "pentium", | ||
| 3003 | .features = featureSet(&[_]Feature{ | ||
| 3004 | .cx8, | ||
| 3005 | .slow_unaligned_mem_16, | ||
| 3006 | .vzeroupper, | ||
| 3007 | .x87, | ||
| 3008 | }), | ||
| 3009 | }; | ||
| 3010 | pub const pentium2 = CpuModel{ | ||
| 3011 | .name = "pentium2", | ||
| 3012 | .llvm_name = "pentium2", | ||
| 3013 | .features = featureSet(&[_]Feature{ | ||
| 3014 | .cmov, | ||
| 3015 | .cx8, | ||
| 3016 | .fxsr, | ||
| 3017 | .mmx, | ||
| 3018 | .nopl, | ||
| 3019 | .slow_unaligned_mem_16, | ||
| 3020 | .vzeroupper, | ||
| 3021 | .x87, | ||
| 3022 | }), | ||
| 3023 | }; | ||
| 3024 | pub const pentium3 = CpuModel{ | ||
| 3025 | .name = "pentium3", | ||
| 3026 | .llvm_name = "pentium3", | ||
| 3027 | .features = featureSet(&[_]Feature{ | ||
| 3028 | .cmov, | ||
| 3029 | .cx8, | ||
| 3030 | .fxsr, | ||
| 3031 | .mmx, | ||
| 3032 | .nopl, | ||
| 3033 | .slow_unaligned_mem_16, | ||
| 3034 | .sse, | ||
| 3035 | .vzeroupper, | ||
| 3036 | .x87, | ||
| 3037 | }), | ||
| 3038 | }; | ||
| 3039 | pub const pentium3m = CpuModel{ | ||
| 3040 | .name = "pentium3m", | ||
| 3041 | .llvm_name = "pentium3m", | ||
| 3042 | .features = featureSet(&[_]Feature{ | ||
| 3043 | .cmov, | ||
| 3044 | .cx8, | ||
| 3045 | .fxsr, | ||
| 3046 | .mmx, | ||
| 3047 | .nopl, | ||
| 3048 | .slow_unaligned_mem_16, | ||
| 3049 | .sse, | ||
| 3050 | .vzeroupper, | ||
| 3051 | .x87, | ||
| 3052 | }), | ||
| 3053 | }; | ||
| 3054 | pub const pentium4 = CpuModel{ | ||
| 3055 | .name = "pentium4", | ||
| 3056 | .llvm_name = "pentium4", | ||
| 3057 | .features = featureSet(&[_]Feature{ | ||
| 3058 | .cmov, | ||
| 3059 | .cx8, | ||
| 3060 | .fxsr, | ||
| 3061 | .mmx, | ||
| 3062 | .nopl, | ||
| 3063 | .slow_unaligned_mem_16, | ||
| 3064 | .sse2, | ||
| 3065 | .vzeroupper, | ||
| 3066 | .x87, | ||
| 3067 | }), | ||
| 3068 | }; | ||
| 3069 | pub const pentium_m = CpuModel{ | ||
| 3070 | .name = "pentium_m", | ||
| 3071 | .llvm_name = "pentium-m", | ||
| 3072 | .features = featureSet(&[_]Feature{ | ||
| 3073 | .cmov, | ||
| 3074 | .cx8, | ||
| 3075 | .fxsr, | ||
| 3076 | .mmx, | ||
| 3077 | .nopl, | ||
| 3078 | .slow_unaligned_mem_16, | ||
| 3079 | .sse2, | ||
| 3080 | .vzeroupper, | ||
| 3081 | .x87, | ||
| 3082 | }), | ||
| 3083 | }; | ||
| 3084 | pub const pentium_mmx = CpuModel{ | ||
| 3085 | .name = "pentium_mmx", | ||
| 3086 | .llvm_name = "pentium-mmx", | ||
| 3087 | .features = featureSet(&[_]Feature{ | ||
| 3088 | .cx8, | ||
| 3089 | .mmx, | ||
| 3090 | .slow_unaligned_mem_16, | ||
| 3091 | .vzeroupper, | ||
| 3092 | .x87, | ||
| 3093 | }), | ||
| 3094 | }; | ||
| 3095 | pub const pentiumpro = CpuModel{ | ||
| 3096 | .name = "pentiumpro", | ||
| 3097 | .llvm_name = "pentiumpro", | ||
| 3098 | .features = featureSet(&[_]Feature{ | ||
| 3099 | .cmov, | ||
| 3100 | .cx8, | ||
| 3101 | .nopl, | ||
| 3102 | .slow_unaligned_mem_16, | ||
| 3103 | .vzeroupper, | ||
| 3104 | .x87, | ||
| 3105 | }), | ||
| 3106 | }; | ||
| 3107 | pub const prescott = CpuModel{ | ||
| 3108 | .name = "prescott", | ||
| 3109 | .llvm_name = "prescott", | ||
| 3110 | .features = featureSet(&[_]Feature{ | ||
| 3111 | .cmov, | ||
| 3112 | .cx8, | ||
| 3113 | .fxsr, | ||
| 3114 | .mmx, | ||
| 3115 | .nopl, | ||
| 3116 | .slow_unaligned_mem_16, | ||
| 3117 | .sse3, | ||
| 3118 | .vzeroupper, | ||
| 3119 | .x87, | ||
| 3120 | }), | ||
| 3121 | }; | ||
| 3122 | pub const raptorlake = CpuModel{ | ||
| 3123 | .name = "raptorlake", | ||
| 3124 | .llvm_name = "raptorlake", | ||
| 3125 | .features = featureSet(&[_]Feature{ | ||
| 3126 | .@"64bit", | ||
| 3127 | .adx, | ||
| 3128 | .allow_light_256_bit, | ||
| 3129 | .avxvnni, | ||
| 3130 | .bmi, | ||
| 3131 | .bmi2, | ||
| 3132 | .cldemote, | ||
| 3133 | .clflushopt, | ||
| 3134 | .clwb, | ||
| 3135 | .cmov, | ||
| 3136 | .crc32, | ||
| 3137 | .cx16, | ||
| 3138 | .f16c, | ||
| 3139 | .false_deps_perm, | ||
| 3140 | .false_deps_popcnt, | ||
| 3141 | .fast_15bytenop, | ||
| 3142 | .fast_gather, | ||
| 3143 | .fast_scalar_fsqrt, | ||
| 3144 | .fast_shld_rotate, | ||
| 3145 | .fast_variable_crosslane_shuffle, | ||
| 3146 | .fast_variable_perlane_shuffle, | ||
| 3147 | .fast_vector_fsqrt, | ||
| 3148 | .fma, | ||
| 3149 | .fsgsbase, | ||
| 3150 | .fxsr, | ||
| 3151 | .gfni, | ||
| 3152 | .hreset, | ||
| 3153 | .idivq_to_divl, | ||
| 3154 | .invpcid, | ||
| 3155 | .lzcnt, | ||
| 3156 | .macrofusion, | ||
| 3157 | .mmx, | ||
| 3158 | .movbe, | ||
| 3159 | .movdir64b, | ||
| 3160 | .movdiri, | ||
| 3161 | .no_bypass_delay_blend, | ||
| 3162 | .no_bypass_delay_mov, | ||
| 3163 | .no_bypass_delay_shuffle, | ||
| 3164 | .nopl, | ||
| 3165 | .pconfig, | ||
| 3166 | .pku, | ||
| 3167 | .popcnt, | ||
| 3168 | .prefer_movmsk_over_vtest, | ||
| 3169 | .prfchw, | ||
| 3170 | .ptwrite, | ||
| 3171 | .rdpid, | ||
| 3172 | .rdrnd, | ||
| 3173 | .rdseed, | ||
| 3174 | .sahf, | ||
| 3175 | .serialize, | ||
| 3176 | .sha, | ||
| 3177 | .shstk, | ||
| 3178 | .slow_3ops_lea, | ||
| 3179 | .tuning_fast_imm_vector_shift, | ||
| 3180 | .vaes, | ||
| 3181 | .vpclmulqdq, | ||
| 3182 | .vzeroupper, | ||
| 3183 | .waitpkg, | ||
| 3184 | .widekl, | ||
| 3185 | .x87, | ||
| 3186 | .xsavec, | ||
| 3187 | .xsaveopt, | ||
| 3188 | .xsaves, | ||
| 3189 | }), | ||
| 3190 | }; | ||
| 3191 | pub const rocketlake = CpuModel{ | ||
| 3192 | .name = "rocketlake", | ||
| 3193 | .llvm_name = "rocketlake", | ||
| 3194 | .features = featureSet(&[_]Feature{ | ||
| 3195 | .@"64bit", | ||
| 3196 | .adx, | ||
| 3197 | .allow_light_256_bit, | ||
| 3198 | .avx512bitalg, | ||
| 3199 | .avx512cd, | ||
| 3200 | .avx512dq, | ||
| 3201 | .avx512ifma, | ||
| 3202 | .avx512vbmi, | ||
| 3203 | .avx512vbmi2, | ||
| 3204 | .avx512vl, | ||
| 3205 | .avx512vnni, | ||
| 3206 | .avx512vpopcntdq, | ||
| 3207 | .bmi, | ||
| 3208 | .bmi2, | ||
| 3209 | .clflushopt, | ||
| 3210 | .cmov, | ||
| 3211 | .crc32, | ||
| 3212 | .cx16, | ||
| 3213 | .ermsb, | ||
| 3214 | .fast_15bytenop, | ||
| 3215 | .fast_gather, | ||
| 3216 | .fast_scalar_fsqrt, | ||
| 3217 | .fast_shld_rotate, | ||
| 3218 | .fast_variable_crosslane_shuffle, | ||
| 3219 | .fast_variable_perlane_shuffle, | ||
| 3220 | .fast_vector_fsqrt, | ||
| 3221 | .fsgsbase, | ||
| 3222 | .fsrm, | ||
| 3223 | .fxsr, | ||
| 3224 | .gfni, | ||
| 3225 | .idivq_to_divl, | ||
| 3226 | .invpcid, | ||
| 3227 | .lzcnt, | ||
| 3228 | .macrofusion, | ||
| 3229 | .mmx, | ||
| 3230 | .movbe, | ||
| 3231 | .no_bypass_delay_blend, | ||
| 3232 | .no_bypass_delay_mov, | ||
| 3233 | .no_bypass_delay_shuffle, | ||
| 3234 | .nopl, | ||
| 3235 | .pku, | ||
| 3236 | .popcnt, | ||
| 3237 | .prefer_256_bit, | ||
| 3238 | .prfchw, | ||
| 3239 | .rdpid, | ||
| 3240 | .rdrnd, | ||
| 3241 | .rdseed, | ||
| 3242 | .sahf, | ||
| 3243 | .sha, | ||
| 3244 | .tuning_fast_imm_vector_shift, | ||
| 3245 | .vaes, | ||
| 3246 | .vpclmulqdq, | ||
| 3247 | .vzeroupper, | ||
| 3248 | .x87, | ||
| 3249 | .xsavec, | ||
| 3250 | .xsaveopt, | ||
| 3251 | .xsaves, | ||
| 3252 | }), | ||
| 3253 | }; | ||
| 3254 | pub const sandybridge = CpuModel{ | ||
| 3255 | .name = "sandybridge", | ||
| 3256 | .llvm_name = "sandybridge", | ||
| 3257 | .features = featureSet(&[_]Feature{ | ||
| 3258 | .@"64bit", | ||
| 3259 | .avx, | ||
| 3260 | .cmov, | ||
| 3261 | .crc32, | ||
| 3262 | .cx16, | ||
| 3263 | .false_deps_popcnt, | ||
| 3264 | .fast_15bytenop, | ||
| 3265 | .fast_scalar_fsqrt, | ||
| 3266 | .fast_shld_rotate, | ||
| 3267 | .fxsr, | ||
| 3268 | .idivq_to_divl, | ||
| 3269 | .macrofusion, | ||
| 3270 | .mmx, | ||
| 3271 | .no_bypass_delay_mov, | ||
| 3272 | .nopl, | ||
| 3273 | .pclmul, | ||
| 3274 | .popcnt, | ||
| 3275 | .sahf, | ||
| 3276 | .slow_3ops_lea, | ||
| 3277 | .slow_unaligned_mem_32, | ||
| 3278 | .vzeroupper, | ||
| 3279 | .x87, | ||
| 3280 | .xsaveopt, | ||
| 3281 | }), | ||
| 3282 | }; | ||
| 3283 | pub const sapphirerapids = CpuModel{ | ||
| 3284 | .name = "sapphirerapids", | ||
| 3285 | .llvm_name = "sapphirerapids", | ||
| 3286 | .features = featureSet(&[_]Feature{ | ||
| 3287 | .@"64bit", | ||
| 3288 | .adx, | ||
| 3289 | .allow_light_256_bit, | ||
| 3290 | .amx_bf16, | ||
| 3291 | .amx_int8, | ||
| 3292 | .avx512bf16, | ||
| 3293 | .avx512bitalg, | ||
| 3294 | .avx512cd, | ||
| 3295 | .avx512fp16, | ||
| 3296 | .avx512ifma, | ||
| 3297 | .avx512vbmi, | ||
| 3298 | .avx512vbmi2, | ||
| 3299 | .avx512vnni, | ||
| 3300 | .avx512vpopcntdq, | ||
| 3301 | .avxvnni, | ||
| 3302 | .bmi, | ||
| 3303 | .bmi2, | ||
| 3304 | .cldemote, | ||
| 3305 | .clflushopt, | ||
| 3306 | .clwb, | ||
| 3307 | .cmov, | ||
| 3308 | .crc32, | ||
| 3309 | .cx16, | ||
| 3310 | .enqcmd, | ||
| 3311 | .ermsb, | ||
| 3312 | .false_deps_getmant, | ||
| 3313 | .false_deps_mulc, | ||
| 3314 | .false_deps_mullq, | ||
| 3315 | .false_deps_perm, | ||
| 3316 | .false_deps_range, | ||
| 3317 | .fast_15bytenop, | ||
| 3318 | .fast_gather, | ||
| 3319 | .fast_scalar_fsqrt, | ||
| 3320 | .fast_shld_rotate, | ||
| 3321 | .fast_variable_crosslane_shuffle, | ||
| 3322 | .fast_variable_perlane_shuffle, | ||
| 3323 | .fast_vector_fsqrt, | ||
| 3324 | .fsgsbase, | ||
| 3325 | .fsrm, | ||
| 3326 | .fxsr, | ||
| 3327 | .gfni, | ||
| 3328 | .idivq_to_divl, | ||
| 3329 | .invpcid, | ||
| 3330 | .lzcnt, | ||
| 3331 | .macrofusion, | ||
| 3332 | .mmx, | ||
| 3333 | .movbe, | ||
| 3334 | .movdir64b, | ||
| 3335 | .movdiri, | ||
| 3336 | .no_bypass_delay_blend, | ||
| 3337 | .no_bypass_delay_mov, | ||
| 3338 | .no_bypass_delay_shuffle, | ||
| 3339 | .nopl, | ||
| 3340 | .pconfig, | ||
| 3341 | .pku, | ||
| 3342 | .popcnt, | ||
| 3343 | .prefer_256_bit, | ||
| 3344 | .prfchw, | ||
| 3345 | .ptwrite, | ||
| 3346 | .rdpid, | ||
| 3347 | .rdrnd, | ||
| 3348 | .rdseed, | ||
| 3349 | .sahf, | ||
| 3350 | .serialize, | ||
| 3351 | .sha, | ||
| 3352 | .shstk, | ||
| 3353 | .tsxldtrk, | ||
| 3354 | .tuning_fast_imm_vector_shift, | ||
| 3355 | .uintr, | ||
| 3356 | .vaes, | ||
| 3357 | .vpclmulqdq, | ||
| 3358 | .vzeroupper, | ||
| 3359 | .waitpkg, | ||
| 3360 | .wbnoinvd, | ||
| 3361 | .x87, | ||
| 3362 | .xsavec, | ||
| 3363 | .xsaveopt, | ||
| 3364 | .xsaves, | ||
| 3365 | }), | ||
| 3366 | }; | ||
| 3367 | pub const sierraforest = CpuModel{ | ||
| 3368 | .name = "sierraforest", | ||
| 3369 | .llvm_name = "sierraforest", | ||
| 3370 | .features = featureSet(&[_]Feature{ | ||
| 3371 | .@"64bit", | ||
| 3372 | .adx, | ||
| 3373 | .avxifma, | ||
| 3374 | .avxneconvert, | ||
| 3375 | .avxvnni, | ||
| 3376 | .avxvnniint8, | ||
| 3377 | .bmi, | ||
| 3378 | .bmi2, | ||
| 3379 | .cldemote, | ||
| 3380 | .clflushopt, | ||
| 3381 | .clwb, | ||
| 3382 | .cmov, | ||
| 3383 | .cmpccxadd, | ||
| 3384 | .crc32, | ||
| 3385 | .cx16, | ||
| 3386 | .enqcmd, | ||
| 3387 | .f16c, | ||
| 3388 | .fast_movbe, | ||
| 3389 | .fma, | ||
| 3390 | .fsgsbase, | ||
| 3391 | .fxsr, | ||
| 3392 | .gfni, | ||
| 3393 | .hreset, | ||
| 3394 | .invpcid, | ||
| 3395 | .lzcnt, | ||
| 3396 | .mmx, | ||
| 3397 | .movbe, | ||
| 3398 | .movdir64b, | ||
| 3399 | .movdiri, | ||
| 3400 | .no_bypass_delay, | ||
| 3401 | .nopl, | ||
| 3402 | .pconfig, | ||
| 3403 | .pku, | ||
| 3404 | .popcnt, | ||
| 3405 | .prfchw, | ||
| 3406 | .ptwrite, | ||
| 3407 | .rdpid, | ||
| 3408 | .rdrnd, | ||
| 3409 | .rdseed, | ||
| 3410 | .sahf, | ||
| 3411 | .serialize, | ||
| 3412 | .sha, | ||
| 3413 | .shstk, | ||
| 3414 | .slow_incdec, | ||
| 3415 | .slow_lea, | ||
| 3416 | .slow_two_mem_ops, | ||
| 3417 | .uintr, | ||
| 3418 | .use_glm_div_sqrt_costs, | ||
| 3419 | .vaes, | ||
| 3420 | .vpclmulqdq, | ||
| 3421 | .vzeroupper, | ||
| 3422 | .waitpkg, | ||
| 3423 | .widekl, | ||
| 3424 | .x87, | ||
| 3425 | .xsavec, | ||
| 3426 | .xsaveopt, | ||
| 3427 | .xsaves, | ||
| 3428 | }), | ||
| 3429 | }; | ||
| 3430 | pub const silvermont = CpuModel{ | ||
| 3431 | .name = "silvermont", | ||
| 3432 | .llvm_name = "silvermont", | ||
| 3433 | .features = featureSet(&[_]Feature{ | ||
| 3434 | .@"64bit", | ||
| 3435 | .cmov, | ||
| 3436 | .crc32, | ||
| 3437 | .cx16, | ||
| 3438 | .false_deps_popcnt, | ||
| 3439 | .fast_7bytenop, | ||
| 3440 | .fast_movbe, | ||
| 3441 | .fxsr, | ||
| 3442 | .idivq_to_divl, | ||
| 3443 | .mmx, | ||
| 3444 | .movbe, | ||
| 3445 | .no_bypass_delay, | ||
| 3446 | .nopl, | ||
| 3447 | .pclmul, | ||
| 3448 | .popcnt, | ||
| 3449 | .prfchw, | ||
| 3450 | .rdrnd, | ||
| 3451 | .sahf, | ||
| 3452 | .slow_incdec, | ||
| 3453 | .slow_lea, | ||
| 3454 | .slow_pmulld, | ||
| 3455 | .slow_two_mem_ops, | ||
| 3456 | .sse4_2, | ||
| 3457 | .use_slm_arith_costs, | ||
| 3458 | .vzeroupper, | ||
| 3459 | .x87, | ||
| 3460 | }), | ||
| 3461 | }; | ||
| 3462 | pub const skx = CpuModel{ | ||
| 3463 | .name = "skx", | ||
| 3464 | .llvm_name = "skx", | ||
| 3465 | .features = featureSet(&[_]Feature{ | ||
| 3466 | .@"64bit", | ||
| 3467 | .adx, | ||
| 3468 | .aes, | ||
| 3469 | .allow_light_256_bit, | ||
| 3470 | .avx512bw, | ||
| 3471 | .avx512cd, | ||
| 3472 | .avx512dq, | ||
| 3473 | .avx512vl, | ||
| 3474 | .bmi, | ||
| 3475 | .bmi2, | ||
| 3476 | .clflushopt, | ||
| 3477 | .clwb, | ||
| 3478 | .cmov, | ||
| 3479 | .crc32, | ||
| 3480 | .cx16, | ||
| 3481 | .ermsb, | ||
| 3482 | .false_deps_popcnt, | ||
| 3483 | .fast_15bytenop, | ||
| 3484 | .fast_gather, | ||
| 3485 | .fast_scalar_fsqrt, | ||
| 3486 | .fast_shld_rotate, | ||
| 3487 | .fast_variable_crosslane_shuffle, | ||
| 3488 | .fast_variable_perlane_shuffle, | ||
| 3489 | .fast_vector_fsqrt, | ||
| 3490 | .faster_shift_than_shuffle, | ||
| 3491 | .fsgsbase, | ||
| 3492 | .fxsr, | ||
| 3493 | .idivq_to_divl, | ||
| 3494 | .invpcid, | ||
| 3495 | .lzcnt, | ||
| 3496 | .macrofusion, | ||
| 3497 | .mmx, | ||
| 3498 | .movbe, | ||
| 3499 | .no_bypass_delay_blend, | ||
| 3500 | .no_bypass_delay_mov, | ||
| 3501 | .no_bypass_delay_shuffle, | ||
| 3502 | .nopl, | ||
| 3503 | .pclmul, | ||
| 3504 | .pku, | ||
| 3505 | .popcnt, | ||
| 3506 | .prefer_256_bit, | ||
| 3507 | .prfchw, | ||
| 3508 | .rdrnd, | ||
| 3509 | .rdseed, | ||
| 3510 | .sahf, | ||
| 3511 | .slow_3ops_lea, | ||
| 3512 | .tuning_fast_imm_vector_shift, | ||
| 3513 | .vzeroupper, | ||
| 3514 | .x87, | ||
| 3515 | .xsavec, | ||
| 3516 | .xsaveopt, | ||
| 3517 | .xsaves, | ||
| 3518 | }), | ||
| 3519 | }; | ||
| 3520 | pub const skylake = CpuModel{ | ||
| 3521 | .name = "skylake", | ||
| 3522 | .llvm_name = "skylake", | ||
| 3523 | .features = featureSet(&[_]Feature{ | ||
| 3524 | .@"64bit", | ||
| 3525 | .adx, | ||
| 3526 | .aes, | ||
| 3527 | .allow_light_256_bit, | ||
| 3528 | .avx2, | ||
| 3529 | .bmi, | ||
| 3530 | .bmi2, | ||
| 3531 | .clflushopt, | ||
| 3532 | .cmov, | ||
| 3533 | .crc32, | ||
| 3534 | .cx16, | ||
| 3535 | .ermsb, | ||
| 3536 | .f16c, | ||
| 3537 | .false_deps_popcnt, | ||
| 3538 | .fast_15bytenop, | ||
| 3539 | .fast_gather, | ||
| 3540 | .fast_scalar_fsqrt, | ||
| 3541 | .fast_shld_rotate, | ||
| 3542 | .fast_variable_crosslane_shuffle, | ||
| 3543 | .fast_variable_perlane_shuffle, | ||
| 3544 | .fast_vector_fsqrt, | ||
| 3545 | .fma, | ||
| 3546 | .fsgsbase, | ||
| 3547 | .fxsr, | ||
| 3548 | .idivq_to_divl, | ||
| 3549 | .invpcid, | ||
| 3550 | .lzcnt, | ||
| 3551 | .macrofusion, | ||
| 3552 | .mmx, | ||
| 3553 | .movbe, | ||
| 3554 | .no_bypass_delay_blend, | ||
| 3555 | .no_bypass_delay_mov, | ||
| 3556 | .no_bypass_delay_shuffle, | ||
| 3557 | .nopl, | ||
| 3558 | .pclmul, | ||
| 3559 | .popcnt, | ||
| 3560 | .prfchw, | ||
| 3561 | .rdrnd, | ||
| 3562 | .rdseed, | ||
| 3563 | .sahf, | ||
| 3564 | .slow_3ops_lea, | ||
| 3565 | .vzeroupper, | ||
| 3566 | .x87, | ||
| 3567 | .xsavec, | ||
| 3568 | .xsaveopt, | ||
| 3569 | .xsaves, | ||
| 3570 | }), | ||
| 3571 | }; | ||
| 3572 | pub const skylake_avx512 = CpuModel{ | ||
| 3573 | .name = "skylake_avx512", | ||
| 3574 | .llvm_name = "skylake-avx512", | ||
| 3575 | .features = featureSet(&[_]Feature{ | ||
| 3576 | .@"64bit", | ||
| 3577 | .adx, | ||
| 3578 | .aes, | ||
| 3579 | .allow_light_256_bit, | ||
| 3580 | .avx512bw, | ||
| 3581 | .avx512cd, | ||
| 3582 | .avx512dq, | ||
| 3583 | .avx512vl, | ||
| 3584 | .bmi, | ||
| 3585 | .bmi2, | ||
| 3586 | .clflushopt, | ||
| 3587 | .clwb, | ||
| 3588 | .cmov, | ||
| 3589 | .crc32, | ||
| 3590 | .cx16, | ||
| 3591 | .ermsb, | ||
| 3592 | .false_deps_popcnt, | ||
| 3593 | .fast_15bytenop, | ||
| 3594 | .fast_gather, | ||
| 3595 | .fast_scalar_fsqrt, | ||
| 3596 | .fast_shld_rotate, | ||
| 3597 | .fast_variable_crosslane_shuffle, | ||
| 3598 | .fast_variable_perlane_shuffle, | ||
| 3599 | .fast_vector_fsqrt, | ||
| 3600 | .faster_shift_than_shuffle, | ||
| 3601 | .fsgsbase, | ||
| 3602 | .fxsr, | ||
| 3603 | .idivq_to_divl, | ||
| 3604 | .invpcid, | ||
| 3605 | .lzcnt, | ||
| 3606 | .macrofusion, | ||
| 3607 | .mmx, | ||
| 3608 | .movbe, | ||
| 3609 | .no_bypass_delay_blend, | ||
| 3610 | .no_bypass_delay_mov, | ||
| 3611 | .no_bypass_delay_shuffle, | ||
| 3612 | .nopl, | ||
| 3613 | .pclmul, | ||
| 3614 | .pku, | ||
| 3615 | .popcnt, | ||
| 3616 | .prefer_256_bit, | ||
| 3617 | .prfchw, | ||
| 3618 | .rdrnd, | ||
| 3619 | .rdseed, | ||
| 3620 | .sahf, | ||
| 3621 | .slow_3ops_lea, | ||
| 3622 | .tuning_fast_imm_vector_shift, | ||
| 3623 | .vzeroupper, | ||
| 3624 | .x87, | ||
| 3625 | .xsavec, | ||
| 3626 | .xsaveopt, | ||
| 3627 | .xsaves, | ||
| 3628 | }), | ||
| 3629 | }; | ||
| 3630 | pub const slm = CpuModel{ | ||
| 3631 | .name = "slm", | ||
| 3632 | .llvm_name = "slm", | ||
| 3633 | .features = featureSet(&[_]Feature{ | ||
| 3634 | .@"64bit", | ||
| 3635 | .cmov, | ||
| 3636 | .crc32, | ||
| 3637 | .cx16, | ||
| 3638 | .false_deps_popcnt, | ||
| 3639 | .fast_7bytenop, | ||
| 3640 | .fast_movbe, | ||
| 3641 | .fxsr, | ||
| 3642 | .idivq_to_divl, | ||
| 3643 | .mmx, | ||
| 3644 | .movbe, | ||
| 3645 | .no_bypass_delay, | ||
| 3646 | .nopl, | ||
| 3647 | .pclmul, | ||
| 3648 | .popcnt, | ||
| 3649 | .prfchw, | ||
| 3650 | .rdrnd, | ||
| 3651 | .sahf, | ||
| 3652 | .slow_incdec, | ||
| 3653 | .slow_lea, | ||
| 3654 | .slow_pmulld, | ||
| 3655 | .slow_two_mem_ops, | ||
| 3656 | .sse4_2, | ||
| 3657 | .use_slm_arith_costs, | ||
| 3658 | .vzeroupper, | ||
| 3659 | .x87, | ||
| 3660 | }), | ||
| 3661 | }; | ||
| 3662 | pub const tigerlake = CpuModel{ | ||
| 3663 | .name = "tigerlake", | ||
| 3664 | .llvm_name = "tigerlake", | ||
| 3665 | .features = featureSet(&[_]Feature{ | ||
| 3666 | .@"64bit", | ||
| 3667 | .adx, | ||
| 3668 | .allow_light_256_bit, | ||
| 3669 | .avx512bitalg, | ||
| 3670 | .avx512cd, | ||
| 3671 | .avx512dq, | ||
| 3672 | .avx512ifma, | ||
| 3673 | .avx512vbmi, | ||
| 3674 | .avx512vbmi2, | ||
| 3675 | .avx512vl, | ||
| 3676 | .avx512vnni, | ||
| 3677 | .avx512vp2intersect, | ||
| 3678 | .avx512vpopcntdq, | ||
| 3679 | .bmi, | ||
| 3680 | .bmi2, | ||
| 3681 | .clflushopt, | ||
| 3682 | .clwb, | ||
| 3683 | .cmov, | ||
| 3684 | .crc32, | ||
| 3685 | .cx16, | ||
| 3686 | .ermsb, | ||
| 3687 | .fast_15bytenop, | ||
| 3688 | .fast_gather, | ||
| 3689 | .fast_scalar_fsqrt, | ||
| 3690 | .fast_shld_rotate, | ||
| 3691 | .fast_variable_crosslane_shuffle, | ||
| 3692 | .fast_variable_perlane_shuffle, | ||
| 3693 | .fast_vector_fsqrt, | ||
| 3694 | .fsgsbase, | ||
| 3695 | .fsrm, | ||
| 3696 | .fxsr, | ||
| 3697 | .gfni, | ||
| 3698 | .idivq_to_divl, | ||
| 3699 | .invpcid, | ||
| 3700 | .lzcnt, | ||
| 3701 | .macrofusion, | ||
| 3702 | .mmx, | ||
| 3703 | .movbe, | ||
| 3704 | .movdir64b, | ||
| 3705 | .movdiri, | ||
| 3706 | .no_bypass_delay_blend, | ||
| 3707 | .no_bypass_delay_mov, | ||
| 3708 | .no_bypass_delay_shuffle, | ||
| 3709 | .nopl, | ||
| 3710 | .pku, | ||
| 3711 | .popcnt, | ||
| 3712 | .prefer_256_bit, | ||
| 3713 | .prfchw, | ||
| 3714 | .rdpid, | ||
| 3715 | .rdrnd, | ||
| 3716 | .rdseed, | ||
| 3717 | .sahf, | ||
| 3718 | .sha, | ||
| 3719 | .shstk, | ||
| 3720 | .tuning_fast_imm_vector_shift, | ||
| 3721 | .vaes, | ||
| 3722 | .vpclmulqdq, | ||
| 3723 | .vzeroupper, | ||
| 3724 | .x87, | ||
| 3725 | .xsavec, | ||
| 3726 | .xsaveopt, | ||
| 3727 | .xsaves, | ||
| 3728 | }), | ||
| 3729 | }; | ||
| 3730 | pub const tremont = CpuModel{ | ||
| 3731 | .name = "tremont", | ||
| 3732 | .llvm_name = "tremont", | ||
| 3733 | .features = featureSet(&[_]Feature{ | ||
| 3734 | .@"64bit", | ||
| 3735 | .aes, | ||
| 3736 | .clflushopt, | ||
| 3737 | .clwb, | ||
| 3738 | .cmov, | ||
| 3739 | .crc32, | ||
| 3740 | .cx16, | ||
| 3741 | .fast_movbe, | ||
| 3742 | .fsgsbase, | ||
| 3743 | .fxsr, | ||
| 3744 | .gfni, | ||
| 3745 | .mmx, | ||
| 3746 | .movbe, | ||
| 3747 | .no_bypass_delay, | ||
| 3748 | .nopl, | ||
| 3749 | .pclmul, | ||
| 3750 | .popcnt, | ||
| 3751 | .prfchw, | ||
| 3752 | .ptwrite, | ||
| 3753 | .rdpid, | ||
| 3754 | .rdrnd, | ||
| 3755 | .rdseed, | ||
| 3756 | .sahf, | ||
| 3757 | .sha, | ||
| 3758 | .slow_incdec, | ||
| 3759 | .slow_lea, | ||
| 3760 | .slow_two_mem_ops, | ||
| 3761 | .sse4_2, | ||
| 3762 | .use_glm_div_sqrt_costs, | ||
| 3763 | .vzeroupper, | ||
| 3764 | .x87, | ||
| 3765 | .xsavec, | ||
| 3766 | .xsaveopt, | ||
| 3767 | .xsaves, | ||
| 3768 | }), | ||
| 3769 | }; | ||
| 3770 | pub const westmere = CpuModel{ | ||
| 3771 | .name = "westmere", | ||
| 3772 | .llvm_name = "westmere", | ||
| 3773 | .features = featureSet(&[_]Feature{ | ||
| 3774 | .@"64bit", | ||
| 3775 | .cmov, | ||
| 3776 | .crc32, | ||
| 3777 | .cx16, | ||
| 3778 | .fxsr, | ||
| 3779 | .macrofusion, | ||
| 3780 | .mmx, | ||
| 3781 | .no_bypass_delay_mov, | ||
| 3782 | .nopl, | ||
| 3783 | .pclmul, | ||
| 3784 | .popcnt, | ||
| 3785 | .sahf, | ||
| 3786 | .sse4_2, | ||
| 3787 | .vzeroupper, | ||
| 3788 | .x87, | ||
| 3789 | }), | ||
| 3790 | }; | ||
| 3791 | pub const winchip2 = CpuModel{ | ||
| 3792 | .name = "winchip2", | ||
| 3793 | .llvm_name = "winchip2", | ||
| 3794 | .features = featureSet(&[_]Feature{ | ||
| 3795 | .@"3dnow", | ||
| 3796 | .slow_unaligned_mem_16, | ||
| 3797 | .vzeroupper, | ||
| 3798 | .x87, | ||
| 3799 | }), | ||
| 3800 | }; | ||
| 3801 | pub const winchip_c6 = CpuModel{ | ||
| 3802 | .name = "winchip_c6", | ||
| 3803 | .llvm_name = "winchip-c6", | ||
| 3804 | .features = featureSet(&[_]Feature{ | ||
| 3805 | .mmx, | ||
| 3806 | .slow_unaligned_mem_16, | ||
| 3807 | .vzeroupper, | ||
| 3808 | .x87, | ||
| 3809 | }), | ||
| 3810 | }; | ||
| 3811 | pub const x86_64 = CpuModel{ | ||
| 3812 | .name = "x86_64", | ||
| 3813 | .llvm_name = "x86-64", | ||
| 3814 | .features = featureSet(&[_]Feature{ | ||
| 3815 | .@"64bit", | ||
| 3816 | .cmov, | ||
| 3817 | .cx8, | ||
| 3818 | .fxsr, | ||
| 3819 | .idivq_to_divl, | ||
| 3820 | .macrofusion, | ||
| 3821 | .mmx, | ||
| 3822 | .nopl, | ||
| 3823 | .slow_3ops_lea, | ||
| 3824 | .slow_incdec, | ||
| 3825 | .sse2, | ||
| 3826 | .vzeroupper, | ||
| 3827 | .x87, | ||
| 3828 | }), | ||
| 3829 | }; | ||
| 3830 | pub const x86_64_v2 = CpuModel{ | ||
| 3831 | .name = "x86_64_v2", | ||
| 3832 | .llvm_name = "x86-64-v2", | ||
| 3833 | .features = featureSet(&[_]Feature{ | ||
| 3834 | .@"64bit", | ||
| 3835 | .cmov, | ||
| 3836 | .crc32, | ||
| 3837 | .cx16, | ||
| 3838 | .false_deps_popcnt, | ||
| 3839 | .fast_15bytenop, | ||
| 3840 | .fast_scalar_fsqrt, | ||
| 3841 | .fast_shld_rotate, | ||
| 3842 | .fxsr, | ||
| 3843 | .idivq_to_divl, | ||
| 3844 | .macrofusion, | ||
| 3845 | .mmx, | ||
| 3846 | .nopl, | ||
| 3847 | .popcnt, | ||
| 3848 | .sahf, | ||
| 3849 | .slow_3ops_lea, | ||
| 3850 | .slow_unaligned_mem_32, | ||
| 3851 | .sse4_2, | ||
| 3852 | .vzeroupper, | ||
| 3853 | .x87, | ||
| 3854 | }), | ||
| 3855 | }; | ||
| 3856 | pub const x86_64_v3 = CpuModel{ | ||
| 3857 | .name = "x86_64_v3", | ||
| 3858 | .llvm_name = "x86-64-v3", | ||
| 3859 | .features = featureSet(&[_]Feature{ | ||
| 3860 | .@"64bit", | ||
| 3861 | .allow_light_256_bit, | ||
| 3862 | .avx2, | ||
| 3863 | .bmi, | ||
| 3864 | .bmi2, | ||
| 3865 | .cmov, | ||
| 3866 | .crc32, | ||
| 3867 | .cx16, | ||
| 3868 | .f16c, | ||
| 3869 | .false_deps_lzcnt_tzcnt, | ||
| 3870 | .false_deps_popcnt, | ||
| 3871 | .fast_15bytenop, | ||
| 3872 | .fast_scalar_fsqrt, | ||
| 3873 | .fast_shld_rotate, | ||
| 3874 | .fast_variable_crosslane_shuffle, | ||
| 3875 | .fast_variable_perlane_shuffle, | ||
| 3876 | .fma, | ||
| 3877 | .fxsr, | ||
| 3878 | .idivq_to_divl, | ||
| 3879 | .lzcnt, | ||
| 3880 | .macrofusion, | ||
| 3881 | .mmx, | ||
| 3882 | .movbe, | ||
| 3883 | .nopl, | ||
| 3884 | .popcnt, | ||
| 3885 | .sahf, | ||
| 3886 | .slow_3ops_lea, | ||
| 3887 | .vzeroupper, | ||
| 3888 | .x87, | ||
| 3889 | .xsave, | ||
| 3890 | }), | ||
| 3891 | }; | ||
| 3892 | pub const x86_64_v4 = CpuModel{ | ||
| 3893 | .name = "x86_64_v4", | ||
| 3894 | .llvm_name = "x86-64-v4", | ||
| 3895 | .features = featureSet(&[_]Feature{ | ||
| 3896 | .@"64bit", | ||
| 3897 | .allow_light_256_bit, | ||
| 3898 | .avx512bw, | ||
| 3899 | .avx512cd, | ||
| 3900 | .avx512dq, | ||
| 3901 | .avx512vl, | ||
| 3902 | .bmi, | ||
| 3903 | .bmi2, | ||
| 3904 | .cmov, | ||
| 3905 | .crc32, | ||
| 3906 | .cx16, | ||
| 3907 | .false_deps_popcnt, | ||
| 3908 | .fast_15bytenop, | ||
| 3909 | .fast_gather, | ||
| 3910 | .fast_scalar_fsqrt, | ||
| 3911 | .fast_shld_rotate, | ||
| 3912 | .fast_variable_crosslane_shuffle, | ||
| 3913 | .fast_variable_perlane_shuffle, | ||
| 3914 | .fast_vector_fsqrt, | ||
| 3915 | .fxsr, | ||
| 3916 | .idivq_to_divl, | ||
| 3917 | .lzcnt, | ||
| 3918 | .macrofusion, | ||
| 3919 | .mmx, | ||
| 3920 | .movbe, | ||
| 3921 | .nopl, | ||
| 3922 | .popcnt, | ||
| 3923 | .prefer_256_bit, | ||
| 3924 | .sahf, | ||
| 3925 | .slow_3ops_lea, | ||
| 3926 | .vzeroupper, | ||
| 3927 | .x87, | ||
| 3928 | .xsave, | ||
| 3929 | }), | ||
| 3930 | }; | ||
| 3931 | pub const yonah = CpuModel{ | ||
| 3932 | .name = "yonah", | ||
| 3933 | .llvm_name = "yonah", | ||
| 3934 | .features = featureSet(&[_]Feature{ | ||
| 3935 | .cmov, | ||
| 3936 | .cx8, | ||
| 3937 | .fxsr, | ||
| 3938 | .mmx, | ||
| 3939 | .nopl, | ||
| 3940 | .slow_unaligned_mem_16, | ||
| 3941 | .sse3, | ||
| 3942 | .vzeroupper, | ||
| 3943 | .x87, | ||
| 3944 | }), | ||
| 3945 | }; | ||
| 3946 | pub const znver1 = CpuModel{ | ||
| 3947 | .name = "znver1", | ||
| 3948 | .llvm_name = "znver1", | ||
| 3949 | .features = featureSet(&[_]Feature{ | ||
| 3950 | .@"64bit", | ||
| 3951 | .adx, | ||
| 3952 | .aes, | ||
| 3953 | .allow_light_256_bit, | ||
| 3954 | .avx2, | ||
| 3955 | .bmi, | ||
| 3956 | .bmi2, | ||
| 3957 | .branchfusion, | ||
| 3958 | .clflushopt, | ||
| 3959 | .clzero, | ||
| 3960 | .cmov, | ||
| 3961 | .crc32, | ||
| 3962 | .cx16, | ||
| 3963 | .f16c, | ||
| 3964 | .fast_15bytenop, | ||
| 3965 | .fast_bextr, | ||
| 3966 | .fast_lzcnt, | ||
| 3967 | .fast_movbe, | ||
| 3968 | .fast_scalar_fsqrt, | ||
| 3969 | .fast_scalar_shift_masks, | ||
| 3970 | .fast_variable_perlane_shuffle, | ||
| 3971 | .fast_vector_fsqrt, | ||
| 3972 | .fma, | ||
| 3973 | .fsgsbase, | ||
| 3974 | .fxsr, | ||
| 3975 | .lzcnt, | ||
| 3976 | .mmx, | ||
| 3977 | .movbe, | ||
| 3978 | .mwaitx, | ||
| 3979 | .nopl, | ||
| 3980 | .pclmul, | ||
| 3981 | .popcnt, | ||
| 3982 | .prfchw, | ||
| 3983 | .rdrnd, | ||
| 3984 | .rdseed, | ||
| 3985 | .sahf, | ||
| 3986 | .sbb_dep_breaking, | ||
| 3987 | .sha, | ||
| 3988 | .slow_shld, | ||
| 3989 | .sse4a, | ||
| 3990 | .vzeroupper, | ||
| 3991 | .x87, | ||
| 3992 | .xsavec, | ||
| 3993 | .xsaveopt, | ||
| 3994 | .xsaves, | ||
| 3995 | }), | ||
| 3996 | }; | ||
| 3997 | pub const znver2 = CpuModel{ | ||
| 3998 | .name = "znver2", | ||
| 3999 | .llvm_name = "znver2", | ||
| 4000 | .features = featureSet(&[_]Feature{ | ||
| 4001 | .@"64bit", | ||
| 4002 | .adx, | ||
| 4003 | .aes, | ||
| 4004 | .allow_light_256_bit, | ||
| 4005 | .avx2, | ||
| 4006 | .bmi, | ||
| 4007 | .bmi2, | ||
| 4008 | .branchfusion, | ||
| 4009 | .clflushopt, | ||
| 4010 | .clwb, | ||
| 4011 | .clzero, | ||
| 4012 | .cmov, | ||
| 4013 | .crc32, | ||
| 4014 | .cx16, | ||
| 4015 | .f16c, | ||
| 4016 | .fast_15bytenop, | ||
| 4017 | .fast_bextr, | ||
| 4018 | .fast_lzcnt, | ||
| 4019 | .fast_movbe, | ||
| 4020 | .fast_scalar_fsqrt, | ||
| 4021 | .fast_scalar_shift_masks, | ||
| 4022 | .fast_variable_perlane_shuffle, | ||
| 4023 | .fast_vector_fsqrt, | ||
| 4024 | .fma, | ||
| 4025 | .fsgsbase, | ||
| 4026 | .fxsr, | ||
| 4027 | .lzcnt, | ||
| 4028 | .mmx, | ||
| 4029 | .movbe, | ||
| 4030 | .mwaitx, | ||
| 4031 | .nopl, | ||
| 4032 | .pclmul, | ||
| 4033 | .popcnt, | ||
| 4034 | .prfchw, | ||
| 4035 | .rdpid, | ||
| 4036 | .rdpru, | ||
| 4037 | .rdrnd, | ||
| 4038 | .rdseed, | ||
| 4039 | .sahf, | ||
| 4040 | .sbb_dep_breaking, | ||
| 4041 | .sha, | ||
| 4042 | .slow_shld, | ||
| 4043 | .sse4a, | ||
| 4044 | .vzeroupper, | ||
| 4045 | .wbnoinvd, | ||
| 4046 | .x87, | ||
| 4047 | .xsavec, | ||
| 4048 | .xsaveopt, | ||
| 4049 | .xsaves, | ||
| 4050 | }), | ||
| 4051 | }; | ||
| 4052 | pub const znver3 = CpuModel{ | ||
| 4053 | .name = "znver3", | ||
| 4054 | .llvm_name = "znver3", | ||
| 4055 | .features = featureSet(&[_]Feature{ | ||
| 4056 | .@"64bit", | ||
| 4057 | .adx, | ||
| 4058 | .allow_light_256_bit, | ||
| 4059 | .avx2, | ||
| 4060 | .bmi, | ||
| 4061 | .bmi2, | ||
| 4062 | .branchfusion, | ||
| 4063 | .clflushopt, | ||
| 4064 | .clwb, | ||
| 4065 | .clzero, | ||
| 4066 | .cmov, | ||
| 4067 | .crc32, | ||
| 4068 | .cx16, | ||
| 4069 | .f16c, | ||
| 4070 | .fast_15bytenop, | ||
| 4071 | .fast_bextr, | ||
| 4072 | .fast_lzcnt, | ||
| 4073 | .fast_movbe, | ||
| 4074 | .fast_scalar_fsqrt, | ||
| 4075 | .fast_scalar_shift_masks, | ||
| 4076 | .fast_variable_perlane_shuffle, | ||
| 4077 | .fast_vector_fsqrt, | ||
| 4078 | .fma, | ||
| 4079 | .fsgsbase, | ||
| 4080 | .fsrm, | ||
| 4081 | .fxsr, | ||
| 4082 | .invpcid, | ||
| 4083 | .lzcnt, | ||
| 4084 | .macrofusion, | ||
| 4085 | .mmx, | ||
| 4086 | .movbe, | ||
| 4087 | .mwaitx, | ||
| 4088 | .nopl, | ||
| 4089 | .pku, | ||
| 4090 | .popcnt, | ||
| 4091 | .prfchw, | ||
| 4092 | .rdpid, | ||
| 4093 | .rdpru, | ||
| 4094 | .rdrnd, | ||
| 4095 | .rdseed, | ||
| 4096 | .sahf, | ||
| 4097 | .sbb_dep_breaking, | ||
| 4098 | .sha, | ||
| 4099 | .slow_shld, | ||
| 4100 | .sse4a, | ||
| 4101 | .vaes, | ||
| 4102 | .vpclmulqdq, | ||
| 4103 | .vzeroupper, | ||
| 4104 | .wbnoinvd, | ||
| 4105 | .x87, | ||
| 4106 | .xsavec, | ||
| 4107 | .xsaveopt, | ||
| 4108 | .xsaves, | ||
| 4109 | }), | ||
| 4110 | }; | ||
| 4111 | pub const znver4 = CpuModel{ | ||
| 4112 | .name = "znver4", | ||
| 4113 | .llvm_name = "znver4", | ||
| 4114 | .features = featureSet(&[_]Feature{ | ||
| 4115 | .@"64bit", | ||
| 4116 | .adx, | ||
| 4117 | .allow_light_256_bit, | ||
| 4118 | .avx512bf16, | ||
| 4119 | .avx512bitalg, | ||
| 4120 | .avx512cd, | ||
| 4121 | .avx512dq, | ||
| 4122 | .avx512ifma, | ||
| 4123 | .avx512vbmi, | ||
| 4124 | .avx512vbmi2, | ||
| 4125 | .avx512vl, | ||
| 4126 | .avx512vnni, | ||
| 4127 | .avx512vpopcntdq, | ||
| 4128 | .bmi, | ||
| 4129 | .bmi2, | ||
| 4130 | .branchfusion, | ||
| 4131 | .clflushopt, | ||
| 4132 | .clwb, | ||
| 4133 | .clzero, | ||
| 4134 | .cmov, | ||
| 4135 | .crc32, | ||
| 4136 | .cx16, | ||
| 4137 | .fast_15bytenop, | ||
| 4138 | .fast_bextr, | ||
| 4139 | .fast_lzcnt, | ||
| 4140 | .fast_movbe, | ||
| 4141 | .fast_scalar_fsqrt, | ||
| 4142 | .fast_scalar_shift_masks, | ||
| 4143 | .fast_variable_perlane_shuffle, | ||
| 4144 | .fast_vector_fsqrt, | ||
| 4145 | .fsgsbase, | ||
| 4146 | .fsrm, | ||
| 4147 | .fxsr, | ||
| 4148 | .gfni, | ||
| 4149 | .invpcid, | ||
| 4150 | .lzcnt, | ||
| 4151 | .macrofusion, | ||
| 4152 | .mmx, | ||
| 4153 | .movbe, | ||
| 4154 | .mwaitx, | ||
| 4155 | .nopl, | ||
| 4156 | .pku, | ||
| 4157 | .popcnt, | ||
| 4158 | .prfchw, | ||
| 4159 | .rdpid, | ||
| 4160 | .rdpru, | ||
| 4161 | .rdrnd, | ||
| 4162 | .rdseed, | ||
| 4163 | .sahf, | ||
| 4164 | .sbb_dep_breaking, | ||
| 4165 | .sha, | ||
| 4166 | .shstk, | ||
| 4167 | .slow_shld, | ||
| 4168 | .sse4a, | ||
| 4169 | .vaes, | ||
| 4170 | .vpclmulqdq, | ||
| 4171 | .vzeroupper, | ||
| 4172 | .wbnoinvd, | ||
| 4173 | .x87, | ||
| 4174 | .xsavec, | ||
| 4175 | .xsaveopt, | ||
| 4176 | .xsaves, | ||
| 4177 | }), | ||
| 4178 | }; | ||
| 4179 | }; | ||
lib/std/Target/xtensa.zig created+39
| ... | @@ -0,0 +1,39 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | density, | ||
| 9 | }; | ||
| 10 | |||
| 11 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 12 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 13 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 14 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 15 | |||
| 16 | pub const all_features = blk: { | ||
| 17 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 18 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 19 | var result: [len]CpuFeature = undefined; | ||
| 20 | result[@intFromEnum(Feature.density)] = .{ | ||
| 21 | .llvm_name = "density", | ||
| 22 | .description = "Enable Density instructions", | ||
| 23 | .dependencies = featureSet(&[_]Feature{}), | ||
| 24 | }; | ||
| 25 | const ti = @typeInfo(Feature); | ||
| 26 | for (&result, 0..) |*elem, i| { | ||
| 27 | elem.index = i; | ||
| 28 | elem.name = ti.Enum.fields[i].name; | ||
| 29 | } | ||
| 30 | break :blk result; | ||
| 31 | }; | ||
| 32 | |||
| 33 | pub const cpu = struct { | ||
| 34 | pub const generic = CpuModel{ | ||
| 35 | .name = "generic", | ||
| 36 | .llvm_name = "generic", | ||
| 37 | .features = featureSet(&[_]Feature{}), | ||
| 38 | }; | ||
| 39 | }; | ||
lib/std/std.zig+1-1
| ... | @@ -47,7 +47,7 @@ pub const StringArrayHashMap = array_hash_map.StringArrayHashMap; | ... | @@ -47,7 +47,7 @@ pub const StringArrayHashMap = array_hash_map.StringArrayHashMap; |
| 47 | pub const StringArrayHashMapUnmanaged = array_hash_map.StringArrayHashMapUnmanaged; | 47 | pub const StringArrayHashMapUnmanaged = array_hash_map.StringArrayHashMapUnmanaged; |
| 48 | /// deprecated: use `DoublyLinkedList`. | 48 | /// deprecated: use `DoublyLinkedList`. |
| 49 | pub const TailQueue = DoublyLinkedList; | 49 | pub const TailQueue = DoublyLinkedList; |
| 50 | pub const Target = @import("target.zig").Target; | 50 | pub const Target = @import("Target.zig"); |
| 51 | pub const Thread = @import("Thread.zig"); | 51 | pub const Thread = @import("Thread.zig"); |
| 52 | pub const Treap = @import("treap.zig").Treap; | 52 | pub const Treap = @import("treap.zig").Treap; |
| 53 | pub const Tz = tz.Tz; | 53 | pub const Tz = tz.Tz; |
lib/std/target.zig deleted-2698
| ... | @@ -1,2698 +0,0 @@ | ||
| 1 | const std = @import("std.zig"); | ||
| 2 | const builtin = @import("builtin"); | ||
| 3 | const mem = std.mem; | ||
| 4 | const Version = std.SemanticVersion; | ||
| 5 | |||
| 6 | pub const Target = struct { | ||
| 7 | cpu: Cpu, | ||
| 8 | os: Os, | ||
| 9 | abi: Abi, | ||
| 10 | ofmt: ObjectFormat, | ||
| 11 | |||
| 12 | pub const Os = struct { | ||
| 13 | tag: Tag, | ||
| 14 | version_range: VersionRange, | ||
| 15 | |||
| 16 | pub const Tag = enum { | ||
| 17 | freestanding, | ||
| 18 | ananas, | ||
| 19 | cloudabi, | ||
| 20 | dragonfly, | ||
| 21 | freebsd, | ||
| 22 | fuchsia, | ||
| 23 | ios, | ||
| 24 | kfreebsd, | ||
| 25 | linux, | ||
| 26 | lv2, | ||
| 27 | macos, | ||
| 28 | netbsd, | ||
| 29 | openbsd, | ||
| 30 | solaris, | ||
| 31 | uefi, | ||
| 32 | windows, | ||
| 33 | zos, | ||
| 34 | haiku, | ||
| 35 | minix, | ||
| 36 | rtems, | ||
| 37 | nacl, | ||
| 38 | aix, | ||
| 39 | cuda, | ||
| 40 | nvcl, | ||
| 41 | amdhsa, | ||
| 42 | ps4, | ||
| 43 | ps5, | ||
| 44 | elfiamcu, | ||
| 45 | tvos, | ||
| 46 | watchos, | ||
| 47 | driverkit, | ||
| 48 | mesa3d, | ||
| 49 | contiki, | ||
| 50 | amdpal, | ||
| 51 | hermit, | ||
| 52 | hurd, | ||
| 53 | wasi, | ||
| 54 | emscripten, | ||
| 55 | shadermodel, | ||
| 56 | liteos, | ||
| 57 | opencl, | ||
| 58 | glsl450, | ||
| 59 | vulkan, | ||
| 60 | plan9, | ||
| 61 | illumos, | ||
| 62 | other, | ||
| 63 | |||
| 64 | pub inline fn isDarwin(tag: Tag) bool { | ||
| 65 | return switch (tag) { | ||
| 66 | .ios, .macos, .watchos, .tvos => true, | ||
| 67 | else => false, | ||
| 68 | }; | ||
| 69 | } | ||
| 70 | |||
| 71 | pub inline fn isBSD(tag: Tag) bool { | ||
| 72 | return tag.isDarwin() or switch (tag) { | ||
| 73 | .kfreebsd, .freebsd, .openbsd, .netbsd, .dragonfly => true, | ||
| 74 | else => false, | ||
| 75 | }; | ||
| 76 | } | ||
| 77 | |||
| 78 | pub inline fn isSolarish(tag: Tag) bool { | ||
| 79 | return tag == .solaris or tag == .illumos; | ||
| 80 | } | ||
| 81 | |||
| 82 | pub fn dynamicLibSuffix(tag: Tag) [:0]const u8 { | ||
| 83 | if (tag.isDarwin()) { | ||
| 84 | return ".dylib"; | ||
| 85 | } | ||
| 86 | switch (tag) { | ||
| 87 | .windows => return ".dll", | ||
| 88 | else => return ".so", | ||
| 89 | } | ||
| 90 | } | ||
| 91 | |||
| 92 | pub fn defaultVersionRange(tag: Tag, arch: Cpu.Arch) Os { | ||
| 93 | return .{ | ||
| 94 | .tag = tag, | ||
| 95 | .version_range = VersionRange.default(tag, arch), | ||
| 96 | }; | ||
| 97 | } | ||
| 98 | }; | ||
| 99 | |||
| 100 | /// Based on NTDDI version constants from | ||
| 101 | /// https://docs.microsoft.com/en-us/cpp/porting/modifying-winver-and-win32-winnt | ||
| 102 | pub const WindowsVersion = enum(u32) { | ||
| 103 | nt4 = 0x04000000, | ||
| 104 | win2k = 0x05000000, | ||
| 105 | xp = 0x05010000, | ||
| 106 | ws2003 = 0x05020000, | ||
| 107 | vista = 0x06000000, | ||
| 108 | win7 = 0x06010000, | ||
| 109 | win8 = 0x06020000, | ||
| 110 | win8_1 = 0x06030000, | ||
| 111 | win10 = 0x0A000000, //aka win10_th1 | ||
| 112 | win10_th2 = 0x0A000001, | ||
| 113 | win10_rs1 = 0x0A000002, | ||
| 114 | win10_rs2 = 0x0A000003, | ||
| 115 | win10_rs3 = 0x0A000004, | ||
| 116 | win10_rs4 = 0x0A000005, | ||
| 117 | win10_rs5 = 0x0A000006, | ||
| 118 | win10_19h1 = 0x0A000007, | ||
| 119 | win10_vb = 0x0A000008, //aka win10_19h2 | ||
| 120 | win10_mn = 0x0A000009, //aka win10_20h1 | ||
| 121 | win10_fe = 0x0A00000A, //aka win10_20h2 | ||
| 122 | _, | ||
| 123 | |||
| 124 | /// Latest Windows version that the Zig Standard Library is aware of | ||
| 125 | pub const latest = WindowsVersion.win10_fe; | ||
| 126 | |||
| 127 | /// Compared against build numbers reported by the runtime to distinguish win10 versions, | ||
| 128 | /// where 0x0A000000 + index corresponds to the WindowsVersion u32 value. | ||
| 129 | pub const known_win10_build_numbers = [_]u32{ | ||
| 130 | 10240, //win10 aka win10_th1 | ||
| 131 | 10586, //win10_th2 | ||
| 132 | 14393, //win10_rs1 | ||
| 133 | 15063, //win10_rs2 | ||
| 134 | 16299, //win10_rs3 | ||
| 135 | 17134, //win10_rs4 | ||
| 136 | 17763, //win10_rs5 | ||
| 137 | 18362, //win10_19h1 | ||
| 138 | 18363, //win10_vb aka win10_19h2 | ||
| 139 | 19041, //win10_mn aka win10_20h1 | ||
| 140 | 19042, //win10_fe aka win10_20h2 | ||
| 141 | }; | ||
| 142 | |||
| 143 | /// Returns whether the first version `self` is newer (greater) than or equal to the second version `ver`. | ||
| 144 | pub inline fn isAtLeast(self: WindowsVersion, ver: WindowsVersion) bool { | ||
| 145 | return @intFromEnum(self) >= @intFromEnum(ver); | ||
| 146 | } | ||
| 147 | |||
| 148 | pub const Range = struct { | ||
| 149 | min: WindowsVersion, | ||
| 150 | max: WindowsVersion, | ||
| 151 | |||
| 152 | pub inline fn includesVersion(self: Range, ver: WindowsVersion) bool { | ||
| 153 | return @intFromEnum(ver) >= @intFromEnum(self.min) and @intFromEnum(ver) <= @intFromEnum(self.max); | ||
| 154 | } | ||
| 155 | |||
| 156 | /// Checks if system is guaranteed to be at least `version` or older than `version`. | ||
| 157 | /// Returns `null` if a runtime check is required. | ||
| 158 | pub inline fn isAtLeast(self: Range, ver: WindowsVersion) ?bool { | ||
| 159 | if (@intFromEnum(self.min) >= @intFromEnum(ver)) return true; | ||
| 160 | if (@intFromEnum(self.max) < @intFromEnum(ver)) return false; | ||
| 161 | return null; | ||
| 162 | } | ||
| 163 | }; | ||
| 164 | |||
| 165 | /// This function is defined to serialize a Zig source code representation of this | ||
| 166 | /// type, that, when parsed, will deserialize into the same data. | ||
| 167 | pub fn format( | ||
| 168 | self: WindowsVersion, | ||
| 169 | comptime fmt: []const u8, | ||
| 170 | _: std.fmt.FormatOptions, | ||
| 171 | out_stream: anytype, | ||
| 172 | ) !void { | ||
| 173 | if (comptime std.mem.eql(u8, fmt, "s")) { | ||
| 174 | if (@intFromEnum(self) >= @intFromEnum(WindowsVersion.nt4) and @intFromEnum(self) <= @intFromEnum(WindowsVersion.latest)) { | ||
| 175 | try std.fmt.format(out_stream, ".{s}", .{@tagName(self)}); | ||
| 176 | } else { | ||
| 177 | // TODO this code path breaks zig triples, but it is used in `builtin` | ||
| 178 | try std.fmt.format(out_stream, "@enumFromInt(Target.Os.WindowsVersion, 0x{X:0>8})", .{@intFromEnum(self)}); | ||
| 179 | } | ||
| 180 | } else if (fmt.len == 0) { | ||
| 181 | if (@intFromEnum(self) >= @intFromEnum(WindowsVersion.nt4) and @intFromEnum(self) <= @intFromEnum(WindowsVersion.latest)) { | ||
| 182 | try std.fmt.format(out_stream, "WindowsVersion.{s}", .{@tagName(self)}); | ||
| 183 | } else { | ||
| 184 | try std.fmt.format(out_stream, "WindowsVersion(0x{X:0>8})", .{@intFromEnum(self)}); | ||
| 185 | } | ||
| 186 | } else { | ||
| 187 | std.fmt.invalidFmtError(fmt, self); | ||
| 188 | } | ||
| 189 | } | ||
| 190 | }; | ||
| 191 | |||
| 192 | pub const LinuxVersionRange = struct { | ||
| 193 | range: Version.Range, | ||
| 194 | glibc: Version, | ||
| 195 | |||
| 196 | pub inline fn includesVersion(self: LinuxVersionRange, ver: Version) bool { | ||
| 197 | return self.range.includesVersion(ver); | ||
| 198 | } | ||
| 199 | |||
| 200 | /// Checks if system is guaranteed to be at least `version` or older than `version`. | ||
| 201 | /// Returns `null` if a runtime check is required. | ||
| 202 | pub inline fn isAtLeast(self: LinuxVersionRange, ver: Version) ?bool { | ||
| 203 | return self.range.isAtLeast(ver); | ||
| 204 | } | ||
| 205 | }; | ||
| 206 | |||
| 207 | /// The version ranges here represent the minimum OS version to be supported | ||
| 208 | /// and the maximum OS version to be supported. The default values represent | ||
| 209 | /// the range that the Zig Standard Library bases its abstractions on. | ||
| 210 | /// | ||
| 211 | /// The minimum version of the range is the main setting to tweak for a target. | ||
| 212 | /// Usually, the maximum target OS version will remain the default, which is | ||
| 213 | /// the latest released version of the OS. | ||
| 214 | /// | ||
| 215 | /// To test at compile time if the target is guaranteed to support a given OS feature, | ||
| 216 | /// one should check that the minimum version of the range is greater than or equal to | ||
| 217 | /// the version the feature was introduced in. | ||
| 218 | /// | ||
| 219 | /// To test at compile time if the target certainly will not support a given OS feature, | ||
| 220 | /// one should check that the maximum version of the range is less than the version the | ||
| 221 | /// feature was introduced in. | ||
| 222 | /// | ||
| 223 | /// If neither of these cases apply, a runtime check should be used to determine if the | ||
| 224 | /// target supports a given OS feature. | ||
| 225 | /// | ||
| 226 | /// Binaries built with a given maximum version will continue to function on newer | ||
| 227 | /// operating system versions. However, such a binary may not take full advantage of the | ||
| 228 | /// newer operating system APIs. | ||
| 229 | /// | ||
| 230 | /// See `Os.isAtLeast`. | ||
| 231 | pub const VersionRange = union { | ||
| 232 | none: void, | ||
| 233 | semver: Version.Range, | ||
| 234 | linux: LinuxVersionRange, | ||
| 235 | windows: WindowsVersion.Range, | ||
| 236 | |||
| 237 | /// The default `VersionRange` represents the range that the Zig Standard Library | ||
| 238 | /// bases its abstractions on. | ||
| 239 | pub fn default(tag: Tag, arch: Cpu.Arch) VersionRange { | ||
| 240 | switch (tag) { | ||
| 241 | .freestanding, | ||
| 242 | .ananas, | ||
| 243 | .cloudabi, | ||
| 244 | .fuchsia, | ||
| 245 | .kfreebsd, | ||
| 246 | .lv2, | ||
| 247 | .zos, | ||
| 248 | .haiku, | ||
| 249 | .minix, | ||
| 250 | .rtems, | ||
| 251 | .nacl, | ||
| 252 | .aix, | ||
| 253 | .cuda, | ||
| 254 | .nvcl, | ||
| 255 | .amdhsa, | ||
| 256 | .ps4, | ||
| 257 | .ps5, | ||
| 258 | .elfiamcu, | ||
| 259 | .mesa3d, | ||
| 260 | .contiki, | ||
| 261 | .amdpal, | ||
| 262 | .hermit, | ||
| 263 | .hurd, | ||
| 264 | .wasi, | ||
| 265 | .emscripten, | ||
| 266 | .driverkit, | ||
| 267 | .shadermodel, | ||
| 268 | .liteos, | ||
| 269 | .uefi, | ||
| 270 | .opencl, // TODO: OpenCL versions | ||
| 271 | .glsl450, // TODO: GLSL versions | ||
| 272 | .vulkan, | ||
| 273 | .plan9, | ||
| 274 | .illumos, | ||
| 275 | .other, | ||
| 276 | => return .{ .none = {} }, | ||
| 277 | |||
| 278 | .freebsd => return .{ | ||
| 279 | .semver = Version.Range{ | ||
| 280 | .min = .{ .major = 12, .minor = 0, .patch = 0 }, | ||
| 281 | .max = .{ .major = 14, .minor = 0, .patch = 0 }, | ||
| 282 | }, | ||
| 283 | }, | ||
| 284 | .macos => return switch (arch) { | ||
| 285 | .aarch64 => VersionRange{ | ||
| 286 | .semver = .{ | ||
| 287 | .min = .{ .major = 11, .minor = 7, .patch = 1 }, | ||
| 288 | .max = .{ .major = 14, .minor = 1, .patch = 0 }, | ||
| 289 | }, | ||
| 290 | }, | ||
| 291 | .x86_64 => VersionRange{ | ||
| 292 | .semver = .{ | ||
| 293 | .min = .{ .major = 11, .minor = 7, .patch = 1 }, | ||
| 294 | .max = .{ .major = 14, .minor = 1, .patch = 0 }, | ||
| 295 | }, | ||
| 296 | }, | ||
| 297 | else => unreachable, | ||
| 298 | }, | ||
| 299 | .ios => return .{ | ||
| 300 | .semver = .{ | ||
| 301 | .min = .{ .major = 12, .minor = 0, .patch = 0 }, | ||
| 302 | .max = .{ .major = 17, .minor = 1, .patch = 0 }, | ||
| 303 | }, | ||
| 304 | }, | ||
| 305 | .watchos => return .{ | ||
| 306 | .semver = .{ | ||
| 307 | .min = .{ .major = 6, .minor = 0, .patch = 0 }, | ||
| 308 | .max = .{ .major = 10, .minor = 1, .patch = 0 }, | ||
| 309 | }, | ||
| 310 | }, | ||
| 311 | .tvos => return .{ | ||
| 312 | .semver = .{ | ||
| 313 | .min = .{ .major = 13, .minor = 0, .patch = 0 }, | ||
| 314 | .max = .{ .major = 17, .minor = 1, .patch = 0 }, | ||
| 315 | }, | ||
| 316 | }, | ||
| 317 | .netbsd => return .{ | ||
| 318 | .semver = .{ | ||
| 319 | .min = .{ .major = 8, .minor = 0, .patch = 0 }, | ||
| 320 | .max = .{ .major = 10, .minor = 0, .patch = 0 }, | ||
| 321 | }, | ||
| 322 | }, | ||
| 323 | .openbsd => return .{ | ||
| 324 | .semver = .{ | ||
| 325 | .min = .{ .major = 6, .minor = 8, .patch = 0 }, | ||
| 326 | .max = .{ .major = 7, .minor = 4, .patch = 0 }, | ||
| 327 | }, | ||
| 328 | }, | ||
| 329 | .dragonfly => return .{ | ||
| 330 | .semver = .{ | ||
| 331 | .min = .{ .major = 5, .minor = 8, .patch = 0 }, | ||
| 332 | .max = .{ .major = 6, .minor = 4, .patch = 0 }, | ||
| 333 | }, | ||
| 334 | }, | ||
| 335 | .solaris => return .{ | ||
| 336 | .semver = .{ | ||
| 337 | .min = .{ .major = 5, .minor = 11, .patch = 0 }, | ||
| 338 | .max = .{ .major = 5, .minor = 11, .patch = 0 }, | ||
| 339 | }, | ||
| 340 | }, | ||
| 341 | |||
| 342 | .linux => return .{ | ||
| 343 | .linux = .{ | ||
| 344 | .range = .{ | ||
| 345 | .min = .{ .major = 4, .minor = 19, .patch = 0 }, | ||
| 346 | .max = .{ .major = 6, .minor = 5, .patch = 7 }, | ||
| 347 | }, | ||
| 348 | .glibc = .{ .major = 2, .minor = 28, .patch = 0 }, | ||
| 349 | }, | ||
| 350 | }, | ||
| 351 | |||
| 352 | .windows => return .{ | ||
| 353 | .windows = .{ | ||
| 354 | .min = .win8_1, | ||
| 355 | .max = WindowsVersion.latest, | ||
| 356 | }, | ||
| 357 | }, | ||
| 358 | } | ||
| 359 | } | ||
| 360 | }; | ||
| 361 | |||
| 362 | pub const TaggedVersionRange = union(enum) { | ||
| 363 | none: void, | ||
| 364 | semver: Version.Range, | ||
| 365 | linux: LinuxVersionRange, | ||
| 366 | windows: WindowsVersion.Range, | ||
| 367 | }; | ||
| 368 | |||
| 369 | /// Provides a tagged union. `Target` does not store the tag because it is | ||
| 370 | /// redundant with the OS tag; this function abstracts that part away. | ||
| 371 | pub inline fn getVersionRange(self: Os) TaggedVersionRange { | ||
| 372 | switch (self.tag) { | ||
| 373 | .linux => return TaggedVersionRange{ .linux = self.version_range.linux }, | ||
| 374 | .windows => return TaggedVersionRange{ .windows = self.version_range.windows }, | ||
| 375 | |||
| 376 | .freebsd, | ||
| 377 | .macos, | ||
| 378 | .ios, | ||
| 379 | .tvos, | ||
| 380 | .watchos, | ||
| 381 | .netbsd, | ||
| 382 | .openbsd, | ||
| 383 | .dragonfly, | ||
| 384 | .solaris, | ||
| 385 | => return TaggedVersionRange{ .semver = self.version_range.semver }, | ||
| 386 | |||
| 387 | else => return .none, | ||
| 388 | } | ||
| 389 | } | ||
| 390 | |||
| 391 | /// Checks if system is guaranteed to be at least `version` or older than `version`. | ||
| 392 | /// Returns `null` if a runtime check is required. | ||
| 393 | pub inline fn isAtLeast(self: Os, comptime tag: Tag, version: anytype) ?bool { | ||
| 394 | if (self.tag != tag) return false; | ||
| 395 | |||
| 396 | return switch (tag) { | ||
| 397 | .linux => self.version_range.linux.isAtLeast(version), | ||
| 398 | .windows => self.version_range.windows.isAtLeast(version), | ||
| 399 | else => self.version_range.semver.isAtLeast(version), | ||
| 400 | }; | ||
| 401 | } | ||
| 402 | |||
| 403 | /// On Darwin, we always link libSystem which contains libc. | ||
| 404 | /// Similarly on FreeBSD and NetBSD we always link system libc | ||
| 405 | /// since this is the stable syscall interface. | ||
| 406 | pub fn requiresLibC(os: Os) bool { | ||
| 407 | return switch (os.tag) { | ||
| 408 | .freebsd, | ||
| 409 | .netbsd, | ||
| 410 | .macos, | ||
| 411 | .ios, | ||
| 412 | .tvos, | ||
| 413 | .watchos, | ||
| 414 | .dragonfly, | ||
| 415 | .openbsd, | ||
| 416 | .haiku, | ||
| 417 | .solaris, | ||
| 418 | .illumos, | ||
| 419 | => true, | ||
| 420 | |||
| 421 | .linux, | ||
| 422 | .windows, | ||
| 423 | .freestanding, | ||
| 424 | .ananas, | ||
| 425 | .cloudabi, | ||
| 426 | .fuchsia, | ||
| 427 | .kfreebsd, | ||
| 428 | .lv2, | ||
| 429 | .zos, | ||
| 430 | .minix, | ||
| 431 | .rtems, | ||
| 432 | .nacl, | ||
| 433 | .aix, | ||
| 434 | .cuda, | ||
| 435 | .nvcl, | ||
| 436 | .amdhsa, | ||
| 437 | .ps4, | ||
| 438 | .ps5, | ||
| 439 | .elfiamcu, | ||
| 440 | .mesa3d, | ||
| 441 | .contiki, | ||
| 442 | .amdpal, | ||
| 443 | .hermit, | ||
| 444 | .hurd, | ||
| 445 | .wasi, | ||
| 446 | .emscripten, | ||
| 447 | .driverkit, | ||
| 448 | .shadermodel, | ||
| 449 | .liteos, | ||
| 450 | .uefi, | ||
| 451 | .opencl, | ||
| 452 | .glsl450, | ||
| 453 | .vulkan, | ||
| 454 | .plan9, | ||
| 455 | .other, | ||
| 456 | => false, | ||
| 457 | }; | ||
| 458 | } | ||
| 459 | }; | ||
| 460 | |||
| 461 | pub const aarch64 = @import("target/aarch64.zig"); | ||
| 462 | pub const arc = @import("target/arc.zig"); | ||
| 463 | pub const amdgpu = @import("target/amdgpu.zig"); | ||
| 464 | pub const arm = @import("target/arm.zig"); | ||
| 465 | pub const avr = @import("target/avr.zig"); | ||
| 466 | pub const bpf = @import("target/bpf.zig"); | ||
| 467 | pub const csky = @import("target/csky.zig"); | ||
| 468 | pub const hexagon = @import("target/hexagon.zig"); | ||
| 469 | pub const loongarch = @import("target/loongarch.zig"); | ||
| 470 | pub const m68k = @import("target/m68k.zig"); | ||
| 471 | pub const mips = @import("target/mips.zig"); | ||
| 472 | pub const msp430 = @import("target/msp430.zig"); | ||
| 473 | pub const nvptx = @import("target/nvptx.zig"); | ||
| 474 | pub const powerpc = @import("target/powerpc.zig"); | ||
| 475 | pub const riscv = @import("target/riscv.zig"); | ||
| 476 | pub const sparc = @import("target/sparc.zig"); | ||
| 477 | pub const spirv = @import("target/spirv.zig"); | ||
| 478 | pub const s390x = @import("target/s390x.zig"); | ||
| 479 | pub const ve = @import("target/ve.zig"); | ||
| 480 | pub const wasm = @import("target/wasm.zig"); | ||
| 481 | pub const x86 = @import("target/x86.zig"); | ||
| 482 | pub const xtensa = @import("target/xtensa.zig"); | ||
| 483 | |||
| 484 | pub const Abi = enum { | ||
| 485 | none, | ||
| 486 | gnu, | ||
| 487 | gnuabin32, | ||
| 488 | gnuabi64, | ||
| 489 | gnueabi, | ||
| 490 | gnueabihf, | ||
| 491 | gnuf32, | ||
| 492 | gnuf64, | ||
| 493 | gnusf, | ||
| 494 | gnux32, | ||
| 495 | gnuilp32, | ||
| 496 | code16, | ||
| 497 | eabi, | ||
| 498 | eabihf, | ||
| 499 | android, | ||
| 500 | musl, | ||
| 501 | musleabi, | ||
| 502 | musleabihf, | ||
| 503 | muslx32, | ||
| 504 | msvc, | ||
| 505 | itanium, | ||
| 506 | cygnus, | ||
| 507 | coreclr, | ||
| 508 | simulator, | ||
| 509 | macabi, | ||
| 510 | pixel, | ||
| 511 | vertex, | ||
| 512 | geometry, | ||
| 513 | hull, | ||
| 514 | domain, | ||
| 515 | compute, | ||
| 516 | library, | ||
| 517 | raygeneration, | ||
| 518 | intersection, | ||
| 519 | anyhit, | ||
| 520 | closesthit, | ||
| 521 | miss, | ||
| 522 | callable, | ||
| 523 | mesh, | ||
| 524 | amplification, | ||
| 525 | |||
| 526 | pub fn default(arch: Cpu.Arch, target_os: Os) Abi { | ||
| 527 | if (arch.isWasm()) { | ||
| 528 | return .musl; | ||
| 529 | } | ||
| 530 | switch (target_os.tag) { | ||
| 531 | .freestanding, | ||
| 532 | .ananas, | ||
| 533 | .cloudabi, | ||
| 534 | .dragonfly, | ||
| 535 | .lv2, | ||
| 536 | .zos, | ||
| 537 | .minix, | ||
| 538 | .rtems, | ||
| 539 | .nacl, | ||
| 540 | .aix, | ||
| 541 | .cuda, | ||
| 542 | .nvcl, | ||
| 543 | .amdhsa, | ||
| 544 | .ps4, | ||
| 545 | .ps5, | ||
| 546 | .elfiamcu, | ||
| 547 | .mesa3d, | ||
| 548 | .contiki, | ||
| 549 | .amdpal, | ||
| 550 | .hermit, | ||
| 551 | .other, | ||
| 552 | => return .eabi, | ||
| 553 | .openbsd, | ||
| 554 | .freebsd, | ||
| 555 | .fuchsia, | ||
| 556 | .kfreebsd, | ||
| 557 | .netbsd, | ||
| 558 | .hurd, | ||
| 559 | .haiku, | ||
| 560 | .windows, | ||
| 561 | => return .gnu, | ||
| 562 | .uefi => return .msvc, | ||
| 563 | .linux, | ||
| 564 | .wasi, | ||
| 565 | .emscripten, | ||
| 566 | => return .musl, | ||
| 567 | .opencl, // TODO: SPIR-V ABIs with Linkage capability | ||
| 568 | .glsl450, | ||
| 569 | .vulkan, | ||
| 570 | .plan9, // TODO specify abi | ||
| 571 | .macos, | ||
| 572 | .ios, | ||
| 573 | .tvos, | ||
| 574 | .watchos, | ||
| 575 | .driverkit, | ||
| 576 | .shadermodel, | ||
| 577 | .liteos, // TODO: audit this | ||
| 578 | .solaris, | ||
| 579 | .illumos, | ||
| 580 | => return .none, | ||
| 581 | } | ||
| 582 | } | ||
| 583 | |||
| 584 | pub inline fn isGnu(abi: Abi) bool { | ||
| 585 | return switch (abi) { | ||
| 586 | .gnu, .gnuabin32, .gnuabi64, .gnueabi, .gnueabihf, .gnux32 => true, | ||
| 587 | else => false, | ||
| 588 | }; | ||
| 589 | } | ||
| 590 | |||
| 591 | pub inline fn isMusl(abi: Abi) bool { | ||
| 592 | return switch (abi) { | ||
| 593 | .musl, .musleabi, .musleabihf => true, | ||
| 594 | else => false, | ||
| 595 | }; | ||
| 596 | } | ||
| 597 | |||
| 598 | pub inline fn floatAbi(abi: Abi) FloatAbi { | ||
| 599 | return switch (abi) { | ||
| 600 | .gnueabihf, | ||
| 601 | .eabihf, | ||
| 602 | .musleabihf, | ||
| 603 | => .hard, | ||
| 604 | else => .soft, | ||
| 605 | }; | ||
| 606 | } | ||
| 607 | }; | ||
| 608 | |||
| 609 | pub const ObjectFormat = enum { | ||
| 610 | /// Common Object File Format (Windows) | ||
| 611 | coff, | ||
| 612 | /// DirectX Container | ||
| 613 | dxcontainer, | ||
| 614 | /// Executable and Linking Format | ||
| 615 | elf, | ||
| 616 | /// macOS relocatables | ||
| 617 | macho, | ||
| 618 | /// Standard, Portable Intermediate Representation V | ||
| 619 | spirv, | ||
| 620 | /// WebAssembly | ||
| 621 | wasm, | ||
| 622 | /// C source code | ||
| 623 | c, | ||
| 624 | /// Intel IHEX | ||
| 625 | hex, | ||
| 626 | /// Machine code with no metadata. | ||
| 627 | raw, | ||
| 628 | /// Plan 9 from Bell Labs | ||
| 629 | plan9, | ||
| 630 | /// Nvidia PTX format | ||
| 631 | nvptx, | ||
| 632 | |||
| 633 | pub fn fileExt(of: ObjectFormat, cpu_arch: Cpu.Arch) [:0]const u8 { | ||
| 634 | return switch (of) { | ||
| 635 | .coff => ".obj", | ||
| 636 | .elf, .macho, .wasm => ".o", | ||
| 637 | .c => ".c", | ||
| 638 | .spirv => ".spv", | ||
| 639 | .hex => ".ihex", | ||
| 640 | .raw => ".bin", | ||
| 641 | .plan9 => plan9Ext(cpu_arch), | ||
| 642 | .nvptx => ".ptx", | ||
| 643 | .dxcontainer => ".dxil", | ||
| 644 | }; | ||
| 645 | } | ||
| 646 | |||
| 647 | pub fn default(os_tag: Os.Tag, cpu_arch: Cpu.Arch) ObjectFormat { | ||
| 648 | return switch (os_tag) { | ||
| 649 | .windows, .uefi => .coff, | ||
| 650 | .ios, .macos, .watchos, .tvos => .macho, | ||
| 651 | .plan9 => .plan9, | ||
| 652 | else => return switch (cpu_arch) { | ||
| 653 | .wasm32, .wasm64 => .wasm, | ||
| 654 | .spirv32, .spirv64 => .spirv, | ||
| 655 | .nvptx, .nvptx64 => .nvptx, | ||
| 656 | else => .elf, | ||
| 657 | }, | ||
| 658 | }; | ||
| 659 | } | ||
| 660 | }; | ||
| 661 | |||
| 662 | pub const SubSystem = enum { | ||
| 663 | Console, | ||
| 664 | Windows, | ||
| 665 | Posix, | ||
| 666 | Native, | ||
| 667 | EfiApplication, | ||
| 668 | EfiBootServiceDriver, | ||
| 669 | EfiRom, | ||
| 670 | EfiRuntimeDriver, | ||
| 671 | }; | ||
| 672 | |||
| 673 | pub const Cpu = struct { | ||
| 674 | /// Architecture | ||
| 675 | arch: Arch, | ||
| 676 | |||
| 677 | /// The CPU model to target. It has a set of features | ||
| 678 | /// which are overridden with the `features` field. | ||
| 679 | model: *const Model, | ||
| 680 | |||
| 681 | /// An explicit list of the entire CPU feature set. It may differ from the specific CPU model's features. | ||
| 682 | features: Feature.Set, | ||
| 683 | |||
| 684 | pub const Feature = struct { | ||
| 685 | /// The bit index into `Set`. Has a default value of `undefined` because the canonical | ||
| 686 | /// structures are populated via comptime logic. | ||
| 687 | index: Set.Index = undefined, | ||
| 688 | |||
| 689 | /// Has a default value of `undefined` because the canonical | ||
| 690 | /// structures are populated via comptime logic. | ||
| 691 | name: []const u8 = undefined, | ||
| 692 | |||
| 693 | /// If this corresponds to an LLVM-recognized feature, this will be populated; | ||
| 694 | /// otherwise null. | ||
| 695 | llvm_name: ?[:0]const u8, | ||
| 696 | |||
| 697 | /// Human-friendly UTF-8 text. | ||
| 698 | description: []const u8, | ||
| 699 | |||
| 700 | /// Sparse `Set` of features this depends on. | ||
| 701 | dependencies: Set, | ||
| 702 | |||
| 703 | /// A bit set of all the features. | ||
| 704 | pub const Set = struct { | ||
| 705 | ints: [usize_count]usize, | ||
| 706 | |||
| 707 | pub const needed_bit_count = 288; | ||
| 708 | pub const byte_count = (needed_bit_count + 7) / 8; | ||
| 709 | pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize); | ||
| 710 | pub const Index = std.math.Log2Int(std.meta.Int(.unsigned, usize_count * @bitSizeOf(usize))); | ||
| 711 | pub const ShiftInt = std.math.Log2Int(usize); | ||
| 712 | |||
| 713 | pub const empty = Set{ .ints = [1]usize{0} ** usize_count }; | ||
| 714 | |||
| 715 | pub fn isEmpty(set: Set) bool { | ||
| 716 | return for (set.ints) |x| { | ||
| 717 | if (x != 0) break false; | ||
| 718 | } else true; | ||
| 719 | } | ||
| 720 | |||
| 721 | pub fn isEnabled(set: Set, arch_feature_index: Index) bool { | ||
| 722 | const usize_index = arch_feature_index / @bitSizeOf(usize); | ||
| 723 | const bit_index = @as(ShiftInt, @intCast(arch_feature_index % @bitSizeOf(usize))); | ||
| 724 | return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0; | ||
| 725 | } | ||
| 726 | |||
| 727 | /// Adds the specified feature but not its dependencies. | ||
| 728 | pub fn addFeature(set: *Set, arch_feature_index: Index) void { | ||
| 729 | const usize_index = arch_feature_index / @bitSizeOf(usize); | ||
| 730 | const bit_index = @as(ShiftInt, @intCast(arch_feature_index % @bitSizeOf(usize))); | ||
| 731 | set.ints[usize_index] |= @as(usize, 1) << bit_index; | ||
| 732 | } | ||
| 733 | |||
| 734 | /// Adds the specified feature set but not its dependencies. | ||
| 735 | pub fn addFeatureSet(set: *Set, other_set: Set) void { | ||
| 736 | switch (builtin.zig_backend) { | ||
| 737 | .stage2_x86_64 => { | ||
| 738 | for (&set.ints, other_set.ints) |*set_int, other_set_int| set_int.* |= other_set_int; | ||
| 739 | }, | ||
| 740 | else => { | ||
| 741 | set.ints = @as(@Vector(usize_count, usize), set.ints) | @as(@Vector(usize_count, usize), other_set.ints); | ||
| 742 | }, | ||
| 743 | } | ||
| 744 | } | ||
| 745 | |||
| 746 | /// Removes the specified feature but not its dependents. | ||
| 747 | pub fn removeFeature(set: *Set, arch_feature_index: Index) void { | ||
| 748 | const usize_index = arch_feature_index / @bitSizeOf(usize); | ||
| 749 | const bit_index = @as(ShiftInt, @intCast(arch_feature_index % @bitSizeOf(usize))); | ||
| 750 | set.ints[usize_index] &= ~(@as(usize, 1) << bit_index); | ||
| 751 | } | ||
| 752 | |||
| 753 | /// Removes the specified feature but not its dependents. | ||
| 754 | pub fn removeFeatureSet(set: *Set, other_set: Set) void { | ||
| 755 | switch (builtin.zig_backend) { | ||
| 756 | .stage2_x86_64 => { | ||
| 757 | for (&set.ints, other_set.ints) |*set_int, other_set_int| set_int.* &= ~other_set_int; | ||
| 758 | }, | ||
| 759 | else => { | ||
| 760 | set.ints = @as(@Vector(usize_count, usize), set.ints) & ~@as(@Vector(usize_count, usize), other_set.ints); | ||
| 761 | }, | ||
| 762 | } | ||
| 763 | } | ||
| 764 | |||
| 765 | pub fn populateDependencies(set: *Set, all_features_list: []const Cpu.Feature) void { | ||
| 766 | @setEvalBranchQuota(1000000); | ||
| 767 | |||
| 768 | var old = set.ints; | ||
| 769 | while (true) { | ||
| 770 | for (all_features_list, 0..) |feature, index_usize| { | ||
| 771 | const index = @as(Index, @intCast(index_usize)); | ||
| 772 | if (set.isEnabled(index)) { | ||
| 773 | set.addFeatureSet(feature.dependencies); | ||
| 774 | } | ||
| 775 | } | ||
| 776 | const nothing_changed = mem.eql(usize, &old, &set.ints); | ||
| 777 | if (nothing_changed) return; | ||
| 778 | old = set.ints; | ||
| 779 | } | ||
| 780 | } | ||
| 781 | |||
| 782 | pub fn asBytes(set: *const Set) *const [byte_count]u8 { | ||
| 783 | return @as(*const [byte_count]u8, @ptrCast(&set.ints)); | ||
| 784 | } | ||
| 785 | |||
| 786 | pub fn eql(set: Set, other_set: Set) bool { | ||
| 787 | return mem.eql(usize, &set.ints, &other_set.ints); | ||
| 788 | } | ||
| 789 | |||
| 790 | pub fn isSuperSetOf(set: Set, other_set: Set) bool { | ||
| 791 | switch (builtin.zig_backend) { | ||
| 792 | .stage2_x86_64 => { | ||
| 793 | var result = true; | ||
| 794 | for (&set.ints, other_set.ints) |*set_int, other_set_int| | ||
| 795 | result = result and (set_int.* & other_set_int) == other_set_int; | ||
| 796 | return result; | ||
| 797 | }, | ||
| 798 | else => { | ||
| 799 | const V = @Vector(usize_count, usize); | ||
| 800 | const set_v: V = set.ints; | ||
| 801 | const other_v: V = other_set.ints; | ||
| 802 | return @reduce(.And, (set_v & other_v) == other_v); | ||
| 803 | }, | ||
| 804 | } | ||
| 805 | } | ||
| 806 | }; | ||
| 807 | |||
| 808 | pub fn feature_set_fns(comptime F: type) type { | ||
| 809 | return struct { | ||
| 810 | /// Populates only the feature bits specified. | ||
| 811 | pub fn featureSet(features: []const F) Set { | ||
| 812 | var x = Set.empty; | ||
| 813 | for (features) |feature| { | ||
| 814 | x.addFeature(@intFromEnum(feature)); | ||
| 815 | } | ||
| 816 | return x; | ||
| 817 | } | ||
| 818 | |||
| 819 | /// Returns true if the specified feature is enabled. | ||
| 820 | pub fn featureSetHas(set: Set, feature: F) bool { | ||
| 821 | return set.isEnabled(@intFromEnum(feature)); | ||
| 822 | } | ||
| 823 | |||
| 824 | /// Returns true if any specified feature is enabled. | ||
| 825 | pub fn featureSetHasAny(set: Set, features: anytype) bool { | ||
| 826 | inline for (features) |feature| { | ||
| 827 | if (set.isEnabled(@intFromEnum(@as(F, feature)))) return true; | ||
| 828 | } | ||
| 829 | return false; | ||
| 830 | } | ||
| 831 | |||
| 832 | /// Returns true if every specified feature is enabled. | ||
| 833 | pub fn featureSetHasAll(set: Set, features: anytype) bool { | ||
| 834 | inline for (features) |feature| { | ||
| 835 | if (!set.isEnabled(@intFromEnum(@as(F, feature)))) return false; | ||
| 836 | } | ||
| 837 | return true; | ||
| 838 | } | ||
| 839 | }; | ||
| 840 | } | ||
| 841 | }; | ||
| 842 | |||
| 843 | pub const Arch = enum { | ||
| 844 | arm, | ||
| 845 | armeb, | ||
| 846 | aarch64, | ||
| 847 | aarch64_be, | ||
| 848 | aarch64_32, | ||
| 849 | arc, | ||
| 850 | avr, | ||
| 851 | bpfel, | ||
| 852 | bpfeb, | ||
| 853 | csky, | ||
| 854 | dxil, | ||
| 855 | hexagon, | ||
| 856 | loongarch32, | ||
| 857 | loongarch64, | ||
| 858 | m68k, | ||
| 859 | mips, | ||
| 860 | mipsel, | ||
| 861 | mips64, | ||
| 862 | mips64el, | ||
| 863 | msp430, | ||
| 864 | powerpc, | ||
| 865 | powerpcle, | ||
| 866 | powerpc64, | ||
| 867 | powerpc64le, | ||
| 868 | r600, | ||
| 869 | amdgcn, | ||
| 870 | riscv32, | ||
| 871 | riscv64, | ||
| 872 | sparc, | ||
| 873 | sparc64, | ||
| 874 | sparcel, | ||
| 875 | s390x, | ||
| 876 | tce, | ||
| 877 | tcele, | ||
| 878 | thumb, | ||
| 879 | thumbeb, | ||
| 880 | x86, | ||
| 881 | x86_64, | ||
| 882 | xcore, | ||
| 883 | xtensa, | ||
| 884 | nvptx, | ||
| 885 | nvptx64, | ||
| 886 | le32, | ||
| 887 | le64, | ||
| 888 | amdil, | ||
| 889 | amdil64, | ||
| 890 | hsail, | ||
| 891 | hsail64, | ||
| 892 | spir, | ||
| 893 | spir64, | ||
| 894 | spirv32, | ||
| 895 | spirv64, | ||
| 896 | kalimba, | ||
| 897 | shave, | ||
| 898 | lanai, | ||
| 899 | wasm32, | ||
| 900 | wasm64, | ||
| 901 | renderscript32, | ||
| 902 | renderscript64, | ||
| 903 | ve, | ||
| 904 | // Stage1 currently assumes that architectures above this comment | ||
| 905 | // map one-to-one with the ZigLLVM_ArchType enum. | ||
| 906 | spu_2, | ||
| 907 | |||
| 908 | pub inline fn isX86(arch: Arch) bool { | ||
| 909 | return switch (arch) { | ||
| 910 | .x86, .x86_64 => true, | ||
| 911 | else => false, | ||
| 912 | }; | ||
| 913 | } | ||
| 914 | |||
| 915 | pub inline fn isARM(arch: Arch) bool { | ||
| 916 | return switch (arch) { | ||
| 917 | .arm, .armeb => true, | ||
| 918 | else => false, | ||
| 919 | }; | ||
| 920 | } | ||
| 921 | |||
| 922 | pub inline fn isAARCH64(arch: Arch) bool { | ||
| 923 | return switch (arch) { | ||
| 924 | .aarch64, .aarch64_be, .aarch64_32 => true, | ||
| 925 | else => false, | ||
| 926 | }; | ||
| 927 | } | ||
| 928 | |||
| 929 | pub inline fn isThumb(arch: Arch) bool { | ||
| 930 | return switch (arch) { | ||
| 931 | .thumb, .thumbeb => true, | ||
| 932 | else => false, | ||
| 933 | }; | ||
| 934 | } | ||
| 935 | |||
| 936 | pub inline fn isArmOrThumb(arch: Arch) bool { | ||
| 937 | return arch.isARM() or arch.isThumb(); | ||
| 938 | } | ||
| 939 | |||
| 940 | pub inline fn isWasm(arch: Arch) bool { | ||
| 941 | return switch (arch) { | ||
| 942 | .wasm32, .wasm64 => true, | ||
| 943 | else => false, | ||
| 944 | }; | ||
| 945 | } | ||
| 946 | |||
| 947 | pub inline fn isRISCV(arch: Arch) bool { | ||
| 948 | return switch (arch) { | ||
| 949 | .riscv32, .riscv64 => true, | ||
| 950 | else => false, | ||
| 951 | }; | ||
| 952 | } | ||
| 953 | |||
| 954 | pub inline fn isMIPS(arch: Arch) bool { | ||
| 955 | return switch (arch) { | ||
| 956 | .mips, .mipsel, .mips64, .mips64el => true, | ||
| 957 | else => false, | ||
| 958 | }; | ||
| 959 | } | ||
| 960 | |||
| 961 | pub inline fn isPPC(arch: Arch) bool { | ||
| 962 | return switch (arch) { | ||
| 963 | .powerpc, .powerpcle => true, | ||
| 964 | else => false, | ||
| 965 | }; | ||
| 966 | } | ||
| 967 | |||
| 968 | pub inline fn isPPC64(arch: Arch) bool { | ||
| 969 | return switch (arch) { | ||
| 970 | .powerpc64, .powerpc64le => true, | ||
| 971 | else => false, | ||
| 972 | }; | ||
| 973 | } | ||
| 974 | |||
| 975 | pub inline fn isSPARC(arch: Arch) bool { | ||
| 976 | return switch (arch) { | ||
| 977 | .sparc, .sparcel, .sparc64 => true, | ||
| 978 | else => false, | ||
| 979 | }; | ||
| 980 | } | ||
| 981 | |||
| 982 | pub inline fn isSpirV(arch: Arch) bool { | ||
| 983 | return switch (arch) { | ||
| 984 | .spirv32, .spirv64 => true, | ||
| 985 | else => false, | ||
| 986 | }; | ||
| 987 | } | ||
| 988 | |||
| 989 | pub inline fn isBpf(arch: Arch) bool { | ||
| 990 | return switch (arch) { | ||
| 991 | .bpfel, .bpfeb => true, | ||
| 992 | else => false, | ||
| 993 | }; | ||
| 994 | } | ||
| 995 | |||
| 996 | pub inline fn isNvptx(arch: Arch) bool { | ||
| 997 | return switch (arch) { | ||
| 998 | .nvptx, .nvptx64 => true, | ||
| 999 | else => false, | ||
| 1000 | }; | ||
| 1001 | } | ||
| 1002 | |||
| 1003 | pub fn parseCpuModel(arch: Arch, cpu_name: []const u8) !*const Cpu.Model { | ||
| 1004 | for (arch.allCpuModels()) |cpu| { | ||
| 1005 | if (mem.eql(u8, cpu_name, cpu.name)) { | ||
| 1006 | return cpu; | ||
| 1007 | } | ||
| 1008 | } | ||
| 1009 | return error.UnknownCpuModel; | ||
| 1010 | } | ||
| 1011 | |||
| 1012 | pub fn toElfMachine(arch: Arch) std.elf.EM { | ||
| 1013 | return switch (arch) { | ||
| 1014 | .avr => .AVR, | ||
| 1015 | .msp430 => .MSP430, | ||
| 1016 | .arc => .ARC, | ||
| 1017 | .arm => .ARM, | ||
| 1018 | .armeb => .ARM, | ||
| 1019 | .hexagon => .HEXAGON, | ||
| 1020 | .dxil => .NONE, | ||
| 1021 | .m68k => .@"68K", | ||
| 1022 | .le32 => .NONE, | ||
| 1023 | .mips => .MIPS, | ||
| 1024 | .mipsel => .MIPS_RS3_LE, | ||
| 1025 | .powerpc, .powerpcle => .PPC, | ||
| 1026 | .r600 => .NONE, | ||
| 1027 | .riscv32 => .RISCV, | ||
| 1028 | .sparc => .SPARC, | ||
| 1029 | .sparcel => .SPARC, | ||
| 1030 | .tce => .NONE, | ||
| 1031 | .tcele => .NONE, | ||
| 1032 | .thumb => .ARM, | ||
| 1033 | .thumbeb => .ARM, | ||
| 1034 | .x86 => .@"386", | ||
| 1035 | .xcore => .XCORE, | ||
| 1036 | .xtensa => .XTENSA, | ||
| 1037 | .nvptx => .NONE, | ||
| 1038 | .amdil => .NONE, | ||
| 1039 | .hsail => .NONE, | ||
| 1040 | .spir => .NONE, | ||
| 1041 | .kalimba => .CSR_KALIMBA, | ||
| 1042 | .shave => .NONE, | ||
| 1043 | .lanai => .LANAI, | ||
| 1044 | .wasm32 => .NONE, | ||
| 1045 | .renderscript32 => .NONE, | ||
| 1046 | .aarch64_32 => .AARCH64, | ||
| 1047 | .aarch64 => .AARCH64, | ||
| 1048 | .aarch64_be => .AARCH64, | ||
| 1049 | .mips64 => .MIPS, | ||
| 1050 | .mips64el => .MIPS_RS3_LE, | ||
| 1051 | .powerpc64 => .PPC64, | ||
| 1052 | .powerpc64le => .PPC64, | ||
| 1053 | .riscv64 => .RISCV, | ||
| 1054 | .x86_64 => .X86_64, | ||
| 1055 | .nvptx64 => .NONE, | ||
| 1056 | .le64 => .NONE, | ||
| 1057 | .amdil64 => .NONE, | ||
| 1058 | .hsail64 => .NONE, | ||
| 1059 | .spir64 => .NONE, | ||
| 1060 | .wasm64 => .NONE, | ||
| 1061 | .renderscript64 => .NONE, | ||
| 1062 | .amdgcn => .AMDGPU, | ||
| 1063 | .bpfel => .BPF, | ||
| 1064 | .bpfeb => .BPF, | ||
| 1065 | .csky => .CSKY, | ||
| 1066 | .sparc64 => .SPARCV9, | ||
| 1067 | .s390x => .S390, | ||
| 1068 | .ve => .NONE, | ||
| 1069 | .spu_2 => .SPU_2, | ||
| 1070 | .spirv32 => .NONE, | ||
| 1071 | .spirv64 => .NONE, | ||
| 1072 | .loongarch32 => .NONE, | ||
| 1073 | .loongarch64 => .NONE, | ||
| 1074 | }; | ||
| 1075 | } | ||
| 1076 | |||
| 1077 | pub fn toCoffMachine(arch: Arch) std.coff.MachineType { | ||
| 1078 | return switch (arch) { | ||
| 1079 | .avr => .Unknown, | ||
| 1080 | .msp430 => .Unknown, | ||
| 1081 | .arc => .Unknown, | ||
| 1082 | .arm => .ARM, | ||
| 1083 | .armeb => .Unknown, | ||
| 1084 | .dxil => .Unknown, | ||
| 1085 | .hexagon => .Unknown, | ||
| 1086 | .m68k => .Unknown, | ||
| 1087 | .le32 => .Unknown, | ||
| 1088 | .mips => .Unknown, | ||
| 1089 | .mipsel => .Unknown, | ||
| 1090 | .powerpc, .powerpcle => .POWERPC, | ||
| 1091 | .r600 => .Unknown, | ||
| 1092 | .riscv32 => .RISCV32, | ||
| 1093 | .sparc => .Unknown, | ||
| 1094 | .sparcel => .Unknown, | ||
| 1095 | .tce => .Unknown, | ||
| 1096 | .tcele => .Unknown, | ||
| 1097 | .thumb => .Thumb, | ||
| 1098 | .thumbeb => .Thumb, | ||
| 1099 | .x86 => .I386, | ||
| 1100 | .xcore => .Unknown, | ||
| 1101 | .xtensa => .Unknown, | ||
| 1102 | .nvptx => .Unknown, | ||
| 1103 | .amdil => .Unknown, | ||
| 1104 | .hsail => .Unknown, | ||
| 1105 | .spir => .Unknown, | ||
| 1106 | .kalimba => .Unknown, | ||
| 1107 | .shave => .Unknown, | ||
| 1108 | .lanai => .Unknown, | ||
| 1109 | .wasm32 => .Unknown, | ||
| 1110 | .renderscript32 => .Unknown, | ||
| 1111 | .aarch64_32 => .ARM64, | ||
| 1112 | .aarch64 => .ARM64, | ||
| 1113 | .aarch64_be => .ARM64, | ||
| 1114 | .mips64 => .Unknown, | ||
| 1115 | .mips64el => .Unknown, | ||
| 1116 | .powerpc64 => .Unknown, | ||
| 1117 | .powerpc64le => .Unknown, | ||
| 1118 | .riscv64 => .RISCV64, | ||
| 1119 | .x86_64 => .X64, | ||
| 1120 | .nvptx64 => .Unknown, | ||
| 1121 | .le64 => .Unknown, | ||
| 1122 | .amdil64 => .Unknown, | ||
| 1123 | .hsail64 => .Unknown, | ||
| 1124 | .spir64 => .Unknown, | ||
| 1125 | .wasm64 => .Unknown, | ||
| 1126 | .renderscript64 => .Unknown, | ||
| 1127 | .amdgcn => .Unknown, | ||
| 1128 | .bpfel => .Unknown, | ||
| 1129 | .bpfeb => .Unknown, | ||
| 1130 | .csky => .Unknown, | ||
| 1131 | .sparc64 => .Unknown, | ||
| 1132 | .s390x => .Unknown, | ||
| 1133 | .ve => .Unknown, | ||
| 1134 | .spu_2 => .Unknown, | ||
| 1135 | .spirv32 => .Unknown, | ||
| 1136 | .spirv64 => .Unknown, | ||
| 1137 | .loongarch32 => .Unknown, | ||
| 1138 | .loongarch64 => .Unknown, | ||
| 1139 | }; | ||
| 1140 | } | ||
| 1141 | |||
| 1142 | pub fn endian(arch: Arch) std.builtin.Endian { | ||
| 1143 | return switch (arch) { | ||
| 1144 | .avr, | ||
| 1145 | .arm, | ||
| 1146 | .aarch64_32, | ||
| 1147 | .aarch64, | ||
| 1148 | .amdgcn, | ||
| 1149 | .amdil, | ||
| 1150 | .amdil64, | ||
| 1151 | .bpfel, | ||
| 1152 | .csky, | ||
| 1153 | .xtensa, | ||
| 1154 | .hexagon, | ||
| 1155 | .hsail, | ||
| 1156 | .hsail64, | ||
| 1157 | .kalimba, | ||
| 1158 | .le32, | ||
| 1159 | .le64, | ||
| 1160 | .mipsel, | ||
| 1161 | .mips64el, | ||
| 1162 | .msp430, | ||
| 1163 | .nvptx, | ||
| 1164 | .nvptx64, | ||
| 1165 | .sparcel, | ||
| 1166 | .tcele, | ||
| 1167 | .powerpcle, | ||
| 1168 | .powerpc64le, | ||
| 1169 | .r600, | ||
| 1170 | .riscv32, | ||
| 1171 | .riscv64, | ||
| 1172 | .x86, | ||
| 1173 | .x86_64, | ||
| 1174 | .wasm32, | ||
| 1175 | .wasm64, | ||
| 1176 | .xcore, | ||
| 1177 | .thumb, | ||
| 1178 | .spir, | ||
| 1179 | .spir64, | ||
| 1180 | .renderscript32, | ||
| 1181 | .renderscript64, | ||
| 1182 | .shave, | ||
| 1183 | .ve, | ||
| 1184 | .spu_2, | ||
| 1185 | // GPU bitness is opaque. For now, assume little endian. | ||
| 1186 | .spirv32, | ||
| 1187 | .spirv64, | ||
| 1188 | .dxil, | ||
| 1189 | .loongarch32, | ||
| 1190 | .loongarch64, | ||
| 1191 | .arc, | ||
| 1192 | => .little, | ||
| 1193 | |||
| 1194 | .armeb, | ||
| 1195 | .aarch64_be, | ||
| 1196 | .bpfeb, | ||
| 1197 | .m68k, | ||
| 1198 | .mips, | ||
| 1199 | .mips64, | ||
| 1200 | .powerpc, | ||
| 1201 | .powerpc64, | ||
| 1202 | .thumbeb, | ||
| 1203 | .sparc, | ||
| 1204 | .sparc64, | ||
| 1205 | .tce, | ||
| 1206 | .lanai, | ||
| 1207 | .s390x, | ||
| 1208 | => .big, | ||
| 1209 | }; | ||
| 1210 | } | ||
| 1211 | |||
| 1212 | /// Returns whether this architecture supports the address space | ||
| 1213 | pub fn supportsAddressSpace(arch: Arch, address_space: std.builtin.AddressSpace) bool { | ||
| 1214 | const is_nvptx = arch == .nvptx or arch == .nvptx64; | ||
| 1215 | const is_spirv = arch == .spirv32 or arch == .spirv64; | ||
| 1216 | const is_gpu = is_nvptx or is_spirv or arch == .amdgcn; | ||
| 1217 | return switch (address_space) { | ||
| 1218 | .generic => true, | ||
| 1219 | .fs, .gs, .ss => arch == .x86_64 or arch == .x86, | ||
| 1220 | .global, .constant, .local, .shared => is_gpu, | ||
| 1221 | .param => is_nvptx, | ||
| 1222 | // TODO this should also check how many flash banks the cpu has | ||
| 1223 | .flash, .flash1, .flash2, .flash3, .flash4, .flash5 => arch == .avr, | ||
| 1224 | }; | ||
| 1225 | } | ||
| 1226 | |||
| 1227 | /// Returns a name that matches the lib/std/target/* source file name. | ||
| 1228 | pub fn genericName(arch: Arch) []const u8 { | ||
| 1229 | return switch (arch) { | ||
| 1230 | .arm, .armeb, .thumb, .thumbeb => "arm", | ||
| 1231 | .aarch64, .aarch64_be, .aarch64_32 => "aarch64", | ||
| 1232 | .bpfel, .bpfeb => "bpf", | ||
| 1233 | .loongarch32, .loongarch64 => "loongarch", | ||
| 1234 | .mips, .mipsel, .mips64, .mips64el => "mips", | ||
| 1235 | .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc", | ||
| 1236 | .amdgcn => "amdgpu", | ||
| 1237 | .riscv32, .riscv64 => "riscv", | ||
| 1238 | .sparc, .sparc64, .sparcel => "sparc", | ||
| 1239 | .s390x => "s390x", | ||
| 1240 | .x86, .x86_64 => "x86", | ||
| 1241 | .nvptx, .nvptx64 => "nvptx", | ||
| 1242 | .wasm32, .wasm64 => "wasm", | ||
| 1243 | .spirv32, .spirv64 => "spirv", | ||
| 1244 | else => @tagName(arch), | ||
| 1245 | }; | ||
| 1246 | } | ||
| 1247 | |||
| 1248 | /// All CPU features Zig is aware of, sorted lexicographically by name. | ||
| 1249 | pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { | ||
| 1250 | return switch (arch) { | ||
| 1251 | .arm, .armeb, .thumb, .thumbeb => &arm.all_features, | ||
| 1252 | .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features, | ||
| 1253 | .arc => &arc.all_features, | ||
| 1254 | .avr => &avr.all_features, | ||
| 1255 | .bpfel, .bpfeb => &bpf.all_features, | ||
| 1256 | .csky => &csky.all_features, | ||
| 1257 | .hexagon => &hexagon.all_features, | ||
| 1258 | .loongarch32, .loongarch64 => &loongarch.all_features, | ||
| 1259 | .m68k => &m68k.all_features, | ||
| 1260 | .mips, .mipsel, .mips64, .mips64el => &mips.all_features, | ||
| 1261 | .msp430 => &msp430.all_features, | ||
| 1262 | .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features, | ||
| 1263 | .amdgcn => &amdgpu.all_features, | ||
| 1264 | .riscv32, .riscv64 => &riscv.all_features, | ||
| 1265 | .sparc, .sparc64, .sparcel => &sparc.all_features, | ||
| 1266 | .spirv32, .spirv64 => &spirv.all_features, | ||
| 1267 | .s390x => &s390x.all_features, | ||
| 1268 | .x86, .x86_64 => &x86.all_features, | ||
| 1269 | .xtensa => &xtensa.all_features, | ||
| 1270 | .nvptx, .nvptx64 => &nvptx.all_features, | ||
| 1271 | .ve => &ve.all_features, | ||
| 1272 | .wasm32, .wasm64 => &wasm.all_features, | ||
| 1273 | |||
| 1274 | else => &[0]Cpu.Feature{}, | ||
| 1275 | }; | ||
| 1276 | } | ||
| 1277 | |||
| 1278 | /// All processors Zig is aware of, sorted lexicographically by name. | ||
| 1279 | pub fn allCpuModels(arch: Arch) []const *const Cpu.Model { | ||
| 1280 | return switch (arch) { | ||
| 1281 | .arc => comptime allCpusFromDecls(arc.cpu), | ||
| 1282 | .arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu), | ||
| 1283 | .aarch64, .aarch64_be, .aarch64_32 => comptime allCpusFromDecls(aarch64.cpu), | ||
| 1284 | .avr => comptime allCpusFromDecls(avr.cpu), | ||
| 1285 | .bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu), | ||
| 1286 | .csky => comptime allCpusFromDecls(csky.cpu), | ||
| 1287 | .hexagon => comptime allCpusFromDecls(hexagon.cpu), | ||
| 1288 | .loongarch32, .loongarch64 => comptime allCpusFromDecls(loongarch.cpu), | ||
| 1289 | .m68k => comptime allCpusFromDecls(m68k.cpu), | ||
| 1290 | .mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu), | ||
| 1291 | .msp430 => comptime allCpusFromDecls(msp430.cpu), | ||
| 1292 | .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu), | ||
| 1293 | .amdgcn => comptime allCpusFromDecls(amdgpu.cpu), | ||
| 1294 | .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu), | ||
| 1295 | .sparc, .sparc64, .sparcel => comptime allCpusFromDecls(sparc.cpu), | ||
| 1296 | .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu), | ||
| 1297 | .s390x => comptime allCpusFromDecls(s390x.cpu), | ||
| 1298 | .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu), | ||
| 1299 | .xtensa => comptime allCpusFromDecls(xtensa.cpu), | ||
| 1300 | .nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu), | ||
| 1301 | .ve => comptime allCpusFromDecls(ve.cpu), | ||
| 1302 | .wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu), | ||
| 1303 | |||
| 1304 | else => &[0]*const Model{}, | ||
| 1305 | }; | ||
| 1306 | } | ||
| 1307 | |||
| 1308 | fn allCpusFromDecls(comptime cpus: type) []const *const Cpu.Model { | ||
| 1309 | const decls = @typeInfo(cpus).Struct.decls; | ||
| 1310 | var array: [decls.len]*const Cpu.Model = undefined; | ||
| 1311 | for (decls, 0..) |decl, i| { | ||
| 1312 | array[i] = &@field(cpus, decl.name); | ||
| 1313 | } | ||
| 1314 | return &array; | ||
| 1315 | } | ||
| 1316 | }; | ||
| 1317 | |||
| 1318 | pub const Model = struct { | ||
| 1319 | name: []const u8, | ||
| 1320 | llvm_name: ?[:0]const u8, | ||
| 1321 | features: Feature.Set, | ||
| 1322 | |||
| 1323 | pub fn toCpu(model: *const Model, arch: Arch) Cpu { | ||
| 1324 | var features = model.features; | ||
| 1325 | features.populateDependencies(arch.allFeaturesList()); | ||
| 1326 | return .{ | ||
| 1327 | .arch = arch, | ||
| 1328 | .model = model, | ||
| 1329 | .features = features, | ||
| 1330 | }; | ||
| 1331 | } | ||
| 1332 | |||
| 1333 | pub fn generic(arch: Arch) *const Model { | ||
| 1334 | const S = struct { | ||
| 1335 | const generic_model = Model{ | ||
| 1336 | .name = "generic", | ||
| 1337 | .llvm_name = null, | ||
| 1338 | .features = Cpu.Feature.Set.empty, | ||
| 1339 | }; | ||
| 1340 | }; | ||
| 1341 | return switch (arch) { | ||
| 1342 | .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, | ||
| 1343 | .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, | ||
| 1344 | .avr => &avr.cpu.avr2, | ||
| 1345 | .bpfel, .bpfeb => &bpf.cpu.generic, | ||
| 1346 | .hexagon => &hexagon.cpu.generic, | ||
| 1347 | .loongarch32 => &loongarch.cpu.generic_la32, | ||
| 1348 | .loongarch64 => &loongarch.cpu.generic_la64, | ||
| 1349 | .m68k => &m68k.cpu.generic, | ||
| 1350 | .mips, .mipsel => &mips.cpu.mips32, | ||
| 1351 | .mips64, .mips64el => &mips.cpu.mips64, | ||
| 1352 | .msp430 => &msp430.cpu.generic, | ||
| 1353 | .powerpc => &powerpc.cpu.ppc, | ||
| 1354 | .powerpcle => &powerpc.cpu.ppc, | ||
| 1355 | .powerpc64 => &powerpc.cpu.ppc64, | ||
| 1356 | .powerpc64le => &powerpc.cpu.ppc64le, | ||
| 1357 | .amdgcn => &amdgpu.cpu.generic, | ||
| 1358 | .riscv32 => &riscv.cpu.generic_rv32, | ||
| 1359 | .riscv64 => &riscv.cpu.generic_rv64, | ||
| 1360 | .spirv32, .spirv64 => &spirv.cpu.generic, | ||
| 1361 | .sparc, .sparcel => &sparc.cpu.generic, | ||
| 1362 | .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline | ||
| 1363 | .s390x => &s390x.cpu.generic, | ||
| 1364 | .x86 => &x86.cpu.i386, | ||
| 1365 | .x86_64 => &x86.cpu.x86_64, | ||
| 1366 | .nvptx, .nvptx64 => &nvptx.cpu.sm_20, | ||
| 1367 | .ve => &ve.cpu.generic, | ||
| 1368 | .wasm32, .wasm64 => &wasm.cpu.generic, | ||
| 1369 | |||
| 1370 | else => &S.generic_model, | ||
| 1371 | }; | ||
| 1372 | } | ||
| 1373 | |||
| 1374 | pub fn baseline(arch: Arch) *const Model { | ||
| 1375 | return switch (arch) { | ||
| 1376 | .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline, | ||
| 1377 | .riscv32 => &riscv.cpu.baseline_rv32, | ||
| 1378 | .riscv64 => &riscv.cpu.baseline_rv64, | ||
| 1379 | .x86 => &x86.cpu.pentium4, | ||
| 1380 | .nvptx, .nvptx64 => &nvptx.cpu.sm_20, | ||
| 1381 | .sparc, .sparcel => &sparc.cpu.v8, | ||
| 1382 | |||
| 1383 | else => generic(arch), | ||
| 1384 | }; | ||
| 1385 | } | ||
| 1386 | }; | ||
| 1387 | |||
| 1388 | /// The "default" set of CPU features for cross-compiling. A conservative set | ||
| 1389 | /// of features that is expected to be supported on most available hardware. | ||
| 1390 | pub fn baseline(arch: Arch) Cpu { | ||
| 1391 | return Model.baseline(arch).toCpu(arch); | ||
| 1392 | } | ||
| 1393 | }; | ||
| 1394 | |||
| 1395 | pub fn zigTriple(self: Target, allocator: mem.Allocator) ![]u8 { | ||
| 1396 | return std.zig.CrossTarget.fromTarget(self).zigTriple(allocator); | ||
| 1397 | } | ||
| 1398 | |||
| 1399 | pub fn linuxTripleSimple(allocator: mem.Allocator, cpu_arch: Cpu.Arch, os_tag: Os.Tag, abi: Abi) ![]u8 { | ||
| 1400 | return std.fmt.allocPrint(allocator, "{s}-{s}-{s}", .{ @tagName(cpu_arch), @tagName(os_tag), @tagName(abi) }); | ||
| 1401 | } | ||
| 1402 | |||
| 1403 | pub fn linuxTriple(self: Target, allocator: mem.Allocator) ![]u8 { | ||
| 1404 | return linuxTripleSimple(allocator, self.cpu.arch, self.os.tag, self.abi); | ||
| 1405 | } | ||
| 1406 | |||
| 1407 | pub fn exeFileExtSimple(cpu_arch: Cpu.Arch, os_tag: Os.Tag) [:0]const u8 { | ||
| 1408 | return switch (os_tag) { | ||
| 1409 | .windows => ".exe", | ||
| 1410 | .uefi => ".efi", | ||
| 1411 | .plan9 => plan9Ext(cpu_arch), | ||
| 1412 | else => switch (cpu_arch) { | ||
| 1413 | .wasm32, .wasm64 => ".wasm", | ||
| 1414 | else => "", | ||
| 1415 | }, | ||
| 1416 | }; | ||
| 1417 | } | ||
| 1418 | |||
| 1419 | pub fn exeFileExt(self: Target) [:0]const u8 { | ||
| 1420 | return exeFileExtSimple(self.cpu.arch, self.os.tag); | ||
| 1421 | } | ||
| 1422 | |||
| 1423 | pub fn staticLibSuffix_os_abi(os_tag: Os.Tag, abi: Abi) [:0]const u8 { | ||
| 1424 | if (abi == .msvc) { | ||
| 1425 | return ".lib"; | ||
| 1426 | } | ||
| 1427 | switch (os_tag) { | ||
| 1428 | .windows, .uefi => return ".lib", | ||
| 1429 | else => return ".a", | ||
| 1430 | } | ||
| 1431 | } | ||
| 1432 | |||
| 1433 | pub fn staticLibSuffix(self: Target) [:0]const u8 { | ||
| 1434 | return staticLibSuffix_os_abi(self.os.tag, self.abi); | ||
| 1435 | } | ||
| 1436 | |||
| 1437 | pub fn dynamicLibSuffix(self: Target) [:0]const u8 { | ||
| 1438 | return self.os.tag.dynamicLibSuffix(); | ||
| 1439 | } | ||
| 1440 | |||
| 1441 | pub fn libPrefix_os_abi(os_tag: Os.Tag, abi: Abi) [:0]const u8 { | ||
| 1442 | if (abi == .msvc) { | ||
| 1443 | return ""; | ||
| 1444 | } | ||
| 1445 | switch (os_tag) { | ||
| 1446 | .windows, .uefi => return "", | ||
| 1447 | else => return "lib", | ||
| 1448 | } | ||
| 1449 | } | ||
| 1450 | |||
| 1451 | pub fn libPrefix(self: Target) [:0]const u8 { | ||
| 1452 | return libPrefix_os_abi(self.os.tag, self.abi); | ||
| 1453 | } | ||
| 1454 | |||
| 1455 | pub inline fn isMinGW(self: Target) bool { | ||
| 1456 | return self.os.tag == .windows and self.isGnu(); | ||
| 1457 | } | ||
| 1458 | |||
| 1459 | pub inline fn isGnu(self: Target) bool { | ||
| 1460 | return self.abi.isGnu(); | ||
| 1461 | } | ||
| 1462 | |||
| 1463 | pub inline fn isMusl(self: Target) bool { | ||
| 1464 | return self.abi.isMusl(); | ||
| 1465 | } | ||
| 1466 | |||
| 1467 | pub inline fn isAndroid(self: Target) bool { | ||
| 1468 | return self.abi == .android; | ||
| 1469 | } | ||
| 1470 | |||
| 1471 | pub inline fn isWasm(self: Target) bool { | ||
| 1472 | return self.cpu.arch.isWasm(); | ||
| 1473 | } | ||
| 1474 | |||
| 1475 | pub inline fn isDarwin(self: Target) bool { | ||
| 1476 | return self.os.tag.isDarwin(); | ||
| 1477 | } | ||
| 1478 | |||
| 1479 | pub inline fn isBSD(self: Target) bool { | ||
| 1480 | return self.os.tag.isBSD(); | ||
| 1481 | } | ||
| 1482 | |||
| 1483 | pub inline fn isBpfFreestanding(self: Target) bool { | ||
| 1484 | return self.cpu.arch.isBpf() and self.os.tag == .freestanding; | ||
| 1485 | } | ||
| 1486 | |||
| 1487 | pub inline fn isGnuLibC_os_tag_abi(os_tag: Os.Tag, abi: Abi) bool { | ||
| 1488 | return os_tag == .linux and abi.isGnu(); | ||
| 1489 | } | ||
| 1490 | |||
| 1491 | pub inline fn isGnuLibC(self: Target) bool { | ||
| 1492 | return isGnuLibC_os_tag_abi(self.os.tag, self.abi); | ||
| 1493 | } | ||
| 1494 | |||
| 1495 | pub inline fn supportsNewStackCall(self: Target) bool { | ||
| 1496 | return !self.cpu.arch.isWasm(); | ||
| 1497 | } | ||
| 1498 | |||
| 1499 | pub inline fn isSpirV(self: Target) bool { | ||
| 1500 | return self.cpu.arch.isSpirV(); | ||
| 1501 | } | ||
| 1502 | |||
| 1503 | pub const FloatAbi = enum { | ||
| 1504 | hard, | ||
| 1505 | soft, | ||
| 1506 | }; | ||
| 1507 | |||
| 1508 | pub inline fn getFloatAbi(self: Target) FloatAbi { | ||
| 1509 | return self.abi.floatAbi(); | ||
| 1510 | } | ||
| 1511 | |||
| 1512 | pub inline fn hasDynamicLinker(self: Target) bool { | ||
| 1513 | if (self.cpu.arch.isWasm()) { | ||
| 1514 | return false; | ||
| 1515 | } | ||
| 1516 | switch (self.os.tag) { | ||
| 1517 | .freestanding, | ||
| 1518 | .ios, | ||
| 1519 | .tvos, | ||
| 1520 | .watchos, | ||
| 1521 | .macos, | ||
| 1522 | .uefi, | ||
| 1523 | .windows, | ||
| 1524 | .emscripten, | ||
| 1525 | .opencl, | ||
| 1526 | .glsl450, | ||
| 1527 | .vulkan, | ||
| 1528 | .plan9, | ||
| 1529 | .other, | ||
| 1530 | => return false, | ||
| 1531 | else => return true, | ||
| 1532 | } | ||
| 1533 | } | ||
| 1534 | |||
| 1535 | pub const DynamicLinker = struct { | ||
| 1536 | /// Contains the memory used to store the dynamic linker path. This field should | ||
| 1537 | /// not be used directly. See `get` and `set`. This field exists so that this API requires no allocator. | ||
| 1538 | buffer: [255]u8 = undefined, | ||
| 1539 | |||
| 1540 | /// Used to construct the dynamic linker path. This field should not be used | ||
| 1541 | /// directly. See `get` and `set`. | ||
| 1542 | max_byte: ?u8 = null, | ||
| 1543 | |||
| 1544 | /// Asserts that the length is less than or equal to 255 bytes. | ||
| 1545 | pub fn init(dl_or_null: ?[]const u8) DynamicLinker { | ||
| 1546 | var result: DynamicLinker = undefined; | ||
| 1547 | result.set(dl_or_null); | ||
| 1548 | return result; | ||
| 1549 | } | ||
| 1550 | |||
| 1551 | /// The returned memory has the same lifetime as the `DynamicLinker`. | ||
| 1552 | pub fn get(self: *const DynamicLinker) ?[]const u8 { | ||
| 1553 | const m: usize = self.max_byte orelse return null; | ||
| 1554 | return self.buffer[0 .. m + 1]; | ||
| 1555 | } | ||
| 1556 | |||
| 1557 | /// Asserts that the length is less than or equal to 255 bytes. | ||
| 1558 | pub fn set(self: *DynamicLinker, dl_or_null: ?[]const u8) void { | ||
| 1559 | if (dl_or_null) |dl| { | ||
| 1560 | @memcpy(self.buffer[0..dl.len], dl); | ||
| 1561 | self.max_byte = @as(u8, @intCast(dl.len - 1)); | ||
| 1562 | } else { | ||
| 1563 | self.max_byte = null; | ||
| 1564 | } | ||
| 1565 | } | ||
| 1566 | }; | ||
| 1567 | |||
| 1568 | pub fn standardDynamicLinkerPath(self: Target) DynamicLinker { | ||
| 1569 | var result: DynamicLinker = .{}; | ||
| 1570 | const S = struct { | ||
| 1571 | fn print(r: *DynamicLinker, comptime fmt: []const u8, args: anytype) DynamicLinker { | ||
| 1572 | r.max_byte = @as(u8, @intCast((std.fmt.bufPrint(&r.buffer, fmt, args) catch unreachable).len - 1)); | ||
| 1573 | return r.*; | ||
| 1574 | } | ||
| 1575 | fn copy(r: *DynamicLinker, s: []const u8) DynamicLinker { | ||
| 1576 | @memcpy(r.buffer[0..s.len], s); | ||
| 1577 | r.max_byte = @as(u8, @intCast(s.len - 1)); | ||
| 1578 | return r.*; | ||
| 1579 | } | ||
| 1580 | }; | ||
| 1581 | const print = S.print; | ||
| 1582 | const copy = S.copy; | ||
| 1583 | |||
| 1584 | if (self.abi == .android) { | ||
| 1585 | const suffix = if (self.ptrBitWidth() == 64) "64" else ""; | ||
| 1586 | return print(&result, "/system/bin/linker{s}", .{suffix}); | ||
| 1587 | } | ||
| 1588 | |||
| 1589 | if (self.abi.isMusl()) { | ||
| 1590 | const is_arm = switch (self.cpu.arch) { | ||
| 1591 | .arm, .armeb, .thumb, .thumbeb => true, | ||
| 1592 | else => false, | ||
| 1593 | }; | ||
| 1594 | const arch_part = switch (self.cpu.arch) { | ||
| 1595 | .arm, .thumb => "arm", | ||
| 1596 | .armeb, .thumbeb => "armeb", | ||
| 1597 | else => |arch| @tagName(arch), | ||
| 1598 | }; | ||
| 1599 | const arch_suffix = if (is_arm and self.abi.floatAbi() == .hard) "hf" else ""; | ||
| 1600 | return print(&result, "/lib/ld-musl-{s}{s}.so.1", .{ arch_part, arch_suffix }); | ||
| 1601 | } | ||
| 1602 | |||
| 1603 | switch (self.os.tag) { | ||
| 1604 | .freebsd => return copy(&result, "/libexec/ld-elf.so.1"), | ||
| 1605 | .netbsd => return copy(&result, "/libexec/ld.elf_so"), | ||
| 1606 | .openbsd => return copy(&result, "/usr/libexec/ld.so"), | ||
| 1607 | .dragonfly => return copy(&result, "/libexec/ld-elf.so.2"), | ||
| 1608 | .solaris, .illumos => return copy(&result, "/lib/64/ld.so.1"), | ||
| 1609 | .linux => switch (self.cpu.arch) { | ||
| 1610 | .x86, | ||
| 1611 | .sparc, | ||
| 1612 | .sparcel, | ||
| 1613 | => return copy(&result, "/lib/ld-linux.so.2"), | ||
| 1614 | |||
| 1615 | .aarch64 => return copy(&result, "/lib/ld-linux-aarch64.so.1"), | ||
| 1616 | .aarch64_be => return copy(&result, "/lib/ld-linux-aarch64_be.so.1"), | ||
| 1617 | .aarch64_32 => return copy(&result, "/lib/ld-linux-aarch64_32.so.1"), | ||
| 1618 | |||
| 1619 | .arm, | ||
| 1620 | .armeb, | ||
| 1621 | .thumb, | ||
| 1622 | .thumbeb, | ||
| 1623 | => return copy(&result, switch (self.abi.floatAbi()) { | ||
| 1624 | .hard => "/lib/ld-linux-armhf.so.3", | ||
| 1625 | else => "/lib/ld-linux.so.3", | ||
| 1626 | }), | ||
| 1627 | |||
| 1628 | .mips, | ||
| 1629 | .mipsel, | ||
| 1630 | .mips64, | ||
| 1631 | .mips64el, | ||
| 1632 | => { | ||
| 1633 | const lib_suffix = switch (self.abi) { | ||
| 1634 | .gnuabin32, .gnux32 => "32", | ||
| 1635 | .gnuabi64 => "64", | ||
| 1636 | else => "", | ||
| 1637 | }; | ||
| 1638 | const is_nan_2008 = mips.featureSetHas(self.cpu.features, .nan2008); | ||
| 1639 | const loader = if (is_nan_2008) "ld-linux-mipsn8.so.1" else "ld.so.1"; | ||
| 1640 | return print(&result, "/lib{s}/{s}", .{ lib_suffix, loader }); | ||
| 1641 | }, | ||
| 1642 | |||
| 1643 | .powerpc, .powerpcle => return copy(&result, "/lib/ld.so.1"), | ||
| 1644 | .powerpc64, .powerpc64le => return copy(&result, "/lib64/ld64.so.2"), | ||
| 1645 | .s390x => return copy(&result, "/lib64/ld64.so.1"), | ||
| 1646 | .sparc64 => return copy(&result, "/lib64/ld-linux.so.2"), | ||
| 1647 | .x86_64 => return copy(&result, switch (self.abi) { | ||
| 1648 | .gnux32 => "/libx32/ld-linux-x32.so.2", | ||
| 1649 | else => "/lib64/ld-linux-x86-64.so.2", | ||
| 1650 | }), | ||
| 1651 | |||
| 1652 | .riscv32 => return copy(&result, "/lib/ld-linux-riscv32-ilp32.so.1"), | ||
| 1653 | .riscv64 => return copy(&result, "/lib/ld-linux-riscv64-lp64.so.1"), | ||
| 1654 | |||
| 1655 | // Architectures in this list have been verified as not having a standard | ||
| 1656 | // dynamic linker path. | ||
| 1657 | .wasm32, | ||
| 1658 | .wasm64, | ||
| 1659 | .bpfel, | ||
| 1660 | .bpfeb, | ||
| 1661 | .nvptx, | ||
| 1662 | .nvptx64, | ||
| 1663 | .spu_2, | ||
| 1664 | .avr, | ||
| 1665 | .spirv32, | ||
| 1666 | .spirv64, | ||
| 1667 | => return result, | ||
| 1668 | |||
| 1669 | // TODO go over each item in this list and either move it to the above list, or | ||
| 1670 | // implement the standard dynamic linker path code for it. | ||
| 1671 | .arc, | ||
| 1672 | .csky, | ||
| 1673 | .hexagon, | ||
| 1674 | .m68k, | ||
| 1675 | .msp430, | ||
| 1676 | .r600, | ||
| 1677 | .amdgcn, | ||
| 1678 | .tce, | ||
| 1679 | .tcele, | ||
| 1680 | .xcore, | ||
| 1681 | .le32, | ||
| 1682 | .le64, | ||
| 1683 | .amdil, | ||
| 1684 | .amdil64, | ||
| 1685 | .hsail, | ||
| 1686 | .hsail64, | ||
| 1687 | .spir, | ||
| 1688 | .spir64, | ||
| 1689 | .kalimba, | ||
| 1690 | .shave, | ||
| 1691 | .lanai, | ||
| 1692 | .renderscript32, | ||
| 1693 | .renderscript64, | ||
| 1694 | .ve, | ||
| 1695 | .dxil, | ||
| 1696 | .loongarch32, | ||
| 1697 | .loongarch64, | ||
| 1698 | .xtensa, | ||
| 1699 | => return result, | ||
| 1700 | }, | ||
| 1701 | |||
| 1702 | .ios, | ||
| 1703 | .tvos, | ||
| 1704 | .watchos, | ||
| 1705 | .macos, | ||
| 1706 | => return copy(&result, "/usr/lib/dyld"), | ||
| 1707 | |||
| 1708 | // Operating systems in this list have been verified as not having a standard | ||
| 1709 | // dynamic linker path. | ||
| 1710 | .freestanding, | ||
| 1711 | .uefi, | ||
| 1712 | .windows, | ||
| 1713 | .emscripten, | ||
| 1714 | .wasi, | ||
| 1715 | .opencl, | ||
| 1716 | .glsl450, | ||
| 1717 | .vulkan, | ||
| 1718 | .other, | ||
| 1719 | .plan9, | ||
| 1720 | => return result, | ||
| 1721 | |||
| 1722 | // TODO revisit when multi-arch for Haiku is available | ||
| 1723 | .haiku => return copy(&result, "/system/runtime_loader"), | ||
| 1724 | |||
| 1725 | // TODO go over each item in this list and either move it to the above list, or | ||
| 1726 | // implement the standard dynamic linker path code for it. | ||
| 1727 | .ananas, | ||
| 1728 | .cloudabi, | ||
| 1729 | .fuchsia, | ||
| 1730 | .kfreebsd, | ||
| 1731 | .lv2, | ||
| 1732 | .zos, | ||
| 1733 | .minix, | ||
| 1734 | .rtems, | ||
| 1735 | .nacl, | ||
| 1736 | .aix, | ||
| 1737 | .cuda, | ||
| 1738 | .nvcl, | ||
| 1739 | .amdhsa, | ||
| 1740 | .ps4, | ||
| 1741 | .ps5, | ||
| 1742 | .elfiamcu, | ||
| 1743 | .mesa3d, | ||
| 1744 | .contiki, | ||
| 1745 | .amdpal, | ||
| 1746 | .hermit, | ||
| 1747 | .hurd, | ||
| 1748 | .driverkit, | ||
| 1749 | .shadermodel, | ||
| 1750 | .liteos, | ||
| 1751 | => return result, | ||
| 1752 | } | ||
| 1753 | } | ||
| 1754 | |||
| 1755 | /// 0c spim little-endian MIPS 3000 family | ||
| 1756 | /// 1c 68000 Motorola MC68000 | ||
| 1757 | /// 2c 68020 Motorola MC68020 | ||
| 1758 | /// 5c arm little-endian ARM | ||
| 1759 | /// 6c amd64 AMD64 and compatibles (e.g., Intel EM64T) | ||
| 1760 | /// 7c arm64 ARM64 (ARMv8) | ||
| 1761 | /// 8c 386 Intel x86, i486, Pentium, etc. | ||
| 1762 | /// kc sparc Sun SPARC | ||
| 1763 | /// qc power Power PC | ||
| 1764 | /// vc mips big-endian MIPS 3000 family | ||
| 1765 | pub fn plan9Ext(cpu_arch: Cpu.Arch) [:0]const u8 { | ||
| 1766 | return switch (cpu_arch) { | ||
| 1767 | .arm => ".5", | ||
| 1768 | .x86_64 => ".6", | ||
| 1769 | .aarch64 => ".7", | ||
| 1770 | .x86 => ".8", | ||
| 1771 | .sparc => ".k", | ||
| 1772 | .powerpc, .powerpcle => ".q", | ||
| 1773 | .mips, .mipsel => ".v", | ||
| 1774 | // ISAs without designated characters get 'X' for lack of a better option. | ||
| 1775 | else => ".X", | ||
| 1776 | }; | ||
| 1777 | } | ||
| 1778 | |||
| 1779 | pub fn maxIntAlignment(target: Target) u16 { | ||
| 1780 | return switch (target.cpu.arch) { | ||
| 1781 | .avr => 1, | ||
| 1782 | .msp430 => 2, | ||
| 1783 | .xcore => 4, | ||
| 1784 | |||
| 1785 | .arm, | ||
| 1786 | .armeb, | ||
| 1787 | .thumb, | ||
| 1788 | .thumbeb, | ||
| 1789 | .hexagon, | ||
| 1790 | .mips, | ||
| 1791 | .mipsel, | ||
| 1792 | .powerpc, | ||
| 1793 | .powerpcle, | ||
| 1794 | .r600, | ||
| 1795 | .amdgcn, | ||
| 1796 | .riscv32, | ||
| 1797 | .sparc, | ||
| 1798 | .sparcel, | ||
| 1799 | .s390x, | ||
| 1800 | .lanai, | ||
| 1801 | .wasm32, | ||
| 1802 | .wasm64, | ||
| 1803 | => 8, | ||
| 1804 | |||
| 1805 | .x86 => if (target.ofmt == .c) 16 else return switch (target.os.tag) { | ||
| 1806 | .windows, .uefi => 8, | ||
| 1807 | else => 4, | ||
| 1808 | }, | ||
| 1809 | |||
| 1810 | // For these, LLVMABIAlignmentOfType(i128) reports 8. Note that 16 | ||
| 1811 | // is a relevant number in three cases: | ||
| 1812 | // 1. Different machine code instruction when loading into SIMD register. | ||
| 1813 | // 2. The C ABI wants 16 for extern structs. | ||
| 1814 | // 3. 16-byte cmpxchg needs 16-byte alignment. | ||
| 1815 | // Same logic for powerpc64, mips64, sparc64. | ||
| 1816 | .x86_64, | ||
| 1817 | .powerpc64, | ||
| 1818 | .powerpc64le, | ||
| 1819 | .mips64, | ||
| 1820 | .mips64el, | ||
| 1821 | .sparc64, | ||
| 1822 | => return switch (target.ofmt) { | ||
| 1823 | .c => 16, | ||
| 1824 | else => 8, | ||
| 1825 | }, | ||
| 1826 | |||
| 1827 | // Even LLVMABIAlignmentOfType(i128) agrees on these targets. | ||
| 1828 | .aarch64, | ||
| 1829 | .aarch64_be, | ||
| 1830 | .aarch64_32, | ||
| 1831 | .riscv64, | ||
| 1832 | .bpfel, | ||
| 1833 | .bpfeb, | ||
| 1834 | .nvptx, | ||
| 1835 | .nvptx64, | ||
| 1836 | => 16, | ||
| 1837 | |||
| 1838 | // Below this comment are unverified but based on the fact that C requires | ||
| 1839 | // int128_t to be 16 bytes aligned, it's a safe default. | ||
| 1840 | .spu_2, | ||
| 1841 | .csky, | ||
| 1842 | .arc, | ||
| 1843 | .m68k, | ||
| 1844 | .tce, | ||
| 1845 | .tcele, | ||
| 1846 | .le32, | ||
| 1847 | .amdil, | ||
| 1848 | .hsail, | ||
| 1849 | .spir, | ||
| 1850 | .kalimba, | ||
| 1851 | .renderscript32, | ||
| 1852 | .spirv32, | ||
| 1853 | .shave, | ||
| 1854 | .le64, | ||
| 1855 | .amdil64, | ||
| 1856 | .hsail64, | ||
| 1857 | .spir64, | ||
| 1858 | .renderscript64, | ||
| 1859 | .ve, | ||
| 1860 | .spirv64, | ||
| 1861 | .dxil, | ||
| 1862 | .loongarch32, | ||
| 1863 | .loongarch64, | ||
| 1864 | .xtensa, | ||
| 1865 | => 16, | ||
| 1866 | }; | ||
| 1867 | } | ||
| 1868 | |||
| 1869 | pub fn ptrBitWidth(target: Target) u16 { | ||
| 1870 | switch (target.abi) { | ||
| 1871 | .gnux32, .muslx32, .gnuabin32, .gnuilp32 => return 32, | ||
| 1872 | .gnuabi64 => return 64, | ||
| 1873 | else => {}, | ||
| 1874 | } | ||
| 1875 | switch (target.cpu.arch) { | ||
| 1876 | .avr, | ||
| 1877 | .msp430, | ||
| 1878 | .spu_2, | ||
| 1879 | => return 16, | ||
| 1880 | |||
| 1881 | .arc, | ||
| 1882 | .arm, | ||
| 1883 | .armeb, | ||
| 1884 | .csky, | ||
| 1885 | .hexagon, | ||
| 1886 | .m68k, | ||
| 1887 | .le32, | ||
| 1888 | .mips, | ||
| 1889 | .mipsel, | ||
| 1890 | .powerpc, | ||
| 1891 | .powerpcle, | ||
| 1892 | .r600, | ||
| 1893 | .riscv32, | ||
| 1894 | .sparcel, | ||
| 1895 | .tce, | ||
| 1896 | .tcele, | ||
| 1897 | .thumb, | ||
| 1898 | .thumbeb, | ||
| 1899 | .x86, | ||
| 1900 | .xcore, | ||
| 1901 | .nvptx, | ||
| 1902 | .amdil, | ||
| 1903 | .hsail, | ||
| 1904 | .spir, | ||
| 1905 | .kalimba, | ||
| 1906 | .shave, | ||
| 1907 | .lanai, | ||
| 1908 | .wasm32, | ||
| 1909 | .renderscript32, | ||
| 1910 | .aarch64_32, | ||
| 1911 | .spirv32, | ||
| 1912 | .loongarch32, | ||
| 1913 | .dxil, | ||
| 1914 | .xtensa, | ||
| 1915 | => return 32, | ||
| 1916 | |||
| 1917 | .aarch64, | ||
| 1918 | .aarch64_be, | ||
| 1919 | .mips64, | ||
| 1920 | .mips64el, | ||
| 1921 | .powerpc64, | ||
| 1922 | .powerpc64le, | ||
| 1923 | .riscv64, | ||
| 1924 | .x86_64, | ||
| 1925 | .nvptx64, | ||
| 1926 | .le64, | ||
| 1927 | .amdil64, | ||
| 1928 | .hsail64, | ||
| 1929 | .spir64, | ||
| 1930 | .wasm64, | ||
| 1931 | .renderscript64, | ||
| 1932 | .amdgcn, | ||
| 1933 | .bpfel, | ||
| 1934 | .bpfeb, | ||
| 1935 | .sparc64, | ||
| 1936 | .s390x, | ||
| 1937 | .ve, | ||
| 1938 | .spirv64, | ||
| 1939 | .loongarch64, | ||
| 1940 | => return 64, | ||
| 1941 | |||
| 1942 | .sparc => return if (std.Target.sparc.featureSetHas(target.cpu.features, .v9)) 64 else 32, | ||
| 1943 | } | ||
| 1944 | } | ||
| 1945 | |||
| 1946 | pub fn stackAlignment(target: Target) u16 { | ||
| 1947 | return switch (target.cpu.arch) { | ||
| 1948 | .m68k => 2, | ||
| 1949 | .amdgcn => 4, | ||
| 1950 | .x86 => switch (target.os.tag) { | ||
| 1951 | .windows, .uefi => 4, | ||
| 1952 | else => 16, | ||
| 1953 | }, | ||
| 1954 | .arm, | ||
| 1955 | .armeb, | ||
| 1956 | .thumb, | ||
| 1957 | .thumbeb, | ||
| 1958 | .mips, | ||
| 1959 | .mipsel, | ||
| 1960 | .sparc, | ||
| 1961 | .sparcel, | ||
| 1962 | => 8, | ||
| 1963 | .aarch64, | ||
| 1964 | .aarch64_be, | ||
| 1965 | .aarch64_32, | ||
| 1966 | .bpfeb, | ||
| 1967 | .bpfel, | ||
| 1968 | .mips64, | ||
| 1969 | .mips64el, | ||
| 1970 | .riscv32, | ||
| 1971 | .riscv64, | ||
| 1972 | .sparc64, | ||
| 1973 | .x86_64, | ||
| 1974 | .ve, | ||
| 1975 | .wasm32, | ||
| 1976 | .wasm64, | ||
| 1977 | => 16, | ||
| 1978 | .powerpc64, | ||
| 1979 | .powerpc64le, | ||
| 1980 | => switch (target.os.tag) { | ||
| 1981 | else => 8, | ||
| 1982 | .linux => 16, | ||
| 1983 | }, | ||
| 1984 | else => @divExact(target.ptrBitWidth(), 8), | ||
| 1985 | }; | ||
| 1986 | } | ||
| 1987 | |||
| 1988 | /// Default signedness of `char` for the native C compiler for this target | ||
| 1989 | /// Note that char signedness is implementation-defined and many compilers provide | ||
| 1990 | /// an option to override the default signedness e.g. GCC's -funsigned-char / -fsigned-char | ||
| 1991 | pub fn charSignedness(target: Target) std.builtin.Signedness { | ||
| 1992 | switch (target.cpu.arch) { | ||
| 1993 | .aarch64, | ||
| 1994 | .aarch64_32, | ||
| 1995 | .aarch64_be, | ||
| 1996 | .arm, | ||
| 1997 | .armeb, | ||
| 1998 | .thumb, | ||
| 1999 | .thumbeb, | ||
| 2000 | => return if (target.os.tag.isDarwin() or target.os.tag == .windows) .signed else .unsigned, | ||
| 2001 | .powerpc, .powerpc64 => return if (target.os.tag.isDarwin()) .signed else .unsigned, | ||
| 2002 | .powerpcle, | ||
| 2003 | .powerpc64le, | ||
| 2004 | .s390x, | ||
| 2005 | .xcore, | ||
| 2006 | .arc, | ||
| 2007 | .msp430, | ||
| 2008 | .riscv32, | ||
| 2009 | .riscv64, | ||
| 2010 | => return .unsigned, | ||
| 2011 | else => return .signed, | ||
| 2012 | } | ||
| 2013 | } | ||
| 2014 | |||
| 2015 | pub const CType = enum { | ||
| 2016 | char, | ||
| 2017 | short, | ||
| 2018 | ushort, | ||
| 2019 | int, | ||
| 2020 | uint, | ||
| 2021 | long, | ||
| 2022 | ulong, | ||
| 2023 | longlong, | ||
| 2024 | ulonglong, | ||
| 2025 | float, | ||
| 2026 | double, | ||
| 2027 | longdouble, | ||
| 2028 | }; | ||
| 2029 | |||
| 2030 | pub fn c_type_byte_size(t: Target, c_type: CType) u16 { | ||
| 2031 | return switch (c_type) { | ||
| 2032 | .char, | ||
| 2033 | .short, | ||
| 2034 | .ushort, | ||
| 2035 | .int, | ||
| 2036 | .uint, | ||
| 2037 | .long, | ||
| 2038 | .ulong, | ||
| 2039 | .longlong, | ||
| 2040 | .ulonglong, | ||
| 2041 | .float, | ||
| 2042 | .double, | ||
| 2043 | => @divExact(c_type_bit_size(t, c_type), 8), | ||
| 2044 | |||
| 2045 | .longdouble => switch (c_type_bit_size(t, c_type)) { | ||
| 2046 | 16 => 2, | ||
| 2047 | 32 => 4, | ||
| 2048 | 64 => 8, | ||
| 2049 | 80 => @as(u16, @intCast(mem.alignForward(usize, 10, c_type_alignment(t, .longdouble)))), | ||
| 2050 | 128 => 16, | ||
| 2051 | else => unreachable, | ||
| 2052 | }, | ||
| 2053 | }; | ||
| 2054 | } | ||
| 2055 | |||
| 2056 | pub fn c_type_bit_size(target: Target, c_type: CType) u16 { | ||
| 2057 | switch (target.os.tag) { | ||
| 2058 | .freestanding, .other => switch (target.cpu.arch) { | ||
| 2059 | .msp430 => switch (c_type) { | ||
| 2060 | .char => return 8, | ||
| 2061 | .short, .ushort, .int, .uint => return 16, | ||
| 2062 | .float, .long, .ulong => return 32, | ||
| 2063 | .longlong, .ulonglong, .double, .longdouble => return 64, | ||
| 2064 | }, | ||
| 2065 | .avr => switch (c_type) { | ||
| 2066 | .char => return 8, | ||
| 2067 | .short, .ushort, .int, .uint => return 16, | ||
| 2068 | .long, .ulong, .float, .double, .longdouble => return 32, | ||
| 2069 | .longlong, .ulonglong => return 64, | ||
| 2070 | }, | ||
| 2071 | .tce, .tcele => switch (c_type) { | ||
| 2072 | .char => return 8, | ||
| 2073 | .short, .ushort => return 16, | ||
| 2074 | .int, .uint, .long, .ulong, .longlong, .ulonglong => return 32, | ||
| 2075 | .float, .double, .longdouble => return 32, | ||
| 2076 | }, | ||
| 2077 | .mips64, .mips64el => switch (c_type) { | ||
| 2078 | .char => return 8, | ||
| 2079 | .short, .ushort => return 16, | ||
| 2080 | .int, .uint, .float => return 32, | ||
| 2081 | .long, .ulong => return if (target.abi != .gnuabin32) 64 else 32, | ||
| 2082 | .longlong, .ulonglong, .double => return 64, | ||
| 2083 | .longdouble => return 128, | ||
| 2084 | }, | ||
| 2085 | .x86_64 => switch (c_type) { | ||
| 2086 | .char => return 8, | ||
| 2087 | .short, .ushort => return 16, | ||
| 2088 | .int, .uint, .float => return 32, | ||
| 2089 | .long, .ulong => switch (target.abi) { | ||
| 2090 | .gnux32, .muslx32 => return 32, | ||
| 2091 | else => return 64, | ||
| 2092 | }, | ||
| 2093 | .longlong, .ulonglong, .double => return 64, | ||
| 2094 | .longdouble => return 80, | ||
| 2095 | }, | ||
| 2096 | else => switch (c_type) { | ||
| 2097 | .char => return 8, | ||
| 2098 | .short, .ushort => return 16, | ||
| 2099 | .int, .uint, .float => return 32, | ||
| 2100 | .long, .ulong => return target.ptrBitWidth(), | ||
| 2101 | .longlong, .ulonglong, .double => return 64, | ||
| 2102 | .longdouble => switch (target.cpu.arch) { | ||
| 2103 | .x86 => switch (target.abi) { | ||
| 2104 | .android => return 64, | ||
| 2105 | else => return 80, | ||
| 2106 | }, | ||
| 2107 | |||
| 2108 | .powerpc, | ||
| 2109 | .powerpcle, | ||
| 2110 | .powerpc64, | ||
| 2111 | .powerpc64le, | ||
| 2112 | => switch (target.abi) { | ||
| 2113 | .musl, | ||
| 2114 | .musleabi, | ||
| 2115 | .musleabihf, | ||
| 2116 | .muslx32, | ||
| 2117 | => return 64, | ||
| 2118 | else => return 128, | ||
| 2119 | }, | ||
| 2120 | |||
| 2121 | .riscv32, | ||
| 2122 | .riscv64, | ||
| 2123 | .aarch64, | ||
| 2124 | .aarch64_be, | ||
| 2125 | .aarch64_32, | ||
| 2126 | .s390x, | ||
| 2127 | .sparc, | ||
| 2128 | .sparc64, | ||
| 2129 | .sparcel, | ||
| 2130 | .wasm32, | ||
| 2131 | .wasm64, | ||
| 2132 | => return 128, | ||
| 2133 | |||
| 2134 | else => return 64, | ||
| 2135 | }, | ||
| 2136 | }, | ||
| 2137 | }, | ||
| 2138 | |||
| 2139 | .linux, | ||
| 2140 | .freebsd, | ||
| 2141 | .netbsd, | ||
| 2142 | .dragonfly, | ||
| 2143 | .openbsd, | ||
| 2144 | .wasi, | ||
| 2145 | .emscripten, | ||
| 2146 | .plan9, | ||
| 2147 | .solaris, | ||
| 2148 | .illumos, | ||
| 2149 | .haiku, | ||
| 2150 | .ananas, | ||
| 2151 | .fuchsia, | ||
| 2152 | .minix, | ||
| 2153 | => switch (target.cpu.arch) { | ||
| 2154 | .msp430 => switch (c_type) { | ||
| 2155 | .char => return 8, | ||
| 2156 | .short, .ushort, .int, .uint => return 16, | ||
| 2157 | .long, .ulong, .float => return 32, | ||
| 2158 | .longlong, .ulonglong, .double, .longdouble => return 64, | ||
| 2159 | }, | ||
| 2160 | .avr => switch (c_type) { | ||
| 2161 | .char => return 8, | ||
| 2162 | .short, .ushort, .int, .uint => return 16, | ||
| 2163 | .long, .ulong, .float, .double, .longdouble => return 32, | ||
| 2164 | .longlong, .ulonglong => return 64, | ||
| 2165 | }, | ||
| 2166 | .tce, .tcele => switch (c_type) { | ||
| 2167 | .char => return 8, | ||
| 2168 | .short, .ushort => return 16, | ||
| 2169 | .int, .uint, .long, .ulong, .longlong, .ulonglong => return 32, | ||
| 2170 | .float, .double, .longdouble => return 32, | ||
| 2171 | }, | ||
| 2172 | .mips64, .mips64el => switch (c_type) { | ||
| 2173 | .char => return 8, | ||
| 2174 | .short, .ushort => return 16, | ||
| 2175 | .int, .uint, .float => return 32, | ||
| 2176 | .long, .ulong => return if (target.abi != .gnuabin32) 64 else 32, | ||
| 2177 | .longlong, .ulonglong, .double => return 64, | ||
| 2178 | .longdouble => if (target.os.tag == .freebsd) return 64 else return 128, | ||
| 2179 | }, | ||
| 2180 | .x86_64 => switch (c_type) { | ||
| 2181 | .char => return 8, | ||
| 2182 | .short, .ushort => return 16, | ||
| 2183 | .int, .uint, .float => return 32, | ||
| 2184 | .long, .ulong => switch (target.abi) { | ||
| 2185 | .gnux32, .muslx32 => return 32, | ||
| 2186 | else => return 64, | ||
| 2187 | }, | ||
| 2188 | .longlong, .ulonglong, .double => return 64, | ||
| 2189 | .longdouble => return 80, | ||
| 2190 | }, | ||
| 2191 | else => switch (c_type) { | ||
| 2192 | .char => return 8, | ||
| 2193 | .short, .ushort => return 16, | ||
| 2194 | .int, .uint, .float => return 32, | ||
| 2195 | .long, .ulong => return target.ptrBitWidth(), | ||
| 2196 | .longlong, .ulonglong, .double => return 64, | ||
| 2197 | .longdouble => switch (target.cpu.arch) { | ||
| 2198 | .x86 => switch (target.abi) { | ||
| 2199 | .android => return 64, | ||
| 2200 | else => return 80, | ||
| 2201 | }, | ||
| 2202 | |||
| 2203 | .powerpc, | ||
| 2204 | .powerpcle, | ||
| 2205 | => switch (target.abi) { | ||
| 2206 | .musl, | ||
| 2207 | .musleabi, | ||
| 2208 | .musleabihf, | ||
| 2209 | .muslx32, | ||
| 2210 | => return 64, | ||
| 2211 | else => switch (target.os.tag) { | ||
| 2212 | .freebsd, .netbsd, .openbsd => return 64, | ||
| 2213 | else => return 128, | ||
| 2214 | }, | ||
| 2215 | }, | ||
| 2216 | |||
| 2217 | .powerpc64, | ||
| 2218 | .powerpc64le, | ||
| 2219 | => switch (target.abi) { | ||
| 2220 | .musl, | ||
| 2221 | .musleabi, | ||
| 2222 | .musleabihf, | ||
| 2223 | .muslx32, | ||
| 2224 | => return 64, | ||
| 2225 | else => switch (target.os.tag) { | ||
| 2226 | .freebsd, .openbsd => return 64, | ||
| 2227 | else => return 128, | ||
| 2228 | }, | ||
| 2229 | }, | ||
| 2230 | |||
| 2231 | .riscv32, | ||
| 2232 | .riscv64, | ||
| 2233 | .aarch64, | ||
| 2234 | .aarch64_be, | ||
| 2235 | .aarch64_32, | ||
| 2236 | .s390x, | ||
| 2237 | .mips64, | ||
| 2238 | .mips64el, | ||
| 2239 | .sparc, | ||
| 2240 | .sparc64, | ||
| 2241 | .sparcel, | ||
| 2242 | .wasm32, | ||
| 2243 | .wasm64, | ||
| 2244 | => return 128, | ||
| 2245 | |||
| 2246 | else => return 64, | ||
| 2247 | }, | ||
| 2248 | }, | ||
| 2249 | }, | ||
| 2250 | |||
| 2251 | .windows, .uefi => switch (target.cpu.arch) { | ||
| 2252 | .x86 => switch (c_type) { | ||
| 2253 | .char => return 8, | ||
| 2254 | .short, .ushort => return 16, | ||
| 2255 | .int, .uint, .float => return 32, | ||
| 2256 | .long, .ulong => return 32, | ||
| 2257 | .longlong, .ulonglong, .double => return 64, | ||
| 2258 | .longdouble => switch (target.abi) { | ||
| 2259 | .gnu, .gnuilp32, .cygnus => return 80, | ||
| 2260 | else => return 64, | ||
| 2261 | }, | ||
| 2262 | }, | ||
| 2263 | .x86_64 => switch (c_type) { | ||
| 2264 | .char => return 8, | ||
| 2265 | .short, .ushort => return 16, | ||
| 2266 | .int, .uint, .float => return 32, | ||
| 2267 | .long, .ulong => switch (target.abi) { | ||
| 2268 | .cygnus => return 64, | ||
| 2269 | else => return 32, | ||
| 2270 | }, | ||
| 2271 | .longlong, .ulonglong, .double => return 64, | ||
| 2272 | .longdouble => switch (target.abi) { | ||
| 2273 | .gnu, .gnuilp32, .cygnus => return 80, | ||
| 2274 | else => return 64, | ||
| 2275 | }, | ||
| 2276 | }, | ||
| 2277 | else => switch (c_type) { | ||
| 2278 | .char => return 8, | ||
| 2279 | .short, .ushort => return 16, | ||
| 2280 | .int, .uint, .float => return 32, | ||
| 2281 | .long, .ulong => return 32, | ||
| 2282 | .longlong, .ulonglong, .double => return 64, | ||
| 2283 | .longdouble => return 64, | ||
| 2284 | }, | ||
| 2285 | }, | ||
| 2286 | |||
| 2287 | .macos, .ios, .tvos, .watchos => switch (c_type) { | ||
| 2288 | .char => return 8, | ||
| 2289 | .short, .ushort => return 16, | ||
| 2290 | .int, .uint, .float => return 32, | ||
| 2291 | .long, .ulong => switch (target.cpu.arch) { | ||
| 2292 | .x86, .arm, .aarch64_32 => return 32, | ||
| 2293 | .x86_64 => switch (target.abi) { | ||
| 2294 | .gnux32, .muslx32 => return 32, | ||
| 2295 | else => return 64, | ||
| 2296 | }, | ||
| 2297 | else => return 64, | ||
| 2298 | }, | ||
| 2299 | .longlong, .ulonglong, .double => return 64, | ||
| 2300 | .longdouble => switch (target.cpu.arch) { | ||
| 2301 | .x86 => switch (target.abi) { | ||
| 2302 | .android => return 64, | ||
| 2303 | else => return 80, | ||
| 2304 | }, | ||
| 2305 | .x86_64 => return 80, | ||
| 2306 | else => return 64, | ||
| 2307 | }, | ||
| 2308 | }, | ||
| 2309 | |||
| 2310 | .nvcl, .cuda => switch (c_type) { | ||
| 2311 | .char => return 8, | ||
| 2312 | .short, .ushort => return 16, | ||
| 2313 | .int, .uint, .float => return 32, | ||
| 2314 | .long, .ulong => switch (target.cpu.arch) { | ||
| 2315 | .nvptx => return 32, | ||
| 2316 | .nvptx64 => return 64, | ||
| 2317 | else => return 64, | ||
| 2318 | }, | ||
| 2319 | .longlong, .ulonglong, .double => return 64, | ||
| 2320 | .longdouble => return 64, | ||
| 2321 | }, | ||
| 2322 | |||
| 2323 | .amdhsa, .amdpal => switch (c_type) { | ||
| 2324 | .char => return 8, | ||
| 2325 | .short, .ushort => return 16, | ||
| 2326 | .int, .uint, .float => return 32, | ||
| 2327 | .long, .ulong, .longlong, .ulonglong, .double => return 64, | ||
| 2328 | .longdouble => return 128, | ||
| 2329 | }, | ||
| 2330 | |||
| 2331 | .opencl => switch (c_type) { | ||
| 2332 | .char => return 8, | ||
| 2333 | .short, .ushort => return 16, | ||
| 2334 | .int, .uint, .float => return 32, | ||
| 2335 | .long, .ulong, .double => return 64, | ||
| 2336 | .longlong, .ulonglong => return 128, | ||
| 2337 | // Note: The OpenCL specification does not guarantee a particular size for long double, | ||
| 2338 | // but clang uses 128 bits. | ||
| 2339 | .longdouble => return 128, | ||
| 2340 | }, | ||
| 2341 | |||
| 2342 | .ps4, .ps5 => switch (c_type) { | ||
| 2343 | .char => return 8, | ||
| 2344 | .short, .ushort => return 16, | ||
| 2345 | .int, .uint, .float => return 32, | ||
| 2346 | .long, .ulong => return 64, | ||
| 2347 | .longlong, .ulonglong, .double => return 64, | ||
| 2348 | .longdouble => return 80, | ||
| 2349 | }, | ||
| 2350 | |||
| 2351 | .cloudabi, | ||
| 2352 | .kfreebsd, | ||
| 2353 | .lv2, | ||
| 2354 | .zos, | ||
| 2355 | .rtems, | ||
| 2356 | .nacl, | ||
| 2357 | .aix, | ||
| 2358 | .elfiamcu, | ||
| 2359 | .mesa3d, | ||
| 2360 | .contiki, | ||
| 2361 | .hermit, | ||
| 2362 | .hurd, | ||
| 2363 | .glsl450, | ||
| 2364 | .vulkan, | ||
| 2365 | .driverkit, | ||
| 2366 | .shadermodel, | ||
| 2367 | .liteos, | ||
| 2368 | => @panic("TODO specify the C integer and float type sizes for this OS"), | ||
| 2369 | } | ||
| 2370 | } | ||
| 2371 | |||
| 2372 | pub fn c_type_alignment(target: Target, c_type: CType) u16 { | ||
| 2373 | // Overrides for unusual alignments | ||
| 2374 | switch (target.cpu.arch) { | ||
| 2375 | .avr => return 1, | ||
| 2376 | .x86 => switch (target.os.tag) { | ||
| 2377 | .windows, .uefi => switch (c_type) { | ||
| 2378 | .longlong, .ulonglong, .double => return 8, | ||
| 2379 | .longdouble => switch (target.abi) { | ||
| 2380 | .gnu, .gnuilp32, .cygnus => return 4, | ||
| 2381 | else => return 8, | ||
| 2382 | }, | ||
| 2383 | else => {}, | ||
| 2384 | }, | ||
| 2385 | else => {}, | ||
| 2386 | }, | ||
| 2387 | else => {}, | ||
| 2388 | } | ||
| 2389 | |||
| 2390 | // Next-power-of-two-aligned, up to a maximum. | ||
| 2391 | return @min( | ||
| 2392 | std.math.ceilPowerOfTwoAssert(u16, (c_type_bit_size(target, c_type) + 7) / 8), | ||
| 2393 | switch (target.cpu.arch) { | ||
| 2394 | .arm, .armeb, .thumb, .thumbeb => switch (target.os.tag) { | ||
| 2395 | .netbsd => switch (target.abi) { | ||
| 2396 | .gnueabi, | ||
| 2397 | .gnueabihf, | ||
| 2398 | .eabi, | ||
| 2399 | .eabihf, | ||
| 2400 | .android, | ||
| 2401 | .musleabi, | ||
| 2402 | .musleabihf, | ||
| 2403 | => 8, | ||
| 2404 | |||
| 2405 | else => @as(u16, 4), | ||
| 2406 | }, | ||
| 2407 | .ios, .tvos, .watchos => 4, | ||
| 2408 | else => 8, | ||
| 2409 | }, | ||
| 2410 | |||
| 2411 | .msp430, | ||
| 2412 | .avr, | ||
| 2413 | => 2, | ||
| 2414 | |||
| 2415 | .arc, | ||
| 2416 | .csky, | ||
| 2417 | .x86, | ||
| 2418 | .xcore, | ||
| 2419 | .dxil, | ||
| 2420 | .loongarch32, | ||
| 2421 | .tce, | ||
| 2422 | .tcele, | ||
| 2423 | .le32, | ||
| 2424 | .amdil, | ||
| 2425 | .hsail, | ||
| 2426 | .spir, | ||
| 2427 | .spirv32, | ||
| 2428 | .kalimba, | ||
| 2429 | .shave, | ||
| 2430 | .renderscript32, | ||
| 2431 | .ve, | ||
| 2432 | .spu_2, | ||
| 2433 | .xtensa, | ||
| 2434 | => 4, | ||
| 2435 | |||
| 2436 | .aarch64_32, | ||
| 2437 | .amdgcn, | ||
| 2438 | .amdil64, | ||
| 2439 | .bpfel, | ||
| 2440 | .bpfeb, | ||
| 2441 | .hexagon, | ||
| 2442 | .hsail64, | ||
| 2443 | .loongarch64, | ||
| 2444 | .m68k, | ||
| 2445 | .mips, | ||
| 2446 | .mipsel, | ||
| 2447 | .sparc, | ||
| 2448 | .sparcel, | ||
| 2449 | .sparc64, | ||
| 2450 | .lanai, | ||
| 2451 | .le64, | ||
| 2452 | .nvptx, | ||
| 2453 | .nvptx64, | ||
| 2454 | .r600, | ||
| 2455 | .s390x, | ||
| 2456 | .spir64, | ||
| 2457 | .spirv64, | ||
| 2458 | .renderscript64, | ||
| 2459 | => 8, | ||
| 2460 | |||
| 2461 | .aarch64, | ||
| 2462 | .aarch64_be, | ||
| 2463 | .mips64, | ||
| 2464 | .mips64el, | ||
| 2465 | .powerpc, | ||
| 2466 | .powerpcle, | ||
| 2467 | .powerpc64, | ||
| 2468 | .powerpc64le, | ||
| 2469 | .riscv32, | ||
| 2470 | .riscv64, | ||
| 2471 | .x86_64, | ||
| 2472 | .wasm32, | ||
| 2473 | .wasm64, | ||
| 2474 | => 16, | ||
| 2475 | }, | ||
| 2476 | ); | ||
| 2477 | } | ||
| 2478 | |||
| 2479 | pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { | ||
| 2480 | // Overrides for unusual alignments | ||
| 2481 | switch (target.cpu.arch) { | ||
| 2482 | .arm, .armeb, .thumb, .thumbeb => switch (target.os.tag) { | ||
| 2483 | .netbsd => switch (target.abi) { | ||
| 2484 | .gnueabi, | ||
| 2485 | .gnueabihf, | ||
| 2486 | .eabi, | ||
| 2487 | .eabihf, | ||
| 2488 | .android, | ||
| 2489 | .musleabi, | ||
| 2490 | .musleabihf, | ||
| 2491 | => {}, | ||
| 2492 | |||
| 2493 | else => switch (c_type) { | ||
| 2494 | .longdouble => return 4, | ||
| 2495 | else => {}, | ||
| 2496 | }, | ||
| 2497 | }, | ||
| 2498 | .ios, .tvos, .watchos => switch (c_type) { | ||
| 2499 | .longdouble => return 4, | ||
| 2500 | else => {}, | ||
| 2501 | }, | ||
| 2502 | else => {}, | ||
| 2503 | }, | ||
| 2504 | .arc => switch (c_type) { | ||
| 2505 | .longdouble => return 4, | ||
| 2506 | else => {}, | ||
| 2507 | }, | ||
| 2508 | .avr => switch (c_type) { | ||
| 2509 | .char, .int, .uint, .long, .ulong, .float, .longdouble => return 1, | ||
| 2510 | .short, .ushort => return 2, | ||
| 2511 | .double => return 4, | ||
| 2512 | .longlong, .ulonglong => return 8, | ||
| 2513 | }, | ||
| 2514 | .x86 => switch (target.os.tag) { | ||
| 2515 | .windows, .uefi => switch (c_type) { | ||
| 2516 | .longdouble => switch (target.abi) { | ||
| 2517 | .gnu, .gnuilp32, .cygnus => return 4, | ||
| 2518 | else => return 8, | ||
| 2519 | }, | ||
| 2520 | else => {}, | ||
| 2521 | }, | ||
| 2522 | else => switch (c_type) { | ||
| 2523 | .longdouble => return 4, | ||
| 2524 | else => {}, | ||
| 2525 | }, | ||
| 2526 | }, | ||
| 2527 | else => {}, | ||
| 2528 | } | ||
| 2529 | |||
| 2530 | // Next-power-of-two-aligned, up to a maximum. | ||
| 2531 | return @min( | ||
| 2532 | std.math.ceilPowerOfTwoAssert(u16, (c_type_bit_size(target, c_type) + 7) / 8), | ||
| 2533 | switch (target.cpu.arch) { | ||
| 2534 | .msp430 => @as(u16, 2), | ||
| 2535 | |||
| 2536 | .csky, | ||
| 2537 | .xcore, | ||
| 2538 | .dxil, | ||
| 2539 | .loongarch32, | ||
| 2540 | .tce, | ||
| 2541 | .tcele, | ||
| 2542 | .le32, | ||
| 2543 | .amdil, | ||
| 2544 | .hsail, | ||
| 2545 | .spir, | ||
| 2546 | .spirv32, | ||
| 2547 | .kalimba, | ||
| 2548 | .shave, | ||
| 2549 | .renderscript32, | ||
| 2550 | .ve, | ||
| 2551 | .spu_2, | ||
| 2552 | .xtensa, | ||
| 2553 | => 4, | ||
| 2554 | |||
| 2555 | .arc, | ||
| 2556 | .arm, | ||
| 2557 | .armeb, | ||
| 2558 | .avr, | ||
| 2559 | .thumb, | ||
| 2560 | .thumbeb, | ||
| 2561 | .aarch64_32, | ||
| 2562 | .amdgcn, | ||
| 2563 | .amdil64, | ||
| 2564 | .bpfel, | ||
| 2565 | .bpfeb, | ||
| 2566 | .hexagon, | ||
| 2567 | .hsail64, | ||
| 2568 | .x86, | ||
| 2569 | .loongarch64, | ||
| 2570 | .m68k, | ||
| 2571 | .mips, | ||
| 2572 | .mipsel, | ||
| 2573 | .sparc, | ||
| 2574 | .sparcel, | ||
| 2575 | .sparc64, | ||
| 2576 | .lanai, | ||
| 2577 | .le64, | ||
| 2578 | .nvptx, | ||
| 2579 | .nvptx64, | ||
| 2580 | .r600, | ||
| 2581 | .s390x, | ||
| 2582 | .spir64, | ||
| 2583 | .spirv64, | ||
| 2584 | .renderscript64, | ||
| 2585 | => 8, | ||
| 2586 | |||
| 2587 | .aarch64, | ||
| 2588 | .aarch64_be, | ||
| 2589 | .mips64, | ||
| 2590 | .mips64el, | ||
| 2591 | .powerpc, | ||
| 2592 | .powerpcle, | ||
| 2593 | .powerpc64, | ||
| 2594 | .powerpc64le, | ||
| 2595 | .riscv32, | ||
| 2596 | .riscv64, | ||
| 2597 | .x86_64, | ||
| 2598 | .wasm32, | ||
| 2599 | .wasm64, | ||
| 2600 | => 16, | ||
| 2601 | }, | ||
| 2602 | ); | ||
| 2603 | } | ||
| 2604 | |||
| 2605 | pub fn is_libc_lib_name(target: std.Target, name: []const u8) bool { | ||
| 2606 | const ignore_case = target.os.tag == .macos or target.os.tag == .windows; | ||
| 2607 | |||
| 2608 | if (eqlIgnoreCase(ignore_case, name, "c")) | ||
| 2609 | return true; | ||
| 2610 | |||
| 2611 | if (target.isMinGW()) { | ||
| 2612 | if (eqlIgnoreCase(ignore_case, name, "m")) | ||
| 2613 | return true; | ||
| 2614 | if (eqlIgnoreCase(ignore_case, name, "uuid")) | ||
| 2615 | return true; | ||
| 2616 | if (eqlIgnoreCase(ignore_case, name, "mingw32")) | ||
| 2617 | return true; | ||
| 2618 | if (eqlIgnoreCase(ignore_case, name, "msvcrt-os")) | ||
| 2619 | return true; | ||
| 2620 | if (eqlIgnoreCase(ignore_case, name, "mingwex")) | ||
| 2621 | return true; | ||
| 2622 | |||
| 2623 | return false; | ||
| 2624 | } | ||
| 2625 | |||
| 2626 | if (target.abi.isGnu() or target.abi.isMusl()) { | ||
| 2627 | if (eqlIgnoreCase(ignore_case, name, "m")) | ||
| 2628 | return true; | ||
| 2629 | if (eqlIgnoreCase(ignore_case, name, "rt")) | ||
| 2630 | return true; | ||
| 2631 | if (eqlIgnoreCase(ignore_case, name, "pthread")) | ||
| 2632 | return true; | ||
| 2633 | if (eqlIgnoreCase(ignore_case, name, "util")) | ||
| 2634 | return true; | ||
| 2635 | if (eqlIgnoreCase(ignore_case, name, "xnet")) | ||
| 2636 | return true; | ||
| 2637 | if (eqlIgnoreCase(ignore_case, name, "resolv")) | ||
| 2638 | return true; | ||
| 2639 | if (eqlIgnoreCase(ignore_case, name, "dl")) | ||
| 2640 | return true; | ||
| 2641 | } | ||
| 2642 | |||
| 2643 | if (target.abi.isMusl()) { | ||
| 2644 | if (eqlIgnoreCase(ignore_case, name, "crypt")) | ||
| 2645 | return true; | ||
| 2646 | } | ||
| 2647 | |||
| 2648 | if (target.os.tag.isDarwin()) { | ||
| 2649 | if (eqlIgnoreCase(ignore_case, name, "System")) | ||
| 2650 | return true; | ||
| 2651 | if (eqlIgnoreCase(ignore_case, name, "c")) | ||
| 2652 | return true; | ||
| 2653 | if (eqlIgnoreCase(ignore_case, name, "dbm")) | ||
| 2654 | return true; | ||
| 2655 | if (eqlIgnoreCase(ignore_case, name, "dl")) | ||
| 2656 | return true; | ||
| 2657 | if (eqlIgnoreCase(ignore_case, name, "info")) | ||
| 2658 | return true; | ||
| 2659 | if (eqlIgnoreCase(ignore_case, name, "m")) | ||
| 2660 | return true; | ||
| 2661 | if (eqlIgnoreCase(ignore_case, name, "poll")) | ||
| 2662 | return true; | ||
| 2663 | if (eqlIgnoreCase(ignore_case, name, "proc")) | ||
| 2664 | return true; | ||
| 2665 | if (eqlIgnoreCase(ignore_case, name, "pthread")) | ||
| 2666 | return true; | ||
| 2667 | if (eqlIgnoreCase(ignore_case, name, "rpcsvc")) | ||
| 2668 | return true; | ||
| 2669 | } | ||
| 2670 | |||
| 2671 | if (target.os.isAtLeast(.macos, .{ .major = 10, .minor = 8, .patch = 0 }) orelse false) { | ||
| 2672 | if (eqlIgnoreCase(ignore_case, name, "mx")) | ||
| 2673 | return true; | ||
| 2674 | } | ||
| 2675 | |||
| 2676 | return false; | ||
| 2677 | } | ||
| 2678 | |||
| 2679 | pub fn is_libcpp_lib_name(target: std.Target, name: []const u8) bool { | ||
| 2680 | const ignore_case = target.os.tag.isDarwin() or target.os.tag == .windows; | ||
| 2681 | |||
| 2682 | return eqlIgnoreCase(ignore_case, name, "c++") or | ||
| 2683 | eqlIgnoreCase(ignore_case, name, "stdc++") or | ||
| 2684 | eqlIgnoreCase(ignore_case, name, "c++abi"); | ||
| 2685 | } | ||
| 2686 | }; | ||
| 2687 | |||
| 2688 | fn eqlIgnoreCase(ignore_case: bool, a: []const u8, b: []const u8) bool { | ||
| 2689 | if (ignore_case) { | ||
| 2690 | return std.ascii.eqlIgnoreCase(a, b); | ||
| 2691 | } else { | ||
| 2692 | return std.mem.eql(u8, a, b); | ||
| 2693 | } | ||
| 2694 | } | ||
| 2695 | |||
| 2696 | test { | ||
| 2697 | std.testing.refAllDecls(Target.Cpu.Arch); | ||
| 2698 | } | ||
lib/std/target/aarch64.zig deleted-2656
| ... | @@ -1,2656 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | a510, | ||
| 9 | a65, | ||
| 10 | a710, | ||
| 11 | a76, | ||
| 12 | a78, | ||
| 13 | a78c, | ||
| 14 | aes, | ||
| 15 | aggressive_fma, | ||
| 16 | alternate_sextload_cvt_f32_pattern, | ||
| 17 | altnzcv, | ||
| 18 | am, | ||
| 19 | amvs, | ||
| 20 | arith_bcc_fusion, | ||
| 21 | arith_cbz_fusion, | ||
| 22 | ascend_store_address, | ||
| 23 | b16b16, | ||
| 24 | balance_fp_ops, | ||
| 25 | bf16, | ||
| 26 | brbe, | ||
| 27 | bti, | ||
| 28 | call_saved_x10, | ||
| 29 | call_saved_x11, | ||
| 30 | call_saved_x12, | ||
| 31 | call_saved_x13, | ||
| 32 | call_saved_x14, | ||
| 33 | call_saved_x15, | ||
| 34 | call_saved_x18, | ||
| 35 | call_saved_x8, | ||
| 36 | call_saved_x9, | ||
| 37 | ccdp, | ||
| 38 | ccidx, | ||
| 39 | ccpp, | ||
| 40 | chk, | ||
| 41 | clrbhb, | ||
| 42 | cmp_bcc_fusion, | ||
| 43 | complxnum, | ||
| 44 | contextidr_el2, | ||
| 45 | cortex_r82, | ||
| 46 | crc, | ||
| 47 | crypto, | ||
| 48 | cssc, | ||
| 49 | custom_cheap_as_move, | ||
| 50 | d128, | ||
| 51 | disable_latency_sched_heuristic, | ||
| 52 | dit, | ||
| 53 | dotprod, | ||
| 54 | ecv, | ||
| 55 | el2vmsa, | ||
| 56 | el3, | ||
| 57 | enable_select_opt, | ||
| 58 | ete, | ||
| 59 | exynos_cheap_as_move, | ||
| 60 | f32mm, | ||
| 61 | f64mm, | ||
| 62 | fgt, | ||
| 63 | fix_cortex_a53_835769, | ||
| 64 | flagm, | ||
| 65 | fmv, | ||
| 66 | force_32bit_jump_tables, | ||
| 67 | fp16fml, | ||
| 68 | fp_armv8, | ||
| 69 | fptoint, | ||
| 70 | fullfp16, | ||
| 71 | fuse_address, | ||
| 72 | fuse_addsub_2reg_const1, | ||
| 73 | fuse_adrp_add, | ||
| 74 | fuse_aes, | ||
| 75 | fuse_arith_logic, | ||
| 76 | fuse_crypto_eor, | ||
| 77 | fuse_csel, | ||
| 78 | fuse_literals, | ||
| 79 | gcs, | ||
| 80 | harden_sls_blr, | ||
| 81 | harden_sls_nocomdat, | ||
| 82 | harden_sls_retbr, | ||
| 83 | hbc, | ||
| 84 | hcx, | ||
| 85 | i8mm, | ||
| 86 | ite, | ||
| 87 | jsconv, | ||
| 88 | lor, | ||
| 89 | ls64, | ||
| 90 | lse, | ||
| 91 | lse128, | ||
| 92 | lse2, | ||
| 93 | lsl_fast, | ||
| 94 | mec, | ||
| 95 | mops, | ||
| 96 | mpam, | ||
| 97 | mte, | ||
| 98 | neon, | ||
| 99 | nmi, | ||
| 100 | no_bti_at_return_twice, | ||
| 101 | no_neg_immediates, | ||
| 102 | no_sve_fp_ld1r, | ||
| 103 | no_zcz_fp, | ||
| 104 | nv, | ||
| 105 | outline_atomics, | ||
| 106 | pan, | ||
| 107 | pan_rwv, | ||
| 108 | pauth, | ||
| 109 | perfmon, | ||
| 110 | predictable_select_expensive, | ||
| 111 | predres, | ||
| 112 | prfm_slc_target, | ||
| 113 | rand, | ||
| 114 | ras, | ||
| 115 | rasv2, | ||
| 116 | rcpc, | ||
| 117 | rcpc3, | ||
| 118 | rcpc_immo, | ||
| 119 | rdm, | ||
| 120 | reserve_x1, | ||
| 121 | reserve_x10, | ||
| 122 | reserve_x11, | ||
| 123 | reserve_x12, | ||
| 124 | reserve_x13, | ||
| 125 | reserve_x14, | ||
| 126 | reserve_x15, | ||
| 127 | reserve_x18, | ||
| 128 | reserve_x2, | ||
| 129 | reserve_x20, | ||
| 130 | reserve_x21, | ||
| 131 | reserve_x22, | ||
| 132 | reserve_x23, | ||
| 133 | reserve_x24, | ||
| 134 | reserve_x25, | ||
| 135 | reserve_x26, | ||
| 136 | reserve_x27, | ||
| 137 | reserve_x28, | ||
| 138 | reserve_x3, | ||
| 139 | reserve_x30, | ||
| 140 | reserve_x4, | ||
| 141 | reserve_x5, | ||
| 142 | reserve_x6, | ||
| 143 | reserve_x7, | ||
| 144 | reserve_x9, | ||
| 145 | rme, | ||
| 146 | sb, | ||
| 147 | sel2, | ||
| 148 | sha2, | ||
| 149 | sha3, | ||
| 150 | slow_misaligned_128store, | ||
| 151 | slow_paired_128, | ||
| 152 | slow_strqro_store, | ||
| 153 | sm4, | ||
| 154 | sme, | ||
| 155 | sme2, | ||
| 156 | sme2p1, | ||
| 157 | sme_f16f16, | ||
| 158 | sme_f64f64, | ||
| 159 | sme_i16i64, | ||
| 160 | spe, | ||
| 161 | spe_eef, | ||
| 162 | specres2, | ||
| 163 | specrestrict, | ||
| 164 | ssbs, | ||
| 165 | strict_align, | ||
| 166 | sve, | ||
| 167 | sve2, | ||
| 168 | sve2_aes, | ||
| 169 | sve2_bitperm, | ||
| 170 | sve2_sha3, | ||
| 171 | sve2_sm4, | ||
| 172 | sve2p1, | ||
| 173 | tagged_globals, | ||
| 174 | the, | ||
| 175 | tlb_rmi, | ||
| 176 | tme, | ||
| 177 | tpidr_el1, | ||
| 178 | tpidr_el2, | ||
| 179 | tpidr_el3, | ||
| 180 | tpidrro_el0, | ||
| 181 | tracev8_4, | ||
| 182 | trbe, | ||
| 183 | uaops, | ||
| 184 | use_experimental_zeroing_pseudos, | ||
| 185 | use_postra_scheduler, | ||
| 186 | use_reciprocal_square_root, | ||
| 187 | use_scalar_inc_vl, | ||
| 188 | v8_1a, | ||
| 189 | v8_2a, | ||
| 190 | v8_3a, | ||
| 191 | v8_4a, | ||
| 192 | v8_5a, | ||
| 193 | v8_6a, | ||
| 194 | v8_7a, | ||
| 195 | v8_8a, | ||
| 196 | v8_9a, | ||
| 197 | v8a, | ||
| 198 | v8r, | ||
| 199 | v9_1a, | ||
| 200 | v9_2a, | ||
| 201 | v9_3a, | ||
| 202 | v9_4a, | ||
| 203 | v9a, | ||
| 204 | vh, | ||
| 205 | wfxt, | ||
| 206 | xs, | ||
| 207 | zcm, | ||
| 208 | zcz, | ||
| 209 | zcz_fp_workaround, | ||
| 210 | zcz_gp, | ||
| 211 | }; | ||
| 212 | |||
| 213 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 214 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 215 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 216 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 217 | |||
| 218 | pub const all_features = blk: { | ||
| 219 | @setEvalBranchQuota(2000); | ||
| 220 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 221 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 222 | var result: [len]CpuFeature = undefined; | ||
| 223 | result[@intFromEnum(Feature.a510)] = .{ | ||
| 224 | .llvm_name = "a510", | ||
| 225 | .description = "Cortex-A510 ARM processors", | ||
| 226 | .dependencies = featureSet(&[_]Feature{ | ||
| 227 | .fuse_adrp_add, | ||
| 228 | .fuse_aes, | ||
| 229 | .use_postra_scheduler, | ||
| 230 | }), | ||
| 231 | }; | ||
| 232 | result[@intFromEnum(Feature.a65)] = .{ | ||
| 233 | .llvm_name = "a65", | ||
| 234 | .description = "Cortex-A65 ARM processors", | ||
| 235 | .dependencies = featureSet(&[_]Feature{ | ||
| 236 | .enable_select_opt, | ||
| 237 | .fuse_address, | ||
| 238 | .fuse_adrp_add, | ||
| 239 | .fuse_aes, | ||
| 240 | .fuse_literals, | ||
| 241 | .predictable_select_expensive, | ||
| 242 | }), | ||
| 243 | }; | ||
| 244 | result[@intFromEnum(Feature.a710)] = .{ | ||
| 245 | .llvm_name = "a710", | ||
| 246 | .description = "Cortex-A710 ARM processors", | ||
| 247 | .dependencies = featureSet(&[_]Feature{ | ||
| 248 | .cmp_bcc_fusion, | ||
| 249 | .enable_select_opt, | ||
| 250 | .fuse_adrp_add, | ||
| 251 | .fuse_aes, | ||
| 252 | .lsl_fast, | ||
| 253 | .predictable_select_expensive, | ||
| 254 | .use_postra_scheduler, | ||
| 255 | }), | ||
| 256 | }; | ||
| 257 | result[@intFromEnum(Feature.a76)] = .{ | ||
| 258 | .llvm_name = "a76", | ||
| 259 | .description = "Cortex-A76 ARM processors", | ||
| 260 | .dependencies = featureSet(&[_]Feature{ | ||
| 261 | .enable_select_opt, | ||
| 262 | .fuse_adrp_add, | ||
| 263 | .fuse_aes, | ||
| 264 | .lsl_fast, | ||
| 265 | .predictable_select_expensive, | ||
| 266 | }), | ||
| 267 | }; | ||
| 268 | result[@intFromEnum(Feature.a78)] = .{ | ||
| 269 | .llvm_name = "a78", | ||
| 270 | .description = "Cortex-A78 ARM processors", | ||
| 271 | .dependencies = featureSet(&[_]Feature{ | ||
| 272 | .cmp_bcc_fusion, | ||
| 273 | .enable_select_opt, | ||
| 274 | .fuse_adrp_add, | ||
| 275 | .fuse_aes, | ||
| 276 | .lsl_fast, | ||
| 277 | .predictable_select_expensive, | ||
| 278 | .use_postra_scheduler, | ||
| 279 | }), | ||
| 280 | }; | ||
| 281 | result[@intFromEnum(Feature.a78c)] = .{ | ||
| 282 | .llvm_name = "a78c", | ||
| 283 | .description = "Cortex-A78C ARM processors", | ||
| 284 | .dependencies = featureSet(&[_]Feature{ | ||
| 285 | .cmp_bcc_fusion, | ||
| 286 | .enable_select_opt, | ||
| 287 | .fuse_adrp_add, | ||
| 288 | .fuse_aes, | ||
| 289 | .lsl_fast, | ||
| 290 | .predictable_select_expensive, | ||
| 291 | .use_postra_scheduler, | ||
| 292 | }), | ||
| 293 | }; | ||
| 294 | result[@intFromEnum(Feature.aes)] = .{ | ||
| 295 | .llvm_name = "aes", | ||
| 296 | .description = "Enable AES support (FEAT_AES, FEAT_PMULL)", | ||
| 297 | .dependencies = featureSet(&[_]Feature{ | ||
| 298 | .neon, | ||
| 299 | }), | ||
| 300 | }; | ||
| 301 | result[@intFromEnum(Feature.aggressive_fma)] = .{ | ||
| 302 | .llvm_name = "aggressive-fma", | ||
| 303 | .description = "Enable Aggressive FMA for floating-point.", | ||
| 304 | .dependencies = featureSet(&[_]Feature{}), | ||
| 305 | }; | ||
| 306 | result[@intFromEnum(Feature.alternate_sextload_cvt_f32_pattern)] = .{ | ||
| 307 | .llvm_name = "alternate-sextload-cvt-f32-pattern", | ||
| 308 | .description = "Use alternative pattern for sextload convert to f32", | ||
| 309 | .dependencies = featureSet(&[_]Feature{}), | ||
| 310 | }; | ||
| 311 | result[@intFromEnum(Feature.altnzcv)] = .{ | ||
| 312 | .llvm_name = "altnzcv", | ||
| 313 | .description = "Enable alternative NZCV format for floating point comparisons (FEAT_FlagM2)", | ||
| 314 | .dependencies = featureSet(&[_]Feature{}), | ||
| 315 | }; | ||
| 316 | result[@intFromEnum(Feature.am)] = .{ | ||
| 317 | .llvm_name = "am", | ||
| 318 | .description = "Enable v8.4-A Activity Monitors extension (FEAT_AMUv1)", | ||
| 319 | .dependencies = featureSet(&[_]Feature{}), | ||
| 320 | }; | ||
| 321 | result[@intFromEnum(Feature.amvs)] = .{ | ||
| 322 | .llvm_name = "amvs", | ||
| 323 | .description = "Enable v8.6-A Activity Monitors Virtualization support (FEAT_AMUv1p1)", | ||
| 324 | .dependencies = featureSet(&[_]Feature{ | ||
| 325 | .am, | ||
| 326 | }), | ||
| 327 | }; | ||
| 328 | result[@intFromEnum(Feature.arith_bcc_fusion)] = .{ | ||
| 329 | .llvm_name = "arith-bcc-fusion", | ||
| 330 | .description = "CPU fuses arithmetic+bcc operations", | ||
| 331 | .dependencies = featureSet(&[_]Feature{}), | ||
| 332 | }; | ||
| 333 | result[@intFromEnum(Feature.arith_cbz_fusion)] = .{ | ||
| 334 | .llvm_name = "arith-cbz-fusion", | ||
| 335 | .description = "CPU fuses arithmetic + cbz/cbnz operations", | ||
| 336 | .dependencies = featureSet(&[_]Feature{}), | ||
| 337 | }; | ||
| 338 | result[@intFromEnum(Feature.ascend_store_address)] = .{ | ||
| 339 | .llvm_name = "ascend-store-address", | ||
| 340 | .description = "Schedule vector stores by ascending address", | ||
| 341 | .dependencies = featureSet(&[_]Feature{}), | ||
| 342 | }; | ||
| 343 | result[@intFromEnum(Feature.b16b16)] = .{ | ||
| 344 | .llvm_name = "b16b16", | ||
| 345 | .description = "Enable SVE2.1 or SME2.1 non-widening BFloat16 to BFloat16 instructions (FEAT_B16B16)", | ||
| 346 | .dependencies = featureSet(&[_]Feature{}), | ||
| 347 | }; | ||
| 348 | result[@intFromEnum(Feature.balance_fp_ops)] = .{ | ||
| 349 | .llvm_name = "balance-fp-ops", | ||
| 350 | .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", | ||
| 351 | .dependencies = featureSet(&[_]Feature{}), | ||
| 352 | }; | ||
| 353 | result[@intFromEnum(Feature.bf16)] = .{ | ||
| 354 | .llvm_name = "bf16", | ||
| 355 | .description = "Enable BFloat16 Extension (FEAT_BF16)", | ||
| 356 | .dependencies = featureSet(&[_]Feature{}), | ||
| 357 | }; | ||
| 358 | result[@intFromEnum(Feature.brbe)] = .{ | ||
| 359 | .llvm_name = "brbe", | ||
| 360 | .description = "Enable Branch Record Buffer Extension (FEAT_BRBE)", | ||
| 361 | .dependencies = featureSet(&[_]Feature{}), | ||
| 362 | }; | ||
| 363 | result[@intFromEnum(Feature.bti)] = .{ | ||
| 364 | .llvm_name = "bti", | ||
| 365 | .description = "Enable Branch Target Identification (FEAT_BTI)", | ||
| 366 | .dependencies = featureSet(&[_]Feature{}), | ||
| 367 | }; | ||
| 368 | result[@intFromEnum(Feature.call_saved_x10)] = .{ | ||
| 369 | .llvm_name = "call-saved-x10", | ||
| 370 | .description = "Make X10 callee saved.", | ||
| 371 | .dependencies = featureSet(&[_]Feature{}), | ||
| 372 | }; | ||
| 373 | result[@intFromEnum(Feature.call_saved_x11)] = .{ | ||
| 374 | .llvm_name = "call-saved-x11", | ||
| 375 | .description = "Make X11 callee saved.", | ||
| 376 | .dependencies = featureSet(&[_]Feature{}), | ||
| 377 | }; | ||
| 378 | result[@intFromEnum(Feature.call_saved_x12)] = .{ | ||
| 379 | .llvm_name = "call-saved-x12", | ||
| 380 | .description = "Make X12 callee saved.", | ||
| 381 | .dependencies = featureSet(&[_]Feature{}), | ||
| 382 | }; | ||
| 383 | result[@intFromEnum(Feature.call_saved_x13)] = .{ | ||
| 384 | .llvm_name = "call-saved-x13", | ||
| 385 | .description = "Make X13 callee saved.", | ||
| 386 | .dependencies = featureSet(&[_]Feature{}), | ||
| 387 | }; | ||
| 388 | result[@intFromEnum(Feature.call_saved_x14)] = .{ | ||
| 389 | .llvm_name = "call-saved-x14", | ||
| 390 | .description = "Make X14 callee saved.", | ||
| 391 | .dependencies = featureSet(&[_]Feature{}), | ||
| 392 | }; | ||
| 393 | result[@intFromEnum(Feature.call_saved_x15)] = .{ | ||
| 394 | .llvm_name = "call-saved-x15", | ||
| 395 | .description = "Make X15 callee saved.", | ||
| 396 | .dependencies = featureSet(&[_]Feature{}), | ||
| 397 | }; | ||
| 398 | result[@intFromEnum(Feature.call_saved_x18)] = .{ | ||
| 399 | .llvm_name = "call-saved-x18", | ||
| 400 | .description = "Make X18 callee saved.", | ||
| 401 | .dependencies = featureSet(&[_]Feature{}), | ||
| 402 | }; | ||
| 403 | result[@intFromEnum(Feature.call_saved_x8)] = .{ | ||
| 404 | .llvm_name = "call-saved-x8", | ||
| 405 | .description = "Make X8 callee saved.", | ||
| 406 | .dependencies = featureSet(&[_]Feature{}), | ||
| 407 | }; | ||
| 408 | result[@intFromEnum(Feature.call_saved_x9)] = .{ | ||
| 409 | .llvm_name = "call-saved-x9", | ||
| 410 | .description = "Make X9 callee saved.", | ||
| 411 | .dependencies = featureSet(&[_]Feature{}), | ||
| 412 | }; | ||
| 413 | result[@intFromEnum(Feature.ccdp)] = .{ | ||
| 414 | .llvm_name = "ccdp", | ||
| 415 | .description = "Enable v8.5 Cache Clean to Point of Deep Persistence (FEAT_DPB2)", | ||
| 416 | .dependencies = featureSet(&[_]Feature{}), | ||
| 417 | }; | ||
| 418 | result[@intFromEnum(Feature.ccidx)] = .{ | ||
| 419 | .llvm_name = "ccidx", | ||
| 420 | .description = "Enable v8.3-A Extend of the CCSIDR number of sets (FEAT_CCIDX)", | ||
| 421 | .dependencies = featureSet(&[_]Feature{}), | ||
| 422 | }; | ||
| 423 | result[@intFromEnum(Feature.ccpp)] = .{ | ||
| 424 | .llvm_name = "ccpp", | ||
| 425 | .description = "Enable v8.2 data Cache Clean to Point of Persistence (FEAT_DPB)", | ||
| 426 | .dependencies = featureSet(&[_]Feature{}), | ||
| 427 | }; | ||
| 428 | result[@intFromEnum(Feature.chk)] = .{ | ||
| 429 | .llvm_name = "chk", | ||
| 430 | .description = "Enable Armv8.0-A Check Feature Status Extension (FEAT_CHK)", | ||
| 431 | .dependencies = featureSet(&[_]Feature{}), | ||
| 432 | }; | ||
| 433 | result[@intFromEnum(Feature.clrbhb)] = .{ | ||
| 434 | .llvm_name = "clrbhb", | ||
| 435 | .description = "Enable Clear BHB instruction (FEAT_CLRBHB)", | ||
| 436 | .dependencies = featureSet(&[_]Feature{}), | ||
| 437 | }; | ||
| 438 | result[@intFromEnum(Feature.cmp_bcc_fusion)] = .{ | ||
| 439 | .llvm_name = "cmp-bcc-fusion", | ||
| 440 | .description = "CPU fuses cmp+bcc operations", | ||
| 441 | .dependencies = featureSet(&[_]Feature{}), | ||
| 442 | }; | ||
| 443 | result[@intFromEnum(Feature.complxnum)] = .{ | ||
| 444 | .llvm_name = "complxnum", | ||
| 445 | .description = "Enable v8.3-A Floating-point complex number support (FEAT_FCMA)", | ||
| 446 | .dependencies = featureSet(&[_]Feature{ | ||
| 447 | .neon, | ||
| 448 | }), | ||
| 449 | }; | ||
| 450 | result[@intFromEnum(Feature.contextidr_el2)] = .{ | ||
| 451 | .llvm_name = "CONTEXTIDREL2", | ||
| 452 | .description = "Enable RW operand Context ID Register (EL2)", | ||
| 453 | .dependencies = featureSet(&[_]Feature{}), | ||
| 454 | }; | ||
| 455 | result[@intFromEnum(Feature.cortex_r82)] = .{ | ||
| 456 | .llvm_name = "cortex-r82", | ||
| 457 | .description = "Cortex-R82 ARM processors", | ||
| 458 | .dependencies = featureSet(&[_]Feature{ | ||
| 459 | .use_postra_scheduler, | ||
| 460 | }), | ||
| 461 | }; | ||
| 462 | result[@intFromEnum(Feature.crc)] = .{ | ||
| 463 | .llvm_name = "crc", | ||
| 464 | .description = "Enable ARMv8 CRC-32 checksum instructions (FEAT_CRC32)", | ||
| 465 | .dependencies = featureSet(&[_]Feature{}), | ||
| 466 | }; | ||
| 467 | result[@intFromEnum(Feature.crypto)] = .{ | ||
| 468 | .llvm_name = "crypto", | ||
| 469 | .description = "Enable cryptographic instructions", | ||
| 470 | .dependencies = featureSet(&[_]Feature{ | ||
| 471 | .aes, | ||
| 472 | .sha2, | ||
| 473 | }), | ||
| 474 | }; | ||
| 475 | result[@intFromEnum(Feature.cssc)] = .{ | ||
| 476 | .llvm_name = "cssc", | ||
| 477 | .description = "Enable Common Short Sequence Compression (CSSC) instructions (FEAT_CSSC)", | ||
| 478 | .dependencies = featureSet(&[_]Feature{}), | ||
| 479 | }; | ||
| 480 | result[@intFromEnum(Feature.custom_cheap_as_move)] = .{ | ||
| 481 | .llvm_name = "custom-cheap-as-move", | ||
| 482 | .description = "Use custom handling of cheap instructions", | ||
| 483 | .dependencies = featureSet(&[_]Feature{}), | ||
| 484 | }; | ||
| 485 | result[@intFromEnum(Feature.d128)] = .{ | ||
| 486 | .llvm_name = "d128", | ||
| 487 | .description = "Enable Armv9.4-A 128-bit Page Table Descriptors, System Registers and Instructions (FEAT_D128, FEAT_LVA3, FEAT_SYSREG128, FEAT_SYSINSTR128)", | ||
| 488 | .dependencies = featureSet(&[_]Feature{ | ||
| 489 | .lse128, | ||
| 490 | }), | ||
| 491 | }; | ||
| 492 | result[@intFromEnum(Feature.disable_latency_sched_heuristic)] = .{ | ||
| 493 | .llvm_name = "disable-latency-sched-heuristic", | ||
| 494 | .description = "Disable latency scheduling heuristic", | ||
| 495 | .dependencies = featureSet(&[_]Feature{}), | ||
| 496 | }; | ||
| 497 | result[@intFromEnum(Feature.dit)] = .{ | ||
| 498 | .llvm_name = "dit", | ||
| 499 | .description = "Enable v8.4-A Data Independent Timing instructions (FEAT_DIT)", | ||
| 500 | .dependencies = featureSet(&[_]Feature{}), | ||
| 501 | }; | ||
| 502 | result[@intFromEnum(Feature.dotprod)] = .{ | ||
| 503 | .llvm_name = "dotprod", | ||
| 504 | .description = "Enable dot product support (FEAT_DotProd)", | ||
| 505 | .dependencies = featureSet(&[_]Feature{}), | ||
| 506 | }; | ||
| 507 | result[@intFromEnum(Feature.ecv)] = .{ | ||
| 508 | .llvm_name = "ecv", | ||
| 509 | .description = "Enable enhanced counter virtualization extension (FEAT_ECV)", | ||
| 510 | .dependencies = featureSet(&[_]Feature{}), | ||
| 511 | }; | ||
| 512 | result[@intFromEnum(Feature.el2vmsa)] = .{ | ||
| 513 | .llvm_name = "el2vmsa", | ||
| 514 | .description = "Enable Exception Level 2 Virtual Memory System Architecture", | ||
| 515 | .dependencies = featureSet(&[_]Feature{}), | ||
| 516 | }; | ||
| 517 | result[@intFromEnum(Feature.el3)] = .{ | ||
| 518 | .llvm_name = "el3", | ||
| 519 | .description = "Enable Exception Level 3", | ||
| 520 | .dependencies = featureSet(&[_]Feature{}), | ||
| 521 | }; | ||
| 522 | result[@intFromEnum(Feature.enable_select_opt)] = .{ | ||
| 523 | .llvm_name = "enable-select-opt", | ||
| 524 | .description = "Enable the select optimize pass for select loop heuristics", | ||
| 525 | .dependencies = featureSet(&[_]Feature{}), | ||
| 526 | }; | ||
| 527 | result[@intFromEnum(Feature.ete)] = .{ | ||
| 528 | .llvm_name = "ete", | ||
| 529 | .description = "Enable Embedded Trace Extension (FEAT_ETE)", | ||
| 530 | .dependencies = featureSet(&[_]Feature{ | ||
| 531 | .trbe, | ||
| 532 | }), | ||
| 533 | }; | ||
| 534 | result[@intFromEnum(Feature.exynos_cheap_as_move)] = .{ | ||
| 535 | .llvm_name = "exynos-cheap-as-move", | ||
| 536 | .description = "Use Exynos specific handling of cheap instructions", | ||
| 537 | .dependencies = featureSet(&[_]Feature{ | ||
| 538 | .custom_cheap_as_move, | ||
| 539 | }), | ||
| 540 | }; | ||
| 541 | result[@intFromEnum(Feature.f32mm)] = .{ | ||
| 542 | .llvm_name = "f32mm", | ||
| 543 | .description = "Enable Matrix Multiply FP32 Extension (FEAT_F32MM)", | ||
| 544 | .dependencies = featureSet(&[_]Feature{ | ||
| 545 | .sve, | ||
| 546 | }), | ||
| 547 | }; | ||
| 548 | result[@intFromEnum(Feature.f64mm)] = .{ | ||
| 549 | .llvm_name = "f64mm", | ||
| 550 | .description = "Enable Matrix Multiply FP64 Extension (FEAT_F64MM)", | ||
| 551 | .dependencies = featureSet(&[_]Feature{ | ||
| 552 | .sve, | ||
| 553 | }), | ||
| 554 | }; | ||
| 555 | result[@intFromEnum(Feature.fgt)] = .{ | ||
| 556 | .llvm_name = "fgt", | ||
| 557 | .description = "Enable fine grained virtualization traps extension (FEAT_FGT)", | ||
| 558 | .dependencies = featureSet(&[_]Feature{}), | ||
| 559 | }; | ||
| 560 | result[@intFromEnum(Feature.fix_cortex_a53_835769)] = .{ | ||
| 561 | .llvm_name = "fix-cortex-a53-835769", | ||
| 562 | .description = "Mitigate Cortex-A53 Erratum 835769", | ||
| 563 | .dependencies = featureSet(&[_]Feature{}), | ||
| 564 | }; | ||
| 565 | result[@intFromEnum(Feature.flagm)] = .{ | ||
| 566 | .llvm_name = "flagm", | ||
| 567 | .description = "Enable v8.4-A Flag Manipulation Instructions (FEAT_FlagM)", | ||
| 568 | .dependencies = featureSet(&[_]Feature{}), | ||
| 569 | }; | ||
| 570 | result[@intFromEnum(Feature.fmv)] = .{ | ||
| 571 | .llvm_name = "fmv", | ||
| 572 | .description = "Enable Function Multi Versioning support.", | ||
| 573 | .dependencies = featureSet(&[_]Feature{}), | ||
| 574 | }; | ||
| 575 | result[@intFromEnum(Feature.force_32bit_jump_tables)] = .{ | ||
| 576 | .llvm_name = "force-32bit-jump-tables", | ||
| 577 | .description = "Force jump table entries to be 32-bits wide except at MinSize", | ||
| 578 | .dependencies = featureSet(&[_]Feature{}), | ||
| 579 | }; | ||
| 580 | result[@intFromEnum(Feature.fp16fml)] = .{ | ||
| 581 | .llvm_name = "fp16fml", | ||
| 582 | .description = "Enable FP16 FML instructions (FEAT_FHM)", | ||
| 583 | .dependencies = featureSet(&[_]Feature{ | ||
| 584 | .fullfp16, | ||
| 585 | }), | ||
| 586 | }; | ||
| 587 | result[@intFromEnum(Feature.fp_armv8)] = .{ | ||
| 588 | .llvm_name = "fp-armv8", | ||
| 589 | .description = "Enable ARMv8 FP (FEAT_FP)", | ||
| 590 | .dependencies = featureSet(&[_]Feature{}), | ||
| 591 | }; | ||
| 592 | result[@intFromEnum(Feature.fptoint)] = .{ | ||
| 593 | .llvm_name = "fptoint", | ||
| 594 | .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int (FEAT_FRINTTS)", | ||
| 595 | .dependencies = featureSet(&[_]Feature{}), | ||
| 596 | }; | ||
| 597 | result[@intFromEnum(Feature.fullfp16)] = .{ | ||
| 598 | .llvm_name = "fullfp16", | ||
| 599 | .description = "Full FP16 (FEAT_FP16)", | ||
| 600 | .dependencies = featureSet(&[_]Feature{ | ||
| 601 | .fp_armv8, | ||
| 602 | }), | ||
| 603 | }; | ||
| 604 | result[@intFromEnum(Feature.fuse_address)] = .{ | ||
| 605 | .llvm_name = "fuse-address", | ||
| 606 | .description = "CPU fuses address generation and memory operations", | ||
| 607 | .dependencies = featureSet(&[_]Feature{}), | ||
| 608 | }; | ||
| 609 | result[@intFromEnum(Feature.fuse_addsub_2reg_const1)] = .{ | ||
| 610 | .llvm_name = "fuse-addsub-2reg-const1", | ||
| 611 | .description = "CPU fuses (a + b + 1) and (a - b - 1)", | ||
| 612 | .dependencies = featureSet(&[_]Feature{}), | ||
| 613 | }; | ||
| 614 | result[@intFromEnum(Feature.fuse_adrp_add)] = .{ | ||
| 615 | .llvm_name = "fuse-adrp-add", | ||
| 616 | .description = "CPU fuses adrp+add operations", | ||
| 617 | .dependencies = featureSet(&[_]Feature{}), | ||
| 618 | }; | ||
| 619 | result[@intFromEnum(Feature.fuse_aes)] = .{ | ||
| 620 | .llvm_name = "fuse-aes", | ||
| 621 | .description = "CPU fuses AES crypto operations", | ||
| 622 | .dependencies = featureSet(&[_]Feature{}), | ||
| 623 | }; | ||
| 624 | result[@intFromEnum(Feature.fuse_arith_logic)] = .{ | ||
| 625 | .llvm_name = "fuse-arith-logic", | ||
| 626 | .description = "CPU fuses arithmetic and logic operations", | ||
| 627 | .dependencies = featureSet(&[_]Feature{}), | ||
| 628 | }; | ||
| 629 | result[@intFromEnum(Feature.fuse_crypto_eor)] = .{ | ||
| 630 | .llvm_name = "fuse-crypto-eor", | ||
| 631 | .description = "CPU fuses AES/PMULL and EOR operations", | ||
| 632 | .dependencies = featureSet(&[_]Feature{}), | ||
| 633 | }; | ||
| 634 | result[@intFromEnum(Feature.fuse_csel)] = .{ | ||
| 635 | .llvm_name = "fuse-csel", | ||
| 636 | .description = "CPU fuses conditional select operations", | ||
| 637 | .dependencies = featureSet(&[_]Feature{}), | ||
| 638 | }; | ||
| 639 | result[@intFromEnum(Feature.fuse_literals)] = .{ | ||
| 640 | .llvm_name = "fuse-literals", | ||
| 641 | .description = "CPU fuses literal generation operations", | ||
| 642 | .dependencies = featureSet(&[_]Feature{}), | ||
| 643 | }; | ||
| 644 | result[@intFromEnum(Feature.gcs)] = .{ | ||
| 645 | .llvm_name = "gcs", | ||
| 646 | .description = "Enable Armv9.4-A Guarded Call Stack Extension", | ||
| 647 | .dependencies = featureSet(&[_]Feature{ | ||
| 648 | .chk, | ||
| 649 | }), | ||
| 650 | }; | ||
| 651 | result[@intFromEnum(Feature.harden_sls_blr)] = .{ | ||
| 652 | .llvm_name = "harden-sls-blr", | ||
| 653 | .description = "Harden against straight line speculation across BLR instructions", | ||
| 654 | .dependencies = featureSet(&[_]Feature{}), | ||
| 655 | }; | ||
| 656 | result[@intFromEnum(Feature.harden_sls_nocomdat)] = .{ | ||
| 657 | .llvm_name = "harden-sls-nocomdat", | ||
| 658 | .description = "Generate thunk code for SLS mitigation in the normal text section", | ||
| 659 | .dependencies = featureSet(&[_]Feature{}), | ||
| 660 | }; | ||
| 661 | result[@intFromEnum(Feature.harden_sls_retbr)] = .{ | ||
| 662 | .llvm_name = "harden-sls-retbr", | ||
| 663 | .description = "Harden against straight line speculation across RET and BR instructions", | ||
| 664 | .dependencies = featureSet(&[_]Feature{}), | ||
| 665 | }; | ||
| 666 | result[@intFromEnum(Feature.hbc)] = .{ | ||
| 667 | .llvm_name = "hbc", | ||
| 668 | .description = "Enable Armv8.8-A Hinted Conditional Branches Extension (FEAT_HBC)", | ||
| 669 | .dependencies = featureSet(&[_]Feature{}), | ||
| 670 | }; | ||
| 671 | result[@intFromEnum(Feature.hcx)] = .{ | ||
| 672 | .llvm_name = "hcx", | ||
| 673 | .description = "Enable Armv8.7-A HCRX_EL2 system register (FEAT_HCX)", | ||
| 674 | .dependencies = featureSet(&[_]Feature{}), | ||
| 675 | }; | ||
| 676 | result[@intFromEnum(Feature.i8mm)] = .{ | ||
| 677 | .llvm_name = "i8mm", | ||
| 678 | .description = "Enable Matrix Multiply Int8 Extension (FEAT_I8MM)", | ||
| 679 | .dependencies = featureSet(&[_]Feature{}), | ||
| 680 | }; | ||
| 681 | result[@intFromEnum(Feature.ite)] = .{ | ||
| 682 | .llvm_name = "ite", | ||
| 683 | .description = "Enable Armv9.4-A Instrumentation Extension FEAT_ITE", | ||
| 684 | .dependencies = featureSet(&[_]Feature{ | ||
| 685 | .ete, | ||
| 686 | }), | ||
| 687 | }; | ||
| 688 | result[@intFromEnum(Feature.jsconv)] = .{ | ||
| 689 | .llvm_name = "jsconv", | ||
| 690 | .description = "Enable v8.3-A JavaScript FP conversion instructions (FEAT_JSCVT)", | ||
| 691 | .dependencies = featureSet(&[_]Feature{ | ||
| 692 | .fp_armv8, | ||
| 693 | }), | ||
| 694 | }; | ||
| 695 | result[@intFromEnum(Feature.lor)] = .{ | ||
| 696 | .llvm_name = "lor", | ||
| 697 | .description = "Enables ARM v8.1 Limited Ordering Regions extension (FEAT_LOR)", | ||
| 698 | .dependencies = featureSet(&[_]Feature{}), | ||
| 699 | }; | ||
| 700 | result[@intFromEnum(Feature.ls64)] = .{ | ||
| 701 | .llvm_name = "ls64", | ||
| 702 | .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension (FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA)", | ||
| 703 | .dependencies = featureSet(&[_]Feature{}), | ||
| 704 | }; | ||
| 705 | result[@intFromEnum(Feature.lse)] = .{ | ||
| 706 | .llvm_name = "lse", | ||
| 707 | .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions (FEAT_LSE)", | ||
| 708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.lse128)] = .{ | ||
| 711 | .llvm_name = "lse128", | ||
| 712 | .description = "Enable Armv9.4-A 128-bit Atomic Instructions (FEAT_LSE128)", | ||
| 713 | .dependencies = featureSet(&[_]Feature{ | ||
| 714 | .lse, | ||
| 715 | }), | ||
| 716 | }; | ||
| 717 | result[@intFromEnum(Feature.lse2)] = .{ | ||
| 718 | .llvm_name = "lse2", | ||
| 719 | .description = "Enable ARMv8.4 Large System Extension 2 (LSE2) atomicity rules (FEAT_LSE2)", | ||
| 720 | .dependencies = featureSet(&[_]Feature{}), | ||
| 721 | }; | ||
| 722 | result[@intFromEnum(Feature.lsl_fast)] = .{ | ||
| 723 | .llvm_name = "lsl-fast", | ||
| 724 | .description = "CPU has a fastpath logical shift of up to 3 places", | ||
| 725 | .dependencies = featureSet(&[_]Feature{}), | ||
| 726 | }; | ||
| 727 | result[@intFromEnum(Feature.mec)] = .{ | ||
| 728 | .llvm_name = "mec", | ||
| 729 | .description = "Enable Memory Encryption Contexts Extension", | ||
| 730 | .dependencies = featureSet(&[_]Feature{ | ||
| 731 | .rme, | ||
| 732 | }), | ||
| 733 | }; | ||
| 734 | result[@intFromEnum(Feature.mops)] = .{ | ||
| 735 | .llvm_name = "mops", | ||
| 736 | .description = "Enable Armv8.8-A memcpy and memset acceleration instructions (FEAT_MOPS)", | ||
| 737 | .dependencies = featureSet(&[_]Feature{}), | ||
| 738 | }; | ||
| 739 | result[@intFromEnum(Feature.mpam)] = .{ | ||
| 740 | .llvm_name = "mpam", | ||
| 741 | .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension (FEAT_MPAM)", | ||
| 742 | .dependencies = featureSet(&[_]Feature{}), | ||
| 743 | }; | ||
| 744 | result[@intFromEnum(Feature.mte)] = .{ | ||
| 745 | .llvm_name = "mte", | ||
| 746 | .description = "Enable Memory Tagging Extension (FEAT_MTE, FEAT_MTE2)", | ||
| 747 | .dependencies = featureSet(&[_]Feature{}), | ||
| 748 | }; | ||
| 749 | result[@intFromEnum(Feature.neon)] = .{ | ||
| 750 | .llvm_name = "neon", | ||
| 751 | .description = "Enable Advanced SIMD instructions (FEAT_AdvSIMD)", | ||
| 752 | .dependencies = featureSet(&[_]Feature{ | ||
| 753 | .fp_armv8, | ||
| 754 | }), | ||
| 755 | }; | ||
| 756 | result[@intFromEnum(Feature.nmi)] = .{ | ||
| 757 | .llvm_name = "nmi", | ||
| 758 | .description = "Enable Armv8.8-A Non-maskable Interrupts (FEAT_NMI, FEAT_GICv3_NMI)", | ||
| 759 | .dependencies = featureSet(&[_]Feature{}), | ||
| 760 | }; | ||
| 761 | result[@intFromEnum(Feature.no_bti_at_return_twice)] = .{ | ||
| 762 | .llvm_name = "no-bti-at-return-twice", | ||
| 763 | .description = "Don't place a BTI instruction after a return-twice", | ||
| 764 | .dependencies = featureSet(&[_]Feature{}), | ||
| 765 | }; | ||
| 766 | result[@intFromEnum(Feature.no_neg_immediates)] = .{ | ||
| 767 | .llvm_name = "no-neg-immediates", | ||
| 768 | .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", | ||
| 769 | .dependencies = featureSet(&[_]Feature{}), | ||
| 770 | }; | ||
| 771 | result[@intFromEnum(Feature.no_sve_fp_ld1r)] = .{ | ||
| 772 | .llvm_name = "no-sve-fp-ld1r", | ||
| 773 | .description = "Avoid using LD1RX instructions for FP", | ||
| 774 | .dependencies = featureSet(&[_]Feature{}), | ||
| 775 | }; | ||
| 776 | result[@intFromEnum(Feature.no_zcz_fp)] = .{ | ||
| 777 | .llvm_name = "no-zcz-fp", | ||
| 778 | .description = "Has no zero-cycle zeroing instructions for FP registers", | ||
| 779 | .dependencies = featureSet(&[_]Feature{}), | ||
| 780 | }; | ||
| 781 | result[@intFromEnum(Feature.nv)] = .{ | ||
| 782 | .llvm_name = "nv", | ||
| 783 | .description = "Enable v8.4-A Nested Virtualization Enchancement (FEAT_NV, FEAT_NV2)", | ||
| 784 | .dependencies = featureSet(&[_]Feature{}), | ||
| 785 | }; | ||
| 786 | result[@intFromEnum(Feature.outline_atomics)] = .{ | ||
| 787 | .llvm_name = "outline-atomics", | ||
| 788 | .description = "Enable out of line atomics to support LSE instructions", | ||
| 789 | .dependencies = featureSet(&[_]Feature{}), | ||
| 790 | }; | ||
| 791 | result[@intFromEnum(Feature.pan)] = .{ | ||
| 792 | .llvm_name = "pan", | ||
| 793 | .description = "Enables ARM v8.1 Privileged Access-Never extension (FEAT_PAN)", | ||
| 794 | .dependencies = featureSet(&[_]Feature{}), | ||
| 795 | }; | ||
| 796 | result[@intFromEnum(Feature.pan_rwv)] = .{ | ||
| 797 | .llvm_name = "pan-rwv", | ||
| 798 | .description = "Enable v8.2 PAN s1e1R and s1e1W Variants (FEAT_PAN2)", | ||
| 799 | .dependencies = featureSet(&[_]Feature{ | ||
| 800 | .pan, | ||
| 801 | }), | ||
| 802 | }; | ||
| 803 | result[@intFromEnum(Feature.pauth)] = .{ | ||
| 804 | .llvm_name = "pauth", | ||
| 805 | .description = "Enable v8.3-A Pointer Authentication extension (FEAT_PAuth)", | ||
| 806 | .dependencies = featureSet(&[_]Feature{}), | ||
| 807 | }; | ||
| 808 | result[@intFromEnum(Feature.perfmon)] = .{ | ||
| 809 | .llvm_name = "perfmon", | ||
| 810 | .description = "Enable Code Generation for ARMv8 PMUv3 Performance Monitors extension (FEAT_PMUv3)", | ||
| 811 | .dependencies = featureSet(&[_]Feature{}), | ||
| 812 | }; | ||
| 813 | result[@intFromEnum(Feature.predictable_select_expensive)] = .{ | ||
| 814 | .llvm_name = "predictable-select-expensive", | ||
| 815 | .description = "Prefer likely predicted branches over selects", | ||
| 816 | .dependencies = featureSet(&[_]Feature{}), | ||
| 817 | }; | ||
| 818 | result[@intFromEnum(Feature.predres)] = .{ | ||
| 819 | .llvm_name = "predres", | ||
| 820 | .description = "Enable v8.5a execution and data prediction invalidation instructions (FEAT_SPECRES)", | ||
| 821 | .dependencies = featureSet(&[_]Feature{}), | ||
| 822 | }; | ||
| 823 | result[@intFromEnum(Feature.prfm_slc_target)] = .{ | ||
| 824 | .llvm_name = "prfm-slc-target", | ||
| 825 | .description = "Enable SLC target for PRFM instruction", | ||
| 826 | .dependencies = featureSet(&[_]Feature{}), | ||
| 827 | }; | ||
| 828 | result[@intFromEnum(Feature.rand)] = .{ | ||
| 829 | .llvm_name = "rand", | ||
| 830 | .description = "Enable Random Number generation instructions (FEAT_RNG)", | ||
| 831 | .dependencies = featureSet(&[_]Feature{}), | ||
| 832 | }; | ||
| 833 | result[@intFromEnum(Feature.ras)] = .{ | ||
| 834 | .llvm_name = "ras", | ||
| 835 | .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions (FEAT_RAS, FEAT_RASv1p1)", | ||
| 836 | .dependencies = featureSet(&[_]Feature{}), | ||
| 837 | }; | ||
| 838 | result[@intFromEnum(Feature.rasv2)] = .{ | ||
| 839 | .llvm_name = "rasv2", | ||
| 840 | .description = "Enable ARMv8.9-A Reliability, Availability and Serviceability Extensions (FEAT_RASv2)", | ||
| 841 | .dependencies = featureSet(&[_]Feature{ | ||
| 842 | .ras, | ||
| 843 | }), | ||
| 844 | }; | ||
| 845 | result[@intFromEnum(Feature.rcpc)] = .{ | ||
| 846 | .llvm_name = "rcpc", | ||
| 847 | .description = "Enable support for RCPC extension (FEAT_LRCPC)", | ||
| 848 | .dependencies = featureSet(&[_]Feature{}), | ||
| 849 | }; | ||
| 850 | result[@intFromEnum(Feature.rcpc3)] = .{ | ||
| 851 | .llvm_name = "rcpc3", | ||
| 852 | .description = "Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set (FEAT_LRCPC3)", | ||
| 853 | .dependencies = featureSet(&[_]Feature{ | ||
| 854 | .rcpc_immo, | ||
| 855 | }), | ||
| 856 | }; | ||
| 857 | result[@intFromEnum(Feature.rcpc_immo)] = .{ | ||
| 858 | .llvm_name = "rcpc-immo", | ||
| 859 | .description = "Enable v8.4-A RCPC instructions with Immediate Offsets (FEAT_LRCPC2)", | ||
| 860 | .dependencies = featureSet(&[_]Feature{ | ||
| 861 | .rcpc, | ||
| 862 | }), | ||
| 863 | }; | ||
| 864 | result[@intFromEnum(Feature.rdm)] = .{ | ||
| 865 | .llvm_name = "rdm", | ||
| 866 | .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions (FEAT_RDM)", | ||
| 867 | .dependencies = featureSet(&[_]Feature{}), | ||
| 868 | }; | ||
| 869 | result[@intFromEnum(Feature.reserve_x1)] = .{ | ||
| 870 | .llvm_name = "reserve-x1", | ||
| 871 | .description = "Reserve X1, making it unavailable as a GPR", | ||
| 872 | .dependencies = featureSet(&[_]Feature{}), | ||
| 873 | }; | ||
| 874 | result[@intFromEnum(Feature.reserve_x10)] = .{ | ||
| 875 | .llvm_name = "reserve-x10", | ||
| 876 | .description = "Reserve X10, making it unavailable as a GPR", | ||
| 877 | .dependencies = featureSet(&[_]Feature{}), | ||
| 878 | }; | ||
| 879 | result[@intFromEnum(Feature.reserve_x11)] = .{ | ||
| 880 | .llvm_name = "reserve-x11", | ||
| 881 | .description = "Reserve X11, making it unavailable as a GPR", | ||
| 882 | .dependencies = featureSet(&[_]Feature{}), | ||
| 883 | }; | ||
| 884 | result[@intFromEnum(Feature.reserve_x12)] = .{ | ||
| 885 | .llvm_name = "reserve-x12", | ||
| 886 | .description = "Reserve X12, making it unavailable as a GPR", | ||
| 887 | .dependencies = featureSet(&[_]Feature{}), | ||
| 888 | }; | ||
| 889 | result[@intFromEnum(Feature.reserve_x13)] = .{ | ||
| 890 | .llvm_name = "reserve-x13", | ||
| 891 | .description = "Reserve X13, making it unavailable as a GPR", | ||
| 892 | .dependencies = featureSet(&[_]Feature{}), | ||
| 893 | }; | ||
| 894 | result[@intFromEnum(Feature.reserve_x14)] = .{ | ||
| 895 | .llvm_name = "reserve-x14", | ||
| 896 | .description = "Reserve X14, making it unavailable as a GPR", | ||
| 897 | .dependencies = featureSet(&[_]Feature{}), | ||
| 898 | }; | ||
| 899 | result[@intFromEnum(Feature.reserve_x15)] = .{ | ||
| 900 | .llvm_name = "reserve-x15", | ||
| 901 | .description = "Reserve X15, making it unavailable as a GPR", | ||
| 902 | .dependencies = featureSet(&[_]Feature{}), | ||
| 903 | }; | ||
| 904 | result[@intFromEnum(Feature.reserve_x18)] = .{ | ||
| 905 | .llvm_name = "reserve-x18", | ||
| 906 | .description = "Reserve X18, making it unavailable as a GPR", | ||
| 907 | .dependencies = featureSet(&[_]Feature{}), | ||
| 908 | }; | ||
| 909 | result[@intFromEnum(Feature.reserve_x2)] = .{ | ||
| 910 | .llvm_name = "reserve-x2", | ||
| 911 | .description = "Reserve X2, making it unavailable as a GPR", | ||
| 912 | .dependencies = featureSet(&[_]Feature{}), | ||
| 913 | }; | ||
| 914 | result[@intFromEnum(Feature.reserve_x20)] = .{ | ||
| 915 | .llvm_name = "reserve-x20", | ||
| 916 | .description = "Reserve X20, making it unavailable as a GPR", | ||
| 917 | .dependencies = featureSet(&[_]Feature{}), | ||
| 918 | }; | ||
| 919 | result[@intFromEnum(Feature.reserve_x21)] = .{ | ||
| 920 | .llvm_name = "reserve-x21", | ||
| 921 | .description = "Reserve X21, making it unavailable as a GPR", | ||
| 922 | .dependencies = featureSet(&[_]Feature{}), | ||
| 923 | }; | ||
| 924 | result[@intFromEnum(Feature.reserve_x22)] = .{ | ||
| 925 | .llvm_name = "reserve-x22", | ||
| 926 | .description = "Reserve X22, making it unavailable as a GPR", | ||
| 927 | .dependencies = featureSet(&[_]Feature{}), | ||
| 928 | }; | ||
| 929 | result[@intFromEnum(Feature.reserve_x23)] = .{ | ||
| 930 | .llvm_name = "reserve-x23", | ||
| 931 | .description = "Reserve X23, making it unavailable as a GPR", | ||
| 932 | .dependencies = featureSet(&[_]Feature{}), | ||
| 933 | }; | ||
| 934 | result[@intFromEnum(Feature.reserve_x24)] = .{ | ||
| 935 | .llvm_name = "reserve-x24", | ||
| 936 | .description = "Reserve X24, making it unavailable as a GPR", | ||
| 937 | .dependencies = featureSet(&[_]Feature{}), | ||
| 938 | }; | ||
| 939 | result[@intFromEnum(Feature.reserve_x25)] = .{ | ||
| 940 | .llvm_name = "reserve-x25", | ||
| 941 | .description = "Reserve X25, making it unavailable as a GPR", | ||
| 942 | .dependencies = featureSet(&[_]Feature{}), | ||
| 943 | }; | ||
| 944 | result[@intFromEnum(Feature.reserve_x26)] = .{ | ||
| 945 | .llvm_name = "reserve-x26", | ||
| 946 | .description = "Reserve X26, making it unavailable as a GPR", | ||
| 947 | .dependencies = featureSet(&[_]Feature{}), | ||
| 948 | }; | ||
| 949 | result[@intFromEnum(Feature.reserve_x27)] = .{ | ||
| 950 | .llvm_name = "reserve-x27", | ||
| 951 | .description = "Reserve X27, making it unavailable as a GPR", | ||
| 952 | .dependencies = featureSet(&[_]Feature{}), | ||
| 953 | }; | ||
| 954 | result[@intFromEnum(Feature.reserve_x28)] = .{ | ||
| 955 | .llvm_name = "reserve-x28", | ||
| 956 | .description = "Reserve X28, making it unavailable as a GPR", | ||
| 957 | .dependencies = featureSet(&[_]Feature{}), | ||
| 958 | }; | ||
| 959 | result[@intFromEnum(Feature.reserve_x3)] = .{ | ||
| 960 | .llvm_name = "reserve-x3", | ||
| 961 | .description = "Reserve X3, making it unavailable as a GPR", | ||
| 962 | .dependencies = featureSet(&[_]Feature{}), | ||
| 963 | }; | ||
| 964 | result[@intFromEnum(Feature.reserve_x30)] = .{ | ||
| 965 | .llvm_name = "reserve-x30", | ||
| 966 | .description = "Reserve X30, making it unavailable as a GPR", | ||
| 967 | .dependencies = featureSet(&[_]Feature{}), | ||
| 968 | }; | ||
| 969 | result[@intFromEnum(Feature.reserve_x4)] = .{ | ||
| 970 | .llvm_name = "reserve-x4", | ||
| 971 | .description = "Reserve X4, making it unavailable as a GPR", | ||
| 972 | .dependencies = featureSet(&[_]Feature{}), | ||
| 973 | }; | ||
| 974 | result[@intFromEnum(Feature.reserve_x5)] = .{ | ||
| 975 | .llvm_name = "reserve-x5", | ||
| 976 | .description = "Reserve X5, making it unavailable as a GPR", | ||
| 977 | .dependencies = featureSet(&[_]Feature{}), | ||
| 978 | }; | ||
| 979 | result[@intFromEnum(Feature.reserve_x6)] = .{ | ||
| 980 | .llvm_name = "reserve-x6", | ||
| 981 | .description = "Reserve X6, making it unavailable as a GPR", | ||
| 982 | .dependencies = featureSet(&[_]Feature{}), | ||
| 983 | }; | ||
| 984 | result[@intFromEnum(Feature.reserve_x7)] = .{ | ||
| 985 | .llvm_name = "reserve-x7", | ||
| 986 | .description = "Reserve X7, making it unavailable as a GPR", | ||
| 987 | .dependencies = featureSet(&[_]Feature{}), | ||
| 988 | }; | ||
| 989 | result[@intFromEnum(Feature.reserve_x9)] = .{ | ||
| 990 | .llvm_name = "reserve-x9", | ||
| 991 | .description = "Reserve X9, making it unavailable as a GPR", | ||
| 992 | .dependencies = featureSet(&[_]Feature{}), | ||
| 993 | }; | ||
| 994 | result[@intFromEnum(Feature.rme)] = .{ | ||
| 995 | .llvm_name = "rme", | ||
| 996 | .description = "Enable Realm Management Extension (FEAT_RME)", | ||
| 997 | .dependencies = featureSet(&[_]Feature{}), | ||
| 998 | }; | ||
| 999 | result[@intFromEnum(Feature.sb)] = .{ | ||
| 1000 | .llvm_name = "sb", | ||
| 1001 | .description = "Enable v8.5 Speculation Barrier (FEAT_SB)", | ||
| 1002 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1003 | }; | ||
| 1004 | result[@intFromEnum(Feature.sel2)] = .{ | ||
| 1005 | .llvm_name = "sel2", | ||
| 1006 | .description = "Enable v8.4-A Secure Exception Level 2 extension (FEAT_SEL2)", | ||
| 1007 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1008 | }; | ||
| 1009 | result[@intFromEnum(Feature.sha2)] = .{ | ||
| 1010 | .llvm_name = "sha2", | ||
| 1011 | .description = "Enable SHA1 and SHA256 support (FEAT_SHA1, FEAT_SHA256)", | ||
| 1012 | .dependencies = featureSet(&[_]Feature{ | ||
| 1013 | .neon, | ||
| 1014 | }), | ||
| 1015 | }; | ||
| 1016 | result[@intFromEnum(Feature.sha3)] = .{ | ||
| 1017 | .llvm_name = "sha3", | ||
| 1018 | .description = "Enable SHA512 and SHA3 support (FEAT_SHA3, FEAT_SHA512)", | ||
| 1019 | .dependencies = featureSet(&[_]Feature{ | ||
| 1020 | .sha2, | ||
| 1021 | }), | ||
| 1022 | }; | ||
| 1023 | result[@intFromEnum(Feature.slow_misaligned_128store)] = .{ | ||
| 1024 | .llvm_name = "slow-misaligned-128store", | ||
| 1025 | .description = "Misaligned 128 bit stores are slow", | ||
| 1026 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1027 | }; | ||
| 1028 | result[@intFromEnum(Feature.slow_paired_128)] = .{ | ||
| 1029 | .llvm_name = "slow-paired-128", | ||
| 1030 | .description = "Paired 128 bit loads and stores are slow", | ||
| 1031 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1032 | }; | ||
| 1033 | result[@intFromEnum(Feature.slow_strqro_store)] = .{ | ||
| 1034 | .llvm_name = "slow-strqro-store", | ||
| 1035 | .description = "STR of Q register with register offset is slow", | ||
| 1036 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1037 | }; | ||
| 1038 | result[@intFromEnum(Feature.sm4)] = .{ | ||
| 1039 | .llvm_name = "sm4", | ||
| 1040 | .description = "Enable SM3 and SM4 support (FEAT_SM4, FEAT_SM3)", | ||
| 1041 | .dependencies = featureSet(&[_]Feature{ | ||
| 1042 | .neon, | ||
| 1043 | }), | ||
| 1044 | }; | ||
| 1045 | result[@intFromEnum(Feature.sme)] = .{ | ||
| 1046 | .llvm_name = "sme", | ||
| 1047 | .description = "Enable Scalable Matrix Extension (SME) (FEAT_SME)", | ||
| 1048 | .dependencies = featureSet(&[_]Feature{ | ||
| 1049 | .bf16, | ||
| 1050 | .use_scalar_inc_vl, | ||
| 1051 | }), | ||
| 1052 | }; | ||
| 1053 | result[@intFromEnum(Feature.sme2)] = .{ | ||
| 1054 | .llvm_name = "sme2", | ||
| 1055 | .description = "Enable Scalable Matrix Extension 2 (SME2) instructions", | ||
| 1056 | .dependencies = featureSet(&[_]Feature{ | ||
| 1057 | .sme, | ||
| 1058 | }), | ||
| 1059 | }; | ||
| 1060 | result[@intFromEnum(Feature.sme2p1)] = .{ | ||
| 1061 | .llvm_name = "sme2p1", | ||
| 1062 | .description = "Enable Scalable Matrix Extension 2.1 (FEAT_SME2p1) instructions", | ||
| 1063 | .dependencies = featureSet(&[_]Feature{ | ||
| 1064 | .sme2, | ||
| 1065 | }), | ||
| 1066 | }; | ||
| 1067 | result[@intFromEnum(Feature.sme_f16f16)] = .{ | ||
| 1068 | .llvm_name = "sme-f16f16", | ||
| 1069 | .description = "Enable SME2.1 non-widening Float16 instructions (FEAT_SME_F16F16)", | ||
| 1070 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1071 | }; | ||
| 1072 | result[@intFromEnum(Feature.sme_f64f64)] = .{ | ||
| 1073 | .llvm_name = "sme-f64f64", | ||
| 1074 | .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions (FEAT_SME_F64F64)", | ||
| 1075 | .dependencies = featureSet(&[_]Feature{ | ||
| 1076 | .sme, | ||
| 1077 | }), | ||
| 1078 | }; | ||
| 1079 | result[@intFromEnum(Feature.sme_i16i64)] = .{ | ||
| 1080 | .llvm_name = "sme-i16i64", | ||
| 1081 | .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions (FEAT_SME_I16I64)", | ||
| 1082 | .dependencies = featureSet(&[_]Feature{ | ||
| 1083 | .sme, | ||
| 1084 | }), | ||
| 1085 | }; | ||
| 1086 | result[@intFromEnum(Feature.spe)] = .{ | ||
| 1087 | .llvm_name = "spe", | ||
| 1088 | .description = "Enable Statistical Profiling extension (FEAT_SPE)", | ||
| 1089 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1090 | }; | ||
| 1091 | result[@intFromEnum(Feature.spe_eef)] = .{ | ||
| 1092 | .llvm_name = "spe-eef", | ||
| 1093 | .description = "Enable extra register in the Statistical Profiling Extension (FEAT_SPEv1p2)", | ||
| 1094 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1095 | }; | ||
| 1096 | result[@intFromEnum(Feature.specres2)] = .{ | ||
| 1097 | .llvm_name = "specres2", | ||
| 1098 | .description = "Enable Speculation Restriction Instruction (FEAT_SPECRES2)", | ||
| 1099 | .dependencies = featureSet(&[_]Feature{ | ||
| 1100 | .predres, | ||
| 1101 | }), | ||
| 1102 | }; | ||
| 1103 | result[@intFromEnum(Feature.specrestrict)] = .{ | ||
| 1104 | .llvm_name = "specrestrict", | ||
| 1105 | .description = "Enable architectural speculation restriction (FEAT_CSV2_2)", | ||
| 1106 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1107 | }; | ||
| 1108 | result[@intFromEnum(Feature.ssbs)] = .{ | ||
| 1109 | .llvm_name = "ssbs", | ||
| 1110 | .description = "Enable Speculative Store Bypass Safe bit (FEAT_SSBS, FEAT_SSBS2)", | ||
| 1111 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1112 | }; | ||
| 1113 | result[@intFromEnum(Feature.strict_align)] = .{ | ||
| 1114 | .llvm_name = "strict-align", | ||
| 1115 | .description = "Disallow all unaligned memory access", | ||
| 1116 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1117 | }; | ||
| 1118 | result[@intFromEnum(Feature.sve)] = .{ | ||
| 1119 | .llvm_name = "sve", | ||
| 1120 | .description = "Enable Scalable Vector Extension (SVE) instructions (FEAT_SVE)", | ||
| 1121 | .dependencies = featureSet(&[_]Feature{ | ||
| 1122 | .fullfp16, | ||
| 1123 | }), | ||
| 1124 | }; | ||
| 1125 | result[@intFromEnum(Feature.sve2)] = .{ | ||
| 1126 | .llvm_name = "sve2", | ||
| 1127 | .description = "Enable Scalable Vector Extension 2 (SVE2) instructions (FEAT_SVE2)", | ||
| 1128 | .dependencies = featureSet(&[_]Feature{ | ||
| 1129 | .sve, | ||
| 1130 | .use_scalar_inc_vl, | ||
| 1131 | }), | ||
| 1132 | }; | ||
| 1133 | result[@intFromEnum(Feature.sve2_aes)] = .{ | ||
| 1134 | .llvm_name = "sve2-aes", | ||
| 1135 | .description = "Enable AES SVE2 instructions (FEAT_SVE_AES, FEAT_SVE_PMULL128)", | ||
| 1136 | .dependencies = featureSet(&[_]Feature{ | ||
| 1137 | .aes, | ||
| 1138 | .sve2, | ||
| 1139 | }), | ||
| 1140 | }; | ||
| 1141 | result[@intFromEnum(Feature.sve2_bitperm)] = .{ | ||
| 1142 | .llvm_name = "sve2-bitperm", | ||
| 1143 | .description = "Enable bit permutation SVE2 instructions (FEAT_SVE_BitPerm)", | ||
| 1144 | .dependencies = featureSet(&[_]Feature{ | ||
| 1145 | .sve2, | ||
| 1146 | }), | ||
| 1147 | }; | ||
| 1148 | result[@intFromEnum(Feature.sve2_sha3)] = .{ | ||
| 1149 | .llvm_name = "sve2-sha3", | ||
| 1150 | .description = "Enable SHA3 SVE2 instructions (FEAT_SVE_SHA3)", | ||
| 1151 | .dependencies = featureSet(&[_]Feature{ | ||
| 1152 | .sha3, | ||
| 1153 | .sve2, | ||
| 1154 | }), | ||
| 1155 | }; | ||
| 1156 | result[@intFromEnum(Feature.sve2_sm4)] = .{ | ||
| 1157 | .llvm_name = "sve2-sm4", | ||
| 1158 | .description = "Enable SM4 SVE2 instructions (FEAT_SVE_SM4)", | ||
| 1159 | .dependencies = featureSet(&[_]Feature{ | ||
| 1160 | .sm4, | ||
| 1161 | .sve2, | ||
| 1162 | }), | ||
| 1163 | }; | ||
| 1164 | result[@intFromEnum(Feature.sve2p1)] = .{ | ||
| 1165 | .llvm_name = "sve2p1", | ||
| 1166 | .description = "Enable Scalable Vector Extension 2.1 instructions", | ||
| 1167 | .dependencies = featureSet(&[_]Feature{ | ||
| 1168 | .sve2, | ||
| 1169 | }), | ||
| 1170 | }; | ||
| 1171 | result[@intFromEnum(Feature.tagged_globals)] = .{ | ||
| 1172 | .llvm_name = "tagged-globals", | ||
| 1173 | .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", | ||
| 1174 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1175 | }; | ||
| 1176 | result[@intFromEnum(Feature.the)] = .{ | ||
| 1177 | .llvm_name = "the", | ||
| 1178 | .description = "Enable Armv8.9-A Translation Hardening Extension (FEAT_THE)", | ||
| 1179 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1180 | }; | ||
| 1181 | result[@intFromEnum(Feature.tlb_rmi)] = .{ | ||
| 1182 | .llvm_name = "tlb-rmi", | ||
| 1183 | .description = "Enable v8.4-A TLB Range and Maintenance Instructions (FEAT_TLBIOS, FEAT_TLBIRANGE)", | ||
| 1184 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1185 | }; | ||
| 1186 | result[@intFromEnum(Feature.tme)] = .{ | ||
| 1187 | .llvm_name = "tme", | ||
| 1188 | .description = "Enable Transactional Memory Extension (FEAT_TME)", | ||
| 1189 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1190 | }; | ||
| 1191 | result[@intFromEnum(Feature.tpidr_el1)] = .{ | ||
| 1192 | .llvm_name = "tpidr-el1", | ||
| 1193 | .description = "Permit use of TPIDR_EL1 for the TLS base", | ||
| 1194 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1195 | }; | ||
| 1196 | result[@intFromEnum(Feature.tpidr_el2)] = .{ | ||
| 1197 | .llvm_name = "tpidr-el2", | ||
| 1198 | .description = "Permit use of TPIDR_EL2 for the TLS base", | ||
| 1199 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1200 | }; | ||
| 1201 | result[@intFromEnum(Feature.tpidr_el3)] = .{ | ||
| 1202 | .llvm_name = "tpidr-el3", | ||
| 1203 | .description = "Permit use of TPIDR_EL3 for the TLS base", | ||
| 1204 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1205 | }; | ||
| 1206 | result[@intFromEnum(Feature.tpidrro_el0)] = .{ | ||
| 1207 | .llvm_name = "tpidrro-el0", | ||
| 1208 | .description = "Permit use of TPIDRRO_EL0 for the TLS base", | ||
| 1209 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1210 | }; | ||
| 1211 | result[@intFromEnum(Feature.tracev8_4)] = .{ | ||
| 1212 | .llvm_name = "tracev8.4", | ||
| 1213 | .description = "Enable v8.4-A Trace extension (FEAT_TRF)", | ||
| 1214 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1215 | }; | ||
| 1216 | result[@intFromEnum(Feature.trbe)] = .{ | ||
| 1217 | .llvm_name = "trbe", | ||
| 1218 | .description = "Enable Trace Buffer Extension (FEAT_TRBE)", | ||
| 1219 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1220 | }; | ||
| 1221 | result[@intFromEnum(Feature.uaops)] = .{ | ||
| 1222 | .llvm_name = "uaops", | ||
| 1223 | .description = "Enable v8.2 UAO PState (FEAT_UAO)", | ||
| 1224 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1225 | }; | ||
| 1226 | result[@intFromEnum(Feature.use_experimental_zeroing_pseudos)] = .{ | ||
| 1227 | .llvm_name = "use-experimental-zeroing-pseudos", | ||
| 1228 | .description = "Hint to the compiler that the MOVPRFX instruction is merged with destructive operations", | ||
| 1229 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1230 | }; | ||
| 1231 | result[@intFromEnum(Feature.use_postra_scheduler)] = .{ | ||
| 1232 | .llvm_name = "use-postra-scheduler", | ||
| 1233 | .description = "Schedule again after register allocation", | ||
| 1234 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1235 | }; | ||
| 1236 | result[@intFromEnum(Feature.use_reciprocal_square_root)] = .{ | ||
| 1237 | .llvm_name = "use-reciprocal-square-root", | ||
| 1238 | .description = "Use the reciprocal square root approximation", | ||
| 1239 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1240 | }; | ||
| 1241 | result[@intFromEnum(Feature.use_scalar_inc_vl)] = .{ | ||
| 1242 | .llvm_name = "use-scalar-inc-vl", | ||
| 1243 | .description = "Prefer inc/dec over add+cnt", | ||
| 1244 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1245 | }; | ||
| 1246 | result[@intFromEnum(Feature.v8_1a)] = .{ | ||
| 1247 | .llvm_name = "v8.1a", | ||
| 1248 | .description = "Support ARM v8.1a instructions", | ||
| 1249 | .dependencies = featureSet(&[_]Feature{ | ||
| 1250 | .crc, | ||
| 1251 | .lor, | ||
| 1252 | .lse, | ||
| 1253 | .pan, | ||
| 1254 | .rdm, | ||
| 1255 | .v8a, | ||
| 1256 | .vh, | ||
| 1257 | }), | ||
| 1258 | }; | ||
| 1259 | result[@intFromEnum(Feature.v8_2a)] = .{ | ||
| 1260 | .llvm_name = "v8.2a", | ||
| 1261 | .description = "Support ARM v8.2a instructions", | ||
| 1262 | .dependencies = featureSet(&[_]Feature{ | ||
| 1263 | .ccpp, | ||
| 1264 | .pan_rwv, | ||
| 1265 | .ras, | ||
| 1266 | .uaops, | ||
| 1267 | .v8_1a, | ||
| 1268 | }), | ||
| 1269 | }; | ||
| 1270 | result[@intFromEnum(Feature.v8_3a)] = .{ | ||
| 1271 | .llvm_name = "v8.3a", | ||
| 1272 | .description = "Support ARM v8.3a instructions", | ||
| 1273 | .dependencies = featureSet(&[_]Feature{ | ||
| 1274 | .ccidx, | ||
| 1275 | .complxnum, | ||
| 1276 | .jsconv, | ||
| 1277 | .pauth, | ||
| 1278 | .rcpc, | ||
| 1279 | .v8_2a, | ||
| 1280 | }), | ||
| 1281 | }; | ||
| 1282 | result[@intFromEnum(Feature.v8_4a)] = .{ | ||
| 1283 | .llvm_name = "v8.4a", | ||
| 1284 | .description = "Support ARM v8.4a instructions", | ||
| 1285 | .dependencies = featureSet(&[_]Feature{ | ||
| 1286 | .am, | ||
| 1287 | .dit, | ||
| 1288 | .dotprod, | ||
| 1289 | .flagm, | ||
| 1290 | .lse2, | ||
| 1291 | .mpam, | ||
| 1292 | .nv, | ||
| 1293 | .rcpc_immo, | ||
| 1294 | .sel2, | ||
| 1295 | .tlb_rmi, | ||
| 1296 | .tracev8_4, | ||
| 1297 | .v8_3a, | ||
| 1298 | }), | ||
| 1299 | }; | ||
| 1300 | result[@intFromEnum(Feature.v8_5a)] = .{ | ||
| 1301 | .llvm_name = "v8.5a", | ||
| 1302 | .description = "Support ARM v8.5a instructions", | ||
| 1303 | .dependencies = featureSet(&[_]Feature{ | ||
| 1304 | .altnzcv, | ||
| 1305 | .bti, | ||
| 1306 | .ccdp, | ||
| 1307 | .fptoint, | ||
| 1308 | .predres, | ||
| 1309 | .sb, | ||
| 1310 | .specrestrict, | ||
| 1311 | .ssbs, | ||
| 1312 | .v8_4a, | ||
| 1313 | }), | ||
| 1314 | }; | ||
| 1315 | result[@intFromEnum(Feature.v8_6a)] = .{ | ||
| 1316 | .llvm_name = "v8.6a", | ||
| 1317 | .description = "Support ARM v8.6a instructions", | ||
| 1318 | .dependencies = featureSet(&[_]Feature{ | ||
| 1319 | .amvs, | ||
| 1320 | .bf16, | ||
| 1321 | .ecv, | ||
| 1322 | .fgt, | ||
| 1323 | .i8mm, | ||
| 1324 | .v8_5a, | ||
| 1325 | }), | ||
| 1326 | }; | ||
| 1327 | result[@intFromEnum(Feature.v8_7a)] = .{ | ||
| 1328 | .llvm_name = "v8.7a", | ||
| 1329 | .description = "Support ARM v8.7a instructions", | ||
| 1330 | .dependencies = featureSet(&[_]Feature{ | ||
| 1331 | .hcx, | ||
| 1332 | .v8_6a, | ||
| 1333 | .wfxt, | ||
| 1334 | .xs, | ||
| 1335 | }), | ||
| 1336 | }; | ||
| 1337 | result[@intFromEnum(Feature.v8_8a)] = .{ | ||
| 1338 | .llvm_name = "v8.8a", | ||
| 1339 | .description = "Support ARM v8.8a instructions", | ||
| 1340 | .dependencies = featureSet(&[_]Feature{ | ||
| 1341 | .hbc, | ||
| 1342 | .mops, | ||
| 1343 | .nmi, | ||
| 1344 | .v8_7a, | ||
| 1345 | }), | ||
| 1346 | }; | ||
| 1347 | result[@intFromEnum(Feature.v8_9a)] = .{ | ||
| 1348 | .llvm_name = "v8.9a", | ||
| 1349 | .description = "Support ARM v8.9a instructions", | ||
| 1350 | .dependencies = featureSet(&[_]Feature{ | ||
| 1351 | .chk, | ||
| 1352 | .clrbhb, | ||
| 1353 | .cssc, | ||
| 1354 | .prfm_slc_target, | ||
| 1355 | .rasv2, | ||
| 1356 | .specres2, | ||
| 1357 | .v8_8a, | ||
| 1358 | }), | ||
| 1359 | }; | ||
| 1360 | result[@intFromEnum(Feature.v8a)] = .{ | ||
| 1361 | .llvm_name = "v8a", | ||
| 1362 | .description = "Support ARM v8.0a instructions", | ||
| 1363 | .dependencies = featureSet(&[_]Feature{ | ||
| 1364 | .el2vmsa, | ||
| 1365 | .el3, | ||
| 1366 | .neon, | ||
| 1367 | }), | ||
| 1368 | }; | ||
| 1369 | result[@intFromEnum(Feature.v8r)] = .{ | ||
| 1370 | .llvm_name = "v8r", | ||
| 1371 | .description = "Support ARM v8r instructions", | ||
| 1372 | .dependencies = featureSet(&[_]Feature{ | ||
| 1373 | .ccidx, | ||
| 1374 | .ccpp, | ||
| 1375 | .complxnum, | ||
| 1376 | .contextidr_el2, | ||
| 1377 | .crc, | ||
| 1378 | .dit, | ||
| 1379 | .dotprod, | ||
| 1380 | .flagm, | ||
| 1381 | .jsconv, | ||
| 1382 | .lse, | ||
| 1383 | .pan_rwv, | ||
| 1384 | .pauth, | ||
| 1385 | .ras, | ||
| 1386 | .rcpc_immo, | ||
| 1387 | .rdm, | ||
| 1388 | .sel2, | ||
| 1389 | .specrestrict, | ||
| 1390 | .tlb_rmi, | ||
| 1391 | .tracev8_4, | ||
| 1392 | .uaops, | ||
| 1393 | }), | ||
| 1394 | }; | ||
| 1395 | result[@intFromEnum(Feature.v9_1a)] = .{ | ||
| 1396 | .llvm_name = "v9.1a", | ||
| 1397 | .description = "Support ARM v9.1a instructions", | ||
| 1398 | .dependencies = featureSet(&[_]Feature{ | ||
| 1399 | .v8_6a, | ||
| 1400 | .v9a, | ||
| 1401 | }), | ||
| 1402 | }; | ||
| 1403 | result[@intFromEnum(Feature.v9_2a)] = .{ | ||
| 1404 | .llvm_name = "v9.2a", | ||
| 1405 | .description = "Support ARM v9.2a instructions", | ||
| 1406 | .dependencies = featureSet(&[_]Feature{ | ||
| 1407 | .v8_7a, | ||
| 1408 | .v9_1a, | ||
| 1409 | }), | ||
| 1410 | }; | ||
| 1411 | result[@intFromEnum(Feature.v9_3a)] = .{ | ||
| 1412 | .llvm_name = "v9.3a", | ||
| 1413 | .description = "Support ARM v9.3a instructions", | ||
| 1414 | .dependencies = featureSet(&[_]Feature{ | ||
| 1415 | .v8_8a, | ||
| 1416 | .v9_2a, | ||
| 1417 | }), | ||
| 1418 | }; | ||
| 1419 | result[@intFromEnum(Feature.v9_4a)] = .{ | ||
| 1420 | .llvm_name = "v9.4a", | ||
| 1421 | .description = "Support ARM v9.4a instructions", | ||
| 1422 | .dependencies = featureSet(&[_]Feature{ | ||
| 1423 | .v8_9a, | ||
| 1424 | .v9_3a, | ||
| 1425 | }), | ||
| 1426 | }; | ||
| 1427 | result[@intFromEnum(Feature.v9a)] = .{ | ||
| 1428 | .llvm_name = "v9a", | ||
| 1429 | .description = "Support ARM v9a instructions", | ||
| 1430 | .dependencies = featureSet(&[_]Feature{ | ||
| 1431 | .mec, | ||
| 1432 | .sve2, | ||
| 1433 | .v8_5a, | ||
| 1434 | }), | ||
| 1435 | }; | ||
| 1436 | result[@intFromEnum(Feature.vh)] = .{ | ||
| 1437 | .llvm_name = "vh", | ||
| 1438 | .description = "Enables ARM v8.1 Virtual Host extension (FEAT_VHE)", | ||
| 1439 | .dependencies = featureSet(&[_]Feature{ | ||
| 1440 | .contextidr_el2, | ||
| 1441 | }), | ||
| 1442 | }; | ||
| 1443 | result[@intFromEnum(Feature.wfxt)] = .{ | ||
| 1444 | .llvm_name = "wfxt", | ||
| 1445 | .description = "Enable Armv8.7-A WFET and WFIT instruction (FEAT_WFxT)", | ||
| 1446 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1447 | }; | ||
| 1448 | result[@intFromEnum(Feature.xs)] = .{ | ||
| 1449 | .llvm_name = "xs", | ||
| 1450 | .description = "Enable Armv8.7-A limited-TLB-maintenance instruction (FEAT_XS)", | ||
| 1451 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1452 | }; | ||
| 1453 | result[@intFromEnum(Feature.zcm)] = .{ | ||
| 1454 | .llvm_name = "zcm", | ||
| 1455 | .description = "Has zero-cycle register moves", | ||
| 1456 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1457 | }; | ||
| 1458 | result[@intFromEnum(Feature.zcz)] = .{ | ||
| 1459 | .llvm_name = "zcz", | ||
| 1460 | .description = "Has zero-cycle zeroing instructions", | ||
| 1461 | .dependencies = featureSet(&[_]Feature{ | ||
| 1462 | .zcz_gp, | ||
| 1463 | }), | ||
| 1464 | }; | ||
| 1465 | result[@intFromEnum(Feature.zcz_fp_workaround)] = .{ | ||
| 1466 | .llvm_name = "zcz-fp-workaround", | ||
| 1467 | .description = "The zero-cycle floating-point zeroing instruction has a bug", | ||
| 1468 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1469 | }; | ||
| 1470 | result[@intFromEnum(Feature.zcz_gp)] = .{ | ||
| 1471 | .llvm_name = "zcz-gp", | ||
| 1472 | .description = "Has zero-cycle zeroing instructions for generic registers", | ||
| 1473 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1474 | }; | ||
| 1475 | const ti = @typeInfo(Feature); | ||
| 1476 | for (&result, 0..) |*elem, i| { | ||
| 1477 | elem.index = i; | ||
| 1478 | elem.name = ti.Enum.fields[i].name; | ||
| 1479 | } | ||
| 1480 | break :blk result; | ||
| 1481 | }; | ||
| 1482 | |||
| 1483 | pub const cpu = struct { | ||
| 1484 | pub const a64fx = CpuModel{ | ||
| 1485 | .name = "a64fx", | ||
| 1486 | .llvm_name = "a64fx", | ||
| 1487 | .features = featureSet(&[_]Feature{ | ||
| 1488 | .aggressive_fma, | ||
| 1489 | .arith_bcc_fusion, | ||
| 1490 | .complxnum, | ||
| 1491 | .perfmon, | ||
| 1492 | .predictable_select_expensive, | ||
| 1493 | .sha2, | ||
| 1494 | .sve, | ||
| 1495 | .use_postra_scheduler, | ||
| 1496 | .v8_2a, | ||
| 1497 | }), | ||
| 1498 | }; | ||
| 1499 | pub const ampere1 = CpuModel{ | ||
| 1500 | .name = "ampere1", | ||
| 1501 | .llvm_name = "ampere1", | ||
| 1502 | .features = featureSet(&[_]Feature{ | ||
| 1503 | .aes, | ||
| 1504 | .aggressive_fma, | ||
| 1505 | .arith_bcc_fusion, | ||
| 1506 | .cmp_bcc_fusion, | ||
| 1507 | .fuse_address, | ||
| 1508 | .fuse_aes, | ||
| 1509 | .fuse_literals, | ||
| 1510 | .lsl_fast, | ||
| 1511 | .perfmon, | ||
| 1512 | .rand, | ||
| 1513 | .sha3, | ||
| 1514 | .use_postra_scheduler, | ||
| 1515 | .v8_6a, | ||
| 1516 | }), | ||
| 1517 | }; | ||
| 1518 | pub const ampere1a = CpuModel{ | ||
| 1519 | .name = "ampere1a", | ||
| 1520 | .llvm_name = "ampere1a", | ||
| 1521 | .features = featureSet(&[_]Feature{ | ||
| 1522 | .aes, | ||
| 1523 | .aggressive_fma, | ||
| 1524 | .arith_bcc_fusion, | ||
| 1525 | .cmp_bcc_fusion, | ||
| 1526 | .fuse_address, | ||
| 1527 | .fuse_aes, | ||
| 1528 | .fuse_literals, | ||
| 1529 | .lsl_fast, | ||
| 1530 | .mte, | ||
| 1531 | .perfmon, | ||
| 1532 | .rand, | ||
| 1533 | .sha3, | ||
| 1534 | .sm4, | ||
| 1535 | .use_postra_scheduler, | ||
| 1536 | .v8_6a, | ||
| 1537 | }), | ||
| 1538 | }; | ||
| 1539 | pub const apple_a10 = CpuModel{ | ||
| 1540 | .name = "apple_a10", | ||
| 1541 | .llvm_name = "apple-a10", | ||
| 1542 | .features = featureSet(&[_]Feature{ | ||
| 1543 | .alternate_sextload_cvt_f32_pattern, | ||
| 1544 | .arith_bcc_fusion, | ||
| 1545 | .arith_cbz_fusion, | ||
| 1546 | .crc, | ||
| 1547 | .crypto, | ||
| 1548 | .disable_latency_sched_heuristic, | ||
| 1549 | .fuse_aes, | ||
| 1550 | .fuse_crypto_eor, | ||
| 1551 | .lor, | ||
| 1552 | .pan, | ||
| 1553 | .perfmon, | ||
| 1554 | .rdm, | ||
| 1555 | .v8a, | ||
| 1556 | .vh, | ||
| 1557 | .zcm, | ||
| 1558 | .zcz, | ||
| 1559 | }), | ||
| 1560 | }; | ||
| 1561 | pub const apple_a11 = CpuModel{ | ||
| 1562 | .name = "apple_a11", | ||
| 1563 | .llvm_name = "apple-a11", | ||
| 1564 | .features = featureSet(&[_]Feature{ | ||
| 1565 | .alternate_sextload_cvt_f32_pattern, | ||
| 1566 | .arith_bcc_fusion, | ||
| 1567 | .arith_cbz_fusion, | ||
| 1568 | .crypto, | ||
| 1569 | .disable_latency_sched_heuristic, | ||
| 1570 | .fullfp16, | ||
| 1571 | .fuse_aes, | ||
| 1572 | .fuse_crypto_eor, | ||
| 1573 | .perfmon, | ||
| 1574 | .v8_2a, | ||
| 1575 | .zcm, | ||
| 1576 | .zcz, | ||
| 1577 | }), | ||
| 1578 | }; | ||
| 1579 | pub const apple_a12 = CpuModel{ | ||
| 1580 | .name = "apple_a12", | ||
| 1581 | .llvm_name = "apple-a12", | ||
| 1582 | .features = featureSet(&[_]Feature{ | ||
| 1583 | .alternate_sextload_cvt_f32_pattern, | ||
| 1584 | .arith_bcc_fusion, | ||
| 1585 | .arith_cbz_fusion, | ||
| 1586 | .crypto, | ||
| 1587 | .disable_latency_sched_heuristic, | ||
| 1588 | .fullfp16, | ||
| 1589 | .fuse_aes, | ||
| 1590 | .fuse_crypto_eor, | ||
| 1591 | .perfmon, | ||
| 1592 | .v8_3a, | ||
| 1593 | .zcm, | ||
| 1594 | .zcz, | ||
| 1595 | }), | ||
| 1596 | }; | ||
| 1597 | pub const apple_a13 = CpuModel{ | ||
| 1598 | .name = "apple_a13", | ||
| 1599 | .llvm_name = "apple-a13", | ||
| 1600 | .features = featureSet(&[_]Feature{ | ||
| 1601 | .alternate_sextload_cvt_f32_pattern, | ||
| 1602 | .arith_bcc_fusion, | ||
| 1603 | .arith_cbz_fusion, | ||
| 1604 | .crypto, | ||
| 1605 | .disable_latency_sched_heuristic, | ||
| 1606 | .fp16fml, | ||
| 1607 | .fuse_aes, | ||
| 1608 | .fuse_crypto_eor, | ||
| 1609 | .perfmon, | ||
| 1610 | .sha3, | ||
| 1611 | .v8_4a, | ||
| 1612 | .zcm, | ||
| 1613 | .zcz, | ||
| 1614 | }), | ||
| 1615 | }; | ||
| 1616 | pub const apple_a14 = CpuModel{ | ||
| 1617 | .name = "apple_a14", | ||
| 1618 | .llvm_name = "apple-a14", | ||
| 1619 | .features = featureSet(&[_]Feature{ | ||
| 1620 | .aggressive_fma, | ||
| 1621 | .alternate_sextload_cvt_f32_pattern, | ||
| 1622 | .altnzcv, | ||
| 1623 | .arith_bcc_fusion, | ||
| 1624 | .arith_cbz_fusion, | ||
| 1625 | .ccdp, | ||
| 1626 | .crypto, | ||
| 1627 | .disable_latency_sched_heuristic, | ||
| 1628 | .fp16fml, | ||
| 1629 | .fptoint, | ||
| 1630 | .fuse_address, | ||
| 1631 | .fuse_adrp_add, | ||
| 1632 | .fuse_aes, | ||
| 1633 | .fuse_arith_logic, | ||
| 1634 | .fuse_crypto_eor, | ||
| 1635 | .fuse_csel, | ||
| 1636 | .fuse_literals, | ||
| 1637 | .perfmon, | ||
| 1638 | .predres, | ||
| 1639 | .sb, | ||
| 1640 | .sha3, | ||
| 1641 | .specrestrict, | ||
| 1642 | .ssbs, | ||
| 1643 | .v8_4a, | ||
| 1644 | .zcm, | ||
| 1645 | .zcz, | ||
| 1646 | }), | ||
| 1647 | }; | ||
| 1648 | pub const apple_a15 = CpuModel{ | ||
| 1649 | .name = "apple_a15", | ||
| 1650 | .llvm_name = "apple-a15", | ||
| 1651 | .features = featureSet(&[_]Feature{ | ||
| 1652 | .alternate_sextload_cvt_f32_pattern, | ||
| 1653 | .arith_bcc_fusion, | ||
| 1654 | .arith_cbz_fusion, | ||
| 1655 | .crypto, | ||
| 1656 | .disable_latency_sched_heuristic, | ||
| 1657 | .fp16fml, | ||
| 1658 | .fuse_address, | ||
| 1659 | .fuse_aes, | ||
| 1660 | .fuse_arith_logic, | ||
| 1661 | .fuse_crypto_eor, | ||
| 1662 | .fuse_csel, | ||
| 1663 | .fuse_literals, | ||
| 1664 | .perfmon, | ||
| 1665 | .sha3, | ||
| 1666 | .v8_6a, | ||
| 1667 | .zcm, | ||
| 1668 | .zcz, | ||
| 1669 | }), | ||
| 1670 | }; | ||
| 1671 | pub const apple_a16 = CpuModel{ | ||
| 1672 | .name = "apple_a16", | ||
| 1673 | .llvm_name = "apple-a16", | ||
| 1674 | .features = featureSet(&[_]Feature{ | ||
| 1675 | .alternate_sextload_cvt_f32_pattern, | ||
| 1676 | .arith_bcc_fusion, | ||
| 1677 | .arith_cbz_fusion, | ||
| 1678 | .crypto, | ||
| 1679 | .disable_latency_sched_heuristic, | ||
| 1680 | .fp16fml, | ||
| 1681 | .fuse_address, | ||
| 1682 | .fuse_aes, | ||
| 1683 | .fuse_arith_logic, | ||
| 1684 | .fuse_crypto_eor, | ||
| 1685 | .fuse_csel, | ||
| 1686 | .fuse_literals, | ||
| 1687 | .hcx, | ||
| 1688 | .perfmon, | ||
| 1689 | .sha3, | ||
| 1690 | .v8_6a, | ||
| 1691 | .zcm, | ||
| 1692 | .zcz, | ||
| 1693 | }), | ||
| 1694 | }; | ||
| 1695 | pub const apple_a7 = CpuModel{ | ||
| 1696 | .name = "apple_a7", | ||
| 1697 | .llvm_name = "apple-a7", | ||
| 1698 | .features = featureSet(&[_]Feature{ | ||
| 1699 | .alternate_sextload_cvt_f32_pattern, | ||
| 1700 | .arith_bcc_fusion, | ||
| 1701 | .arith_cbz_fusion, | ||
| 1702 | .crypto, | ||
| 1703 | .disable_latency_sched_heuristic, | ||
| 1704 | .fuse_aes, | ||
| 1705 | .fuse_crypto_eor, | ||
| 1706 | .perfmon, | ||
| 1707 | .v8a, | ||
| 1708 | .zcm, | ||
| 1709 | .zcz, | ||
| 1710 | .zcz_fp_workaround, | ||
| 1711 | }), | ||
| 1712 | }; | ||
| 1713 | pub const apple_a8 = CpuModel{ | ||
| 1714 | .name = "apple_a8", | ||
| 1715 | .llvm_name = "apple-a8", | ||
| 1716 | .features = featureSet(&[_]Feature{ | ||
| 1717 | .alternate_sextload_cvt_f32_pattern, | ||
| 1718 | .arith_bcc_fusion, | ||
| 1719 | .arith_cbz_fusion, | ||
| 1720 | .crypto, | ||
| 1721 | .disable_latency_sched_heuristic, | ||
| 1722 | .fuse_aes, | ||
| 1723 | .fuse_crypto_eor, | ||
| 1724 | .perfmon, | ||
| 1725 | .v8a, | ||
| 1726 | .zcm, | ||
| 1727 | .zcz, | ||
| 1728 | .zcz_fp_workaround, | ||
| 1729 | }), | ||
| 1730 | }; | ||
| 1731 | pub const apple_a9 = CpuModel{ | ||
| 1732 | .name = "apple_a9", | ||
| 1733 | .llvm_name = "apple-a9", | ||
| 1734 | .features = featureSet(&[_]Feature{ | ||
| 1735 | .alternate_sextload_cvt_f32_pattern, | ||
| 1736 | .arith_bcc_fusion, | ||
| 1737 | .arith_cbz_fusion, | ||
| 1738 | .crypto, | ||
| 1739 | .disable_latency_sched_heuristic, | ||
| 1740 | .fuse_aes, | ||
| 1741 | .fuse_crypto_eor, | ||
| 1742 | .perfmon, | ||
| 1743 | .v8a, | ||
| 1744 | .zcm, | ||
| 1745 | .zcz, | ||
| 1746 | .zcz_fp_workaround, | ||
| 1747 | }), | ||
| 1748 | }; | ||
| 1749 | pub const apple_latest = CpuModel{ | ||
| 1750 | .name = "apple_latest", | ||
| 1751 | .llvm_name = "apple-latest", | ||
| 1752 | .features = featureSet(&[_]Feature{ | ||
| 1753 | .alternate_sextload_cvt_f32_pattern, | ||
| 1754 | .arith_bcc_fusion, | ||
| 1755 | .arith_cbz_fusion, | ||
| 1756 | .crypto, | ||
| 1757 | .disable_latency_sched_heuristic, | ||
| 1758 | .fp16fml, | ||
| 1759 | .fuse_address, | ||
| 1760 | .fuse_aes, | ||
| 1761 | .fuse_arith_logic, | ||
| 1762 | .fuse_crypto_eor, | ||
| 1763 | .fuse_csel, | ||
| 1764 | .fuse_literals, | ||
| 1765 | .hcx, | ||
| 1766 | .perfmon, | ||
| 1767 | .sha3, | ||
| 1768 | .v8_6a, | ||
| 1769 | .zcm, | ||
| 1770 | .zcz, | ||
| 1771 | }), | ||
| 1772 | }; | ||
| 1773 | pub const apple_m1 = CpuModel{ | ||
| 1774 | .name = "apple_m1", | ||
| 1775 | .llvm_name = "apple-m1", | ||
| 1776 | .features = featureSet(&[_]Feature{ | ||
| 1777 | .aggressive_fma, | ||
| 1778 | .alternate_sextload_cvt_f32_pattern, | ||
| 1779 | .altnzcv, | ||
| 1780 | .arith_bcc_fusion, | ||
| 1781 | .arith_cbz_fusion, | ||
| 1782 | .ccdp, | ||
| 1783 | .crypto, | ||
| 1784 | .disable_latency_sched_heuristic, | ||
| 1785 | .fp16fml, | ||
| 1786 | .fptoint, | ||
| 1787 | .fuse_address, | ||
| 1788 | .fuse_adrp_add, | ||
| 1789 | .fuse_aes, | ||
| 1790 | .fuse_arith_logic, | ||
| 1791 | .fuse_crypto_eor, | ||
| 1792 | .fuse_csel, | ||
| 1793 | .fuse_literals, | ||
| 1794 | .perfmon, | ||
| 1795 | .predres, | ||
| 1796 | .sb, | ||
| 1797 | .sha3, | ||
| 1798 | .specrestrict, | ||
| 1799 | .ssbs, | ||
| 1800 | .v8_4a, | ||
| 1801 | .zcm, | ||
| 1802 | .zcz, | ||
| 1803 | }), | ||
| 1804 | }; | ||
| 1805 | pub const apple_m2 = CpuModel{ | ||
| 1806 | .name = "apple_m2", | ||
| 1807 | .llvm_name = "apple-m2", | ||
| 1808 | .features = featureSet(&[_]Feature{ | ||
| 1809 | .alternate_sextload_cvt_f32_pattern, | ||
| 1810 | .arith_bcc_fusion, | ||
| 1811 | .arith_cbz_fusion, | ||
| 1812 | .crypto, | ||
| 1813 | .disable_latency_sched_heuristic, | ||
| 1814 | .fp16fml, | ||
| 1815 | .fuse_address, | ||
| 1816 | .fuse_aes, | ||
| 1817 | .fuse_arith_logic, | ||
| 1818 | .fuse_crypto_eor, | ||
| 1819 | .fuse_csel, | ||
| 1820 | .fuse_literals, | ||
| 1821 | .perfmon, | ||
| 1822 | .sha3, | ||
| 1823 | .v8_6a, | ||
| 1824 | .zcm, | ||
| 1825 | .zcz, | ||
| 1826 | }), | ||
| 1827 | }; | ||
| 1828 | pub const apple_s4 = CpuModel{ | ||
| 1829 | .name = "apple_s4", | ||
| 1830 | .llvm_name = "apple-s4", | ||
| 1831 | .features = featureSet(&[_]Feature{ | ||
| 1832 | .alternate_sextload_cvt_f32_pattern, | ||
| 1833 | .arith_bcc_fusion, | ||
| 1834 | .arith_cbz_fusion, | ||
| 1835 | .crypto, | ||
| 1836 | .disable_latency_sched_heuristic, | ||
| 1837 | .fullfp16, | ||
| 1838 | .fuse_aes, | ||
| 1839 | .fuse_crypto_eor, | ||
| 1840 | .perfmon, | ||
| 1841 | .v8_3a, | ||
| 1842 | .zcm, | ||
| 1843 | .zcz, | ||
| 1844 | }), | ||
| 1845 | }; | ||
| 1846 | pub const apple_s5 = CpuModel{ | ||
| 1847 | .name = "apple_s5", | ||
| 1848 | .llvm_name = "apple-s5", | ||
| 1849 | .features = featureSet(&[_]Feature{ | ||
| 1850 | .alternate_sextload_cvt_f32_pattern, | ||
| 1851 | .arith_bcc_fusion, | ||
| 1852 | .arith_cbz_fusion, | ||
| 1853 | .crypto, | ||
| 1854 | .disable_latency_sched_heuristic, | ||
| 1855 | .fullfp16, | ||
| 1856 | .fuse_aes, | ||
| 1857 | .fuse_crypto_eor, | ||
| 1858 | .perfmon, | ||
| 1859 | .v8_3a, | ||
| 1860 | .zcm, | ||
| 1861 | .zcz, | ||
| 1862 | }), | ||
| 1863 | }; | ||
| 1864 | pub const carmel = CpuModel{ | ||
| 1865 | .name = "carmel", | ||
| 1866 | .llvm_name = "carmel", | ||
| 1867 | .features = featureSet(&[_]Feature{ | ||
| 1868 | .crypto, | ||
| 1869 | .fullfp16, | ||
| 1870 | .v8_2a, | ||
| 1871 | }), | ||
| 1872 | }; | ||
| 1873 | pub const cortex_a34 = CpuModel{ | ||
| 1874 | .name = "cortex_a34", | ||
| 1875 | .llvm_name = "cortex-a34", | ||
| 1876 | .features = featureSet(&[_]Feature{ | ||
| 1877 | .crc, | ||
| 1878 | .crypto, | ||
| 1879 | .perfmon, | ||
| 1880 | .v8a, | ||
| 1881 | }), | ||
| 1882 | }; | ||
| 1883 | pub const cortex_a35 = CpuModel{ | ||
| 1884 | .name = "cortex_a35", | ||
| 1885 | .llvm_name = "cortex-a35", | ||
| 1886 | .features = featureSet(&[_]Feature{ | ||
| 1887 | .crc, | ||
| 1888 | .crypto, | ||
| 1889 | .perfmon, | ||
| 1890 | .v8a, | ||
| 1891 | }), | ||
| 1892 | }; | ||
| 1893 | pub const cortex_a510 = CpuModel{ | ||
| 1894 | .name = "cortex_a510", | ||
| 1895 | .llvm_name = "cortex-a510", | ||
| 1896 | .features = featureSet(&[_]Feature{ | ||
| 1897 | .a510, | ||
| 1898 | .bf16, | ||
| 1899 | .ete, | ||
| 1900 | .fp16fml, | ||
| 1901 | .i8mm, | ||
| 1902 | .mte, | ||
| 1903 | .perfmon, | ||
| 1904 | .sve2_bitperm, | ||
| 1905 | .v9a, | ||
| 1906 | }), | ||
| 1907 | }; | ||
| 1908 | pub const cortex_a53 = CpuModel{ | ||
| 1909 | .name = "cortex_a53", | ||
| 1910 | .llvm_name = "cortex-a53", | ||
| 1911 | .features = featureSet(&[_]Feature{ | ||
| 1912 | .balance_fp_ops, | ||
| 1913 | .crc, | ||
| 1914 | .crypto, | ||
| 1915 | .custom_cheap_as_move, | ||
| 1916 | .fuse_adrp_add, | ||
| 1917 | .fuse_aes, | ||
| 1918 | .perfmon, | ||
| 1919 | .use_postra_scheduler, | ||
| 1920 | .v8a, | ||
| 1921 | }), | ||
| 1922 | }; | ||
| 1923 | pub const cortex_a55 = CpuModel{ | ||
| 1924 | .name = "cortex_a55", | ||
| 1925 | .llvm_name = "cortex-a55", | ||
| 1926 | .features = featureSet(&[_]Feature{ | ||
| 1927 | .crypto, | ||
| 1928 | .dotprod, | ||
| 1929 | .fullfp16, | ||
| 1930 | .fuse_address, | ||
| 1931 | .fuse_adrp_add, | ||
| 1932 | .fuse_aes, | ||
| 1933 | .perfmon, | ||
| 1934 | .rcpc, | ||
| 1935 | .use_postra_scheduler, | ||
| 1936 | .v8_2a, | ||
| 1937 | }), | ||
| 1938 | }; | ||
| 1939 | pub const cortex_a57 = CpuModel{ | ||
| 1940 | .name = "cortex_a57", | ||
| 1941 | .llvm_name = "cortex-a57", | ||
| 1942 | .features = featureSet(&[_]Feature{ | ||
| 1943 | .balance_fp_ops, | ||
| 1944 | .crc, | ||
| 1945 | .crypto, | ||
| 1946 | .custom_cheap_as_move, | ||
| 1947 | .enable_select_opt, | ||
| 1948 | .fuse_adrp_add, | ||
| 1949 | .fuse_aes, | ||
| 1950 | .fuse_literals, | ||
| 1951 | .perfmon, | ||
| 1952 | .predictable_select_expensive, | ||
| 1953 | .use_postra_scheduler, | ||
| 1954 | .v8a, | ||
| 1955 | }), | ||
| 1956 | }; | ||
| 1957 | pub const cortex_a65 = CpuModel{ | ||
| 1958 | .name = "cortex_a65", | ||
| 1959 | .llvm_name = "cortex-a65", | ||
| 1960 | .features = featureSet(&[_]Feature{ | ||
| 1961 | .a65, | ||
| 1962 | .crypto, | ||
| 1963 | .dotprod, | ||
| 1964 | .fullfp16, | ||
| 1965 | .perfmon, | ||
| 1966 | .rcpc, | ||
| 1967 | .ssbs, | ||
| 1968 | .v8_2a, | ||
| 1969 | }), | ||
| 1970 | }; | ||
| 1971 | pub const cortex_a65ae = CpuModel{ | ||
| 1972 | .name = "cortex_a65ae", | ||
| 1973 | .llvm_name = "cortex-a65ae", | ||
| 1974 | .features = featureSet(&[_]Feature{ | ||
| 1975 | .a65, | ||
| 1976 | .crypto, | ||
| 1977 | .dotprod, | ||
| 1978 | .fullfp16, | ||
| 1979 | .perfmon, | ||
| 1980 | .rcpc, | ||
| 1981 | .ssbs, | ||
| 1982 | .v8_2a, | ||
| 1983 | }), | ||
| 1984 | }; | ||
| 1985 | pub const cortex_a710 = CpuModel{ | ||
| 1986 | .name = "cortex_a710", | ||
| 1987 | .llvm_name = "cortex-a710", | ||
| 1988 | .features = featureSet(&[_]Feature{ | ||
| 1989 | .a710, | ||
| 1990 | .bf16, | ||
| 1991 | .ete, | ||
| 1992 | .fp16fml, | ||
| 1993 | .i8mm, | ||
| 1994 | .mte, | ||
| 1995 | .perfmon, | ||
| 1996 | .sve2_bitperm, | ||
| 1997 | .v9a, | ||
| 1998 | }), | ||
| 1999 | }; | ||
| 2000 | pub const cortex_a715 = CpuModel{ | ||
| 2001 | .name = "cortex_a715", | ||
| 2002 | .llvm_name = "cortex-a715", | ||
| 2003 | .features = featureSet(&[_]Feature{ | ||
| 2004 | .bf16, | ||
| 2005 | .cmp_bcc_fusion, | ||
| 2006 | .enable_select_opt, | ||
| 2007 | .ete, | ||
| 2008 | .fp16fml, | ||
| 2009 | .fuse_adrp_add, | ||
| 2010 | .fuse_aes, | ||
| 2011 | .i8mm, | ||
| 2012 | .lsl_fast, | ||
| 2013 | .mte, | ||
| 2014 | .perfmon, | ||
| 2015 | .predictable_select_expensive, | ||
| 2016 | .spe, | ||
| 2017 | .sve2_bitperm, | ||
| 2018 | .use_postra_scheduler, | ||
| 2019 | .v9a, | ||
| 2020 | }), | ||
| 2021 | }; | ||
| 2022 | pub const cortex_a72 = CpuModel{ | ||
| 2023 | .name = "cortex_a72", | ||
| 2024 | .llvm_name = "cortex-a72", | ||
| 2025 | .features = featureSet(&[_]Feature{ | ||
| 2026 | .crc, | ||
| 2027 | .crypto, | ||
| 2028 | .enable_select_opt, | ||
| 2029 | .fuse_adrp_add, | ||
| 2030 | .fuse_aes, | ||
| 2031 | .fuse_literals, | ||
| 2032 | .perfmon, | ||
| 2033 | .predictable_select_expensive, | ||
| 2034 | .v8a, | ||
| 2035 | }), | ||
| 2036 | }; | ||
| 2037 | pub const cortex_a73 = CpuModel{ | ||
| 2038 | .name = "cortex_a73", | ||
| 2039 | .llvm_name = "cortex-a73", | ||
| 2040 | .features = featureSet(&[_]Feature{ | ||
| 2041 | .crc, | ||
| 2042 | .crypto, | ||
| 2043 | .enable_select_opt, | ||
| 2044 | .fuse_adrp_add, | ||
| 2045 | .fuse_aes, | ||
| 2046 | .perfmon, | ||
| 2047 | .predictable_select_expensive, | ||
| 2048 | .v8a, | ||
| 2049 | }), | ||
| 2050 | }; | ||
| 2051 | pub const cortex_a75 = CpuModel{ | ||
| 2052 | .name = "cortex_a75", | ||
| 2053 | .llvm_name = "cortex-a75", | ||
| 2054 | .features = featureSet(&[_]Feature{ | ||
| 2055 | .crypto, | ||
| 2056 | .dotprod, | ||
| 2057 | .enable_select_opt, | ||
| 2058 | .fullfp16, | ||
| 2059 | .fuse_adrp_add, | ||
| 2060 | .fuse_aes, | ||
| 2061 | .perfmon, | ||
| 2062 | .predictable_select_expensive, | ||
| 2063 | .rcpc, | ||
| 2064 | .v8_2a, | ||
| 2065 | }), | ||
| 2066 | }; | ||
| 2067 | pub const cortex_a76 = CpuModel{ | ||
| 2068 | .name = "cortex_a76", | ||
| 2069 | .llvm_name = "cortex-a76", | ||
| 2070 | .features = featureSet(&[_]Feature{ | ||
| 2071 | .a76, | ||
| 2072 | .crypto, | ||
| 2073 | .dotprod, | ||
| 2074 | .fullfp16, | ||
| 2075 | .perfmon, | ||
| 2076 | .rcpc, | ||
| 2077 | .ssbs, | ||
| 2078 | .v8_2a, | ||
| 2079 | }), | ||
| 2080 | }; | ||
| 2081 | pub const cortex_a76ae = CpuModel{ | ||
| 2082 | .name = "cortex_a76ae", | ||
| 2083 | .llvm_name = "cortex-a76ae", | ||
| 2084 | .features = featureSet(&[_]Feature{ | ||
| 2085 | .a76, | ||
| 2086 | .crypto, | ||
| 2087 | .dotprod, | ||
| 2088 | .fullfp16, | ||
| 2089 | .perfmon, | ||
| 2090 | .rcpc, | ||
| 2091 | .ssbs, | ||
| 2092 | .v8_2a, | ||
| 2093 | }), | ||
| 2094 | }; | ||
| 2095 | pub const cortex_a77 = CpuModel{ | ||
| 2096 | .name = "cortex_a77", | ||
| 2097 | .llvm_name = "cortex-a77", | ||
| 2098 | .features = featureSet(&[_]Feature{ | ||
| 2099 | .cmp_bcc_fusion, | ||
| 2100 | .crypto, | ||
| 2101 | .dotprod, | ||
| 2102 | .enable_select_opt, | ||
| 2103 | .fullfp16, | ||
| 2104 | .fuse_adrp_add, | ||
| 2105 | .fuse_aes, | ||
| 2106 | .lsl_fast, | ||
| 2107 | .perfmon, | ||
| 2108 | .predictable_select_expensive, | ||
| 2109 | .rcpc, | ||
| 2110 | .ssbs, | ||
| 2111 | .v8_2a, | ||
| 2112 | }), | ||
| 2113 | }; | ||
| 2114 | pub const cortex_a78 = CpuModel{ | ||
| 2115 | .name = "cortex_a78", | ||
| 2116 | .llvm_name = "cortex-a78", | ||
| 2117 | .features = featureSet(&[_]Feature{ | ||
| 2118 | .a78, | ||
| 2119 | .crypto, | ||
| 2120 | .dotprod, | ||
| 2121 | .fullfp16, | ||
| 2122 | .perfmon, | ||
| 2123 | .rcpc, | ||
| 2124 | .spe, | ||
| 2125 | .ssbs, | ||
| 2126 | .v8_2a, | ||
| 2127 | }), | ||
| 2128 | }; | ||
| 2129 | pub const cortex_a78c = CpuModel{ | ||
| 2130 | .name = "cortex_a78c", | ||
| 2131 | .llvm_name = "cortex-a78c", | ||
| 2132 | .features = featureSet(&[_]Feature{ | ||
| 2133 | .a78c, | ||
| 2134 | .crypto, | ||
| 2135 | .dotprod, | ||
| 2136 | .flagm, | ||
| 2137 | .fp16fml, | ||
| 2138 | .pauth, | ||
| 2139 | .perfmon, | ||
| 2140 | .rcpc, | ||
| 2141 | .spe, | ||
| 2142 | .ssbs, | ||
| 2143 | .v8_2a, | ||
| 2144 | }), | ||
| 2145 | }; | ||
| 2146 | pub const cortex_r82 = CpuModel{ | ||
| 2147 | .name = "cortex_r82", | ||
| 2148 | .llvm_name = "cortex-r82", | ||
| 2149 | .features = featureSet(&[_]Feature{ | ||
| 2150 | .cortex_r82, | ||
| 2151 | .fp16fml, | ||
| 2152 | .perfmon, | ||
| 2153 | .predres, | ||
| 2154 | .sb, | ||
| 2155 | .ssbs, | ||
| 2156 | .v8r, | ||
| 2157 | }), | ||
| 2158 | }; | ||
| 2159 | pub const cortex_x1 = CpuModel{ | ||
| 2160 | .name = "cortex_x1", | ||
| 2161 | .llvm_name = "cortex-x1", | ||
| 2162 | .features = featureSet(&[_]Feature{ | ||
| 2163 | .cmp_bcc_fusion, | ||
| 2164 | .crypto, | ||
| 2165 | .dotprod, | ||
| 2166 | .enable_select_opt, | ||
| 2167 | .fullfp16, | ||
| 2168 | .fuse_adrp_add, | ||
| 2169 | .fuse_aes, | ||
| 2170 | .lsl_fast, | ||
| 2171 | .perfmon, | ||
| 2172 | .predictable_select_expensive, | ||
| 2173 | .rcpc, | ||
| 2174 | .spe, | ||
| 2175 | .ssbs, | ||
| 2176 | .use_postra_scheduler, | ||
| 2177 | .v8_2a, | ||
| 2178 | }), | ||
| 2179 | }; | ||
| 2180 | pub const cortex_x1c = CpuModel{ | ||
| 2181 | .name = "cortex_x1c", | ||
| 2182 | .llvm_name = "cortex-x1c", | ||
| 2183 | .features = featureSet(&[_]Feature{ | ||
| 2184 | .cmp_bcc_fusion, | ||
| 2185 | .crypto, | ||
| 2186 | .dotprod, | ||
| 2187 | .enable_select_opt, | ||
| 2188 | .flagm, | ||
| 2189 | .fullfp16, | ||
| 2190 | .fuse_adrp_add, | ||
| 2191 | .fuse_aes, | ||
| 2192 | .lse2, | ||
| 2193 | .lsl_fast, | ||
| 2194 | .pauth, | ||
| 2195 | .perfmon, | ||
| 2196 | .predictable_select_expensive, | ||
| 2197 | .rcpc_immo, | ||
| 2198 | .spe, | ||
| 2199 | .ssbs, | ||
| 2200 | .use_postra_scheduler, | ||
| 2201 | .v8_2a, | ||
| 2202 | }), | ||
| 2203 | }; | ||
| 2204 | pub const cortex_x2 = CpuModel{ | ||
| 2205 | .name = "cortex_x2", | ||
| 2206 | .llvm_name = "cortex-x2", | ||
| 2207 | .features = featureSet(&[_]Feature{ | ||
| 2208 | .bf16, | ||
| 2209 | .cmp_bcc_fusion, | ||
| 2210 | .enable_select_opt, | ||
| 2211 | .ete, | ||
| 2212 | .fp16fml, | ||
| 2213 | .fuse_adrp_add, | ||
| 2214 | .fuse_aes, | ||
| 2215 | .i8mm, | ||
| 2216 | .lsl_fast, | ||
| 2217 | .mte, | ||
| 2218 | .perfmon, | ||
| 2219 | .predictable_select_expensive, | ||
| 2220 | .sve2_bitperm, | ||
| 2221 | .use_postra_scheduler, | ||
| 2222 | .v9a, | ||
| 2223 | }), | ||
| 2224 | }; | ||
| 2225 | pub const cortex_x3 = CpuModel{ | ||
| 2226 | .name = "cortex_x3", | ||
| 2227 | .llvm_name = "cortex-x3", | ||
| 2228 | .features = featureSet(&[_]Feature{ | ||
| 2229 | .bf16, | ||
| 2230 | .enable_select_opt, | ||
| 2231 | .ete, | ||
| 2232 | .fp16fml, | ||
| 2233 | .fuse_adrp_add, | ||
| 2234 | .fuse_aes, | ||
| 2235 | .i8mm, | ||
| 2236 | .lsl_fast, | ||
| 2237 | .mte, | ||
| 2238 | .perfmon, | ||
| 2239 | .predictable_select_expensive, | ||
| 2240 | .spe, | ||
| 2241 | .sve2_bitperm, | ||
| 2242 | .use_postra_scheduler, | ||
| 2243 | .v9a, | ||
| 2244 | }), | ||
| 2245 | }; | ||
| 2246 | pub const cyclone = CpuModel{ | ||
| 2247 | .name = "cyclone", | ||
| 2248 | .llvm_name = "cyclone", | ||
| 2249 | .features = featureSet(&[_]Feature{ | ||
| 2250 | .alternate_sextload_cvt_f32_pattern, | ||
| 2251 | .arith_bcc_fusion, | ||
| 2252 | .arith_cbz_fusion, | ||
| 2253 | .crypto, | ||
| 2254 | .disable_latency_sched_heuristic, | ||
| 2255 | .fuse_aes, | ||
| 2256 | .fuse_crypto_eor, | ||
| 2257 | .perfmon, | ||
| 2258 | .v8a, | ||
| 2259 | .zcm, | ||
| 2260 | .zcz, | ||
| 2261 | .zcz_fp_workaround, | ||
| 2262 | }), | ||
| 2263 | }; | ||
| 2264 | pub const emag = CpuModel{ | ||
| 2265 | .name = "emag", | ||
| 2266 | .llvm_name = null, | ||
| 2267 | .features = featureSet(&[_]Feature{ | ||
| 2268 | .crc, | ||
| 2269 | .crypto, | ||
| 2270 | .perfmon, | ||
| 2271 | .v8a, | ||
| 2272 | }), | ||
| 2273 | }; | ||
| 2274 | pub const exynos_m1 = CpuModel{ | ||
| 2275 | .name = "exynos_m1", | ||
| 2276 | .llvm_name = null, | ||
| 2277 | .features = featureSet(&[_]Feature{ | ||
| 2278 | .crc, | ||
| 2279 | .crypto, | ||
| 2280 | .exynos_cheap_as_move, | ||
| 2281 | .force_32bit_jump_tables, | ||
| 2282 | .fuse_aes, | ||
| 2283 | .perfmon, | ||
| 2284 | .slow_misaligned_128store, | ||
| 2285 | .slow_paired_128, | ||
| 2286 | .use_postra_scheduler, | ||
| 2287 | .use_reciprocal_square_root, | ||
| 2288 | .v8a, | ||
| 2289 | }), | ||
| 2290 | }; | ||
| 2291 | pub const exynos_m2 = CpuModel{ | ||
| 2292 | .name = "exynos_m2", | ||
| 2293 | .llvm_name = null, | ||
| 2294 | .features = featureSet(&[_]Feature{ | ||
| 2295 | .crc, | ||
| 2296 | .crypto, | ||
| 2297 | .exynos_cheap_as_move, | ||
| 2298 | .force_32bit_jump_tables, | ||
| 2299 | .fuse_aes, | ||
| 2300 | .perfmon, | ||
| 2301 | .slow_misaligned_128store, | ||
| 2302 | .slow_paired_128, | ||
| 2303 | .use_postra_scheduler, | ||
| 2304 | .v8a, | ||
| 2305 | }), | ||
| 2306 | }; | ||
| 2307 | pub const exynos_m3 = CpuModel{ | ||
| 2308 | .name = "exynos_m3", | ||
| 2309 | .llvm_name = "exynos-m3", | ||
| 2310 | .features = featureSet(&[_]Feature{ | ||
| 2311 | .crc, | ||
| 2312 | .crypto, | ||
| 2313 | .exynos_cheap_as_move, | ||
| 2314 | .force_32bit_jump_tables, | ||
| 2315 | .fuse_address, | ||
| 2316 | .fuse_adrp_add, | ||
| 2317 | .fuse_aes, | ||
| 2318 | .fuse_csel, | ||
| 2319 | .fuse_literals, | ||
| 2320 | .lsl_fast, | ||
| 2321 | .perfmon, | ||
| 2322 | .predictable_select_expensive, | ||
| 2323 | .use_postra_scheduler, | ||
| 2324 | .v8a, | ||
| 2325 | }), | ||
| 2326 | }; | ||
| 2327 | pub const exynos_m4 = CpuModel{ | ||
| 2328 | .name = "exynos_m4", | ||
| 2329 | .llvm_name = "exynos-m4", | ||
| 2330 | .features = featureSet(&[_]Feature{ | ||
| 2331 | .arith_bcc_fusion, | ||
| 2332 | .arith_cbz_fusion, | ||
| 2333 | .crypto, | ||
| 2334 | .dotprod, | ||
| 2335 | .exynos_cheap_as_move, | ||
| 2336 | .force_32bit_jump_tables, | ||
| 2337 | .fullfp16, | ||
| 2338 | .fuse_address, | ||
| 2339 | .fuse_adrp_add, | ||
| 2340 | .fuse_aes, | ||
| 2341 | .fuse_arith_logic, | ||
| 2342 | .fuse_csel, | ||
| 2343 | .fuse_literals, | ||
| 2344 | .lsl_fast, | ||
| 2345 | .perfmon, | ||
| 2346 | .use_postra_scheduler, | ||
| 2347 | .v8_2a, | ||
| 2348 | .zcz, | ||
| 2349 | }), | ||
| 2350 | }; | ||
| 2351 | pub const exynos_m5 = CpuModel{ | ||
| 2352 | .name = "exynos_m5", | ||
| 2353 | .llvm_name = "exynos-m5", | ||
| 2354 | .features = featureSet(&[_]Feature{ | ||
| 2355 | .arith_bcc_fusion, | ||
| 2356 | .arith_cbz_fusion, | ||
| 2357 | .crypto, | ||
| 2358 | .dotprod, | ||
| 2359 | .exynos_cheap_as_move, | ||
| 2360 | .force_32bit_jump_tables, | ||
| 2361 | .fullfp16, | ||
| 2362 | .fuse_address, | ||
| 2363 | .fuse_adrp_add, | ||
| 2364 | .fuse_aes, | ||
| 2365 | .fuse_arith_logic, | ||
| 2366 | .fuse_csel, | ||
| 2367 | .fuse_literals, | ||
| 2368 | .lsl_fast, | ||
| 2369 | .perfmon, | ||
| 2370 | .use_postra_scheduler, | ||
| 2371 | .v8_2a, | ||
| 2372 | .zcz, | ||
| 2373 | }), | ||
| 2374 | }; | ||
| 2375 | pub const falkor = CpuModel{ | ||
| 2376 | .name = "falkor", | ||
| 2377 | .llvm_name = "falkor", | ||
| 2378 | .features = featureSet(&[_]Feature{ | ||
| 2379 | .crc, | ||
| 2380 | .crypto, | ||
| 2381 | .custom_cheap_as_move, | ||
| 2382 | .lsl_fast, | ||
| 2383 | .perfmon, | ||
| 2384 | .predictable_select_expensive, | ||
| 2385 | .rdm, | ||
| 2386 | .slow_strqro_store, | ||
| 2387 | .use_postra_scheduler, | ||
| 2388 | .v8a, | ||
| 2389 | .zcz, | ||
| 2390 | }), | ||
| 2391 | }; | ||
| 2392 | pub const generic = CpuModel{ | ||
| 2393 | .name = "generic", | ||
| 2394 | .llvm_name = "generic", | ||
| 2395 | .features = featureSet(&[_]Feature{ | ||
| 2396 | .enable_select_opt, | ||
| 2397 | .ete, | ||
| 2398 | .fuse_adrp_add, | ||
| 2399 | .fuse_aes, | ||
| 2400 | .neon, | ||
| 2401 | .use_postra_scheduler, | ||
| 2402 | }), | ||
| 2403 | }; | ||
| 2404 | pub const kryo = CpuModel{ | ||
| 2405 | .name = "kryo", | ||
| 2406 | .llvm_name = "kryo", | ||
| 2407 | .features = featureSet(&[_]Feature{ | ||
| 2408 | .crc, | ||
| 2409 | .crypto, | ||
| 2410 | .custom_cheap_as_move, | ||
| 2411 | .lsl_fast, | ||
| 2412 | .perfmon, | ||
| 2413 | .predictable_select_expensive, | ||
| 2414 | .use_postra_scheduler, | ||
| 2415 | .v8a, | ||
| 2416 | .zcz, | ||
| 2417 | }), | ||
| 2418 | }; | ||
| 2419 | pub const neoverse_512tvb = CpuModel{ | ||
| 2420 | .name = "neoverse_512tvb", | ||
| 2421 | .llvm_name = "neoverse-512tvb", | ||
| 2422 | .features = featureSet(&[_]Feature{ | ||
| 2423 | .bf16, | ||
| 2424 | .ccdp, | ||
| 2425 | .crypto, | ||
| 2426 | .enable_select_opt, | ||
| 2427 | .fp16fml, | ||
| 2428 | .fuse_adrp_add, | ||
| 2429 | .fuse_aes, | ||
| 2430 | .i8mm, | ||
| 2431 | .lsl_fast, | ||
| 2432 | .perfmon, | ||
| 2433 | .predictable_select_expensive, | ||
| 2434 | .rand, | ||
| 2435 | .spe, | ||
| 2436 | .ssbs, | ||
| 2437 | .sve, | ||
| 2438 | .use_postra_scheduler, | ||
| 2439 | .v8_4a, | ||
| 2440 | }), | ||
| 2441 | }; | ||
| 2442 | pub const neoverse_e1 = CpuModel{ | ||
| 2443 | .name = "neoverse_e1", | ||
| 2444 | .llvm_name = "neoverse-e1", | ||
| 2445 | .features = featureSet(&[_]Feature{ | ||
| 2446 | .crypto, | ||
| 2447 | .dotprod, | ||
| 2448 | .fullfp16, | ||
| 2449 | .fuse_adrp_add, | ||
| 2450 | .fuse_aes, | ||
| 2451 | .perfmon, | ||
| 2452 | .rcpc, | ||
| 2453 | .ssbs, | ||
| 2454 | .use_postra_scheduler, | ||
| 2455 | .v8_2a, | ||
| 2456 | }), | ||
| 2457 | }; | ||
| 2458 | pub const neoverse_n1 = CpuModel{ | ||
| 2459 | .name = "neoverse_n1", | ||
| 2460 | .llvm_name = "neoverse-n1", | ||
| 2461 | .features = featureSet(&[_]Feature{ | ||
| 2462 | .crypto, | ||
| 2463 | .dotprod, | ||
| 2464 | .enable_select_opt, | ||
| 2465 | .fullfp16, | ||
| 2466 | .fuse_adrp_add, | ||
| 2467 | .fuse_aes, | ||
| 2468 | .lsl_fast, | ||
| 2469 | .perfmon, | ||
| 2470 | .predictable_select_expensive, | ||
| 2471 | .rcpc, | ||
| 2472 | .spe, | ||
| 2473 | .ssbs, | ||
| 2474 | .use_postra_scheduler, | ||
| 2475 | .v8_2a, | ||
| 2476 | }), | ||
| 2477 | }; | ||
| 2478 | pub const neoverse_n2 = CpuModel{ | ||
| 2479 | .name = "neoverse_n2", | ||
| 2480 | .llvm_name = "neoverse-n2", | ||
| 2481 | .features = featureSet(&[_]Feature{ | ||
| 2482 | .bf16, | ||
| 2483 | .crypto, | ||
| 2484 | .enable_select_opt, | ||
| 2485 | .ete, | ||
| 2486 | .fuse_adrp_add, | ||
| 2487 | .fuse_aes, | ||
| 2488 | .i8mm, | ||
| 2489 | .lsl_fast, | ||
| 2490 | .mte, | ||
| 2491 | .perfmon, | ||
| 2492 | .predictable_select_expensive, | ||
| 2493 | .sve2_bitperm, | ||
| 2494 | .use_postra_scheduler, | ||
| 2495 | .v8_5a, | ||
| 2496 | }), | ||
| 2497 | }; | ||
| 2498 | pub const neoverse_v1 = CpuModel{ | ||
| 2499 | .name = "neoverse_v1", | ||
| 2500 | .llvm_name = "neoverse-v1", | ||
| 2501 | .features = featureSet(&[_]Feature{ | ||
| 2502 | .bf16, | ||
| 2503 | .ccdp, | ||
| 2504 | .crypto, | ||
| 2505 | .enable_select_opt, | ||
| 2506 | .fp16fml, | ||
| 2507 | .fuse_adrp_add, | ||
| 2508 | .fuse_aes, | ||
| 2509 | .i8mm, | ||
| 2510 | .lsl_fast, | ||
| 2511 | .no_sve_fp_ld1r, | ||
| 2512 | .perfmon, | ||
| 2513 | .predictable_select_expensive, | ||
| 2514 | .rand, | ||
| 2515 | .spe, | ||
| 2516 | .ssbs, | ||
| 2517 | .sve, | ||
| 2518 | .use_postra_scheduler, | ||
| 2519 | .v8_4a, | ||
| 2520 | }), | ||
| 2521 | }; | ||
| 2522 | pub const neoverse_v2 = CpuModel{ | ||
| 2523 | .name = "neoverse_v2", | ||
| 2524 | .llvm_name = "neoverse-v2", | ||
| 2525 | .features = featureSet(&[_]Feature{ | ||
| 2526 | .bf16, | ||
| 2527 | .enable_select_opt, | ||
| 2528 | .ete, | ||
| 2529 | .fp16fml, | ||
| 2530 | .fuse_aes, | ||
| 2531 | .i8mm, | ||
| 2532 | .lsl_fast, | ||
| 2533 | .mte, | ||
| 2534 | .perfmon, | ||
| 2535 | .predictable_select_expensive, | ||
| 2536 | .rand, | ||
| 2537 | .spe, | ||
| 2538 | .sve2_bitperm, | ||
| 2539 | .use_postra_scheduler, | ||
| 2540 | .v9a, | ||
| 2541 | }), | ||
| 2542 | }; | ||
| 2543 | pub const saphira = CpuModel{ | ||
| 2544 | .name = "saphira", | ||
| 2545 | .llvm_name = "saphira", | ||
| 2546 | .features = featureSet(&[_]Feature{ | ||
| 2547 | .crypto, | ||
| 2548 | .custom_cheap_as_move, | ||
| 2549 | .lsl_fast, | ||
| 2550 | .perfmon, | ||
| 2551 | .predictable_select_expensive, | ||
| 2552 | .spe, | ||
| 2553 | .use_postra_scheduler, | ||
| 2554 | .v8_4a, | ||
| 2555 | .zcz, | ||
| 2556 | }), | ||
| 2557 | }; | ||
| 2558 | pub const thunderx = CpuModel{ | ||
| 2559 | .name = "thunderx", | ||
| 2560 | .llvm_name = "thunderx", | ||
| 2561 | .features = featureSet(&[_]Feature{ | ||
| 2562 | .crc, | ||
| 2563 | .crypto, | ||
| 2564 | .perfmon, | ||
| 2565 | .predictable_select_expensive, | ||
| 2566 | .use_postra_scheduler, | ||
| 2567 | .v8a, | ||
| 2568 | }), | ||
| 2569 | }; | ||
| 2570 | pub const thunderx2t99 = CpuModel{ | ||
| 2571 | .name = "thunderx2t99", | ||
| 2572 | .llvm_name = "thunderx2t99", | ||
| 2573 | .features = featureSet(&[_]Feature{ | ||
| 2574 | .aggressive_fma, | ||
| 2575 | .arith_bcc_fusion, | ||
| 2576 | .crypto, | ||
| 2577 | .predictable_select_expensive, | ||
| 2578 | .use_postra_scheduler, | ||
| 2579 | .v8_1a, | ||
| 2580 | }), | ||
| 2581 | }; | ||
| 2582 | pub const thunderx3t110 = CpuModel{ | ||
| 2583 | .name = "thunderx3t110", | ||
| 2584 | .llvm_name = "thunderx3t110", | ||
| 2585 | .features = featureSet(&[_]Feature{ | ||
| 2586 | .aggressive_fma, | ||
| 2587 | .arith_bcc_fusion, | ||
| 2588 | .balance_fp_ops, | ||
| 2589 | .crypto, | ||
| 2590 | .perfmon, | ||
| 2591 | .predictable_select_expensive, | ||
| 2592 | .strict_align, | ||
| 2593 | .use_postra_scheduler, | ||
| 2594 | .v8_3a, | ||
| 2595 | }), | ||
| 2596 | }; | ||
| 2597 | pub const thunderxt81 = CpuModel{ | ||
| 2598 | .name = "thunderxt81", | ||
| 2599 | .llvm_name = "thunderxt81", | ||
| 2600 | .features = featureSet(&[_]Feature{ | ||
| 2601 | .crc, | ||
| 2602 | .crypto, | ||
| 2603 | .perfmon, | ||
| 2604 | .predictable_select_expensive, | ||
| 2605 | .use_postra_scheduler, | ||
| 2606 | .v8a, | ||
| 2607 | }), | ||
| 2608 | }; | ||
| 2609 | pub const thunderxt83 = CpuModel{ | ||
| 2610 | .name = "thunderxt83", | ||
| 2611 | .llvm_name = "thunderxt83", | ||
| 2612 | .features = featureSet(&[_]Feature{ | ||
| 2613 | .crc, | ||
| 2614 | .crypto, | ||
| 2615 | .perfmon, | ||
| 2616 | .predictable_select_expensive, | ||
| 2617 | .use_postra_scheduler, | ||
| 2618 | .v8a, | ||
| 2619 | }), | ||
| 2620 | }; | ||
| 2621 | pub const thunderxt88 = CpuModel{ | ||
| 2622 | .name = "thunderxt88", | ||
| 2623 | .llvm_name = "thunderxt88", | ||
| 2624 | .features = featureSet(&[_]Feature{ | ||
| 2625 | .crc, | ||
| 2626 | .crypto, | ||
| 2627 | .perfmon, | ||
| 2628 | .predictable_select_expensive, | ||
| 2629 | .use_postra_scheduler, | ||
| 2630 | .v8a, | ||
| 2631 | }), | ||
| 2632 | }; | ||
| 2633 | pub const tsv110 = CpuModel{ | ||
| 2634 | .name = "tsv110", | ||
| 2635 | .llvm_name = "tsv110", | ||
| 2636 | .features = featureSet(&[_]Feature{ | ||
| 2637 | .crypto, | ||
| 2638 | .custom_cheap_as_move, | ||
| 2639 | .dotprod, | ||
| 2640 | .fp16fml, | ||
| 2641 | .fuse_aes, | ||
| 2642 | .perfmon, | ||
| 2643 | .spe, | ||
| 2644 | .use_postra_scheduler, | ||
| 2645 | .v8_2a, | ||
| 2646 | }), | ||
| 2647 | }; | ||
| 2648 | pub const xgene1 = CpuModel{ | ||
| 2649 | .name = "xgene1", | ||
| 2650 | .llvm_name = null, | ||
| 2651 | .features = featureSet(&[_]Feature{ | ||
| 2652 | .perfmon, | ||
| 2653 | .v8a, | ||
| 2654 | }), | ||
| 2655 | }; | ||
| 2656 | }; | ||
lib/std/target/amdgpu.zig deleted-2153
| ... | @@ -1,2153 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"16_bit_insts", | ||
| 9 | a16, | ||
| 10 | add_no_carry_insts, | ||
| 11 | aperture_regs, | ||
| 12 | architected_flat_scratch, | ||
| 13 | architected_sgprs, | ||
| 14 | atomic_buffer_global_pk_add_f16_insts, | ||
| 15 | atomic_buffer_global_pk_add_f16_no_rtn_insts, | ||
| 16 | atomic_ds_pk_add_16_insts, | ||
| 17 | atomic_fadd_no_rtn_insts, | ||
| 18 | atomic_fadd_rtn_insts, | ||
| 19 | atomic_flat_pk_add_16_insts, | ||
| 20 | atomic_global_pk_add_bf16_inst, | ||
| 21 | auto_waitcnt_before_barrier, | ||
| 22 | back_off_barrier, | ||
| 23 | ci_insts, | ||
| 24 | cumode, | ||
| 25 | dl_insts, | ||
| 26 | dot10_insts, | ||
| 27 | dot1_insts, | ||
| 28 | dot2_insts, | ||
| 29 | dot3_insts, | ||
| 30 | dot4_insts, | ||
| 31 | dot5_insts, | ||
| 32 | dot6_insts, | ||
| 33 | dot7_insts, | ||
| 34 | dot8_insts, | ||
| 35 | dot9_insts, | ||
| 36 | dpp, | ||
| 37 | dpp8, | ||
| 38 | dpp_64bit, | ||
| 39 | ds128, | ||
| 40 | ds_src2_insts, | ||
| 41 | extended_image_insts, | ||
| 42 | fast_denormal_f32, | ||
| 43 | fast_fmaf, | ||
| 44 | flat_address_space, | ||
| 45 | flat_atomic_fadd_f32_inst, | ||
| 46 | flat_for_global, | ||
| 47 | flat_global_insts, | ||
| 48 | flat_inst_offsets, | ||
| 49 | flat_scratch, | ||
| 50 | flat_scratch_insts, | ||
| 51 | flat_segment_offset_bug, | ||
| 52 | fma_mix_insts, | ||
| 53 | fmacf64_inst, | ||
| 54 | fmaf, | ||
| 55 | force_store_sc0_sc1, | ||
| 56 | fp64, | ||
| 57 | fp8_insts, | ||
| 58 | full_rate_64_ops, | ||
| 59 | g16, | ||
| 60 | gcn3_encoding, | ||
| 61 | get_wave_id_inst, | ||
| 62 | gfx10, | ||
| 63 | gfx10_3_insts, | ||
| 64 | gfx10_a_encoding, | ||
| 65 | gfx10_b_encoding, | ||
| 66 | gfx10_insts, | ||
| 67 | gfx11, | ||
| 68 | gfx11_full_vgprs, | ||
| 69 | gfx11_insts, | ||
| 70 | gfx7_gfx8_gfx9_insts, | ||
| 71 | gfx8_insts, | ||
| 72 | gfx9, | ||
| 73 | gfx90a_insts, | ||
| 74 | gfx940_insts, | ||
| 75 | gfx9_insts, | ||
| 76 | half_rate_64_ops, | ||
| 77 | image_gather4_d16_bug, | ||
| 78 | image_insts, | ||
| 79 | image_store_d16_bug, | ||
| 80 | inst_fwd_prefetch_bug, | ||
| 81 | int_clamp_insts, | ||
| 82 | inv_2pi_inline_imm, | ||
| 83 | lds_branch_vmem_war_hazard, | ||
| 84 | lds_misaligned_bug, | ||
| 85 | ldsbankcount16, | ||
| 86 | ldsbankcount32, | ||
| 87 | load_store_opt, | ||
| 88 | localmemorysize32768, | ||
| 89 | localmemorysize65536, | ||
| 90 | mad_intra_fwd_bug, | ||
| 91 | mad_mac_f32_insts, | ||
| 92 | mad_mix_insts, | ||
| 93 | mai_insts, | ||
| 94 | max_private_element_size_16, | ||
| 95 | max_private_element_size_4, | ||
| 96 | max_private_element_size_8, | ||
| 97 | mfma_inline_literal_bug, | ||
| 98 | mimg_r128, | ||
| 99 | movrel, | ||
| 100 | negative_scratch_offset_bug, | ||
| 101 | negative_unaligned_scratch_offset_bug, | ||
| 102 | no_data_dep_hazard, | ||
| 103 | no_sdst_cmpx, | ||
| 104 | nsa_clause_bug, | ||
| 105 | nsa_encoding, | ||
| 106 | nsa_to_vmem_bug, | ||
| 107 | offset_3f_bug, | ||
| 108 | packed_fp32_ops, | ||
| 109 | packed_tid, | ||
| 110 | partial_nsa_encoding, | ||
| 111 | pk_fmac_f16_inst, | ||
| 112 | promote_alloca, | ||
| 113 | prt_strict_null, | ||
| 114 | r128_a16, | ||
| 115 | s_memrealtime, | ||
| 116 | s_memtime_inst, | ||
| 117 | scalar_atomics, | ||
| 118 | scalar_flat_scratch_insts, | ||
| 119 | scalar_stores, | ||
| 120 | sdwa, | ||
| 121 | sdwa_mav, | ||
| 122 | sdwa_omod, | ||
| 123 | sdwa_out_mods_vopc, | ||
| 124 | sdwa_scalar, | ||
| 125 | sdwa_sdst, | ||
| 126 | sea_islands, | ||
| 127 | sgpr_init_bug, | ||
| 128 | shader_cycles_register, | ||
| 129 | si_scheduler, | ||
| 130 | smem_to_vector_write_hazard, | ||
| 131 | southern_islands, | ||
| 132 | sramecc, | ||
| 133 | sramecc_support, | ||
| 134 | tgsplit, | ||
| 135 | trap_handler, | ||
| 136 | trig_reduced_range, | ||
| 137 | true16, | ||
| 138 | unaligned_access_mode, | ||
| 139 | unaligned_buffer_access, | ||
| 140 | unaligned_ds_access, | ||
| 141 | unaligned_scratch_access, | ||
| 142 | unpacked_d16_vmem, | ||
| 143 | unsafe_ds_offset_folding, | ||
| 144 | user_sgpr_init16_bug, | ||
| 145 | valu_trans_use_hazard, | ||
| 146 | vcmpx_exec_war_hazard, | ||
| 147 | vcmpx_permlane_hazard, | ||
| 148 | vgpr_index_mode, | ||
| 149 | vmem_to_scalar_write_hazard, | ||
| 150 | volcanic_islands, | ||
| 151 | vop3_literal, | ||
| 152 | vop3p, | ||
| 153 | vopd, | ||
| 154 | vscnt, | ||
| 155 | wavefrontsize16, | ||
| 156 | wavefrontsize32, | ||
| 157 | wavefrontsize64, | ||
| 158 | xnack, | ||
| 159 | xnack_support, | ||
| 160 | }; | ||
| 161 | |||
| 162 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 163 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 164 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 165 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 166 | |||
| 167 | pub const all_features = blk: { | ||
| 168 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 169 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 170 | var result: [len]CpuFeature = undefined; | ||
| 171 | result[@intFromEnum(Feature.@"16_bit_insts")] = .{ | ||
| 172 | .llvm_name = "16-bit-insts", | ||
| 173 | .description = "Has i16/f16 instructions", | ||
| 174 | .dependencies = featureSet(&[_]Feature{}), | ||
| 175 | }; | ||
| 176 | result[@intFromEnum(Feature.a16)] = .{ | ||
| 177 | .llvm_name = "a16", | ||
| 178 | .description = "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands", | ||
| 179 | .dependencies = featureSet(&[_]Feature{}), | ||
| 180 | }; | ||
| 181 | result[@intFromEnum(Feature.add_no_carry_insts)] = .{ | ||
| 182 | .llvm_name = "add-no-carry-insts", | ||
| 183 | .description = "Have VALU add/sub instructions without carry out", | ||
| 184 | .dependencies = featureSet(&[_]Feature{}), | ||
| 185 | }; | ||
| 186 | result[@intFromEnum(Feature.aperture_regs)] = .{ | ||
| 187 | .llvm_name = "aperture-regs", | ||
| 188 | .description = "Has Memory Aperture Base and Size Registers", | ||
| 189 | .dependencies = featureSet(&[_]Feature{}), | ||
| 190 | }; | ||
| 191 | result[@intFromEnum(Feature.architected_flat_scratch)] = .{ | ||
| 192 | .llvm_name = "architected-flat-scratch", | ||
| 193 | .description = "Flat Scratch register is a readonly SPI initialized architected register", | ||
| 194 | .dependencies = featureSet(&[_]Feature{}), | ||
| 195 | }; | ||
| 196 | result[@intFromEnum(Feature.architected_sgprs)] = .{ | ||
| 197 | .llvm_name = "architected-sgprs", | ||
| 198 | .description = "Enable the architected SGPRs", | ||
| 199 | .dependencies = featureSet(&[_]Feature{}), | ||
| 200 | }; | ||
| 201 | result[@intFromEnum(Feature.atomic_buffer_global_pk_add_f16_insts)] = .{ | ||
| 202 | .llvm_name = "atomic-buffer-global-pk-add-f16-insts", | ||
| 203 | .description = "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that can return original value", | ||
| 204 | .dependencies = featureSet(&[_]Feature{ | ||
| 205 | .flat_global_insts, | ||
| 206 | }), | ||
| 207 | }; | ||
| 208 | result[@intFromEnum(Feature.atomic_buffer_global_pk_add_f16_no_rtn_insts)] = .{ | ||
| 209 | .llvm_name = "atomic-buffer-global-pk-add-f16-no-rtn-insts", | ||
| 210 | .description = "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that don't return original value", | ||
| 211 | .dependencies = featureSet(&[_]Feature{ | ||
| 212 | .flat_global_insts, | ||
| 213 | }), | ||
| 214 | }; | ||
| 215 | result[@intFromEnum(Feature.atomic_ds_pk_add_16_insts)] = .{ | ||
| 216 | .llvm_name = "atomic-ds-pk-add-16-insts", | ||
| 217 | .description = "Has ds_pk_add_bf16, ds_pk_add_f16, ds_pk_add_rtn_bf16, ds_pk_add_rtn_f16 instructions", | ||
| 218 | .dependencies = featureSet(&[_]Feature{}), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.atomic_fadd_no_rtn_insts)] = .{ | ||
| 221 | .llvm_name = "atomic-fadd-no-rtn-insts", | ||
| 222 | .description = "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that don't return original value", | ||
| 223 | .dependencies = featureSet(&[_]Feature{ | ||
| 224 | .flat_global_insts, | ||
| 225 | }), | ||
| 226 | }; | ||
| 227 | result[@intFromEnum(Feature.atomic_fadd_rtn_insts)] = .{ | ||
| 228 | .llvm_name = "atomic-fadd-rtn-insts", | ||
| 229 | .description = "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that return original value", | ||
| 230 | .dependencies = featureSet(&[_]Feature{ | ||
| 231 | .flat_global_insts, | ||
| 232 | }), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.atomic_flat_pk_add_16_insts)] = .{ | ||
| 235 | .llvm_name = "atomic-flat-pk-add-16-insts", | ||
| 236 | .description = "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions", | ||
| 237 | .dependencies = featureSet(&[_]Feature{}), | ||
| 238 | }; | ||
| 239 | result[@intFromEnum(Feature.atomic_global_pk_add_bf16_inst)] = .{ | ||
| 240 | .llvm_name = "atomic-global-pk-add-bf16-inst", | ||
| 241 | .description = "Has global_atomic_pk_add_bf16 instruction", | ||
| 242 | .dependencies = featureSet(&[_]Feature{ | ||
| 243 | .flat_global_insts, | ||
| 244 | }), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.auto_waitcnt_before_barrier)] = .{ | ||
| 247 | .llvm_name = "auto-waitcnt-before-barrier", | ||
| 248 | .description = "Hardware automatically inserts waitcnt before barrier", | ||
| 249 | .dependencies = featureSet(&[_]Feature{}), | ||
| 250 | }; | ||
| 251 | result[@intFromEnum(Feature.back_off_barrier)] = .{ | ||
| 252 | .llvm_name = "back-off-barrier", | ||
| 253 | .description = "Hardware supports backing off s_barrier if an exception occurs", | ||
| 254 | .dependencies = featureSet(&[_]Feature{}), | ||
| 255 | }; | ||
| 256 | result[@intFromEnum(Feature.ci_insts)] = .{ | ||
| 257 | .llvm_name = "ci-insts", | ||
| 258 | .description = "Additional instructions for CI+", | ||
| 259 | .dependencies = featureSet(&[_]Feature{}), | ||
| 260 | }; | ||
| 261 | result[@intFromEnum(Feature.cumode)] = .{ | ||
| 262 | .llvm_name = "cumode", | ||
| 263 | .description = "Enable CU wavefront execution mode", | ||
| 264 | .dependencies = featureSet(&[_]Feature{}), | ||
| 265 | }; | ||
| 266 | result[@intFromEnum(Feature.dl_insts)] = .{ | ||
| 267 | .llvm_name = "dl-insts", | ||
| 268 | .description = "Has v_fmac_f32 and v_xnor_b32 instructions", | ||
| 269 | .dependencies = featureSet(&[_]Feature{}), | ||
| 270 | }; | ||
| 271 | result[@intFromEnum(Feature.dot10_insts)] = .{ | ||
| 272 | .llvm_name = "dot10-insts", | ||
| 273 | .description = "Has v_dot2_f32_f16 instruction", | ||
| 274 | .dependencies = featureSet(&[_]Feature{}), | ||
| 275 | }; | ||
| 276 | result[@intFromEnum(Feature.dot1_insts)] = .{ | ||
| 277 | .llvm_name = "dot1-insts", | ||
| 278 | .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", | ||
| 279 | .dependencies = featureSet(&[_]Feature{}), | ||
| 280 | }; | ||
| 281 | result[@intFromEnum(Feature.dot2_insts)] = .{ | ||
| 282 | .llvm_name = "dot2-insts", | ||
| 283 | .description = "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions", | ||
| 284 | .dependencies = featureSet(&[_]Feature{}), | ||
| 285 | }; | ||
| 286 | result[@intFromEnum(Feature.dot3_insts)] = .{ | ||
| 287 | .llvm_name = "dot3-insts", | ||
| 288 | .description = "Has v_dot8c_i32_i4 instruction", | ||
| 289 | .dependencies = featureSet(&[_]Feature{}), | ||
| 290 | }; | ||
| 291 | result[@intFromEnum(Feature.dot4_insts)] = .{ | ||
| 292 | .llvm_name = "dot4-insts", | ||
| 293 | .description = "Has v_dot2c_i32_i16 instruction", | ||
| 294 | .dependencies = featureSet(&[_]Feature{}), | ||
| 295 | }; | ||
| 296 | result[@intFromEnum(Feature.dot5_insts)] = .{ | ||
| 297 | .llvm_name = "dot5-insts", | ||
| 298 | .description = "Has v_dot2c_f32_f16 instruction", | ||
| 299 | .dependencies = featureSet(&[_]Feature{}), | ||
| 300 | }; | ||
| 301 | result[@intFromEnum(Feature.dot6_insts)] = .{ | ||
| 302 | .llvm_name = "dot6-insts", | ||
| 303 | .description = "Has v_dot4c_i32_i8 instruction", | ||
| 304 | .dependencies = featureSet(&[_]Feature{}), | ||
| 305 | }; | ||
| 306 | result[@intFromEnum(Feature.dot7_insts)] = .{ | ||
| 307 | .llvm_name = "dot7-insts", | ||
| 308 | .description = "Has v_dot4_u32_u8, v_dot8_u32_u4 instructions", | ||
| 309 | .dependencies = featureSet(&[_]Feature{}), | ||
| 310 | }; | ||
| 311 | result[@intFromEnum(Feature.dot8_insts)] = .{ | ||
| 312 | .llvm_name = "dot8-insts", | ||
| 313 | .description = "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions", | ||
| 314 | .dependencies = featureSet(&[_]Feature{}), | ||
| 315 | }; | ||
| 316 | result[@intFromEnum(Feature.dot9_insts)] = .{ | ||
| 317 | .llvm_name = "dot9-insts", | ||
| 318 | .description = "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16 instructions", | ||
| 319 | .dependencies = featureSet(&[_]Feature{}), | ||
| 320 | }; | ||
| 321 | result[@intFromEnum(Feature.dpp)] = .{ | ||
| 322 | .llvm_name = "dpp", | ||
| 323 | .description = "Support DPP (Data Parallel Primitives) extension", | ||
| 324 | .dependencies = featureSet(&[_]Feature{}), | ||
| 325 | }; | ||
| 326 | result[@intFromEnum(Feature.dpp8)] = .{ | ||
| 327 | .llvm_name = "dpp8", | ||
| 328 | .description = "Support DPP8 (Data Parallel Primitives) extension", | ||
| 329 | .dependencies = featureSet(&[_]Feature{}), | ||
| 330 | }; | ||
| 331 | result[@intFromEnum(Feature.dpp_64bit)] = .{ | ||
| 332 | .llvm_name = "dpp-64bit", | ||
| 333 | .description = "Support DPP (Data Parallel Primitives) extension", | ||
| 334 | .dependencies = featureSet(&[_]Feature{}), | ||
| 335 | }; | ||
| 336 | result[@intFromEnum(Feature.ds128)] = .{ | ||
| 337 | .llvm_name = "enable-ds128", | ||
| 338 | .description = "Use ds_{read|write}_b128", | ||
| 339 | .dependencies = featureSet(&[_]Feature{}), | ||
| 340 | }; | ||
| 341 | result[@intFromEnum(Feature.ds_src2_insts)] = .{ | ||
| 342 | .llvm_name = "ds-src2-insts", | ||
| 343 | .description = "Has ds_*_src2 instructions", | ||
| 344 | .dependencies = featureSet(&[_]Feature{}), | ||
| 345 | }; | ||
| 346 | result[@intFromEnum(Feature.extended_image_insts)] = .{ | ||
| 347 | .llvm_name = "extended-image-insts", | ||
| 348 | .description = "Support mips != 0, lod != 0, gather4, and get_lod", | ||
| 349 | .dependencies = featureSet(&[_]Feature{}), | ||
| 350 | }; | ||
| 351 | result[@intFromEnum(Feature.fast_denormal_f32)] = .{ | ||
| 352 | .llvm_name = "fast-denormal-f32", | ||
| 353 | .description = "Enabling denormals does not cause f32 instructions to run at f64 rates", | ||
| 354 | .dependencies = featureSet(&[_]Feature{}), | ||
| 355 | }; | ||
| 356 | result[@intFromEnum(Feature.fast_fmaf)] = .{ | ||
| 357 | .llvm_name = "fast-fmaf", | ||
| 358 | .description = "Assuming f32 fma is at least as fast as mul + add", | ||
| 359 | .dependencies = featureSet(&[_]Feature{}), | ||
| 360 | }; | ||
| 361 | result[@intFromEnum(Feature.flat_address_space)] = .{ | ||
| 362 | .llvm_name = "flat-address-space", | ||
| 363 | .description = "Support flat address space", | ||
| 364 | .dependencies = featureSet(&[_]Feature{}), | ||
| 365 | }; | ||
| 366 | result[@intFromEnum(Feature.flat_atomic_fadd_f32_inst)] = .{ | ||
| 367 | .llvm_name = "flat-atomic-fadd-f32-inst", | ||
| 368 | .description = "Has flat_atomic_add_f32 instruction", | ||
| 369 | .dependencies = featureSet(&[_]Feature{}), | ||
| 370 | }; | ||
| 371 | result[@intFromEnum(Feature.flat_for_global)] = .{ | ||
| 372 | .llvm_name = "flat-for-global", | ||
| 373 | .description = "Force to generate flat instruction for global", | ||
| 374 | .dependencies = featureSet(&[_]Feature{}), | ||
| 375 | }; | ||
| 376 | result[@intFromEnum(Feature.flat_global_insts)] = .{ | ||
| 377 | .llvm_name = "flat-global-insts", | ||
| 378 | .description = "Have global_* flat memory instructions", | ||
| 379 | .dependencies = featureSet(&[_]Feature{}), | ||
| 380 | }; | ||
| 381 | result[@intFromEnum(Feature.flat_inst_offsets)] = .{ | ||
| 382 | .llvm_name = "flat-inst-offsets", | ||
| 383 | .description = "Flat instructions have immediate offset addressing mode", | ||
| 384 | .dependencies = featureSet(&[_]Feature{}), | ||
| 385 | }; | ||
| 386 | result[@intFromEnum(Feature.flat_scratch)] = .{ | ||
| 387 | .llvm_name = "enable-flat-scratch", | ||
| 388 | .description = "Use scratch_* flat memory instructions to access scratch", | ||
| 389 | .dependencies = featureSet(&[_]Feature{}), | ||
| 390 | }; | ||
| 391 | result[@intFromEnum(Feature.flat_scratch_insts)] = .{ | ||
| 392 | .llvm_name = "flat-scratch-insts", | ||
| 393 | .description = "Have scratch_* flat memory instructions", | ||
| 394 | .dependencies = featureSet(&[_]Feature{}), | ||
| 395 | }; | ||
| 396 | result[@intFromEnum(Feature.flat_segment_offset_bug)] = .{ | ||
| 397 | .llvm_name = "flat-segment-offset-bug", | ||
| 398 | .description = "GFX10 bug where inst_offset is ignored when flat instructions access global memory", | ||
| 399 | .dependencies = featureSet(&[_]Feature{}), | ||
| 400 | }; | ||
| 401 | result[@intFromEnum(Feature.fma_mix_insts)] = .{ | ||
| 402 | .llvm_name = "fma-mix-insts", | ||
| 403 | .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", | ||
| 404 | .dependencies = featureSet(&[_]Feature{}), | ||
| 405 | }; | ||
| 406 | result[@intFromEnum(Feature.fmacf64_inst)] = .{ | ||
| 407 | .llvm_name = "fmacf64-inst", | ||
| 408 | .description = "Has v_fmac_f64 instruction", | ||
| 409 | .dependencies = featureSet(&[_]Feature{}), | ||
| 410 | }; | ||
| 411 | result[@intFromEnum(Feature.fmaf)] = .{ | ||
| 412 | .llvm_name = "fmaf", | ||
| 413 | .description = "Enable single precision FMA (not as fast as mul+add, but fused)", | ||
| 414 | .dependencies = featureSet(&[_]Feature{}), | ||
| 415 | }; | ||
| 416 | result[@intFromEnum(Feature.force_store_sc0_sc1)] = .{ | ||
| 417 | .llvm_name = "force-store-sc0-sc1", | ||
| 418 | .description = "Has SC0 and SC1 on stores", | ||
| 419 | .dependencies = featureSet(&[_]Feature{}), | ||
| 420 | }; | ||
| 421 | result[@intFromEnum(Feature.fp64)] = .{ | ||
| 422 | .llvm_name = "fp64", | ||
| 423 | .description = "Enable double precision operations", | ||
| 424 | .dependencies = featureSet(&[_]Feature{}), | ||
| 425 | }; | ||
| 426 | result[@intFromEnum(Feature.fp8_insts)] = .{ | ||
| 427 | .llvm_name = "fp8-insts", | ||
| 428 | .description = "Has fp8 and bf8 instructions", | ||
| 429 | .dependencies = featureSet(&[_]Feature{}), | ||
| 430 | }; | ||
| 431 | result[@intFromEnum(Feature.full_rate_64_ops)] = .{ | ||
| 432 | .llvm_name = "full-rate-64-ops", | ||
| 433 | .description = "Most fp64 instructions are full rate", | ||
| 434 | .dependencies = featureSet(&[_]Feature{}), | ||
| 435 | }; | ||
| 436 | result[@intFromEnum(Feature.g16)] = .{ | ||
| 437 | .llvm_name = "g16", | ||
| 438 | .description = "Support G16 for 16-bit gradient image operands", | ||
| 439 | .dependencies = featureSet(&[_]Feature{}), | ||
| 440 | }; | ||
| 441 | result[@intFromEnum(Feature.gcn3_encoding)] = .{ | ||
| 442 | .llvm_name = "gcn3-encoding", | ||
| 443 | .description = "Encoding format for VI", | ||
| 444 | .dependencies = featureSet(&[_]Feature{}), | ||
| 445 | }; | ||
| 446 | result[@intFromEnum(Feature.get_wave_id_inst)] = .{ | ||
| 447 | .llvm_name = "get-wave-id-inst", | ||
| 448 | .description = "Has s_get_waveid_in_workgroup instruction", | ||
| 449 | .dependencies = featureSet(&[_]Feature{}), | ||
| 450 | }; | ||
| 451 | result[@intFromEnum(Feature.gfx10)] = .{ | ||
| 452 | .llvm_name = "gfx10", | ||
| 453 | .description = "GFX10 GPU generation", | ||
| 454 | .dependencies = featureSet(&[_]Feature{ | ||
| 455 | .@"16_bit_insts", | ||
| 456 | .a16, | ||
| 457 | .add_no_carry_insts, | ||
| 458 | .aperture_regs, | ||
| 459 | .ci_insts, | ||
| 460 | .dpp, | ||
| 461 | .dpp8, | ||
| 462 | .extended_image_insts, | ||
| 463 | .fast_denormal_f32, | ||
| 464 | .fast_fmaf, | ||
| 465 | .flat_address_space, | ||
| 466 | .flat_global_insts, | ||
| 467 | .flat_inst_offsets, | ||
| 468 | .flat_scratch_insts, | ||
| 469 | .fma_mix_insts, | ||
| 470 | .fp64, | ||
| 471 | .g16, | ||
| 472 | .gfx10_insts, | ||
| 473 | .gfx8_insts, | ||
| 474 | .gfx9_insts, | ||
| 475 | .image_insts, | ||
| 476 | .int_clamp_insts, | ||
| 477 | .inv_2pi_inline_imm, | ||
| 478 | .localmemorysize65536, | ||
| 479 | .mimg_r128, | ||
| 480 | .movrel, | ||
| 481 | .no_data_dep_hazard, | ||
| 482 | .no_sdst_cmpx, | ||
| 483 | .pk_fmac_f16_inst, | ||
| 484 | .s_memrealtime, | ||
| 485 | .s_memtime_inst, | ||
| 486 | .sdwa, | ||
| 487 | .sdwa_omod, | ||
| 488 | .sdwa_scalar, | ||
| 489 | .sdwa_sdst, | ||
| 490 | .unaligned_buffer_access, | ||
| 491 | .unaligned_ds_access, | ||
| 492 | .vop3_literal, | ||
| 493 | .vop3p, | ||
| 494 | .vscnt, | ||
| 495 | }), | ||
| 496 | }; | ||
| 497 | result[@intFromEnum(Feature.gfx10_3_insts)] = .{ | ||
| 498 | .llvm_name = "gfx10-3-insts", | ||
| 499 | .description = "Additional instructions for GFX10.3", | ||
| 500 | .dependencies = featureSet(&[_]Feature{}), | ||
| 501 | }; | ||
| 502 | result[@intFromEnum(Feature.gfx10_a_encoding)] = .{ | ||
| 503 | .llvm_name = "gfx10_a-encoding", | ||
| 504 | .description = "Has BVH ray tracing instructions", | ||
| 505 | .dependencies = featureSet(&[_]Feature{}), | ||
| 506 | }; | ||
| 507 | result[@intFromEnum(Feature.gfx10_b_encoding)] = .{ | ||
| 508 | .llvm_name = "gfx10_b-encoding", | ||
| 509 | .description = "Encoding format GFX10_B", | ||
| 510 | .dependencies = featureSet(&[_]Feature{}), | ||
| 511 | }; | ||
| 512 | result[@intFromEnum(Feature.gfx10_insts)] = .{ | ||
| 513 | .llvm_name = "gfx10-insts", | ||
| 514 | .description = "Additional instructions for GFX10+", | ||
| 515 | .dependencies = featureSet(&[_]Feature{}), | ||
| 516 | }; | ||
| 517 | result[@intFromEnum(Feature.gfx11)] = .{ | ||
| 518 | .llvm_name = "gfx11", | ||
| 519 | .description = "GFX11 GPU generation", | ||
| 520 | .dependencies = featureSet(&[_]Feature{ | ||
| 521 | .@"16_bit_insts", | ||
| 522 | .a16, | ||
| 523 | .add_no_carry_insts, | ||
| 524 | .aperture_regs, | ||
| 525 | .ci_insts, | ||
| 526 | .dpp, | ||
| 527 | .dpp8, | ||
| 528 | .extended_image_insts, | ||
| 529 | .fast_denormal_f32, | ||
| 530 | .fast_fmaf, | ||
| 531 | .flat_address_space, | ||
| 532 | .flat_global_insts, | ||
| 533 | .flat_inst_offsets, | ||
| 534 | .flat_scratch_insts, | ||
| 535 | .fma_mix_insts, | ||
| 536 | .fp64, | ||
| 537 | .g16, | ||
| 538 | .gfx10_3_insts, | ||
| 539 | .gfx10_a_encoding, | ||
| 540 | .gfx10_b_encoding, | ||
| 541 | .gfx10_insts, | ||
| 542 | .gfx11_insts, | ||
| 543 | .gfx8_insts, | ||
| 544 | .gfx9_insts, | ||
| 545 | .int_clamp_insts, | ||
| 546 | .inv_2pi_inline_imm, | ||
| 547 | .localmemorysize65536, | ||
| 548 | .mimg_r128, | ||
| 549 | .movrel, | ||
| 550 | .no_data_dep_hazard, | ||
| 551 | .no_sdst_cmpx, | ||
| 552 | .pk_fmac_f16_inst, | ||
| 553 | .true16, | ||
| 554 | .unaligned_buffer_access, | ||
| 555 | .unaligned_ds_access, | ||
| 556 | .vop3_literal, | ||
| 557 | .vop3p, | ||
| 558 | .vopd, | ||
| 559 | .vscnt, | ||
| 560 | }), | ||
| 561 | }; | ||
| 562 | result[@intFromEnum(Feature.gfx11_full_vgprs)] = .{ | ||
| 563 | .llvm_name = "gfx11-full-vgprs", | ||
| 564 | .description = "GFX11 with 50% more physical VGPRs and 50% larger allocation granule than GFX10", | ||
| 565 | .dependencies = featureSet(&[_]Feature{}), | ||
| 566 | }; | ||
| 567 | result[@intFromEnum(Feature.gfx11_insts)] = .{ | ||
| 568 | .llvm_name = "gfx11-insts", | ||
| 569 | .description = "Additional instructions for GFX11+", | ||
| 570 | .dependencies = featureSet(&[_]Feature{}), | ||
| 571 | }; | ||
| 572 | result[@intFromEnum(Feature.gfx7_gfx8_gfx9_insts)] = .{ | ||
| 573 | .llvm_name = "gfx7-gfx8-gfx9-insts", | ||
| 574 | .description = "Instructions shared in GFX7, GFX8, GFX9", | ||
| 575 | .dependencies = featureSet(&[_]Feature{}), | ||
| 576 | }; | ||
| 577 | result[@intFromEnum(Feature.gfx8_insts)] = .{ | ||
| 578 | .llvm_name = "gfx8-insts", | ||
| 579 | .description = "Additional instructions for GFX8+", | ||
| 580 | .dependencies = featureSet(&[_]Feature{}), | ||
| 581 | }; | ||
| 582 | result[@intFromEnum(Feature.gfx9)] = .{ | ||
| 583 | .llvm_name = "gfx9", | ||
| 584 | .description = "GFX9 GPU generation", | ||
| 585 | .dependencies = featureSet(&[_]Feature{ | ||
| 586 | .@"16_bit_insts", | ||
| 587 | .a16, | ||
| 588 | .add_no_carry_insts, | ||
| 589 | .aperture_regs, | ||
| 590 | .ci_insts, | ||
| 591 | .dpp, | ||
| 592 | .fast_denormal_f32, | ||
| 593 | .fast_fmaf, | ||
| 594 | .flat_address_space, | ||
| 595 | .flat_global_insts, | ||
| 596 | .flat_inst_offsets, | ||
| 597 | .flat_scratch_insts, | ||
| 598 | .fp64, | ||
| 599 | .gcn3_encoding, | ||
| 600 | .gfx7_gfx8_gfx9_insts, | ||
| 601 | .gfx8_insts, | ||
| 602 | .gfx9_insts, | ||
| 603 | .int_clamp_insts, | ||
| 604 | .inv_2pi_inline_imm, | ||
| 605 | .localmemorysize65536, | ||
| 606 | .negative_scratch_offset_bug, | ||
| 607 | .r128_a16, | ||
| 608 | .s_memrealtime, | ||
| 609 | .s_memtime_inst, | ||
| 610 | .scalar_atomics, | ||
| 611 | .scalar_flat_scratch_insts, | ||
| 612 | .scalar_stores, | ||
| 613 | .sdwa, | ||
| 614 | .sdwa_omod, | ||
| 615 | .sdwa_scalar, | ||
| 616 | .sdwa_sdst, | ||
| 617 | .unaligned_buffer_access, | ||
| 618 | .unaligned_ds_access, | ||
| 619 | .vgpr_index_mode, | ||
| 620 | .vop3p, | ||
| 621 | .wavefrontsize64, | ||
| 622 | .xnack_support, | ||
| 623 | }), | ||
| 624 | }; | ||
| 625 | result[@intFromEnum(Feature.gfx90a_insts)] = .{ | ||
| 626 | .llvm_name = "gfx90a-insts", | ||
| 627 | .description = "Additional instructions for GFX90A+", | ||
| 628 | .dependencies = featureSet(&[_]Feature{}), | ||
| 629 | }; | ||
| 630 | result[@intFromEnum(Feature.gfx940_insts)] = .{ | ||
| 631 | .llvm_name = "gfx940-insts", | ||
| 632 | .description = "Additional instructions for GFX940+", | ||
| 633 | .dependencies = featureSet(&[_]Feature{}), | ||
| 634 | }; | ||
| 635 | result[@intFromEnum(Feature.gfx9_insts)] = .{ | ||
| 636 | .llvm_name = "gfx9-insts", | ||
| 637 | .description = "Additional instructions for GFX9+", | ||
| 638 | .dependencies = featureSet(&[_]Feature{}), | ||
| 639 | }; | ||
| 640 | result[@intFromEnum(Feature.half_rate_64_ops)] = .{ | ||
| 641 | .llvm_name = "half-rate-64-ops", | ||
| 642 | .description = "Most fp64 instructions are half rate instead of quarter", | ||
| 643 | .dependencies = featureSet(&[_]Feature{}), | ||
| 644 | }; | ||
| 645 | result[@intFromEnum(Feature.image_gather4_d16_bug)] = .{ | ||
| 646 | .llvm_name = "image-gather4-d16-bug", | ||
| 647 | .description = "Image Gather4 D16 hardware bug", | ||
| 648 | .dependencies = featureSet(&[_]Feature{}), | ||
| 649 | }; | ||
| 650 | result[@intFromEnum(Feature.image_insts)] = .{ | ||
| 651 | .llvm_name = "image-insts", | ||
| 652 | .description = "Support image instructions", | ||
| 653 | .dependencies = featureSet(&[_]Feature{}), | ||
| 654 | }; | ||
| 655 | result[@intFromEnum(Feature.image_store_d16_bug)] = .{ | ||
| 656 | .llvm_name = "image-store-d16-bug", | ||
| 657 | .description = "Image Store D16 hardware bug", | ||
| 658 | .dependencies = featureSet(&[_]Feature{}), | ||
| 659 | }; | ||
| 660 | result[@intFromEnum(Feature.inst_fwd_prefetch_bug)] = .{ | ||
| 661 | .llvm_name = "inst-fwd-prefetch-bug", | ||
| 662 | .description = "S_INST_PREFETCH instruction causes shader to hang", | ||
| 663 | .dependencies = featureSet(&[_]Feature{}), | ||
| 664 | }; | ||
| 665 | result[@intFromEnum(Feature.int_clamp_insts)] = .{ | ||
| 666 | .llvm_name = "int-clamp-insts", | ||
| 667 | .description = "Support clamp for integer destination", | ||
| 668 | .dependencies = featureSet(&[_]Feature{}), | ||
| 669 | }; | ||
| 670 | result[@intFromEnum(Feature.inv_2pi_inline_imm)] = .{ | ||
| 671 | .llvm_name = "inv-2pi-inline-imm", | ||
| 672 | .description = "Has 1 / (2 * pi) as inline immediate", | ||
| 673 | .dependencies = featureSet(&[_]Feature{}), | ||
| 674 | }; | ||
| 675 | result[@intFromEnum(Feature.lds_branch_vmem_war_hazard)] = .{ | ||
| 676 | .llvm_name = "lds-branch-vmem-war-hazard", | ||
| 677 | .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", | ||
| 678 | .dependencies = featureSet(&[_]Feature{}), | ||
| 679 | }; | ||
| 680 | result[@intFromEnum(Feature.lds_misaligned_bug)] = .{ | ||
| 681 | .llvm_name = "lds-misaligned-bug", | ||
| 682 | .description = "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode", | ||
| 683 | .dependencies = featureSet(&[_]Feature{}), | ||
| 684 | }; | ||
| 685 | result[@intFromEnum(Feature.ldsbankcount16)] = .{ | ||
| 686 | .llvm_name = "ldsbankcount16", | ||
| 687 | .description = "The number of LDS banks per compute unit.", | ||
| 688 | .dependencies = featureSet(&[_]Feature{}), | ||
| 689 | }; | ||
| 690 | result[@intFromEnum(Feature.ldsbankcount32)] = .{ | ||
| 691 | .llvm_name = "ldsbankcount32", | ||
| 692 | .description = "The number of LDS banks per compute unit.", | ||
| 693 | .dependencies = featureSet(&[_]Feature{}), | ||
| 694 | }; | ||
| 695 | result[@intFromEnum(Feature.load_store_opt)] = .{ | ||
| 696 | .llvm_name = "load-store-opt", | ||
| 697 | .description = "Enable SI load/store optimizer pass", | ||
| 698 | .dependencies = featureSet(&[_]Feature{}), | ||
| 699 | }; | ||
| 700 | result[@intFromEnum(Feature.localmemorysize32768)] = .{ | ||
| 701 | .llvm_name = "localmemorysize32768", | ||
| 702 | .description = "The size of local memory in bytes", | ||
| 703 | .dependencies = featureSet(&[_]Feature{}), | ||
| 704 | }; | ||
| 705 | result[@intFromEnum(Feature.localmemorysize65536)] = .{ | ||
| 706 | .llvm_name = "localmemorysize65536", | ||
| 707 | .description = "The size of local memory in bytes", | ||
| 708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.mad_intra_fwd_bug)] = .{ | ||
| 711 | .llvm_name = "mad-intra-fwd-bug", | ||
| 712 | .description = "MAD_U64/I64 intra instruction forwarding bug", | ||
| 713 | .dependencies = featureSet(&[_]Feature{}), | ||
| 714 | }; | ||
| 715 | result[@intFromEnum(Feature.mad_mac_f32_insts)] = .{ | ||
| 716 | .llvm_name = "mad-mac-f32-insts", | ||
| 717 | .description = "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions", | ||
| 718 | .dependencies = featureSet(&[_]Feature{}), | ||
| 719 | }; | ||
| 720 | result[@intFromEnum(Feature.mad_mix_insts)] = .{ | ||
| 721 | .llvm_name = "mad-mix-insts", | ||
| 722 | .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", | ||
| 723 | .dependencies = featureSet(&[_]Feature{}), | ||
| 724 | }; | ||
| 725 | result[@intFromEnum(Feature.mai_insts)] = .{ | ||
| 726 | .llvm_name = "mai-insts", | ||
| 727 | .description = "Has mAI instructions", | ||
| 728 | .dependencies = featureSet(&[_]Feature{}), | ||
| 729 | }; | ||
| 730 | result[@intFromEnum(Feature.max_private_element_size_16)] = .{ | ||
| 731 | .llvm_name = "max-private-element-size-16", | ||
| 732 | .description = "Maximum private access size may be 16", | ||
| 733 | .dependencies = featureSet(&[_]Feature{}), | ||
| 734 | }; | ||
| 735 | result[@intFromEnum(Feature.max_private_element_size_4)] = .{ | ||
| 736 | .llvm_name = "max-private-element-size-4", | ||
| 737 | .description = "Maximum private access size may be 4", | ||
| 738 | .dependencies = featureSet(&[_]Feature{}), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.max_private_element_size_8)] = .{ | ||
| 741 | .llvm_name = "max-private-element-size-8", | ||
| 742 | .description = "Maximum private access size may be 8", | ||
| 743 | .dependencies = featureSet(&[_]Feature{}), | ||
| 744 | }; | ||
| 745 | result[@intFromEnum(Feature.mfma_inline_literal_bug)] = .{ | ||
| 746 | .llvm_name = "mfma-inline-literal-bug", | ||
| 747 | .description = "MFMA cannot use inline literal as SrcC", | ||
| 748 | .dependencies = featureSet(&[_]Feature{}), | ||
| 749 | }; | ||
| 750 | result[@intFromEnum(Feature.mimg_r128)] = .{ | ||
| 751 | .llvm_name = "mimg-r128", | ||
| 752 | .description = "Support 128-bit texture resources", | ||
| 753 | .dependencies = featureSet(&[_]Feature{}), | ||
| 754 | }; | ||
| 755 | result[@intFromEnum(Feature.movrel)] = .{ | ||
| 756 | .llvm_name = "movrel", | ||
| 757 | .description = "Has v_movrel*_b32 instructions", | ||
| 758 | .dependencies = featureSet(&[_]Feature{}), | ||
| 759 | }; | ||
| 760 | result[@intFromEnum(Feature.negative_scratch_offset_bug)] = .{ | ||
| 761 | .llvm_name = "negative-scratch-offset-bug", | ||
| 762 | .description = "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9", | ||
| 763 | .dependencies = featureSet(&[_]Feature{}), | ||
| 764 | }; | ||
| 765 | result[@intFromEnum(Feature.negative_unaligned_scratch_offset_bug)] = .{ | ||
| 766 | .llvm_name = "negative-unaligned-scratch-offset-bug", | ||
| 767 | .description = "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10", | ||
| 768 | .dependencies = featureSet(&[_]Feature{}), | ||
| 769 | }; | ||
| 770 | result[@intFromEnum(Feature.no_data_dep_hazard)] = .{ | ||
| 771 | .llvm_name = "no-data-dep-hazard", | ||
| 772 | .description = "Does not need SW waitstates", | ||
| 773 | .dependencies = featureSet(&[_]Feature{}), | ||
| 774 | }; | ||
| 775 | result[@intFromEnum(Feature.no_sdst_cmpx)] = .{ | ||
| 776 | .llvm_name = "no-sdst-cmpx", | ||
| 777 | .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", | ||
| 778 | .dependencies = featureSet(&[_]Feature{}), | ||
| 779 | }; | ||
| 780 | result[@intFromEnum(Feature.nsa_clause_bug)] = .{ | ||
| 781 | .llvm_name = "nsa-clause-bug", | ||
| 782 | .description = "MIMG-NSA in a hard clause has unpredictable results on GFX10.1", | ||
| 783 | .dependencies = featureSet(&[_]Feature{}), | ||
| 784 | }; | ||
| 785 | result[@intFromEnum(Feature.nsa_encoding)] = .{ | ||
| 786 | .llvm_name = "nsa-encoding", | ||
| 787 | .description = "Support NSA encoding for image instructions", | ||
| 788 | .dependencies = featureSet(&[_]Feature{}), | ||
| 789 | }; | ||
| 790 | result[@intFromEnum(Feature.nsa_to_vmem_bug)] = .{ | ||
| 791 | .llvm_name = "nsa-to-vmem-bug", | ||
| 792 | .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", | ||
| 793 | .dependencies = featureSet(&[_]Feature{}), | ||
| 794 | }; | ||
| 795 | result[@intFromEnum(Feature.offset_3f_bug)] = .{ | ||
| 796 | .llvm_name = "offset-3f-bug", | ||
| 797 | .description = "Branch offset of 3f hardware bug", | ||
| 798 | .dependencies = featureSet(&[_]Feature{}), | ||
| 799 | }; | ||
| 800 | result[@intFromEnum(Feature.packed_fp32_ops)] = .{ | ||
| 801 | .llvm_name = "packed-fp32-ops", | ||
| 802 | .description = "Support packed fp32 instructions", | ||
| 803 | .dependencies = featureSet(&[_]Feature{}), | ||
| 804 | }; | ||
| 805 | result[@intFromEnum(Feature.packed_tid)] = .{ | ||
| 806 | .llvm_name = "packed-tid", | ||
| 807 | .description = "Workitem IDs are packed into v0 at kernel launch", | ||
| 808 | .dependencies = featureSet(&[_]Feature{}), | ||
| 809 | }; | ||
| 810 | result[@intFromEnum(Feature.partial_nsa_encoding)] = .{ | ||
| 811 | .llvm_name = "partial-nsa-encoding", | ||
| 812 | .description = "Support partial NSA encoding for image instructions", | ||
| 813 | .dependencies = featureSet(&[_]Feature{}), | ||
| 814 | }; | ||
| 815 | result[@intFromEnum(Feature.pk_fmac_f16_inst)] = .{ | ||
| 816 | .llvm_name = "pk-fmac-f16-inst", | ||
| 817 | .description = "Has v_pk_fmac_f16 instruction", | ||
| 818 | .dependencies = featureSet(&[_]Feature{}), | ||
| 819 | }; | ||
| 820 | result[@intFromEnum(Feature.promote_alloca)] = .{ | ||
| 821 | .llvm_name = "promote-alloca", | ||
| 822 | .description = "Enable promote alloca pass", | ||
| 823 | .dependencies = featureSet(&[_]Feature{}), | ||
| 824 | }; | ||
| 825 | result[@intFromEnum(Feature.prt_strict_null)] = .{ | ||
| 826 | .llvm_name = "enable-prt-strict-null", | ||
| 827 | .description = "Enable zeroing of result registers for sparse texture fetches", | ||
| 828 | .dependencies = featureSet(&[_]Feature{}), | ||
| 829 | }; | ||
| 830 | result[@intFromEnum(Feature.r128_a16)] = .{ | ||
| 831 | .llvm_name = "r128-a16", | ||
| 832 | .description = "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128", | ||
| 833 | .dependencies = featureSet(&[_]Feature{}), | ||
| 834 | }; | ||
| 835 | result[@intFromEnum(Feature.s_memrealtime)] = .{ | ||
| 836 | .llvm_name = "s-memrealtime", | ||
| 837 | .description = "Has s_memrealtime instruction", | ||
| 838 | .dependencies = featureSet(&[_]Feature{}), | ||
| 839 | }; | ||
| 840 | result[@intFromEnum(Feature.s_memtime_inst)] = .{ | ||
| 841 | .llvm_name = "s-memtime-inst", | ||
| 842 | .description = "Has s_memtime instruction", | ||
| 843 | .dependencies = featureSet(&[_]Feature{}), | ||
| 844 | }; | ||
| 845 | result[@intFromEnum(Feature.scalar_atomics)] = .{ | ||
| 846 | .llvm_name = "scalar-atomics", | ||
| 847 | .description = "Has atomic scalar memory instructions", | ||
| 848 | .dependencies = featureSet(&[_]Feature{}), | ||
| 849 | }; | ||
| 850 | result[@intFromEnum(Feature.scalar_flat_scratch_insts)] = .{ | ||
| 851 | .llvm_name = "scalar-flat-scratch-insts", | ||
| 852 | .description = "Have s_scratch_* flat memory instructions", | ||
| 853 | .dependencies = featureSet(&[_]Feature{}), | ||
| 854 | }; | ||
| 855 | result[@intFromEnum(Feature.scalar_stores)] = .{ | ||
| 856 | .llvm_name = "scalar-stores", | ||
| 857 | .description = "Has store scalar memory instructions", | ||
| 858 | .dependencies = featureSet(&[_]Feature{}), | ||
| 859 | }; | ||
| 860 | result[@intFromEnum(Feature.sdwa)] = .{ | ||
| 861 | .llvm_name = "sdwa", | ||
| 862 | .description = "Support SDWA (Sub-DWORD Addressing) extension", | ||
| 863 | .dependencies = featureSet(&[_]Feature{}), | ||
| 864 | }; | ||
| 865 | result[@intFromEnum(Feature.sdwa_mav)] = .{ | ||
| 866 | .llvm_name = "sdwa-mav", | ||
| 867 | .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", | ||
| 868 | .dependencies = featureSet(&[_]Feature{}), | ||
| 869 | }; | ||
| 870 | result[@intFromEnum(Feature.sdwa_omod)] = .{ | ||
| 871 | .llvm_name = "sdwa-omod", | ||
| 872 | .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", | ||
| 873 | .dependencies = featureSet(&[_]Feature{}), | ||
| 874 | }; | ||
| 875 | result[@intFromEnum(Feature.sdwa_out_mods_vopc)] = .{ | ||
| 876 | .llvm_name = "sdwa-out-mods-vopc", | ||
| 877 | .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", | ||
| 878 | .dependencies = featureSet(&[_]Feature{}), | ||
| 879 | }; | ||
| 880 | result[@intFromEnum(Feature.sdwa_scalar)] = .{ | ||
| 881 | .llvm_name = "sdwa-scalar", | ||
| 882 | .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", | ||
| 883 | .dependencies = featureSet(&[_]Feature{}), | ||
| 884 | }; | ||
| 885 | result[@intFromEnum(Feature.sdwa_sdst)] = .{ | ||
| 886 | .llvm_name = "sdwa-sdst", | ||
| 887 | .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", | ||
| 888 | .dependencies = featureSet(&[_]Feature{}), | ||
| 889 | }; | ||
| 890 | result[@intFromEnum(Feature.sea_islands)] = .{ | ||
| 891 | .llvm_name = "sea-islands", | ||
| 892 | .description = "SEA_ISLANDS GPU generation", | ||
| 893 | .dependencies = featureSet(&[_]Feature{ | ||
| 894 | .ci_insts, | ||
| 895 | .ds_src2_insts, | ||
| 896 | .extended_image_insts, | ||
| 897 | .flat_address_space, | ||
| 898 | .fp64, | ||
| 899 | .gfx7_gfx8_gfx9_insts, | ||
| 900 | .image_insts, | ||
| 901 | .localmemorysize65536, | ||
| 902 | .mad_mac_f32_insts, | ||
| 903 | .mimg_r128, | ||
| 904 | .movrel, | ||
| 905 | .s_memtime_inst, | ||
| 906 | .trig_reduced_range, | ||
| 907 | .unaligned_buffer_access, | ||
| 908 | .wavefrontsize64, | ||
| 909 | }), | ||
| 910 | }; | ||
| 911 | result[@intFromEnum(Feature.sgpr_init_bug)] = .{ | ||
| 912 | .llvm_name = "sgpr-init-bug", | ||
| 913 | .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", | ||
| 914 | .dependencies = featureSet(&[_]Feature{}), | ||
| 915 | }; | ||
| 916 | result[@intFromEnum(Feature.shader_cycles_register)] = .{ | ||
| 917 | .llvm_name = "shader-cycles-register", | ||
| 918 | .description = "Has SHADER_CYCLES hardware register", | ||
| 919 | .dependencies = featureSet(&[_]Feature{}), | ||
| 920 | }; | ||
| 921 | result[@intFromEnum(Feature.si_scheduler)] = .{ | ||
| 922 | .llvm_name = "si-scheduler", | ||
| 923 | .description = "Enable SI Machine Scheduler", | ||
| 924 | .dependencies = featureSet(&[_]Feature{}), | ||
| 925 | }; | ||
| 926 | result[@intFromEnum(Feature.smem_to_vector_write_hazard)] = .{ | ||
| 927 | .llvm_name = "smem-to-vector-write-hazard", | ||
| 928 | .description = "s_load_dword followed by v_cmp page faults", | ||
| 929 | .dependencies = featureSet(&[_]Feature{}), | ||
| 930 | }; | ||
| 931 | result[@intFromEnum(Feature.southern_islands)] = .{ | ||
| 932 | .llvm_name = "southern-islands", | ||
| 933 | .description = "SOUTHERN_ISLANDS GPU generation", | ||
| 934 | .dependencies = featureSet(&[_]Feature{ | ||
| 935 | .ds_src2_insts, | ||
| 936 | .extended_image_insts, | ||
| 937 | .fp64, | ||
| 938 | .image_insts, | ||
| 939 | .ldsbankcount32, | ||
| 940 | .localmemorysize32768, | ||
| 941 | .mad_mac_f32_insts, | ||
| 942 | .mimg_r128, | ||
| 943 | .movrel, | ||
| 944 | .s_memtime_inst, | ||
| 945 | .trig_reduced_range, | ||
| 946 | .wavefrontsize64, | ||
| 947 | }), | ||
| 948 | }; | ||
| 949 | result[@intFromEnum(Feature.sramecc)] = .{ | ||
| 950 | .llvm_name = "sramecc", | ||
| 951 | .description = "Enable SRAMECC", | ||
| 952 | .dependencies = featureSet(&[_]Feature{}), | ||
| 953 | }; | ||
| 954 | result[@intFromEnum(Feature.sramecc_support)] = .{ | ||
| 955 | .llvm_name = "sramecc-support", | ||
| 956 | .description = "Hardware supports SRAMECC", | ||
| 957 | .dependencies = featureSet(&[_]Feature{}), | ||
| 958 | }; | ||
| 959 | result[@intFromEnum(Feature.tgsplit)] = .{ | ||
| 960 | .llvm_name = "tgsplit", | ||
| 961 | .description = "Enable threadgroup split execution", | ||
| 962 | .dependencies = featureSet(&[_]Feature{}), | ||
| 963 | }; | ||
| 964 | result[@intFromEnum(Feature.trap_handler)] = .{ | ||
| 965 | .llvm_name = "trap-handler", | ||
| 966 | .description = "Trap handler support", | ||
| 967 | .dependencies = featureSet(&[_]Feature{}), | ||
| 968 | }; | ||
| 969 | result[@intFromEnum(Feature.trig_reduced_range)] = .{ | ||
| 970 | .llvm_name = "trig-reduced-range", | ||
| 971 | .description = "Requires use of fract on arguments to trig instructions", | ||
| 972 | .dependencies = featureSet(&[_]Feature{}), | ||
| 973 | }; | ||
| 974 | result[@intFromEnum(Feature.true16)] = .{ | ||
| 975 | .llvm_name = "true16", | ||
| 976 | .description = "True 16-bit operand instructions", | ||
| 977 | .dependencies = featureSet(&[_]Feature{}), | ||
| 978 | }; | ||
| 979 | result[@intFromEnum(Feature.unaligned_access_mode)] = .{ | ||
| 980 | .llvm_name = "unaligned-access-mode", | ||
| 981 | .description = "Enable unaligned global, local and region loads and stores if the hardware supports it", | ||
| 982 | .dependencies = featureSet(&[_]Feature{}), | ||
| 983 | }; | ||
| 984 | result[@intFromEnum(Feature.unaligned_buffer_access)] = .{ | ||
| 985 | .llvm_name = "unaligned-buffer-access", | ||
| 986 | .description = "Hardware supports unaligned global loads and stores", | ||
| 987 | .dependencies = featureSet(&[_]Feature{}), | ||
| 988 | }; | ||
| 989 | result[@intFromEnum(Feature.unaligned_ds_access)] = .{ | ||
| 990 | .llvm_name = "unaligned-ds-access", | ||
| 991 | .description = "Hardware supports unaligned local and region loads and stores", | ||
| 992 | .dependencies = featureSet(&[_]Feature{}), | ||
| 993 | }; | ||
| 994 | result[@intFromEnum(Feature.unaligned_scratch_access)] = .{ | ||
| 995 | .llvm_name = "unaligned-scratch-access", | ||
| 996 | .description = "Support unaligned scratch loads and stores", | ||
| 997 | .dependencies = featureSet(&[_]Feature{}), | ||
| 998 | }; | ||
| 999 | result[@intFromEnum(Feature.unpacked_d16_vmem)] = .{ | ||
| 1000 | .llvm_name = "unpacked-d16-vmem", | ||
| 1001 | .description = "Has unpacked d16 vmem instructions", | ||
| 1002 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1003 | }; | ||
| 1004 | result[@intFromEnum(Feature.unsafe_ds_offset_folding)] = .{ | ||
| 1005 | .llvm_name = "unsafe-ds-offset-folding", | ||
| 1006 | .description = "Force using DS instruction immediate offsets on SI", | ||
| 1007 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1008 | }; | ||
| 1009 | result[@intFromEnum(Feature.user_sgpr_init16_bug)] = .{ | ||
| 1010 | .llvm_name = "user-sgpr-init16-bug", | ||
| 1011 | .description = "Bug requiring at least 16 user+system SGPRs to be enabled", | ||
| 1012 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1013 | }; | ||
| 1014 | result[@intFromEnum(Feature.valu_trans_use_hazard)] = .{ | ||
| 1015 | .llvm_name = "valu-trans-use-hazard", | ||
| 1016 | .description = "Hazard when TRANS instructions are closely followed by a use of the result", | ||
| 1017 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1018 | }; | ||
| 1019 | result[@intFromEnum(Feature.vcmpx_exec_war_hazard)] = .{ | ||
| 1020 | .llvm_name = "vcmpx-exec-war-hazard", | ||
| 1021 | .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", | ||
| 1022 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1023 | }; | ||
| 1024 | result[@intFromEnum(Feature.vcmpx_permlane_hazard)] = .{ | ||
| 1025 | .llvm_name = "vcmpx-permlane-hazard", | ||
| 1026 | .description = "TODO: describe me", | ||
| 1027 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1028 | }; | ||
| 1029 | result[@intFromEnum(Feature.vgpr_index_mode)] = .{ | ||
| 1030 | .llvm_name = "vgpr-index-mode", | ||
| 1031 | .description = "Has VGPR mode register indexing", | ||
| 1032 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1033 | }; | ||
| 1034 | result[@intFromEnum(Feature.vmem_to_scalar_write_hazard)] = .{ | ||
| 1035 | .llvm_name = "vmem-to-scalar-write-hazard", | ||
| 1036 | .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", | ||
| 1037 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1038 | }; | ||
| 1039 | result[@intFromEnum(Feature.volcanic_islands)] = .{ | ||
| 1040 | .llvm_name = "volcanic-islands", | ||
| 1041 | .description = "VOLCANIC_ISLANDS GPU generation", | ||
| 1042 | .dependencies = featureSet(&[_]Feature{ | ||
| 1043 | .@"16_bit_insts", | ||
| 1044 | .ci_insts, | ||
| 1045 | .dpp, | ||
| 1046 | .ds_src2_insts, | ||
| 1047 | .extended_image_insts, | ||
| 1048 | .fast_denormal_f32, | ||
| 1049 | .flat_address_space, | ||
| 1050 | .fp64, | ||
| 1051 | .gcn3_encoding, | ||
| 1052 | .gfx7_gfx8_gfx9_insts, | ||
| 1053 | .gfx8_insts, | ||
| 1054 | .image_insts, | ||
| 1055 | .int_clamp_insts, | ||
| 1056 | .inv_2pi_inline_imm, | ||
| 1057 | .localmemorysize65536, | ||
| 1058 | .mad_mac_f32_insts, | ||
| 1059 | .mimg_r128, | ||
| 1060 | .movrel, | ||
| 1061 | .s_memrealtime, | ||
| 1062 | .s_memtime_inst, | ||
| 1063 | .scalar_stores, | ||
| 1064 | .sdwa, | ||
| 1065 | .sdwa_mav, | ||
| 1066 | .sdwa_out_mods_vopc, | ||
| 1067 | .trig_reduced_range, | ||
| 1068 | .unaligned_buffer_access, | ||
| 1069 | .vgpr_index_mode, | ||
| 1070 | .wavefrontsize64, | ||
| 1071 | }), | ||
| 1072 | }; | ||
| 1073 | result[@intFromEnum(Feature.vop3_literal)] = .{ | ||
| 1074 | .llvm_name = "vop3-literal", | ||
| 1075 | .description = "Can use one literal in VOP3", | ||
| 1076 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1077 | }; | ||
| 1078 | result[@intFromEnum(Feature.vop3p)] = .{ | ||
| 1079 | .llvm_name = "vop3p", | ||
| 1080 | .description = "Has VOP3P packed instructions", | ||
| 1081 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1082 | }; | ||
| 1083 | result[@intFromEnum(Feature.vopd)] = .{ | ||
| 1084 | .llvm_name = "vopd", | ||
| 1085 | .description = "Has VOPD dual issue wave32 instructions", | ||
| 1086 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1087 | }; | ||
| 1088 | result[@intFromEnum(Feature.vscnt)] = .{ | ||
| 1089 | .llvm_name = "vscnt", | ||
| 1090 | .description = "Has separate store vscnt counter", | ||
| 1091 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1092 | }; | ||
| 1093 | result[@intFromEnum(Feature.wavefrontsize16)] = .{ | ||
| 1094 | .llvm_name = "wavefrontsize16", | ||
| 1095 | .description = "The number of threads per wavefront", | ||
| 1096 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1097 | }; | ||
| 1098 | result[@intFromEnum(Feature.wavefrontsize32)] = .{ | ||
| 1099 | .llvm_name = "wavefrontsize32", | ||
| 1100 | .description = "The number of threads per wavefront", | ||
| 1101 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1102 | }; | ||
| 1103 | result[@intFromEnum(Feature.wavefrontsize64)] = .{ | ||
| 1104 | .llvm_name = "wavefrontsize64", | ||
| 1105 | .description = "The number of threads per wavefront", | ||
| 1106 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1107 | }; | ||
| 1108 | result[@intFromEnum(Feature.xnack)] = .{ | ||
| 1109 | .llvm_name = "xnack", | ||
| 1110 | .description = "Enable XNACK support", | ||
| 1111 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1112 | }; | ||
| 1113 | result[@intFromEnum(Feature.xnack_support)] = .{ | ||
| 1114 | .llvm_name = "xnack-support", | ||
| 1115 | .description = "Hardware supports XNACK", | ||
| 1116 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1117 | }; | ||
| 1118 | const ti = @typeInfo(Feature); | ||
| 1119 | for (&result, 0..) |*elem, i| { | ||
| 1120 | elem.index = i; | ||
| 1121 | elem.name = ti.Enum.fields[i].name; | ||
| 1122 | } | ||
| 1123 | break :blk result; | ||
| 1124 | }; | ||
| 1125 | |||
| 1126 | pub const cpu = struct { | ||
| 1127 | pub const bonaire = CpuModel{ | ||
| 1128 | .name = "bonaire", | ||
| 1129 | .llvm_name = "bonaire", | ||
| 1130 | .features = featureSet(&[_]Feature{ | ||
| 1131 | .ldsbankcount32, | ||
| 1132 | .sea_islands, | ||
| 1133 | }), | ||
| 1134 | }; | ||
| 1135 | pub const carrizo = CpuModel{ | ||
| 1136 | .name = "carrizo", | ||
| 1137 | .llvm_name = "carrizo", | ||
| 1138 | .features = featureSet(&[_]Feature{ | ||
| 1139 | .fast_fmaf, | ||
| 1140 | .half_rate_64_ops, | ||
| 1141 | .ldsbankcount32, | ||
| 1142 | .unpacked_d16_vmem, | ||
| 1143 | .volcanic_islands, | ||
| 1144 | .xnack_support, | ||
| 1145 | }), | ||
| 1146 | }; | ||
| 1147 | pub const fiji = CpuModel{ | ||
| 1148 | .name = "fiji", | ||
| 1149 | .llvm_name = "fiji", | ||
| 1150 | .features = featureSet(&[_]Feature{ | ||
| 1151 | .ldsbankcount32, | ||
| 1152 | .unpacked_d16_vmem, | ||
| 1153 | .volcanic_islands, | ||
| 1154 | }), | ||
| 1155 | }; | ||
| 1156 | pub const generic = CpuModel{ | ||
| 1157 | .name = "generic", | ||
| 1158 | .llvm_name = "generic", | ||
| 1159 | .features = featureSet(&[_]Feature{ | ||
| 1160 | .wavefrontsize64, | ||
| 1161 | }), | ||
| 1162 | }; | ||
| 1163 | pub const generic_hsa = CpuModel{ | ||
| 1164 | .name = "generic_hsa", | ||
| 1165 | .llvm_name = "generic-hsa", | ||
| 1166 | .features = featureSet(&[_]Feature{ | ||
| 1167 | .flat_address_space, | ||
| 1168 | .wavefrontsize64, | ||
| 1169 | }), | ||
| 1170 | }; | ||
| 1171 | pub const gfx1010 = CpuModel{ | ||
| 1172 | .name = "gfx1010", | ||
| 1173 | .llvm_name = "gfx1010", | ||
| 1174 | .features = featureSet(&[_]Feature{ | ||
| 1175 | .back_off_barrier, | ||
| 1176 | .dl_insts, | ||
| 1177 | .ds_src2_insts, | ||
| 1178 | .flat_segment_offset_bug, | ||
| 1179 | .get_wave_id_inst, | ||
| 1180 | .gfx10, | ||
| 1181 | .inst_fwd_prefetch_bug, | ||
| 1182 | .lds_branch_vmem_war_hazard, | ||
| 1183 | .lds_misaligned_bug, | ||
| 1184 | .ldsbankcount32, | ||
| 1185 | .mad_mac_f32_insts, | ||
| 1186 | .negative_unaligned_scratch_offset_bug, | ||
| 1187 | .nsa_clause_bug, | ||
| 1188 | .nsa_encoding, | ||
| 1189 | .nsa_to_vmem_bug, | ||
| 1190 | .offset_3f_bug, | ||
| 1191 | .scalar_atomics, | ||
| 1192 | .scalar_flat_scratch_insts, | ||
| 1193 | .scalar_stores, | ||
| 1194 | .smem_to_vector_write_hazard, | ||
| 1195 | .vcmpx_exec_war_hazard, | ||
| 1196 | .vcmpx_permlane_hazard, | ||
| 1197 | .vmem_to_scalar_write_hazard, | ||
| 1198 | .wavefrontsize32, | ||
| 1199 | .xnack_support, | ||
| 1200 | }), | ||
| 1201 | }; | ||
| 1202 | pub const gfx1011 = CpuModel{ | ||
| 1203 | .name = "gfx1011", | ||
| 1204 | .llvm_name = "gfx1011", | ||
| 1205 | .features = featureSet(&[_]Feature{ | ||
| 1206 | .back_off_barrier, | ||
| 1207 | .dl_insts, | ||
| 1208 | .dot10_insts, | ||
| 1209 | .dot1_insts, | ||
| 1210 | .dot2_insts, | ||
| 1211 | .dot5_insts, | ||
| 1212 | .dot6_insts, | ||
| 1213 | .dot7_insts, | ||
| 1214 | .ds_src2_insts, | ||
| 1215 | .flat_segment_offset_bug, | ||
| 1216 | .get_wave_id_inst, | ||
| 1217 | .gfx10, | ||
| 1218 | .inst_fwd_prefetch_bug, | ||
| 1219 | .lds_branch_vmem_war_hazard, | ||
| 1220 | .lds_misaligned_bug, | ||
| 1221 | .ldsbankcount32, | ||
| 1222 | .mad_mac_f32_insts, | ||
| 1223 | .negative_unaligned_scratch_offset_bug, | ||
| 1224 | .nsa_clause_bug, | ||
| 1225 | .nsa_encoding, | ||
| 1226 | .nsa_to_vmem_bug, | ||
| 1227 | .offset_3f_bug, | ||
| 1228 | .scalar_atomics, | ||
| 1229 | .scalar_flat_scratch_insts, | ||
| 1230 | .scalar_stores, | ||
| 1231 | .smem_to_vector_write_hazard, | ||
| 1232 | .vcmpx_exec_war_hazard, | ||
| 1233 | .vcmpx_permlane_hazard, | ||
| 1234 | .vmem_to_scalar_write_hazard, | ||
| 1235 | .wavefrontsize32, | ||
| 1236 | .xnack_support, | ||
| 1237 | }), | ||
| 1238 | }; | ||
| 1239 | pub const gfx1012 = CpuModel{ | ||
| 1240 | .name = "gfx1012", | ||
| 1241 | .llvm_name = "gfx1012", | ||
| 1242 | .features = featureSet(&[_]Feature{ | ||
| 1243 | .back_off_barrier, | ||
| 1244 | .dl_insts, | ||
| 1245 | .dot10_insts, | ||
| 1246 | .dot1_insts, | ||
| 1247 | .dot2_insts, | ||
| 1248 | .dot5_insts, | ||
| 1249 | .dot6_insts, | ||
| 1250 | .dot7_insts, | ||
| 1251 | .ds_src2_insts, | ||
| 1252 | .flat_segment_offset_bug, | ||
| 1253 | .get_wave_id_inst, | ||
| 1254 | .gfx10, | ||
| 1255 | .inst_fwd_prefetch_bug, | ||
| 1256 | .lds_branch_vmem_war_hazard, | ||
| 1257 | .lds_misaligned_bug, | ||
| 1258 | .ldsbankcount32, | ||
| 1259 | .mad_mac_f32_insts, | ||
| 1260 | .negative_unaligned_scratch_offset_bug, | ||
| 1261 | .nsa_clause_bug, | ||
| 1262 | .nsa_encoding, | ||
| 1263 | .nsa_to_vmem_bug, | ||
| 1264 | .offset_3f_bug, | ||
| 1265 | .scalar_atomics, | ||
| 1266 | .scalar_flat_scratch_insts, | ||
| 1267 | .scalar_stores, | ||
| 1268 | .smem_to_vector_write_hazard, | ||
| 1269 | .vcmpx_exec_war_hazard, | ||
| 1270 | .vcmpx_permlane_hazard, | ||
| 1271 | .vmem_to_scalar_write_hazard, | ||
| 1272 | .wavefrontsize32, | ||
| 1273 | .xnack_support, | ||
| 1274 | }), | ||
| 1275 | }; | ||
| 1276 | pub const gfx1013 = CpuModel{ | ||
| 1277 | .name = "gfx1013", | ||
| 1278 | .llvm_name = "gfx1013", | ||
| 1279 | .features = featureSet(&[_]Feature{ | ||
| 1280 | .back_off_barrier, | ||
| 1281 | .dl_insts, | ||
| 1282 | .ds_src2_insts, | ||
| 1283 | .flat_segment_offset_bug, | ||
| 1284 | .get_wave_id_inst, | ||
| 1285 | .gfx10, | ||
| 1286 | .gfx10_a_encoding, | ||
| 1287 | .inst_fwd_prefetch_bug, | ||
| 1288 | .lds_branch_vmem_war_hazard, | ||
| 1289 | .lds_misaligned_bug, | ||
| 1290 | .ldsbankcount32, | ||
| 1291 | .mad_mac_f32_insts, | ||
| 1292 | .negative_unaligned_scratch_offset_bug, | ||
| 1293 | .nsa_clause_bug, | ||
| 1294 | .nsa_encoding, | ||
| 1295 | .nsa_to_vmem_bug, | ||
| 1296 | .offset_3f_bug, | ||
| 1297 | .scalar_atomics, | ||
| 1298 | .scalar_flat_scratch_insts, | ||
| 1299 | .scalar_stores, | ||
| 1300 | .smem_to_vector_write_hazard, | ||
| 1301 | .vcmpx_exec_war_hazard, | ||
| 1302 | .vcmpx_permlane_hazard, | ||
| 1303 | .vmem_to_scalar_write_hazard, | ||
| 1304 | .wavefrontsize32, | ||
| 1305 | .xnack_support, | ||
| 1306 | }), | ||
| 1307 | }; | ||
| 1308 | pub const gfx1030 = CpuModel{ | ||
| 1309 | .name = "gfx1030", | ||
| 1310 | .llvm_name = "gfx1030", | ||
| 1311 | .features = featureSet(&[_]Feature{ | ||
| 1312 | .back_off_barrier, | ||
| 1313 | .dl_insts, | ||
| 1314 | .dot10_insts, | ||
| 1315 | .dot1_insts, | ||
| 1316 | .dot2_insts, | ||
| 1317 | .dot5_insts, | ||
| 1318 | .dot6_insts, | ||
| 1319 | .dot7_insts, | ||
| 1320 | .gfx10, | ||
| 1321 | .gfx10_3_insts, | ||
| 1322 | .gfx10_a_encoding, | ||
| 1323 | .gfx10_b_encoding, | ||
| 1324 | .ldsbankcount32, | ||
| 1325 | .nsa_encoding, | ||
| 1326 | .shader_cycles_register, | ||
| 1327 | .wavefrontsize32, | ||
| 1328 | }), | ||
| 1329 | }; | ||
| 1330 | pub const gfx1031 = CpuModel{ | ||
| 1331 | .name = "gfx1031", | ||
| 1332 | .llvm_name = "gfx1031", | ||
| 1333 | .features = featureSet(&[_]Feature{ | ||
| 1334 | .back_off_barrier, | ||
| 1335 | .dl_insts, | ||
| 1336 | .dot10_insts, | ||
| 1337 | .dot1_insts, | ||
| 1338 | .dot2_insts, | ||
| 1339 | .dot5_insts, | ||
| 1340 | .dot6_insts, | ||
| 1341 | .dot7_insts, | ||
| 1342 | .gfx10, | ||
| 1343 | .gfx10_3_insts, | ||
| 1344 | .gfx10_a_encoding, | ||
| 1345 | .gfx10_b_encoding, | ||
| 1346 | .ldsbankcount32, | ||
| 1347 | .nsa_encoding, | ||
| 1348 | .shader_cycles_register, | ||
| 1349 | .wavefrontsize32, | ||
| 1350 | }), | ||
| 1351 | }; | ||
| 1352 | pub const gfx1032 = CpuModel{ | ||
| 1353 | .name = "gfx1032", | ||
| 1354 | .llvm_name = "gfx1032", | ||
| 1355 | .features = featureSet(&[_]Feature{ | ||
| 1356 | .back_off_barrier, | ||
| 1357 | .dl_insts, | ||
| 1358 | .dot10_insts, | ||
| 1359 | .dot1_insts, | ||
| 1360 | .dot2_insts, | ||
| 1361 | .dot5_insts, | ||
| 1362 | .dot6_insts, | ||
| 1363 | .dot7_insts, | ||
| 1364 | .gfx10, | ||
| 1365 | .gfx10_3_insts, | ||
| 1366 | .gfx10_a_encoding, | ||
| 1367 | .gfx10_b_encoding, | ||
| 1368 | .ldsbankcount32, | ||
| 1369 | .nsa_encoding, | ||
| 1370 | .shader_cycles_register, | ||
| 1371 | .wavefrontsize32, | ||
| 1372 | }), | ||
| 1373 | }; | ||
| 1374 | pub const gfx1033 = CpuModel{ | ||
| 1375 | .name = "gfx1033", | ||
| 1376 | .llvm_name = "gfx1033", | ||
| 1377 | .features = featureSet(&[_]Feature{ | ||
| 1378 | .back_off_barrier, | ||
| 1379 | .dl_insts, | ||
| 1380 | .dot10_insts, | ||
| 1381 | .dot1_insts, | ||
| 1382 | .dot2_insts, | ||
| 1383 | .dot5_insts, | ||
| 1384 | .dot6_insts, | ||
| 1385 | .dot7_insts, | ||
| 1386 | .gfx10, | ||
| 1387 | .gfx10_3_insts, | ||
| 1388 | .gfx10_a_encoding, | ||
| 1389 | .gfx10_b_encoding, | ||
| 1390 | .ldsbankcount32, | ||
| 1391 | .nsa_encoding, | ||
| 1392 | .shader_cycles_register, | ||
| 1393 | .wavefrontsize32, | ||
| 1394 | }), | ||
| 1395 | }; | ||
| 1396 | pub const gfx1034 = CpuModel{ | ||
| 1397 | .name = "gfx1034", | ||
| 1398 | .llvm_name = "gfx1034", | ||
| 1399 | .features = featureSet(&[_]Feature{ | ||
| 1400 | .back_off_barrier, | ||
| 1401 | .dl_insts, | ||
| 1402 | .dot10_insts, | ||
| 1403 | .dot1_insts, | ||
| 1404 | .dot2_insts, | ||
| 1405 | .dot5_insts, | ||
| 1406 | .dot6_insts, | ||
| 1407 | .dot7_insts, | ||
| 1408 | .gfx10, | ||
| 1409 | .gfx10_3_insts, | ||
| 1410 | .gfx10_a_encoding, | ||
| 1411 | .gfx10_b_encoding, | ||
| 1412 | .ldsbankcount32, | ||
| 1413 | .nsa_encoding, | ||
| 1414 | .shader_cycles_register, | ||
| 1415 | .wavefrontsize32, | ||
| 1416 | }), | ||
| 1417 | }; | ||
| 1418 | pub const gfx1035 = CpuModel{ | ||
| 1419 | .name = "gfx1035", | ||
| 1420 | .llvm_name = "gfx1035", | ||
| 1421 | .features = featureSet(&[_]Feature{ | ||
| 1422 | .back_off_barrier, | ||
| 1423 | .dl_insts, | ||
| 1424 | .dot10_insts, | ||
| 1425 | .dot1_insts, | ||
| 1426 | .dot2_insts, | ||
| 1427 | .dot5_insts, | ||
| 1428 | .dot6_insts, | ||
| 1429 | .dot7_insts, | ||
| 1430 | .gfx10, | ||
| 1431 | .gfx10_3_insts, | ||
| 1432 | .gfx10_a_encoding, | ||
| 1433 | .gfx10_b_encoding, | ||
| 1434 | .ldsbankcount32, | ||
| 1435 | .nsa_encoding, | ||
| 1436 | .shader_cycles_register, | ||
| 1437 | .wavefrontsize32, | ||
| 1438 | }), | ||
| 1439 | }; | ||
| 1440 | pub const gfx1036 = CpuModel{ | ||
| 1441 | .name = "gfx1036", | ||
| 1442 | .llvm_name = "gfx1036", | ||
| 1443 | .features = featureSet(&[_]Feature{ | ||
| 1444 | .back_off_barrier, | ||
| 1445 | .dl_insts, | ||
| 1446 | .dot10_insts, | ||
| 1447 | .dot1_insts, | ||
| 1448 | .dot2_insts, | ||
| 1449 | .dot5_insts, | ||
| 1450 | .dot6_insts, | ||
| 1451 | .dot7_insts, | ||
| 1452 | .gfx10, | ||
| 1453 | .gfx10_3_insts, | ||
| 1454 | .gfx10_a_encoding, | ||
| 1455 | .gfx10_b_encoding, | ||
| 1456 | .ldsbankcount32, | ||
| 1457 | .nsa_encoding, | ||
| 1458 | .shader_cycles_register, | ||
| 1459 | .wavefrontsize32, | ||
| 1460 | }), | ||
| 1461 | }; | ||
| 1462 | pub const gfx1100 = CpuModel{ | ||
| 1463 | .name = "gfx1100", | ||
| 1464 | .llvm_name = "gfx1100", | ||
| 1465 | .features = featureSet(&[_]Feature{ | ||
| 1466 | .architected_flat_scratch, | ||
| 1467 | .atomic_fadd_no_rtn_insts, | ||
| 1468 | .atomic_fadd_rtn_insts, | ||
| 1469 | .dl_insts, | ||
| 1470 | .dot10_insts, | ||
| 1471 | .dot5_insts, | ||
| 1472 | .dot7_insts, | ||
| 1473 | .dot8_insts, | ||
| 1474 | .dot9_insts, | ||
| 1475 | .flat_atomic_fadd_f32_inst, | ||
| 1476 | .gfx11, | ||
| 1477 | .gfx11_full_vgprs, | ||
| 1478 | .image_insts, | ||
| 1479 | .ldsbankcount32, | ||
| 1480 | .mad_intra_fwd_bug, | ||
| 1481 | .nsa_encoding, | ||
| 1482 | .packed_tid, | ||
| 1483 | .partial_nsa_encoding, | ||
| 1484 | .shader_cycles_register, | ||
| 1485 | .user_sgpr_init16_bug, | ||
| 1486 | .valu_trans_use_hazard, | ||
| 1487 | .vcmpx_permlane_hazard, | ||
| 1488 | .wavefrontsize32, | ||
| 1489 | }), | ||
| 1490 | }; | ||
| 1491 | pub const gfx1101 = CpuModel{ | ||
| 1492 | .name = "gfx1101", | ||
| 1493 | .llvm_name = "gfx1101", | ||
| 1494 | .features = featureSet(&[_]Feature{ | ||
| 1495 | .architected_flat_scratch, | ||
| 1496 | .atomic_fadd_no_rtn_insts, | ||
| 1497 | .atomic_fadd_rtn_insts, | ||
| 1498 | .dl_insts, | ||
| 1499 | .dot10_insts, | ||
| 1500 | .dot5_insts, | ||
| 1501 | .dot7_insts, | ||
| 1502 | .dot8_insts, | ||
| 1503 | .dot9_insts, | ||
| 1504 | .flat_atomic_fadd_f32_inst, | ||
| 1505 | .gfx11, | ||
| 1506 | .gfx11_full_vgprs, | ||
| 1507 | .image_insts, | ||
| 1508 | .ldsbankcount32, | ||
| 1509 | .mad_intra_fwd_bug, | ||
| 1510 | .nsa_encoding, | ||
| 1511 | .packed_tid, | ||
| 1512 | .partial_nsa_encoding, | ||
| 1513 | .shader_cycles_register, | ||
| 1514 | .valu_trans_use_hazard, | ||
| 1515 | .vcmpx_permlane_hazard, | ||
| 1516 | .wavefrontsize32, | ||
| 1517 | }), | ||
| 1518 | }; | ||
| 1519 | pub const gfx1102 = CpuModel{ | ||
| 1520 | .name = "gfx1102", | ||
| 1521 | .llvm_name = "gfx1102", | ||
| 1522 | .features = featureSet(&[_]Feature{ | ||
| 1523 | .architected_flat_scratch, | ||
| 1524 | .atomic_fadd_no_rtn_insts, | ||
| 1525 | .atomic_fadd_rtn_insts, | ||
| 1526 | .dl_insts, | ||
| 1527 | .dot10_insts, | ||
| 1528 | .dot5_insts, | ||
| 1529 | .dot7_insts, | ||
| 1530 | .dot8_insts, | ||
| 1531 | .dot9_insts, | ||
| 1532 | .flat_atomic_fadd_f32_inst, | ||
| 1533 | .gfx11, | ||
| 1534 | .image_insts, | ||
| 1535 | .ldsbankcount32, | ||
| 1536 | .mad_intra_fwd_bug, | ||
| 1537 | .nsa_encoding, | ||
| 1538 | .packed_tid, | ||
| 1539 | .partial_nsa_encoding, | ||
| 1540 | .shader_cycles_register, | ||
| 1541 | .user_sgpr_init16_bug, | ||
| 1542 | .valu_trans_use_hazard, | ||
| 1543 | .vcmpx_permlane_hazard, | ||
| 1544 | .wavefrontsize32, | ||
| 1545 | }), | ||
| 1546 | }; | ||
| 1547 | pub const gfx1103 = CpuModel{ | ||
| 1548 | .name = "gfx1103", | ||
| 1549 | .llvm_name = "gfx1103", | ||
| 1550 | .features = featureSet(&[_]Feature{ | ||
| 1551 | .architected_flat_scratch, | ||
| 1552 | .atomic_fadd_no_rtn_insts, | ||
| 1553 | .atomic_fadd_rtn_insts, | ||
| 1554 | .dl_insts, | ||
| 1555 | .dot10_insts, | ||
| 1556 | .dot5_insts, | ||
| 1557 | .dot7_insts, | ||
| 1558 | .dot8_insts, | ||
| 1559 | .dot9_insts, | ||
| 1560 | .flat_atomic_fadd_f32_inst, | ||
| 1561 | .gfx11, | ||
| 1562 | .image_insts, | ||
| 1563 | .ldsbankcount32, | ||
| 1564 | .mad_intra_fwd_bug, | ||
| 1565 | .nsa_encoding, | ||
| 1566 | .packed_tid, | ||
| 1567 | .partial_nsa_encoding, | ||
| 1568 | .shader_cycles_register, | ||
| 1569 | .valu_trans_use_hazard, | ||
| 1570 | .vcmpx_permlane_hazard, | ||
| 1571 | .wavefrontsize32, | ||
| 1572 | }), | ||
| 1573 | }; | ||
| 1574 | pub const gfx1150 = CpuModel{ | ||
| 1575 | .name = "gfx1150", | ||
| 1576 | .llvm_name = "gfx1150", | ||
| 1577 | .features = featureSet(&[_]Feature{ | ||
| 1578 | .architected_flat_scratch, | ||
| 1579 | .atomic_fadd_no_rtn_insts, | ||
| 1580 | .atomic_fadd_rtn_insts, | ||
| 1581 | .dl_insts, | ||
| 1582 | .dot10_insts, | ||
| 1583 | .dot5_insts, | ||
| 1584 | .dot7_insts, | ||
| 1585 | .dot8_insts, | ||
| 1586 | .dot9_insts, | ||
| 1587 | .flat_atomic_fadd_f32_inst, | ||
| 1588 | .gfx11, | ||
| 1589 | .image_insts, | ||
| 1590 | .ldsbankcount32, | ||
| 1591 | .mad_intra_fwd_bug, | ||
| 1592 | .nsa_encoding, | ||
| 1593 | .packed_tid, | ||
| 1594 | .partial_nsa_encoding, | ||
| 1595 | .shader_cycles_register, | ||
| 1596 | .vcmpx_permlane_hazard, | ||
| 1597 | .wavefrontsize32, | ||
| 1598 | }), | ||
| 1599 | }; | ||
| 1600 | pub const gfx1151 = CpuModel{ | ||
| 1601 | .name = "gfx1151", | ||
| 1602 | .llvm_name = "gfx1151", | ||
| 1603 | .features = featureSet(&[_]Feature{ | ||
| 1604 | .architected_flat_scratch, | ||
| 1605 | .atomic_fadd_no_rtn_insts, | ||
| 1606 | .atomic_fadd_rtn_insts, | ||
| 1607 | .dl_insts, | ||
| 1608 | .dot10_insts, | ||
| 1609 | .dot5_insts, | ||
| 1610 | .dot7_insts, | ||
| 1611 | .dot8_insts, | ||
| 1612 | .dot9_insts, | ||
| 1613 | .flat_atomic_fadd_f32_inst, | ||
| 1614 | .gfx11, | ||
| 1615 | .gfx11_full_vgprs, | ||
| 1616 | .image_insts, | ||
| 1617 | .ldsbankcount32, | ||
| 1618 | .mad_intra_fwd_bug, | ||
| 1619 | .nsa_encoding, | ||
| 1620 | .packed_tid, | ||
| 1621 | .partial_nsa_encoding, | ||
| 1622 | .shader_cycles_register, | ||
| 1623 | .vcmpx_permlane_hazard, | ||
| 1624 | .wavefrontsize32, | ||
| 1625 | }), | ||
| 1626 | }; | ||
| 1627 | pub const gfx600 = CpuModel{ | ||
| 1628 | .name = "gfx600", | ||
| 1629 | .llvm_name = "gfx600", | ||
| 1630 | .features = featureSet(&[_]Feature{ | ||
| 1631 | .fast_fmaf, | ||
| 1632 | .half_rate_64_ops, | ||
| 1633 | .southern_islands, | ||
| 1634 | }), | ||
| 1635 | }; | ||
| 1636 | pub const gfx601 = CpuModel{ | ||
| 1637 | .name = "gfx601", | ||
| 1638 | .llvm_name = "gfx601", | ||
| 1639 | .features = featureSet(&[_]Feature{ | ||
| 1640 | .southern_islands, | ||
| 1641 | }), | ||
| 1642 | }; | ||
| 1643 | pub const gfx602 = CpuModel{ | ||
| 1644 | .name = "gfx602", | ||
| 1645 | .llvm_name = "gfx602", | ||
| 1646 | .features = featureSet(&[_]Feature{ | ||
| 1647 | .southern_islands, | ||
| 1648 | }), | ||
| 1649 | }; | ||
| 1650 | pub const gfx700 = CpuModel{ | ||
| 1651 | .name = "gfx700", | ||
| 1652 | .llvm_name = "gfx700", | ||
| 1653 | .features = featureSet(&[_]Feature{ | ||
| 1654 | .ldsbankcount32, | ||
| 1655 | .sea_islands, | ||
| 1656 | }), | ||
| 1657 | }; | ||
| 1658 | pub const gfx701 = CpuModel{ | ||
| 1659 | .name = "gfx701", | ||
| 1660 | .llvm_name = "gfx701", | ||
| 1661 | .features = featureSet(&[_]Feature{ | ||
| 1662 | .fast_fmaf, | ||
| 1663 | .half_rate_64_ops, | ||
| 1664 | .ldsbankcount32, | ||
| 1665 | .sea_islands, | ||
| 1666 | }), | ||
| 1667 | }; | ||
| 1668 | pub const gfx702 = CpuModel{ | ||
| 1669 | .name = "gfx702", | ||
| 1670 | .llvm_name = "gfx702", | ||
| 1671 | .features = featureSet(&[_]Feature{ | ||
| 1672 | .fast_fmaf, | ||
| 1673 | .ldsbankcount16, | ||
| 1674 | .sea_islands, | ||
| 1675 | }), | ||
| 1676 | }; | ||
| 1677 | pub const gfx703 = CpuModel{ | ||
| 1678 | .name = "gfx703", | ||
| 1679 | .llvm_name = "gfx703", | ||
| 1680 | .features = featureSet(&[_]Feature{ | ||
| 1681 | .ldsbankcount16, | ||
| 1682 | .sea_islands, | ||
| 1683 | }), | ||
| 1684 | }; | ||
| 1685 | pub const gfx704 = CpuModel{ | ||
| 1686 | .name = "gfx704", | ||
| 1687 | .llvm_name = "gfx704", | ||
| 1688 | .features = featureSet(&[_]Feature{ | ||
| 1689 | .ldsbankcount32, | ||
| 1690 | .sea_islands, | ||
| 1691 | }), | ||
| 1692 | }; | ||
| 1693 | pub const gfx705 = CpuModel{ | ||
| 1694 | .name = "gfx705", | ||
| 1695 | .llvm_name = "gfx705", | ||
| 1696 | .features = featureSet(&[_]Feature{ | ||
| 1697 | .ldsbankcount16, | ||
| 1698 | .sea_islands, | ||
| 1699 | }), | ||
| 1700 | }; | ||
| 1701 | pub const gfx801 = CpuModel{ | ||
| 1702 | .name = "gfx801", | ||
| 1703 | .llvm_name = "gfx801", | ||
| 1704 | .features = featureSet(&[_]Feature{ | ||
| 1705 | .fast_fmaf, | ||
| 1706 | .half_rate_64_ops, | ||
| 1707 | .ldsbankcount32, | ||
| 1708 | .unpacked_d16_vmem, | ||
| 1709 | .volcanic_islands, | ||
| 1710 | .xnack_support, | ||
| 1711 | }), | ||
| 1712 | }; | ||
| 1713 | pub const gfx802 = CpuModel{ | ||
| 1714 | .name = "gfx802", | ||
| 1715 | .llvm_name = "gfx802", | ||
| 1716 | .features = featureSet(&[_]Feature{ | ||
| 1717 | .ldsbankcount32, | ||
| 1718 | .sgpr_init_bug, | ||
| 1719 | .unpacked_d16_vmem, | ||
| 1720 | .volcanic_islands, | ||
| 1721 | }), | ||
| 1722 | }; | ||
| 1723 | pub const gfx803 = CpuModel{ | ||
| 1724 | .name = "gfx803", | ||
| 1725 | .llvm_name = "gfx803", | ||
| 1726 | .features = featureSet(&[_]Feature{ | ||
| 1727 | .ldsbankcount32, | ||
| 1728 | .unpacked_d16_vmem, | ||
| 1729 | .volcanic_islands, | ||
| 1730 | }), | ||
| 1731 | }; | ||
| 1732 | pub const gfx805 = CpuModel{ | ||
| 1733 | .name = "gfx805", | ||
| 1734 | .llvm_name = "gfx805", | ||
| 1735 | .features = featureSet(&[_]Feature{ | ||
| 1736 | .ldsbankcount32, | ||
| 1737 | .sgpr_init_bug, | ||
| 1738 | .unpacked_d16_vmem, | ||
| 1739 | .volcanic_islands, | ||
| 1740 | }), | ||
| 1741 | }; | ||
| 1742 | pub const gfx810 = CpuModel{ | ||
| 1743 | .name = "gfx810", | ||
| 1744 | .llvm_name = "gfx810", | ||
| 1745 | .features = featureSet(&[_]Feature{ | ||
| 1746 | .image_gather4_d16_bug, | ||
| 1747 | .image_store_d16_bug, | ||
| 1748 | .ldsbankcount16, | ||
| 1749 | .volcanic_islands, | ||
| 1750 | .xnack_support, | ||
| 1751 | }), | ||
| 1752 | }; | ||
| 1753 | pub const gfx900 = CpuModel{ | ||
| 1754 | .name = "gfx900", | ||
| 1755 | .llvm_name = "gfx900", | ||
| 1756 | .features = featureSet(&[_]Feature{ | ||
| 1757 | .ds_src2_insts, | ||
| 1758 | .extended_image_insts, | ||
| 1759 | .gfx9, | ||
| 1760 | .image_gather4_d16_bug, | ||
| 1761 | .image_insts, | ||
| 1762 | .ldsbankcount32, | ||
| 1763 | .mad_mac_f32_insts, | ||
| 1764 | .mad_mix_insts, | ||
| 1765 | }), | ||
| 1766 | }; | ||
| 1767 | pub const gfx902 = CpuModel{ | ||
| 1768 | .name = "gfx902", | ||
| 1769 | .llvm_name = "gfx902", | ||
| 1770 | .features = featureSet(&[_]Feature{ | ||
| 1771 | .ds_src2_insts, | ||
| 1772 | .extended_image_insts, | ||
| 1773 | .gfx9, | ||
| 1774 | .image_gather4_d16_bug, | ||
| 1775 | .image_insts, | ||
| 1776 | .ldsbankcount32, | ||
| 1777 | .mad_mac_f32_insts, | ||
| 1778 | .mad_mix_insts, | ||
| 1779 | }), | ||
| 1780 | }; | ||
| 1781 | pub const gfx904 = CpuModel{ | ||
| 1782 | .name = "gfx904", | ||
| 1783 | .llvm_name = "gfx904", | ||
| 1784 | .features = featureSet(&[_]Feature{ | ||
| 1785 | .ds_src2_insts, | ||
| 1786 | .extended_image_insts, | ||
| 1787 | .fma_mix_insts, | ||
| 1788 | .gfx9, | ||
| 1789 | .image_gather4_d16_bug, | ||
| 1790 | .image_insts, | ||
| 1791 | .ldsbankcount32, | ||
| 1792 | .mad_mac_f32_insts, | ||
| 1793 | }), | ||
| 1794 | }; | ||
| 1795 | pub const gfx906 = CpuModel{ | ||
| 1796 | .name = "gfx906", | ||
| 1797 | .llvm_name = "gfx906", | ||
| 1798 | .features = featureSet(&[_]Feature{ | ||
| 1799 | .dl_insts, | ||
| 1800 | .dot10_insts, | ||
| 1801 | .dot1_insts, | ||
| 1802 | .dot2_insts, | ||
| 1803 | .dot7_insts, | ||
| 1804 | .ds_src2_insts, | ||
| 1805 | .extended_image_insts, | ||
| 1806 | .fma_mix_insts, | ||
| 1807 | .gfx9, | ||
| 1808 | .half_rate_64_ops, | ||
| 1809 | .image_gather4_d16_bug, | ||
| 1810 | .image_insts, | ||
| 1811 | .ldsbankcount32, | ||
| 1812 | .mad_mac_f32_insts, | ||
| 1813 | .sramecc_support, | ||
| 1814 | }), | ||
| 1815 | }; | ||
| 1816 | pub const gfx908 = CpuModel{ | ||
| 1817 | .name = "gfx908", | ||
| 1818 | .llvm_name = "gfx908", | ||
| 1819 | .features = featureSet(&[_]Feature{ | ||
| 1820 | .atomic_buffer_global_pk_add_f16_no_rtn_insts, | ||
| 1821 | .atomic_fadd_no_rtn_insts, | ||
| 1822 | .dl_insts, | ||
| 1823 | .dot10_insts, | ||
| 1824 | .dot1_insts, | ||
| 1825 | .dot2_insts, | ||
| 1826 | .dot3_insts, | ||
| 1827 | .dot4_insts, | ||
| 1828 | .dot5_insts, | ||
| 1829 | .dot6_insts, | ||
| 1830 | .dot7_insts, | ||
| 1831 | .ds_src2_insts, | ||
| 1832 | .extended_image_insts, | ||
| 1833 | .fma_mix_insts, | ||
| 1834 | .gfx9, | ||
| 1835 | .half_rate_64_ops, | ||
| 1836 | .image_gather4_d16_bug, | ||
| 1837 | .image_insts, | ||
| 1838 | .ldsbankcount32, | ||
| 1839 | .mad_mac_f32_insts, | ||
| 1840 | .mai_insts, | ||
| 1841 | .mfma_inline_literal_bug, | ||
| 1842 | .pk_fmac_f16_inst, | ||
| 1843 | .sramecc_support, | ||
| 1844 | }), | ||
| 1845 | }; | ||
| 1846 | pub const gfx909 = CpuModel{ | ||
| 1847 | .name = "gfx909", | ||
| 1848 | .llvm_name = "gfx909", | ||
| 1849 | .features = featureSet(&[_]Feature{ | ||
| 1850 | .ds_src2_insts, | ||
| 1851 | .extended_image_insts, | ||
| 1852 | .gfx9, | ||
| 1853 | .image_gather4_d16_bug, | ||
| 1854 | .image_insts, | ||
| 1855 | .ldsbankcount32, | ||
| 1856 | .mad_mac_f32_insts, | ||
| 1857 | .mad_mix_insts, | ||
| 1858 | }), | ||
| 1859 | }; | ||
| 1860 | pub const gfx90a = CpuModel{ | ||
| 1861 | .name = "gfx90a", | ||
| 1862 | .llvm_name = "gfx90a", | ||
| 1863 | .features = featureSet(&[_]Feature{ | ||
| 1864 | .atomic_buffer_global_pk_add_f16_insts, | ||
| 1865 | .atomic_fadd_no_rtn_insts, | ||
| 1866 | .atomic_fadd_rtn_insts, | ||
| 1867 | .back_off_barrier, | ||
| 1868 | .dl_insts, | ||
| 1869 | .dot10_insts, | ||
| 1870 | .dot1_insts, | ||
| 1871 | .dot2_insts, | ||
| 1872 | .dot3_insts, | ||
| 1873 | .dot4_insts, | ||
| 1874 | .dot5_insts, | ||
| 1875 | .dot6_insts, | ||
| 1876 | .dot7_insts, | ||
| 1877 | .dpp_64bit, | ||
| 1878 | .fma_mix_insts, | ||
| 1879 | .fmacf64_inst, | ||
| 1880 | .full_rate_64_ops, | ||
| 1881 | .gfx9, | ||
| 1882 | .gfx90a_insts, | ||
| 1883 | .image_insts, | ||
| 1884 | .ldsbankcount32, | ||
| 1885 | .mad_mac_f32_insts, | ||
| 1886 | .mai_insts, | ||
| 1887 | .packed_fp32_ops, | ||
| 1888 | .packed_tid, | ||
| 1889 | .pk_fmac_f16_inst, | ||
| 1890 | .sramecc_support, | ||
| 1891 | }), | ||
| 1892 | }; | ||
| 1893 | pub const gfx90c = CpuModel{ | ||
| 1894 | .name = "gfx90c", | ||
| 1895 | .llvm_name = "gfx90c", | ||
| 1896 | .features = featureSet(&[_]Feature{ | ||
| 1897 | .ds_src2_insts, | ||
| 1898 | .extended_image_insts, | ||
| 1899 | .gfx9, | ||
| 1900 | .image_gather4_d16_bug, | ||
| 1901 | .image_insts, | ||
| 1902 | .ldsbankcount32, | ||
| 1903 | .mad_mac_f32_insts, | ||
| 1904 | .mad_mix_insts, | ||
| 1905 | }), | ||
| 1906 | }; | ||
| 1907 | pub const gfx940 = CpuModel{ | ||
| 1908 | .name = "gfx940", | ||
| 1909 | .llvm_name = "gfx940", | ||
| 1910 | .features = featureSet(&[_]Feature{ | ||
| 1911 | .architected_flat_scratch, | ||
| 1912 | .atomic_buffer_global_pk_add_f16_insts, | ||
| 1913 | .atomic_ds_pk_add_16_insts, | ||
| 1914 | .atomic_fadd_no_rtn_insts, | ||
| 1915 | .atomic_fadd_rtn_insts, | ||
| 1916 | .atomic_flat_pk_add_16_insts, | ||
| 1917 | .atomic_global_pk_add_bf16_inst, | ||
| 1918 | .back_off_barrier, | ||
| 1919 | .dl_insts, | ||
| 1920 | .dot10_insts, | ||
| 1921 | .dot1_insts, | ||
| 1922 | .dot2_insts, | ||
| 1923 | .dot3_insts, | ||
| 1924 | .dot4_insts, | ||
| 1925 | .dot5_insts, | ||
| 1926 | .dot6_insts, | ||
| 1927 | .dot7_insts, | ||
| 1928 | .dpp_64bit, | ||
| 1929 | .flat_atomic_fadd_f32_inst, | ||
| 1930 | .fma_mix_insts, | ||
| 1931 | .fmacf64_inst, | ||
| 1932 | .force_store_sc0_sc1, | ||
| 1933 | .fp8_insts, | ||
| 1934 | .full_rate_64_ops, | ||
| 1935 | .gfx9, | ||
| 1936 | .gfx90a_insts, | ||
| 1937 | .gfx940_insts, | ||
| 1938 | .ldsbankcount32, | ||
| 1939 | .mai_insts, | ||
| 1940 | .packed_fp32_ops, | ||
| 1941 | .packed_tid, | ||
| 1942 | .pk_fmac_f16_inst, | ||
| 1943 | .sramecc_support, | ||
| 1944 | }), | ||
| 1945 | }; | ||
| 1946 | pub const gfx941 = CpuModel{ | ||
| 1947 | .name = "gfx941", | ||
| 1948 | .llvm_name = "gfx941", | ||
| 1949 | .features = featureSet(&[_]Feature{ | ||
| 1950 | .architected_flat_scratch, | ||
| 1951 | .atomic_buffer_global_pk_add_f16_insts, | ||
| 1952 | .atomic_ds_pk_add_16_insts, | ||
| 1953 | .atomic_fadd_no_rtn_insts, | ||
| 1954 | .atomic_fadd_rtn_insts, | ||
| 1955 | .atomic_flat_pk_add_16_insts, | ||
| 1956 | .atomic_global_pk_add_bf16_inst, | ||
| 1957 | .back_off_barrier, | ||
| 1958 | .dl_insts, | ||
| 1959 | .dot10_insts, | ||
| 1960 | .dot1_insts, | ||
| 1961 | .dot2_insts, | ||
| 1962 | .dot3_insts, | ||
| 1963 | .dot4_insts, | ||
| 1964 | .dot5_insts, | ||
| 1965 | .dot6_insts, | ||
| 1966 | .dot7_insts, | ||
| 1967 | .dpp_64bit, | ||
| 1968 | .flat_atomic_fadd_f32_inst, | ||
| 1969 | .fma_mix_insts, | ||
| 1970 | .fmacf64_inst, | ||
| 1971 | .force_store_sc0_sc1, | ||
| 1972 | .fp8_insts, | ||
| 1973 | .full_rate_64_ops, | ||
| 1974 | .gfx9, | ||
| 1975 | .gfx90a_insts, | ||
| 1976 | .gfx940_insts, | ||
| 1977 | .ldsbankcount32, | ||
| 1978 | .mai_insts, | ||
| 1979 | .packed_fp32_ops, | ||
| 1980 | .packed_tid, | ||
| 1981 | .pk_fmac_f16_inst, | ||
| 1982 | .sramecc_support, | ||
| 1983 | }), | ||
| 1984 | }; | ||
| 1985 | pub const gfx942 = CpuModel{ | ||
| 1986 | .name = "gfx942", | ||
| 1987 | .llvm_name = "gfx942", | ||
| 1988 | .features = featureSet(&[_]Feature{ | ||
| 1989 | .architected_flat_scratch, | ||
| 1990 | .atomic_buffer_global_pk_add_f16_insts, | ||
| 1991 | .atomic_ds_pk_add_16_insts, | ||
| 1992 | .atomic_fadd_no_rtn_insts, | ||
| 1993 | .atomic_fadd_rtn_insts, | ||
| 1994 | .atomic_flat_pk_add_16_insts, | ||
| 1995 | .atomic_global_pk_add_bf16_inst, | ||
| 1996 | .back_off_barrier, | ||
| 1997 | .dl_insts, | ||
| 1998 | .dot10_insts, | ||
| 1999 | .dot1_insts, | ||
| 2000 | .dot2_insts, | ||
| 2001 | .dot3_insts, | ||
| 2002 | .dot4_insts, | ||
| 2003 | .dot5_insts, | ||
| 2004 | .dot6_insts, | ||
| 2005 | .dot7_insts, | ||
| 2006 | .dpp_64bit, | ||
| 2007 | .flat_atomic_fadd_f32_inst, | ||
| 2008 | .fma_mix_insts, | ||
| 2009 | .fmacf64_inst, | ||
| 2010 | .fp8_insts, | ||
| 2011 | .full_rate_64_ops, | ||
| 2012 | .gfx9, | ||
| 2013 | .gfx90a_insts, | ||
| 2014 | .gfx940_insts, | ||
| 2015 | .ldsbankcount32, | ||
| 2016 | .mai_insts, | ||
| 2017 | .packed_fp32_ops, | ||
| 2018 | .packed_tid, | ||
| 2019 | .pk_fmac_f16_inst, | ||
| 2020 | .sramecc_support, | ||
| 2021 | }), | ||
| 2022 | }; | ||
| 2023 | pub const hainan = CpuModel{ | ||
| 2024 | .name = "hainan", | ||
| 2025 | .llvm_name = "hainan", | ||
| 2026 | .features = featureSet(&[_]Feature{ | ||
| 2027 | .southern_islands, | ||
| 2028 | }), | ||
| 2029 | }; | ||
| 2030 | pub const hawaii = CpuModel{ | ||
| 2031 | .name = "hawaii", | ||
| 2032 | .llvm_name = "hawaii", | ||
| 2033 | .features = featureSet(&[_]Feature{ | ||
| 2034 | .fast_fmaf, | ||
| 2035 | .half_rate_64_ops, | ||
| 2036 | .ldsbankcount32, | ||
| 2037 | .sea_islands, | ||
| 2038 | }), | ||
| 2039 | }; | ||
| 2040 | pub const iceland = CpuModel{ | ||
| 2041 | .name = "iceland", | ||
| 2042 | .llvm_name = "iceland", | ||
| 2043 | .features = featureSet(&[_]Feature{ | ||
| 2044 | .ldsbankcount32, | ||
| 2045 | .sgpr_init_bug, | ||
| 2046 | .unpacked_d16_vmem, | ||
| 2047 | .volcanic_islands, | ||
| 2048 | }), | ||
| 2049 | }; | ||
| 2050 | pub const kabini = CpuModel{ | ||
| 2051 | .name = "kabini", | ||
| 2052 | .llvm_name = "kabini", | ||
| 2053 | .features = featureSet(&[_]Feature{ | ||
| 2054 | .ldsbankcount16, | ||
| 2055 | .sea_islands, | ||
| 2056 | }), | ||
| 2057 | }; | ||
| 2058 | pub const kaveri = CpuModel{ | ||
| 2059 | .name = "kaveri", | ||
| 2060 | .llvm_name = "kaveri", | ||
| 2061 | .features = featureSet(&[_]Feature{ | ||
| 2062 | .ldsbankcount32, | ||
| 2063 | .sea_islands, | ||
| 2064 | }), | ||
| 2065 | }; | ||
| 2066 | pub const mullins = CpuModel{ | ||
| 2067 | .name = "mullins", | ||
| 2068 | .llvm_name = "mullins", | ||
| 2069 | .features = featureSet(&[_]Feature{ | ||
| 2070 | .ldsbankcount16, | ||
| 2071 | .sea_islands, | ||
| 2072 | }), | ||
| 2073 | }; | ||
| 2074 | pub const oland = CpuModel{ | ||
| 2075 | .name = "oland", | ||
| 2076 | .llvm_name = "oland", | ||
| 2077 | .features = featureSet(&[_]Feature{ | ||
| 2078 | .southern_islands, | ||
| 2079 | }), | ||
| 2080 | }; | ||
| 2081 | pub const pitcairn = CpuModel{ | ||
| 2082 | .name = "pitcairn", | ||
| 2083 | .llvm_name = "pitcairn", | ||
| 2084 | .features = featureSet(&[_]Feature{ | ||
| 2085 | .southern_islands, | ||
| 2086 | }), | ||
| 2087 | }; | ||
| 2088 | pub const polaris10 = CpuModel{ | ||
| 2089 | .name = "polaris10", | ||
| 2090 | .llvm_name = "polaris10", | ||
| 2091 | .features = featureSet(&[_]Feature{ | ||
| 2092 | .ldsbankcount32, | ||
| 2093 | .unpacked_d16_vmem, | ||
| 2094 | .volcanic_islands, | ||
| 2095 | }), | ||
| 2096 | }; | ||
| 2097 | pub const polaris11 = CpuModel{ | ||
| 2098 | .name = "polaris11", | ||
| 2099 | .llvm_name = "polaris11", | ||
| 2100 | .features = featureSet(&[_]Feature{ | ||
| 2101 | .ldsbankcount32, | ||
| 2102 | .unpacked_d16_vmem, | ||
| 2103 | .volcanic_islands, | ||
| 2104 | }), | ||
| 2105 | }; | ||
| 2106 | pub const stoney = CpuModel{ | ||
| 2107 | .name = "stoney", | ||
| 2108 | .llvm_name = "stoney", | ||
| 2109 | .features = featureSet(&[_]Feature{ | ||
| 2110 | .image_gather4_d16_bug, | ||
| 2111 | .image_store_d16_bug, | ||
| 2112 | .ldsbankcount16, | ||
| 2113 | .volcanic_islands, | ||
| 2114 | .xnack_support, | ||
| 2115 | }), | ||
| 2116 | }; | ||
| 2117 | pub const tahiti = CpuModel{ | ||
| 2118 | .name = "tahiti", | ||
| 2119 | .llvm_name = "tahiti", | ||
| 2120 | .features = featureSet(&[_]Feature{ | ||
| 2121 | .fast_fmaf, | ||
| 2122 | .half_rate_64_ops, | ||
| 2123 | .southern_islands, | ||
| 2124 | }), | ||
| 2125 | }; | ||
| 2126 | pub const tonga = CpuModel{ | ||
| 2127 | .name = "tonga", | ||
| 2128 | .llvm_name = "tonga", | ||
| 2129 | .features = featureSet(&[_]Feature{ | ||
| 2130 | .ldsbankcount32, | ||
| 2131 | .sgpr_init_bug, | ||
| 2132 | .unpacked_d16_vmem, | ||
| 2133 | .volcanic_islands, | ||
| 2134 | }), | ||
| 2135 | }; | ||
| 2136 | pub const tongapro = CpuModel{ | ||
| 2137 | .name = "tongapro", | ||
| 2138 | .llvm_name = "tongapro", | ||
| 2139 | .features = featureSet(&[_]Feature{ | ||
| 2140 | .ldsbankcount32, | ||
| 2141 | .sgpr_init_bug, | ||
| 2142 | .unpacked_d16_vmem, | ||
| 2143 | .volcanic_islands, | ||
| 2144 | }), | ||
| 2145 | }; | ||
| 2146 | pub const verde = CpuModel{ | ||
| 2147 | .name = "verde", | ||
| 2148 | .llvm_name = "verde", | ||
| 2149 | .features = featureSet(&[_]Feature{ | ||
| 2150 | .southern_islands, | ||
| 2151 | }), | ||
| 2152 | }; | ||
| 2153 | }; | ||
lib/std/target/arc.zig deleted-39
| ... | @@ -1,39 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | norm, | ||
| 9 | }; | ||
| 10 | |||
| 11 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 12 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 13 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 14 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 15 | |||
| 16 | pub const all_features = blk: { | ||
| 17 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 18 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 19 | var result: [len]CpuFeature = undefined; | ||
| 20 | result[@intFromEnum(Feature.norm)] = .{ | ||
| 21 | .llvm_name = "norm", | ||
| 22 | .description = "Enable support for norm instruction.", | ||
| 23 | .dependencies = featureSet(&[_]Feature{}), | ||
| 24 | }; | ||
| 25 | const ti = @typeInfo(Feature); | ||
| 26 | for (&result, 0..) |*elem, i| { | ||
| 27 | elem.index = i; | ||
| 28 | elem.name = ti.Enum.fields[i].name; | ||
| 29 | } | ||
| 30 | break :blk result; | ||
| 31 | }; | ||
| 32 | |||
| 33 | pub const cpu = struct { | ||
| 34 | pub const generic = CpuModel{ | ||
| 35 | .name = "generic", | ||
| 36 | .llvm_name = "generic", | ||
| 37 | .features = featureSet(&[_]Feature{}), | ||
| 38 | }; | ||
| 39 | }; | ||
lib/std/target/arm.zig deleted-2604
| ... | @@ -1,2604 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"32bit", | ||
| 9 | @"8msecext", | ||
| 10 | a76, | ||
| 11 | aapcs_frame_chain, | ||
| 12 | aapcs_frame_chain_leaf, | ||
| 13 | aclass, | ||
| 14 | acquire_release, | ||
| 15 | aes, | ||
| 16 | atomics_32, | ||
| 17 | avoid_movs_shop, | ||
| 18 | avoid_partial_cpsr, | ||
| 19 | bf16, | ||
| 20 | big_endian_instructions, | ||
| 21 | cde, | ||
| 22 | cdecp0, | ||
| 23 | cdecp1, | ||
| 24 | cdecp2, | ||
| 25 | cdecp3, | ||
| 26 | cdecp4, | ||
| 27 | cdecp5, | ||
| 28 | cdecp6, | ||
| 29 | cdecp7, | ||
| 30 | cheap_predicable_cpsr, | ||
| 31 | clrbhb, | ||
| 32 | crc, | ||
| 33 | crypto, | ||
| 34 | d32, | ||
| 35 | db, | ||
| 36 | dfb, | ||
| 37 | disable_postra_scheduler, | ||
| 38 | dont_widen_vmovs, | ||
| 39 | dotprod, | ||
| 40 | dsp, | ||
| 41 | execute_only, | ||
| 42 | expand_fp_mlx, | ||
| 43 | exynos, | ||
| 44 | fix_cmse_cve_2021_35465, | ||
| 45 | fix_cortex_a57_aes_1742098, | ||
| 46 | fp16, | ||
| 47 | fp16fml, | ||
| 48 | fp64, | ||
| 49 | fp_armv8, | ||
| 50 | fp_armv8d16, | ||
| 51 | fp_armv8d16sp, | ||
| 52 | fp_armv8sp, | ||
| 53 | fpao, | ||
| 54 | fpregs, | ||
| 55 | fpregs16, | ||
| 56 | fpregs64, | ||
| 57 | fullfp16, | ||
| 58 | fuse_aes, | ||
| 59 | fuse_literals, | ||
| 60 | harden_sls_blr, | ||
| 61 | harden_sls_nocomdat, | ||
| 62 | harden_sls_retbr, | ||
| 63 | has_v4t, | ||
| 64 | has_v5t, | ||
| 65 | has_v5te, | ||
| 66 | has_v6, | ||
| 67 | has_v6k, | ||
| 68 | has_v6m, | ||
| 69 | has_v6t2, | ||
| 70 | has_v7, | ||
| 71 | has_v7clrex, | ||
| 72 | has_v8, | ||
| 73 | has_v8_1a, | ||
| 74 | has_v8_1m_main, | ||
| 75 | has_v8_2a, | ||
| 76 | has_v8_3a, | ||
| 77 | has_v8_4a, | ||
| 78 | has_v8_5a, | ||
| 79 | has_v8_6a, | ||
| 80 | has_v8_7a, | ||
| 81 | has_v8_8a, | ||
| 82 | has_v8_9a, | ||
| 83 | has_v8m, | ||
| 84 | has_v8m_main, | ||
| 85 | has_v9_1a, | ||
| 86 | has_v9_2a, | ||
| 87 | has_v9_3a, | ||
| 88 | has_v9_4a, | ||
| 89 | has_v9a, | ||
| 90 | hwdiv, | ||
| 91 | hwdiv_arm, | ||
| 92 | i8mm, | ||
| 93 | iwmmxt, | ||
| 94 | iwmmxt2, | ||
| 95 | lob, | ||
| 96 | long_calls, | ||
| 97 | loop_align, | ||
| 98 | m3, | ||
| 99 | mclass, | ||
| 100 | mp, | ||
| 101 | muxed_units, | ||
| 102 | mve, | ||
| 103 | mve1beat, | ||
| 104 | mve2beat, | ||
| 105 | mve4beat, | ||
| 106 | mve_fp, | ||
| 107 | nacl_trap, | ||
| 108 | neon, | ||
| 109 | neon_fpmovs, | ||
| 110 | neonfp, | ||
| 111 | no_branch_predictor, | ||
| 112 | no_bti_at_return_twice, | ||
| 113 | no_movt, | ||
| 114 | no_neg_immediates, | ||
| 115 | noarm, | ||
| 116 | nonpipelined_vfp, | ||
| 117 | pacbti, | ||
| 118 | perfmon, | ||
| 119 | prefer_ishst, | ||
| 120 | prefer_vmovsr, | ||
| 121 | prof_unpr, | ||
| 122 | r4, | ||
| 123 | ras, | ||
| 124 | rclass, | ||
| 125 | read_tp_tpidrprw, | ||
| 126 | read_tp_tpidruro, | ||
| 127 | read_tp_tpidrurw, | ||
| 128 | reserve_r9, | ||
| 129 | ret_addr_stack, | ||
| 130 | sb, | ||
| 131 | sha2, | ||
| 132 | slow_fp_brcc, | ||
| 133 | slow_load_D_subreg, | ||
| 134 | slow_odd_reg, | ||
| 135 | slow_vdup32, | ||
| 136 | slow_vgetlni32, | ||
| 137 | slowfpvfmx, | ||
| 138 | slowfpvmlx, | ||
| 139 | soft_float, | ||
| 140 | splat_vfp_neon, | ||
| 141 | strict_align, | ||
| 142 | swift, | ||
| 143 | thumb2, | ||
| 144 | thumb_mode, | ||
| 145 | trustzone, | ||
| 146 | use_mipipeliner, | ||
| 147 | use_misched, | ||
| 148 | v2, | ||
| 149 | v2a, | ||
| 150 | v3, | ||
| 151 | v3m, | ||
| 152 | v4, | ||
| 153 | v4t, | ||
| 154 | v5t, | ||
| 155 | v5te, | ||
| 156 | v5tej, | ||
| 157 | v6, | ||
| 158 | v6j, | ||
| 159 | v6k, | ||
| 160 | v6kz, | ||
| 161 | v6m, | ||
| 162 | v6sm, | ||
| 163 | v6t2, | ||
| 164 | v7a, | ||
| 165 | v7em, | ||
| 166 | v7k, | ||
| 167 | v7m, | ||
| 168 | v7r, | ||
| 169 | v7s, | ||
| 170 | v7ve, | ||
| 171 | v8_1a, | ||
| 172 | v8_1m_main, | ||
| 173 | v8_2a, | ||
| 174 | v8_3a, | ||
| 175 | v8_4a, | ||
| 176 | v8_5a, | ||
| 177 | v8_6a, | ||
| 178 | v8_7a, | ||
| 179 | v8_8a, | ||
| 180 | v8_9a, | ||
| 181 | v8a, | ||
| 182 | v8m, | ||
| 183 | v8m_main, | ||
| 184 | v8r, | ||
| 185 | v9_1a, | ||
| 186 | v9_2a, | ||
| 187 | v9_3a, | ||
| 188 | v9_4a, | ||
| 189 | v9a, | ||
| 190 | vfp2, | ||
| 191 | vfp2sp, | ||
| 192 | vfp3, | ||
| 193 | vfp3d16, | ||
| 194 | vfp3d16sp, | ||
| 195 | vfp3sp, | ||
| 196 | vfp4, | ||
| 197 | vfp4d16, | ||
| 198 | vfp4d16sp, | ||
| 199 | vfp4sp, | ||
| 200 | virtualization, | ||
| 201 | vldn_align, | ||
| 202 | vmlx_forwarding, | ||
| 203 | vmlx_hazards, | ||
| 204 | wide_stride_vfp, | ||
| 205 | xscale, | ||
| 206 | zcz, | ||
| 207 | }; | ||
| 208 | |||
| 209 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 210 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 211 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 212 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 213 | |||
| 214 | pub const all_features = blk: { | ||
| 215 | @setEvalBranchQuota(10000); | ||
| 216 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 217 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 218 | var result: [len]CpuFeature = undefined; | ||
| 219 | result[@intFromEnum(Feature.@"32bit")] = .{ | ||
| 220 | .llvm_name = "32bit", | ||
| 221 | .description = "Prefer 32-bit Thumb instrs", | ||
| 222 | .dependencies = featureSet(&[_]Feature{}), | ||
| 223 | }; | ||
| 224 | result[@intFromEnum(Feature.@"8msecext")] = .{ | ||
| 225 | .llvm_name = "8msecext", | ||
| 226 | .description = "Enable support for ARMv8-M Security Extensions", | ||
| 227 | .dependencies = featureSet(&[_]Feature{}), | ||
| 228 | }; | ||
| 229 | result[@intFromEnum(Feature.a76)] = .{ | ||
| 230 | .llvm_name = "a76", | ||
| 231 | .description = "Cortex-A76 ARM processors", | ||
| 232 | .dependencies = featureSet(&[_]Feature{}), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.aapcs_frame_chain)] = .{ | ||
| 235 | .llvm_name = "aapcs-frame-chain", | ||
| 236 | .description = "Create an AAPCS compliant frame chain", | ||
| 237 | .dependencies = featureSet(&[_]Feature{}), | ||
| 238 | }; | ||
| 239 | result[@intFromEnum(Feature.aapcs_frame_chain_leaf)] = .{ | ||
| 240 | .llvm_name = "aapcs-frame-chain-leaf", | ||
| 241 | .description = "Create an AAPCS compliant frame chain for leaf functions", | ||
| 242 | .dependencies = featureSet(&[_]Feature{ | ||
| 243 | .aapcs_frame_chain, | ||
| 244 | }), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.aclass)] = .{ | ||
| 247 | .llvm_name = "aclass", | ||
| 248 | .description = "Is application profile ('A' series)", | ||
| 249 | .dependencies = featureSet(&[_]Feature{}), | ||
| 250 | }; | ||
| 251 | result[@intFromEnum(Feature.acquire_release)] = .{ | ||
| 252 | .llvm_name = "acquire-release", | ||
| 253 | .description = "Has v8 acquire/release (lda/ldaex etc) instructions", | ||
| 254 | .dependencies = featureSet(&[_]Feature{}), | ||
| 255 | }; | ||
| 256 | result[@intFromEnum(Feature.aes)] = .{ | ||
| 257 | .llvm_name = "aes", | ||
| 258 | .description = "Enable AES support", | ||
| 259 | .dependencies = featureSet(&[_]Feature{ | ||
| 260 | .neon, | ||
| 261 | }), | ||
| 262 | }; | ||
| 263 | result[@intFromEnum(Feature.atomics_32)] = .{ | ||
| 264 | .llvm_name = "atomics-32", | ||
| 265 | .description = "Assume that lock-free 32-bit atomics are available", | ||
| 266 | .dependencies = featureSet(&[_]Feature{}), | ||
| 267 | }; | ||
| 268 | result[@intFromEnum(Feature.avoid_movs_shop)] = .{ | ||
| 269 | .llvm_name = "avoid-movs-shop", | ||
| 270 | .description = "Avoid movs instructions with shifter operand", | ||
| 271 | .dependencies = featureSet(&[_]Feature{}), | ||
| 272 | }; | ||
| 273 | result[@intFromEnum(Feature.avoid_partial_cpsr)] = .{ | ||
| 274 | .llvm_name = "avoid-partial-cpsr", | ||
| 275 | .description = "Avoid CPSR partial update for OOO execution", | ||
| 276 | .dependencies = featureSet(&[_]Feature{}), | ||
| 277 | }; | ||
| 278 | result[@intFromEnum(Feature.bf16)] = .{ | ||
| 279 | .llvm_name = "bf16", | ||
| 280 | .description = "Enable support for BFloat16 instructions", | ||
| 281 | .dependencies = featureSet(&[_]Feature{ | ||
| 282 | .neon, | ||
| 283 | }), | ||
| 284 | }; | ||
| 285 | result[@intFromEnum(Feature.big_endian_instructions)] = .{ | ||
| 286 | .llvm_name = "big-endian-instructions", | ||
| 287 | .description = "Expect instructions to be stored big-endian.", | ||
| 288 | .dependencies = featureSet(&[_]Feature{}), | ||
| 289 | }; | ||
| 290 | result[@intFromEnum(Feature.cde)] = .{ | ||
| 291 | .llvm_name = "cde", | ||
| 292 | .description = "Support CDE instructions", | ||
| 293 | .dependencies = featureSet(&[_]Feature{ | ||
| 294 | .has_v8m_main, | ||
| 295 | }), | ||
| 296 | }; | ||
| 297 | result[@intFromEnum(Feature.cdecp0)] = .{ | ||
| 298 | .llvm_name = "cdecp0", | ||
| 299 | .description = "Coprocessor 0 ISA is CDEv1", | ||
| 300 | .dependencies = featureSet(&[_]Feature{ | ||
| 301 | .cde, | ||
| 302 | }), | ||
| 303 | }; | ||
| 304 | result[@intFromEnum(Feature.cdecp1)] = .{ | ||
| 305 | .llvm_name = "cdecp1", | ||
| 306 | .description = "Coprocessor 1 ISA is CDEv1", | ||
| 307 | .dependencies = featureSet(&[_]Feature{ | ||
| 308 | .cde, | ||
| 309 | }), | ||
| 310 | }; | ||
| 311 | result[@intFromEnum(Feature.cdecp2)] = .{ | ||
| 312 | .llvm_name = "cdecp2", | ||
| 313 | .description = "Coprocessor 2 ISA is CDEv1", | ||
| 314 | .dependencies = featureSet(&[_]Feature{ | ||
| 315 | .cde, | ||
| 316 | }), | ||
| 317 | }; | ||
| 318 | result[@intFromEnum(Feature.cdecp3)] = .{ | ||
| 319 | .llvm_name = "cdecp3", | ||
| 320 | .description = "Coprocessor 3 ISA is CDEv1", | ||
| 321 | .dependencies = featureSet(&[_]Feature{ | ||
| 322 | .cde, | ||
| 323 | }), | ||
| 324 | }; | ||
| 325 | result[@intFromEnum(Feature.cdecp4)] = .{ | ||
| 326 | .llvm_name = "cdecp4", | ||
| 327 | .description = "Coprocessor 4 ISA is CDEv1", | ||
| 328 | .dependencies = featureSet(&[_]Feature{ | ||
| 329 | .cde, | ||
| 330 | }), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.cdecp5)] = .{ | ||
| 333 | .llvm_name = "cdecp5", | ||
| 334 | .description = "Coprocessor 5 ISA is CDEv1", | ||
| 335 | .dependencies = featureSet(&[_]Feature{ | ||
| 336 | .cde, | ||
| 337 | }), | ||
| 338 | }; | ||
| 339 | result[@intFromEnum(Feature.cdecp6)] = .{ | ||
| 340 | .llvm_name = "cdecp6", | ||
| 341 | .description = "Coprocessor 6 ISA is CDEv1", | ||
| 342 | .dependencies = featureSet(&[_]Feature{ | ||
| 343 | .cde, | ||
| 344 | }), | ||
| 345 | }; | ||
| 346 | result[@intFromEnum(Feature.cdecp7)] = .{ | ||
| 347 | .llvm_name = "cdecp7", | ||
| 348 | .description = "Coprocessor 7 ISA is CDEv1", | ||
| 349 | .dependencies = featureSet(&[_]Feature{ | ||
| 350 | .cde, | ||
| 351 | }), | ||
| 352 | }; | ||
| 353 | result[@intFromEnum(Feature.cheap_predicable_cpsr)] = .{ | ||
| 354 | .llvm_name = "cheap-predicable-cpsr", | ||
| 355 | .description = "Disable +1 predication cost for instructions updating CPSR", | ||
| 356 | .dependencies = featureSet(&[_]Feature{}), | ||
| 357 | }; | ||
| 358 | result[@intFromEnum(Feature.clrbhb)] = .{ | ||
| 359 | .llvm_name = "clrbhb", | ||
| 360 | .description = "Enable Clear BHB instruction", | ||
| 361 | .dependencies = featureSet(&[_]Feature{}), | ||
| 362 | }; | ||
| 363 | result[@intFromEnum(Feature.crc)] = .{ | ||
| 364 | .llvm_name = "crc", | ||
| 365 | .description = "Enable support for CRC instructions", | ||
| 366 | .dependencies = featureSet(&[_]Feature{}), | ||
| 367 | }; | ||
| 368 | result[@intFromEnum(Feature.crypto)] = .{ | ||
| 369 | .llvm_name = "crypto", | ||
| 370 | .description = "Enable support for Cryptography extensions", | ||
| 371 | .dependencies = featureSet(&[_]Feature{ | ||
| 372 | .aes, | ||
| 373 | .sha2, | ||
| 374 | }), | ||
| 375 | }; | ||
| 376 | result[@intFromEnum(Feature.d32)] = .{ | ||
| 377 | .llvm_name = "d32", | ||
| 378 | .description = "Extend FP to 32 double registers", | ||
| 379 | .dependencies = featureSet(&[_]Feature{}), | ||
| 380 | }; | ||
| 381 | result[@intFromEnum(Feature.db)] = .{ | ||
| 382 | .llvm_name = "db", | ||
| 383 | .description = "Has data barrier (dmb/dsb) instructions", | ||
| 384 | .dependencies = featureSet(&[_]Feature{}), | ||
| 385 | }; | ||
| 386 | result[@intFromEnum(Feature.dfb)] = .{ | ||
| 387 | .llvm_name = "dfb", | ||
| 388 | .description = "Has full data barrier (dfb) instruction", | ||
| 389 | .dependencies = featureSet(&[_]Feature{}), | ||
| 390 | }; | ||
| 391 | result[@intFromEnum(Feature.disable_postra_scheduler)] = .{ | ||
| 392 | .llvm_name = "disable-postra-scheduler", | ||
| 393 | .description = "Don't schedule again after register allocation", | ||
| 394 | .dependencies = featureSet(&[_]Feature{}), | ||
| 395 | }; | ||
| 396 | result[@intFromEnum(Feature.dont_widen_vmovs)] = .{ | ||
| 397 | .llvm_name = "dont-widen-vmovs", | ||
| 398 | .description = "Don't widen VMOVS to VMOVD", | ||
| 399 | .dependencies = featureSet(&[_]Feature{}), | ||
| 400 | }; | ||
| 401 | result[@intFromEnum(Feature.dotprod)] = .{ | ||
| 402 | .llvm_name = "dotprod", | ||
| 403 | .description = "Enable support for dot product instructions", | ||
| 404 | .dependencies = featureSet(&[_]Feature{ | ||
| 405 | .neon, | ||
| 406 | }), | ||
| 407 | }; | ||
| 408 | result[@intFromEnum(Feature.dsp)] = .{ | ||
| 409 | .llvm_name = "dsp", | ||
| 410 | .description = "Supports DSP instructions in ARM and/or Thumb2", | ||
| 411 | .dependencies = featureSet(&[_]Feature{}), | ||
| 412 | }; | ||
| 413 | result[@intFromEnum(Feature.execute_only)] = .{ | ||
| 414 | .llvm_name = "execute-only", | ||
| 415 | .description = "Enable the generation of execute only code.", | ||
| 416 | .dependencies = featureSet(&[_]Feature{}), | ||
| 417 | }; | ||
| 418 | result[@intFromEnum(Feature.expand_fp_mlx)] = .{ | ||
| 419 | .llvm_name = "expand-fp-mlx", | ||
| 420 | .description = "Expand VFP/NEON MLA/MLS instructions", | ||
| 421 | .dependencies = featureSet(&[_]Feature{}), | ||
| 422 | }; | ||
| 423 | result[@intFromEnum(Feature.exynos)] = .{ | ||
| 424 | .llvm_name = "exynos", | ||
| 425 | .description = "Samsung Exynos processors", | ||
| 426 | .dependencies = featureSet(&[_]Feature{ | ||
| 427 | .crc, | ||
| 428 | .crypto, | ||
| 429 | .expand_fp_mlx, | ||
| 430 | .fuse_aes, | ||
| 431 | .fuse_literals, | ||
| 432 | .hwdiv, | ||
| 433 | .hwdiv_arm, | ||
| 434 | .prof_unpr, | ||
| 435 | .ret_addr_stack, | ||
| 436 | .slow_fp_brcc, | ||
| 437 | .slow_vdup32, | ||
| 438 | .slow_vgetlni32, | ||
| 439 | .slowfpvfmx, | ||
| 440 | .slowfpvmlx, | ||
| 441 | .splat_vfp_neon, | ||
| 442 | .wide_stride_vfp, | ||
| 443 | .zcz, | ||
| 444 | }), | ||
| 445 | }; | ||
| 446 | result[@intFromEnum(Feature.fix_cmse_cve_2021_35465)] = .{ | ||
| 447 | .llvm_name = "fix-cmse-cve-2021-35465", | ||
| 448 | .description = "Mitigate against the cve-2021-35465 security vulnurability", | ||
| 449 | .dependencies = featureSet(&[_]Feature{}), | ||
| 450 | }; | ||
| 451 | result[@intFromEnum(Feature.fix_cortex_a57_aes_1742098)] = .{ | ||
| 452 | .llvm_name = "fix-cortex-a57-aes-1742098", | ||
| 453 | .description = "Work around Cortex-A57 Erratum 1742098 / Cortex-A72 Erratum 1655431 (AES)", | ||
| 454 | .dependencies = featureSet(&[_]Feature{}), | ||
| 455 | }; | ||
| 456 | result[@intFromEnum(Feature.fp16)] = .{ | ||
| 457 | .llvm_name = "fp16", | ||
| 458 | .description = "Enable half-precision floating point", | ||
| 459 | .dependencies = featureSet(&[_]Feature{}), | ||
| 460 | }; | ||
| 461 | result[@intFromEnum(Feature.fp16fml)] = .{ | ||
| 462 | .llvm_name = "fp16fml", | ||
| 463 | .description = "Enable full half-precision floating point fml instructions", | ||
| 464 | .dependencies = featureSet(&[_]Feature{ | ||
| 465 | .fullfp16, | ||
| 466 | }), | ||
| 467 | }; | ||
| 468 | result[@intFromEnum(Feature.fp64)] = .{ | ||
| 469 | .llvm_name = "fp64", | ||
| 470 | .description = "Floating point unit supports double precision", | ||
| 471 | .dependencies = featureSet(&[_]Feature{ | ||
| 472 | .fpregs64, | ||
| 473 | }), | ||
| 474 | }; | ||
| 475 | result[@intFromEnum(Feature.fp_armv8)] = .{ | ||
| 476 | .llvm_name = "fp-armv8", | ||
| 477 | .description = "Enable ARMv8 FP", | ||
| 478 | .dependencies = featureSet(&[_]Feature{ | ||
| 479 | .fp_armv8d16, | ||
| 480 | .fp_armv8sp, | ||
| 481 | .vfp4, | ||
| 482 | }), | ||
| 483 | }; | ||
| 484 | result[@intFromEnum(Feature.fp_armv8d16)] = .{ | ||
| 485 | .llvm_name = "fp-armv8d16", | ||
| 486 | .description = "Enable ARMv8 FP with only 16 d-registers", | ||
| 487 | .dependencies = featureSet(&[_]Feature{ | ||
| 488 | .fp_armv8d16sp, | ||
| 489 | .vfp4d16, | ||
| 490 | }), | ||
| 491 | }; | ||
| 492 | result[@intFromEnum(Feature.fp_armv8d16sp)] = .{ | ||
| 493 | .llvm_name = "fp-armv8d16sp", | ||
| 494 | .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", | ||
| 495 | .dependencies = featureSet(&[_]Feature{ | ||
| 496 | .vfp4d16sp, | ||
| 497 | }), | ||
| 498 | }; | ||
| 499 | result[@intFromEnum(Feature.fp_armv8sp)] = .{ | ||
| 500 | .llvm_name = "fp-armv8sp", | ||
| 501 | .description = "Enable ARMv8 FP with no double precision", | ||
| 502 | .dependencies = featureSet(&[_]Feature{ | ||
| 503 | .fp_armv8d16sp, | ||
| 504 | .vfp4sp, | ||
| 505 | }), | ||
| 506 | }; | ||
| 507 | result[@intFromEnum(Feature.fpao)] = .{ | ||
| 508 | .llvm_name = "fpao", | ||
| 509 | .description = "Enable fast computation of positive address offsets", | ||
| 510 | .dependencies = featureSet(&[_]Feature{}), | ||
| 511 | }; | ||
| 512 | result[@intFromEnum(Feature.fpregs)] = .{ | ||
| 513 | .llvm_name = "fpregs", | ||
| 514 | .description = "Enable FP registers", | ||
| 515 | .dependencies = featureSet(&[_]Feature{}), | ||
| 516 | }; | ||
| 517 | result[@intFromEnum(Feature.fpregs16)] = .{ | ||
| 518 | .llvm_name = "fpregs16", | ||
| 519 | .description = "Enable 16-bit FP registers", | ||
| 520 | .dependencies = featureSet(&[_]Feature{ | ||
| 521 | .fpregs, | ||
| 522 | }), | ||
| 523 | }; | ||
| 524 | result[@intFromEnum(Feature.fpregs64)] = .{ | ||
| 525 | .llvm_name = "fpregs64", | ||
| 526 | .description = "Enable 64-bit FP registers", | ||
| 527 | .dependencies = featureSet(&[_]Feature{ | ||
| 528 | .fpregs, | ||
| 529 | }), | ||
| 530 | }; | ||
| 531 | result[@intFromEnum(Feature.fullfp16)] = .{ | ||
| 532 | .llvm_name = "fullfp16", | ||
| 533 | .description = "Enable full half-precision floating point", | ||
| 534 | .dependencies = featureSet(&[_]Feature{ | ||
| 535 | .fp_armv8d16sp, | ||
| 536 | .fpregs16, | ||
| 537 | }), | ||
| 538 | }; | ||
| 539 | result[@intFromEnum(Feature.fuse_aes)] = .{ | ||
| 540 | .llvm_name = "fuse-aes", | ||
| 541 | .description = "CPU fuses AES crypto operations", | ||
| 542 | .dependencies = featureSet(&[_]Feature{}), | ||
| 543 | }; | ||
| 544 | result[@intFromEnum(Feature.fuse_literals)] = .{ | ||
| 545 | .llvm_name = "fuse-literals", | ||
| 546 | .description = "CPU fuses literal generation operations", | ||
| 547 | .dependencies = featureSet(&[_]Feature{}), | ||
| 548 | }; | ||
| 549 | result[@intFromEnum(Feature.harden_sls_blr)] = .{ | ||
| 550 | .llvm_name = "harden-sls-blr", | ||
| 551 | .description = "Harden against straight line speculation across indirect calls", | ||
| 552 | .dependencies = featureSet(&[_]Feature{}), | ||
| 553 | }; | ||
| 554 | result[@intFromEnum(Feature.harden_sls_nocomdat)] = .{ | ||
| 555 | .llvm_name = "harden-sls-nocomdat", | ||
| 556 | .description = "Generate thunk code for SLS mitigation in the normal text section", | ||
| 557 | .dependencies = featureSet(&[_]Feature{}), | ||
| 558 | }; | ||
| 559 | result[@intFromEnum(Feature.harden_sls_retbr)] = .{ | ||
| 560 | .llvm_name = "harden-sls-retbr", | ||
| 561 | .description = "Harden against straight line speculation across RETurn and BranchRegister instructions", | ||
| 562 | .dependencies = featureSet(&[_]Feature{}), | ||
| 563 | }; | ||
| 564 | result[@intFromEnum(Feature.has_v4t)] = .{ | ||
| 565 | .llvm_name = "v4t", | ||
| 566 | .description = "Support ARM v4T instructions", | ||
| 567 | .dependencies = featureSet(&[_]Feature{}), | ||
| 568 | }; | ||
| 569 | result[@intFromEnum(Feature.has_v5t)] = .{ | ||
| 570 | .llvm_name = "v5t", | ||
| 571 | .description = "Support ARM v5T instructions", | ||
| 572 | .dependencies = featureSet(&[_]Feature{ | ||
| 573 | .has_v4t, | ||
| 574 | }), | ||
| 575 | }; | ||
| 576 | result[@intFromEnum(Feature.has_v5te)] = .{ | ||
| 577 | .llvm_name = "v5te", | ||
| 578 | .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", | ||
| 579 | .dependencies = featureSet(&[_]Feature{ | ||
| 580 | .has_v5t, | ||
| 581 | }), | ||
| 582 | }; | ||
| 583 | result[@intFromEnum(Feature.has_v6)] = .{ | ||
| 584 | .llvm_name = "v6", | ||
| 585 | .description = "Support ARM v6 instructions", | ||
| 586 | .dependencies = featureSet(&[_]Feature{ | ||
| 587 | .has_v5te, | ||
| 588 | }), | ||
| 589 | }; | ||
| 590 | result[@intFromEnum(Feature.has_v6k)] = .{ | ||
| 591 | .llvm_name = "v6k", | ||
| 592 | .description = "Support ARM v6k instructions", | ||
| 593 | .dependencies = featureSet(&[_]Feature{ | ||
| 594 | .has_v6, | ||
| 595 | }), | ||
| 596 | }; | ||
| 597 | result[@intFromEnum(Feature.has_v6m)] = .{ | ||
| 598 | .llvm_name = "v6m", | ||
| 599 | .description = "Support ARM v6M instructions", | ||
| 600 | .dependencies = featureSet(&[_]Feature{ | ||
| 601 | .has_v6, | ||
| 602 | }), | ||
| 603 | }; | ||
| 604 | result[@intFromEnum(Feature.has_v6t2)] = .{ | ||
| 605 | .llvm_name = "v6t2", | ||
| 606 | .description = "Support ARM v6t2 instructions", | ||
| 607 | .dependencies = featureSet(&[_]Feature{ | ||
| 608 | .has_v6k, | ||
| 609 | .has_v8m, | ||
| 610 | .thumb2, | ||
| 611 | }), | ||
| 612 | }; | ||
| 613 | result[@intFromEnum(Feature.has_v7)] = .{ | ||
| 614 | .llvm_name = "v7", | ||
| 615 | .description = "Support ARM v7 instructions", | ||
| 616 | .dependencies = featureSet(&[_]Feature{ | ||
| 617 | .has_v6t2, | ||
| 618 | .has_v7clrex, | ||
| 619 | }), | ||
| 620 | }; | ||
| 621 | result[@intFromEnum(Feature.has_v7clrex)] = .{ | ||
| 622 | .llvm_name = "v7clrex", | ||
| 623 | .description = "Has v7 clrex instruction", | ||
| 624 | .dependencies = featureSet(&[_]Feature{}), | ||
| 625 | }; | ||
| 626 | result[@intFromEnum(Feature.has_v8)] = .{ | ||
| 627 | .llvm_name = "v8", | ||
| 628 | .description = "Support ARM v8 instructions", | ||
| 629 | .dependencies = featureSet(&[_]Feature{ | ||
| 630 | .acquire_release, | ||
| 631 | .has_v7, | ||
| 632 | .perfmon, | ||
| 633 | }), | ||
| 634 | }; | ||
| 635 | result[@intFromEnum(Feature.has_v8_1a)] = .{ | ||
| 636 | .llvm_name = "v8.1a", | ||
| 637 | .description = "Support ARM v8.1a instructions", | ||
| 638 | .dependencies = featureSet(&[_]Feature{ | ||
| 639 | .has_v8, | ||
| 640 | }), | ||
| 641 | }; | ||
| 642 | result[@intFromEnum(Feature.has_v8_1m_main)] = .{ | ||
| 643 | .llvm_name = "v8.1m.main", | ||
| 644 | .description = "Support ARM v8-1M Mainline instructions", | ||
| 645 | .dependencies = featureSet(&[_]Feature{ | ||
| 646 | .has_v8m_main, | ||
| 647 | }), | ||
| 648 | }; | ||
| 649 | result[@intFromEnum(Feature.has_v8_2a)] = .{ | ||
| 650 | .llvm_name = "v8.2a", | ||
| 651 | .description = "Support ARM v8.2a instructions", | ||
| 652 | .dependencies = featureSet(&[_]Feature{ | ||
| 653 | .has_v8_1a, | ||
| 654 | }), | ||
| 655 | }; | ||
| 656 | result[@intFromEnum(Feature.has_v8_3a)] = .{ | ||
| 657 | .llvm_name = "v8.3a", | ||
| 658 | .description = "Support ARM v8.3a instructions", | ||
| 659 | .dependencies = featureSet(&[_]Feature{ | ||
| 660 | .has_v8_2a, | ||
| 661 | }), | ||
| 662 | }; | ||
| 663 | result[@intFromEnum(Feature.has_v8_4a)] = .{ | ||
| 664 | .llvm_name = "v8.4a", | ||
| 665 | .description = "Support ARM v8.4a instructions", | ||
| 666 | .dependencies = featureSet(&[_]Feature{ | ||
| 667 | .dotprod, | ||
| 668 | .has_v8_3a, | ||
| 669 | }), | ||
| 670 | }; | ||
| 671 | result[@intFromEnum(Feature.has_v8_5a)] = .{ | ||
| 672 | .llvm_name = "v8.5a", | ||
| 673 | .description = "Support ARM v8.5a instructions", | ||
| 674 | .dependencies = featureSet(&[_]Feature{ | ||
| 675 | .has_v8_4a, | ||
| 676 | .sb, | ||
| 677 | }), | ||
| 678 | }; | ||
| 679 | result[@intFromEnum(Feature.has_v8_6a)] = .{ | ||
| 680 | .llvm_name = "v8.6a", | ||
| 681 | .description = "Support ARM v8.6a instructions", | ||
| 682 | .dependencies = featureSet(&[_]Feature{ | ||
| 683 | .bf16, | ||
| 684 | .has_v8_5a, | ||
| 685 | .i8mm, | ||
| 686 | }), | ||
| 687 | }; | ||
| 688 | result[@intFromEnum(Feature.has_v8_7a)] = .{ | ||
| 689 | .llvm_name = "v8.7a", | ||
| 690 | .description = "Support ARM v8.7a instructions", | ||
| 691 | .dependencies = featureSet(&[_]Feature{ | ||
| 692 | .has_v8_6a, | ||
| 693 | }), | ||
| 694 | }; | ||
| 695 | result[@intFromEnum(Feature.has_v8_8a)] = .{ | ||
| 696 | .llvm_name = "v8.8a", | ||
| 697 | .description = "Support ARM v8.8a instructions", | ||
| 698 | .dependencies = featureSet(&[_]Feature{ | ||
| 699 | .has_v8_7a, | ||
| 700 | }), | ||
| 701 | }; | ||
| 702 | result[@intFromEnum(Feature.has_v8_9a)] = .{ | ||
| 703 | .llvm_name = "v8.9a", | ||
| 704 | .description = "Support ARM v8.9a instructions", | ||
| 705 | .dependencies = featureSet(&[_]Feature{ | ||
| 706 | .clrbhb, | ||
| 707 | .has_v8_8a, | ||
| 708 | }), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.has_v8m)] = .{ | ||
| 711 | .llvm_name = "v8m", | ||
| 712 | .description = "Support ARM v8M Baseline instructions", | ||
| 713 | .dependencies = featureSet(&[_]Feature{ | ||
| 714 | .has_v6m, | ||
| 715 | }), | ||
| 716 | }; | ||
| 717 | result[@intFromEnum(Feature.has_v8m_main)] = .{ | ||
| 718 | .llvm_name = "v8m.main", | ||
| 719 | .description = "Support ARM v8M Mainline instructions", | ||
| 720 | .dependencies = featureSet(&[_]Feature{ | ||
| 721 | .has_v7, | ||
| 722 | }), | ||
| 723 | }; | ||
| 724 | result[@intFromEnum(Feature.has_v9_1a)] = .{ | ||
| 725 | .llvm_name = "v9.1a", | ||
| 726 | .description = "Support ARM v9.1a instructions", | ||
| 727 | .dependencies = featureSet(&[_]Feature{ | ||
| 728 | .has_v8_6a, | ||
| 729 | .has_v9a, | ||
| 730 | }), | ||
| 731 | }; | ||
| 732 | result[@intFromEnum(Feature.has_v9_2a)] = .{ | ||
| 733 | .llvm_name = "v9.2a", | ||
| 734 | .description = "Support ARM v9.2a instructions", | ||
| 735 | .dependencies = featureSet(&[_]Feature{ | ||
| 736 | .has_v8_7a, | ||
| 737 | .has_v9_1a, | ||
| 738 | }), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.has_v9_3a)] = .{ | ||
| 741 | .llvm_name = "v9.3a", | ||
| 742 | .description = "Support ARM v9.3a instructions", | ||
| 743 | .dependencies = featureSet(&[_]Feature{ | ||
| 744 | .has_v8_8a, | ||
| 745 | .has_v9_2a, | ||
| 746 | }), | ||
| 747 | }; | ||
| 748 | result[@intFromEnum(Feature.has_v9_4a)] = .{ | ||
| 749 | .llvm_name = "v9.4a", | ||
| 750 | .description = "Support ARM v9.4a instructions", | ||
| 751 | .dependencies = featureSet(&[_]Feature{ | ||
| 752 | .has_v8_9a, | ||
| 753 | .has_v9_3a, | ||
| 754 | }), | ||
| 755 | }; | ||
| 756 | result[@intFromEnum(Feature.has_v9a)] = .{ | ||
| 757 | .llvm_name = "v9a", | ||
| 758 | .description = "Support ARM v9a instructions", | ||
| 759 | .dependencies = featureSet(&[_]Feature{ | ||
| 760 | .has_v8_5a, | ||
| 761 | }), | ||
| 762 | }; | ||
| 763 | result[@intFromEnum(Feature.hwdiv)] = .{ | ||
| 764 | .llvm_name = "hwdiv", | ||
| 765 | .description = "Enable divide instructions in Thumb", | ||
| 766 | .dependencies = featureSet(&[_]Feature{}), | ||
| 767 | }; | ||
| 768 | result[@intFromEnum(Feature.hwdiv_arm)] = .{ | ||
| 769 | .llvm_name = "hwdiv-arm", | ||
| 770 | .description = "Enable divide instructions in ARM mode", | ||
| 771 | .dependencies = featureSet(&[_]Feature{}), | ||
| 772 | }; | ||
| 773 | result[@intFromEnum(Feature.i8mm)] = .{ | ||
| 774 | .llvm_name = "i8mm", | ||
| 775 | .description = "Enable Matrix Multiply Int8 Extension", | ||
| 776 | .dependencies = featureSet(&[_]Feature{ | ||
| 777 | .neon, | ||
| 778 | }), | ||
| 779 | }; | ||
| 780 | result[@intFromEnum(Feature.iwmmxt)] = .{ | ||
| 781 | .llvm_name = "iwmmxt", | ||
| 782 | .description = "ARMv5te architecture", | ||
| 783 | .dependencies = featureSet(&[_]Feature{ | ||
| 784 | .v5te, | ||
| 785 | }), | ||
| 786 | }; | ||
| 787 | result[@intFromEnum(Feature.iwmmxt2)] = .{ | ||
| 788 | .llvm_name = "iwmmxt2", | ||
| 789 | .description = "ARMv5te architecture", | ||
| 790 | .dependencies = featureSet(&[_]Feature{ | ||
| 791 | .v5te, | ||
| 792 | }), | ||
| 793 | }; | ||
| 794 | result[@intFromEnum(Feature.lob)] = .{ | ||
| 795 | .llvm_name = "lob", | ||
| 796 | .description = "Enable Low Overhead Branch extensions", | ||
| 797 | .dependencies = featureSet(&[_]Feature{}), | ||
| 798 | }; | ||
| 799 | result[@intFromEnum(Feature.long_calls)] = .{ | ||
| 800 | .llvm_name = "long-calls", | ||
| 801 | .description = "Generate calls via indirect call instructions", | ||
| 802 | .dependencies = featureSet(&[_]Feature{}), | ||
| 803 | }; | ||
| 804 | result[@intFromEnum(Feature.loop_align)] = .{ | ||
| 805 | .llvm_name = "loop-align", | ||
| 806 | .description = "Prefer 32-bit alignment for loops", | ||
| 807 | .dependencies = featureSet(&[_]Feature{}), | ||
| 808 | }; | ||
| 809 | result[@intFromEnum(Feature.m3)] = .{ | ||
| 810 | .llvm_name = "m3", | ||
| 811 | .description = "Cortex-M3 ARM processors", | ||
| 812 | .dependencies = featureSet(&[_]Feature{}), | ||
| 813 | }; | ||
| 814 | result[@intFromEnum(Feature.mclass)] = .{ | ||
| 815 | .llvm_name = "mclass", | ||
| 816 | .description = "Is microcontroller profile ('M' series)", | ||
| 817 | .dependencies = featureSet(&[_]Feature{}), | ||
| 818 | }; | ||
| 819 | result[@intFromEnum(Feature.mp)] = .{ | ||
| 820 | .llvm_name = "mp", | ||
| 821 | .description = "Supports Multiprocessing extension", | ||
| 822 | .dependencies = featureSet(&[_]Feature{}), | ||
| 823 | }; | ||
| 824 | result[@intFromEnum(Feature.muxed_units)] = .{ | ||
| 825 | .llvm_name = "muxed-units", | ||
| 826 | .description = "Has muxed AGU and NEON/FPU", | ||
| 827 | .dependencies = featureSet(&[_]Feature{}), | ||
| 828 | }; | ||
| 829 | result[@intFromEnum(Feature.mve)] = .{ | ||
| 830 | .llvm_name = "mve", | ||
| 831 | .description = "Support M-Class Vector Extension with integer ops", | ||
| 832 | .dependencies = featureSet(&[_]Feature{ | ||
| 833 | .dsp, | ||
| 834 | .fpregs16, | ||
| 835 | .fpregs64, | ||
| 836 | .has_v8_1m_main, | ||
| 837 | }), | ||
| 838 | }; | ||
| 839 | result[@intFromEnum(Feature.mve1beat)] = .{ | ||
| 840 | .llvm_name = "mve1beat", | ||
| 841 | .description = "Model MVE instructions as a 1 beat per tick architecture", | ||
| 842 | .dependencies = featureSet(&[_]Feature{}), | ||
| 843 | }; | ||
| 844 | result[@intFromEnum(Feature.mve2beat)] = .{ | ||
| 845 | .llvm_name = "mve2beat", | ||
| 846 | .description = "Model MVE instructions as a 2 beats per tick architecture", | ||
| 847 | .dependencies = featureSet(&[_]Feature{}), | ||
| 848 | }; | ||
| 849 | result[@intFromEnum(Feature.mve4beat)] = .{ | ||
| 850 | .llvm_name = "mve4beat", | ||
| 851 | .description = "Model MVE instructions as a 4 beats per tick architecture", | ||
| 852 | .dependencies = featureSet(&[_]Feature{}), | ||
| 853 | }; | ||
| 854 | result[@intFromEnum(Feature.mve_fp)] = .{ | ||
| 855 | .llvm_name = "mve.fp", | ||
| 856 | .description = "Support M-Class Vector Extension with integer and floating ops", | ||
| 857 | .dependencies = featureSet(&[_]Feature{ | ||
| 858 | .fullfp16, | ||
| 859 | .mve, | ||
| 860 | }), | ||
| 861 | }; | ||
| 862 | result[@intFromEnum(Feature.nacl_trap)] = .{ | ||
| 863 | .llvm_name = "nacl-trap", | ||
| 864 | .description = "NaCl trap", | ||
| 865 | .dependencies = featureSet(&[_]Feature{}), | ||
| 866 | }; | ||
| 867 | result[@intFromEnum(Feature.neon)] = .{ | ||
| 868 | .llvm_name = "neon", | ||
| 869 | .description = "Enable NEON instructions", | ||
| 870 | .dependencies = featureSet(&[_]Feature{ | ||
| 871 | .vfp3, | ||
| 872 | }), | ||
| 873 | }; | ||
| 874 | result[@intFromEnum(Feature.neon_fpmovs)] = .{ | ||
| 875 | .llvm_name = "neon-fpmovs", | ||
| 876 | .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", | ||
| 877 | .dependencies = featureSet(&[_]Feature{}), | ||
| 878 | }; | ||
| 879 | result[@intFromEnum(Feature.neonfp)] = .{ | ||
| 880 | .llvm_name = "neonfp", | ||
| 881 | .description = "Use NEON for single precision FP", | ||
| 882 | .dependencies = featureSet(&[_]Feature{}), | ||
| 883 | }; | ||
| 884 | result[@intFromEnum(Feature.no_branch_predictor)] = .{ | ||
| 885 | .llvm_name = "no-branch-predictor", | ||
| 886 | .description = "Has no branch predictor", | ||
| 887 | .dependencies = featureSet(&[_]Feature{}), | ||
| 888 | }; | ||
| 889 | result[@intFromEnum(Feature.no_bti_at_return_twice)] = .{ | ||
| 890 | .llvm_name = "no-bti-at-return-twice", | ||
| 891 | .description = "Don't place a BTI instruction after a return-twice", | ||
| 892 | .dependencies = featureSet(&[_]Feature{}), | ||
| 893 | }; | ||
| 894 | result[@intFromEnum(Feature.no_movt)] = .{ | ||
| 895 | .llvm_name = "no-movt", | ||
| 896 | .description = "Don't use movt/movw pairs for 32-bit imms", | ||
| 897 | .dependencies = featureSet(&[_]Feature{}), | ||
| 898 | }; | ||
| 899 | result[@intFromEnum(Feature.no_neg_immediates)] = .{ | ||
| 900 | .llvm_name = "no-neg-immediates", | ||
| 901 | .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", | ||
| 902 | .dependencies = featureSet(&[_]Feature{}), | ||
| 903 | }; | ||
| 904 | result[@intFromEnum(Feature.noarm)] = .{ | ||
| 905 | .llvm_name = "noarm", | ||
| 906 | .description = "Does not support ARM mode execution", | ||
| 907 | .dependencies = featureSet(&[_]Feature{}), | ||
| 908 | }; | ||
| 909 | result[@intFromEnum(Feature.nonpipelined_vfp)] = .{ | ||
| 910 | .llvm_name = "nonpipelined-vfp", | ||
| 911 | .description = "VFP instructions are not pipelined", | ||
| 912 | .dependencies = featureSet(&[_]Feature{}), | ||
| 913 | }; | ||
| 914 | result[@intFromEnum(Feature.pacbti)] = .{ | ||
| 915 | .llvm_name = "pacbti", | ||
| 916 | .description = "Enable Pointer Authentication and Branch Target Identification", | ||
| 917 | .dependencies = featureSet(&[_]Feature{}), | ||
| 918 | }; | ||
| 919 | result[@intFromEnum(Feature.perfmon)] = .{ | ||
| 920 | .llvm_name = "perfmon", | ||
| 921 | .description = "Enable support for Performance Monitor extensions", | ||
| 922 | .dependencies = featureSet(&[_]Feature{}), | ||
| 923 | }; | ||
| 924 | result[@intFromEnum(Feature.prefer_ishst)] = .{ | ||
| 925 | .llvm_name = "prefer-ishst", | ||
| 926 | .description = "Prefer ISHST barriers", | ||
| 927 | .dependencies = featureSet(&[_]Feature{}), | ||
| 928 | }; | ||
| 929 | result[@intFromEnum(Feature.prefer_vmovsr)] = .{ | ||
| 930 | .llvm_name = "prefer-vmovsr", | ||
| 931 | .description = "Prefer VMOVSR", | ||
| 932 | .dependencies = featureSet(&[_]Feature{}), | ||
| 933 | }; | ||
| 934 | result[@intFromEnum(Feature.prof_unpr)] = .{ | ||
| 935 | .llvm_name = "prof-unpr", | ||
| 936 | .description = "Is profitable to unpredicate", | ||
| 937 | .dependencies = featureSet(&[_]Feature{}), | ||
| 938 | }; | ||
| 939 | result[@intFromEnum(Feature.r4)] = .{ | ||
| 940 | .llvm_name = "r4", | ||
| 941 | .description = "Cortex-R4 ARM processors", | ||
| 942 | .dependencies = featureSet(&[_]Feature{}), | ||
| 943 | }; | ||
| 944 | result[@intFromEnum(Feature.ras)] = .{ | ||
| 945 | .llvm_name = "ras", | ||
| 946 | .description = "Enable Reliability, Availability and Serviceability extensions", | ||
| 947 | .dependencies = featureSet(&[_]Feature{}), | ||
| 948 | }; | ||
| 949 | result[@intFromEnum(Feature.rclass)] = .{ | ||
| 950 | .llvm_name = "rclass", | ||
| 951 | .description = "Is realtime profile ('R' series)", | ||
| 952 | .dependencies = featureSet(&[_]Feature{}), | ||
| 953 | }; | ||
| 954 | result[@intFromEnum(Feature.read_tp_tpidrprw)] = .{ | ||
| 955 | .llvm_name = "read-tp-tpidrprw", | ||
| 956 | .description = "Reading thread pointer from TPIDRPRW register", | ||
| 957 | .dependencies = featureSet(&[_]Feature{}), | ||
| 958 | }; | ||
| 959 | result[@intFromEnum(Feature.read_tp_tpidruro)] = .{ | ||
| 960 | .llvm_name = "read-tp-tpidruro", | ||
| 961 | .description = "Reading thread pointer from TPIDRURO register", | ||
| 962 | .dependencies = featureSet(&[_]Feature{}), | ||
| 963 | }; | ||
| 964 | result[@intFromEnum(Feature.read_tp_tpidrurw)] = .{ | ||
| 965 | .llvm_name = "read-tp-tpidrurw", | ||
| 966 | .description = "Reading thread pointer from TPIDRURW register", | ||
| 967 | .dependencies = featureSet(&[_]Feature{}), | ||
| 968 | }; | ||
| 969 | result[@intFromEnum(Feature.reserve_r9)] = .{ | ||
| 970 | .llvm_name = "reserve-r9", | ||
| 971 | .description = "Reserve R9, making it unavailable as GPR", | ||
| 972 | .dependencies = featureSet(&[_]Feature{}), | ||
| 973 | }; | ||
| 974 | result[@intFromEnum(Feature.ret_addr_stack)] = .{ | ||
| 975 | .llvm_name = "ret-addr-stack", | ||
| 976 | .description = "Has return address stack", | ||
| 977 | .dependencies = featureSet(&[_]Feature{}), | ||
| 978 | }; | ||
| 979 | result[@intFromEnum(Feature.sb)] = .{ | ||
| 980 | .llvm_name = "sb", | ||
| 981 | .description = "Enable v8.5a Speculation Barrier", | ||
| 982 | .dependencies = featureSet(&[_]Feature{}), | ||
| 983 | }; | ||
| 984 | result[@intFromEnum(Feature.sha2)] = .{ | ||
| 985 | .llvm_name = "sha2", | ||
| 986 | .description = "Enable SHA1 and SHA256 support", | ||
| 987 | .dependencies = featureSet(&[_]Feature{ | ||
| 988 | .neon, | ||
| 989 | }), | ||
| 990 | }; | ||
| 991 | result[@intFromEnum(Feature.slow_fp_brcc)] = .{ | ||
| 992 | .llvm_name = "slow-fp-brcc", | ||
| 993 | .description = "FP compare + branch is slow", | ||
| 994 | .dependencies = featureSet(&[_]Feature{}), | ||
| 995 | }; | ||
| 996 | result[@intFromEnum(Feature.slow_load_D_subreg)] = .{ | ||
| 997 | .llvm_name = "slow-load-D-subreg", | ||
| 998 | .description = "Loading into D subregs is slow", | ||
| 999 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1000 | }; | ||
| 1001 | result[@intFromEnum(Feature.slow_odd_reg)] = .{ | ||
| 1002 | .llvm_name = "slow-odd-reg", | ||
| 1003 | .description = "VLDM/VSTM starting with an odd register is slow", | ||
| 1004 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1005 | }; | ||
| 1006 | result[@intFromEnum(Feature.slow_vdup32)] = .{ | ||
| 1007 | .llvm_name = "slow-vdup32", | ||
| 1008 | .description = "Has slow VDUP32 - prefer VMOV", | ||
| 1009 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1010 | }; | ||
| 1011 | result[@intFromEnum(Feature.slow_vgetlni32)] = .{ | ||
| 1012 | .llvm_name = "slow-vgetlni32", | ||
| 1013 | .description = "Has slow VGETLNi32 - prefer VMOV", | ||
| 1014 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1015 | }; | ||
| 1016 | result[@intFromEnum(Feature.slowfpvfmx)] = .{ | ||
| 1017 | .llvm_name = "slowfpvfmx", | ||
| 1018 | .description = "Disable VFP / NEON FMA instructions", | ||
| 1019 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1020 | }; | ||
| 1021 | result[@intFromEnum(Feature.slowfpvmlx)] = .{ | ||
| 1022 | .llvm_name = "slowfpvmlx", | ||
| 1023 | .description = "Disable VFP / NEON MAC instructions", | ||
| 1024 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1025 | }; | ||
| 1026 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 1027 | .llvm_name = "soft-float", | ||
| 1028 | .description = "Use software floating point features.", | ||
| 1029 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1030 | }; | ||
| 1031 | result[@intFromEnum(Feature.splat_vfp_neon)] = .{ | ||
| 1032 | .llvm_name = "splat-vfp-neon", | ||
| 1033 | .description = "Splat register from VFP to NEON", | ||
| 1034 | .dependencies = featureSet(&[_]Feature{ | ||
| 1035 | .dont_widen_vmovs, | ||
| 1036 | }), | ||
| 1037 | }; | ||
| 1038 | result[@intFromEnum(Feature.strict_align)] = .{ | ||
| 1039 | .llvm_name = "strict-align", | ||
| 1040 | .description = "Disallow all unaligned memory access", | ||
| 1041 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1042 | }; | ||
| 1043 | result[@intFromEnum(Feature.swift)] = .{ | ||
| 1044 | .llvm_name = "swift", | ||
| 1045 | .description = "Swift ARM processors", | ||
| 1046 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1047 | }; | ||
| 1048 | result[@intFromEnum(Feature.thumb2)] = .{ | ||
| 1049 | .llvm_name = "thumb2", | ||
| 1050 | .description = "Enable Thumb2 instructions", | ||
| 1051 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1052 | }; | ||
| 1053 | result[@intFromEnum(Feature.thumb_mode)] = .{ | ||
| 1054 | .llvm_name = "thumb-mode", | ||
| 1055 | .description = "Thumb mode", | ||
| 1056 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1057 | }; | ||
| 1058 | result[@intFromEnum(Feature.trustzone)] = .{ | ||
| 1059 | .llvm_name = "trustzone", | ||
| 1060 | .description = "Enable support for TrustZone security extensions", | ||
| 1061 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1062 | }; | ||
| 1063 | result[@intFromEnum(Feature.use_mipipeliner)] = .{ | ||
| 1064 | .llvm_name = "use-mipipeliner", | ||
| 1065 | .description = "Use the MachinePipeliner", | ||
| 1066 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1067 | }; | ||
| 1068 | result[@intFromEnum(Feature.use_misched)] = .{ | ||
| 1069 | .llvm_name = "use-misched", | ||
| 1070 | .description = "Use the MachineScheduler", | ||
| 1071 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1072 | }; | ||
| 1073 | result[@intFromEnum(Feature.v2)] = .{ | ||
| 1074 | .llvm_name = null, | ||
| 1075 | .description = "ARMv2 architecture", | ||
| 1076 | .dependencies = featureSet(&[_]Feature{ | ||
| 1077 | .strict_align, | ||
| 1078 | }), | ||
| 1079 | }; | ||
| 1080 | result[@intFromEnum(Feature.v2a)] = .{ | ||
| 1081 | .llvm_name = null, | ||
| 1082 | .description = "ARMv2a architecture", | ||
| 1083 | .dependencies = featureSet(&[_]Feature{ | ||
| 1084 | .strict_align, | ||
| 1085 | }), | ||
| 1086 | }; | ||
| 1087 | result[@intFromEnum(Feature.v3)] = .{ | ||
| 1088 | .llvm_name = null, | ||
| 1089 | .description = "ARMv3 architecture", | ||
| 1090 | .dependencies = featureSet(&[_]Feature{ | ||
| 1091 | .strict_align, | ||
| 1092 | }), | ||
| 1093 | }; | ||
| 1094 | result[@intFromEnum(Feature.v3m)] = .{ | ||
| 1095 | .llvm_name = null, | ||
| 1096 | .description = "ARMv3m architecture", | ||
| 1097 | .dependencies = featureSet(&[_]Feature{ | ||
| 1098 | .strict_align, | ||
| 1099 | }), | ||
| 1100 | }; | ||
| 1101 | result[@intFromEnum(Feature.v4)] = .{ | ||
| 1102 | .llvm_name = "armv4", | ||
| 1103 | .description = "ARMv4 architecture", | ||
| 1104 | .dependencies = featureSet(&[_]Feature{ | ||
| 1105 | .strict_align, | ||
| 1106 | }), | ||
| 1107 | }; | ||
| 1108 | result[@intFromEnum(Feature.v4t)] = .{ | ||
| 1109 | .llvm_name = "armv4t", | ||
| 1110 | .description = "ARMv4t architecture", | ||
| 1111 | .dependencies = featureSet(&[_]Feature{ | ||
| 1112 | .has_v4t, | ||
| 1113 | .strict_align, | ||
| 1114 | }), | ||
| 1115 | }; | ||
| 1116 | result[@intFromEnum(Feature.v5t)] = .{ | ||
| 1117 | .llvm_name = "armv5t", | ||
| 1118 | .description = "ARMv5t architecture", | ||
| 1119 | .dependencies = featureSet(&[_]Feature{ | ||
| 1120 | .has_v5t, | ||
| 1121 | .strict_align, | ||
| 1122 | }), | ||
| 1123 | }; | ||
| 1124 | result[@intFromEnum(Feature.v5te)] = .{ | ||
| 1125 | .llvm_name = "armv5te", | ||
| 1126 | .description = "ARMv5te architecture", | ||
| 1127 | .dependencies = featureSet(&[_]Feature{ | ||
| 1128 | .has_v5te, | ||
| 1129 | .strict_align, | ||
| 1130 | }), | ||
| 1131 | }; | ||
| 1132 | result[@intFromEnum(Feature.v5tej)] = .{ | ||
| 1133 | .llvm_name = "armv5tej", | ||
| 1134 | .description = "ARMv5tej architecture", | ||
| 1135 | .dependencies = featureSet(&[_]Feature{ | ||
| 1136 | .has_v5te, | ||
| 1137 | .strict_align, | ||
| 1138 | }), | ||
| 1139 | }; | ||
| 1140 | result[@intFromEnum(Feature.v6)] = .{ | ||
| 1141 | .llvm_name = "armv6", | ||
| 1142 | .description = "ARMv6 architecture", | ||
| 1143 | .dependencies = featureSet(&[_]Feature{ | ||
| 1144 | .dsp, | ||
| 1145 | .has_v6, | ||
| 1146 | }), | ||
| 1147 | }; | ||
| 1148 | result[@intFromEnum(Feature.v6j)] = .{ | ||
| 1149 | .llvm_name = "armv6j", | ||
| 1150 | .description = "ARMv7a architecture", | ||
| 1151 | .dependencies = featureSet(&[_]Feature{ | ||
| 1152 | .v6, | ||
| 1153 | }), | ||
| 1154 | }; | ||
| 1155 | result[@intFromEnum(Feature.v6k)] = .{ | ||
| 1156 | .llvm_name = "armv6k", | ||
| 1157 | .description = "ARMv6k architecture", | ||
| 1158 | .dependencies = featureSet(&[_]Feature{ | ||
| 1159 | .has_v6k, | ||
| 1160 | }), | ||
| 1161 | }; | ||
| 1162 | result[@intFromEnum(Feature.v6kz)] = .{ | ||
| 1163 | .llvm_name = "armv6kz", | ||
| 1164 | .description = "ARMv6kz architecture", | ||
| 1165 | .dependencies = featureSet(&[_]Feature{ | ||
| 1166 | .has_v6k, | ||
| 1167 | .trustzone, | ||
| 1168 | }), | ||
| 1169 | }; | ||
| 1170 | result[@intFromEnum(Feature.v6m)] = .{ | ||
| 1171 | .llvm_name = "armv6-m", | ||
| 1172 | .description = "ARMv6m architecture", | ||
| 1173 | .dependencies = featureSet(&[_]Feature{ | ||
| 1174 | .db, | ||
| 1175 | .has_v6m, | ||
| 1176 | .mclass, | ||
| 1177 | .noarm, | ||
| 1178 | .strict_align, | ||
| 1179 | .thumb_mode, | ||
| 1180 | }), | ||
| 1181 | }; | ||
| 1182 | result[@intFromEnum(Feature.v6sm)] = .{ | ||
| 1183 | .llvm_name = "armv6s-m", | ||
| 1184 | .description = "ARMv6sm architecture", | ||
| 1185 | .dependencies = featureSet(&[_]Feature{ | ||
| 1186 | .db, | ||
| 1187 | .has_v6m, | ||
| 1188 | .mclass, | ||
| 1189 | .noarm, | ||
| 1190 | .strict_align, | ||
| 1191 | .thumb_mode, | ||
| 1192 | }), | ||
| 1193 | }; | ||
| 1194 | result[@intFromEnum(Feature.v6t2)] = .{ | ||
| 1195 | .llvm_name = "armv6t2", | ||
| 1196 | .description = "ARMv6t2 architecture", | ||
| 1197 | .dependencies = featureSet(&[_]Feature{ | ||
| 1198 | .dsp, | ||
| 1199 | .has_v6t2, | ||
| 1200 | }), | ||
| 1201 | }; | ||
| 1202 | result[@intFromEnum(Feature.v7a)] = .{ | ||
| 1203 | .llvm_name = "armv7-a", | ||
| 1204 | .description = "ARMv7a architecture", | ||
| 1205 | .dependencies = featureSet(&[_]Feature{ | ||
| 1206 | .aclass, | ||
| 1207 | .db, | ||
| 1208 | .dsp, | ||
| 1209 | .has_v7, | ||
| 1210 | .neon, | ||
| 1211 | .perfmon, | ||
| 1212 | }), | ||
| 1213 | }; | ||
| 1214 | result[@intFromEnum(Feature.v7em)] = .{ | ||
| 1215 | .llvm_name = "armv7e-m", | ||
| 1216 | .description = "ARMv7em architecture", | ||
| 1217 | .dependencies = featureSet(&[_]Feature{ | ||
| 1218 | .db, | ||
| 1219 | .dsp, | ||
| 1220 | .has_v7, | ||
| 1221 | .hwdiv, | ||
| 1222 | .mclass, | ||
| 1223 | .noarm, | ||
| 1224 | .thumb_mode, | ||
| 1225 | }), | ||
| 1226 | }; | ||
| 1227 | result[@intFromEnum(Feature.v7k)] = .{ | ||
| 1228 | .llvm_name = "armv7k", | ||
| 1229 | .description = "ARMv7a architecture", | ||
| 1230 | .dependencies = featureSet(&[_]Feature{ | ||
| 1231 | .v7a, | ||
| 1232 | }), | ||
| 1233 | }; | ||
| 1234 | result[@intFromEnum(Feature.v7m)] = .{ | ||
| 1235 | .llvm_name = "armv7-m", | ||
| 1236 | .description = "ARMv7m architecture", | ||
| 1237 | .dependencies = featureSet(&[_]Feature{ | ||
| 1238 | .db, | ||
| 1239 | .has_v7, | ||
| 1240 | .hwdiv, | ||
| 1241 | .mclass, | ||
| 1242 | .noarm, | ||
| 1243 | .thumb_mode, | ||
| 1244 | }), | ||
| 1245 | }; | ||
| 1246 | result[@intFromEnum(Feature.v7r)] = .{ | ||
| 1247 | .llvm_name = "armv7-r", | ||
| 1248 | .description = "ARMv7r architecture", | ||
| 1249 | .dependencies = featureSet(&[_]Feature{ | ||
| 1250 | .db, | ||
| 1251 | .dsp, | ||
| 1252 | .has_v7, | ||
| 1253 | .hwdiv, | ||
| 1254 | .perfmon, | ||
| 1255 | .rclass, | ||
| 1256 | }), | ||
| 1257 | }; | ||
| 1258 | result[@intFromEnum(Feature.v7s)] = .{ | ||
| 1259 | .llvm_name = "armv7s", | ||
| 1260 | .description = "ARMv7a architecture", | ||
| 1261 | .dependencies = featureSet(&[_]Feature{ | ||
| 1262 | .v7a, | ||
| 1263 | }), | ||
| 1264 | }; | ||
| 1265 | result[@intFromEnum(Feature.v7ve)] = .{ | ||
| 1266 | .llvm_name = "armv7ve", | ||
| 1267 | .description = "ARMv7ve architecture", | ||
| 1268 | .dependencies = featureSet(&[_]Feature{ | ||
| 1269 | .aclass, | ||
| 1270 | .db, | ||
| 1271 | .dsp, | ||
| 1272 | .has_v7, | ||
| 1273 | .mp, | ||
| 1274 | .neon, | ||
| 1275 | .perfmon, | ||
| 1276 | .trustzone, | ||
| 1277 | .virtualization, | ||
| 1278 | }), | ||
| 1279 | }; | ||
| 1280 | result[@intFromEnum(Feature.v8_1a)] = .{ | ||
| 1281 | .llvm_name = "armv8.1-a", | ||
| 1282 | .description = "ARMv81a architecture", | ||
| 1283 | .dependencies = featureSet(&[_]Feature{ | ||
| 1284 | .aclass, | ||
| 1285 | .crc, | ||
| 1286 | .crypto, | ||
| 1287 | .db, | ||
| 1288 | .dsp, | ||
| 1289 | .fp_armv8, | ||
| 1290 | .has_v8_1a, | ||
| 1291 | .mp, | ||
| 1292 | .trustzone, | ||
| 1293 | .virtualization, | ||
| 1294 | }), | ||
| 1295 | }; | ||
| 1296 | result[@intFromEnum(Feature.v8_1m_main)] = .{ | ||
| 1297 | .llvm_name = "armv8.1-m.main", | ||
| 1298 | .description = "ARMv81mMainline architecture", | ||
| 1299 | .dependencies = featureSet(&[_]Feature{ | ||
| 1300 | .@"8msecext", | ||
| 1301 | .acquire_release, | ||
| 1302 | .db, | ||
| 1303 | .has_v8_1m_main, | ||
| 1304 | .hwdiv, | ||
| 1305 | .lob, | ||
| 1306 | .mclass, | ||
| 1307 | .noarm, | ||
| 1308 | .ras, | ||
| 1309 | .thumb_mode, | ||
| 1310 | }), | ||
| 1311 | }; | ||
| 1312 | result[@intFromEnum(Feature.v8_2a)] = .{ | ||
| 1313 | .llvm_name = "armv8.2-a", | ||
| 1314 | .description = "ARMv82a architecture", | ||
| 1315 | .dependencies = featureSet(&[_]Feature{ | ||
| 1316 | .aclass, | ||
| 1317 | .crc, | ||
| 1318 | .crypto, | ||
| 1319 | .db, | ||
| 1320 | .dsp, | ||
| 1321 | .fp_armv8, | ||
| 1322 | .has_v8_2a, | ||
| 1323 | .mp, | ||
| 1324 | .ras, | ||
| 1325 | .trustzone, | ||
| 1326 | .virtualization, | ||
| 1327 | }), | ||
| 1328 | }; | ||
| 1329 | result[@intFromEnum(Feature.v8_3a)] = .{ | ||
| 1330 | .llvm_name = "armv8.3-a", | ||
| 1331 | .description = "ARMv83a architecture", | ||
| 1332 | .dependencies = featureSet(&[_]Feature{ | ||
| 1333 | .aclass, | ||
| 1334 | .crc, | ||
| 1335 | .crypto, | ||
| 1336 | .db, | ||
| 1337 | .dsp, | ||
| 1338 | .fp_armv8, | ||
| 1339 | .has_v8_3a, | ||
| 1340 | .mp, | ||
| 1341 | .ras, | ||
| 1342 | .trustzone, | ||
| 1343 | .virtualization, | ||
| 1344 | }), | ||
| 1345 | }; | ||
| 1346 | result[@intFromEnum(Feature.v8_4a)] = .{ | ||
| 1347 | .llvm_name = "armv8.4-a", | ||
| 1348 | .description = "ARMv84a architecture", | ||
| 1349 | .dependencies = featureSet(&[_]Feature{ | ||
| 1350 | .aclass, | ||
| 1351 | .crc, | ||
| 1352 | .crypto, | ||
| 1353 | .db, | ||
| 1354 | .dsp, | ||
| 1355 | .fp_armv8, | ||
| 1356 | .has_v8_4a, | ||
| 1357 | .mp, | ||
| 1358 | .ras, | ||
| 1359 | .trustzone, | ||
| 1360 | .virtualization, | ||
| 1361 | }), | ||
| 1362 | }; | ||
| 1363 | result[@intFromEnum(Feature.v8_5a)] = .{ | ||
| 1364 | .llvm_name = "armv8.5-a", | ||
| 1365 | .description = "ARMv85a architecture", | ||
| 1366 | .dependencies = featureSet(&[_]Feature{ | ||
| 1367 | .aclass, | ||
| 1368 | .crc, | ||
| 1369 | .crypto, | ||
| 1370 | .db, | ||
| 1371 | .dsp, | ||
| 1372 | .fp_armv8, | ||
| 1373 | .has_v8_5a, | ||
| 1374 | .mp, | ||
| 1375 | .ras, | ||
| 1376 | .trustzone, | ||
| 1377 | .virtualization, | ||
| 1378 | }), | ||
| 1379 | }; | ||
| 1380 | result[@intFromEnum(Feature.v8_6a)] = .{ | ||
| 1381 | .llvm_name = "armv8.6-a", | ||
| 1382 | .description = "ARMv86a architecture", | ||
| 1383 | .dependencies = featureSet(&[_]Feature{ | ||
| 1384 | .aclass, | ||
| 1385 | .crc, | ||
| 1386 | .crypto, | ||
| 1387 | .db, | ||
| 1388 | .dsp, | ||
| 1389 | .fp_armv8, | ||
| 1390 | .has_v8_6a, | ||
| 1391 | .mp, | ||
| 1392 | .ras, | ||
| 1393 | .trustzone, | ||
| 1394 | .virtualization, | ||
| 1395 | }), | ||
| 1396 | }; | ||
| 1397 | result[@intFromEnum(Feature.v8_7a)] = .{ | ||
| 1398 | .llvm_name = "armv8.7-a", | ||
| 1399 | .description = "ARMv87a architecture", | ||
| 1400 | .dependencies = featureSet(&[_]Feature{ | ||
| 1401 | .aclass, | ||
| 1402 | .crc, | ||
| 1403 | .crypto, | ||
| 1404 | .db, | ||
| 1405 | .dsp, | ||
| 1406 | .fp_armv8, | ||
| 1407 | .has_v8_7a, | ||
| 1408 | .mp, | ||
| 1409 | .ras, | ||
| 1410 | .trustzone, | ||
| 1411 | .virtualization, | ||
| 1412 | }), | ||
| 1413 | }; | ||
| 1414 | result[@intFromEnum(Feature.v8_8a)] = .{ | ||
| 1415 | .llvm_name = "armv8.8-a", | ||
| 1416 | .description = "ARMv88a architecture", | ||
| 1417 | .dependencies = featureSet(&[_]Feature{ | ||
| 1418 | .aclass, | ||
| 1419 | .crc, | ||
| 1420 | .crypto, | ||
| 1421 | .db, | ||
| 1422 | .dsp, | ||
| 1423 | .fp_armv8, | ||
| 1424 | .has_v8_8a, | ||
| 1425 | .mp, | ||
| 1426 | .ras, | ||
| 1427 | .trustzone, | ||
| 1428 | .virtualization, | ||
| 1429 | }), | ||
| 1430 | }; | ||
| 1431 | result[@intFromEnum(Feature.v8_9a)] = .{ | ||
| 1432 | .llvm_name = "armv8.9-a", | ||
| 1433 | .description = "ARMv89a architecture", | ||
| 1434 | .dependencies = featureSet(&[_]Feature{ | ||
| 1435 | .aclass, | ||
| 1436 | .crc, | ||
| 1437 | .crypto, | ||
| 1438 | .db, | ||
| 1439 | .dsp, | ||
| 1440 | .fp_armv8, | ||
| 1441 | .has_v8_9a, | ||
| 1442 | .mp, | ||
| 1443 | .ras, | ||
| 1444 | .trustzone, | ||
| 1445 | .virtualization, | ||
| 1446 | }), | ||
| 1447 | }; | ||
| 1448 | result[@intFromEnum(Feature.v8a)] = .{ | ||
| 1449 | .llvm_name = "armv8-a", | ||
| 1450 | .description = "ARMv8a architecture", | ||
| 1451 | .dependencies = featureSet(&[_]Feature{ | ||
| 1452 | .aclass, | ||
| 1453 | .crc, | ||
| 1454 | .crypto, | ||
| 1455 | .db, | ||
| 1456 | .dsp, | ||
| 1457 | .fp_armv8, | ||
| 1458 | .has_v8, | ||
| 1459 | .mp, | ||
| 1460 | .trustzone, | ||
| 1461 | .virtualization, | ||
| 1462 | }), | ||
| 1463 | }; | ||
| 1464 | result[@intFromEnum(Feature.v8m)] = .{ | ||
| 1465 | .llvm_name = "armv8-m.base", | ||
| 1466 | .description = "ARMv8mBaseline architecture", | ||
| 1467 | .dependencies = featureSet(&[_]Feature{ | ||
| 1468 | .@"8msecext", | ||
| 1469 | .acquire_release, | ||
| 1470 | .db, | ||
| 1471 | .has_v7clrex, | ||
| 1472 | .has_v8m, | ||
| 1473 | .hwdiv, | ||
| 1474 | .mclass, | ||
| 1475 | .noarm, | ||
| 1476 | .strict_align, | ||
| 1477 | .thumb_mode, | ||
| 1478 | }), | ||
| 1479 | }; | ||
| 1480 | result[@intFromEnum(Feature.v8m_main)] = .{ | ||
| 1481 | .llvm_name = "armv8-m.main", | ||
| 1482 | .description = "ARMv8mMainline architecture", | ||
| 1483 | .dependencies = featureSet(&[_]Feature{ | ||
| 1484 | .@"8msecext", | ||
| 1485 | .acquire_release, | ||
| 1486 | .db, | ||
| 1487 | .has_v8m_main, | ||
| 1488 | .hwdiv, | ||
| 1489 | .mclass, | ||
| 1490 | .noarm, | ||
| 1491 | .thumb_mode, | ||
| 1492 | }), | ||
| 1493 | }; | ||
| 1494 | result[@intFromEnum(Feature.v8r)] = .{ | ||
| 1495 | .llvm_name = "armv8-r", | ||
| 1496 | .description = "ARMv8r architecture", | ||
| 1497 | .dependencies = featureSet(&[_]Feature{ | ||
| 1498 | .crc, | ||
| 1499 | .db, | ||
| 1500 | .dfb, | ||
| 1501 | .dsp, | ||
| 1502 | .fp_armv8, | ||
| 1503 | .has_v8, | ||
| 1504 | .mp, | ||
| 1505 | .neon, | ||
| 1506 | .rclass, | ||
| 1507 | .virtualization, | ||
| 1508 | }), | ||
| 1509 | }; | ||
| 1510 | result[@intFromEnum(Feature.v9_1a)] = .{ | ||
| 1511 | .llvm_name = "armv9.1-a", | ||
| 1512 | .description = "ARMv91a architecture", | ||
| 1513 | .dependencies = featureSet(&[_]Feature{ | ||
| 1514 | .aclass, | ||
| 1515 | .crc, | ||
| 1516 | .db, | ||
| 1517 | .dsp, | ||
| 1518 | .fp_armv8, | ||
| 1519 | .has_v9_1a, | ||
| 1520 | .mp, | ||
| 1521 | .ras, | ||
| 1522 | .trustzone, | ||
| 1523 | .virtualization, | ||
| 1524 | }), | ||
| 1525 | }; | ||
| 1526 | result[@intFromEnum(Feature.v9_2a)] = .{ | ||
| 1527 | .llvm_name = "armv9.2-a", | ||
| 1528 | .description = "ARMv92a architecture", | ||
| 1529 | .dependencies = featureSet(&[_]Feature{ | ||
| 1530 | .aclass, | ||
| 1531 | .crc, | ||
| 1532 | .db, | ||
| 1533 | .dsp, | ||
| 1534 | .fp_armv8, | ||
| 1535 | .has_v9_2a, | ||
| 1536 | .mp, | ||
| 1537 | .ras, | ||
| 1538 | .trustzone, | ||
| 1539 | .virtualization, | ||
| 1540 | }), | ||
| 1541 | }; | ||
| 1542 | result[@intFromEnum(Feature.v9_3a)] = .{ | ||
| 1543 | .llvm_name = "armv9.3-a", | ||
| 1544 | .description = "ARMv93a architecture", | ||
| 1545 | .dependencies = featureSet(&[_]Feature{ | ||
| 1546 | .aclass, | ||
| 1547 | .crc, | ||
| 1548 | .crypto, | ||
| 1549 | .db, | ||
| 1550 | .dsp, | ||
| 1551 | .fp_armv8, | ||
| 1552 | .has_v9_3a, | ||
| 1553 | .mp, | ||
| 1554 | .ras, | ||
| 1555 | .trustzone, | ||
| 1556 | .virtualization, | ||
| 1557 | }), | ||
| 1558 | }; | ||
| 1559 | result[@intFromEnum(Feature.v9_4a)] = .{ | ||
| 1560 | .llvm_name = "armv9.4-a", | ||
| 1561 | .description = "ARMv94a architecture", | ||
| 1562 | .dependencies = featureSet(&[_]Feature{ | ||
| 1563 | .aclass, | ||
| 1564 | .crc, | ||
| 1565 | .db, | ||
| 1566 | .dsp, | ||
| 1567 | .fp_armv8, | ||
| 1568 | .has_v9_4a, | ||
| 1569 | .mp, | ||
| 1570 | .ras, | ||
| 1571 | .trustzone, | ||
| 1572 | .virtualization, | ||
| 1573 | }), | ||
| 1574 | }; | ||
| 1575 | result[@intFromEnum(Feature.v9a)] = .{ | ||
| 1576 | .llvm_name = "armv9-a", | ||
| 1577 | .description = "ARMv9a architecture", | ||
| 1578 | .dependencies = featureSet(&[_]Feature{ | ||
| 1579 | .aclass, | ||
| 1580 | .crc, | ||
| 1581 | .db, | ||
| 1582 | .dsp, | ||
| 1583 | .fp_armv8, | ||
| 1584 | .has_v9a, | ||
| 1585 | .mp, | ||
| 1586 | .ras, | ||
| 1587 | .trustzone, | ||
| 1588 | .virtualization, | ||
| 1589 | }), | ||
| 1590 | }; | ||
| 1591 | result[@intFromEnum(Feature.vfp2)] = .{ | ||
| 1592 | .llvm_name = "vfp2", | ||
| 1593 | .description = "Enable VFP2 instructions", | ||
| 1594 | .dependencies = featureSet(&[_]Feature{ | ||
| 1595 | .fp64, | ||
| 1596 | .vfp2sp, | ||
| 1597 | }), | ||
| 1598 | }; | ||
| 1599 | result[@intFromEnum(Feature.vfp2sp)] = .{ | ||
| 1600 | .llvm_name = "vfp2sp", | ||
| 1601 | .description = "Enable VFP2 instructions with no double precision", | ||
| 1602 | .dependencies = featureSet(&[_]Feature{ | ||
| 1603 | .fpregs, | ||
| 1604 | }), | ||
| 1605 | }; | ||
| 1606 | result[@intFromEnum(Feature.vfp3)] = .{ | ||
| 1607 | .llvm_name = "vfp3", | ||
| 1608 | .description = "Enable VFP3 instructions", | ||
| 1609 | .dependencies = featureSet(&[_]Feature{ | ||
| 1610 | .vfp3d16, | ||
| 1611 | .vfp3sp, | ||
| 1612 | }), | ||
| 1613 | }; | ||
| 1614 | result[@intFromEnum(Feature.vfp3d16)] = .{ | ||
| 1615 | .llvm_name = "vfp3d16", | ||
| 1616 | .description = "Enable VFP3 instructions with only 16 d-registers", | ||
| 1617 | .dependencies = featureSet(&[_]Feature{ | ||
| 1618 | .vfp2, | ||
| 1619 | .vfp3d16sp, | ||
| 1620 | }), | ||
| 1621 | }; | ||
| 1622 | result[@intFromEnum(Feature.vfp3d16sp)] = .{ | ||
| 1623 | .llvm_name = "vfp3d16sp", | ||
| 1624 | .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", | ||
| 1625 | .dependencies = featureSet(&[_]Feature{ | ||
| 1626 | .vfp2sp, | ||
| 1627 | }), | ||
| 1628 | }; | ||
| 1629 | result[@intFromEnum(Feature.vfp3sp)] = .{ | ||
| 1630 | .llvm_name = "vfp3sp", | ||
| 1631 | .description = "Enable VFP3 instructions with no double precision", | ||
| 1632 | .dependencies = featureSet(&[_]Feature{ | ||
| 1633 | .d32, | ||
| 1634 | .vfp3d16sp, | ||
| 1635 | }), | ||
| 1636 | }; | ||
| 1637 | result[@intFromEnum(Feature.vfp4)] = .{ | ||
| 1638 | .llvm_name = "vfp4", | ||
| 1639 | .description = "Enable VFP4 instructions", | ||
| 1640 | .dependencies = featureSet(&[_]Feature{ | ||
| 1641 | .vfp3, | ||
| 1642 | .vfp4d16, | ||
| 1643 | .vfp4sp, | ||
| 1644 | }), | ||
| 1645 | }; | ||
| 1646 | result[@intFromEnum(Feature.vfp4d16)] = .{ | ||
| 1647 | .llvm_name = "vfp4d16", | ||
| 1648 | .description = "Enable VFP4 instructions with only 16 d-registers", | ||
| 1649 | .dependencies = featureSet(&[_]Feature{ | ||
| 1650 | .vfp3d16, | ||
| 1651 | .vfp4d16sp, | ||
| 1652 | }), | ||
| 1653 | }; | ||
| 1654 | result[@intFromEnum(Feature.vfp4d16sp)] = .{ | ||
| 1655 | .llvm_name = "vfp4d16sp", | ||
| 1656 | .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", | ||
| 1657 | .dependencies = featureSet(&[_]Feature{ | ||
| 1658 | .fp16, | ||
| 1659 | .vfp3d16sp, | ||
| 1660 | }), | ||
| 1661 | }; | ||
| 1662 | result[@intFromEnum(Feature.vfp4sp)] = .{ | ||
| 1663 | .llvm_name = "vfp4sp", | ||
| 1664 | .description = "Enable VFP4 instructions with no double precision", | ||
| 1665 | .dependencies = featureSet(&[_]Feature{ | ||
| 1666 | .vfp3sp, | ||
| 1667 | .vfp4d16sp, | ||
| 1668 | }), | ||
| 1669 | }; | ||
| 1670 | result[@intFromEnum(Feature.virtualization)] = .{ | ||
| 1671 | .llvm_name = "virtualization", | ||
| 1672 | .description = "Supports Virtualization extension", | ||
| 1673 | .dependencies = featureSet(&[_]Feature{ | ||
| 1674 | .hwdiv, | ||
| 1675 | .hwdiv_arm, | ||
| 1676 | }), | ||
| 1677 | }; | ||
| 1678 | result[@intFromEnum(Feature.vldn_align)] = .{ | ||
| 1679 | .llvm_name = "vldn-align", | ||
| 1680 | .description = "Check for VLDn unaligned access", | ||
| 1681 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1682 | }; | ||
| 1683 | result[@intFromEnum(Feature.vmlx_forwarding)] = .{ | ||
| 1684 | .llvm_name = "vmlx-forwarding", | ||
| 1685 | .description = "Has multiplier accumulator forwarding", | ||
| 1686 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1687 | }; | ||
| 1688 | result[@intFromEnum(Feature.vmlx_hazards)] = .{ | ||
| 1689 | .llvm_name = "vmlx-hazards", | ||
| 1690 | .description = "Has VMLx hazards", | ||
| 1691 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1692 | }; | ||
| 1693 | result[@intFromEnum(Feature.wide_stride_vfp)] = .{ | ||
| 1694 | .llvm_name = "wide-stride-vfp", | ||
| 1695 | .description = "Use a wide stride when allocating VFP registers", | ||
| 1696 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1697 | }; | ||
| 1698 | result[@intFromEnum(Feature.xscale)] = .{ | ||
| 1699 | .llvm_name = "xscale", | ||
| 1700 | .description = "ARMv5te architecture", | ||
| 1701 | .dependencies = featureSet(&[_]Feature{ | ||
| 1702 | .v5te, | ||
| 1703 | }), | ||
| 1704 | }; | ||
| 1705 | result[@intFromEnum(Feature.zcz)] = .{ | ||
| 1706 | .llvm_name = "zcz", | ||
| 1707 | .description = "Has zero-cycle zeroing instructions", | ||
| 1708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1709 | }; | ||
| 1710 | const ti = @typeInfo(Feature); | ||
| 1711 | for (&result, 0..) |*elem, i| { | ||
| 1712 | elem.index = i; | ||
| 1713 | elem.name = ti.Enum.fields[i].name; | ||
| 1714 | } | ||
| 1715 | break :blk result; | ||
| 1716 | }; | ||
| 1717 | |||
| 1718 | pub const cpu = struct { | ||
| 1719 | pub const arm1020e = CpuModel{ | ||
| 1720 | .name = "arm1020e", | ||
| 1721 | .llvm_name = "arm1020e", | ||
| 1722 | .features = featureSet(&[_]Feature{ | ||
| 1723 | .v5te, | ||
| 1724 | }), | ||
| 1725 | }; | ||
| 1726 | pub const arm1020t = CpuModel{ | ||
| 1727 | .name = "arm1020t", | ||
| 1728 | .llvm_name = "arm1020t", | ||
| 1729 | .features = featureSet(&[_]Feature{ | ||
| 1730 | .v5t, | ||
| 1731 | }), | ||
| 1732 | }; | ||
| 1733 | pub const arm1022e = CpuModel{ | ||
| 1734 | .name = "arm1022e", | ||
| 1735 | .llvm_name = "arm1022e", | ||
| 1736 | .features = featureSet(&[_]Feature{ | ||
| 1737 | .v5te, | ||
| 1738 | }), | ||
| 1739 | }; | ||
| 1740 | pub const arm10e = CpuModel{ | ||
| 1741 | .name = "arm10e", | ||
| 1742 | .llvm_name = "arm10e", | ||
| 1743 | .features = featureSet(&[_]Feature{ | ||
| 1744 | .v5te, | ||
| 1745 | }), | ||
| 1746 | }; | ||
| 1747 | pub const arm10tdmi = CpuModel{ | ||
| 1748 | .name = "arm10tdmi", | ||
| 1749 | .llvm_name = "arm10tdmi", | ||
| 1750 | .features = featureSet(&[_]Feature{ | ||
| 1751 | .v5t, | ||
| 1752 | }), | ||
| 1753 | }; | ||
| 1754 | pub const arm1136j_s = CpuModel{ | ||
| 1755 | .name = "arm1136j_s", | ||
| 1756 | .llvm_name = "arm1136j-s", | ||
| 1757 | .features = featureSet(&[_]Feature{ | ||
| 1758 | .v6, | ||
| 1759 | }), | ||
| 1760 | }; | ||
| 1761 | pub const arm1136jf_s = CpuModel{ | ||
| 1762 | .name = "arm1136jf_s", | ||
| 1763 | .llvm_name = "arm1136jf-s", | ||
| 1764 | .features = featureSet(&[_]Feature{ | ||
| 1765 | .slowfpvmlx, | ||
| 1766 | .v6, | ||
| 1767 | .vfp2, | ||
| 1768 | }), | ||
| 1769 | }; | ||
| 1770 | pub const arm1156t2_s = CpuModel{ | ||
| 1771 | .name = "arm1156t2_s", | ||
| 1772 | .llvm_name = "arm1156t2-s", | ||
| 1773 | .features = featureSet(&[_]Feature{ | ||
| 1774 | .v6t2, | ||
| 1775 | }), | ||
| 1776 | }; | ||
| 1777 | pub const arm1156t2f_s = CpuModel{ | ||
| 1778 | .name = "arm1156t2f_s", | ||
| 1779 | .llvm_name = "arm1156t2f-s", | ||
| 1780 | .features = featureSet(&[_]Feature{ | ||
| 1781 | .slowfpvmlx, | ||
| 1782 | .v6t2, | ||
| 1783 | .vfp2, | ||
| 1784 | }), | ||
| 1785 | }; | ||
| 1786 | pub const arm1176jz_s = CpuModel{ | ||
| 1787 | .name = "arm1176jz_s", | ||
| 1788 | .llvm_name = "arm1176jz-s", | ||
| 1789 | .features = featureSet(&[_]Feature{ | ||
| 1790 | .v6kz, | ||
| 1791 | }), | ||
| 1792 | }; | ||
| 1793 | pub const arm1176jzf_s = CpuModel{ | ||
| 1794 | .name = "arm1176jzf_s", | ||
| 1795 | .llvm_name = "arm1176jzf-s", | ||
| 1796 | .features = featureSet(&[_]Feature{ | ||
| 1797 | .slowfpvmlx, | ||
| 1798 | .v6kz, | ||
| 1799 | .vfp2, | ||
| 1800 | }), | ||
| 1801 | }; | ||
| 1802 | pub const arm710t = CpuModel{ | ||
| 1803 | .name = "arm710t", | ||
| 1804 | .llvm_name = "arm710t", | ||
| 1805 | .features = featureSet(&[_]Feature{ | ||
| 1806 | .v4t, | ||
| 1807 | }), | ||
| 1808 | }; | ||
| 1809 | pub const arm720t = CpuModel{ | ||
| 1810 | .name = "arm720t", | ||
| 1811 | .llvm_name = "arm720t", | ||
| 1812 | .features = featureSet(&[_]Feature{ | ||
| 1813 | .v4t, | ||
| 1814 | }), | ||
| 1815 | }; | ||
| 1816 | pub const arm7tdmi = CpuModel{ | ||
| 1817 | .name = "arm7tdmi", | ||
| 1818 | .llvm_name = "arm7tdmi", | ||
| 1819 | .features = featureSet(&[_]Feature{ | ||
| 1820 | .v4t, | ||
| 1821 | }), | ||
| 1822 | }; | ||
| 1823 | pub const arm7tdmi_s = CpuModel{ | ||
| 1824 | .name = "arm7tdmi_s", | ||
| 1825 | .llvm_name = "arm7tdmi-s", | ||
| 1826 | .features = featureSet(&[_]Feature{ | ||
| 1827 | .v4t, | ||
| 1828 | }), | ||
| 1829 | }; | ||
| 1830 | pub const arm8 = CpuModel{ | ||
| 1831 | .name = "arm8", | ||
| 1832 | .llvm_name = "arm8", | ||
| 1833 | .features = featureSet(&[_]Feature{ | ||
| 1834 | .v4, | ||
| 1835 | }), | ||
| 1836 | }; | ||
| 1837 | pub const arm810 = CpuModel{ | ||
| 1838 | .name = "arm810", | ||
| 1839 | .llvm_name = "arm810", | ||
| 1840 | .features = featureSet(&[_]Feature{ | ||
| 1841 | .v4, | ||
| 1842 | }), | ||
| 1843 | }; | ||
| 1844 | pub const arm9 = CpuModel{ | ||
| 1845 | .name = "arm9", | ||
| 1846 | .llvm_name = "arm9", | ||
| 1847 | .features = featureSet(&[_]Feature{ | ||
| 1848 | .v4t, | ||
| 1849 | }), | ||
| 1850 | }; | ||
| 1851 | pub const arm920 = CpuModel{ | ||
| 1852 | .name = "arm920", | ||
| 1853 | .llvm_name = "arm920", | ||
| 1854 | .features = featureSet(&[_]Feature{ | ||
| 1855 | .v4t, | ||
| 1856 | }), | ||
| 1857 | }; | ||
| 1858 | pub const arm920t = CpuModel{ | ||
| 1859 | .name = "arm920t", | ||
| 1860 | .llvm_name = "arm920t", | ||
| 1861 | .features = featureSet(&[_]Feature{ | ||
| 1862 | .v4t, | ||
| 1863 | }), | ||
| 1864 | }; | ||
| 1865 | pub const arm922t = CpuModel{ | ||
| 1866 | .name = "arm922t", | ||
| 1867 | .llvm_name = "arm922t", | ||
| 1868 | .features = featureSet(&[_]Feature{ | ||
| 1869 | .v4t, | ||
| 1870 | }), | ||
| 1871 | }; | ||
| 1872 | pub const arm926ej_s = CpuModel{ | ||
| 1873 | .name = "arm926ej_s", | ||
| 1874 | .llvm_name = "arm926ej-s", | ||
| 1875 | .features = featureSet(&[_]Feature{ | ||
| 1876 | .v5te, | ||
| 1877 | }), | ||
| 1878 | }; | ||
| 1879 | pub const arm940t = CpuModel{ | ||
| 1880 | .name = "arm940t", | ||
| 1881 | .llvm_name = "arm940t", | ||
| 1882 | .features = featureSet(&[_]Feature{ | ||
| 1883 | .v4t, | ||
| 1884 | }), | ||
| 1885 | }; | ||
| 1886 | pub const arm946e_s = CpuModel{ | ||
| 1887 | .name = "arm946e_s", | ||
| 1888 | .llvm_name = "arm946e-s", | ||
| 1889 | .features = featureSet(&[_]Feature{ | ||
| 1890 | .v5te, | ||
| 1891 | }), | ||
| 1892 | }; | ||
| 1893 | pub const arm966e_s = CpuModel{ | ||
| 1894 | .name = "arm966e_s", | ||
| 1895 | .llvm_name = "arm966e-s", | ||
| 1896 | .features = featureSet(&[_]Feature{ | ||
| 1897 | .v5te, | ||
| 1898 | }), | ||
| 1899 | }; | ||
| 1900 | pub const arm968e_s = CpuModel{ | ||
| 1901 | .name = "arm968e_s", | ||
| 1902 | .llvm_name = "arm968e-s", | ||
| 1903 | .features = featureSet(&[_]Feature{ | ||
| 1904 | .v5te, | ||
| 1905 | }), | ||
| 1906 | }; | ||
| 1907 | pub const arm9e = CpuModel{ | ||
| 1908 | .name = "arm9e", | ||
| 1909 | .llvm_name = "arm9e", | ||
| 1910 | .features = featureSet(&[_]Feature{ | ||
| 1911 | .v5te, | ||
| 1912 | }), | ||
| 1913 | }; | ||
| 1914 | pub const arm9tdmi = CpuModel{ | ||
| 1915 | .name = "arm9tdmi", | ||
| 1916 | .llvm_name = "arm9tdmi", | ||
| 1917 | .features = featureSet(&[_]Feature{ | ||
| 1918 | .v4t, | ||
| 1919 | }), | ||
| 1920 | }; | ||
| 1921 | pub const baseline = CpuModel{ | ||
| 1922 | .name = "baseline", | ||
| 1923 | .llvm_name = "generic", | ||
| 1924 | .features = featureSet(&[_]Feature{ | ||
| 1925 | .v7a, | ||
| 1926 | }), | ||
| 1927 | }; | ||
| 1928 | pub const cortex_a12 = CpuModel{ | ||
| 1929 | .name = "cortex_a12", | ||
| 1930 | .llvm_name = "cortex-a12", | ||
| 1931 | .features = featureSet(&[_]Feature{ | ||
| 1932 | .avoid_partial_cpsr, | ||
| 1933 | .mp, | ||
| 1934 | .ret_addr_stack, | ||
| 1935 | .trustzone, | ||
| 1936 | .v7a, | ||
| 1937 | .vfp4, | ||
| 1938 | .virtualization, | ||
| 1939 | .vmlx_forwarding, | ||
| 1940 | }), | ||
| 1941 | }; | ||
| 1942 | pub const cortex_a15 = CpuModel{ | ||
| 1943 | .name = "cortex_a15", | ||
| 1944 | .llvm_name = "cortex-a15", | ||
| 1945 | .features = featureSet(&[_]Feature{ | ||
| 1946 | .avoid_partial_cpsr, | ||
| 1947 | .mp, | ||
| 1948 | .muxed_units, | ||
| 1949 | .ret_addr_stack, | ||
| 1950 | .splat_vfp_neon, | ||
| 1951 | .trustzone, | ||
| 1952 | .v7a, | ||
| 1953 | .vfp4, | ||
| 1954 | .virtualization, | ||
| 1955 | .vldn_align, | ||
| 1956 | }), | ||
| 1957 | }; | ||
| 1958 | pub const cortex_a17 = CpuModel{ | ||
| 1959 | .name = "cortex_a17", | ||
| 1960 | .llvm_name = "cortex-a17", | ||
| 1961 | .features = featureSet(&[_]Feature{ | ||
| 1962 | .avoid_partial_cpsr, | ||
| 1963 | .mp, | ||
| 1964 | .ret_addr_stack, | ||
| 1965 | .trustzone, | ||
| 1966 | .v7a, | ||
| 1967 | .vfp4, | ||
| 1968 | .virtualization, | ||
| 1969 | .vmlx_forwarding, | ||
| 1970 | }), | ||
| 1971 | }; | ||
| 1972 | pub const cortex_a32 = CpuModel{ | ||
| 1973 | .name = "cortex_a32", | ||
| 1974 | .llvm_name = "cortex-a32", | ||
| 1975 | .features = featureSet(&[_]Feature{ | ||
| 1976 | .v8a, | ||
| 1977 | }), | ||
| 1978 | }; | ||
| 1979 | pub const cortex_a35 = CpuModel{ | ||
| 1980 | .name = "cortex_a35", | ||
| 1981 | .llvm_name = "cortex-a35", | ||
| 1982 | .features = featureSet(&[_]Feature{ | ||
| 1983 | .v8a, | ||
| 1984 | }), | ||
| 1985 | }; | ||
| 1986 | pub const cortex_a5 = CpuModel{ | ||
| 1987 | .name = "cortex_a5", | ||
| 1988 | .llvm_name = "cortex-a5", | ||
| 1989 | .features = featureSet(&[_]Feature{ | ||
| 1990 | .mp, | ||
| 1991 | .ret_addr_stack, | ||
| 1992 | .slow_fp_brcc, | ||
| 1993 | .slowfpvfmx, | ||
| 1994 | .slowfpvmlx, | ||
| 1995 | .trustzone, | ||
| 1996 | .v7a, | ||
| 1997 | .vfp4, | ||
| 1998 | .vmlx_forwarding, | ||
| 1999 | }), | ||
| 2000 | }; | ||
| 2001 | pub const cortex_a53 = CpuModel{ | ||
| 2002 | .name = "cortex_a53", | ||
| 2003 | .llvm_name = "cortex-a53", | ||
| 2004 | .features = featureSet(&[_]Feature{ | ||
| 2005 | .fpao, | ||
| 2006 | .v8a, | ||
| 2007 | }), | ||
| 2008 | }; | ||
| 2009 | pub const cortex_a55 = CpuModel{ | ||
| 2010 | .name = "cortex_a55", | ||
| 2011 | .llvm_name = "cortex-a55", | ||
| 2012 | .features = featureSet(&[_]Feature{ | ||
| 2013 | .dotprod, | ||
| 2014 | .v8_2a, | ||
| 2015 | }), | ||
| 2016 | }; | ||
| 2017 | pub const cortex_a57 = CpuModel{ | ||
| 2018 | .name = "cortex_a57", | ||
| 2019 | .llvm_name = "cortex-a57", | ||
| 2020 | .features = featureSet(&[_]Feature{ | ||
| 2021 | .avoid_partial_cpsr, | ||
| 2022 | .cheap_predicable_cpsr, | ||
| 2023 | .fix_cortex_a57_aes_1742098, | ||
| 2024 | .fpao, | ||
| 2025 | .v8a, | ||
| 2026 | }), | ||
| 2027 | }; | ||
| 2028 | pub const cortex_a7 = CpuModel{ | ||
| 2029 | .name = "cortex_a7", | ||
| 2030 | .llvm_name = "cortex-a7", | ||
| 2031 | .features = featureSet(&[_]Feature{ | ||
| 2032 | .mp, | ||
| 2033 | .ret_addr_stack, | ||
| 2034 | .slow_fp_brcc, | ||
| 2035 | .slowfpvfmx, | ||
| 2036 | .slowfpvmlx, | ||
| 2037 | .trustzone, | ||
| 2038 | .v7a, | ||
| 2039 | .vfp4, | ||
| 2040 | .virtualization, | ||
| 2041 | .vmlx_forwarding, | ||
| 2042 | .vmlx_hazards, | ||
| 2043 | }), | ||
| 2044 | }; | ||
| 2045 | pub const cortex_a710 = CpuModel{ | ||
| 2046 | .name = "cortex_a710", | ||
| 2047 | .llvm_name = "cortex-a710", | ||
| 2048 | .features = featureSet(&[_]Feature{ | ||
| 2049 | .bf16, | ||
| 2050 | .fp16fml, | ||
| 2051 | .i8mm, | ||
| 2052 | .v9a, | ||
| 2053 | }), | ||
| 2054 | }; | ||
| 2055 | pub const cortex_a72 = CpuModel{ | ||
| 2056 | .name = "cortex_a72", | ||
| 2057 | .llvm_name = "cortex-a72", | ||
| 2058 | .features = featureSet(&[_]Feature{ | ||
| 2059 | .fix_cortex_a57_aes_1742098, | ||
| 2060 | .v8a, | ||
| 2061 | }), | ||
| 2062 | }; | ||
| 2063 | pub const cortex_a73 = CpuModel{ | ||
| 2064 | .name = "cortex_a73", | ||
| 2065 | .llvm_name = "cortex-a73", | ||
| 2066 | .features = featureSet(&[_]Feature{ | ||
| 2067 | .v8a, | ||
| 2068 | }), | ||
| 2069 | }; | ||
| 2070 | pub const cortex_a75 = CpuModel{ | ||
| 2071 | .name = "cortex_a75", | ||
| 2072 | .llvm_name = "cortex-a75", | ||
| 2073 | .features = featureSet(&[_]Feature{ | ||
| 2074 | .dotprod, | ||
| 2075 | .v8_2a, | ||
| 2076 | }), | ||
| 2077 | }; | ||
| 2078 | pub const cortex_a76 = CpuModel{ | ||
| 2079 | .name = "cortex_a76", | ||
| 2080 | .llvm_name = "cortex-a76", | ||
| 2081 | .features = featureSet(&[_]Feature{ | ||
| 2082 | .a76, | ||
| 2083 | .dotprod, | ||
| 2084 | .fullfp16, | ||
| 2085 | .v8_2a, | ||
| 2086 | }), | ||
| 2087 | }; | ||
| 2088 | pub const cortex_a76ae = CpuModel{ | ||
| 2089 | .name = "cortex_a76ae", | ||
| 2090 | .llvm_name = "cortex-a76ae", | ||
| 2091 | .features = featureSet(&[_]Feature{ | ||
| 2092 | .a76, | ||
| 2093 | .dotprod, | ||
| 2094 | .fullfp16, | ||
| 2095 | .v8_2a, | ||
| 2096 | }), | ||
| 2097 | }; | ||
| 2098 | pub const cortex_a77 = CpuModel{ | ||
| 2099 | .name = "cortex_a77", | ||
| 2100 | .llvm_name = "cortex-a77", | ||
| 2101 | .features = featureSet(&[_]Feature{ | ||
| 2102 | .dotprod, | ||
| 2103 | .fullfp16, | ||
| 2104 | .v8_2a, | ||
| 2105 | }), | ||
| 2106 | }; | ||
| 2107 | pub const cortex_a78 = CpuModel{ | ||
| 2108 | .name = "cortex_a78", | ||
| 2109 | .llvm_name = "cortex-a78", | ||
| 2110 | .features = featureSet(&[_]Feature{ | ||
| 2111 | .dotprod, | ||
| 2112 | .fullfp16, | ||
| 2113 | .v8_2a, | ||
| 2114 | }), | ||
| 2115 | }; | ||
| 2116 | pub const cortex_a78c = CpuModel{ | ||
| 2117 | .name = "cortex_a78c", | ||
| 2118 | .llvm_name = "cortex-a78c", | ||
| 2119 | .features = featureSet(&[_]Feature{ | ||
| 2120 | .dotprod, | ||
| 2121 | .fullfp16, | ||
| 2122 | .v8_2a, | ||
| 2123 | }), | ||
| 2124 | }; | ||
| 2125 | pub const cortex_a8 = CpuModel{ | ||
| 2126 | .name = "cortex_a8", | ||
| 2127 | .llvm_name = "cortex-a8", | ||
| 2128 | .features = featureSet(&[_]Feature{ | ||
| 2129 | .nonpipelined_vfp, | ||
| 2130 | .ret_addr_stack, | ||
| 2131 | .slow_fp_brcc, | ||
| 2132 | .slowfpvfmx, | ||
| 2133 | .slowfpvmlx, | ||
| 2134 | .trustzone, | ||
| 2135 | .v7a, | ||
| 2136 | .vmlx_forwarding, | ||
| 2137 | .vmlx_hazards, | ||
| 2138 | }), | ||
| 2139 | }; | ||
| 2140 | pub const cortex_a9 = CpuModel{ | ||
| 2141 | .name = "cortex_a9", | ||
| 2142 | .llvm_name = "cortex-a9", | ||
| 2143 | .features = featureSet(&[_]Feature{ | ||
| 2144 | .avoid_partial_cpsr, | ||
| 2145 | .expand_fp_mlx, | ||
| 2146 | .fp16, | ||
| 2147 | .mp, | ||
| 2148 | .muxed_units, | ||
| 2149 | .neon_fpmovs, | ||
| 2150 | .prefer_vmovsr, | ||
| 2151 | .ret_addr_stack, | ||
| 2152 | .trustzone, | ||
| 2153 | .v7a, | ||
| 2154 | .vldn_align, | ||
| 2155 | .vmlx_forwarding, | ||
| 2156 | .vmlx_hazards, | ||
| 2157 | }), | ||
| 2158 | }; | ||
| 2159 | pub const cortex_m0 = CpuModel{ | ||
| 2160 | .name = "cortex_m0", | ||
| 2161 | .llvm_name = "cortex-m0", | ||
| 2162 | .features = featureSet(&[_]Feature{ | ||
| 2163 | .no_branch_predictor, | ||
| 2164 | .v6m, | ||
| 2165 | }), | ||
| 2166 | }; | ||
| 2167 | pub const cortex_m0plus = CpuModel{ | ||
| 2168 | .name = "cortex_m0plus", | ||
| 2169 | .llvm_name = "cortex-m0plus", | ||
| 2170 | .features = featureSet(&[_]Feature{ | ||
| 2171 | .no_branch_predictor, | ||
| 2172 | .v6m, | ||
| 2173 | }), | ||
| 2174 | }; | ||
| 2175 | pub const cortex_m1 = CpuModel{ | ||
| 2176 | .name = "cortex_m1", | ||
| 2177 | .llvm_name = "cortex-m1", | ||
| 2178 | .features = featureSet(&[_]Feature{ | ||
| 2179 | .no_branch_predictor, | ||
| 2180 | .v6m, | ||
| 2181 | }), | ||
| 2182 | }; | ||
| 2183 | pub const cortex_m23 = CpuModel{ | ||
| 2184 | .name = "cortex_m23", | ||
| 2185 | .llvm_name = "cortex-m23", | ||
| 2186 | .features = featureSet(&[_]Feature{ | ||
| 2187 | .no_branch_predictor, | ||
| 2188 | .no_movt, | ||
| 2189 | .v8m, | ||
| 2190 | }), | ||
| 2191 | }; | ||
| 2192 | pub const cortex_m3 = CpuModel{ | ||
| 2193 | .name = "cortex_m3", | ||
| 2194 | .llvm_name = "cortex-m3", | ||
| 2195 | .features = featureSet(&[_]Feature{ | ||
| 2196 | .loop_align, | ||
| 2197 | .m3, | ||
| 2198 | .no_branch_predictor, | ||
| 2199 | .use_misched, | ||
| 2200 | .v7m, | ||
| 2201 | }), | ||
| 2202 | }; | ||
| 2203 | pub const cortex_m33 = CpuModel{ | ||
| 2204 | .name = "cortex_m33", | ||
| 2205 | .llvm_name = "cortex-m33", | ||
| 2206 | .features = featureSet(&[_]Feature{ | ||
| 2207 | .dsp, | ||
| 2208 | .fix_cmse_cve_2021_35465, | ||
| 2209 | .fp_armv8d16sp, | ||
| 2210 | .loop_align, | ||
| 2211 | .no_branch_predictor, | ||
| 2212 | .slowfpvfmx, | ||
| 2213 | .slowfpvmlx, | ||
| 2214 | .use_misched, | ||
| 2215 | .v8m_main, | ||
| 2216 | }), | ||
| 2217 | }; | ||
| 2218 | pub const cortex_m35p = CpuModel{ | ||
| 2219 | .name = "cortex_m35p", | ||
| 2220 | .llvm_name = "cortex-m35p", | ||
| 2221 | .features = featureSet(&[_]Feature{ | ||
| 2222 | .dsp, | ||
| 2223 | .fix_cmse_cve_2021_35465, | ||
| 2224 | .fp_armv8d16sp, | ||
| 2225 | .loop_align, | ||
| 2226 | .no_branch_predictor, | ||
| 2227 | .slowfpvfmx, | ||
| 2228 | .slowfpvmlx, | ||
| 2229 | .use_misched, | ||
| 2230 | .v8m_main, | ||
| 2231 | }), | ||
| 2232 | }; | ||
| 2233 | pub const cortex_m4 = CpuModel{ | ||
| 2234 | .name = "cortex_m4", | ||
| 2235 | .llvm_name = "cortex-m4", | ||
| 2236 | .features = featureSet(&[_]Feature{ | ||
| 2237 | .loop_align, | ||
| 2238 | .no_branch_predictor, | ||
| 2239 | .slowfpvfmx, | ||
| 2240 | .slowfpvmlx, | ||
| 2241 | .use_misched, | ||
| 2242 | .v7em, | ||
| 2243 | .vfp4d16sp, | ||
| 2244 | }), | ||
| 2245 | }; | ||
| 2246 | pub const cortex_m55 = CpuModel{ | ||
| 2247 | .name = "cortex_m55", | ||
| 2248 | .llvm_name = "cortex-m55", | ||
| 2249 | .features = featureSet(&[_]Feature{ | ||
| 2250 | .fix_cmse_cve_2021_35465, | ||
| 2251 | .fp_armv8d16, | ||
| 2252 | .loop_align, | ||
| 2253 | .mve_fp, | ||
| 2254 | .no_branch_predictor, | ||
| 2255 | .slowfpvmlx, | ||
| 2256 | .use_misched, | ||
| 2257 | .v8_1m_main, | ||
| 2258 | }), | ||
| 2259 | }; | ||
| 2260 | pub const cortex_m7 = CpuModel{ | ||
| 2261 | .name = "cortex_m7", | ||
| 2262 | .llvm_name = "cortex-m7", | ||
| 2263 | .features = featureSet(&[_]Feature{ | ||
| 2264 | .fp_armv8d16, | ||
| 2265 | .use_mipipeliner, | ||
| 2266 | .use_misched, | ||
| 2267 | .v7em, | ||
| 2268 | }), | ||
| 2269 | }; | ||
| 2270 | pub const cortex_m85 = CpuModel{ | ||
| 2271 | .name = "cortex_m85", | ||
| 2272 | .llvm_name = "cortex-m85", | ||
| 2273 | .features = featureSet(&[_]Feature{ | ||
| 2274 | .fp_armv8d16, | ||
| 2275 | .mve_fp, | ||
| 2276 | .pacbti, | ||
| 2277 | .use_misched, | ||
| 2278 | .v8_1m_main, | ||
| 2279 | }), | ||
| 2280 | }; | ||
| 2281 | pub const cortex_r4 = CpuModel{ | ||
| 2282 | .name = "cortex_r4", | ||
| 2283 | .llvm_name = "cortex-r4", | ||
| 2284 | .features = featureSet(&[_]Feature{ | ||
| 2285 | .avoid_partial_cpsr, | ||
| 2286 | .r4, | ||
| 2287 | .ret_addr_stack, | ||
| 2288 | .v7r, | ||
| 2289 | }), | ||
| 2290 | }; | ||
| 2291 | pub const cortex_r4f = CpuModel{ | ||
| 2292 | .name = "cortex_r4f", | ||
| 2293 | .llvm_name = "cortex-r4f", | ||
| 2294 | .features = featureSet(&[_]Feature{ | ||
| 2295 | .avoid_partial_cpsr, | ||
| 2296 | .r4, | ||
| 2297 | .ret_addr_stack, | ||
| 2298 | .slow_fp_brcc, | ||
| 2299 | .slowfpvfmx, | ||
| 2300 | .slowfpvmlx, | ||
| 2301 | .v7r, | ||
| 2302 | .vfp3d16, | ||
| 2303 | }), | ||
| 2304 | }; | ||
| 2305 | pub const cortex_r5 = CpuModel{ | ||
| 2306 | .name = "cortex_r5", | ||
| 2307 | .llvm_name = "cortex-r5", | ||
| 2308 | .features = featureSet(&[_]Feature{ | ||
| 2309 | .avoid_partial_cpsr, | ||
| 2310 | .hwdiv_arm, | ||
| 2311 | .ret_addr_stack, | ||
| 2312 | .slow_fp_brcc, | ||
| 2313 | .slowfpvfmx, | ||
| 2314 | .slowfpvmlx, | ||
| 2315 | .v7r, | ||
| 2316 | .vfp3d16, | ||
| 2317 | }), | ||
| 2318 | }; | ||
| 2319 | pub const cortex_r52 = CpuModel{ | ||
| 2320 | .name = "cortex_r52", | ||
| 2321 | .llvm_name = "cortex-r52", | ||
| 2322 | .features = featureSet(&[_]Feature{ | ||
| 2323 | .fpao, | ||
| 2324 | .use_misched, | ||
| 2325 | .v8r, | ||
| 2326 | }), | ||
| 2327 | }; | ||
| 2328 | pub const cortex_r7 = CpuModel{ | ||
| 2329 | .name = "cortex_r7", | ||
| 2330 | .llvm_name = "cortex-r7", | ||
| 2331 | .features = featureSet(&[_]Feature{ | ||
| 2332 | .avoid_partial_cpsr, | ||
| 2333 | .fp16, | ||
| 2334 | .hwdiv_arm, | ||
| 2335 | .mp, | ||
| 2336 | .ret_addr_stack, | ||
| 2337 | .slow_fp_brcc, | ||
| 2338 | .slowfpvfmx, | ||
| 2339 | .slowfpvmlx, | ||
| 2340 | .v7r, | ||
| 2341 | .vfp3d16, | ||
| 2342 | }), | ||
| 2343 | }; | ||
| 2344 | pub const cortex_r8 = CpuModel{ | ||
| 2345 | .name = "cortex_r8", | ||
| 2346 | .llvm_name = "cortex-r8", | ||
| 2347 | .features = featureSet(&[_]Feature{ | ||
| 2348 | .avoid_partial_cpsr, | ||
| 2349 | .fp16, | ||
| 2350 | .hwdiv_arm, | ||
| 2351 | .mp, | ||
| 2352 | .ret_addr_stack, | ||
| 2353 | .slow_fp_brcc, | ||
| 2354 | .slowfpvfmx, | ||
| 2355 | .slowfpvmlx, | ||
| 2356 | .v7r, | ||
| 2357 | .vfp3d16, | ||
| 2358 | }), | ||
| 2359 | }; | ||
| 2360 | pub const cortex_x1 = CpuModel{ | ||
| 2361 | .name = "cortex_x1", | ||
| 2362 | .llvm_name = "cortex-x1", | ||
| 2363 | .features = featureSet(&[_]Feature{ | ||
| 2364 | .dotprod, | ||
| 2365 | .fullfp16, | ||
| 2366 | .v8_2a, | ||
| 2367 | }), | ||
| 2368 | }; | ||
| 2369 | pub const cortex_x1c = CpuModel{ | ||
| 2370 | .name = "cortex_x1c", | ||
| 2371 | .llvm_name = "cortex-x1c", | ||
| 2372 | .features = featureSet(&[_]Feature{ | ||
| 2373 | .dotprod, | ||
| 2374 | .fullfp16, | ||
| 2375 | .v8_2a, | ||
| 2376 | }), | ||
| 2377 | }; | ||
| 2378 | pub const cyclone = CpuModel{ | ||
| 2379 | .name = "cyclone", | ||
| 2380 | .llvm_name = "cyclone", | ||
| 2381 | .features = featureSet(&[_]Feature{ | ||
| 2382 | .avoid_movs_shop, | ||
| 2383 | .avoid_partial_cpsr, | ||
| 2384 | .disable_postra_scheduler, | ||
| 2385 | .neonfp, | ||
| 2386 | .ret_addr_stack, | ||
| 2387 | .slowfpvfmx, | ||
| 2388 | .slowfpvmlx, | ||
| 2389 | .swift, | ||
| 2390 | .use_misched, | ||
| 2391 | .v8a, | ||
| 2392 | .zcz, | ||
| 2393 | }), | ||
| 2394 | }; | ||
| 2395 | pub const ep9312 = CpuModel{ | ||
| 2396 | .name = "ep9312", | ||
| 2397 | .llvm_name = "ep9312", | ||
| 2398 | .features = featureSet(&[_]Feature{ | ||
| 2399 | .v4t, | ||
| 2400 | }), | ||
| 2401 | }; | ||
| 2402 | pub const exynos_m1 = CpuModel{ | ||
| 2403 | .name = "exynos_m1", | ||
| 2404 | .llvm_name = null, | ||
| 2405 | .features = featureSet(&[_]Feature{ | ||
| 2406 | .exynos, | ||
| 2407 | .v8a, | ||
| 2408 | }), | ||
| 2409 | }; | ||
| 2410 | pub const exynos_m2 = CpuModel{ | ||
| 2411 | .name = "exynos_m2", | ||
| 2412 | .llvm_name = null, | ||
| 2413 | .features = featureSet(&[_]Feature{ | ||
| 2414 | .exynos, | ||
| 2415 | .v8a, | ||
| 2416 | }), | ||
| 2417 | }; | ||
| 2418 | pub const exynos_m3 = CpuModel{ | ||
| 2419 | .name = "exynos_m3", | ||
| 2420 | .llvm_name = "exynos-m3", | ||
| 2421 | .features = featureSet(&[_]Feature{ | ||
| 2422 | .exynos, | ||
| 2423 | .v8a, | ||
| 2424 | }), | ||
| 2425 | }; | ||
| 2426 | pub const exynos_m4 = CpuModel{ | ||
| 2427 | .name = "exynos_m4", | ||
| 2428 | .llvm_name = "exynos-m4", | ||
| 2429 | .features = featureSet(&[_]Feature{ | ||
| 2430 | .dotprod, | ||
| 2431 | .exynos, | ||
| 2432 | .fullfp16, | ||
| 2433 | .v8_2a, | ||
| 2434 | }), | ||
| 2435 | }; | ||
| 2436 | pub const exynos_m5 = CpuModel{ | ||
| 2437 | .name = "exynos_m5", | ||
| 2438 | .llvm_name = "exynos-m5", | ||
| 2439 | .features = featureSet(&[_]Feature{ | ||
| 2440 | .dotprod, | ||
| 2441 | .exynos, | ||
| 2442 | .fullfp16, | ||
| 2443 | .v8_2a, | ||
| 2444 | }), | ||
| 2445 | }; | ||
| 2446 | pub const generic = CpuModel{ | ||
| 2447 | .name = "generic", | ||
| 2448 | .llvm_name = "generic", | ||
| 2449 | .features = featureSet(&[_]Feature{}), | ||
| 2450 | }; | ||
| 2451 | pub const iwmmxt = CpuModel{ | ||
| 2452 | .name = "iwmmxt", | ||
| 2453 | .llvm_name = "iwmmxt", | ||
| 2454 | .features = featureSet(&[_]Feature{ | ||
| 2455 | .v5te, | ||
| 2456 | }), | ||
| 2457 | }; | ||
| 2458 | pub const krait = CpuModel{ | ||
| 2459 | .name = "krait", | ||
| 2460 | .llvm_name = "krait", | ||
| 2461 | .features = featureSet(&[_]Feature{ | ||
| 2462 | .avoid_partial_cpsr, | ||
| 2463 | .hwdiv, | ||
| 2464 | .hwdiv_arm, | ||
| 2465 | .muxed_units, | ||
| 2466 | .ret_addr_stack, | ||
| 2467 | .v7a, | ||
| 2468 | .vfp4, | ||
| 2469 | .vldn_align, | ||
| 2470 | .vmlx_forwarding, | ||
| 2471 | }), | ||
| 2472 | }; | ||
| 2473 | pub const kryo = CpuModel{ | ||
| 2474 | .name = "kryo", | ||
| 2475 | .llvm_name = "kryo", | ||
| 2476 | .features = featureSet(&[_]Feature{ | ||
| 2477 | .v8a, | ||
| 2478 | }), | ||
| 2479 | }; | ||
| 2480 | pub const mpcore = CpuModel{ | ||
| 2481 | .name = "mpcore", | ||
| 2482 | .llvm_name = "mpcore", | ||
| 2483 | .features = featureSet(&[_]Feature{ | ||
| 2484 | .slowfpvmlx, | ||
| 2485 | .v6k, | ||
| 2486 | .vfp2, | ||
| 2487 | }), | ||
| 2488 | }; | ||
| 2489 | pub const mpcorenovfp = CpuModel{ | ||
| 2490 | .name = "mpcorenovfp", | ||
| 2491 | .llvm_name = "mpcorenovfp", | ||
| 2492 | .features = featureSet(&[_]Feature{ | ||
| 2493 | .v6k, | ||
| 2494 | }), | ||
| 2495 | }; | ||
| 2496 | pub const neoverse_n1 = CpuModel{ | ||
| 2497 | .name = "neoverse_n1", | ||
| 2498 | .llvm_name = "neoverse-n1", | ||
| 2499 | .features = featureSet(&[_]Feature{ | ||
| 2500 | .dotprod, | ||
| 2501 | .v8_2a, | ||
| 2502 | }), | ||
| 2503 | }; | ||
| 2504 | pub const neoverse_n2 = CpuModel{ | ||
| 2505 | .name = "neoverse_n2", | ||
| 2506 | .llvm_name = "neoverse-n2", | ||
| 2507 | .features = featureSet(&[_]Feature{ | ||
| 2508 | .bf16, | ||
| 2509 | .i8mm, | ||
| 2510 | .v8_5a, | ||
| 2511 | }), | ||
| 2512 | }; | ||
| 2513 | pub const neoverse_v1 = CpuModel{ | ||
| 2514 | .name = "neoverse_v1", | ||
| 2515 | .llvm_name = "neoverse-v1", | ||
| 2516 | .features = featureSet(&[_]Feature{ | ||
| 2517 | .bf16, | ||
| 2518 | .fullfp16, | ||
| 2519 | .i8mm, | ||
| 2520 | .v8_4a, | ||
| 2521 | }), | ||
| 2522 | }; | ||
| 2523 | pub const sc000 = CpuModel{ | ||
| 2524 | .name = "sc000", | ||
| 2525 | .llvm_name = "sc000", | ||
| 2526 | .features = featureSet(&[_]Feature{ | ||
| 2527 | .no_branch_predictor, | ||
| 2528 | .v6m, | ||
| 2529 | }), | ||
| 2530 | }; | ||
| 2531 | pub const sc300 = CpuModel{ | ||
| 2532 | .name = "sc300", | ||
| 2533 | .llvm_name = "sc300", | ||
| 2534 | .features = featureSet(&[_]Feature{ | ||
| 2535 | .m3, | ||
| 2536 | .no_branch_predictor, | ||
| 2537 | .use_misched, | ||
| 2538 | .v7m, | ||
| 2539 | }), | ||
| 2540 | }; | ||
| 2541 | pub const strongarm = CpuModel{ | ||
| 2542 | .name = "strongarm", | ||
| 2543 | .llvm_name = "strongarm", | ||
| 2544 | .features = featureSet(&[_]Feature{ | ||
| 2545 | .v4, | ||
| 2546 | }), | ||
| 2547 | }; | ||
| 2548 | pub const strongarm110 = CpuModel{ | ||
| 2549 | .name = "strongarm110", | ||
| 2550 | .llvm_name = "strongarm110", | ||
| 2551 | .features = featureSet(&[_]Feature{ | ||
| 2552 | .v4, | ||
| 2553 | }), | ||
| 2554 | }; | ||
| 2555 | pub const strongarm1100 = CpuModel{ | ||
| 2556 | .name = "strongarm1100", | ||
| 2557 | .llvm_name = "strongarm1100", | ||
| 2558 | .features = featureSet(&[_]Feature{ | ||
| 2559 | .v4, | ||
| 2560 | }), | ||
| 2561 | }; | ||
| 2562 | pub const strongarm1110 = CpuModel{ | ||
| 2563 | .name = "strongarm1110", | ||
| 2564 | .llvm_name = "strongarm1110", | ||
| 2565 | .features = featureSet(&[_]Feature{ | ||
| 2566 | .v4, | ||
| 2567 | }), | ||
| 2568 | }; | ||
| 2569 | pub const swift = CpuModel{ | ||
| 2570 | .name = "swift", | ||
| 2571 | .llvm_name = "swift", | ||
| 2572 | .features = featureSet(&[_]Feature{ | ||
| 2573 | .avoid_movs_shop, | ||
| 2574 | .avoid_partial_cpsr, | ||
| 2575 | .disable_postra_scheduler, | ||
| 2576 | .hwdiv, | ||
| 2577 | .hwdiv_arm, | ||
| 2578 | .mp, | ||
| 2579 | .neonfp, | ||
| 2580 | .prefer_ishst, | ||
| 2581 | .prof_unpr, | ||
| 2582 | .ret_addr_stack, | ||
| 2583 | .slow_load_D_subreg, | ||
| 2584 | .slow_odd_reg, | ||
| 2585 | .slow_vdup32, | ||
| 2586 | .slow_vgetlni32, | ||
| 2587 | .slowfpvfmx, | ||
| 2588 | .slowfpvmlx, | ||
| 2589 | .swift, | ||
| 2590 | .use_misched, | ||
| 2591 | .v7a, | ||
| 2592 | .vfp4, | ||
| 2593 | .vmlx_hazards, | ||
| 2594 | .wide_stride_vfp, | ||
| 2595 | }), | ||
| 2596 | }; | ||
| 2597 | pub const xscale = CpuModel{ | ||
| 2598 | .name = "xscale", | ||
| 2599 | .llvm_name = "xscale", | ||
| 2600 | .features = featureSet(&[_]Feature{ | ||
| 2601 | .v5te, | ||
| 2602 | }), | ||
| 2603 | }; | ||
| 2604 | }; | ||
lib/std/target/avr.zig deleted-2607
| ... | @@ -1,2607 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | addsubiw, | ||
| 9 | avr0, | ||
| 10 | avr1, | ||
| 11 | avr2, | ||
| 12 | avr25, | ||
| 13 | avr3, | ||
| 14 | avr31, | ||
| 15 | avr35, | ||
| 16 | avr4, | ||
| 17 | avr5, | ||
| 18 | avr51, | ||
| 19 | avr6, | ||
| 20 | avrtiny, | ||
| 21 | @"break", | ||
| 22 | des, | ||
| 23 | eijmpcall, | ||
| 24 | elpm, | ||
| 25 | elpmx, | ||
| 26 | ijmpcall, | ||
| 27 | jmpcall, | ||
| 28 | lowbytefirst, | ||
| 29 | lpm, | ||
| 30 | lpmx, | ||
| 31 | memmappedregs, | ||
| 32 | movw, | ||
| 33 | mul, | ||
| 34 | rmw, | ||
| 35 | smallstack, | ||
| 36 | special, | ||
| 37 | spm, | ||
| 38 | spmx, | ||
| 39 | sram, | ||
| 40 | tinyencoding, | ||
| 41 | xmega, | ||
| 42 | xmega3, | ||
| 43 | xmegau, | ||
| 44 | }; | ||
| 45 | |||
| 46 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 47 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 48 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 49 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 50 | |||
| 51 | pub const all_features = blk: { | ||
| 52 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 53 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 54 | var result: [len]CpuFeature = undefined; | ||
| 55 | result[@intFromEnum(Feature.addsubiw)] = .{ | ||
| 56 | .llvm_name = "addsubiw", | ||
| 57 | .description = "Enable 16-bit register-immediate addition and subtraction instructions", | ||
| 58 | .dependencies = featureSet(&[_]Feature{}), | ||
| 59 | }; | ||
| 60 | result[@intFromEnum(Feature.avr0)] = .{ | ||
| 61 | .llvm_name = "avr0", | ||
| 62 | .description = "The device is a part of the avr0 family", | ||
| 63 | .dependencies = featureSet(&[_]Feature{}), | ||
| 64 | }; | ||
| 65 | result[@intFromEnum(Feature.avr1)] = .{ | ||
| 66 | .llvm_name = "avr1", | ||
| 67 | .description = "The device is a part of the avr1 family", | ||
| 68 | .dependencies = featureSet(&[_]Feature{ | ||
| 69 | .avr0, | ||
| 70 | .lpm, | ||
| 71 | .memmappedregs, | ||
| 72 | }), | ||
| 73 | }; | ||
| 74 | result[@intFromEnum(Feature.avr2)] = .{ | ||
| 75 | .llvm_name = "avr2", | ||
| 76 | .description = "The device is a part of the avr2 family", | ||
| 77 | .dependencies = featureSet(&[_]Feature{ | ||
| 78 | .addsubiw, | ||
| 79 | .avr1, | ||
| 80 | .ijmpcall, | ||
| 81 | .sram, | ||
| 82 | }), | ||
| 83 | }; | ||
| 84 | result[@intFromEnum(Feature.avr25)] = .{ | ||
| 85 | .llvm_name = "avr25", | ||
| 86 | .description = "The device is a part of the avr25 family", | ||
| 87 | .dependencies = featureSet(&[_]Feature{ | ||
| 88 | .avr2, | ||
| 89 | .@"break", | ||
| 90 | .lpmx, | ||
| 91 | .movw, | ||
| 92 | .spm, | ||
| 93 | }), | ||
| 94 | }; | ||
| 95 | result[@intFromEnum(Feature.avr3)] = .{ | ||
| 96 | .llvm_name = "avr3", | ||
| 97 | .description = "The device is a part of the avr3 family", | ||
| 98 | .dependencies = featureSet(&[_]Feature{ | ||
| 99 | .avr2, | ||
| 100 | .jmpcall, | ||
| 101 | }), | ||
| 102 | }; | ||
| 103 | result[@intFromEnum(Feature.avr31)] = .{ | ||
| 104 | .llvm_name = "avr31", | ||
| 105 | .description = "The device is a part of the avr31 family", | ||
| 106 | .dependencies = featureSet(&[_]Feature{ | ||
| 107 | .avr3, | ||
| 108 | .elpm, | ||
| 109 | }), | ||
| 110 | }; | ||
| 111 | result[@intFromEnum(Feature.avr35)] = .{ | ||
| 112 | .llvm_name = "avr35", | ||
| 113 | .description = "The device is a part of the avr35 family", | ||
| 114 | .dependencies = featureSet(&[_]Feature{ | ||
| 115 | .avr3, | ||
| 116 | .@"break", | ||
| 117 | .lpmx, | ||
| 118 | .movw, | ||
| 119 | .spm, | ||
| 120 | }), | ||
| 121 | }; | ||
| 122 | result[@intFromEnum(Feature.avr4)] = .{ | ||
| 123 | .llvm_name = "avr4", | ||
| 124 | .description = "The device is a part of the avr4 family", | ||
| 125 | .dependencies = featureSet(&[_]Feature{ | ||
| 126 | .avr2, | ||
| 127 | .@"break", | ||
| 128 | .lpmx, | ||
| 129 | .movw, | ||
| 130 | .mul, | ||
| 131 | .spm, | ||
| 132 | }), | ||
| 133 | }; | ||
| 134 | result[@intFromEnum(Feature.avr5)] = .{ | ||
| 135 | .llvm_name = "avr5", | ||
| 136 | .description = "The device is a part of the avr5 family", | ||
| 137 | .dependencies = featureSet(&[_]Feature{ | ||
| 138 | .avr3, | ||
| 139 | .@"break", | ||
| 140 | .lpmx, | ||
| 141 | .movw, | ||
| 142 | .mul, | ||
| 143 | .spm, | ||
| 144 | }), | ||
| 145 | }; | ||
| 146 | result[@intFromEnum(Feature.avr51)] = .{ | ||
| 147 | .llvm_name = "avr51", | ||
| 148 | .description = "The device is a part of the avr51 family", | ||
| 149 | .dependencies = featureSet(&[_]Feature{ | ||
| 150 | .avr5, | ||
| 151 | .elpm, | ||
| 152 | .elpmx, | ||
| 153 | }), | ||
| 154 | }; | ||
| 155 | result[@intFromEnum(Feature.avr6)] = .{ | ||
| 156 | .llvm_name = "avr6", | ||
| 157 | .description = "The device is a part of the avr6 family", | ||
| 158 | .dependencies = featureSet(&[_]Feature{ | ||
| 159 | .avr51, | ||
| 160 | .eijmpcall, | ||
| 161 | }), | ||
| 162 | }; | ||
| 163 | result[@intFromEnum(Feature.avrtiny)] = .{ | ||
| 164 | .llvm_name = "avrtiny", | ||
| 165 | .description = "The device is a part of the avrtiny family", | ||
| 166 | .dependencies = featureSet(&[_]Feature{ | ||
| 167 | .avr0, | ||
| 168 | .@"break", | ||
| 169 | .smallstack, | ||
| 170 | .sram, | ||
| 171 | .tinyencoding, | ||
| 172 | }), | ||
| 173 | }; | ||
| 174 | result[@intFromEnum(Feature.@"break")] = .{ | ||
| 175 | .llvm_name = "break", | ||
| 176 | .description = "The device supports the `BREAK` debugging instruction", | ||
| 177 | .dependencies = featureSet(&[_]Feature{}), | ||
| 178 | }; | ||
| 179 | result[@intFromEnum(Feature.des)] = .{ | ||
| 180 | .llvm_name = "des", | ||
| 181 | .description = "The device supports the `DES k` encryption instruction", | ||
| 182 | .dependencies = featureSet(&[_]Feature{}), | ||
| 183 | }; | ||
| 184 | result[@intFromEnum(Feature.eijmpcall)] = .{ | ||
| 185 | .llvm_name = "eijmpcall", | ||
| 186 | .description = "The device supports the `EIJMP`/`EICALL` instructions", | ||
| 187 | .dependencies = featureSet(&[_]Feature{}), | ||
| 188 | }; | ||
| 189 | result[@intFromEnum(Feature.elpm)] = .{ | ||
| 190 | .llvm_name = "elpm", | ||
| 191 | .description = "The device supports the ELPM instruction", | ||
| 192 | .dependencies = featureSet(&[_]Feature{}), | ||
| 193 | }; | ||
| 194 | result[@intFromEnum(Feature.elpmx)] = .{ | ||
| 195 | .llvm_name = "elpmx", | ||
| 196 | .description = "The device supports the `ELPM Rd, Z[+]` instructions", | ||
| 197 | .dependencies = featureSet(&[_]Feature{}), | ||
| 198 | }; | ||
| 199 | result[@intFromEnum(Feature.ijmpcall)] = .{ | ||
| 200 | .llvm_name = "ijmpcall", | ||
| 201 | .description = "The device supports `IJMP`/`ICALL`instructions", | ||
| 202 | .dependencies = featureSet(&[_]Feature{}), | ||
| 203 | }; | ||
| 204 | result[@intFromEnum(Feature.jmpcall)] = .{ | ||
| 205 | .llvm_name = "jmpcall", | ||
| 206 | .description = "The device supports the `JMP` and `CALL` instructions", | ||
| 207 | .dependencies = featureSet(&[_]Feature{}), | ||
| 208 | }; | ||
| 209 | result[@intFromEnum(Feature.lowbytefirst)] = .{ | ||
| 210 | .llvm_name = "lowbytefirst", | ||
| 211 | .description = "Do the low byte first when writing a 16-bit port or storing a 16-bit word", | ||
| 212 | .dependencies = featureSet(&[_]Feature{}), | ||
| 213 | }; | ||
| 214 | result[@intFromEnum(Feature.lpm)] = .{ | ||
| 215 | .llvm_name = "lpm", | ||
| 216 | .description = "The device supports the `LPM` instruction", | ||
| 217 | .dependencies = featureSet(&[_]Feature{}), | ||
| 218 | }; | ||
| 219 | result[@intFromEnum(Feature.lpmx)] = .{ | ||
| 220 | .llvm_name = "lpmx", | ||
| 221 | .description = "The device supports the `LPM Rd, Z[+]` instruction", | ||
| 222 | .dependencies = featureSet(&[_]Feature{}), | ||
| 223 | }; | ||
| 224 | result[@intFromEnum(Feature.memmappedregs)] = .{ | ||
| 225 | .llvm_name = "memmappedregs", | ||
| 226 | .description = "The device has CPU registers mapped in data address space", | ||
| 227 | .dependencies = featureSet(&[_]Feature{}), | ||
| 228 | }; | ||
| 229 | result[@intFromEnum(Feature.movw)] = .{ | ||
| 230 | .llvm_name = "movw", | ||
| 231 | .description = "The device supports the 16-bit MOVW instruction", | ||
| 232 | .dependencies = featureSet(&[_]Feature{}), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.mul)] = .{ | ||
| 235 | .llvm_name = "mul", | ||
| 236 | .description = "The device supports the multiplication instructions", | ||
| 237 | .dependencies = featureSet(&[_]Feature{}), | ||
| 238 | }; | ||
| 239 | result[@intFromEnum(Feature.rmw)] = .{ | ||
| 240 | .llvm_name = "rmw", | ||
| 241 | .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", | ||
| 242 | .dependencies = featureSet(&[_]Feature{}), | ||
| 243 | }; | ||
| 244 | result[@intFromEnum(Feature.smallstack)] = .{ | ||
| 245 | .llvm_name = "smallstack", | ||
| 246 | .description = "The device has an 8-bit stack pointer", | ||
| 247 | .dependencies = featureSet(&[_]Feature{}), | ||
| 248 | }; | ||
| 249 | result[@intFromEnum(Feature.special)] = .{ | ||
| 250 | .llvm_name = "special", | ||
| 251 | .description = "Enable use of the entire instruction set - used for debugging", | ||
| 252 | .dependencies = featureSet(&[_]Feature{ | ||
| 253 | .addsubiw, | ||
| 254 | .@"break", | ||
| 255 | .des, | ||
| 256 | .eijmpcall, | ||
| 257 | .elpm, | ||
| 258 | .elpmx, | ||
| 259 | .ijmpcall, | ||
| 260 | .jmpcall, | ||
| 261 | .lpm, | ||
| 262 | .lpmx, | ||
| 263 | .memmappedregs, | ||
| 264 | .movw, | ||
| 265 | .mul, | ||
| 266 | .rmw, | ||
| 267 | .spm, | ||
| 268 | .spmx, | ||
| 269 | .sram, | ||
| 270 | }), | ||
| 271 | }; | ||
| 272 | result[@intFromEnum(Feature.spm)] = .{ | ||
| 273 | .llvm_name = "spm", | ||
| 274 | .description = "The device supports the `SPM` instruction", | ||
| 275 | .dependencies = featureSet(&[_]Feature{}), | ||
| 276 | }; | ||
| 277 | result[@intFromEnum(Feature.spmx)] = .{ | ||
| 278 | .llvm_name = "spmx", | ||
| 279 | .description = "The device supports the `SPM Z+` instruction", | ||
| 280 | .dependencies = featureSet(&[_]Feature{}), | ||
| 281 | }; | ||
| 282 | result[@intFromEnum(Feature.sram)] = .{ | ||
| 283 | .llvm_name = "sram", | ||
| 284 | .description = "The device has random access memory", | ||
| 285 | .dependencies = featureSet(&[_]Feature{}), | ||
| 286 | }; | ||
| 287 | result[@intFromEnum(Feature.tinyencoding)] = .{ | ||
| 288 | .llvm_name = "tinyencoding", | ||
| 289 | .description = "The device has Tiny core specific instruction encodings", | ||
| 290 | .dependencies = featureSet(&[_]Feature{}), | ||
| 291 | }; | ||
| 292 | result[@intFromEnum(Feature.xmega)] = .{ | ||
| 293 | .llvm_name = "xmega", | ||
| 294 | .description = "The device is a part of the xmega family", | ||
| 295 | .dependencies = featureSet(&[_]Feature{ | ||
| 296 | .addsubiw, | ||
| 297 | .avr0, | ||
| 298 | .@"break", | ||
| 299 | .des, | ||
| 300 | .eijmpcall, | ||
| 301 | .elpm, | ||
| 302 | .elpmx, | ||
| 303 | .ijmpcall, | ||
| 304 | .jmpcall, | ||
| 305 | .lowbytefirst, | ||
| 306 | .lpm, | ||
| 307 | .lpmx, | ||
| 308 | .movw, | ||
| 309 | .mul, | ||
| 310 | .spm, | ||
| 311 | .spmx, | ||
| 312 | .sram, | ||
| 313 | }), | ||
| 314 | }; | ||
| 315 | result[@intFromEnum(Feature.xmega3)] = .{ | ||
| 316 | .llvm_name = "xmega3", | ||
| 317 | .description = "The device is a part of the xmega3 family", | ||
| 318 | .dependencies = featureSet(&[_]Feature{ | ||
| 319 | .addsubiw, | ||
| 320 | .avr0, | ||
| 321 | .@"break", | ||
| 322 | .ijmpcall, | ||
| 323 | .jmpcall, | ||
| 324 | .lowbytefirst, | ||
| 325 | .lpm, | ||
| 326 | .lpmx, | ||
| 327 | .movw, | ||
| 328 | .mul, | ||
| 329 | .sram, | ||
| 330 | }), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.xmegau)] = .{ | ||
| 333 | .llvm_name = "xmegau", | ||
| 334 | .description = "The device is a part of the xmegau family", | ||
| 335 | .dependencies = featureSet(&[_]Feature{ | ||
| 336 | .rmw, | ||
| 337 | .xmega, | ||
| 338 | }), | ||
| 339 | }; | ||
| 340 | const ti = @typeInfo(Feature); | ||
| 341 | for (&result, 0..) |*elem, i| { | ||
| 342 | elem.index = i; | ||
| 343 | elem.name = ti.Enum.fields[i].name; | ||
| 344 | } | ||
| 345 | break :blk result; | ||
| 346 | }; | ||
| 347 | |||
| 348 | pub const cpu = struct { | ||
| 349 | pub const at43usb320 = CpuModel{ | ||
| 350 | .name = "at43usb320", | ||
| 351 | .llvm_name = "at43usb320", | ||
| 352 | .features = featureSet(&[_]Feature{ | ||
| 353 | .avr31, | ||
| 354 | }), | ||
| 355 | }; | ||
| 356 | pub const at43usb355 = CpuModel{ | ||
| 357 | .name = "at43usb355", | ||
| 358 | .llvm_name = "at43usb355", | ||
| 359 | .features = featureSet(&[_]Feature{ | ||
| 360 | .avr3, | ||
| 361 | }), | ||
| 362 | }; | ||
| 363 | pub const at76c711 = CpuModel{ | ||
| 364 | .name = "at76c711", | ||
| 365 | .llvm_name = "at76c711", | ||
| 366 | .features = featureSet(&[_]Feature{ | ||
| 367 | .avr3, | ||
| 368 | }), | ||
| 369 | }; | ||
| 370 | pub const at86rf401 = CpuModel{ | ||
| 371 | .name = "at86rf401", | ||
| 372 | .llvm_name = "at86rf401", | ||
| 373 | .features = featureSet(&[_]Feature{ | ||
| 374 | .avr2, | ||
| 375 | .lpmx, | ||
| 376 | .movw, | ||
| 377 | }), | ||
| 378 | }; | ||
| 379 | pub const at90c8534 = CpuModel{ | ||
| 380 | .name = "at90c8534", | ||
| 381 | .llvm_name = "at90c8534", | ||
| 382 | .features = featureSet(&[_]Feature{ | ||
| 383 | .avr2, | ||
| 384 | }), | ||
| 385 | }; | ||
| 386 | pub const at90can128 = CpuModel{ | ||
| 387 | .name = "at90can128", | ||
| 388 | .llvm_name = "at90can128", | ||
| 389 | .features = featureSet(&[_]Feature{ | ||
| 390 | .avr51, | ||
| 391 | }), | ||
| 392 | }; | ||
| 393 | pub const at90can32 = CpuModel{ | ||
| 394 | .name = "at90can32", | ||
| 395 | .llvm_name = "at90can32", | ||
| 396 | .features = featureSet(&[_]Feature{ | ||
| 397 | .avr5, | ||
| 398 | }), | ||
| 399 | }; | ||
| 400 | pub const at90can64 = CpuModel{ | ||
| 401 | .name = "at90can64", | ||
| 402 | .llvm_name = "at90can64", | ||
| 403 | .features = featureSet(&[_]Feature{ | ||
| 404 | .avr5, | ||
| 405 | }), | ||
| 406 | }; | ||
| 407 | pub const at90pwm1 = CpuModel{ | ||
| 408 | .name = "at90pwm1", | ||
| 409 | .llvm_name = "at90pwm1", | ||
| 410 | .features = featureSet(&[_]Feature{ | ||
| 411 | .avr4, | ||
| 412 | }), | ||
| 413 | }; | ||
| 414 | pub const at90pwm161 = CpuModel{ | ||
| 415 | .name = "at90pwm161", | ||
| 416 | .llvm_name = "at90pwm161", | ||
| 417 | .features = featureSet(&[_]Feature{ | ||
| 418 | .avr5, | ||
| 419 | }), | ||
| 420 | }; | ||
| 421 | pub const at90pwm2 = CpuModel{ | ||
| 422 | .name = "at90pwm2", | ||
| 423 | .llvm_name = "at90pwm2", | ||
| 424 | .features = featureSet(&[_]Feature{ | ||
| 425 | .avr4, | ||
| 426 | }), | ||
| 427 | }; | ||
| 428 | pub const at90pwm216 = CpuModel{ | ||
| 429 | .name = "at90pwm216", | ||
| 430 | .llvm_name = "at90pwm216", | ||
| 431 | .features = featureSet(&[_]Feature{ | ||
| 432 | .avr5, | ||
| 433 | }), | ||
| 434 | }; | ||
| 435 | pub const at90pwm2b = CpuModel{ | ||
| 436 | .name = "at90pwm2b", | ||
| 437 | .llvm_name = "at90pwm2b", | ||
| 438 | .features = featureSet(&[_]Feature{ | ||
| 439 | .avr4, | ||
| 440 | }), | ||
| 441 | }; | ||
| 442 | pub const at90pwm3 = CpuModel{ | ||
| 443 | .name = "at90pwm3", | ||
| 444 | .llvm_name = "at90pwm3", | ||
| 445 | .features = featureSet(&[_]Feature{ | ||
| 446 | .avr4, | ||
| 447 | }), | ||
| 448 | }; | ||
| 449 | pub const at90pwm316 = CpuModel{ | ||
| 450 | .name = "at90pwm316", | ||
| 451 | .llvm_name = "at90pwm316", | ||
| 452 | .features = featureSet(&[_]Feature{ | ||
| 453 | .avr5, | ||
| 454 | }), | ||
| 455 | }; | ||
| 456 | pub const at90pwm3b = CpuModel{ | ||
| 457 | .name = "at90pwm3b", | ||
| 458 | .llvm_name = "at90pwm3b", | ||
| 459 | .features = featureSet(&[_]Feature{ | ||
| 460 | .avr4, | ||
| 461 | }), | ||
| 462 | }; | ||
| 463 | pub const at90pwm81 = CpuModel{ | ||
| 464 | .name = "at90pwm81", | ||
| 465 | .llvm_name = "at90pwm81", | ||
| 466 | .features = featureSet(&[_]Feature{ | ||
| 467 | .avr4, | ||
| 468 | }), | ||
| 469 | }; | ||
| 470 | pub const at90s1200 = CpuModel{ | ||
| 471 | .name = "at90s1200", | ||
| 472 | .llvm_name = "at90s1200", | ||
| 473 | .features = featureSet(&[_]Feature{ | ||
| 474 | .avr0, | ||
| 475 | .smallstack, | ||
| 476 | }), | ||
| 477 | }; | ||
| 478 | pub const at90s2313 = CpuModel{ | ||
| 479 | .name = "at90s2313", | ||
| 480 | .llvm_name = "at90s2313", | ||
| 481 | .features = featureSet(&[_]Feature{ | ||
| 482 | .avr2, | ||
| 483 | .smallstack, | ||
| 484 | }), | ||
| 485 | }; | ||
| 486 | pub const at90s2323 = CpuModel{ | ||
| 487 | .name = "at90s2323", | ||
| 488 | .llvm_name = "at90s2323", | ||
| 489 | .features = featureSet(&[_]Feature{ | ||
| 490 | .avr2, | ||
| 491 | .smallstack, | ||
| 492 | }), | ||
| 493 | }; | ||
| 494 | pub const at90s2333 = CpuModel{ | ||
| 495 | .name = "at90s2333", | ||
| 496 | .llvm_name = "at90s2333", | ||
| 497 | .features = featureSet(&[_]Feature{ | ||
| 498 | .avr2, | ||
| 499 | .smallstack, | ||
| 500 | }), | ||
| 501 | }; | ||
| 502 | pub const at90s2343 = CpuModel{ | ||
| 503 | .name = "at90s2343", | ||
| 504 | .llvm_name = "at90s2343", | ||
| 505 | .features = featureSet(&[_]Feature{ | ||
| 506 | .avr2, | ||
| 507 | .smallstack, | ||
| 508 | }), | ||
| 509 | }; | ||
| 510 | pub const at90s4414 = CpuModel{ | ||
| 511 | .name = "at90s4414", | ||
| 512 | .llvm_name = "at90s4414", | ||
| 513 | .features = featureSet(&[_]Feature{ | ||
| 514 | .avr2, | ||
| 515 | .smallstack, | ||
| 516 | }), | ||
| 517 | }; | ||
| 518 | pub const at90s4433 = CpuModel{ | ||
| 519 | .name = "at90s4433", | ||
| 520 | .llvm_name = "at90s4433", | ||
| 521 | .features = featureSet(&[_]Feature{ | ||
| 522 | .avr2, | ||
| 523 | .smallstack, | ||
| 524 | }), | ||
| 525 | }; | ||
| 526 | pub const at90s4434 = CpuModel{ | ||
| 527 | .name = "at90s4434", | ||
| 528 | .llvm_name = "at90s4434", | ||
| 529 | .features = featureSet(&[_]Feature{ | ||
| 530 | .avr2, | ||
| 531 | .smallstack, | ||
| 532 | }), | ||
| 533 | }; | ||
| 534 | pub const at90s8515 = CpuModel{ | ||
| 535 | .name = "at90s8515", | ||
| 536 | .llvm_name = "at90s8515", | ||
| 537 | .features = featureSet(&[_]Feature{ | ||
| 538 | .avr2, | ||
| 539 | }), | ||
| 540 | }; | ||
| 541 | pub const at90s8535 = CpuModel{ | ||
| 542 | .name = "at90s8535", | ||
| 543 | .llvm_name = "at90s8535", | ||
| 544 | .features = featureSet(&[_]Feature{ | ||
| 545 | .avr2, | ||
| 546 | }), | ||
| 547 | }; | ||
| 548 | pub const at90scr100 = CpuModel{ | ||
| 549 | .name = "at90scr100", | ||
| 550 | .llvm_name = "at90scr100", | ||
| 551 | .features = featureSet(&[_]Feature{ | ||
| 552 | .avr5, | ||
| 553 | }), | ||
| 554 | }; | ||
| 555 | pub const at90usb1286 = CpuModel{ | ||
| 556 | .name = "at90usb1286", | ||
| 557 | .llvm_name = "at90usb1286", | ||
| 558 | .features = featureSet(&[_]Feature{ | ||
| 559 | .avr51, | ||
| 560 | }), | ||
| 561 | }; | ||
| 562 | pub const at90usb1287 = CpuModel{ | ||
| 563 | .name = "at90usb1287", | ||
| 564 | .llvm_name = "at90usb1287", | ||
| 565 | .features = featureSet(&[_]Feature{ | ||
| 566 | .avr51, | ||
| 567 | }), | ||
| 568 | }; | ||
| 569 | pub const at90usb162 = CpuModel{ | ||
| 570 | .name = "at90usb162", | ||
| 571 | .llvm_name = "at90usb162", | ||
| 572 | .features = featureSet(&[_]Feature{ | ||
| 573 | .avr35, | ||
| 574 | }), | ||
| 575 | }; | ||
| 576 | pub const at90usb646 = CpuModel{ | ||
| 577 | .name = "at90usb646", | ||
| 578 | .llvm_name = "at90usb646", | ||
| 579 | .features = featureSet(&[_]Feature{ | ||
| 580 | .avr5, | ||
| 581 | }), | ||
| 582 | }; | ||
| 583 | pub const at90usb647 = CpuModel{ | ||
| 584 | .name = "at90usb647", | ||
| 585 | .llvm_name = "at90usb647", | ||
| 586 | .features = featureSet(&[_]Feature{ | ||
| 587 | .avr5, | ||
| 588 | }), | ||
| 589 | }; | ||
| 590 | pub const at90usb82 = CpuModel{ | ||
| 591 | .name = "at90usb82", | ||
| 592 | .llvm_name = "at90usb82", | ||
| 593 | .features = featureSet(&[_]Feature{ | ||
| 594 | .avr35, | ||
| 595 | }), | ||
| 596 | }; | ||
| 597 | pub const at94k = CpuModel{ | ||
| 598 | .name = "at94k", | ||
| 599 | .llvm_name = "at94k", | ||
| 600 | .features = featureSet(&[_]Feature{ | ||
| 601 | .avr3, | ||
| 602 | .lpmx, | ||
| 603 | .movw, | ||
| 604 | .mul, | ||
| 605 | }), | ||
| 606 | }; | ||
| 607 | pub const ata5272 = CpuModel{ | ||
| 608 | .name = "ata5272", | ||
| 609 | .llvm_name = "ata5272", | ||
| 610 | .features = featureSet(&[_]Feature{ | ||
| 611 | .avr25, | ||
| 612 | }), | ||
| 613 | }; | ||
| 614 | pub const ata5505 = CpuModel{ | ||
| 615 | .name = "ata5505", | ||
| 616 | .llvm_name = "ata5505", | ||
| 617 | .features = featureSet(&[_]Feature{ | ||
| 618 | .avr35, | ||
| 619 | }), | ||
| 620 | }; | ||
| 621 | pub const ata5702m322 = CpuModel{ | ||
| 622 | .name = "ata5702m322", | ||
| 623 | .llvm_name = "ata5702m322", | ||
| 624 | .features = featureSet(&[_]Feature{ | ||
| 625 | .avr5, | ||
| 626 | }), | ||
| 627 | }; | ||
| 628 | pub const ata5782 = CpuModel{ | ||
| 629 | .name = "ata5782", | ||
| 630 | .llvm_name = "ata5782", | ||
| 631 | .features = featureSet(&[_]Feature{ | ||
| 632 | .avr5, | ||
| 633 | }), | ||
| 634 | }; | ||
| 635 | pub const ata5790 = CpuModel{ | ||
| 636 | .name = "ata5790", | ||
| 637 | .llvm_name = "ata5790", | ||
| 638 | .features = featureSet(&[_]Feature{ | ||
| 639 | .avr5, | ||
| 640 | }), | ||
| 641 | }; | ||
| 642 | pub const ata5790n = CpuModel{ | ||
| 643 | .name = "ata5790n", | ||
| 644 | .llvm_name = "ata5790n", | ||
| 645 | .features = featureSet(&[_]Feature{ | ||
| 646 | .avr5, | ||
| 647 | }), | ||
| 648 | }; | ||
| 649 | pub const ata5791 = CpuModel{ | ||
| 650 | .name = "ata5791", | ||
| 651 | .llvm_name = "ata5791", | ||
| 652 | .features = featureSet(&[_]Feature{ | ||
| 653 | .avr5, | ||
| 654 | }), | ||
| 655 | }; | ||
| 656 | pub const ata5795 = CpuModel{ | ||
| 657 | .name = "ata5795", | ||
| 658 | .llvm_name = "ata5795", | ||
| 659 | .features = featureSet(&[_]Feature{ | ||
| 660 | .avr5, | ||
| 661 | }), | ||
| 662 | }; | ||
| 663 | pub const ata5831 = CpuModel{ | ||
| 664 | .name = "ata5831", | ||
| 665 | .llvm_name = "ata5831", | ||
| 666 | .features = featureSet(&[_]Feature{ | ||
| 667 | .avr5, | ||
| 668 | }), | ||
| 669 | }; | ||
| 670 | pub const ata6285 = CpuModel{ | ||
| 671 | .name = "ata6285", | ||
| 672 | .llvm_name = "ata6285", | ||
| 673 | .features = featureSet(&[_]Feature{ | ||
| 674 | .avr4, | ||
| 675 | }), | ||
| 676 | }; | ||
| 677 | pub const ata6286 = CpuModel{ | ||
| 678 | .name = "ata6286", | ||
| 679 | .llvm_name = "ata6286", | ||
| 680 | .features = featureSet(&[_]Feature{ | ||
| 681 | .avr4, | ||
| 682 | }), | ||
| 683 | }; | ||
| 684 | pub const ata6289 = CpuModel{ | ||
| 685 | .name = "ata6289", | ||
| 686 | .llvm_name = "ata6289", | ||
| 687 | .features = featureSet(&[_]Feature{ | ||
| 688 | .avr4, | ||
| 689 | }), | ||
| 690 | }; | ||
| 691 | pub const ata6612c = CpuModel{ | ||
| 692 | .name = "ata6612c", | ||
| 693 | .llvm_name = "ata6612c", | ||
| 694 | .features = featureSet(&[_]Feature{ | ||
| 695 | .avr4, | ||
| 696 | }), | ||
| 697 | }; | ||
| 698 | pub const ata6613c = CpuModel{ | ||
| 699 | .name = "ata6613c", | ||
| 700 | .llvm_name = "ata6613c", | ||
| 701 | .features = featureSet(&[_]Feature{ | ||
| 702 | .avr5, | ||
| 703 | }), | ||
| 704 | }; | ||
| 705 | pub const ata6614q = CpuModel{ | ||
| 706 | .name = "ata6614q", | ||
| 707 | .llvm_name = "ata6614q", | ||
| 708 | .features = featureSet(&[_]Feature{ | ||
| 709 | .avr5, | ||
| 710 | }), | ||
| 711 | }; | ||
| 712 | pub const ata6616c = CpuModel{ | ||
| 713 | .name = "ata6616c", | ||
| 714 | .llvm_name = "ata6616c", | ||
| 715 | .features = featureSet(&[_]Feature{ | ||
| 716 | .avr25, | ||
| 717 | }), | ||
| 718 | }; | ||
| 719 | pub const ata6617c = CpuModel{ | ||
| 720 | .name = "ata6617c", | ||
| 721 | .llvm_name = "ata6617c", | ||
| 722 | .features = featureSet(&[_]Feature{ | ||
| 723 | .avr35, | ||
| 724 | }), | ||
| 725 | }; | ||
| 726 | pub const ata664251 = CpuModel{ | ||
| 727 | .name = "ata664251", | ||
| 728 | .llvm_name = "ata664251", | ||
| 729 | .features = featureSet(&[_]Feature{ | ||
| 730 | .avr35, | ||
| 731 | }), | ||
| 732 | }; | ||
| 733 | pub const ata8210 = CpuModel{ | ||
| 734 | .name = "ata8210", | ||
| 735 | .llvm_name = "ata8210", | ||
| 736 | .features = featureSet(&[_]Feature{ | ||
| 737 | .avr5, | ||
| 738 | }), | ||
| 739 | }; | ||
| 740 | pub const ata8510 = CpuModel{ | ||
| 741 | .name = "ata8510", | ||
| 742 | .llvm_name = "ata8510", | ||
| 743 | .features = featureSet(&[_]Feature{ | ||
| 744 | .avr5, | ||
| 745 | }), | ||
| 746 | }; | ||
| 747 | pub const atmega103 = CpuModel{ | ||
| 748 | .name = "atmega103", | ||
| 749 | .llvm_name = "atmega103", | ||
| 750 | .features = featureSet(&[_]Feature{ | ||
| 751 | .avr31, | ||
| 752 | }), | ||
| 753 | }; | ||
| 754 | pub const atmega128 = CpuModel{ | ||
| 755 | .name = "atmega128", | ||
| 756 | .llvm_name = "atmega128", | ||
| 757 | .features = featureSet(&[_]Feature{ | ||
| 758 | .avr51, | ||
| 759 | }), | ||
| 760 | }; | ||
| 761 | pub const atmega1280 = CpuModel{ | ||
| 762 | .name = "atmega1280", | ||
| 763 | .llvm_name = "atmega1280", | ||
| 764 | .features = featureSet(&[_]Feature{ | ||
| 765 | .avr51, | ||
| 766 | }), | ||
| 767 | }; | ||
| 768 | pub const atmega1281 = CpuModel{ | ||
| 769 | .name = "atmega1281", | ||
| 770 | .llvm_name = "atmega1281", | ||
| 771 | .features = featureSet(&[_]Feature{ | ||
| 772 | .avr51, | ||
| 773 | }), | ||
| 774 | }; | ||
| 775 | pub const atmega1284 = CpuModel{ | ||
| 776 | .name = "atmega1284", | ||
| 777 | .llvm_name = "atmega1284", | ||
| 778 | .features = featureSet(&[_]Feature{ | ||
| 779 | .avr51, | ||
| 780 | }), | ||
| 781 | }; | ||
| 782 | pub const atmega1284p = CpuModel{ | ||
| 783 | .name = "atmega1284p", | ||
| 784 | .llvm_name = "atmega1284p", | ||
| 785 | .features = featureSet(&[_]Feature{ | ||
| 786 | .avr51, | ||
| 787 | }), | ||
| 788 | }; | ||
| 789 | pub const atmega1284rfr2 = CpuModel{ | ||
| 790 | .name = "atmega1284rfr2", | ||
| 791 | .llvm_name = "atmega1284rfr2", | ||
| 792 | .features = featureSet(&[_]Feature{ | ||
| 793 | .avr51, | ||
| 794 | }), | ||
| 795 | }; | ||
| 796 | pub const atmega128a = CpuModel{ | ||
| 797 | .name = "atmega128a", | ||
| 798 | .llvm_name = "atmega128a", | ||
| 799 | .features = featureSet(&[_]Feature{ | ||
| 800 | .avr51, | ||
| 801 | }), | ||
| 802 | }; | ||
| 803 | pub const atmega128rfa1 = CpuModel{ | ||
| 804 | .name = "atmega128rfa1", | ||
| 805 | .llvm_name = "atmega128rfa1", | ||
| 806 | .features = featureSet(&[_]Feature{ | ||
| 807 | .avr51, | ||
| 808 | }), | ||
| 809 | }; | ||
| 810 | pub const atmega128rfr2 = CpuModel{ | ||
| 811 | .name = "atmega128rfr2", | ||
| 812 | .llvm_name = "atmega128rfr2", | ||
| 813 | .features = featureSet(&[_]Feature{ | ||
| 814 | .avr51, | ||
| 815 | }), | ||
| 816 | }; | ||
| 817 | pub const atmega16 = CpuModel{ | ||
| 818 | .name = "atmega16", | ||
| 819 | .llvm_name = "atmega16", | ||
| 820 | .features = featureSet(&[_]Feature{ | ||
| 821 | .avr5, | ||
| 822 | }), | ||
| 823 | }; | ||
| 824 | pub const atmega1608 = CpuModel{ | ||
| 825 | .name = "atmega1608", | ||
| 826 | .llvm_name = "atmega1608", | ||
| 827 | .features = featureSet(&[_]Feature{ | ||
| 828 | .xmega3, | ||
| 829 | }), | ||
| 830 | }; | ||
| 831 | pub const atmega1609 = CpuModel{ | ||
| 832 | .name = "atmega1609", | ||
| 833 | .llvm_name = "atmega1609", | ||
| 834 | .features = featureSet(&[_]Feature{ | ||
| 835 | .xmega3, | ||
| 836 | }), | ||
| 837 | }; | ||
| 838 | pub const atmega161 = CpuModel{ | ||
| 839 | .name = "atmega161", | ||
| 840 | .llvm_name = "atmega161", | ||
| 841 | .features = featureSet(&[_]Feature{ | ||
| 842 | .avr3, | ||
| 843 | .lpmx, | ||
| 844 | .movw, | ||
| 845 | .mul, | ||
| 846 | .spm, | ||
| 847 | }), | ||
| 848 | }; | ||
| 849 | pub const atmega162 = CpuModel{ | ||
| 850 | .name = "atmega162", | ||
| 851 | .llvm_name = "atmega162", | ||
| 852 | .features = featureSet(&[_]Feature{ | ||
| 853 | .avr5, | ||
| 854 | }), | ||
| 855 | }; | ||
| 856 | pub const atmega163 = CpuModel{ | ||
| 857 | .name = "atmega163", | ||
| 858 | .llvm_name = "atmega163", | ||
| 859 | .features = featureSet(&[_]Feature{ | ||
| 860 | .avr3, | ||
| 861 | .lpmx, | ||
| 862 | .movw, | ||
| 863 | .mul, | ||
| 864 | .spm, | ||
| 865 | }), | ||
| 866 | }; | ||
| 867 | pub const atmega164a = CpuModel{ | ||
| 868 | .name = "atmega164a", | ||
| 869 | .llvm_name = "atmega164a", | ||
| 870 | .features = featureSet(&[_]Feature{ | ||
| 871 | .avr5, | ||
| 872 | }), | ||
| 873 | }; | ||
| 874 | pub const atmega164p = CpuModel{ | ||
| 875 | .name = "atmega164p", | ||
| 876 | .llvm_name = "atmega164p", | ||
| 877 | .features = featureSet(&[_]Feature{ | ||
| 878 | .avr5, | ||
| 879 | }), | ||
| 880 | }; | ||
| 881 | pub const atmega164pa = CpuModel{ | ||
| 882 | .name = "atmega164pa", | ||
| 883 | .llvm_name = "atmega164pa", | ||
| 884 | .features = featureSet(&[_]Feature{ | ||
| 885 | .avr5, | ||
| 886 | }), | ||
| 887 | }; | ||
| 888 | pub const atmega165 = CpuModel{ | ||
| 889 | .name = "atmega165", | ||
| 890 | .llvm_name = "atmega165", | ||
| 891 | .features = featureSet(&[_]Feature{ | ||
| 892 | .avr5, | ||
| 893 | }), | ||
| 894 | }; | ||
| 895 | pub const atmega165a = CpuModel{ | ||
| 896 | .name = "atmega165a", | ||
| 897 | .llvm_name = "atmega165a", | ||
| 898 | .features = featureSet(&[_]Feature{ | ||
| 899 | .avr5, | ||
| 900 | }), | ||
| 901 | }; | ||
| 902 | pub const atmega165p = CpuModel{ | ||
| 903 | .name = "atmega165p", | ||
| 904 | .llvm_name = "atmega165p", | ||
| 905 | .features = featureSet(&[_]Feature{ | ||
| 906 | .avr5, | ||
| 907 | }), | ||
| 908 | }; | ||
| 909 | pub const atmega165pa = CpuModel{ | ||
| 910 | .name = "atmega165pa", | ||
| 911 | .llvm_name = "atmega165pa", | ||
| 912 | .features = featureSet(&[_]Feature{ | ||
| 913 | .avr5, | ||
| 914 | }), | ||
| 915 | }; | ||
| 916 | pub const atmega168 = CpuModel{ | ||
| 917 | .name = "atmega168", | ||
| 918 | .llvm_name = "atmega168", | ||
| 919 | .features = featureSet(&[_]Feature{ | ||
| 920 | .avr5, | ||
| 921 | }), | ||
| 922 | }; | ||
| 923 | pub const atmega168a = CpuModel{ | ||
| 924 | .name = "atmega168a", | ||
| 925 | .llvm_name = "atmega168a", | ||
| 926 | .features = featureSet(&[_]Feature{ | ||
| 927 | .avr5, | ||
| 928 | }), | ||
| 929 | }; | ||
| 930 | pub const atmega168p = CpuModel{ | ||
| 931 | .name = "atmega168p", | ||
| 932 | .llvm_name = "atmega168p", | ||
| 933 | .features = featureSet(&[_]Feature{ | ||
| 934 | .avr5, | ||
| 935 | }), | ||
| 936 | }; | ||
| 937 | pub const atmega168pa = CpuModel{ | ||
| 938 | .name = "atmega168pa", | ||
| 939 | .llvm_name = "atmega168pa", | ||
| 940 | .features = featureSet(&[_]Feature{ | ||
| 941 | .avr5, | ||
| 942 | }), | ||
| 943 | }; | ||
| 944 | pub const atmega168pb = CpuModel{ | ||
| 945 | .name = "atmega168pb", | ||
| 946 | .llvm_name = "atmega168pb", | ||
| 947 | .features = featureSet(&[_]Feature{ | ||
| 948 | .avr5, | ||
| 949 | }), | ||
| 950 | }; | ||
| 951 | pub const atmega169 = CpuModel{ | ||
| 952 | .name = "atmega169", | ||
| 953 | .llvm_name = "atmega169", | ||
| 954 | .features = featureSet(&[_]Feature{ | ||
| 955 | .avr5, | ||
| 956 | }), | ||
| 957 | }; | ||
| 958 | pub const atmega169a = CpuModel{ | ||
| 959 | .name = "atmega169a", | ||
| 960 | .llvm_name = "atmega169a", | ||
| 961 | .features = featureSet(&[_]Feature{ | ||
| 962 | .avr5, | ||
| 963 | }), | ||
| 964 | }; | ||
| 965 | pub const atmega169p = CpuModel{ | ||
| 966 | .name = "atmega169p", | ||
| 967 | .llvm_name = "atmega169p", | ||
| 968 | .features = featureSet(&[_]Feature{ | ||
| 969 | .avr5, | ||
| 970 | }), | ||
| 971 | }; | ||
| 972 | pub const atmega169pa = CpuModel{ | ||
| 973 | .name = "atmega169pa", | ||
| 974 | .llvm_name = "atmega169pa", | ||
| 975 | .features = featureSet(&[_]Feature{ | ||
| 976 | .avr5, | ||
| 977 | }), | ||
| 978 | }; | ||
| 979 | pub const atmega16a = CpuModel{ | ||
| 980 | .name = "atmega16a", | ||
| 981 | .llvm_name = "atmega16a", | ||
| 982 | .features = featureSet(&[_]Feature{ | ||
| 983 | .avr5, | ||
| 984 | }), | ||
| 985 | }; | ||
| 986 | pub const atmega16hva = CpuModel{ | ||
| 987 | .name = "atmega16hva", | ||
| 988 | .llvm_name = "atmega16hva", | ||
| 989 | .features = featureSet(&[_]Feature{ | ||
| 990 | .avr5, | ||
| 991 | }), | ||
| 992 | }; | ||
| 993 | pub const atmega16hva2 = CpuModel{ | ||
| 994 | .name = "atmega16hva2", | ||
| 995 | .llvm_name = "atmega16hva2", | ||
| 996 | .features = featureSet(&[_]Feature{ | ||
| 997 | .avr5, | ||
| 998 | }), | ||
| 999 | }; | ||
| 1000 | pub const atmega16hvb = CpuModel{ | ||
| 1001 | .name = "atmega16hvb", | ||
| 1002 | .llvm_name = "atmega16hvb", | ||
| 1003 | .features = featureSet(&[_]Feature{ | ||
| 1004 | .avr5, | ||
| 1005 | }), | ||
| 1006 | }; | ||
| 1007 | pub const atmega16hvbrevb = CpuModel{ | ||
| 1008 | .name = "atmega16hvbrevb", | ||
| 1009 | .llvm_name = "atmega16hvbrevb", | ||
| 1010 | .features = featureSet(&[_]Feature{ | ||
| 1011 | .avr5, | ||
| 1012 | }), | ||
| 1013 | }; | ||
| 1014 | pub const atmega16m1 = CpuModel{ | ||
| 1015 | .name = "atmega16m1", | ||
| 1016 | .llvm_name = "atmega16m1", | ||
| 1017 | .features = featureSet(&[_]Feature{ | ||
| 1018 | .avr5, | ||
| 1019 | }), | ||
| 1020 | }; | ||
| 1021 | pub const atmega16u2 = CpuModel{ | ||
| 1022 | .name = "atmega16u2", | ||
| 1023 | .llvm_name = "atmega16u2", | ||
| 1024 | .features = featureSet(&[_]Feature{ | ||
| 1025 | .avr35, | ||
| 1026 | }), | ||
| 1027 | }; | ||
| 1028 | pub const atmega16u4 = CpuModel{ | ||
| 1029 | .name = "atmega16u4", | ||
| 1030 | .llvm_name = "atmega16u4", | ||
| 1031 | .features = featureSet(&[_]Feature{ | ||
| 1032 | .avr5, | ||
| 1033 | }), | ||
| 1034 | }; | ||
| 1035 | pub const atmega2560 = CpuModel{ | ||
| 1036 | .name = "atmega2560", | ||
| 1037 | .llvm_name = "atmega2560", | ||
| 1038 | .features = featureSet(&[_]Feature{ | ||
| 1039 | .avr6, | ||
| 1040 | }), | ||
| 1041 | }; | ||
| 1042 | pub const atmega2561 = CpuModel{ | ||
| 1043 | .name = "atmega2561", | ||
| 1044 | .llvm_name = "atmega2561", | ||
| 1045 | .features = featureSet(&[_]Feature{ | ||
| 1046 | .avr6, | ||
| 1047 | }), | ||
| 1048 | }; | ||
| 1049 | pub const atmega2564rfr2 = CpuModel{ | ||
| 1050 | .name = "atmega2564rfr2", | ||
| 1051 | .llvm_name = "atmega2564rfr2", | ||
| 1052 | .features = featureSet(&[_]Feature{ | ||
| 1053 | .avr6, | ||
| 1054 | }), | ||
| 1055 | }; | ||
| 1056 | pub const atmega256rfr2 = CpuModel{ | ||
| 1057 | .name = "atmega256rfr2", | ||
| 1058 | .llvm_name = "atmega256rfr2", | ||
| 1059 | .features = featureSet(&[_]Feature{ | ||
| 1060 | .avr6, | ||
| 1061 | }), | ||
| 1062 | }; | ||
| 1063 | pub const atmega32 = CpuModel{ | ||
| 1064 | .name = "atmega32", | ||
| 1065 | .llvm_name = "atmega32", | ||
| 1066 | .features = featureSet(&[_]Feature{ | ||
| 1067 | .avr5, | ||
| 1068 | }), | ||
| 1069 | }; | ||
| 1070 | pub const atmega3208 = CpuModel{ | ||
| 1071 | .name = "atmega3208", | ||
| 1072 | .llvm_name = "atmega3208", | ||
| 1073 | .features = featureSet(&[_]Feature{ | ||
| 1074 | .xmega3, | ||
| 1075 | }), | ||
| 1076 | }; | ||
| 1077 | pub const atmega3209 = CpuModel{ | ||
| 1078 | .name = "atmega3209", | ||
| 1079 | .llvm_name = "atmega3209", | ||
| 1080 | .features = featureSet(&[_]Feature{ | ||
| 1081 | .xmega3, | ||
| 1082 | }), | ||
| 1083 | }; | ||
| 1084 | pub const atmega323 = CpuModel{ | ||
| 1085 | .name = "atmega323", | ||
| 1086 | .llvm_name = "atmega323", | ||
| 1087 | .features = featureSet(&[_]Feature{ | ||
| 1088 | .avr5, | ||
| 1089 | }), | ||
| 1090 | }; | ||
| 1091 | pub const atmega324a = CpuModel{ | ||
| 1092 | .name = "atmega324a", | ||
| 1093 | .llvm_name = "atmega324a", | ||
| 1094 | .features = featureSet(&[_]Feature{ | ||
| 1095 | .avr5, | ||
| 1096 | }), | ||
| 1097 | }; | ||
| 1098 | pub const atmega324p = CpuModel{ | ||
| 1099 | .name = "atmega324p", | ||
| 1100 | .llvm_name = "atmega324p", | ||
| 1101 | .features = featureSet(&[_]Feature{ | ||
| 1102 | .avr5, | ||
| 1103 | }), | ||
| 1104 | }; | ||
| 1105 | pub const atmega324pa = CpuModel{ | ||
| 1106 | .name = "atmega324pa", | ||
| 1107 | .llvm_name = "atmega324pa", | ||
| 1108 | .features = featureSet(&[_]Feature{ | ||
| 1109 | .avr5, | ||
| 1110 | }), | ||
| 1111 | }; | ||
| 1112 | pub const atmega324pb = CpuModel{ | ||
| 1113 | .name = "atmega324pb", | ||
| 1114 | .llvm_name = "atmega324pb", | ||
| 1115 | .features = featureSet(&[_]Feature{ | ||
| 1116 | .avr5, | ||
| 1117 | }), | ||
| 1118 | }; | ||
| 1119 | pub const atmega325 = CpuModel{ | ||
| 1120 | .name = "atmega325", | ||
| 1121 | .llvm_name = "atmega325", | ||
| 1122 | .features = featureSet(&[_]Feature{ | ||
| 1123 | .avr5, | ||
| 1124 | }), | ||
| 1125 | }; | ||
| 1126 | pub const atmega3250 = CpuModel{ | ||
| 1127 | .name = "atmega3250", | ||
| 1128 | .llvm_name = "atmega3250", | ||
| 1129 | .features = featureSet(&[_]Feature{ | ||
| 1130 | .avr5, | ||
| 1131 | }), | ||
| 1132 | }; | ||
| 1133 | pub const atmega3250a = CpuModel{ | ||
| 1134 | .name = "atmega3250a", | ||
| 1135 | .llvm_name = "atmega3250a", | ||
| 1136 | .features = featureSet(&[_]Feature{ | ||
| 1137 | .avr5, | ||
| 1138 | }), | ||
| 1139 | }; | ||
| 1140 | pub const atmega3250p = CpuModel{ | ||
| 1141 | .name = "atmega3250p", | ||
| 1142 | .llvm_name = "atmega3250p", | ||
| 1143 | .features = featureSet(&[_]Feature{ | ||
| 1144 | .avr5, | ||
| 1145 | }), | ||
| 1146 | }; | ||
| 1147 | pub const atmega3250pa = CpuModel{ | ||
| 1148 | .name = "atmega3250pa", | ||
| 1149 | .llvm_name = "atmega3250pa", | ||
| 1150 | .features = featureSet(&[_]Feature{ | ||
| 1151 | .avr5, | ||
| 1152 | }), | ||
| 1153 | }; | ||
| 1154 | pub const atmega325a = CpuModel{ | ||
| 1155 | .name = "atmega325a", | ||
| 1156 | .llvm_name = "atmega325a", | ||
| 1157 | .features = featureSet(&[_]Feature{ | ||
| 1158 | .avr5, | ||
| 1159 | }), | ||
| 1160 | }; | ||
| 1161 | pub const atmega325p = CpuModel{ | ||
| 1162 | .name = "atmega325p", | ||
| 1163 | .llvm_name = "atmega325p", | ||
| 1164 | .features = featureSet(&[_]Feature{ | ||
| 1165 | .avr5, | ||
| 1166 | }), | ||
| 1167 | }; | ||
| 1168 | pub const atmega325pa = CpuModel{ | ||
| 1169 | .name = "atmega325pa", | ||
| 1170 | .llvm_name = "atmega325pa", | ||
| 1171 | .features = featureSet(&[_]Feature{ | ||
| 1172 | .avr5, | ||
| 1173 | }), | ||
| 1174 | }; | ||
| 1175 | pub const atmega328 = CpuModel{ | ||
| 1176 | .name = "atmega328", | ||
| 1177 | .llvm_name = "atmega328", | ||
| 1178 | .features = featureSet(&[_]Feature{ | ||
| 1179 | .avr5, | ||
| 1180 | }), | ||
| 1181 | }; | ||
| 1182 | pub const atmega328p = CpuModel{ | ||
| 1183 | .name = "atmega328p", | ||
| 1184 | .llvm_name = "atmega328p", | ||
| 1185 | .features = featureSet(&[_]Feature{ | ||
| 1186 | .avr5, | ||
| 1187 | }), | ||
| 1188 | }; | ||
| 1189 | pub const atmega328pb = CpuModel{ | ||
| 1190 | .name = "atmega328pb", | ||
| 1191 | .llvm_name = "atmega328pb", | ||
| 1192 | .features = featureSet(&[_]Feature{ | ||
| 1193 | .avr5, | ||
| 1194 | }), | ||
| 1195 | }; | ||
| 1196 | pub const atmega329 = CpuModel{ | ||
| 1197 | .name = "atmega329", | ||
| 1198 | .llvm_name = "atmega329", | ||
| 1199 | .features = featureSet(&[_]Feature{ | ||
| 1200 | .avr5, | ||
| 1201 | }), | ||
| 1202 | }; | ||
| 1203 | pub const atmega3290 = CpuModel{ | ||
| 1204 | .name = "atmega3290", | ||
| 1205 | .llvm_name = "atmega3290", | ||
| 1206 | .features = featureSet(&[_]Feature{ | ||
| 1207 | .avr5, | ||
| 1208 | }), | ||
| 1209 | }; | ||
| 1210 | pub const atmega3290a = CpuModel{ | ||
| 1211 | .name = "atmega3290a", | ||
| 1212 | .llvm_name = "atmega3290a", | ||
| 1213 | .features = featureSet(&[_]Feature{ | ||
| 1214 | .avr5, | ||
| 1215 | }), | ||
| 1216 | }; | ||
| 1217 | pub const atmega3290p = CpuModel{ | ||
| 1218 | .name = "atmega3290p", | ||
| 1219 | .llvm_name = "atmega3290p", | ||
| 1220 | .features = featureSet(&[_]Feature{ | ||
| 1221 | .avr5, | ||
| 1222 | }), | ||
| 1223 | }; | ||
| 1224 | pub const atmega3290pa = CpuModel{ | ||
| 1225 | .name = "atmega3290pa", | ||
| 1226 | .llvm_name = "atmega3290pa", | ||
| 1227 | .features = featureSet(&[_]Feature{ | ||
| 1228 | .avr5, | ||
| 1229 | }), | ||
| 1230 | }; | ||
| 1231 | pub const atmega329a = CpuModel{ | ||
| 1232 | .name = "atmega329a", | ||
| 1233 | .llvm_name = "atmega329a", | ||
| 1234 | .features = featureSet(&[_]Feature{ | ||
| 1235 | .avr5, | ||
| 1236 | }), | ||
| 1237 | }; | ||
| 1238 | pub const atmega329p = CpuModel{ | ||
| 1239 | .name = "atmega329p", | ||
| 1240 | .llvm_name = "atmega329p", | ||
| 1241 | .features = featureSet(&[_]Feature{ | ||
| 1242 | .avr5, | ||
| 1243 | }), | ||
| 1244 | }; | ||
| 1245 | pub const atmega329pa = CpuModel{ | ||
| 1246 | .name = "atmega329pa", | ||
| 1247 | .llvm_name = "atmega329pa", | ||
| 1248 | .features = featureSet(&[_]Feature{ | ||
| 1249 | .avr5, | ||
| 1250 | }), | ||
| 1251 | }; | ||
| 1252 | pub const atmega32a = CpuModel{ | ||
| 1253 | .name = "atmega32a", | ||
| 1254 | .llvm_name = "atmega32a", | ||
| 1255 | .features = featureSet(&[_]Feature{ | ||
| 1256 | .avr5, | ||
| 1257 | }), | ||
| 1258 | }; | ||
| 1259 | pub const atmega32c1 = CpuModel{ | ||
| 1260 | .name = "atmega32c1", | ||
| 1261 | .llvm_name = "atmega32c1", | ||
| 1262 | .features = featureSet(&[_]Feature{ | ||
| 1263 | .avr5, | ||
| 1264 | }), | ||
| 1265 | }; | ||
| 1266 | pub const atmega32hvb = CpuModel{ | ||
| 1267 | .name = "atmega32hvb", | ||
| 1268 | .llvm_name = "atmega32hvb", | ||
| 1269 | .features = featureSet(&[_]Feature{ | ||
| 1270 | .avr5, | ||
| 1271 | }), | ||
| 1272 | }; | ||
| 1273 | pub const atmega32hvbrevb = CpuModel{ | ||
| 1274 | .name = "atmega32hvbrevb", | ||
| 1275 | .llvm_name = "atmega32hvbrevb", | ||
| 1276 | .features = featureSet(&[_]Feature{ | ||
| 1277 | .avr5, | ||
| 1278 | }), | ||
| 1279 | }; | ||
| 1280 | pub const atmega32m1 = CpuModel{ | ||
| 1281 | .name = "atmega32m1", | ||
| 1282 | .llvm_name = "atmega32m1", | ||
| 1283 | .features = featureSet(&[_]Feature{ | ||
| 1284 | .avr5, | ||
| 1285 | }), | ||
| 1286 | }; | ||
| 1287 | pub const atmega32u2 = CpuModel{ | ||
| 1288 | .name = "atmega32u2", | ||
| 1289 | .llvm_name = "atmega32u2", | ||
| 1290 | .features = featureSet(&[_]Feature{ | ||
| 1291 | .avr35, | ||
| 1292 | }), | ||
| 1293 | }; | ||
| 1294 | pub const atmega32u4 = CpuModel{ | ||
| 1295 | .name = "atmega32u4", | ||
| 1296 | .llvm_name = "atmega32u4", | ||
| 1297 | .features = featureSet(&[_]Feature{ | ||
| 1298 | .avr5, | ||
| 1299 | }), | ||
| 1300 | }; | ||
| 1301 | pub const atmega32u6 = CpuModel{ | ||
| 1302 | .name = "atmega32u6", | ||
| 1303 | .llvm_name = "atmega32u6", | ||
| 1304 | .features = featureSet(&[_]Feature{ | ||
| 1305 | .avr5, | ||
| 1306 | }), | ||
| 1307 | }; | ||
| 1308 | pub const atmega406 = CpuModel{ | ||
| 1309 | .name = "atmega406", | ||
| 1310 | .llvm_name = "atmega406", | ||
| 1311 | .features = featureSet(&[_]Feature{ | ||
| 1312 | .avr5, | ||
| 1313 | }), | ||
| 1314 | }; | ||
| 1315 | pub const atmega48 = CpuModel{ | ||
| 1316 | .name = "atmega48", | ||
| 1317 | .llvm_name = "atmega48", | ||
| 1318 | .features = featureSet(&[_]Feature{ | ||
| 1319 | .avr4, | ||
| 1320 | }), | ||
| 1321 | }; | ||
| 1322 | pub const atmega4808 = CpuModel{ | ||
| 1323 | .name = "atmega4808", | ||
| 1324 | .llvm_name = "atmega4808", | ||
| 1325 | .features = featureSet(&[_]Feature{ | ||
| 1326 | .xmega3, | ||
| 1327 | }), | ||
| 1328 | }; | ||
| 1329 | pub const atmega4809 = CpuModel{ | ||
| 1330 | .name = "atmega4809", | ||
| 1331 | .llvm_name = "atmega4809", | ||
| 1332 | .features = featureSet(&[_]Feature{ | ||
| 1333 | .xmega3, | ||
| 1334 | }), | ||
| 1335 | }; | ||
| 1336 | pub const atmega48a = CpuModel{ | ||
| 1337 | .name = "atmega48a", | ||
| 1338 | .llvm_name = "atmega48a", | ||
| 1339 | .features = featureSet(&[_]Feature{ | ||
| 1340 | .avr4, | ||
| 1341 | }), | ||
| 1342 | }; | ||
| 1343 | pub const atmega48p = CpuModel{ | ||
| 1344 | .name = "atmega48p", | ||
| 1345 | .llvm_name = "atmega48p", | ||
| 1346 | .features = featureSet(&[_]Feature{ | ||
| 1347 | .avr4, | ||
| 1348 | }), | ||
| 1349 | }; | ||
| 1350 | pub const atmega48pa = CpuModel{ | ||
| 1351 | .name = "atmega48pa", | ||
| 1352 | .llvm_name = "atmega48pa", | ||
| 1353 | .features = featureSet(&[_]Feature{ | ||
| 1354 | .avr4, | ||
| 1355 | }), | ||
| 1356 | }; | ||
| 1357 | pub const atmega48pb = CpuModel{ | ||
| 1358 | .name = "atmega48pb", | ||
| 1359 | .llvm_name = "atmega48pb", | ||
| 1360 | .features = featureSet(&[_]Feature{ | ||
| 1361 | .avr4, | ||
| 1362 | }), | ||
| 1363 | }; | ||
| 1364 | pub const atmega64 = CpuModel{ | ||
| 1365 | .name = "atmega64", | ||
| 1366 | .llvm_name = "atmega64", | ||
| 1367 | .features = featureSet(&[_]Feature{ | ||
| 1368 | .avr5, | ||
| 1369 | }), | ||
| 1370 | }; | ||
| 1371 | pub const atmega640 = CpuModel{ | ||
| 1372 | .name = "atmega640", | ||
| 1373 | .llvm_name = "atmega640", | ||
| 1374 | .features = featureSet(&[_]Feature{ | ||
| 1375 | .avr5, | ||
| 1376 | }), | ||
| 1377 | }; | ||
| 1378 | pub const atmega644 = CpuModel{ | ||
| 1379 | .name = "atmega644", | ||
| 1380 | .llvm_name = "atmega644", | ||
| 1381 | .features = featureSet(&[_]Feature{ | ||
| 1382 | .avr5, | ||
| 1383 | }), | ||
| 1384 | }; | ||
| 1385 | pub const atmega644a = CpuModel{ | ||
| 1386 | .name = "atmega644a", | ||
| 1387 | .llvm_name = "atmega644a", | ||
| 1388 | .features = featureSet(&[_]Feature{ | ||
| 1389 | .avr5, | ||
| 1390 | }), | ||
| 1391 | }; | ||
| 1392 | pub const atmega644p = CpuModel{ | ||
| 1393 | .name = "atmega644p", | ||
| 1394 | .llvm_name = "atmega644p", | ||
| 1395 | .features = featureSet(&[_]Feature{ | ||
| 1396 | .avr5, | ||
| 1397 | }), | ||
| 1398 | }; | ||
| 1399 | pub const atmega644pa = CpuModel{ | ||
| 1400 | .name = "atmega644pa", | ||
| 1401 | .llvm_name = "atmega644pa", | ||
| 1402 | .features = featureSet(&[_]Feature{ | ||
| 1403 | .avr5, | ||
| 1404 | }), | ||
| 1405 | }; | ||
| 1406 | pub const atmega644rfr2 = CpuModel{ | ||
| 1407 | .name = "atmega644rfr2", | ||
| 1408 | .llvm_name = "atmega644rfr2", | ||
| 1409 | .features = featureSet(&[_]Feature{ | ||
| 1410 | .avr5, | ||
| 1411 | }), | ||
| 1412 | }; | ||
| 1413 | pub const atmega645 = CpuModel{ | ||
| 1414 | .name = "atmega645", | ||
| 1415 | .llvm_name = "atmega645", | ||
| 1416 | .features = featureSet(&[_]Feature{ | ||
| 1417 | .avr5, | ||
| 1418 | }), | ||
| 1419 | }; | ||
| 1420 | pub const atmega6450 = CpuModel{ | ||
| 1421 | .name = "atmega6450", | ||
| 1422 | .llvm_name = "atmega6450", | ||
| 1423 | .features = featureSet(&[_]Feature{ | ||
| 1424 | .avr5, | ||
| 1425 | }), | ||
| 1426 | }; | ||
| 1427 | pub const atmega6450a = CpuModel{ | ||
| 1428 | .name = "atmega6450a", | ||
| 1429 | .llvm_name = "atmega6450a", | ||
| 1430 | .features = featureSet(&[_]Feature{ | ||
| 1431 | .avr5, | ||
| 1432 | }), | ||
| 1433 | }; | ||
| 1434 | pub const atmega6450p = CpuModel{ | ||
| 1435 | .name = "atmega6450p", | ||
| 1436 | .llvm_name = "atmega6450p", | ||
| 1437 | .features = featureSet(&[_]Feature{ | ||
| 1438 | .avr5, | ||
| 1439 | }), | ||
| 1440 | }; | ||
| 1441 | pub const atmega645a = CpuModel{ | ||
| 1442 | .name = "atmega645a", | ||
| 1443 | .llvm_name = "atmega645a", | ||
| 1444 | .features = featureSet(&[_]Feature{ | ||
| 1445 | .avr5, | ||
| 1446 | }), | ||
| 1447 | }; | ||
| 1448 | pub const atmega645p = CpuModel{ | ||
| 1449 | .name = "atmega645p", | ||
| 1450 | .llvm_name = "atmega645p", | ||
| 1451 | .features = featureSet(&[_]Feature{ | ||
| 1452 | .avr5, | ||
| 1453 | }), | ||
| 1454 | }; | ||
| 1455 | pub const atmega649 = CpuModel{ | ||
| 1456 | .name = "atmega649", | ||
| 1457 | .llvm_name = "atmega649", | ||
| 1458 | .features = featureSet(&[_]Feature{ | ||
| 1459 | .avr5, | ||
| 1460 | }), | ||
| 1461 | }; | ||
| 1462 | pub const atmega6490 = CpuModel{ | ||
| 1463 | .name = "atmega6490", | ||
| 1464 | .llvm_name = "atmega6490", | ||
| 1465 | .features = featureSet(&[_]Feature{ | ||
| 1466 | .avr5, | ||
| 1467 | }), | ||
| 1468 | }; | ||
| 1469 | pub const atmega6490a = CpuModel{ | ||
| 1470 | .name = "atmega6490a", | ||
| 1471 | .llvm_name = "atmega6490a", | ||
| 1472 | .features = featureSet(&[_]Feature{ | ||
| 1473 | .avr5, | ||
| 1474 | }), | ||
| 1475 | }; | ||
| 1476 | pub const atmega6490p = CpuModel{ | ||
| 1477 | .name = "atmega6490p", | ||
| 1478 | .llvm_name = "atmega6490p", | ||
| 1479 | .features = featureSet(&[_]Feature{ | ||
| 1480 | .avr5, | ||
| 1481 | }), | ||
| 1482 | }; | ||
| 1483 | pub const atmega649a = CpuModel{ | ||
| 1484 | .name = "atmega649a", | ||
| 1485 | .llvm_name = "atmega649a", | ||
| 1486 | .features = featureSet(&[_]Feature{ | ||
| 1487 | .avr5, | ||
| 1488 | }), | ||
| 1489 | }; | ||
| 1490 | pub const atmega649p = CpuModel{ | ||
| 1491 | .name = "atmega649p", | ||
| 1492 | .llvm_name = "atmega649p", | ||
| 1493 | .features = featureSet(&[_]Feature{ | ||
| 1494 | .avr5, | ||
| 1495 | }), | ||
| 1496 | }; | ||
| 1497 | pub const atmega64a = CpuModel{ | ||
| 1498 | .name = "atmega64a", | ||
| 1499 | .llvm_name = "atmega64a", | ||
| 1500 | .features = featureSet(&[_]Feature{ | ||
| 1501 | .avr5, | ||
| 1502 | }), | ||
| 1503 | }; | ||
| 1504 | pub const atmega64c1 = CpuModel{ | ||
| 1505 | .name = "atmega64c1", | ||
| 1506 | .llvm_name = "atmega64c1", | ||
| 1507 | .features = featureSet(&[_]Feature{ | ||
| 1508 | .avr5, | ||
| 1509 | }), | ||
| 1510 | }; | ||
| 1511 | pub const atmega64hve = CpuModel{ | ||
| 1512 | .name = "atmega64hve", | ||
| 1513 | .llvm_name = "atmega64hve", | ||
| 1514 | .features = featureSet(&[_]Feature{ | ||
| 1515 | .avr5, | ||
| 1516 | }), | ||
| 1517 | }; | ||
| 1518 | pub const atmega64hve2 = CpuModel{ | ||
| 1519 | .name = "atmega64hve2", | ||
| 1520 | .llvm_name = "atmega64hve2", | ||
| 1521 | .features = featureSet(&[_]Feature{ | ||
| 1522 | .avr5, | ||
| 1523 | }), | ||
| 1524 | }; | ||
| 1525 | pub const atmega64m1 = CpuModel{ | ||
| 1526 | .name = "atmega64m1", | ||
| 1527 | .llvm_name = "atmega64m1", | ||
| 1528 | .features = featureSet(&[_]Feature{ | ||
| 1529 | .avr5, | ||
| 1530 | }), | ||
| 1531 | }; | ||
| 1532 | pub const atmega64rfr2 = CpuModel{ | ||
| 1533 | .name = "atmega64rfr2", | ||
| 1534 | .llvm_name = "atmega64rfr2", | ||
| 1535 | .features = featureSet(&[_]Feature{ | ||
| 1536 | .avr5, | ||
| 1537 | }), | ||
| 1538 | }; | ||
| 1539 | pub const atmega8 = CpuModel{ | ||
| 1540 | .name = "atmega8", | ||
| 1541 | .llvm_name = "atmega8", | ||
| 1542 | .features = featureSet(&[_]Feature{ | ||
| 1543 | .avr2, | ||
| 1544 | .lpmx, | ||
| 1545 | .movw, | ||
| 1546 | .mul, | ||
| 1547 | .spm, | ||
| 1548 | }), | ||
| 1549 | }; | ||
| 1550 | pub const atmega808 = CpuModel{ | ||
| 1551 | .name = "atmega808", | ||
| 1552 | .llvm_name = "atmega808", | ||
| 1553 | .features = featureSet(&[_]Feature{ | ||
| 1554 | .xmega3, | ||
| 1555 | }), | ||
| 1556 | }; | ||
| 1557 | pub const atmega809 = CpuModel{ | ||
| 1558 | .name = "atmega809", | ||
| 1559 | .llvm_name = "atmega809", | ||
| 1560 | .features = featureSet(&[_]Feature{ | ||
| 1561 | .xmega3, | ||
| 1562 | }), | ||
| 1563 | }; | ||
| 1564 | pub const atmega8515 = CpuModel{ | ||
| 1565 | .name = "atmega8515", | ||
| 1566 | .llvm_name = "atmega8515", | ||
| 1567 | .features = featureSet(&[_]Feature{ | ||
| 1568 | .avr2, | ||
| 1569 | .lpmx, | ||
| 1570 | .movw, | ||
| 1571 | .mul, | ||
| 1572 | .spm, | ||
| 1573 | }), | ||
| 1574 | }; | ||
| 1575 | pub const atmega8535 = CpuModel{ | ||
| 1576 | .name = "atmega8535", | ||
| 1577 | .llvm_name = "atmega8535", | ||
| 1578 | .features = featureSet(&[_]Feature{ | ||
| 1579 | .avr2, | ||
| 1580 | .lpmx, | ||
| 1581 | .movw, | ||
| 1582 | .mul, | ||
| 1583 | .spm, | ||
| 1584 | }), | ||
| 1585 | }; | ||
| 1586 | pub const atmega88 = CpuModel{ | ||
| 1587 | .name = "atmega88", | ||
| 1588 | .llvm_name = "atmega88", | ||
| 1589 | .features = featureSet(&[_]Feature{ | ||
| 1590 | .avr4, | ||
| 1591 | }), | ||
| 1592 | }; | ||
| 1593 | pub const atmega88a = CpuModel{ | ||
| 1594 | .name = "atmega88a", | ||
| 1595 | .llvm_name = "atmega88a", | ||
| 1596 | .features = featureSet(&[_]Feature{ | ||
| 1597 | .avr4, | ||
| 1598 | }), | ||
| 1599 | }; | ||
| 1600 | pub const atmega88p = CpuModel{ | ||
| 1601 | .name = "atmega88p", | ||
| 1602 | .llvm_name = "atmega88p", | ||
| 1603 | .features = featureSet(&[_]Feature{ | ||
| 1604 | .avr4, | ||
| 1605 | }), | ||
| 1606 | }; | ||
| 1607 | pub const atmega88pa = CpuModel{ | ||
| 1608 | .name = "atmega88pa", | ||
| 1609 | .llvm_name = "atmega88pa", | ||
| 1610 | .features = featureSet(&[_]Feature{ | ||
| 1611 | .avr4, | ||
| 1612 | }), | ||
| 1613 | }; | ||
| 1614 | pub const atmega88pb = CpuModel{ | ||
| 1615 | .name = "atmega88pb", | ||
| 1616 | .llvm_name = "atmega88pb", | ||
| 1617 | .features = featureSet(&[_]Feature{ | ||
| 1618 | .avr4, | ||
| 1619 | }), | ||
| 1620 | }; | ||
| 1621 | pub const atmega8a = CpuModel{ | ||
| 1622 | .name = "atmega8a", | ||
| 1623 | .llvm_name = "atmega8a", | ||
| 1624 | .features = featureSet(&[_]Feature{ | ||
| 1625 | .avr2, | ||
| 1626 | .lpmx, | ||
| 1627 | .movw, | ||
| 1628 | .mul, | ||
| 1629 | .spm, | ||
| 1630 | }), | ||
| 1631 | }; | ||
| 1632 | pub const atmega8hva = CpuModel{ | ||
| 1633 | .name = "atmega8hva", | ||
| 1634 | .llvm_name = "atmega8hva", | ||
| 1635 | .features = featureSet(&[_]Feature{ | ||
| 1636 | .avr4, | ||
| 1637 | }), | ||
| 1638 | }; | ||
| 1639 | pub const atmega8u2 = CpuModel{ | ||
| 1640 | .name = "atmega8u2", | ||
| 1641 | .llvm_name = "atmega8u2", | ||
| 1642 | .features = featureSet(&[_]Feature{ | ||
| 1643 | .avr35, | ||
| 1644 | }), | ||
| 1645 | }; | ||
| 1646 | pub const attiny10 = CpuModel{ | ||
| 1647 | .name = "attiny10", | ||
| 1648 | .llvm_name = "attiny10", | ||
| 1649 | .features = featureSet(&[_]Feature{ | ||
| 1650 | .avrtiny, | ||
| 1651 | }), | ||
| 1652 | }; | ||
| 1653 | pub const attiny102 = CpuModel{ | ||
| 1654 | .name = "attiny102", | ||
| 1655 | .llvm_name = "attiny102", | ||
| 1656 | .features = featureSet(&[_]Feature{ | ||
| 1657 | .avrtiny, | ||
| 1658 | }), | ||
| 1659 | }; | ||
| 1660 | pub const attiny104 = CpuModel{ | ||
| 1661 | .name = "attiny104", | ||
| 1662 | .llvm_name = "attiny104", | ||
| 1663 | .features = featureSet(&[_]Feature{ | ||
| 1664 | .avrtiny, | ||
| 1665 | }), | ||
| 1666 | }; | ||
| 1667 | pub const attiny11 = CpuModel{ | ||
| 1668 | .name = "attiny11", | ||
| 1669 | .llvm_name = "attiny11", | ||
| 1670 | .features = featureSet(&[_]Feature{ | ||
| 1671 | .avr1, | ||
| 1672 | .smallstack, | ||
| 1673 | }), | ||
| 1674 | }; | ||
| 1675 | pub const attiny12 = CpuModel{ | ||
| 1676 | .name = "attiny12", | ||
| 1677 | .llvm_name = "attiny12", | ||
| 1678 | .features = featureSet(&[_]Feature{ | ||
| 1679 | .avr1, | ||
| 1680 | .smallstack, | ||
| 1681 | }), | ||
| 1682 | }; | ||
| 1683 | pub const attiny13 = CpuModel{ | ||
| 1684 | .name = "attiny13", | ||
| 1685 | .llvm_name = "attiny13", | ||
| 1686 | .features = featureSet(&[_]Feature{ | ||
| 1687 | .avr25, | ||
| 1688 | .smallstack, | ||
| 1689 | }), | ||
| 1690 | }; | ||
| 1691 | pub const attiny13a = CpuModel{ | ||
| 1692 | .name = "attiny13a", | ||
| 1693 | .llvm_name = "attiny13a", | ||
| 1694 | .features = featureSet(&[_]Feature{ | ||
| 1695 | .avr25, | ||
| 1696 | .smallstack, | ||
| 1697 | }), | ||
| 1698 | }; | ||
| 1699 | pub const attiny15 = CpuModel{ | ||
| 1700 | .name = "attiny15", | ||
| 1701 | .llvm_name = "attiny15", | ||
| 1702 | .features = featureSet(&[_]Feature{ | ||
| 1703 | .avr1, | ||
| 1704 | .smallstack, | ||
| 1705 | }), | ||
| 1706 | }; | ||
| 1707 | pub const attiny1604 = CpuModel{ | ||
| 1708 | .name = "attiny1604", | ||
| 1709 | .llvm_name = "attiny1604", | ||
| 1710 | .features = featureSet(&[_]Feature{ | ||
| 1711 | .xmega3, | ||
| 1712 | }), | ||
| 1713 | }; | ||
| 1714 | pub const attiny1606 = CpuModel{ | ||
| 1715 | .name = "attiny1606", | ||
| 1716 | .llvm_name = "attiny1606", | ||
| 1717 | .features = featureSet(&[_]Feature{ | ||
| 1718 | .xmega3, | ||
| 1719 | }), | ||
| 1720 | }; | ||
| 1721 | pub const attiny1607 = CpuModel{ | ||
| 1722 | .name = "attiny1607", | ||
| 1723 | .llvm_name = "attiny1607", | ||
| 1724 | .features = featureSet(&[_]Feature{ | ||
| 1725 | .xmega3, | ||
| 1726 | }), | ||
| 1727 | }; | ||
| 1728 | pub const attiny1614 = CpuModel{ | ||
| 1729 | .name = "attiny1614", | ||
| 1730 | .llvm_name = "attiny1614", | ||
| 1731 | .features = featureSet(&[_]Feature{ | ||
| 1732 | .xmega3, | ||
| 1733 | }), | ||
| 1734 | }; | ||
| 1735 | pub const attiny1616 = CpuModel{ | ||
| 1736 | .name = "attiny1616", | ||
| 1737 | .llvm_name = "attiny1616", | ||
| 1738 | .features = featureSet(&[_]Feature{ | ||
| 1739 | .xmega3, | ||
| 1740 | }), | ||
| 1741 | }; | ||
| 1742 | pub const attiny1617 = CpuModel{ | ||
| 1743 | .name = "attiny1617", | ||
| 1744 | .llvm_name = "attiny1617", | ||
| 1745 | .features = featureSet(&[_]Feature{ | ||
| 1746 | .xmega3, | ||
| 1747 | }), | ||
| 1748 | }; | ||
| 1749 | pub const attiny1624 = CpuModel{ | ||
| 1750 | .name = "attiny1624", | ||
| 1751 | .llvm_name = "attiny1624", | ||
| 1752 | .features = featureSet(&[_]Feature{ | ||
| 1753 | .xmega3, | ||
| 1754 | }), | ||
| 1755 | }; | ||
| 1756 | pub const attiny1626 = CpuModel{ | ||
| 1757 | .name = "attiny1626", | ||
| 1758 | .llvm_name = "attiny1626", | ||
| 1759 | .features = featureSet(&[_]Feature{ | ||
| 1760 | .xmega3, | ||
| 1761 | }), | ||
| 1762 | }; | ||
| 1763 | pub const attiny1627 = CpuModel{ | ||
| 1764 | .name = "attiny1627", | ||
| 1765 | .llvm_name = "attiny1627", | ||
| 1766 | .features = featureSet(&[_]Feature{ | ||
| 1767 | .xmega3, | ||
| 1768 | }), | ||
| 1769 | }; | ||
| 1770 | pub const attiny1634 = CpuModel{ | ||
| 1771 | .name = "attiny1634", | ||
| 1772 | .llvm_name = "attiny1634", | ||
| 1773 | .features = featureSet(&[_]Feature{ | ||
| 1774 | .avr35, | ||
| 1775 | }), | ||
| 1776 | }; | ||
| 1777 | pub const attiny167 = CpuModel{ | ||
| 1778 | .name = "attiny167", | ||
| 1779 | .llvm_name = "attiny167", | ||
| 1780 | .features = featureSet(&[_]Feature{ | ||
| 1781 | .avr35, | ||
| 1782 | }), | ||
| 1783 | }; | ||
| 1784 | pub const attiny20 = CpuModel{ | ||
| 1785 | .name = "attiny20", | ||
| 1786 | .llvm_name = "attiny20", | ||
| 1787 | .features = featureSet(&[_]Feature{ | ||
| 1788 | .avrtiny, | ||
| 1789 | }), | ||
| 1790 | }; | ||
| 1791 | pub const attiny202 = CpuModel{ | ||
| 1792 | .name = "attiny202", | ||
| 1793 | .llvm_name = "attiny202", | ||
| 1794 | .features = featureSet(&[_]Feature{ | ||
| 1795 | .xmega3, | ||
| 1796 | }), | ||
| 1797 | }; | ||
| 1798 | pub const attiny204 = CpuModel{ | ||
| 1799 | .name = "attiny204", | ||
| 1800 | .llvm_name = "attiny204", | ||
| 1801 | .features = featureSet(&[_]Feature{ | ||
| 1802 | .xmega3, | ||
| 1803 | }), | ||
| 1804 | }; | ||
| 1805 | pub const attiny212 = CpuModel{ | ||
| 1806 | .name = "attiny212", | ||
| 1807 | .llvm_name = "attiny212", | ||
| 1808 | .features = featureSet(&[_]Feature{ | ||
| 1809 | .xmega3, | ||
| 1810 | }), | ||
| 1811 | }; | ||
| 1812 | pub const attiny214 = CpuModel{ | ||
| 1813 | .name = "attiny214", | ||
| 1814 | .llvm_name = "attiny214", | ||
| 1815 | .features = featureSet(&[_]Feature{ | ||
| 1816 | .xmega3, | ||
| 1817 | }), | ||
| 1818 | }; | ||
| 1819 | pub const attiny22 = CpuModel{ | ||
| 1820 | .name = "attiny22", | ||
| 1821 | .llvm_name = "attiny22", | ||
| 1822 | .features = featureSet(&[_]Feature{ | ||
| 1823 | .avr2, | ||
| 1824 | .smallstack, | ||
| 1825 | }), | ||
| 1826 | }; | ||
| 1827 | pub const attiny2313 = CpuModel{ | ||
| 1828 | .name = "attiny2313", | ||
| 1829 | .llvm_name = "attiny2313", | ||
| 1830 | .features = featureSet(&[_]Feature{ | ||
| 1831 | .avr25, | ||
| 1832 | .smallstack, | ||
| 1833 | }), | ||
| 1834 | }; | ||
| 1835 | pub const attiny2313a = CpuModel{ | ||
| 1836 | .name = "attiny2313a", | ||
| 1837 | .llvm_name = "attiny2313a", | ||
| 1838 | .features = featureSet(&[_]Feature{ | ||
| 1839 | .avr25, | ||
| 1840 | .smallstack, | ||
| 1841 | }), | ||
| 1842 | }; | ||
| 1843 | pub const attiny24 = CpuModel{ | ||
| 1844 | .name = "attiny24", | ||
| 1845 | .llvm_name = "attiny24", | ||
| 1846 | .features = featureSet(&[_]Feature{ | ||
| 1847 | .avr25, | ||
| 1848 | .smallstack, | ||
| 1849 | }), | ||
| 1850 | }; | ||
| 1851 | pub const attiny24a = CpuModel{ | ||
| 1852 | .name = "attiny24a", | ||
| 1853 | .llvm_name = "attiny24a", | ||
| 1854 | .features = featureSet(&[_]Feature{ | ||
| 1855 | .avr25, | ||
| 1856 | .smallstack, | ||
| 1857 | }), | ||
| 1858 | }; | ||
| 1859 | pub const attiny25 = CpuModel{ | ||
| 1860 | .name = "attiny25", | ||
| 1861 | .llvm_name = "attiny25", | ||
| 1862 | .features = featureSet(&[_]Feature{ | ||
| 1863 | .avr25, | ||
| 1864 | .smallstack, | ||
| 1865 | }), | ||
| 1866 | }; | ||
| 1867 | pub const attiny26 = CpuModel{ | ||
| 1868 | .name = "attiny26", | ||
| 1869 | .llvm_name = "attiny26", | ||
| 1870 | .features = featureSet(&[_]Feature{ | ||
| 1871 | .avr2, | ||
| 1872 | .lpmx, | ||
| 1873 | .smallstack, | ||
| 1874 | }), | ||
| 1875 | }; | ||
| 1876 | pub const attiny261 = CpuModel{ | ||
| 1877 | .name = "attiny261", | ||
| 1878 | .llvm_name = "attiny261", | ||
| 1879 | .features = featureSet(&[_]Feature{ | ||
| 1880 | .avr25, | ||
| 1881 | .smallstack, | ||
| 1882 | }), | ||
| 1883 | }; | ||
| 1884 | pub const attiny261a = CpuModel{ | ||
| 1885 | .name = "attiny261a", | ||
| 1886 | .llvm_name = "attiny261a", | ||
| 1887 | .features = featureSet(&[_]Feature{ | ||
| 1888 | .avr25, | ||
| 1889 | .smallstack, | ||
| 1890 | }), | ||
| 1891 | }; | ||
| 1892 | pub const attiny28 = CpuModel{ | ||
| 1893 | .name = "attiny28", | ||
| 1894 | .llvm_name = "attiny28", | ||
| 1895 | .features = featureSet(&[_]Feature{ | ||
| 1896 | .avr1, | ||
| 1897 | .smallstack, | ||
| 1898 | }), | ||
| 1899 | }; | ||
| 1900 | pub const attiny3216 = CpuModel{ | ||
| 1901 | .name = "attiny3216", | ||
| 1902 | .llvm_name = "attiny3216", | ||
| 1903 | .features = featureSet(&[_]Feature{ | ||
| 1904 | .xmega3, | ||
| 1905 | }), | ||
| 1906 | }; | ||
| 1907 | pub const attiny3217 = CpuModel{ | ||
| 1908 | .name = "attiny3217", | ||
| 1909 | .llvm_name = "attiny3217", | ||
| 1910 | .features = featureSet(&[_]Feature{ | ||
| 1911 | .xmega3, | ||
| 1912 | }), | ||
| 1913 | }; | ||
| 1914 | pub const attiny4 = CpuModel{ | ||
| 1915 | .name = "attiny4", | ||
| 1916 | .llvm_name = "attiny4", | ||
| 1917 | .features = featureSet(&[_]Feature{ | ||
| 1918 | .avrtiny, | ||
| 1919 | }), | ||
| 1920 | }; | ||
| 1921 | pub const attiny40 = CpuModel{ | ||
| 1922 | .name = "attiny40", | ||
| 1923 | .llvm_name = "attiny40", | ||
| 1924 | .features = featureSet(&[_]Feature{ | ||
| 1925 | .avrtiny, | ||
| 1926 | }), | ||
| 1927 | }; | ||
| 1928 | pub const attiny402 = CpuModel{ | ||
| 1929 | .name = "attiny402", | ||
| 1930 | .llvm_name = "attiny402", | ||
| 1931 | .features = featureSet(&[_]Feature{ | ||
| 1932 | .xmega3, | ||
| 1933 | }), | ||
| 1934 | }; | ||
| 1935 | pub const attiny404 = CpuModel{ | ||
| 1936 | .name = "attiny404", | ||
| 1937 | .llvm_name = "attiny404", | ||
| 1938 | .features = featureSet(&[_]Feature{ | ||
| 1939 | .xmega3, | ||
| 1940 | }), | ||
| 1941 | }; | ||
| 1942 | pub const attiny406 = CpuModel{ | ||
| 1943 | .name = "attiny406", | ||
| 1944 | .llvm_name = "attiny406", | ||
| 1945 | .features = featureSet(&[_]Feature{ | ||
| 1946 | .xmega3, | ||
| 1947 | }), | ||
| 1948 | }; | ||
| 1949 | pub const attiny412 = CpuModel{ | ||
| 1950 | .name = "attiny412", | ||
| 1951 | .llvm_name = "attiny412", | ||
| 1952 | .features = featureSet(&[_]Feature{ | ||
| 1953 | .xmega3, | ||
| 1954 | }), | ||
| 1955 | }; | ||
| 1956 | pub const attiny414 = CpuModel{ | ||
| 1957 | .name = "attiny414", | ||
| 1958 | .llvm_name = "attiny414", | ||
| 1959 | .features = featureSet(&[_]Feature{ | ||
| 1960 | .xmega3, | ||
| 1961 | }), | ||
| 1962 | }; | ||
| 1963 | pub const attiny416 = CpuModel{ | ||
| 1964 | .name = "attiny416", | ||
| 1965 | .llvm_name = "attiny416", | ||
| 1966 | .features = featureSet(&[_]Feature{ | ||
| 1967 | .xmega3, | ||
| 1968 | }), | ||
| 1969 | }; | ||
| 1970 | pub const attiny417 = CpuModel{ | ||
| 1971 | .name = "attiny417", | ||
| 1972 | .llvm_name = "attiny417", | ||
| 1973 | .features = featureSet(&[_]Feature{ | ||
| 1974 | .xmega3, | ||
| 1975 | }), | ||
| 1976 | }; | ||
| 1977 | pub const attiny4313 = CpuModel{ | ||
| 1978 | .name = "attiny4313", | ||
| 1979 | .llvm_name = "attiny4313", | ||
| 1980 | .features = featureSet(&[_]Feature{ | ||
| 1981 | .avr25, | ||
| 1982 | }), | ||
| 1983 | }; | ||
| 1984 | pub const attiny43u = CpuModel{ | ||
| 1985 | .name = "attiny43u", | ||
| 1986 | .llvm_name = "attiny43u", | ||
| 1987 | .features = featureSet(&[_]Feature{ | ||
| 1988 | .avr25, | ||
| 1989 | }), | ||
| 1990 | }; | ||
| 1991 | pub const attiny44 = CpuModel{ | ||
| 1992 | .name = "attiny44", | ||
| 1993 | .llvm_name = "attiny44", | ||
| 1994 | .features = featureSet(&[_]Feature{ | ||
| 1995 | .avr25, | ||
| 1996 | }), | ||
| 1997 | }; | ||
| 1998 | pub const attiny441 = CpuModel{ | ||
| 1999 | .name = "attiny441", | ||
| 2000 | .llvm_name = "attiny441", | ||
| 2001 | .features = featureSet(&[_]Feature{ | ||
| 2002 | .avr25, | ||
| 2003 | }), | ||
| 2004 | }; | ||
| 2005 | pub const attiny44a = CpuModel{ | ||
| 2006 | .name = "attiny44a", | ||
| 2007 | .llvm_name = "attiny44a", | ||
| 2008 | .features = featureSet(&[_]Feature{ | ||
| 2009 | .avr25, | ||
| 2010 | }), | ||
| 2011 | }; | ||
| 2012 | pub const attiny45 = CpuModel{ | ||
| 2013 | .name = "attiny45", | ||
| 2014 | .llvm_name = "attiny45", | ||
| 2015 | .features = featureSet(&[_]Feature{ | ||
| 2016 | .avr25, | ||
| 2017 | }), | ||
| 2018 | }; | ||
| 2019 | pub const attiny461 = CpuModel{ | ||
| 2020 | .name = "attiny461", | ||
| 2021 | .llvm_name = "attiny461", | ||
| 2022 | .features = featureSet(&[_]Feature{ | ||
| 2023 | .avr25, | ||
| 2024 | }), | ||
| 2025 | }; | ||
| 2026 | pub const attiny461a = CpuModel{ | ||
| 2027 | .name = "attiny461a", | ||
| 2028 | .llvm_name = "attiny461a", | ||
| 2029 | .features = featureSet(&[_]Feature{ | ||
| 2030 | .avr25, | ||
| 2031 | }), | ||
| 2032 | }; | ||
| 2033 | pub const attiny48 = CpuModel{ | ||
| 2034 | .name = "attiny48", | ||
| 2035 | .llvm_name = "attiny48", | ||
| 2036 | .features = featureSet(&[_]Feature{ | ||
| 2037 | .avr25, | ||
| 2038 | }), | ||
| 2039 | }; | ||
| 2040 | pub const attiny5 = CpuModel{ | ||
| 2041 | .name = "attiny5", | ||
| 2042 | .llvm_name = "attiny5", | ||
| 2043 | .features = featureSet(&[_]Feature{ | ||
| 2044 | .avrtiny, | ||
| 2045 | }), | ||
| 2046 | }; | ||
| 2047 | pub const attiny804 = CpuModel{ | ||
| 2048 | .name = "attiny804", | ||
| 2049 | .llvm_name = "attiny804", | ||
| 2050 | .features = featureSet(&[_]Feature{ | ||
| 2051 | .xmega3, | ||
| 2052 | }), | ||
| 2053 | }; | ||
| 2054 | pub const attiny806 = CpuModel{ | ||
| 2055 | .name = "attiny806", | ||
| 2056 | .llvm_name = "attiny806", | ||
| 2057 | .features = featureSet(&[_]Feature{ | ||
| 2058 | .xmega3, | ||
| 2059 | }), | ||
| 2060 | }; | ||
| 2061 | pub const attiny807 = CpuModel{ | ||
| 2062 | .name = "attiny807", | ||
| 2063 | .llvm_name = "attiny807", | ||
| 2064 | .features = featureSet(&[_]Feature{ | ||
| 2065 | .xmega3, | ||
| 2066 | }), | ||
| 2067 | }; | ||
| 2068 | pub const attiny814 = CpuModel{ | ||
| 2069 | .name = "attiny814", | ||
| 2070 | .llvm_name = "attiny814", | ||
| 2071 | .features = featureSet(&[_]Feature{ | ||
| 2072 | .xmega3, | ||
| 2073 | }), | ||
| 2074 | }; | ||
| 2075 | pub const attiny816 = CpuModel{ | ||
| 2076 | .name = "attiny816", | ||
| 2077 | .llvm_name = "attiny816", | ||
| 2078 | .features = featureSet(&[_]Feature{ | ||
| 2079 | .xmega3, | ||
| 2080 | }), | ||
| 2081 | }; | ||
| 2082 | pub const attiny817 = CpuModel{ | ||
| 2083 | .name = "attiny817", | ||
| 2084 | .llvm_name = "attiny817", | ||
| 2085 | .features = featureSet(&[_]Feature{ | ||
| 2086 | .xmega3, | ||
| 2087 | }), | ||
| 2088 | }; | ||
| 2089 | pub const attiny828 = CpuModel{ | ||
| 2090 | .name = "attiny828", | ||
| 2091 | .llvm_name = "attiny828", | ||
| 2092 | .features = featureSet(&[_]Feature{ | ||
| 2093 | .avr25, | ||
| 2094 | }), | ||
| 2095 | }; | ||
| 2096 | pub const attiny84 = CpuModel{ | ||
| 2097 | .name = "attiny84", | ||
| 2098 | .llvm_name = "attiny84", | ||
| 2099 | .features = featureSet(&[_]Feature{ | ||
| 2100 | .avr25, | ||
| 2101 | }), | ||
| 2102 | }; | ||
| 2103 | pub const attiny841 = CpuModel{ | ||
| 2104 | .name = "attiny841", | ||
| 2105 | .llvm_name = "attiny841", | ||
| 2106 | .features = featureSet(&[_]Feature{ | ||
| 2107 | .avr25, | ||
| 2108 | }), | ||
| 2109 | }; | ||
| 2110 | pub const attiny84a = CpuModel{ | ||
| 2111 | .name = "attiny84a", | ||
| 2112 | .llvm_name = "attiny84a", | ||
| 2113 | .features = featureSet(&[_]Feature{ | ||
| 2114 | .avr25, | ||
| 2115 | }), | ||
| 2116 | }; | ||
| 2117 | pub const attiny85 = CpuModel{ | ||
| 2118 | .name = "attiny85", | ||
| 2119 | .llvm_name = "attiny85", | ||
| 2120 | .features = featureSet(&[_]Feature{ | ||
| 2121 | .avr25, | ||
| 2122 | }), | ||
| 2123 | }; | ||
| 2124 | pub const attiny861 = CpuModel{ | ||
| 2125 | .name = "attiny861", | ||
| 2126 | .llvm_name = "attiny861", | ||
| 2127 | .features = featureSet(&[_]Feature{ | ||
| 2128 | .avr25, | ||
| 2129 | }), | ||
| 2130 | }; | ||
| 2131 | pub const attiny861a = CpuModel{ | ||
| 2132 | .name = "attiny861a", | ||
| 2133 | .llvm_name = "attiny861a", | ||
| 2134 | .features = featureSet(&[_]Feature{ | ||
| 2135 | .avr25, | ||
| 2136 | }), | ||
| 2137 | }; | ||
| 2138 | pub const attiny87 = CpuModel{ | ||
| 2139 | .name = "attiny87", | ||
| 2140 | .llvm_name = "attiny87", | ||
| 2141 | .features = featureSet(&[_]Feature{ | ||
| 2142 | .avr25, | ||
| 2143 | }), | ||
| 2144 | }; | ||
| 2145 | pub const attiny88 = CpuModel{ | ||
| 2146 | .name = "attiny88", | ||
| 2147 | .llvm_name = "attiny88", | ||
| 2148 | .features = featureSet(&[_]Feature{ | ||
| 2149 | .avr25, | ||
| 2150 | }), | ||
| 2151 | }; | ||
| 2152 | pub const attiny9 = CpuModel{ | ||
| 2153 | .name = "attiny9", | ||
| 2154 | .llvm_name = "attiny9", | ||
| 2155 | .features = featureSet(&[_]Feature{ | ||
| 2156 | .avrtiny, | ||
| 2157 | }), | ||
| 2158 | }; | ||
| 2159 | pub const atxmega128a1 = CpuModel{ | ||
| 2160 | .name = "atxmega128a1", | ||
| 2161 | .llvm_name = "atxmega128a1", | ||
| 2162 | .features = featureSet(&[_]Feature{ | ||
| 2163 | .xmega, | ||
| 2164 | }), | ||
| 2165 | }; | ||
| 2166 | pub const atxmega128a1u = CpuModel{ | ||
| 2167 | .name = "atxmega128a1u", | ||
| 2168 | .llvm_name = "atxmega128a1u", | ||
| 2169 | .features = featureSet(&[_]Feature{ | ||
| 2170 | .xmegau, | ||
| 2171 | }), | ||
| 2172 | }; | ||
| 2173 | pub const atxmega128a3 = CpuModel{ | ||
| 2174 | .name = "atxmega128a3", | ||
| 2175 | .llvm_name = "atxmega128a3", | ||
| 2176 | .features = featureSet(&[_]Feature{ | ||
| 2177 | .xmega, | ||
| 2178 | }), | ||
| 2179 | }; | ||
| 2180 | pub const atxmega128a3u = CpuModel{ | ||
| 2181 | .name = "atxmega128a3u", | ||
| 2182 | .llvm_name = "atxmega128a3u", | ||
| 2183 | .features = featureSet(&[_]Feature{ | ||
| 2184 | .xmegau, | ||
| 2185 | }), | ||
| 2186 | }; | ||
| 2187 | pub const atxmega128a4u = CpuModel{ | ||
| 2188 | .name = "atxmega128a4u", | ||
| 2189 | .llvm_name = "atxmega128a4u", | ||
| 2190 | .features = featureSet(&[_]Feature{ | ||
| 2191 | .xmegau, | ||
| 2192 | }), | ||
| 2193 | }; | ||
| 2194 | pub const atxmega128b1 = CpuModel{ | ||
| 2195 | .name = "atxmega128b1", | ||
| 2196 | .llvm_name = "atxmega128b1", | ||
| 2197 | .features = featureSet(&[_]Feature{ | ||
| 2198 | .xmegau, | ||
| 2199 | }), | ||
| 2200 | }; | ||
| 2201 | pub const atxmega128b3 = CpuModel{ | ||
| 2202 | .name = "atxmega128b3", | ||
| 2203 | .llvm_name = "atxmega128b3", | ||
| 2204 | .features = featureSet(&[_]Feature{ | ||
| 2205 | .xmegau, | ||
| 2206 | }), | ||
| 2207 | }; | ||
| 2208 | pub const atxmega128c3 = CpuModel{ | ||
| 2209 | .name = "atxmega128c3", | ||
| 2210 | .llvm_name = "atxmega128c3", | ||
| 2211 | .features = featureSet(&[_]Feature{ | ||
| 2212 | .xmegau, | ||
| 2213 | }), | ||
| 2214 | }; | ||
| 2215 | pub const atxmega128d3 = CpuModel{ | ||
| 2216 | .name = "atxmega128d3", | ||
| 2217 | .llvm_name = "atxmega128d3", | ||
| 2218 | .features = featureSet(&[_]Feature{ | ||
| 2219 | .xmega, | ||
| 2220 | }), | ||
| 2221 | }; | ||
| 2222 | pub const atxmega128d4 = CpuModel{ | ||
| 2223 | .name = "atxmega128d4", | ||
| 2224 | .llvm_name = "atxmega128d4", | ||
| 2225 | .features = featureSet(&[_]Feature{ | ||
| 2226 | .xmega, | ||
| 2227 | }), | ||
| 2228 | }; | ||
| 2229 | pub const atxmega16a4 = CpuModel{ | ||
| 2230 | .name = "atxmega16a4", | ||
| 2231 | .llvm_name = "atxmega16a4", | ||
| 2232 | .features = featureSet(&[_]Feature{ | ||
| 2233 | .xmega, | ||
| 2234 | }), | ||
| 2235 | }; | ||
| 2236 | pub const atxmega16a4u = CpuModel{ | ||
| 2237 | .name = "atxmega16a4u", | ||
| 2238 | .llvm_name = "atxmega16a4u", | ||
| 2239 | .features = featureSet(&[_]Feature{ | ||
| 2240 | .xmegau, | ||
| 2241 | }), | ||
| 2242 | }; | ||
| 2243 | pub const atxmega16c4 = CpuModel{ | ||
| 2244 | .name = "atxmega16c4", | ||
| 2245 | .llvm_name = "atxmega16c4", | ||
| 2246 | .features = featureSet(&[_]Feature{ | ||
| 2247 | .xmegau, | ||
| 2248 | }), | ||
| 2249 | }; | ||
| 2250 | pub const atxmega16d4 = CpuModel{ | ||
| 2251 | .name = "atxmega16d4", | ||
| 2252 | .llvm_name = "atxmega16d4", | ||
| 2253 | .features = featureSet(&[_]Feature{ | ||
| 2254 | .xmega, | ||
| 2255 | }), | ||
| 2256 | }; | ||
| 2257 | pub const atxmega16e5 = CpuModel{ | ||
| 2258 | .name = "atxmega16e5", | ||
| 2259 | .llvm_name = "atxmega16e5", | ||
| 2260 | .features = featureSet(&[_]Feature{ | ||
| 2261 | .xmegau, | ||
| 2262 | }), | ||
| 2263 | }; | ||
| 2264 | pub const atxmega192a3 = CpuModel{ | ||
| 2265 | .name = "atxmega192a3", | ||
| 2266 | .llvm_name = "atxmega192a3", | ||
| 2267 | .features = featureSet(&[_]Feature{ | ||
| 2268 | .xmega, | ||
| 2269 | }), | ||
| 2270 | }; | ||
| 2271 | pub const atxmega192a3u = CpuModel{ | ||
| 2272 | .name = "atxmega192a3u", | ||
| 2273 | .llvm_name = "atxmega192a3u", | ||
| 2274 | .features = featureSet(&[_]Feature{ | ||
| 2275 | .xmegau, | ||
| 2276 | }), | ||
| 2277 | }; | ||
| 2278 | pub const atxmega192c3 = CpuModel{ | ||
| 2279 | .name = "atxmega192c3", | ||
| 2280 | .llvm_name = "atxmega192c3", | ||
| 2281 | .features = featureSet(&[_]Feature{ | ||
| 2282 | .xmegau, | ||
| 2283 | }), | ||
| 2284 | }; | ||
| 2285 | pub const atxmega192d3 = CpuModel{ | ||
| 2286 | .name = "atxmega192d3", | ||
| 2287 | .llvm_name = "atxmega192d3", | ||
| 2288 | .features = featureSet(&[_]Feature{ | ||
| 2289 | .xmega, | ||
| 2290 | }), | ||
| 2291 | }; | ||
| 2292 | pub const atxmega256a3 = CpuModel{ | ||
| 2293 | .name = "atxmega256a3", | ||
| 2294 | .llvm_name = "atxmega256a3", | ||
| 2295 | .features = featureSet(&[_]Feature{ | ||
| 2296 | .xmega, | ||
| 2297 | }), | ||
| 2298 | }; | ||
| 2299 | pub const atxmega256a3b = CpuModel{ | ||
| 2300 | .name = "atxmega256a3b", | ||
| 2301 | .llvm_name = "atxmega256a3b", | ||
| 2302 | .features = featureSet(&[_]Feature{ | ||
| 2303 | .xmega, | ||
| 2304 | }), | ||
| 2305 | }; | ||
| 2306 | pub const atxmega256a3bu = CpuModel{ | ||
| 2307 | .name = "atxmega256a3bu", | ||
| 2308 | .llvm_name = "atxmega256a3bu", | ||
| 2309 | .features = featureSet(&[_]Feature{ | ||
| 2310 | .xmegau, | ||
| 2311 | }), | ||
| 2312 | }; | ||
| 2313 | pub const atxmega256a3u = CpuModel{ | ||
| 2314 | .name = "atxmega256a3u", | ||
| 2315 | .llvm_name = "atxmega256a3u", | ||
| 2316 | .features = featureSet(&[_]Feature{ | ||
| 2317 | .xmegau, | ||
| 2318 | }), | ||
| 2319 | }; | ||
| 2320 | pub const atxmega256c3 = CpuModel{ | ||
| 2321 | .name = "atxmega256c3", | ||
| 2322 | .llvm_name = "atxmega256c3", | ||
| 2323 | .features = featureSet(&[_]Feature{ | ||
| 2324 | .xmegau, | ||
| 2325 | }), | ||
| 2326 | }; | ||
| 2327 | pub const atxmega256d3 = CpuModel{ | ||
| 2328 | .name = "atxmega256d3", | ||
| 2329 | .llvm_name = "atxmega256d3", | ||
| 2330 | .features = featureSet(&[_]Feature{ | ||
| 2331 | .xmega, | ||
| 2332 | }), | ||
| 2333 | }; | ||
| 2334 | pub const atxmega32a4 = CpuModel{ | ||
| 2335 | .name = "atxmega32a4", | ||
| 2336 | .llvm_name = "atxmega32a4", | ||
| 2337 | .features = featureSet(&[_]Feature{ | ||
| 2338 | .xmega, | ||
| 2339 | }), | ||
| 2340 | }; | ||
| 2341 | pub const atxmega32a4u = CpuModel{ | ||
| 2342 | .name = "atxmega32a4u", | ||
| 2343 | .llvm_name = "atxmega32a4u", | ||
| 2344 | .features = featureSet(&[_]Feature{ | ||
| 2345 | .xmegau, | ||
| 2346 | }), | ||
| 2347 | }; | ||
| 2348 | pub const atxmega32c3 = CpuModel{ | ||
| 2349 | .name = "atxmega32c3", | ||
| 2350 | .llvm_name = "atxmega32c3", | ||
| 2351 | .features = featureSet(&[_]Feature{ | ||
| 2352 | .xmegau, | ||
| 2353 | }), | ||
| 2354 | }; | ||
| 2355 | pub const atxmega32c4 = CpuModel{ | ||
| 2356 | .name = "atxmega32c4", | ||
| 2357 | .llvm_name = "atxmega32c4", | ||
| 2358 | .features = featureSet(&[_]Feature{ | ||
| 2359 | .xmegau, | ||
| 2360 | }), | ||
| 2361 | }; | ||
| 2362 | pub const atxmega32d3 = CpuModel{ | ||
| 2363 | .name = "atxmega32d3", | ||
| 2364 | .llvm_name = "atxmega32d3", | ||
| 2365 | .features = featureSet(&[_]Feature{ | ||
| 2366 | .xmega, | ||
| 2367 | }), | ||
| 2368 | }; | ||
| 2369 | pub const atxmega32d4 = CpuModel{ | ||
| 2370 | .name = "atxmega32d4", | ||
| 2371 | .llvm_name = "atxmega32d4", | ||
| 2372 | .features = featureSet(&[_]Feature{ | ||
| 2373 | .xmega, | ||
| 2374 | }), | ||
| 2375 | }; | ||
| 2376 | pub const atxmega32e5 = CpuModel{ | ||
| 2377 | .name = "atxmega32e5", | ||
| 2378 | .llvm_name = "atxmega32e5", | ||
| 2379 | .features = featureSet(&[_]Feature{ | ||
| 2380 | .xmegau, | ||
| 2381 | }), | ||
| 2382 | }; | ||
| 2383 | pub const atxmega384c3 = CpuModel{ | ||
| 2384 | .name = "atxmega384c3", | ||
| 2385 | .llvm_name = "atxmega384c3", | ||
| 2386 | .features = featureSet(&[_]Feature{ | ||
| 2387 | .xmegau, | ||
| 2388 | }), | ||
| 2389 | }; | ||
| 2390 | pub const atxmega384d3 = CpuModel{ | ||
| 2391 | .name = "atxmega384d3", | ||
| 2392 | .llvm_name = "atxmega384d3", | ||
| 2393 | .features = featureSet(&[_]Feature{ | ||
| 2394 | .xmega, | ||
| 2395 | }), | ||
| 2396 | }; | ||
| 2397 | pub const atxmega64a1 = CpuModel{ | ||
| 2398 | .name = "atxmega64a1", | ||
| 2399 | .llvm_name = "atxmega64a1", | ||
| 2400 | .features = featureSet(&[_]Feature{ | ||
| 2401 | .xmega, | ||
| 2402 | }), | ||
| 2403 | }; | ||
| 2404 | pub const atxmega64a1u = CpuModel{ | ||
| 2405 | .name = "atxmega64a1u", | ||
| 2406 | .llvm_name = "atxmega64a1u", | ||
| 2407 | .features = featureSet(&[_]Feature{ | ||
| 2408 | .xmegau, | ||
| 2409 | }), | ||
| 2410 | }; | ||
| 2411 | pub const atxmega64a3 = CpuModel{ | ||
| 2412 | .name = "atxmega64a3", | ||
| 2413 | .llvm_name = "atxmega64a3", | ||
| 2414 | .features = featureSet(&[_]Feature{ | ||
| 2415 | .xmega, | ||
| 2416 | }), | ||
| 2417 | }; | ||
| 2418 | pub const atxmega64a3u = CpuModel{ | ||
| 2419 | .name = "atxmega64a3u", | ||
| 2420 | .llvm_name = "atxmega64a3u", | ||
| 2421 | .features = featureSet(&[_]Feature{ | ||
| 2422 | .xmegau, | ||
| 2423 | }), | ||
| 2424 | }; | ||
| 2425 | pub const atxmega64a4u = CpuModel{ | ||
| 2426 | .name = "atxmega64a4u", | ||
| 2427 | .llvm_name = "atxmega64a4u", | ||
| 2428 | .features = featureSet(&[_]Feature{ | ||
| 2429 | .xmegau, | ||
| 2430 | }), | ||
| 2431 | }; | ||
| 2432 | pub const atxmega64b1 = CpuModel{ | ||
| 2433 | .name = "atxmega64b1", | ||
| 2434 | .llvm_name = "atxmega64b1", | ||
| 2435 | .features = featureSet(&[_]Feature{ | ||
| 2436 | .xmegau, | ||
| 2437 | }), | ||
| 2438 | }; | ||
| 2439 | pub const atxmega64b3 = CpuModel{ | ||
| 2440 | .name = "atxmega64b3", | ||
| 2441 | .llvm_name = "atxmega64b3", | ||
| 2442 | .features = featureSet(&[_]Feature{ | ||
| 2443 | .xmegau, | ||
| 2444 | }), | ||
| 2445 | }; | ||
| 2446 | pub const atxmega64c3 = CpuModel{ | ||
| 2447 | .name = "atxmega64c3", | ||
| 2448 | .llvm_name = "atxmega64c3", | ||
| 2449 | .features = featureSet(&[_]Feature{ | ||
| 2450 | .xmegau, | ||
| 2451 | }), | ||
| 2452 | }; | ||
| 2453 | pub const atxmega64d3 = CpuModel{ | ||
| 2454 | .name = "atxmega64d3", | ||
| 2455 | .llvm_name = "atxmega64d3", | ||
| 2456 | .features = featureSet(&[_]Feature{ | ||
| 2457 | .xmega, | ||
| 2458 | }), | ||
| 2459 | }; | ||
| 2460 | pub const atxmega64d4 = CpuModel{ | ||
| 2461 | .name = "atxmega64d4", | ||
| 2462 | .llvm_name = "atxmega64d4", | ||
| 2463 | .features = featureSet(&[_]Feature{ | ||
| 2464 | .xmega, | ||
| 2465 | }), | ||
| 2466 | }; | ||
| 2467 | pub const atxmega8e5 = CpuModel{ | ||
| 2468 | .name = "atxmega8e5", | ||
| 2469 | .llvm_name = "atxmega8e5", | ||
| 2470 | .features = featureSet(&[_]Feature{ | ||
| 2471 | .xmegau, | ||
| 2472 | }), | ||
| 2473 | }; | ||
| 2474 | pub const avr1 = CpuModel{ | ||
| 2475 | .name = "avr1", | ||
| 2476 | .llvm_name = "avr1", | ||
| 2477 | .features = featureSet(&[_]Feature{ | ||
| 2478 | .avr1, | ||
| 2479 | }), | ||
| 2480 | }; | ||
| 2481 | pub const avr2 = CpuModel{ | ||
| 2482 | .name = "avr2", | ||
| 2483 | .llvm_name = "avr2", | ||
| 2484 | .features = featureSet(&[_]Feature{ | ||
| 2485 | .avr2, | ||
| 2486 | }), | ||
| 2487 | }; | ||
| 2488 | pub const avr25 = CpuModel{ | ||
| 2489 | .name = "avr25", | ||
| 2490 | .llvm_name = "avr25", | ||
| 2491 | .features = featureSet(&[_]Feature{ | ||
| 2492 | .avr25, | ||
| 2493 | }), | ||
| 2494 | }; | ||
| 2495 | pub const avr3 = CpuModel{ | ||
| 2496 | .name = "avr3", | ||
| 2497 | .llvm_name = "avr3", | ||
| 2498 | .features = featureSet(&[_]Feature{ | ||
| 2499 | .avr3, | ||
| 2500 | }), | ||
| 2501 | }; | ||
| 2502 | pub const avr31 = CpuModel{ | ||
| 2503 | .name = "avr31", | ||
| 2504 | .llvm_name = "avr31", | ||
| 2505 | .features = featureSet(&[_]Feature{ | ||
| 2506 | .avr31, | ||
| 2507 | }), | ||
| 2508 | }; | ||
| 2509 | pub const avr35 = CpuModel{ | ||
| 2510 | .name = "avr35", | ||
| 2511 | .llvm_name = "avr35", | ||
| 2512 | .features = featureSet(&[_]Feature{ | ||
| 2513 | .avr35, | ||
| 2514 | }), | ||
| 2515 | }; | ||
| 2516 | pub const avr4 = CpuModel{ | ||
| 2517 | .name = "avr4", | ||
| 2518 | .llvm_name = "avr4", | ||
| 2519 | .features = featureSet(&[_]Feature{ | ||
| 2520 | .avr4, | ||
| 2521 | }), | ||
| 2522 | }; | ||
| 2523 | pub const avr5 = CpuModel{ | ||
| 2524 | .name = "avr5", | ||
| 2525 | .llvm_name = "avr5", | ||
| 2526 | .features = featureSet(&[_]Feature{ | ||
| 2527 | .avr5, | ||
| 2528 | }), | ||
| 2529 | }; | ||
| 2530 | pub const avr51 = CpuModel{ | ||
| 2531 | .name = "avr51", | ||
| 2532 | .llvm_name = "avr51", | ||
| 2533 | .features = featureSet(&[_]Feature{ | ||
| 2534 | .avr51, | ||
| 2535 | }), | ||
| 2536 | }; | ||
| 2537 | pub const avr6 = CpuModel{ | ||
| 2538 | .name = "avr6", | ||
| 2539 | .llvm_name = "avr6", | ||
| 2540 | .features = featureSet(&[_]Feature{ | ||
| 2541 | .avr6, | ||
| 2542 | }), | ||
| 2543 | }; | ||
| 2544 | pub const avrtiny = CpuModel{ | ||
| 2545 | .name = "avrtiny", | ||
| 2546 | .llvm_name = "avrtiny", | ||
| 2547 | .features = featureSet(&[_]Feature{ | ||
| 2548 | .avrtiny, | ||
| 2549 | }), | ||
| 2550 | }; | ||
| 2551 | pub const avrxmega1 = CpuModel{ | ||
| 2552 | .name = "avrxmega1", | ||
| 2553 | .llvm_name = "avrxmega1", | ||
| 2554 | .features = featureSet(&[_]Feature{ | ||
| 2555 | .xmega, | ||
| 2556 | }), | ||
| 2557 | }; | ||
| 2558 | pub const avrxmega2 = CpuModel{ | ||
| 2559 | .name = "avrxmega2", | ||
| 2560 | .llvm_name = "avrxmega2", | ||
| 2561 | .features = featureSet(&[_]Feature{ | ||
| 2562 | .xmega, | ||
| 2563 | }), | ||
| 2564 | }; | ||
| 2565 | pub const avrxmega3 = CpuModel{ | ||
| 2566 | .name = "avrxmega3", | ||
| 2567 | .llvm_name = "avrxmega3", | ||
| 2568 | .features = featureSet(&[_]Feature{ | ||
| 2569 | .xmega3, | ||
| 2570 | }), | ||
| 2571 | }; | ||
| 2572 | pub const avrxmega4 = CpuModel{ | ||
| 2573 | .name = "avrxmega4", | ||
| 2574 | .llvm_name = "avrxmega4", | ||
| 2575 | .features = featureSet(&[_]Feature{ | ||
| 2576 | .xmega, | ||
| 2577 | }), | ||
| 2578 | }; | ||
| 2579 | pub const avrxmega5 = CpuModel{ | ||
| 2580 | .name = "avrxmega5", | ||
| 2581 | .llvm_name = "avrxmega5", | ||
| 2582 | .features = featureSet(&[_]Feature{ | ||
| 2583 | .xmega, | ||
| 2584 | }), | ||
| 2585 | }; | ||
| 2586 | pub const avrxmega6 = CpuModel{ | ||
| 2587 | .name = "avrxmega6", | ||
| 2588 | .llvm_name = "avrxmega6", | ||
| 2589 | .features = featureSet(&[_]Feature{ | ||
| 2590 | .xmega, | ||
| 2591 | }), | ||
| 2592 | }; | ||
| 2593 | pub const avrxmega7 = CpuModel{ | ||
| 2594 | .name = "avrxmega7", | ||
| 2595 | .llvm_name = "avrxmega7", | ||
| 2596 | .features = featureSet(&[_]Feature{ | ||
| 2597 | .xmega, | ||
| 2598 | }), | ||
| 2599 | }; | ||
| 2600 | pub const m3000 = CpuModel{ | ||
| 2601 | .name = "m3000", | ||
| 2602 | .llvm_name = "m3000", | ||
| 2603 | .features = featureSet(&[_]Feature{ | ||
| 2604 | .avr5, | ||
| 2605 | }), | ||
| 2606 | }; | ||
| 2607 | }; | ||
lib/std/target/bpf.zig deleted-73
| ... | @@ -1,73 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | alu32, | ||
| 9 | dummy, | ||
| 10 | dwarfris, | ||
| 11 | }; | ||
| 12 | |||
| 13 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 14 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 15 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 16 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 17 | |||
| 18 | pub const all_features = blk: { | ||
| 19 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 20 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 21 | var result: [len]CpuFeature = undefined; | ||
| 22 | result[@intFromEnum(Feature.alu32)] = .{ | ||
| 23 | .llvm_name = "alu32", | ||
| 24 | .description = "Enable ALU32 instructions", | ||
| 25 | .dependencies = featureSet(&[_]Feature{}), | ||
| 26 | }; | ||
| 27 | result[@intFromEnum(Feature.dummy)] = .{ | ||
| 28 | .llvm_name = "dummy", | ||
| 29 | .description = "unused feature", | ||
| 30 | .dependencies = featureSet(&[_]Feature{}), | ||
| 31 | }; | ||
| 32 | result[@intFromEnum(Feature.dwarfris)] = .{ | ||
| 33 | .llvm_name = "dwarfris", | ||
| 34 | .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", | ||
| 35 | .dependencies = featureSet(&[_]Feature{}), | ||
| 36 | }; | ||
| 37 | const ti = @typeInfo(Feature); | ||
| 38 | for (&result, 0..) |*elem, i| { | ||
| 39 | elem.index = i; | ||
| 40 | elem.name = ti.Enum.fields[i].name; | ||
| 41 | } | ||
| 42 | break :blk result; | ||
| 43 | }; | ||
| 44 | |||
| 45 | pub const cpu = struct { | ||
| 46 | pub const generic = CpuModel{ | ||
| 47 | .name = "generic", | ||
| 48 | .llvm_name = "generic", | ||
| 49 | .features = featureSet(&[_]Feature{}), | ||
| 50 | }; | ||
| 51 | pub const probe = CpuModel{ | ||
| 52 | .name = "probe", | ||
| 53 | .llvm_name = "probe", | ||
| 54 | .features = featureSet(&[_]Feature{}), | ||
| 55 | }; | ||
| 56 | pub const v1 = CpuModel{ | ||
| 57 | .name = "v1", | ||
| 58 | .llvm_name = "v1", | ||
| 59 | .features = featureSet(&[_]Feature{}), | ||
| 60 | }; | ||
| 61 | pub const v2 = CpuModel{ | ||
| 62 | .name = "v2", | ||
| 63 | .llvm_name = "v2", | ||
| 64 | .features = featureSet(&[_]Feature{}), | ||
| 65 | }; | ||
| 66 | pub const v3 = CpuModel{ | ||
| 67 | .name = "v3", | ||
| 68 | .llvm_name = "v3", | ||
| 69 | .features = featureSet(&[_]Feature{ | ||
| 70 | .alu32, | ||
| 71 | }), | ||
| 72 | }; | ||
| 73 | }; | ||
lib/std/target/csky.zig deleted-3214
| ... | @@ -1,3214 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"10e60", | ||
| 9 | @"2e3", | ||
| 10 | @"3e3r1", | ||
| 11 | @"3e3r2", | ||
| 12 | @"3e3r3", | ||
| 13 | @"3e7", | ||
| 14 | @"7e10", | ||
| 15 | btst16, | ||
| 16 | cache, | ||
| 17 | ccrt, | ||
| 18 | ck801, | ||
| 19 | ck802, | ||
| 20 | ck803, | ||
| 21 | ck803s, | ||
| 22 | ck804, | ||
| 23 | ck805, | ||
| 24 | ck807, | ||
| 25 | ck810, | ||
| 26 | ck810v, | ||
| 27 | ck860, | ||
| 28 | ck860v, | ||
| 29 | constpool, | ||
| 30 | doloop, | ||
| 31 | dsp1e2, | ||
| 32 | dsp_silan, | ||
| 33 | dspe60, | ||
| 34 | dspv2, | ||
| 35 | e1, | ||
| 36 | e2, | ||
| 37 | edsp, | ||
| 38 | elrw, | ||
| 39 | fdivdu, | ||
| 40 | float1e2, | ||
| 41 | float1e3, | ||
| 42 | float3e4, | ||
| 43 | float7e60, | ||
| 44 | floate1, | ||
| 45 | fpuv2_df, | ||
| 46 | fpuv2_sf, | ||
| 47 | fpuv3_df, | ||
| 48 | fpuv3_hf, | ||
| 49 | fpuv3_hi, | ||
| 50 | fpuv3_sf, | ||
| 51 | hard_float, | ||
| 52 | hard_float_abi, | ||
| 53 | hard_tp, | ||
| 54 | high_registers, | ||
| 55 | hwdiv, | ||
| 56 | istack, | ||
| 57 | java, | ||
| 58 | mp, | ||
| 59 | mp1e2, | ||
| 60 | multiple_stld, | ||
| 61 | nvic, | ||
| 62 | pushpop, | ||
| 63 | smart, | ||
| 64 | soft_tp, | ||
| 65 | stack_size, | ||
| 66 | trust, | ||
| 67 | vdsp2e3, | ||
| 68 | vdsp2e60f, | ||
| 69 | vdspv1, | ||
| 70 | vdspv2, | ||
| 71 | }; | ||
| 72 | |||
| 73 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 74 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 75 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 76 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 77 | |||
| 78 | pub const all_features = blk: { | ||
| 79 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 80 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 81 | var result: [len]CpuFeature = undefined; | ||
| 82 | result[@intFromEnum(Feature.@"10e60")] = .{ | ||
| 83 | .llvm_name = "10e60", | ||
| 84 | .description = "Support CSKY 10e60 instructions", | ||
| 85 | .dependencies = featureSet(&[_]Feature{ | ||
| 86 | .@"7e10", | ||
| 87 | }), | ||
| 88 | }; | ||
| 89 | result[@intFromEnum(Feature.@"2e3")] = .{ | ||
| 90 | .llvm_name = "2e3", | ||
| 91 | .description = "Support CSKY 2e3 instructions", | ||
| 92 | .dependencies = featureSet(&[_]Feature{ | ||
| 93 | .e2, | ||
| 94 | }), | ||
| 95 | }; | ||
| 96 | result[@intFromEnum(Feature.@"3e3r1")] = .{ | ||
| 97 | .llvm_name = "3e3r1", | ||
| 98 | .description = "Support CSKY 3e3r1 instructions", | ||
| 99 | .dependencies = featureSet(&[_]Feature{}), | ||
| 100 | }; | ||
| 101 | result[@intFromEnum(Feature.@"3e3r2")] = .{ | ||
| 102 | .llvm_name = "3e3r2", | ||
| 103 | .description = "Support CSKY 3e3r2 instructions", | ||
| 104 | .dependencies = featureSet(&[_]Feature{ | ||
| 105 | .@"3e3r1", | ||
| 106 | .doloop, | ||
| 107 | }), | ||
| 108 | }; | ||
| 109 | result[@intFromEnum(Feature.@"3e3r3")] = .{ | ||
| 110 | .llvm_name = "3e3r3", | ||
| 111 | .description = "Support CSKY 3e3r3 instructions", | ||
| 112 | .dependencies = featureSet(&[_]Feature{ | ||
| 113 | .doloop, | ||
| 114 | }), | ||
| 115 | }; | ||
| 116 | result[@intFromEnum(Feature.@"3e7")] = .{ | ||
| 117 | .llvm_name = "3e7", | ||
| 118 | .description = "Support CSKY 3e7 instructions", | ||
| 119 | .dependencies = featureSet(&[_]Feature{ | ||
| 120 | .@"2e3", | ||
| 121 | }), | ||
| 122 | }; | ||
| 123 | result[@intFromEnum(Feature.@"7e10")] = .{ | ||
| 124 | .llvm_name = "7e10", | ||
| 125 | .description = "Support CSKY 7e10 instructions", | ||
| 126 | .dependencies = featureSet(&[_]Feature{ | ||
| 127 | .@"3e7", | ||
| 128 | }), | ||
| 129 | }; | ||
| 130 | result[@intFromEnum(Feature.btst16)] = .{ | ||
| 131 | .llvm_name = "btst16", | ||
| 132 | .description = "Use the 16-bit btsti instruction", | ||
| 133 | .dependencies = featureSet(&[_]Feature{}), | ||
| 134 | }; | ||
| 135 | result[@intFromEnum(Feature.cache)] = .{ | ||
| 136 | .llvm_name = "cache", | ||
| 137 | .description = "Enable cache", | ||
| 138 | .dependencies = featureSet(&[_]Feature{}), | ||
| 139 | }; | ||
| 140 | result[@intFromEnum(Feature.ccrt)] = .{ | ||
| 141 | .llvm_name = "ccrt", | ||
| 142 | .description = "Use CSKY compiler runtime", | ||
| 143 | .dependencies = featureSet(&[_]Feature{}), | ||
| 144 | }; | ||
| 145 | result[@intFromEnum(Feature.ck801)] = .{ | ||
| 146 | .llvm_name = "ck801", | ||
| 147 | .description = "CSKY ck801 processors", | ||
| 148 | .dependencies = featureSet(&[_]Feature{}), | ||
| 149 | }; | ||
| 150 | result[@intFromEnum(Feature.ck802)] = .{ | ||
| 151 | .llvm_name = "ck802", | ||
| 152 | .description = "CSKY ck802 processors", | ||
| 153 | .dependencies = featureSet(&[_]Feature{}), | ||
| 154 | }; | ||
| 155 | result[@intFromEnum(Feature.ck803)] = .{ | ||
| 156 | .llvm_name = "ck803", | ||
| 157 | .description = "CSKY ck803 processors", | ||
| 158 | .dependencies = featureSet(&[_]Feature{}), | ||
| 159 | }; | ||
| 160 | result[@intFromEnum(Feature.ck803s)] = .{ | ||
| 161 | .llvm_name = "ck803s", | ||
| 162 | .description = "CSKY ck803s processors", | ||
| 163 | .dependencies = featureSet(&[_]Feature{}), | ||
| 164 | }; | ||
| 165 | result[@intFromEnum(Feature.ck804)] = .{ | ||
| 166 | .llvm_name = "ck804", | ||
| 167 | .description = "CSKY ck804 processors", | ||
| 168 | .dependencies = featureSet(&[_]Feature{}), | ||
| 169 | }; | ||
| 170 | result[@intFromEnum(Feature.ck805)] = .{ | ||
| 171 | .llvm_name = "ck805", | ||
| 172 | .description = "CSKY ck805 processors", | ||
| 173 | .dependencies = featureSet(&[_]Feature{}), | ||
| 174 | }; | ||
| 175 | result[@intFromEnum(Feature.ck807)] = .{ | ||
| 176 | .llvm_name = "ck807", | ||
| 177 | .description = "CSKY ck807 processors", | ||
| 178 | .dependencies = featureSet(&[_]Feature{}), | ||
| 179 | }; | ||
| 180 | result[@intFromEnum(Feature.ck810)] = .{ | ||
| 181 | .llvm_name = "ck810", | ||
| 182 | .description = "CSKY ck810 processors", | ||
| 183 | .dependencies = featureSet(&[_]Feature{}), | ||
| 184 | }; | ||
| 185 | result[@intFromEnum(Feature.ck810v)] = .{ | ||
| 186 | .llvm_name = "ck810v", | ||
| 187 | .description = "CSKY ck810v processors", | ||
| 188 | .dependencies = featureSet(&[_]Feature{}), | ||
| 189 | }; | ||
| 190 | result[@intFromEnum(Feature.ck860)] = .{ | ||
| 191 | .llvm_name = "ck860", | ||
| 192 | .description = "CSKY ck860 processors", | ||
| 193 | .dependencies = featureSet(&[_]Feature{}), | ||
| 194 | }; | ||
| 195 | result[@intFromEnum(Feature.ck860v)] = .{ | ||
| 196 | .llvm_name = "ck860v", | ||
| 197 | .description = "CSKY ck860v processors", | ||
| 198 | .dependencies = featureSet(&[_]Feature{}), | ||
| 199 | }; | ||
| 200 | result[@intFromEnum(Feature.constpool)] = .{ | ||
| 201 | .llvm_name = "constpool", | ||
| 202 | .description = "Dump the constant pool by compiler", | ||
| 203 | .dependencies = featureSet(&[_]Feature{}), | ||
| 204 | }; | ||
| 205 | result[@intFromEnum(Feature.doloop)] = .{ | ||
| 206 | .llvm_name = "doloop", | ||
| 207 | .description = "Enable doloop instructions", | ||
| 208 | .dependencies = featureSet(&[_]Feature{}), | ||
| 209 | }; | ||
| 210 | result[@intFromEnum(Feature.dsp1e2)] = .{ | ||
| 211 | .llvm_name = "dsp1e2", | ||
| 212 | .description = "Support CSKY dsp1e2 instructions", | ||
| 213 | .dependencies = featureSet(&[_]Feature{}), | ||
| 214 | }; | ||
| 215 | result[@intFromEnum(Feature.dsp_silan)] = .{ | ||
| 216 | .llvm_name = "dsp_silan", | ||
| 217 | .description = "Enable DSP Silan instrutions", | ||
| 218 | .dependencies = featureSet(&[_]Feature{}), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.dspe60)] = .{ | ||
| 221 | .llvm_name = "dspe60", | ||
| 222 | .description = "Support CSKY dspe60 instructions", | ||
| 223 | .dependencies = featureSet(&[_]Feature{}), | ||
| 224 | }; | ||
| 225 | result[@intFromEnum(Feature.dspv2)] = .{ | ||
| 226 | .llvm_name = "dspv2", | ||
| 227 | .description = "Enable DSP V2.0 instrutions", | ||
| 228 | .dependencies = featureSet(&[_]Feature{}), | ||
| 229 | }; | ||
| 230 | result[@intFromEnum(Feature.e1)] = .{ | ||
| 231 | .llvm_name = "e1", | ||
| 232 | .description = "Support CSKY e1 instructions", | ||
| 233 | .dependencies = featureSet(&[_]Feature{ | ||
| 234 | .elrw, | ||
| 235 | }), | ||
| 236 | }; | ||
| 237 | result[@intFromEnum(Feature.e2)] = .{ | ||
| 238 | .llvm_name = "e2", | ||
| 239 | .description = "Support CSKY e2 instructions", | ||
| 240 | .dependencies = featureSet(&[_]Feature{ | ||
| 241 | .e1, | ||
| 242 | }), | ||
| 243 | }; | ||
| 244 | result[@intFromEnum(Feature.edsp)] = .{ | ||
| 245 | .llvm_name = "edsp", | ||
| 246 | .description = "Enable DSP instrutions", | ||
| 247 | .dependencies = featureSet(&[_]Feature{}), | ||
| 248 | }; | ||
| 249 | result[@intFromEnum(Feature.elrw)] = .{ | ||
| 250 | .llvm_name = "elrw", | ||
| 251 | .description = "Use the extend LRW instruction", | ||
| 252 | .dependencies = featureSet(&[_]Feature{}), | ||
| 253 | }; | ||
| 254 | result[@intFromEnum(Feature.fdivdu)] = .{ | ||
| 255 | .llvm_name = "fdivdu", | ||
| 256 | .description = "Enable float divide instructions", | ||
| 257 | .dependencies = featureSet(&[_]Feature{}), | ||
| 258 | }; | ||
| 259 | result[@intFromEnum(Feature.float1e2)] = .{ | ||
| 260 | .llvm_name = "float1e2", | ||
| 261 | .description = "Support CSKY float1e2 instructions", | ||
| 262 | .dependencies = featureSet(&[_]Feature{}), | ||
| 263 | }; | ||
| 264 | result[@intFromEnum(Feature.float1e3)] = .{ | ||
| 265 | .llvm_name = "float1e3", | ||
| 266 | .description = "Support CSKY float1e3 instructions", | ||
| 267 | .dependencies = featureSet(&[_]Feature{}), | ||
| 268 | }; | ||
| 269 | result[@intFromEnum(Feature.float3e4)] = .{ | ||
| 270 | .llvm_name = "float3e4", | ||
| 271 | .description = "Support CSKY float3e4 instructions", | ||
| 272 | .dependencies = featureSet(&[_]Feature{}), | ||
| 273 | }; | ||
| 274 | result[@intFromEnum(Feature.float7e60)] = .{ | ||
| 275 | .llvm_name = "float7e60", | ||
| 276 | .description = "Support CSKY float7e60 instructions", | ||
| 277 | .dependencies = featureSet(&[_]Feature{}), | ||
| 278 | }; | ||
| 279 | result[@intFromEnum(Feature.floate1)] = .{ | ||
| 280 | .llvm_name = "floate1", | ||
| 281 | .description = "Support CSKY floate1 instructions", | ||
| 282 | .dependencies = featureSet(&[_]Feature{}), | ||
| 283 | }; | ||
| 284 | result[@intFromEnum(Feature.fpuv2_df)] = .{ | ||
| 285 | .llvm_name = "fpuv2_df", | ||
| 286 | .description = "Enable FPUv2 double float instructions", | ||
| 287 | .dependencies = featureSet(&[_]Feature{}), | ||
| 288 | }; | ||
| 289 | result[@intFromEnum(Feature.fpuv2_sf)] = .{ | ||
| 290 | .llvm_name = "fpuv2_sf", | ||
| 291 | .description = "Enable FPUv2 single float instructions", | ||
| 292 | .dependencies = featureSet(&[_]Feature{}), | ||
| 293 | }; | ||
| 294 | result[@intFromEnum(Feature.fpuv3_df)] = .{ | ||
| 295 | .llvm_name = "fpuv3_df", | ||
| 296 | .description = "Enable FPUv3 double float instructions", | ||
| 297 | .dependencies = featureSet(&[_]Feature{}), | ||
| 298 | }; | ||
| 299 | result[@intFromEnum(Feature.fpuv3_hf)] = .{ | ||
| 300 | .llvm_name = "fpuv3_hf", | ||
| 301 | .description = "Enable FPUv3 half precision operate instructions", | ||
| 302 | .dependencies = featureSet(&[_]Feature{}), | ||
| 303 | }; | ||
| 304 | result[@intFromEnum(Feature.fpuv3_hi)] = .{ | ||
| 305 | .llvm_name = "fpuv3_hi", | ||
| 306 | .description = "Enable FPUv3 half word converting instructions", | ||
| 307 | .dependencies = featureSet(&[_]Feature{}), | ||
| 308 | }; | ||
| 309 | result[@intFromEnum(Feature.fpuv3_sf)] = .{ | ||
| 310 | .llvm_name = "fpuv3_sf", | ||
| 311 | .description = "Enable FPUv3 single float instructions", | ||
| 312 | .dependencies = featureSet(&[_]Feature{}), | ||
| 313 | }; | ||
| 314 | result[@intFromEnum(Feature.hard_float)] = .{ | ||
| 315 | .llvm_name = "hard-float", | ||
| 316 | .description = "Use hard floating point features", | ||
| 317 | .dependencies = featureSet(&[_]Feature{}), | ||
| 318 | }; | ||
| 319 | result[@intFromEnum(Feature.hard_float_abi)] = .{ | ||
| 320 | .llvm_name = "hard-float-abi", | ||
| 321 | .description = "Use hard floating point ABI to pass args", | ||
| 322 | .dependencies = featureSet(&[_]Feature{}), | ||
| 323 | }; | ||
| 324 | result[@intFromEnum(Feature.hard_tp)] = .{ | ||
| 325 | .llvm_name = "hard-tp", | ||
| 326 | .description = "Enable TLS Pointer register", | ||
| 327 | .dependencies = featureSet(&[_]Feature{}), | ||
| 328 | }; | ||
| 329 | result[@intFromEnum(Feature.high_registers)] = .{ | ||
| 330 | .llvm_name = "high-registers", | ||
| 331 | .description = "Enable r16-r31 registers", | ||
| 332 | .dependencies = featureSet(&[_]Feature{}), | ||
| 333 | }; | ||
| 334 | result[@intFromEnum(Feature.hwdiv)] = .{ | ||
| 335 | .llvm_name = "hwdiv", | ||
| 336 | .description = "Enable divide instrutions", | ||
| 337 | .dependencies = featureSet(&[_]Feature{}), | ||
| 338 | }; | ||
| 339 | result[@intFromEnum(Feature.istack)] = .{ | ||
| 340 | .llvm_name = "istack", | ||
| 341 | .description = "Enable interrput attribute", | ||
| 342 | .dependencies = featureSet(&[_]Feature{}), | ||
| 343 | }; | ||
| 344 | result[@intFromEnum(Feature.java)] = .{ | ||
| 345 | .llvm_name = "java", | ||
| 346 | .description = "Enable java instructions", | ||
| 347 | .dependencies = featureSet(&[_]Feature{}), | ||
| 348 | }; | ||
| 349 | result[@intFromEnum(Feature.mp)] = .{ | ||
| 350 | .llvm_name = "mp", | ||
| 351 | .description = "Support CSKY mp instructions", | ||
| 352 | .dependencies = featureSet(&[_]Feature{ | ||
| 353 | .@"2e3", | ||
| 354 | }), | ||
| 355 | }; | ||
| 356 | result[@intFromEnum(Feature.mp1e2)] = .{ | ||
| 357 | .llvm_name = "mp1e2", | ||
| 358 | .description = "Support CSKY mp1e2 instructions", | ||
| 359 | .dependencies = featureSet(&[_]Feature{ | ||
| 360 | .@"3e7", | ||
| 361 | }), | ||
| 362 | }; | ||
| 363 | result[@intFromEnum(Feature.multiple_stld)] = .{ | ||
| 364 | .llvm_name = "multiple_stld", | ||
| 365 | .description = "Enable multiple load/store instrutions", | ||
| 366 | .dependencies = featureSet(&[_]Feature{}), | ||
| 367 | }; | ||
| 368 | result[@intFromEnum(Feature.nvic)] = .{ | ||
| 369 | .llvm_name = "nvic", | ||
| 370 | .description = "Enable NVIC", | ||
| 371 | .dependencies = featureSet(&[_]Feature{}), | ||
| 372 | }; | ||
| 373 | result[@intFromEnum(Feature.pushpop)] = .{ | ||
| 374 | .llvm_name = "pushpop", | ||
| 375 | .description = "Enable push/pop instrutions", | ||
| 376 | .dependencies = featureSet(&[_]Feature{}), | ||
| 377 | }; | ||
| 378 | result[@intFromEnum(Feature.smart)] = .{ | ||
| 379 | .llvm_name = "smart", | ||
| 380 | .description = "Let CPU work in Smart Mode", | ||
| 381 | .dependencies = featureSet(&[_]Feature{}), | ||
| 382 | }; | ||
| 383 | result[@intFromEnum(Feature.soft_tp)] = .{ | ||
| 384 | .llvm_name = "soft-tp", | ||
| 385 | .description = "Disable TLS Pointer register", | ||
| 386 | .dependencies = featureSet(&[_]Feature{}), | ||
| 387 | }; | ||
| 388 | result[@intFromEnum(Feature.stack_size)] = .{ | ||
| 389 | .llvm_name = "stack-size", | ||
| 390 | .description = "Output stack size information", | ||
| 391 | .dependencies = featureSet(&[_]Feature{}), | ||
| 392 | }; | ||
| 393 | result[@intFromEnum(Feature.trust)] = .{ | ||
| 394 | .llvm_name = "trust", | ||
| 395 | .description = "Enable trust instructions", | ||
| 396 | .dependencies = featureSet(&[_]Feature{}), | ||
| 397 | }; | ||
| 398 | result[@intFromEnum(Feature.vdsp2e3)] = .{ | ||
| 399 | .llvm_name = "vdsp2e3", | ||
| 400 | .description = "Support CSKY vdsp2e3 instructions", | ||
| 401 | .dependencies = featureSet(&[_]Feature{}), | ||
| 402 | }; | ||
| 403 | result[@intFromEnum(Feature.vdsp2e60f)] = .{ | ||
| 404 | .llvm_name = "vdsp2e60f", | ||
| 405 | .description = "Support CSKY vdsp2e60f instructions", | ||
| 406 | .dependencies = featureSet(&[_]Feature{}), | ||
| 407 | }; | ||
| 408 | result[@intFromEnum(Feature.vdspv1)] = .{ | ||
| 409 | .llvm_name = "vdspv1", | ||
| 410 | .description = "Enable 128bit vdsp-v1 instructions", | ||
| 411 | .dependencies = featureSet(&[_]Feature{}), | ||
| 412 | }; | ||
| 413 | result[@intFromEnum(Feature.vdspv2)] = .{ | ||
| 414 | .llvm_name = "vdspv2", | ||
| 415 | .description = "Enable vdsp-v2 instructions", | ||
| 416 | .dependencies = featureSet(&[_]Feature{}), | ||
| 417 | }; | ||
| 418 | const ti = @typeInfo(Feature); | ||
| 419 | for (&result, 0..) |*elem, i| { | ||
| 420 | elem.index = i; | ||
| 421 | elem.name = ti.Enum.fields[i].name; | ||
| 422 | } | ||
| 423 | break :blk result; | ||
| 424 | }; | ||
| 425 | |||
| 426 | pub const cpu = struct { | ||
| 427 | pub const c807 = CpuModel{ | ||
| 428 | .name = "c807", | ||
| 429 | .llvm_name = "c807", | ||
| 430 | .features = featureSet(&[_]Feature{ | ||
| 431 | .cache, | ||
| 432 | .ck807, | ||
| 433 | .dsp1e2, | ||
| 434 | .dspe60, | ||
| 435 | .edsp, | ||
| 436 | .hard_tp, | ||
| 437 | .high_registers, | ||
| 438 | .hwdiv, | ||
| 439 | .mp, | ||
| 440 | .mp1e2, | ||
| 441 | .nvic, | ||
| 442 | .trust, | ||
| 443 | }), | ||
| 444 | }; | ||
| 445 | pub const c807f = CpuModel{ | ||
| 446 | .name = "c807f", | ||
| 447 | .llvm_name = "c807f", | ||
| 448 | .features = featureSet(&[_]Feature{ | ||
| 449 | .cache, | ||
| 450 | .ck807, | ||
| 451 | .dsp1e2, | ||
| 452 | .dspe60, | ||
| 453 | .edsp, | ||
| 454 | .fdivdu, | ||
| 455 | .float1e2, | ||
| 456 | .float1e3, | ||
| 457 | .float3e4, | ||
| 458 | .floate1, | ||
| 459 | .fpuv2_df, | ||
| 460 | .fpuv2_sf, | ||
| 461 | .hard_tp, | ||
| 462 | .high_registers, | ||
| 463 | .hwdiv, | ||
| 464 | .mp, | ||
| 465 | .mp1e2, | ||
| 466 | .nvic, | ||
| 467 | .trust, | ||
| 468 | }), | ||
| 469 | }; | ||
| 470 | pub const c810 = CpuModel{ | ||
| 471 | .name = "c810", | ||
| 472 | .llvm_name = "c810", | ||
| 473 | .features = featureSet(&[_]Feature{ | ||
| 474 | .@"7e10", | ||
| 475 | .cache, | ||
| 476 | .ck810, | ||
| 477 | .dsp1e2, | ||
| 478 | .dspe60, | ||
| 479 | .edsp, | ||
| 480 | .fdivdu, | ||
| 481 | .float1e2, | ||
| 482 | .floate1, | ||
| 483 | .fpuv2_df, | ||
| 484 | .fpuv2_sf, | ||
| 485 | .hard_tp, | ||
| 486 | .high_registers, | ||
| 487 | .hwdiv, | ||
| 488 | .mp, | ||
| 489 | .mp1e2, | ||
| 490 | .nvic, | ||
| 491 | .trust, | ||
| 492 | }), | ||
| 493 | }; | ||
| 494 | pub const c810t = CpuModel{ | ||
| 495 | .name = "c810t", | ||
| 496 | .llvm_name = "c810t", | ||
| 497 | .features = featureSet(&[_]Feature{ | ||
| 498 | .@"7e10", | ||
| 499 | .cache, | ||
| 500 | .ck810, | ||
| 501 | .dsp1e2, | ||
| 502 | .dspe60, | ||
| 503 | .edsp, | ||
| 504 | .fdivdu, | ||
| 505 | .float1e2, | ||
| 506 | .floate1, | ||
| 507 | .fpuv2_df, | ||
| 508 | .fpuv2_sf, | ||
| 509 | .hard_tp, | ||
| 510 | .high_registers, | ||
| 511 | .hwdiv, | ||
| 512 | .mp, | ||
| 513 | .mp1e2, | ||
| 514 | .nvic, | ||
| 515 | .trust, | ||
| 516 | }), | ||
| 517 | }; | ||
| 518 | pub const c810tv = CpuModel{ | ||
| 519 | .name = "c810tv", | ||
| 520 | .llvm_name = "c810tv", | ||
| 521 | .features = featureSet(&[_]Feature{ | ||
| 522 | .@"7e10", | ||
| 523 | .cache, | ||
| 524 | .ck810, | ||
| 525 | .ck810v, | ||
| 526 | .dsp1e2, | ||
| 527 | .dspe60, | ||
| 528 | .edsp, | ||
| 529 | .fdivdu, | ||
| 530 | .float1e2, | ||
| 531 | .floate1, | ||
| 532 | .fpuv2_df, | ||
| 533 | .fpuv2_sf, | ||
| 534 | .hard_tp, | ||
| 535 | .high_registers, | ||
| 536 | .hwdiv, | ||
| 537 | .mp, | ||
| 538 | .mp1e2, | ||
| 539 | .nvic, | ||
| 540 | .trust, | ||
| 541 | .vdspv1, | ||
| 542 | }), | ||
| 543 | }; | ||
| 544 | pub const c810v = CpuModel{ | ||
| 545 | .name = "c810v", | ||
| 546 | .llvm_name = "c810v", | ||
| 547 | .features = featureSet(&[_]Feature{ | ||
| 548 | .@"7e10", | ||
| 549 | .cache, | ||
| 550 | .ck810, | ||
| 551 | .ck810v, | ||
| 552 | .dsp1e2, | ||
| 553 | .dspe60, | ||
| 554 | .edsp, | ||
| 555 | .fdivdu, | ||
| 556 | .float1e2, | ||
| 557 | .floate1, | ||
| 558 | .fpuv2_df, | ||
| 559 | .fpuv2_sf, | ||
| 560 | .hard_tp, | ||
| 561 | .high_registers, | ||
| 562 | .hwdiv, | ||
| 563 | .mp, | ||
| 564 | .mp1e2, | ||
| 565 | .nvic, | ||
| 566 | .trust, | ||
| 567 | .vdspv1, | ||
| 568 | }), | ||
| 569 | }; | ||
| 570 | pub const c860 = CpuModel{ | ||
| 571 | .name = "c860", | ||
| 572 | .llvm_name = "c860", | ||
| 573 | .features = featureSet(&[_]Feature{ | ||
| 574 | .@"10e60", | ||
| 575 | .@"3e3r2", | ||
| 576 | .@"3e3r3", | ||
| 577 | .btst16, | ||
| 578 | .cache, | ||
| 579 | .ck860, | ||
| 580 | .dspe60, | ||
| 581 | .float7e60, | ||
| 582 | .fpuv3_df, | ||
| 583 | .fpuv3_hf, | ||
| 584 | .fpuv3_hi, | ||
| 585 | .fpuv3_sf, | ||
| 586 | .hard_tp, | ||
| 587 | .high_registers, | ||
| 588 | .hwdiv, | ||
| 589 | .mp, | ||
| 590 | .mp1e2, | ||
| 591 | .nvic, | ||
| 592 | .trust, | ||
| 593 | }), | ||
| 594 | }; | ||
| 595 | pub const c860v = CpuModel{ | ||
| 596 | .name = "c860v", | ||
| 597 | .llvm_name = "c860v", | ||
| 598 | .features = featureSet(&[_]Feature{ | ||
| 599 | .@"10e60", | ||
| 600 | .@"3e3r2", | ||
| 601 | .@"3e3r3", | ||
| 602 | .btst16, | ||
| 603 | .cache, | ||
| 604 | .ck860, | ||
| 605 | .ck860v, | ||
| 606 | .dspe60, | ||
| 607 | .float7e60, | ||
| 608 | .fpuv3_df, | ||
| 609 | .fpuv3_hf, | ||
| 610 | .fpuv3_hi, | ||
| 611 | .fpuv3_sf, | ||
| 612 | .hard_tp, | ||
| 613 | .high_registers, | ||
| 614 | .hwdiv, | ||
| 615 | .mp, | ||
| 616 | .mp1e2, | ||
| 617 | .nvic, | ||
| 618 | .trust, | ||
| 619 | .vdsp2e60f, | ||
| 620 | .vdspv2, | ||
| 621 | }), | ||
| 622 | }; | ||
| 623 | pub const ck801 = CpuModel{ | ||
| 624 | .name = "ck801", | ||
| 625 | .llvm_name = "ck801", | ||
| 626 | .features = featureSet(&[_]Feature{ | ||
| 627 | .btst16, | ||
| 628 | .ck801, | ||
| 629 | .e1, | ||
| 630 | .trust, | ||
| 631 | }), | ||
| 632 | }; | ||
| 633 | pub const ck801t = CpuModel{ | ||
| 634 | .name = "ck801t", | ||
| 635 | .llvm_name = "ck801t", | ||
| 636 | .features = featureSet(&[_]Feature{ | ||
| 637 | .btst16, | ||
| 638 | .ck801, | ||
| 639 | .e1, | ||
| 640 | .trust, | ||
| 641 | }), | ||
| 642 | }; | ||
| 643 | pub const ck802 = CpuModel{ | ||
| 644 | .name = "ck802", | ||
| 645 | .llvm_name = "ck802", | ||
| 646 | .features = featureSet(&[_]Feature{ | ||
| 647 | .btst16, | ||
| 648 | .ck802, | ||
| 649 | .e2, | ||
| 650 | .nvic, | ||
| 651 | .trust, | ||
| 652 | }), | ||
| 653 | }; | ||
| 654 | pub const ck802j = CpuModel{ | ||
| 655 | .name = "ck802j", | ||
| 656 | .llvm_name = "ck802j", | ||
| 657 | .features = featureSet(&[_]Feature{ | ||
| 658 | .btst16, | ||
| 659 | .ck802, | ||
| 660 | .e2, | ||
| 661 | .java, | ||
| 662 | .nvic, | ||
| 663 | .trust, | ||
| 664 | }), | ||
| 665 | }; | ||
| 666 | pub const ck802t = CpuModel{ | ||
| 667 | .name = "ck802t", | ||
| 668 | .llvm_name = "ck802t", | ||
| 669 | .features = featureSet(&[_]Feature{ | ||
| 670 | .btst16, | ||
| 671 | .ck802, | ||
| 672 | .e2, | ||
| 673 | .nvic, | ||
| 674 | .trust, | ||
| 675 | }), | ||
| 676 | }; | ||
| 677 | pub const ck803 = CpuModel{ | ||
| 678 | .name = "ck803", | ||
| 679 | .llvm_name = "ck803", | ||
| 680 | .features = featureSet(&[_]Feature{ | ||
| 681 | .btst16, | ||
| 682 | .ck803, | ||
| 683 | .hwdiv, | ||
| 684 | .mp, | ||
| 685 | .nvic, | ||
| 686 | .trust, | ||
| 687 | }), | ||
| 688 | }; | ||
| 689 | pub const ck803e = CpuModel{ | ||
| 690 | .name = "ck803e", | ||
| 691 | .llvm_name = "ck803e", | ||
| 692 | .features = featureSet(&[_]Feature{ | ||
| 693 | .btst16, | ||
| 694 | .ck803, | ||
| 695 | .dsp1e2, | ||
| 696 | .dspe60, | ||
| 697 | .edsp, | ||
| 698 | .hwdiv, | ||
| 699 | .mp, | ||
| 700 | .nvic, | ||
| 701 | .trust, | ||
| 702 | }), | ||
| 703 | }; | ||
| 704 | pub const ck803ef = CpuModel{ | ||
| 705 | .name = "ck803ef", | ||
| 706 | .llvm_name = "ck803ef", | ||
| 707 | .features = featureSet(&[_]Feature{ | ||
| 708 | .btst16, | ||
| 709 | .ck803, | ||
| 710 | .dsp1e2, | ||
| 711 | .dspe60, | ||
| 712 | .edsp, | ||
| 713 | .float1e3, | ||
| 714 | .floate1, | ||
| 715 | .fpuv2_sf, | ||
| 716 | .hwdiv, | ||
| 717 | .mp, | ||
| 718 | .nvic, | ||
| 719 | .trust, | ||
| 720 | }), | ||
| 721 | }; | ||
| 722 | pub const ck803efh = CpuModel{ | ||
| 723 | .name = "ck803efh", | ||
| 724 | .llvm_name = "ck803efh", | ||
| 725 | .features = featureSet(&[_]Feature{ | ||
| 726 | .btst16, | ||
| 727 | .ck803, | ||
| 728 | .dsp1e2, | ||
| 729 | .dspe60, | ||
| 730 | .edsp, | ||
| 731 | .float1e3, | ||
| 732 | .floate1, | ||
| 733 | .fpuv2_sf, | ||
| 734 | .hwdiv, | ||
| 735 | .mp, | ||
| 736 | .nvic, | ||
| 737 | .trust, | ||
| 738 | }), | ||
| 739 | }; | ||
| 740 | pub const ck803efhr1 = CpuModel{ | ||
| 741 | .name = "ck803efhr1", | ||
| 742 | .llvm_name = "ck803efhr1", | ||
| 743 | .features = featureSet(&[_]Feature{ | ||
| 744 | .@"3e3r1", | ||
| 745 | .btst16, | ||
| 746 | .ck803, | ||
| 747 | .dsp1e2, | ||
| 748 | .dspe60, | ||
| 749 | .dspv2, | ||
| 750 | .edsp, | ||
| 751 | .float1e3, | ||
| 752 | .floate1, | ||
| 753 | .fpuv2_sf, | ||
| 754 | .high_registers, | ||
| 755 | .hwdiv, | ||
| 756 | .mp, | ||
| 757 | .nvic, | ||
| 758 | .trust, | ||
| 759 | }), | ||
| 760 | }; | ||
| 761 | pub const ck803efhr2 = CpuModel{ | ||
| 762 | .name = "ck803efhr2", | ||
| 763 | .llvm_name = "ck803efhr2", | ||
| 764 | .features = featureSet(&[_]Feature{ | ||
| 765 | .@"3e3r2", | ||
| 766 | .@"3e3r3", | ||
| 767 | .btst16, | ||
| 768 | .ck803, | ||
| 769 | .dsp1e2, | ||
| 770 | .dspe60, | ||
| 771 | .dspv2, | ||
| 772 | .edsp, | ||
| 773 | .float1e3, | ||
| 774 | .floate1, | ||
| 775 | .fpuv2_sf, | ||
| 776 | .high_registers, | ||
| 777 | .hwdiv, | ||
| 778 | .mp, | ||
| 779 | .nvic, | ||
| 780 | .trust, | ||
| 781 | }), | ||
| 782 | }; | ||
| 783 | pub const ck803efhr3 = CpuModel{ | ||
| 784 | .name = "ck803efhr3", | ||
| 785 | .llvm_name = "ck803efhr3", | ||
| 786 | .features = featureSet(&[_]Feature{ | ||
| 787 | .@"3e3r2", | ||
| 788 | .@"3e3r3", | ||
| 789 | .btst16, | ||
| 790 | .ck803, | ||
| 791 | .dsp1e2, | ||
| 792 | .dspe60, | ||
| 793 | .dspv2, | ||
| 794 | .edsp, | ||
| 795 | .float1e3, | ||
| 796 | .floate1, | ||
| 797 | .fpuv2_sf, | ||
| 798 | .high_registers, | ||
| 799 | .hwdiv, | ||
| 800 | .mp, | ||
| 801 | .nvic, | ||
| 802 | .trust, | ||
| 803 | }), | ||
| 804 | }; | ||
| 805 | pub const ck803efht = CpuModel{ | ||
| 806 | .name = "ck803efht", | ||
| 807 | .llvm_name = "ck803efht", | ||
| 808 | .features = featureSet(&[_]Feature{ | ||
| 809 | .btst16, | ||
| 810 | .ck803, | ||
| 811 | .dsp1e2, | ||
| 812 | .dspe60, | ||
| 813 | .edsp, | ||
| 814 | .float1e3, | ||
| 815 | .floate1, | ||
| 816 | .fpuv2_sf, | ||
| 817 | .hwdiv, | ||
| 818 | .mp, | ||
| 819 | .nvic, | ||
| 820 | .trust, | ||
| 821 | }), | ||
| 822 | }; | ||
| 823 | pub const ck803efhtr1 = CpuModel{ | ||
| 824 | .name = "ck803efhtr1", | ||
| 825 | .llvm_name = "ck803efhtr1", | ||
| 826 | .features = featureSet(&[_]Feature{ | ||
| 827 | .@"3e3r1", | ||
| 828 | .btst16, | ||
| 829 | .ck803, | ||
| 830 | .dsp1e2, | ||
| 831 | .dspe60, | ||
| 832 | .dspv2, | ||
| 833 | .edsp, | ||
| 834 | .float1e3, | ||
| 835 | .floate1, | ||
| 836 | .fpuv2_sf, | ||
| 837 | .high_registers, | ||
| 838 | .hwdiv, | ||
| 839 | .mp, | ||
| 840 | .nvic, | ||
| 841 | .trust, | ||
| 842 | }), | ||
| 843 | }; | ||
| 844 | pub const ck803efhtr2 = CpuModel{ | ||
| 845 | .name = "ck803efhtr2", | ||
| 846 | .llvm_name = "ck803efhtr2", | ||
| 847 | .features = featureSet(&[_]Feature{ | ||
| 848 | .@"3e3r2", | ||
| 849 | .@"3e3r3", | ||
| 850 | .btst16, | ||
| 851 | .ck803, | ||
| 852 | .dsp1e2, | ||
| 853 | .dspe60, | ||
| 854 | .dspv2, | ||
| 855 | .edsp, | ||
| 856 | .float1e3, | ||
| 857 | .floate1, | ||
| 858 | .fpuv2_sf, | ||
| 859 | .high_registers, | ||
| 860 | .hwdiv, | ||
| 861 | .mp, | ||
| 862 | .nvic, | ||
| 863 | .trust, | ||
| 864 | }), | ||
| 865 | }; | ||
| 866 | pub const ck803efhtr3 = CpuModel{ | ||
| 867 | .name = "ck803efhtr3", | ||
| 868 | .llvm_name = "ck803efhtr3", | ||
| 869 | .features = featureSet(&[_]Feature{ | ||
| 870 | .@"3e3r2", | ||
| 871 | .@"3e3r3", | ||
| 872 | .btst16, | ||
| 873 | .ck803, | ||
| 874 | .dsp1e2, | ||
| 875 | .dspe60, | ||
| 876 | .dspv2, | ||
| 877 | .edsp, | ||
| 878 | .float1e3, | ||
| 879 | .floate1, | ||
| 880 | .fpuv2_sf, | ||
| 881 | .high_registers, | ||
| 882 | .hwdiv, | ||
| 883 | .mp, | ||
| 884 | .nvic, | ||
| 885 | .trust, | ||
| 886 | }), | ||
| 887 | }; | ||
| 888 | pub const ck803efr1 = CpuModel{ | ||
| 889 | .name = "ck803efr1", | ||
| 890 | .llvm_name = "ck803efr1", | ||
| 891 | .features = featureSet(&[_]Feature{ | ||
| 892 | .@"3e3r1", | ||
| 893 | .btst16, | ||
| 894 | .ck803, | ||
| 895 | .dsp1e2, | ||
| 896 | .dspe60, | ||
| 897 | .dspv2, | ||
| 898 | .edsp, | ||
| 899 | .float1e3, | ||
| 900 | .floate1, | ||
| 901 | .fpuv2_sf, | ||
| 902 | .high_registers, | ||
| 903 | .hwdiv, | ||
| 904 | .mp, | ||
| 905 | .nvic, | ||
| 906 | .trust, | ||
| 907 | }), | ||
| 908 | }; | ||
| 909 | pub const ck803efr2 = CpuModel{ | ||
| 910 | .name = "ck803efr2", | ||
| 911 | .llvm_name = "ck803efr2", | ||
| 912 | .features = featureSet(&[_]Feature{ | ||
| 913 | .@"3e3r2", | ||
| 914 | .@"3e3r3", | ||
| 915 | .btst16, | ||
| 916 | .ck803, | ||
| 917 | .dsp1e2, | ||
| 918 | .dspe60, | ||
| 919 | .dspv2, | ||
| 920 | .edsp, | ||
| 921 | .float1e3, | ||
| 922 | .floate1, | ||
| 923 | .fpuv2_sf, | ||
| 924 | .high_registers, | ||
| 925 | .hwdiv, | ||
| 926 | .mp, | ||
| 927 | .nvic, | ||
| 928 | .trust, | ||
| 929 | }), | ||
| 930 | }; | ||
| 931 | pub const ck803efr3 = CpuModel{ | ||
| 932 | .name = "ck803efr3", | ||
| 933 | .llvm_name = "ck803efr3", | ||
| 934 | .features = featureSet(&[_]Feature{ | ||
| 935 | .@"3e3r2", | ||
| 936 | .@"3e3r3", | ||
| 937 | .btst16, | ||
| 938 | .ck803, | ||
| 939 | .dsp1e2, | ||
| 940 | .dspe60, | ||
| 941 | .dspv2, | ||
| 942 | .edsp, | ||
| 943 | .float1e3, | ||
| 944 | .floate1, | ||
| 945 | .fpuv2_sf, | ||
| 946 | .high_registers, | ||
| 947 | .hwdiv, | ||
| 948 | .mp, | ||
| 949 | .nvic, | ||
| 950 | .trust, | ||
| 951 | }), | ||
| 952 | }; | ||
| 953 | pub const ck803eft = CpuModel{ | ||
| 954 | .name = "ck803eft", | ||
| 955 | .llvm_name = "ck803eft", | ||
| 956 | .features = featureSet(&[_]Feature{ | ||
| 957 | .btst16, | ||
| 958 | .ck803, | ||
| 959 | .dsp1e2, | ||
| 960 | .dspe60, | ||
| 961 | .edsp, | ||
| 962 | .float1e3, | ||
| 963 | .floate1, | ||
| 964 | .fpuv2_sf, | ||
| 965 | .hwdiv, | ||
| 966 | .mp, | ||
| 967 | .nvic, | ||
| 968 | .trust, | ||
| 969 | }), | ||
| 970 | }; | ||
| 971 | pub const ck803eftr1 = CpuModel{ | ||
| 972 | .name = "ck803eftr1", | ||
| 973 | .llvm_name = "ck803eftr1", | ||
| 974 | .features = featureSet(&[_]Feature{ | ||
| 975 | .@"3e3r1", | ||
| 976 | .btst16, | ||
| 977 | .ck803, | ||
| 978 | .dsp1e2, | ||
| 979 | .dspe60, | ||
| 980 | .dspv2, | ||
| 981 | .edsp, | ||
| 982 | .float1e3, | ||
| 983 | .floate1, | ||
| 984 | .fpuv2_sf, | ||
| 985 | .high_registers, | ||
| 986 | .hwdiv, | ||
| 987 | .mp, | ||
| 988 | .nvic, | ||
| 989 | .trust, | ||
| 990 | }), | ||
| 991 | }; | ||
| 992 | pub const ck803eftr2 = CpuModel{ | ||
| 993 | .name = "ck803eftr2", | ||
| 994 | .llvm_name = "ck803eftr2", | ||
| 995 | .features = featureSet(&[_]Feature{ | ||
| 996 | .@"3e3r2", | ||
| 997 | .@"3e3r3", | ||
| 998 | .btst16, | ||
| 999 | .ck803, | ||
| 1000 | .dsp1e2, | ||
| 1001 | .dspe60, | ||
| 1002 | .dspv2, | ||
| 1003 | .edsp, | ||
| 1004 | .float1e3, | ||
| 1005 | .floate1, | ||
| 1006 | .fpuv2_sf, | ||
| 1007 | .high_registers, | ||
| 1008 | .hwdiv, | ||
| 1009 | .mp, | ||
| 1010 | .nvic, | ||
| 1011 | .trust, | ||
| 1012 | }), | ||
| 1013 | }; | ||
| 1014 | pub const ck803eftr3 = CpuModel{ | ||
| 1015 | .name = "ck803eftr3", | ||
| 1016 | .llvm_name = "ck803eftr3", | ||
| 1017 | .features = featureSet(&[_]Feature{ | ||
| 1018 | .@"3e3r2", | ||
| 1019 | .@"3e3r3", | ||
| 1020 | .btst16, | ||
| 1021 | .ck803, | ||
| 1022 | .dsp1e2, | ||
| 1023 | .dspe60, | ||
| 1024 | .dspv2, | ||
| 1025 | .edsp, | ||
| 1026 | .float1e3, | ||
| 1027 | .floate1, | ||
| 1028 | .fpuv2_sf, | ||
| 1029 | .high_registers, | ||
| 1030 | .hwdiv, | ||
| 1031 | .mp, | ||
| 1032 | .nvic, | ||
| 1033 | .trust, | ||
| 1034 | }), | ||
| 1035 | }; | ||
| 1036 | pub const ck803eh = CpuModel{ | ||
| 1037 | .name = "ck803eh", | ||
| 1038 | .llvm_name = "ck803eh", | ||
| 1039 | .features = featureSet(&[_]Feature{ | ||
| 1040 | .btst16, | ||
| 1041 | .ck803, | ||
| 1042 | .dsp1e2, | ||
| 1043 | .dspe60, | ||
| 1044 | .edsp, | ||
| 1045 | .hwdiv, | ||
| 1046 | .mp, | ||
| 1047 | .nvic, | ||
| 1048 | .trust, | ||
| 1049 | }), | ||
| 1050 | }; | ||
| 1051 | pub const ck803ehr1 = CpuModel{ | ||
| 1052 | .name = "ck803ehr1", | ||
| 1053 | .llvm_name = "ck803ehr1", | ||
| 1054 | .features = featureSet(&[_]Feature{ | ||
| 1055 | .@"3e3r1", | ||
| 1056 | .@"3e3r3", | ||
| 1057 | .btst16, | ||
| 1058 | .ck803, | ||
| 1059 | .dsp1e2, | ||
| 1060 | .dspe60, | ||
| 1061 | .dspv2, | ||
| 1062 | .edsp, | ||
| 1063 | .high_registers, | ||
| 1064 | .hwdiv, | ||
| 1065 | .mp, | ||
| 1066 | .nvic, | ||
| 1067 | .trust, | ||
| 1068 | }), | ||
| 1069 | }; | ||
| 1070 | pub const ck803ehr2 = CpuModel{ | ||
| 1071 | .name = "ck803ehr2", | ||
| 1072 | .llvm_name = "ck803ehr2", | ||
| 1073 | .features = featureSet(&[_]Feature{ | ||
| 1074 | .@"3e3r2", | ||
| 1075 | .@"3e3r3", | ||
| 1076 | .btst16, | ||
| 1077 | .ck803, | ||
| 1078 | .dsp1e2, | ||
| 1079 | .dspe60, | ||
| 1080 | .dspv2, | ||
| 1081 | .edsp, | ||
| 1082 | .high_registers, | ||
| 1083 | .hwdiv, | ||
| 1084 | .mp, | ||
| 1085 | .nvic, | ||
| 1086 | .trust, | ||
| 1087 | }), | ||
| 1088 | }; | ||
| 1089 | pub const ck803ehr3 = CpuModel{ | ||
| 1090 | .name = "ck803ehr3", | ||
| 1091 | .llvm_name = "ck803ehr3", | ||
| 1092 | .features = featureSet(&[_]Feature{ | ||
| 1093 | .@"3e3r2", | ||
| 1094 | .@"3e3r3", | ||
| 1095 | .btst16, | ||
| 1096 | .ck803, | ||
| 1097 | .dsp1e2, | ||
| 1098 | .dspe60, | ||
| 1099 | .dspv2, | ||
| 1100 | .edsp, | ||
| 1101 | .high_registers, | ||
| 1102 | .hwdiv, | ||
| 1103 | .mp, | ||
| 1104 | .nvic, | ||
| 1105 | .trust, | ||
| 1106 | }), | ||
| 1107 | }; | ||
| 1108 | pub const ck803eht = CpuModel{ | ||
| 1109 | .name = "ck803eht", | ||
| 1110 | .llvm_name = "ck803eht", | ||
| 1111 | .features = featureSet(&[_]Feature{ | ||
| 1112 | .btst16, | ||
| 1113 | .ck803, | ||
| 1114 | .dsp1e2, | ||
| 1115 | .dspe60, | ||
| 1116 | .edsp, | ||
| 1117 | .hwdiv, | ||
| 1118 | .mp, | ||
| 1119 | .nvic, | ||
| 1120 | .trust, | ||
| 1121 | }), | ||
| 1122 | }; | ||
| 1123 | pub const ck803ehtr1 = CpuModel{ | ||
| 1124 | .name = "ck803ehtr1", | ||
| 1125 | .llvm_name = "ck803ehtr1", | ||
| 1126 | .features = featureSet(&[_]Feature{ | ||
| 1127 | .@"3e3r1", | ||
| 1128 | .@"3e3r3", | ||
| 1129 | .btst16, | ||
| 1130 | .ck803, | ||
| 1131 | .dsp1e2, | ||
| 1132 | .dspe60, | ||
| 1133 | .dspv2, | ||
| 1134 | .edsp, | ||
| 1135 | .high_registers, | ||
| 1136 | .hwdiv, | ||
| 1137 | .mp, | ||
| 1138 | .nvic, | ||
| 1139 | .trust, | ||
| 1140 | }), | ||
| 1141 | }; | ||
| 1142 | pub const ck803ehtr2 = CpuModel{ | ||
| 1143 | .name = "ck803ehtr2", | ||
| 1144 | .llvm_name = "ck803ehtr2", | ||
| 1145 | .features = featureSet(&[_]Feature{ | ||
| 1146 | .@"3e3r2", | ||
| 1147 | .@"3e3r3", | ||
| 1148 | .btst16, | ||
| 1149 | .ck803, | ||
| 1150 | .dsp1e2, | ||
| 1151 | .dspe60, | ||
| 1152 | .dspv2, | ||
| 1153 | .edsp, | ||
| 1154 | .high_registers, | ||
| 1155 | .hwdiv, | ||
| 1156 | .mp, | ||
| 1157 | .nvic, | ||
| 1158 | .trust, | ||
| 1159 | }), | ||
| 1160 | }; | ||
| 1161 | pub const ck803ehtr3 = CpuModel{ | ||
| 1162 | .name = "ck803ehtr3", | ||
| 1163 | .llvm_name = "ck803ehtr3", | ||
| 1164 | .features = featureSet(&[_]Feature{ | ||
| 1165 | .@"3e3r2", | ||
| 1166 | .@"3e3r3", | ||
| 1167 | .btst16, | ||
| 1168 | .ck803, | ||
| 1169 | .dsp1e2, | ||
| 1170 | .dspe60, | ||
| 1171 | .dspv2, | ||
| 1172 | .edsp, | ||
| 1173 | .high_registers, | ||
| 1174 | .hwdiv, | ||
| 1175 | .mp, | ||
| 1176 | .nvic, | ||
| 1177 | .trust, | ||
| 1178 | }), | ||
| 1179 | }; | ||
| 1180 | pub const ck803er1 = CpuModel{ | ||
| 1181 | .name = "ck803er1", | ||
| 1182 | .llvm_name = "ck803er1", | ||
| 1183 | .features = featureSet(&[_]Feature{ | ||
| 1184 | .@"3e3r1", | ||
| 1185 | .@"3e3r3", | ||
| 1186 | .btst16, | ||
| 1187 | .ck803, | ||
| 1188 | .dsp1e2, | ||
| 1189 | .dspe60, | ||
| 1190 | .dspv2, | ||
| 1191 | .edsp, | ||
| 1192 | .high_registers, | ||
| 1193 | .hwdiv, | ||
| 1194 | .mp, | ||
| 1195 | .nvic, | ||
| 1196 | .trust, | ||
| 1197 | }), | ||
| 1198 | }; | ||
| 1199 | pub const ck803er2 = CpuModel{ | ||
| 1200 | .name = "ck803er2", | ||
| 1201 | .llvm_name = "ck803er2", | ||
| 1202 | .features = featureSet(&[_]Feature{ | ||
| 1203 | .@"3e3r2", | ||
| 1204 | .@"3e3r3", | ||
| 1205 | .btst16, | ||
| 1206 | .ck803, | ||
| 1207 | .dsp1e2, | ||
| 1208 | .dspe60, | ||
| 1209 | .dspv2, | ||
| 1210 | .edsp, | ||
| 1211 | .high_registers, | ||
| 1212 | .hwdiv, | ||
| 1213 | .mp, | ||
| 1214 | .nvic, | ||
| 1215 | .trust, | ||
| 1216 | }), | ||
| 1217 | }; | ||
| 1218 | pub const ck803er3 = CpuModel{ | ||
| 1219 | .name = "ck803er3", | ||
| 1220 | .llvm_name = "ck803er3", | ||
| 1221 | .features = featureSet(&[_]Feature{ | ||
| 1222 | .@"3e3r2", | ||
| 1223 | .@"3e3r3", | ||
| 1224 | .btst16, | ||
| 1225 | .ck803, | ||
| 1226 | .dsp1e2, | ||
| 1227 | .dspe60, | ||
| 1228 | .dspv2, | ||
| 1229 | .edsp, | ||
| 1230 | .high_registers, | ||
| 1231 | .hwdiv, | ||
| 1232 | .mp, | ||
| 1233 | .nvic, | ||
| 1234 | .trust, | ||
| 1235 | }), | ||
| 1236 | }; | ||
| 1237 | pub const ck803et = CpuModel{ | ||
| 1238 | .name = "ck803et", | ||
| 1239 | .llvm_name = "ck803et", | ||
| 1240 | .features = featureSet(&[_]Feature{ | ||
| 1241 | .btst16, | ||
| 1242 | .ck803, | ||
| 1243 | .dsp1e2, | ||
| 1244 | .dspe60, | ||
| 1245 | .edsp, | ||
| 1246 | .hwdiv, | ||
| 1247 | .mp, | ||
| 1248 | .nvic, | ||
| 1249 | .trust, | ||
| 1250 | }), | ||
| 1251 | }; | ||
| 1252 | pub const ck803etr1 = CpuModel{ | ||
| 1253 | .name = "ck803etr1", | ||
| 1254 | .llvm_name = "ck803etr1", | ||
| 1255 | .features = featureSet(&[_]Feature{ | ||
| 1256 | .@"3e3r1", | ||
| 1257 | .@"3e3r3", | ||
| 1258 | .btst16, | ||
| 1259 | .ck803, | ||
| 1260 | .dsp1e2, | ||
| 1261 | .dspe60, | ||
| 1262 | .dspv2, | ||
| 1263 | .edsp, | ||
| 1264 | .high_registers, | ||
| 1265 | .hwdiv, | ||
| 1266 | .mp, | ||
| 1267 | .nvic, | ||
| 1268 | .trust, | ||
| 1269 | }), | ||
| 1270 | }; | ||
| 1271 | pub const ck803etr2 = CpuModel{ | ||
| 1272 | .name = "ck803etr2", | ||
| 1273 | .llvm_name = "ck803etr2", | ||
| 1274 | .features = featureSet(&[_]Feature{ | ||
| 1275 | .@"3e3r2", | ||
| 1276 | .@"3e3r3", | ||
| 1277 | .btst16, | ||
| 1278 | .ck803, | ||
| 1279 | .dsp1e2, | ||
| 1280 | .dspe60, | ||
| 1281 | .dspv2, | ||
| 1282 | .edsp, | ||
| 1283 | .high_registers, | ||
| 1284 | .hwdiv, | ||
| 1285 | .mp, | ||
| 1286 | .nvic, | ||
| 1287 | .trust, | ||
| 1288 | }), | ||
| 1289 | }; | ||
| 1290 | pub const ck803etr3 = CpuModel{ | ||
| 1291 | .name = "ck803etr3", | ||
| 1292 | .llvm_name = "ck803etr3", | ||
| 1293 | .features = featureSet(&[_]Feature{ | ||
| 1294 | .@"3e3r2", | ||
| 1295 | .@"3e3r3", | ||
| 1296 | .btst16, | ||
| 1297 | .ck803, | ||
| 1298 | .dsp1e2, | ||
| 1299 | .dspe60, | ||
| 1300 | .dspv2, | ||
| 1301 | .edsp, | ||
| 1302 | .high_registers, | ||
| 1303 | .hwdiv, | ||
| 1304 | .mp, | ||
| 1305 | .nvic, | ||
| 1306 | .trust, | ||
| 1307 | }), | ||
| 1308 | }; | ||
| 1309 | pub const ck803f = CpuModel{ | ||
| 1310 | .name = "ck803f", | ||
| 1311 | .llvm_name = "ck803f", | ||
| 1312 | .features = featureSet(&[_]Feature{ | ||
| 1313 | .btst16, | ||
| 1314 | .ck803, | ||
| 1315 | .float1e3, | ||
| 1316 | .floate1, | ||
| 1317 | .fpuv2_sf, | ||
| 1318 | .hwdiv, | ||
| 1319 | .mp, | ||
| 1320 | .nvic, | ||
| 1321 | .trust, | ||
| 1322 | }), | ||
| 1323 | }; | ||
| 1324 | pub const ck803fh = CpuModel{ | ||
| 1325 | .name = "ck803fh", | ||
| 1326 | .llvm_name = "ck803fh", | ||
| 1327 | .features = featureSet(&[_]Feature{ | ||
| 1328 | .btst16, | ||
| 1329 | .ck803, | ||
| 1330 | .float1e3, | ||
| 1331 | .floate1, | ||
| 1332 | .fpuv2_sf, | ||
| 1333 | .hwdiv, | ||
| 1334 | .mp, | ||
| 1335 | .nvic, | ||
| 1336 | .trust, | ||
| 1337 | }), | ||
| 1338 | }; | ||
| 1339 | pub const ck803fhr1 = CpuModel{ | ||
| 1340 | .name = "ck803fhr1", | ||
| 1341 | .llvm_name = "ck803fhr1", | ||
| 1342 | .features = featureSet(&[_]Feature{ | ||
| 1343 | .@"3e3r1", | ||
| 1344 | .@"3e3r3", | ||
| 1345 | .btst16, | ||
| 1346 | .ck803, | ||
| 1347 | .dspv2, | ||
| 1348 | .float1e3, | ||
| 1349 | .floate1, | ||
| 1350 | .fpuv2_sf, | ||
| 1351 | .hwdiv, | ||
| 1352 | .mp, | ||
| 1353 | .nvic, | ||
| 1354 | .trust, | ||
| 1355 | }), | ||
| 1356 | }; | ||
| 1357 | pub const ck803fhr2 = CpuModel{ | ||
| 1358 | .name = "ck803fhr2", | ||
| 1359 | .llvm_name = "ck803fhr2", | ||
| 1360 | .features = featureSet(&[_]Feature{ | ||
| 1361 | .@"3e3r2", | ||
| 1362 | .@"3e3r3", | ||
| 1363 | .btst16, | ||
| 1364 | .ck803, | ||
| 1365 | .dspv2, | ||
| 1366 | .float1e3, | ||
| 1367 | .floate1, | ||
| 1368 | .fpuv2_sf, | ||
| 1369 | .hwdiv, | ||
| 1370 | .mp, | ||
| 1371 | .nvic, | ||
| 1372 | .trust, | ||
| 1373 | }), | ||
| 1374 | }; | ||
| 1375 | pub const ck803fhr3 = CpuModel{ | ||
| 1376 | .name = "ck803fhr3", | ||
| 1377 | .llvm_name = "ck803fhr3", | ||
| 1378 | .features = featureSet(&[_]Feature{ | ||
| 1379 | .@"3e3r2", | ||
| 1380 | .@"3e3r3", | ||
| 1381 | .btst16, | ||
| 1382 | .ck803, | ||
| 1383 | .dspv2, | ||
| 1384 | .float1e3, | ||
| 1385 | .floate1, | ||
| 1386 | .fpuv2_sf, | ||
| 1387 | .hwdiv, | ||
| 1388 | .mp, | ||
| 1389 | .nvic, | ||
| 1390 | .trust, | ||
| 1391 | }), | ||
| 1392 | }; | ||
| 1393 | pub const ck803fr1 = CpuModel{ | ||
| 1394 | .name = "ck803fr1", | ||
| 1395 | .llvm_name = "ck803fr1", | ||
| 1396 | .features = featureSet(&[_]Feature{ | ||
| 1397 | .@"3e3r1", | ||
| 1398 | .@"3e3r3", | ||
| 1399 | .btst16, | ||
| 1400 | .ck803, | ||
| 1401 | .dspv2, | ||
| 1402 | .float1e3, | ||
| 1403 | .floate1, | ||
| 1404 | .fpuv2_sf, | ||
| 1405 | .hwdiv, | ||
| 1406 | .mp, | ||
| 1407 | .nvic, | ||
| 1408 | .trust, | ||
| 1409 | }), | ||
| 1410 | }; | ||
| 1411 | pub const ck803fr2 = CpuModel{ | ||
| 1412 | .name = "ck803fr2", | ||
| 1413 | .llvm_name = "ck803fr2", | ||
| 1414 | .features = featureSet(&[_]Feature{ | ||
| 1415 | .@"3e3r2", | ||
| 1416 | .@"3e3r3", | ||
| 1417 | .btst16, | ||
| 1418 | .ck803, | ||
| 1419 | .dspv2, | ||
| 1420 | .float1e3, | ||
| 1421 | .floate1, | ||
| 1422 | .fpuv2_sf, | ||
| 1423 | .hwdiv, | ||
| 1424 | .mp, | ||
| 1425 | .nvic, | ||
| 1426 | .trust, | ||
| 1427 | }), | ||
| 1428 | }; | ||
| 1429 | pub const ck803fr3 = CpuModel{ | ||
| 1430 | .name = "ck803fr3", | ||
| 1431 | .llvm_name = "ck803fr3", | ||
| 1432 | .features = featureSet(&[_]Feature{ | ||
| 1433 | .@"3e3r2", | ||
| 1434 | .@"3e3r3", | ||
| 1435 | .btst16, | ||
| 1436 | .ck803, | ||
| 1437 | .dspv2, | ||
| 1438 | .float1e3, | ||
| 1439 | .floate1, | ||
| 1440 | .fpuv2_sf, | ||
| 1441 | .hwdiv, | ||
| 1442 | .mp, | ||
| 1443 | .nvic, | ||
| 1444 | .trust, | ||
| 1445 | }), | ||
| 1446 | }; | ||
| 1447 | pub const ck803ft = CpuModel{ | ||
| 1448 | .name = "ck803ft", | ||
| 1449 | .llvm_name = "ck803ft", | ||
| 1450 | .features = featureSet(&[_]Feature{ | ||
| 1451 | .btst16, | ||
| 1452 | .ck803, | ||
| 1453 | .float1e3, | ||
| 1454 | .floate1, | ||
| 1455 | .fpuv2_sf, | ||
| 1456 | .hwdiv, | ||
| 1457 | .mp, | ||
| 1458 | .nvic, | ||
| 1459 | .trust, | ||
| 1460 | }), | ||
| 1461 | }; | ||
| 1462 | pub const ck803ftr1 = CpuModel{ | ||
| 1463 | .name = "ck803ftr1", | ||
| 1464 | .llvm_name = "ck803ftr1", | ||
| 1465 | .features = featureSet(&[_]Feature{ | ||
| 1466 | .@"3e3r1", | ||
| 1467 | .btst16, | ||
| 1468 | .ck803, | ||
| 1469 | .dspv2, | ||
| 1470 | .float1e3, | ||
| 1471 | .floate1, | ||
| 1472 | .fpuv2_sf, | ||
| 1473 | .hwdiv, | ||
| 1474 | .mp, | ||
| 1475 | .nvic, | ||
| 1476 | .trust, | ||
| 1477 | }), | ||
| 1478 | }; | ||
| 1479 | pub const ck803ftr2 = CpuModel{ | ||
| 1480 | .name = "ck803ftr2", | ||
| 1481 | .llvm_name = "ck803ftr2", | ||
| 1482 | .features = featureSet(&[_]Feature{ | ||
| 1483 | .@"3e3r2", | ||
| 1484 | .@"3e3r3", | ||
| 1485 | .btst16, | ||
| 1486 | .ck803, | ||
| 1487 | .dspv2, | ||
| 1488 | .float1e3, | ||
| 1489 | .floate1, | ||
| 1490 | .fpuv2_sf, | ||
| 1491 | .hwdiv, | ||
| 1492 | .mp, | ||
| 1493 | .nvic, | ||
| 1494 | .trust, | ||
| 1495 | }), | ||
| 1496 | }; | ||
| 1497 | pub const ck803ftr3 = CpuModel{ | ||
| 1498 | .name = "ck803ftr3", | ||
| 1499 | .llvm_name = "ck803ftr3", | ||
| 1500 | .features = featureSet(&[_]Feature{ | ||
| 1501 | .@"3e3r2", | ||
| 1502 | .@"3e3r3", | ||
| 1503 | .btst16, | ||
| 1504 | .ck803, | ||
| 1505 | .dspv2, | ||
| 1506 | .float1e3, | ||
| 1507 | .floate1, | ||
| 1508 | .fpuv2_sf, | ||
| 1509 | .hwdiv, | ||
| 1510 | .mp, | ||
| 1511 | .nvic, | ||
| 1512 | .trust, | ||
| 1513 | }), | ||
| 1514 | }; | ||
| 1515 | pub const ck803h = CpuModel{ | ||
| 1516 | .name = "ck803h", | ||
| 1517 | .llvm_name = "ck803h", | ||
| 1518 | .features = featureSet(&[_]Feature{ | ||
| 1519 | .btst16, | ||
| 1520 | .ck803, | ||
| 1521 | .hwdiv, | ||
| 1522 | .mp, | ||
| 1523 | .nvic, | ||
| 1524 | .trust, | ||
| 1525 | }), | ||
| 1526 | }; | ||
| 1527 | pub const ck803hr1 = CpuModel{ | ||
| 1528 | .name = "ck803hr1", | ||
| 1529 | .llvm_name = "ck803hr1", | ||
| 1530 | .features = featureSet(&[_]Feature{ | ||
| 1531 | .@"3e3r1", | ||
| 1532 | .@"3e3r3", | ||
| 1533 | .btst16, | ||
| 1534 | .ck803, | ||
| 1535 | .dspv2, | ||
| 1536 | .hwdiv, | ||
| 1537 | .mp, | ||
| 1538 | .nvic, | ||
| 1539 | .trust, | ||
| 1540 | }), | ||
| 1541 | }; | ||
| 1542 | pub const ck803hr2 = CpuModel{ | ||
| 1543 | .name = "ck803hr2", | ||
| 1544 | .llvm_name = "ck803hr2", | ||
| 1545 | .features = featureSet(&[_]Feature{ | ||
| 1546 | .@"3e3r2", | ||
| 1547 | .@"3e3r3", | ||
| 1548 | .btst16, | ||
| 1549 | .ck803, | ||
| 1550 | .dspv2, | ||
| 1551 | .hwdiv, | ||
| 1552 | .mp, | ||
| 1553 | .nvic, | ||
| 1554 | .trust, | ||
| 1555 | }), | ||
| 1556 | }; | ||
| 1557 | pub const ck803hr3 = CpuModel{ | ||
| 1558 | .name = "ck803hr3", | ||
| 1559 | .llvm_name = "ck803hr3", | ||
| 1560 | .features = featureSet(&[_]Feature{ | ||
| 1561 | .@"3e3r2", | ||
| 1562 | .@"3e3r3", | ||
| 1563 | .btst16, | ||
| 1564 | .ck803, | ||
| 1565 | .dspv2, | ||
| 1566 | .hwdiv, | ||
| 1567 | .mp, | ||
| 1568 | .nvic, | ||
| 1569 | .trust, | ||
| 1570 | }), | ||
| 1571 | }; | ||
| 1572 | pub const ck803ht = CpuModel{ | ||
| 1573 | .name = "ck803ht", | ||
| 1574 | .llvm_name = "ck803ht", | ||
| 1575 | .features = featureSet(&[_]Feature{ | ||
| 1576 | .btst16, | ||
| 1577 | .ck803, | ||
| 1578 | .hwdiv, | ||
| 1579 | .mp, | ||
| 1580 | .nvic, | ||
| 1581 | .trust, | ||
| 1582 | }), | ||
| 1583 | }; | ||
| 1584 | pub const ck803htr1 = CpuModel{ | ||
| 1585 | .name = "ck803htr1", | ||
| 1586 | .llvm_name = "ck803htr1", | ||
| 1587 | .features = featureSet(&[_]Feature{ | ||
| 1588 | .@"3e3r1", | ||
| 1589 | .@"3e3r3", | ||
| 1590 | .btst16, | ||
| 1591 | .ck803, | ||
| 1592 | .dspv2, | ||
| 1593 | .hwdiv, | ||
| 1594 | .mp, | ||
| 1595 | .nvic, | ||
| 1596 | .trust, | ||
| 1597 | }), | ||
| 1598 | }; | ||
| 1599 | pub const ck803htr2 = CpuModel{ | ||
| 1600 | .name = "ck803htr2", | ||
| 1601 | .llvm_name = "ck803htr2", | ||
| 1602 | .features = featureSet(&[_]Feature{ | ||
| 1603 | .@"3e3r2", | ||
| 1604 | .@"3e3r3", | ||
| 1605 | .btst16, | ||
| 1606 | .ck803, | ||
| 1607 | .dspv2, | ||
| 1608 | .hwdiv, | ||
| 1609 | .mp, | ||
| 1610 | .nvic, | ||
| 1611 | .trust, | ||
| 1612 | }), | ||
| 1613 | }; | ||
| 1614 | pub const ck803htr3 = CpuModel{ | ||
| 1615 | .name = "ck803htr3", | ||
| 1616 | .llvm_name = "ck803htr3", | ||
| 1617 | .features = featureSet(&[_]Feature{ | ||
| 1618 | .@"3e3r2", | ||
| 1619 | .@"3e3r3", | ||
| 1620 | .btst16, | ||
| 1621 | .ck803, | ||
| 1622 | .dspv2, | ||
| 1623 | .hwdiv, | ||
| 1624 | .mp, | ||
| 1625 | .nvic, | ||
| 1626 | .trust, | ||
| 1627 | }), | ||
| 1628 | }; | ||
| 1629 | pub const ck803r1 = CpuModel{ | ||
| 1630 | .name = "ck803r1", | ||
| 1631 | .llvm_name = "ck803r1", | ||
| 1632 | .features = featureSet(&[_]Feature{ | ||
| 1633 | .@"3e3r1", | ||
| 1634 | .@"3e3r3", | ||
| 1635 | .btst16, | ||
| 1636 | .ck803, | ||
| 1637 | .dspv2, | ||
| 1638 | .hwdiv, | ||
| 1639 | .mp, | ||
| 1640 | .nvic, | ||
| 1641 | .trust, | ||
| 1642 | }), | ||
| 1643 | }; | ||
| 1644 | pub const ck803r2 = CpuModel{ | ||
| 1645 | .name = "ck803r2", | ||
| 1646 | .llvm_name = "ck803r2", | ||
| 1647 | .features = featureSet(&[_]Feature{ | ||
| 1648 | .@"3e3r2", | ||
| 1649 | .@"3e3r3", | ||
| 1650 | .btst16, | ||
| 1651 | .ck803, | ||
| 1652 | .dspv2, | ||
| 1653 | .hwdiv, | ||
| 1654 | .mp, | ||
| 1655 | .nvic, | ||
| 1656 | .trust, | ||
| 1657 | }), | ||
| 1658 | }; | ||
| 1659 | pub const ck803r3 = CpuModel{ | ||
| 1660 | .name = "ck803r3", | ||
| 1661 | .llvm_name = "ck803r3", | ||
| 1662 | .features = featureSet(&[_]Feature{ | ||
| 1663 | .@"3e3r2", | ||
| 1664 | .@"3e3r3", | ||
| 1665 | .btst16, | ||
| 1666 | .ck803, | ||
| 1667 | .dspv2, | ||
| 1668 | .hwdiv, | ||
| 1669 | .mp, | ||
| 1670 | .nvic, | ||
| 1671 | .trust, | ||
| 1672 | }), | ||
| 1673 | }; | ||
| 1674 | pub const ck803s = CpuModel{ | ||
| 1675 | .name = "ck803s", | ||
| 1676 | .llvm_name = "ck803s", | ||
| 1677 | .features = featureSet(&[_]Feature{ | ||
| 1678 | .@"3e3r1", | ||
| 1679 | .btst16, | ||
| 1680 | .ck803, | ||
| 1681 | .ck803s, | ||
| 1682 | .hwdiv, | ||
| 1683 | .mp, | ||
| 1684 | .nvic, | ||
| 1685 | .trust, | ||
| 1686 | }), | ||
| 1687 | }; | ||
| 1688 | pub const ck803se = CpuModel{ | ||
| 1689 | .name = "ck803se", | ||
| 1690 | .llvm_name = "ck803se", | ||
| 1691 | .features = featureSet(&[_]Feature{ | ||
| 1692 | .@"3e3r1", | ||
| 1693 | .btst16, | ||
| 1694 | .ck803, | ||
| 1695 | .ck803s, | ||
| 1696 | .dsp1e2, | ||
| 1697 | .dspe60, | ||
| 1698 | .edsp, | ||
| 1699 | .hwdiv, | ||
| 1700 | .mp, | ||
| 1701 | .nvic, | ||
| 1702 | .trust, | ||
| 1703 | }), | ||
| 1704 | }; | ||
| 1705 | pub const ck803sef = CpuModel{ | ||
| 1706 | .name = "ck803sef", | ||
| 1707 | .llvm_name = "ck803sef", | ||
| 1708 | .features = featureSet(&[_]Feature{ | ||
| 1709 | .@"3e3r1", | ||
| 1710 | .btst16, | ||
| 1711 | .ck803, | ||
| 1712 | .ck803s, | ||
| 1713 | .dsp1e2, | ||
| 1714 | .dspe60, | ||
| 1715 | .edsp, | ||
| 1716 | .float1e3, | ||
| 1717 | .floate1, | ||
| 1718 | .fpuv2_sf, | ||
| 1719 | .hwdiv, | ||
| 1720 | .mp, | ||
| 1721 | .nvic, | ||
| 1722 | .trust, | ||
| 1723 | }), | ||
| 1724 | }; | ||
| 1725 | pub const ck803sefn = CpuModel{ | ||
| 1726 | .name = "ck803sefn", | ||
| 1727 | .llvm_name = "ck803sefn", | ||
| 1728 | .features = featureSet(&[_]Feature{ | ||
| 1729 | .@"3e3r1", | ||
| 1730 | .btst16, | ||
| 1731 | .ck803, | ||
| 1732 | .ck803s, | ||
| 1733 | .dsp1e2, | ||
| 1734 | .dsp_silan, | ||
| 1735 | .dspe60, | ||
| 1736 | .edsp, | ||
| 1737 | .float1e3, | ||
| 1738 | .floate1, | ||
| 1739 | .fpuv2_sf, | ||
| 1740 | .hwdiv, | ||
| 1741 | .mp, | ||
| 1742 | .nvic, | ||
| 1743 | .trust, | ||
| 1744 | }), | ||
| 1745 | }; | ||
| 1746 | pub const ck803sefnt = CpuModel{ | ||
| 1747 | .name = "ck803sefnt", | ||
| 1748 | .llvm_name = "ck803sefnt", | ||
| 1749 | .features = featureSet(&[_]Feature{ | ||
| 1750 | .@"3e3r1", | ||
| 1751 | .btst16, | ||
| 1752 | .ck803, | ||
| 1753 | .ck803s, | ||
| 1754 | .dsp1e2, | ||
| 1755 | .dsp_silan, | ||
| 1756 | .dspe60, | ||
| 1757 | .edsp, | ||
| 1758 | .float1e3, | ||
| 1759 | .floate1, | ||
| 1760 | .fpuv2_sf, | ||
| 1761 | .hwdiv, | ||
| 1762 | .mp, | ||
| 1763 | .nvic, | ||
| 1764 | .trust, | ||
| 1765 | }), | ||
| 1766 | }; | ||
| 1767 | pub const ck803seft = CpuModel{ | ||
| 1768 | .name = "ck803seft", | ||
| 1769 | .llvm_name = "ck803seft", | ||
| 1770 | .features = featureSet(&[_]Feature{ | ||
| 1771 | .@"3e3r1", | ||
| 1772 | .btst16, | ||
| 1773 | .ck803, | ||
| 1774 | .ck803s, | ||
| 1775 | .dsp1e2, | ||
| 1776 | .dspe60, | ||
| 1777 | .edsp, | ||
| 1778 | .float1e3, | ||
| 1779 | .floate1, | ||
| 1780 | .fpuv2_sf, | ||
| 1781 | .hwdiv, | ||
| 1782 | .mp, | ||
| 1783 | .nvic, | ||
| 1784 | .trust, | ||
| 1785 | }), | ||
| 1786 | }; | ||
| 1787 | pub const ck803sen = CpuModel{ | ||
| 1788 | .name = "ck803sen", | ||
| 1789 | .llvm_name = "ck803sen", | ||
| 1790 | .features = featureSet(&[_]Feature{ | ||
| 1791 | .@"3e3r1", | ||
| 1792 | .btst16, | ||
| 1793 | .ck803, | ||
| 1794 | .ck803s, | ||
| 1795 | .dsp1e2, | ||
| 1796 | .dsp_silan, | ||
| 1797 | .dspe60, | ||
| 1798 | .edsp, | ||
| 1799 | .hwdiv, | ||
| 1800 | .mp, | ||
| 1801 | .nvic, | ||
| 1802 | .trust, | ||
| 1803 | }), | ||
| 1804 | }; | ||
| 1805 | pub const ck803sf = CpuModel{ | ||
| 1806 | .name = "ck803sf", | ||
| 1807 | .llvm_name = "ck803sf", | ||
| 1808 | .features = featureSet(&[_]Feature{ | ||
| 1809 | .@"3e3r1", | ||
| 1810 | .btst16, | ||
| 1811 | .ck803, | ||
| 1812 | .ck803s, | ||
| 1813 | .float1e3, | ||
| 1814 | .floate1, | ||
| 1815 | .fpuv2_sf, | ||
| 1816 | .hwdiv, | ||
| 1817 | .mp, | ||
| 1818 | .nvic, | ||
| 1819 | .trust, | ||
| 1820 | }), | ||
| 1821 | }; | ||
| 1822 | pub const ck803sfn = CpuModel{ | ||
| 1823 | .name = "ck803sfn", | ||
| 1824 | .llvm_name = "ck803sfn", | ||
| 1825 | .features = featureSet(&[_]Feature{ | ||
| 1826 | .@"3e3r1", | ||
| 1827 | .btst16, | ||
| 1828 | .ck803, | ||
| 1829 | .ck803s, | ||
| 1830 | .dsp_silan, | ||
| 1831 | .float1e3, | ||
| 1832 | .floate1, | ||
| 1833 | .fpuv2_sf, | ||
| 1834 | .hwdiv, | ||
| 1835 | .mp, | ||
| 1836 | .nvic, | ||
| 1837 | .trust, | ||
| 1838 | }), | ||
| 1839 | }; | ||
| 1840 | pub const ck803sn = CpuModel{ | ||
| 1841 | .name = "ck803sn", | ||
| 1842 | .llvm_name = "ck803sn", | ||
| 1843 | .features = featureSet(&[_]Feature{ | ||
| 1844 | .@"3e3r1", | ||
| 1845 | .btst16, | ||
| 1846 | .ck803, | ||
| 1847 | .ck803s, | ||
| 1848 | .dsp_silan, | ||
| 1849 | .hwdiv, | ||
| 1850 | .mp, | ||
| 1851 | .nvic, | ||
| 1852 | .trust, | ||
| 1853 | }), | ||
| 1854 | }; | ||
| 1855 | pub const ck803snt = CpuModel{ | ||
| 1856 | .name = "ck803snt", | ||
| 1857 | .llvm_name = "ck803snt", | ||
| 1858 | .features = featureSet(&[_]Feature{ | ||
| 1859 | .@"3e3r1", | ||
| 1860 | .btst16, | ||
| 1861 | .ck803, | ||
| 1862 | .ck803s, | ||
| 1863 | .dsp_silan, | ||
| 1864 | .hwdiv, | ||
| 1865 | .mp, | ||
| 1866 | .nvic, | ||
| 1867 | .trust, | ||
| 1868 | }), | ||
| 1869 | }; | ||
| 1870 | pub const ck803st = CpuModel{ | ||
| 1871 | .name = "ck803st", | ||
| 1872 | .llvm_name = "ck803st", | ||
| 1873 | .features = featureSet(&[_]Feature{ | ||
| 1874 | .@"3e3r1", | ||
| 1875 | .btst16, | ||
| 1876 | .ck803, | ||
| 1877 | .ck803s, | ||
| 1878 | .hwdiv, | ||
| 1879 | .mp, | ||
| 1880 | .nvic, | ||
| 1881 | .trust, | ||
| 1882 | }), | ||
| 1883 | }; | ||
| 1884 | pub const ck803t = CpuModel{ | ||
| 1885 | .name = "ck803t", | ||
| 1886 | .llvm_name = "ck803t", | ||
| 1887 | .features = featureSet(&[_]Feature{ | ||
| 1888 | .btst16, | ||
| 1889 | .ck803, | ||
| 1890 | .hwdiv, | ||
| 1891 | .mp, | ||
| 1892 | .nvic, | ||
| 1893 | .trust, | ||
| 1894 | }), | ||
| 1895 | }; | ||
| 1896 | pub const ck803tr1 = CpuModel{ | ||
| 1897 | .name = "ck803tr1", | ||
| 1898 | .llvm_name = "ck803tr1", | ||
| 1899 | .features = featureSet(&[_]Feature{ | ||
| 1900 | .@"3e3r1", | ||
| 1901 | .@"3e3r3", | ||
| 1902 | .btst16, | ||
| 1903 | .ck803, | ||
| 1904 | .dspv2, | ||
| 1905 | .hwdiv, | ||
| 1906 | .mp, | ||
| 1907 | .nvic, | ||
| 1908 | .trust, | ||
| 1909 | }), | ||
| 1910 | }; | ||
| 1911 | pub const ck803tr2 = CpuModel{ | ||
| 1912 | .name = "ck803tr2", | ||
| 1913 | .llvm_name = "ck803tr2", | ||
| 1914 | .features = featureSet(&[_]Feature{ | ||
| 1915 | .@"3e3r2", | ||
| 1916 | .@"3e3r3", | ||
| 1917 | .btst16, | ||
| 1918 | .ck803, | ||
| 1919 | .dspv2, | ||
| 1920 | .hwdiv, | ||
| 1921 | .mp, | ||
| 1922 | .nvic, | ||
| 1923 | .trust, | ||
| 1924 | }), | ||
| 1925 | }; | ||
| 1926 | pub const ck803tr3 = CpuModel{ | ||
| 1927 | .name = "ck803tr3", | ||
| 1928 | .llvm_name = "ck803tr3", | ||
| 1929 | .features = featureSet(&[_]Feature{ | ||
| 1930 | .@"3e3r2", | ||
| 1931 | .@"3e3r3", | ||
| 1932 | .btst16, | ||
| 1933 | .ck803, | ||
| 1934 | .dspv2, | ||
| 1935 | .hwdiv, | ||
| 1936 | .mp, | ||
| 1937 | .nvic, | ||
| 1938 | .trust, | ||
| 1939 | }), | ||
| 1940 | }; | ||
| 1941 | pub const ck804 = CpuModel{ | ||
| 1942 | .name = "ck804", | ||
| 1943 | .llvm_name = "ck804", | ||
| 1944 | .features = featureSet(&[_]Feature{ | ||
| 1945 | .@"3e3r2", | ||
| 1946 | .@"3e3r3", | ||
| 1947 | .btst16, | ||
| 1948 | .ck803, | ||
| 1949 | .ck804, | ||
| 1950 | .hwdiv, | ||
| 1951 | .mp, | ||
| 1952 | .nvic, | ||
| 1953 | .trust, | ||
| 1954 | }), | ||
| 1955 | }; | ||
| 1956 | pub const ck804e = CpuModel{ | ||
| 1957 | .name = "ck804e", | ||
| 1958 | .llvm_name = "ck804e", | ||
| 1959 | .features = featureSet(&[_]Feature{ | ||
| 1960 | .@"3e3r2", | ||
| 1961 | .@"3e3r3", | ||
| 1962 | .btst16, | ||
| 1963 | .ck803, | ||
| 1964 | .ck804, | ||
| 1965 | .dspv2, | ||
| 1966 | .high_registers, | ||
| 1967 | .hwdiv, | ||
| 1968 | .mp, | ||
| 1969 | .nvic, | ||
| 1970 | .trust, | ||
| 1971 | }), | ||
| 1972 | }; | ||
| 1973 | pub const ck804ef = CpuModel{ | ||
| 1974 | .name = "ck804ef", | ||
| 1975 | .llvm_name = "ck804ef", | ||
| 1976 | .features = featureSet(&[_]Feature{ | ||
| 1977 | .@"3e3r2", | ||
| 1978 | .@"3e3r3", | ||
| 1979 | .btst16, | ||
| 1980 | .ck803, | ||
| 1981 | .ck804, | ||
| 1982 | .dspv2, | ||
| 1983 | .float1e3, | ||
| 1984 | .floate1, | ||
| 1985 | .fpuv2_sf, | ||
| 1986 | .high_registers, | ||
| 1987 | .hwdiv, | ||
| 1988 | .mp, | ||
| 1989 | .nvic, | ||
| 1990 | .trust, | ||
| 1991 | }), | ||
| 1992 | }; | ||
| 1993 | pub const ck804efh = CpuModel{ | ||
| 1994 | .name = "ck804efh", | ||
| 1995 | .llvm_name = "ck804efh", | ||
| 1996 | .features = featureSet(&[_]Feature{ | ||
| 1997 | .@"3e3r2", | ||
| 1998 | .@"3e3r3", | ||
| 1999 | .btst16, | ||
| 2000 | .ck803, | ||
| 2001 | .ck804, | ||
| 2002 | .dspv2, | ||
| 2003 | .float1e3, | ||
| 2004 | .floate1, | ||
| 2005 | .fpuv2_sf, | ||
| 2006 | .high_registers, | ||
| 2007 | .hwdiv, | ||
| 2008 | .mp, | ||
| 2009 | .nvic, | ||
| 2010 | .trust, | ||
| 2011 | }), | ||
| 2012 | }; | ||
| 2013 | pub const ck804efht = CpuModel{ | ||
| 2014 | .name = "ck804efht", | ||
| 2015 | .llvm_name = "ck804efht", | ||
| 2016 | .features = featureSet(&[_]Feature{ | ||
| 2017 | .@"3e3r2", | ||
| 2018 | .@"3e3r3", | ||
| 2019 | .btst16, | ||
| 2020 | .ck803, | ||
| 2021 | .ck804, | ||
| 2022 | .dspv2, | ||
| 2023 | .float1e3, | ||
| 2024 | .floate1, | ||
| 2025 | .fpuv2_sf, | ||
| 2026 | .high_registers, | ||
| 2027 | .hwdiv, | ||
| 2028 | .mp, | ||
| 2029 | .nvic, | ||
| 2030 | .trust, | ||
| 2031 | }), | ||
| 2032 | }; | ||
| 2033 | pub const ck804eft = CpuModel{ | ||
| 2034 | .name = "ck804eft", | ||
| 2035 | .llvm_name = "ck804eft", | ||
| 2036 | .features = featureSet(&[_]Feature{ | ||
| 2037 | .@"3e3r2", | ||
| 2038 | .@"3e3r3", | ||
| 2039 | .btst16, | ||
| 2040 | .ck803, | ||
| 2041 | .ck804, | ||
| 2042 | .dspv2, | ||
| 2043 | .float1e3, | ||
| 2044 | .floate1, | ||
| 2045 | .fpuv2_sf, | ||
| 2046 | .high_registers, | ||
| 2047 | .hwdiv, | ||
| 2048 | .mp, | ||
| 2049 | .nvic, | ||
| 2050 | .trust, | ||
| 2051 | }), | ||
| 2052 | }; | ||
| 2053 | pub const ck804eh = CpuModel{ | ||
| 2054 | .name = "ck804eh", | ||
| 2055 | .llvm_name = "ck804eh", | ||
| 2056 | .features = featureSet(&[_]Feature{ | ||
| 2057 | .@"3e3r2", | ||
| 2058 | .@"3e3r3", | ||
| 2059 | .btst16, | ||
| 2060 | .ck803, | ||
| 2061 | .ck804, | ||
| 2062 | .dspv2, | ||
| 2063 | .high_registers, | ||
| 2064 | .hwdiv, | ||
| 2065 | .mp, | ||
| 2066 | .nvic, | ||
| 2067 | .trust, | ||
| 2068 | }), | ||
| 2069 | }; | ||
| 2070 | pub const ck804eht = CpuModel{ | ||
| 2071 | .name = "ck804eht", | ||
| 2072 | .llvm_name = "ck804eht", | ||
| 2073 | .features = featureSet(&[_]Feature{ | ||
| 2074 | .@"3e3r2", | ||
| 2075 | .@"3e3r3", | ||
| 2076 | .btst16, | ||
| 2077 | .ck803, | ||
| 2078 | .ck804, | ||
| 2079 | .dspv2, | ||
| 2080 | .high_registers, | ||
| 2081 | .hwdiv, | ||
| 2082 | .mp, | ||
| 2083 | .nvic, | ||
| 2084 | .trust, | ||
| 2085 | }), | ||
| 2086 | }; | ||
| 2087 | pub const ck804et = CpuModel{ | ||
| 2088 | .name = "ck804et", | ||
| 2089 | .llvm_name = "ck804et", | ||
| 2090 | .features = featureSet(&[_]Feature{ | ||
| 2091 | .@"3e3r2", | ||
| 2092 | .@"3e3r3", | ||
| 2093 | .btst16, | ||
| 2094 | .ck803, | ||
| 2095 | .ck804, | ||
| 2096 | .dspv2, | ||
| 2097 | .high_registers, | ||
| 2098 | .hwdiv, | ||
| 2099 | .mp, | ||
| 2100 | .nvic, | ||
| 2101 | .trust, | ||
| 2102 | }), | ||
| 2103 | }; | ||
| 2104 | pub const ck804f = CpuModel{ | ||
| 2105 | .name = "ck804f", | ||
| 2106 | .llvm_name = "ck804f", | ||
| 2107 | .features = featureSet(&[_]Feature{ | ||
| 2108 | .@"3e3r2", | ||
| 2109 | .@"3e3r3", | ||
| 2110 | .btst16, | ||
| 2111 | .ck803, | ||
| 2112 | .ck804, | ||
| 2113 | .float1e3, | ||
| 2114 | .floate1, | ||
| 2115 | .fpuv2_sf, | ||
| 2116 | .hwdiv, | ||
| 2117 | .mp, | ||
| 2118 | .nvic, | ||
| 2119 | .trust, | ||
| 2120 | }), | ||
| 2121 | }; | ||
| 2122 | pub const ck804fh = CpuModel{ | ||
| 2123 | .name = "ck804fh", | ||
| 2124 | .llvm_name = "ck804fh", | ||
| 2125 | .features = featureSet(&[_]Feature{ | ||
| 2126 | .@"3e3r2", | ||
| 2127 | .@"3e3r3", | ||
| 2128 | .btst16, | ||
| 2129 | .ck803, | ||
| 2130 | .ck804, | ||
| 2131 | .float1e3, | ||
| 2132 | .floate1, | ||
| 2133 | .fpuv2_sf, | ||
| 2134 | .hwdiv, | ||
| 2135 | .mp, | ||
| 2136 | .nvic, | ||
| 2137 | .trust, | ||
| 2138 | }), | ||
| 2139 | }; | ||
| 2140 | pub const ck804ft = CpuModel{ | ||
| 2141 | .name = "ck804ft", | ||
| 2142 | .llvm_name = "ck804ft", | ||
| 2143 | .features = featureSet(&[_]Feature{ | ||
| 2144 | .@"3e3r2", | ||
| 2145 | .@"3e3r3", | ||
| 2146 | .btst16, | ||
| 2147 | .ck803, | ||
| 2148 | .ck804, | ||
| 2149 | .float1e3, | ||
| 2150 | .floate1, | ||
| 2151 | .fpuv2_sf, | ||
| 2152 | .hwdiv, | ||
| 2153 | .mp, | ||
| 2154 | .nvic, | ||
| 2155 | .trust, | ||
| 2156 | }), | ||
| 2157 | }; | ||
| 2158 | pub const ck804h = CpuModel{ | ||
| 2159 | .name = "ck804h", | ||
| 2160 | .llvm_name = "ck804h", | ||
| 2161 | .features = featureSet(&[_]Feature{ | ||
| 2162 | .@"3e3r2", | ||
| 2163 | .@"3e3r3", | ||
| 2164 | .btst16, | ||
| 2165 | .ck803, | ||
| 2166 | .ck804, | ||
| 2167 | .hwdiv, | ||
| 2168 | .mp, | ||
| 2169 | .nvic, | ||
| 2170 | .trust, | ||
| 2171 | }), | ||
| 2172 | }; | ||
| 2173 | pub const ck804ht = CpuModel{ | ||
| 2174 | .name = "ck804ht", | ||
| 2175 | .llvm_name = "ck804ht", | ||
| 2176 | .features = featureSet(&[_]Feature{ | ||
| 2177 | .@"3e3r2", | ||
| 2178 | .@"3e3r3", | ||
| 2179 | .btst16, | ||
| 2180 | .ck803, | ||
| 2181 | .ck804, | ||
| 2182 | .hwdiv, | ||
| 2183 | .mp, | ||
| 2184 | .nvic, | ||
| 2185 | .trust, | ||
| 2186 | }), | ||
| 2187 | }; | ||
| 2188 | pub const ck804t = CpuModel{ | ||
| 2189 | .name = "ck804t", | ||
| 2190 | .llvm_name = "ck804t", | ||
| 2191 | .features = featureSet(&[_]Feature{ | ||
| 2192 | .@"3e3r2", | ||
| 2193 | .@"3e3r3", | ||
| 2194 | .btst16, | ||
| 2195 | .ck803, | ||
| 2196 | .ck804, | ||
| 2197 | .hwdiv, | ||
| 2198 | .mp, | ||
| 2199 | .nvic, | ||
| 2200 | .trust, | ||
| 2201 | }), | ||
| 2202 | }; | ||
| 2203 | pub const ck805 = CpuModel{ | ||
| 2204 | .name = "ck805", | ||
| 2205 | .llvm_name = "ck805", | ||
| 2206 | .features = featureSet(&[_]Feature{ | ||
| 2207 | .@"3e3r2", | ||
| 2208 | .@"3e3r3", | ||
| 2209 | .btst16, | ||
| 2210 | .ck803, | ||
| 2211 | .ck805, | ||
| 2212 | .high_registers, | ||
| 2213 | .hwdiv, | ||
| 2214 | .mp, | ||
| 2215 | .nvic, | ||
| 2216 | .trust, | ||
| 2217 | .vdsp2e3, | ||
| 2218 | .vdspv2, | ||
| 2219 | }), | ||
| 2220 | }; | ||
| 2221 | pub const ck805e = CpuModel{ | ||
| 2222 | .name = "ck805e", | ||
| 2223 | .llvm_name = "ck805e", | ||
| 2224 | .features = featureSet(&[_]Feature{ | ||
| 2225 | .@"3e3r2", | ||
| 2226 | .@"3e3r3", | ||
| 2227 | .btst16, | ||
| 2228 | .ck803, | ||
| 2229 | .ck805, | ||
| 2230 | .dspv2, | ||
| 2231 | .high_registers, | ||
| 2232 | .hwdiv, | ||
| 2233 | .mp, | ||
| 2234 | .nvic, | ||
| 2235 | .trust, | ||
| 2236 | .vdsp2e3, | ||
| 2237 | .vdspv2, | ||
| 2238 | }), | ||
| 2239 | }; | ||
| 2240 | pub const ck805ef = CpuModel{ | ||
| 2241 | .name = "ck805ef", | ||
| 2242 | .llvm_name = "ck805ef", | ||
| 2243 | .features = featureSet(&[_]Feature{ | ||
| 2244 | .@"3e3r2", | ||
| 2245 | .@"3e3r3", | ||
| 2246 | .btst16, | ||
| 2247 | .ck803, | ||
| 2248 | .ck805, | ||
| 2249 | .dspv2, | ||
| 2250 | .float1e3, | ||
| 2251 | .floate1, | ||
| 2252 | .fpuv2_sf, | ||
| 2253 | .high_registers, | ||
| 2254 | .hwdiv, | ||
| 2255 | .mp, | ||
| 2256 | .nvic, | ||
| 2257 | .trust, | ||
| 2258 | .vdsp2e3, | ||
| 2259 | .vdspv2, | ||
| 2260 | }), | ||
| 2261 | }; | ||
| 2262 | pub const ck805eft = CpuModel{ | ||
| 2263 | .name = "ck805eft", | ||
| 2264 | .llvm_name = "ck805eft", | ||
| 2265 | .features = featureSet(&[_]Feature{ | ||
| 2266 | .@"3e3r2", | ||
| 2267 | .@"3e3r3", | ||
| 2268 | .btst16, | ||
| 2269 | .ck803, | ||
| 2270 | .ck805, | ||
| 2271 | .dspv2, | ||
| 2272 | .float1e3, | ||
| 2273 | .floate1, | ||
| 2274 | .fpuv2_sf, | ||
| 2275 | .high_registers, | ||
| 2276 | .hwdiv, | ||
| 2277 | .mp, | ||
| 2278 | .nvic, | ||
| 2279 | .trust, | ||
| 2280 | .vdsp2e3, | ||
| 2281 | .vdspv2, | ||
| 2282 | }), | ||
| 2283 | }; | ||
| 2284 | pub const ck805et = CpuModel{ | ||
| 2285 | .name = "ck805et", | ||
| 2286 | .llvm_name = "ck805et", | ||
| 2287 | .features = featureSet(&[_]Feature{ | ||
| 2288 | .@"3e3r2", | ||
| 2289 | .@"3e3r3", | ||
| 2290 | .btst16, | ||
| 2291 | .ck803, | ||
| 2292 | .ck805, | ||
| 2293 | .dspv2, | ||
| 2294 | .high_registers, | ||
| 2295 | .hwdiv, | ||
| 2296 | .mp, | ||
| 2297 | .nvic, | ||
| 2298 | .trust, | ||
| 2299 | .vdsp2e3, | ||
| 2300 | .vdspv2, | ||
| 2301 | }), | ||
| 2302 | }; | ||
| 2303 | pub const ck805f = CpuModel{ | ||
| 2304 | .name = "ck805f", | ||
| 2305 | .llvm_name = "ck805f", | ||
| 2306 | .features = featureSet(&[_]Feature{ | ||
| 2307 | .@"3e3r2", | ||
| 2308 | .@"3e3r3", | ||
| 2309 | .btst16, | ||
| 2310 | .ck803, | ||
| 2311 | .ck805, | ||
| 2312 | .float1e3, | ||
| 2313 | .floate1, | ||
| 2314 | .fpuv2_sf, | ||
| 2315 | .high_registers, | ||
| 2316 | .hwdiv, | ||
| 2317 | .mp, | ||
| 2318 | .nvic, | ||
| 2319 | .trust, | ||
| 2320 | .vdsp2e3, | ||
| 2321 | .vdspv2, | ||
| 2322 | }), | ||
| 2323 | }; | ||
| 2324 | pub const ck805ft = CpuModel{ | ||
| 2325 | .name = "ck805ft", | ||
| 2326 | .llvm_name = "ck805ft", | ||
| 2327 | .features = featureSet(&[_]Feature{ | ||
| 2328 | .@"3e3r2", | ||
| 2329 | .@"3e3r3", | ||
| 2330 | .btst16, | ||
| 2331 | .ck803, | ||
| 2332 | .ck805, | ||
| 2333 | .float1e3, | ||
| 2334 | .floate1, | ||
| 2335 | .fpuv2_sf, | ||
| 2336 | .high_registers, | ||
| 2337 | .hwdiv, | ||
| 2338 | .mp, | ||
| 2339 | .nvic, | ||
| 2340 | .trust, | ||
| 2341 | .vdsp2e3, | ||
| 2342 | .vdspv2, | ||
| 2343 | }), | ||
| 2344 | }; | ||
| 2345 | pub const ck805t = CpuModel{ | ||
| 2346 | .name = "ck805t", | ||
| 2347 | .llvm_name = "ck805t", | ||
| 2348 | .features = featureSet(&[_]Feature{ | ||
| 2349 | .@"3e3r2", | ||
| 2350 | .@"3e3r3", | ||
| 2351 | .btst16, | ||
| 2352 | .ck803, | ||
| 2353 | .ck805, | ||
| 2354 | .high_registers, | ||
| 2355 | .hwdiv, | ||
| 2356 | .mp, | ||
| 2357 | .nvic, | ||
| 2358 | .trust, | ||
| 2359 | .vdsp2e3, | ||
| 2360 | .vdspv2, | ||
| 2361 | }), | ||
| 2362 | }; | ||
| 2363 | pub const ck807 = CpuModel{ | ||
| 2364 | .name = "ck807", | ||
| 2365 | .llvm_name = "ck807", | ||
| 2366 | .features = featureSet(&[_]Feature{ | ||
| 2367 | .cache, | ||
| 2368 | .ck807, | ||
| 2369 | .dsp1e2, | ||
| 2370 | .dspe60, | ||
| 2371 | .edsp, | ||
| 2372 | .hard_tp, | ||
| 2373 | .high_registers, | ||
| 2374 | .hwdiv, | ||
| 2375 | .mp, | ||
| 2376 | .mp1e2, | ||
| 2377 | .nvic, | ||
| 2378 | .trust, | ||
| 2379 | }), | ||
| 2380 | }; | ||
| 2381 | pub const ck807e = CpuModel{ | ||
| 2382 | .name = "ck807e", | ||
| 2383 | .llvm_name = "ck807e", | ||
| 2384 | .features = featureSet(&[_]Feature{ | ||
| 2385 | .cache, | ||
| 2386 | .ck807, | ||
| 2387 | .dsp1e2, | ||
| 2388 | .dspe60, | ||
| 2389 | .edsp, | ||
| 2390 | .hard_tp, | ||
| 2391 | .high_registers, | ||
| 2392 | .hwdiv, | ||
| 2393 | .mp, | ||
| 2394 | .mp1e2, | ||
| 2395 | .nvic, | ||
| 2396 | .trust, | ||
| 2397 | }), | ||
| 2398 | }; | ||
| 2399 | pub const ck807ef = CpuModel{ | ||
| 2400 | .name = "ck807ef", | ||
| 2401 | .llvm_name = "ck807ef", | ||
| 2402 | .features = featureSet(&[_]Feature{ | ||
| 2403 | .cache, | ||
| 2404 | .ck807, | ||
| 2405 | .dsp1e2, | ||
| 2406 | .dspe60, | ||
| 2407 | .edsp, | ||
| 2408 | .fdivdu, | ||
| 2409 | .float1e2, | ||
| 2410 | .float1e3, | ||
| 2411 | .float3e4, | ||
| 2412 | .floate1, | ||
| 2413 | .fpuv2_df, | ||
| 2414 | .fpuv2_sf, | ||
| 2415 | .hard_tp, | ||
| 2416 | .high_registers, | ||
| 2417 | .hwdiv, | ||
| 2418 | .mp, | ||
| 2419 | .mp1e2, | ||
| 2420 | .nvic, | ||
| 2421 | .trust, | ||
| 2422 | }), | ||
| 2423 | }; | ||
| 2424 | pub const ck807f = CpuModel{ | ||
| 2425 | .name = "ck807f", | ||
| 2426 | .llvm_name = "ck807f", | ||
| 2427 | .features = featureSet(&[_]Feature{ | ||
| 2428 | .cache, | ||
| 2429 | .ck807, | ||
| 2430 | .dsp1e2, | ||
| 2431 | .dspe60, | ||
| 2432 | .edsp, | ||
| 2433 | .fdivdu, | ||
| 2434 | .float1e2, | ||
| 2435 | .float1e3, | ||
| 2436 | .float3e4, | ||
| 2437 | .floate1, | ||
| 2438 | .fpuv2_df, | ||
| 2439 | .fpuv2_sf, | ||
| 2440 | .hard_tp, | ||
| 2441 | .high_registers, | ||
| 2442 | .hwdiv, | ||
| 2443 | .mp, | ||
| 2444 | .mp1e2, | ||
| 2445 | .nvic, | ||
| 2446 | .trust, | ||
| 2447 | }), | ||
| 2448 | }; | ||
| 2449 | pub const ck810 = CpuModel{ | ||
| 2450 | .name = "ck810", | ||
| 2451 | .llvm_name = "ck810", | ||
| 2452 | .features = featureSet(&[_]Feature{ | ||
| 2453 | .@"7e10", | ||
| 2454 | .cache, | ||
| 2455 | .ck810, | ||
| 2456 | .dsp1e2, | ||
| 2457 | .dspe60, | ||
| 2458 | .edsp, | ||
| 2459 | .hard_tp, | ||
| 2460 | .high_registers, | ||
| 2461 | .hwdiv, | ||
| 2462 | .mp, | ||
| 2463 | .mp1e2, | ||
| 2464 | .nvic, | ||
| 2465 | .trust, | ||
| 2466 | }), | ||
| 2467 | }; | ||
| 2468 | pub const ck810e = CpuModel{ | ||
| 2469 | .name = "ck810e", | ||
| 2470 | .llvm_name = "ck810e", | ||
| 2471 | .features = featureSet(&[_]Feature{ | ||
| 2472 | .@"7e10", | ||
| 2473 | .cache, | ||
| 2474 | .ck810, | ||
| 2475 | .dsp1e2, | ||
| 2476 | .dspe60, | ||
| 2477 | .edsp, | ||
| 2478 | .hard_tp, | ||
| 2479 | .high_registers, | ||
| 2480 | .hwdiv, | ||
| 2481 | .mp, | ||
| 2482 | .mp1e2, | ||
| 2483 | .nvic, | ||
| 2484 | .trust, | ||
| 2485 | }), | ||
| 2486 | }; | ||
| 2487 | pub const ck810ef = CpuModel{ | ||
| 2488 | .name = "ck810ef", | ||
| 2489 | .llvm_name = "ck810ef", | ||
| 2490 | .features = featureSet(&[_]Feature{ | ||
| 2491 | .@"7e10", | ||
| 2492 | .cache, | ||
| 2493 | .ck810, | ||
| 2494 | .dsp1e2, | ||
| 2495 | .dspe60, | ||
| 2496 | .edsp, | ||
| 2497 | .fdivdu, | ||
| 2498 | .float1e2, | ||
| 2499 | .floate1, | ||
| 2500 | .fpuv2_df, | ||
| 2501 | .fpuv2_sf, | ||
| 2502 | .hard_tp, | ||
| 2503 | .high_registers, | ||
| 2504 | .hwdiv, | ||
| 2505 | .mp, | ||
| 2506 | .mp1e2, | ||
| 2507 | .nvic, | ||
| 2508 | .trust, | ||
| 2509 | }), | ||
| 2510 | }; | ||
| 2511 | pub const ck810eft = CpuModel{ | ||
| 2512 | .name = "ck810eft", | ||
| 2513 | .llvm_name = "ck810eft", | ||
| 2514 | .features = featureSet(&[_]Feature{ | ||
| 2515 | .@"7e10", | ||
| 2516 | .cache, | ||
| 2517 | .ck810, | ||
| 2518 | .dsp1e2, | ||
| 2519 | .dspe60, | ||
| 2520 | .edsp, | ||
| 2521 | .fdivdu, | ||
| 2522 | .float1e2, | ||
| 2523 | .floate1, | ||
| 2524 | .fpuv2_df, | ||
| 2525 | .fpuv2_sf, | ||
| 2526 | .hard_tp, | ||
| 2527 | .high_registers, | ||
| 2528 | .hwdiv, | ||
| 2529 | .mp, | ||
| 2530 | .mp1e2, | ||
| 2531 | .nvic, | ||
| 2532 | .trust, | ||
| 2533 | }), | ||
| 2534 | }; | ||
| 2535 | pub const ck810eftv = CpuModel{ | ||
| 2536 | .name = "ck810eftv", | ||
| 2537 | .llvm_name = "ck810eftv", | ||
| 2538 | .features = featureSet(&[_]Feature{ | ||
| 2539 | .@"7e10", | ||
| 2540 | .cache, | ||
| 2541 | .ck810, | ||
| 2542 | .ck810v, | ||
| 2543 | .dsp1e2, | ||
| 2544 | .dspe60, | ||
| 2545 | .edsp, | ||
| 2546 | .fdivdu, | ||
| 2547 | .float1e2, | ||
| 2548 | .floate1, | ||
| 2549 | .fpuv2_df, | ||
| 2550 | .fpuv2_sf, | ||
| 2551 | .hard_tp, | ||
| 2552 | .high_registers, | ||
| 2553 | .hwdiv, | ||
| 2554 | .mp, | ||
| 2555 | .mp1e2, | ||
| 2556 | .nvic, | ||
| 2557 | .trust, | ||
| 2558 | .vdspv1, | ||
| 2559 | }), | ||
| 2560 | }; | ||
| 2561 | pub const ck810efv = CpuModel{ | ||
| 2562 | .name = "ck810efv", | ||
| 2563 | .llvm_name = "ck810efv", | ||
| 2564 | .features = featureSet(&[_]Feature{ | ||
| 2565 | .@"7e10", | ||
| 2566 | .cache, | ||
| 2567 | .ck810, | ||
| 2568 | .ck810v, | ||
| 2569 | .dsp1e2, | ||
| 2570 | .dspe60, | ||
| 2571 | .edsp, | ||
| 2572 | .fdivdu, | ||
| 2573 | .float1e2, | ||
| 2574 | .floate1, | ||
| 2575 | .fpuv2_df, | ||
| 2576 | .fpuv2_sf, | ||
| 2577 | .hard_tp, | ||
| 2578 | .high_registers, | ||
| 2579 | .hwdiv, | ||
| 2580 | .mp, | ||
| 2581 | .mp1e2, | ||
| 2582 | .nvic, | ||
| 2583 | .trust, | ||
| 2584 | .vdspv1, | ||
| 2585 | }), | ||
| 2586 | }; | ||
| 2587 | pub const ck810et = CpuModel{ | ||
| 2588 | .name = "ck810et", | ||
| 2589 | .llvm_name = "ck810et", | ||
| 2590 | .features = featureSet(&[_]Feature{ | ||
| 2591 | .@"7e10", | ||
| 2592 | .cache, | ||
| 2593 | .ck810, | ||
| 2594 | .dsp1e2, | ||
| 2595 | .dspe60, | ||
| 2596 | .edsp, | ||
| 2597 | .hard_tp, | ||
| 2598 | .high_registers, | ||
| 2599 | .hwdiv, | ||
| 2600 | .mp, | ||
| 2601 | .mp1e2, | ||
| 2602 | .nvic, | ||
| 2603 | .trust, | ||
| 2604 | }), | ||
| 2605 | }; | ||
| 2606 | pub const ck810etv = CpuModel{ | ||
| 2607 | .name = "ck810etv", | ||
| 2608 | .llvm_name = "ck810etv", | ||
| 2609 | .features = featureSet(&[_]Feature{ | ||
| 2610 | .@"7e10", | ||
| 2611 | .cache, | ||
| 2612 | .ck810, | ||
| 2613 | .ck810v, | ||
| 2614 | .dsp1e2, | ||
| 2615 | .dspe60, | ||
| 2616 | .edsp, | ||
| 2617 | .hard_tp, | ||
| 2618 | .high_registers, | ||
| 2619 | .hwdiv, | ||
| 2620 | .mp, | ||
| 2621 | .mp1e2, | ||
| 2622 | .nvic, | ||
| 2623 | .trust, | ||
| 2624 | .vdspv1, | ||
| 2625 | }), | ||
| 2626 | }; | ||
| 2627 | pub const ck810ev = CpuModel{ | ||
| 2628 | .name = "ck810ev", | ||
| 2629 | .llvm_name = "ck810ev", | ||
| 2630 | .features = featureSet(&[_]Feature{ | ||
| 2631 | .@"7e10", | ||
| 2632 | .cache, | ||
| 2633 | .ck810, | ||
| 2634 | .ck810v, | ||
| 2635 | .dsp1e2, | ||
| 2636 | .dspe60, | ||
| 2637 | .edsp, | ||
| 2638 | .hard_tp, | ||
| 2639 | .high_registers, | ||
| 2640 | .hwdiv, | ||
| 2641 | .mp, | ||
| 2642 | .mp1e2, | ||
| 2643 | .nvic, | ||
| 2644 | .trust, | ||
| 2645 | .vdspv1, | ||
| 2646 | }), | ||
| 2647 | }; | ||
| 2648 | pub const ck810f = CpuModel{ | ||
| 2649 | .name = "ck810f", | ||
| 2650 | .llvm_name = "ck810f", | ||
| 2651 | .features = featureSet(&[_]Feature{ | ||
| 2652 | .@"7e10", | ||
| 2653 | .cache, | ||
| 2654 | .ck810, | ||
| 2655 | .dsp1e2, | ||
| 2656 | .dspe60, | ||
| 2657 | .edsp, | ||
| 2658 | .fdivdu, | ||
| 2659 | .float1e2, | ||
| 2660 | .floate1, | ||
| 2661 | .fpuv2_df, | ||
| 2662 | .fpuv2_sf, | ||
| 2663 | .hard_tp, | ||
| 2664 | .high_registers, | ||
| 2665 | .hwdiv, | ||
| 2666 | .mp, | ||
| 2667 | .mp1e2, | ||
| 2668 | .nvic, | ||
| 2669 | .trust, | ||
| 2670 | }), | ||
| 2671 | }; | ||
| 2672 | pub const ck810ft = CpuModel{ | ||
| 2673 | .name = "ck810ft", | ||
| 2674 | .llvm_name = "ck810ft", | ||
| 2675 | .features = featureSet(&[_]Feature{ | ||
| 2676 | .@"7e10", | ||
| 2677 | .cache, | ||
| 2678 | .ck810, | ||
| 2679 | .dsp1e2, | ||
| 2680 | .dspe60, | ||
| 2681 | .edsp, | ||
| 2682 | .fdivdu, | ||
| 2683 | .float1e2, | ||
| 2684 | .floate1, | ||
| 2685 | .fpuv2_df, | ||
| 2686 | .fpuv2_sf, | ||
| 2687 | .hard_tp, | ||
| 2688 | .high_registers, | ||
| 2689 | .hwdiv, | ||
| 2690 | .mp, | ||
| 2691 | .mp1e2, | ||
| 2692 | .nvic, | ||
| 2693 | .trust, | ||
| 2694 | }), | ||
| 2695 | }; | ||
| 2696 | pub const ck810ftv = CpuModel{ | ||
| 2697 | .name = "ck810ftv", | ||
| 2698 | .llvm_name = "ck810ftv", | ||
| 2699 | .features = featureSet(&[_]Feature{ | ||
| 2700 | .@"7e10", | ||
| 2701 | .cache, | ||
| 2702 | .ck810, | ||
| 2703 | .ck810v, | ||
| 2704 | .dsp1e2, | ||
| 2705 | .dspe60, | ||
| 2706 | .edsp, | ||
| 2707 | .fdivdu, | ||
| 2708 | .float1e2, | ||
| 2709 | .floate1, | ||
| 2710 | .fpuv2_df, | ||
| 2711 | .fpuv2_sf, | ||
| 2712 | .hard_tp, | ||
| 2713 | .high_registers, | ||
| 2714 | .hwdiv, | ||
| 2715 | .mp, | ||
| 2716 | .mp1e2, | ||
| 2717 | .nvic, | ||
| 2718 | .trust, | ||
| 2719 | .vdspv1, | ||
| 2720 | }), | ||
| 2721 | }; | ||
| 2722 | pub const ck810fv = CpuModel{ | ||
| 2723 | .name = "ck810fv", | ||
| 2724 | .llvm_name = "ck810fv", | ||
| 2725 | .features = featureSet(&[_]Feature{ | ||
| 2726 | .@"7e10", | ||
| 2727 | .cache, | ||
| 2728 | .ck810, | ||
| 2729 | .ck810v, | ||
| 2730 | .dsp1e2, | ||
| 2731 | .dspe60, | ||
| 2732 | .edsp, | ||
| 2733 | .fdivdu, | ||
| 2734 | .float1e2, | ||
| 2735 | .floate1, | ||
| 2736 | .fpuv2_df, | ||
| 2737 | .fpuv2_sf, | ||
| 2738 | .hard_tp, | ||
| 2739 | .high_registers, | ||
| 2740 | .hwdiv, | ||
| 2741 | .mp, | ||
| 2742 | .mp1e2, | ||
| 2743 | .nvic, | ||
| 2744 | .trust, | ||
| 2745 | .vdspv1, | ||
| 2746 | }), | ||
| 2747 | }; | ||
| 2748 | pub const ck810t = CpuModel{ | ||
| 2749 | .name = "ck810t", | ||
| 2750 | .llvm_name = "ck810t", | ||
| 2751 | .features = featureSet(&[_]Feature{ | ||
| 2752 | .@"7e10", | ||
| 2753 | .cache, | ||
| 2754 | .ck810, | ||
| 2755 | .dsp1e2, | ||
| 2756 | .dspe60, | ||
| 2757 | .edsp, | ||
| 2758 | .hard_tp, | ||
| 2759 | .high_registers, | ||
| 2760 | .hwdiv, | ||
| 2761 | .mp, | ||
| 2762 | .mp1e2, | ||
| 2763 | .nvic, | ||
| 2764 | .trust, | ||
| 2765 | }), | ||
| 2766 | }; | ||
| 2767 | pub const ck810tv = CpuModel{ | ||
| 2768 | .name = "ck810tv", | ||
| 2769 | .llvm_name = "ck810tv", | ||
| 2770 | .features = featureSet(&[_]Feature{ | ||
| 2771 | .@"7e10", | ||
| 2772 | .cache, | ||
| 2773 | .ck810, | ||
| 2774 | .ck810v, | ||
| 2775 | .dsp1e2, | ||
| 2776 | .dspe60, | ||
| 2777 | .edsp, | ||
| 2778 | .hard_tp, | ||
| 2779 | .high_registers, | ||
| 2780 | .hwdiv, | ||
| 2781 | .mp, | ||
| 2782 | .mp1e2, | ||
| 2783 | .nvic, | ||
| 2784 | .trust, | ||
| 2785 | .vdspv1, | ||
| 2786 | }), | ||
| 2787 | }; | ||
| 2788 | pub const ck810v = CpuModel{ | ||
| 2789 | .name = "ck810v", | ||
| 2790 | .llvm_name = "ck810v", | ||
| 2791 | .features = featureSet(&[_]Feature{ | ||
| 2792 | .@"7e10", | ||
| 2793 | .cache, | ||
| 2794 | .ck810, | ||
| 2795 | .ck810v, | ||
| 2796 | .dsp1e2, | ||
| 2797 | .dspe60, | ||
| 2798 | .edsp, | ||
| 2799 | .hard_tp, | ||
| 2800 | .high_registers, | ||
| 2801 | .hwdiv, | ||
| 2802 | .mp, | ||
| 2803 | .mp1e2, | ||
| 2804 | .nvic, | ||
| 2805 | .trust, | ||
| 2806 | .vdspv1, | ||
| 2807 | }), | ||
| 2808 | }; | ||
| 2809 | pub const ck860 = CpuModel{ | ||
| 2810 | .name = "ck860", | ||
| 2811 | .llvm_name = "ck860", | ||
| 2812 | .features = featureSet(&[_]Feature{ | ||
| 2813 | .@"10e60", | ||
| 2814 | .@"3e3r2", | ||
| 2815 | .@"3e3r3", | ||
| 2816 | .btst16, | ||
| 2817 | .cache, | ||
| 2818 | .ck860, | ||
| 2819 | .dspe60, | ||
| 2820 | .hard_tp, | ||
| 2821 | .high_registers, | ||
| 2822 | .hwdiv, | ||
| 2823 | .mp, | ||
| 2824 | .mp1e2, | ||
| 2825 | .nvic, | ||
| 2826 | .trust, | ||
| 2827 | }), | ||
| 2828 | }; | ||
| 2829 | pub const ck860f = CpuModel{ | ||
| 2830 | .name = "ck860f", | ||
| 2831 | .llvm_name = "ck860f", | ||
| 2832 | .features = featureSet(&[_]Feature{ | ||
| 2833 | .@"10e60", | ||
| 2834 | .@"3e3r2", | ||
| 2835 | .@"3e3r3", | ||
| 2836 | .btst16, | ||
| 2837 | .cache, | ||
| 2838 | .ck860, | ||
| 2839 | .dspe60, | ||
| 2840 | .float7e60, | ||
| 2841 | .fpuv3_df, | ||
| 2842 | .fpuv3_hf, | ||
| 2843 | .fpuv3_hi, | ||
| 2844 | .fpuv3_sf, | ||
| 2845 | .hard_tp, | ||
| 2846 | .high_registers, | ||
| 2847 | .hwdiv, | ||
| 2848 | .mp, | ||
| 2849 | .mp1e2, | ||
| 2850 | .nvic, | ||
| 2851 | .trust, | ||
| 2852 | }), | ||
| 2853 | }; | ||
| 2854 | pub const ck860fv = CpuModel{ | ||
| 2855 | .name = "ck860fv", | ||
| 2856 | .llvm_name = "ck860fv", | ||
| 2857 | .features = featureSet(&[_]Feature{ | ||
| 2858 | .@"10e60", | ||
| 2859 | .@"3e3r2", | ||
| 2860 | .@"3e3r3", | ||
| 2861 | .btst16, | ||
| 2862 | .cache, | ||
| 2863 | .ck860, | ||
| 2864 | .ck860v, | ||
| 2865 | .dspe60, | ||
| 2866 | .float7e60, | ||
| 2867 | .fpuv3_df, | ||
| 2868 | .fpuv3_hf, | ||
| 2869 | .fpuv3_hi, | ||
| 2870 | .fpuv3_sf, | ||
| 2871 | .hard_tp, | ||
| 2872 | .high_registers, | ||
| 2873 | .hwdiv, | ||
| 2874 | .mp, | ||
| 2875 | .mp1e2, | ||
| 2876 | .nvic, | ||
| 2877 | .trust, | ||
| 2878 | .vdsp2e60f, | ||
| 2879 | .vdspv2, | ||
| 2880 | }), | ||
| 2881 | }; | ||
| 2882 | pub const ck860v = CpuModel{ | ||
| 2883 | .name = "ck860v", | ||
| 2884 | .llvm_name = "ck860v", | ||
| 2885 | .features = featureSet(&[_]Feature{ | ||
| 2886 | .@"10e60", | ||
| 2887 | .@"3e3r2", | ||
| 2888 | .@"3e3r3", | ||
| 2889 | .btst16, | ||
| 2890 | .cache, | ||
| 2891 | .ck860, | ||
| 2892 | .ck860v, | ||
| 2893 | .dspe60, | ||
| 2894 | .hard_tp, | ||
| 2895 | .high_registers, | ||
| 2896 | .hwdiv, | ||
| 2897 | .mp, | ||
| 2898 | .mp1e2, | ||
| 2899 | .nvic, | ||
| 2900 | .trust, | ||
| 2901 | .vdsp2e60f, | ||
| 2902 | .vdspv2, | ||
| 2903 | }), | ||
| 2904 | }; | ||
| 2905 | pub const e801 = CpuModel{ | ||
| 2906 | .name = "e801", | ||
| 2907 | .llvm_name = "e801", | ||
| 2908 | .features = featureSet(&[_]Feature{ | ||
| 2909 | .btst16, | ||
| 2910 | .ck801, | ||
| 2911 | .e1, | ||
| 2912 | .trust, | ||
| 2913 | }), | ||
| 2914 | }; | ||
| 2915 | pub const e802 = CpuModel{ | ||
| 2916 | .name = "e802", | ||
| 2917 | .llvm_name = "e802", | ||
| 2918 | .features = featureSet(&[_]Feature{ | ||
| 2919 | .btst16, | ||
| 2920 | .ck802, | ||
| 2921 | .e2, | ||
| 2922 | .nvic, | ||
| 2923 | .trust, | ||
| 2924 | }), | ||
| 2925 | }; | ||
| 2926 | pub const e802t = CpuModel{ | ||
| 2927 | .name = "e802t", | ||
| 2928 | .llvm_name = "e802t", | ||
| 2929 | .features = featureSet(&[_]Feature{ | ||
| 2930 | .btst16, | ||
| 2931 | .ck802, | ||
| 2932 | .e2, | ||
| 2933 | .nvic, | ||
| 2934 | .trust, | ||
| 2935 | }), | ||
| 2936 | }; | ||
| 2937 | pub const e803 = CpuModel{ | ||
| 2938 | .name = "e803", | ||
| 2939 | .llvm_name = "e803", | ||
| 2940 | .features = featureSet(&[_]Feature{ | ||
| 2941 | .@"3e3r2", | ||
| 2942 | .@"3e3r3", | ||
| 2943 | .btst16, | ||
| 2944 | .ck803, | ||
| 2945 | .hwdiv, | ||
| 2946 | .mp, | ||
| 2947 | .nvic, | ||
| 2948 | .trust, | ||
| 2949 | }), | ||
| 2950 | }; | ||
| 2951 | pub const e803t = CpuModel{ | ||
| 2952 | .name = "e803t", | ||
| 2953 | .llvm_name = "e803t", | ||
| 2954 | .features = featureSet(&[_]Feature{ | ||
| 2955 | .@"3e3r2", | ||
| 2956 | .@"3e3r3", | ||
| 2957 | .btst16, | ||
| 2958 | .ck803, | ||
| 2959 | .hwdiv, | ||
| 2960 | .mp, | ||
| 2961 | .nvic, | ||
| 2962 | .trust, | ||
| 2963 | }), | ||
| 2964 | }; | ||
| 2965 | pub const e804d = CpuModel{ | ||
| 2966 | .name = "e804d", | ||
| 2967 | .llvm_name = "e804d", | ||
| 2968 | .features = featureSet(&[_]Feature{ | ||
| 2969 | .@"3e3r2", | ||
| 2970 | .@"3e3r3", | ||
| 2971 | .btst16, | ||
| 2972 | .ck803, | ||
| 2973 | .ck804, | ||
| 2974 | .dspv2, | ||
| 2975 | .high_registers, | ||
| 2976 | .hwdiv, | ||
| 2977 | .mp, | ||
| 2978 | .nvic, | ||
| 2979 | .trust, | ||
| 2980 | }), | ||
| 2981 | }; | ||
| 2982 | pub const e804df = CpuModel{ | ||
| 2983 | .name = "e804df", | ||
| 2984 | .llvm_name = "e804df", | ||
| 2985 | .features = featureSet(&[_]Feature{ | ||
| 2986 | .@"3e3r2", | ||
| 2987 | .@"3e3r3", | ||
| 2988 | .btst16, | ||
| 2989 | .ck803, | ||
| 2990 | .ck804, | ||
| 2991 | .dspv2, | ||
| 2992 | .float1e3, | ||
| 2993 | .floate1, | ||
| 2994 | .fpuv2_sf, | ||
| 2995 | .high_registers, | ||
| 2996 | .hwdiv, | ||
| 2997 | .mp, | ||
| 2998 | .nvic, | ||
| 2999 | .trust, | ||
| 3000 | }), | ||
| 3001 | }; | ||
| 3002 | pub const e804dft = CpuModel{ | ||
| 3003 | .name = "e804dft", | ||
| 3004 | .llvm_name = "e804dft", | ||
| 3005 | .features = featureSet(&[_]Feature{ | ||
| 3006 | .@"3e3r2", | ||
| 3007 | .@"3e3r3", | ||
| 3008 | .btst16, | ||
| 3009 | .ck803, | ||
| 3010 | .ck804, | ||
| 3011 | .dspv2, | ||
| 3012 | .float1e3, | ||
| 3013 | .floate1, | ||
| 3014 | .fpuv2_sf, | ||
| 3015 | .high_registers, | ||
| 3016 | .hwdiv, | ||
| 3017 | .mp, | ||
| 3018 | .nvic, | ||
| 3019 | .trust, | ||
| 3020 | }), | ||
| 3021 | }; | ||
| 3022 | pub const e804dt = CpuModel{ | ||
| 3023 | .name = "e804dt", | ||
| 3024 | .llvm_name = "e804dt", | ||
| 3025 | .features = featureSet(&[_]Feature{ | ||
| 3026 | .@"3e3r2", | ||
| 3027 | .@"3e3r3", | ||
| 3028 | .btst16, | ||
| 3029 | .ck803, | ||
| 3030 | .ck804, | ||
| 3031 | .dspv2, | ||
| 3032 | .high_registers, | ||
| 3033 | .hwdiv, | ||
| 3034 | .mp, | ||
| 3035 | .nvic, | ||
| 3036 | .trust, | ||
| 3037 | }), | ||
| 3038 | }; | ||
| 3039 | pub const e804f = CpuModel{ | ||
| 3040 | .name = "e804f", | ||
| 3041 | .llvm_name = "e804f", | ||
| 3042 | .features = featureSet(&[_]Feature{ | ||
| 3043 | .@"3e3r2", | ||
| 3044 | .@"3e3r3", | ||
| 3045 | .btst16, | ||
| 3046 | .ck803, | ||
| 3047 | .ck804, | ||
| 3048 | .float1e3, | ||
| 3049 | .floate1, | ||
| 3050 | .fpuv2_sf, | ||
| 3051 | .hwdiv, | ||
| 3052 | .mp, | ||
| 3053 | .nvic, | ||
| 3054 | .trust, | ||
| 3055 | }), | ||
| 3056 | }; | ||
| 3057 | pub const e804ft = CpuModel{ | ||
| 3058 | .name = "e804ft", | ||
| 3059 | .llvm_name = "e804ft", | ||
| 3060 | .features = featureSet(&[_]Feature{ | ||
| 3061 | .@"3e3r2", | ||
| 3062 | .@"3e3r3", | ||
| 3063 | .btst16, | ||
| 3064 | .ck803, | ||
| 3065 | .ck804, | ||
| 3066 | .float1e3, | ||
| 3067 | .floate1, | ||
| 3068 | .fpuv2_sf, | ||
| 3069 | .hwdiv, | ||
| 3070 | .mp, | ||
| 3071 | .nvic, | ||
| 3072 | .trust, | ||
| 3073 | }), | ||
| 3074 | }; | ||
| 3075 | pub const generic = CpuModel{ | ||
| 3076 | .name = "generic", | ||
| 3077 | .llvm_name = "generic", | ||
| 3078 | .features = featureSet(&[_]Feature{ | ||
| 3079 | .btst16, | ||
| 3080 | }), | ||
| 3081 | }; | ||
| 3082 | pub const @"i805" = CpuModel{ | ||
| 3083 | .name = "i805", | ||
| 3084 | .llvm_name = "i805", | ||
| 3085 | .features = featureSet(&[_]Feature{ | ||
| 3086 | .@"3e3r2", | ||
| 3087 | .@"3e3r3", | ||
| 3088 | .btst16, | ||
| 3089 | .ck803, | ||
| 3090 | .ck805, | ||
| 3091 | .high_registers, | ||
| 3092 | .hwdiv, | ||
| 3093 | .mp, | ||
| 3094 | .nvic, | ||
| 3095 | .trust, | ||
| 3096 | .vdsp2e3, | ||
| 3097 | .vdspv2, | ||
| 3098 | }), | ||
| 3099 | }; | ||
| 3100 | pub const i805f = CpuModel{ | ||
| 3101 | .name = "i805f", | ||
| 3102 | .llvm_name = "i805f", | ||
| 3103 | .features = featureSet(&[_]Feature{ | ||
| 3104 | .@"3e3r2", | ||
| 3105 | .@"3e3r3", | ||
| 3106 | .btst16, | ||
| 3107 | .ck803, | ||
| 3108 | .ck805, | ||
| 3109 | .float1e3, | ||
| 3110 | .floate1, | ||
| 3111 | .fpuv2_sf, | ||
| 3112 | .high_registers, | ||
| 3113 | .hwdiv, | ||
| 3114 | .mp, | ||
| 3115 | .nvic, | ||
| 3116 | .trust, | ||
| 3117 | .vdsp2e3, | ||
| 3118 | .vdspv2, | ||
| 3119 | }), | ||
| 3120 | }; | ||
| 3121 | pub const r807 = CpuModel{ | ||
| 3122 | .name = "r807", | ||
| 3123 | .llvm_name = "r807", | ||
| 3124 | .features = featureSet(&[_]Feature{ | ||
| 3125 | .cache, | ||
| 3126 | .ck807, | ||
| 3127 | .dsp1e2, | ||
| 3128 | .dspe60, | ||
| 3129 | .edsp, | ||
| 3130 | .hard_tp, | ||
| 3131 | .high_registers, | ||
| 3132 | .hwdiv, | ||
| 3133 | .mp, | ||
| 3134 | .mp1e2, | ||
| 3135 | .nvic, | ||
| 3136 | .trust, | ||
| 3137 | }), | ||
| 3138 | }; | ||
| 3139 | pub const r807f = CpuModel{ | ||
| 3140 | .name = "r807f", | ||
| 3141 | .llvm_name = "r807f", | ||
| 3142 | .features = featureSet(&[_]Feature{ | ||
| 3143 | .cache, | ||
| 3144 | .ck807, | ||
| 3145 | .dsp1e2, | ||
| 3146 | .dspe60, | ||
| 3147 | .edsp, | ||
| 3148 | .fdivdu, | ||
| 3149 | .float1e2, | ||
| 3150 | .float1e3, | ||
| 3151 | .float3e4, | ||
| 3152 | .floate1, | ||
| 3153 | .fpuv2_df, | ||
| 3154 | .fpuv2_sf, | ||
| 3155 | .hard_tp, | ||
| 3156 | .high_registers, | ||
| 3157 | .hwdiv, | ||
| 3158 | .mp, | ||
| 3159 | .mp1e2, | ||
| 3160 | .nvic, | ||
| 3161 | .trust, | ||
| 3162 | }), | ||
| 3163 | }; | ||
| 3164 | pub const s802 = CpuModel{ | ||
| 3165 | .name = "s802", | ||
| 3166 | .llvm_name = "s802", | ||
| 3167 | .features = featureSet(&[_]Feature{ | ||
| 3168 | .btst16, | ||
| 3169 | .ck802, | ||
| 3170 | .e2, | ||
| 3171 | .nvic, | ||
| 3172 | .trust, | ||
| 3173 | }), | ||
| 3174 | }; | ||
| 3175 | pub const s802t = CpuModel{ | ||
| 3176 | .name = "s802t", | ||
| 3177 | .llvm_name = "s802t", | ||
| 3178 | .features = featureSet(&[_]Feature{ | ||
| 3179 | .btst16, | ||
| 3180 | .ck802, | ||
| 3181 | .e2, | ||
| 3182 | .nvic, | ||
| 3183 | .trust, | ||
| 3184 | }), | ||
| 3185 | }; | ||
| 3186 | pub const s803 = CpuModel{ | ||
| 3187 | .name = "s803", | ||
| 3188 | .llvm_name = "s803", | ||
| 3189 | .features = featureSet(&[_]Feature{ | ||
| 3190 | .@"3e3r2", | ||
| 3191 | .@"3e3r3", | ||
| 3192 | .btst16, | ||
| 3193 | .ck803, | ||
| 3194 | .hwdiv, | ||
| 3195 | .mp, | ||
| 3196 | .nvic, | ||
| 3197 | .trust, | ||
| 3198 | }), | ||
| 3199 | }; | ||
| 3200 | pub const s803t = CpuModel{ | ||
| 3201 | .name = "s803t", | ||
| 3202 | .llvm_name = "s803t", | ||
| 3203 | .features = featureSet(&[_]Feature{ | ||
| 3204 | .@"3e3r2", | ||
| 3205 | .@"3e3r3", | ||
| 3206 | .btst16, | ||
| 3207 | .ck803, | ||
| 3208 | .hwdiv, | ||
| 3209 | .mp, | ||
| 3210 | .nvic, | ||
| 3211 | .trust, | ||
| 3212 | }), | ||
| 3213 | }; | ||
| 3214 | }; | ||
lib/std/target/hexagon.zig deleted-586
| ... | @@ -1,586 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | audio, | ||
| 9 | cabac, | ||
| 10 | compound, | ||
| 11 | duplex, | ||
| 12 | hvx, | ||
| 13 | hvx_ieee_fp, | ||
| 14 | hvx_length128b, | ||
| 15 | hvx_length64b, | ||
| 16 | hvx_qfloat, | ||
| 17 | hvxv60, | ||
| 18 | hvxv62, | ||
| 19 | hvxv65, | ||
| 20 | hvxv66, | ||
| 21 | hvxv67, | ||
| 22 | hvxv68, | ||
| 23 | hvxv69, | ||
| 24 | hvxv71, | ||
| 25 | hvxv73, | ||
| 26 | long_calls, | ||
| 27 | mem_noshuf, | ||
| 28 | memops, | ||
| 29 | noreturn_stack_elim, | ||
| 30 | nvj, | ||
| 31 | nvs, | ||
| 32 | packets, | ||
| 33 | prev65, | ||
| 34 | reserved_r19, | ||
| 35 | small_data, | ||
| 36 | tinycore, | ||
| 37 | unsafe_fp, | ||
| 38 | v5, | ||
| 39 | v55, | ||
| 40 | v60, | ||
| 41 | v62, | ||
| 42 | v65, | ||
| 43 | v66, | ||
| 44 | v67, | ||
| 45 | v68, | ||
| 46 | v69, | ||
| 47 | v71, | ||
| 48 | v73, | ||
| 49 | zreg, | ||
| 50 | }; | ||
| 51 | |||
| 52 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 53 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 54 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 55 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 56 | |||
| 57 | pub const all_features = blk: { | ||
| 58 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 59 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 60 | var result: [len]CpuFeature = undefined; | ||
| 61 | result[@intFromEnum(Feature.audio)] = .{ | ||
| 62 | .llvm_name = "audio", | ||
| 63 | .description = "Hexagon Audio extension instructions", | ||
| 64 | .dependencies = featureSet(&[_]Feature{}), | ||
| 65 | }; | ||
| 66 | result[@intFromEnum(Feature.cabac)] = .{ | ||
| 67 | .llvm_name = "cabac", | ||
| 68 | .description = "Emit the CABAC instruction", | ||
| 69 | .dependencies = featureSet(&[_]Feature{}), | ||
| 70 | }; | ||
| 71 | result[@intFromEnum(Feature.compound)] = .{ | ||
| 72 | .llvm_name = "compound", | ||
| 73 | .description = "Use compound instructions", | ||
| 74 | .dependencies = featureSet(&[_]Feature{}), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.duplex)] = .{ | ||
| 77 | .llvm_name = "duplex", | ||
| 78 | .description = "Enable generation of duplex instruction", | ||
| 79 | .dependencies = featureSet(&[_]Feature{}), | ||
| 80 | }; | ||
| 81 | result[@intFromEnum(Feature.hvx)] = .{ | ||
| 82 | .llvm_name = "hvx", | ||
| 83 | .description = "Hexagon HVX instructions", | ||
| 84 | .dependencies = featureSet(&[_]Feature{}), | ||
| 85 | }; | ||
| 86 | result[@intFromEnum(Feature.hvx_ieee_fp)] = .{ | ||
| 87 | .llvm_name = "hvx-ieee-fp", | ||
| 88 | .description = "Hexagon HVX IEEE floating point instructions", | ||
| 89 | .dependencies = featureSet(&[_]Feature{}), | ||
| 90 | }; | ||
| 91 | result[@intFromEnum(Feature.hvx_length128b)] = .{ | ||
| 92 | .llvm_name = "hvx-length128b", | ||
| 93 | .description = "Hexagon HVX 128B instructions", | ||
| 94 | .dependencies = featureSet(&[_]Feature{ | ||
| 95 | .hvx, | ||
| 96 | }), | ||
| 97 | }; | ||
| 98 | result[@intFromEnum(Feature.hvx_length64b)] = .{ | ||
| 99 | .llvm_name = "hvx-length64b", | ||
| 100 | .description = "Hexagon HVX 64B instructions", | ||
| 101 | .dependencies = featureSet(&[_]Feature{ | ||
| 102 | .hvx, | ||
| 103 | }), | ||
| 104 | }; | ||
| 105 | result[@intFromEnum(Feature.hvx_qfloat)] = .{ | ||
| 106 | .llvm_name = "hvx-qfloat", | ||
| 107 | .description = "Hexagon HVX QFloating point instructions", | ||
| 108 | .dependencies = featureSet(&[_]Feature{}), | ||
| 109 | }; | ||
| 110 | result[@intFromEnum(Feature.hvxv60)] = .{ | ||
| 111 | .llvm_name = "hvxv60", | ||
| 112 | .description = "Hexagon HVX instructions", | ||
| 113 | .dependencies = featureSet(&[_]Feature{ | ||
| 114 | .hvx, | ||
| 115 | }), | ||
| 116 | }; | ||
| 117 | result[@intFromEnum(Feature.hvxv62)] = .{ | ||
| 118 | .llvm_name = "hvxv62", | ||
| 119 | .description = "Hexagon HVX instructions", | ||
| 120 | .dependencies = featureSet(&[_]Feature{ | ||
| 121 | .hvxv60, | ||
| 122 | }), | ||
| 123 | }; | ||
| 124 | result[@intFromEnum(Feature.hvxv65)] = .{ | ||
| 125 | .llvm_name = "hvxv65", | ||
| 126 | .description = "Hexagon HVX instructions", | ||
| 127 | .dependencies = featureSet(&[_]Feature{ | ||
| 128 | .hvxv62, | ||
| 129 | }), | ||
| 130 | }; | ||
| 131 | result[@intFromEnum(Feature.hvxv66)] = .{ | ||
| 132 | .llvm_name = "hvxv66", | ||
| 133 | .description = "Hexagon HVX instructions", | ||
| 134 | .dependencies = featureSet(&[_]Feature{ | ||
| 135 | .hvxv65, | ||
| 136 | .zreg, | ||
| 137 | }), | ||
| 138 | }; | ||
| 139 | result[@intFromEnum(Feature.hvxv67)] = .{ | ||
| 140 | .llvm_name = "hvxv67", | ||
| 141 | .description = "Hexagon HVX instructions", | ||
| 142 | .dependencies = featureSet(&[_]Feature{ | ||
| 143 | .hvxv66, | ||
| 144 | }), | ||
| 145 | }; | ||
| 146 | result[@intFromEnum(Feature.hvxv68)] = .{ | ||
| 147 | .llvm_name = "hvxv68", | ||
| 148 | .description = "Hexagon HVX instructions", | ||
| 149 | .dependencies = featureSet(&[_]Feature{ | ||
| 150 | .hvxv67, | ||
| 151 | }), | ||
| 152 | }; | ||
| 153 | result[@intFromEnum(Feature.hvxv69)] = .{ | ||
| 154 | .llvm_name = "hvxv69", | ||
| 155 | .description = "Hexagon HVX instructions", | ||
| 156 | .dependencies = featureSet(&[_]Feature{ | ||
| 157 | .hvxv68, | ||
| 158 | }), | ||
| 159 | }; | ||
| 160 | result[@intFromEnum(Feature.hvxv71)] = .{ | ||
| 161 | .llvm_name = "hvxv71", | ||
| 162 | .description = "Hexagon HVX instructions", | ||
| 163 | .dependencies = featureSet(&[_]Feature{ | ||
| 164 | .hvxv69, | ||
| 165 | }), | ||
| 166 | }; | ||
| 167 | result[@intFromEnum(Feature.hvxv73)] = .{ | ||
| 168 | .llvm_name = "hvxv73", | ||
| 169 | .description = "Hexagon HVX instructions", | ||
| 170 | .dependencies = featureSet(&[_]Feature{ | ||
| 171 | .hvxv71, | ||
| 172 | }), | ||
| 173 | }; | ||
| 174 | result[@intFromEnum(Feature.long_calls)] = .{ | ||
| 175 | .llvm_name = "long-calls", | ||
| 176 | .description = "Use constant-extended calls", | ||
| 177 | .dependencies = featureSet(&[_]Feature{}), | ||
| 178 | }; | ||
| 179 | result[@intFromEnum(Feature.mem_noshuf)] = .{ | ||
| 180 | .llvm_name = "mem_noshuf", | ||
| 181 | .description = "Supports mem_noshuf feature", | ||
| 182 | .dependencies = featureSet(&[_]Feature{}), | ||
| 183 | }; | ||
| 184 | result[@intFromEnum(Feature.memops)] = .{ | ||
| 185 | .llvm_name = "memops", | ||
| 186 | .description = "Use memop instructions", | ||
| 187 | .dependencies = featureSet(&[_]Feature{}), | ||
| 188 | }; | ||
| 189 | result[@intFromEnum(Feature.noreturn_stack_elim)] = .{ | ||
| 190 | .llvm_name = "noreturn-stack-elim", | ||
| 191 | .description = "Eliminate stack allocation in a noreturn function when possible", | ||
| 192 | .dependencies = featureSet(&[_]Feature{}), | ||
| 193 | }; | ||
| 194 | result[@intFromEnum(Feature.nvj)] = .{ | ||
| 195 | .llvm_name = "nvj", | ||
| 196 | .description = "Support for new-value jumps", | ||
| 197 | .dependencies = featureSet(&[_]Feature{ | ||
| 198 | .packets, | ||
| 199 | }), | ||
| 200 | }; | ||
| 201 | result[@intFromEnum(Feature.nvs)] = .{ | ||
| 202 | .llvm_name = "nvs", | ||
| 203 | .description = "Support for new-value stores", | ||
| 204 | .dependencies = featureSet(&[_]Feature{ | ||
| 205 | .packets, | ||
| 206 | }), | ||
| 207 | }; | ||
| 208 | result[@intFromEnum(Feature.packets)] = .{ | ||
| 209 | .llvm_name = "packets", | ||
| 210 | .description = "Support for instruction packets", | ||
| 211 | .dependencies = featureSet(&[_]Feature{}), | ||
| 212 | }; | ||
| 213 | result[@intFromEnum(Feature.prev65)] = .{ | ||
| 214 | .llvm_name = "prev65", | ||
| 215 | .description = "Support features deprecated in v65", | ||
| 216 | .dependencies = featureSet(&[_]Feature{}), | ||
| 217 | }; | ||
| 218 | result[@intFromEnum(Feature.reserved_r19)] = .{ | ||
| 219 | .llvm_name = "reserved-r19", | ||
| 220 | .description = "Reserve register R19", | ||
| 221 | .dependencies = featureSet(&[_]Feature{}), | ||
| 222 | }; | ||
| 223 | result[@intFromEnum(Feature.small_data)] = .{ | ||
| 224 | .llvm_name = "small-data", | ||
| 225 | .description = "Allow GP-relative addressing of global variables", | ||
| 226 | .dependencies = featureSet(&[_]Feature{}), | ||
| 227 | }; | ||
| 228 | result[@intFromEnum(Feature.tinycore)] = .{ | ||
| 229 | .llvm_name = "tinycore", | ||
| 230 | .description = "Hexagon Tiny Core", | ||
| 231 | .dependencies = featureSet(&[_]Feature{}), | ||
| 232 | }; | ||
| 233 | result[@intFromEnum(Feature.unsafe_fp)] = .{ | ||
| 234 | .llvm_name = "unsafe-fp", | ||
| 235 | .description = "Use unsafe FP math", | ||
| 236 | .dependencies = featureSet(&[_]Feature{}), | ||
| 237 | }; | ||
| 238 | result[@intFromEnum(Feature.v5)] = .{ | ||
| 239 | .llvm_name = "v5", | ||
| 240 | .description = "Enable Hexagon V5 architecture", | ||
| 241 | .dependencies = featureSet(&[_]Feature{}), | ||
| 242 | }; | ||
| 243 | result[@intFromEnum(Feature.v55)] = .{ | ||
| 244 | .llvm_name = "v55", | ||
| 245 | .description = "Enable Hexagon V55 architecture", | ||
| 246 | .dependencies = featureSet(&[_]Feature{}), | ||
| 247 | }; | ||
| 248 | result[@intFromEnum(Feature.v60)] = .{ | ||
| 249 | .llvm_name = "v60", | ||
| 250 | .description = "Enable Hexagon V60 architecture", | ||
| 251 | .dependencies = featureSet(&[_]Feature{}), | ||
| 252 | }; | ||
| 253 | result[@intFromEnum(Feature.v62)] = .{ | ||
| 254 | .llvm_name = "v62", | ||
| 255 | .description = "Enable Hexagon V62 architecture", | ||
| 256 | .dependencies = featureSet(&[_]Feature{}), | ||
| 257 | }; | ||
| 258 | result[@intFromEnum(Feature.v65)] = .{ | ||
| 259 | .llvm_name = "v65", | ||
| 260 | .description = "Enable Hexagon V65 architecture", | ||
| 261 | .dependencies = featureSet(&[_]Feature{}), | ||
| 262 | }; | ||
| 263 | result[@intFromEnum(Feature.v66)] = .{ | ||
| 264 | .llvm_name = "v66", | ||
| 265 | .description = "Enable Hexagon V66 architecture", | ||
| 266 | .dependencies = featureSet(&[_]Feature{}), | ||
| 267 | }; | ||
| 268 | result[@intFromEnum(Feature.v67)] = .{ | ||
| 269 | .llvm_name = "v67", | ||
| 270 | .description = "Enable Hexagon V67 architecture", | ||
| 271 | .dependencies = featureSet(&[_]Feature{}), | ||
| 272 | }; | ||
| 273 | result[@intFromEnum(Feature.v68)] = .{ | ||
| 274 | .llvm_name = "v68", | ||
| 275 | .description = "Enable Hexagon V68 architecture", | ||
| 276 | .dependencies = featureSet(&[_]Feature{}), | ||
| 277 | }; | ||
| 278 | result[@intFromEnum(Feature.v69)] = .{ | ||
| 279 | .llvm_name = "v69", | ||
| 280 | .description = "Enable Hexagon V69 architecture", | ||
| 281 | .dependencies = featureSet(&[_]Feature{}), | ||
| 282 | }; | ||
| 283 | result[@intFromEnum(Feature.v71)] = .{ | ||
| 284 | .llvm_name = "v71", | ||
| 285 | .description = "Enable Hexagon V71 architecture", | ||
| 286 | .dependencies = featureSet(&[_]Feature{}), | ||
| 287 | }; | ||
| 288 | result[@intFromEnum(Feature.v73)] = .{ | ||
| 289 | .llvm_name = "v73", | ||
| 290 | .description = "Enable Hexagon V73 architecture", | ||
| 291 | .dependencies = featureSet(&[_]Feature{}), | ||
| 292 | }; | ||
| 293 | result[@intFromEnum(Feature.zreg)] = .{ | ||
| 294 | .llvm_name = "zreg", | ||
| 295 | .description = "Hexagon ZReg extension instructions", | ||
| 296 | .dependencies = featureSet(&[_]Feature{}), | ||
| 297 | }; | ||
| 298 | const ti = @typeInfo(Feature); | ||
| 299 | for (&result, 0..) |*elem, i| { | ||
| 300 | elem.index = i; | ||
| 301 | elem.name = ti.Enum.fields[i].name; | ||
| 302 | } | ||
| 303 | break :blk result; | ||
| 304 | }; | ||
| 305 | |||
| 306 | pub const cpu = struct { | ||
| 307 | pub const generic = CpuModel{ | ||
| 308 | .name = "generic", | ||
| 309 | .llvm_name = "generic", | ||
| 310 | .features = featureSet(&[_]Feature{ | ||
| 311 | .cabac, | ||
| 312 | .compound, | ||
| 313 | .duplex, | ||
| 314 | .memops, | ||
| 315 | .nvj, | ||
| 316 | .nvs, | ||
| 317 | .prev65, | ||
| 318 | .small_data, | ||
| 319 | .v5, | ||
| 320 | .v55, | ||
| 321 | .v60, | ||
| 322 | }), | ||
| 323 | }; | ||
| 324 | pub const hexagonv5 = CpuModel{ | ||
| 325 | .name = "hexagonv5", | ||
| 326 | .llvm_name = "hexagonv5", | ||
| 327 | .features = featureSet(&[_]Feature{ | ||
| 328 | .cabac, | ||
| 329 | .compound, | ||
| 330 | .duplex, | ||
| 331 | .memops, | ||
| 332 | .nvj, | ||
| 333 | .nvs, | ||
| 334 | .prev65, | ||
| 335 | .small_data, | ||
| 336 | .v5, | ||
| 337 | }), | ||
| 338 | }; | ||
| 339 | pub const hexagonv55 = CpuModel{ | ||
| 340 | .name = "hexagonv55", | ||
| 341 | .llvm_name = "hexagonv55", | ||
| 342 | .features = featureSet(&[_]Feature{ | ||
| 343 | .cabac, | ||
| 344 | .compound, | ||
| 345 | .duplex, | ||
| 346 | .memops, | ||
| 347 | .nvj, | ||
| 348 | .nvs, | ||
| 349 | .prev65, | ||
| 350 | .small_data, | ||
| 351 | .v5, | ||
| 352 | .v55, | ||
| 353 | }), | ||
| 354 | }; | ||
| 355 | pub const hexagonv60 = CpuModel{ | ||
| 356 | .name = "hexagonv60", | ||
| 357 | .llvm_name = "hexagonv60", | ||
| 358 | .features = featureSet(&[_]Feature{ | ||
| 359 | .cabac, | ||
| 360 | .compound, | ||
| 361 | .duplex, | ||
| 362 | .memops, | ||
| 363 | .nvj, | ||
| 364 | .nvs, | ||
| 365 | .prev65, | ||
| 366 | .small_data, | ||
| 367 | .v5, | ||
| 368 | .v55, | ||
| 369 | .v60, | ||
| 370 | }), | ||
| 371 | }; | ||
| 372 | pub const hexagonv62 = CpuModel{ | ||
| 373 | .name = "hexagonv62", | ||
| 374 | .llvm_name = "hexagonv62", | ||
| 375 | .features = featureSet(&[_]Feature{ | ||
| 376 | .cabac, | ||
| 377 | .compound, | ||
| 378 | .duplex, | ||
| 379 | .memops, | ||
| 380 | .nvj, | ||
| 381 | .nvs, | ||
| 382 | .prev65, | ||
| 383 | .small_data, | ||
| 384 | .v5, | ||
| 385 | .v55, | ||
| 386 | .v60, | ||
| 387 | .v62, | ||
| 388 | }), | ||
| 389 | }; | ||
| 390 | pub const hexagonv65 = CpuModel{ | ||
| 391 | .name = "hexagonv65", | ||
| 392 | .llvm_name = "hexagonv65", | ||
| 393 | .features = featureSet(&[_]Feature{ | ||
| 394 | .cabac, | ||
| 395 | .compound, | ||
| 396 | .duplex, | ||
| 397 | .mem_noshuf, | ||
| 398 | .memops, | ||
| 399 | .nvj, | ||
| 400 | .nvs, | ||
| 401 | .small_data, | ||
| 402 | .v5, | ||
| 403 | .v55, | ||
| 404 | .v60, | ||
| 405 | .v62, | ||
| 406 | .v65, | ||
| 407 | }), | ||
| 408 | }; | ||
| 409 | pub const hexagonv66 = CpuModel{ | ||
| 410 | .name = "hexagonv66", | ||
| 411 | .llvm_name = "hexagonv66", | ||
| 412 | .features = featureSet(&[_]Feature{ | ||
| 413 | .cabac, | ||
| 414 | .compound, | ||
| 415 | .duplex, | ||
| 416 | .mem_noshuf, | ||
| 417 | .memops, | ||
| 418 | .nvj, | ||
| 419 | .nvs, | ||
| 420 | .small_data, | ||
| 421 | .v5, | ||
| 422 | .v55, | ||
| 423 | .v60, | ||
| 424 | .v62, | ||
| 425 | .v65, | ||
| 426 | .v66, | ||
| 427 | }), | ||
| 428 | }; | ||
| 429 | pub const hexagonv67 = CpuModel{ | ||
| 430 | .name = "hexagonv67", | ||
| 431 | .llvm_name = "hexagonv67", | ||
| 432 | .features = featureSet(&[_]Feature{ | ||
| 433 | .cabac, | ||
| 434 | .compound, | ||
| 435 | .duplex, | ||
| 436 | .mem_noshuf, | ||
| 437 | .memops, | ||
| 438 | .nvj, | ||
| 439 | .nvs, | ||
| 440 | .small_data, | ||
| 441 | .v5, | ||
| 442 | .v55, | ||
| 443 | .v60, | ||
| 444 | .v62, | ||
| 445 | .v65, | ||
| 446 | .v66, | ||
| 447 | .v67, | ||
| 448 | }), | ||
| 449 | }; | ||
| 450 | pub const hexagonv67t = CpuModel{ | ||
| 451 | .name = "hexagonv67t", | ||
| 452 | .llvm_name = "hexagonv67t", | ||
| 453 | .features = featureSet(&[_]Feature{ | ||
| 454 | .audio, | ||
| 455 | .compound, | ||
| 456 | .mem_noshuf, | ||
| 457 | .memops, | ||
| 458 | .nvs, | ||
| 459 | .small_data, | ||
| 460 | .tinycore, | ||
| 461 | .v5, | ||
| 462 | .v55, | ||
| 463 | .v60, | ||
| 464 | .v62, | ||
| 465 | .v65, | ||
| 466 | .v66, | ||
| 467 | .v67, | ||
| 468 | }), | ||
| 469 | }; | ||
| 470 | pub const hexagonv68 = CpuModel{ | ||
| 471 | .name = "hexagonv68", | ||
| 472 | .llvm_name = "hexagonv68", | ||
| 473 | .features = featureSet(&[_]Feature{ | ||
| 474 | .cabac, | ||
| 475 | .compound, | ||
| 476 | .duplex, | ||
| 477 | .mem_noshuf, | ||
| 478 | .memops, | ||
| 479 | .nvj, | ||
| 480 | .nvs, | ||
| 481 | .small_data, | ||
| 482 | .v5, | ||
| 483 | .v55, | ||
| 484 | .v60, | ||
| 485 | .v62, | ||
| 486 | .v65, | ||
| 487 | .v66, | ||
| 488 | .v67, | ||
| 489 | .v68, | ||
| 490 | }), | ||
| 491 | }; | ||
| 492 | pub const hexagonv69 = CpuModel{ | ||
| 493 | .name = "hexagonv69", | ||
| 494 | .llvm_name = "hexagonv69", | ||
| 495 | .features = featureSet(&[_]Feature{ | ||
| 496 | .cabac, | ||
| 497 | .compound, | ||
| 498 | .duplex, | ||
| 499 | .mem_noshuf, | ||
| 500 | .memops, | ||
| 501 | .nvj, | ||
| 502 | .nvs, | ||
| 503 | .small_data, | ||
| 504 | .v5, | ||
| 505 | .v55, | ||
| 506 | .v60, | ||
| 507 | .v62, | ||
| 508 | .v65, | ||
| 509 | .v66, | ||
| 510 | .v67, | ||
| 511 | .v68, | ||
| 512 | .v69, | ||
| 513 | }), | ||
| 514 | }; | ||
| 515 | pub const hexagonv71 = CpuModel{ | ||
| 516 | .name = "hexagonv71", | ||
| 517 | .llvm_name = "hexagonv71", | ||
| 518 | .features = featureSet(&[_]Feature{ | ||
| 519 | .cabac, | ||
| 520 | .compound, | ||
| 521 | .duplex, | ||
| 522 | .mem_noshuf, | ||
| 523 | .memops, | ||
| 524 | .nvj, | ||
| 525 | .nvs, | ||
| 526 | .small_data, | ||
| 527 | .v5, | ||
| 528 | .v55, | ||
| 529 | .v60, | ||
| 530 | .v62, | ||
| 531 | .v65, | ||
| 532 | .v66, | ||
| 533 | .v67, | ||
| 534 | .v68, | ||
| 535 | .v69, | ||
| 536 | .v71, | ||
| 537 | }), | ||
| 538 | }; | ||
| 539 | pub const hexagonv71t = CpuModel{ | ||
| 540 | .name = "hexagonv71t", | ||
| 541 | .llvm_name = "hexagonv71t", | ||
| 542 | .features = featureSet(&[_]Feature{ | ||
| 543 | .audio, | ||
| 544 | .compound, | ||
| 545 | .mem_noshuf, | ||
| 546 | .memops, | ||
| 547 | .nvs, | ||
| 548 | .small_data, | ||
| 549 | .tinycore, | ||
| 550 | .v5, | ||
| 551 | .v55, | ||
| 552 | .v60, | ||
| 553 | .v62, | ||
| 554 | .v65, | ||
| 555 | .v66, | ||
| 556 | .v67, | ||
| 557 | .v68, | ||
| 558 | .v69, | ||
| 559 | .v71, | ||
| 560 | }), | ||
| 561 | }; | ||
| 562 | pub const hexagonv73 = CpuModel{ | ||
| 563 | .name = "hexagonv73", | ||
| 564 | .llvm_name = "hexagonv73", | ||
| 565 | .features = featureSet(&[_]Feature{ | ||
| 566 | .compound, | ||
| 567 | .duplex, | ||
| 568 | .mem_noshuf, | ||
| 569 | .memops, | ||
| 570 | .nvj, | ||
| 571 | .nvs, | ||
| 572 | .small_data, | ||
| 573 | .v5, | ||
| 574 | .v55, | ||
| 575 | .v60, | ||
| 576 | .v62, | ||
| 577 | .v65, | ||
| 578 | .v66, | ||
| 579 | .v67, | ||
| 580 | .v68, | ||
| 581 | .v69, | ||
| 582 | .v71, | ||
| 583 | .v73, | ||
| 584 | }), | ||
| 585 | }; | ||
| 586 | }; | ||
lib/std/target/loongarch.zig deleted-146
| ... | @@ -1,146 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"32bit", | ||
| 9 | @"64bit", | ||
| 10 | d, | ||
| 11 | f, | ||
| 12 | la_global_with_abs, | ||
| 13 | la_global_with_pcrel, | ||
| 14 | la_local_with_abs, | ||
| 15 | lasx, | ||
| 16 | lbt, | ||
| 17 | lsx, | ||
| 18 | lvz, | ||
| 19 | ual, | ||
| 20 | }; | ||
| 21 | |||
| 22 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 23 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 24 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 25 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 26 | |||
| 27 | pub const all_features = blk: { | ||
| 28 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 29 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 30 | var result: [len]CpuFeature = undefined; | ||
| 31 | result[@intFromEnum(Feature.@"32bit")] = .{ | ||
| 32 | .llvm_name = "32bit", | ||
| 33 | .description = "LA32 Basic Integer and Privilege Instruction Set", | ||
| 34 | .dependencies = featureSet(&[_]Feature{}), | ||
| 35 | }; | ||
| 36 | result[@intFromEnum(Feature.@"64bit")] = .{ | ||
| 37 | .llvm_name = "64bit", | ||
| 38 | .description = "LA64 Basic Integer and Privilege Instruction Set", | ||
| 39 | .dependencies = featureSet(&[_]Feature{}), | ||
| 40 | }; | ||
| 41 | result[@intFromEnum(Feature.d)] = .{ | ||
| 42 | .llvm_name = "d", | ||
| 43 | .description = "'D' (Double-Precision Floating-Point)", | ||
| 44 | .dependencies = featureSet(&[_]Feature{ | ||
| 45 | .f, | ||
| 46 | }), | ||
| 47 | }; | ||
| 48 | result[@intFromEnum(Feature.f)] = .{ | ||
| 49 | .llvm_name = "f", | ||
| 50 | .description = "'F' (Single-Precision Floating-Point)", | ||
| 51 | .dependencies = featureSet(&[_]Feature{}), | ||
| 52 | }; | ||
| 53 | result[@intFromEnum(Feature.la_global_with_abs)] = .{ | ||
| 54 | .llvm_name = "la-global-with-abs", | ||
| 55 | .description = "Expand la.global as la.abs", | ||
| 56 | .dependencies = featureSet(&[_]Feature{}), | ||
| 57 | }; | ||
| 58 | result[@intFromEnum(Feature.la_global_with_pcrel)] = .{ | ||
| 59 | .llvm_name = "la-global-with-pcrel", | ||
| 60 | .description = "Expand la.global as la.pcrel", | ||
| 61 | .dependencies = featureSet(&[_]Feature{}), | ||
| 62 | }; | ||
| 63 | result[@intFromEnum(Feature.la_local_with_abs)] = .{ | ||
| 64 | .llvm_name = "la-local-with-abs", | ||
| 65 | .description = "Expand la.local as la.abs", | ||
| 66 | .dependencies = featureSet(&[_]Feature{}), | ||
| 67 | }; | ||
| 68 | result[@intFromEnum(Feature.lasx)] = .{ | ||
| 69 | .llvm_name = "lasx", | ||
| 70 | .description = "'LASX' (Loongson Advanced SIMD Extension)", | ||
| 71 | .dependencies = featureSet(&[_]Feature{ | ||
| 72 | .lsx, | ||
| 73 | }), | ||
| 74 | }; | ||
| 75 | result[@intFromEnum(Feature.lbt)] = .{ | ||
| 76 | .llvm_name = "lbt", | ||
| 77 | .description = "'LBT' (Loongson Binary Translation Extension)", | ||
| 78 | .dependencies = featureSet(&[_]Feature{}), | ||
| 79 | }; | ||
| 80 | result[@intFromEnum(Feature.lsx)] = .{ | ||
| 81 | .llvm_name = "lsx", | ||
| 82 | .description = "'LSX' (Loongson SIMD Extension)", | ||
| 83 | .dependencies = featureSet(&[_]Feature{ | ||
| 84 | .d, | ||
| 85 | }), | ||
| 86 | }; | ||
| 87 | result[@intFromEnum(Feature.lvz)] = .{ | ||
| 88 | .llvm_name = "lvz", | ||
| 89 | .description = "'LVZ' (Loongson Virtualization Extension)", | ||
| 90 | .dependencies = featureSet(&[_]Feature{}), | ||
| 91 | }; | ||
| 92 | result[@intFromEnum(Feature.ual)] = .{ | ||
| 93 | .llvm_name = "ual", | ||
| 94 | .description = "Allow memory accesses to be unaligned", | ||
| 95 | .dependencies = featureSet(&[_]Feature{}), | ||
| 96 | }; | ||
| 97 | const ti = @typeInfo(Feature); | ||
| 98 | for (&result, 0..) |*elem, i| { | ||
| 99 | elem.index = i; | ||
| 100 | elem.name = ti.Enum.fields[i].name; | ||
| 101 | } | ||
| 102 | break :blk result; | ||
| 103 | }; | ||
| 104 | |||
| 105 | pub const cpu = struct { | ||
| 106 | pub const generic = CpuModel{ | ||
| 107 | .name = "generic", | ||
| 108 | .llvm_name = "generic", | ||
| 109 | .features = featureSet(&[_]Feature{}), | ||
| 110 | }; | ||
| 111 | pub const generic_la32 = CpuModel{ | ||
| 112 | .name = "generic_la32", | ||
| 113 | .llvm_name = "generic-la32", | ||
| 114 | .features = featureSet(&[_]Feature{ | ||
| 115 | .@"32bit", | ||
| 116 | }), | ||
| 117 | }; | ||
| 118 | pub const generic_la64 = CpuModel{ | ||
| 119 | .name = "generic_la64", | ||
| 120 | .llvm_name = "generic-la64", | ||
| 121 | .features = featureSet(&[_]Feature{ | ||
| 122 | .@"64bit", | ||
| 123 | .ual, | ||
| 124 | }), | ||
| 125 | }; | ||
| 126 | pub const la464 = CpuModel{ | ||
| 127 | .name = "la464", | ||
| 128 | .llvm_name = "la464", | ||
| 129 | .features = featureSet(&[_]Feature{ | ||
| 130 | .@"64bit", | ||
| 131 | .lasx, | ||
| 132 | .lbt, | ||
| 133 | .lvz, | ||
| 134 | .ual, | ||
| 135 | }), | ||
| 136 | }; | ||
| 137 | pub const loongarch64 = CpuModel{ | ||
| 138 | .name = "loongarch64", | ||
| 139 | .llvm_name = "loongarch64", | ||
| 140 | .features = featureSet(&[_]Feature{ | ||
| 141 | .@"64bit", | ||
| 142 | .d, | ||
| 143 | .ual, | ||
| 144 | }), | ||
| 145 | }; | ||
| 146 | }; | ||
lib/std/target/m68k.zig deleted-228
| ... | @@ -1,228 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | isa_68000, | ||
| 9 | isa_68010, | ||
| 10 | isa_68020, | ||
| 11 | isa_68030, | ||
| 12 | isa_68040, | ||
| 13 | isa_68060, | ||
| 14 | isa_68881, | ||
| 15 | isa_68882, | ||
| 16 | reserve_a0, | ||
| 17 | reserve_a1, | ||
| 18 | reserve_a2, | ||
| 19 | reserve_a3, | ||
| 20 | reserve_a4, | ||
| 21 | reserve_a5, | ||
| 22 | reserve_a6, | ||
| 23 | reserve_d0, | ||
| 24 | reserve_d1, | ||
| 25 | reserve_d2, | ||
| 26 | reserve_d3, | ||
| 27 | reserve_d4, | ||
| 28 | reserve_d5, | ||
| 29 | reserve_d6, | ||
| 30 | reserve_d7, | ||
| 31 | }; | ||
| 32 | |||
| 33 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 34 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 35 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 36 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 37 | |||
| 38 | pub const all_features = blk: { | ||
| 39 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 40 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 41 | var result: [len]CpuFeature = undefined; | ||
| 42 | result[@intFromEnum(Feature.isa_68000)] = .{ | ||
| 43 | .llvm_name = "isa-68000", | ||
| 44 | .description = "Is M68000 ISA supported", | ||
| 45 | .dependencies = featureSet(&[_]Feature{}), | ||
| 46 | }; | ||
| 47 | result[@intFromEnum(Feature.isa_68010)] = .{ | ||
| 48 | .llvm_name = "isa-68010", | ||
| 49 | .description = "Is M68010 ISA supported", | ||
| 50 | .dependencies = featureSet(&[_]Feature{ | ||
| 51 | .isa_68000, | ||
| 52 | }), | ||
| 53 | }; | ||
| 54 | result[@intFromEnum(Feature.isa_68020)] = .{ | ||
| 55 | .llvm_name = "isa-68020", | ||
| 56 | .description = "Is M68020 ISA supported", | ||
| 57 | .dependencies = featureSet(&[_]Feature{ | ||
| 58 | .isa_68010, | ||
| 59 | }), | ||
| 60 | }; | ||
| 61 | result[@intFromEnum(Feature.isa_68030)] = .{ | ||
| 62 | .llvm_name = "isa-68030", | ||
| 63 | .description = "Is M68030 ISA supported", | ||
| 64 | .dependencies = featureSet(&[_]Feature{ | ||
| 65 | .isa_68020, | ||
| 66 | }), | ||
| 67 | }; | ||
| 68 | result[@intFromEnum(Feature.isa_68040)] = .{ | ||
| 69 | .llvm_name = "isa-68040", | ||
| 70 | .description = "Is M68040 ISA supported", | ||
| 71 | .dependencies = featureSet(&[_]Feature{ | ||
| 72 | .isa_68030, | ||
| 73 | .isa_68882, | ||
| 74 | }), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.isa_68060)] = .{ | ||
| 77 | .llvm_name = "isa-68060", | ||
| 78 | .description = "Is M68060 ISA supported", | ||
| 79 | .dependencies = featureSet(&[_]Feature{ | ||
| 80 | .isa_68040, | ||
| 81 | }), | ||
| 82 | }; | ||
| 83 | result[@intFromEnum(Feature.isa_68881)] = .{ | ||
| 84 | .llvm_name = "isa-68881", | ||
| 85 | .description = "Is M68881 (FPU) ISA supported", | ||
| 86 | .dependencies = featureSet(&[_]Feature{}), | ||
| 87 | }; | ||
| 88 | result[@intFromEnum(Feature.isa_68882)] = .{ | ||
| 89 | .llvm_name = "isa-68882", | ||
| 90 | .description = "Is M68882 (FPU) ISA supported", | ||
| 91 | .dependencies = featureSet(&[_]Feature{ | ||
| 92 | .isa_68881, | ||
| 93 | }), | ||
| 94 | }; | ||
| 95 | result[@intFromEnum(Feature.reserve_a0)] = .{ | ||
| 96 | .llvm_name = "reserve-a0", | ||
| 97 | .description = "Reserve A0 register", | ||
| 98 | .dependencies = featureSet(&[_]Feature{}), | ||
| 99 | }; | ||
| 100 | result[@intFromEnum(Feature.reserve_a1)] = .{ | ||
| 101 | .llvm_name = "reserve-a1", | ||
| 102 | .description = "Reserve A1 register", | ||
| 103 | .dependencies = featureSet(&[_]Feature{}), | ||
| 104 | }; | ||
| 105 | result[@intFromEnum(Feature.reserve_a2)] = .{ | ||
| 106 | .llvm_name = "reserve-a2", | ||
| 107 | .description = "Reserve A2 register", | ||
| 108 | .dependencies = featureSet(&[_]Feature{}), | ||
| 109 | }; | ||
| 110 | result[@intFromEnum(Feature.reserve_a3)] = .{ | ||
| 111 | .llvm_name = "reserve-a3", | ||
| 112 | .description = "Reserve A3 register", | ||
| 113 | .dependencies = featureSet(&[_]Feature{}), | ||
| 114 | }; | ||
| 115 | result[@intFromEnum(Feature.reserve_a4)] = .{ | ||
| 116 | .llvm_name = "reserve-a4", | ||
| 117 | .description = "Reserve A4 register", | ||
| 118 | .dependencies = featureSet(&[_]Feature{}), | ||
| 119 | }; | ||
| 120 | result[@intFromEnum(Feature.reserve_a5)] = .{ | ||
| 121 | .llvm_name = "reserve-a5", | ||
| 122 | .description = "Reserve A5 register", | ||
| 123 | .dependencies = featureSet(&[_]Feature{}), | ||
| 124 | }; | ||
| 125 | result[@intFromEnum(Feature.reserve_a6)] = .{ | ||
| 126 | .llvm_name = "reserve-a6", | ||
| 127 | .description = "Reserve A6 register", | ||
| 128 | .dependencies = featureSet(&[_]Feature{}), | ||
| 129 | }; | ||
| 130 | result[@intFromEnum(Feature.reserve_d0)] = .{ | ||
| 131 | .llvm_name = "reserve-d0", | ||
| 132 | .description = "Reserve D0 register", | ||
| 133 | .dependencies = featureSet(&[_]Feature{}), | ||
| 134 | }; | ||
| 135 | result[@intFromEnum(Feature.reserve_d1)] = .{ | ||
| 136 | .llvm_name = "reserve-d1", | ||
| 137 | .description = "Reserve D1 register", | ||
| 138 | .dependencies = featureSet(&[_]Feature{}), | ||
| 139 | }; | ||
| 140 | result[@intFromEnum(Feature.reserve_d2)] = .{ | ||
| 141 | .llvm_name = "reserve-d2", | ||
| 142 | .description = "Reserve D2 register", | ||
| 143 | .dependencies = featureSet(&[_]Feature{}), | ||
| 144 | }; | ||
| 145 | result[@intFromEnum(Feature.reserve_d3)] = .{ | ||
| 146 | .llvm_name = "reserve-d3", | ||
| 147 | .description = "Reserve D3 register", | ||
| 148 | .dependencies = featureSet(&[_]Feature{}), | ||
| 149 | }; | ||
| 150 | result[@intFromEnum(Feature.reserve_d4)] = .{ | ||
| 151 | .llvm_name = "reserve-d4", | ||
| 152 | .description = "Reserve D4 register", | ||
| 153 | .dependencies = featureSet(&[_]Feature{}), | ||
| 154 | }; | ||
| 155 | result[@intFromEnum(Feature.reserve_d5)] = .{ | ||
| 156 | .llvm_name = "reserve-d5", | ||
| 157 | .description = "Reserve D5 register", | ||
| 158 | .dependencies = featureSet(&[_]Feature{}), | ||
| 159 | }; | ||
| 160 | result[@intFromEnum(Feature.reserve_d6)] = .{ | ||
| 161 | .llvm_name = "reserve-d6", | ||
| 162 | .description = "Reserve D6 register", | ||
| 163 | .dependencies = featureSet(&[_]Feature{}), | ||
| 164 | }; | ||
| 165 | result[@intFromEnum(Feature.reserve_d7)] = .{ | ||
| 166 | .llvm_name = "reserve-d7", | ||
| 167 | .description = "Reserve D7 register", | ||
| 168 | .dependencies = featureSet(&[_]Feature{}), | ||
| 169 | }; | ||
| 170 | const ti = @typeInfo(Feature); | ||
| 171 | for (&result, 0..) |*elem, i| { | ||
| 172 | elem.index = i; | ||
| 173 | elem.name = ti.Enum.fields[i].name; | ||
| 174 | } | ||
| 175 | break :blk result; | ||
| 176 | }; | ||
| 177 | |||
| 178 | pub const cpu = struct { | ||
| 179 | pub const generic = CpuModel{ | ||
| 180 | .name = "generic", | ||
| 181 | .llvm_name = "generic", | ||
| 182 | .features = featureSet(&[_]Feature{ | ||
| 183 | .isa_68000, | ||
| 184 | }), | ||
| 185 | }; | ||
| 186 | pub const M68000 = CpuModel{ | ||
| 187 | .name = "M68000", | ||
| 188 | .llvm_name = "M68000", | ||
| 189 | .features = featureSet(&[_]Feature{ | ||
| 190 | .isa_68000, | ||
| 191 | }), | ||
| 192 | }; | ||
| 193 | pub const M68010 = CpuModel{ | ||
| 194 | .name = "M68010", | ||
| 195 | .llvm_name = "M68010", | ||
| 196 | .features = featureSet(&[_]Feature{ | ||
| 197 | .isa_68010, | ||
| 198 | }), | ||
| 199 | }; | ||
| 200 | pub const M68020 = CpuModel{ | ||
| 201 | .name = "M68020", | ||
| 202 | .llvm_name = "M68020", | ||
| 203 | .features = featureSet(&[_]Feature{ | ||
| 204 | .isa_68020, | ||
| 205 | }), | ||
| 206 | }; | ||
| 207 | pub const M68030 = CpuModel{ | ||
| 208 | .name = "M68030", | ||
| 209 | .llvm_name = "M68030", | ||
| 210 | .features = featureSet(&[_]Feature{ | ||
| 211 | .isa_68030, | ||
| 212 | }), | ||
| 213 | }; | ||
| 214 | pub const M68040 = CpuModel{ | ||
| 215 | .name = "M68040", | ||
| 216 | .llvm_name = "M68040", | ||
| 217 | .features = featureSet(&[_]Feature{ | ||
| 218 | .isa_68040, | ||
| 219 | }), | ||
| 220 | }; | ||
| 221 | pub const M68060 = CpuModel{ | ||
| 222 | .name = "M68060", | ||
| 223 | .llvm_name = "M68060", | ||
| 224 | .features = featureSet(&[_]Feature{ | ||
| 225 | .isa_68060, | ||
| 226 | }), | ||
| 227 | }; | ||
| 228 | }; | ||
lib/std/target/mips.zig deleted-531
| ... | @@ -1,531 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | abs2008, | ||
| 9 | cnmips, | ||
| 10 | cnmipsp, | ||
| 11 | crc, | ||
| 12 | dsp, | ||
| 13 | dspr2, | ||
| 14 | dspr3, | ||
| 15 | eva, | ||
| 16 | fp64, | ||
| 17 | fpxx, | ||
| 18 | ginv, | ||
| 19 | gp64, | ||
| 20 | long_calls, | ||
| 21 | micromips, | ||
| 22 | mips1, | ||
| 23 | mips16, | ||
| 24 | mips2, | ||
| 25 | mips3, | ||
| 26 | mips32, | ||
| 27 | mips32r2, | ||
| 28 | mips32r3, | ||
| 29 | mips32r5, | ||
| 30 | mips32r6, | ||
| 31 | mips3_32, | ||
| 32 | mips3_32r2, | ||
| 33 | mips3d, | ||
| 34 | mips4, | ||
| 35 | mips4_32, | ||
| 36 | mips4_32r2, | ||
| 37 | mips5, | ||
| 38 | mips5_32r2, | ||
| 39 | mips64, | ||
| 40 | mips64r2, | ||
| 41 | mips64r3, | ||
| 42 | mips64r5, | ||
| 43 | mips64r6, | ||
| 44 | msa, | ||
| 45 | mt, | ||
| 46 | nan2008, | ||
| 47 | noabicalls, | ||
| 48 | nomadd4, | ||
| 49 | nooddspreg, | ||
| 50 | p5600, | ||
| 51 | ptr64, | ||
| 52 | single_float, | ||
| 53 | soft_float, | ||
| 54 | sym32, | ||
| 55 | use_indirect_jump_hazard, | ||
| 56 | use_tcc_in_div, | ||
| 57 | vfpu, | ||
| 58 | virt, | ||
| 59 | xgot, | ||
| 60 | }; | ||
| 61 | |||
| 62 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 63 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 64 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 65 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 66 | |||
| 67 | pub const all_features = blk: { | ||
| 68 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 69 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 70 | var result: [len]CpuFeature = undefined; | ||
| 71 | result[@intFromEnum(Feature.abs2008)] = .{ | ||
| 72 | .llvm_name = "abs2008", | ||
| 73 | .description = "Disable IEEE 754-2008 abs.fmt mode", | ||
| 74 | .dependencies = featureSet(&[_]Feature{}), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.cnmips)] = .{ | ||
| 77 | .llvm_name = "cnmips", | ||
| 78 | .description = "Octeon cnMIPS Support", | ||
| 79 | .dependencies = featureSet(&[_]Feature{ | ||
| 80 | .mips64r2, | ||
| 81 | }), | ||
| 82 | }; | ||
| 83 | result[@intFromEnum(Feature.cnmipsp)] = .{ | ||
| 84 | .llvm_name = "cnmipsp", | ||
| 85 | .description = "Octeon+ cnMIPS Support", | ||
| 86 | .dependencies = featureSet(&[_]Feature{ | ||
| 87 | .cnmips, | ||
| 88 | }), | ||
| 89 | }; | ||
| 90 | result[@intFromEnum(Feature.crc)] = .{ | ||
| 91 | .llvm_name = "crc", | ||
| 92 | .description = "Mips R6 CRC ASE", | ||
| 93 | .dependencies = featureSet(&[_]Feature{}), | ||
| 94 | }; | ||
| 95 | result[@intFromEnum(Feature.dsp)] = .{ | ||
| 96 | .llvm_name = "dsp", | ||
| 97 | .description = "Mips DSP ASE", | ||
| 98 | .dependencies = featureSet(&[_]Feature{}), | ||
| 99 | }; | ||
| 100 | result[@intFromEnum(Feature.dspr2)] = .{ | ||
| 101 | .llvm_name = "dspr2", | ||
| 102 | .description = "Mips DSP-R2 ASE", | ||
| 103 | .dependencies = featureSet(&[_]Feature{ | ||
| 104 | .dsp, | ||
| 105 | }), | ||
| 106 | }; | ||
| 107 | result[@intFromEnum(Feature.dspr3)] = .{ | ||
| 108 | .llvm_name = "dspr3", | ||
| 109 | .description = "Mips DSP-R3 ASE", | ||
| 110 | .dependencies = featureSet(&[_]Feature{ | ||
| 111 | .dspr2, | ||
| 112 | }), | ||
| 113 | }; | ||
| 114 | result[@intFromEnum(Feature.eva)] = .{ | ||
| 115 | .llvm_name = "eva", | ||
| 116 | .description = "Mips EVA ASE", | ||
| 117 | .dependencies = featureSet(&[_]Feature{}), | ||
| 118 | }; | ||
| 119 | result[@intFromEnum(Feature.fp64)] = .{ | ||
| 120 | .llvm_name = "fp64", | ||
| 121 | .description = "Support 64-bit FP registers", | ||
| 122 | .dependencies = featureSet(&[_]Feature{}), | ||
| 123 | }; | ||
| 124 | result[@intFromEnum(Feature.fpxx)] = .{ | ||
| 125 | .llvm_name = "fpxx", | ||
| 126 | .description = "Support for FPXX", | ||
| 127 | .dependencies = featureSet(&[_]Feature{}), | ||
| 128 | }; | ||
| 129 | result[@intFromEnum(Feature.ginv)] = .{ | ||
| 130 | .llvm_name = "ginv", | ||
| 131 | .description = "Mips Global Invalidate ASE", | ||
| 132 | .dependencies = featureSet(&[_]Feature{}), | ||
| 133 | }; | ||
| 134 | result[@intFromEnum(Feature.gp64)] = .{ | ||
| 135 | .llvm_name = "gp64", | ||
| 136 | .description = "General Purpose Registers are 64-bit wide", | ||
| 137 | .dependencies = featureSet(&[_]Feature{}), | ||
| 138 | }; | ||
| 139 | result[@intFromEnum(Feature.long_calls)] = .{ | ||
| 140 | .llvm_name = "long-calls", | ||
| 141 | .description = "Disable use of the jal instruction", | ||
| 142 | .dependencies = featureSet(&[_]Feature{}), | ||
| 143 | }; | ||
| 144 | result[@intFromEnum(Feature.micromips)] = .{ | ||
| 145 | .llvm_name = "micromips", | ||
| 146 | .description = "microMips mode", | ||
| 147 | .dependencies = featureSet(&[_]Feature{}), | ||
| 148 | }; | ||
| 149 | result[@intFromEnum(Feature.mips1)] = .{ | ||
| 150 | .llvm_name = "mips1", | ||
| 151 | .description = "Mips I ISA Support [highly experimental]", | ||
| 152 | .dependencies = featureSet(&[_]Feature{}), | ||
| 153 | }; | ||
| 154 | result[@intFromEnum(Feature.mips16)] = .{ | ||
| 155 | .llvm_name = "mips16", | ||
| 156 | .description = "Mips16 mode", | ||
| 157 | .dependencies = featureSet(&[_]Feature{}), | ||
| 158 | }; | ||
| 159 | result[@intFromEnum(Feature.mips2)] = .{ | ||
| 160 | .llvm_name = "mips2", | ||
| 161 | .description = "Mips II ISA Support [highly experimental]", | ||
| 162 | .dependencies = featureSet(&[_]Feature{ | ||
| 163 | .mips1, | ||
| 164 | }), | ||
| 165 | }; | ||
| 166 | result[@intFromEnum(Feature.mips3)] = .{ | ||
| 167 | .llvm_name = "mips3", | ||
| 168 | .description = "MIPS III ISA Support [highly experimental]", | ||
| 169 | .dependencies = featureSet(&[_]Feature{ | ||
| 170 | .fp64, | ||
| 171 | .gp64, | ||
| 172 | .mips2, | ||
| 173 | .mips3_32, | ||
| 174 | .mips3_32r2, | ||
| 175 | }), | ||
| 176 | }; | ||
| 177 | result[@intFromEnum(Feature.mips32)] = .{ | ||
| 178 | .llvm_name = "mips32", | ||
| 179 | .description = "Mips32 ISA Support", | ||
| 180 | .dependencies = featureSet(&[_]Feature{ | ||
| 181 | .mips2, | ||
| 182 | .mips3_32, | ||
| 183 | .mips4_32, | ||
| 184 | }), | ||
| 185 | }; | ||
| 186 | result[@intFromEnum(Feature.mips32r2)] = .{ | ||
| 187 | .llvm_name = "mips32r2", | ||
| 188 | .description = "Mips32r2 ISA Support", | ||
| 189 | .dependencies = featureSet(&[_]Feature{ | ||
| 190 | .mips32, | ||
| 191 | .mips3_32r2, | ||
| 192 | .mips4_32r2, | ||
| 193 | .mips5_32r2, | ||
| 194 | }), | ||
| 195 | }; | ||
| 196 | result[@intFromEnum(Feature.mips32r3)] = .{ | ||
| 197 | .llvm_name = "mips32r3", | ||
| 198 | .description = "Mips32r3 ISA Support", | ||
| 199 | .dependencies = featureSet(&[_]Feature{ | ||
| 200 | .mips32r2, | ||
| 201 | }), | ||
| 202 | }; | ||
| 203 | result[@intFromEnum(Feature.mips32r5)] = .{ | ||
| 204 | .llvm_name = "mips32r5", | ||
| 205 | .description = "Mips32r5 ISA Support", | ||
| 206 | .dependencies = featureSet(&[_]Feature{ | ||
| 207 | .mips32r3, | ||
| 208 | }), | ||
| 209 | }; | ||
| 210 | result[@intFromEnum(Feature.mips32r6)] = .{ | ||
| 211 | .llvm_name = "mips32r6", | ||
| 212 | .description = "Mips32r6 ISA Support [experimental]", | ||
| 213 | .dependencies = featureSet(&[_]Feature{ | ||
| 214 | .abs2008, | ||
| 215 | .fp64, | ||
| 216 | .mips32r5, | ||
| 217 | .nan2008, | ||
| 218 | }), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.mips3_32)] = .{ | ||
| 221 | .llvm_name = "mips3_32", | ||
| 222 | .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", | ||
| 223 | .dependencies = featureSet(&[_]Feature{}), | ||
| 224 | }; | ||
| 225 | result[@intFromEnum(Feature.mips3_32r2)] = .{ | ||
| 226 | .llvm_name = "mips3_32r2", | ||
| 227 | .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", | ||
| 228 | .dependencies = featureSet(&[_]Feature{}), | ||
| 229 | }; | ||
| 230 | result[@intFromEnum(Feature.mips3d)] = .{ | ||
| 231 | .llvm_name = "mips3d", | ||
| 232 | .description = "Mips 3D ASE", | ||
| 233 | .dependencies = featureSet(&[_]Feature{}), | ||
| 234 | }; | ||
| 235 | result[@intFromEnum(Feature.mips4)] = .{ | ||
| 236 | .llvm_name = "mips4", | ||
| 237 | .description = "MIPS IV ISA Support", | ||
| 238 | .dependencies = featureSet(&[_]Feature{ | ||
| 239 | .mips3, | ||
| 240 | .mips4_32, | ||
| 241 | .mips4_32r2, | ||
| 242 | }), | ||
| 243 | }; | ||
| 244 | result[@intFromEnum(Feature.mips4_32)] = .{ | ||
| 245 | .llvm_name = "mips4_32", | ||
| 246 | .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", | ||
| 247 | .dependencies = featureSet(&[_]Feature{}), | ||
| 248 | }; | ||
| 249 | result[@intFromEnum(Feature.mips4_32r2)] = .{ | ||
| 250 | .llvm_name = "mips4_32r2", | ||
| 251 | .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", | ||
| 252 | .dependencies = featureSet(&[_]Feature{}), | ||
| 253 | }; | ||
| 254 | result[@intFromEnum(Feature.mips5)] = .{ | ||
| 255 | .llvm_name = "mips5", | ||
| 256 | .description = "MIPS V ISA Support [highly experimental]", | ||
| 257 | .dependencies = featureSet(&[_]Feature{ | ||
| 258 | .mips4, | ||
| 259 | .mips5_32r2, | ||
| 260 | }), | ||
| 261 | }; | ||
| 262 | result[@intFromEnum(Feature.mips5_32r2)] = .{ | ||
| 263 | .llvm_name = "mips5_32r2", | ||
| 264 | .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", | ||
| 265 | .dependencies = featureSet(&[_]Feature{}), | ||
| 266 | }; | ||
| 267 | result[@intFromEnum(Feature.mips64)] = .{ | ||
| 268 | .llvm_name = "mips64", | ||
| 269 | .description = "Mips64 ISA Support", | ||
| 270 | .dependencies = featureSet(&[_]Feature{ | ||
| 271 | .mips32, | ||
| 272 | .mips5, | ||
| 273 | }), | ||
| 274 | }; | ||
| 275 | result[@intFromEnum(Feature.mips64r2)] = .{ | ||
| 276 | .llvm_name = "mips64r2", | ||
| 277 | .description = "Mips64r2 ISA Support", | ||
| 278 | .dependencies = featureSet(&[_]Feature{ | ||
| 279 | .mips32r2, | ||
| 280 | .mips64, | ||
| 281 | }), | ||
| 282 | }; | ||
| 283 | result[@intFromEnum(Feature.mips64r3)] = .{ | ||
| 284 | .llvm_name = "mips64r3", | ||
| 285 | .description = "Mips64r3 ISA Support", | ||
| 286 | .dependencies = featureSet(&[_]Feature{ | ||
| 287 | .mips32r3, | ||
| 288 | .mips64r2, | ||
| 289 | }), | ||
| 290 | }; | ||
| 291 | result[@intFromEnum(Feature.mips64r5)] = .{ | ||
| 292 | .llvm_name = "mips64r5", | ||
| 293 | .description = "Mips64r5 ISA Support", | ||
| 294 | .dependencies = featureSet(&[_]Feature{ | ||
| 295 | .mips32r5, | ||
| 296 | .mips64r3, | ||
| 297 | }), | ||
| 298 | }; | ||
| 299 | result[@intFromEnum(Feature.mips64r6)] = .{ | ||
| 300 | .llvm_name = "mips64r6", | ||
| 301 | .description = "Mips64r6 ISA Support [experimental]", | ||
| 302 | .dependencies = featureSet(&[_]Feature{ | ||
| 303 | .mips32r6, | ||
| 304 | .mips64r5, | ||
| 305 | }), | ||
| 306 | }; | ||
| 307 | result[@intFromEnum(Feature.msa)] = .{ | ||
| 308 | .llvm_name = "msa", | ||
| 309 | .description = "Mips MSA ASE", | ||
| 310 | .dependencies = featureSet(&[_]Feature{}), | ||
| 311 | }; | ||
| 312 | result[@intFromEnum(Feature.mt)] = .{ | ||
| 313 | .llvm_name = "mt", | ||
| 314 | .description = "Mips MT ASE", | ||
| 315 | .dependencies = featureSet(&[_]Feature{}), | ||
| 316 | }; | ||
| 317 | result[@intFromEnum(Feature.nan2008)] = .{ | ||
| 318 | .llvm_name = "nan2008", | ||
| 319 | .description = "IEEE 754-2008 NaN encoding", | ||
| 320 | .dependencies = featureSet(&[_]Feature{}), | ||
| 321 | }; | ||
| 322 | result[@intFromEnum(Feature.noabicalls)] = .{ | ||
| 323 | .llvm_name = "noabicalls", | ||
| 324 | .description = "Disable SVR4-style position-independent code", | ||
| 325 | .dependencies = featureSet(&[_]Feature{}), | ||
| 326 | }; | ||
| 327 | result[@intFromEnum(Feature.nomadd4)] = .{ | ||
| 328 | .llvm_name = "nomadd4", | ||
| 329 | .description = "Disable 4-operand madd.fmt and related instructions", | ||
| 330 | .dependencies = featureSet(&[_]Feature{}), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.nooddspreg)] = .{ | ||
| 333 | .llvm_name = "nooddspreg", | ||
| 334 | .description = "Disable odd numbered single-precision registers", | ||
| 335 | .dependencies = featureSet(&[_]Feature{}), | ||
| 336 | }; | ||
| 337 | result[@intFromEnum(Feature.p5600)] = .{ | ||
| 338 | .llvm_name = "p5600", | ||
| 339 | .description = "The P5600 Processor", | ||
| 340 | .dependencies = featureSet(&[_]Feature{ | ||
| 341 | .mips32r5, | ||
| 342 | }), | ||
| 343 | }; | ||
| 344 | result[@intFromEnum(Feature.ptr64)] = .{ | ||
| 345 | .llvm_name = "ptr64", | ||
| 346 | .description = "Pointers are 64-bit wide", | ||
| 347 | .dependencies = featureSet(&[_]Feature{}), | ||
| 348 | }; | ||
| 349 | result[@intFromEnum(Feature.single_float)] = .{ | ||
| 350 | .llvm_name = "single-float", | ||
| 351 | .description = "Only supports single precision float", | ||
| 352 | .dependencies = featureSet(&[_]Feature{}), | ||
| 353 | }; | ||
| 354 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 355 | .llvm_name = "soft-float", | ||
| 356 | .description = "Does not support floating point instructions", | ||
| 357 | .dependencies = featureSet(&[_]Feature{}), | ||
| 358 | }; | ||
| 359 | result[@intFromEnum(Feature.sym32)] = .{ | ||
| 360 | .llvm_name = "sym32", | ||
| 361 | .description = "Symbols are 32 bit on Mips64", | ||
| 362 | .dependencies = featureSet(&[_]Feature{}), | ||
| 363 | }; | ||
| 364 | result[@intFromEnum(Feature.use_indirect_jump_hazard)] = .{ | ||
| 365 | .llvm_name = "use-indirect-jump-hazard", | ||
| 366 | .description = "Use indirect jump guards to prevent certain speculation based attacks", | ||
| 367 | .dependencies = featureSet(&[_]Feature{}), | ||
| 368 | }; | ||
| 369 | result[@intFromEnum(Feature.use_tcc_in_div)] = .{ | ||
| 370 | .llvm_name = "use-tcc-in-div", | ||
| 371 | .description = "Force the assembler to use trapping", | ||
| 372 | .dependencies = featureSet(&[_]Feature{}), | ||
| 373 | }; | ||
| 374 | result[@intFromEnum(Feature.vfpu)] = .{ | ||
| 375 | .llvm_name = "vfpu", | ||
| 376 | .description = "Enable vector FPU instructions", | ||
| 377 | .dependencies = featureSet(&[_]Feature{}), | ||
| 378 | }; | ||
| 379 | result[@intFromEnum(Feature.virt)] = .{ | ||
| 380 | .llvm_name = "virt", | ||
| 381 | .description = "Mips Virtualization ASE", | ||
| 382 | .dependencies = featureSet(&[_]Feature{}), | ||
| 383 | }; | ||
| 384 | result[@intFromEnum(Feature.xgot)] = .{ | ||
| 385 | .llvm_name = "xgot", | ||
| 386 | .description = "Assume 32-bit GOT", | ||
| 387 | .dependencies = featureSet(&[_]Feature{}), | ||
| 388 | }; | ||
| 389 | const ti = @typeInfo(Feature); | ||
| 390 | for (&result, 0..) |*elem, i| { | ||
| 391 | elem.index = i; | ||
| 392 | elem.name = ti.Enum.fields[i].name; | ||
| 393 | } | ||
| 394 | break :blk result; | ||
| 395 | }; | ||
| 396 | |||
| 397 | pub const cpu = struct { | ||
| 398 | pub const generic = CpuModel{ | ||
| 399 | .name = "generic", | ||
| 400 | .llvm_name = "generic", | ||
| 401 | .features = featureSet(&[_]Feature{ | ||
| 402 | .mips32, | ||
| 403 | }), | ||
| 404 | }; | ||
| 405 | pub const mips1 = CpuModel{ | ||
| 406 | .name = "mips1", | ||
| 407 | .llvm_name = "mips1", | ||
| 408 | .features = featureSet(&[_]Feature{ | ||
| 409 | .mips1, | ||
| 410 | }), | ||
| 411 | }; | ||
| 412 | pub const mips2 = CpuModel{ | ||
| 413 | .name = "mips2", | ||
| 414 | .llvm_name = "mips2", | ||
| 415 | .features = featureSet(&[_]Feature{ | ||
| 416 | .mips2, | ||
| 417 | }), | ||
| 418 | }; | ||
| 419 | pub const mips3 = CpuModel{ | ||
| 420 | .name = "mips3", | ||
| 421 | .llvm_name = "mips3", | ||
| 422 | .features = featureSet(&[_]Feature{ | ||
| 423 | .mips3, | ||
| 424 | }), | ||
| 425 | }; | ||
| 426 | pub const mips32 = CpuModel{ | ||
| 427 | .name = "mips32", | ||
| 428 | .llvm_name = "mips32", | ||
| 429 | .features = featureSet(&[_]Feature{ | ||
| 430 | .mips32, | ||
| 431 | }), | ||
| 432 | }; | ||
| 433 | pub const mips32r2 = CpuModel{ | ||
| 434 | .name = "mips32r2", | ||
| 435 | .llvm_name = "mips32r2", | ||
| 436 | .features = featureSet(&[_]Feature{ | ||
| 437 | .mips32r2, | ||
| 438 | }), | ||
| 439 | }; | ||
| 440 | pub const mips32r3 = CpuModel{ | ||
| 441 | .name = "mips32r3", | ||
| 442 | .llvm_name = "mips32r3", | ||
| 443 | .features = featureSet(&[_]Feature{ | ||
| 444 | .mips32r3, | ||
| 445 | }), | ||
| 446 | }; | ||
| 447 | pub const mips32r5 = CpuModel{ | ||
| 448 | .name = "mips32r5", | ||
| 449 | .llvm_name = "mips32r5", | ||
| 450 | .features = featureSet(&[_]Feature{ | ||
| 451 | .mips32r5, | ||
| 452 | }), | ||
| 453 | }; | ||
| 454 | pub const mips32r6 = CpuModel{ | ||
| 455 | .name = "mips32r6", | ||
| 456 | .llvm_name = "mips32r6", | ||
| 457 | .features = featureSet(&[_]Feature{ | ||
| 458 | .mips32r6, | ||
| 459 | }), | ||
| 460 | }; | ||
| 461 | pub const mips4 = CpuModel{ | ||
| 462 | .name = "mips4", | ||
| 463 | .llvm_name = "mips4", | ||
| 464 | .features = featureSet(&[_]Feature{ | ||
| 465 | .mips4, | ||
| 466 | }), | ||
| 467 | }; | ||
| 468 | pub const mips5 = CpuModel{ | ||
| 469 | .name = "mips5", | ||
| 470 | .llvm_name = "mips5", | ||
| 471 | .features = featureSet(&[_]Feature{ | ||
| 472 | .mips5, | ||
| 473 | }), | ||
| 474 | }; | ||
| 475 | pub const mips64 = CpuModel{ | ||
| 476 | .name = "mips64", | ||
| 477 | .llvm_name = "mips64", | ||
| 478 | .features = featureSet(&[_]Feature{ | ||
| 479 | .mips64, | ||
| 480 | }), | ||
| 481 | }; | ||
| 482 | pub const mips64r2 = CpuModel{ | ||
| 483 | .name = "mips64r2", | ||
| 484 | .llvm_name = "mips64r2", | ||
| 485 | .features = featureSet(&[_]Feature{ | ||
| 486 | .mips64r2, | ||
| 487 | }), | ||
| 488 | }; | ||
| 489 | pub const mips64r3 = CpuModel{ | ||
| 490 | .name = "mips64r3", | ||
| 491 | .llvm_name = "mips64r3", | ||
| 492 | .features = featureSet(&[_]Feature{ | ||
| 493 | .mips64r3, | ||
| 494 | }), | ||
| 495 | }; | ||
| 496 | pub const mips64r5 = CpuModel{ | ||
| 497 | .name = "mips64r5", | ||
| 498 | .llvm_name = "mips64r5", | ||
| 499 | .features = featureSet(&[_]Feature{ | ||
| 500 | .mips64r5, | ||
| 501 | }), | ||
| 502 | }; | ||
| 503 | pub const mips64r6 = CpuModel{ | ||
| 504 | .name = "mips64r6", | ||
| 505 | .llvm_name = "mips64r6", | ||
| 506 | .features = featureSet(&[_]Feature{ | ||
| 507 | .mips64r6, | ||
| 508 | }), | ||
| 509 | }; | ||
| 510 | pub const octeon = CpuModel{ | ||
| 511 | .name = "octeon", | ||
| 512 | .llvm_name = "octeon", | ||
| 513 | .features = featureSet(&[_]Feature{ | ||
| 514 | .cnmips, | ||
| 515 | }), | ||
| 516 | }; | ||
| 517 | pub const @"octeon+" = CpuModel{ | ||
| 518 | .name = "octeon+", | ||
| 519 | .llvm_name = "octeon+", | ||
| 520 | .features = featureSet(&[_]Feature{ | ||
| 521 | .cnmipsp, | ||
| 522 | }), | ||
| 523 | }; | ||
| 524 | pub const p5600 = CpuModel{ | ||
| 525 | .name = "p5600", | ||
| 526 | .llvm_name = "p5600", | ||
| 527 | .features = featureSet(&[_]Feature{ | ||
| 528 | .p5600, | ||
| 529 | }), | ||
| 530 | }; | ||
| 531 | }; | ||
lib/std/target/msp430.zig deleted-69
| ... | @@ -1,69 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | ext, | ||
| 9 | hwmult16, | ||
| 10 | hwmult32, | ||
| 11 | hwmultf5, | ||
| 12 | }; | ||
| 13 | |||
| 14 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 15 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 16 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 17 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 18 | |||
| 19 | pub const all_features = blk: { | ||
| 20 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 21 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 22 | var result: [len]CpuFeature = undefined; | ||
| 23 | result[@intFromEnum(Feature.ext)] = .{ | ||
| 24 | .llvm_name = "ext", | ||
| 25 | .description = "Enable MSP430-X extensions", | ||
| 26 | .dependencies = featureSet(&[_]Feature{}), | ||
| 27 | }; | ||
| 28 | result[@intFromEnum(Feature.hwmult16)] = .{ | ||
| 29 | .llvm_name = "hwmult16", | ||
| 30 | .description = "Enable 16-bit hardware multiplier", | ||
| 31 | .dependencies = featureSet(&[_]Feature{}), | ||
| 32 | }; | ||
| 33 | result[@intFromEnum(Feature.hwmult32)] = .{ | ||
| 34 | .llvm_name = "hwmult32", | ||
| 35 | .description = "Enable 32-bit hardware multiplier", | ||
| 36 | .dependencies = featureSet(&[_]Feature{}), | ||
| 37 | }; | ||
| 38 | result[@intFromEnum(Feature.hwmultf5)] = .{ | ||
| 39 | .llvm_name = "hwmultf5", | ||
| 40 | .description = "Enable F5 series hardware multiplier", | ||
| 41 | .dependencies = featureSet(&[_]Feature{}), | ||
| 42 | }; | ||
| 43 | const ti = @typeInfo(Feature); | ||
| 44 | for (&result, 0..) |*elem, i| { | ||
| 45 | elem.index = i; | ||
| 46 | elem.name = ti.Enum.fields[i].name; | ||
| 47 | } | ||
| 48 | break :blk result; | ||
| 49 | }; | ||
| 50 | |||
| 51 | pub const cpu = struct { | ||
| 52 | pub const generic = CpuModel{ | ||
| 53 | .name = "generic", | ||
| 54 | .llvm_name = "generic", | ||
| 55 | .features = featureSet(&[_]Feature{}), | ||
| 56 | }; | ||
| 57 | pub const msp430 = CpuModel{ | ||
| 58 | .name = "msp430", | ||
| 59 | .llvm_name = "msp430", | ||
| 60 | .features = featureSet(&[_]Feature{}), | ||
| 61 | }; | ||
| 62 | pub const msp430x = CpuModel{ | ||
| 63 | .name = "msp430x", | ||
| 64 | .llvm_name = "msp430x", | ||
| 65 | .features = featureSet(&[_]Feature{ | ||
| 66 | .ext, | ||
| 67 | }), | ||
| 68 | }; | ||
| 69 | }; | ||
lib/std/target/nvptx.zig deleted-439
| ... | @@ -1,439 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | ptx32, | ||
| 9 | ptx40, | ||
| 10 | ptx41, | ||
| 11 | ptx42, | ||
| 12 | ptx43, | ||
| 13 | ptx50, | ||
| 14 | ptx60, | ||
| 15 | ptx61, | ||
| 16 | ptx63, | ||
| 17 | ptx64, | ||
| 18 | ptx65, | ||
| 19 | ptx70, | ||
| 20 | ptx71, | ||
| 21 | ptx72, | ||
| 22 | ptx73, | ||
| 23 | ptx74, | ||
| 24 | ptx75, | ||
| 25 | ptx76, | ||
| 26 | ptx77, | ||
| 27 | ptx78, | ||
| 28 | ptx80, | ||
| 29 | ptx81, | ||
| 30 | sm_20, | ||
| 31 | sm_21, | ||
| 32 | sm_30, | ||
| 33 | sm_32, | ||
| 34 | sm_35, | ||
| 35 | sm_37, | ||
| 36 | sm_50, | ||
| 37 | sm_52, | ||
| 38 | sm_53, | ||
| 39 | sm_60, | ||
| 40 | sm_61, | ||
| 41 | sm_62, | ||
| 42 | sm_70, | ||
| 43 | sm_72, | ||
| 44 | sm_75, | ||
| 45 | sm_80, | ||
| 46 | sm_86, | ||
| 47 | sm_87, | ||
| 48 | sm_89, | ||
| 49 | sm_90, | ||
| 50 | }; | ||
| 51 | |||
| 52 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 53 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 54 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 55 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 56 | |||
| 57 | pub const all_features = blk: { | ||
| 58 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 59 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 60 | var result: [len]CpuFeature = undefined; | ||
| 61 | result[@intFromEnum(Feature.ptx32)] = .{ | ||
| 62 | .llvm_name = "ptx32", | ||
| 63 | .description = "Use PTX version 32", | ||
| 64 | .dependencies = featureSet(&[_]Feature{}), | ||
| 65 | }; | ||
| 66 | result[@intFromEnum(Feature.ptx40)] = .{ | ||
| 67 | .llvm_name = "ptx40", | ||
| 68 | .description = "Use PTX version 40", | ||
| 69 | .dependencies = featureSet(&[_]Feature{}), | ||
| 70 | }; | ||
| 71 | result[@intFromEnum(Feature.ptx41)] = .{ | ||
| 72 | .llvm_name = "ptx41", | ||
| 73 | .description = "Use PTX version 41", | ||
| 74 | .dependencies = featureSet(&[_]Feature{}), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.ptx42)] = .{ | ||
| 77 | .llvm_name = "ptx42", | ||
| 78 | .description = "Use PTX version 42", | ||
| 79 | .dependencies = featureSet(&[_]Feature{}), | ||
| 80 | }; | ||
| 81 | result[@intFromEnum(Feature.ptx43)] = .{ | ||
| 82 | .llvm_name = "ptx43", | ||
| 83 | .description = "Use PTX version 43", | ||
| 84 | .dependencies = featureSet(&[_]Feature{}), | ||
| 85 | }; | ||
| 86 | result[@intFromEnum(Feature.ptx50)] = .{ | ||
| 87 | .llvm_name = "ptx50", | ||
| 88 | .description = "Use PTX version 50", | ||
| 89 | .dependencies = featureSet(&[_]Feature{}), | ||
| 90 | }; | ||
| 91 | result[@intFromEnum(Feature.ptx60)] = .{ | ||
| 92 | .llvm_name = "ptx60", | ||
| 93 | .description = "Use PTX version 60", | ||
| 94 | .dependencies = featureSet(&[_]Feature{}), | ||
| 95 | }; | ||
| 96 | result[@intFromEnum(Feature.ptx61)] = .{ | ||
| 97 | .llvm_name = "ptx61", | ||
| 98 | .description = "Use PTX version 61", | ||
| 99 | .dependencies = featureSet(&[_]Feature{}), | ||
| 100 | }; | ||
| 101 | result[@intFromEnum(Feature.ptx63)] = .{ | ||
| 102 | .llvm_name = "ptx63", | ||
| 103 | .description = "Use PTX version 63", | ||
| 104 | .dependencies = featureSet(&[_]Feature{}), | ||
| 105 | }; | ||
| 106 | result[@intFromEnum(Feature.ptx64)] = .{ | ||
| 107 | .llvm_name = "ptx64", | ||
| 108 | .description = "Use PTX version 64", | ||
| 109 | .dependencies = featureSet(&[_]Feature{}), | ||
| 110 | }; | ||
| 111 | result[@intFromEnum(Feature.ptx65)] = .{ | ||
| 112 | .llvm_name = "ptx65", | ||
| 113 | .description = "Use PTX version 65", | ||
| 114 | .dependencies = featureSet(&[_]Feature{}), | ||
| 115 | }; | ||
| 116 | result[@intFromEnum(Feature.ptx70)] = .{ | ||
| 117 | .llvm_name = "ptx70", | ||
| 118 | .description = "Use PTX version 70", | ||
| 119 | .dependencies = featureSet(&[_]Feature{}), | ||
| 120 | }; | ||
| 121 | result[@intFromEnum(Feature.ptx71)] = .{ | ||
| 122 | .llvm_name = "ptx71", | ||
| 123 | .description = "Use PTX version 71", | ||
| 124 | .dependencies = featureSet(&[_]Feature{}), | ||
| 125 | }; | ||
| 126 | result[@intFromEnum(Feature.ptx72)] = .{ | ||
| 127 | .llvm_name = "ptx72", | ||
| 128 | .description = "Use PTX version 72", | ||
| 129 | .dependencies = featureSet(&[_]Feature{}), | ||
| 130 | }; | ||
| 131 | result[@intFromEnum(Feature.ptx73)] = .{ | ||
| 132 | .llvm_name = "ptx73", | ||
| 133 | .description = "Use PTX version 73", | ||
| 134 | .dependencies = featureSet(&[_]Feature{}), | ||
| 135 | }; | ||
| 136 | result[@intFromEnum(Feature.ptx74)] = .{ | ||
| 137 | .llvm_name = "ptx74", | ||
| 138 | .description = "Use PTX version 74", | ||
| 139 | .dependencies = featureSet(&[_]Feature{}), | ||
| 140 | }; | ||
| 141 | result[@intFromEnum(Feature.ptx75)] = .{ | ||
| 142 | .llvm_name = "ptx75", | ||
| 143 | .description = "Use PTX version 75", | ||
| 144 | .dependencies = featureSet(&[_]Feature{}), | ||
| 145 | }; | ||
| 146 | result[@intFromEnum(Feature.ptx76)] = .{ | ||
| 147 | .llvm_name = "ptx76", | ||
| 148 | .description = "Use PTX version 76", | ||
| 149 | .dependencies = featureSet(&[_]Feature{}), | ||
| 150 | }; | ||
| 151 | result[@intFromEnum(Feature.ptx77)] = .{ | ||
| 152 | .llvm_name = "ptx77", | ||
| 153 | .description = "Use PTX version 77", | ||
| 154 | .dependencies = featureSet(&[_]Feature{}), | ||
| 155 | }; | ||
| 156 | result[@intFromEnum(Feature.ptx78)] = .{ | ||
| 157 | .llvm_name = "ptx78", | ||
| 158 | .description = "Use PTX version 78", | ||
| 159 | .dependencies = featureSet(&[_]Feature{}), | ||
| 160 | }; | ||
| 161 | result[@intFromEnum(Feature.ptx80)] = .{ | ||
| 162 | .llvm_name = "ptx80", | ||
| 163 | .description = "Use PTX version 80", | ||
| 164 | .dependencies = featureSet(&[_]Feature{}), | ||
| 165 | }; | ||
| 166 | result[@intFromEnum(Feature.ptx81)] = .{ | ||
| 167 | .llvm_name = "ptx81", | ||
| 168 | .description = "Use PTX version 81", | ||
| 169 | .dependencies = featureSet(&[_]Feature{}), | ||
| 170 | }; | ||
| 171 | result[@intFromEnum(Feature.sm_20)] = .{ | ||
| 172 | .llvm_name = "sm_20", | ||
| 173 | .description = "Target SM 20", | ||
| 174 | .dependencies = featureSet(&[_]Feature{}), | ||
| 175 | }; | ||
| 176 | result[@intFromEnum(Feature.sm_21)] = .{ | ||
| 177 | .llvm_name = "sm_21", | ||
| 178 | .description = "Target SM 21", | ||
| 179 | .dependencies = featureSet(&[_]Feature{}), | ||
| 180 | }; | ||
| 181 | result[@intFromEnum(Feature.sm_30)] = .{ | ||
| 182 | .llvm_name = "sm_30", | ||
| 183 | .description = "Target SM 30", | ||
| 184 | .dependencies = featureSet(&[_]Feature{}), | ||
| 185 | }; | ||
| 186 | result[@intFromEnum(Feature.sm_32)] = .{ | ||
| 187 | .llvm_name = "sm_32", | ||
| 188 | .description = "Target SM 32", | ||
| 189 | .dependencies = featureSet(&[_]Feature{}), | ||
| 190 | }; | ||
| 191 | result[@intFromEnum(Feature.sm_35)] = .{ | ||
| 192 | .llvm_name = "sm_35", | ||
| 193 | .description = "Target SM 35", | ||
| 194 | .dependencies = featureSet(&[_]Feature{}), | ||
| 195 | }; | ||
| 196 | result[@intFromEnum(Feature.sm_37)] = .{ | ||
| 197 | .llvm_name = "sm_37", | ||
| 198 | .description = "Target SM 37", | ||
| 199 | .dependencies = featureSet(&[_]Feature{}), | ||
| 200 | }; | ||
| 201 | result[@intFromEnum(Feature.sm_50)] = .{ | ||
| 202 | .llvm_name = "sm_50", | ||
| 203 | .description = "Target SM 50", | ||
| 204 | .dependencies = featureSet(&[_]Feature{}), | ||
| 205 | }; | ||
| 206 | result[@intFromEnum(Feature.sm_52)] = .{ | ||
| 207 | .llvm_name = "sm_52", | ||
| 208 | .description = "Target SM 52", | ||
| 209 | .dependencies = featureSet(&[_]Feature{}), | ||
| 210 | }; | ||
| 211 | result[@intFromEnum(Feature.sm_53)] = .{ | ||
| 212 | .llvm_name = "sm_53", | ||
| 213 | .description = "Target SM 53", | ||
| 214 | .dependencies = featureSet(&[_]Feature{}), | ||
| 215 | }; | ||
| 216 | result[@intFromEnum(Feature.sm_60)] = .{ | ||
| 217 | .llvm_name = "sm_60", | ||
| 218 | .description = "Target SM 60", | ||
| 219 | .dependencies = featureSet(&[_]Feature{}), | ||
| 220 | }; | ||
| 221 | result[@intFromEnum(Feature.sm_61)] = .{ | ||
| 222 | .llvm_name = "sm_61", | ||
| 223 | .description = "Target SM 61", | ||
| 224 | .dependencies = featureSet(&[_]Feature{}), | ||
| 225 | }; | ||
| 226 | result[@intFromEnum(Feature.sm_62)] = .{ | ||
| 227 | .llvm_name = "sm_62", | ||
| 228 | .description = "Target SM 62", | ||
| 229 | .dependencies = featureSet(&[_]Feature{}), | ||
| 230 | }; | ||
| 231 | result[@intFromEnum(Feature.sm_70)] = .{ | ||
| 232 | .llvm_name = "sm_70", | ||
| 233 | .description = "Target SM 70", | ||
| 234 | .dependencies = featureSet(&[_]Feature{}), | ||
| 235 | }; | ||
| 236 | result[@intFromEnum(Feature.sm_72)] = .{ | ||
| 237 | .llvm_name = "sm_72", | ||
| 238 | .description = "Target SM 72", | ||
| 239 | .dependencies = featureSet(&[_]Feature{}), | ||
| 240 | }; | ||
| 241 | result[@intFromEnum(Feature.sm_75)] = .{ | ||
| 242 | .llvm_name = "sm_75", | ||
| 243 | .description = "Target SM 75", | ||
| 244 | .dependencies = featureSet(&[_]Feature{}), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.sm_80)] = .{ | ||
| 247 | .llvm_name = "sm_80", | ||
| 248 | .description = "Target SM 80", | ||
| 249 | .dependencies = featureSet(&[_]Feature{}), | ||
| 250 | }; | ||
| 251 | result[@intFromEnum(Feature.sm_86)] = .{ | ||
| 252 | .llvm_name = "sm_86", | ||
| 253 | .description = "Target SM 86", | ||
| 254 | .dependencies = featureSet(&[_]Feature{}), | ||
| 255 | }; | ||
| 256 | result[@intFromEnum(Feature.sm_87)] = .{ | ||
| 257 | .llvm_name = "sm_87", | ||
| 258 | .description = "Target SM 87", | ||
| 259 | .dependencies = featureSet(&[_]Feature{}), | ||
| 260 | }; | ||
| 261 | result[@intFromEnum(Feature.sm_89)] = .{ | ||
| 262 | .llvm_name = "sm_89", | ||
| 263 | .description = "Target SM 89", | ||
| 264 | .dependencies = featureSet(&[_]Feature{}), | ||
| 265 | }; | ||
| 266 | result[@intFromEnum(Feature.sm_90)] = .{ | ||
| 267 | .llvm_name = "sm_90", | ||
| 268 | .description = "Target SM 90", | ||
| 269 | .dependencies = featureSet(&[_]Feature{}), | ||
| 270 | }; | ||
| 271 | const ti = @typeInfo(Feature); | ||
| 272 | for (&result, 0..) |*elem, i| { | ||
| 273 | elem.index = i; | ||
| 274 | elem.name = ti.Enum.fields[i].name; | ||
| 275 | } | ||
| 276 | break :blk result; | ||
| 277 | }; | ||
| 278 | |||
| 279 | pub const cpu = struct { | ||
| 280 | pub const sm_20 = CpuModel{ | ||
| 281 | .name = "sm_20", | ||
| 282 | .llvm_name = "sm_20", | ||
| 283 | .features = featureSet(&[_]Feature{ | ||
| 284 | .ptx32, | ||
| 285 | .sm_20, | ||
| 286 | }), | ||
| 287 | }; | ||
| 288 | pub const sm_21 = CpuModel{ | ||
| 289 | .name = "sm_21", | ||
| 290 | .llvm_name = "sm_21", | ||
| 291 | .features = featureSet(&[_]Feature{ | ||
| 292 | .ptx32, | ||
| 293 | .sm_21, | ||
| 294 | }), | ||
| 295 | }; | ||
| 296 | pub const sm_30 = CpuModel{ | ||
| 297 | .name = "sm_30", | ||
| 298 | .llvm_name = "sm_30", | ||
| 299 | .features = featureSet(&[_]Feature{ | ||
| 300 | .sm_30, | ||
| 301 | }), | ||
| 302 | }; | ||
| 303 | pub const sm_32 = CpuModel{ | ||
| 304 | .name = "sm_32", | ||
| 305 | .llvm_name = "sm_32", | ||
| 306 | .features = featureSet(&[_]Feature{ | ||
| 307 | .ptx40, | ||
| 308 | .sm_32, | ||
| 309 | }), | ||
| 310 | }; | ||
| 311 | pub const sm_35 = CpuModel{ | ||
| 312 | .name = "sm_35", | ||
| 313 | .llvm_name = "sm_35", | ||
| 314 | .features = featureSet(&[_]Feature{ | ||
| 315 | .ptx32, | ||
| 316 | .sm_35, | ||
| 317 | }), | ||
| 318 | }; | ||
| 319 | pub const sm_37 = CpuModel{ | ||
| 320 | .name = "sm_37", | ||
| 321 | .llvm_name = "sm_37", | ||
| 322 | .features = featureSet(&[_]Feature{ | ||
| 323 | .ptx41, | ||
| 324 | .sm_37, | ||
| 325 | }), | ||
| 326 | }; | ||
| 327 | pub const sm_50 = CpuModel{ | ||
| 328 | .name = "sm_50", | ||
| 329 | .llvm_name = "sm_50", | ||
| 330 | .features = featureSet(&[_]Feature{ | ||
| 331 | .ptx40, | ||
| 332 | .sm_50, | ||
| 333 | }), | ||
| 334 | }; | ||
| 335 | pub const sm_52 = CpuModel{ | ||
| 336 | .name = "sm_52", | ||
| 337 | .llvm_name = "sm_52", | ||
| 338 | .features = featureSet(&[_]Feature{ | ||
| 339 | .ptx41, | ||
| 340 | .sm_52, | ||
| 341 | }), | ||
| 342 | }; | ||
| 343 | pub const sm_53 = CpuModel{ | ||
| 344 | .name = "sm_53", | ||
| 345 | .llvm_name = "sm_53", | ||
| 346 | .features = featureSet(&[_]Feature{ | ||
| 347 | .ptx42, | ||
| 348 | .sm_53, | ||
| 349 | }), | ||
| 350 | }; | ||
| 351 | pub const sm_60 = CpuModel{ | ||
| 352 | .name = "sm_60", | ||
| 353 | .llvm_name = "sm_60", | ||
| 354 | .features = featureSet(&[_]Feature{ | ||
| 355 | .ptx50, | ||
| 356 | .sm_60, | ||
| 357 | }), | ||
| 358 | }; | ||
| 359 | pub const sm_61 = CpuModel{ | ||
| 360 | .name = "sm_61", | ||
| 361 | .llvm_name = "sm_61", | ||
| 362 | .features = featureSet(&[_]Feature{ | ||
| 363 | .ptx50, | ||
| 364 | .sm_61, | ||
| 365 | }), | ||
| 366 | }; | ||
| 367 | pub const sm_62 = CpuModel{ | ||
| 368 | .name = "sm_62", | ||
| 369 | .llvm_name = "sm_62", | ||
| 370 | .features = featureSet(&[_]Feature{ | ||
| 371 | .ptx50, | ||
| 372 | .sm_62, | ||
| 373 | }), | ||
| 374 | }; | ||
| 375 | pub const sm_70 = CpuModel{ | ||
| 376 | .name = "sm_70", | ||
| 377 | .llvm_name = "sm_70", | ||
| 378 | .features = featureSet(&[_]Feature{ | ||
| 379 | .ptx60, | ||
| 380 | .sm_70, | ||
| 381 | }), | ||
| 382 | }; | ||
| 383 | pub const sm_72 = CpuModel{ | ||
| 384 | .name = "sm_72", | ||
| 385 | .llvm_name = "sm_72", | ||
| 386 | .features = featureSet(&[_]Feature{ | ||
| 387 | .ptx61, | ||
| 388 | .sm_72, | ||
| 389 | }), | ||
| 390 | }; | ||
| 391 | pub const sm_75 = CpuModel{ | ||
| 392 | .name = "sm_75", | ||
| 393 | .llvm_name = "sm_75", | ||
| 394 | .features = featureSet(&[_]Feature{ | ||
| 395 | .ptx63, | ||
| 396 | .sm_75, | ||
| 397 | }), | ||
| 398 | }; | ||
| 399 | pub const sm_80 = CpuModel{ | ||
| 400 | .name = "sm_80", | ||
| 401 | .llvm_name = "sm_80", | ||
| 402 | .features = featureSet(&[_]Feature{ | ||
| 403 | .ptx70, | ||
| 404 | .sm_80, | ||
| 405 | }), | ||
| 406 | }; | ||
| 407 | pub const sm_86 = CpuModel{ | ||
| 408 | .name = "sm_86", | ||
| 409 | .llvm_name = "sm_86", | ||
| 410 | .features = featureSet(&[_]Feature{ | ||
| 411 | .ptx71, | ||
| 412 | .sm_86, | ||
| 413 | }), | ||
| 414 | }; | ||
| 415 | pub const sm_87 = CpuModel{ | ||
| 416 | .name = "sm_87", | ||
| 417 | .llvm_name = "sm_87", | ||
| 418 | .features = featureSet(&[_]Feature{ | ||
| 419 | .ptx74, | ||
| 420 | .sm_87, | ||
| 421 | }), | ||
| 422 | }; | ||
| 423 | pub const sm_89 = CpuModel{ | ||
| 424 | .name = "sm_89", | ||
| 425 | .llvm_name = "sm_89", | ||
| 426 | .features = featureSet(&[_]Feature{ | ||
| 427 | .ptx78, | ||
| 428 | .sm_89, | ||
| 429 | }), | ||
| 430 | }; | ||
| 431 | pub const sm_90 = CpuModel{ | ||
| 432 | .name = "sm_90", | ||
| 433 | .llvm_name = "sm_90", | ||
| 434 | .features = featureSet(&[_]Feature{ | ||
| 435 | .ptx78, | ||
| 436 | .sm_90, | ||
| 437 | }), | ||
| 438 | }; | ||
| 439 | }; | ||
lib/std/target/powerpc.zig deleted-1192
| ... | @@ -1,1192 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"64bit", | ||
| 9 | @"64bitregs", | ||
| 10 | aix, | ||
| 11 | allow_unaligned_fp_access, | ||
| 12 | altivec, | ||
| 13 | booke, | ||
| 14 | bpermd, | ||
| 15 | cmpb, | ||
| 16 | crbits, | ||
| 17 | crypto, | ||
| 18 | direct_move, | ||
| 19 | e500, | ||
| 20 | efpu2, | ||
| 21 | extdiv, | ||
| 22 | fast_MFLR, | ||
| 23 | fcpsgn, | ||
| 24 | float128, | ||
| 25 | fpcvt, | ||
| 26 | fprnd, | ||
| 27 | fpu, | ||
| 28 | fre, | ||
| 29 | fres, | ||
| 30 | frsqrte, | ||
| 31 | frsqrtes, | ||
| 32 | fsqrt, | ||
| 33 | fuse_add_logical, | ||
| 34 | fuse_addi_load, | ||
| 35 | fuse_addis_load, | ||
| 36 | fuse_arith_add, | ||
| 37 | fuse_back2back, | ||
| 38 | fuse_cmp, | ||
| 39 | fuse_logical, | ||
| 40 | fuse_logical_add, | ||
| 41 | fuse_sha3, | ||
| 42 | fuse_store, | ||
| 43 | fuse_wideimm, | ||
| 44 | fuse_zeromove, | ||
| 45 | fusion, | ||
| 46 | hard_float, | ||
| 47 | htm, | ||
| 48 | icbt, | ||
| 49 | invariant_function_descriptors, | ||
| 50 | isa_future_instructions, | ||
| 51 | isa_v206_instructions, | ||
| 52 | isa_v207_instructions, | ||
| 53 | isa_v30_instructions, | ||
| 54 | isa_v31_instructions, | ||
| 55 | isel, | ||
| 56 | ldbrx, | ||
| 57 | lfiwax, | ||
| 58 | longcall, | ||
| 59 | mfocrf, | ||
| 60 | mma, | ||
| 61 | modern_aix_as, | ||
| 62 | msync, | ||
| 63 | paired_vector_memops, | ||
| 64 | partword_atomics, | ||
| 65 | pcrelative_memops, | ||
| 66 | popcntd, | ||
| 67 | power10_vector, | ||
| 68 | power8_altivec, | ||
| 69 | power8_vector, | ||
| 70 | power9_altivec, | ||
| 71 | power9_vector, | ||
| 72 | ppc4xx, | ||
| 73 | ppc6xx, | ||
| 74 | ppc_postra_sched, | ||
| 75 | ppc_prera_sched, | ||
| 76 | predictable_select_expensive, | ||
| 77 | prefix_instrs, | ||
| 78 | privileged, | ||
| 79 | quadword_atomics, | ||
| 80 | recipprec, | ||
| 81 | rop_protect, | ||
| 82 | secure_plt, | ||
| 83 | slow_popcntd, | ||
| 84 | spe, | ||
| 85 | stfiwx, | ||
| 86 | two_const_nr, | ||
| 87 | vectors_use_two_units, | ||
| 88 | vsx, | ||
| 89 | }; | ||
| 90 | |||
| 91 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 92 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 93 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 94 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 95 | |||
| 96 | pub const all_features = blk: { | ||
| 97 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 98 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 99 | var result: [len]CpuFeature = undefined; | ||
| 100 | result[@intFromEnum(Feature.@"64bit")] = .{ | ||
| 101 | .llvm_name = "64bit", | ||
| 102 | .description = "Enable 64-bit instructions", | ||
| 103 | .dependencies = featureSet(&[_]Feature{}), | ||
| 104 | }; | ||
| 105 | result[@intFromEnum(Feature.@"64bitregs")] = .{ | ||
| 106 | .llvm_name = "64bitregs", | ||
| 107 | .description = "Enable 64-bit registers usage for ppc32 [beta]", | ||
| 108 | .dependencies = featureSet(&[_]Feature{}), | ||
| 109 | }; | ||
| 110 | result[@intFromEnum(Feature.aix)] = .{ | ||
| 111 | .llvm_name = "aix", | ||
| 112 | .description = "AIX OS", | ||
| 113 | .dependencies = featureSet(&[_]Feature{}), | ||
| 114 | }; | ||
| 115 | result[@intFromEnum(Feature.allow_unaligned_fp_access)] = .{ | ||
| 116 | .llvm_name = "allow-unaligned-fp-access", | ||
| 117 | .description = "CPU does not trap on unaligned FP access", | ||
| 118 | .dependencies = featureSet(&[_]Feature{}), | ||
| 119 | }; | ||
| 120 | result[@intFromEnum(Feature.altivec)] = .{ | ||
| 121 | .llvm_name = "altivec", | ||
| 122 | .description = "Enable Altivec instructions", | ||
| 123 | .dependencies = featureSet(&[_]Feature{ | ||
| 124 | .fpu, | ||
| 125 | }), | ||
| 126 | }; | ||
| 127 | result[@intFromEnum(Feature.booke)] = .{ | ||
| 128 | .llvm_name = "booke", | ||
| 129 | .description = "Enable Book E instructions", | ||
| 130 | .dependencies = featureSet(&[_]Feature{ | ||
| 131 | .icbt, | ||
| 132 | }), | ||
| 133 | }; | ||
| 134 | result[@intFromEnum(Feature.bpermd)] = .{ | ||
| 135 | .llvm_name = "bpermd", | ||
| 136 | .description = "Enable the bpermd instruction", | ||
| 137 | .dependencies = featureSet(&[_]Feature{}), | ||
| 138 | }; | ||
| 139 | result[@intFromEnum(Feature.cmpb)] = .{ | ||
| 140 | .llvm_name = "cmpb", | ||
| 141 | .description = "Enable the cmpb instruction", | ||
| 142 | .dependencies = featureSet(&[_]Feature{}), | ||
| 143 | }; | ||
| 144 | result[@intFromEnum(Feature.crbits)] = .{ | ||
| 145 | .llvm_name = "crbits", | ||
| 146 | .description = "Use condition-register bits individually", | ||
| 147 | .dependencies = featureSet(&[_]Feature{}), | ||
| 148 | }; | ||
| 149 | result[@intFromEnum(Feature.crypto)] = .{ | ||
| 150 | .llvm_name = "crypto", | ||
| 151 | .description = "Enable POWER8 Crypto instructions", | ||
| 152 | .dependencies = featureSet(&[_]Feature{ | ||
| 153 | .power8_altivec, | ||
| 154 | }), | ||
| 155 | }; | ||
| 156 | result[@intFromEnum(Feature.direct_move)] = .{ | ||
| 157 | .llvm_name = "direct-move", | ||
| 158 | .description = "Enable Power8 direct move instructions", | ||
| 159 | .dependencies = featureSet(&[_]Feature{ | ||
| 160 | .vsx, | ||
| 161 | }), | ||
| 162 | }; | ||
| 163 | result[@intFromEnum(Feature.e500)] = .{ | ||
| 164 | .llvm_name = "e500", | ||
| 165 | .description = "Enable E500/E500mc instructions", | ||
| 166 | .dependencies = featureSet(&[_]Feature{}), | ||
| 167 | }; | ||
| 168 | result[@intFromEnum(Feature.efpu2)] = .{ | ||
| 169 | .llvm_name = "efpu2", | ||
| 170 | .description = "Enable Embedded Floating-Point APU 2 instructions", | ||
| 171 | .dependencies = featureSet(&[_]Feature{ | ||
| 172 | .spe, | ||
| 173 | }), | ||
| 174 | }; | ||
| 175 | result[@intFromEnum(Feature.extdiv)] = .{ | ||
| 176 | .llvm_name = "extdiv", | ||
| 177 | .description = "Enable extended divide instructions", | ||
| 178 | .dependencies = featureSet(&[_]Feature{}), | ||
| 179 | }; | ||
| 180 | result[@intFromEnum(Feature.fast_MFLR)] = .{ | ||
| 181 | .llvm_name = "fast-MFLR", | ||
| 182 | .description = "MFLR is a fast instruction", | ||
| 183 | .dependencies = featureSet(&[_]Feature{}), | ||
| 184 | }; | ||
| 185 | result[@intFromEnum(Feature.fcpsgn)] = .{ | ||
| 186 | .llvm_name = "fcpsgn", | ||
| 187 | .description = "Enable the fcpsgn instruction", | ||
| 188 | .dependencies = featureSet(&[_]Feature{ | ||
| 189 | .fpu, | ||
| 190 | }), | ||
| 191 | }; | ||
| 192 | result[@intFromEnum(Feature.float128)] = .{ | ||
| 193 | .llvm_name = "float128", | ||
| 194 | .description = "Enable the __float128 data type for IEEE-754R Binary128.", | ||
| 195 | .dependencies = featureSet(&[_]Feature{ | ||
| 196 | .vsx, | ||
| 197 | }), | ||
| 198 | }; | ||
| 199 | result[@intFromEnum(Feature.fpcvt)] = .{ | ||
| 200 | .llvm_name = "fpcvt", | ||
| 201 | .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", | ||
| 202 | .dependencies = featureSet(&[_]Feature{ | ||
| 203 | .fpu, | ||
| 204 | }), | ||
| 205 | }; | ||
| 206 | result[@intFromEnum(Feature.fprnd)] = .{ | ||
| 207 | .llvm_name = "fprnd", | ||
| 208 | .description = "Enable the fri[mnpz] instructions", | ||
| 209 | .dependencies = featureSet(&[_]Feature{ | ||
| 210 | .fpu, | ||
| 211 | }), | ||
| 212 | }; | ||
| 213 | result[@intFromEnum(Feature.fpu)] = .{ | ||
| 214 | .llvm_name = "fpu", | ||
| 215 | .description = "Enable classic FPU instructions", | ||
| 216 | .dependencies = featureSet(&[_]Feature{ | ||
| 217 | .hard_float, | ||
| 218 | }), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.fre)] = .{ | ||
| 221 | .llvm_name = "fre", | ||
| 222 | .description = "Enable the fre instruction", | ||
| 223 | .dependencies = featureSet(&[_]Feature{ | ||
| 224 | .fpu, | ||
| 225 | }), | ||
| 226 | }; | ||
| 227 | result[@intFromEnum(Feature.fres)] = .{ | ||
| 228 | .llvm_name = "fres", | ||
| 229 | .description = "Enable the fres instruction", | ||
| 230 | .dependencies = featureSet(&[_]Feature{ | ||
| 231 | .fpu, | ||
| 232 | }), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.frsqrte)] = .{ | ||
| 235 | .llvm_name = "frsqrte", | ||
| 236 | .description = "Enable the frsqrte instruction", | ||
| 237 | .dependencies = featureSet(&[_]Feature{ | ||
| 238 | .fpu, | ||
| 239 | }), | ||
| 240 | }; | ||
| 241 | result[@intFromEnum(Feature.frsqrtes)] = .{ | ||
| 242 | .llvm_name = "frsqrtes", | ||
| 243 | .description = "Enable the frsqrtes instruction", | ||
| 244 | .dependencies = featureSet(&[_]Feature{ | ||
| 245 | .fpu, | ||
| 246 | }), | ||
| 247 | }; | ||
| 248 | result[@intFromEnum(Feature.fsqrt)] = .{ | ||
| 249 | .llvm_name = "fsqrt", | ||
| 250 | .description = "Enable the fsqrt instruction", | ||
| 251 | .dependencies = featureSet(&[_]Feature{ | ||
| 252 | .fpu, | ||
| 253 | }), | ||
| 254 | }; | ||
| 255 | result[@intFromEnum(Feature.fuse_add_logical)] = .{ | ||
| 256 | .llvm_name = "fuse-add-logical", | ||
| 257 | .description = "Target supports Add with Logical Operations fusion", | ||
| 258 | .dependencies = featureSet(&[_]Feature{ | ||
| 259 | .fusion, | ||
| 260 | }), | ||
| 261 | }; | ||
| 262 | result[@intFromEnum(Feature.fuse_addi_load)] = .{ | ||
| 263 | .llvm_name = "fuse-addi-load", | ||
| 264 | .description = "Power8 Addi-Load fusion", | ||
| 265 | .dependencies = featureSet(&[_]Feature{ | ||
| 266 | .fusion, | ||
| 267 | }), | ||
| 268 | }; | ||
| 269 | result[@intFromEnum(Feature.fuse_addis_load)] = .{ | ||
| 270 | .llvm_name = "fuse-addis-load", | ||
| 271 | .description = "Power8 Addis-Load fusion", | ||
| 272 | .dependencies = featureSet(&[_]Feature{ | ||
| 273 | .fusion, | ||
| 274 | }), | ||
| 275 | }; | ||
| 276 | result[@intFromEnum(Feature.fuse_arith_add)] = .{ | ||
| 277 | .llvm_name = "fuse-arith-add", | ||
| 278 | .description = "Target supports Arithmetic Operations with Add fusion", | ||
| 279 | .dependencies = featureSet(&[_]Feature{ | ||
| 280 | .fusion, | ||
| 281 | }), | ||
| 282 | }; | ||
| 283 | result[@intFromEnum(Feature.fuse_back2back)] = .{ | ||
| 284 | .llvm_name = "fuse-back2back", | ||
| 285 | .description = "Target supports general back to back fusion", | ||
| 286 | .dependencies = featureSet(&[_]Feature{ | ||
| 287 | .fusion, | ||
| 288 | }), | ||
| 289 | }; | ||
| 290 | result[@intFromEnum(Feature.fuse_cmp)] = .{ | ||
| 291 | .llvm_name = "fuse-cmp", | ||
| 292 | .description = "Target supports Comparison Operations fusion", | ||
| 293 | .dependencies = featureSet(&[_]Feature{ | ||
| 294 | .fusion, | ||
| 295 | }), | ||
| 296 | }; | ||
| 297 | result[@intFromEnum(Feature.fuse_logical)] = .{ | ||
| 298 | .llvm_name = "fuse-logical", | ||
| 299 | .description = "Target supports Logical Operations fusion", | ||
| 300 | .dependencies = featureSet(&[_]Feature{ | ||
| 301 | .fusion, | ||
| 302 | }), | ||
| 303 | }; | ||
| 304 | result[@intFromEnum(Feature.fuse_logical_add)] = .{ | ||
| 305 | .llvm_name = "fuse-logical-add", | ||
| 306 | .description = "Target supports Logical with Add Operations fusion", | ||
| 307 | .dependencies = featureSet(&[_]Feature{ | ||
| 308 | .fusion, | ||
| 309 | }), | ||
| 310 | }; | ||
| 311 | result[@intFromEnum(Feature.fuse_sha3)] = .{ | ||
| 312 | .llvm_name = "fuse-sha3", | ||
| 313 | .description = "Target supports SHA3 assist fusion", | ||
| 314 | .dependencies = featureSet(&[_]Feature{ | ||
| 315 | .fusion, | ||
| 316 | }), | ||
| 317 | }; | ||
| 318 | result[@intFromEnum(Feature.fuse_store)] = .{ | ||
| 319 | .llvm_name = "fuse-store", | ||
| 320 | .description = "Target supports store clustering", | ||
| 321 | .dependencies = featureSet(&[_]Feature{ | ||
| 322 | .fusion, | ||
| 323 | }), | ||
| 324 | }; | ||
| 325 | result[@intFromEnum(Feature.fuse_wideimm)] = .{ | ||
| 326 | .llvm_name = "fuse-wideimm", | ||
| 327 | .description = "Target supports Wide-Immediate fusion", | ||
| 328 | .dependencies = featureSet(&[_]Feature{ | ||
| 329 | .fusion, | ||
| 330 | }), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.fuse_zeromove)] = .{ | ||
| 333 | .llvm_name = "fuse-zeromove", | ||
| 334 | .description = "Target supports move to SPR with branch fusion", | ||
| 335 | .dependencies = featureSet(&[_]Feature{ | ||
| 336 | .fusion, | ||
| 337 | }), | ||
| 338 | }; | ||
| 339 | result[@intFromEnum(Feature.fusion)] = .{ | ||
| 340 | .llvm_name = "fusion", | ||
| 341 | .description = "Target supports instruction fusion", | ||
| 342 | .dependencies = featureSet(&[_]Feature{}), | ||
| 343 | }; | ||
| 344 | result[@intFromEnum(Feature.hard_float)] = .{ | ||
| 345 | .llvm_name = "hard-float", | ||
| 346 | .description = "Enable floating-point instructions", | ||
| 347 | .dependencies = featureSet(&[_]Feature{}), | ||
| 348 | }; | ||
| 349 | result[@intFromEnum(Feature.htm)] = .{ | ||
| 350 | .llvm_name = "htm", | ||
| 351 | .description = "Enable Hardware Transactional Memory instructions", | ||
| 352 | .dependencies = featureSet(&[_]Feature{}), | ||
| 353 | }; | ||
| 354 | result[@intFromEnum(Feature.icbt)] = .{ | ||
| 355 | .llvm_name = "icbt", | ||
| 356 | .description = "Enable icbt instruction", | ||
| 357 | .dependencies = featureSet(&[_]Feature{}), | ||
| 358 | }; | ||
| 359 | result[@intFromEnum(Feature.invariant_function_descriptors)] = .{ | ||
| 360 | .llvm_name = "invariant-function-descriptors", | ||
| 361 | .description = "Assume function descriptors are invariant", | ||
| 362 | .dependencies = featureSet(&[_]Feature{}), | ||
| 363 | }; | ||
| 364 | result[@intFromEnum(Feature.isa_future_instructions)] = .{ | ||
| 365 | .llvm_name = "isa-future-instructions", | ||
| 366 | .description = "Enable instructions for Future ISA.", | ||
| 367 | .dependencies = featureSet(&[_]Feature{ | ||
| 368 | .isa_v31_instructions, | ||
| 369 | }), | ||
| 370 | }; | ||
| 371 | result[@intFromEnum(Feature.isa_v206_instructions)] = .{ | ||
| 372 | .llvm_name = "isa-v206-instructions", | ||
| 373 | .description = "Enable instructions in ISA 2.06.", | ||
| 374 | .dependencies = featureSet(&[_]Feature{}), | ||
| 375 | }; | ||
| 376 | result[@intFromEnum(Feature.isa_v207_instructions)] = .{ | ||
| 377 | .llvm_name = "isa-v207-instructions", | ||
| 378 | .description = "Enable instructions in ISA 2.07.", | ||
| 379 | .dependencies = featureSet(&[_]Feature{}), | ||
| 380 | }; | ||
| 381 | result[@intFromEnum(Feature.isa_v30_instructions)] = .{ | ||
| 382 | .llvm_name = "isa-v30-instructions", | ||
| 383 | .description = "Enable instructions in ISA 3.0.", | ||
| 384 | .dependencies = featureSet(&[_]Feature{ | ||
| 385 | .isa_v207_instructions, | ||
| 386 | }), | ||
| 387 | }; | ||
| 388 | result[@intFromEnum(Feature.isa_v31_instructions)] = .{ | ||
| 389 | .llvm_name = "isa-v31-instructions", | ||
| 390 | .description = "Enable instructions in ISA 3.1.", | ||
| 391 | .dependencies = featureSet(&[_]Feature{ | ||
| 392 | .isa_v30_instructions, | ||
| 393 | }), | ||
| 394 | }; | ||
| 395 | result[@intFromEnum(Feature.isel)] = .{ | ||
| 396 | .llvm_name = "isel", | ||
| 397 | .description = "Enable the isel instruction", | ||
| 398 | .dependencies = featureSet(&[_]Feature{}), | ||
| 399 | }; | ||
| 400 | result[@intFromEnum(Feature.ldbrx)] = .{ | ||
| 401 | .llvm_name = "ldbrx", | ||
| 402 | .description = "Enable the ldbrx instruction", | ||
| 403 | .dependencies = featureSet(&[_]Feature{}), | ||
| 404 | }; | ||
| 405 | result[@intFromEnum(Feature.lfiwax)] = .{ | ||
| 406 | .llvm_name = "lfiwax", | ||
| 407 | .description = "Enable the lfiwax instruction", | ||
| 408 | .dependencies = featureSet(&[_]Feature{ | ||
| 409 | .fpu, | ||
| 410 | }), | ||
| 411 | }; | ||
| 412 | result[@intFromEnum(Feature.longcall)] = .{ | ||
| 413 | .llvm_name = "longcall", | ||
| 414 | .description = "Always use indirect calls", | ||
| 415 | .dependencies = featureSet(&[_]Feature{}), | ||
| 416 | }; | ||
| 417 | result[@intFromEnum(Feature.mfocrf)] = .{ | ||
| 418 | .llvm_name = "mfocrf", | ||
| 419 | .description = "Enable the MFOCRF instruction", | ||
| 420 | .dependencies = featureSet(&[_]Feature{}), | ||
| 421 | }; | ||
| 422 | result[@intFromEnum(Feature.mma)] = .{ | ||
| 423 | .llvm_name = "mma", | ||
| 424 | .description = "Enable MMA instructions", | ||
| 425 | .dependencies = featureSet(&[_]Feature{ | ||
| 426 | .paired_vector_memops, | ||
| 427 | .power8_vector, | ||
| 428 | .power9_altivec, | ||
| 429 | }), | ||
| 430 | }; | ||
| 431 | result[@intFromEnum(Feature.modern_aix_as)] = .{ | ||
| 432 | .llvm_name = "modern-aix-as", | ||
| 433 | .description = "AIX system assembler is modern enough to support new mnes", | ||
| 434 | .dependencies = featureSet(&[_]Feature{}), | ||
| 435 | }; | ||
| 436 | result[@intFromEnum(Feature.msync)] = .{ | ||
| 437 | .llvm_name = "msync", | ||
| 438 | .description = "Has only the msync instruction instead of sync", | ||
| 439 | .dependencies = featureSet(&[_]Feature{ | ||
| 440 | .booke, | ||
| 441 | }), | ||
| 442 | }; | ||
| 443 | result[@intFromEnum(Feature.paired_vector_memops)] = .{ | ||
| 444 | .llvm_name = "paired-vector-memops", | ||
| 445 | .description = "32Byte load and store instructions", | ||
| 446 | .dependencies = featureSet(&[_]Feature{ | ||
| 447 | .isa_v30_instructions, | ||
| 448 | }), | ||
| 449 | }; | ||
| 450 | result[@intFromEnum(Feature.partword_atomics)] = .{ | ||
| 451 | .llvm_name = "partword-atomics", | ||
| 452 | .description = "Enable l[bh]arx and st[bh]cx.", | ||
| 453 | .dependencies = featureSet(&[_]Feature{}), | ||
| 454 | }; | ||
| 455 | result[@intFromEnum(Feature.pcrelative_memops)] = .{ | ||
| 456 | .llvm_name = "pcrelative-memops", | ||
| 457 | .description = "Enable PC relative Memory Ops", | ||
| 458 | .dependencies = featureSet(&[_]Feature{ | ||
| 459 | .prefix_instrs, | ||
| 460 | }), | ||
| 461 | }; | ||
| 462 | result[@intFromEnum(Feature.popcntd)] = .{ | ||
| 463 | .llvm_name = "popcntd", | ||
| 464 | .description = "Enable the popcnt[dw] instructions", | ||
| 465 | .dependencies = featureSet(&[_]Feature{}), | ||
| 466 | }; | ||
| 467 | result[@intFromEnum(Feature.power10_vector)] = .{ | ||
| 468 | .llvm_name = "power10-vector", | ||
| 469 | .description = "Enable POWER10 vector instructions", | ||
| 470 | .dependencies = featureSet(&[_]Feature{ | ||
| 471 | .isa_v31_instructions, | ||
| 472 | .power9_vector, | ||
| 473 | }), | ||
| 474 | }; | ||
| 475 | result[@intFromEnum(Feature.power8_altivec)] = .{ | ||
| 476 | .llvm_name = "power8-altivec", | ||
| 477 | .description = "Enable POWER8 Altivec instructions", | ||
| 478 | .dependencies = featureSet(&[_]Feature{ | ||
| 479 | .altivec, | ||
| 480 | }), | ||
| 481 | }; | ||
| 482 | result[@intFromEnum(Feature.power8_vector)] = .{ | ||
| 483 | .llvm_name = "power8-vector", | ||
| 484 | .description = "Enable POWER8 vector instructions", | ||
| 485 | .dependencies = featureSet(&[_]Feature{ | ||
| 486 | .power8_altivec, | ||
| 487 | .vsx, | ||
| 488 | }), | ||
| 489 | }; | ||
| 490 | result[@intFromEnum(Feature.power9_altivec)] = .{ | ||
| 491 | .llvm_name = "power9-altivec", | ||
| 492 | .description = "Enable POWER9 Altivec instructions", | ||
| 493 | .dependencies = featureSet(&[_]Feature{ | ||
| 494 | .isa_v30_instructions, | ||
| 495 | .power8_altivec, | ||
| 496 | }), | ||
| 497 | }; | ||
| 498 | result[@intFromEnum(Feature.power9_vector)] = .{ | ||
| 499 | .llvm_name = "power9-vector", | ||
| 500 | .description = "Enable POWER9 vector instructions", | ||
| 501 | .dependencies = featureSet(&[_]Feature{ | ||
| 502 | .power8_vector, | ||
| 503 | .power9_altivec, | ||
| 504 | }), | ||
| 505 | }; | ||
| 506 | result[@intFromEnum(Feature.ppc4xx)] = .{ | ||
| 507 | .llvm_name = "ppc4xx", | ||
| 508 | .description = "Enable PPC 4xx instructions", | ||
| 509 | .dependencies = featureSet(&[_]Feature{}), | ||
| 510 | }; | ||
| 511 | result[@intFromEnum(Feature.ppc6xx)] = .{ | ||
| 512 | .llvm_name = "ppc6xx", | ||
| 513 | .description = "Enable PPC 6xx instructions", | ||
| 514 | .dependencies = featureSet(&[_]Feature{}), | ||
| 515 | }; | ||
| 516 | result[@intFromEnum(Feature.ppc_postra_sched)] = .{ | ||
| 517 | .llvm_name = "ppc-postra-sched", | ||
| 518 | .description = "Use PowerPC post-RA scheduling strategy", | ||
| 519 | .dependencies = featureSet(&[_]Feature{}), | ||
| 520 | }; | ||
| 521 | result[@intFromEnum(Feature.ppc_prera_sched)] = .{ | ||
| 522 | .llvm_name = "ppc-prera-sched", | ||
| 523 | .description = "Use PowerPC pre-RA scheduling strategy", | ||
| 524 | .dependencies = featureSet(&[_]Feature{}), | ||
| 525 | }; | ||
| 526 | result[@intFromEnum(Feature.predictable_select_expensive)] = .{ | ||
| 527 | .llvm_name = "predictable-select-expensive", | ||
| 528 | .description = "Prefer likely predicted branches over selects", | ||
| 529 | .dependencies = featureSet(&[_]Feature{}), | ||
| 530 | }; | ||
| 531 | result[@intFromEnum(Feature.prefix_instrs)] = .{ | ||
| 532 | .llvm_name = "prefix-instrs", | ||
| 533 | .description = "Enable prefixed instructions", | ||
| 534 | .dependencies = featureSet(&[_]Feature{ | ||
| 535 | .power8_vector, | ||
| 536 | .power9_altivec, | ||
| 537 | }), | ||
| 538 | }; | ||
| 539 | result[@intFromEnum(Feature.privileged)] = .{ | ||
| 540 | .llvm_name = "privileged", | ||
| 541 | .description = "Add privileged instructions", | ||
| 542 | .dependencies = featureSet(&[_]Feature{}), | ||
| 543 | }; | ||
| 544 | result[@intFromEnum(Feature.quadword_atomics)] = .{ | ||
| 545 | .llvm_name = "quadword-atomics", | ||
| 546 | .description = "Enable lqarx and stqcx.", | ||
| 547 | .dependencies = featureSet(&[_]Feature{}), | ||
| 548 | }; | ||
| 549 | result[@intFromEnum(Feature.recipprec)] = .{ | ||
| 550 | .llvm_name = "recipprec", | ||
| 551 | .description = "Assume higher precision reciprocal estimates", | ||
| 552 | .dependencies = featureSet(&[_]Feature{}), | ||
| 553 | }; | ||
| 554 | result[@intFromEnum(Feature.rop_protect)] = .{ | ||
| 555 | .llvm_name = "rop-protect", | ||
| 556 | .description = "Add ROP protect", | ||
| 557 | .dependencies = featureSet(&[_]Feature{}), | ||
| 558 | }; | ||
| 559 | result[@intFromEnum(Feature.secure_plt)] = .{ | ||
| 560 | .llvm_name = "secure-plt", | ||
| 561 | .description = "Enable secure plt mode", | ||
| 562 | .dependencies = featureSet(&[_]Feature{}), | ||
| 563 | }; | ||
| 564 | result[@intFromEnum(Feature.slow_popcntd)] = .{ | ||
| 565 | .llvm_name = "slow-popcntd", | ||
| 566 | .description = "Has slow popcnt[dw] instructions", | ||
| 567 | .dependencies = featureSet(&[_]Feature{}), | ||
| 568 | }; | ||
| 569 | result[@intFromEnum(Feature.spe)] = .{ | ||
| 570 | .llvm_name = "spe", | ||
| 571 | .description = "Enable SPE instructions", | ||
| 572 | .dependencies = featureSet(&[_]Feature{ | ||
| 573 | .hard_float, | ||
| 574 | }), | ||
| 575 | }; | ||
| 576 | result[@intFromEnum(Feature.stfiwx)] = .{ | ||
| 577 | .llvm_name = "stfiwx", | ||
| 578 | .description = "Enable the stfiwx instruction", | ||
| 579 | .dependencies = featureSet(&[_]Feature{ | ||
| 580 | .fpu, | ||
| 581 | }), | ||
| 582 | }; | ||
| 583 | result[@intFromEnum(Feature.two_const_nr)] = .{ | ||
| 584 | .llvm_name = "two-const-nr", | ||
| 585 | .description = "Requires two constant Newton-Raphson computation", | ||
| 586 | .dependencies = featureSet(&[_]Feature{}), | ||
| 587 | }; | ||
| 588 | result[@intFromEnum(Feature.vectors_use_two_units)] = .{ | ||
| 589 | .llvm_name = "vectors-use-two-units", | ||
| 590 | .description = "Vectors use two units", | ||
| 591 | .dependencies = featureSet(&[_]Feature{}), | ||
| 592 | }; | ||
| 593 | result[@intFromEnum(Feature.vsx)] = .{ | ||
| 594 | .llvm_name = "vsx", | ||
| 595 | .description = "Enable VSX instructions", | ||
| 596 | .dependencies = featureSet(&[_]Feature{ | ||
| 597 | .altivec, | ||
| 598 | }), | ||
| 599 | }; | ||
| 600 | const ti = @typeInfo(Feature); | ||
| 601 | for (&result, 0..) |*elem, i| { | ||
| 602 | elem.index = i; | ||
| 603 | elem.name = ti.Enum.fields[i].name; | ||
| 604 | } | ||
| 605 | break :blk result; | ||
| 606 | }; | ||
| 607 | |||
| 608 | pub const cpu = struct { | ||
| 609 | pub const @"440" = CpuModel{ | ||
| 610 | .name = "440", | ||
| 611 | .llvm_name = "440", | ||
| 612 | .features = featureSet(&[_]Feature{ | ||
| 613 | .fres, | ||
| 614 | .frsqrte, | ||
| 615 | .isel, | ||
| 616 | .msync, | ||
| 617 | }), | ||
| 618 | }; | ||
| 619 | pub const @"450" = CpuModel{ | ||
| 620 | .name = "450", | ||
| 621 | .llvm_name = "450", | ||
| 622 | .features = featureSet(&[_]Feature{ | ||
| 623 | .fres, | ||
| 624 | .frsqrte, | ||
| 625 | .isel, | ||
| 626 | .msync, | ||
| 627 | }), | ||
| 628 | }; | ||
| 629 | pub const @"601" = CpuModel{ | ||
| 630 | .name = "601", | ||
| 631 | .llvm_name = "601", | ||
| 632 | .features = featureSet(&[_]Feature{ | ||
| 633 | .fpu, | ||
| 634 | }), | ||
| 635 | }; | ||
| 636 | pub const @"602" = CpuModel{ | ||
| 637 | .name = "602", | ||
| 638 | .llvm_name = "602", | ||
| 639 | .features = featureSet(&[_]Feature{ | ||
| 640 | .fpu, | ||
| 641 | }), | ||
| 642 | }; | ||
| 643 | pub const @"603" = CpuModel{ | ||
| 644 | .name = "603", | ||
| 645 | .llvm_name = "603", | ||
| 646 | .features = featureSet(&[_]Feature{ | ||
| 647 | .fres, | ||
| 648 | .frsqrte, | ||
| 649 | }), | ||
| 650 | }; | ||
| 651 | pub const @"603e" = CpuModel{ | ||
| 652 | .name = "603e", | ||
| 653 | .llvm_name = "603e", | ||
| 654 | .features = featureSet(&[_]Feature{ | ||
| 655 | .fres, | ||
| 656 | .frsqrte, | ||
| 657 | }), | ||
| 658 | }; | ||
| 659 | pub const @"603ev" = CpuModel{ | ||
| 660 | .name = "603ev", | ||
| 661 | .llvm_name = "603ev", | ||
| 662 | .features = featureSet(&[_]Feature{ | ||
| 663 | .fres, | ||
| 664 | .frsqrte, | ||
| 665 | }), | ||
| 666 | }; | ||
| 667 | pub const @"604" = CpuModel{ | ||
| 668 | .name = "604", | ||
| 669 | .llvm_name = "604", | ||
| 670 | .features = featureSet(&[_]Feature{ | ||
| 671 | .fres, | ||
| 672 | .frsqrte, | ||
| 673 | }), | ||
| 674 | }; | ||
| 675 | pub const @"604e" = CpuModel{ | ||
| 676 | .name = "604e", | ||
| 677 | .llvm_name = "604e", | ||
| 678 | .features = featureSet(&[_]Feature{ | ||
| 679 | .fres, | ||
| 680 | .frsqrte, | ||
| 681 | }), | ||
| 682 | }; | ||
| 683 | pub const @"620" = CpuModel{ | ||
| 684 | .name = "620", | ||
| 685 | .llvm_name = "620", | ||
| 686 | .features = featureSet(&[_]Feature{ | ||
| 687 | .fres, | ||
| 688 | .frsqrte, | ||
| 689 | }), | ||
| 690 | }; | ||
| 691 | pub const @"7400" = CpuModel{ | ||
| 692 | .name = "7400", | ||
| 693 | .llvm_name = "7400", | ||
| 694 | .features = featureSet(&[_]Feature{ | ||
| 695 | .altivec, | ||
| 696 | .fres, | ||
| 697 | .frsqrte, | ||
| 698 | }), | ||
| 699 | }; | ||
| 700 | pub const @"7450" = CpuModel{ | ||
| 701 | .name = "7450", | ||
| 702 | .llvm_name = "7450", | ||
| 703 | .features = featureSet(&[_]Feature{ | ||
| 704 | .altivec, | ||
| 705 | .fres, | ||
| 706 | .frsqrte, | ||
| 707 | }), | ||
| 708 | }; | ||
| 709 | pub const @"750" = CpuModel{ | ||
| 710 | .name = "750", | ||
| 711 | .llvm_name = "750", | ||
| 712 | .features = featureSet(&[_]Feature{ | ||
| 713 | .fres, | ||
| 714 | .frsqrte, | ||
| 715 | }), | ||
| 716 | }; | ||
| 717 | pub const @"970" = CpuModel{ | ||
| 718 | .name = "970", | ||
| 719 | .llvm_name = "970", | ||
| 720 | .features = featureSet(&[_]Feature{ | ||
| 721 | .@"64bit", | ||
| 722 | .altivec, | ||
| 723 | .fres, | ||
| 724 | .frsqrte, | ||
| 725 | .fsqrt, | ||
| 726 | .mfocrf, | ||
| 727 | .stfiwx, | ||
| 728 | }), | ||
| 729 | }; | ||
| 730 | pub const a2 = CpuModel{ | ||
| 731 | .name = "a2", | ||
| 732 | .llvm_name = "a2", | ||
| 733 | .features = featureSet(&[_]Feature{ | ||
| 734 | .@"64bit", | ||
| 735 | .booke, | ||
| 736 | .cmpb, | ||
| 737 | .fcpsgn, | ||
| 738 | .fpcvt, | ||
| 739 | .fprnd, | ||
| 740 | .fre, | ||
| 741 | .fres, | ||
| 742 | .frsqrte, | ||
| 743 | .frsqrtes, | ||
| 744 | .fsqrt, | ||
| 745 | .isa_v206_instructions, | ||
| 746 | .isel, | ||
| 747 | .ldbrx, | ||
| 748 | .lfiwax, | ||
| 749 | .mfocrf, | ||
| 750 | .recipprec, | ||
| 751 | .slow_popcntd, | ||
| 752 | .stfiwx, | ||
| 753 | }), | ||
| 754 | }; | ||
| 755 | pub const e500 = CpuModel{ | ||
| 756 | .name = "e500", | ||
| 757 | .llvm_name = "e500", | ||
| 758 | .features = featureSet(&[_]Feature{ | ||
| 759 | .isel, | ||
| 760 | .msync, | ||
| 761 | .spe, | ||
| 762 | }), | ||
| 763 | }; | ||
| 764 | pub const e500mc = CpuModel{ | ||
| 765 | .name = "e500mc", | ||
| 766 | .llvm_name = "e500mc", | ||
| 767 | .features = featureSet(&[_]Feature{ | ||
| 768 | .booke, | ||
| 769 | .isel, | ||
| 770 | .stfiwx, | ||
| 771 | }), | ||
| 772 | }; | ||
| 773 | pub const e5500 = CpuModel{ | ||
| 774 | .name = "e5500", | ||
| 775 | .llvm_name = "e5500", | ||
| 776 | .features = featureSet(&[_]Feature{ | ||
| 777 | .@"64bit", | ||
| 778 | .booke, | ||
| 779 | .isel, | ||
| 780 | .mfocrf, | ||
| 781 | .stfiwx, | ||
| 782 | }), | ||
| 783 | }; | ||
| 784 | pub const future = CpuModel{ | ||
| 785 | .name = "future", | ||
| 786 | .llvm_name = "future", | ||
| 787 | .features = featureSet(&[_]Feature{ | ||
| 788 | .@"64bit", | ||
| 789 | .allow_unaligned_fp_access, | ||
| 790 | .bpermd, | ||
| 791 | .cmpb, | ||
| 792 | .crbits, | ||
| 793 | .crypto, | ||
| 794 | .direct_move, | ||
| 795 | .extdiv, | ||
| 796 | .fast_MFLR, | ||
| 797 | .fcpsgn, | ||
| 798 | .fpcvt, | ||
| 799 | .fprnd, | ||
| 800 | .fre, | ||
| 801 | .fres, | ||
| 802 | .frsqrte, | ||
| 803 | .frsqrtes, | ||
| 804 | .fsqrt, | ||
| 805 | .fuse_add_logical, | ||
| 806 | .fuse_arith_add, | ||
| 807 | .fuse_logical, | ||
| 808 | .fuse_logical_add, | ||
| 809 | .fuse_sha3, | ||
| 810 | .fuse_store, | ||
| 811 | .htm, | ||
| 812 | .icbt, | ||
| 813 | .isa_future_instructions, | ||
| 814 | .isa_v206_instructions, | ||
| 815 | .isel, | ||
| 816 | .ldbrx, | ||
| 817 | .lfiwax, | ||
| 818 | .mfocrf, | ||
| 819 | .mma, | ||
| 820 | .partword_atomics, | ||
| 821 | .pcrelative_memops, | ||
| 822 | .popcntd, | ||
| 823 | .power10_vector, | ||
| 824 | .ppc_postra_sched, | ||
| 825 | .ppc_prera_sched, | ||
| 826 | .predictable_select_expensive, | ||
| 827 | .quadword_atomics, | ||
| 828 | .recipprec, | ||
| 829 | .stfiwx, | ||
| 830 | .two_const_nr, | ||
| 831 | }), | ||
| 832 | }; | ||
| 833 | pub const g3 = CpuModel{ | ||
| 834 | .name = "g3", | ||
| 835 | .llvm_name = "g3", | ||
| 836 | .features = featureSet(&[_]Feature{ | ||
| 837 | .fres, | ||
| 838 | .frsqrte, | ||
| 839 | }), | ||
| 840 | }; | ||
| 841 | pub const g4 = CpuModel{ | ||
| 842 | .name = "g4", | ||
| 843 | .llvm_name = "g4", | ||
| 844 | .features = featureSet(&[_]Feature{ | ||
| 845 | .altivec, | ||
| 846 | .fres, | ||
| 847 | .frsqrte, | ||
| 848 | }), | ||
| 849 | }; | ||
| 850 | pub const @"g4+" = CpuModel{ | ||
| 851 | .name = "g4+", | ||
| 852 | .llvm_name = "g4+", | ||
| 853 | .features = featureSet(&[_]Feature{ | ||
| 854 | .altivec, | ||
| 855 | .fres, | ||
| 856 | .frsqrte, | ||
| 857 | }), | ||
| 858 | }; | ||
| 859 | pub const g5 = CpuModel{ | ||
| 860 | .name = "g5", | ||
| 861 | .llvm_name = "g5", | ||
| 862 | .features = featureSet(&[_]Feature{ | ||
| 863 | .@"64bit", | ||
| 864 | .altivec, | ||
| 865 | .fres, | ||
| 866 | .frsqrte, | ||
| 867 | .fsqrt, | ||
| 868 | .mfocrf, | ||
| 869 | .stfiwx, | ||
| 870 | }), | ||
| 871 | }; | ||
| 872 | pub const generic = CpuModel{ | ||
| 873 | .name = "generic", | ||
| 874 | .llvm_name = "generic", | ||
| 875 | .features = featureSet(&[_]Feature{ | ||
| 876 | .hard_float, | ||
| 877 | }), | ||
| 878 | }; | ||
| 879 | pub const ppc = CpuModel{ | ||
| 880 | .name = "ppc", | ||
| 881 | .llvm_name = "ppc", | ||
| 882 | .features = featureSet(&[_]Feature{ | ||
| 883 | .hard_float, | ||
| 884 | }), | ||
| 885 | }; | ||
| 886 | pub const ppc64 = CpuModel{ | ||
| 887 | .name = "ppc64", | ||
| 888 | .llvm_name = "ppc64", | ||
| 889 | .features = featureSet(&[_]Feature{ | ||
| 890 | .@"64bit", | ||
| 891 | .altivec, | ||
| 892 | .fres, | ||
| 893 | .frsqrte, | ||
| 894 | .fsqrt, | ||
| 895 | .mfocrf, | ||
| 896 | .stfiwx, | ||
| 897 | }), | ||
| 898 | }; | ||
| 899 | pub const ppc64le = CpuModel{ | ||
| 900 | .name = "ppc64le", | ||
| 901 | .llvm_name = "ppc64le", | ||
| 902 | .features = featureSet(&[_]Feature{ | ||
| 903 | .@"64bit", | ||
| 904 | .allow_unaligned_fp_access, | ||
| 905 | .bpermd, | ||
| 906 | .cmpb, | ||
| 907 | .crbits, | ||
| 908 | .crypto, | ||
| 909 | .direct_move, | ||
| 910 | .extdiv, | ||
| 911 | .fcpsgn, | ||
| 912 | .fpcvt, | ||
| 913 | .fprnd, | ||
| 914 | .fre, | ||
| 915 | .fres, | ||
| 916 | .frsqrte, | ||
| 917 | .frsqrtes, | ||
| 918 | .fsqrt, | ||
| 919 | .fuse_addi_load, | ||
| 920 | .fuse_addis_load, | ||
| 921 | .htm, | ||
| 922 | .icbt, | ||
| 923 | .isa_v206_instructions, | ||
| 924 | .isa_v207_instructions, | ||
| 925 | .isel, | ||
| 926 | .ldbrx, | ||
| 927 | .lfiwax, | ||
| 928 | .mfocrf, | ||
| 929 | .partword_atomics, | ||
| 930 | .popcntd, | ||
| 931 | .power8_vector, | ||
| 932 | .predictable_select_expensive, | ||
| 933 | .quadword_atomics, | ||
| 934 | .recipprec, | ||
| 935 | .stfiwx, | ||
| 936 | .two_const_nr, | ||
| 937 | }), | ||
| 938 | }; | ||
| 939 | pub const pwr10 = CpuModel{ | ||
| 940 | .name = "pwr10", | ||
| 941 | .llvm_name = "pwr10", | ||
| 942 | .features = featureSet(&[_]Feature{ | ||
| 943 | .@"64bit", | ||
| 944 | .allow_unaligned_fp_access, | ||
| 945 | .bpermd, | ||
| 946 | .cmpb, | ||
| 947 | .crbits, | ||
| 948 | .crypto, | ||
| 949 | .direct_move, | ||
| 950 | .extdiv, | ||
| 951 | .fast_MFLR, | ||
| 952 | .fcpsgn, | ||
| 953 | .fpcvt, | ||
| 954 | .fprnd, | ||
| 955 | .fre, | ||
| 956 | .fres, | ||
| 957 | .frsqrte, | ||
| 958 | .frsqrtes, | ||
| 959 | .fsqrt, | ||
| 960 | .fuse_add_logical, | ||
| 961 | .fuse_arith_add, | ||
| 962 | .fuse_logical, | ||
| 963 | .fuse_logical_add, | ||
| 964 | .fuse_sha3, | ||
| 965 | .fuse_store, | ||
| 966 | .htm, | ||
| 967 | .icbt, | ||
| 968 | .isa_v206_instructions, | ||
| 969 | .isel, | ||
| 970 | .ldbrx, | ||
| 971 | .lfiwax, | ||
| 972 | .mfocrf, | ||
| 973 | .mma, | ||
| 974 | .partword_atomics, | ||
| 975 | .pcrelative_memops, | ||
| 976 | .popcntd, | ||
| 977 | .power10_vector, | ||
| 978 | .ppc_postra_sched, | ||
| 979 | .ppc_prera_sched, | ||
| 980 | .predictable_select_expensive, | ||
| 981 | .quadword_atomics, | ||
| 982 | .recipprec, | ||
| 983 | .stfiwx, | ||
| 984 | .two_const_nr, | ||
| 985 | }), | ||
| 986 | }; | ||
| 987 | pub const pwr3 = CpuModel{ | ||
| 988 | .name = "pwr3", | ||
| 989 | .llvm_name = "pwr3", | ||
| 990 | .features = featureSet(&[_]Feature{ | ||
| 991 | .@"64bit", | ||
| 992 | .altivec, | ||
| 993 | .fres, | ||
| 994 | .frsqrte, | ||
| 995 | .mfocrf, | ||
| 996 | .stfiwx, | ||
| 997 | }), | ||
| 998 | }; | ||
| 999 | pub const pwr4 = CpuModel{ | ||
| 1000 | .name = "pwr4", | ||
| 1001 | .llvm_name = "pwr4", | ||
| 1002 | .features = featureSet(&[_]Feature{ | ||
| 1003 | .@"64bit", | ||
| 1004 | .altivec, | ||
| 1005 | .fres, | ||
| 1006 | .frsqrte, | ||
| 1007 | .fsqrt, | ||
| 1008 | .mfocrf, | ||
| 1009 | .stfiwx, | ||
| 1010 | }), | ||
| 1011 | }; | ||
| 1012 | pub const pwr5 = CpuModel{ | ||
| 1013 | .name = "pwr5", | ||
| 1014 | .llvm_name = "pwr5", | ||
| 1015 | .features = featureSet(&[_]Feature{ | ||
| 1016 | .@"64bit", | ||
| 1017 | .altivec, | ||
| 1018 | .fre, | ||
| 1019 | .fres, | ||
| 1020 | .frsqrte, | ||
| 1021 | .frsqrtes, | ||
| 1022 | .fsqrt, | ||
| 1023 | .mfocrf, | ||
| 1024 | .stfiwx, | ||
| 1025 | }), | ||
| 1026 | }; | ||
| 1027 | pub const pwr5x = CpuModel{ | ||
| 1028 | .name = "pwr5x", | ||
| 1029 | .llvm_name = "pwr5x", | ||
| 1030 | .features = featureSet(&[_]Feature{ | ||
| 1031 | .@"64bit", | ||
| 1032 | .altivec, | ||
| 1033 | .fprnd, | ||
| 1034 | .fre, | ||
| 1035 | .fres, | ||
| 1036 | .frsqrte, | ||
| 1037 | .frsqrtes, | ||
| 1038 | .fsqrt, | ||
| 1039 | .mfocrf, | ||
| 1040 | .stfiwx, | ||
| 1041 | }), | ||
| 1042 | }; | ||
| 1043 | pub const pwr6 = CpuModel{ | ||
| 1044 | .name = "pwr6", | ||
| 1045 | .llvm_name = "pwr6", | ||
| 1046 | .features = featureSet(&[_]Feature{ | ||
| 1047 | .@"64bit", | ||
| 1048 | .altivec, | ||
| 1049 | .cmpb, | ||
| 1050 | .fcpsgn, | ||
| 1051 | .fprnd, | ||
| 1052 | .fre, | ||
| 1053 | .fres, | ||
| 1054 | .frsqrte, | ||
| 1055 | .frsqrtes, | ||
| 1056 | .fsqrt, | ||
| 1057 | .lfiwax, | ||
| 1058 | .mfocrf, | ||
| 1059 | .recipprec, | ||
| 1060 | .stfiwx, | ||
| 1061 | }), | ||
| 1062 | }; | ||
| 1063 | pub const pwr6x = CpuModel{ | ||
| 1064 | .name = "pwr6x", | ||
| 1065 | .llvm_name = "pwr6x", | ||
| 1066 | .features = featureSet(&[_]Feature{ | ||
| 1067 | .@"64bit", | ||
| 1068 | .altivec, | ||
| 1069 | .cmpb, | ||
| 1070 | .fcpsgn, | ||
| 1071 | .fprnd, | ||
| 1072 | .fre, | ||
| 1073 | .fres, | ||
| 1074 | .frsqrte, | ||
| 1075 | .frsqrtes, | ||
| 1076 | .fsqrt, | ||
| 1077 | .lfiwax, | ||
| 1078 | .mfocrf, | ||
| 1079 | .recipprec, | ||
| 1080 | .stfiwx, | ||
| 1081 | }), | ||
| 1082 | }; | ||
| 1083 | pub const pwr7 = CpuModel{ | ||
| 1084 | .name = "pwr7", | ||
| 1085 | .llvm_name = "pwr7", | ||
| 1086 | .features = featureSet(&[_]Feature{ | ||
| 1087 | .@"64bit", | ||
| 1088 | .allow_unaligned_fp_access, | ||
| 1089 | .bpermd, | ||
| 1090 | .cmpb, | ||
| 1091 | .extdiv, | ||
| 1092 | .fcpsgn, | ||
| 1093 | .fpcvt, | ||
| 1094 | .fprnd, | ||
| 1095 | .fre, | ||
| 1096 | .fres, | ||
| 1097 | .frsqrte, | ||
| 1098 | .frsqrtes, | ||
| 1099 | .fsqrt, | ||
| 1100 | .isa_v206_instructions, | ||
| 1101 | .isel, | ||
| 1102 | .ldbrx, | ||
| 1103 | .lfiwax, | ||
| 1104 | .mfocrf, | ||
| 1105 | .popcntd, | ||
| 1106 | .recipprec, | ||
| 1107 | .stfiwx, | ||
| 1108 | .two_const_nr, | ||
| 1109 | .vsx, | ||
| 1110 | }), | ||
| 1111 | }; | ||
| 1112 | pub const pwr8 = CpuModel{ | ||
| 1113 | .name = "pwr8", | ||
| 1114 | .llvm_name = "pwr8", | ||
| 1115 | .features = featureSet(&[_]Feature{ | ||
| 1116 | .@"64bit", | ||
| 1117 | .allow_unaligned_fp_access, | ||
| 1118 | .bpermd, | ||
| 1119 | .cmpb, | ||
| 1120 | .crbits, | ||
| 1121 | .crypto, | ||
| 1122 | .direct_move, | ||
| 1123 | .extdiv, | ||
| 1124 | .fcpsgn, | ||
| 1125 | .fpcvt, | ||
| 1126 | .fprnd, | ||
| 1127 | .fre, | ||
| 1128 | .fres, | ||
| 1129 | .frsqrte, | ||
| 1130 | .frsqrtes, | ||
| 1131 | .fsqrt, | ||
| 1132 | .fuse_addi_load, | ||
| 1133 | .fuse_addis_load, | ||
| 1134 | .htm, | ||
| 1135 | .icbt, | ||
| 1136 | .isa_v206_instructions, | ||
| 1137 | .isa_v207_instructions, | ||
| 1138 | .isel, | ||
| 1139 | .ldbrx, | ||
| 1140 | .lfiwax, | ||
| 1141 | .mfocrf, | ||
| 1142 | .partword_atomics, | ||
| 1143 | .popcntd, | ||
| 1144 | .power8_vector, | ||
| 1145 | .predictable_select_expensive, | ||
| 1146 | .quadword_atomics, | ||
| 1147 | .recipprec, | ||
| 1148 | .stfiwx, | ||
| 1149 | .two_const_nr, | ||
| 1150 | }), | ||
| 1151 | }; | ||
| 1152 | pub const pwr9 = CpuModel{ | ||
| 1153 | .name = "pwr9", | ||
| 1154 | .llvm_name = "pwr9", | ||
| 1155 | .features = featureSet(&[_]Feature{ | ||
| 1156 | .@"64bit", | ||
| 1157 | .allow_unaligned_fp_access, | ||
| 1158 | .bpermd, | ||
| 1159 | .cmpb, | ||
| 1160 | .crbits, | ||
| 1161 | .crypto, | ||
| 1162 | .direct_move, | ||
| 1163 | .extdiv, | ||
| 1164 | .fcpsgn, | ||
| 1165 | .fpcvt, | ||
| 1166 | .fprnd, | ||
| 1167 | .fre, | ||
| 1168 | .fres, | ||
| 1169 | .frsqrte, | ||
| 1170 | .frsqrtes, | ||
| 1171 | .fsqrt, | ||
| 1172 | .htm, | ||
| 1173 | .icbt, | ||
| 1174 | .isa_v206_instructions, | ||
| 1175 | .isel, | ||
| 1176 | .ldbrx, | ||
| 1177 | .lfiwax, | ||
| 1178 | .mfocrf, | ||
| 1179 | .partword_atomics, | ||
| 1180 | .popcntd, | ||
| 1181 | .power9_vector, | ||
| 1182 | .ppc_postra_sched, | ||
| 1183 | .ppc_prera_sched, | ||
| 1184 | .predictable_select_expensive, | ||
| 1185 | .quadword_atomics, | ||
| 1186 | .recipprec, | ||
| 1187 | .stfiwx, | ||
| 1188 | .two_const_nr, | ||
| 1189 | .vectors_use_two_units, | ||
| 1190 | }), | ||
| 1191 | }; | ||
| 1192 | }; | ||
lib/std/target/riscv.zig deleted-1341
| ... | @@ -1,1341 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"32bit", | ||
| 9 | @"64bit", | ||
| 10 | a, | ||
| 11 | c, | ||
| 12 | d, | ||
| 13 | dlen_factor_2, | ||
| 14 | e, | ||
| 15 | experimental_smaia, | ||
| 16 | experimental_ssaia, | ||
| 17 | experimental_zacas, | ||
| 18 | experimental_zfa, | ||
| 19 | experimental_zfbfmin, | ||
| 20 | experimental_zicond, | ||
| 21 | experimental_zihintntl, | ||
| 22 | experimental_ztso, | ||
| 23 | experimental_zvbb, | ||
| 24 | experimental_zvbc, | ||
| 25 | experimental_zvfbfmin, | ||
| 26 | experimental_zvfbfwma, | ||
| 27 | experimental_zvkg, | ||
| 28 | experimental_zvkn, | ||
| 29 | experimental_zvknc, | ||
| 30 | experimental_zvkned, | ||
| 31 | experimental_zvkng, | ||
| 32 | experimental_zvknha, | ||
| 33 | experimental_zvknhb, | ||
| 34 | experimental_zvks, | ||
| 35 | experimental_zvksc, | ||
| 36 | experimental_zvksed, | ||
| 37 | experimental_zvksg, | ||
| 38 | experimental_zvksh, | ||
| 39 | experimental_zvkt, | ||
| 40 | f, | ||
| 41 | forced_atomics, | ||
| 42 | h, | ||
| 43 | lui_addi_fusion, | ||
| 44 | m, | ||
| 45 | no_default_unroll, | ||
| 46 | no_optimized_zero_stride_load, | ||
| 47 | no_rvc_hints, | ||
| 48 | relax, | ||
| 49 | reserve_x1, | ||
| 50 | reserve_x10, | ||
| 51 | reserve_x11, | ||
| 52 | reserve_x12, | ||
| 53 | reserve_x13, | ||
| 54 | reserve_x14, | ||
| 55 | reserve_x15, | ||
| 56 | reserve_x16, | ||
| 57 | reserve_x17, | ||
| 58 | reserve_x18, | ||
| 59 | reserve_x19, | ||
| 60 | reserve_x2, | ||
| 61 | reserve_x20, | ||
| 62 | reserve_x21, | ||
| 63 | reserve_x22, | ||
| 64 | reserve_x23, | ||
| 65 | reserve_x24, | ||
| 66 | reserve_x25, | ||
| 67 | reserve_x26, | ||
| 68 | reserve_x27, | ||
| 69 | reserve_x28, | ||
| 70 | reserve_x29, | ||
| 71 | reserve_x3, | ||
| 72 | reserve_x30, | ||
| 73 | reserve_x31, | ||
| 74 | reserve_x4, | ||
| 75 | reserve_x5, | ||
| 76 | reserve_x6, | ||
| 77 | reserve_x7, | ||
| 78 | reserve_x8, | ||
| 79 | reserve_x9, | ||
| 80 | save_restore, | ||
| 81 | seq_cst_trailing_fence, | ||
| 82 | short_forward_branch_opt, | ||
| 83 | svinval, | ||
| 84 | svnapot, | ||
| 85 | svpbmt, | ||
| 86 | tagged_globals, | ||
| 87 | unaligned_scalar_mem, | ||
| 88 | unaligned_vector_mem, | ||
| 89 | v, | ||
| 90 | xcvbitmanip, | ||
| 91 | xcvmac, | ||
| 92 | xsfcie, | ||
| 93 | xsfvcp, | ||
| 94 | xtheadba, | ||
| 95 | xtheadbb, | ||
| 96 | xtheadbs, | ||
| 97 | xtheadcmo, | ||
| 98 | xtheadcondmov, | ||
| 99 | xtheadfmemidx, | ||
| 100 | xtheadmac, | ||
| 101 | xtheadmemidx, | ||
| 102 | xtheadmempair, | ||
| 103 | xtheadsync, | ||
| 104 | xtheadvdot, | ||
| 105 | xventanacondops, | ||
| 106 | zawrs, | ||
| 107 | zba, | ||
| 108 | zbb, | ||
| 109 | zbc, | ||
| 110 | zbkb, | ||
| 111 | zbkc, | ||
| 112 | zbkx, | ||
| 113 | zbs, | ||
| 114 | zca, | ||
| 115 | zcb, | ||
| 116 | zcd, | ||
| 117 | zce, | ||
| 118 | zcf, | ||
| 119 | zcmp, | ||
| 120 | zcmt, | ||
| 121 | zdinx, | ||
| 122 | zfh, | ||
| 123 | zfhmin, | ||
| 124 | zfinx, | ||
| 125 | zhinx, | ||
| 126 | zhinxmin, | ||
| 127 | zicbom, | ||
| 128 | zicbop, | ||
| 129 | zicboz, | ||
| 130 | zicntr, | ||
| 131 | zicsr, | ||
| 132 | zifencei, | ||
| 133 | zihintpause, | ||
| 134 | zihpm, | ||
| 135 | zk, | ||
| 136 | zkn, | ||
| 137 | zknd, | ||
| 138 | zkne, | ||
| 139 | zknh, | ||
| 140 | zkr, | ||
| 141 | zks, | ||
| 142 | zksed, | ||
| 143 | zksh, | ||
| 144 | zkt, | ||
| 145 | zmmul, | ||
| 146 | zve32f, | ||
| 147 | zve32x, | ||
| 148 | zve64d, | ||
| 149 | zve64f, | ||
| 150 | zve64x, | ||
| 151 | zvfh, | ||
| 152 | zvl1024b, | ||
| 153 | zvl128b, | ||
| 154 | zvl16384b, | ||
| 155 | zvl2048b, | ||
| 156 | zvl256b, | ||
| 157 | zvl32768b, | ||
| 158 | zvl32b, | ||
| 159 | zvl4096b, | ||
| 160 | zvl512b, | ||
| 161 | zvl64b, | ||
| 162 | zvl65536b, | ||
| 163 | zvl8192b, | ||
| 164 | }; | ||
| 165 | |||
| 166 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 167 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 168 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 169 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 170 | |||
| 171 | pub const all_features = blk: { | ||
| 172 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 173 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 174 | var result: [len]CpuFeature = undefined; | ||
| 175 | result[@intFromEnum(Feature.@"32bit")] = .{ | ||
| 176 | .llvm_name = "32bit", | ||
| 177 | .description = "Implements RV32", | ||
| 178 | .dependencies = featureSet(&[_]Feature{}), | ||
| 179 | }; | ||
| 180 | result[@intFromEnum(Feature.@"64bit")] = .{ | ||
| 181 | .llvm_name = "64bit", | ||
| 182 | .description = "Implements RV64", | ||
| 183 | .dependencies = featureSet(&[_]Feature{}), | ||
| 184 | }; | ||
| 185 | result[@intFromEnum(Feature.a)] = .{ | ||
| 186 | .llvm_name = "a", | ||
| 187 | .description = "'A' (Atomic Instructions)", | ||
| 188 | .dependencies = featureSet(&[_]Feature{}), | ||
| 189 | }; | ||
| 190 | result[@intFromEnum(Feature.c)] = .{ | ||
| 191 | .llvm_name = "c", | ||
| 192 | .description = "'C' (Compressed Instructions)", | ||
| 193 | .dependencies = featureSet(&[_]Feature{}), | ||
| 194 | }; | ||
| 195 | result[@intFromEnum(Feature.d)] = .{ | ||
| 196 | .llvm_name = "d", | ||
| 197 | .description = "'D' (Double-Precision Floating-Point)", | ||
| 198 | .dependencies = featureSet(&[_]Feature{ | ||
| 199 | .f, | ||
| 200 | }), | ||
| 201 | }; | ||
| 202 | result[@intFromEnum(Feature.dlen_factor_2)] = .{ | ||
| 203 | .llvm_name = "dlen-factor-2", | ||
| 204 | .description = "Vector unit DLEN(data path width) is half of VLEN", | ||
| 205 | .dependencies = featureSet(&[_]Feature{}), | ||
| 206 | }; | ||
| 207 | result[@intFromEnum(Feature.e)] = .{ | ||
| 208 | .llvm_name = "e", | ||
| 209 | .description = "Implements RV{32,64}E (provides 16 rather than 32 GPRs)", | ||
| 210 | .dependencies = featureSet(&[_]Feature{}), | ||
| 211 | }; | ||
| 212 | result[@intFromEnum(Feature.experimental_smaia)] = .{ | ||
| 213 | .llvm_name = "experimental-smaia", | ||
| 214 | .description = "'Smaia' (Smaia encompasses all added CSRs and all modifications to interrupt response behavior that the AIA specifies for a hart, over all privilege levels.)", | ||
| 215 | .dependencies = featureSet(&[_]Feature{}), | ||
| 216 | }; | ||
| 217 | result[@intFromEnum(Feature.experimental_ssaia)] = .{ | ||
| 218 | .llvm_name = "experimental-ssaia", | ||
| 219 | .description = "'Ssaia' (Ssaia is essentially the same as Smaia except excluding the machine-level CSRs and behavior not directly visible to supervisor level.)", | ||
| 220 | .dependencies = featureSet(&[_]Feature{}), | ||
| 221 | }; | ||
| 222 | result[@intFromEnum(Feature.experimental_zacas)] = .{ | ||
| 223 | .llvm_name = "experimental-zacas", | ||
| 224 | .description = "'Zacas' (Atomic Compare-And-Swap Instructions)", | ||
| 225 | .dependencies = featureSet(&[_]Feature{}), | ||
| 226 | }; | ||
| 227 | result[@intFromEnum(Feature.experimental_zfa)] = .{ | ||
| 228 | .llvm_name = "experimental-zfa", | ||
| 229 | .description = "'Zfa' (Additional Floating-Point)", | ||
| 230 | .dependencies = featureSet(&[_]Feature{ | ||
| 231 | .f, | ||
| 232 | }), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.experimental_zfbfmin)] = .{ | ||
| 235 | .llvm_name = "experimental-zfbfmin", | ||
| 236 | .description = "'Zfbfmin' (Scalar BF16 Converts)", | ||
| 237 | .dependencies = featureSet(&[_]Feature{ | ||
| 238 | .f, | ||
| 239 | }), | ||
| 240 | }; | ||
| 241 | result[@intFromEnum(Feature.experimental_zicond)] = .{ | ||
| 242 | .llvm_name = "experimental-zicond", | ||
| 243 | .description = "'Zicond' (Integer Conditional Operations)", | ||
| 244 | .dependencies = featureSet(&[_]Feature{}), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.experimental_zihintntl)] = .{ | ||
| 247 | .llvm_name = "experimental-zihintntl", | ||
| 248 | .description = "'Zihintntl' (Non-Temporal Locality Hints)", | ||
| 249 | .dependencies = featureSet(&[_]Feature{}), | ||
| 250 | }; | ||
| 251 | result[@intFromEnum(Feature.experimental_ztso)] = .{ | ||
| 252 | .llvm_name = "experimental-ztso", | ||
| 253 | .description = "'Ztso' (Memory Model - Total Store Order)", | ||
| 254 | .dependencies = featureSet(&[_]Feature{}), | ||
| 255 | }; | ||
| 256 | result[@intFromEnum(Feature.experimental_zvbb)] = .{ | ||
| 257 | .llvm_name = "experimental-zvbb", | ||
| 258 | .description = "'Zvbb' (Vector Bit-manipulation used in Cryptography)", | ||
| 259 | .dependencies = featureSet(&[_]Feature{}), | ||
| 260 | }; | ||
| 261 | result[@intFromEnum(Feature.experimental_zvbc)] = .{ | ||
| 262 | .llvm_name = "experimental-zvbc", | ||
| 263 | .description = "'Zvbc' (Vector Carryless Multiplication)", | ||
| 264 | .dependencies = featureSet(&[_]Feature{}), | ||
| 265 | }; | ||
| 266 | result[@intFromEnum(Feature.experimental_zvfbfmin)] = .{ | ||
| 267 | .llvm_name = "experimental-zvfbfmin", | ||
| 268 | .description = "'Zvbfmin' (Vector BF16 Converts)", | ||
| 269 | .dependencies = featureSet(&[_]Feature{ | ||
| 270 | .zve32f, | ||
| 271 | }), | ||
| 272 | }; | ||
| 273 | result[@intFromEnum(Feature.experimental_zvfbfwma)] = .{ | ||
| 274 | .llvm_name = "experimental-zvfbfwma", | ||
| 275 | .description = "'Zvfbfwma' (Vector BF16 widening mul-add)", | ||
| 276 | .dependencies = featureSet(&[_]Feature{ | ||
| 277 | .zve32f, | ||
| 278 | }), | ||
| 279 | }; | ||
| 280 | result[@intFromEnum(Feature.experimental_zvkg)] = .{ | ||
| 281 | .llvm_name = "experimental-zvkg", | ||
| 282 | .description = "'Zvkg' (Vector GCM instructions for Cryptography)", | ||
| 283 | .dependencies = featureSet(&[_]Feature{}), | ||
| 284 | }; | ||
| 285 | result[@intFromEnum(Feature.experimental_zvkn)] = .{ | ||
| 286 | .llvm_name = "experimental-zvkn", | ||
| 287 | .description = "This extension is shorthand for the following set of other extensions: Zvkned, Zvknhb, Zvbb, Zvbc, and Zvkt.", | ||
| 288 | .dependencies = featureSet(&[_]Feature{}), | ||
| 289 | }; | ||
| 290 | result[@intFromEnum(Feature.experimental_zvknc)] = .{ | ||
| 291 | .llvm_name = "experimental-zvknc", | ||
| 292 | .description = "This extension is shorthand for the following set of other extensions: Zvkn and Zvbc.", | ||
| 293 | .dependencies = featureSet(&[_]Feature{}), | ||
| 294 | }; | ||
| 295 | result[@intFromEnum(Feature.experimental_zvkned)] = .{ | ||
| 296 | .llvm_name = "experimental-zvkned", | ||
| 297 | .description = "'Zvkned' (Vector AES Encryption & Decryption (Single Round))", | ||
| 298 | .dependencies = featureSet(&[_]Feature{}), | ||
| 299 | }; | ||
| 300 | result[@intFromEnum(Feature.experimental_zvkng)] = .{ | ||
| 301 | .llvm_name = "experimental-zvkng", | ||
| 302 | .description = "This extension is shorthand for the following set of other extensions: Zvkn and Zvkg.", | ||
| 303 | .dependencies = featureSet(&[_]Feature{}), | ||
| 304 | }; | ||
| 305 | result[@intFromEnum(Feature.experimental_zvknha)] = .{ | ||
| 306 | .llvm_name = "experimental-zvknha", | ||
| 307 | .description = "'Zvknha' (Vector SHA-2 (SHA-256 only))", | ||
| 308 | .dependencies = featureSet(&[_]Feature{}), | ||
| 309 | }; | ||
| 310 | result[@intFromEnum(Feature.experimental_zvknhb)] = .{ | ||
| 311 | .llvm_name = "experimental-zvknhb", | ||
| 312 | .description = "'Zvknhb' (Vector SHA-2 (SHA-256 and SHA-512))", | ||
| 313 | .dependencies = featureSet(&[_]Feature{ | ||
| 314 | .experimental_zvknha, | ||
| 315 | }), | ||
| 316 | }; | ||
| 317 | result[@intFromEnum(Feature.experimental_zvks)] = .{ | ||
| 318 | .llvm_name = "experimental-zvks", | ||
| 319 | .description = "This extension is shorthand for the following set of other extensions: Zvksed, Zvksh, Zvbb, Zvbc, and Zvkt.", | ||
| 320 | .dependencies = featureSet(&[_]Feature{}), | ||
| 321 | }; | ||
| 322 | result[@intFromEnum(Feature.experimental_zvksc)] = .{ | ||
| 323 | .llvm_name = "experimental-zvksc", | ||
| 324 | .description = "This extension is shorthand for the following set of other extensions: Zvks and Zvbc.", | ||
| 325 | .dependencies = featureSet(&[_]Feature{}), | ||
| 326 | }; | ||
| 327 | result[@intFromEnum(Feature.experimental_zvksed)] = .{ | ||
| 328 | .llvm_name = "experimental-zvksed", | ||
| 329 | .description = "'Zvksed' (SM4 Block Cipher Instructions)", | ||
| 330 | .dependencies = featureSet(&[_]Feature{}), | ||
| 331 | }; | ||
| 332 | result[@intFromEnum(Feature.experimental_zvksg)] = .{ | ||
| 333 | .llvm_name = "experimental-zvksg", | ||
| 334 | .description = "This extension is shorthand for the following set of other extensions: Zvks and Zvkg.", | ||
| 335 | .dependencies = featureSet(&[_]Feature{}), | ||
| 336 | }; | ||
| 337 | result[@intFromEnum(Feature.experimental_zvksh)] = .{ | ||
| 338 | .llvm_name = "experimental-zvksh", | ||
| 339 | .description = "'Zvksh' (SM3 Hash Function Instructions)", | ||
| 340 | .dependencies = featureSet(&[_]Feature{}), | ||
| 341 | }; | ||
| 342 | result[@intFromEnum(Feature.experimental_zvkt)] = .{ | ||
| 343 | .llvm_name = "experimental-zvkt", | ||
| 344 | .description = "'Zvkt' (Vector Data-Independent Execution Latency)", | ||
| 345 | .dependencies = featureSet(&[_]Feature{}), | ||
| 346 | }; | ||
| 347 | result[@intFromEnum(Feature.f)] = .{ | ||
| 348 | .llvm_name = "f", | ||
| 349 | .description = "'F' (Single-Precision Floating-Point)", | ||
| 350 | .dependencies = featureSet(&[_]Feature{ | ||
| 351 | .zicsr, | ||
| 352 | }), | ||
| 353 | }; | ||
| 354 | result[@intFromEnum(Feature.forced_atomics)] = .{ | ||
| 355 | .llvm_name = "forced-atomics", | ||
| 356 | .description = "Assume that lock-free native-width atomics are available", | ||
| 357 | .dependencies = featureSet(&[_]Feature{}), | ||
| 358 | }; | ||
| 359 | result[@intFromEnum(Feature.h)] = .{ | ||
| 360 | .llvm_name = "h", | ||
| 361 | .description = "'H' (Hypervisor)", | ||
| 362 | .dependencies = featureSet(&[_]Feature{}), | ||
| 363 | }; | ||
| 364 | result[@intFromEnum(Feature.lui_addi_fusion)] = .{ | ||
| 365 | .llvm_name = "lui-addi-fusion", | ||
| 366 | .description = "Enable LUI+ADDI macrofusion", | ||
| 367 | .dependencies = featureSet(&[_]Feature{}), | ||
| 368 | }; | ||
| 369 | result[@intFromEnum(Feature.m)] = .{ | ||
| 370 | .llvm_name = "m", | ||
| 371 | .description = "'M' (Integer Multiplication and Division)", | ||
| 372 | .dependencies = featureSet(&[_]Feature{}), | ||
| 373 | }; | ||
| 374 | result[@intFromEnum(Feature.no_default_unroll)] = .{ | ||
| 375 | .llvm_name = "no-default-unroll", | ||
| 376 | .description = "Disable default unroll preference.", | ||
| 377 | .dependencies = featureSet(&[_]Feature{}), | ||
| 378 | }; | ||
| 379 | result[@intFromEnum(Feature.no_optimized_zero_stride_load)] = .{ | ||
| 380 | .llvm_name = "no-optimized-zero-stride-load", | ||
| 381 | .description = "Hasn't optimized (perform fewer memory operations)zero-stride vector load", | ||
| 382 | .dependencies = featureSet(&[_]Feature{}), | ||
| 383 | }; | ||
| 384 | result[@intFromEnum(Feature.no_rvc_hints)] = .{ | ||
| 385 | .llvm_name = "no-rvc-hints", | ||
| 386 | .description = "Disable RVC Hint Instructions.", | ||
| 387 | .dependencies = featureSet(&[_]Feature{}), | ||
| 388 | }; | ||
| 389 | result[@intFromEnum(Feature.relax)] = .{ | ||
| 390 | .llvm_name = "relax", | ||
| 391 | .description = "Enable Linker relaxation.", | ||
| 392 | .dependencies = featureSet(&[_]Feature{}), | ||
| 393 | }; | ||
| 394 | result[@intFromEnum(Feature.reserve_x1)] = .{ | ||
| 395 | .llvm_name = "reserve-x1", | ||
| 396 | .description = "Reserve X1", | ||
| 397 | .dependencies = featureSet(&[_]Feature{}), | ||
| 398 | }; | ||
| 399 | result[@intFromEnum(Feature.reserve_x10)] = .{ | ||
| 400 | .llvm_name = "reserve-x10", | ||
| 401 | .description = "Reserve X10", | ||
| 402 | .dependencies = featureSet(&[_]Feature{}), | ||
| 403 | }; | ||
| 404 | result[@intFromEnum(Feature.reserve_x11)] = .{ | ||
| 405 | .llvm_name = "reserve-x11", | ||
| 406 | .description = "Reserve X11", | ||
| 407 | .dependencies = featureSet(&[_]Feature{}), | ||
| 408 | }; | ||
| 409 | result[@intFromEnum(Feature.reserve_x12)] = .{ | ||
| 410 | .llvm_name = "reserve-x12", | ||
| 411 | .description = "Reserve X12", | ||
| 412 | .dependencies = featureSet(&[_]Feature{}), | ||
| 413 | }; | ||
| 414 | result[@intFromEnum(Feature.reserve_x13)] = .{ | ||
| 415 | .llvm_name = "reserve-x13", | ||
| 416 | .description = "Reserve X13", | ||
| 417 | .dependencies = featureSet(&[_]Feature{}), | ||
| 418 | }; | ||
| 419 | result[@intFromEnum(Feature.reserve_x14)] = .{ | ||
| 420 | .llvm_name = "reserve-x14", | ||
| 421 | .description = "Reserve X14", | ||
| 422 | .dependencies = featureSet(&[_]Feature{}), | ||
| 423 | }; | ||
| 424 | result[@intFromEnum(Feature.reserve_x15)] = .{ | ||
| 425 | .llvm_name = "reserve-x15", | ||
| 426 | .description = "Reserve X15", | ||
| 427 | .dependencies = featureSet(&[_]Feature{}), | ||
| 428 | }; | ||
| 429 | result[@intFromEnum(Feature.reserve_x16)] = .{ | ||
| 430 | .llvm_name = "reserve-x16", | ||
| 431 | .description = "Reserve X16", | ||
| 432 | .dependencies = featureSet(&[_]Feature{}), | ||
| 433 | }; | ||
| 434 | result[@intFromEnum(Feature.reserve_x17)] = .{ | ||
| 435 | .llvm_name = "reserve-x17", | ||
| 436 | .description = "Reserve X17", | ||
| 437 | .dependencies = featureSet(&[_]Feature{}), | ||
| 438 | }; | ||
| 439 | result[@intFromEnum(Feature.reserve_x18)] = .{ | ||
| 440 | .llvm_name = "reserve-x18", | ||
| 441 | .description = "Reserve X18", | ||
| 442 | .dependencies = featureSet(&[_]Feature{}), | ||
| 443 | }; | ||
| 444 | result[@intFromEnum(Feature.reserve_x19)] = .{ | ||
| 445 | .llvm_name = "reserve-x19", | ||
| 446 | .description = "Reserve X19", | ||
| 447 | .dependencies = featureSet(&[_]Feature{}), | ||
| 448 | }; | ||
| 449 | result[@intFromEnum(Feature.reserve_x2)] = .{ | ||
| 450 | .llvm_name = "reserve-x2", | ||
| 451 | .description = "Reserve X2", | ||
| 452 | .dependencies = featureSet(&[_]Feature{}), | ||
| 453 | }; | ||
| 454 | result[@intFromEnum(Feature.reserve_x20)] = .{ | ||
| 455 | .llvm_name = "reserve-x20", | ||
| 456 | .description = "Reserve X20", | ||
| 457 | .dependencies = featureSet(&[_]Feature{}), | ||
| 458 | }; | ||
| 459 | result[@intFromEnum(Feature.reserve_x21)] = .{ | ||
| 460 | .llvm_name = "reserve-x21", | ||
| 461 | .description = "Reserve X21", | ||
| 462 | .dependencies = featureSet(&[_]Feature{}), | ||
| 463 | }; | ||
| 464 | result[@intFromEnum(Feature.reserve_x22)] = .{ | ||
| 465 | .llvm_name = "reserve-x22", | ||
| 466 | .description = "Reserve X22", | ||
| 467 | .dependencies = featureSet(&[_]Feature{}), | ||
| 468 | }; | ||
| 469 | result[@intFromEnum(Feature.reserve_x23)] = .{ | ||
| 470 | .llvm_name = "reserve-x23", | ||
| 471 | .description = "Reserve X23", | ||
| 472 | .dependencies = featureSet(&[_]Feature{}), | ||
| 473 | }; | ||
| 474 | result[@intFromEnum(Feature.reserve_x24)] = .{ | ||
| 475 | .llvm_name = "reserve-x24", | ||
| 476 | .description = "Reserve X24", | ||
| 477 | .dependencies = featureSet(&[_]Feature{}), | ||
| 478 | }; | ||
| 479 | result[@intFromEnum(Feature.reserve_x25)] = .{ | ||
| 480 | .llvm_name = "reserve-x25", | ||
| 481 | .description = "Reserve X25", | ||
| 482 | .dependencies = featureSet(&[_]Feature{}), | ||
| 483 | }; | ||
| 484 | result[@intFromEnum(Feature.reserve_x26)] = .{ | ||
| 485 | .llvm_name = "reserve-x26", | ||
| 486 | .description = "Reserve X26", | ||
| 487 | .dependencies = featureSet(&[_]Feature{}), | ||
| 488 | }; | ||
| 489 | result[@intFromEnum(Feature.reserve_x27)] = .{ | ||
| 490 | .llvm_name = "reserve-x27", | ||
| 491 | .description = "Reserve X27", | ||
| 492 | .dependencies = featureSet(&[_]Feature{}), | ||
| 493 | }; | ||
| 494 | result[@intFromEnum(Feature.reserve_x28)] = .{ | ||
| 495 | .llvm_name = "reserve-x28", | ||
| 496 | .description = "Reserve X28", | ||
| 497 | .dependencies = featureSet(&[_]Feature{}), | ||
| 498 | }; | ||
| 499 | result[@intFromEnum(Feature.reserve_x29)] = .{ | ||
| 500 | .llvm_name = "reserve-x29", | ||
| 501 | .description = "Reserve X29", | ||
| 502 | .dependencies = featureSet(&[_]Feature{}), | ||
| 503 | }; | ||
| 504 | result[@intFromEnum(Feature.reserve_x3)] = .{ | ||
| 505 | .llvm_name = "reserve-x3", | ||
| 506 | .description = "Reserve X3", | ||
| 507 | .dependencies = featureSet(&[_]Feature{}), | ||
| 508 | }; | ||
| 509 | result[@intFromEnum(Feature.reserve_x30)] = .{ | ||
| 510 | .llvm_name = "reserve-x30", | ||
| 511 | .description = "Reserve X30", | ||
| 512 | .dependencies = featureSet(&[_]Feature{}), | ||
| 513 | }; | ||
| 514 | result[@intFromEnum(Feature.reserve_x31)] = .{ | ||
| 515 | .llvm_name = "reserve-x31", | ||
| 516 | .description = "Reserve X31", | ||
| 517 | .dependencies = featureSet(&[_]Feature{}), | ||
| 518 | }; | ||
| 519 | result[@intFromEnum(Feature.reserve_x4)] = .{ | ||
| 520 | .llvm_name = "reserve-x4", | ||
| 521 | .description = "Reserve X4", | ||
| 522 | .dependencies = featureSet(&[_]Feature{}), | ||
| 523 | }; | ||
| 524 | result[@intFromEnum(Feature.reserve_x5)] = .{ | ||
| 525 | .llvm_name = "reserve-x5", | ||
| 526 | .description = "Reserve X5", | ||
| 527 | .dependencies = featureSet(&[_]Feature{}), | ||
| 528 | }; | ||
| 529 | result[@intFromEnum(Feature.reserve_x6)] = .{ | ||
| 530 | .llvm_name = "reserve-x6", | ||
| 531 | .description = "Reserve X6", | ||
| 532 | .dependencies = featureSet(&[_]Feature{}), | ||
| 533 | }; | ||
| 534 | result[@intFromEnum(Feature.reserve_x7)] = .{ | ||
| 535 | .llvm_name = "reserve-x7", | ||
| 536 | .description = "Reserve X7", | ||
| 537 | .dependencies = featureSet(&[_]Feature{}), | ||
| 538 | }; | ||
| 539 | result[@intFromEnum(Feature.reserve_x8)] = .{ | ||
| 540 | .llvm_name = "reserve-x8", | ||
| 541 | .description = "Reserve X8", | ||
| 542 | .dependencies = featureSet(&[_]Feature{}), | ||
| 543 | }; | ||
| 544 | result[@intFromEnum(Feature.reserve_x9)] = .{ | ||
| 545 | .llvm_name = "reserve-x9", | ||
| 546 | .description = "Reserve X9", | ||
| 547 | .dependencies = featureSet(&[_]Feature{}), | ||
| 548 | }; | ||
| 549 | result[@intFromEnum(Feature.save_restore)] = .{ | ||
| 550 | .llvm_name = "save-restore", | ||
| 551 | .description = "Enable save/restore.", | ||
| 552 | .dependencies = featureSet(&[_]Feature{}), | ||
| 553 | }; | ||
| 554 | result[@intFromEnum(Feature.seq_cst_trailing_fence)] = .{ | ||
| 555 | .llvm_name = "seq-cst-trailing-fence", | ||
| 556 | .description = "Enable trailing fence for seq-cst store.", | ||
| 557 | .dependencies = featureSet(&[_]Feature{}), | ||
| 558 | }; | ||
| 559 | result[@intFromEnum(Feature.short_forward_branch_opt)] = .{ | ||
| 560 | .llvm_name = "short-forward-branch-opt", | ||
| 561 | .description = "Enable short forward branch optimization", | ||
| 562 | .dependencies = featureSet(&[_]Feature{}), | ||
| 563 | }; | ||
| 564 | result[@intFromEnum(Feature.svinval)] = .{ | ||
| 565 | .llvm_name = "svinval", | ||
| 566 | .description = "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)", | ||
| 567 | .dependencies = featureSet(&[_]Feature{}), | ||
| 568 | }; | ||
| 569 | result[@intFromEnum(Feature.svnapot)] = .{ | ||
| 570 | .llvm_name = "svnapot", | ||
| 571 | .description = "'Svnapot' (NAPOT Translation Contiguity)", | ||
| 572 | .dependencies = featureSet(&[_]Feature{}), | ||
| 573 | }; | ||
| 574 | result[@intFromEnum(Feature.svpbmt)] = .{ | ||
| 575 | .llvm_name = "svpbmt", | ||
| 576 | .description = "'Svpbmt' (Page-Based Memory Types)", | ||
| 577 | .dependencies = featureSet(&[_]Feature{}), | ||
| 578 | }; | ||
| 579 | result[@intFromEnum(Feature.tagged_globals)] = .{ | ||
| 580 | .llvm_name = "tagged-globals", | ||
| 581 | .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", | ||
| 582 | .dependencies = featureSet(&[_]Feature{}), | ||
| 583 | }; | ||
| 584 | result[@intFromEnum(Feature.unaligned_scalar_mem)] = .{ | ||
| 585 | .llvm_name = "unaligned-scalar-mem", | ||
| 586 | .description = "Has reasonably performant unaligned scalar loads and stores", | ||
| 587 | .dependencies = featureSet(&[_]Feature{}), | ||
| 588 | }; | ||
| 589 | result[@intFromEnum(Feature.unaligned_vector_mem)] = .{ | ||
| 590 | .llvm_name = "unaligned-vector-mem", | ||
| 591 | .description = "Has reasonably performant unaligned vector loads and stores", | ||
| 592 | .dependencies = featureSet(&[_]Feature{}), | ||
| 593 | }; | ||
| 594 | result[@intFromEnum(Feature.v)] = .{ | ||
| 595 | .llvm_name = "v", | ||
| 596 | .description = "'V' (Vector Extension for Application Processors)", | ||
| 597 | .dependencies = featureSet(&[_]Feature{ | ||
| 598 | .zve64d, | ||
| 599 | .zvl128b, | ||
| 600 | }), | ||
| 601 | }; | ||
| 602 | result[@intFromEnum(Feature.xcvbitmanip)] = .{ | ||
| 603 | .llvm_name = "xcvbitmanip", | ||
| 604 | .description = "'XCVbitmanip' (CORE-V Bit Manipulation)", | ||
| 605 | .dependencies = featureSet(&[_]Feature{}), | ||
| 606 | }; | ||
| 607 | result[@intFromEnum(Feature.xcvmac)] = .{ | ||
| 608 | .llvm_name = "xcvmac", | ||
| 609 | .description = "'XCVmac' (CORE-V Multiply-Accumulate)", | ||
| 610 | .dependencies = featureSet(&[_]Feature{}), | ||
| 611 | }; | ||
| 612 | result[@intFromEnum(Feature.xsfcie)] = .{ | ||
| 613 | .llvm_name = "xsfcie", | ||
| 614 | .description = "'XSfcie' (SiFive Custom Instruction Extension SCIE.)", | ||
| 615 | .dependencies = featureSet(&[_]Feature{}), | ||
| 616 | }; | ||
| 617 | result[@intFromEnum(Feature.xsfvcp)] = .{ | ||
| 618 | .llvm_name = "xsfvcp", | ||
| 619 | .description = "'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions)", | ||
| 620 | .dependencies = featureSet(&[_]Feature{ | ||
| 621 | .zve32x, | ||
| 622 | }), | ||
| 623 | }; | ||
| 624 | result[@intFromEnum(Feature.xtheadba)] = .{ | ||
| 625 | .llvm_name = "xtheadba", | ||
| 626 | .description = "'xtheadba' (T-Head address calculation instructions)", | ||
| 627 | .dependencies = featureSet(&[_]Feature{}), | ||
| 628 | }; | ||
| 629 | result[@intFromEnum(Feature.xtheadbb)] = .{ | ||
| 630 | .llvm_name = "xtheadbb", | ||
| 631 | .description = "'xtheadbb' (T-Head basic bit-manipulation instructions)", | ||
| 632 | .dependencies = featureSet(&[_]Feature{}), | ||
| 633 | }; | ||
| 634 | result[@intFromEnum(Feature.xtheadbs)] = .{ | ||
| 635 | .llvm_name = "xtheadbs", | ||
| 636 | .description = "'xtheadbs' (T-Head single-bit instructions)", | ||
| 637 | .dependencies = featureSet(&[_]Feature{}), | ||
| 638 | }; | ||
| 639 | result[@intFromEnum(Feature.xtheadcmo)] = .{ | ||
| 640 | .llvm_name = "xtheadcmo", | ||
| 641 | .description = "'xtheadcmo' (T-Head cache management instructions)", | ||
| 642 | .dependencies = featureSet(&[_]Feature{}), | ||
| 643 | }; | ||
| 644 | result[@intFromEnum(Feature.xtheadcondmov)] = .{ | ||
| 645 | .llvm_name = "xtheadcondmov", | ||
| 646 | .description = "'xtheadcondmov' (T-Head conditional move instructions)", | ||
| 647 | .dependencies = featureSet(&[_]Feature{}), | ||
| 648 | }; | ||
| 649 | result[@intFromEnum(Feature.xtheadfmemidx)] = .{ | ||
| 650 | .llvm_name = "xtheadfmemidx", | ||
| 651 | .description = "'xtheadfmemidx' (T-Head FP Indexed Memory Operations)", | ||
| 652 | .dependencies = featureSet(&[_]Feature{ | ||
| 653 | .f, | ||
| 654 | }), | ||
| 655 | }; | ||
| 656 | result[@intFromEnum(Feature.xtheadmac)] = .{ | ||
| 657 | .llvm_name = "xtheadmac", | ||
| 658 | .description = "'xtheadmac' (T-Head Multiply-Accumulate Instructions)", | ||
| 659 | .dependencies = featureSet(&[_]Feature{}), | ||
| 660 | }; | ||
| 661 | result[@intFromEnum(Feature.xtheadmemidx)] = .{ | ||
| 662 | .llvm_name = "xtheadmemidx", | ||
| 663 | .description = "'xtheadmemidx' (T-Head Indexed Memory Operations)", | ||
| 664 | .dependencies = featureSet(&[_]Feature{}), | ||
| 665 | }; | ||
| 666 | result[@intFromEnum(Feature.xtheadmempair)] = .{ | ||
| 667 | .llvm_name = "xtheadmempair", | ||
| 668 | .description = "'xtheadmempair' (T-Head two-GPR Memory Operations)", | ||
| 669 | .dependencies = featureSet(&[_]Feature{}), | ||
| 670 | }; | ||
| 671 | result[@intFromEnum(Feature.xtheadsync)] = .{ | ||
| 672 | .llvm_name = "xtheadsync", | ||
| 673 | .description = "'xtheadsync' (T-Head multicore synchronization instructions)", | ||
| 674 | .dependencies = featureSet(&[_]Feature{}), | ||
| 675 | }; | ||
| 676 | result[@intFromEnum(Feature.xtheadvdot)] = .{ | ||
| 677 | .llvm_name = "xtheadvdot", | ||
| 678 | .description = "'xtheadvdot' (T-Head Vector Extensions for Dot)", | ||
| 679 | .dependencies = featureSet(&[_]Feature{ | ||
| 680 | .v, | ||
| 681 | }), | ||
| 682 | }; | ||
| 683 | result[@intFromEnum(Feature.xventanacondops)] = .{ | ||
| 684 | .llvm_name = "xventanacondops", | ||
| 685 | .description = "'XVentanaCondOps' (Ventana Conditional Ops)", | ||
| 686 | .dependencies = featureSet(&[_]Feature{}), | ||
| 687 | }; | ||
| 688 | result[@intFromEnum(Feature.zawrs)] = .{ | ||
| 689 | .llvm_name = "zawrs", | ||
| 690 | .description = "'Zawrs' (Wait on Reservation Set)", | ||
| 691 | .dependencies = featureSet(&[_]Feature{}), | ||
| 692 | }; | ||
| 693 | result[@intFromEnum(Feature.zba)] = .{ | ||
| 694 | .llvm_name = "zba", | ||
| 695 | .description = "'Zba' (Address Generation Instructions)", | ||
| 696 | .dependencies = featureSet(&[_]Feature{}), | ||
| 697 | }; | ||
| 698 | result[@intFromEnum(Feature.zbb)] = .{ | ||
| 699 | .llvm_name = "zbb", | ||
| 700 | .description = "'Zbb' (Basic Bit-Manipulation)", | ||
| 701 | .dependencies = featureSet(&[_]Feature{}), | ||
| 702 | }; | ||
| 703 | result[@intFromEnum(Feature.zbc)] = .{ | ||
| 704 | .llvm_name = "zbc", | ||
| 705 | .description = "'Zbc' (Carry-Less Multiplication)", | ||
| 706 | .dependencies = featureSet(&[_]Feature{}), | ||
| 707 | }; | ||
| 708 | result[@intFromEnum(Feature.zbkb)] = .{ | ||
| 709 | .llvm_name = "zbkb", | ||
| 710 | .description = "'Zbkb' (Bitmanip instructions for Cryptography)", | ||
| 711 | .dependencies = featureSet(&[_]Feature{}), | ||
| 712 | }; | ||
| 713 | result[@intFromEnum(Feature.zbkc)] = .{ | ||
| 714 | .llvm_name = "zbkc", | ||
| 715 | .description = "'Zbkc' (Carry-less multiply instructions for Cryptography)", | ||
| 716 | .dependencies = featureSet(&[_]Feature{}), | ||
| 717 | }; | ||
| 718 | result[@intFromEnum(Feature.zbkx)] = .{ | ||
| 719 | .llvm_name = "zbkx", | ||
| 720 | .description = "'Zbkx' (Crossbar permutation instructions)", | ||
| 721 | .dependencies = featureSet(&[_]Feature{}), | ||
| 722 | }; | ||
| 723 | result[@intFromEnum(Feature.zbs)] = .{ | ||
| 724 | .llvm_name = "zbs", | ||
| 725 | .description = "'Zbs' (Single-Bit Instructions)", | ||
| 726 | .dependencies = featureSet(&[_]Feature{}), | ||
| 727 | }; | ||
| 728 | result[@intFromEnum(Feature.zca)] = .{ | ||
| 729 | .llvm_name = "zca", | ||
| 730 | .description = "'Zca' (part of the C extension, excluding compressed floating point loads/stores)", | ||
| 731 | .dependencies = featureSet(&[_]Feature{}), | ||
| 732 | }; | ||
| 733 | result[@intFromEnum(Feature.zcb)] = .{ | ||
| 734 | .llvm_name = "zcb", | ||
| 735 | .description = "'Zcb' (Compressed basic bit manipulation instructions)", | ||
| 736 | .dependencies = featureSet(&[_]Feature{ | ||
| 737 | .zca, | ||
| 738 | }), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.zcd)] = .{ | ||
| 741 | .llvm_name = "zcd", | ||
| 742 | .description = "'Zcd' (Compressed Double-Precision Floating-Point Instructions)", | ||
| 743 | .dependencies = featureSet(&[_]Feature{ | ||
| 744 | .zca, | ||
| 745 | }), | ||
| 746 | }; | ||
| 747 | result[@intFromEnum(Feature.zce)] = .{ | ||
| 748 | .llvm_name = "zce", | ||
| 749 | .description = "'Zce' (Compressed extensions for microcontrollers)", | ||
| 750 | .dependencies = featureSet(&[_]Feature{ | ||
| 751 | .zcb, | ||
| 752 | .zcmp, | ||
| 753 | .zcmt, | ||
| 754 | }), | ||
| 755 | }; | ||
| 756 | result[@intFromEnum(Feature.zcf)] = .{ | ||
| 757 | .llvm_name = "zcf", | ||
| 758 | .description = "'Zcf' (Compressed Single-Precision Floating-Point Instructions)", | ||
| 759 | .dependencies = featureSet(&[_]Feature{ | ||
| 760 | .zca, | ||
| 761 | }), | ||
| 762 | }; | ||
| 763 | result[@intFromEnum(Feature.zcmp)] = .{ | ||
| 764 | .llvm_name = "zcmp", | ||
| 765 | .description = "'Zcmp' (sequenced instuctions for code-size reduction)", | ||
| 766 | .dependencies = featureSet(&[_]Feature{ | ||
| 767 | .zca, | ||
| 768 | }), | ||
| 769 | }; | ||
| 770 | result[@intFromEnum(Feature.zcmt)] = .{ | ||
| 771 | .llvm_name = "zcmt", | ||
| 772 | .description = "'Zcmt' (table jump instuctions for code-size reduction)", | ||
| 773 | .dependencies = featureSet(&[_]Feature{ | ||
| 774 | .zca, | ||
| 775 | .zicsr, | ||
| 776 | }), | ||
| 777 | }; | ||
| 778 | result[@intFromEnum(Feature.zdinx)] = .{ | ||
| 779 | .llvm_name = "zdinx", | ||
| 780 | .description = "'Zdinx' (Double in Integer)", | ||
| 781 | .dependencies = featureSet(&[_]Feature{ | ||
| 782 | .zfinx, | ||
| 783 | }), | ||
| 784 | }; | ||
| 785 | result[@intFromEnum(Feature.zfh)] = .{ | ||
| 786 | .llvm_name = "zfh", | ||
| 787 | .description = "'Zfh' (Half-Precision Floating-Point)", | ||
| 788 | .dependencies = featureSet(&[_]Feature{ | ||
| 789 | .f, | ||
| 790 | }), | ||
| 791 | }; | ||
| 792 | result[@intFromEnum(Feature.zfhmin)] = .{ | ||
| 793 | .llvm_name = "zfhmin", | ||
| 794 | .description = "'Zfhmin' (Half-Precision Floating-Point Minimal)", | ||
| 795 | .dependencies = featureSet(&[_]Feature{ | ||
| 796 | .f, | ||
| 797 | }), | ||
| 798 | }; | ||
| 799 | result[@intFromEnum(Feature.zfinx)] = .{ | ||
| 800 | .llvm_name = "zfinx", | ||
| 801 | .description = "'Zfinx' (Float in Integer)", | ||
| 802 | .dependencies = featureSet(&[_]Feature{ | ||
| 803 | .zicsr, | ||
| 804 | }), | ||
| 805 | }; | ||
| 806 | result[@intFromEnum(Feature.zhinx)] = .{ | ||
| 807 | .llvm_name = "zhinx", | ||
| 808 | .description = "'Zhinx' (Half Float in Integer)", | ||
| 809 | .dependencies = featureSet(&[_]Feature{ | ||
| 810 | .zfinx, | ||
| 811 | }), | ||
| 812 | }; | ||
| 813 | result[@intFromEnum(Feature.zhinxmin)] = .{ | ||
| 814 | .llvm_name = "zhinxmin", | ||
| 815 | .description = "'Zhinxmin' (Half Float in Integer Minimal)", | ||
| 816 | .dependencies = featureSet(&[_]Feature{ | ||
| 817 | .zfinx, | ||
| 818 | }), | ||
| 819 | }; | ||
| 820 | result[@intFromEnum(Feature.zicbom)] = .{ | ||
| 821 | .llvm_name = "zicbom", | ||
| 822 | .description = "'Zicbom' (Cache-Block Management Instructions)", | ||
| 823 | .dependencies = featureSet(&[_]Feature{}), | ||
| 824 | }; | ||
| 825 | result[@intFromEnum(Feature.zicbop)] = .{ | ||
| 826 | .llvm_name = "zicbop", | ||
| 827 | .description = "'Zicbop' (Cache-Block Prefetch Instructions)", | ||
| 828 | .dependencies = featureSet(&[_]Feature{}), | ||
| 829 | }; | ||
| 830 | result[@intFromEnum(Feature.zicboz)] = .{ | ||
| 831 | .llvm_name = "zicboz", | ||
| 832 | .description = "'Zicboz' (Cache-Block Zero Instructions)", | ||
| 833 | .dependencies = featureSet(&[_]Feature{}), | ||
| 834 | }; | ||
| 835 | result[@intFromEnum(Feature.zicntr)] = .{ | ||
| 836 | .llvm_name = "zicntr", | ||
| 837 | .description = "'Zicntr' (Base Counters and Timers)", | ||
| 838 | .dependencies = featureSet(&[_]Feature{ | ||
| 839 | .zicsr, | ||
| 840 | }), | ||
| 841 | }; | ||
| 842 | result[@intFromEnum(Feature.zicsr)] = .{ | ||
| 843 | .llvm_name = "zicsr", | ||
| 844 | .description = "'zicsr' (CSRs)", | ||
| 845 | .dependencies = featureSet(&[_]Feature{}), | ||
| 846 | }; | ||
| 847 | result[@intFromEnum(Feature.zifencei)] = .{ | ||
| 848 | .llvm_name = "zifencei", | ||
| 849 | .description = "'Zifencei' (fence.i)", | ||
| 850 | .dependencies = featureSet(&[_]Feature{}), | ||
| 851 | }; | ||
| 852 | result[@intFromEnum(Feature.zihintpause)] = .{ | ||
| 853 | .llvm_name = "zihintpause", | ||
| 854 | .description = "'Zihintpause' (Pause Hint)", | ||
| 855 | .dependencies = featureSet(&[_]Feature{}), | ||
| 856 | }; | ||
| 857 | result[@intFromEnum(Feature.zihpm)] = .{ | ||
| 858 | .llvm_name = "zihpm", | ||
| 859 | .description = "'Zihpm' (Hardware Performance Counters)", | ||
| 860 | .dependencies = featureSet(&[_]Feature{ | ||
| 861 | .zicsr, | ||
| 862 | }), | ||
| 863 | }; | ||
| 864 | result[@intFromEnum(Feature.zk)] = .{ | ||
| 865 | .llvm_name = "zk", | ||
| 866 | .description = "'Zk' (Standard scalar cryptography extension)", | ||
| 867 | .dependencies = featureSet(&[_]Feature{ | ||
| 868 | .zkn, | ||
| 869 | .zkr, | ||
| 870 | .zkt, | ||
| 871 | }), | ||
| 872 | }; | ||
| 873 | result[@intFromEnum(Feature.zkn)] = .{ | ||
| 874 | .llvm_name = "zkn", | ||
| 875 | .description = "'Zkn' (NIST Algorithm Suite)", | ||
| 876 | .dependencies = featureSet(&[_]Feature{ | ||
| 877 | .zbkb, | ||
| 878 | .zbkc, | ||
| 879 | .zbkx, | ||
| 880 | .zknd, | ||
| 881 | .zkne, | ||
| 882 | .zknh, | ||
| 883 | }), | ||
| 884 | }; | ||
| 885 | result[@intFromEnum(Feature.zknd)] = .{ | ||
| 886 | .llvm_name = "zknd", | ||
| 887 | .description = "'Zknd' (NIST Suite: AES Decryption)", | ||
| 888 | .dependencies = featureSet(&[_]Feature{}), | ||
| 889 | }; | ||
| 890 | result[@intFromEnum(Feature.zkne)] = .{ | ||
| 891 | .llvm_name = "zkne", | ||
| 892 | .description = "'Zkne' (NIST Suite: AES Encryption)", | ||
| 893 | .dependencies = featureSet(&[_]Feature{}), | ||
| 894 | }; | ||
| 895 | result[@intFromEnum(Feature.zknh)] = .{ | ||
| 896 | .llvm_name = "zknh", | ||
| 897 | .description = "'Zknh' (NIST Suite: Hash Function Instructions)", | ||
| 898 | .dependencies = featureSet(&[_]Feature{}), | ||
| 899 | }; | ||
| 900 | result[@intFromEnum(Feature.zkr)] = .{ | ||
| 901 | .llvm_name = "zkr", | ||
| 902 | .description = "'Zkr' (Entropy Source Extension)", | ||
| 903 | .dependencies = featureSet(&[_]Feature{}), | ||
| 904 | }; | ||
| 905 | result[@intFromEnum(Feature.zks)] = .{ | ||
| 906 | .llvm_name = "zks", | ||
| 907 | .description = "'Zks' (ShangMi Algorithm Suite)", | ||
| 908 | .dependencies = featureSet(&[_]Feature{ | ||
| 909 | .zbkb, | ||
| 910 | .zbkc, | ||
| 911 | .zbkx, | ||
| 912 | .zksed, | ||
| 913 | .zksh, | ||
| 914 | }), | ||
| 915 | }; | ||
| 916 | result[@intFromEnum(Feature.zksed)] = .{ | ||
| 917 | .llvm_name = "zksed", | ||
| 918 | .description = "'Zksed' (ShangMi Suite: SM4 Block Cipher Instructions)", | ||
| 919 | .dependencies = featureSet(&[_]Feature{}), | ||
| 920 | }; | ||
| 921 | result[@intFromEnum(Feature.zksh)] = .{ | ||
| 922 | .llvm_name = "zksh", | ||
| 923 | .description = "'Zksh' (ShangMi Suite: SM3 Hash Function Instructions)", | ||
| 924 | .dependencies = featureSet(&[_]Feature{}), | ||
| 925 | }; | ||
| 926 | result[@intFromEnum(Feature.zkt)] = .{ | ||
| 927 | .llvm_name = "zkt", | ||
| 928 | .description = "'Zkt' (Data Independent Execution Latency)", | ||
| 929 | .dependencies = featureSet(&[_]Feature{}), | ||
| 930 | }; | ||
| 931 | result[@intFromEnum(Feature.zmmul)] = .{ | ||
| 932 | .llvm_name = "zmmul", | ||
| 933 | .description = "'Zmmul' (Integer Multiplication)", | ||
| 934 | .dependencies = featureSet(&[_]Feature{}), | ||
| 935 | }; | ||
| 936 | result[@intFromEnum(Feature.zve32f)] = .{ | ||
| 937 | .llvm_name = "zve32f", | ||
| 938 | .description = "'Zve32f' (Vector Extensions for Embedded Processors with maximal 32 EEW and F extension)", | ||
| 939 | .dependencies = featureSet(&[_]Feature{ | ||
| 940 | .f, | ||
| 941 | .zve32x, | ||
| 942 | }), | ||
| 943 | }; | ||
| 944 | result[@intFromEnum(Feature.zve32x)] = .{ | ||
| 945 | .llvm_name = "zve32x", | ||
| 946 | .description = "'Zve32x' (Vector Extensions for Embedded Processors with maximal 32 EEW)", | ||
| 947 | .dependencies = featureSet(&[_]Feature{ | ||
| 948 | .zicsr, | ||
| 949 | .zvl32b, | ||
| 950 | }), | ||
| 951 | }; | ||
| 952 | result[@intFromEnum(Feature.zve64d)] = .{ | ||
| 953 | .llvm_name = "zve64d", | ||
| 954 | .description = "'Zve64d' (Vector Extensions for Embedded Processors with maximal 64 EEW, F and D extension)", | ||
| 955 | .dependencies = featureSet(&[_]Feature{ | ||
| 956 | .d, | ||
| 957 | .zve64f, | ||
| 958 | }), | ||
| 959 | }; | ||
| 960 | result[@intFromEnum(Feature.zve64f)] = .{ | ||
| 961 | .llvm_name = "zve64f", | ||
| 962 | .description = "'Zve64f' (Vector Extensions for Embedded Processors with maximal 64 EEW and F extension)", | ||
| 963 | .dependencies = featureSet(&[_]Feature{ | ||
| 964 | .zve32f, | ||
| 965 | .zve64x, | ||
| 966 | }), | ||
| 967 | }; | ||
| 968 | result[@intFromEnum(Feature.zve64x)] = .{ | ||
| 969 | .llvm_name = "zve64x", | ||
| 970 | .description = "'Zve64x' (Vector Extensions for Embedded Processors with maximal 64 EEW)", | ||
| 971 | .dependencies = featureSet(&[_]Feature{ | ||
| 972 | .zve32x, | ||
| 973 | .zvl64b, | ||
| 974 | }), | ||
| 975 | }; | ||
| 976 | result[@intFromEnum(Feature.zvfh)] = .{ | ||
| 977 | .llvm_name = "zvfh", | ||
| 978 | .description = "'Zvfh' (Vector Half-Precision Floating-Point)", | ||
| 979 | .dependencies = featureSet(&[_]Feature{ | ||
| 980 | .zfhmin, | ||
| 981 | .zve32f, | ||
| 982 | }), | ||
| 983 | }; | ||
| 984 | result[@intFromEnum(Feature.zvl1024b)] = .{ | ||
| 985 | .llvm_name = "zvl1024b", | ||
| 986 | .description = "'Zvl' (Minimum Vector Length) 1024", | ||
| 987 | .dependencies = featureSet(&[_]Feature{ | ||
| 988 | .zvl512b, | ||
| 989 | }), | ||
| 990 | }; | ||
| 991 | result[@intFromEnum(Feature.zvl128b)] = .{ | ||
| 992 | .llvm_name = "zvl128b", | ||
| 993 | .description = "'Zvl' (Minimum Vector Length) 128", | ||
| 994 | .dependencies = featureSet(&[_]Feature{ | ||
| 995 | .zvl64b, | ||
| 996 | }), | ||
| 997 | }; | ||
| 998 | result[@intFromEnum(Feature.zvl16384b)] = .{ | ||
| 999 | .llvm_name = "zvl16384b", | ||
| 1000 | .description = "'Zvl' (Minimum Vector Length) 16384", | ||
| 1001 | .dependencies = featureSet(&[_]Feature{ | ||
| 1002 | .zvl8192b, | ||
| 1003 | }), | ||
| 1004 | }; | ||
| 1005 | result[@intFromEnum(Feature.zvl2048b)] = .{ | ||
| 1006 | .llvm_name = "zvl2048b", | ||
| 1007 | .description = "'Zvl' (Minimum Vector Length) 2048", | ||
| 1008 | .dependencies = featureSet(&[_]Feature{ | ||
| 1009 | .zvl1024b, | ||
| 1010 | }), | ||
| 1011 | }; | ||
| 1012 | result[@intFromEnum(Feature.zvl256b)] = .{ | ||
| 1013 | .llvm_name = "zvl256b", | ||
| 1014 | .description = "'Zvl' (Minimum Vector Length) 256", | ||
| 1015 | .dependencies = featureSet(&[_]Feature{ | ||
| 1016 | .zvl128b, | ||
| 1017 | }), | ||
| 1018 | }; | ||
| 1019 | result[@intFromEnum(Feature.zvl32768b)] = .{ | ||
| 1020 | .llvm_name = "zvl32768b", | ||
| 1021 | .description = "'Zvl' (Minimum Vector Length) 32768", | ||
| 1022 | .dependencies = featureSet(&[_]Feature{ | ||
| 1023 | .zvl16384b, | ||
| 1024 | }), | ||
| 1025 | }; | ||
| 1026 | result[@intFromEnum(Feature.zvl32b)] = .{ | ||
| 1027 | .llvm_name = "zvl32b", | ||
| 1028 | .description = "'Zvl' (Minimum Vector Length) 32", | ||
| 1029 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1030 | }; | ||
| 1031 | result[@intFromEnum(Feature.zvl4096b)] = .{ | ||
| 1032 | .llvm_name = "zvl4096b", | ||
| 1033 | .description = "'Zvl' (Minimum Vector Length) 4096", | ||
| 1034 | .dependencies = featureSet(&[_]Feature{ | ||
| 1035 | .zvl2048b, | ||
| 1036 | }), | ||
| 1037 | }; | ||
| 1038 | result[@intFromEnum(Feature.zvl512b)] = .{ | ||
| 1039 | .llvm_name = "zvl512b", | ||
| 1040 | .description = "'Zvl' (Minimum Vector Length) 512", | ||
| 1041 | .dependencies = featureSet(&[_]Feature{ | ||
| 1042 | .zvl256b, | ||
| 1043 | }), | ||
| 1044 | }; | ||
| 1045 | result[@intFromEnum(Feature.zvl64b)] = .{ | ||
| 1046 | .llvm_name = "zvl64b", | ||
| 1047 | .description = "'Zvl' (Minimum Vector Length) 64", | ||
| 1048 | .dependencies = featureSet(&[_]Feature{ | ||
| 1049 | .zvl32b, | ||
| 1050 | }), | ||
| 1051 | }; | ||
| 1052 | result[@intFromEnum(Feature.zvl65536b)] = .{ | ||
| 1053 | .llvm_name = "zvl65536b", | ||
| 1054 | .description = "'Zvl' (Minimum Vector Length) 65536", | ||
| 1055 | .dependencies = featureSet(&[_]Feature{ | ||
| 1056 | .zvl32768b, | ||
| 1057 | }), | ||
| 1058 | }; | ||
| 1059 | result[@intFromEnum(Feature.zvl8192b)] = .{ | ||
| 1060 | .llvm_name = "zvl8192b", | ||
| 1061 | .description = "'Zvl' (Minimum Vector Length) 8192", | ||
| 1062 | .dependencies = featureSet(&[_]Feature{ | ||
| 1063 | .zvl4096b, | ||
| 1064 | }), | ||
| 1065 | }; | ||
| 1066 | const ti = @typeInfo(Feature); | ||
| 1067 | for (&result, 0..) |*elem, i| { | ||
| 1068 | elem.index = i; | ||
| 1069 | elem.name = ti.Enum.fields[i].name; | ||
| 1070 | } | ||
| 1071 | break :blk result; | ||
| 1072 | }; | ||
| 1073 | |||
| 1074 | pub const cpu = struct { | ||
| 1075 | pub const baseline_rv32 = CpuModel{ | ||
| 1076 | .name = "baseline_rv32", | ||
| 1077 | .llvm_name = null, | ||
| 1078 | .features = featureSet(&[_]Feature{ | ||
| 1079 | .@"32bit", | ||
| 1080 | .a, | ||
| 1081 | .c, | ||
| 1082 | .d, | ||
| 1083 | .m, | ||
| 1084 | }), | ||
| 1085 | }; | ||
| 1086 | pub const baseline_rv64 = CpuModel{ | ||
| 1087 | .name = "baseline_rv64", | ||
| 1088 | .llvm_name = null, | ||
| 1089 | .features = featureSet(&[_]Feature{ | ||
| 1090 | .@"64bit", | ||
| 1091 | .a, | ||
| 1092 | .c, | ||
| 1093 | .d, | ||
| 1094 | .m, | ||
| 1095 | }), | ||
| 1096 | }; | ||
| 1097 | pub const generic = CpuModel{ | ||
| 1098 | .name = "generic", | ||
| 1099 | .llvm_name = "generic", | ||
| 1100 | .features = featureSet(&[_]Feature{}), | ||
| 1101 | }; | ||
| 1102 | pub const generic_rv32 = CpuModel{ | ||
| 1103 | .name = "generic_rv32", | ||
| 1104 | .llvm_name = "generic-rv32", | ||
| 1105 | .features = featureSet(&[_]Feature{ | ||
| 1106 | .@"32bit", | ||
| 1107 | }), | ||
| 1108 | }; | ||
| 1109 | pub const generic_rv64 = CpuModel{ | ||
| 1110 | .name = "generic_rv64", | ||
| 1111 | .llvm_name = "generic-rv64", | ||
| 1112 | .features = featureSet(&[_]Feature{ | ||
| 1113 | .@"64bit", | ||
| 1114 | }), | ||
| 1115 | }; | ||
| 1116 | pub const rocket = CpuModel{ | ||
| 1117 | .name = "rocket", | ||
| 1118 | .llvm_name = "rocket", | ||
| 1119 | .features = featureSet(&[_]Feature{}), | ||
| 1120 | }; | ||
| 1121 | pub const rocket_rv32 = CpuModel{ | ||
| 1122 | .name = "rocket_rv32", | ||
| 1123 | .llvm_name = "rocket-rv32", | ||
| 1124 | .features = featureSet(&[_]Feature{ | ||
| 1125 | .@"32bit", | ||
| 1126 | .zicsr, | ||
| 1127 | .zifencei, | ||
| 1128 | }), | ||
| 1129 | }; | ||
| 1130 | pub const rocket_rv64 = CpuModel{ | ||
| 1131 | .name = "rocket_rv64", | ||
| 1132 | .llvm_name = "rocket-rv64", | ||
| 1133 | .features = featureSet(&[_]Feature{ | ||
| 1134 | .@"64bit", | ||
| 1135 | .zicsr, | ||
| 1136 | .zifencei, | ||
| 1137 | }), | ||
| 1138 | }; | ||
| 1139 | pub const sifive_7_series = CpuModel{ | ||
| 1140 | .name = "sifive_7_series", | ||
| 1141 | .llvm_name = "sifive-7-series", | ||
| 1142 | .features = featureSet(&[_]Feature{ | ||
| 1143 | .no_default_unroll, | ||
| 1144 | .short_forward_branch_opt, | ||
| 1145 | }), | ||
| 1146 | }; | ||
| 1147 | pub const sifive_e20 = CpuModel{ | ||
| 1148 | .name = "sifive_e20", | ||
| 1149 | .llvm_name = "sifive-e20", | ||
| 1150 | .features = featureSet(&[_]Feature{ | ||
| 1151 | .@"32bit", | ||
| 1152 | .c, | ||
| 1153 | .m, | ||
| 1154 | .zicsr, | ||
| 1155 | .zifencei, | ||
| 1156 | }), | ||
| 1157 | }; | ||
| 1158 | pub const sifive_e21 = CpuModel{ | ||
| 1159 | .name = "sifive_e21", | ||
| 1160 | .llvm_name = "sifive-e21", | ||
| 1161 | .features = featureSet(&[_]Feature{ | ||
| 1162 | .@"32bit", | ||
| 1163 | .a, | ||
| 1164 | .c, | ||
| 1165 | .m, | ||
| 1166 | .zicsr, | ||
| 1167 | .zifencei, | ||
| 1168 | }), | ||
| 1169 | }; | ||
| 1170 | pub const sifive_e24 = CpuModel{ | ||
| 1171 | .name = "sifive_e24", | ||
| 1172 | .llvm_name = "sifive-e24", | ||
| 1173 | .features = featureSet(&[_]Feature{ | ||
| 1174 | .@"32bit", | ||
| 1175 | .a, | ||
| 1176 | .c, | ||
| 1177 | .f, | ||
| 1178 | .m, | ||
| 1179 | .zifencei, | ||
| 1180 | }), | ||
| 1181 | }; | ||
| 1182 | pub const sifive_e31 = CpuModel{ | ||
| 1183 | .name = "sifive_e31", | ||
| 1184 | .llvm_name = "sifive-e31", | ||
| 1185 | .features = featureSet(&[_]Feature{ | ||
| 1186 | .@"32bit", | ||
| 1187 | .a, | ||
| 1188 | .c, | ||
| 1189 | .m, | ||
| 1190 | .zicsr, | ||
| 1191 | .zifencei, | ||
| 1192 | }), | ||
| 1193 | }; | ||
| 1194 | pub const sifive_e34 = CpuModel{ | ||
| 1195 | .name = "sifive_e34", | ||
| 1196 | .llvm_name = "sifive-e34", | ||
| 1197 | .features = featureSet(&[_]Feature{ | ||
| 1198 | .@"32bit", | ||
| 1199 | .a, | ||
| 1200 | .c, | ||
| 1201 | .f, | ||
| 1202 | .m, | ||
| 1203 | .zifencei, | ||
| 1204 | }), | ||
| 1205 | }; | ||
| 1206 | pub const sifive_e76 = CpuModel{ | ||
| 1207 | .name = "sifive_e76", | ||
| 1208 | .llvm_name = "sifive-e76", | ||
| 1209 | .features = featureSet(&[_]Feature{ | ||
| 1210 | .@"32bit", | ||
| 1211 | .a, | ||
| 1212 | .c, | ||
| 1213 | .f, | ||
| 1214 | .m, | ||
| 1215 | .no_default_unroll, | ||
| 1216 | .short_forward_branch_opt, | ||
| 1217 | .zifencei, | ||
| 1218 | }), | ||
| 1219 | }; | ||
| 1220 | pub const sifive_s21 = CpuModel{ | ||
| 1221 | .name = "sifive_s21", | ||
| 1222 | .llvm_name = "sifive-s21", | ||
| 1223 | .features = featureSet(&[_]Feature{ | ||
| 1224 | .@"64bit", | ||
| 1225 | .a, | ||
| 1226 | .c, | ||
| 1227 | .m, | ||
| 1228 | .zicsr, | ||
| 1229 | .zifencei, | ||
| 1230 | }), | ||
| 1231 | }; | ||
| 1232 | pub const sifive_s51 = CpuModel{ | ||
| 1233 | .name = "sifive_s51", | ||
| 1234 | .llvm_name = "sifive-s51", | ||
| 1235 | .features = featureSet(&[_]Feature{ | ||
| 1236 | .@"64bit", | ||
| 1237 | .a, | ||
| 1238 | .c, | ||
| 1239 | .m, | ||
| 1240 | .zicsr, | ||
| 1241 | .zifencei, | ||
| 1242 | }), | ||
| 1243 | }; | ||
| 1244 | pub const sifive_s54 = CpuModel{ | ||
| 1245 | .name = "sifive_s54", | ||
| 1246 | .llvm_name = "sifive-s54", | ||
| 1247 | .features = featureSet(&[_]Feature{ | ||
| 1248 | .@"64bit", | ||
| 1249 | .a, | ||
| 1250 | .c, | ||
| 1251 | .d, | ||
| 1252 | .m, | ||
| 1253 | .zifencei, | ||
| 1254 | }), | ||
| 1255 | }; | ||
| 1256 | pub const sifive_s76 = CpuModel{ | ||
| 1257 | .name = "sifive_s76", | ||
| 1258 | .llvm_name = "sifive-s76", | ||
| 1259 | .features = featureSet(&[_]Feature{ | ||
| 1260 | .@"64bit", | ||
| 1261 | .a, | ||
| 1262 | .c, | ||
| 1263 | .d, | ||
| 1264 | .m, | ||
| 1265 | .no_default_unroll, | ||
| 1266 | .short_forward_branch_opt, | ||
| 1267 | .xsfcie, | ||
| 1268 | .zifencei, | ||
| 1269 | .zihintpause, | ||
| 1270 | }), | ||
| 1271 | }; | ||
| 1272 | pub const sifive_u54 = CpuModel{ | ||
| 1273 | .name = "sifive_u54", | ||
| 1274 | .llvm_name = "sifive-u54", | ||
| 1275 | .features = featureSet(&[_]Feature{ | ||
| 1276 | .@"64bit", | ||
| 1277 | .a, | ||
| 1278 | .c, | ||
| 1279 | .d, | ||
| 1280 | .m, | ||
| 1281 | .zifencei, | ||
| 1282 | }), | ||
| 1283 | }; | ||
| 1284 | pub const sifive_u74 = CpuModel{ | ||
| 1285 | .name = "sifive_u74", | ||
| 1286 | .llvm_name = "sifive-u74", | ||
| 1287 | .features = featureSet(&[_]Feature{ | ||
| 1288 | .@"64bit", | ||
| 1289 | .a, | ||
| 1290 | .c, | ||
| 1291 | .d, | ||
| 1292 | .m, | ||
| 1293 | .no_default_unroll, | ||
| 1294 | .short_forward_branch_opt, | ||
| 1295 | .zifencei, | ||
| 1296 | }), | ||
| 1297 | }; | ||
| 1298 | pub const sifive_x280 = CpuModel{ | ||
| 1299 | .name = "sifive_x280", | ||
| 1300 | .llvm_name = "sifive-x280", | ||
| 1301 | .features = featureSet(&[_]Feature{ | ||
| 1302 | .@"64bit", | ||
| 1303 | .a, | ||
| 1304 | .c, | ||
| 1305 | .dlen_factor_2, | ||
| 1306 | .m, | ||
| 1307 | .no_default_unroll, | ||
| 1308 | .short_forward_branch_opt, | ||
| 1309 | .v, | ||
| 1310 | .zba, | ||
| 1311 | .zbb, | ||
| 1312 | .zfh, | ||
| 1313 | .zifencei, | ||
| 1314 | .zvfh, | ||
| 1315 | .zvl512b, | ||
| 1316 | }), | ||
| 1317 | }; | ||
| 1318 | pub const syntacore_scr1_base = CpuModel{ | ||
| 1319 | .name = "syntacore_scr1_base", | ||
| 1320 | .llvm_name = "syntacore-scr1-base", | ||
| 1321 | .features = featureSet(&[_]Feature{ | ||
| 1322 | .@"32bit", | ||
| 1323 | .c, | ||
| 1324 | .no_default_unroll, | ||
| 1325 | .zicsr, | ||
| 1326 | .zifencei, | ||
| 1327 | }), | ||
| 1328 | }; | ||
| 1329 | pub const syntacore_scr1_max = CpuModel{ | ||
| 1330 | .name = "syntacore_scr1_max", | ||
| 1331 | .llvm_name = "syntacore-scr1-max", | ||
| 1332 | .features = featureSet(&[_]Feature{ | ||
| 1333 | .@"32bit", | ||
| 1334 | .c, | ||
| 1335 | .m, | ||
| 1336 | .no_default_unroll, | ||
| 1337 | .zicsr, | ||
| 1338 | .zifencei, | ||
| 1339 | }), | ||
| 1340 | }; | ||
| 1341 | }; | ||
lib/std/target/s390x.zig deleted-667
| ... | @@ -1,667 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | bear_enhancement, | ||
| 9 | deflate_conversion, | ||
| 10 | dfp_packed_conversion, | ||
| 11 | dfp_zoned_conversion, | ||
| 12 | distinct_ops, | ||
| 13 | enhanced_dat_2, | ||
| 14 | enhanced_sort, | ||
| 15 | execution_hint, | ||
| 16 | fast_serialization, | ||
| 17 | fp_extension, | ||
| 18 | guarded_storage, | ||
| 19 | high_word, | ||
| 20 | insert_reference_bits_multiple, | ||
| 21 | interlocked_access1, | ||
| 22 | load_and_trap, | ||
| 23 | load_and_zero_rightmost_byte, | ||
| 24 | load_store_on_cond, | ||
| 25 | load_store_on_cond_2, | ||
| 26 | message_security_assist_extension3, | ||
| 27 | message_security_assist_extension4, | ||
| 28 | message_security_assist_extension5, | ||
| 29 | message_security_assist_extension7, | ||
| 30 | message_security_assist_extension8, | ||
| 31 | message_security_assist_extension9, | ||
| 32 | miscellaneous_extensions, | ||
| 33 | miscellaneous_extensions_2, | ||
| 34 | miscellaneous_extensions_3, | ||
| 35 | nnp_assist, | ||
| 36 | population_count, | ||
| 37 | processor_activity_instrumentation, | ||
| 38 | processor_assist, | ||
| 39 | reset_dat_protection, | ||
| 40 | reset_reference_bits_multiple, | ||
| 41 | soft_float, | ||
| 42 | transactional_execution, | ||
| 43 | vector, | ||
| 44 | vector_enhancements_1, | ||
| 45 | vector_enhancements_2, | ||
| 46 | vector_packed_decimal, | ||
| 47 | vector_packed_decimal_enhancement, | ||
| 48 | vector_packed_decimal_enhancement_2, | ||
| 49 | }; | ||
| 50 | |||
| 51 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 52 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 53 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 54 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 55 | |||
| 56 | pub const all_features = blk: { | ||
| 57 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 58 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 59 | var result: [len]CpuFeature = undefined; | ||
| 60 | result[@intFromEnum(Feature.bear_enhancement)] = .{ | ||
| 61 | .llvm_name = "bear-enhancement", | ||
| 62 | .description = "Assume that the BEAR-enhancement facility is installed", | ||
| 63 | .dependencies = featureSet(&[_]Feature{}), | ||
| 64 | }; | ||
| 65 | result[@intFromEnum(Feature.deflate_conversion)] = .{ | ||
| 66 | .llvm_name = "deflate-conversion", | ||
| 67 | .description = "Assume that the deflate-conversion facility is installed", | ||
| 68 | .dependencies = featureSet(&[_]Feature{}), | ||
| 69 | }; | ||
| 70 | result[@intFromEnum(Feature.dfp_packed_conversion)] = .{ | ||
| 71 | .llvm_name = "dfp-packed-conversion", | ||
| 72 | .description = "Assume that the DFP packed-conversion facility is installed", | ||
| 73 | .dependencies = featureSet(&[_]Feature{}), | ||
| 74 | }; | ||
| 75 | result[@intFromEnum(Feature.dfp_zoned_conversion)] = .{ | ||
| 76 | .llvm_name = "dfp-zoned-conversion", | ||
| 77 | .description = "Assume that the DFP zoned-conversion facility is installed", | ||
| 78 | .dependencies = featureSet(&[_]Feature{}), | ||
| 79 | }; | ||
| 80 | result[@intFromEnum(Feature.distinct_ops)] = .{ | ||
| 81 | .llvm_name = "distinct-ops", | ||
| 82 | .description = "Assume that the distinct-operands facility is installed", | ||
| 83 | .dependencies = featureSet(&[_]Feature{}), | ||
| 84 | }; | ||
| 85 | result[@intFromEnum(Feature.enhanced_dat_2)] = .{ | ||
| 86 | .llvm_name = "enhanced-dat-2", | ||
| 87 | .description = "Assume that the enhanced-DAT facility 2 is installed", | ||
| 88 | .dependencies = featureSet(&[_]Feature{}), | ||
| 89 | }; | ||
| 90 | result[@intFromEnum(Feature.enhanced_sort)] = .{ | ||
| 91 | .llvm_name = "enhanced-sort", | ||
| 92 | .description = "Assume that the enhanced-sort facility is installed", | ||
| 93 | .dependencies = featureSet(&[_]Feature{}), | ||
| 94 | }; | ||
| 95 | result[@intFromEnum(Feature.execution_hint)] = .{ | ||
| 96 | .llvm_name = "execution-hint", | ||
| 97 | .description = "Assume that the execution-hint facility is installed", | ||
| 98 | .dependencies = featureSet(&[_]Feature{}), | ||
| 99 | }; | ||
| 100 | result[@intFromEnum(Feature.fast_serialization)] = .{ | ||
| 101 | .llvm_name = "fast-serialization", | ||
| 102 | .description = "Assume that the fast-serialization facility is installed", | ||
| 103 | .dependencies = featureSet(&[_]Feature{}), | ||
| 104 | }; | ||
| 105 | result[@intFromEnum(Feature.fp_extension)] = .{ | ||
| 106 | .llvm_name = "fp-extension", | ||
| 107 | .description = "Assume that the floating-point extension facility is installed", | ||
| 108 | .dependencies = featureSet(&[_]Feature{}), | ||
| 109 | }; | ||
| 110 | result[@intFromEnum(Feature.guarded_storage)] = .{ | ||
| 111 | .llvm_name = "guarded-storage", | ||
| 112 | .description = "Assume that the guarded-storage facility is installed", | ||
| 113 | .dependencies = featureSet(&[_]Feature{}), | ||
| 114 | }; | ||
| 115 | result[@intFromEnum(Feature.high_word)] = .{ | ||
| 116 | .llvm_name = "high-word", | ||
| 117 | .description = "Assume that the high-word facility is installed", | ||
| 118 | .dependencies = featureSet(&[_]Feature{}), | ||
| 119 | }; | ||
| 120 | result[@intFromEnum(Feature.insert_reference_bits_multiple)] = .{ | ||
| 121 | .llvm_name = "insert-reference-bits-multiple", | ||
| 122 | .description = "Assume that the insert-reference-bits-multiple facility is installed", | ||
| 123 | .dependencies = featureSet(&[_]Feature{}), | ||
| 124 | }; | ||
| 125 | result[@intFromEnum(Feature.interlocked_access1)] = .{ | ||
| 126 | .llvm_name = "interlocked-access1", | ||
| 127 | .description = "Assume that interlocked-access facility 1 is installed", | ||
| 128 | .dependencies = featureSet(&[_]Feature{}), | ||
| 129 | }; | ||
| 130 | result[@intFromEnum(Feature.load_and_trap)] = .{ | ||
| 131 | .llvm_name = "load-and-trap", | ||
| 132 | .description = "Assume that the load-and-trap facility is installed", | ||
| 133 | .dependencies = featureSet(&[_]Feature{}), | ||
| 134 | }; | ||
| 135 | result[@intFromEnum(Feature.load_and_zero_rightmost_byte)] = .{ | ||
| 136 | .llvm_name = "load-and-zero-rightmost-byte", | ||
| 137 | .description = "Assume that the load-and-zero-rightmost-byte facility is installed", | ||
| 138 | .dependencies = featureSet(&[_]Feature{}), | ||
| 139 | }; | ||
| 140 | result[@intFromEnum(Feature.load_store_on_cond)] = .{ | ||
| 141 | .llvm_name = "load-store-on-cond", | ||
| 142 | .description = "Assume that the load/store-on-condition facility is installed", | ||
| 143 | .dependencies = featureSet(&[_]Feature{}), | ||
| 144 | }; | ||
| 145 | result[@intFromEnum(Feature.load_store_on_cond_2)] = .{ | ||
| 146 | .llvm_name = "load-store-on-cond-2", | ||
| 147 | .description = "Assume that the load/store-on-condition facility 2 is installed", | ||
| 148 | .dependencies = featureSet(&[_]Feature{}), | ||
| 149 | }; | ||
| 150 | result[@intFromEnum(Feature.message_security_assist_extension3)] = .{ | ||
| 151 | .llvm_name = "message-security-assist-extension3", | ||
| 152 | .description = "Assume that the message-security-assist extension facility 3 is installed", | ||
| 153 | .dependencies = featureSet(&[_]Feature{}), | ||
| 154 | }; | ||
| 155 | result[@intFromEnum(Feature.message_security_assist_extension4)] = .{ | ||
| 156 | .llvm_name = "message-security-assist-extension4", | ||
| 157 | .description = "Assume that the message-security-assist extension facility 4 is installed", | ||
| 158 | .dependencies = featureSet(&[_]Feature{}), | ||
| 159 | }; | ||
| 160 | result[@intFromEnum(Feature.message_security_assist_extension5)] = .{ | ||
| 161 | .llvm_name = "message-security-assist-extension5", | ||
| 162 | .description = "Assume that the message-security-assist extension facility 5 is installed", | ||
| 163 | .dependencies = featureSet(&[_]Feature{}), | ||
| 164 | }; | ||
| 165 | result[@intFromEnum(Feature.message_security_assist_extension7)] = .{ | ||
| 166 | .llvm_name = "message-security-assist-extension7", | ||
| 167 | .description = "Assume that the message-security-assist extension facility 7 is installed", | ||
| 168 | .dependencies = featureSet(&[_]Feature{}), | ||
| 169 | }; | ||
| 170 | result[@intFromEnum(Feature.message_security_assist_extension8)] = .{ | ||
| 171 | .llvm_name = "message-security-assist-extension8", | ||
| 172 | .description = "Assume that the message-security-assist extension facility 8 is installed", | ||
| 173 | .dependencies = featureSet(&[_]Feature{}), | ||
| 174 | }; | ||
| 175 | result[@intFromEnum(Feature.message_security_assist_extension9)] = .{ | ||
| 176 | .llvm_name = "message-security-assist-extension9", | ||
| 177 | .description = "Assume that the message-security-assist extension facility 9 is installed", | ||
| 178 | .dependencies = featureSet(&[_]Feature{}), | ||
| 179 | }; | ||
| 180 | result[@intFromEnum(Feature.miscellaneous_extensions)] = .{ | ||
| 181 | .llvm_name = "miscellaneous-extensions", | ||
| 182 | .description = "Assume that the miscellaneous-extensions facility is installed", | ||
| 183 | .dependencies = featureSet(&[_]Feature{}), | ||
| 184 | }; | ||
| 185 | result[@intFromEnum(Feature.miscellaneous_extensions_2)] = .{ | ||
| 186 | .llvm_name = "miscellaneous-extensions-2", | ||
| 187 | .description = "Assume that the miscellaneous-extensions facility 2 is installed", | ||
| 188 | .dependencies = featureSet(&[_]Feature{}), | ||
| 189 | }; | ||
| 190 | result[@intFromEnum(Feature.miscellaneous_extensions_3)] = .{ | ||
| 191 | .llvm_name = "miscellaneous-extensions-3", | ||
| 192 | .description = "Assume that the miscellaneous-extensions facility 3 is installed", | ||
| 193 | .dependencies = featureSet(&[_]Feature{}), | ||
| 194 | }; | ||
| 195 | result[@intFromEnum(Feature.nnp_assist)] = .{ | ||
| 196 | .llvm_name = "nnp-assist", | ||
| 197 | .description = "Assume that the NNP-assist facility is installed", | ||
| 198 | .dependencies = featureSet(&[_]Feature{}), | ||
| 199 | }; | ||
| 200 | result[@intFromEnum(Feature.population_count)] = .{ | ||
| 201 | .llvm_name = "population-count", | ||
| 202 | .description = "Assume that the population-count facility is installed", | ||
| 203 | .dependencies = featureSet(&[_]Feature{}), | ||
| 204 | }; | ||
| 205 | result[@intFromEnum(Feature.processor_activity_instrumentation)] = .{ | ||
| 206 | .llvm_name = "processor-activity-instrumentation", | ||
| 207 | .description = "Assume that the processor-activity-instrumentation facility is installed", | ||
| 208 | .dependencies = featureSet(&[_]Feature{}), | ||
| 209 | }; | ||
| 210 | result[@intFromEnum(Feature.processor_assist)] = .{ | ||
| 211 | .llvm_name = "processor-assist", | ||
| 212 | .description = "Assume that the processor-assist facility is installed", | ||
| 213 | .dependencies = featureSet(&[_]Feature{}), | ||
| 214 | }; | ||
| 215 | result[@intFromEnum(Feature.reset_dat_protection)] = .{ | ||
| 216 | .llvm_name = "reset-dat-protection", | ||
| 217 | .description = "Assume that the reset-DAT-protection facility is installed", | ||
| 218 | .dependencies = featureSet(&[_]Feature{}), | ||
| 219 | }; | ||
| 220 | result[@intFromEnum(Feature.reset_reference_bits_multiple)] = .{ | ||
| 221 | .llvm_name = "reset-reference-bits-multiple", | ||
| 222 | .description = "Assume that the reset-reference-bits-multiple facility is installed", | ||
| 223 | .dependencies = featureSet(&[_]Feature{}), | ||
| 224 | }; | ||
| 225 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 226 | .llvm_name = "soft-float", | ||
| 227 | .description = "Use software emulation for floating point", | ||
| 228 | .dependencies = featureSet(&[_]Feature{}), | ||
| 229 | }; | ||
| 230 | result[@intFromEnum(Feature.transactional_execution)] = .{ | ||
| 231 | .llvm_name = "transactional-execution", | ||
| 232 | .description = "Assume that the transactional-execution facility is installed", | ||
| 233 | .dependencies = featureSet(&[_]Feature{}), | ||
| 234 | }; | ||
| 235 | result[@intFromEnum(Feature.vector)] = .{ | ||
| 236 | .llvm_name = "vector", | ||
| 237 | .description = "Assume that the vectory facility is installed", | ||
| 238 | .dependencies = featureSet(&[_]Feature{}), | ||
| 239 | }; | ||
| 240 | result[@intFromEnum(Feature.vector_enhancements_1)] = .{ | ||
| 241 | .llvm_name = "vector-enhancements-1", | ||
| 242 | .description = "Assume that the vector enhancements facility 1 is installed", | ||
| 243 | .dependencies = featureSet(&[_]Feature{}), | ||
| 244 | }; | ||
| 245 | result[@intFromEnum(Feature.vector_enhancements_2)] = .{ | ||
| 246 | .llvm_name = "vector-enhancements-2", | ||
| 247 | .description = "Assume that the vector enhancements facility 2 is installed", | ||
| 248 | .dependencies = featureSet(&[_]Feature{}), | ||
| 249 | }; | ||
| 250 | result[@intFromEnum(Feature.vector_packed_decimal)] = .{ | ||
| 251 | .llvm_name = "vector-packed-decimal", | ||
| 252 | .description = "Assume that the vector packed decimal facility is installed", | ||
| 253 | .dependencies = featureSet(&[_]Feature{}), | ||
| 254 | }; | ||
| 255 | result[@intFromEnum(Feature.vector_packed_decimal_enhancement)] = .{ | ||
| 256 | .llvm_name = "vector-packed-decimal-enhancement", | ||
| 257 | .description = "Assume that the vector packed decimal enhancement facility is installed", | ||
| 258 | .dependencies = featureSet(&[_]Feature{}), | ||
| 259 | }; | ||
| 260 | result[@intFromEnum(Feature.vector_packed_decimal_enhancement_2)] = .{ | ||
| 261 | .llvm_name = "vector-packed-decimal-enhancement-2", | ||
| 262 | .description = "Assume that the vector packed decimal enhancement facility 2 is installed", | ||
| 263 | .dependencies = featureSet(&[_]Feature{}), | ||
| 264 | }; | ||
| 265 | const ti = @typeInfo(Feature); | ||
| 266 | for (&result, 0..) |*elem, i| { | ||
| 267 | elem.index = i; | ||
| 268 | elem.name = ti.Enum.fields[i].name; | ||
| 269 | } | ||
| 270 | break :blk result; | ||
| 271 | }; | ||
| 272 | |||
| 273 | pub const cpu = struct { | ||
| 274 | pub const arch10 = CpuModel{ | ||
| 275 | .name = "arch10", | ||
| 276 | .llvm_name = "arch10", | ||
| 277 | .features = featureSet(&[_]Feature{ | ||
| 278 | .dfp_zoned_conversion, | ||
| 279 | .distinct_ops, | ||
| 280 | .enhanced_dat_2, | ||
| 281 | .execution_hint, | ||
| 282 | .fast_serialization, | ||
| 283 | .fp_extension, | ||
| 284 | .high_word, | ||
| 285 | .interlocked_access1, | ||
| 286 | .load_and_trap, | ||
| 287 | .load_store_on_cond, | ||
| 288 | .message_security_assist_extension3, | ||
| 289 | .message_security_assist_extension4, | ||
| 290 | .miscellaneous_extensions, | ||
| 291 | .population_count, | ||
| 292 | .processor_assist, | ||
| 293 | .reset_reference_bits_multiple, | ||
| 294 | .transactional_execution, | ||
| 295 | }), | ||
| 296 | }; | ||
| 297 | pub const arch11 = CpuModel{ | ||
| 298 | .name = "arch11", | ||
| 299 | .llvm_name = "arch11", | ||
| 300 | .features = featureSet(&[_]Feature{ | ||
| 301 | .dfp_packed_conversion, | ||
| 302 | .dfp_zoned_conversion, | ||
| 303 | .distinct_ops, | ||
| 304 | .enhanced_dat_2, | ||
| 305 | .execution_hint, | ||
| 306 | .fast_serialization, | ||
| 307 | .fp_extension, | ||
| 308 | .high_word, | ||
| 309 | .interlocked_access1, | ||
| 310 | .load_and_trap, | ||
| 311 | .load_and_zero_rightmost_byte, | ||
| 312 | .load_store_on_cond, | ||
| 313 | .load_store_on_cond_2, | ||
| 314 | .message_security_assist_extension3, | ||
| 315 | .message_security_assist_extension4, | ||
| 316 | .message_security_assist_extension5, | ||
| 317 | .miscellaneous_extensions, | ||
| 318 | .population_count, | ||
| 319 | .processor_assist, | ||
| 320 | .reset_reference_bits_multiple, | ||
| 321 | .transactional_execution, | ||
| 322 | .vector, | ||
| 323 | }), | ||
| 324 | }; | ||
| 325 | pub const arch12 = CpuModel{ | ||
| 326 | .name = "arch12", | ||
| 327 | .llvm_name = "arch12", | ||
| 328 | .features = featureSet(&[_]Feature{ | ||
| 329 | .dfp_packed_conversion, | ||
| 330 | .dfp_zoned_conversion, | ||
| 331 | .distinct_ops, | ||
| 332 | .enhanced_dat_2, | ||
| 333 | .execution_hint, | ||
| 334 | .fast_serialization, | ||
| 335 | .fp_extension, | ||
| 336 | .guarded_storage, | ||
| 337 | .high_word, | ||
| 338 | .insert_reference_bits_multiple, | ||
| 339 | .interlocked_access1, | ||
| 340 | .load_and_trap, | ||
| 341 | .load_and_zero_rightmost_byte, | ||
| 342 | .load_store_on_cond, | ||
| 343 | .load_store_on_cond_2, | ||
| 344 | .message_security_assist_extension3, | ||
| 345 | .message_security_assist_extension4, | ||
| 346 | .message_security_assist_extension5, | ||
| 347 | .message_security_assist_extension7, | ||
| 348 | .message_security_assist_extension8, | ||
| 349 | .miscellaneous_extensions, | ||
| 350 | .miscellaneous_extensions_2, | ||
| 351 | .population_count, | ||
| 352 | .processor_assist, | ||
| 353 | .reset_reference_bits_multiple, | ||
| 354 | .transactional_execution, | ||
| 355 | .vector, | ||
| 356 | .vector_enhancements_1, | ||
| 357 | .vector_packed_decimal, | ||
| 358 | }), | ||
| 359 | }; | ||
| 360 | pub const arch13 = CpuModel{ | ||
| 361 | .name = "arch13", | ||
| 362 | .llvm_name = "arch13", | ||
| 363 | .features = featureSet(&[_]Feature{ | ||
| 364 | .deflate_conversion, | ||
| 365 | .dfp_packed_conversion, | ||
| 366 | .dfp_zoned_conversion, | ||
| 367 | .distinct_ops, | ||
| 368 | .enhanced_dat_2, | ||
| 369 | .enhanced_sort, | ||
| 370 | .execution_hint, | ||
| 371 | .fast_serialization, | ||
| 372 | .fp_extension, | ||
| 373 | .guarded_storage, | ||
| 374 | .high_word, | ||
| 375 | .insert_reference_bits_multiple, | ||
| 376 | .interlocked_access1, | ||
| 377 | .load_and_trap, | ||
| 378 | .load_and_zero_rightmost_byte, | ||
| 379 | .load_store_on_cond, | ||
| 380 | .load_store_on_cond_2, | ||
| 381 | .message_security_assist_extension3, | ||
| 382 | .message_security_assist_extension4, | ||
| 383 | .message_security_assist_extension5, | ||
| 384 | .message_security_assist_extension7, | ||
| 385 | .message_security_assist_extension8, | ||
| 386 | .message_security_assist_extension9, | ||
| 387 | .miscellaneous_extensions, | ||
| 388 | .miscellaneous_extensions_2, | ||
| 389 | .miscellaneous_extensions_3, | ||
| 390 | .population_count, | ||
| 391 | .processor_assist, | ||
| 392 | .reset_reference_bits_multiple, | ||
| 393 | .transactional_execution, | ||
| 394 | .vector, | ||
| 395 | .vector_enhancements_1, | ||
| 396 | .vector_enhancements_2, | ||
| 397 | .vector_packed_decimal, | ||
| 398 | .vector_packed_decimal_enhancement, | ||
| 399 | }), | ||
| 400 | }; | ||
| 401 | pub const arch14 = CpuModel{ | ||
| 402 | .name = "arch14", | ||
| 403 | .llvm_name = "arch14", | ||
| 404 | .features = featureSet(&[_]Feature{ | ||
| 405 | .bear_enhancement, | ||
| 406 | .deflate_conversion, | ||
| 407 | .dfp_packed_conversion, | ||
| 408 | .dfp_zoned_conversion, | ||
| 409 | .distinct_ops, | ||
| 410 | .enhanced_dat_2, | ||
| 411 | .enhanced_sort, | ||
| 412 | .execution_hint, | ||
| 413 | .fast_serialization, | ||
| 414 | .fp_extension, | ||
| 415 | .guarded_storage, | ||
| 416 | .high_word, | ||
| 417 | .insert_reference_bits_multiple, | ||
| 418 | .interlocked_access1, | ||
| 419 | .load_and_trap, | ||
| 420 | .load_and_zero_rightmost_byte, | ||
| 421 | .load_store_on_cond, | ||
| 422 | .load_store_on_cond_2, | ||
| 423 | .message_security_assist_extension3, | ||
| 424 | .message_security_assist_extension4, | ||
| 425 | .message_security_assist_extension5, | ||
| 426 | .message_security_assist_extension7, | ||
| 427 | .message_security_assist_extension8, | ||
| 428 | .message_security_assist_extension9, | ||
| 429 | .miscellaneous_extensions, | ||
| 430 | .miscellaneous_extensions_2, | ||
| 431 | .miscellaneous_extensions_3, | ||
| 432 | .nnp_assist, | ||
| 433 | .population_count, | ||
| 434 | .processor_activity_instrumentation, | ||
| 435 | .processor_assist, | ||
| 436 | .reset_dat_protection, | ||
| 437 | .reset_reference_bits_multiple, | ||
| 438 | .transactional_execution, | ||
| 439 | .vector, | ||
| 440 | .vector_enhancements_1, | ||
| 441 | .vector_enhancements_2, | ||
| 442 | .vector_packed_decimal, | ||
| 443 | .vector_packed_decimal_enhancement, | ||
| 444 | .vector_packed_decimal_enhancement_2, | ||
| 445 | }), | ||
| 446 | }; | ||
| 447 | pub const arch8 = CpuModel{ | ||
| 448 | .name = "arch8", | ||
| 449 | .llvm_name = "arch8", | ||
| 450 | .features = featureSet(&[_]Feature{}), | ||
| 451 | }; | ||
| 452 | pub const arch9 = CpuModel{ | ||
| 453 | .name = "arch9", | ||
| 454 | .llvm_name = "arch9", | ||
| 455 | .features = featureSet(&[_]Feature{ | ||
| 456 | .distinct_ops, | ||
| 457 | .fast_serialization, | ||
| 458 | .fp_extension, | ||
| 459 | .high_word, | ||
| 460 | .interlocked_access1, | ||
| 461 | .load_store_on_cond, | ||
| 462 | .message_security_assist_extension3, | ||
| 463 | .message_security_assist_extension4, | ||
| 464 | .population_count, | ||
| 465 | .reset_reference_bits_multiple, | ||
| 466 | }), | ||
| 467 | }; | ||
| 468 | pub const generic = CpuModel{ | ||
| 469 | .name = "generic", | ||
| 470 | .llvm_name = "generic", | ||
| 471 | .features = featureSet(&[_]Feature{}), | ||
| 472 | }; | ||
| 473 | pub const z10 = CpuModel{ | ||
| 474 | .name = "z10", | ||
| 475 | .llvm_name = "z10", | ||
| 476 | .features = featureSet(&[_]Feature{}), | ||
| 477 | }; | ||
| 478 | pub const z13 = CpuModel{ | ||
| 479 | .name = "z13", | ||
| 480 | .llvm_name = "z13", | ||
| 481 | .features = featureSet(&[_]Feature{ | ||
| 482 | .dfp_packed_conversion, | ||
| 483 | .dfp_zoned_conversion, | ||
| 484 | .distinct_ops, | ||
| 485 | .enhanced_dat_2, | ||
| 486 | .execution_hint, | ||
| 487 | .fast_serialization, | ||
| 488 | .fp_extension, | ||
| 489 | .high_word, | ||
| 490 | .interlocked_access1, | ||
| 491 | .load_and_trap, | ||
| 492 | .load_and_zero_rightmost_byte, | ||
| 493 | .load_store_on_cond, | ||
| 494 | .load_store_on_cond_2, | ||
| 495 | .message_security_assist_extension3, | ||
| 496 | .message_security_assist_extension4, | ||
| 497 | .message_security_assist_extension5, | ||
| 498 | .miscellaneous_extensions, | ||
| 499 | .population_count, | ||
| 500 | .processor_assist, | ||
| 501 | .reset_reference_bits_multiple, | ||
| 502 | .transactional_execution, | ||
| 503 | .vector, | ||
| 504 | }), | ||
| 505 | }; | ||
| 506 | pub const z14 = CpuModel{ | ||
| 507 | .name = "z14", | ||
| 508 | .llvm_name = "z14", | ||
| 509 | .features = featureSet(&[_]Feature{ | ||
| 510 | .dfp_packed_conversion, | ||
| 511 | .dfp_zoned_conversion, | ||
| 512 | .distinct_ops, | ||
| 513 | .enhanced_dat_2, | ||
| 514 | .execution_hint, | ||
| 515 | .fast_serialization, | ||
| 516 | .fp_extension, | ||
| 517 | .guarded_storage, | ||
| 518 | .high_word, | ||
| 519 | .insert_reference_bits_multiple, | ||
| 520 | .interlocked_access1, | ||
| 521 | .load_and_trap, | ||
| 522 | .load_and_zero_rightmost_byte, | ||
| 523 | .load_store_on_cond, | ||
| 524 | .load_store_on_cond_2, | ||
| 525 | .message_security_assist_extension3, | ||
| 526 | .message_security_assist_extension4, | ||
| 527 | .message_security_assist_extension5, | ||
| 528 | .message_security_assist_extension7, | ||
| 529 | .message_security_assist_extension8, | ||
| 530 | .miscellaneous_extensions, | ||
| 531 | .miscellaneous_extensions_2, | ||
| 532 | .population_count, | ||
| 533 | .processor_assist, | ||
| 534 | .reset_reference_bits_multiple, | ||
| 535 | .transactional_execution, | ||
| 536 | .vector, | ||
| 537 | .vector_enhancements_1, | ||
| 538 | .vector_packed_decimal, | ||
| 539 | }), | ||
| 540 | }; | ||
| 541 | pub const z15 = CpuModel{ | ||
| 542 | .name = "z15", | ||
| 543 | .llvm_name = "z15", | ||
| 544 | .features = featureSet(&[_]Feature{ | ||
| 545 | .deflate_conversion, | ||
| 546 | .dfp_packed_conversion, | ||
| 547 | .dfp_zoned_conversion, | ||
| 548 | .distinct_ops, | ||
| 549 | .enhanced_dat_2, | ||
| 550 | .enhanced_sort, | ||
| 551 | .execution_hint, | ||
| 552 | .fast_serialization, | ||
| 553 | .fp_extension, | ||
| 554 | .guarded_storage, | ||
| 555 | .high_word, | ||
| 556 | .insert_reference_bits_multiple, | ||
| 557 | .interlocked_access1, | ||
| 558 | .load_and_trap, | ||
| 559 | .load_and_zero_rightmost_byte, | ||
| 560 | .load_store_on_cond, | ||
| 561 | .load_store_on_cond_2, | ||
| 562 | .message_security_assist_extension3, | ||
| 563 | .message_security_assist_extension4, | ||
| 564 | .message_security_assist_extension5, | ||
| 565 | .message_security_assist_extension7, | ||
| 566 | .message_security_assist_extension8, | ||
| 567 | .message_security_assist_extension9, | ||
| 568 | .miscellaneous_extensions, | ||
| 569 | .miscellaneous_extensions_2, | ||
| 570 | .miscellaneous_extensions_3, | ||
| 571 | .population_count, | ||
| 572 | .processor_assist, | ||
| 573 | .reset_reference_bits_multiple, | ||
| 574 | .transactional_execution, | ||
| 575 | .vector, | ||
| 576 | .vector_enhancements_1, | ||
| 577 | .vector_enhancements_2, | ||
| 578 | .vector_packed_decimal, | ||
| 579 | .vector_packed_decimal_enhancement, | ||
| 580 | }), | ||
| 581 | }; | ||
| 582 | pub const z16 = CpuModel{ | ||
| 583 | .name = "z16", | ||
| 584 | .llvm_name = "z16", | ||
| 585 | .features = featureSet(&[_]Feature{ | ||
| 586 | .bear_enhancement, | ||
| 587 | .deflate_conversion, | ||
| 588 | .dfp_packed_conversion, | ||
| 589 | .dfp_zoned_conversion, | ||
| 590 | .distinct_ops, | ||
| 591 | .enhanced_dat_2, | ||
| 592 | .enhanced_sort, | ||
| 593 | .execution_hint, | ||
| 594 | .fast_serialization, | ||
| 595 | .fp_extension, | ||
| 596 | .guarded_storage, | ||
| 597 | .high_word, | ||
| 598 | .insert_reference_bits_multiple, | ||
| 599 | .interlocked_access1, | ||
| 600 | .load_and_trap, | ||
| 601 | .load_and_zero_rightmost_byte, | ||
| 602 | .load_store_on_cond, | ||
| 603 | .load_store_on_cond_2, | ||
| 604 | .message_security_assist_extension3, | ||
| 605 | .message_security_assist_extension4, | ||
| 606 | .message_security_assist_extension5, | ||
| 607 | .message_security_assist_extension7, | ||
| 608 | .message_security_assist_extension8, | ||
| 609 | .message_security_assist_extension9, | ||
| 610 | .miscellaneous_extensions, | ||
| 611 | .miscellaneous_extensions_2, | ||
| 612 | .miscellaneous_extensions_3, | ||
| 613 | .nnp_assist, | ||
| 614 | .population_count, | ||
| 615 | .processor_activity_instrumentation, | ||
| 616 | .processor_assist, | ||
| 617 | .reset_dat_protection, | ||
| 618 | .reset_reference_bits_multiple, | ||
| 619 | .transactional_execution, | ||
| 620 | .vector, | ||
| 621 | .vector_enhancements_1, | ||
| 622 | .vector_enhancements_2, | ||
| 623 | .vector_packed_decimal, | ||
| 624 | .vector_packed_decimal_enhancement, | ||
| 625 | .vector_packed_decimal_enhancement_2, | ||
| 626 | }), | ||
| 627 | }; | ||
| 628 | pub const z196 = CpuModel{ | ||
| 629 | .name = "z196", | ||
| 630 | .llvm_name = "z196", | ||
| 631 | .features = featureSet(&[_]Feature{ | ||
| 632 | .distinct_ops, | ||
| 633 | .fast_serialization, | ||
| 634 | .fp_extension, | ||
| 635 | .high_word, | ||
| 636 | .interlocked_access1, | ||
| 637 | .load_store_on_cond, | ||
| 638 | .message_security_assist_extension3, | ||
| 639 | .message_security_assist_extension4, | ||
| 640 | .population_count, | ||
| 641 | .reset_reference_bits_multiple, | ||
| 642 | }), | ||
| 643 | }; | ||
| 644 | pub const zEC12 = CpuModel{ | ||
| 645 | .name = "zEC12", | ||
| 646 | .llvm_name = "zEC12", | ||
| 647 | .features = featureSet(&[_]Feature{ | ||
| 648 | .dfp_zoned_conversion, | ||
| 649 | .distinct_ops, | ||
| 650 | .enhanced_dat_2, | ||
| 651 | .execution_hint, | ||
| 652 | .fast_serialization, | ||
| 653 | .fp_extension, | ||
| 654 | .high_word, | ||
| 655 | .interlocked_access1, | ||
| 656 | .load_and_trap, | ||
| 657 | .load_store_on_cond, | ||
| 658 | .message_security_assist_extension3, | ||
| 659 | .message_security_assist_extension4, | ||
| 660 | .miscellaneous_extensions, | ||
| 661 | .population_count, | ||
| 662 | .processor_assist, | ||
| 663 | .reset_reference_bits_multiple, | ||
| 664 | .transactional_execution, | ||
| 665 | }), | ||
| 666 | }; | ||
| 667 | }; | ||
lib/std/target/sparc.zig deleted-455
| ... | @@ -1,455 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | deprecated_v8, | ||
| 9 | detectroundchange, | ||
| 10 | fixallfdivsqrt, | ||
| 11 | hard_quad_float, | ||
| 12 | hasleoncasa, | ||
| 13 | hasumacsmac, | ||
| 14 | insertnopload, | ||
| 15 | leon, | ||
| 16 | leoncyclecounter, | ||
| 17 | leonpwrpsr, | ||
| 18 | no_fmuls, | ||
| 19 | no_fsmuld, | ||
| 20 | popc, | ||
| 21 | soft_float, | ||
| 22 | soft_mul_div, | ||
| 23 | v9, | ||
| 24 | vis, | ||
| 25 | vis2, | ||
| 26 | vis3, | ||
| 27 | }; | ||
| 28 | |||
| 29 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 30 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 31 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 32 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 33 | |||
| 34 | pub const all_features = blk: { | ||
| 35 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 36 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 37 | var result: [len]CpuFeature = undefined; | ||
| 38 | result[@intFromEnum(Feature.deprecated_v8)] = .{ | ||
| 39 | .llvm_name = "deprecated-v8", | ||
| 40 | .description = "Enable deprecated V8 instructions in V9 mode", | ||
| 41 | .dependencies = featureSet(&[_]Feature{}), | ||
| 42 | }; | ||
| 43 | result[@intFromEnum(Feature.detectroundchange)] = .{ | ||
| 44 | .llvm_name = "detectroundchange", | ||
| 45 | .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", | ||
| 46 | .dependencies = featureSet(&[_]Feature{}), | ||
| 47 | }; | ||
| 48 | result[@intFromEnum(Feature.fixallfdivsqrt)] = .{ | ||
| 49 | .llvm_name = "fixallfdivsqrt", | ||
| 50 | .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", | ||
| 51 | .dependencies = featureSet(&[_]Feature{}), | ||
| 52 | }; | ||
| 53 | result[@intFromEnum(Feature.hard_quad_float)] = .{ | ||
| 54 | .llvm_name = "hard-quad-float", | ||
| 55 | .description = "Enable quad-word floating point instructions", | ||
| 56 | .dependencies = featureSet(&[_]Feature{}), | ||
| 57 | }; | ||
| 58 | result[@intFromEnum(Feature.hasleoncasa)] = .{ | ||
| 59 | .llvm_name = "hasleoncasa", | ||
| 60 | .description = "Enable CASA instruction for LEON3 and LEON4 processors", | ||
| 61 | .dependencies = featureSet(&[_]Feature{}), | ||
| 62 | }; | ||
| 63 | result[@intFromEnum(Feature.hasumacsmac)] = .{ | ||
| 64 | .llvm_name = "hasumacsmac", | ||
| 65 | .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", | ||
| 66 | .dependencies = featureSet(&[_]Feature{}), | ||
| 67 | }; | ||
| 68 | result[@intFromEnum(Feature.insertnopload)] = .{ | ||
| 69 | .llvm_name = "insertnopload", | ||
| 70 | .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", | ||
| 71 | .dependencies = featureSet(&[_]Feature{}), | ||
| 72 | }; | ||
| 73 | result[@intFromEnum(Feature.leon)] = .{ | ||
| 74 | .llvm_name = "leon", | ||
| 75 | .description = "Enable LEON extensions", | ||
| 76 | .dependencies = featureSet(&[_]Feature{}), | ||
| 77 | }; | ||
| 78 | result[@intFromEnum(Feature.leoncyclecounter)] = .{ | ||
| 79 | .llvm_name = "leoncyclecounter", | ||
| 80 | .description = "Use the Leon cycle counter register", | ||
| 81 | .dependencies = featureSet(&[_]Feature{}), | ||
| 82 | }; | ||
| 83 | result[@intFromEnum(Feature.leonpwrpsr)] = .{ | ||
| 84 | .llvm_name = "leonpwrpsr", | ||
| 85 | .description = "Enable the PWRPSR instruction", | ||
| 86 | .dependencies = featureSet(&[_]Feature{}), | ||
| 87 | }; | ||
| 88 | result[@intFromEnum(Feature.no_fmuls)] = .{ | ||
| 89 | .llvm_name = "no-fmuls", | ||
| 90 | .description = "Disable the fmuls instruction.", | ||
| 91 | .dependencies = featureSet(&[_]Feature{}), | ||
| 92 | }; | ||
| 93 | result[@intFromEnum(Feature.no_fsmuld)] = .{ | ||
| 94 | .llvm_name = "no-fsmuld", | ||
| 95 | .description = "Disable the fsmuld instruction.", | ||
| 96 | .dependencies = featureSet(&[_]Feature{}), | ||
| 97 | }; | ||
| 98 | result[@intFromEnum(Feature.popc)] = .{ | ||
| 99 | .llvm_name = "popc", | ||
| 100 | .description = "Use the popc (population count) instruction", | ||
| 101 | .dependencies = featureSet(&[_]Feature{}), | ||
| 102 | }; | ||
| 103 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 104 | .llvm_name = "soft-float", | ||
| 105 | .description = "Use software emulation for floating point", | ||
| 106 | .dependencies = featureSet(&[_]Feature{}), | ||
| 107 | }; | ||
| 108 | result[@intFromEnum(Feature.soft_mul_div)] = .{ | ||
| 109 | .llvm_name = "soft-mul-div", | ||
| 110 | .description = "Use software emulation for integer multiply and divide", | ||
| 111 | .dependencies = featureSet(&[_]Feature{}), | ||
| 112 | }; | ||
| 113 | result[@intFromEnum(Feature.v9)] = .{ | ||
| 114 | .llvm_name = "v9", | ||
| 115 | .description = "Enable SPARC-V9 instructions", | ||
| 116 | .dependencies = featureSet(&[_]Feature{}), | ||
| 117 | }; | ||
| 118 | result[@intFromEnum(Feature.vis)] = .{ | ||
| 119 | .llvm_name = "vis", | ||
| 120 | .description = "Enable UltraSPARC Visual Instruction Set extensions", | ||
| 121 | .dependencies = featureSet(&[_]Feature{}), | ||
| 122 | }; | ||
| 123 | result[@intFromEnum(Feature.vis2)] = .{ | ||
| 124 | .llvm_name = "vis2", | ||
| 125 | .description = "Enable Visual Instruction Set extensions II", | ||
| 126 | .dependencies = featureSet(&[_]Feature{}), | ||
| 127 | }; | ||
| 128 | result[@intFromEnum(Feature.vis3)] = .{ | ||
| 129 | .llvm_name = "vis3", | ||
| 130 | .description = "Enable Visual Instruction Set extensions III", | ||
| 131 | .dependencies = featureSet(&[_]Feature{}), | ||
| 132 | }; | ||
| 133 | const ti = @typeInfo(Feature); | ||
| 134 | for (&result, 0..) |*elem, i| { | ||
| 135 | elem.index = i; | ||
| 136 | elem.name = ti.Enum.fields[i].name; | ||
| 137 | } | ||
| 138 | break :blk result; | ||
| 139 | }; | ||
| 140 | |||
| 141 | pub const cpu = struct { | ||
| 142 | pub const at697e = CpuModel{ | ||
| 143 | .name = "at697e", | ||
| 144 | .llvm_name = "at697e", | ||
| 145 | .features = featureSet(&[_]Feature{ | ||
| 146 | .insertnopload, | ||
| 147 | .leon, | ||
| 148 | }), | ||
| 149 | }; | ||
| 150 | pub const at697f = CpuModel{ | ||
| 151 | .name = "at697f", | ||
| 152 | .llvm_name = "at697f", | ||
| 153 | .features = featureSet(&[_]Feature{ | ||
| 154 | .insertnopload, | ||
| 155 | .leon, | ||
| 156 | }), | ||
| 157 | }; | ||
| 158 | pub const f934 = CpuModel{ | ||
| 159 | .name = "f934", | ||
| 160 | .llvm_name = "f934", | ||
| 161 | .features = featureSet(&[_]Feature{}), | ||
| 162 | }; | ||
| 163 | pub const generic = CpuModel{ | ||
| 164 | .name = "generic", | ||
| 165 | .llvm_name = "generic", | ||
| 166 | .features = featureSet(&[_]Feature{}), | ||
| 167 | }; | ||
| 168 | pub const gr712rc = CpuModel{ | ||
| 169 | .name = "gr712rc", | ||
| 170 | .llvm_name = "gr712rc", | ||
| 171 | .features = featureSet(&[_]Feature{ | ||
| 172 | .hasleoncasa, | ||
| 173 | .leon, | ||
| 174 | }), | ||
| 175 | }; | ||
| 176 | pub const gr740 = CpuModel{ | ||
| 177 | .name = "gr740", | ||
| 178 | .llvm_name = "gr740", | ||
| 179 | .features = featureSet(&[_]Feature{ | ||
| 180 | .hasleoncasa, | ||
| 181 | .hasumacsmac, | ||
| 182 | .leon, | ||
| 183 | .leoncyclecounter, | ||
| 184 | .leonpwrpsr, | ||
| 185 | }), | ||
| 186 | }; | ||
| 187 | pub const hypersparc = CpuModel{ | ||
| 188 | .name = "hypersparc", | ||
| 189 | .llvm_name = "hypersparc", | ||
| 190 | .features = featureSet(&[_]Feature{}), | ||
| 191 | }; | ||
| 192 | pub const leon2 = CpuModel{ | ||
| 193 | .name = "leon2", | ||
| 194 | .llvm_name = "leon2", | ||
| 195 | .features = featureSet(&[_]Feature{ | ||
| 196 | .leon, | ||
| 197 | }), | ||
| 198 | }; | ||
| 199 | pub const leon3 = CpuModel{ | ||
| 200 | .name = "leon3", | ||
| 201 | .llvm_name = "leon3", | ||
| 202 | .features = featureSet(&[_]Feature{ | ||
| 203 | .hasumacsmac, | ||
| 204 | .leon, | ||
| 205 | }), | ||
| 206 | }; | ||
| 207 | pub const leon4 = CpuModel{ | ||
| 208 | .name = "leon4", | ||
| 209 | .llvm_name = "leon4", | ||
| 210 | .features = featureSet(&[_]Feature{ | ||
| 211 | .hasleoncasa, | ||
| 212 | .hasumacsmac, | ||
| 213 | .leon, | ||
| 214 | }), | ||
| 215 | }; | ||
| 216 | pub const ma2080 = CpuModel{ | ||
| 217 | .name = "ma2080", | ||
| 218 | .llvm_name = "ma2080", | ||
| 219 | .features = featureSet(&[_]Feature{ | ||
| 220 | .hasleoncasa, | ||
| 221 | .leon, | ||
| 222 | }), | ||
| 223 | }; | ||
| 224 | pub const ma2085 = CpuModel{ | ||
| 225 | .name = "ma2085", | ||
| 226 | .llvm_name = "ma2085", | ||
| 227 | .features = featureSet(&[_]Feature{ | ||
| 228 | .hasleoncasa, | ||
| 229 | .leon, | ||
| 230 | }), | ||
| 231 | }; | ||
| 232 | pub const ma2100 = CpuModel{ | ||
| 233 | .name = "ma2100", | ||
| 234 | .llvm_name = "ma2100", | ||
| 235 | .features = featureSet(&[_]Feature{ | ||
| 236 | .hasleoncasa, | ||
| 237 | .leon, | ||
| 238 | }), | ||
| 239 | }; | ||
| 240 | pub const ma2150 = CpuModel{ | ||
| 241 | .name = "ma2150", | ||
| 242 | .llvm_name = "ma2150", | ||
| 243 | .features = featureSet(&[_]Feature{ | ||
| 244 | .hasleoncasa, | ||
| 245 | .leon, | ||
| 246 | }), | ||
| 247 | }; | ||
| 248 | pub const ma2155 = CpuModel{ | ||
| 249 | .name = "ma2155", | ||
| 250 | .llvm_name = "ma2155", | ||
| 251 | .features = featureSet(&[_]Feature{ | ||
| 252 | .hasleoncasa, | ||
| 253 | .leon, | ||
| 254 | }), | ||
| 255 | }; | ||
| 256 | pub const ma2450 = CpuModel{ | ||
| 257 | .name = "ma2450", | ||
| 258 | .llvm_name = "ma2450", | ||
| 259 | .features = featureSet(&[_]Feature{ | ||
| 260 | .hasleoncasa, | ||
| 261 | .leon, | ||
| 262 | }), | ||
| 263 | }; | ||
| 264 | pub const ma2455 = CpuModel{ | ||
| 265 | .name = "ma2455", | ||
| 266 | .llvm_name = "ma2455", | ||
| 267 | .features = featureSet(&[_]Feature{ | ||
| 268 | .hasleoncasa, | ||
| 269 | .leon, | ||
| 270 | }), | ||
| 271 | }; | ||
| 272 | pub const ma2480 = CpuModel{ | ||
| 273 | .name = "ma2480", | ||
| 274 | .llvm_name = "ma2480", | ||
| 275 | .features = featureSet(&[_]Feature{ | ||
| 276 | .hasleoncasa, | ||
| 277 | .leon, | ||
| 278 | }), | ||
| 279 | }; | ||
| 280 | pub const ma2485 = CpuModel{ | ||
| 281 | .name = "ma2485", | ||
| 282 | .llvm_name = "ma2485", | ||
| 283 | .features = featureSet(&[_]Feature{ | ||
| 284 | .hasleoncasa, | ||
| 285 | .leon, | ||
| 286 | }), | ||
| 287 | }; | ||
| 288 | pub const ma2x5x = CpuModel{ | ||
| 289 | .name = "ma2x5x", | ||
| 290 | .llvm_name = "ma2x5x", | ||
| 291 | .features = featureSet(&[_]Feature{ | ||
| 292 | .hasleoncasa, | ||
| 293 | .leon, | ||
| 294 | }), | ||
| 295 | }; | ||
| 296 | pub const ma2x8x = CpuModel{ | ||
| 297 | .name = "ma2x8x", | ||
| 298 | .llvm_name = "ma2x8x", | ||
| 299 | .features = featureSet(&[_]Feature{ | ||
| 300 | .hasleoncasa, | ||
| 301 | .leon, | ||
| 302 | }), | ||
| 303 | }; | ||
| 304 | pub const myriad2 = CpuModel{ | ||
| 305 | .name = "myriad2", | ||
| 306 | .llvm_name = "myriad2", | ||
| 307 | .features = featureSet(&[_]Feature{ | ||
| 308 | .hasleoncasa, | ||
| 309 | .leon, | ||
| 310 | }), | ||
| 311 | }; | ||
| 312 | pub const myriad2_1 = CpuModel{ | ||
| 313 | .name = "myriad2_1", | ||
| 314 | .llvm_name = "myriad2.1", | ||
| 315 | .features = featureSet(&[_]Feature{ | ||
| 316 | .hasleoncasa, | ||
| 317 | .leon, | ||
| 318 | }), | ||
| 319 | }; | ||
| 320 | pub const myriad2_2 = CpuModel{ | ||
| 321 | .name = "myriad2_2", | ||
| 322 | .llvm_name = "myriad2.2", | ||
| 323 | .features = featureSet(&[_]Feature{ | ||
| 324 | .hasleoncasa, | ||
| 325 | .leon, | ||
| 326 | }), | ||
| 327 | }; | ||
| 328 | pub const myriad2_3 = CpuModel{ | ||
| 329 | .name = "myriad2_3", | ||
| 330 | .llvm_name = "myriad2.3", | ||
| 331 | .features = featureSet(&[_]Feature{ | ||
| 332 | .hasleoncasa, | ||
| 333 | .leon, | ||
| 334 | }), | ||
| 335 | }; | ||
| 336 | pub const niagara = CpuModel{ | ||
| 337 | .name = "niagara", | ||
| 338 | .llvm_name = "niagara", | ||
| 339 | .features = featureSet(&[_]Feature{ | ||
| 340 | .deprecated_v8, | ||
| 341 | .v9, | ||
| 342 | .vis, | ||
| 343 | .vis2, | ||
| 344 | }), | ||
| 345 | }; | ||
| 346 | pub const niagara2 = CpuModel{ | ||
| 347 | .name = "niagara2", | ||
| 348 | .llvm_name = "niagara2", | ||
| 349 | .features = featureSet(&[_]Feature{ | ||
| 350 | .deprecated_v8, | ||
| 351 | .popc, | ||
| 352 | .v9, | ||
| 353 | .vis, | ||
| 354 | .vis2, | ||
| 355 | }), | ||
| 356 | }; | ||
| 357 | pub const niagara3 = CpuModel{ | ||
| 358 | .name = "niagara3", | ||
| 359 | .llvm_name = "niagara3", | ||
| 360 | .features = featureSet(&[_]Feature{ | ||
| 361 | .deprecated_v8, | ||
| 362 | .popc, | ||
| 363 | .v9, | ||
| 364 | .vis, | ||
| 365 | .vis2, | ||
| 366 | }), | ||
| 367 | }; | ||
| 368 | pub const niagara4 = CpuModel{ | ||
| 369 | .name = "niagara4", | ||
| 370 | .llvm_name = "niagara4", | ||
| 371 | .features = featureSet(&[_]Feature{ | ||
| 372 | .deprecated_v8, | ||
| 373 | .popc, | ||
| 374 | .v9, | ||
| 375 | .vis, | ||
| 376 | .vis2, | ||
| 377 | .vis3, | ||
| 378 | }), | ||
| 379 | }; | ||
| 380 | pub const sparclet = CpuModel{ | ||
| 381 | .name = "sparclet", | ||
| 382 | .llvm_name = "sparclet", | ||
| 383 | .features = featureSet(&[_]Feature{}), | ||
| 384 | }; | ||
| 385 | pub const sparclite = CpuModel{ | ||
| 386 | .name = "sparclite", | ||
| 387 | .llvm_name = "sparclite", | ||
| 388 | .features = featureSet(&[_]Feature{}), | ||
| 389 | }; | ||
| 390 | pub const sparclite86x = CpuModel{ | ||
| 391 | .name = "sparclite86x", | ||
| 392 | .llvm_name = "sparclite86x", | ||
| 393 | .features = featureSet(&[_]Feature{}), | ||
| 394 | }; | ||
| 395 | pub const supersparc = CpuModel{ | ||
| 396 | .name = "supersparc", | ||
| 397 | .llvm_name = "supersparc", | ||
| 398 | .features = featureSet(&[_]Feature{}), | ||
| 399 | }; | ||
| 400 | pub const tsc701 = CpuModel{ | ||
| 401 | .name = "tsc701", | ||
| 402 | .llvm_name = "tsc701", | ||
| 403 | .features = featureSet(&[_]Feature{}), | ||
| 404 | }; | ||
| 405 | pub const ultrasparc = CpuModel{ | ||
| 406 | .name = "ultrasparc", | ||
| 407 | .llvm_name = "ultrasparc", | ||
| 408 | .features = featureSet(&[_]Feature{ | ||
| 409 | .deprecated_v8, | ||
| 410 | .v9, | ||
| 411 | .vis, | ||
| 412 | }), | ||
| 413 | }; | ||
| 414 | pub const ultrasparc3 = CpuModel{ | ||
| 415 | .name = "ultrasparc3", | ||
| 416 | .llvm_name = "ultrasparc3", | ||
| 417 | .features = featureSet(&[_]Feature{ | ||
| 418 | .deprecated_v8, | ||
| 419 | .v9, | ||
| 420 | .vis, | ||
| 421 | .vis2, | ||
| 422 | }), | ||
| 423 | }; | ||
| 424 | pub const ut699 = CpuModel{ | ||
| 425 | .name = "ut699", | ||
| 426 | .llvm_name = "ut699", | ||
| 427 | .features = featureSet(&[_]Feature{ | ||
| 428 | .fixallfdivsqrt, | ||
| 429 | .insertnopload, | ||
| 430 | .leon, | ||
| 431 | .no_fmuls, | ||
| 432 | .no_fsmuld, | ||
| 433 | }), | ||
| 434 | }; | ||
| 435 | pub const v7 = CpuModel{ | ||
| 436 | .name = "v7", | ||
| 437 | .llvm_name = "v7", | ||
| 438 | .features = featureSet(&[_]Feature{ | ||
| 439 | .no_fsmuld, | ||
| 440 | .soft_mul_div, | ||
| 441 | }), | ||
| 442 | }; | ||
| 443 | pub const v8 = CpuModel{ | ||
| 444 | .name = "v8", | ||
| 445 | .llvm_name = "v8", | ||
| 446 | .features = featureSet(&[_]Feature{}), | ||
| 447 | }; | ||
| 448 | pub const v9 = CpuModel{ | ||
| 449 | .name = "v9", | ||
| 450 | .llvm_name = "v9", | ||
| 451 | .features = featureSet(&[_]Feature{ | ||
| 452 | .v9, | ||
| 453 | }), | ||
| 454 | }; | ||
| 455 | }; | ||
lib/std/target/spirv.zig deleted-2091
| ... | @@ -1,2091 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_spirv_features.zig. | ||
| 2 | //! TODO: Dependencies of capabilities on extensions. | ||
| 3 | //! TODO: Dependencies of extensions on extensions. | ||
| 4 | //! TODO: Dependencies of extensions on versions. | ||
| 5 | |||
| 6 | const std = @import("../std.zig"); | ||
| 7 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 8 | const CpuModel = std.Target.Cpu.Model; | ||
| 9 | |||
| 10 | pub const Feature = enum { | ||
| 11 | v1_1, | ||
| 12 | v1_2, | ||
| 13 | v1_3, | ||
| 14 | v1_4, | ||
| 15 | v1_5, | ||
| 16 | SPV_AMD_shader_fragment_mask, | ||
| 17 | SPV_AMD_gpu_shader_int16, | ||
| 18 | SPV_AMD_gpu_shader_half_float, | ||
| 19 | SPV_AMD_texture_gather_bias_lod, | ||
| 20 | SPV_AMD_shader_ballot, | ||
| 21 | SPV_AMD_gcn_shader, | ||
| 22 | SPV_AMD_shader_image_load_store_lod, | ||
| 23 | SPV_AMD_shader_explicit_vertex_parameter, | ||
| 24 | SPV_AMD_shader_trinary_minmax, | ||
| 25 | SPV_AMD_gpu_shader_half_float_fetch, | ||
| 26 | SPV_GOOGLE_hlsl_functionality1, | ||
| 27 | SPV_GOOGLE_user_type, | ||
| 28 | SPV_GOOGLE_decorate_string, | ||
| 29 | SPV_EXT_demote_to_helper_invocation, | ||
| 30 | SPV_EXT_descriptor_indexing, | ||
| 31 | SPV_EXT_fragment_fully_covered, | ||
| 32 | SPV_EXT_shader_stencil_export, | ||
| 33 | SPV_EXT_physical_storage_buffer, | ||
| 34 | SPV_EXT_shader_atomic_float_add, | ||
| 35 | SPV_EXT_shader_atomic_float_min_max, | ||
| 36 | SPV_EXT_shader_image_int64, | ||
| 37 | SPV_EXT_fragment_shader_interlock, | ||
| 38 | SPV_EXT_fragment_invocation_density, | ||
| 39 | SPV_EXT_shader_viewport_index_layer, | ||
| 40 | SPV_INTEL_loop_fuse, | ||
| 41 | SPV_INTEL_fpga_dsp_control, | ||
| 42 | SPV_INTEL_fpga_reg, | ||
| 43 | SPV_INTEL_fpga_memory_accesses, | ||
| 44 | SPV_INTEL_fpga_loop_controls, | ||
| 45 | SPV_INTEL_io_pipes, | ||
| 46 | SPV_INTEL_unstructured_loop_controls, | ||
| 47 | SPV_INTEL_blocking_pipes, | ||
| 48 | SPV_INTEL_device_side_avc_motion_estimation, | ||
| 49 | SPV_INTEL_fpga_memory_attributes, | ||
| 50 | SPV_INTEL_fp_fast_math_mode, | ||
| 51 | SPV_INTEL_media_block_io, | ||
| 52 | SPV_INTEL_shader_integer_functions2, | ||
| 53 | SPV_INTEL_subgroups, | ||
| 54 | SPV_INTEL_fpga_cluster_attributes, | ||
| 55 | SPV_INTEL_kernel_attributes, | ||
| 56 | SPV_INTEL_arbitrary_precision_integers, | ||
| 57 | SPV_KHR_8bit_storage, | ||
| 58 | SPV_KHR_shader_clock, | ||
| 59 | SPV_KHR_device_group, | ||
| 60 | SPV_KHR_16bit_storage, | ||
| 61 | SPV_KHR_variable_pointers, | ||
| 62 | SPV_KHR_no_integer_wrap_decoration, | ||
| 63 | SPV_KHR_subgroup_vote, | ||
| 64 | SPV_KHR_multiview, | ||
| 65 | SPV_KHR_shader_ballot, | ||
| 66 | SPV_KHR_vulkan_memory_model, | ||
| 67 | SPV_KHR_physical_storage_buffer, | ||
| 68 | SPV_KHR_workgroup_memory_explicit_layout, | ||
| 69 | SPV_KHR_fragment_shading_rate, | ||
| 70 | SPV_KHR_shader_atomic_counter_ops, | ||
| 71 | SPV_KHR_shader_draw_parameters, | ||
| 72 | SPV_KHR_storage_buffer_storage_class, | ||
| 73 | SPV_KHR_linkonce_odr, | ||
| 74 | SPV_KHR_terminate_invocation, | ||
| 75 | SPV_KHR_non_semantic_info, | ||
| 76 | SPV_KHR_post_depth_coverage, | ||
| 77 | SPV_KHR_expect_assume, | ||
| 78 | SPV_KHR_ray_tracing, | ||
| 79 | SPV_KHR_ray_query, | ||
| 80 | SPV_KHR_float_controls, | ||
| 81 | SPV_NV_viewport_array2, | ||
| 82 | SPV_NV_shader_subgroup_partitioned, | ||
| 83 | SPV_NVX_multiview_per_view_attributes, | ||
| 84 | SPV_NV_ray_tracing, | ||
| 85 | SPV_NV_shader_image_footprint, | ||
| 86 | SPV_NV_shading_rate, | ||
| 87 | SPV_NV_stereo_view_rendering, | ||
| 88 | SPV_NV_compute_shader_derivatives, | ||
| 89 | SPV_NV_shader_sm_builtins, | ||
| 90 | SPV_NV_mesh_shader, | ||
| 91 | SPV_NV_geometry_shader_passthrough, | ||
| 92 | SPV_NV_fragment_shader_barycentric, | ||
| 93 | SPV_NV_cooperative_matrix, | ||
| 94 | SPV_NV_sample_mask_override_coverage, | ||
| 95 | Matrix, | ||
| 96 | Shader, | ||
| 97 | Geometry, | ||
| 98 | Tessellation, | ||
| 99 | Addresses, | ||
| 100 | Linkage, | ||
| 101 | Kernel, | ||
| 102 | Vector16, | ||
| 103 | Float16Buffer, | ||
| 104 | Float16, | ||
| 105 | Float64, | ||
| 106 | Int64, | ||
| 107 | Int64Atomics, | ||
| 108 | ImageBasic, | ||
| 109 | ImageReadWrite, | ||
| 110 | ImageMipmap, | ||
| 111 | Pipes, | ||
| 112 | Groups, | ||
| 113 | DeviceEnqueue, | ||
| 114 | LiteralSampler, | ||
| 115 | AtomicStorage, | ||
| 116 | Int16, | ||
| 117 | TessellationPointSize, | ||
| 118 | GeometryPointSize, | ||
| 119 | ImageGatherExtended, | ||
| 120 | StorageImageMultisample, | ||
| 121 | UniformBufferArrayDynamicIndexing, | ||
| 122 | SampledImageArrayDynamicIndexing, | ||
| 123 | StorageBufferArrayDynamicIndexing, | ||
| 124 | StorageImageArrayDynamicIndexing, | ||
| 125 | ClipDistance, | ||
| 126 | CullDistance, | ||
| 127 | ImageCubeArray, | ||
| 128 | SampleRateShading, | ||
| 129 | ImageRect, | ||
| 130 | SampledRect, | ||
| 131 | GenericPointer, | ||
| 132 | Int8, | ||
| 133 | InputAttachment, | ||
| 134 | SparseResidency, | ||
| 135 | MinLod, | ||
| 136 | Sampled1D, | ||
| 137 | Image1D, | ||
| 138 | SampledCubeArray, | ||
| 139 | SampledBuffer, | ||
| 140 | ImageBuffer, | ||
| 141 | ImageMSArray, | ||
| 142 | StorageImageExtendedFormats, | ||
| 143 | ImageQuery, | ||
| 144 | DerivativeControl, | ||
| 145 | InterpolationFunction, | ||
| 146 | TransformFeedback, | ||
| 147 | GeometryStreams, | ||
| 148 | StorageImageReadWithoutFormat, | ||
| 149 | StorageImageWriteWithoutFormat, | ||
| 150 | MultiViewport, | ||
| 151 | SubgroupDispatch, | ||
| 152 | NamedBarrier, | ||
| 153 | PipeStorage, | ||
| 154 | GroupNonUniform, | ||
| 155 | GroupNonUniformVote, | ||
| 156 | GroupNonUniformArithmetic, | ||
| 157 | GroupNonUniformBallot, | ||
| 158 | GroupNonUniformShuffle, | ||
| 159 | GroupNonUniformShuffleRelative, | ||
| 160 | GroupNonUniformClustered, | ||
| 161 | GroupNonUniformQuad, | ||
| 162 | ShaderLayer, | ||
| 163 | ShaderViewportIndex, | ||
| 164 | FragmentShadingRateKHR, | ||
| 165 | SubgroupBallotKHR, | ||
| 166 | DrawParameters, | ||
| 167 | WorkgroupMemoryExplicitLayoutKHR, | ||
| 168 | WorkgroupMemoryExplicitLayout8BitAccessKHR, | ||
| 169 | WorkgroupMemoryExplicitLayout16BitAccessKHR, | ||
| 170 | SubgroupVoteKHR, | ||
| 171 | StorageBuffer16BitAccess, | ||
| 172 | StorageUniformBufferBlock16, | ||
| 173 | UniformAndStorageBuffer16BitAccess, | ||
| 174 | StorageUniform16, | ||
| 175 | StoragePushConstant16, | ||
| 176 | StorageInputOutput16, | ||
| 177 | DeviceGroup, | ||
| 178 | MultiView, | ||
| 179 | VariablePointersStorageBuffer, | ||
| 180 | VariablePointers, | ||
| 181 | AtomicStorageOps, | ||
| 182 | SampleMaskPostDepthCoverage, | ||
| 183 | StorageBuffer8BitAccess, | ||
| 184 | UniformAndStorageBuffer8BitAccess, | ||
| 185 | StoragePushConstant8, | ||
| 186 | DenormPreserve, | ||
| 187 | DenormFlushToZero, | ||
| 188 | SignedZeroInfNanPreserve, | ||
| 189 | RoundingModeRTE, | ||
| 190 | RoundingModeRTZ, | ||
| 191 | RayQueryProvisionalKHR, | ||
| 192 | RayQueryKHR, | ||
| 193 | RayTraversalPrimitiveCullingKHR, | ||
| 194 | RayTracingKHR, | ||
| 195 | Float16ImageAMD, | ||
| 196 | ImageGatherBiasLodAMD, | ||
| 197 | FragmentMaskAMD, | ||
| 198 | StencilExportEXT, | ||
| 199 | ImageReadWriteLodAMD, | ||
| 200 | Int64ImageEXT, | ||
| 201 | ShaderClockKHR, | ||
| 202 | SampleMaskOverrideCoverageNV, | ||
| 203 | GeometryShaderPassthroughNV, | ||
| 204 | ShaderViewportIndexLayerEXT, | ||
| 205 | ShaderViewportIndexLayerNV, | ||
| 206 | ShaderViewportMaskNV, | ||
| 207 | ShaderStereoViewNV, | ||
| 208 | PerViewAttributesNV, | ||
| 209 | FragmentFullyCoveredEXT, | ||
| 210 | MeshShadingNV, | ||
| 211 | ImageFootprintNV, | ||
| 212 | FragmentBarycentricNV, | ||
| 213 | ComputeDerivativeGroupQuadsNV, | ||
| 214 | FragmentDensityEXT, | ||
| 215 | ShadingRateNV, | ||
| 216 | GroupNonUniformPartitionedNV, | ||
| 217 | ShaderNonUniform, | ||
| 218 | ShaderNonUniformEXT, | ||
| 219 | RuntimeDescriptorArray, | ||
| 220 | RuntimeDescriptorArrayEXT, | ||
| 221 | InputAttachmentArrayDynamicIndexing, | ||
| 222 | InputAttachmentArrayDynamicIndexingEXT, | ||
| 223 | UniformTexelBufferArrayDynamicIndexing, | ||
| 224 | UniformTexelBufferArrayDynamicIndexingEXT, | ||
| 225 | StorageTexelBufferArrayDynamicIndexing, | ||
| 226 | StorageTexelBufferArrayDynamicIndexingEXT, | ||
| 227 | UniformBufferArrayNonUniformIndexing, | ||
| 228 | UniformBufferArrayNonUniformIndexingEXT, | ||
| 229 | SampledImageArrayNonUniformIndexing, | ||
| 230 | SampledImageArrayNonUniformIndexingEXT, | ||
| 231 | StorageBufferArrayNonUniformIndexing, | ||
| 232 | StorageBufferArrayNonUniformIndexingEXT, | ||
| 233 | StorageImageArrayNonUniformIndexing, | ||
| 234 | StorageImageArrayNonUniformIndexingEXT, | ||
| 235 | InputAttachmentArrayNonUniformIndexing, | ||
| 236 | InputAttachmentArrayNonUniformIndexingEXT, | ||
| 237 | UniformTexelBufferArrayNonUniformIndexing, | ||
| 238 | UniformTexelBufferArrayNonUniformIndexingEXT, | ||
| 239 | StorageTexelBufferArrayNonUniformIndexing, | ||
| 240 | StorageTexelBufferArrayNonUniformIndexingEXT, | ||
| 241 | RayTracingNV, | ||
| 242 | VulkanMemoryModel, | ||
| 243 | VulkanMemoryModelKHR, | ||
| 244 | VulkanMemoryModelDeviceScope, | ||
| 245 | VulkanMemoryModelDeviceScopeKHR, | ||
| 246 | PhysicalStorageBufferAddresses, | ||
| 247 | PhysicalStorageBufferAddressesEXT, | ||
| 248 | ComputeDerivativeGroupLinearNV, | ||
| 249 | RayTracingProvisionalKHR, | ||
| 250 | CooperativeMatrixNV, | ||
| 251 | FragmentShaderSampleInterlockEXT, | ||
| 252 | FragmentShaderShadingRateInterlockEXT, | ||
| 253 | ShaderSMBuiltinsNV, | ||
| 254 | FragmentShaderPixelInterlockEXT, | ||
| 255 | DemoteToHelperInvocationEXT, | ||
| 256 | SubgroupShuffleINTEL, | ||
| 257 | SubgroupBufferBlockIOINTEL, | ||
| 258 | SubgroupImageBlockIOINTEL, | ||
| 259 | SubgroupImageMediaBlockIOINTEL, | ||
| 260 | RoundToInfinityINTEL, | ||
| 261 | FloatingPointModeINTEL, | ||
| 262 | IntegerFunctions2INTEL, | ||
| 263 | FunctionPointersINTEL, | ||
| 264 | IndirectReferencesINTEL, | ||
| 265 | AsmINTEL, | ||
| 266 | AtomicFloat32MinMaxEXT, | ||
| 267 | AtomicFloat64MinMaxEXT, | ||
| 268 | AtomicFloat16MinMaxEXT, | ||
| 269 | VectorComputeINTEL, | ||
| 270 | VectorAnyINTEL, | ||
| 271 | ExpectAssumeKHR, | ||
| 272 | SubgroupAvcMotionEstimationINTEL, | ||
| 273 | SubgroupAvcMotionEstimationIntraINTEL, | ||
| 274 | SubgroupAvcMotionEstimationChromaINTEL, | ||
| 275 | VariableLengthArrayINTEL, | ||
| 276 | FunctionFloatControlINTEL, | ||
| 277 | FPGAMemoryAttributesINTEL, | ||
| 278 | FPFastMathModeINTEL, | ||
| 279 | ArbitraryPrecisionIntegersINTEL, | ||
| 280 | UnstructuredLoopControlsINTEL, | ||
| 281 | FPGALoopControlsINTEL, | ||
| 282 | KernelAttributesINTEL, | ||
| 283 | FPGAKernelAttributesINTEL, | ||
| 284 | FPGAMemoryAccessesINTEL, | ||
| 285 | FPGAClusterAttributesINTEL, | ||
| 286 | LoopFuseINTEL, | ||
| 287 | FPGABufferLocationINTEL, | ||
| 288 | USMStorageClassesINTEL, | ||
| 289 | IOPipesINTEL, | ||
| 290 | BlockingPipesINTEL, | ||
| 291 | FPGARegINTEL, | ||
| 292 | AtomicFloat32AddEXT, | ||
| 293 | AtomicFloat64AddEXT, | ||
| 294 | LongConstantCompositeINTEL, | ||
| 295 | }; | ||
| 296 | |||
| 297 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 298 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 299 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 300 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 301 | |||
| 302 | pub const all_features = blk: { | ||
| 303 | @setEvalBranchQuota(2000); | ||
| 304 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 305 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 306 | var result: [len]CpuFeature = undefined; | ||
| 307 | result[@intFromEnum(Feature.v1_1)] = .{ | ||
| 308 | .llvm_name = null, | ||
| 309 | .description = "SPIR-V version 1.1", | ||
| 310 | .dependencies = featureSet(&[_]Feature{}), | ||
| 311 | }; | ||
| 312 | result[@intFromEnum(Feature.v1_2)] = .{ | ||
| 313 | .llvm_name = null, | ||
| 314 | .description = "SPIR-V version 1.2", | ||
| 315 | .dependencies = featureSet(&[_]Feature{ | ||
| 316 | .v1_1, | ||
| 317 | }), | ||
| 318 | }; | ||
| 319 | result[@intFromEnum(Feature.v1_3)] = .{ | ||
| 320 | .llvm_name = null, | ||
| 321 | .description = "SPIR-V version 1.3", | ||
| 322 | .dependencies = featureSet(&[_]Feature{ | ||
| 323 | .v1_2, | ||
| 324 | }), | ||
| 325 | }; | ||
| 326 | result[@intFromEnum(Feature.v1_4)] = .{ | ||
| 327 | .llvm_name = null, | ||
| 328 | .description = "SPIR-V version 1.4", | ||
| 329 | .dependencies = featureSet(&[_]Feature{ | ||
| 330 | .v1_3, | ||
| 331 | }), | ||
| 332 | }; | ||
| 333 | result[@intFromEnum(Feature.v1_5)] = .{ | ||
| 334 | .llvm_name = null, | ||
| 335 | .description = "SPIR-V version 1.5", | ||
| 336 | .dependencies = featureSet(&[_]Feature{ | ||
| 337 | .v1_4, | ||
| 338 | }), | ||
| 339 | }; | ||
| 340 | result[@intFromEnum(Feature.SPV_AMD_shader_fragment_mask)] = .{ | ||
| 341 | .llvm_name = null, | ||
| 342 | .description = "SPIR-V extension SPV_AMD_shader_fragment_mask", | ||
| 343 | .dependencies = featureSet(&[_]Feature{}), | ||
| 344 | }; | ||
| 345 | result[@intFromEnum(Feature.SPV_AMD_gpu_shader_int16)] = .{ | ||
| 346 | .llvm_name = null, | ||
| 347 | .description = "SPIR-V extension SPV_AMD_gpu_shader_int16", | ||
| 348 | .dependencies = featureSet(&[_]Feature{}), | ||
| 349 | }; | ||
| 350 | result[@intFromEnum(Feature.SPV_AMD_gpu_shader_half_float)] = .{ | ||
| 351 | .llvm_name = null, | ||
| 352 | .description = "SPIR-V extension SPV_AMD_gpu_shader_half_float", | ||
| 353 | .dependencies = featureSet(&[_]Feature{}), | ||
| 354 | }; | ||
| 355 | result[@intFromEnum(Feature.SPV_AMD_texture_gather_bias_lod)] = .{ | ||
| 356 | .llvm_name = null, | ||
| 357 | .description = "SPIR-V extension SPV_AMD_texture_gather_bias_lod", | ||
| 358 | .dependencies = featureSet(&[_]Feature{}), | ||
| 359 | }; | ||
| 360 | result[@intFromEnum(Feature.SPV_AMD_shader_ballot)] = .{ | ||
| 361 | .llvm_name = null, | ||
| 362 | .description = "SPIR-V extension SPV_AMD_shader_ballot", | ||
| 363 | .dependencies = featureSet(&[_]Feature{}), | ||
| 364 | }; | ||
| 365 | result[@intFromEnum(Feature.SPV_AMD_gcn_shader)] = .{ | ||
| 366 | .llvm_name = null, | ||
| 367 | .description = "SPIR-V extension SPV_AMD_gcn_shader", | ||
| 368 | .dependencies = featureSet(&[_]Feature{}), | ||
| 369 | }; | ||
| 370 | result[@intFromEnum(Feature.SPV_AMD_shader_image_load_store_lod)] = .{ | ||
| 371 | .llvm_name = null, | ||
| 372 | .description = "SPIR-V extension SPV_AMD_shader_image_load_store_lod", | ||
| 373 | .dependencies = featureSet(&[_]Feature{}), | ||
| 374 | }; | ||
| 375 | result[@intFromEnum(Feature.SPV_AMD_shader_explicit_vertex_parameter)] = .{ | ||
| 376 | .llvm_name = null, | ||
| 377 | .description = "SPIR-V extension SPV_AMD_shader_explicit_vertex_parameter", | ||
| 378 | .dependencies = featureSet(&[_]Feature{}), | ||
| 379 | }; | ||
| 380 | result[@intFromEnum(Feature.SPV_AMD_shader_trinary_minmax)] = .{ | ||
| 381 | .llvm_name = null, | ||
| 382 | .description = "SPIR-V extension SPV_AMD_shader_trinary_minmax", | ||
| 383 | .dependencies = featureSet(&[_]Feature{}), | ||
| 384 | }; | ||
| 385 | result[@intFromEnum(Feature.SPV_AMD_gpu_shader_half_float_fetch)] = .{ | ||
| 386 | .llvm_name = null, | ||
| 387 | .description = "SPIR-V extension SPV_AMD_gpu_shader_half_float_fetch", | ||
| 388 | .dependencies = featureSet(&[_]Feature{}), | ||
| 389 | }; | ||
| 390 | result[@intFromEnum(Feature.SPV_GOOGLE_hlsl_functionality1)] = .{ | ||
| 391 | .llvm_name = null, | ||
| 392 | .description = "SPIR-V extension SPV_GOOGLE_hlsl_functionality1", | ||
| 393 | .dependencies = featureSet(&[_]Feature{}), | ||
| 394 | }; | ||
| 395 | result[@intFromEnum(Feature.SPV_GOOGLE_user_type)] = .{ | ||
| 396 | .llvm_name = null, | ||
| 397 | .description = "SPIR-V extension SPV_GOOGLE_user_type", | ||
| 398 | .dependencies = featureSet(&[_]Feature{}), | ||
| 399 | }; | ||
| 400 | result[@intFromEnum(Feature.SPV_GOOGLE_decorate_string)] = .{ | ||
| 401 | .llvm_name = null, | ||
| 402 | .description = "SPIR-V extension SPV_GOOGLE_decorate_string", | ||
| 403 | .dependencies = featureSet(&[_]Feature{}), | ||
| 404 | }; | ||
| 405 | result[@intFromEnum(Feature.SPV_EXT_demote_to_helper_invocation)] = .{ | ||
| 406 | .llvm_name = null, | ||
| 407 | .description = "SPIR-V extension SPV_EXT_demote_to_helper_invocation", | ||
| 408 | .dependencies = featureSet(&[_]Feature{}), | ||
| 409 | }; | ||
| 410 | result[@intFromEnum(Feature.SPV_EXT_descriptor_indexing)] = .{ | ||
| 411 | .llvm_name = null, | ||
| 412 | .description = "SPIR-V extension SPV_EXT_descriptor_indexing", | ||
| 413 | .dependencies = featureSet(&[_]Feature{}), | ||
| 414 | }; | ||
| 415 | result[@intFromEnum(Feature.SPV_EXT_fragment_fully_covered)] = .{ | ||
| 416 | .llvm_name = null, | ||
| 417 | .description = "SPIR-V extension SPV_EXT_fragment_fully_covered", | ||
| 418 | .dependencies = featureSet(&[_]Feature{}), | ||
| 419 | }; | ||
| 420 | result[@intFromEnum(Feature.SPV_EXT_shader_stencil_export)] = .{ | ||
| 421 | .llvm_name = null, | ||
| 422 | .description = "SPIR-V extension SPV_EXT_shader_stencil_export", | ||
| 423 | .dependencies = featureSet(&[_]Feature{}), | ||
| 424 | }; | ||
| 425 | result[@intFromEnum(Feature.SPV_EXT_physical_storage_buffer)] = .{ | ||
| 426 | .llvm_name = null, | ||
| 427 | .description = "SPIR-V extension SPV_EXT_physical_storage_buffer", | ||
| 428 | .dependencies = featureSet(&[_]Feature{}), | ||
| 429 | }; | ||
| 430 | result[@intFromEnum(Feature.SPV_EXT_shader_atomic_float_add)] = .{ | ||
| 431 | .llvm_name = null, | ||
| 432 | .description = "SPIR-V extension SPV_EXT_shader_atomic_float_add", | ||
| 433 | .dependencies = featureSet(&[_]Feature{}), | ||
| 434 | }; | ||
| 435 | result[@intFromEnum(Feature.SPV_EXT_shader_atomic_float_min_max)] = .{ | ||
| 436 | .llvm_name = null, | ||
| 437 | .description = "SPIR-V extension SPV_EXT_shader_atomic_float_min_max", | ||
| 438 | .dependencies = featureSet(&[_]Feature{}), | ||
| 439 | }; | ||
| 440 | result[@intFromEnum(Feature.SPV_EXT_shader_image_int64)] = .{ | ||
| 441 | .llvm_name = null, | ||
| 442 | .description = "SPIR-V extension SPV_EXT_shader_image_int64", | ||
| 443 | .dependencies = featureSet(&[_]Feature{}), | ||
| 444 | }; | ||
| 445 | result[@intFromEnum(Feature.SPV_EXT_fragment_shader_interlock)] = .{ | ||
| 446 | .llvm_name = null, | ||
| 447 | .description = "SPIR-V extension SPV_EXT_fragment_shader_interlock", | ||
| 448 | .dependencies = featureSet(&[_]Feature{}), | ||
| 449 | }; | ||
| 450 | result[@intFromEnum(Feature.SPV_EXT_fragment_invocation_density)] = .{ | ||
| 451 | .llvm_name = null, | ||
| 452 | .description = "SPIR-V extension SPV_EXT_fragment_invocation_density", | ||
| 453 | .dependencies = featureSet(&[_]Feature{}), | ||
| 454 | }; | ||
| 455 | result[@intFromEnum(Feature.SPV_EXT_shader_viewport_index_layer)] = .{ | ||
| 456 | .llvm_name = null, | ||
| 457 | .description = "SPIR-V extension SPV_EXT_shader_viewport_index_layer", | ||
| 458 | .dependencies = featureSet(&[_]Feature{}), | ||
| 459 | }; | ||
| 460 | result[@intFromEnum(Feature.SPV_INTEL_loop_fuse)] = .{ | ||
| 461 | .llvm_name = null, | ||
| 462 | .description = "SPIR-V extension SPV_INTEL_loop_fuse", | ||
| 463 | .dependencies = featureSet(&[_]Feature{}), | ||
| 464 | }; | ||
| 465 | result[@intFromEnum(Feature.SPV_INTEL_fpga_dsp_control)] = .{ | ||
| 466 | .llvm_name = null, | ||
| 467 | .description = "SPIR-V extension SPV_INTEL_fpga_dsp_control", | ||
| 468 | .dependencies = featureSet(&[_]Feature{}), | ||
| 469 | }; | ||
| 470 | result[@intFromEnum(Feature.SPV_INTEL_fpga_reg)] = .{ | ||
| 471 | .llvm_name = null, | ||
| 472 | .description = "SPIR-V extension SPV_INTEL_fpga_reg", | ||
| 473 | .dependencies = featureSet(&[_]Feature{}), | ||
| 474 | }; | ||
| 475 | result[@intFromEnum(Feature.SPV_INTEL_fpga_memory_accesses)] = .{ | ||
| 476 | .llvm_name = null, | ||
| 477 | .description = "SPIR-V extension SPV_INTEL_fpga_memory_accesses", | ||
| 478 | .dependencies = featureSet(&[_]Feature{}), | ||
| 479 | }; | ||
| 480 | result[@intFromEnum(Feature.SPV_INTEL_fpga_loop_controls)] = .{ | ||
| 481 | .llvm_name = null, | ||
| 482 | .description = "SPIR-V extension SPV_INTEL_fpga_loop_controls", | ||
| 483 | .dependencies = featureSet(&[_]Feature{}), | ||
| 484 | }; | ||
| 485 | result[@intFromEnum(Feature.SPV_INTEL_io_pipes)] = .{ | ||
| 486 | .llvm_name = null, | ||
| 487 | .description = "SPIR-V extension SPV_INTEL_io_pipes", | ||
| 488 | .dependencies = featureSet(&[_]Feature{}), | ||
| 489 | }; | ||
| 490 | result[@intFromEnum(Feature.SPV_INTEL_unstructured_loop_controls)] = .{ | ||
| 491 | .llvm_name = null, | ||
| 492 | .description = "SPIR-V extension SPV_INTEL_unstructured_loop_controls", | ||
| 493 | .dependencies = featureSet(&[_]Feature{}), | ||
| 494 | }; | ||
| 495 | result[@intFromEnum(Feature.SPV_INTEL_blocking_pipes)] = .{ | ||
| 496 | .llvm_name = null, | ||
| 497 | .description = "SPIR-V extension SPV_INTEL_blocking_pipes", | ||
| 498 | .dependencies = featureSet(&[_]Feature{}), | ||
| 499 | }; | ||
| 500 | result[@intFromEnum(Feature.SPV_INTEL_device_side_avc_motion_estimation)] = .{ | ||
| 501 | .llvm_name = null, | ||
| 502 | .description = "SPIR-V extension SPV_INTEL_device_side_avc_motion_estimation", | ||
| 503 | .dependencies = featureSet(&[_]Feature{}), | ||
| 504 | }; | ||
| 505 | result[@intFromEnum(Feature.SPV_INTEL_fpga_memory_attributes)] = .{ | ||
| 506 | .llvm_name = null, | ||
| 507 | .description = "SPIR-V extension SPV_INTEL_fpga_memory_attributes", | ||
| 508 | .dependencies = featureSet(&[_]Feature{}), | ||
| 509 | }; | ||
| 510 | result[@intFromEnum(Feature.SPV_INTEL_fp_fast_math_mode)] = .{ | ||
| 511 | .llvm_name = null, | ||
| 512 | .description = "SPIR-V extension SPV_INTEL_fp_fast_math_mode", | ||
| 513 | .dependencies = featureSet(&[_]Feature{}), | ||
| 514 | }; | ||
| 515 | result[@intFromEnum(Feature.SPV_INTEL_media_block_io)] = .{ | ||
| 516 | .llvm_name = null, | ||
| 517 | .description = "SPIR-V extension SPV_INTEL_media_block_io", | ||
| 518 | .dependencies = featureSet(&[_]Feature{}), | ||
| 519 | }; | ||
| 520 | result[@intFromEnum(Feature.SPV_INTEL_shader_integer_functions2)] = .{ | ||
| 521 | .llvm_name = null, | ||
| 522 | .description = "SPIR-V extension SPV_INTEL_shader_integer_functions2", | ||
| 523 | .dependencies = featureSet(&[_]Feature{}), | ||
| 524 | }; | ||
| 525 | result[@intFromEnum(Feature.SPV_INTEL_subgroups)] = .{ | ||
| 526 | .llvm_name = null, | ||
| 527 | .description = "SPIR-V extension SPV_INTEL_subgroups", | ||
| 528 | .dependencies = featureSet(&[_]Feature{}), | ||
| 529 | }; | ||
| 530 | result[@intFromEnum(Feature.SPV_INTEL_fpga_cluster_attributes)] = .{ | ||
| 531 | .llvm_name = null, | ||
| 532 | .description = "SPIR-V extension SPV_INTEL_fpga_cluster_attributes", | ||
| 533 | .dependencies = featureSet(&[_]Feature{}), | ||
| 534 | }; | ||
| 535 | result[@intFromEnum(Feature.SPV_INTEL_kernel_attributes)] = .{ | ||
| 536 | .llvm_name = null, | ||
| 537 | .description = "SPIR-V extension SPV_INTEL_kernel_attributes", | ||
| 538 | .dependencies = featureSet(&[_]Feature{}), | ||
| 539 | }; | ||
| 540 | result[@intFromEnum(Feature.SPV_INTEL_arbitrary_precision_integers)] = .{ | ||
| 541 | .llvm_name = null, | ||
| 542 | .description = "SPIR-V extension SPV_INTEL_arbitrary_precision_integers", | ||
| 543 | .dependencies = featureSet(&[_]Feature{}), | ||
| 544 | }; | ||
| 545 | result[@intFromEnum(Feature.SPV_KHR_8bit_storage)] = .{ | ||
| 546 | .llvm_name = null, | ||
| 547 | .description = "SPIR-V extension SPV_KHR_8bit_storage", | ||
| 548 | .dependencies = featureSet(&[_]Feature{}), | ||
| 549 | }; | ||
| 550 | result[@intFromEnum(Feature.SPV_KHR_shader_clock)] = .{ | ||
| 551 | .llvm_name = null, | ||
| 552 | .description = "SPIR-V extension SPV_KHR_shader_clock", | ||
| 553 | .dependencies = featureSet(&[_]Feature{}), | ||
| 554 | }; | ||
| 555 | result[@intFromEnum(Feature.SPV_KHR_device_group)] = .{ | ||
| 556 | .llvm_name = null, | ||
| 557 | .description = "SPIR-V extension SPV_KHR_device_group", | ||
| 558 | .dependencies = featureSet(&[_]Feature{}), | ||
| 559 | }; | ||
| 560 | result[@intFromEnum(Feature.SPV_KHR_16bit_storage)] = .{ | ||
| 561 | .llvm_name = null, | ||
| 562 | .description = "SPIR-V extension SPV_KHR_16bit_storage", | ||
| 563 | .dependencies = featureSet(&[_]Feature{}), | ||
| 564 | }; | ||
| 565 | result[@intFromEnum(Feature.SPV_KHR_variable_pointers)] = .{ | ||
| 566 | .llvm_name = null, | ||
| 567 | .description = "SPIR-V extension SPV_KHR_variable_pointers", | ||
| 568 | .dependencies = featureSet(&[_]Feature{}), | ||
| 569 | }; | ||
| 570 | result[@intFromEnum(Feature.SPV_KHR_no_integer_wrap_decoration)] = .{ | ||
| 571 | .llvm_name = null, | ||
| 572 | .description = "SPIR-V extension SPV_KHR_no_integer_wrap_decoration", | ||
| 573 | .dependencies = featureSet(&[_]Feature{}), | ||
| 574 | }; | ||
| 575 | result[@intFromEnum(Feature.SPV_KHR_subgroup_vote)] = .{ | ||
| 576 | .llvm_name = null, | ||
| 577 | .description = "SPIR-V extension SPV_KHR_subgroup_vote", | ||
| 578 | .dependencies = featureSet(&[_]Feature{}), | ||
| 579 | }; | ||
| 580 | result[@intFromEnum(Feature.SPV_KHR_multiview)] = .{ | ||
| 581 | .llvm_name = null, | ||
| 582 | .description = "SPIR-V extension SPV_KHR_multiview", | ||
| 583 | .dependencies = featureSet(&[_]Feature{}), | ||
| 584 | }; | ||
| 585 | result[@intFromEnum(Feature.SPV_KHR_shader_ballot)] = .{ | ||
| 586 | .llvm_name = null, | ||
| 587 | .description = "SPIR-V extension SPV_KHR_shader_ballot", | ||
| 588 | .dependencies = featureSet(&[_]Feature{}), | ||
| 589 | }; | ||
| 590 | result[@intFromEnum(Feature.SPV_KHR_vulkan_memory_model)] = .{ | ||
| 591 | .llvm_name = null, | ||
| 592 | .description = "SPIR-V extension SPV_KHR_vulkan_memory_model", | ||
| 593 | .dependencies = featureSet(&[_]Feature{}), | ||
| 594 | }; | ||
| 595 | result[@intFromEnum(Feature.SPV_KHR_physical_storage_buffer)] = .{ | ||
| 596 | .llvm_name = null, | ||
| 597 | .description = "SPIR-V extension SPV_KHR_physical_storage_buffer", | ||
| 598 | .dependencies = featureSet(&[_]Feature{}), | ||
| 599 | }; | ||
| 600 | result[@intFromEnum(Feature.SPV_KHR_workgroup_memory_explicit_layout)] = .{ | ||
| 601 | .llvm_name = null, | ||
| 602 | .description = "SPIR-V extension SPV_KHR_workgroup_memory_explicit_layout", | ||
| 603 | .dependencies = featureSet(&[_]Feature{}), | ||
| 604 | }; | ||
| 605 | result[@intFromEnum(Feature.SPV_KHR_fragment_shading_rate)] = .{ | ||
| 606 | .llvm_name = null, | ||
| 607 | .description = "SPIR-V extension SPV_KHR_fragment_shading_rate", | ||
| 608 | .dependencies = featureSet(&[_]Feature{}), | ||
| 609 | }; | ||
| 610 | result[@intFromEnum(Feature.SPV_KHR_shader_atomic_counter_ops)] = .{ | ||
| 611 | .llvm_name = null, | ||
| 612 | .description = "SPIR-V extension SPV_KHR_shader_atomic_counter_ops", | ||
| 613 | .dependencies = featureSet(&[_]Feature{}), | ||
| 614 | }; | ||
| 615 | result[@intFromEnum(Feature.SPV_KHR_shader_draw_parameters)] = .{ | ||
| 616 | .llvm_name = null, | ||
| 617 | .description = "SPIR-V extension SPV_KHR_shader_draw_parameters", | ||
| 618 | .dependencies = featureSet(&[_]Feature{}), | ||
| 619 | }; | ||
| 620 | result[@intFromEnum(Feature.SPV_KHR_storage_buffer_storage_class)] = .{ | ||
| 621 | .llvm_name = null, | ||
| 622 | .description = "SPIR-V extension SPV_KHR_storage_buffer_storage_class", | ||
| 623 | .dependencies = featureSet(&[_]Feature{}), | ||
| 624 | }; | ||
| 625 | result[@intFromEnum(Feature.SPV_KHR_linkonce_odr)] = .{ | ||
| 626 | .llvm_name = null, | ||
| 627 | .description = "SPIR-V extension SPV_KHR_linkonce_odr", | ||
| 628 | .dependencies = featureSet(&[_]Feature{}), | ||
| 629 | }; | ||
| 630 | result[@intFromEnum(Feature.SPV_KHR_terminate_invocation)] = .{ | ||
| 631 | .llvm_name = null, | ||
| 632 | .description = "SPIR-V extension SPV_KHR_terminate_invocation", | ||
| 633 | .dependencies = featureSet(&[_]Feature{}), | ||
| 634 | }; | ||
| 635 | result[@intFromEnum(Feature.SPV_KHR_non_semantic_info)] = .{ | ||
| 636 | .llvm_name = null, | ||
| 637 | .description = "SPIR-V extension SPV_KHR_non_semantic_info", | ||
| 638 | .dependencies = featureSet(&[_]Feature{}), | ||
| 639 | }; | ||
| 640 | result[@intFromEnum(Feature.SPV_KHR_post_depth_coverage)] = .{ | ||
| 641 | .llvm_name = null, | ||
| 642 | .description = "SPIR-V extension SPV_KHR_post_depth_coverage", | ||
| 643 | .dependencies = featureSet(&[_]Feature{}), | ||
| 644 | }; | ||
| 645 | result[@intFromEnum(Feature.SPV_KHR_expect_assume)] = .{ | ||
| 646 | .llvm_name = null, | ||
| 647 | .description = "SPIR-V extension SPV_KHR_expect_assume", | ||
| 648 | .dependencies = featureSet(&[_]Feature{}), | ||
| 649 | }; | ||
| 650 | result[@intFromEnum(Feature.SPV_KHR_ray_tracing)] = .{ | ||
| 651 | .llvm_name = null, | ||
| 652 | .description = "SPIR-V extension SPV_KHR_ray_tracing", | ||
| 653 | .dependencies = featureSet(&[_]Feature{}), | ||
| 654 | }; | ||
| 655 | result[@intFromEnum(Feature.SPV_KHR_ray_query)] = .{ | ||
| 656 | .llvm_name = null, | ||
| 657 | .description = "SPIR-V extension SPV_KHR_ray_query", | ||
| 658 | .dependencies = featureSet(&[_]Feature{}), | ||
| 659 | }; | ||
| 660 | result[@intFromEnum(Feature.SPV_KHR_float_controls)] = .{ | ||
| 661 | .llvm_name = null, | ||
| 662 | .description = "SPIR-V extension SPV_KHR_float_controls", | ||
| 663 | .dependencies = featureSet(&[_]Feature{}), | ||
| 664 | }; | ||
| 665 | result[@intFromEnum(Feature.SPV_NV_viewport_array2)] = .{ | ||
| 666 | .llvm_name = null, | ||
| 667 | .description = "SPIR-V extension SPV_NV_viewport_array2", | ||
| 668 | .dependencies = featureSet(&[_]Feature{}), | ||
| 669 | }; | ||
| 670 | result[@intFromEnum(Feature.SPV_NV_shader_subgroup_partitioned)] = .{ | ||
| 671 | .llvm_name = null, | ||
| 672 | .description = "SPIR-V extension SPV_NV_shader_subgroup_partitioned", | ||
| 673 | .dependencies = featureSet(&[_]Feature{}), | ||
| 674 | }; | ||
| 675 | result[@intFromEnum(Feature.SPV_NVX_multiview_per_view_attributes)] = .{ | ||
| 676 | .llvm_name = null, | ||
| 677 | .description = "SPIR-V extension SPV_NVX_multiview_per_view_attributes", | ||
| 678 | .dependencies = featureSet(&[_]Feature{}), | ||
| 679 | }; | ||
| 680 | result[@intFromEnum(Feature.SPV_NV_ray_tracing)] = .{ | ||
| 681 | .llvm_name = null, | ||
| 682 | .description = "SPIR-V extension SPV_NV_ray_tracing", | ||
| 683 | .dependencies = featureSet(&[_]Feature{}), | ||
| 684 | }; | ||
| 685 | result[@intFromEnum(Feature.SPV_NV_shader_image_footprint)] = .{ | ||
| 686 | .llvm_name = null, | ||
| 687 | .description = "SPIR-V extension SPV_NV_shader_image_footprint", | ||
| 688 | .dependencies = featureSet(&[_]Feature{}), | ||
| 689 | }; | ||
| 690 | result[@intFromEnum(Feature.SPV_NV_shading_rate)] = .{ | ||
| 691 | .llvm_name = null, | ||
| 692 | .description = "SPIR-V extension SPV_NV_shading_rate", | ||
| 693 | .dependencies = featureSet(&[_]Feature{}), | ||
| 694 | }; | ||
| 695 | result[@intFromEnum(Feature.SPV_NV_stereo_view_rendering)] = .{ | ||
| 696 | .llvm_name = null, | ||
| 697 | .description = "SPIR-V extension SPV_NV_stereo_view_rendering", | ||
| 698 | .dependencies = featureSet(&[_]Feature{}), | ||
| 699 | }; | ||
| 700 | result[@intFromEnum(Feature.SPV_NV_compute_shader_derivatives)] = .{ | ||
| 701 | .llvm_name = null, | ||
| 702 | .description = "SPIR-V extension SPV_NV_compute_shader_derivatives", | ||
| 703 | .dependencies = featureSet(&[_]Feature{}), | ||
| 704 | }; | ||
| 705 | result[@intFromEnum(Feature.SPV_NV_shader_sm_builtins)] = .{ | ||
| 706 | .llvm_name = null, | ||
| 707 | .description = "SPIR-V extension SPV_NV_shader_sm_builtins", | ||
| 708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.SPV_NV_mesh_shader)] = .{ | ||
| 711 | .llvm_name = null, | ||
| 712 | .description = "SPIR-V extension SPV_NV_mesh_shader", | ||
| 713 | .dependencies = featureSet(&[_]Feature{}), | ||
| 714 | }; | ||
| 715 | result[@intFromEnum(Feature.SPV_NV_geometry_shader_passthrough)] = .{ | ||
| 716 | .llvm_name = null, | ||
| 717 | .description = "SPIR-V extension SPV_NV_geometry_shader_passthrough", | ||
| 718 | .dependencies = featureSet(&[_]Feature{}), | ||
| 719 | }; | ||
| 720 | result[@intFromEnum(Feature.SPV_NV_fragment_shader_barycentric)] = .{ | ||
| 721 | .llvm_name = null, | ||
| 722 | .description = "SPIR-V extension SPV_NV_fragment_shader_barycentric", | ||
| 723 | .dependencies = featureSet(&[_]Feature{}), | ||
| 724 | }; | ||
| 725 | result[@intFromEnum(Feature.SPV_NV_cooperative_matrix)] = .{ | ||
| 726 | .llvm_name = null, | ||
| 727 | .description = "SPIR-V extension SPV_NV_cooperative_matrix", | ||
| 728 | .dependencies = featureSet(&[_]Feature{}), | ||
| 729 | }; | ||
| 730 | result[@intFromEnum(Feature.SPV_NV_sample_mask_override_coverage)] = .{ | ||
| 731 | .llvm_name = null, | ||
| 732 | .description = "SPIR-V extension SPV_NV_sample_mask_override_coverage", | ||
| 733 | .dependencies = featureSet(&[_]Feature{}), | ||
| 734 | }; | ||
| 735 | result[@intFromEnum(Feature.Matrix)] = .{ | ||
| 736 | .llvm_name = null, | ||
| 737 | .description = "Enable SPIR-V capability Matrix", | ||
| 738 | .dependencies = featureSet(&[_]Feature{}), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.Shader)] = .{ | ||
| 741 | .llvm_name = null, | ||
| 742 | .description = "Enable SPIR-V capability Shader", | ||
| 743 | .dependencies = featureSet(&[_]Feature{ | ||
| 744 | .Matrix, | ||
| 745 | }), | ||
| 746 | }; | ||
| 747 | result[@intFromEnum(Feature.Geometry)] = .{ | ||
| 748 | .llvm_name = null, | ||
| 749 | .description = "Enable SPIR-V capability Geometry", | ||
| 750 | .dependencies = featureSet(&[_]Feature{ | ||
| 751 | .Shader, | ||
| 752 | }), | ||
| 753 | }; | ||
| 754 | result[@intFromEnum(Feature.Tessellation)] = .{ | ||
| 755 | .llvm_name = null, | ||
| 756 | .description = "Enable SPIR-V capability Tessellation", | ||
| 757 | .dependencies = featureSet(&[_]Feature{ | ||
| 758 | .Shader, | ||
| 759 | }), | ||
| 760 | }; | ||
| 761 | result[@intFromEnum(Feature.Addresses)] = .{ | ||
| 762 | .llvm_name = null, | ||
| 763 | .description = "Enable SPIR-V capability Addresses", | ||
| 764 | .dependencies = featureSet(&[_]Feature{}), | ||
| 765 | }; | ||
| 766 | result[@intFromEnum(Feature.Linkage)] = .{ | ||
| 767 | .llvm_name = null, | ||
| 768 | .description = "Enable SPIR-V capability Linkage", | ||
| 769 | .dependencies = featureSet(&[_]Feature{}), | ||
| 770 | }; | ||
| 771 | result[@intFromEnum(Feature.Kernel)] = .{ | ||
| 772 | .llvm_name = null, | ||
| 773 | .description = "Enable SPIR-V capability Kernel", | ||
| 774 | .dependencies = featureSet(&[_]Feature{}), | ||
| 775 | }; | ||
| 776 | result[@intFromEnum(Feature.Vector16)] = .{ | ||
| 777 | .llvm_name = null, | ||
| 778 | .description = "Enable SPIR-V capability Vector16", | ||
| 779 | .dependencies = featureSet(&[_]Feature{ | ||
| 780 | .Kernel, | ||
| 781 | }), | ||
| 782 | }; | ||
| 783 | result[@intFromEnum(Feature.Float16Buffer)] = .{ | ||
| 784 | .llvm_name = null, | ||
| 785 | .description = "Enable SPIR-V capability Float16Buffer", | ||
| 786 | .dependencies = featureSet(&[_]Feature{ | ||
| 787 | .Kernel, | ||
| 788 | }), | ||
| 789 | }; | ||
| 790 | result[@intFromEnum(Feature.Float16)] = .{ | ||
| 791 | .llvm_name = null, | ||
| 792 | .description = "Enable SPIR-V capability Float16", | ||
| 793 | .dependencies = featureSet(&[_]Feature{}), | ||
| 794 | }; | ||
| 795 | result[@intFromEnum(Feature.Float64)] = .{ | ||
| 796 | .llvm_name = null, | ||
| 797 | .description = "Enable SPIR-V capability Float64", | ||
| 798 | .dependencies = featureSet(&[_]Feature{}), | ||
| 799 | }; | ||
| 800 | result[@intFromEnum(Feature.Int64)] = .{ | ||
| 801 | .llvm_name = null, | ||
| 802 | .description = "Enable SPIR-V capability Int64", | ||
| 803 | .dependencies = featureSet(&[_]Feature{}), | ||
| 804 | }; | ||
| 805 | result[@intFromEnum(Feature.Int64Atomics)] = .{ | ||
| 806 | .llvm_name = null, | ||
| 807 | .description = "Enable SPIR-V capability Int64Atomics", | ||
| 808 | .dependencies = featureSet(&[_]Feature{ | ||
| 809 | .Int64, | ||
| 810 | }), | ||
| 811 | }; | ||
| 812 | result[@intFromEnum(Feature.ImageBasic)] = .{ | ||
| 813 | .llvm_name = null, | ||
| 814 | .description = "Enable SPIR-V capability ImageBasic", | ||
| 815 | .dependencies = featureSet(&[_]Feature{ | ||
| 816 | .Kernel, | ||
| 817 | }), | ||
| 818 | }; | ||
| 819 | result[@intFromEnum(Feature.ImageReadWrite)] = .{ | ||
| 820 | .llvm_name = null, | ||
| 821 | .description = "Enable SPIR-V capability ImageReadWrite", | ||
| 822 | .dependencies = featureSet(&[_]Feature{ | ||
| 823 | .ImageBasic, | ||
| 824 | }), | ||
| 825 | }; | ||
| 826 | result[@intFromEnum(Feature.ImageMipmap)] = .{ | ||
| 827 | .llvm_name = null, | ||
| 828 | .description = "Enable SPIR-V capability ImageMipmap", | ||
| 829 | .dependencies = featureSet(&[_]Feature{ | ||
| 830 | .ImageBasic, | ||
| 831 | }), | ||
| 832 | }; | ||
| 833 | result[@intFromEnum(Feature.Pipes)] = .{ | ||
| 834 | .llvm_name = null, | ||
| 835 | .description = "Enable SPIR-V capability Pipes", | ||
| 836 | .dependencies = featureSet(&[_]Feature{ | ||
| 837 | .Kernel, | ||
| 838 | }), | ||
| 839 | }; | ||
| 840 | result[@intFromEnum(Feature.Groups)] = .{ | ||
| 841 | .llvm_name = null, | ||
| 842 | .description = "Enable SPIR-V capability Groups", | ||
| 843 | .dependencies = featureSet(&[_]Feature{}), | ||
| 844 | }; | ||
| 845 | result[@intFromEnum(Feature.DeviceEnqueue)] = .{ | ||
| 846 | .llvm_name = null, | ||
| 847 | .description = "Enable SPIR-V capability DeviceEnqueue", | ||
| 848 | .dependencies = featureSet(&[_]Feature{ | ||
| 849 | .Kernel, | ||
| 850 | }), | ||
| 851 | }; | ||
| 852 | result[@intFromEnum(Feature.LiteralSampler)] = .{ | ||
| 853 | .llvm_name = null, | ||
| 854 | .description = "Enable SPIR-V capability LiteralSampler", | ||
| 855 | .dependencies = featureSet(&[_]Feature{ | ||
| 856 | .Kernel, | ||
| 857 | }), | ||
| 858 | }; | ||
| 859 | result[@intFromEnum(Feature.AtomicStorage)] = .{ | ||
| 860 | .llvm_name = null, | ||
| 861 | .description = "Enable SPIR-V capability AtomicStorage", | ||
| 862 | .dependencies = featureSet(&[_]Feature{ | ||
| 863 | .Shader, | ||
| 864 | }), | ||
| 865 | }; | ||
| 866 | result[@intFromEnum(Feature.Int16)] = .{ | ||
| 867 | .llvm_name = null, | ||
| 868 | .description = "Enable SPIR-V capability Int16", | ||
| 869 | .dependencies = featureSet(&[_]Feature{}), | ||
| 870 | }; | ||
| 871 | result[@intFromEnum(Feature.TessellationPointSize)] = .{ | ||
| 872 | .llvm_name = null, | ||
| 873 | .description = "Enable SPIR-V capability TessellationPointSize", | ||
| 874 | .dependencies = featureSet(&[_]Feature{ | ||
| 875 | .Tessellation, | ||
| 876 | }), | ||
| 877 | }; | ||
| 878 | result[@intFromEnum(Feature.GeometryPointSize)] = .{ | ||
| 879 | .llvm_name = null, | ||
| 880 | .description = "Enable SPIR-V capability GeometryPointSize", | ||
| 881 | .dependencies = featureSet(&[_]Feature{ | ||
| 882 | .Geometry, | ||
| 883 | }), | ||
| 884 | }; | ||
| 885 | result[@intFromEnum(Feature.ImageGatherExtended)] = .{ | ||
| 886 | .llvm_name = null, | ||
| 887 | .description = "Enable SPIR-V capability ImageGatherExtended", | ||
| 888 | .dependencies = featureSet(&[_]Feature{ | ||
| 889 | .Shader, | ||
| 890 | }), | ||
| 891 | }; | ||
| 892 | result[@intFromEnum(Feature.StorageImageMultisample)] = .{ | ||
| 893 | .llvm_name = null, | ||
| 894 | .description = "Enable SPIR-V capability StorageImageMultisample", | ||
| 895 | .dependencies = featureSet(&[_]Feature{ | ||
| 896 | .Shader, | ||
| 897 | }), | ||
| 898 | }; | ||
| 899 | result[@intFromEnum(Feature.UniformBufferArrayDynamicIndexing)] = .{ | ||
| 900 | .llvm_name = null, | ||
| 901 | .description = "Enable SPIR-V capability UniformBufferArrayDynamicIndexing", | ||
| 902 | .dependencies = featureSet(&[_]Feature{ | ||
| 903 | .Shader, | ||
| 904 | }), | ||
| 905 | }; | ||
| 906 | result[@intFromEnum(Feature.SampledImageArrayDynamicIndexing)] = .{ | ||
| 907 | .llvm_name = null, | ||
| 908 | .description = "Enable SPIR-V capability SampledImageArrayDynamicIndexing", | ||
| 909 | .dependencies = featureSet(&[_]Feature{ | ||
| 910 | .Shader, | ||
| 911 | }), | ||
| 912 | }; | ||
| 913 | result[@intFromEnum(Feature.StorageBufferArrayDynamicIndexing)] = .{ | ||
| 914 | .llvm_name = null, | ||
| 915 | .description = "Enable SPIR-V capability StorageBufferArrayDynamicIndexing", | ||
| 916 | .dependencies = featureSet(&[_]Feature{ | ||
| 917 | .Shader, | ||
| 918 | }), | ||
| 919 | }; | ||
| 920 | result[@intFromEnum(Feature.StorageImageArrayDynamicIndexing)] = .{ | ||
| 921 | .llvm_name = null, | ||
| 922 | .description = "Enable SPIR-V capability StorageImageArrayDynamicIndexing", | ||
| 923 | .dependencies = featureSet(&[_]Feature{ | ||
| 924 | .Shader, | ||
| 925 | }), | ||
| 926 | }; | ||
| 927 | result[@intFromEnum(Feature.ClipDistance)] = .{ | ||
| 928 | .llvm_name = null, | ||
| 929 | .description = "Enable SPIR-V capability ClipDistance", | ||
| 930 | .dependencies = featureSet(&[_]Feature{ | ||
| 931 | .Shader, | ||
| 932 | }), | ||
| 933 | }; | ||
| 934 | result[@intFromEnum(Feature.CullDistance)] = .{ | ||
| 935 | .llvm_name = null, | ||
| 936 | .description = "Enable SPIR-V capability CullDistance", | ||
| 937 | .dependencies = featureSet(&[_]Feature{ | ||
| 938 | .Shader, | ||
| 939 | }), | ||
| 940 | }; | ||
| 941 | result[@intFromEnum(Feature.ImageCubeArray)] = .{ | ||
| 942 | .llvm_name = null, | ||
| 943 | .description = "Enable SPIR-V capability ImageCubeArray", | ||
| 944 | .dependencies = featureSet(&[_]Feature{ | ||
| 945 | .SampledCubeArray, | ||
| 946 | }), | ||
| 947 | }; | ||
| 948 | result[@intFromEnum(Feature.SampleRateShading)] = .{ | ||
| 949 | .llvm_name = null, | ||
| 950 | .description = "Enable SPIR-V capability SampleRateShading", | ||
| 951 | .dependencies = featureSet(&[_]Feature{ | ||
| 952 | .Shader, | ||
| 953 | }), | ||
| 954 | }; | ||
| 955 | result[@intFromEnum(Feature.ImageRect)] = .{ | ||
| 956 | .llvm_name = null, | ||
| 957 | .description = "Enable SPIR-V capability ImageRect", | ||
| 958 | .dependencies = featureSet(&[_]Feature{ | ||
| 959 | .SampledRect, | ||
| 960 | }), | ||
| 961 | }; | ||
| 962 | result[@intFromEnum(Feature.SampledRect)] = .{ | ||
| 963 | .llvm_name = null, | ||
| 964 | .description = "Enable SPIR-V capability SampledRect", | ||
| 965 | .dependencies = featureSet(&[_]Feature{ | ||
| 966 | .Shader, | ||
| 967 | }), | ||
| 968 | }; | ||
| 969 | result[@intFromEnum(Feature.GenericPointer)] = .{ | ||
| 970 | .llvm_name = null, | ||
| 971 | .description = "Enable SPIR-V capability GenericPointer", | ||
| 972 | .dependencies = featureSet(&[_]Feature{ | ||
| 973 | .Addresses, | ||
| 974 | }), | ||
| 975 | }; | ||
| 976 | result[@intFromEnum(Feature.Int8)] = .{ | ||
| 977 | .llvm_name = null, | ||
| 978 | .description = "Enable SPIR-V capability Int8", | ||
| 979 | .dependencies = featureSet(&[_]Feature{}), | ||
| 980 | }; | ||
| 981 | result[@intFromEnum(Feature.InputAttachment)] = .{ | ||
| 982 | .llvm_name = null, | ||
| 983 | .description = "Enable SPIR-V capability InputAttachment", | ||
| 984 | .dependencies = featureSet(&[_]Feature{ | ||
| 985 | .Shader, | ||
| 986 | }), | ||
| 987 | }; | ||
| 988 | result[@intFromEnum(Feature.SparseResidency)] = .{ | ||
| 989 | .llvm_name = null, | ||
| 990 | .description = "Enable SPIR-V capability SparseResidency", | ||
| 991 | .dependencies = featureSet(&[_]Feature{ | ||
| 992 | .Shader, | ||
| 993 | }), | ||
| 994 | }; | ||
| 995 | result[@intFromEnum(Feature.MinLod)] = .{ | ||
| 996 | .llvm_name = null, | ||
| 997 | .description = "Enable SPIR-V capability MinLod", | ||
| 998 | .dependencies = featureSet(&[_]Feature{ | ||
| 999 | .Shader, | ||
| 1000 | }), | ||
| 1001 | }; | ||
| 1002 | result[@intFromEnum(Feature.Sampled1D)] = .{ | ||
| 1003 | .llvm_name = null, | ||
| 1004 | .description = "Enable SPIR-V capability Sampled1D", | ||
| 1005 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1006 | }; | ||
| 1007 | result[@intFromEnum(Feature.Image1D)] = .{ | ||
| 1008 | .llvm_name = null, | ||
| 1009 | .description = "Enable SPIR-V capability Image1D", | ||
| 1010 | .dependencies = featureSet(&[_]Feature{ | ||
| 1011 | .Sampled1D, | ||
| 1012 | }), | ||
| 1013 | }; | ||
| 1014 | result[@intFromEnum(Feature.SampledCubeArray)] = .{ | ||
| 1015 | .llvm_name = null, | ||
| 1016 | .description = "Enable SPIR-V capability SampledCubeArray", | ||
| 1017 | .dependencies = featureSet(&[_]Feature{ | ||
| 1018 | .Shader, | ||
| 1019 | }), | ||
| 1020 | }; | ||
| 1021 | result[@intFromEnum(Feature.SampledBuffer)] = .{ | ||
| 1022 | .llvm_name = null, | ||
| 1023 | .description = "Enable SPIR-V capability SampledBuffer", | ||
| 1024 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1025 | }; | ||
| 1026 | result[@intFromEnum(Feature.ImageBuffer)] = .{ | ||
| 1027 | .llvm_name = null, | ||
| 1028 | .description = "Enable SPIR-V capability ImageBuffer", | ||
| 1029 | .dependencies = featureSet(&[_]Feature{ | ||
| 1030 | .SampledBuffer, | ||
| 1031 | }), | ||
| 1032 | }; | ||
| 1033 | result[@intFromEnum(Feature.ImageMSArray)] = .{ | ||
| 1034 | .llvm_name = null, | ||
| 1035 | .description = "Enable SPIR-V capability ImageMSArray", | ||
| 1036 | .dependencies = featureSet(&[_]Feature{ | ||
| 1037 | .Shader, | ||
| 1038 | }), | ||
| 1039 | }; | ||
| 1040 | result[@intFromEnum(Feature.StorageImageExtendedFormats)] = .{ | ||
| 1041 | .llvm_name = null, | ||
| 1042 | .description = "Enable SPIR-V capability StorageImageExtendedFormats", | ||
| 1043 | .dependencies = featureSet(&[_]Feature{ | ||
| 1044 | .Shader, | ||
| 1045 | }), | ||
| 1046 | }; | ||
| 1047 | result[@intFromEnum(Feature.ImageQuery)] = .{ | ||
| 1048 | .llvm_name = null, | ||
| 1049 | .description = "Enable SPIR-V capability ImageQuery", | ||
| 1050 | .dependencies = featureSet(&[_]Feature{ | ||
| 1051 | .Shader, | ||
| 1052 | }), | ||
| 1053 | }; | ||
| 1054 | result[@intFromEnum(Feature.DerivativeControl)] = .{ | ||
| 1055 | .llvm_name = null, | ||
| 1056 | .description = "Enable SPIR-V capability DerivativeControl", | ||
| 1057 | .dependencies = featureSet(&[_]Feature{ | ||
| 1058 | .Shader, | ||
| 1059 | }), | ||
| 1060 | }; | ||
| 1061 | result[@intFromEnum(Feature.InterpolationFunction)] = .{ | ||
| 1062 | .llvm_name = null, | ||
| 1063 | .description = "Enable SPIR-V capability InterpolationFunction", | ||
| 1064 | .dependencies = featureSet(&[_]Feature{ | ||
| 1065 | .Shader, | ||
| 1066 | }), | ||
| 1067 | }; | ||
| 1068 | result[@intFromEnum(Feature.TransformFeedback)] = .{ | ||
| 1069 | .llvm_name = null, | ||
| 1070 | .description = "Enable SPIR-V capability TransformFeedback", | ||
| 1071 | .dependencies = featureSet(&[_]Feature{ | ||
| 1072 | .Shader, | ||
| 1073 | }), | ||
| 1074 | }; | ||
| 1075 | result[@intFromEnum(Feature.GeometryStreams)] = .{ | ||
| 1076 | .llvm_name = null, | ||
| 1077 | .description = "Enable SPIR-V capability GeometryStreams", | ||
| 1078 | .dependencies = featureSet(&[_]Feature{ | ||
| 1079 | .Geometry, | ||
| 1080 | }), | ||
| 1081 | }; | ||
| 1082 | result[@intFromEnum(Feature.StorageImageReadWithoutFormat)] = .{ | ||
| 1083 | .llvm_name = null, | ||
| 1084 | .description = "Enable SPIR-V capability StorageImageReadWithoutFormat", | ||
| 1085 | .dependencies = featureSet(&[_]Feature{ | ||
| 1086 | .Shader, | ||
| 1087 | }), | ||
| 1088 | }; | ||
| 1089 | result[@intFromEnum(Feature.StorageImageWriteWithoutFormat)] = .{ | ||
| 1090 | .llvm_name = null, | ||
| 1091 | .description = "Enable SPIR-V capability StorageImageWriteWithoutFormat", | ||
| 1092 | .dependencies = featureSet(&[_]Feature{ | ||
| 1093 | .Shader, | ||
| 1094 | }), | ||
| 1095 | }; | ||
| 1096 | result[@intFromEnum(Feature.MultiViewport)] = .{ | ||
| 1097 | .llvm_name = null, | ||
| 1098 | .description = "Enable SPIR-V capability MultiViewport", | ||
| 1099 | .dependencies = featureSet(&[_]Feature{ | ||
| 1100 | .Geometry, | ||
| 1101 | }), | ||
| 1102 | }; | ||
| 1103 | result[@intFromEnum(Feature.SubgroupDispatch)] = .{ | ||
| 1104 | .llvm_name = null, | ||
| 1105 | .description = "Enable SPIR-V capability SubgroupDispatch", | ||
| 1106 | .dependencies = featureSet(&[_]Feature{ | ||
| 1107 | .v1_1, | ||
| 1108 | .DeviceEnqueue, | ||
| 1109 | }), | ||
| 1110 | }; | ||
| 1111 | result[@intFromEnum(Feature.NamedBarrier)] = .{ | ||
| 1112 | .llvm_name = null, | ||
| 1113 | .description = "Enable SPIR-V capability NamedBarrier", | ||
| 1114 | .dependencies = featureSet(&[_]Feature{ | ||
| 1115 | .v1_1, | ||
| 1116 | .Kernel, | ||
| 1117 | }), | ||
| 1118 | }; | ||
| 1119 | result[@intFromEnum(Feature.PipeStorage)] = .{ | ||
| 1120 | .llvm_name = null, | ||
| 1121 | .description = "Enable SPIR-V capability PipeStorage", | ||
| 1122 | .dependencies = featureSet(&[_]Feature{ | ||
| 1123 | .v1_1, | ||
| 1124 | .Pipes, | ||
| 1125 | }), | ||
| 1126 | }; | ||
| 1127 | result[@intFromEnum(Feature.GroupNonUniform)] = .{ | ||
| 1128 | .llvm_name = null, | ||
| 1129 | .description = "Enable SPIR-V capability GroupNonUniform", | ||
| 1130 | .dependencies = featureSet(&[_]Feature{ | ||
| 1131 | .v1_3, | ||
| 1132 | }), | ||
| 1133 | }; | ||
| 1134 | result[@intFromEnum(Feature.GroupNonUniformVote)] = .{ | ||
| 1135 | .llvm_name = null, | ||
| 1136 | .description = "Enable SPIR-V capability GroupNonUniformVote", | ||
| 1137 | .dependencies = featureSet(&[_]Feature{ | ||
| 1138 | .v1_3, | ||
| 1139 | .GroupNonUniform, | ||
| 1140 | }), | ||
| 1141 | }; | ||
| 1142 | result[@intFromEnum(Feature.GroupNonUniformArithmetic)] = .{ | ||
| 1143 | .llvm_name = null, | ||
| 1144 | .description = "Enable SPIR-V capability GroupNonUniformArithmetic", | ||
| 1145 | .dependencies = featureSet(&[_]Feature{ | ||
| 1146 | .v1_3, | ||
| 1147 | .GroupNonUniform, | ||
| 1148 | }), | ||
| 1149 | }; | ||
| 1150 | result[@intFromEnum(Feature.GroupNonUniformBallot)] = .{ | ||
| 1151 | .llvm_name = null, | ||
| 1152 | .description = "Enable SPIR-V capability GroupNonUniformBallot", | ||
| 1153 | .dependencies = featureSet(&[_]Feature{ | ||
| 1154 | .v1_3, | ||
| 1155 | .GroupNonUniform, | ||
| 1156 | }), | ||
| 1157 | }; | ||
| 1158 | result[@intFromEnum(Feature.GroupNonUniformShuffle)] = .{ | ||
| 1159 | .llvm_name = null, | ||
| 1160 | .description = "Enable SPIR-V capability GroupNonUniformShuffle", | ||
| 1161 | .dependencies = featureSet(&[_]Feature{ | ||
| 1162 | .v1_3, | ||
| 1163 | .GroupNonUniform, | ||
| 1164 | }), | ||
| 1165 | }; | ||
| 1166 | result[@intFromEnum(Feature.GroupNonUniformShuffleRelative)] = .{ | ||
| 1167 | .llvm_name = null, | ||
| 1168 | .description = "Enable SPIR-V capability GroupNonUniformShuffleRelative", | ||
| 1169 | .dependencies = featureSet(&[_]Feature{ | ||
| 1170 | .v1_3, | ||
| 1171 | .GroupNonUniform, | ||
| 1172 | }), | ||
| 1173 | }; | ||
| 1174 | result[@intFromEnum(Feature.GroupNonUniformClustered)] = .{ | ||
| 1175 | .llvm_name = null, | ||
| 1176 | .description = "Enable SPIR-V capability GroupNonUniformClustered", | ||
| 1177 | .dependencies = featureSet(&[_]Feature{ | ||
| 1178 | .v1_3, | ||
| 1179 | .GroupNonUniform, | ||
| 1180 | }), | ||
| 1181 | }; | ||
| 1182 | result[@intFromEnum(Feature.GroupNonUniformQuad)] = .{ | ||
| 1183 | .llvm_name = null, | ||
| 1184 | .description = "Enable SPIR-V capability GroupNonUniformQuad", | ||
| 1185 | .dependencies = featureSet(&[_]Feature{ | ||
| 1186 | .v1_3, | ||
| 1187 | .GroupNonUniform, | ||
| 1188 | }), | ||
| 1189 | }; | ||
| 1190 | result[@intFromEnum(Feature.ShaderLayer)] = .{ | ||
| 1191 | .llvm_name = null, | ||
| 1192 | .description = "Enable SPIR-V capability ShaderLayer", | ||
| 1193 | .dependencies = featureSet(&[_]Feature{ | ||
| 1194 | .v1_5, | ||
| 1195 | }), | ||
| 1196 | }; | ||
| 1197 | result[@intFromEnum(Feature.ShaderViewportIndex)] = .{ | ||
| 1198 | .llvm_name = null, | ||
| 1199 | .description = "Enable SPIR-V capability ShaderViewportIndex", | ||
| 1200 | .dependencies = featureSet(&[_]Feature{ | ||
| 1201 | .v1_5, | ||
| 1202 | }), | ||
| 1203 | }; | ||
| 1204 | result[@intFromEnum(Feature.FragmentShadingRateKHR)] = .{ | ||
| 1205 | .llvm_name = null, | ||
| 1206 | .description = "Enable SPIR-V capability FragmentShadingRateKHR", | ||
| 1207 | .dependencies = featureSet(&[_]Feature{ | ||
| 1208 | .Shader, | ||
| 1209 | }), | ||
| 1210 | }; | ||
| 1211 | result[@intFromEnum(Feature.SubgroupBallotKHR)] = .{ | ||
| 1212 | .llvm_name = null, | ||
| 1213 | .description = "Enable SPIR-V capability SubgroupBallotKHR", | ||
| 1214 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1215 | }; | ||
| 1216 | result[@intFromEnum(Feature.DrawParameters)] = .{ | ||
| 1217 | .llvm_name = null, | ||
| 1218 | .description = "Enable SPIR-V capability DrawParameters", | ||
| 1219 | .dependencies = featureSet(&[_]Feature{ | ||
| 1220 | .v1_3, | ||
| 1221 | .Shader, | ||
| 1222 | }), | ||
| 1223 | }; | ||
| 1224 | result[@intFromEnum(Feature.WorkgroupMemoryExplicitLayoutKHR)] = .{ | ||
| 1225 | .llvm_name = null, | ||
| 1226 | .description = "Enable SPIR-V capability WorkgroupMemoryExplicitLayoutKHR", | ||
| 1227 | .dependencies = featureSet(&[_]Feature{ | ||
| 1228 | .Shader, | ||
| 1229 | }), | ||
| 1230 | }; | ||
| 1231 | result[@intFromEnum(Feature.WorkgroupMemoryExplicitLayout8BitAccessKHR)] = .{ | ||
| 1232 | .llvm_name = null, | ||
| 1233 | .description = "Enable SPIR-V capability WorkgroupMemoryExplicitLayout8BitAccessKHR", | ||
| 1234 | .dependencies = featureSet(&[_]Feature{ | ||
| 1235 | .WorkgroupMemoryExplicitLayoutKHR, | ||
| 1236 | }), | ||
| 1237 | }; | ||
| 1238 | result[@intFromEnum(Feature.WorkgroupMemoryExplicitLayout16BitAccessKHR)] = .{ | ||
| 1239 | .llvm_name = null, | ||
| 1240 | .description = "Enable SPIR-V capability WorkgroupMemoryExplicitLayout16BitAccessKHR", | ||
| 1241 | .dependencies = featureSet(&[_]Feature{ | ||
| 1242 | .Shader, | ||
| 1243 | }), | ||
| 1244 | }; | ||
| 1245 | result[@intFromEnum(Feature.SubgroupVoteKHR)] = .{ | ||
| 1246 | .llvm_name = null, | ||
| 1247 | .description = "Enable SPIR-V capability SubgroupVoteKHR", | ||
| 1248 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1249 | }; | ||
| 1250 | result[@intFromEnum(Feature.StorageBuffer16BitAccess)] = .{ | ||
| 1251 | .llvm_name = null, | ||
| 1252 | .description = "Enable SPIR-V capability StorageBuffer16BitAccess", | ||
| 1253 | .dependencies = featureSet(&[_]Feature{ | ||
| 1254 | .v1_3, | ||
| 1255 | }), | ||
| 1256 | }; | ||
| 1257 | result[@intFromEnum(Feature.StorageUniformBufferBlock16)] = .{ | ||
| 1258 | .llvm_name = null, | ||
| 1259 | .description = "Enable SPIR-V capability StorageUniformBufferBlock16", | ||
| 1260 | .dependencies = featureSet(&[_]Feature{ | ||
| 1261 | .v1_3, | ||
| 1262 | }), | ||
| 1263 | }; | ||
| 1264 | result[@intFromEnum(Feature.UniformAndStorageBuffer16BitAccess)] = .{ | ||
| 1265 | .llvm_name = null, | ||
| 1266 | .description = "Enable SPIR-V capability UniformAndStorageBuffer16BitAccess", | ||
| 1267 | .dependencies = featureSet(&[_]Feature{ | ||
| 1268 | .v1_3, | ||
| 1269 | .StorageBuffer16BitAccess, | ||
| 1270 | .StorageUniformBufferBlock16, | ||
| 1271 | }), | ||
| 1272 | }; | ||
| 1273 | result[@intFromEnum(Feature.StorageUniform16)] = .{ | ||
| 1274 | .llvm_name = null, | ||
| 1275 | .description = "Enable SPIR-V capability StorageUniform16", | ||
| 1276 | .dependencies = featureSet(&[_]Feature{ | ||
| 1277 | .v1_3, | ||
| 1278 | .StorageBuffer16BitAccess, | ||
| 1279 | .StorageUniformBufferBlock16, | ||
| 1280 | }), | ||
| 1281 | }; | ||
| 1282 | result[@intFromEnum(Feature.StoragePushConstant16)] = .{ | ||
| 1283 | .llvm_name = null, | ||
| 1284 | .description = "Enable SPIR-V capability StoragePushConstant16", | ||
| 1285 | .dependencies = featureSet(&[_]Feature{ | ||
| 1286 | .v1_3, | ||
| 1287 | }), | ||
| 1288 | }; | ||
| 1289 | result[@intFromEnum(Feature.StorageInputOutput16)] = .{ | ||
| 1290 | .llvm_name = null, | ||
| 1291 | .description = "Enable SPIR-V capability StorageInputOutput16", | ||
| 1292 | .dependencies = featureSet(&[_]Feature{ | ||
| 1293 | .v1_3, | ||
| 1294 | }), | ||
| 1295 | }; | ||
| 1296 | result[@intFromEnum(Feature.DeviceGroup)] = .{ | ||
| 1297 | .llvm_name = null, | ||
| 1298 | .description = "Enable SPIR-V capability DeviceGroup", | ||
| 1299 | .dependencies = featureSet(&[_]Feature{ | ||
| 1300 | .v1_3, | ||
| 1301 | }), | ||
| 1302 | }; | ||
| 1303 | result[@intFromEnum(Feature.MultiView)] = .{ | ||
| 1304 | .llvm_name = null, | ||
| 1305 | .description = "Enable SPIR-V capability MultiView", | ||
| 1306 | .dependencies = featureSet(&[_]Feature{ | ||
| 1307 | .v1_3, | ||
| 1308 | .Shader, | ||
| 1309 | }), | ||
| 1310 | }; | ||
| 1311 | result[@intFromEnum(Feature.VariablePointersStorageBuffer)] = .{ | ||
| 1312 | .llvm_name = null, | ||
| 1313 | .description = "Enable SPIR-V capability VariablePointersStorageBuffer", | ||
| 1314 | .dependencies = featureSet(&[_]Feature{ | ||
| 1315 | .v1_3, | ||
| 1316 | .Shader, | ||
| 1317 | }), | ||
| 1318 | }; | ||
| 1319 | result[@intFromEnum(Feature.VariablePointers)] = .{ | ||
| 1320 | .llvm_name = null, | ||
| 1321 | .description = "Enable SPIR-V capability VariablePointers", | ||
| 1322 | .dependencies = featureSet(&[_]Feature{ | ||
| 1323 | .v1_3, | ||
| 1324 | .VariablePointersStorageBuffer, | ||
| 1325 | }), | ||
| 1326 | }; | ||
| 1327 | result[@intFromEnum(Feature.AtomicStorageOps)] = .{ | ||
| 1328 | .llvm_name = null, | ||
| 1329 | .description = "Enable SPIR-V capability AtomicStorageOps", | ||
| 1330 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1331 | }; | ||
| 1332 | result[@intFromEnum(Feature.SampleMaskPostDepthCoverage)] = .{ | ||
| 1333 | .llvm_name = null, | ||
| 1334 | .description = "Enable SPIR-V capability SampleMaskPostDepthCoverage", | ||
| 1335 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1336 | }; | ||
| 1337 | result[@intFromEnum(Feature.StorageBuffer8BitAccess)] = .{ | ||
| 1338 | .llvm_name = null, | ||
| 1339 | .description = "Enable SPIR-V capability StorageBuffer8BitAccess", | ||
| 1340 | .dependencies = featureSet(&[_]Feature{ | ||
| 1341 | .v1_5, | ||
| 1342 | }), | ||
| 1343 | }; | ||
| 1344 | result[@intFromEnum(Feature.UniformAndStorageBuffer8BitAccess)] = .{ | ||
| 1345 | .llvm_name = null, | ||
| 1346 | .description = "Enable SPIR-V capability UniformAndStorageBuffer8BitAccess", | ||
| 1347 | .dependencies = featureSet(&[_]Feature{ | ||
| 1348 | .v1_5, | ||
| 1349 | .StorageBuffer8BitAccess, | ||
| 1350 | }), | ||
| 1351 | }; | ||
| 1352 | result[@intFromEnum(Feature.StoragePushConstant8)] = .{ | ||
| 1353 | .llvm_name = null, | ||
| 1354 | .description = "Enable SPIR-V capability StoragePushConstant8", | ||
| 1355 | .dependencies = featureSet(&[_]Feature{ | ||
| 1356 | .v1_5, | ||
| 1357 | }), | ||
| 1358 | }; | ||
| 1359 | result[@intFromEnum(Feature.DenormPreserve)] = .{ | ||
| 1360 | .llvm_name = null, | ||
| 1361 | .description = "Enable SPIR-V capability DenormPreserve", | ||
| 1362 | .dependencies = featureSet(&[_]Feature{ | ||
| 1363 | .v1_4, | ||
| 1364 | }), | ||
| 1365 | }; | ||
| 1366 | result[@intFromEnum(Feature.DenormFlushToZero)] = .{ | ||
| 1367 | .llvm_name = null, | ||
| 1368 | .description = "Enable SPIR-V capability DenormFlushToZero", | ||
| 1369 | .dependencies = featureSet(&[_]Feature{ | ||
| 1370 | .v1_4, | ||
| 1371 | }), | ||
| 1372 | }; | ||
| 1373 | result[@intFromEnum(Feature.SignedZeroInfNanPreserve)] = .{ | ||
| 1374 | .llvm_name = null, | ||
| 1375 | .description = "Enable SPIR-V capability SignedZeroInfNanPreserve", | ||
| 1376 | .dependencies = featureSet(&[_]Feature{ | ||
| 1377 | .v1_4, | ||
| 1378 | }), | ||
| 1379 | }; | ||
| 1380 | result[@intFromEnum(Feature.RoundingModeRTE)] = .{ | ||
| 1381 | .llvm_name = null, | ||
| 1382 | .description = "Enable SPIR-V capability RoundingModeRTE", | ||
| 1383 | .dependencies = featureSet(&[_]Feature{ | ||
| 1384 | .v1_4, | ||
| 1385 | }), | ||
| 1386 | }; | ||
| 1387 | result[@intFromEnum(Feature.RoundingModeRTZ)] = .{ | ||
| 1388 | .llvm_name = null, | ||
| 1389 | .description = "Enable SPIR-V capability RoundingModeRTZ", | ||
| 1390 | .dependencies = featureSet(&[_]Feature{ | ||
| 1391 | .v1_4, | ||
| 1392 | }), | ||
| 1393 | }; | ||
| 1394 | result[@intFromEnum(Feature.RayQueryProvisionalKHR)] = .{ | ||
| 1395 | .llvm_name = null, | ||
| 1396 | .description = "Enable SPIR-V capability RayQueryProvisionalKHR", | ||
| 1397 | .dependencies = featureSet(&[_]Feature{ | ||
| 1398 | .Shader, | ||
| 1399 | }), | ||
| 1400 | }; | ||
| 1401 | result[@intFromEnum(Feature.RayQueryKHR)] = .{ | ||
| 1402 | .llvm_name = null, | ||
| 1403 | .description = "Enable SPIR-V capability RayQueryKHR", | ||
| 1404 | .dependencies = featureSet(&[_]Feature{ | ||
| 1405 | .Shader, | ||
| 1406 | }), | ||
| 1407 | }; | ||
| 1408 | result[@intFromEnum(Feature.RayTraversalPrimitiveCullingKHR)] = .{ | ||
| 1409 | .llvm_name = null, | ||
| 1410 | .description = "Enable SPIR-V capability RayTraversalPrimitiveCullingKHR", | ||
| 1411 | .dependencies = featureSet(&[_]Feature{ | ||
| 1412 | .RayQueryKHR, | ||
| 1413 | .RayTracingKHR, | ||
| 1414 | }), | ||
| 1415 | }; | ||
| 1416 | result[@intFromEnum(Feature.RayTracingKHR)] = .{ | ||
| 1417 | .llvm_name = null, | ||
| 1418 | .description = "Enable SPIR-V capability RayTracingKHR", | ||
| 1419 | .dependencies = featureSet(&[_]Feature{ | ||
| 1420 | .Shader, | ||
| 1421 | }), | ||
| 1422 | }; | ||
| 1423 | result[@intFromEnum(Feature.Float16ImageAMD)] = .{ | ||
| 1424 | .llvm_name = null, | ||
| 1425 | .description = "Enable SPIR-V capability Float16ImageAMD", | ||
| 1426 | .dependencies = featureSet(&[_]Feature{ | ||
| 1427 | .Shader, | ||
| 1428 | }), | ||
| 1429 | }; | ||
| 1430 | result[@intFromEnum(Feature.ImageGatherBiasLodAMD)] = .{ | ||
| 1431 | .llvm_name = null, | ||
| 1432 | .description = "Enable SPIR-V capability ImageGatherBiasLodAMD", | ||
| 1433 | .dependencies = featureSet(&[_]Feature{ | ||
| 1434 | .Shader, | ||
| 1435 | }), | ||
| 1436 | }; | ||
| 1437 | result[@intFromEnum(Feature.FragmentMaskAMD)] = .{ | ||
| 1438 | .llvm_name = null, | ||
| 1439 | .description = "Enable SPIR-V capability FragmentMaskAMD", | ||
| 1440 | .dependencies = featureSet(&[_]Feature{ | ||
| 1441 | .Shader, | ||
| 1442 | }), | ||
| 1443 | }; | ||
| 1444 | result[@intFromEnum(Feature.StencilExportEXT)] = .{ | ||
| 1445 | .llvm_name = null, | ||
| 1446 | .description = "Enable SPIR-V capability StencilExportEXT", | ||
| 1447 | .dependencies = featureSet(&[_]Feature{ | ||
| 1448 | .Shader, | ||
| 1449 | }), | ||
| 1450 | }; | ||
| 1451 | result[@intFromEnum(Feature.ImageReadWriteLodAMD)] = .{ | ||
| 1452 | .llvm_name = null, | ||
| 1453 | .description = "Enable SPIR-V capability ImageReadWriteLodAMD", | ||
| 1454 | .dependencies = featureSet(&[_]Feature{ | ||
| 1455 | .Shader, | ||
| 1456 | }), | ||
| 1457 | }; | ||
| 1458 | result[@intFromEnum(Feature.Int64ImageEXT)] = .{ | ||
| 1459 | .llvm_name = null, | ||
| 1460 | .description = "Enable SPIR-V capability Int64ImageEXT", | ||
| 1461 | .dependencies = featureSet(&[_]Feature{ | ||
| 1462 | .Shader, | ||
| 1463 | }), | ||
| 1464 | }; | ||
| 1465 | result[@intFromEnum(Feature.ShaderClockKHR)] = .{ | ||
| 1466 | .llvm_name = null, | ||
| 1467 | .description = "Enable SPIR-V capability ShaderClockKHR", | ||
| 1468 | .dependencies = featureSet(&[_]Feature{ | ||
| 1469 | .Shader, | ||
| 1470 | }), | ||
| 1471 | }; | ||
| 1472 | result[@intFromEnum(Feature.SampleMaskOverrideCoverageNV)] = .{ | ||
| 1473 | .llvm_name = null, | ||
| 1474 | .description = "Enable SPIR-V capability SampleMaskOverrideCoverageNV", | ||
| 1475 | .dependencies = featureSet(&[_]Feature{ | ||
| 1476 | .SampleRateShading, | ||
| 1477 | }), | ||
| 1478 | }; | ||
| 1479 | result[@intFromEnum(Feature.GeometryShaderPassthroughNV)] = .{ | ||
| 1480 | .llvm_name = null, | ||
| 1481 | .description = "Enable SPIR-V capability GeometryShaderPassthroughNV", | ||
| 1482 | .dependencies = featureSet(&[_]Feature{ | ||
| 1483 | .Geometry, | ||
| 1484 | }), | ||
| 1485 | }; | ||
| 1486 | result[@intFromEnum(Feature.ShaderViewportIndexLayerEXT)] = .{ | ||
| 1487 | .llvm_name = null, | ||
| 1488 | .description = "Enable SPIR-V capability ShaderViewportIndexLayerEXT", | ||
| 1489 | .dependencies = featureSet(&[_]Feature{ | ||
| 1490 | .MultiViewport, | ||
| 1491 | }), | ||
| 1492 | }; | ||
| 1493 | result[@intFromEnum(Feature.ShaderViewportIndexLayerNV)] = .{ | ||
| 1494 | .llvm_name = null, | ||
| 1495 | .description = "Enable SPIR-V capability ShaderViewportIndexLayerNV", | ||
| 1496 | .dependencies = featureSet(&[_]Feature{ | ||
| 1497 | .MultiViewport, | ||
| 1498 | }), | ||
| 1499 | }; | ||
| 1500 | result[@intFromEnum(Feature.ShaderViewportMaskNV)] = .{ | ||
| 1501 | .llvm_name = null, | ||
| 1502 | .description = "Enable SPIR-V capability ShaderViewportMaskNV", | ||
| 1503 | .dependencies = featureSet(&[_]Feature{ | ||
| 1504 | .ShaderViewportIndexLayerNV, | ||
| 1505 | }), | ||
| 1506 | }; | ||
| 1507 | result[@intFromEnum(Feature.ShaderStereoViewNV)] = .{ | ||
| 1508 | .llvm_name = null, | ||
| 1509 | .description = "Enable SPIR-V capability ShaderStereoViewNV", | ||
| 1510 | .dependencies = featureSet(&[_]Feature{ | ||
| 1511 | .ShaderViewportMaskNV, | ||
| 1512 | }), | ||
| 1513 | }; | ||
| 1514 | result[@intFromEnum(Feature.PerViewAttributesNV)] = .{ | ||
| 1515 | .llvm_name = null, | ||
| 1516 | .description = "Enable SPIR-V capability PerViewAttributesNV", | ||
| 1517 | .dependencies = featureSet(&[_]Feature{ | ||
| 1518 | .MultiView, | ||
| 1519 | }), | ||
| 1520 | }; | ||
| 1521 | result[@intFromEnum(Feature.FragmentFullyCoveredEXT)] = .{ | ||
| 1522 | .llvm_name = null, | ||
| 1523 | .description = "Enable SPIR-V capability FragmentFullyCoveredEXT", | ||
| 1524 | .dependencies = featureSet(&[_]Feature{ | ||
| 1525 | .Shader, | ||
| 1526 | }), | ||
| 1527 | }; | ||
| 1528 | result[@intFromEnum(Feature.MeshShadingNV)] = .{ | ||
| 1529 | .llvm_name = null, | ||
| 1530 | .description = "Enable SPIR-V capability MeshShadingNV", | ||
| 1531 | .dependencies = featureSet(&[_]Feature{ | ||
| 1532 | .Shader, | ||
| 1533 | }), | ||
| 1534 | }; | ||
| 1535 | result[@intFromEnum(Feature.ImageFootprintNV)] = .{ | ||
| 1536 | .llvm_name = null, | ||
| 1537 | .description = "Enable SPIR-V capability ImageFootprintNV", | ||
| 1538 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1539 | }; | ||
| 1540 | result[@intFromEnum(Feature.FragmentBarycentricNV)] = .{ | ||
| 1541 | .llvm_name = null, | ||
| 1542 | .description = "Enable SPIR-V capability FragmentBarycentricNV", | ||
| 1543 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1544 | }; | ||
| 1545 | result[@intFromEnum(Feature.ComputeDerivativeGroupQuadsNV)] = .{ | ||
| 1546 | .llvm_name = null, | ||
| 1547 | .description = "Enable SPIR-V capability ComputeDerivativeGroupQuadsNV", | ||
| 1548 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1549 | }; | ||
| 1550 | result[@intFromEnum(Feature.FragmentDensityEXT)] = .{ | ||
| 1551 | .llvm_name = null, | ||
| 1552 | .description = "Enable SPIR-V capability FragmentDensityEXT", | ||
| 1553 | .dependencies = featureSet(&[_]Feature{ | ||
| 1554 | .Shader, | ||
| 1555 | }), | ||
| 1556 | }; | ||
| 1557 | result[@intFromEnum(Feature.ShadingRateNV)] = .{ | ||
| 1558 | .llvm_name = null, | ||
| 1559 | .description = "Enable SPIR-V capability ShadingRateNV", | ||
| 1560 | .dependencies = featureSet(&[_]Feature{ | ||
| 1561 | .Shader, | ||
| 1562 | }), | ||
| 1563 | }; | ||
| 1564 | result[@intFromEnum(Feature.GroupNonUniformPartitionedNV)] = .{ | ||
| 1565 | .llvm_name = null, | ||
| 1566 | .description = "Enable SPIR-V capability GroupNonUniformPartitionedNV", | ||
| 1567 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1568 | }; | ||
| 1569 | result[@intFromEnum(Feature.ShaderNonUniform)] = .{ | ||
| 1570 | .llvm_name = null, | ||
| 1571 | .description = "Enable SPIR-V capability ShaderNonUniform", | ||
| 1572 | .dependencies = featureSet(&[_]Feature{ | ||
| 1573 | .v1_5, | ||
| 1574 | .Shader, | ||
| 1575 | }), | ||
| 1576 | }; | ||
| 1577 | result[@intFromEnum(Feature.ShaderNonUniformEXT)] = .{ | ||
| 1578 | .llvm_name = null, | ||
| 1579 | .description = "Enable SPIR-V capability ShaderNonUniformEXT", | ||
| 1580 | .dependencies = featureSet(&[_]Feature{ | ||
| 1581 | .v1_5, | ||
| 1582 | .Shader, | ||
| 1583 | }), | ||
| 1584 | }; | ||
| 1585 | result[@intFromEnum(Feature.RuntimeDescriptorArray)] = .{ | ||
| 1586 | .llvm_name = null, | ||
| 1587 | .description = "Enable SPIR-V capability RuntimeDescriptorArray", | ||
| 1588 | .dependencies = featureSet(&[_]Feature{ | ||
| 1589 | .v1_5, | ||
| 1590 | .Shader, | ||
| 1591 | }), | ||
| 1592 | }; | ||
| 1593 | result[@intFromEnum(Feature.RuntimeDescriptorArrayEXT)] = .{ | ||
| 1594 | .llvm_name = null, | ||
| 1595 | .description = "Enable SPIR-V capability RuntimeDescriptorArrayEXT", | ||
| 1596 | .dependencies = featureSet(&[_]Feature{ | ||
| 1597 | .v1_5, | ||
| 1598 | .Shader, | ||
| 1599 | }), | ||
| 1600 | }; | ||
| 1601 | result[@intFromEnum(Feature.InputAttachmentArrayDynamicIndexing)] = .{ | ||
| 1602 | .llvm_name = null, | ||
| 1603 | .description = "Enable SPIR-V capability InputAttachmentArrayDynamicIndexing", | ||
| 1604 | .dependencies = featureSet(&[_]Feature{ | ||
| 1605 | .v1_5, | ||
| 1606 | .InputAttachment, | ||
| 1607 | }), | ||
| 1608 | }; | ||
| 1609 | result[@intFromEnum(Feature.InputAttachmentArrayDynamicIndexingEXT)] = .{ | ||
| 1610 | .llvm_name = null, | ||
| 1611 | .description = "Enable SPIR-V capability InputAttachmentArrayDynamicIndexingEXT", | ||
| 1612 | .dependencies = featureSet(&[_]Feature{ | ||
| 1613 | .v1_5, | ||
| 1614 | .InputAttachment, | ||
| 1615 | }), | ||
| 1616 | }; | ||
| 1617 | result[@intFromEnum(Feature.UniformTexelBufferArrayDynamicIndexing)] = .{ | ||
| 1618 | .llvm_name = null, | ||
| 1619 | .description = "Enable SPIR-V capability UniformTexelBufferArrayDynamicIndexing", | ||
| 1620 | .dependencies = featureSet(&[_]Feature{ | ||
| 1621 | .v1_5, | ||
| 1622 | .SampledBuffer, | ||
| 1623 | }), | ||
| 1624 | }; | ||
| 1625 | result[@intFromEnum(Feature.UniformTexelBufferArrayDynamicIndexingEXT)] = .{ | ||
| 1626 | .llvm_name = null, | ||
| 1627 | .description = "Enable SPIR-V capability UniformTexelBufferArrayDynamicIndexingEXT", | ||
| 1628 | .dependencies = featureSet(&[_]Feature{ | ||
| 1629 | .v1_5, | ||
| 1630 | .SampledBuffer, | ||
| 1631 | }), | ||
| 1632 | }; | ||
| 1633 | result[@intFromEnum(Feature.StorageTexelBufferArrayDynamicIndexing)] = .{ | ||
| 1634 | .llvm_name = null, | ||
| 1635 | .description = "Enable SPIR-V capability StorageTexelBufferArrayDynamicIndexing", | ||
| 1636 | .dependencies = featureSet(&[_]Feature{ | ||
| 1637 | .v1_5, | ||
| 1638 | .ImageBuffer, | ||
| 1639 | }), | ||
| 1640 | }; | ||
| 1641 | result[@intFromEnum(Feature.StorageTexelBufferArrayDynamicIndexingEXT)] = .{ | ||
| 1642 | .llvm_name = null, | ||
| 1643 | .description = "Enable SPIR-V capability StorageTexelBufferArrayDynamicIndexingEXT", | ||
| 1644 | .dependencies = featureSet(&[_]Feature{ | ||
| 1645 | .v1_5, | ||
| 1646 | .ImageBuffer, | ||
| 1647 | }), | ||
| 1648 | }; | ||
| 1649 | result[@intFromEnum(Feature.UniformBufferArrayNonUniformIndexing)] = .{ | ||
| 1650 | .llvm_name = null, | ||
| 1651 | .description = "Enable SPIR-V capability UniformBufferArrayNonUniformIndexing", | ||
| 1652 | .dependencies = featureSet(&[_]Feature{ | ||
| 1653 | .v1_5, | ||
| 1654 | .ShaderNonUniform, | ||
| 1655 | }), | ||
| 1656 | }; | ||
| 1657 | result[@intFromEnum(Feature.UniformBufferArrayNonUniformIndexingEXT)] = .{ | ||
| 1658 | .llvm_name = null, | ||
| 1659 | .description = "Enable SPIR-V capability UniformBufferArrayNonUniformIndexingEXT", | ||
| 1660 | .dependencies = featureSet(&[_]Feature{ | ||
| 1661 | .v1_5, | ||
| 1662 | .ShaderNonUniform, | ||
| 1663 | }), | ||
| 1664 | }; | ||
| 1665 | result[@intFromEnum(Feature.SampledImageArrayNonUniformIndexing)] = .{ | ||
| 1666 | .llvm_name = null, | ||
| 1667 | .description = "Enable SPIR-V capability SampledImageArrayNonUniformIndexing", | ||
| 1668 | .dependencies = featureSet(&[_]Feature{ | ||
| 1669 | .v1_5, | ||
| 1670 | .ShaderNonUniform, | ||
| 1671 | }), | ||
| 1672 | }; | ||
| 1673 | result[@intFromEnum(Feature.SampledImageArrayNonUniformIndexingEXT)] = .{ | ||
| 1674 | .llvm_name = null, | ||
| 1675 | .description = "Enable SPIR-V capability SampledImageArrayNonUniformIndexingEXT", | ||
| 1676 | .dependencies = featureSet(&[_]Feature{ | ||
| 1677 | .v1_5, | ||
| 1678 | .ShaderNonUniform, | ||
| 1679 | }), | ||
| 1680 | }; | ||
| 1681 | result[@intFromEnum(Feature.StorageBufferArrayNonUniformIndexing)] = .{ | ||
| 1682 | .llvm_name = null, | ||
| 1683 | .description = "Enable SPIR-V capability StorageBufferArrayNonUniformIndexing", | ||
| 1684 | .dependencies = featureSet(&[_]Feature{ | ||
| 1685 | .v1_5, | ||
| 1686 | .ShaderNonUniform, | ||
| 1687 | }), | ||
| 1688 | }; | ||
| 1689 | result[@intFromEnum(Feature.StorageBufferArrayNonUniformIndexingEXT)] = .{ | ||
| 1690 | .llvm_name = null, | ||
| 1691 | .description = "Enable SPIR-V capability StorageBufferArrayNonUniformIndexingEXT", | ||
| 1692 | .dependencies = featureSet(&[_]Feature{ | ||
| 1693 | .v1_5, | ||
| 1694 | .ShaderNonUniform, | ||
| 1695 | }), | ||
| 1696 | }; | ||
| 1697 | result[@intFromEnum(Feature.StorageImageArrayNonUniformIndexing)] = .{ | ||
| 1698 | .llvm_name = null, | ||
| 1699 | .description = "Enable SPIR-V capability StorageImageArrayNonUniformIndexing", | ||
| 1700 | .dependencies = featureSet(&[_]Feature{ | ||
| 1701 | .v1_5, | ||
| 1702 | .ShaderNonUniform, | ||
| 1703 | }), | ||
| 1704 | }; | ||
| 1705 | result[@intFromEnum(Feature.StorageImageArrayNonUniformIndexingEXT)] = .{ | ||
| 1706 | .llvm_name = null, | ||
| 1707 | .description = "Enable SPIR-V capability StorageImageArrayNonUniformIndexingEXT", | ||
| 1708 | .dependencies = featureSet(&[_]Feature{ | ||
| 1709 | .v1_5, | ||
| 1710 | .ShaderNonUniform, | ||
| 1711 | }), | ||
| 1712 | }; | ||
| 1713 | result[@intFromEnum(Feature.InputAttachmentArrayNonUniformIndexing)] = .{ | ||
| 1714 | .llvm_name = null, | ||
| 1715 | .description = "Enable SPIR-V capability InputAttachmentArrayNonUniformIndexing", | ||
| 1716 | .dependencies = featureSet(&[_]Feature{ | ||
| 1717 | .v1_5, | ||
| 1718 | .InputAttachment, | ||
| 1719 | .ShaderNonUniform, | ||
| 1720 | }), | ||
| 1721 | }; | ||
| 1722 | result[@intFromEnum(Feature.InputAttachmentArrayNonUniformIndexingEXT)] = .{ | ||
| 1723 | .llvm_name = null, | ||
| 1724 | .description = "Enable SPIR-V capability InputAttachmentArrayNonUniformIndexingEXT", | ||
| 1725 | .dependencies = featureSet(&[_]Feature{ | ||
| 1726 | .v1_5, | ||
| 1727 | .InputAttachment, | ||
| 1728 | .ShaderNonUniform, | ||
| 1729 | }), | ||
| 1730 | }; | ||
| 1731 | result[@intFromEnum(Feature.UniformTexelBufferArrayNonUniformIndexing)] = .{ | ||
| 1732 | .llvm_name = null, | ||
| 1733 | .description = "Enable SPIR-V capability UniformTexelBufferArrayNonUniformIndexing", | ||
| 1734 | .dependencies = featureSet(&[_]Feature{ | ||
| 1735 | .v1_5, | ||
| 1736 | .SampledBuffer, | ||
| 1737 | .ShaderNonUniform, | ||
| 1738 | }), | ||
| 1739 | }; | ||
| 1740 | result[@intFromEnum(Feature.UniformTexelBufferArrayNonUniformIndexingEXT)] = .{ | ||
| 1741 | .llvm_name = null, | ||
| 1742 | .description = "Enable SPIR-V capability UniformTexelBufferArrayNonUniformIndexingEXT", | ||
| 1743 | .dependencies = featureSet(&[_]Feature{ | ||
| 1744 | .v1_5, | ||
| 1745 | .SampledBuffer, | ||
| 1746 | .ShaderNonUniform, | ||
| 1747 | }), | ||
| 1748 | }; | ||
| 1749 | result[@intFromEnum(Feature.StorageTexelBufferArrayNonUniformIndexing)] = .{ | ||
| 1750 | .llvm_name = null, | ||
| 1751 | .description = "Enable SPIR-V capability StorageTexelBufferArrayNonUniformIndexing", | ||
| 1752 | .dependencies = featureSet(&[_]Feature{ | ||
| 1753 | .v1_5, | ||
| 1754 | .ImageBuffer, | ||
| 1755 | .ShaderNonUniform, | ||
| 1756 | }), | ||
| 1757 | }; | ||
| 1758 | result[@intFromEnum(Feature.StorageTexelBufferArrayNonUniformIndexingEXT)] = .{ | ||
| 1759 | .llvm_name = null, | ||
| 1760 | .description = "Enable SPIR-V capability StorageTexelBufferArrayNonUniformIndexingEXT", | ||
| 1761 | .dependencies = featureSet(&[_]Feature{ | ||
| 1762 | .v1_5, | ||
| 1763 | .ImageBuffer, | ||
| 1764 | .ShaderNonUniform, | ||
| 1765 | }), | ||
| 1766 | }; | ||
| 1767 | result[@intFromEnum(Feature.RayTracingNV)] = .{ | ||
| 1768 | .llvm_name = null, | ||
| 1769 | .description = "Enable SPIR-V capability RayTracingNV", | ||
| 1770 | .dependencies = featureSet(&[_]Feature{ | ||
| 1771 | .Shader, | ||
| 1772 | }), | ||
| 1773 | }; | ||
| 1774 | result[@intFromEnum(Feature.VulkanMemoryModel)] = .{ | ||
| 1775 | .llvm_name = null, | ||
| 1776 | .description = "Enable SPIR-V capability VulkanMemoryModel", | ||
| 1777 | .dependencies = featureSet(&[_]Feature{ | ||
| 1778 | .v1_5, | ||
| 1779 | }), | ||
| 1780 | }; | ||
| 1781 | result[@intFromEnum(Feature.VulkanMemoryModelKHR)] = .{ | ||
| 1782 | .llvm_name = null, | ||
| 1783 | .description = "Enable SPIR-V capability VulkanMemoryModelKHR", | ||
| 1784 | .dependencies = featureSet(&[_]Feature{ | ||
| 1785 | .v1_5, | ||
| 1786 | }), | ||
| 1787 | }; | ||
| 1788 | result[@intFromEnum(Feature.VulkanMemoryModelDeviceScope)] = .{ | ||
| 1789 | .llvm_name = null, | ||
| 1790 | .description = "Enable SPIR-V capability VulkanMemoryModelDeviceScope", | ||
| 1791 | .dependencies = featureSet(&[_]Feature{ | ||
| 1792 | .v1_5, | ||
| 1793 | }), | ||
| 1794 | }; | ||
| 1795 | result[@intFromEnum(Feature.VulkanMemoryModelDeviceScopeKHR)] = .{ | ||
| 1796 | .llvm_name = null, | ||
| 1797 | .description = "Enable SPIR-V capability VulkanMemoryModelDeviceScopeKHR", | ||
| 1798 | .dependencies = featureSet(&[_]Feature{ | ||
| 1799 | .v1_5, | ||
| 1800 | }), | ||
| 1801 | }; | ||
| 1802 | result[@intFromEnum(Feature.PhysicalStorageBufferAddresses)] = .{ | ||
| 1803 | .llvm_name = null, | ||
| 1804 | .description = "Enable SPIR-V capability PhysicalStorageBufferAddresses", | ||
| 1805 | .dependencies = featureSet(&[_]Feature{ | ||
| 1806 | .v1_5, | ||
| 1807 | .Shader, | ||
| 1808 | }), | ||
| 1809 | }; | ||
| 1810 | result[@intFromEnum(Feature.PhysicalStorageBufferAddressesEXT)] = .{ | ||
| 1811 | .llvm_name = null, | ||
| 1812 | .description = "Enable SPIR-V capability PhysicalStorageBufferAddressesEXT", | ||
| 1813 | .dependencies = featureSet(&[_]Feature{ | ||
| 1814 | .v1_5, | ||
| 1815 | .Shader, | ||
| 1816 | }), | ||
| 1817 | }; | ||
| 1818 | result[@intFromEnum(Feature.ComputeDerivativeGroupLinearNV)] = .{ | ||
| 1819 | .llvm_name = null, | ||
| 1820 | .description = "Enable SPIR-V capability ComputeDerivativeGroupLinearNV", | ||
| 1821 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1822 | }; | ||
| 1823 | result[@intFromEnum(Feature.RayTracingProvisionalKHR)] = .{ | ||
| 1824 | .llvm_name = null, | ||
| 1825 | .description = "Enable SPIR-V capability RayTracingProvisionalKHR", | ||
| 1826 | .dependencies = featureSet(&[_]Feature{ | ||
| 1827 | .Shader, | ||
| 1828 | }), | ||
| 1829 | }; | ||
| 1830 | result[@intFromEnum(Feature.CooperativeMatrixNV)] = .{ | ||
| 1831 | .llvm_name = null, | ||
| 1832 | .description = "Enable SPIR-V capability CooperativeMatrixNV", | ||
| 1833 | .dependencies = featureSet(&[_]Feature{ | ||
| 1834 | .Shader, | ||
| 1835 | }), | ||
| 1836 | }; | ||
| 1837 | result[@intFromEnum(Feature.FragmentShaderSampleInterlockEXT)] = .{ | ||
| 1838 | .llvm_name = null, | ||
| 1839 | .description = "Enable SPIR-V capability FragmentShaderSampleInterlockEXT", | ||
| 1840 | .dependencies = featureSet(&[_]Feature{ | ||
| 1841 | .Shader, | ||
| 1842 | }), | ||
| 1843 | }; | ||
| 1844 | result[@intFromEnum(Feature.FragmentShaderShadingRateInterlockEXT)] = .{ | ||
| 1845 | .llvm_name = null, | ||
| 1846 | .description = "Enable SPIR-V capability FragmentShaderShadingRateInterlockEXT", | ||
| 1847 | .dependencies = featureSet(&[_]Feature{ | ||
| 1848 | .Shader, | ||
| 1849 | }), | ||
| 1850 | }; | ||
| 1851 | result[@intFromEnum(Feature.ShaderSMBuiltinsNV)] = .{ | ||
| 1852 | .llvm_name = null, | ||
| 1853 | .description = "Enable SPIR-V capability ShaderSMBuiltinsNV", | ||
| 1854 | .dependencies = featureSet(&[_]Feature{ | ||
| 1855 | .Shader, | ||
| 1856 | }), | ||
| 1857 | }; | ||
| 1858 | result[@intFromEnum(Feature.FragmentShaderPixelInterlockEXT)] = .{ | ||
| 1859 | .llvm_name = null, | ||
| 1860 | .description = "Enable SPIR-V capability FragmentShaderPixelInterlockEXT", | ||
| 1861 | .dependencies = featureSet(&[_]Feature{ | ||
| 1862 | .Shader, | ||
| 1863 | }), | ||
| 1864 | }; | ||
| 1865 | result[@intFromEnum(Feature.DemoteToHelperInvocationEXT)] = .{ | ||
| 1866 | .llvm_name = null, | ||
| 1867 | .description = "Enable SPIR-V capability DemoteToHelperInvocationEXT", | ||
| 1868 | .dependencies = featureSet(&[_]Feature{ | ||
| 1869 | .Shader, | ||
| 1870 | }), | ||
| 1871 | }; | ||
| 1872 | result[@intFromEnum(Feature.SubgroupShuffleINTEL)] = .{ | ||
| 1873 | .llvm_name = null, | ||
| 1874 | .description = "Enable SPIR-V capability SubgroupShuffleINTEL", | ||
| 1875 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1876 | }; | ||
| 1877 | result[@intFromEnum(Feature.SubgroupBufferBlockIOINTEL)] = .{ | ||
| 1878 | .llvm_name = null, | ||
| 1879 | .description = "Enable SPIR-V capability SubgroupBufferBlockIOINTEL", | ||
| 1880 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1881 | }; | ||
| 1882 | result[@intFromEnum(Feature.SubgroupImageBlockIOINTEL)] = .{ | ||
| 1883 | .llvm_name = null, | ||
| 1884 | .description = "Enable SPIR-V capability SubgroupImageBlockIOINTEL", | ||
| 1885 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1886 | }; | ||
| 1887 | result[@intFromEnum(Feature.SubgroupImageMediaBlockIOINTEL)] = .{ | ||
| 1888 | .llvm_name = null, | ||
| 1889 | .description = "Enable SPIR-V capability SubgroupImageMediaBlockIOINTEL", | ||
| 1890 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1891 | }; | ||
| 1892 | result[@intFromEnum(Feature.RoundToInfinityINTEL)] = .{ | ||
| 1893 | .llvm_name = null, | ||
| 1894 | .description = "Enable SPIR-V capability RoundToInfinityINTEL", | ||
| 1895 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1896 | }; | ||
| 1897 | result[@intFromEnum(Feature.FloatingPointModeINTEL)] = .{ | ||
| 1898 | .llvm_name = null, | ||
| 1899 | .description = "Enable SPIR-V capability FloatingPointModeINTEL", | ||
| 1900 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1901 | }; | ||
| 1902 | result[@intFromEnum(Feature.IntegerFunctions2INTEL)] = .{ | ||
| 1903 | .llvm_name = null, | ||
| 1904 | .description = "Enable SPIR-V capability IntegerFunctions2INTEL", | ||
| 1905 | .dependencies = featureSet(&[_]Feature{ | ||
| 1906 | .Shader, | ||
| 1907 | }), | ||
| 1908 | }; | ||
| 1909 | result[@intFromEnum(Feature.FunctionPointersINTEL)] = .{ | ||
| 1910 | .llvm_name = null, | ||
| 1911 | .description = "Enable SPIR-V capability FunctionPointersINTEL", | ||
| 1912 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1913 | }; | ||
| 1914 | result[@intFromEnum(Feature.IndirectReferencesINTEL)] = .{ | ||
| 1915 | .llvm_name = null, | ||
| 1916 | .description = "Enable SPIR-V capability IndirectReferencesINTEL", | ||
| 1917 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1918 | }; | ||
| 1919 | result[@intFromEnum(Feature.AsmINTEL)] = .{ | ||
| 1920 | .llvm_name = null, | ||
| 1921 | .description = "Enable SPIR-V capability AsmINTEL", | ||
| 1922 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1923 | }; | ||
| 1924 | result[@intFromEnum(Feature.AtomicFloat32MinMaxEXT)] = .{ | ||
| 1925 | .llvm_name = null, | ||
| 1926 | .description = "Enable SPIR-V capability AtomicFloat32MinMaxEXT", | ||
| 1927 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1928 | }; | ||
| 1929 | result[@intFromEnum(Feature.AtomicFloat64MinMaxEXT)] = .{ | ||
| 1930 | .llvm_name = null, | ||
| 1931 | .description = "Enable SPIR-V capability AtomicFloat64MinMaxEXT", | ||
| 1932 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1933 | }; | ||
| 1934 | result[@intFromEnum(Feature.AtomicFloat16MinMaxEXT)] = .{ | ||
| 1935 | .llvm_name = null, | ||
| 1936 | .description = "Enable SPIR-V capability AtomicFloat16MinMaxEXT", | ||
| 1937 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1938 | }; | ||
| 1939 | result[@intFromEnum(Feature.VectorComputeINTEL)] = .{ | ||
| 1940 | .llvm_name = null, | ||
| 1941 | .description = "Enable SPIR-V capability VectorComputeINTEL", | ||
| 1942 | .dependencies = featureSet(&[_]Feature{ | ||
| 1943 | .VectorAnyINTEL, | ||
| 1944 | }), | ||
| 1945 | }; | ||
| 1946 | result[@intFromEnum(Feature.VectorAnyINTEL)] = .{ | ||
| 1947 | .llvm_name = null, | ||
| 1948 | .description = "Enable SPIR-V capability VectorAnyINTEL", | ||
| 1949 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1950 | }; | ||
| 1951 | result[@intFromEnum(Feature.ExpectAssumeKHR)] = .{ | ||
| 1952 | .llvm_name = null, | ||
| 1953 | .description = "Enable SPIR-V capability ExpectAssumeKHR", | ||
| 1954 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1955 | }; | ||
| 1956 | result[@intFromEnum(Feature.SubgroupAvcMotionEstimationINTEL)] = .{ | ||
| 1957 | .llvm_name = null, | ||
| 1958 | .description = "Enable SPIR-V capability SubgroupAvcMotionEstimationINTEL", | ||
| 1959 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1960 | }; | ||
| 1961 | result[@intFromEnum(Feature.SubgroupAvcMotionEstimationIntraINTEL)] = .{ | ||
| 1962 | .llvm_name = null, | ||
| 1963 | .description = "Enable SPIR-V capability SubgroupAvcMotionEstimationIntraINTEL", | ||
| 1964 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1965 | }; | ||
| 1966 | result[@intFromEnum(Feature.SubgroupAvcMotionEstimationChromaINTEL)] = .{ | ||
| 1967 | .llvm_name = null, | ||
| 1968 | .description = "Enable SPIR-V capability SubgroupAvcMotionEstimationChromaINTEL", | ||
| 1969 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1970 | }; | ||
| 1971 | result[@intFromEnum(Feature.VariableLengthArrayINTEL)] = .{ | ||
| 1972 | .llvm_name = null, | ||
| 1973 | .description = "Enable SPIR-V capability VariableLengthArrayINTEL", | ||
| 1974 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1975 | }; | ||
| 1976 | result[@intFromEnum(Feature.FunctionFloatControlINTEL)] = .{ | ||
| 1977 | .llvm_name = null, | ||
| 1978 | .description = "Enable SPIR-V capability FunctionFloatControlINTEL", | ||
| 1979 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1980 | }; | ||
| 1981 | result[@intFromEnum(Feature.FPGAMemoryAttributesINTEL)] = .{ | ||
| 1982 | .llvm_name = null, | ||
| 1983 | .description = "Enable SPIR-V capability FPGAMemoryAttributesINTEL", | ||
| 1984 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1985 | }; | ||
| 1986 | result[@intFromEnum(Feature.FPFastMathModeINTEL)] = .{ | ||
| 1987 | .llvm_name = null, | ||
| 1988 | .description = "Enable SPIR-V capability FPFastMathModeINTEL", | ||
| 1989 | .dependencies = featureSet(&[_]Feature{ | ||
| 1990 | .Kernel, | ||
| 1991 | }), | ||
| 1992 | }; | ||
| 1993 | result[@intFromEnum(Feature.ArbitraryPrecisionIntegersINTEL)] = .{ | ||
| 1994 | .llvm_name = null, | ||
| 1995 | .description = "Enable SPIR-V capability ArbitraryPrecisionIntegersINTEL", | ||
| 1996 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1997 | }; | ||
| 1998 | result[@intFromEnum(Feature.UnstructuredLoopControlsINTEL)] = .{ | ||
| 1999 | .llvm_name = null, | ||
| 2000 | .description = "Enable SPIR-V capability UnstructuredLoopControlsINTEL", | ||
| 2001 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2002 | }; | ||
| 2003 | result[@intFromEnum(Feature.FPGALoopControlsINTEL)] = .{ | ||
| 2004 | .llvm_name = null, | ||
| 2005 | .description = "Enable SPIR-V capability FPGALoopControlsINTEL", | ||
| 2006 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2007 | }; | ||
| 2008 | result[@intFromEnum(Feature.KernelAttributesINTEL)] = .{ | ||
| 2009 | .llvm_name = null, | ||
| 2010 | .description = "Enable SPIR-V capability KernelAttributesINTEL", | ||
| 2011 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2012 | }; | ||
| 2013 | result[@intFromEnum(Feature.FPGAKernelAttributesINTEL)] = .{ | ||
| 2014 | .llvm_name = null, | ||
| 2015 | .description = "Enable SPIR-V capability FPGAKernelAttributesINTEL", | ||
| 2016 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2017 | }; | ||
| 2018 | result[@intFromEnum(Feature.FPGAMemoryAccessesINTEL)] = .{ | ||
| 2019 | .llvm_name = null, | ||
| 2020 | .description = "Enable SPIR-V capability FPGAMemoryAccessesINTEL", | ||
| 2021 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2022 | }; | ||
| 2023 | result[@intFromEnum(Feature.FPGAClusterAttributesINTEL)] = .{ | ||
| 2024 | .llvm_name = null, | ||
| 2025 | .description = "Enable SPIR-V capability FPGAClusterAttributesINTEL", | ||
| 2026 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2027 | }; | ||
| 2028 | result[@intFromEnum(Feature.LoopFuseINTEL)] = .{ | ||
| 2029 | .llvm_name = null, | ||
| 2030 | .description = "Enable SPIR-V capability LoopFuseINTEL", | ||
| 2031 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2032 | }; | ||
| 2033 | result[@intFromEnum(Feature.FPGABufferLocationINTEL)] = .{ | ||
| 2034 | .llvm_name = null, | ||
| 2035 | .description = "Enable SPIR-V capability FPGABufferLocationINTEL", | ||
| 2036 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2037 | }; | ||
| 2038 | result[@intFromEnum(Feature.USMStorageClassesINTEL)] = .{ | ||
| 2039 | .llvm_name = null, | ||
| 2040 | .description = "Enable SPIR-V capability USMStorageClassesINTEL", | ||
| 2041 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2042 | }; | ||
| 2043 | result[@intFromEnum(Feature.IOPipesINTEL)] = .{ | ||
| 2044 | .llvm_name = null, | ||
| 2045 | .description = "Enable SPIR-V capability IOPipesINTEL", | ||
| 2046 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2047 | }; | ||
| 2048 | result[@intFromEnum(Feature.BlockingPipesINTEL)] = .{ | ||
| 2049 | .llvm_name = null, | ||
| 2050 | .description = "Enable SPIR-V capability BlockingPipesINTEL", | ||
| 2051 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2052 | }; | ||
| 2053 | result[@intFromEnum(Feature.FPGARegINTEL)] = .{ | ||
| 2054 | .llvm_name = null, | ||
| 2055 | .description = "Enable SPIR-V capability FPGARegINTEL", | ||
| 2056 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2057 | }; | ||
| 2058 | result[@intFromEnum(Feature.AtomicFloat32AddEXT)] = .{ | ||
| 2059 | .llvm_name = null, | ||
| 2060 | .description = "Enable SPIR-V capability AtomicFloat32AddEXT", | ||
| 2061 | .dependencies = featureSet(&[_]Feature{ | ||
| 2062 | .Shader, | ||
| 2063 | }), | ||
| 2064 | }; | ||
| 2065 | result[@intFromEnum(Feature.AtomicFloat64AddEXT)] = .{ | ||
| 2066 | .llvm_name = null, | ||
| 2067 | .description = "Enable SPIR-V capability AtomicFloat64AddEXT", | ||
| 2068 | .dependencies = featureSet(&[_]Feature{ | ||
| 2069 | .Shader, | ||
| 2070 | }), | ||
| 2071 | }; | ||
| 2072 | result[@intFromEnum(Feature.LongConstantCompositeINTEL)] = .{ | ||
| 2073 | .llvm_name = null, | ||
| 2074 | .description = "Enable SPIR-V capability LongConstantCompositeINTEL", | ||
| 2075 | .dependencies = featureSet(&[_]Feature{}), | ||
| 2076 | }; | ||
| 2077 | const ti = @typeInfo(Feature); | ||
| 2078 | for (&result, 0..) |*elem, i| { | ||
| 2079 | elem.index = i; | ||
| 2080 | elem.name = ti.Enum.fields[i].name; | ||
| 2081 | } | ||
| 2082 | break :blk result; | ||
| 2083 | }; | ||
| 2084 | |||
| 2085 | pub const cpu = struct { | ||
| 2086 | pub const generic = CpuModel{ | ||
| 2087 | .name = "generic", | ||
| 2088 | .llvm_name = "generic", | ||
| 2089 | .features = featureSet(&[_]Feature{}), | ||
| 2090 | }; | ||
| 2091 | }; | ||
lib/std/target/ve.zig deleted-39
| ... | @@ -1,39 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | vpu, | ||
| 9 | }; | ||
| 10 | |||
| 11 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 12 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 13 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 14 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 15 | |||
| 16 | pub const all_features = blk: { | ||
| 17 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 18 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 19 | var result: [len]CpuFeature = undefined; | ||
| 20 | result[@intFromEnum(Feature.vpu)] = .{ | ||
| 21 | .llvm_name = "vpu", | ||
| 22 | .description = "Enable the VPU", | ||
| 23 | .dependencies = featureSet(&[_]Feature{}), | ||
| 24 | }; | ||
| 25 | const ti = @typeInfo(Feature); | ||
| 26 | for (&result, 0..) |*elem, i| { | ||
| 27 | elem.index = i; | ||
| 28 | elem.name = ti.Enum.fields[i].name; | ||
| 29 | } | ||
| 30 | break :blk result; | ||
| 31 | }; | ||
| 32 | |||
| 33 | pub const cpu = struct { | ||
| 34 | pub const generic = CpuModel{ | ||
| 35 | .name = "generic", | ||
| 36 | .llvm_name = "generic", | ||
| 37 | .features = featureSet(&[_]Feature{}), | ||
| 38 | }; | ||
| 39 | }; | ||
lib/std/target/wasm.zig deleted-126
| ... | @@ -1,126 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | atomics, | ||
| 9 | bulk_memory, | ||
| 10 | exception_handling, | ||
| 11 | extended_const, | ||
| 12 | multivalue, | ||
| 13 | mutable_globals, | ||
| 14 | nontrapping_fptoint, | ||
| 15 | reference_types, | ||
| 16 | relaxed_simd, | ||
| 17 | sign_ext, | ||
| 18 | simd128, | ||
| 19 | tail_call, | ||
| 20 | }; | ||
| 21 | |||
| 22 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 23 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 24 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 25 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 26 | |||
| 27 | pub const all_features = blk: { | ||
| 28 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 29 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 30 | var result: [len]CpuFeature = undefined; | ||
| 31 | result[@intFromEnum(Feature.atomics)] = .{ | ||
| 32 | .llvm_name = "atomics", | ||
| 33 | .description = "Enable Atomics", | ||
| 34 | .dependencies = featureSet(&[_]Feature{}), | ||
| 35 | }; | ||
| 36 | result[@intFromEnum(Feature.bulk_memory)] = .{ | ||
| 37 | .llvm_name = "bulk-memory", | ||
| 38 | .description = "Enable bulk memory operations", | ||
| 39 | .dependencies = featureSet(&[_]Feature{}), | ||
| 40 | }; | ||
| 41 | result[@intFromEnum(Feature.exception_handling)] = .{ | ||
| 42 | .llvm_name = "exception-handling", | ||
| 43 | .description = "Enable Wasm exception handling", | ||
| 44 | .dependencies = featureSet(&[_]Feature{}), | ||
| 45 | }; | ||
| 46 | result[@intFromEnum(Feature.extended_const)] = .{ | ||
| 47 | .llvm_name = "extended-const", | ||
| 48 | .description = "Enable extended const expressions", | ||
| 49 | .dependencies = featureSet(&[_]Feature{}), | ||
| 50 | }; | ||
| 51 | result[@intFromEnum(Feature.multivalue)] = .{ | ||
| 52 | .llvm_name = "multivalue", | ||
| 53 | .description = "Enable multivalue blocks, instructions, and functions", | ||
| 54 | .dependencies = featureSet(&[_]Feature{}), | ||
| 55 | }; | ||
| 56 | result[@intFromEnum(Feature.mutable_globals)] = .{ | ||
| 57 | .llvm_name = "mutable-globals", | ||
| 58 | .description = "Enable mutable globals", | ||
| 59 | .dependencies = featureSet(&[_]Feature{}), | ||
| 60 | }; | ||
| 61 | result[@intFromEnum(Feature.nontrapping_fptoint)] = .{ | ||
| 62 | .llvm_name = "nontrapping-fptoint", | ||
| 63 | .description = "Enable non-trapping float-to-int conversion operators", | ||
| 64 | .dependencies = featureSet(&[_]Feature{}), | ||
| 65 | }; | ||
| 66 | result[@intFromEnum(Feature.reference_types)] = .{ | ||
| 67 | .llvm_name = "reference-types", | ||
| 68 | .description = "Enable reference types", | ||
| 69 | .dependencies = featureSet(&[_]Feature{}), | ||
| 70 | }; | ||
| 71 | result[@intFromEnum(Feature.relaxed_simd)] = .{ | ||
| 72 | .llvm_name = "relaxed-simd", | ||
| 73 | .description = "Enable relaxed-simd instructions", | ||
| 74 | .dependencies = featureSet(&[_]Feature{}), | ||
| 75 | }; | ||
| 76 | result[@intFromEnum(Feature.sign_ext)] = .{ | ||
| 77 | .llvm_name = "sign-ext", | ||
| 78 | .description = "Enable sign extension operators", | ||
| 79 | .dependencies = featureSet(&[_]Feature{}), | ||
| 80 | }; | ||
| 81 | result[@intFromEnum(Feature.simd128)] = .{ | ||
| 82 | .llvm_name = "simd128", | ||
| 83 | .description = "Enable 128-bit SIMD", | ||
| 84 | .dependencies = featureSet(&[_]Feature{}), | ||
| 85 | }; | ||
| 86 | result[@intFromEnum(Feature.tail_call)] = .{ | ||
| 87 | .llvm_name = "tail-call", | ||
| 88 | .description = "Enable tail call instructions", | ||
| 89 | .dependencies = featureSet(&[_]Feature{}), | ||
| 90 | }; | ||
| 91 | const ti = @typeInfo(Feature); | ||
| 92 | for (&result, 0..) |*elem, i| { | ||
| 93 | elem.index = i; | ||
| 94 | elem.name = ti.Enum.fields[i].name; | ||
| 95 | } | ||
| 96 | break :blk result; | ||
| 97 | }; | ||
| 98 | |||
| 99 | pub const cpu = struct { | ||
| 100 | pub const bleeding_edge = CpuModel{ | ||
| 101 | .name = "bleeding_edge", | ||
| 102 | .llvm_name = "bleeding-edge", | ||
| 103 | .features = featureSet(&[_]Feature{ | ||
| 104 | .atomics, | ||
| 105 | .bulk_memory, | ||
| 106 | .mutable_globals, | ||
| 107 | .nontrapping_fptoint, | ||
| 108 | .sign_ext, | ||
| 109 | .simd128, | ||
| 110 | .tail_call, | ||
| 111 | }), | ||
| 112 | }; | ||
| 113 | pub const generic = CpuModel{ | ||
| 114 | .name = "generic", | ||
| 115 | .llvm_name = "generic", | ||
| 116 | .features = featureSet(&[_]Feature{ | ||
| 117 | .mutable_globals, | ||
| 118 | .sign_ext, | ||
| 119 | }), | ||
| 120 | }; | ||
| 121 | pub const mvp = CpuModel{ | ||
| 122 | .name = "mvp", | ||
| 123 | .llvm_name = "mvp", | ||
| 124 | .features = featureSet(&[_]Feature{}), | ||
| 125 | }; | ||
| 126 | }; | ||
lib/std/target/x86.zig deleted-4179
| ... | @@ -1,4179 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | @"16bit_mode", | ||
| 9 | @"32bit_mode", | ||
| 10 | @"3dnow", | ||
| 11 | @"3dnowa", | ||
| 12 | @"64bit", | ||
| 13 | adx, | ||
| 14 | aes, | ||
| 15 | allow_light_256_bit, | ||
| 16 | amx_bf16, | ||
| 17 | amx_complex, | ||
| 18 | amx_fp16, | ||
| 19 | amx_int8, | ||
| 20 | amx_tile, | ||
| 21 | avx, | ||
| 22 | avx2, | ||
| 23 | avx512bf16, | ||
| 24 | avx512bitalg, | ||
| 25 | avx512bw, | ||
| 26 | avx512cd, | ||
| 27 | avx512dq, | ||
| 28 | avx512er, | ||
| 29 | avx512f, | ||
| 30 | avx512fp16, | ||
| 31 | avx512ifma, | ||
| 32 | avx512pf, | ||
| 33 | avx512vbmi, | ||
| 34 | avx512vbmi2, | ||
| 35 | avx512vl, | ||
| 36 | avx512vnni, | ||
| 37 | avx512vp2intersect, | ||
| 38 | avx512vpopcntdq, | ||
| 39 | avxifma, | ||
| 40 | avxneconvert, | ||
| 41 | avxvnni, | ||
| 42 | avxvnniint16, | ||
| 43 | avxvnniint8, | ||
| 44 | bmi, | ||
| 45 | bmi2, | ||
| 46 | branchfusion, | ||
| 47 | cldemote, | ||
| 48 | clflushopt, | ||
| 49 | clwb, | ||
| 50 | clzero, | ||
| 51 | cmov, | ||
| 52 | cmpccxadd, | ||
| 53 | crc32, | ||
| 54 | cx16, | ||
| 55 | cx8, | ||
| 56 | enqcmd, | ||
| 57 | ermsb, | ||
| 58 | f16c, | ||
| 59 | false_deps_getmant, | ||
| 60 | false_deps_lzcnt_tzcnt, | ||
| 61 | false_deps_mulc, | ||
| 62 | false_deps_mullq, | ||
| 63 | false_deps_perm, | ||
| 64 | false_deps_popcnt, | ||
| 65 | false_deps_range, | ||
| 66 | fast_11bytenop, | ||
| 67 | fast_15bytenop, | ||
| 68 | fast_7bytenop, | ||
| 69 | fast_bextr, | ||
| 70 | fast_gather, | ||
| 71 | fast_hops, | ||
| 72 | fast_lzcnt, | ||
| 73 | fast_movbe, | ||
| 74 | fast_scalar_fsqrt, | ||
| 75 | fast_scalar_shift_masks, | ||
| 76 | fast_shld_rotate, | ||
| 77 | fast_variable_crosslane_shuffle, | ||
| 78 | fast_variable_perlane_shuffle, | ||
| 79 | fast_vector_fsqrt, | ||
| 80 | fast_vector_shift_masks, | ||
| 81 | faster_shift_than_shuffle, | ||
| 82 | fma, | ||
| 83 | fma4, | ||
| 84 | fsgsbase, | ||
| 85 | fsrm, | ||
| 86 | fxsr, | ||
| 87 | gfni, | ||
| 88 | harden_sls_ijmp, | ||
| 89 | harden_sls_ret, | ||
| 90 | hreset, | ||
| 91 | idivl_to_divb, | ||
| 92 | idivq_to_divl, | ||
| 93 | invpcid, | ||
| 94 | kl, | ||
| 95 | lea_sp, | ||
| 96 | lea_uses_ag, | ||
| 97 | lvi_cfi, | ||
| 98 | lvi_load_hardening, | ||
| 99 | lwp, | ||
| 100 | lzcnt, | ||
| 101 | macrofusion, | ||
| 102 | mmx, | ||
| 103 | movbe, | ||
| 104 | movdir64b, | ||
| 105 | movdiri, | ||
| 106 | mwaitx, | ||
| 107 | no_bypass_delay, | ||
| 108 | no_bypass_delay_blend, | ||
| 109 | no_bypass_delay_mov, | ||
| 110 | no_bypass_delay_shuffle, | ||
| 111 | nopl, | ||
| 112 | pad_short_functions, | ||
| 113 | pclmul, | ||
| 114 | pconfig, | ||
| 115 | pku, | ||
| 116 | popcnt, | ||
| 117 | prefer_128_bit, | ||
| 118 | prefer_256_bit, | ||
| 119 | prefer_mask_registers, | ||
| 120 | prefer_movmsk_over_vtest, | ||
| 121 | prefetchi, | ||
| 122 | prefetchwt1, | ||
| 123 | prfchw, | ||
| 124 | ptwrite, | ||
| 125 | raoint, | ||
| 126 | rdpid, | ||
| 127 | rdpru, | ||
| 128 | rdrnd, | ||
| 129 | rdseed, | ||
| 130 | retpoline, | ||
| 131 | retpoline_external_thunk, | ||
| 132 | retpoline_indirect_branches, | ||
| 133 | retpoline_indirect_calls, | ||
| 134 | rtm, | ||
| 135 | sahf, | ||
| 136 | sbb_dep_breaking, | ||
| 137 | serialize, | ||
| 138 | seses, | ||
| 139 | sgx, | ||
| 140 | sha, | ||
| 141 | sha512, | ||
| 142 | shstk, | ||
| 143 | slow_3ops_lea, | ||
| 144 | slow_incdec, | ||
| 145 | slow_lea, | ||
| 146 | slow_pmaddwd, | ||
| 147 | slow_pmulld, | ||
| 148 | slow_shld, | ||
| 149 | slow_two_mem_ops, | ||
| 150 | slow_unaligned_mem_16, | ||
| 151 | slow_unaligned_mem_32, | ||
| 152 | sm3, | ||
| 153 | sm4, | ||
| 154 | soft_float, | ||
| 155 | sse, | ||
| 156 | sse2, | ||
| 157 | sse3, | ||
| 158 | sse4_1, | ||
| 159 | sse4_2, | ||
| 160 | sse4a, | ||
| 161 | sse_unaligned_mem, | ||
| 162 | ssse3, | ||
| 163 | tagged_globals, | ||
| 164 | tbm, | ||
| 165 | tsxldtrk, | ||
| 166 | tuning_fast_imm_vector_shift, | ||
| 167 | uintr, | ||
| 168 | use_glm_div_sqrt_costs, | ||
| 169 | use_slm_arith_costs, | ||
| 170 | vaes, | ||
| 171 | vpclmulqdq, | ||
| 172 | vzeroupper, | ||
| 173 | waitpkg, | ||
| 174 | wbnoinvd, | ||
| 175 | widekl, | ||
| 176 | x87, | ||
| 177 | xop, | ||
| 178 | xsave, | ||
| 179 | xsavec, | ||
| 180 | xsaveopt, | ||
| 181 | xsaves, | ||
| 182 | }; | ||
| 183 | |||
| 184 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 185 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 186 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 187 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 188 | |||
| 189 | pub const all_features = blk: { | ||
| 190 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 191 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 192 | var result: [len]CpuFeature = undefined; | ||
| 193 | result[@intFromEnum(Feature.@"16bit_mode")] = .{ | ||
| 194 | .llvm_name = "16bit-mode", | ||
| 195 | .description = "16-bit mode (i8086)", | ||
| 196 | .dependencies = featureSet(&[_]Feature{}), | ||
| 197 | }; | ||
| 198 | result[@intFromEnum(Feature.@"32bit_mode")] = .{ | ||
| 199 | .llvm_name = "32bit-mode", | ||
| 200 | .description = "32-bit mode (80386)", | ||
| 201 | .dependencies = featureSet(&[_]Feature{}), | ||
| 202 | }; | ||
| 203 | result[@intFromEnum(Feature.@"3dnow")] = .{ | ||
| 204 | .llvm_name = "3dnow", | ||
| 205 | .description = "Enable 3DNow! instructions", | ||
| 206 | .dependencies = featureSet(&[_]Feature{ | ||
| 207 | .mmx, | ||
| 208 | }), | ||
| 209 | }; | ||
| 210 | result[@intFromEnum(Feature.@"3dnowa")] = .{ | ||
| 211 | .llvm_name = "3dnowa", | ||
| 212 | .description = "Enable 3DNow! Athlon instructions", | ||
| 213 | .dependencies = featureSet(&[_]Feature{ | ||
| 214 | .@"3dnow", | ||
| 215 | }), | ||
| 216 | }; | ||
| 217 | result[@intFromEnum(Feature.@"64bit")] = .{ | ||
| 218 | .llvm_name = "64bit", | ||
| 219 | .description = "Support 64-bit instructions", | ||
| 220 | .dependencies = featureSet(&[_]Feature{}), | ||
| 221 | }; | ||
| 222 | result[@intFromEnum(Feature.adx)] = .{ | ||
| 223 | .llvm_name = "adx", | ||
| 224 | .description = "Support ADX instructions", | ||
| 225 | .dependencies = featureSet(&[_]Feature{}), | ||
| 226 | }; | ||
| 227 | result[@intFromEnum(Feature.aes)] = .{ | ||
| 228 | .llvm_name = "aes", | ||
| 229 | .description = "Enable AES instructions", | ||
| 230 | .dependencies = featureSet(&[_]Feature{ | ||
| 231 | .sse2, | ||
| 232 | }), | ||
| 233 | }; | ||
| 234 | result[@intFromEnum(Feature.allow_light_256_bit)] = .{ | ||
| 235 | .llvm_name = "allow-light-256-bit", | ||
| 236 | .description = "Enable generation of 256-bit load/stores even if we prefer 128-bit", | ||
| 237 | .dependencies = featureSet(&[_]Feature{}), | ||
| 238 | }; | ||
| 239 | result[@intFromEnum(Feature.amx_bf16)] = .{ | ||
| 240 | .llvm_name = "amx-bf16", | ||
| 241 | .description = "Support AMX-BF16 instructions", | ||
| 242 | .dependencies = featureSet(&[_]Feature{ | ||
| 243 | .amx_tile, | ||
| 244 | }), | ||
| 245 | }; | ||
| 246 | result[@intFromEnum(Feature.amx_complex)] = .{ | ||
| 247 | .llvm_name = "amx-complex", | ||
| 248 | .description = "Support AMX-COMPLEX instructions", | ||
| 249 | .dependencies = featureSet(&[_]Feature{ | ||
| 250 | .amx_tile, | ||
| 251 | }), | ||
| 252 | }; | ||
| 253 | result[@intFromEnum(Feature.amx_fp16)] = .{ | ||
| 254 | .llvm_name = "amx-fp16", | ||
| 255 | .description = "Support AMX amx-fp16 instructions", | ||
| 256 | .dependencies = featureSet(&[_]Feature{ | ||
| 257 | .amx_tile, | ||
| 258 | }), | ||
| 259 | }; | ||
| 260 | result[@intFromEnum(Feature.amx_int8)] = .{ | ||
| 261 | .llvm_name = "amx-int8", | ||
| 262 | .description = "Support AMX-INT8 instructions", | ||
| 263 | .dependencies = featureSet(&[_]Feature{ | ||
| 264 | .amx_tile, | ||
| 265 | }), | ||
| 266 | }; | ||
| 267 | result[@intFromEnum(Feature.amx_tile)] = .{ | ||
| 268 | .llvm_name = "amx-tile", | ||
| 269 | .description = "Support AMX-TILE instructions", | ||
| 270 | .dependencies = featureSet(&[_]Feature{}), | ||
| 271 | }; | ||
| 272 | result[@intFromEnum(Feature.avx)] = .{ | ||
| 273 | .llvm_name = "avx", | ||
| 274 | .description = "Enable AVX instructions", | ||
| 275 | .dependencies = featureSet(&[_]Feature{ | ||
| 276 | .sse4_2, | ||
| 277 | }), | ||
| 278 | }; | ||
| 279 | result[@intFromEnum(Feature.avx2)] = .{ | ||
| 280 | .llvm_name = "avx2", | ||
| 281 | .description = "Enable AVX2 instructions", | ||
| 282 | .dependencies = featureSet(&[_]Feature{ | ||
| 283 | .avx, | ||
| 284 | }), | ||
| 285 | }; | ||
| 286 | result[@intFromEnum(Feature.avx512bf16)] = .{ | ||
| 287 | .llvm_name = "avx512bf16", | ||
| 288 | .description = "Support bfloat16 floating point", | ||
| 289 | .dependencies = featureSet(&[_]Feature{ | ||
| 290 | .avx512bw, | ||
| 291 | }), | ||
| 292 | }; | ||
| 293 | result[@intFromEnum(Feature.avx512bitalg)] = .{ | ||
| 294 | .llvm_name = "avx512bitalg", | ||
| 295 | .description = "Enable AVX-512 Bit Algorithms", | ||
| 296 | .dependencies = featureSet(&[_]Feature{ | ||
| 297 | .avx512bw, | ||
| 298 | }), | ||
| 299 | }; | ||
| 300 | result[@intFromEnum(Feature.avx512bw)] = .{ | ||
| 301 | .llvm_name = "avx512bw", | ||
| 302 | .description = "Enable AVX-512 Byte and Word Instructions", | ||
| 303 | .dependencies = featureSet(&[_]Feature{ | ||
| 304 | .avx512f, | ||
| 305 | }), | ||
| 306 | }; | ||
| 307 | result[@intFromEnum(Feature.avx512cd)] = .{ | ||
| 308 | .llvm_name = "avx512cd", | ||
| 309 | .description = "Enable AVX-512 Conflict Detection Instructions", | ||
| 310 | .dependencies = featureSet(&[_]Feature{ | ||
| 311 | .avx512f, | ||
| 312 | }), | ||
| 313 | }; | ||
| 314 | result[@intFromEnum(Feature.avx512dq)] = .{ | ||
| 315 | .llvm_name = "avx512dq", | ||
| 316 | .description = "Enable AVX-512 Doubleword and Quadword Instructions", | ||
| 317 | .dependencies = featureSet(&[_]Feature{ | ||
| 318 | .avx512f, | ||
| 319 | }), | ||
| 320 | }; | ||
| 321 | result[@intFromEnum(Feature.avx512er)] = .{ | ||
| 322 | .llvm_name = "avx512er", | ||
| 323 | .description = "Enable AVX-512 Exponential and Reciprocal Instructions", | ||
| 324 | .dependencies = featureSet(&[_]Feature{ | ||
| 325 | .avx512f, | ||
| 326 | }), | ||
| 327 | }; | ||
| 328 | result[@intFromEnum(Feature.avx512f)] = .{ | ||
| 329 | .llvm_name = "avx512f", | ||
| 330 | .description = "Enable AVX-512 instructions", | ||
| 331 | .dependencies = featureSet(&[_]Feature{ | ||
| 332 | .avx2, | ||
| 333 | .f16c, | ||
| 334 | .fma, | ||
| 335 | }), | ||
| 336 | }; | ||
| 337 | result[@intFromEnum(Feature.avx512fp16)] = .{ | ||
| 338 | .llvm_name = "avx512fp16", | ||
| 339 | .description = "Support 16-bit floating point", | ||
| 340 | .dependencies = featureSet(&[_]Feature{ | ||
| 341 | .avx512bw, | ||
| 342 | .avx512dq, | ||
| 343 | .avx512vl, | ||
| 344 | }), | ||
| 345 | }; | ||
| 346 | result[@intFromEnum(Feature.avx512ifma)] = .{ | ||
| 347 | .llvm_name = "avx512ifma", | ||
| 348 | .description = "Enable AVX-512 Integer Fused Multiple-Add", | ||
| 349 | .dependencies = featureSet(&[_]Feature{ | ||
| 350 | .avx512f, | ||
| 351 | }), | ||
| 352 | }; | ||
| 353 | result[@intFromEnum(Feature.avx512pf)] = .{ | ||
| 354 | .llvm_name = "avx512pf", | ||
| 355 | .description = "Enable AVX-512 PreFetch Instructions", | ||
| 356 | .dependencies = featureSet(&[_]Feature{ | ||
| 357 | .avx512f, | ||
| 358 | }), | ||
| 359 | }; | ||
| 360 | result[@intFromEnum(Feature.avx512vbmi)] = .{ | ||
| 361 | .llvm_name = "avx512vbmi", | ||
| 362 | .description = "Enable AVX-512 Vector Byte Manipulation Instructions", | ||
| 363 | .dependencies = featureSet(&[_]Feature{ | ||
| 364 | .avx512bw, | ||
| 365 | }), | ||
| 366 | }; | ||
| 367 | result[@intFromEnum(Feature.avx512vbmi2)] = .{ | ||
| 368 | .llvm_name = "avx512vbmi2", | ||
| 369 | .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", | ||
| 370 | .dependencies = featureSet(&[_]Feature{ | ||
| 371 | .avx512bw, | ||
| 372 | }), | ||
| 373 | }; | ||
| 374 | result[@intFromEnum(Feature.avx512vl)] = .{ | ||
| 375 | .llvm_name = "avx512vl", | ||
| 376 | .description = "Enable AVX-512 Vector Length eXtensions", | ||
| 377 | .dependencies = featureSet(&[_]Feature{ | ||
| 378 | .avx512f, | ||
| 379 | }), | ||
| 380 | }; | ||
| 381 | result[@intFromEnum(Feature.avx512vnni)] = .{ | ||
| 382 | .llvm_name = "avx512vnni", | ||
| 383 | .description = "Enable AVX-512 Vector Neural Network Instructions", | ||
| 384 | .dependencies = featureSet(&[_]Feature{ | ||
| 385 | .avx512f, | ||
| 386 | }), | ||
| 387 | }; | ||
| 388 | result[@intFromEnum(Feature.avx512vp2intersect)] = .{ | ||
| 389 | .llvm_name = "avx512vp2intersect", | ||
| 390 | .description = "Enable AVX-512 vp2intersect", | ||
| 391 | .dependencies = featureSet(&[_]Feature{ | ||
| 392 | .avx512f, | ||
| 393 | }), | ||
| 394 | }; | ||
| 395 | result[@intFromEnum(Feature.avx512vpopcntdq)] = .{ | ||
| 396 | .llvm_name = "avx512vpopcntdq", | ||
| 397 | .description = "Enable AVX-512 Population Count Instructions", | ||
| 398 | .dependencies = featureSet(&[_]Feature{ | ||
| 399 | .avx512f, | ||
| 400 | }), | ||
| 401 | }; | ||
| 402 | result[@intFromEnum(Feature.avxifma)] = .{ | ||
| 403 | .llvm_name = "avxifma", | ||
| 404 | .description = "Enable AVX-IFMA", | ||
| 405 | .dependencies = featureSet(&[_]Feature{ | ||
| 406 | .avx2, | ||
| 407 | }), | ||
| 408 | }; | ||
| 409 | result[@intFromEnum(Feature.avxneconvert)] = .{ | ||
| 410 | .llvm_name = "avxneconvert", | ||
| 411 | .description = "Support AVX-NE-CONVERT instructions", | ||
| 412 | .dependencies = featureSet(&[_]Feature{ | ||
| 413 | .avx2, | ||
| 414 | }), | ||
| 415 | }; | ||
| 416 | result[@intFromEnum(Feature.avxvnni)] = .{ | ||
| 417 | .llvm_name = "avxvnni", | ||
| 418 | .description = "Support AVX_VNNI encoding", | ||
| 419 | .dependencies = featureSet(&[_]Feature{ | ||
| 420 | .avx2, | ||
| 421 | }), | ||
| 422 | }; | ||
| 423 | result[@intFromEnum(Feature.avxvnniint16)] = .{ | ||
| 424 | .llvm_name = "avxvnniint16", | ||
| 425 | .description = "Enable AVX-VNNI-INT16", | ||
| 426 | .dependencies = featureSet(&[_]Feature{ | ||
| 427 | .avx2, | ||
| 428 | }), | ||
| 429 | }; | ||
| 430 | result[@intFromEnum(Feature.avxvnniint8)] = .{ | ||
| 431 | .llvm_name = "avxvnniint8", | ||
| 432 | .description = "Enable AVX-VNNI-INT8", | ||
| 433 | .dependencies = featureSet(&[_]Feature{ | ||
| 434 | .avx2, | ||
| 435 | }), | ||
| 436 | }; | ||
| 437 | result[@intFromEnum(Feature.bmi)] = .{ | ||
| 438 | .llvm_name = "bmi", | ||
| 439 | .description = "Support BMI instructions", | ||
| 440 | .dependencies = featureSet(&[_]Feature{}), | ||
| 441 | }; | ||
| 442 | result[@intFromEnum(Feature.bmi2)] = .{ | ||
| 443 | .llvm_name = "bmi2", | ||
| 444 | .description = "Support BMI2 instructions", | ||
| 445 | .dependencies = featureSet(&[_]Feature{}), | ||
| 446 | }; | ||
| 447 | result[@intFromEnum(Feature.branchfusion)] = .{ | ||
| 448 | .llvm_name = "branchfusion", | ||
| 449 | .description = "CMP/TEST can be fused with conditional branches", | ||
| 450 | .dependencies = featureSet(&[_]Feature{}), | ||
| 451 | }; | ||
| 452 | result[@intFromEnum(Feature.cldemote)] = .{ | ||
| 453 | .llvm_name = "cldemote", | ||
| 454 | .description = "Enable Cache Line Demote", | ||
| 455 | .dependencies = featureSet(&[_]Feature{}), | ||
| 456 | }; | ||
| 457 | result[@intFromEnum(Feature.clflushopt)] = .{ | ||
| 458 | .llvm_name = "clflushopt", | ||
| 459 | .description = "Flush A Cache Line Optimized", | ||
| 460 | .dependencies = featureSet(&[_]Feature{}), | ||
| 461 | }; | ||
| 462 | result[@intFromEnum(Feature.clwb)] = .{ | ||
| 463 | .llvm_name = "clwb", | ||
| 464 | .description = "Cache Line Write Back", | ||
| 465 | .dependencies = featureSet(&[_]Feature{}), | ||
| 466 | }; | ||
| 467 | result[@intFromEnum(Feature.clzero)] = .{ | ||
| 468 | .llvm_name = "clzero", | ||
| 469 | .description = "Enable Cache Line Zero", | ||
| 470 | .dependencies = featureSet(&[_]Feature{}), | ||
| 471 | }; | ||
| 472 | result[@intFromEnum(Feature.cmov)] = .{ | ||
| 473 | .llvm_name = "cmov", | ||
| 474 | .description = "Enable conditional move instructions", | ||
| 475 | .dependencies = featureSet(&[_]Feature{}), | ||
| 476 | }; | ||
| 477 | result[@intFromEnum(Feature.cmpccxadd)] = .{ | ||
| 478 | .llvm_name = "cmpccxadd", | ||
| 479 | .description = "Support CMPCCXADD instructions", | ||
| 480 | .dependencies = featureSet(&[_]Feature{}), | ||
| 481 | }; | ||
| 482 | result[@intFromEnum(Feature.crc32)] = .{ | ||
| 483 | .llvm_name = "crc32", | ||
| 484 | .description = "Enable SSE 4.2 CRC32 instruction (used when SSE4.2 is supported but function is GPR only)", | ||
| 485 | .dependencies = featureSet(&[_]Feature{}), | ||
| 486 | }; | ||
| 487 | result[@intFromEnum(Feature.cx16)] = .{ | ||
| 488 | .llvm_name = "cx16", | ||
| 489 | .description = "64-bit with cmpxchg16b (this is true for most x86-64 chips, but not the first AMD chips)", | ||
| 490 | .dependencies = featureSet(&[_]Feature{ | ||
| 491 | .cx8, | ||
| 492 | }), | ||
| 493 | }; | ||
| 494 | result[@intFromEnum(Feature.cx8)] = .{ | ||
| 495 | .llvm_name = "cx8", | ||
| 496 | .description = "Support CMPXCHG8B instructions", | ||
| 497 | .dependencies = featureSet(&[_]Feature{}), | ||
| 498 | }; | ||
| 499 | result[@intFromEnum(Feature.enqcmd)] = .{ | ||
| 500 | .llvm_name = "enqcmd", | ||
| 501 | .description = "Has ENQCMD instructions", | ||
| 502 | .dependencies = featureSet(&[_]Feature{}), | ||
| 503 | }; | ||
| 504 | result[@intFromEnum(Feature.ermsb)] = .{ | ||
| 505 | .llvm_name = "ermsb", | ||
| 506 | .description = "REP MOVS/STOS are fast", | ||
| 507 | .dependencies = featureSet(&[_]Feature{}), | ||
| 508 | }; | ||
| 509 | result[@intFromEnum(Feature.f16c)] = .{ | ||
| 510 | .llvm_name = "f16c", | ||
| 511 | .description = "Support 16-bit floating point conversion instructions", | ||
| 512 | .dependencies = featureSet(&[_]Feature{ | ||
| 513 | .avx, | ||
| 514 | }), | ||
| 515 | }; | ||
| 516 | result[@intFromEnum(Feature.false_deps_getmant)] = .{ | ||
| 517 | .llvm_name = "false-deps-getmant", | ||
| 518 | .description = "VGETMANTSS/SD/SH and VGETMANDPS/PD(memory version) has a false dependency on dest register", | ||
| 519 | .dependencies = featureSet(&[_]Feature{}), | ||
| 520 | }; | ||
| 521 | result[@intFromEnum(Feature.false_deps_lzcnt_tzcnt)] = .{ | ||
| 522 | .llvm_name = "false-deps-lzcnt-tzcnt", | ||
| 523 | .description = "LZCNT/TZCNT have a false dependency on dest register", | ||
| 524 | .dependencies = featureSet(&[_]Feature{}), | ||
| 525 | }; | ||
| 526 | result[@intFromEnum(Feature.false_deps_mulc)] = .{ | ||
| 527 | .llvm_name = "false-deps-mulc", | ||
| 528 | .description = "VF[C]MULCPH/SH has a false dependency on dest register", | ||
| 529 | .dependencies = featureSet(&[_]Feature{}), | ||
| 530 | }; | ||
| 531 | result[@intFromEnum(Feature.false_deps_mullq)] = .{ | ||
| 532 | .llvm_name = "false-deps-mullq", | ||
| 533 | .description = "VPMULLQ has a false dependency on dest register", | ||
| 534 | .dependencies = featureSet(&[_]Feature{}), | ||
| 535 | }; | ||
| 536 | result[@intFromEnum(Feature.false_deps_perm)] = .{ | ||
| 537 | .llvm_name = "false-deps-perm", | ||
| 538 | .description = "VPERMD/Q/PS/PD has a false dependency on dest register", | ||
| 539 | .dependencies = featureSet(&[_]Feature{}), | ||
| 540 | }; | ||
| 541 | result[@intFromEnum(Feature.false_deps_popcnt)] = .{ | ||
| 542 | .llvm_name = "false-deps-popcnt", | ||
| 543 | .description = "POPCNT has a false dependency on dest register", | ||
| 544 | .dependencies = featureSet(&[_]Feature{}), | ||
| 545 | }; | ||
| 546 | result[@intFromEnum(Feature.false_deps_range)] = .{ | ||
| 547 | .llvm_name = "false-deps-range", | ||
| 548 | .description = "VRANGEPD/PS/SD/SS has a false dependency on dest register", | ||
| 549 | .dependencies = featureSet(&[_]Feature{}), | ||
| 550 | }; | ||
| 551 | result[@intFromEnum(Feature.fast_11bytenop)] = .{ | ||
| 552 | .llvm_name = "fast-11bytenop", | ||
| 553 | .description = "Target can quickly decode up to 11 byte NOPs", | ||
| 554 | .dependencies = featureSet(&[_]Feature{}), | ||
| 555 | }; | ||
| 556 | result[@intFromEnum(Feature.fast_15bytenop)] = .{ | ||
| 557 | .llvm_name = "fast-15bytenop", | ||
| 558 | .description = "Target can quickly decode up to 15 byte NOPs", | ||
| 559 | .dependencies = featureSet(&[_]Feature{}), | ||
| 560 | }; | ||
| 561 | result[@intFromEnum(Feature.fast_7bytenop)] = .{ | ||
| 562 | .llvm_name = "fast-7bytenop", | ||
| 563 | .description = "Target can quickly decode up to 7 byte NOPs", | ||
| 564 | .dependencies = featureSet(&[_]Feature{}), | ||
| 565 | }; | ||
| 566 | result[@intFromEnum(Feature.fast_bextr)] = .{ | ||
| 567 | .llvm_name = "fast-bextr", | ||
| 568 | .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", | ||
| 569 | .dependencies = featureSet(&[_]Feature{}), | ||
| 570 | }; | ||
| 571 | result[@intFromEnum(Feature.fast_gather)] = .{ | ||
| 572 | .llvm_name = "fast-gather", | ||
| 573 | .description = "Indicates if gather is reasonably fast (this is true for Skylake client and all AVX-512 CPUs)", | ||
| 574 | .dependencies = featureSet(&[_]Feature{}), | ||
| 575 | }; | ||
| 576 | result[@intFromEnum(Feature.fast_hops)] = .{ | ||
| 577 | .llvm_name = "fast-hops", | ||
| 578 | .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", | ||
| 579 | .dependencies = featureSet(&[_]Feature{}), | ||
| 580 | }; | ||
| 581 | result[@intFromEnum(Feature.fast_lzcnt)] = .{ | ||
| 582 | .llvm_name = "fast-lzcnt", | ||
| 583 | .description = "LZCNT instructions are as fast as most simple integer ops", | ||
| 584 | .dependencies = featureSet(&[_]Feature{}), | ||
| 585 | }; | ||
| 586 | result[@intFromEnum(Feature.fast_movbe)] = .{ | ||
| 587 | .llvm_name = "fast-movbe", | ||
| 588 | .description = "Prefer a movbe over a single-use load + bswap / single-use bswap + store", | ||
| 589 | .dependencies = featureSet(&[_]Feature{}), | ||
| 590 | }; | ||
| 591 | result[@intFromEnum(Feature.fast_scalar_fsqrt)] = .{ | ||
| 592 | .llvm_name = "fast-scalar-fsqrt", | ||
| 593 | .description = "Scalar SQRT is fast (disable Newton-Raphson)", | ||
| 594 | .dependencies = featureSet(&[_]Feature{}), | ||
| 595 | }; | ||
| 596 | result[@intFromEnum(Feature.fast_scalar_shift_masks)] = .{ | ||
| 597 | .llvm_name = "fast-scalar-shift-masks", | ||
| 598 | .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", | ||
| 599 | .dependencies = featureSet(&[_]Feature{}), | ||
| 600 | }; | ||
| 601 | result[@intFromEnum(Feature.fast_shld_rotate)] = .{ | ||
| 602 | .llvm_name = "fast-shld-rotate", | ||
| 603 | .description = "SHLD can be used as a faster rotate", | ||
| 604 | .dependencies = featureSet(&[_]Feature{}), | ||
| 605 | }; | ||
| 606 | result[@intFromEnum(Feature.fast_variable_crosslane_shuffle)] = .{ | ||
| 607 | .llvm_name = "fast-variable-crosslane-shuffle", | ||
| 608 | .description = "Cross-lane shuffles with variable masks are fast", | ||
| 609 | .dependencies = featureSet(&[_]Feature{}), | ||
| 610 | }; | ||
| 611 | result[@intFromEnum(Feature.fast_variable_perlane_shuffle)] = .{ | ||
| 612 | .llvm_name = "fast-variable-perlane-shuffle", | ||
| 613 | .description = "Per-lane shuffles with variable masks are fast", | ||
| 614 | .dependencies = featureSet(&[_]Feature{}), | ||
| 615 | }; | ||
| 616 | result[@intFromEnum(Feature.fast_vector_fsqrt)] = .{ | ||
| 617 | .llvm_name = "fast-vector-fsqrt", | ||
| 618 | .description = "Vector SQRT is fast (disable Newton-Raphson)", | ||
| 619 | .dependencies = featureSet(&[_]Feature{}), | ||
| 620 | }; | ||
| 621 | result[@intFromEnum(Feature.fast_vector_shift_masks)] = .{ | ||
| 622 | .llvm_name = "fast-vector-shift-masks", | ||
| 623 | .description = "Prefer a left/right vector logical shift pair over a shift+and pair", | ||
| 624 | .dependencies = featureSet(&[_]Feature{}), | ||
| 625 | }; | ||
| 626 | result[@intFromEnum(Feature.faster_shift_than_shuffle)] = .{ | ||
| 627 | .llvm_name = "faster-shift-than-shuffle", | ||
| 628 | .description = "Shifts are faster (or as fast) as shuffle", | ||
| 629 | .dependencies = featureSet(&[_]Feature{}), | ||
| 630 | }; | ||
| 631 | result[@intFromEnum(Feature.fma)] = .{ | ||
| 632 | .llvm_name = "fma", | ||
| 633 | .description = "Enable three-operand fused multiple-add", | ||
| 634 | .dependencies = featureSet(&[_]Feature{ | ||
| 635 | .avx, | ||
| 636 | }), | ||
| 637 | }; | ||
| 638 | result[@intFromEnum(Feature.fma4)] = .{ | ||
| 639 | .llvm_name = "fma4", | ||
| 640 | .description = "Enable four-operand fused multiple-add", | ||
| 641 | .dependencies = featureSet(&[_]Feature{ | ||
| 642 | .avx, | ||
| 643 | .sse4a, | ||
| 644 | }), | ||
| 645 | }; | ||
| 646 | result[@intFromEnum(Feature.fsgsbase)] = .{ | ||
| 647 | .llvm_name = "fsgsbase", | ||
| 648 | .description = "Support FS/GS Base instructions", | ||
| 649 | .dependencies = featureSet(&[_]Feature{}), | ||
| 650 | }; | ||
| 651 | result[@intFromEnum(Feature.fsrm)] = .{ | ||
| 652 | .llvm_name = "fsrm", | ||
| 653 | .description = "REP MOVSB of short lengths is faster", | ||
| 654 | .dependencies = featureSet(&[_]Feature{}), | ||
| 655 | }; | ||
| 656 | result[@intFromEnum(Feature.fxsr)] = .{ | ||
| 657 | .llvm_name = "fxsr", | ||
| 658 | .description = "Support fxsave/fxrestore instructions", | ||
| 659 | .dependencies = featureSet(&[_]Feature{}), | ||
| 660 | }; | ||
| 661 | result[@intFromEnum(Feature.gfni)] = .{ | ||
| 662 | .llvm_name = "gfni", | ||
| 663 | .description = "Enable Galois Field Arithmetic Instructions", | ||
| 664 | .dependencies = featureSet(&[_]Feature{ | ||
| 665 | .sse2, | ||
| 666 | }), | ||
| 667 | }; | ||
| 668 | result[@intFromEnum(Feature.harden_sls_ijmp)] = .{ | ||
| 669 | .llvm_name = "harden-sls-ijmp", | ||
| 670 | .description = "Harden against straight line speculation across indirect JMP instructions.", | ||
| 671 | .dependencies = featureSet(&[_]Feature{}), | ||
| 672 | }; | ||
| 673 | result[@intFromEnum(Feature.harden_sls_ret)] = .{ | ||
| 674 | .llvm_name = "harden-sls-ret", | ||
| 675 | .description = "Harden against straight line speculation across RET instructions.", | ||
| 676 | .dependencies = featureSet(&[_]Feature{}), | ||
| 677 | }; | ||
| 678 | result[@intFromEnum(Feature.hreset)] = .{ | ||
| 679 | .llvm_name = "hreset", | ||
| 680 | .description = "Has hreset instruction", | ||
| 681 | .dependencies = featureSet(&[_]Feature{}), | ||
| 682 | }; | ||
| 683 | result[@intFromEnum(Feature.idivl_to_divb)] = .{ | ||
| 684 | .llvm_name = "idivl-to-divb", | ||
| 685 | .description = "Use 8-bit divide for positive values less than 256", | ||
| 686 | .dependencies = featureSet(&[_]Feature{}), | ||
| 687 | }; | ||
| 688 | result[@intFromEnum(Feature.idivq_to_divl)] = .{ | ||
| 689 | .llvm_name = "idivq-to-divl", | ||
| 690 | .description = "Use 32-bit divide for positive values less than 2^32", | ||
| 691 | .dependencies = featureSet(&[_]Feature{}), | ||
| 692 | }; | ||
| 693 | result[@intFromEnum(Feature.invpcid)] = .{ | ||
| 694 | .llvm_name = "invpcid", | ||
| 695 | .description = "Invalidate Process-Context Identifier", | ||
| 696 | .dependencies = featureSet(&[_]Feature{}), | ||
| 697 | }; | ||
| 698 | result[@intFromEnum(Feature.kl)] = .{ | ||
| 699 | .llvm_name = "kl", | ||
| 700 | .description = "Support Key Locker kl Instructions", | ||
| 701 | .dependencies = featureSet(&[_]Feature{ | ||
| 702 | .sse2, | ||
| 703 | }), | ||
| 704 | }; | ||
| 705 | result[@intFromEnum(Feature.lea_sp)] = .{ | ||
| 706 | .llvm_name = "lea-sp", | ||
| 707 | .description = "Use LEA for adjusting the stack pointer (this is an optimization for Intel Atom processors)", | ||
| 708 | .dependencies = featureSet(&[_]Feature{}), | ||
| 709 | }; | ||
| 710 | result[@intFromEnum(Feature.lea_uses_ag)] = .{ | ||
| 711 | .llvm_name = "lea-uses-ag", | ||
| 712 | .description = "LEA instruction needs inputs at AG stage", | ||
| 713 | .dependencies = featureSet(&[_]Feature{}), | ||
| 714 | }; | ||
| 715 | result[@intFromEnum(Feature.lvi_cfi)] = .{ | ||
| 716 | .llvm_name = "lvi-cfi", | ||
| 717 | .description = "Prevent indirect calls/branches from using a memory operand, and precede all indirect calls/branches from a register with an LFENCE instruction to serialize control flow. Also decompose RET instructions into a POP+LFENCE+JMP sequence.", | ||
| 718 | .dependencies = featureSet(&[_]Feature{}), | ||
| 719 | }; | ||
| 720 | result[@intFromEnum(Feature.lvi_load_hardening)] = .{ | ||
| 721 | .llvm_name = "lvi-load-hardening", | ||
| 722 | .description = "Insert LFENCE instructions to prevent data speculatively injected into loads from being used maliciously.", | ||
| 723 | .dependencies = featureSet(&[_]Feature{}), | ||
| 724 | }; | ||
| 725 | result[@intFromEnum(Feature.lwp)] = .{ | ||
| 726 | .llvm_name = "lwp", | ||
| 727 | .description = "Enable LWP instructions", | ||
| 728 | .dependencies = featureSet(&[_]Feature{}), | ||
| 729 | }; | ||
| 730 | result[@intFromEnum(Feature.lzcnt)] = .{ | ||
| 731 | .llvm_name = "lzcnt", | ||
| 732 | .description = "Support LZCNT instruction", | ||
| 733 | .dependencies = featureSet(&[_]Feature{}), | ||
| 734 | }; | ||
| 735 | result[@intFromEnum(Feature.macrofusion)] = .{ | ||
| 736 | .llvm_name = "macrofusion", | ||
| 737 | .description = "Various instructions can be fused with conditional branches", | ||
| 738 | .dependencies = featureSet(&[_]Feature{}), | ||
| 739 | }; | ||
| 740 | result[@intFromEnum(Feature.mmx)] = .{ | ||
| 741 | .llvm_name = "mmx", | ||
| 742 | .description = "Enable MMX instructions", | ||
| 743 | .dependencies = featureSet(&[_]Feature{}), | ||
| 744 | }; | ||
| 745 | result[@intFromEnum(Feature.movbe)] = .{ | ||
| 746 | .llvm_name = "movbe", | ||
| 747 | .description = "Support MOVBE instruction", | ||
| 748 | .dependencies = featureSet(&[_]Feature{}), | ||
| 749 | }; | ||
| 750 | result[@intFromEnum(Feature.movdir64b)] = .{ | ||
| 751 | .llvm_name = "movdir64b", | ||
| 752 | .description = "Support movdir64b instruction (direct store 64 bytes)", | ||
| 753 | .dependencies = featureSet(&[_]Feature{}), | ||
| 754 | }; | ||
| 755 | result[@intFromEnum(Feature.movdiri)] = .{ | ||
| 756 | .llvm_name = "movdiri", | ||
| 757 | .description = "Support movdiri instruction (direct store integer)", | ||
| 758 | .dependencies = featureSet(&[_]Feature{}), | ||
| 759 | }; | ||
| 760 | result[@intFromEnum(Feature.mwaitx)] = .{ | ||
| 761 | .llvm_name = "mwaitx", | ||
| 762 | .description = "Enable MONITORX/MWAITX timer functionality", | ||
| 763 | .dependencies = featureSet(&[_]Feature{}), | ||
| 764 | }; | ||
| 765 | result[@intFromEnum(Feature.no_bypass_delay)] = .{ | ||
| 766 | .llvm_name = "no-bypass-delay", | ||
| 767 | .description = "Has no bypass delay when using the 'wrong' domain", | ||
| 768 | .dependencies = featureSet(&[_]Feature{}), | ||
| 769 | }; | ||
| 770 | result[@intFromEnum(Feature.no_bypass_delay_blend)] = .{ | ||
| 771 | .llvm_name = "no-bypass-delay-blend", | ||
| 772 | .description = "Has no bypass delay when using the 'wrong' blend type", | ||
| 773 | .dependencies = featureSet(&[_]Feature{}), | ||
| 774 | }; | ||
| 775 | result[@intFromEnum(Feature.no_bypass_delay_mov)] = .{ | ||
| 776 | .llvm_name = "no-bypass-delay-mov", | ||
| 777 | .description = "Has no bypass delay when using the 'wrong' mov type", | ||
| 778 | .dependencies = featureSet(&[_]Feature{}), | ||
| 779 | }; | ||
| 780 | result[@intFromEnum(Feature.no_bypass_delay_shuffle)] = .{ | ||
| 781 | .llvm_name = "no-bypass-delay-shuffle", | ||
| 782 | .description = "Has no bypass delay when using the 'wrong' shuffle type", | ||
| 783 | .dependencies = featureSet(&[_]Feature{}), | ||
| 784 | }; | ||
| 785 | result[@intFromEnum(Feature.nopl)] = .{ | ||
| 786 | .llvm_name = "nopl", | ||
| 787 | .description = "Enable NOPL instruction (generally pentium pro+)", | ||
| 788 | .dependencies = featureSet(&[_]Feature{}), | ||
| 789 | }; | ||
| 790 | result[@intFromEnum(Feature.pad_short_functions)] = .{ | ||
| 791 | .llvm_name = "pad-short-functions", | ||
| 792 | .description = "Pad short functions (to prevent a stall when returning too early)", | ||
| 793 | .dependencies = featureSet(&[_]Feature{}), | ||
| 794 | }; | ||
| 795 | result[@intFromEnum(Feature.pclmul)] = .{ | ||
| 796 | .llvm_name = "pclmul", | ||
| 797 | .description = "Enable packed carry-less multiplication instructions", | ||
| 798 | .dependencies = featureSet(&[_]Feature{ | ||
| 799 | .sse2, | ||
| 800 | }), | ||
| 801 | }; | ||
| 802 | result[@intFromEnum(Feature.pconfig)] = .{ | ||
| 803 | .llvm_name = "pconfig", | ||
| 804 | .description = "platform configuration instruction", | ||
| 805 | .dependencies = featureSet(&[_]Feature{}), | ||
| 806 | }; | ||
| 807 | result[@intFromEnum(Feature.pku)] = .{ | ||
| 808 | .llvm_name = "pku", | ||
| 809 | .description = "Enable protection keys", | ||
| 810 | .dependencies = featureSet(&[_]Feature{}), | ||
| 811 | }; | ||
| 812 | result[@intFromEnum(Feature.popcnt)] = .{ | ||
| 813 | .llvm_name = "popcnt", | ||
| 814 | .description = "Support POPCNT instruction", | ||
| 815 | .dependencies = featureSet(&[_]Feature{}), | ||
| 816 | }; | ||
| 817 | result[@intFromEnum(Feature.prefer_128_bit)] = .{ | ||
| 818 | .llvm_name = "prefer-128-bit", | ||
| 819 | .description = "Prefer 128-bit AVX instructions", | ||
| 820 | .dependencies = featureSet(&[_]Feature{}), | ||
| 821 | }; | ||
| 822 | result[@intFromEnum(Feature.prefer_256_bit)] = .{ | ||
| 823 | .llvm_name = "prefer-256-bit", | ||
| 824 | .description = "Prefer 256-bit AVX instructions", | ||
| 825 | .dependencies = featureSet(&[_]Feature{}), | ||
| 826 | }; | ||
| 827 | result[@intFromEnum(Feature.prefer_mask_registers)] = .{ | ||
| 828 | .llvm_name = "prefer-mask-registers", | ||
| 829 | .description = "Prefer AVX512 mask registers over PTEST/MOVMSK", | ||
| 830 | .dependencies = featureSet(&[_]Feature{}), | ||
| 831 | }; | ||
| 832 | result[@intFromEnum(Feature.prefer_movmsk_over_vtest)] = .{ | ||
| 833 | .llvm_name = "prefer-movmsk-over-vtest", | ||
| 834 | .description = "Prefer movmsk over vtest instruction", | ||
| 835 | .dependencies = featureSet(&[_]Feature{}), | ||
| 836 | }; | ||
| 837 | result[@intFromEnum(Feature.prefetchi)] = .{ | ||
| 838 | .llvm_name = "prefetchi", | ||
| 839 | .description = "Prefetch instruction with T0 or T1 Hint", | ||
| 840 | .dependencies = featureSet(&[_]Feature{}), | ||
| 841 | }; | ||
| 842 | result[@intFromEnum(Feature.prefetchwt1)] = .{ | ||
| 843 | .llvm_name = "prefetchwt1", | ||
| 844 | .description = "Prefetch with Intent to Write and T1 Hint", | ||
| 845 | .dependencies = featureSet(&[_]Feature{}), | ||
| 846 | }; | ||
| 847 | result[@intFromEnum(Feature.prfchw)] = .{ | ||
| 848 | .llvm_name = "prfchw", | ||
| 849 | .description = "Support PRFCHW instructions", | ||
| 850 | .dependencies = featureSet(&[_]Feature{}), | ||
| 851 | }; | ||
| 852 | result[@intFromEnum(Feature.ptwrite)] = .{ | ||
| 853 | .llvm_name = "ptwrite", | ||
| 854 | .description = "Support ptwrite instruction", | ||
| 855 | .dependencies = featureSet(&[_]Feature{}), | ||
| 856 | }; | ||
| 857 | result[@intFromEnum(Feature.raoint)] = .{ | ||
| 858 | .llvm_name = "raoint", | ||
| 859 | .description = "Support RAO-INT instructions", | ||
| 860 | .dependencies = featureSet(&[_]Feature{}), | ||
| 861 | }; | ||
| 862 | result[@intFromEnum(Feature.rdpid)] = .{ | ||
| 863 | .llvm_name = "rdpid", | ||
| 864 | .description = "Support RDPID instructions", | ||
| 865 | .dependencies = featureSet(&[_]Feature{}), | ||
| 866 | }; | ||
| 867 | result[@intFromEnum(Feature.rdpru)] = .{ | ||
| 868 | .llvm_name = "rdpru", | ||
| 869 | .description = "Support RDPRU instructions", | ||
| 870 | .dependencies = featureSet(&[_]Feature{}), | ||
| 871 | }; | ||
| 872 | result[@intFromEnum(Feature.rdrnd)] = .{ | ||
| 873 | .llvm_name = "rdrnd", | ||
| 874 | .description = "Support RDRAND instruction", | ||
| 875 | .dependencies = featureSet(&[_]Feature{}), | ||
| 876 | }; | ||
| 877 | result[@intFromEnum(Feature.rdseed)] = .{ | ||
| 878 | .llvm_name = "rdseed", | ||
| 879 | .description = "Support RDSEED instruction", | ||
| 880 | .dependencies = featureSet(&[_]Feature{}), | ||
| 881 | }; | ||
| 882 | result[@intFromEnum(Feature.retpoline)] = .{ | ||
| 883 | .llvm_name = "retpoline", | ||
| 884 | .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", | ||
| 885 | .dependencies = featureSet(&[_]Feature{ | ||
| 886 | .retpoline_indirect_branches, | ||
| 887 | .retpoline_indirect_calls, | ||
| 888 | }), | ||
| 889 | }; | ||
| 890 | result[@intFromEnum(Feature.retpoline_external_thunk)] = .{ | ||
| 891 | .llvm_name = "retpoline-external-thunk", | ||
| 892 | .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", | ||
| 893 | .dependencies = featureSet(&[_]Feature{ | ||
| 894 | .retpoline_indirect_calls, | ||
| 895 | }), | ||
| 896 | }; | ||
| 897 | result[@intFromEnum(Feature.retpoline_indirect_branches)] = .{ | ||
| 898 | .llvm_name = "retpoline-indirect-branches", | ||
| 899 | .description = "Remove speculation of indirect branches from the generated code", | ||
| 900 | .dependencies = featureSet(&[_]Feature{}), | ||
| 901 | }; | ||
| 902 | result[@intFromEnum(Feature.retpoline_indirect_calls)] = .{ | ||
| 903 | .llvm_name = "retpoline-indirect-calls", | ||
| 904 | .description = "Remove speculation of indirect calls from the generated code", | ||
| 905 | .dependencies = featureSet(&[_]Feature{}), | ||
| 906 | }; | ||
| 907 | result[@intFromEnum(Feature.rtm)] = .{ | ||
| 908 | .llvm_name = "rtm", | ||
| 909 | .description = "Support RTM instructions", | ||
| 910 | .dependencies = featureSet(&[_]Feature{}), | ||
| 911 | }; | ||
| 912 | result[@intFromEnum(Feature.sahf)] = .{ | ||
| 913 | .llvm_name = "sahf", | ||
| 914 | .description = "Support LAHF and SAHF instructions in 64-bit mode", | ||
| 915 | .dependencies = featureSet(&[_]Feature{}), | ||
| 916 | }; | ||
| 917 | result[@intFromEnum(Feature.sbb_dep_breaking)] = .{ | ||
| 918 | .llvm_name = "sbb-dep-breaking", | ||
| 919 | .description = "SBB with same register has no source dependency", | ||
| 920 | .dependencies = featureSet(&[_]Feature{}), | ||
| 921 | }; | ||
| 922 | result[@intFromEnum(Feature.serialize)] = .{ | ||
| 923 | .llvm_name = "serialize", | ||
| 924 | .description = "Has serialize instruction", | ||
| 925 | .dependencies = featureSet(&[_]Feature{}), | ||
| 926 | }; | ||
| 927 | result[@intFromEnum(Feature.seses)] = .{ | ||
| 928 | .llvm_name = "seses", | ||
| 929 | .description = "Prevent speculative execution side channel timing attacks by inserting a speculation barrier before memory reads, memory writes, and conditional branches. Implies LVI Control Flow integrity.", | ||
| 930 | .dependencies = featureSet(&[_]Feature{ | ||
| 931 | .lvi_cfi, | ||
| 932 | }), | ||
| 933 | }; | ||
| 934 | result[@intFromEnum(Feature.sgx)] = .{ | ||
| 935 | .llvm_name = "sgx", | ||
| 936 | .description = "Enable Software Guard Extensions", | ||
| 937 | .dependencies = featureSet(&[_]Feature{}), | ||
| 938 | }; | ||
| 939 | result[@intFromEnum(Feature.sha)] = .{ | ||
| 940 | .llvm_name = "sha", | ||
| 941 | .description = "Enable SHA instructions", | ||
| 942 | .dependencies = featureSet(&[_]Feature{ | ||
| 943 | .sse2, | ||
| 944 | }), | ||
| 945 | }; | ||
| 946 | result[@intFromEnum(Feature.sha512)] = .{ | ||
| 947 | .llvm_name = "sha512", | ||
| 948 | .description = "Support SHA512 instructions", | ||
| 949 | .dependencies = featureSet(&[_]Feature{ | ||
| 950 | .avx, | ||
| 951 | }), | ||
| 952 | }; | ||
| 953 | result[@intFromEnum(Feature.shstk)] = .{ | ||
| 954 | .llvm_name = "shstk", | ||
| 955 | .description = "Support CET Shadow-Stack instructions", | ||
| 956 | .dependencies = featureSet(&[_]Feature{}), | ||
| 957 | }; | ||
| 958 | result[@intFromEnum(Feature.slow_3ops_lea)] = .{ | ||
| 959 | .llvm_name = "slow-3ops-lea", | ||
| 960 | .description = "LEA instruction with 3 ops or certain registers is slow", | ||
| 961 | .dependencies = featureSet(&[_]Feature{}), | ||
| 962 | }; | ||
| 963 | result[@intFromEnum(Feature.slow_incdec)] = .{ | ||
| 964 | .llvm_name = "slow-incdec", | ||
| 965 | .description = "INC and DEC instructions are slower than ADD and SUB", | ||
| 966 | .dependencies = featureSet(&[_]Feature{}), | ||
| 967 | }; | ||
| 968 | result[@intFromEnum(Feature.slow_lea)] = .{ | ||
| 969 | .llvm_name = "slow-lea", | ||
| 970 | .description = "LEA instruction with certain arguments is slow", | ||
| 971 | .dependencies = featureSet(&[_]Feature{}), | ||
| 972 | }; | ||
| 973 | result[@intFromEnum(Feature.slow_pmaddwd)] = .{ | ||
| 974 | .llvm_name = "slow-pmaddwd", | ||
| 975 | .description = "PMADDWD is slower than PMULLD", | ||
| 976 | .dependencies = featureSet(&[_]Feature{}), | ||
| 977 | }; | ||
| 978 | result[@intFromEnum(Feature.slow_pmulld)] = .{ | ||
| 979 | .llvm_name = "slow-pmulld", | ||
| 980 | .description = "PMULLD instruction is slow (compared to PMULLW/PMULHW and PMULUDQ)", | ||
| 981 | .dependencies = featureSet(&[_]Feature{}), | ||
| 982 | }; | ||
| 983 | result[@intFromEnum(Feature.slow_shld)] = .{ | ||
| 984 | .llvm_name = "slow-shld", | ||
| 985 | .description = "SHLD instruction is slow", | ||
| 986 | .dependencies = featureSet(&[_]Feature{}), | ||
| 987 | }; | ||
| 988 | result[@intFromEnum(Feature.slow_two_mem_ops)] = .{ | ||
| 989 | .llvm_name = "slow-two-mem-ops", | ||
| 990 | .description = "Two memory operand instructions are slow", | ||
| 991 | .dependencies = featureSet(&[_]Feature{}), | ||
| 992 | }; | ||
| 993 | result[@intFromEnum(Feature.slow_unaligned_mem_16)] = .{ | ||
| 994 | .llvm_name = "slow-unaligned-mem-16", | ||
| 995 | .description = "Slow unaligned 16-byte memory access", | ||
| 996 | .dependencies = featureSet(&[_]Feature{}), | ||
| 997 | }; | ||
| 998 | result[@intFromEnum(Feature.slow_unaligned_mem_32)] = .{ | ||
| 999 | .llvm_name = "slow-unaligned-mem-32", | ||
| 1000 | .description = "Slow unaligned 32-byte memory access", | ||
| 1001 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1002 | }; | ||
| 1003 | result[@intFromEnum(Feature.sm3)] = .{ | ||
| 1004 | .llvm_name = "sm3", | ||
| 1005 | .description = "Support SM3 instructions", | ||
| 1006 | .dependencies = featureSet(&[_]Feature{ | ||
| 1007 | .avx, | ||
| 1008 | }), | ||
| 1009 | }; | ||
| 1010 | result[@intFromEnum(Feature.sm4)] = .{ | ||
| 1011 | .llvm_name = "sm4", | ||
| 1012 | .description = "Support SM4 instructions", | ||
| 1013 | .dependencies = featureSet(&[_]Feature{ | ||
| 1014 | .avx, | ||
| 1015 | }), | ||
| 1016 | }; | ||
| 1017 | result[@intFromEnum(Feature.soft_float)] = .{ | ||
| 1018 | .llvm_name = "soft-float", | ||
| 1019 | .description = "Use software floating point features", | ||
| 1020 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1021 | }; | ||
| 1022 | result[@intFromEnum(Feature.sse)] = .{ | ||
| 1023 | .llvm_name = "sse", | ||
| 1024 | .description = "Enable SSE instructions", | ||
| 1025 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1026 | }; | ||
| 1027 | result[@intFromEnum(Feature.sse2)] = .{ | ||
| 1028 | .llvm_name = "sse2", | ||
| 1029 | .description = "Enable SSE2 instructions", | ||
| 1030 | .dependencies = featureSet(&[_]Feature{ | ||
| 1031 | .sse, | ||
| 1032 | }), | ||
| 1033 | }; | ||
| 1034 | result[@intFromEnum(Feature.sse3)] = .{ | ||
| 1035 | .llvm_name = "sse3", | ||
| 1036 | .description = "Enable SSE3 instructions", | ||
| 1037 | .dependencies = featureSet(&[_]Feature{ | ||
| 1038 | .sse2, | ||
| 1039 | }), | ||
| 1040 | }; | ||
| 1041 | result[@intFromEnum(Feature.sse4_1)] = .{ | ||
| 1042 | .llvm_name = "sse4.1", | ||
| 1043 | .description = "Enable SSE 4.1 instructions", | ||
| 1044 | .dependencies = featureSet(&[_]Feature{ | ||
| 1045 | .ssse3, | ||
| 1046 | }), | ||
| 1047 | }; | ||
| 1048 | result[@intFromEnum(Feature.sse4_2)] = .{ | ||
| 1049 | .llvm_name = "sse4.2", | ||
| 1050 | .description = "Enable SSE 4.2 instructions", | ||
| 1051 | .dependencies = featureSet(&[_]Feature{ | ||
| 1052 | .sse4_1, | ||
| 1053 | }), | ||
| 1054 | }; | ||
| 1055 | result[@intFromEnum(Feature.sse4a)] = .{ | ||
| 1056 | .llvm_name = "sse4a", | ||
| 1057 | .description = "Support SSE 4a instructions", | ||
| 1058 | .dependencies = featureSet(&[_]Feature{ | ||
| 1059 | .sse3, | ||
| 1060 | }), | ||
| 1061 | }; | ||
| 1062 | result[@intFromEnum(Feature.sse_unaligned_mem)] = .{ | ||
| 1063 | .llvm_name = "sse-unaligned-mem", | ||
| 1064 | .description = "Allow unaligned memory operands with SSE instructions (this may require setting a configuration bit in the processor)", | ||
| 1065 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1066 | }; | ||
| 1067 | result[@intFromEnum(Feature.ssse3)] = .{ | ||
| 1068 | .llvm_name = "ssse3", | ||
| 1069 | .description = "Enable SSSE3 instructions", | ||
| 1070 | .dependencies = featureSet(&[_]Feature{ | ||
| 1071 | .sse3, | ||
| 1072 | }), | ||
| 1073 | }; | ||
| 1074 | result[@intFromEnum(Feature.tagged_globals)] = .{ | ||
| 1075 | .llvm_name = "tagged-globals", | ||
| 1076 | .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits.", | ||
| 1077 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1078 | }; | ||
| 1079 | result[@intFromEnum(Feature.tbm)] = .{ | ||
| 1080 | .llvm_name = "tbm", | ||
| 1081 | .description = "Enable TBM instructions", | ||
| 1082 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1083 | }; | ||
| 1084 | result[@intFromEnum(Feature.tsxldtrk)] = .{ | ||
| 1085 | .llvm_name = "tsxldtrk", | ||
| 1086 | .description = "Support TSXLDTRK instructions", | ||
| 1087 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1088 | }; | ||
| 1089 | result[@intFromEnum(Feature.tuning_fast_imm_vector_shift)] = .{ | ||
| 1090 | .llvm_name = "tuning-fast-imm-vector-shift", | ||
| 1091 | .description = "Vector shifts are fast (2/cycle) as opposed to slow (1/cycle)", | ||
| 1092 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1093 | }; | ||
| 1094 | result[@intFromEnum(Feature.uintr)] = .{ | ||
| 1095 | .llvm_name = "uintr", | ||
| 1096 | .description = "Has UINTR Instructions", | ||
| 1097 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1098 | }; | ||
| 1099 | result[@intFromEnum(Feature.use_glm_div_sqrt_costs)] = .{ | ||
| 1100 | .llvm_name = "use-glm-div-sqrt-costs", | ||
| 1101 | .description = "Use Goldmont specific floating point div/sqrt costs", | ||
| 1102 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1103 | }; | ||
| 1104 | result[@intFromEnum(Feature.use_slm_arith_costs)] = .{ | ||
| 1105 | .llvm_name = "use-slm-arith-costs", | ||
| 1106 | .description = "Use Silvermont specific arithmetic costs", | ||
| 1107 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1108 | }; | ||
| 1109 | result[@intFromEnum(Feature.vaes)] = .{ | ||
| 1110 | .llvm_name = "vaes", | ||
| 1111 | .description = "Promote selected AES instructions to AVX512/AVX registers", | ||
| 1112 | .dependencies = featureSet(&[_]Feature{ | ||
| 1113 | .aes, | ||
| 1114 | .avx, | ||
| 1115 | }), | ||
| 1116 | }; | ||
| 1117 | result[@intFromEnum(Feature.vpclmulqdq)] = .{ | ||
| 1118 | .llvm_name = "vpclmulqdq", | ||
| 1119 | .description = "Enable vpclmulqdq instructions", | ||
| 1120 | .dependencies = featureSet(&[_]Feature{ | ||
| 1121 | .avx, | ||
| 1122 | .pclmul, | ||
| 1123 | }), | ||
| 1124 | }; | ||
| 1125 | result[@intFromEnum(Feature.vzeroupper)] = .{ | ||
| 1126 | .llvm_name = "vzeroupper", | ||
| 1127 | .description = "Should insert vzeroupper instructions", | ||
| 1128 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1129 | }; | ||
| 1130 | result[@intFromEnum(Feature.waitpkg)] = .{ | ||
| 1131 | .llvm_name = "waitpkg", | ||
| 1132 | .description = "Wait and pause enhancements", | ||
| 1133 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1134 | }; | ||
| 1135 | result[@intFromEnum(Feature.wbnoinvd)] = .{ | ||
| 1136 | .llvm_name = "wbnoinvd", | ||
| 1137 | .description = "Write Back No Invalidate", | ||
| 1138 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1139 | }; | ||
| 1140 | result[@intFromEnum(Feature.widekl)] = .{ | ||
| 1141 | .llvm_name = "widekl", | ||
| 1142 | .description = "Support Key Locker wide Instructions", | ||
| 1143 | .dependencies = featureSet(&[_]Feature{ | ||
| 1144 | .kl, | ||
| 1145 | }), | ||
| 1146 | }; | ||
| 1147 | result[@intFromEnum(Feature.x87)] = .{ | ||
| 1148 | .llvm_name = "x87", | ||
| 1149 | .description = "Enable X87 float instructions", | ||
| 1150 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1151 | }; | ||
| 1152 | result[@intFromEnum(Feature.xop)] = .{ | ||
| 1153 | .llvm_name = "xop", | ||
| 1154 | .description = "Enable XOP instructions", | ||
| 1155 | .dependencies = featureSet(&[_]Feature{ | ||
| 1156 | .fma4, | ||
| 1157 | }), | ||
| 1158 | }; | ||
| 1159 | result[@intFromEnum(Feature.xsave)] = .{ | ||
| 1160 | .llvm_name = "xsave", | ||
| 1161 | .description = "Support xsave instructions", | ||
| 1162 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1163 | }; | ||
| 1164 | result[@intFromEnum(Feature.xsavec)] = .{ | ||
| 1165 | .llvm_name = "xsavec", | ||
| 1166 | .description = "Support xsavec instructions", | ||
| 1167 | .dependencies = featureSet(&[_]Feature{ | ||
| 1168 | .xsave, | ||
| 1169 | }), | ||
| 1170 | }; | ||
| 1171 | result[@intFromEnum(Feature.xsaveopt)] = .{ | ||
| 1172 | .llvm_name = "xsaveopt", | ||
| 1173 | .description = "Support xsaveopt instructions", | ||
| 1174 | .dependencies = featureSet(&[_]Feature{ | ||
| 1175 | .xsave, | ||
| 1176 | }), | ||
| 1177 | }; | ||
| 1178 | result[@intFromEnum(Feature.xsaves)] = .{ | ||
| 1179 | .llvm_name = "xsaves", | ||
| 1180 | .description = "Support xsaves instructions", | ||
| 1181 | .dependencies = featureSet(&[_]Feature{ | ||
| 1182 | .xsave, | ||
| 1183 | }), | ||
| 1184 | }; | ||
| 1185 | const ti = @typeInfo(Feature); | ||
| 1186 | for (&result, 0..) |*elem, i| { | ||
| 1187 | elem.index = i; | ||
| 1188 | elem.name = ti.Enum.fields[i].name; | ||
| 1189 | } | ||
| 1190 | break :blk result; | ||
| 1191 | }; | ||
| 1192 | |||
| 1193 | pub const cpu = struct { | ||
| 1194 | pub const alderlake = CpuModel{ | ||
| 1195 | .name = "alderlake", | ||
| 1196 | .llvm_name = "alderlake", | ||
| 1197 | .features = featureSet(&[_]Feature{ | ||
| 1198 | .@"64bit", | ||
| 1199 | .adx, | ||
| 1200 | .allow_light_256_bit, | ||
| 1201 | .avxvnni, | ||
| 1202 | .bmi, | ||
| 1203 | .bmi2, | ||
| 1204 | .cldemote, | ||
| 1205 | .clflushopt, | ||
| 1206 | .clwb, | ||
| 1207 | .cmov, | ||
| 1208 | .crc32, | ||
| 1209 | .cx16, | ||
| 1210 | .f16c, | ||
| 1211 | .false_deps_perm, | ||
| 1212 | .false_deps_popcnt, | ||
| 1213 | .fast_15bytenop, | ||
| 1214 | .fast_gather, | ||
| 1215 | .fast_scalar_fsqrt, | ||
| 1216 | .fast_shld_rotate, | ||
| 1217 | .fast_variable_crosslane_shuffle, | ||
| 1218 | .fast_variable_perlane_shuffle, | ||
| 1219 | .fast_vector_fsqrt, | ||
| 1220 | .fma, | ||
| 1221 | .fsgsbase, | ||
| 1222 | .fxsr, | ||
| 1223 | .gfni, | ||
| 1224 | .hreset, | ||
| 1225 | .idivq_to_divl, | ||
| 1226 | .invpcid, | ||
| 1227 | .lzcnt, | ||
| 1228 | .macrofusion, | ||
| 1229 | .mmx, | ||
| 1230 | .movbe, | ||
| 1231 | .movdir64b, | ||
| 1232 | .movdiri, | ||
| 1233 | .no_bypass_delay_blend, | ||
| 1234 | .no_bypass_delay_mov, | ||
| 1235 | .no_bypass_delay_shuffle, | ||
| 1236 | .nopl, | ||
| 1237 | .pconfig, | ||
| 1238 | .pku, | ||
| 1239 | .popcnt, | ||
| 1240 | .prefer_movmsk_over_vtest, | ||
| 1241 | .prfchw, | ||
| 1242 | .ptwrite, | ||
| 1243 | .rdpid, | ||
| 1244 | .rdrnd, | ||
| 1245 | .rdseed, | ||
| 1246 | .sahf, | ||
| 1247 | .serialize, | ||
| 1248 | .sha, | ||
| 1249 | .shstk, | ||
| 1250 | .slow_3ops_lea, | ||
| 1251 | .tuning_fast_imm_vector_shift, | ||
| 1252 | .vaes, | ||
| 1253 | .vpclmulqdq, | ||
| 1254 | .vzeroupper, | ||
| 1255 | .waitpkg, | ||
| 1256 | .widekl, | ||
| 1257 | .x87, | ||
| 1258 | .xsavec, | ||
| 1259 | .xsaveopt, | ||
| 1260 | .xsaves, | ||
| 1261 | }), | ||
| 1262 | }; | ||
| 1263 | pub const amdfam10 = CpuModel{ | ||
| 1264 | .name = "amdfam10", | ||
| 1265 | .llvm_name = "amdfam10", | ||
| 1266 | .features = featureSet(&[_]Feature{ | ||
| 1267 | .@"3dnowa", | ||
| 1268 | .@"64bit", | ||
| 1269 | .cmov, | ||
| 1270 | .cx16, | ||
| 1271 | .fast_scalar_shift_masks, | ||
| 1272 | .fxsr, | ||
| 1273 | .lzcnt, | ||
| 1274 | .nopl, | ||
| 1275 | .popcnt, | ||
| 1276 | .prfchw, | ||
| 1277 | .sahf, | ||
| 1278 | .sbb_dep_breaking, | ||
| 1279 | .slow_shld, | ||
| 1280 | .sse4a, | ||
| 1281 | .vzeroupper, | ||
| 1282 | .x87, | ||
| 1283 | }), | ||
| 1284 | }; | ||
| 1285 | pub const athlon = CpuModel{ | ||
| 1286 | .name = "athlon", | ||
| 1287 | .llvm_name = "athlon", | ||
| 1288 | .features = featureSet(&[_]Feature{ | ||
| 1289 | .@"3dnowa", | ||
| 1290 | .cmov, | ||
| 1291 | .cx8, | ||
| 1292 | .nopl, | ||
| 1293 | .slow_shld, | ||
| 1294 | .slow_unaligned_mem_16, | ||
| 1295 | .vzeroupper, | ||
| 1296 | .x87, | ||
| 1297 | }), | ||
| 1298 | }; | ||
| 1299 | pub const athlon64 = CpuModel{ | ||
| 1300 | .name = "athlon64", | ||
| 1301 | .llvm_name = "athlon64", | ||
| 1302 | .features = featureSet(&[_]Feature{ | ||
| 1303 | .@"3dnowa", | ||
| 1304 | .@"64bit", | ||
| 1305 | .cmov, | ||
| 1306 | .cx8, | ||
| 1307 | .fast_scalar_shift_masks, | ||
| 1308 | .fxsr, | ||
| 1309 | .nopl, | ||
| 1310 | .sbb_dep_breaking, | ||
| 1311 | .slow_shld, | ||
| 1312 | .slow_unaligned_mem_16, | ||
| 1313 | .sse2, | ||
| 1314 | .vzeroupper, | ||
| 1315 | .x87, | ||
| 1316 | }), | ||
| 1317 | }; | ||
| 1318 | pub const athlon64_sse3 = CpuModel{ | ||
| 1319 | .name = "athlon64_sse3", | ||
| 1320 | .llvm_name = "athlon64-sse3", | ||
| 1321 | .features = featureSet(&[_]Feature{ | ||
| 1322 | .@"3dnowa", | ||
| 1323 | .@"64bit", | ||
| 1324 | .cmov, | ||
| 1325 | .cx16, | ||
| 1326 | .fast_scalar_shift_masks, | ||
| 1327 | .fxsr, | ||
| 1328 | .nopl, | ||
| 1329 | .sbb_dep_breaking, | ||
| 1330 | .slow_shld, | ||
| 1331 | .slow_unaligned_mem_16, | ||
| 1332 | .sse3, | ||
| 1333 | .vzeroupper, | ||
| 1334 | .x87, | ||
| 1335 | }), | ||
| 1336 | }; | ||
| 1337 | pub const athlon_4 = CpuModel{ | ||
| 1338 | .name = "athlon_4", | ||
| 1339 | .llvm_name = "athlon-4", | ||
| 1340 | .features = featureSet(&[_]Feature{ | ||
| 1341 | .@"3dnowa", | ||
| 1342 | .cmov, | ||
| 1343 | .cx8, | ||
| 1344 | .fxsr, | ||
| 1345 | .nopl, | ||
| 1346 | .slow_shld, | ||
| 1347 | .slow_unaligned_mem_16, | ||
| 1348 | .sse, | ||
| 1349 | .vzeroupper, | ||
| 1350 | .x87, | ||
| 1351 | }), | ||
| 1352 | }; | ||
| 1353 | pub const athlon_fx = CpuModel{ | ||
| 1354 | .name = "athlon_fx", | ||
| 1355 | .llvm_name = "athlon-fx", | ||
| 1356 | .features = featureSet(&[_]Feature{ | ||
| 1357 | .@"3dnowa", | ||
| 1358 | .@"64bit", | ||
| 1359 | .cmov, | ||
| 1360 | .cx8, | ||
| 1361 | .fast_scalar_shift_masks, | ||
| 1362 | .fxsr, | ||
| 1363 | .nopl, | ||
| 1364 | .sbb_dep_breaking, | ||
| 1365 | .slow_shld, | ||
| 1366 | .slow_unaligned_mem_16, | ||
| 1367 | .sse2, | ||
| 1368 | .vzeroupper, | ||
| 1369 | .x87, | ||
| 1370 | }), | ||
| 1371 | }; | ||
| 1372 | pub const athlon_mp = CpuModel{ | ||
| 1373 | .name = "athlon_mp", | ||
| 1374 | .llvm_name = "athlon-mp", | ||
| 1375 | .features = featureSet(&[_]Feature{ | ||
| 1376 | .@"3dnowa", | ||
| 1377 | .cmov, | ||
| 1378 | .cx8, | ||
| 1379 | .fxsr, | ||
| 1380 | .nopl, | ||
| 1381 | .slow_shld, | ||
| 1382 | .slow_unaligned_mem_16, | ||
| 1383 | .sse, | ||
| 1384 | .vzeroupper, | ||
| 1385 | .x87, | ||
| 1386 | }), | ||
| 1387 | }; | ||
| 1388 | pub const athlon_tbird = CpuModel{ | ||
| 1389 | .name = "athlon_tbird", | ||
| 1390 | .llvm_name = "athlon-tbird", | ||
| 1391 | .features = featureSet(&[_]Feature{ | ||
| 1392 | .@"3dnowa", | ||
| 1393 | .cmov, | ||
| 1394 | .cx8, | ||
| 1395 | .nopl, | ||
| 1396 | .slow_shld, | ||
| 1397 | .slow_unaligned_mem_16, | ||
| 1398 | .vzeroupper, | ||
| 1399 | .x87, | ||
| 1400 | }), | ||
| 1401 | }; | ||
| 1402 | pub const athlon_xp = CpuModel{ | ||
| 1403 | .name = "athlon_xp", | ||
| 1404 | .llvm_name = "athlon-xp", | ||
| 1405 | .features = featureSet(&[_]Feature{ | ||
| 1406 | .@"3dnowa", | ||
| 1407 | .cmov, | ||
| 1408 | .cx8, | ||
| 1409 | .fxsr, | ||
| 1410 | .nopl, | ||
| 1411 | .slow_shld, | ||
| 1412 | .slow_unaligned_mem_16, | ||
| 1413 | .sse, | ||
| 1414 | .vzeroupper, | ||
| 1415 | .x87, | ||
| 1416 | }), | ||
| 1417 | }; | ||
| 1418 | pub const atom = CpuModel{ | ||
| 1419 | .name = "atom", | ||
| 1420 | .llvm_name = "atom", | ||
| 1421 | .features = featureSet(&[_]Feature{ | ||
| 1422 | .@"64bit", | ||
| 1423 | .cmov, | ||
| 1424 | .cx16, | ||
| 1425 | .fxsr, | ||
| 1426 | .idivl_to_divb, | ||
| 1427 | .idivq_to_divl, | ||
| 1428 | .lea_sp, | ||
| 1429 | .lea_uses_ag, | ||
| 1430 | .mmx, | ||
| 1431 | .movbe, | ||
| 1432 | .no_bypass_delay, | ||
| 1433 | .nopl, | ||
| 1434 | .pad_short_functions, | ||
| 1435 | .sahf, | ||
| 1436 | .slow_two_mem_ops, | ||
| 1437 | .slow_unaligned_mem_16, | ||
| 1438 | .ssse3, | ||
| 1439 | .vzeroupper, | ||
| 1440 | .x87, | ||
| 1441 | }), | ||
| 1442 | }; | ||
| 1443 | pub const atom_sse4_2_movbe = CpuModel{ | ||
| 1444 | .name = "atom_sse4_2_movbe", | ||
| 1445 | .llvm_name = "atom_sse4_2_movbe", | ||
| 1446 | .features = featureSet(&[_]Feature{ | ||
| 1447 | .@"64bit", | ||
| 1448 | .aes, | ||
| 1449 | .clflushopt, | ||
| 1450 | .cmov, | ||
| 1451 | .crc32, | ||
| 1452 | .cx16, | ||
| 1453 | .false_deps_popcnt, | ||
| 1454 | .fast_7bytenop, | ||
| 1455 | .fast_movbe, | ||
| 1456 | .fsgsbase, | ||
| 1457 | .fxsr, | ||
| 1458 | .idivq_to_divl, | ||
| 1459 | .mmx, | ||
| 1460 | .movbe, | ||
| 1461 | .no_bypass_delay, | ||
| 1462 | .nopl, | ||
| 1463 | .pclmul, | ||
| 1464 | .popcnt, | ||
| 1465 | .prfchw, | ||
| 1466 | .rdrnd, | ||
| 1467 | .rdseed, | ||
| 1468 | .sahf, | ||
| 1469 | .sha, | ||
| 1470 | .slow_incdec, | ||
| 1471 | .slow_lea, | ||
| 1472 | .slow_pmulld, | ||
| 1473 | .slow_two_mem_ops, | ||
| 1474 | .sse4_2, | ||
| 1475 | .use_slm_arith_costs, | ||
| 1476 | .vzeroupper, | ||
| 1477 | .x87, | ||
| 1478 | .xsavec, | ||
| 1479 | .xsaveopt, | ||
| 1480 | .xsaves, | ||
| 1481 | }), | ||
| 1482 | }; | ||
| 1483 | pub const barcelona = CpuModel{ | ||
| 1484 | .name = "barcelona", | ||
| 1485 | .llvm_name = "barcelona", | ||
| 1486 | .features = featureSet(&[_]Feature{ | ||
| 1487 | .@"3dnowa", | ||
| 1488 | .@"64bit", | ||
| 1489 | .cmov, | ||
| 1490 | .cx16, | ||
| 1491 | .fast_scalar_shift_masks, | ||
| 1492 | .fxsr, | ||
| 1493 | .lzcnt, | ||
| 1494 | .nopl, | ||
| 1495 | .popcnt, | ||
| 1496 | .prfchw, | ||
| 1497 | .sahf, | ||
| 1498 | .sbb_dep_breaking, | ||
| 1499 | .slow_shld, | ||
| 1500 | .sse4a, | ||
| 1501 | .vzeroupper, | ||
| 1502 | .x87, | ||
| 1503 | }), | ||
| 1504 | }; | ||
| 1505 | pub const bdver1 = CpuModel{ | ||
| 1506 | .name = "bdver1", | ||
| 1507 | .llvm_name = "bdver1", | ||
| 1508 | .features = featureSet(&[_]Feature{ | ||
| 1509 | .@"64bit", | ||
| 1510 | .aes, | ||
| 1511 | .branchfusion, | ||
| 1512 | .cmov, | ||
| 1513 | .crc32, | ||
| 1514 | .cx16, | ||
| 1515 | .fast_11bytenop, | ||
| 1516 | .fast_scalar_shift_masks, | ||
| 1517 | .fxsr, | ||
| 1518 | .lwp, | ||
| 1519 | .lzcnt, | ||
| 1520 | .mmx, | ||
| 1521 | .nopl, | ||
| 1522 | .pclmul, | ||
| 1523 | .popcnt, | ||
| 1524 | .prfchw, | ||
| 1525 | .sahf, | ||
| 1526 | .sbb_dep_breaking, | ||
| 1527 | .slow_shld, | ||
| 1528 | .vzeroupper, | ||
| 1529 | .x87, | ||
| 1530 | .xop, | ||
| 1531 | .xsave, | ||
| 1532 | }), | ||
| 1533 | }; | ||
| 1534 | pub const bdver2 = CpuModel{ | ||
| 1535 | .name = "bdver2", | ||
| 1536 | .llvm_name = "bdver2", | ||
| 1537 | .features = featureSet(&[_]Feature{ | ||
| 1538 | .@"64bit", | ||
| 1539 | .aes, | ||
| 1540 | .bmi, | ||
| 1541 | .branchfusion, | ||
| 1542 | .cmov, | ||
| 1543 | .crc32, | ||
| 1544 | .cx16, | ||
| 1545 | .f16c, | ||
| 1546 | .fast_11bytenop, | ||
| 1547 | .fast_bextr, | ||
| 1548 | .fast_movbe, | ||
| 1549 | .fast_scalar_shift_masks, | ||
| 1550 | .fma, | ||
| 1551 | .fxsr, | ||
| 1552 | .lwp, | ||
| 1553 | .lzcnt, | ||
| 1554 | .mmx, | ||
| 1555 | .nopl, | ||
| 1556 | .pclmul, | ||
| 1557 | .popcnt, | ||
| 1558 | .prfchw, | ||
| 1559 | .sahf, | ||
| 1560 | .sbb_dep_breaking, | ||
| 1561 | .slow_shld, | ||
| 1562 | .tbm, | ||
| 1563 | .vzeroupper, | ||
| 1564 | .x87, | ||
| 1565 | .xop, | ||
| 1566 | .xsave, | ||
| 1567 | }), | ||
| 1568 | }; | ||
| 1569 | pub const bdver3 = CpuModel{ | ||
| 1570 | .name = "bdver3", | ||
| 1571 | .llvm_name = "bdver3", | ||
| 1572 | .features = featureSet(&[_]Feature{ | ||
| 1573 | .@"64bit", | ||
| 1574 | .aes, | ||
| 1575 | .bmi, | ||
| 1576 | .branchfusion, | ||
| 1577 | .cmov, | ||
| 1578 | .crc32, | ||
| 1579 | .cx16, | ||
| 1580 | .f16c, | ||
| 1581 | .fast_11bytenop, | ||
| 1582 | .fast_bextr, | ||
| 1583 | .fast_movbe, | ||
| 1584 | .fast_scalar_shift_masks, | ||
| 1585 | .fma, | ||
| 1586 | .fsgsbase, | ||
| 1587 | .fxsr, | ||
| 1588 | .lwp, | ||
| 1589 | .lzcnt, | ||
| 1590 | .mmx, | ||
| 1591 | .nopl, | ||
| 1592 | .pclmul, | ||
| 1593 | .popcnt, | ||
| 1594 | .prfchw, | ||
| 1595 | .sahf, | ||
| 1596 | .sbb_dep_breaking, | ||
| 1597 | .slow_shld, | ||
| 1598 | .tbm, | ||
| 1599 | .vzeroupper, | ||
| 1600 | .x87, | ||
| 1601 | .xop, | ||
| 1602 | .xsaveopt, | ||
| 1603 | }), | ||
| 1604 | }; | ||
| 1605 | pub const bdver4 = CpuModel{ | ||
| 1606 | .name = "bdver4", | ||
| 1607 | .llvm_name = "bdver4", | ||
| 1608 | .features = featureSet(&[_]Feature{ | ||
| 1609 | .@"64bit", | ||
| 1610 | .aes, | ||
| 1611 | .avx2, | ||
| 1612 | .bmi, | ||
| 1613 | .bmi2, | ||
| 1614 | .branchfusion, | ||
| 1615 | .cmov, | ||
| 1616 | .crc32, | ||
| 1617 | .cx16, | ||
| 1618 | .f16c, | ||
| 1619 | .fast_11bytenop, | ||
| 1620 | .fast_bextr, | ||
| 1621 | .fast_movbe, | ||
| 1622 | .fast_scalar_shift_masks, | ||
| 1623 | .fma, | ||
| 1624 | .fsgsbase, | ||
| 1625 | .fxsr, | ||
| 1626 | .lwp, | ||
| 1627 | .lzcnt, | ||
| 1628 | .mmx, | ||
| 1629 | .movbe, | ||
| 1630 | .mwaitx, | ||
| 1631 | .nopl, | ||
| 1632 | .pclmul, | ||
| 1633 | .popcnt, | ||
| 1634 | .prfchw, | ||
| 1635 | .rdrnd, | ||
| 1636 | .sahf, | ||
| 1637 | .sbb_dep_breaking, | ||
| 1638 | .slow_shld, | ||
| 1639 | .tbm, | ||
| 1640 | .vzeroupper, | ||
| 1641 | .x87, | ||
| 1642 | .xop, | ||
| 1643 | .xsaveopt, | ||
| 1644 | }), | ||
| 1645 | }; | ||
| 1646 | pub const bonnell = CpuModel{ | ||
| 1647 | .name = "bonnell", | ||
| 1648 | .llvm_name = "bonnell", | ||
| 1649 | .features = featureSet(&[_]Feature{ | ||
| 1650 | .@"64bit", | ||
| 1651 | .cmov, | ||
| 1652 | .cx16, | ||
| 1653 | .fxsr, | ||
| 1654 | .idivl_to_divb, | ||
| 1655 | .idivq_to_divl, | ||
| 1656 | .lea_sp, | ||
| 1657 | .lea_uses_ag, | ||
| 1658 | .mmx, | ||
| 1659 | .movbe, | ||
| 1660 | .no_bypass_delay, | ||
| 1661 | .nopl, | ||
| 1662 | .pad_short_functions, | ||
| 1663 | .sahf, | ||
| 1664 | .slow_two_mem_ops, | ||
| 1665 | .slow_unaligned_mem_16, | ||
| 1666 | .ssse3, | ||
| 1667 | .vzeroupper, | ||
| 1668 | .x87, | ||
| 1669 | }), | ||
| 1670 | }; | ||
| 1671 | pub const broadwell = CpuModel{ | ||
| 1672 | .name = "broadwell", | ||
| 1673 | .llvm_name = "broadwell", | ||
| 1674 | .features = featureSet(&[_]Feature{ | ||
| 1675 | .@"64bit", | ||
| 1676 | .adx, | ||
| 1677 | .allow_light_256_bit, | ||
| 1678 | .avx2, | ||
| 1679 | .bmi, | ||
| 1680 | .bmi2, | ||
| 1681 | .cmov, | ||
| 1682 | .crc32, | ||
| 1683 | .cx16, | ||
| 1684 | .ermsb, | ||
| 1685 | .f16c, | ||
| 1686 | .false_deps_lzcnt_tzcnt, | ||
| 1687 | .false_deps_popcnt, | ||
| 1688 | .fast_15bytenop, | ||
| 1689 | .fast_scalar_fsqrt, | ||
| 1690 | .fast_shld_rotate, | ||
| 1691 | .fast_variable_crosslane_shuffle, | ||
| 1692 | .fast_variable_perlane_shuffle, | ||
| 1693 | .fma, | ||
| 1694 | .fsgsbase, | ||
| 1695 | .fxsr, | ||
| 1696 | .idivq_to_divl, | ||
| 1697 | .invpcid, | ||
| 1698 | .lzcnt, | ||
| 1699 | .macrofusion, | ||
| 1700 | .mmx, | ||
| 1701 | .movbe, | ||
| 1702 | .no_bypass_delay_mov, | ||
| 1703 | .no_bypass_delay_shuffle, | ||
| 1704 | .nopl, | ||
| 1705 | .pclmul, | ||
| 1706 | .popcnt, | ||
| 1707 | .prfchw, | ||
| 1708 | .rdrnd, | ||
| 1709 | .rdseed, | ||
| 1710 | .sahf, | ||
| 1711 | .slow_3ops_lea, | ||
| 1712 | .vzeroupper, | ||
| 1713 | .x87, | ||
| 1714 | .xsaveopt, | ||
| 1715 | }), | ||
| 1716 | }; | ||
| 1717 | pub const btver1 = CpuModel{ | ||
| 1718 | .name = "btver1", | ||
| 1719 | .llvm_name = "btver1", | ||
| 1720 | .features = featureSet(&[_]Feature{ | ||
| 1721 | .@"64bit", | ||
| 1722 | .cmov, | ||
| 1723 | .cx16, | ||
| 1724 | .fast_15bytenop, | ||
| 1725 | .fast_scalar_shift_masks, | ||
| 1726 | .fast_vector_shift_masks, | ||
| 1727 | .fxsr, | ||
| 1728 | .lzcnt, | ||
| 1729 | .mmx, | ||
| 1730 | .nopl, | ||
| 1731 | .popcnt, | ||
| 1732 | .prfchw, | ||
| 1733 | .sahf, | ||
| 1734 | .sbb_dep_breaking, | ||
| 1735 | .slow_shld, | ||
| 1736 | .sse4a, | ||
| 1737 | .ssse3, | ||
| 1738 | .vzeroupper, | ||
| 1739 | .x87, | ||
| 1740 | }), | ||
| 1741 | }; | ||
| 1742 | pub const btver2 = CpuModel{ | ||
| 1743 | .name = "btver2", | ||
| 1744 | .llvm_name = "btver2", | ||
| 1745 | .features = featureSet(&[_]Feature{ | ||
| 1746 | .@"64bit", | ||
| 1747 | .aes, | ||
| 1748 | .bmi, | ||
| 1749 | .cmov, | ||
| 1750 | .crc32, | ||
| 1751 | .cx16, | ||
| 1752 | .f16c, | ||
| 1753 | .fast_15bytenop, | ||
| 1754 | .fast_bextr, | ||
| 1755 | .fast_hops, | ||
| 1756 | .fast_lzcnt, | ||
| 1757 | .fast_movbe, | ||
| 1758 | .fast_scalar_shift_masks, | ||
| 1759 | .fast_vector_shift_masks, | ||
| 1760 | .fxsr, | ||
| 1761 | .lzcnt, | ||
| 1762 | .mmx, | ||
| 1763 | .movbe, | ||
| 1764 | .nopl, | ||
| 1765 | .pclmul, | ||
| 1766 | .popcnt, | ||
| 1767 | .prfchw, | ||
| 1768 | .sahf, | ||
| 1769 | .sbb_dep_breaking, | ||
| 1770 | .slow_shld, | ||
| 1771 | .sse4a, | ||
| 1772 | .x87, | ||
| 1773 | .xsaveopt, | ||
| 1774 | }), | ||
| 1775 | }; | ||
| 1776 | pub const c3 = CpuModel{ | ||
| 1777 | .name = "c3", | ||
| 1778 | .llvm_name = "c3", | ||
| 1779 | .features = featureSet(&[_]Feature{ | ||
| 1780 | .@"3dnow", | ||
| 1781 | .slow_unaligned_mem_16, | ||
| 1782 | .vzeroupper, | ||
| 1783 | .x87, | ||
| 1784 | }), | ||
| 1785 | }; | ||
| 1786 | pub const c3_2 = CpuModel{ | ||
| 1787 | .name = "c3_2", | ||
| 1788 | .llvm_name = "c3-2", | ||
| 1789 | .features = featureSet(&[_]Feature{ | ||
| 1790 | .cmov, | ||
| 1791 | .cx8, | ||
| 1792 | .fxsr, | ||
| 1793 | .mmx, | ||
| 1794 | .slow_unaligned_mem_16, | ||
| 1795 | .sse, | ||
| 1796 | .vzeroupper, | ||
| 1797 | .x87, | ||
| 1798 | }), | ||
| 1799 | }; | ||
| 1800 | pub const cannonlake = CpuModel{ | ||
| 1801 | .name = "cannonlake", | ||
| 1802 | .llvm_name = "cannonlake", | ||
| 1803 | .features = featureSet(&[_]Feature{ | ||
| 1804 | .@"64bit", | ||
| 1805 | .adx, | ||
| 1806 | .aes, | ||
| 1807 | .allow_light_256_bit, | ||
| 1808 | .avx512cd, | ||
| 1809 | .avx512dq, | ||
| 1810 | .avx512ifma, | ||
| 1811 | .avx512vbmi, | ||
| 1812 | .avx512vl, | ||
| 1813 | .bmi, | ||
| 1814 | .bmi2, | ||
| 1815 | .clflushopt, | ||
| 1816 | .cmov, | ||
| 1817 | .crc32, | ||
| 1818 | .cx16, | ||
| 1819 | .ermsb, | ||
| 1820 | .fast_15bytenop, | ||
| 1821 | .fast_gather, | ||
| 1822 | .fast_scalar_fsqrt, | ||
| 1823 | .fast_shld_rotate, | ||
| 1824 | .fast_variable_crosslane_shuffle, | ||
| 1825 | .fast_variable_perlane_shuffle, | ||
| 1826 | .fast_vector_fsqrt, | ||
| 1827 | .fsgsbase, | ||
| 1828 | .fxsr, | ||
| 1829 | .idivq_to_divl, | ||
| 1830 | .invpcid, | ||
| 1831 | .lzcnt, | ||
| 1832 | .macrofusion, | ||
| 1833 | .mmx, | ||
| 1834 | .movbe, | ||
| 1835 | .no_bypass_delay_blend, | ||
| 1836 | .no_bypass_delay_mov, | ||
| 1837 | .no_bypass_delay_shuffle, | ||
| 1838 | .nopl, | ||
| 1839 | .pclmul, | ||
| 1840 | .pku, | ||
| 1841 | .popcnt, | ||
| 1842 | .prefer_256_bit, | ||
| 1843 | .prfchw, | ||
| 1844 | .rdrnd, | ||
| 1845 | .rdseed, | ||
| 1846 | .sahf, | ||
| 1847 | .sha, | ||
| 1848 | .slow_3ops_lea, | ||
| 1849 | .tuning_fast_imm_vector_shift, | ||
| 1850 | .vzeroupper, | ||
| 1851 | .x87, | ||
| 1852 | .xsavec, | ||
| 1853 | .xsaveopt, | ||
| 1854 | .xsaves, | ||
| 1855 | }), | ||
| 1856 | }; | ||
| 1857 | pub const cascadelake = CpuModel{ | ||
| 1858 | .name = "cascadelake", | ||
| 1859 | .llvm_name = "cascadelake", | ||
| 1860 | .features = featureSet(&[_]Feature{ | ||
| 1861 | .@"64bit", | ||
| 1862 | .adx, | ||
| 1863 | .aes, | ||
| 1864 | .allow_light_256_bit, | ||
| 1865 | .avx512bw, | ||
| 1866 | .avx512cd, | ||
| 1867 | .avx512dq, | ||
| 1868 | .avx512vl, | ||
| 1869 | .avx512vnni, | ||
| 1870 | .bmi, | ||
| 1871 | .bmi2, | ||
| 1872 | .clflushopt, | ||
| 1873 | .clwb, | ||
| 1874 | .cmov, | ||
| 1875 | .crc32, | ||
| 1876 | .cx16, | ||
| 1877 | .ermsb, | ||
| 1878 | .false_deps_popcnt, | ||
| 1879 | .fast_15bytenop, | ||
| 1880 | .fast_gather, | ||
| 1881 | .fast_scalar_fsqrt, | ||
| 1882 | .fast_shld_rotate, | ||
| 1883 | .fast_variable_crosslane_shuffle, | ||
| 1884 | .fast_variable_perlane_shuffle, | ||
| 1885 | .fast_vector_fsqrt, | ||
| 1886 | .faster_shift_than_shuffle, | ||
| 1887 | .fsgsbase, | ||
| 1888 | .fxsr, | ||
| 1889 | .idivq_to_divl, | ||
| 1890 | .invpcid, | ||
| 1891 | .lzcnt, | ||
| 1892 | .macrofusion, | ||
| 1893 | .mmx, | ||
| 1894 | .movbe, | ||
| 1895 | .no_bypass_delay_blend, | ||
| 1896 | .no_bypass_delay_mov, | ||
| 1897 | .no_bypass_delay_shuffle, | ||
| 1898 | .nopl, | ||
| 1899 | .pclmul, | ||
| 1900 | .pku, | ||
| 1901 | .popcnt, | ||
| 1902 | .prefer_256_bit, | ||
| 1903 | .prfchw, | ||
| 1904 | .rdrnd, | ||
| 1905 | .rdseed, | ||
| 1906 | .sahf, | ||
| 1907 | .slow_3ops_lea, | ||
| 1908 | .tuning_fast_imm_vector_shift, | ||
| 1909 | .vzeroupper, | ||
| 1910 | .x87, | ||
| 1911 | .xsavec, | ||
| 1912 | .xsaveopt, | ||
| 1913 | .xsaves, | ||
| 1914 | }), | ||
| 1915 | }; | ||
| 1916 | pub const cooperlake = CpuModel{ | ||
| 1917 | .name = "cooperlake", | ||
| 1918 | .llvm_name = "cooperlake", | ||
| 1919 | .features = featureSet(&[_]Feature{ | ||
| 1920 | .@"64bit", | ||
| 1921 | .adx, | ||
| 1922 | .aes, | ||
| 1923 | .allow_light_256_bit, | ||
| 1924 | .avx512bf16, | ||
| 1925 | .avx512cd, | ||
| 1926 | .avx512dq, | ||
| 1927 | .avx512vl, | ||
| 1928 | .avx512vnni, | ||
| 1929 | .bmi, | ||
| 1930 | .bmi2, | ||
| 1931 | .clflushopt, | ||
| 1932 | .clwb, | ||
| 1933 | .cmov, | ||
| 1934 | .crc32, | ||
| 1935 | .cx16, | ||
| 1936 | .ermsb, | ||
| 1937 | .false_deps_popcnt, | ||
| 1938 | .fast_15bytenop, | ||
| 1939 | .fast_gather, | ||
| 1940 | .fast_scalar_fsqrt, | ||
| 1941 | .fast_shld_rotate, | ||
| 1942 | .fast_variable_crosslane_shuffle, | ||
| 1943 | .fast_variable_perlane_shuffle, | ||
| 1944 | .fast_vector_fsqrt, | ||
| 1945 | .faster_shift_than_shuffle, | ||
| 1946 | .fsgsbase, | ||
| 1947 | .fxsr, | ||
| 1948 | .idivq_to_divl, | ||
| 1949 | .invpcid, | ||
| 1950 | .lzcnt, | ||
| 1951 | .macrofusion, | ||
| 1952 | .mmx, | ||
| 1953 | .movbe, | ||
| 1954 | .no_bypass_delay_blend, | ||
| 1955 | .no_bypass_delay_mov, | ||
| 1956 | .no_bypass_delay_shuffle, | ||
| 1957 | .nopl, | ||
| 1958 | .pclmul, | ||
| 1959 | .pku, | ||
| 1960 | .popcnt, | ||
| 1961 | .prefer_256_bit, | ||
| 1962 | .prfchw, | ||
| 1963 | .rdrnd, | ||
| 1964 | .rdseed, | ||
| 1965 | .sahf, | ||
| 1966 | .slow_3ops_lea, | ||
| 1967 | .tuning_fast_imm_vector_shift, | ||
| 1968 | .vzeroupper, | ||
| 1969 | .x87, | ||
| 1970 | .xsavec, | ||
| 1971 | .xsaveopt, | ||
| 1972 | .xsaves, | ||
| 1973 | }), | ||
| 1974 | }; | ||
| 1975 | pub const core2 = CpuModel{ | ||
| 1976 | .name = "core2", | ||
| 1977 | .llvm_name = "core2", | ||
| 1978 | .features = featureSet(&[_]Feature{ | ||
| 1979 | .@"64bit", | ||
| 1980 | .cmov, | ||
| 1981 | .cx16, | ||
| 1982 | .fxsr, | ||
| 1983 | .macrofusion, | ||
| 1984 | .mmx, | ||
| 1985 | .nopl, | ||
| 1986 | .sahf, | ||
| 1987 | .slow_unaligned_mem_16, | ||
| 1988 | .ssse3, | ||
| 1989 | .vzeroupper, | ||
| 1990 | .x87, | ||
| 1991 | }), | ||
| 1992 | }; | ||
| 1993 | pub const corei7 = CpuModel{ | ||
| 1994 | .name = "corei7", | ||
| 1995 | .llvm_name = "corei7", | ||
| 1996 | .features = featureSet(&[_]Feature{ | ||
| 1997 | .@"64bit", | ||
| 1998 | .cmov, | ||
| 1999 | .crc32, | ||
| 2000 | .cx16, | ||
| 2001 | .fxsr, | ||
| 2002 | .macrofusion, | ||
| 2003 | .mmx, | ||
| 2004 | .no_bypass_delay_mov, | ||
| 2005 | .nopl, | ||
| 2006 | .popcnt, | ||
| 2007 | .sahf, | ||
| 2008 | .sse4_2, | ||
| 2009 | .vzeroupper, | ||
| 2010 | .x87, | ||
| 2011 | }), | ||
| 2012 | }; | ||
| 2013 | pub const emeraldrapids = CpuModel{ | ||
| 2014 | .name = "emeraldrapids", | ||
| 2015 | .llvm_name = "emeraldrapids", | ||
| 2016 | .features = featureSet(&[_]Feature{ | ||
| 2017 | .@"64bit", | ||
| 2018 | .adx, | ||
| 2019 | .allow_light_256_bit, | ||
| 2020 | .amx_bf16, | ||
| 2021 | .amx_int8, | ||
| 2022 | .avx512bf16, | ||
| 2023 | .avx512bitalg, | ||
| 2024 | .avx512cd, | ||
| 2025 | .avx512fp16, | ||
| 2026 | .avx512ifma, | ||
| 2027 | .avx512vbmi, | ||
| 2028 | .avx512vbmi2, | ||
| 2029 | .avx512vnni, | ||
| 2030 | .avx512vpopcntdq, | ||
| 2031 | .avxvnni, | ||
| 2032 | .bmi, | ||
| 2033 | .bmi2, | ||
| 2034 | .cldemote, | ||
| 2035 | .clflushopt, | ||
| 2036 | .clwb, | ||
| 2037 | .cmov, | ||
| 2038 | .crc32, | ||
| 2039 | .cx16, | ||
| 2040 | .enqcmd, | ||
| 2041 | .ermsb, | ||
| 2042 | .false_deps_getmant, | ||
| 2043 | .false_deps_mulc, | ||
| 2044 | .false_deps_mullq, | ||
| 2045 | .false_deps_perm, | ||
| 2046 | .false_deps_range, | ||
| 2047 | .fast_15bytenop, | ||
| 2048 | .fast_gather, | ||
| 2049 | .fast_scalar_fsqrt, | ||
| 2050 | .fast_shld_rotate, | ||
| 2051 | .fast_variable_crosslane_shuffle, | ||
| 2052 | .fast_variable_perlane_shuffle, | ||
| 2053 | .fast_vector_fsqrt, | ||
| 2054 | .fsgsbase, | ||
| 2055 | .fsrm, | ||
| 2056 | .fxsr, | ||
| 2057 | .gfni, | ||
| 2058 | .idivq_to_divl, | ||
| 2059 | .invpcid, | ||
| 2060 | .lzcnt, | ||
| 2061 | .macrofusion, | ||
| 2062 | .mmx, | ||
| 2063 | .movbe, | ||
| 2064 | .movdir64b, | ||
| 2065 | .movdiri, | ||
| 2066 | .no_bypass_delay_blend, | ||
| 2067 | .no_bypass_delay_mov, | ||
| 2068 | .no_bypass_delay_shuffle, | ||
| 2069 | .nopl, | ||
| 2070 | .pconfig, | ||
| 2071 | .pku, | ||
| 2072 | .popcnt, | ||
| 2073 | .prefer_256_bit, | ||
| 2074 | .prfchw, | ||
| 2075 | .ptwrite, | ||
| 2076 | .rdpid, | ||
| 2077 | .rdrnd, | ||
| 2078 | .rdseed, | ||
| 2079 | .sahf, | ||
| 2080 | .serialize, | ||
| 2081 | .sha, | ||
| 2082 | .shstk, | ||
| 2083 | .tsxldtrk, | ||
| 2084 | .tuning_fast_imm_vector_shift, | ||
| 2085 | .uintr, | ||
| 2086 | .vaes, | ||
| 2087 | .vpclmulqdq, | ||
| 2088 | .vzeroupper, | ||
| 2089 | .waitpkg, | ||
| 2090 | .wbnoinvd, | ||
| 2091 | .x87, | ||
| 2092 | .xsavec, | ||
| 2093 | .xsaveopt, | ||
| 2094 | .xsaves, | ||
| 2095 | }), | ||
| 2096 | }; | ||
| 2097 | pub const generic = CpuModel{ | ||
| 2098 | .name = "generic", | ||
| 2099 | .llvm_name = "generic", | ||
| 2100 | .features = featureSet(&[_]Feature{ | ||
| 2101 | .@"64bit", | ||
| 2102 | .cx8, | ||
| 2103 | .fast_15bytenop, | ||
| 2104 | .fast_scalar_fsqrt, | ||
| 2105 | .idivq_to_divl, | ||
| 2106 | .macrofusion, | ||
| 2107 | .slow_3ops_lea, | ||
| 2108 | .vzeroupper, | ||
| 2109 | .x87, | ||
| 2110 | }), | ||
| 2111 | }; | ||
| 2112 | pub const geode = CpuModel{ | ||
| 2113 | .name = "geode", | ||
| 2114 | .llvm_name = "geode", | ||
| 2115 | .features = featureSet(&[_]Feature{ | ||
| 2116 | .@"3dnowa", | ||
| 2117 | .cx8, | ||
| 2118 | .slow_unaligned_mem_16, | ||
| 2119 | .vzeroupper, | ||
| 2120 | .x87, | ||
| 2121 | }), | ||
| 2122 | }; | ||
| 2123 | pub const goldmont = CpuModel{ | ||
| 2124 | .name = "goldmont", | ||
| 2125 | .llvm_name = "goldmont", | ||
| 2126 | .features = featureSet(&[_]Feature{ | ||
| 2127 | .@"64bit", | ||
| 2128 | .aes, | ||
| 2129 | .clflushopt, | ||
| 2130 | .cmov, | ||
| 2131 | .crc32, | ||
| 2132 | .cx16, | ||
| 2133 | .false_deps_popcnt, | ||
| 2134 | .fast_movbe, | ||
| 2135 | .fsgsbase, | ||
| 2136 | .fxsr, | ||
| 2137 | .mmx, | ||
| 2138 | .movbe, | ||
| 2139 | .no_bypass_delay, | ||
| 2140 | .nopl, | ||
| 2141 | .pclmul, | ||
| 2142 | .popcnt, | ||
| 2143 | .prfchw, | ||
| 2144 | .rdrnd, | ||
| 2145 | .rdseed, | ||
| 2146 | .sahf, | ||
| 2147 | .sha, | ||
| 2148 | .slow_incdec, | ||
| 2149 | .slow_lea, | ||
| 2150 | .slow_two_mem_ops, | ||
| 2151 | .sse4_2, | ||
| 2152 | .use_glm_div_sqrt_costs, | ||
| 2153 | .vzeroupper, | ||
| 2154 | .x87, | ||
| 2155 | .xsavec, | ||
| 2156 | .xsaveopt, | ||
| 2157 | .xsaves, | ||
| 2158 | }), | ||
| 2159 | }; | ||
| 2160 | pub const goldmont_plus = CpuModel{ | ||
| 2161 | .name = "goldmont_plus", | ||
| 2162 | .llvm_name = "goldmont-plus", | ||
| 2163 | .features = featureSet(&[_]Feature{ | ||
| 2164 | .@"64bit", | ||
| 2165 | .aes, | ||
| 2166 | .clflushopt, | ||
| 2167 | .cmov, | ||
| 2168 | .crc32, | ||
| 2169 | .cx16, | ||
| 2170 | .fast_movbe, | ||
| 2171 | .fsgsbase, | ||
| 2172 | .fxsr, | ||
| 2173 | .mmx, | ||
| 2174 | .movbe, | ||
| 2175 | .no_bypass_delay, | ||
| 2176 | .nopl, | ||
| 2177 | .pclmul, | ||
| 2178 | .popcnt, | ||
| 2179 | .prfchw, | ||
| 2180 | .ptwrite, | ||
| 2181 | .rdpid, | ||
| 2182 | .rdrnd, | ||
| 2183 | .rdseed, | ||
| 2184 | .sahf, | ||
| 2185 | .sha, | ||
| 2186 | .slow_incdec, | ||
| 2187 | .slow_lea, | ||
| 2188 | .slow_two_mem_ops, | ||
| 2189 | .sse4_2, | ||
| 2190 | .use_glm_div_sqrt_costs, | ||
| 2191 | .vzeroupper, | ||
| 2192 | .x87, | ||
| 2193 | .xsavec, | ||
| 2194 | .xsaveopt, | ||
| 2195 | .xsaves, | ||
| 2196 | }), | ||
| 2197 | }; | ||
| 2198 | pub const grandridge = CpuModel{ | ||
| 2199 | .name = "grandridge", | ||
| 2200 | .llvm_name = "grandridge", | ||
| 2201 | .features = featureSet(&[_]Feature{ | ||
| 2202 | .@"64bit", | ||
| 2203 | .adx, | ||
| 2204 | .avxifma, | ||
| 2205 | .avxneconvert, | ||
| 2206 | .avxvnni, | ||
| 2207 | .avxvnniint8, | ||
| 2208 | .bmi, | ||
| 2209 | .bmi2, | ||
| 2210 | .cldemote, | ||
| 2211 | .clflushopt, | ||
| 2212 | .clwb, | ||
| 2213 | .cmov, | ||
| 2214 | .cmpccxadd, | ||
| 2215 | .crc32, | ||
| 2216 | .cx16, | ||
| 2217 | .enqcmd, | ||
| 2218 | .f16c, | ||
| 2219 | .fast_movbe, | ||
| 2220 | .fma, | ||
| 2221 | .fsgsbase, | ||
| 2222 | .fxsr, | ||
| 2223 | .gfni, | ||
| 2224 | .hreset, | ||
| 2225 | .invpcid, | ||
| 2226 | .lzcnt, | ||
| 2227 | .mmx, | ||
| 2228 | .movbe, | ||
| 2229 | .movdir64b, | ||
| 2230 | .movdiri, | ||
| 2231 | .no_bypass_delay, | ||
| 2232 | .nopl, | ||
| 2233 | .pconfig, | ||
| 2234 | .pku, | ||
| 2235 | .popcnt, | ||
| 2236 | .prfchw, | ||
| 2237 | .ptwrite, | ||
| 2238 | .raoint, | ||
| 2239 | .rdpid, | ||
| 2240 | .rdrnd, | ||
| 2241 | .rdseed, | ||
| 2242 | .sahf, | ||
| 2243 | .serialize, | ||
| 2244 | .sha, | ||
| 2245 | .shstk, | ||
| 2246 | .slow_incdec, | ||
| 2247 | .slow_lea, | ||
| 2248 | .slow_two_mem_ops, | ||
| 2249 | .uintr, | ||
| 2250 | .use_glm_div_sqrt_costs, | ||
| 2251 | .vaes, | ||
| 2252 | .vpclmulqdq, | ||
| 2253 | .vzeroupper, | ||
| 2254 | .waitpkg, | ||
| 2255 | .widekl, | ||
| 2256 | .x87, | ||
| 2257 | .xsavec, | ||
| 2258 | .xsaveopt, | ||
| 2259 | .xsaves, | ||
| 2260 | }), | ||
| 2261 | }; | ||
| 2262 | pub const graniterapids = CpuModel{ | ||
| 2263 | .name = "graniterapids", | ||
| 2264 | .llvm_name = "graniterapids", | ||
| 2265 | .features = featureSet(&[_]Feature{ | ||
| 2266 | .@"64bit", | ||
| 2267 | .adx, | ||
| 2268 | .allow_light_256_bit, | ||
| 2269 | .amx_bf16, | ||
| 2270 | .amx_fp16, | ||
| 2271 | .amx_int8, | ||
| 2272 | .avx512bf16, | ||
| 2273 | .avx512bitalg, | ||
| 2274 | .avx512cd, | ||
| 2275 | .avx512fp16, | ||
| 2276 | .avx512ifma, | ||
| 2277 | .avx512vbmi, | ||
| 2278 | .avx512vbmi2, | ||
| 2279 | .avx512vnni, | ||
| 2280 | .avx512vpopcntdq, | ||
| 2281 | .avxvnni, | ||
| 2282 | .bmi, | ||
| 2283 | .bmi2, | ||
| 2284 | .cldemote, | ||
| 2285 | .clflushopt, | ||
| 2286 | .clwb, | ||
| 2287 | .cmov, | ||
| 2288 | .crc32, | ||
| 2289 | .cx16, | ||
| 2290 | .enqcmd, | ||
| 2291 | .ermsb, | ||
| 2292 | .false_deps_getmant, | ||
| 2293 | .false_deps_mulc, | ||
| 2294 | .false_deps_mullq, | ||
| 2295 | .false_deps_perm, | ||
| 2296 | .false_deps_range, | ||
| 2297 | .fast_15bytenop, | ||
| 2298 | .fast_gather, | ||
| 2299 | .fast_scalar_fsqrt, | ||
| 2300 | .fast_shld_rotate, | ||
| 2301 | .fast_variable_crosslane_shuffle, | ||
| 2302 | .fast_variable_perlane_shuffle, | ||
| 2303 | .fast_vector_fsqrt, | ||
| 2304 | .fsgsbase, | ||
| 2305 | .fsrm, | ||
| 2306 | .fxsr, | ||
| 2307 | .gfni, | ||
| 2308 | .idivq_to_divl, | ||
| 2309 | .invpcid, | ||
| 2310 | .lzcnt, | ||
| 2311 | .macrofusion, | ||
| 2312 | .mmx, | ||
| 2313 | .movbe, | ||
| 2314 | .movdir64b, | ||
| 2315 | .movdiri, | ||
| 2316 | .no_bypass_delay_blend, | ||
| 2317 | .no_bypass_delay_mov, | ||
| 2318 | .no_bypass_delay_shuffle, | ||
| 2319 | .nopl, | ||
| 2320 | .pconfig, | ||
| 2321 | .pku, | ||
| 2322 | .popcnt, | ||
| 2323 | .prefer_256_bit, | ||
| 2324 | .prefetchi, | ||
| 2325 | .prfchw, | ||
| 2326 | .ptwrite, | ||
| 2327 | .rdpid, | ||
| 2328 | .rdrnd, | ||
| 2329 | .rdseed, | ||
| 2330 | .sahf, | ||
| 2331 | .serialize, | ||
| 2332 | .sha, | ||
| 2333 | .shstk, | ||
| 2334 | .tsxldtrk, | ||
| 2335 | .tuning_fast_imm_vector_shift, | ||
| 2336 | .uintr, | ||
| 2337 | .vaes, | ||
| 2338 | .vpclmulqdq, | ||
| 2339 | .vzeroupper, | ||
| 2340 | .waitpkg, | ||
| 2341 | .wbnoinvd, | ||
| 2342 | .x87, | ||
| 2343 | .xsavec, | ||
| 2344 | .xsaveopt, | ||
| 2345 | .xsaves, | ||
| 2346 | }), | ||
| 2347 | }; | ||
| 2348 | pub const graniterapids_d = CpuModel{ | ||
| 2349 | .name = "graniterapids_d", | ||
| 2350 | .llvm_name = "graniterapids-d", | ||
| 2351 | .features = featureSet(&[_]Feature{ | ||
| 2352 | .@"64bit", | ||
| 2353 | .adx, | ||
| 2354 | .allow_light_256_bit, | ||
| 2355 | .amx_bf16, | ||
| 2356 | .amx_complex, | ||
| 2357 | .amx_fp16, | ||
| 2358 | .amx_int8, | ||
| 2359 | .avx512bf16, | ||
| 2360 | .avx512bitalg, | ||
| 2361 | .avx512cd, | ||
| 2362 | .avx512fp16, | ||
| 2363 | .avx512ifma, | ||
| 2364 | .avx512vbmi, | ||
| 2365 | .avx512vbmi2, | ||
| 2366 | .avx512vnni, | ||
| 2367 | .avx512vpopcntdq, | ||
| 2368 | .avxvnni, | ||
| 2369 | .bmi, | ||
| 2370 | .bmi2, | ||
| 2371 | .cldemote, | ||
| 2372 | .clflushopt, | ||
| 2373 | .clwb, | ||
| 2374 | .cmov, | ||
| 2375 | .crc32, | ||
| 2376 | .cx16, | ||
| 2377 | .enqcmd, | ||
| 2378 | .ermsb, | ||
| 2379 | .false_deps_getmant, | ||
| 2380 | .false_deps_mulc, | ||
| 2381 | .false_deps_mullq, | ||
| 2382 | .false_deps_perm, | ||
| 2383 | .false_deps_range, | ||
| 2384 | .fast_15bytenop, | ||
| 2385 | .fast_gather, | ||
| 2386 | .fast_scalar_fsqrt, | ||
| 2387 | .fast_shld_rotate, | ||
| 2388 | .fast_variable_crosslane_shuffle, | ||
| 2389 | .fast_variable_perlane_shuffle, | ||
| 2390 | .fast_vector_fsqrt, | ||
| 2391 | .fsgsbase, | ||
| 2392 | .fsrm, | ||
| 2393 | .fxsr, | ||
| 2394 | .gfni, | ||
| 2395 | .idivq_to_divl, | ||
| 2396 | .invpcid, | ||
| 2397 | .lzcnt, | ||
| 2398 | .macrofusion, | ||
| 2399 | .mmx, | ||
| 2400 | .movbe, | ||
| 2401 | .movdir64b, | ||
| 2402 | .movdiri, | ||
| 2403 | .no_bypass_delay_blend, | ||
| 2404 | .no_bypass_delay_mov, | ||
| 2405 | .no_bypass_delay_shuffle, | ||
| 2406 | .nopl, | ||
| 2407 | .pconfig, | ||
| 2408 | .pku, | ||
| 2409 | .popcnt, | ||
| 2410 | .prefer_256_bit, | ||
| 2411 | .prefetchi, | ||
| 2412 | .prfchw, | ||
| 2413 | .ptwrite, | ||
| 2414 | .rdpid, | ||
| 2415 | .rdrnd, | ||
| 2416 | .rdseed, | ||
| 2417 | .sahf, | ||
| 2418 | .serialize, | ||
| 2419 | .sha, | ||
| 2420 | .shstk, | ||
| 2421 | .tsxldtrk, | ||
| 2422 | .tuning_fast_imm_vector_shift, | ||
| 2423 | .uintr, | ||
| 2424 | .vaes, | ||
| 2425 | .vpclmulqdq, | ||
| 2426 | .vzeroupper, | ||
| 2427 | .waitpkg, | ||
| 2428 | .wbnoinvd, | ||
| 2429 | .x87, | ||
| 2430 | .xsavec, | ||
| 2431 | .xsaveopt, | ||
| 2432 | .xsaves, | ||
| 2433 | }), | ||
| 2434 | }; | ||
| 2435 | pub const haswell = CpuModel{ | ||
| 2436 | .name = "haswell", | ||
| 2437 | .llvm_name = "haswell", | ||
| 2438 | .features = featureSet(&[_]Feature{ | ||
| 2439 | .@"64bit", | ||
| 2440 | .allow_light_256_bit, | ||
| 2441 | .avx2, | ||
| 2442 | .bmi, | ||
| 2443 | .bmi2, | ||
| 2444 | .cmov, | ||
| 2445 | .crc32, | ||
| 2446 | .cx16, | ||
| 2447 | .ermsb, | ||
| 2448 | .f16c, | ||
| 2449 | .false_deps_lzcnt_tzcnt, | ||
| 2450 | .false_deps_popcnt, | ||
| 2451 | .fast_15bytenop, | ||
| 2452 | .fast_scalar_fsqrt, | ||
| 2453 | .fast_shld_rotate, | ||
| 2454 | .fast_variable_crosslane_shuffle, | ||
| 2455 | .fast_variable_perlane_shuffle, | ||
| 2456 | .fma, | ||
| 2457 | .fsgsbase, | ||
| 2458 | .fxsr, | ||
| 2459 | .idivq_to_divl, | ||
| 2460 | .invpcid, | ||
| 2461 | .lzcnt, | ||
| 2462 | .macrofusion, | ||
| 2463 | .mmx, | ||
| 2464 | .movbe, | ||
| 2465 | .no_bypass_delay_mov, | ||
| 2466 | .no_bypass_delay_shuffle, | ||
| 2467 | .nopl, | ||
| 2468 | .pclmul, | ||
| 2469 | .popcnt, | ||
| 2470 | .rdrnd, | ||
| 2471 | .sahf, | ||
| 2472 | .slow_3ops_lea, | ||
| 2473 | .vzeroupper, | ||
| 2474 | .x87, | ||
| 2475 | .xsaveopt, | ||
| 2476 | }), | ||
| 2477 | }; | ||
| 2478 | pub const @"i386" = CpuModel{ | ||
| 2479 | .name = "i386", | ||
| 2480 | .llvm_name = "i386", | ||
| 2481 | .features = featureSet(&[_]Feature{ | ||
| 2482 | .slow_unaligned_mem_16, | ||
| 2483 | .vzeroupper, | ||
| 2484 | .x87, | ||
| 2485 | }), | ||
| 2486 | }; | ||
| 2487 | pub const @"i486" = CpuModel{ | ||
| 2488 | .name = "i486", | ||
| 2489 | .llvm_name = "i486", | ||
| 2490 | .features = featureSet(&[_]Feature{ | ||
| 2491 | .slow_unaligned_mem_16, | ||
| 2492 | .vzeroupper, | ||
| 2493 | .x87, | ||
| 2494 | }), | ||
| 2495 | }; | ||
| 2496 | pub const @"i586" = CpuModel{ | ||
| 2497 | .name = "i586", | ||
| 2498 | .llvm_name = "i586", | ||
| 2499 | .features = featureSet(&[_]Feature{ | ||
| 2500 | .cx8, | ||
| 2501 | .slow_unaligned_mem_16, | ||
| 2502 | .vzeroupper, | ||
| 2503 | .x87, | ||
| 2504 | }), | ||
| 2505 | }; | ||
| 2506 | pub const @"i686" = CpuModel{ | ||
| 2507 | .name = "i686", | ||
| 2508 | .llvm_name = "i686", | ||
| 2509 | .features = featureSet(&[_]Feature{ | ||
| 2510 | .cmov, | ||
| 2511 | .cx8, | ||
| 2512 | .slow_unaligned_mem_16, | ||
| 2513 | .vzeroupper, | ||
| 2514 | .x87, | ||
| 2515 | }), | ||
| 2516 | }; | ||
| 2517 | pub const icelake_client = CpuModel{ | ||
| 2518 | .name = "icelake_client", | ||
| 2519 | .llvm_name = "icelake-client", | ||
| 2520 | .features = featureSet(&[_]Feature{ | ||
| 2521 | .@"64bit", | ||
| 2522 | .adx, | ||
| 2523 | .allow_light_256_bit, | ||
| 2524 | .avx512bitalg, | ||
| 2525 | .avx512cd, | ||
| 2526 | .avx512dq, | ||
| 2527 | .avx512ifma, | ||
| 2528 | .avx512vbmi, | ||
| 2529 | .avx512vbmi2, | ||
| 2530 | .avx512vl, | ||
| 2531 | .avx512vnni, | ||
| 2532 | .avx512vpopcntdq, | ||
| 2533 | .bmi, | ||
| 2534 | .bmi2, | ||
| 2535 | .clflushopt, | ||
| 2536 | .cmov, | ||
| 2537 | .crc32, | ||
| 2538 | .cx16, | ||
| 2539 | .ermsb, | ||
| 2540 | .fast_15bytenop, | ||
| 2541 | .fast_gather, | ||
| 2542 | .fast_scalar_fsqrt, | ||
| 2543 | .fast_shld_rotate, | ||
| 2544 | .fast_variable_crosslane_shuffle, | ||
| 2545 | .fast_variable_perlane_shuffle, | ||
| 2546 | .fast_vector_fsqrt, | ||
| 2547 | .fsgsbase, | ||
| 2548 | .fsrm, | ||
| 2549 | .fxsr, | ||
| 2550 | .gfni, | ||
| 2551 | .idivq_to_divl, | ||
| 2552 | .invpcid, | ||
| 2553 | .lzcnt, | ||
| 2554 | .macrofusion, | ||
| 2555 | .mmx, | ||
| 2556 | .movbe, | ||
| 2557 | .no_bypass_delay_blend, | ||
| 2558 | .no_bypass_delay_mov, | ||
| 2559 | .no_bypass_delay_shuffle, | ||
| 2560 | .nopl, | ||
| 2561 | .pku, | ||
| 2562 | .popcnt, | ||
| 2563 | .prefer_256_bit, | ||
| 2564 | .prfchw, | ||
| 2565 | .rdpid, | ||
| 2566 | .rdrnd, | ||
| 2567 | .rdseed, | ||
| 2568 | .sahf, | ||
| 2569 | .sha, | ||
| 2570 | .tuning_fast_imm_vector_shift, | ||
| 2571 | .vaes, | ||
| 2572 | .vpclmulqdq, | ||
| 2573 | .vzeroupper, | ||
| 2574 | .x87, | ||
| 2575 | .xsavec, | ||
| 2576 | .xsaveopt, | ||
| 2577 | .xsaves, | ||
| 2578 | }), | ||
| 2579 | }; | ||
| 2580 | pub const icelake_server = CpuModel{ | ||
| 2581 | .name = "icelake_server", | ||
| 2582 | .llvm_name = "icelake-server", | ||
| 2583 | .features = featureSet(&[_]Feature{ | ||
| 2584 | .@"64bit", | ||
| 2585 | .adx, | ||
| 2586 | .allow_light_256_bit, | ||
| 2587 | .avx512bitalg, | ||
| 2588 | .avx512cd, | ||
| 2589 | .avx512dq, | ||
| 2590 | .avx512ifma, | ||
| 2591 | .avx512vbmi, | ||
| 2592 | .avx512vbmi2, | ||
| 2593 | .avx512vl, | ||
| 2594 | .avx512vnni, | ||
| 2595 | .avx512vpopcntdq, | ||
| 2596 | .bmi, | ||
| 2597 | .bmi2, | ||
| 2598 | .clflushopt, | ||
| 2599 | .clwb, | ||
| 2600 | .cmov, | ||
| 2601 | .crc32, | ||
| 2602 | .cx16, | ||
| 2603 | .ermsb, | ||
| 2604 | .fast_15bytenop, | ||
| 2605 | .fast_gather, | ||
| 2606 | .fast_scalar_fsqrt, | ||
| 2607 | .fast_shld_rotate, | ||
| 2608 | .fast_variable_crosslane_shuffle, | ||
| 2609 | .fast_variable_perlane_shuffle, | ||
| 2610 | .fast_vector_fsqrt, | ||
| 2611 | .fsgsbase, | ||
| 2612 | .fsrm, | ||
| 2613 | .fxsr, | ||
| 2614 | .gfni, | ||
| 2615 | .idivq_to_divl, | ||
| 2616 | .invpcid, | ||
| 2617 | .lzcnt, | ||
| 2618 | .macrofusion, | ||
| 2619 | .mmx, | ||
| 2620 | .movbe, | ||
| 2621 | .no_bypass_delay_blend, | ||
| 2622 | .no_bypass_delay_mov, | ||
| 2623 | .no_bypass_delay_shuffle, | ||
| 2624 | .nopl, | ||
| 2625 | .pconfig, | ||
| 2626 | .pku, | ||
| 2627 | .popcnt, | ||
| 2628 | .prefer_256_bit, | ||
| 2629 | .prfchw, | ||
| 2630 | .rdpid, | ||
| 2631 | .rdrnd, | ||
| 2632 | .rdseed, | ||
| 2633 | .sahf, | ||
| 2634 | .sha, | ||
| 2635 | .tuning_fast_imm_vector_shift, | ||
| 2636 | .vaes, | ||
| 2637 | .vpclmulqdq, | ||
| 2638 | .vzeroupper, | ||
| 2639 | .wbnoinvd, | ||
| 2640 | .x87, | ||
| 2641 | .xsavec, | ||
| 2642 | .xsaveopt, | ||
| 2643 | .xsaves, | ||
| 2644 | }), | ||
| 2645 | }; | ||
| 2646 | pub const ivybridge = CpuModel{ | ||
| 2647 | .name = "ivybridge", | ||
| 2648 | .llvm_name = "ivybridge", | ||
| 2649 | .features = featureSet(&[_]Feature{ | ||
| 2650 | .@"64bit", | ||
| 2651 | .cmov, | ||
| 2652 | .crc32, | ||
| 2653 | .cx16, | ||
| 2654 | .f16c, | ||
| 2655 | .false_deps_popcnt, | ||
| 2656 | .fast_15bytenop, | ||
| 2657 | .fast_scalar_fsqrt, | ||
| 2658 | .fast_shld_rotate, | ||
| 2659 | .fsgsbase, | ||
| 2660 | .fxsr, | ||
| 2661 | .idivq_to_divl, | ||
| 2662 | .macrofusion, | ||
| 2663 | .mmx, | ||
| 2664 | .no_bypass_delay_mov, | ||
| 2665 | .nopl, | ||
| 2666 | .pclmul, | ||
| 2667 | .popcnt, | ||
| 2668 | .rdrnd, | ||
| 2669 | .sahf, | ||
| 2670 | .slow_3ops_lea, | ||
| 2671 | .slow_unaligned_mem_32, | ||
| 2672 | .vzeroupper, | ||
| 2673 | .x87, | ||
| 2674 | .xsaveopt, | ||
| 2675 | }), | ||
| 2676 | }; | ||
| 2677 | pub const k6 = CpuModel{ | ||
| 2678 | .name = "k6", | ||
| 2679 | .llvm_name = "k6", | ||
| 2680 | .features = featureSet(&[_]Feature{ | ||
| 2681 | .cx8, | ||
| 2682 | .mmx, | ||
| 2683 | .slow_unaligned_mem_16, | ||
| 2684 | .vzeroupper, | ||
| 2685 | .x87, | ||
| 2686 | }), | ||
| 2687 | }; | ||
| 2688 | pub const k6_2 = CpuModel{ | ||
| 2689 | .name = "k6_2", | ||
| 2690 | .llvm_name = "k6-2", | ||
| 2691 | .features = featureSet(&[_]Feature{ | ||
| 2692 | .@"3dnow", | ||
| 2693 | .cx8, | ||
| 2694 | .slow_unaligned_mem_16, | ||
| 2695 | .vzeroupper, | ||
| 2696 | .x87, | ||
| 2697 | }), | ||
| 2698 | }; | ||
| 2699 | pub const k6_3 = CpuModel{ | ||
| 2700 | .name = "k6_3", | ||
| 2701 | .llvm_name = "k6-3", | ||
| 2702 | .features = featureSet(&[_]Feature{ | ||
| 2703 | .@"3dnow", | ||
| 2704 | .cx8, | ||
| 2705 | .slow_unaligned_mem_16, | ||
| 2706 | .vzeroupper, | ||
| 2707 | .x87, | ||
| 2708 | }), | ||
| 2709 | }; | ||
| 2710 | pub const k8 = CpuModel{ | ||
| 2711 | .name = "k8", | ||
| 2712 | .llvm_name = "k8", | ||
| 2713 | .features = featureSet(&[_]Feature{ | ||
| 2714 | .@"3dnowa", | ||
| 2715 | .@"64bit", | ||
| 2716 | .cmov, | ||
| 2717 | .cx8, | ||
| 2718 | .fast_scalar_shift_masks, | ||
| 2719 | .fxsr, | ||
| 2720 | .nopl, | ||
| 2721 | .sbb_dep_breaking, | ||
| 2722 | .slow_shld, | ||
| 2723 | .slow_unaligned_mem_16, | ||
| 2724 | .sse2, | ||
| 2725 | .vzeroupper, | ||
| 2726 | .x87, | ||
| 2727 | }), | ||
| 2728 | }; | ||
| 2729 | pub const k8_sse3 = CpuModel{ | ||
| 2730 | .name = "k8_sse3", | ||
| 2731 | .llvm_name = "k8-sse3", | ||
| 2732 | .features = featureSet(&[_]Feature{ | ||
| 2733 | .@"3dnowa", | ||
| 2734 | .@"64bit", | ||
| 2735 | .cmov, | ||
| 2736 | .cx16, | ||
| 2737 | .fast_scalar_shift_masks, | ||
| 2738 | .fxsr, | ||
| 2739 | .nopl, | ||
| 2740 | .sbb_dep_breaking, | ||
| 2741 | .slow_shld, | ||
| 2742 | .slow_unaligned_mem_16, | ||
| 2743 | .sse3, | ||
| 2744 | .vzeroupper, | ||
| 2745 | .x87, | ||
| 2746 | }), | ||
| 2747 | }; | ||
| 2748 | pub const knl = CpuModel{ | ||
| 2749 | .name = "knl", | ||
| 2750 | .llvm_name = "knl", | ||
| 2751 | .features = featureSet(&[_]Feature{ | ||
| 2752 | .@"64bit", | ||
| 2753 | .adx, | ||
| 2754 | .aes, | ||
| 2755 | .avx512cd, | ||
| 2756 | .avx512er, | ||
| 2757 | .avx512pf, | ||
| 2758 | .bmi, | ||
| 2759 | .bmi2, | ||
| 2760 | .cmov, | ||
| 2761 | .crc32, | ||
| 2762 | .cx16, | ||
| 2763 | .fast_gather, | ||
| 2764 | .fast_movbe, | ||
| 2765 | .fsgsbase, | ||
| 2766 | .fxsr, | ||
| 2767 | .idivq_to_divl, | ||
| 2768 | .lzcnt, | ||
| 2769 | .mmx, | ||
| 2770 | .movbe, | ||
| 2771 | .nopl, | ||
| 2772 | .pclmul, | ||
| 2773 | .popcnt, | ||
| 2774 | .prefer_mask_registers, | ||
| 2775 | .prefetchwt1, | ||
| 2776 | .prfchw, | ||
| 2777 | .rdrnd, | ||
| 2778 | .rdseed, | ||
| 2779 | .sahf, | ||
| 2780 | .slow_3ops_lea, | ||
| 2781 | .slow_incdec, | ||
| 2782 | .slow_pmaddwd, | ||
| 2783 | .slow_two_mem_ops, | ||
| 2784 | .x87, | ||
| 2785 | .xsaveopt, | ||
| 2786 | }), | ||
| 2787 | }; | ||
| 2788 | pub const knm = CpuModel{ | ||
| 2789 | .name = "knm", | ||
| 2790 | .llvm_name = "knm", | ||
| 2791 | .features = featureSet(&[_]Feature{ | ||
| 2792 | .@"64bit", | ||
| 2793 | .adx, | ||
| 2794 | .aes, | ||
| 2795 | .avx512cd, | ||
| 2796 | .avx512er, | ||
| 2797 | .avx512pf, | ||
| 2798 | .avx512vpopcntdq, | ||
| 2799 | .bmi, | ||
| 2800 | .bmi2, | ||
| 2801 | .cmov, | ||
| 2802 | .crc32, | ||
| 2803 | .cx16, | ||
| 2804 | .fast_gather, | ||
| 2805 | .fast_movbe, | ||
| 2806 | .fsgsbase, | ||
| 2807 | .fxsr, | ||
| 2808 | .idivq_to_divl, | ||
| 2809 | .lzcnt, | ||
| 2810 | .mmx, | ||
| 2811 | .movbe, | ||
| 2812 | .nopl, | ||
| 2813 | .pclmul, | ||
| 2814 | .popcnt, | ||
| 2815 | .prefer_mask_registers, | ||
| 2816 | .prefetchwt1, | ||
| 2817 | .prfchw, | ||
| 2818 | .rdrnd, | ||
| 2819 | .rdseed, | ||
| 2820 | .sahf, | ||
| 2821 | .slow_3ops_lea, | ||
| 2822 | .slow_incdec, | ||
| 2823 | .slow_pmaddwd, | ||
| 2824 | .slow_two_mem_ops, | ||
| 2825 | .x87, | ||
| 2826 | .xsaveopt, | ||
| 2827 | }), | ||
| 2828 | }; | ||
| 2829 | pub const lakemont = CpuModel{ | ||
| 2830 | .name = "lakemont", | ||
| 2831 | .llvm_name = "lakemont", | ||
| 2832 | .features = featureSet(&[_]Feature{ | ||
| 2833 | .cx8, | ||
| 2834 | .slow_unaligned_mem_16, | ||
| 2835 | .soft_float, | ||
| 2836 | .vzeroupper, | ||
| 2837 | }), | ||
| 2838 | }; | ||
| 2839 | pub const meteorlake = CpuModel{ | ||
| 2840 | .name = "meteorlake", | ||
| 2841 | .llvm_name = "meteorlake", | ||
| 2842 | .features = featureSet(&[_]Feature{ | ||
| 2843 | .@"64bit", | ||
| 2844 | .adx, | ||
| 2845 | .allow_light_256_bit, | ||
| 2846 | .avxvnni, | ||
| 2847 | .bmi, | ||
| 2848 | .bmi2, | ||
| 2849 | .cldemote, | ||
| 2850 | .clflushopt, | ||
| 2851 | .clwb, | ||
| 2852 | .cmov, | ||
| 2853 | .crc32, | ||
| 2854 | .cx16, | ||
| 2855 | .f16c, | ||
| 2856 | .false_deps_perm, | ||
| 2857 | .false_deps_popcnt, | ||
| 2858 | .fast_15bytenop, | ||
| 2859 | .fast_gather, | ||
| 2860 | .fast_scalar_fsqrt, | ||
| 2861 | .fast_shld_rotate, | ||
| 2862 | .fast_variable_crosslane_shuffle, | ||
| 2863 | .fast_variable_perlane_shuffle, | ||
| 2864 | .fast_vector_fsqrt, | ||
| 2865 | .fma, | ||
| 2866 | .fsgsbase, | ||
| 2867 | .fxsr, | ||
| 2868 | .gfni, | ||
| 2869 | .hreset, | ||
| 2870 | .idivq_to_divl, | ||
| 2871 | .invpcid, | ||
| 2872 | .lzcnt, | ||
| 2873 | .macrofusion, | ||
| 2874 | .mmx, | ||
| 2875 | .movbe, | ||
| 2876 | .movdir64b, | ||
| 2877 | .movdiri, | ||
| 2878 | .no_bypass_delay_blend, | ||
| 2879 | .no_bypass_delay_mov, | ||
| 2880 | .no_bypass_delay_shuffle, | ||
| 2881 | .nopl, | ||
| 2882 | .pconfig, | ||
| 2883 | .pku, | ||
| 2884 | .popcnt, | ||
| 2885 | .prefer_movmsk_over_vtest, | ||
| 2886 | .prfchw, | ||
| 2887 | .ptwrite, | ||
| 2888 | .rdpid, | ||
| 2889 | .rdrnd, | ||
| 2890 | .rdseed, | ||
| 2891 | .sahf, | ||
| 2892 | .serialize, | ||
| 2893 | .sha, | ||
| 2894 | .shstk, | ||
| 2895 | .slow_3ops_lea, | ||
| 2896 | .tuning_fast_imm_vector_shift, | ||
| 2897 | .vaes, | ||
| 2898 | .vpclmulqdq, | ||
| 2899 | .vzeroupper, | ||
| 2900 | .waitpkg, | ||
| 2901 | .widekl, | ||
| 2902 | .x87, | ||
| 2903 | .xsavec, | ||
| 2904 | .xsaveopt, | ||
| 2905 | .xsaves, | ||
| 2906 | }), | ||
| 2907 | }; | ||
| 2908 | pub const nehalem = CpuModel{ | ||
| 2909 | .name = "nehalem", | ||
| 2910 | .llvm_name = "nehalem", | ||
| 2911 | .features = featureSet(&[_]Feature{ | ||
| 2912 | .@"64bit", | ||
| 2913 | .cmov, | ||
| 2914 | .crc32, | ||
| 2915 | .cx16, | ||
| 2916 | .fxsr, | ||
| 2917 | .macrofusion, | ||
| 2918 | .mmx, | ||
| 2919 | .no_bypass_delay_mov, | ||
| 2920 | .nopl, | ||
| 2921 | .popcnt, | ||
| 2922 | .sahf, | ||
| 2923 | .sse4_2, | ||
| 2924 | .vzeroupper, | ||
| 2925 | .x87, | ||
| 2926 | }), | ||
| 2927 | }; | ||
| 2928 | pub const nocona = CpuModel{ | ||
| 2929 | .name = "nocona", | ||
| 2930 | .llvm_name = "nocona", | ||
| 2931 | .features = featureSet(&[_]Feature{ | ||
| 2932 | .@"64bit", | ||
| 2933 | .cmov, | ||
| 2934 | .cx16, | ||
| 2935 | .fxsr, | ||
| 2936 | .mmx, | ||
| 2937 | .nopl, | ||
| 2938 | .slow_unaligned_mem_16, | ||
| 2939 | .sse3, | ||
| 2940 | .vzeroupper, | ||
| 2941 | .x87, | ||
| 2942 | }), | ||
| 2943 | }; | ||
| 2944 | pub const opteron = CpuModel{ | ||
| 2945 | .name = "opteron", | ||
| 2946 | .llvm_name = "opteron", | ||
| 2947 | .features = featureSet(&[_]Feature{ | ||
| 2948 | .@"3dnowa", | ||
| 2949 | .@"64bit", | ||
| 2950 | .cmov, | ||
| 2951 | .cx8, | ||
| 2952 | .fast_scalar_shift_masks, | ||
| 2953 | .fxsr, | ||
| 2954 | .nopl, | ||
| 2955 | .sbb_dep_breaking, | ||
| 2956 | .slow_shld, | ||
| 2957 | .slow_unaligned_mem_16, | ||
| 2958 | .sse2, | ||
| 2959 | .vzeroupper, | ||
| 2960 | .x87, | ||
| 2961 | }), | ||
| 2962 | }; | ||
| 2963 | pub const opteron_sse3 = CpuModel{ | ||
| 2964 | .name = "opteron_sse3", | ||
| 2965 | .llvm_name = "opteron-sse3", | ||
| 2966 | .features = featureSet(&[_]Feature{ | ||
| 2967 | .@"3dnowa", | ||
| 2968 | .@"64bit", | ||
| 2969 | .cmov, | ||
| 2970 | .cx16, | ||
| 2971 | .fast_scalar_shift_masks, | ||
| 2972 | .fxsr, | ||
| 2973 | .nopl, | ||
| 2974 | .sbb_dep_breaking, | ||
| 2975 | .slow_shld, | ||
| 2976 | .slow_unaligned_mem_16, | ||
| 2977 | .sse3, | ||
| 2978 | .vzeroupper, | ||
| 2979 | .x87, | ||
| 2980 | }), | ||
| 2981 | }; | ||
| 2982 | pub const penryn = CpuModel{ | ||
| 2983 | .name = "penryn", | ||
| 2984 | .llvm_name = "penryn", | ||
| 2985 | .features = featureSet(&[_]Feature{ | ||
| 2986 | .@"64bit", | ||
| 2987 | .cmov, | ||
| 2988 | .cx16, | ||
| 2989 | .fxsr, | ||
| 2990 | .macrofusion, | ||
| 2991 | .mmx, | ||
| 2992 | .nopl, | ||
| 2993 | .sahf, | ||
| 2994 | .slow_unaligned_mem_16, | ||
| 2995 | .sse4_1, | ||
| 2996 | .vzeroupper, | ||
| 2997 | .x87, | ||
| 2998 | }), | ||
| 2999 | }; | ||
| 3000 | pub const pentium = CpuModel{ | ||
| 3001 | .name = "pentium", | ||
| 3002 | .llvm_name = "pentium", | ||
| 3003 | .features = featureSet(&[_]Feature{ | ||
| 3004 | .cx8, | ||
| 3005 | .slow_unaligned_mem_16, | ||
| 3006 | .vzeroupper, | ||
| 3007 | .x87, | ||
| 3008 | }), | ||
| 3009 | }; | ||
| 3010 | pub const pentium2 = CpuModel{ | ||
| 3011 | .name = "pentium2", | ||
| 3012 | .llvm_name = "pentium2", | ||
| 3013 | .features = featureSet(&[_]Feature{ | ||
| 3014 | .cmov, | ||
| 3015 | .cx8, | ||
| 3016 | .fxsr, | ||
| 3017 | .mmx, | ||
| 3018 | .nopl, | ||
| 3019 | .slow_unaligned_mem_16, | ||
| 3020 | .vzeroupper, | ||
| 3021 | .x87, | ||
| 3022 | }), | ||
| 3023 | }; | ||
| 3024 | pub const pentium3 = CpuModel{ | ||
| 3025 | .name = "pentium3", | ||
| 3026 | .llvm_name = "pentium3", | ||
| 3027 | .features = featureSet(&[_]Feature{ | ||
| 3028 | .cmov, | ||
| 3029 | .cx8, | ||
| 3030 | .fxsr, | ||
| 3031 | .mmx, | ||
| 3032 | .nopl, | ||
| 3033 | .slow_unaligned_mem_16, | ||
| 3034 | .sse, | ||
| 3035 | .vzeroupper, | ||
| 3036 | .x87, | ||
| 3037 | }), | ||
| 3038 | }; | ||
| 3039 | pub const pentium3m = CpuModel{ | ||
| 3040 | .name = "pentium3m", | ||
| 3041 | .llvm_name = "pentium3m", | ||
| 3042 | .features = featureSet(&[_]Feature{ | ||
| 3043 | .cmov, | ||
| 3044 | .cx8, | ||
| 3045 | .fxsr, | ||
| 3046 | .mmx, | ||
| 3047 | .nopl, | ||
| 3048 | .slow_unaligned_mem_16, | ||
| 3049 | .sse, | ||
| 3050 | .vzeroupper, | ||
| 3051 | .x87, | ||
| 3052 | }), | ||
| 3053 | }; | ||
| 3054 | pub const pentium4 = CpuModel{ | ||
| 3055 | .name = "pentium4", | ||
| 3056 | .llvm_name = "pentium4", | ||
| 3057 | .features = featureSet(&[_]Feature{ | ||
| 3058 | .cmov, | ||
| 3059 | .cx8, | ||
| 3060 | .fxsr, | ||
| 3061 | .mmx, | ||
| 3062 | .nopl, | ||
| 3063 | .slow_unaligned_mem_16, | ||
| 3064 | .sse2, | ||
| 3065 | .vzeroupper, | ||
| 3066 | .x87, | ||
| 3067 | }), | ||
| 3068 | }; | ||
| 3069 | pub const pentium_m = CpuModel{ | ||
| 3070 | .name = "pentium_m", | ||
| 3071 | .llvm_name = "pentium-m", | ||
| 3072 | .features = featureSet(&[_]Feature{ | ||
| 3073 | .cmov, | ||
| 3074 | .cx8, | ||
| 3075 | .fxsr, | ||
| 3076 | .mmx, | ||
| 3077 | .nopl, | ||
| 3078 | .slow_unaligned_mem_16, | ||
| 3079 | .sse2, | ||
| 3080 | .vzeroupper, | ||
| 3081 | .x87, | ||
| 3082 | }), | ||
| 3083 | }; | ||
| 3084 | pub const pentium_mmx = CpuModel{ | ||
| 3085 | .name = "pentium_mmx", | ||
| 3086 | .llvm_name = "pentium-mmx", | ||
| 3087 | .features = featureSet(&[_]Feature{ | ||
| 3088 | .cx8, | ||
| 3089 | .mmx, | ||
| 3090 | .slow_unaligned_mem_16, | ||
| 3091 | .vzeroupper, | ||
| 3092 | .x87, | ||
| 3093 | }), | ||
| 3094 | }; | ||
| 3095 | pub const pentiumpro = CpuModel{ | ||
| 3096 | .name = "pentiumpro", | ||
| 3097 | .llvm_name = "pentiumpro", | ||
| 3098 | .features = featureSet(&[_]Feature{ | ||
| 3099 | .cmov, | ||
| 3100 | .cx8, | ||
| 3101 | .nopl, | ||
| 3102 | .slow_unaligned_mem_16, | ||
| 3103 | .vzeroupper, | ||
| 3104 | .x87, | ||
| 3105 | }), | ||
| 3106 | }; | ||
| 3107 | pub const prescott = CpuModel{ | ||
| 3108 | .name = "prescott", | ||
| 3109 | .llvm_name = "prescott", | ||
| 3110 | .features = featureSet(&[_]Feature{ | ||
| 3111 | .cmov, | ||
| 3112 | .cx8, | ||
| 3113 | .fxsr, | ||
| 3114 | .mmx, | ||
| 3115 | .nopl, | ||
| 3116 | .slow_unaligned_mem_16, | ||
| 3117 | .sse3, | ||
| 3118 | .vzeroupper, | ||
| 3119 | .x87, | ||
| 3120 | }), | ||
| 3121 | }; | ||
| 3122 | pub const raptorlake = CpuModel{ | ||
| 3123 | .name = "raptorlake", | ||
| 3124 | .llvm_name = "raptorlake", | ||
| 3125 | .features = featureSet(&[_]Feature{ | ||
| 3126 | .@"64bit", | ||
| 3127 | .adx, | ||
| 3128 | .allow_light_256_bit, | ||
| 3129 | .avxvnni, | ||
| 3130 | .bmi, | ||
| 3131 | .bmi2, | ||
| 3132 | .cldemote, | ||
| 3133 | .clflushopt, | ||
| 3134 | .clwb, | ||
| 3135 | .cmov, | ||
| 3136 | .crc32, | ||
| 3137 | .cx16, | ||
| 3138 | .f16c, | ||
| 3139 | .false_deps_perm, | ||
| 3140 | .false_deps_popcnt, | ||
| 3141 | .fast_15bytenop, | ||
| 3142 | .fast_gather, | ||
| 3143 | .fast_scalar_fsqrt, | ||
| 3144 | .fast_shld_rotate, | ||
| 3145 | .fast_variable_crosslane_shuffle, | ||
| 3146 | .fast_variable_perlane_shuffle, | ||
| 3147 | .fast_vector_fsqrt, | ||
| 3148 | .fma, | ||
| 3149 | .fsgsbase, | ||
| 3150 | .fxsr, | ||
| 3151 | .gfni, | ||
| 3152 | .hreset, | ||
| 3153 | .idivq_to_divl, | ||
| 3154 | .invpcid, | ||
| 3155 | .lzcnt, | ||
| 3156 | .macrofusion, | ||
| 3157 | .mmx, | ||
| 3158 | .movbe, | ||
| 3159 | .movdir64b, | ||
| 3160 | .movdiri, | ||
| 3161 | .no_bypass_delay_blend, | ||
| 3162 | .no_bypass_delay_mov, | ||
| 3163 | .no_bypass_delay_shuffle, | ||
| 3164 | .nopl, | ||
| 3165 | .pconfig, | ||
| 3166 | .pku, | ||
| 3167 | .popcnt, | ||
| 3168 | .prefer_movmsk_over_vtest, | ||
| 3169 | .prfchw, | ||
| 3170 | .ptwrite, | ||
| 3171 | .rdpid, | ||
| 3172 | .rdrnd, | ||
| 3173 | .rdseed, | ||
| 3174 | .sahf, | ||
| 3175 | .serialize, | ||
| 3176 | .sha, | ||
| 3177 | .shstk, | ||
| 3178 | .slow_3ops_lea, | ||
| 3179 | .tuning_fast_imm_vector_shift, | ||
| 3180 | .vaes, | ||
| 3181 | .vpclmulqdq, | ||
| 3182 | .vzeroupper, | ||
| 3183 | .waitpkg, | ||
| 3184 | .widekl, | ||
| 3185 | .x87, | ||
| 3186 | .xsavec, | ||
| 3187 | .xsaveopt, | ||
| 3188 | .xsaves, | ||
| 3189 | }), | ||
| 3190 | }; | ||
| 3191 | pub const rocketlake = CpuModel{ | ||
| 3192 | .name = "rocketlake", | ||
| 3193 | .llvm_name = "rocketlake", | ||
| 3194 | .features = featureSet(&[_]Feature{ | ||
| 3195 | .@"64bit", | ||
| 3196 | .adx, | ||
| 3197 | .allow_light_256_bit, | ||
| 3198 | .avx512bitalg, | ||
| 3199 | .avx512cd, | ||
| 3200 | .avx512dq, | ||
| 3201 | .avx512ifma, | ||
| 3202 | .avx512vbmi, | ||
| 3203 | .avx512vbmi2, | ||
| 3204 | .avx512vl, | ||
| 3205 | .avx512vnni, | ||
| 3206 | .avx512vpopcntdq, | ||
| 3207 | .bmi, | ||
| 3208 | .bmi2, | ||
| 3209 | .clflushopt, | ||
| 3210 | .cmov, | ||
| 3211 | .crc32, | ||
| 3212 | .cx16, | ||
| 3213 | .ermsb, | ||
| 3214 | .fast_15bytenop, | ||
| 3215 | .fast_gather, | ||
| 3216 | .fast_scalar_fsqrt, | ||
| 3217 | .fast_shld_rotate, | ||
| 3218 | .fast_variable_crosslane_shuffle, | ||
| 3219 | .fast_variable_perlane_shuffle, | ||
| 3220 | .fast_vector_fsqrt, | ||
| 3221 | .fsgsbase, | ||
| 3222 | .fsrm, | ||
| 3223 | .fxsr, | ||
| 3224 | .gfni, | ||
| 3225 | .idivq_to_divl, | ||
| 3226 | .invpcid, | ||
| 3227 | .lzcnt, | ||
| 3228 | .macrofusion, | ||
| 3229 | .mmx, | ||
| 3230 | .movbe, | ||
| 3231 | .no_bypass_delay_blend, | ||
| 3232 | .no_bypass_delay_mov, | ||
| 3233 | .no_bypass_delay_shuffle, | ||
| 3234 | .nopl, | ||
| 3235 | .pku, | ||
| 3236 | .popcnt, | ||
| 3237 | .prefer_256_bit, | ||
| 3238 | .prfchw, | ||
| 3239 | .rdpid, | ||
| 3240 | .rdrnd, | ||
| 3241 | .rdseed, | ||
| 3242 | .sahf, | ||
| 3243 | .sha, | ||
| 3244 | .tuning_fast_imm_vector_shift, | ||
| 3245 | .vaes, | ||
| 3246 | .vpclmulqdq, | ||
| 3247 | .vzeroupper, | ||
| 3248 | .x87, | ||
| 3249 | .xsavec, | ||
| 3250 | .xsaveopt, | ||
| 3251 | .xsaves, | ||
| 3252 | }), | ||
| 3253 | }; | ||
| 3254 | pub const sandybridge = CpuModel{ | ||
| 3255 | .name = "sandybridge", | ||
| 3256 | .llvm_name = "sandybridge", | ||
| 3257 | .features = featureSet(&[_]Feature{ | ||
| 3258 | .@"64bit", | ||
| 3259 | .avx, | ||
| 3260 | .cmov, | ||
| 3261 | .crc32, | ||
| 3262 | .cx16, | ||
| 3263 | .false_deps_popcnt, | ||
| 3264 | .fast_15bytenop, | ||
| 3265 | .fast_scalar_fsqrt, | ||
| 3266 | .fast_shld_rotate, | ||
| 3267 | .fxsr, | ||
| 3268 | .idivq_to_divl, | ||
| 3269 | .macrofusion, | ||
| 3270 | .mmx, | ||
| 3271 | .no_bypass_delay_mov, | ||
| 3272 | .nopl, | ||
| 3273 | .pclmul, | ||
| 3274 | .popcnt, | ||
| 3275 | .sahf, | ||
| 3276 | .slow_3ops_lea, | ||
| 3277 | .slow_unaligned_mem_32, | ||
| 3278 | .vzeroupper, | ||
| 3279 | .x87, | ||
| 3280 | .xsaveopt, | ||
| 3281 | }), | ||
| 3282 | }; | ||
| 3283 | pub const sapphirerapids = CpuModel{ | ||
| 3284 | .name = "sapphirerapids", | ||
| 3285 | .llvm_name = "sapphirerapids", | ||
| 3286 | .features = featureSet(&[_]Feature{ | ||
| 3287 | .@"64bit", | ||
| 3288 | .adx, | ||
| 3289 | .allow_light_256_bit, | ||
| 3290 | .amx_bf16, | ||
| 3291 | .amx_int8, | ||
| 3292 | .avx512bf16, | ||
| 3293 | .avx512bitalg, | ||
| 3294 | .avx512cd, | ||
| 3295 | .avx512fp16, | ||
| 3296 | .avx512ifma, | ||
| 3297 | .avx512vbmi, | ||
| 3298 | .avx512vbmi2, | ||
| 3299 | .avx512vnni, | ||
| 3300 | .avx512vpopcntdq, | ||
| 3301 | .avxvnni, | ||
| 3302 | .bmi, | ||
| 3303 | .bmi2, | ||
| 3304 | .cldemote, | ||
| 3305 | .clflushopt, | ||
| 3306 | .clwb, | ||
| 3307 | .cmov, | ||
| 3308 | .crc32, | ||
| 3309 | .cx16, | ||
| 3310 | .enqcmd, | ||
| 3311 | .ermsb, | ||
| 3312 | .false_deps_getmant, | ||
| 3313 | .false_deps_mulc, | ||
| 3314 | .false_deps_mullq, | ||
| 3315 | .false_deps_perm, | ||
| 3316 | .false_deps_range, | ||
| 3317 | .fast_15bytenop, | ||
| 3318 | .fast_gather, | ||
| 3319 | .fast_scalar_fsqrt, | ||
| 3320 | .fast_shld_rotate, | ||
| 3321 | .fast_variable_crosslane_shuffle, | ||
| 3322 | .fast_variable_perlane_shuffle, | ||
| 3323 | .fast_vector_fsqrt, | ||
| 3324 | .fsgsbase, | ||
| 3325 | .fsrm, | ||
| 3326 | .fxsr, | ||
| 3327 | .gfni, | ||
| 3328 | .idivq_to_divl, | ||
| 3329 | .invpcid, | ||
| 3330 | .lzcnt, | ||
| 3331 | .macrofusion, | ||
| 3332 | .mmx, | ||
| 3333 | .movbe, | ||
| 3334 | .movdir64b, | ||
| 3335 | .movdiri, | ||
| 3336 | .no_bypass_delay_blend, | ||
| 3337 | .no_bypass_delay_mov, | ||
| 3338 | .no_bypass_delay_shuffle, | ||
| 3339 | .nopl, | ||
| 3340 | .pconfig, | ||
| 3341 | .pku, | ||
| 3342 | .popcnt, | ||
| 3343 | .prefer_256_bit, | ||
| 3344 | .prfchw, | ||
| 3345 | .ptwrite, | ||
| 3346 | .rdpid, | ||
| 3347 | .rdrnd, | ||
| 3348 | .rdseed, | ||
| 3349 | .sahf, | ||
| 3350 | .serialize, | ||
| 3351 | .sha, | ||
| 3352 | .shstk, | ||
| 3353 | .tsxldtrk, | ||
| 3354 | .tuning_fast_imm_vector_shift, | ||
| 3355 | .uintr, | ||
| 3356 | .vaes, | ||
| 3357 | .vpclmulqdq, | ||
| 3358 | .vzeroupper, | ||
| 3359 | .waitpkg, | ||
| 3360 | .wbnoinvd, | ||
| 3361 | .x87, | ||
| 3362 | .xsavec, | ||
| 3363 | .xsaveopt, | ||
| 3364 | .xsaves, | ||
| 3365 | }), | ||
| 3366 | }; | ||
| 3367 | pub const sierraforest = CpuModel{ | ||
| 3368 | .name = "sierraforest", | ||
| 3369 | .llvm_name = "sierraforest", | ||
| 3370 | .features = featureSet(&[_]Feature{ | ||
| 3371 | .@"64bit", | ||
| 3372 | .adx, | ||
| 3373 | .avxifma, | ||
| 3374 | .avxneconvert, | ||
| 3375 | .avxvnni, | ||
| 3376 | .avxvnniint8, | ||
| 3377 | .bmi, | ||
| 3378 | .bmi2, | ||
| 3379 | .cldemote, | ||
| 3380 | .clflushopt, | ||
| 3381 | .clwb, | ||
| 3382 | .cmov, | ||
| 3383 | .cmpccxadd, | ||
| 3384 | .crc32, | ||
| 3385 | .cx16, | ||
| 3386 | .enqcmd, | ||
| 3387 | .f16c, | ||
| 3388 | .fast_movbe, | ||
| 3389 | .fma, | ||
| 3390 | .fsgsbase, | ||
| 3391 | .fxsr, | ||
| 3392 | .gfni, | ||
| 3393 | .hreset, | ||
| 3394 | .invpcid, | ||
| 3395 | .lzcnt, | ||
| 3396 | .mmx, | ||
| 3397 | .movbe, | ||
| 3398 | .movdir64b, | ||
| 3399 | .movdiri, | ||
| 3400 | .no_bypass_delay, | ||
| 3401 | .nopl, | ||
| 3402 | .pconfig, | ||
| 3403 | .pku, | ||
| 3404 | .popcnt, | ||
| 3405 | .prfchw, | ||
| 3406 | .ptwrite, | ||
| 3407 | .rdpid, | ||
| 3408 | .rdrnd, | ||
| 3409 | .rdseed, | ||
| 3410 | .sahf, | ||
| 3411 | .serialize, | ||
| 3412 | .sha, | ||
| 3413 | .shstk, | ||
| 3414 | .slow_incdec, | ||
| 3415 | .slow_lea, | ||
| 3416 | .slow_two_mem_ops, | ||
| 3417 | .uintr, | ||
| 3418 | .use_glm_div_sqrt_costs, | ||
| 3419 | .vaes, | ||
| 3420 | .vpclmulqdq, | ||
| 3421 | .vzeroupper, | ||
| 3422 | .waitpkg, | ||
| 3423 | .widekl, | ||
| 3424 | .x87, | ||
| 3425 | .xsavec, | ||
| 3426 | .xsaveopt, | ||
| 3427 | .xsaves, | ||
| 3428 | }), | ||
| 3429 | }; | ||
| 3430 | pub const silvermont = CpuModel{ | ||
| 3431 | .name = "silvermont", | ||
| 3432 | .llvm_name = "silvermont", | ||
| 3433 | .features = featureSet(&[_]Feature{ | ||
| 3434 | .@"64bit", | ||
| 3435 | .cmov, | ||
| 3436 | .crc32, | ||
| 3437 | .cx16, | ||
| 3438 | .false_deps_popcnt, | ||
| 3439 | .fast_7bytenop, | ||
| 3440 | .fast_movbe, | ||
| 3441 | .fxsr, | ||
| 3442 | .idivq_to_divl, | ||
| 3443 | .mmx, | ||
| 3444 | .movbe, | ||
| 3445 | .no_bypass_delay, | ||
| 3446 | .nopl, | ||
| 3447 | .pclmul, | ||
| 3448 | .popcnt, | ||
| 3449 | .prfchw, | ||
| 3450 | .rdrnd, | ||
| 3451 | .sahf, | ||
| 3452 | .slow_incdec, | ||
| 3453 | .slow_lea, | ||
| 3454 | .slow_pmulld, | ||
| 3455 | .slow_two_mem_ops, | ||
| 3456 | .sse4_2, | ||
| 3457 | .use_slm_arith_costs, | ||
| 3458 | .vzeroupper, | ||
| 3459 | .x87, | ||
| 3460 | }), | ||
| 3461 | }; | ||
| 3462 | pub const skx = CpuModel{ | ||
| 3463 | .name = "skx", | ||
| 3464 | .llvm_name = "skx", | ||
| 3465 | .features = featureSet(&[_]Feature{ | ||
| 3466 | .@"64bit", | ||
| 3467 | .adx, | ||
| 3468 | .aes, | ||
| 3469 | .allow_light_256_bit, | ||
| 3470 | .avx512bw, | ||
| 3471 | .avx512cd, | ||
| 3472 | .avx512dq, | ||
| 3473 | .avx512vl, | ||
| 3474 | .bmi, | ||
| 3475 | .bmi2, | ||
| 3476 | .clflushopt, | ||
| 3477 | .clwb, | ||
| 3478 | .cmov, | ||
| 3479 | .crc32, | ||
| 3480 | .cx16, | ||
| 3481 | .ermsb, | ||
| 3482 | .false_deps_popcnt, | ||
| 3483 | .fast_15bytenop, | ||
| 3484 | .fast_gather, | ||
| 3485 | .fast_scalar_fsqrt, | ||
| 3486 | .fast_shld_rotate, | ||
| 3487 | .fast_variable_crosslane_shuffle, | ||
| 3488 | .fast_variable_perlane_shuffle, | ||
| 3489 | .fast_vector_fsqrt, | ||
| 3490 | .faster_shift_than_shuffle, | ||
| 3491 | .fsgsbase, | ||
| 3492 | .fxsr, | ||
| 3493 | .idivq_to_divl, | ||
| 3494 | .invpcid, | ||
| 3495 | .lzcnt, | ||
| 3496 | .macrofusion, | ||
| 3497 | .mmx, | ||
| 3498 | .movbe, | ||
| 3499 | .no_bypass_delay_blend, | ||
| 3500 | .no_bypass_delay_mov, | ||
| 3501 | .no_bypass_delay_shuffle, | ||
| 3502 | .nopl, | ||
| 3503 | .pclmul, | ||
| 3504 | .pku, | ||
| 3505 | .popcnt, | ||
| 3506 | .prefer_256_bit, | ||
| 3507 | .prfchw, | ||
| 3508 | .rdrnd, | ||
| 3509 | .rdseed, | ||
| 3510 | .sahf, | ||
| 3511 | .slow_3ops_lea, | ||
| 3512 | .tuning_fast_imm_vector_shift, | ||
| 3513 | .vzeroupper, | ||
| 3514 | .x87, | ||
| 3515 | .xsavec, | ||
| 3516 | .xsaveopt, | ||
| 3517 | .xsaves, | ||
| 3518 | }), | ||
| 3519 | }; | ||
| 3520 | pub const skylake = CpuModel{ | ||
| 3521 | .name = "skylake", | ||
| 3522 | .llvm_name = "skylake", | ||
| 3523 | .features = featureSet(&[_]Feature{ | ||
| 3524 | .@"64bit", | ||
| 3525 | .adx, | ||
| 3526 | .aes, | ||
| 3527 | .allow_light_256_bit, | ||
| 3528 | .avx2, | ||
| 3529 | .bmi, | ||
| 3530 | .bmi2, | ||
| 3531 | .clflushopt, | ||
| 3532 | .cmov, | ||
| 3533 | .crc32, | ||
| 3534 | .cx16, | ||
| 3535 | .ermsb, | ||
| 3536 | .f16c, | ||
| 3537 | .false_deps_popcnt, | ||
| 3538 | .fast_15bytenop, | ||
| 3539 | .fast_gather, | ||
| 3540 | .fast_scalar_fsqrt, | ||
| 3541 | .fast_shld_rotate, | ||
| 3542 | .fast_variable_crosslane_shuffle, | ||
| 3543 | .fast_variable_perlane_shuffle, | ||
| 3544 | .fast_vector_fsqrt, | ||
| 3545 | .fma, | ||
| 3546 | .fsgsbase, | ||
| 3547 | .fxsr, | ||
| 3548 | .idivq_to_divl, | ||
| 3549 | .invpcid, | ||
| 3550 | .lzcnt, | ||
| 3551 | .macrofusion, | ||
| 3552 | .mmx, | ||
| 3553 | .movbe, | ||
| 3554 | .no_bypass_delay_blend, | ||
| 3555 | .no_bypass_delay_mov, | ||
| 3556 | .no_bypass_delay_shuffle, | ||
| 3557 | .nopl, | ||
| 3558 | .pclmul, | ||
| 3559 | .popcnt, | ||
| 3560 | .prfchw, | ||
| 3561 | .rdrnd, | ||
| 3562 | .rdseed, | ||
| 3563 | .sahf, | ||
| 3564 | .slow_3ops_lea, | ||
| 3565 | .vzeroupper, | ||
| 3566 | .x87, | ||
| 3567 | .xsavec, | ||
| 3568 | .xsaveopt, | ||
| 3569 | .xsaves, | ||
| 3570 | }), | ||
| 3571 | }; | ||
| 3572 | pub const skylake_avx512 = CpuModel{ | ||
| 3573 | .name = "skylake_avx512", | ||
| 3574 | .llvm_name = "skylake-avx512", | ||
| 3575 | .features = featureSet(&[_]Feature{ | ||
| 3576 | .@"64bit", | ||
| 3577 | .adx, | ||
| 3578 | .aes, | ||
| 3579 | .allow_light_256_bit, | ||
| 3580 | .avx512bw, | ||
| 3581 | .avx512cd, | ||
| 3582 | .avx512dq, | ||
| 3583 | .avx512vl, | ||
| 3584 | .bmi, | ||
| 3585 | .bmi2, | ||
| 3586 | .clflushopt, | ||
| 3587 | .clwb, | ||
| 3588 | .cmov, | ||
| 3589 | .crc32, | ||
| 3590 | .cx16, | ||
| 3591 | .ermsb, | ||
| 3592 | .false_deps_popcnt, | ||
| 3593 | .fast_15bytenop, | ||
| 3594 | .fast_gather, | ||
| 3595 | .fast_scalar_fsqrt, | ||
| 3596 | .fast_shld_rotate, | ||
| 3597 | .fast_variable_crosslane_shuffle, | ||
| 3598 | .fast_variable_perlane_shuffle, | ||
| 3599 | .fast_vector_fsqrt, | ||
| 3600 | .faster_shift_than_shuffle, | ||
| 3601 | .fsgsbase, | ||
| 3602 | .fxsr, | ||
| 3603 | .idivq_to_divl, | ||
| 3604 | .invpcid, | ||
| 3605 | .lzcnt, | ||
| 3606 | .macrofusion, | ||
| 3607 | .mmx, | ||
| 3608 | .movbe, | ||
| 3609 | .no_bypass_delay_blend, | ||
| 3610 | .no_bypass_delay_mov, | ||
| 3611 | .no_bypass_delay_shuffle, | ||
| 3612 | .nopl, | ||
| 3613 | .pclmul, | ||
| 3614 | .pku, | ||
| 3615 | .popcnt, | ||
| 3616 | .prefer_256_bit, | ||
| 3617 | .prfchw, | ||
| 3618 | .rdrnd, | ||
| 3619 | .rdseed, | ||
| 3620 | .sahf, | ||
| 3621 | .slow_3ops_lea, | ||
| 3622 | .tuning_fast_imm_vector_shift, | ||
| 3623 | .vzeroupper, | ||
| 3624 | .x87, | ||
| 3625 | .xsavec, | ||
| 3626 | .xsaveopt, | ||
| 3627 | .xsaves, | ||
| 3628 | }), | ||
| 3629 | }; | ||
| 3630 | pub const slm = CpuModel{ | ||
| 3631 | .name = "slm", | ||
| 3632 | .llvm_name = "slm", | ||
| 3633 | .features = featureSet(&[_]Feature{ | ||
| 3634 | .@"64bit", | ||
| 3635 | .cmov, | ||
| 3636 | .crc32, | ||
| 3637 | .cx16, | ||
| 3638 | .false_deps_popcnt, | ||
| 3639 | .fast_7bytenop, | ||
| 3640 | .fast_movbe, | ||
| 3641 | .fxsr, | ||
| 3642 | .idivq_to_divl, | ||
| 3643 | .mmx, | ||
| 3644 | .movbe, | ||
| 3645 | .no_bypass_delay, | ||
| 3646 | .nopl, | ||
| 3647 | .pclmul, | ||
| 3648 | .popcnt, | ||
| 3649 | .prfchw, | ||
| 3650 | .rdrnd, | ||
| 3651 | .sahf, | ||
| 3652 | .slow_incdec, | ||
| 3653 | .slow_lea, | ||
| 3654 | .slow_pmulld, | ||
| 3655 | .slow_two_mem_ops, | ||
| 3656 | .sse4_2, | ||
| 3657 | .use_slm_arith_costs, | ||
| 3658 | .vzeroupper, | ||
| 3659 | .x87, | ||
| 3660 | }), | ||
| 3661 | }; | ||
| 3662 | pub const tigerlake = CpuModel{ | ||
| 3663 | .name = "tigerlake", | ||
| 3664 | .llvm_name = "tigerlake", | ||
| 3665 | .features = featureSet(&[_]Feature{ | ||
| 3666 | .@"64bit", | ||
| 3667 | .adx, | ||
| 3668 | .allow_light_256_bit, | ||
| 3669 | .avx512bitalg, | ||
| 3670 | .avx512cd, | ||
| 3671 | .avx512dq, | ||
| 3672 | .avx512ifma, | ||
| 3673 | .avx512vbmi, | ||
| 3674 | .avx512vbmi2, | ||
| 3675 | .avx512vl, | ||
| 3676 | .avx512vnni, | ||
| 3677 | .avx512vp2intersect, | ||
| 3678 | .avx512vpopcntdq, | ||
| 3679 | .bmi, | ||
| 3680 | .bmi2, | ||
| 3681 | .clflushopt, | ||
| 3682 | .clwb, | ||
| 3683 | .cmov, | ||
| 3684 | .crc32, | ||
| 3685 | .cx16, | ||
| 3686 | .ermsb, | ||
| 3687 | .fast_15bytenop, | ||
| 3688 | .fast_gather, | ||
| 3689 | .fast_scalar_fsqrt, | ||
| 3690 | .fast_shld_rotate, | ||
| 3691 | .fast_variable_crosslane_shuffle, | ||
| 3692 | .fast_variable_perlane_shuffle, | ||
| 3693 | .fast_vector_fsqrt, | ||
| 3694 | .fsgsbase, | ||
| 3695 | .fsrm, | ||
| 3696 | .fxsr, | ||
| 3697 | .gfni, | ||
| 3698 | .idivq_to_divl, | ||
| 3699 | .invpcid, | ||
| 3700 | .lzcnt, | ||
| 3701 | .macrofusion, | ||
| 3702 | .mmx, | ||
| 3703 | .movbe, | ||
| 3704 | .movdir64b, | ||
| 3705 | .movdiri, | ||
| 3706 | .no_bypass_delay_blend, | ||
| 3707 | .no_bypass_delay_mov, | ||
| 3708 | .no_bypass_delay_shuffle, | ||
| 3709 | .nopl, | ||
| 3710 | .pku, | ||
| 3711 | .popcnt, | ||
| 3712 | .prefer_256_bit, | ||
| 3713 | .prfchw, | ||
| 3714 | .rdpid, | ||
| 3715 | .rdrnd, | ||
| 3716 | .rdseed, | ||
| 3717 | .sahf, | ||
| 3718 | .sha, | ||
| 3719 | .shstk, | ||
| 3720 | .tuning_fast_imm_vector_shift, | ||
| 3721 | .vaes, | ||
| 3722 | .vpclmulqdq, | ||
| 3723 | .vzeroupper, | ||
| 3724 | .x87, | ||
| 3725 | .xsavec, | ||
| 3726 | .xsaveopt, | ||
| 3727 | .xsaves, | ||
| 3728 | }), | ||
| 3729 | }; | ||
| 3730 | pub const tremont = CpuModel{ | ||
| 3731 | .name = "tremont", | ||
| 3732 | .llvm_name = "tremont", | ||
| 3733 | .features = featureSet(&[_]Feature{ | ||
| 3734 | .@"64bit", | ||
| 3735 | .aes, | ||
| 3736 | .clflushopt, | ||
| 3737 | .clwb, | ||
| 3738 | .cmov, | ||
| 3739 | .crc32, | ||
| 3740 | .cx16, | ||
| 3741 | .fast_movbe, | ||
| 3742 | .fsgsbase, | ||
| 3743 | .fxsr, | ||
| 3744 | .gfni, | ||
| 3745 | .mmx, | ||
| 3746 | .movbe, | ||
| 3747 | .no_bypass_delay, | ||
| 3748 | .nopl, | ||
| 3749 | .pclmul, | ||
| 3750 | .popcnt, | ||
| 3751 | .prfchw, | ||
| 3752 | .ptwrite, | ||
| 3753 | .rdpid, | ||
| 3754 | .rdrnd, | ||
| 3755 | .rdseed, | ||
| 3756 | .sahf, | ||
| 3757 | .sha, | ||
| 3758 | .slow_incdec, | ||
| 3759 | .slow_lea, | ||
| 3760 | .slow_two_mem_ops, | ||
| 3761 | .sse4_2, | ||
| 3762 | .use_glm_div_sqrt_costs, | ||
| 3763 | .vzeroupper, | ||
| 3764 | .x87, | ||
| 3765 | .xsavec, | ||
| 3766 | .xsaveopt, | ||
| 3767 | .xsaves, | ||
| 3768 | }), | ||
| 3769 | }; | ||
| 3770 | pub const westmere = CpuModel{ | ||
| 3771 | .name = "westmere", | ||
| 3772 | .llvm_name = "westmere", | ||
| 3773 | .features = featureSet(&[_]Feature{ | ||
| 3774 | .@"64bit", | ||
| 3775 | .cmov, | ||
| 3776 | .crc32, | ||
| 3777 | .cx16, | ||
| 3778 | .fxsr, | ||
| 3779 | .macrofusion, | ||
| 3780 | .mmx, | ||
| 3781 | .no_bypass_delay_mov, | ||
| 3782 | .nopl, | ||
| 3783 | .pclmul, | ||
| 3784 | .popcnt, | ||
| 3785 | .sahf, | ||
| 3786 | .sse4_2, | ||
| 3787 | .vzeroupper, | ||
| 3788 | .x87, | ||
| 3789 | }), | ||
| 3790 | }; | ||
| 3791 | pub const winchip2 = CpuModel{ | ||
| 3792 | .name = "winchip2", | ||
| 3793 | .llvm_name = "winchip2", | ||
| 3794 | .features = featureSet(&[_]Feature{ | ||
| 3795 | .@"3dnow", | ||
| 3796 | .slow_unaligned_mem_16, | ||
| 3797 | .vzeroupper, | ||
| 3798 | .x87, | ||
| 3799 | }), | ||
| 3800 | }; | ||
| 3801 | pub const winchip_c6 = CpuModel{ | ||
| 3802 | .name = "winchip_c6", | ||
| 3803 | .llvm_name = "winchip-c6", | ||
| 3804 | .features = featureSet(&[_]Feature{ | ||
| 3805 | .mmx, | ||
| 3806 | .slow_unaligned_mem_16, | ||
| 3807 | .vzeroupper, | ||
| 3808 | .x87, | ||
| 3809 | }), | ||
| 3810 | }; | ||
| 3811 | pub const x86_64 = CpuModel{ | ||
| 3812 | .name = "x86_64", | ||
| 3813 | .llvm_name = "x86-64", | ||
| 3814 | .features = featureSet(&[_]Feature{ | ||
| 3815 | .@"64bit", | ||
| 3816 | .cmov, | ||
| 3817 | .cx8, | ||
| 3818 | .fxsr, | ||
| 3819 | .idivq_to_divl, | ||
| 3820 | .macrofusion, | ||
| 3821 | .mmx, | ||
| 3822 | .nopl, | ||
| 3823 | .slow_3ops_lea, | ||
| 3824 | .slow_incdec, | ||
| 3825 | .sse2, | ||
| 3826 | .vzeroupper, | ||
| 3827 | .x87, | ||
| 3828 | }), | ||
| 3829 | }; | ||
| 3830 | pub const x86_64_v2 = CpuModel{ | ||
| 3831 | .name = "x86_64_v2", | ||
| 3832 | .llvm_name = "x86-64-v2", | ||
| 3833 | .features = featureSet(&[_]Feature{ | ||
| 3834 | .@"64bit", | ||
| 3835 | .cmov, | ||
| 3836 | .crc32, | ||
| 3837 | .cx16, | ||
| 3838 | .false_deps_popcnt, | ||
| 3839 | .fast_15bytenop, | ||
| 3840 | .fast_scalar_fsqrt, | ||
| 3841 | .fast_shld_rotate, | ||
| 3842 | .fxsr, | ||
| 3843 | .idivq_to_divl, | ||
| 3844 | .macrofusion, | ||
| 3845 | .mmx, | ||
| 3846 | .nopl, | ||
| 3847 | .popcnt, | ||
| 3848 | .sahf, | ||
| 3849 | .slow_3ops_lea, | ||
| 3850 | .slow_unaligned_mem_32, | ||
| 3851 | .sse4_2, | ||
| 3852 | .vzeroupper, | ||
| 3853 | .x87, | ||
| 3854 | }), | ||
| 3855 | }; | ||
| 3856 | pub const x86_64_v3 = CpuModel{ | ||
| 3857 | .name = "x86_64_v3", | ||
| 3858 | .llvm_name = "x86-64-v3", | ||
| 3859 | .features = featureSet(&[_]Feature{ | ||
| 3860 | .@"64bit", | ||
| 3861 | .allow_light_256_bit, | ||
| 3862 | .avx2, | ||
| 3863 | .bmi, | ||
| 3864 | .bmi2, | ||
| 3865 | .cmov, | ||
| 3866 | .crc32, | ||
| 3867 | .cx16, | ||
| 3868 | .f16c, | ||
| 3869 | .false_deps_lzcnt_tzcnt, | ||
| 3870 | .false_deps_popcnt, | ||
| 3871 | .fast_15bytenop, | ||
| 3872 | .fast_scalar_fsqrt, | ||
| 3873 | .fast_shld_rotate, | ||
| 3874 | .fast_variable_crosslane_shuffle, | ||
| 3875 | .fast_variable_perlane_shuffle, | ||
| 3876 | .fma, | ||
| 3877 | .fxsr, | ||
| 3878 | .idivq_to_divl, | ||
| 3879 | .lzcnt, | ||
| 3880 | .macrofusion, | ||
| 3881 | .mmx, | ||
| 3882 | .movbe, | ||
| 3883 | .nopl, | ||
| 3884 | .popcnt, | ||
| 3885 | .sahf, | ||
| 3886 | .slow_3ops_lea, | ||
| 3887 | .vzeroupper, | ||
| 3888 | .x87, | ||
| 3889 | .xsave, | ||
| 3890 | }), | ||
| 3891 | }; | ||
| 3892 | pub const x86_64_v4 = CpuModel{ | ||
| 3893 | .name = "x86_64_v4", | ||
| 3894 | .llvm_name = "x86-64-v4", | ||
| 3895 | .features = featureSet(&[_]Feature{ | ||
| 3896 | .@"64bit", | ||
| 3897 | .allow_light_256_bit, | ||
| 3898 | .avx512bw, | ||
| 3899 | .avx512cd, | ||
| 3900 | .avx512dq, | ||
| 3901 | .avx512vl, | ||
| 3902 | .bmi, | ||
| 3903 | .bmi2, | ||
| 3904 | .cmov, | ||
| 3905 | .crc32, | ||
| 3906 | .cx16, | ||
| 3907 | .false_deps_popcnt, | ||
| 3908 | .fast_15bytenop, | ||
| 3909 | .fast_gather, | ||
| 3910 | .fast_scalar_fsqrt, | ||
| 3911 | .fast_shld_rotate, | ||
| 3912 | .fast_variable_crosslane_shuffle, | ||
| 3913 | .fast_variable_perlane_shuffle, | ||
| 3914 | .fast_vector_fsqrt, | ||
| 3915 | .fxsr, | ||
| 3916 | .idivq_to_divl, | ||
| 3917 | .lzcnt, | ||
| 3918 | .macrofusion, | ||
| 3919 | .mmx, | ||
| 3920 | .movbe, | ||
| 3921 | .nopl, | ||
| 3922 | .popcnt, | ||
| 3923 | .prefer_256_bit, | ||
| 3924 | .sahf, | ||
| 3925 | .slow_3ops_lea, | ||
| 3926 | .vzeroupper, | ||
| 3927 | .x87, | ||
| 3928 | .xsave, | ||
| 3929 | }), | ||
| 3930 | }; | ||
| 3931 | pub const yonah = CpuModel{ | ||
| 3932 | .name = "yonah", | ||
| 3933 | .llvm_name = "yonah", | ||
| 3934 | .features = featureSet(&[_]Feature{ | ||
| 3935 | .cmov, | ||
| 3936 | .cx8, | ||
| 3937 | .fxsr, | ||
| 3938 | .mmx, | ||
| 3939 | .nopl, | ||
| 3940 | .slow_unaligned_mem_16, | ||
| 3941 | .sse3, | ||
| 3942 | .vzeroupper, | ||
| 3943 | .x87, | ||
| 3944 | }), | ||
| 3945 | }; | ||
| 3946 | pub const znver1 = CpuModel{ | ||
| 3947 | .name = "znver1", | ||
| 3948 | .llvm_name = "znver1", | ||
| 3949 | .features = featureSet(&[_]Feature{ | ||
| 3950 | .@"64bit", | ||
| 3951 | .adx, | ||
| 3952 | .aes, | ||
| 3953 | .allow_light_256_bit, | ||
| 3954 | .avx2, | ||
| 3955 | .bmi, | ||
| 3956 | .bmi2, | ||
| 3957 | .branchfusion, | ||
| 3958 | .clflushopt, | ||
| 3959 | .clzero, | ||
| 3960 | .cmov, | ||
| 3961 | .crc32, | ||
| 3962 | .cx16, | ||
| 3963 | .f16c, | ||
| 3964 | .fast_15bytenop, | ||
| 3965 | .fast_bextr, | ||
| 3966 | .fast_lzcnt, | ||
| 3967 | .fast_movbe, | ||
| 3968 | .fast_scalar_fsqrt, | ||
| 3969 | .fast_scalar_shift_masks, | ||
| 3970 | .fast_variable_perlane_shuffle, | ||
| 3971 | .fast_vector_fsqrt, | ||
| 3972 | .fma, | ||
| 3973 | .fsgsbase, | ||
| 3974 | .fxsr, | ||
| 3975 | .lzcnt, | ||
| 3976 | .mmx, | ||
| 3977 | .movbe, | ||
| 3978 | .mwaitx, | ||
| 3979 | .nopl, | ||
| 3980 | .pclmul, | ||
| 3981 | .popcnt, | ||
| 3982 | .prfchw, | ||
| 3983 | .rdrnd, | ||
| 3984 | .rdseed, | ||
| 3985 | .sahf, | ||
| 3986 | .sbb_dep_breaking, | ||
| 3987 | .sha, | ||
| 3988 | .slow_shld, | ||
| 3989 | .sse4a, | ||
| 3990 | .vzeroupper, | ||
| 3991 | .x87, | ||
| 3992 | .xsavec, | ||
| 3993 | .xsaveopt, | ||
| 3994 | .xsaves, | ||
| 3995 | }), | ||
| 3996 | }; | ||
| 3997 | pub const znver2 = CpuModel{ | ||
| 3998 | .name = "znver2", | ||
| 3999 | .llvm_name = "znver2", | ||
| 4000 | .features = featureSet(&[_]Feature{ | ||
| 4001 | .@"64bit", | ||
| 4002 | .adx, | ||
| 4003 | .aes, | ||
| 4004 | .allow_light_256_bit, | ||
| 4005 | .avx2, | ||
| 4006 | .bmi, | ||
| 4007 | .bmi2, | ||
| 4008 | .branchfusion, | ||
| 4009 | .clflushopt, | ||
| 4010 | .clwb, | ||
| 4011 | .clzero, | ||
| 4012 | .cmov, | ||
| 4013 | .crc32, | ||
| 4014 | .cx16, | ||
| 4015 | .f16c, | ||
| 4016 | .fast_15bytenop, | ||
| 4017 | .fast_bextr, | ||
| 4018 | .fast_lzcnt, | ||
| 4019 | .fast_movbe, | ||
| 4020 | .fast_scalar_fsqrt, | ||
| 4021 | .fast_scalar_shift_masks, | ||
| 4022 | .fast_variable_perlane_shuffle, | ||
| 4023 | .fast_vector_fsqrt, | ||
| 4024 | .fma, | ||
| 4025 | .fsgsbase, | ||
| 4026 | .fxsr, | ||
| 4027 | .lzcnt, | ||
| 4028 | .mmx, | ||
| 4029 | .movbe, | ||
| 4030 | .mwaitx, | ||
| 4031 | .nopl, | ||
| 4032 | .pclmul, | ||
| 4033 | .popcnt, | ||
| 4034 | .prfchw, | ||
| 4035 | .rdpid, | ||
| 4036 | .rdpru, | ||
| 4037 | .rdrnd, | ||
| 4038 | .rdseed, | ||
| 4039 | .sahf, | ||
| 4040 | .sbb_dep_breaking, | ||
| 4041 | .sha, | ||
| 4042 | .slow_shld, | ||
| 4043 | .sse4a, | ||
| 4044 | .vzeroupper, | ||
| 4045 | .wbnoinvd, | ||
| 4046 | .x87, | ||
| 4047 | .xsavec, | ||
| 4048 | .xsaveopt, | ||
| 4049 | .xsaves, | ||
| 4050 | }), | ||
| 4051 | }; | ||
| 4052 | pub const znver3 = CpuModel{ | ||
| 4053 | .name = "znver3", | ||
| 4054 | .llvm_name = "znver3", | ||
| 4055 | .features = featureSet(&[_]Feature{ | ||
| 4056 | .@"64bit", | ||
| 4057 | .adx, | ||
| 4058 | .allow_light_256_bit, | ||
| 4059 | .avx2, | ||
| 4060 | .bmi, | ||
| 4061 | .bmi2, | ||
| 4062 | .branchfusion, | ||
| 4063 | .clflushopt, | ||
| 4064 | .clwb, | ||
| 4065 | .clzero, | ||
| 4066 | .cmov, | ||
| 4067 | .crc32, | ||
| 4068 | .cx16, | ||
| 4069 | .f16c, | ||
| 4070 | .fast_15bytenop, | ||
| 4071 | .fast_bextr, | ||
| 4072 | .fast_lzcnt, | ||
| 4073 | .fast_movbe, | ||
| 4074 | .fast_scalar_fsqrt, | ||
| 4075 | .fast_scalar_shift_masks, | ||
| 4076 | .fast_variable_perlane_shuffle, | ||
| 4077 | .fast_vector_fsqrt, | ||
| 4078 | .fma, | ||
| 4079 | .fsgsbase, | ||
| 4080 | .fsrm, | ||
| 4081 | .fxsr, | ||
| 4082 | .invpcid, | ||
| 4083 | .lzcnt, | ||
| 4084 | .macrofusion, | ||
| 4085 | .mmx, | ||
| 4086 | .movbe, | ||
| 4087 | .mwaitx, | ||
| 4088 | .nopl, | ||
| 4089 | .pku, | ||
| 4090 | .popcnt, | ||
| 4091 | .prfchw, | ||
| 4092 | .rdpid, | ||
| 4093 | .rdpru, | ||
| 4094 | .rdrnd, | ||
| 4095 | .rdseed, | ||
| 4096 | .sahf, | ||
| 4097 | .sbb_dep_breaking, | ||
| 4098 | .sha, | ||
| 4099 | .slow_shld, | ||
| 4100 | .sse4a, | ||
| 4101 | .vaes, | ||
| 4102 | .vpclmulqdq, | ||
| 4103 | .vzeroupper, | ||
| 4104 | .wbnoinvd, | ||
| 4105 | .x87, | ||
| 4106 | .xsavec, | ||
| 4107 | .xsaveopt, | ||
| 4108 | .xsaves, | ||
| 4109 | }), | ||
| 4110 | }; | ||
| 4111 | pub const znver4 = CpuModel{ | ||
| 4112 | .name = "znver4", | ||
| 4113 | .llvm_name = "znver4", | ||
| 4114 | .features = featureSet(&[_]Feature{ | ||
| 4115 | .@"64bit", | ||
| 4116 | .adx, | ||
| 4117 | .allow_light_256_bit, | ||
| 4118 | .avx512bf16, | ||
| 4119 | .avx512bitalg, | ||
| 4120 | .avx512cd, | ||
| 4121 | .avx512dq, | ||
| 4122 | .avx512ifma, | ||
| 4123 | .avx512vbmi, | ||
| 4124 | .avx512vbmi2, | ||
| 4125 | .avx512vl, | ||
| 4126 | .avx512vnni, | ||
| 4127 | .avx512vpopcntdq, | ||
| 4128 | .bmi, | ||
| 4129 | .bmi2, | ||
| 4130 | .branchfusion, | ||
| 4131 | .clflushopt, | ||
| 4132 | .clwb, | ||
| 4133 | .clzero, | ||
| 4134 | .cmov, | ||
| 4135 | .crc32, | ||
| 4136 | .cx16, | ||
| 4137 | .fast_15bytenop, | ||
| 4138 | .fast_bextr, | ||
| 4139 | .fast_lzcnt, | ||
| 4140 | .fast_movbe, | ||
| 4141 | .fast_scalar_fsqrt, | ||
| 4142 | .fast_scalar_shift_masks, | ||
| 4143 | .fast_variable_perlane_shuffle, | ||
| 4144 | .fast_vector_fsqrt, | ||
| 4145 | .fsgsbase, | ||
| 4146 | .fsrm, | ||
| 4147 | .fxsr, | ||
| 4148 | .gfni, | ||
| 4149 | .invpcid, | ||
| 4150 | .lzcnt, | ||
| 4151 | .macrofusion, | ||
| 4152 | .mmx, | ||
| 4153 | .movbe, | ||
| 4154 | .mwaitx, | ||
| 4155 | .nopl, | ||
| 4156 | .pku, | ||
| 4157 | .popcnt, | ||
| 4158 | .prfchw, | ||
| 4159 | .rdpid, | ||
| 4160 | .rdpru, | ||
| 4161 | .rdrnd, | ||
| 4162 | .rdseed, | ||
| 4163 | .sahf, | ||
| 4164 | .sbb_dep_breaking, | ||
| 4165 | .sha, | ||
| 4166 | .shstk, | ||
| 4167 | .slow_shld, | ||
| 4168 | .sse4a, | ||
| 4169 | .vaes, | ||
| 4170 | .vpclmulqdq, | ||
| 4171 | .vzeroupper, | ||
| 4172 | .wbnoinvd, | ||
| 4173 | .x87, | ||
| 4174 | .xsavec, | ||
| 4175 | .xsaveopt, | ||
| 4176 | .xsaves, | ||
| 4177 | }), | ||
| 4178 | }; | ||
| 4179 | }; | ||
lib/std/target/xtensa.zig deleted-39
| ... | @@ -1,39 +0,0 @@ | ||
| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. | ||
| 2 | |||
| 3 | const std = @import("../std.zig"); | ||
| 4 | const CpuFeature = std.Target.Cpu.Feature; | ||
| 5 | const CpuModel = std.Target.Cpu.Model; | ||
| 6 | |||
| 7 | pub const Feature = enum { | ||
| 8 | density, | ||
| 9 | }; | ||
| 10 | |||
| 11 | pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; | ||
| 12 | pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas; | ||
| 13 | pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny; | ||
| 14 | pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll; | ||
| 15 | |||
| 16 | pub const all_features = blk: { | ||
| 17 | const len = @typeInfo(Feature).Enum.fields.len; | ||
| 18 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | ||
| 19 | var result: [len]CpuFeature = undefined; | ||
| 20 | result[@intFromEnum(Feature.density)] = .{ | ||
| 21 | .llvm_name = "density", | ||
| 22 | .description = "Enable Density instructions", | ||
| 23 | .dependencies = featureSet(&[_]Feature{}), | ||
| 24 | }; | ||
| 25 | const ti = @typeInfo(Feature); | ||
| 26 | for (&result, 0..) |*elem, i| { | ||
| 27 | elem.index = i; | ||
| 28 | elem.name = ti.Enum.fields[i].name; | ||
| 29 | } | ||
| 30 | break :blk result; | ||
| 31 | }; | ||
| 32 | |||
| 33 | pub const cpu = struct { | ||
| 34 | pub const generic = CpuModel{ | ||
| 35 | .name = "generic", | ||
| 36 | .llvm_name = "generic", | ||
| 37 | .features = featureSet(&[_]Feature{}), | ||
| 38 | }; | ||
| 39 | }; | ||