| author |  Jay Petacat <jay@jayschwa.net> 2022-11-05 21:26:33-06:00 |
| committer |  Jakub Konka <kubkon@jakubkonka.com> 2022-11-06 13:39:03+01:00 |
| log | 694d8831c31fca5b669b52d3f9f95a8792daee41 |
| tree | 312af7e91dfa64708405ef4a7a9d234466d40e0e |
| parent | 1aeef297337985c5fd8647462cc7c78ea1a4df43 |
Revert "x86" CPU model (not arch) back to "i386"
PR #13101 recently renamed the "i386" architecture to "x86", and it
seems the specific CPU model got swept up in that. "x86" is an umbrella
term that describes a family of CPUs, and the "i386" is the oldest
supported model under that umbrella.3 files changed, 4 insertions(+), 4 deletions(-)
lib- std
- target.zig
- target
- zig
- system
lib/std/target.zig+1-1
| ... | @@ -1377,7 +1377,7 @@ pub const Target = struct { | ... | @@ -1377,7 +1377,7 @@ pub const Target = struct { |
| 1377 | .sparc, .sparcel => &sparc.cpu.generic, | 1377 | .sparc, .sparcel => &sparc.cpu.generic, |
| 1378 | .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline | 1378 | .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline |
| 1379 | .s390x => &s390x.cpu.generic, | 1379 | .s390x => &s390x.cpu.generic, |
| 1380 | .x86 => &x86.cpu.x86, | 1380 | .x86 => &x86.cpu.i386, |
| 1381 | .x86_64 => &x86.cpu.x86_64, | 1381 | .x86_64 => &x86.cpu.x86_64, |
| 1382 | .nvptx, .nvptx64 => &nvptx.cpu.sm_20, | 1382 | .nvptx, .nvptx64 => &nvptx.cpu.sm_20, |
| 1383 | .ve => &ve.cpu.generic, | 1383 | .ve => &ve.cpu.generic, |
lib/std/target/x86.zig+2-2
| ... | @@ -2040,8 +2040,8 @@ pub const cpu = struct { | ... | @@ -2040,8 +2040,8 @@ pub const cpu = struct { |
| 2040 | .xsaveopt, | 2040 | .xsaveopt, |
| 2041 | }), | 2041 | }), |
| 2042 | }; | 2042 | }; |
| 2043 | pub const x86 = CpuModel{ | 2043 | pub const @"i386" = CpuModel{ |
| 2044 | .name = "x86", | 2044 | .name = "i386", |
| 2045 | .llvm_name = "i386", | 2045 | .llvm_name = "i386", |
| 2046 | .features = featureSet(&[_]Feature{ | 2046 | .features = featureSet(&[_]Feature{ |
| 2047 | .slow_unaligned_mem_16, | 2047 | .slow_unaligned_mem_16, |
lib/std/zig/system/x86.zig+1-1
| ... | @@ -80,7 +80,7 @@ fn detectIntelProcessor(cpu: *Target.Cpu, family: u32, model: u32, brand_id: u32 | ... | @@ -80,7 +80,7 @@ fn detectIntelProcessor(cpu: *Target.Cpu, family: u32, model: u32, brand_id: u32 |
| 80 | } | 80 | } |
| 81 | switch (family) { | 81 | switch (family) { |
| 82 | 3 => { | 82 | 3 => { |
| 83 | cpu.model = &Target.x86.cpu.x86; | 83 | cpu.model = &Target.x86.cpu.i386; |
| 84 | return; | 84 | return; |
| 85 | }, | 85 | }, |
| 86 | 4 => { | 86 | 4 => { |