authorgravatar for me@tadeo.caTadeo Kondrak <me@tadeo.ca> 2020-10-07 17:38:42-06:00
committergravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2020-11-19 13:59:11+02:00
log6b9dc82fa596ac2470810bfda53d61e2add93d33
tree086194972af6204490b6f2604ef80a5e63232cbc
parent2b7781d82ad8d2234b89257676670957e005f214
signaturelock-open Commit is signed but in an unrecognized format.

stage1: Compile error instead of falling back to C for unsupported cc


2 files changed, 72 insertions(+), 23 deletions(-)

src/stage1/analyze.cpp+55
......@@ -1880,6 +1880,58 @@ ZigType *get_auto_err_set_type(CodeGen *g, ZigFn *fn_entry) {
18801880 return err_set_type;
18811881}
18821882
1883// Sync this with get_llvm_cc in codegen.cpp
1884static Error emit_error_unless_callconv_allowed_for_target(CodeGen *g, AstNode *source_node, CallingConvention cc) {
1885 Error ret = ErrorNone;
1886 const char *allowed_platforms = nullptr;
1887 switch (cc) {
1888 case CallingConventionUnspecified:
1889 case CallingConventionC:
1890 case CallingConventionNaked:
1891 case CallingConventionAsync:
1892 break;
1893 case CallingConventionInterrupt:
1894 if (g->zig_target->arch != ZigLLVM_x86
1895 && g->zig_target->arch != ZigLLVM_x86_64
1896 && g->zig_target->arch != ZigLLVM_avr
1897 && g->zig_target->arch != ZigLLVM_msp430)
1898 {
1899 allowed_platforms = "x86, x86_64, AVR, and MS430";
1900 }
1901 break;
1902 case CallingConventionSignal:
1903 if (g->zig_target->arch != ZigLLVM_avr)
1904 allowed_platforms = "AVR";
1905 break;
1906 case CallingConventionStdcall:
1907 case CallingConventionFastcall:
1908 case CallingConventionThiscall:
1909 if (g->zig_target->arch != ZigLLVM_x86)
1910 allowed_platforms = "x86";
1911 break;
1912 case CallingConventionVectorcall:
1913 if (g->zig_target->arch != ZigLLVM_x86
1914 && !(target_is_arm(g->zig_target) && target_arch_pointer_bit_width(g->zig_target->arch) == 64))
1915 {
1916 allowed_platforms = "x86 and AArch64";
1917 }
1918 break;
1919 case CallingConventionAPCS:
1920 case CallingConventionAAPCS:
1921 case CallingConventionAAPCSVFP:
1922 if (!target_is_arm(g->zig_target))
1923 allowed_platforms = "ARM";
1924 }
1925 if (allowed_platforms != nullptr) {
1926 add_node_error(g, source_node, buf_sprintf(
1927 "callconv '%s' is only available on %s, not %s",
1928 calling_convention_name(cc), allowed_platforms,
1929 target_arch_name(g->zig_target->arch)));
1930 ret = ErrorSemanticAnalyzeFail;
1931 }
1932 return ret;
1933}
1934
18831935static ZigType *analyze_fn_type(CodeGen *g, AstNode *proto_node, Scope *child_scope, ZigFn *fn_entry,
18841936 CallingConvention cc)
18851937{
......@@ -2014,6 +2066,9 @@ static ZigType *analyze_fn_type(CodeGen *g, AstNode *proto_node, Scope *child_sc
20142066 fn_entry->align_bytes = fn_type_id.alignment;
20152067 }
20162068
2069 if ((err = emit_error_unless_callconv_allowed_for_target(g, proto_node, cc)))
2070 return g->builtin_types.entry_invalid;
2071
20172072 if (fn_proto->return_anytype_token != nullptr) {
20182073 if (!calling_convention_allows_zig_types(fn_type_id.cc)) {
20192074 add_node_error(g, fn_proto->return_type,
src/stage1/codegen.cpp+17-23
......@@ -155,6 +155,7 @@ static const char *get_mangled_name(CodeGen *g, const char *original_name) {
155155 }
156156}
157157
158// Sync this with emit_error_unless_callconv_allowed_for_target in analyze.cpp
158159static ZigLLVM_CallingConv get_llvm_cc(CodeGen *g, CallingConvention cc) {
159160 switch (cc) {
160161 case CallingConventionUnspecified:
......@@ -164,38 +165,32 @@ static ZigLLVM_CallingConv get_llvm_cc(CodeGen *g, CallingConvention cc) {
164165 case CallingConventionNaked:
165166 zig_unreachable();
166167 case CallingConventionStdcall:
167 if (g->zig_target->arch == ZigLLVM_x86)
168 return ZigLLVM_X86_StdCall;
169 return ZigLLVM_C;
168 assert(g->zig_target->arch == ZigLLVM_x86);
169 return ZigLLVM_X86_StdCall;
170170 case CallingConventionFastcall:
171 if (g->zig_target->arch == ZigLLVM_x86)
172 return ZigLLVM_X86_FastCall;
173 return ZigLLVM_C;
171 assert(g->zig_target->arch == ZigLLVM_x86);
172 return ZigLLVM_X86_FastCall;
174173 case CallingConventionVectorcall:
175174 if (g->zig_target->arch == ZigLLVM_x86)
176175 return ZigLLVM_X86_VectorCall;
177176 if (target_is_arm(g->zig_target) &&
178177 target_arch_pointer_bit_width(g->zig_target->arch) == 64)
179178 return ZigLLVM_AArch64_VectorCall;
180 return ZigLLVM_C;
179 zig_unreachable();
181180 case CallingConventionThiscall:
182 if (g->zig_target->arch == ZigLLVM_x86)
183 return ZigLLVM_X86_ThisCall;
184 return ZigLLVM_C;
181 assert(g->zig_target->arch == ZigLLVM_x86);
182 return ZigLLVM_X86_ThisCall;
185183 case CallingConventionAsync:
186184 return ZigLLVM_Fast;
187185 case CallingConventionAPCS:
188 if (target_is_arm(g->zig_target))
189 return ZigLLVM_ARM_APCS;
190 return ZigLLVM_C;
186 assert(target_is_arm(g->zig_target));
187 return ZigLLVM_ARM_APCS;
191188 case CallingConventionAAPCS:
192 if (target_is_arm(g->zig_target))
193 return ZigLLVM_ARM_AAPCS;
194 return ZigLLVM_C;
189 assert(target_is_arm(g->zig_target));
190 return ZigLLVM_ARM_AAPCS;
195191 case CallingConventionAAPCSVFP:
196 if (target_is_arm(g->zig_target))
197 return ZigLLVM_ARM_AAPCS_VFP;
198 return ZigLLVM_C;
192 assert(target_is_arm(g->zig_target));
193 return ZigLLVM_ARM_AAPCS_VFP;
199194 case CallingConventionInterrupt:
200195 if (g->zig_target->arch == ZigLLVM_x86 ||
201196 g->zig_target->arch == ZigLLVM_x86_64)
......@@ -204,11 +199,10 @@ static ZigLLVM_CallingConv get_llvm_cc(CodeGen *g, CallingConvention cc) {
204199 return ZigLLVM_AVR_INTR;
205200 if (g->zig_target->arch == ZigLLVM_msp430)
206201 return ZigLLVM_MSP430_INTR;
207 return ZigLLVM_C;
202 zig_unreachable();
208203 case CallingConventionSignal:
209 if (g->zig_target->arch == ZigLLVM_avr)
210 return ZigLLVM_AVR_SIGNAL;
211 return ZigLLVM_C;
204 assert(g->zig_target->arch == ZigLLVM_avr);
205 return ZigLLVM_AVR_SIGNAL;
212206 }
213207 zig_unreachable();
214208}