| ... | @@ -132,11 +132,32 @@ const powerpc = struct { | ... | @@ -132,11 +132,32 @@ const powerpc = struct { |
| 132 | } | 132 | } |
| 133 | }; | 133 | }; |
| 134 | | 134 | |
| | 135 | const riscv = struct { |
| | 136 | const models = .{ |
| | 137 | .{ "SiFive U5", &std.Target.riscv.cpu.sifive_u54 }, |
| | 138 | .{ "SiFive U7", &std.Target.riscv.cpu.sifive_u74 }, |
| | 139 | .{ "SpacemiT X60", &std.Target.riscv.cpu.spacemit_x60 }, |
| | 140 | .{ "SpacemiT X100", &std.Target.riscv.cpu.spacemit_x100 }, |
| | 141 | }; |
| | 142 | |
| | 143 | fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { |
| | 144 | var buf: [64:0]u8 = undefined; |
| | 145 | const name = hwModelName(&buf) orelse return null; |
| | 146 | |
| | 147 | inline for (models) |pair| { |
| | 148 | if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch); |
| | 149 | } |
| | 150 | |
| | 151 | return null; |
| | 152 | } |
| | 153 | }; |
| | 154 | |
| 135 | pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { | 155 | pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { |
| 136 | return switch (native_arch) { | 156 | return switch (native_arch) { |
| 137 | .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), | 157 | .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), |
| 138 | .arm => arm.detectNativeCpu(native_arch), | 158 | .arm => arm.detectNativeCpu(native_arch), |
| 139 | .powerpc, .powerpc64 => powerpc.detectNativeCpu(native_arch), | 159 | .powerpc, .powerpc64 => powerpc.detectNativeCpu(native_arch), |
| | 160 | .riscv64 => riscv.detectNativeCpu(native_arch), |
| 140 | else => null, | 161 | else => null, |
| 141 | }; | 162 | }; |
| 142 | } | 163 | } |
Alex Rønne Petersen <alex@alexrp.com> 2026-09-06 10:40:09+02:00