authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-09-06 10:17:06+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-09-06 10:31:01+02:00
log71a7185ebb777e04f668590358079fb1f08da3e8
tree147d6e2b061365ea16be38b4015934b719000058
parent93cb0f1552b0c7285ef22f6713239675170a348b
signature Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.zig.system.openbsd: implement arm CPU model detection

1 files changed, 51 insertions(+), 15 deletions(-)

lib/std/zig/system/openbsd.zig+51-15
...@@ -3,6 +3,24 @@ const std = @import("std");...@@ -3,6 +3,24 @@ const std = @import("std");
33
4const native_arch = builtin.target.cpu.arch;4const native_arch = builtin.target.cpu.arch;
55
6fn hwModelName(buf: [:0]u8) ?[:0]const u8 {
7 const mib: [2]c_int = [_]c_int{
8 std.c.CTL.HW,
9 std.c.HW.MODEL,
10 };
11 var len: usize = buf.len + 1;
12
13 std.posix.sysctl(&mib, buf.ptr, &len, null, 0) catch |err| switch (err) {
14 error.NameTooLong => unreachable,
15 error.PermissionDenied => unreachable,
16 error.SystemResources => unreachable,
17 error.UnknownName => unreachable,
18 error.Unexpected => return null,
19 };
20
21 return buf[0 .. len - 1 :0];
22}
23
6const aarch64 = struct {24const aarch64 = struct {
7 fn sysctlReg(key: c_int) ?u64 {25 fn sysctlReg(key: c_int) ?u64 {
8 const mib: [2]c_int = [_]c_int{26 const mib: [2]c_int = [_]c_int{
...@@ -43,6 +61,37 @@ const aarch64 = struct {...@@ -43,6 +61,37 @@ const aarch64 = struct {
43 }61 }
44};62};
4563
64const arm = struct {
65 const models = .{
66 .{ "ARM Cortex-A12", &std.Target.arm.cpu.cortex_a12 },
67 .{ "ARM Cortex-A15", &std.Target.arm.cpu.cortex_a15 },
68 .{ "ARM Cortex-A17", &std.Target.arm.cpu.cortex_a17 },
69 .{ "ARM Cortex-A32", &std.Target.arm.cpu.cortex_a32 },
70 .{ "ARM Cortex-A35", &std.Target.arm.cpu.cortex_a35 },
71 .{ "ARM Cortex-A53", &std.Target.arm.cpu.cortex_a53 },
72 .{ "ARM Cortex-A55", &std.Target.arm.cpu.cortex_a55 },
73 .{ "ARM Cortex-A57", &std.Target.arm.cpu.cortex_a57 },
74 .{ "ARM Cortex-A5", &std.Target.arm.cpu.cortex_a5 },
75 .{ "ARM Cortex-A72", &std.Target.arm.cpu.cortex_a72 },
76 .{ "ARM Cortex-A73", &std.Target.arm.cpu.cortex_a73 },
77 .{ "ARM Cortex-A75", &std.Target.arm.cpu.cortex_a75 },
78 .{ "ARM Cortex-A7", &std.Target.arm.cpu.cortex_a7 },
79 .{ "ARM Cortex-A8", &std.Target.arm.cpu.cortex_a8 },
80 .{ "ARM Cortex-A9", &std.Target.arm.cpu.cortex_a9 },
81 };
82
83 fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu {
84 var buf: [64:0]u8 = undefined;
85 const name = hwModelName(&buf) orelse return null;
86
87 inline for (models) |pair| {
88 if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch);
89 }
90
91 return null;
92 }
93};
94
46const powerpc = struct {95const powerpc = struct {
47 const models = .{96 const models = .{
48 .{ "601", &std.Target.powerpc.cpu.@"601" },97 .{ "601", &std.Target.powerpc.cpu.@"601" },
...@@ -72,22 +121,8 @@ const powerpc = struct {...@@ -72,22 +121,8 @@ const powerpc = struct {
72 };121 };
73122
74 fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu {123 fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu {
75 const mib: [2]c_int = [_]c_int{
76 std.c.CTL.HW,
77 std.c.HW.MODEL,
78 };
79 var buf: [64:0]u8 = undefined;124 var buf: [64:0]u8 = undefined;
80 var len: usize = buf.len + 1;125 const name = hwModelName(&buf) orelse return null;
81
82 std.posix.sysctl(&mib, &buf, &len, null, 0) catch |err| switch (err) {
83 error.NameTooLong => unreachable,
84 error.PermissionDenied => unreachable,
85 error.SystemResources => unreachable,
86 error.UnknownName => unreachable,
87 error.Unexpected => return null,
88 };
89
90 const name = buf[0 .. len - 1 :0];
91126
92 inline for (models) |pair| {127 inline for (models) |pair| {
93 if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch);128 if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch);
...@@ -100,6 +135,7 @@ const powerpc = struct {...@@ -100,6 +135,7 @@ const powerpc = struct {
100pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu {135pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu {
101 return switch (native_arch) {136 return switch (native_arch) {
102 .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch),137 .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch),
138 .arm => arm.detectNativeCpu(native_arch),
103 .powerpc, .powerpc64 => powerpc.detectNativeCpu(native_arch),139 .powerpc, .powerpc64 => powerpc.detectNativeCpu(native_arch),
104 else => null,140 else => null,
105 };141 };