| author | |
| committer | |
| log | 6cab3c304eb2d45be6aceb48aa5bbd1fd1298fa3 |
| tree | 62fed7f5ba14794931f9816abc767168a1302314 |
| parent | 676e4f3824054cf39c87d008909b0e57bb9bdcc8 |
2 files changed, 12 insertions(+), 8 deletions(-)
lib/std/zig/system/x86.zig+4-4| ... | ... | @@ -528,7 +528,7 @@ const CpuidLeaf = packed struct { |
| 528 | 528 | edx: u32, |
| 529 | 529 | }; |
| 530 | 530 | |
| 531 | extern fn zig_cpuid(leaf_id: u32, subid: u32, eax: *u32, ebx: *u32, ecx: *u32, edx: *u32) void; | |
| 531 | extern fn zig_x86_cpuid(leaf_id: u32, subid: u32, eax: *u32, ebx: *u32, ecx: *u32, edx: *u32) void; | |
| 532 | 532 | |
| 533 | 533 | fn cpuid(leaf_id: u32, subid: u32) CpuidLeaf { |
| 534 | 534 | // valid for both x86 and x86_64 |
| ... | ... | @@ -538,7 +538,7 @@ fn cpuid(leaf_id: u32, subid: u32) CpuidLeaf { |
| 538 | 538 | var edx: u32 = undefined; |
| 539 | 539 | |
| 540 | 540 | if (builtin.zig_backend == .stage2_c) { |
| 541 | zig_cpuid(leaf_id, subid, &eax, &ebx, &ecx, &edx); | |
| 541 | zig_x86_cpuid(leaf_id, subid, &eax, &ebx, &ecx, &edx); | |
| 542 | 542 | } else { |
| 543 | 543 | asm volatile ("cpuid" |
| 544 | 544 | : [_] "={eax}" (eax), |
| ... | ... | @@ -553,12 +553,12 @@ fn cpuid(leaf_id: u32, subid: u32) CpuidLeaf { |
| 553 | 553 | return .{ .eax = eax, .ebx = ebx, .ecx = ecx, .edx = edx }; |
| 554 | 554 | } |
| 555 | 555 | |
| 556 | extern fn zig_get_xcr0() u32; | |
| 556 | extern fn zig_x86_get_xcr0() u32; | |
| 557 | 557 | |
| 558 | 558 | // Read control register 0 (XCR0). Used to detect features such as AVX. |
| 559 | 559 | fn getXCR0() u32 { |
| 560 | 560 | if (builtin.zig_backend == .stage2_c) { |
| 561 | return zig_get_xcr0(); | |
| 561 | return zig_x86_get_xcr0(); | |
| 562 | 562 | } |
| 563 | 563 | |
| 564 | 564 | return asm volatile ( |
lib/zig.h+8-4| ... | ... | @@ -8,7 +8,7 @@ |
| 8 | 8 | |
| 9 | 9 | #if _MSC_VER |
| 10 | 10 | #include <intrin.h> |
| 11 | #else | |
| 11 | #elif defined(__i386__) || defined(__x86_64__) | |
| 12 | 12 | #include <cpuid.h> |
| 13 | 13 | #endif |
| 14 | 14 | |
| ... | ... | @@ -2345,11 +2345,13 @@ zig_msvc_atomics_128op(u128, nand) |
| 2345 | 2345 | zig_msvc_atomics_128op(u128, min) |
| 2346 | 2346 | zig_msvc_atomics_128op(u128, max) |
| 2347 | 2347 | |
| 2348 | #endif | |
| 2348 | #endif /* _MSC_VER && (_M_IX86 || _M_X64) */ | |
| 2349 | 2349 | |
| 2350 | 2350 | /* ========================= Special Case Intrinsics ========================= */ |
| 2351 | 2351 | |
| 2352 | static inline void zig_cpuid(zig_u32 leaf_id, zig_u32 subid, zig_u32* eax, zig_u32* ebx, zig_u32* ecx, zig_u32* edx) { | |
| 2352 | #if (_MSC_VER && (_M_IX86 || _M_X64)) || defined(__i386__) || defined(__x86_64__) | |
| 2353 | ||
| 2354 | static inline void zig_x86_cpuid(zig_u32 leaf_id, zig_u32 subid, zig_u32* eax, zig_u32* ebx, zig_u32* ecx, zig_u32* edx) { | |
| 2353 | 2355 | #if _MSC_VER |
| 2354 | 2356 | zig_u32 cpu_info[4]; |
| 2355 | 2357 | __cpuidex(cpu_info, leaf_id, subid); |
| ... | ... | @@ -2362,7 +2364,7 @@ static inline void zig_cpuid(zig_u32 leaf_id, zig_u32 subid, zig_u32* eax, zig_u |
| 2362 | 2364 | #endif |
| 2363 | 2365 | } |
| 2364 | 2366 | |
| 2365 | static inline zig_u32 zig_get_xcr0() { | |
| 2367 | static inline zig_u32 zig_x86_get_xcr0() { | |
| 2366 | 2368 | #if _MSC_VER |
| 2367 | 2369 | return (zig_u32)_xgetbv(0); |
| 2368 | 2370 | #else |
| ... | ... | @@ -2372,3 +2374,5 @@ static inline zig_u32 zig_get_xcr0() { |
| 2372 | 2374 | return eax; |
| 2373 | 2375 | #endif |
| 2374 | 2376 | } |
| 2377 | ||
| 2378 | #endif |