authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-09-14 23:03:13-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-09-14 23:03:13-07:00
log6e9396e32b4f31eb57ac18da510fff1ad24637a0
tree84f169e45e261baf806db6a0f2e821ec5f9ae684
parent1ad60c43868212e3c4162196686f3017f80efc02

integrate target features into building assembly code

This brings us up to par from what stage1 does. There will still be an open issue for completing this.

2 files changed, 15 insertions(+), 5 deletions(-)

BRANCH_TODO+1-1
...@@ -1,4 +1,3 @@...@@ -1,4 +1,3 @@
1 * integrate target features into building assembly code
2 * handle .d files from c objects1 * handle .d files from c objects
3 * glibc .so files2 * glibc .so files
4 * support rpaths in ELF linker code3 * support rpaths in ELF linker code
...@@ -46,3 +45,4 @@...@@ -46,3 +45,4 @@
46 * improve robustness of response file parsing45 * improve robustness of response file parsing
47 * there are a couple panic("TODO") in clang options parsing46 * there are a couple panic("TODO") in clang options parsing
48 * std.testing needs improvement to support exposing directory path for its tmp dir (look for "bogus")47 * std.testing needs improvement to support exposing directory path for its tmp dir (look for "bogus")
48 * integrate target features into building assembly code
src-self-hosted/Compilation.zig+14-4
...@@ -1241,10 +1241,20 @@ fn addCCArgs(...@@ -1241,10 +1241,20 @@ fn addCCArgs(
1241 },1241 },
1242 .so, .assembly, .ll, .bc, .unknown => {},1242 .so, .assembly, .ll, .bc, .unknown => {},
1243 }1243 }
1244 // TODO CLI args for cpu features when compiling assembly1244 // Argh, why doesn't the assembler accept the list of CPU features?!
1245 //for (size_t i = 0; i < g->zig_target->llvm_cpu_features_asm_len; i += 1) {1245 // I don't see a way to do this other than hard coding everything.
1246 // try argv.append(g->zig_target->llvm_cpu_features_asm_ptr[i]);1246 switch (target.cpu.arch) {
1247 //}1247 .riscv32, .riscv64 => {
1248 if (std.Target.riscv.featureSetHas(target.cpu.features, .relax)) {
1249 try argv.append("-mrelax");
1250 } else {
1251 try argv.append("-mno-relax");
1252 }
1253 },
1254 else => {
1255 // TODO
1256 },
1257 }
12481258
1249 if (target.os.tag == .freestanding) {1259 if (target.os.tag == .freestanding) {
1250 try argv.append("-ffreestanding");1260 try argv.append("-ffreestanding");