authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-11-25 19:45:07+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-11-28 17:07:34+01:00
log6edf9127fe810a5f6493e61f123f9f25a2c3f7dd
tree7818beb9888181730eef52a770ee217b6f97cde0
parent625415d7388deea1ee2d95fe5bbed28bf6a52d01

windows: add missing enum values for ProcessorFeatures enumeration

1 files changed, 19 insertions(+), 0 deletions(-)

lib/std/os/windows.zig+19
......@@ -3731,6 +3731,9 @@ pub const PF = enum(DWORD) {
37313731 /// The MMX instruction set is available.
37323732 MMX_INSTRUCTIONS_AVAILABLE = 3,
37333733
3734 PPC_MOVEMEM_64BIT_OK = 4,
3735 ALPHA_BYTE_INSTRUCTIONS = 5,
3736
37343737 /// The SSE instruction set is available.
37353738 XMMI_INSTRUCTIONS_AVAILABLE = 6,
37363739
......@@ -3746,6 +3749,8 @@ pub const PF = enum(DWORD) {
37463749 /// The SSE2 instruction set is available.
37473750 XMMI64_INSTRUCTIONS_AVAILABLE = 10,
37483751
3752 SSE_DAZ_MODE_AVAILABLE = 11,
3753
37493754 /// Data execution prevention is enabled.
37503755 NX_ENABLED = 12,
37513756
......@@ -3768,6 +3773,9 @@ pub const PF = enum(DWORD) {
37683773 /// This flag has the same meaning as PF_ARM_VFP_EXTENDED_REGISTERS.
37693774 ARM_VFP_32_REGISTERS_AVAILABLE = 18,
37703775
3776 /// This ARM processor implements the ARM v8 NEON instruction set.
3777 ARM_NEON_INSTRUCTIONS_AVAILABLE = 19,
3778
37713779 /// Second Level Address Translation is supported by the hardware.
37723780 SECOND_LEVEL_ADDRESS_TRANSLATION = 20,
37733781
......@@ -3792,6 +3800,8 @@ pub const PF = enum(DWORD) {
37923800 /// The floating-point multiply-accumulate instruction is available.
37933801 ARM_FMAC_INSTRUCTIONS_AVAILABLE = 27,
37943802
3803 RDRAND_INSTRUCTION_AVAILABLE = 28,
3804
37953805 /// This ARM processor implements the ARM v8 instructions set.
37963806 ARM_V8_INSTRUCTIONS_AVAILABLE = 29,
37973807
......@@ -3801,9 +3811,14 @@ pub const PF = enum(DWORD) {
38013811 /// This ARM processor implements the ARM v8 extra CRC32 instructions.
38023812 ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE = 31,
38033813
3814 RDTSCP_INSTRUCTION_AVAILABLE = 32,
3815 RDPID_INSTRUCTION_AVAILABLE = 33,
3816
38043817 /// This ARM processor implements the ARM v8.1 atomic instructions (e.g., CAS, SWP).
38053818 ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE = 34,
38063819
3820 MONITORX_INSTRUCTION_AVAILABLE = 35,
3821
38073822 /// The SSSE3 instruction set is available.
38083823 SSSE3_INSTRUCTIONS_AVAILABLE = 36,
38093824
......@@ -3821,6 +3836,10 @@ pub const PF = enum(DWORD) {
38213836
38223837 /// The AVX512F instruction set is available.
38233838 AVX512F_INSTRUCTIONS_AVAILABLE = 41,
3839
3840 ERMS_AVAILABLE = 42,
3841 ARM_V82_DP_INSTRUCTIONS_AVAILABLE = 43,
3842 ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE = 44,
38243843};
38253844
38263845pub const MAX_WOW64_SHARED_ENTRIES = 16;