| ... | @@ -3731,6 +3731,9 @@ pub const PF = enum(DWORD) { | ... | @@ -3731,6 +3731,9 @@ pub const PF = enum(DWORD) { |
| 3731 | /// The MMX instruction set is available. | 3731 | /// The MMX instruction set is available. |
| 3732 | MMX_INSTRUCTIONS_AVAILABLE = 3, | 3732 | MMX_INSTRUCTIONS_AVAILABLE = 3, |
| 3733 | | 3733 | |
| | 3734 | PPC_MOVEMEM_64BIT_OK = 4, |
| | 3735 | ALPHA_BYTE_INSTRUCTIONS = 5, |
| | 3736 | |
| 3734 | /// The SSE instruction set is available. | 3737 | /// The SSE instruction set is available. |
| 3735 | XMMI_INSTRUCTIONS_AVAILABLE = 6, | 3738 | XMMI_INSTRUCTIONS_AVAILABLE = 6, |
| 3736 | | 3739 | |
| ... | @@ -3746,6 +3749,8 @@ pub const PF = enum(DWORD) { | ... | @@ -3746,6 +3749,8 @@ pub const PF = enum(DWORD) { |
| 3746 | /// The SSE2 instruction set is available. | 3749 | /// The SSE2 instruction set is available. |
| 3747 | XMMI64_INSTRUCTIONS_AVAILABLE = 10, | 3750 | XMMI64_INSTRUCTIONS_AVAILABLE = 10, |
| 3748 | | 3751 | |
| | 3752 | SSE_DAZ_MODE_AVAILABLE = 11, |
| | 3753 | |
| 3749 | /// Data execution prevention is enabled. | 3754 | /// Data execution prevention is enabled. |
| 3750 | NX_ENABLED = 12, | 3755 | NX_ENABLED = 12, |
| 3751 | | 3756 | |
| ... | @@ -3768,6 +3773,9 @@ pub const PF = enum(DWORD) { | ... | @@ -3768,6 +3773,9 @@ pub const PF = enum(DWORD) { |
| 3768 | /// This flag has the same meaning as PF_ARM_VFP_EXTENDED_REGISTERS. | 3773 | /// This flag has the same meaning as PF_ARM_VFP_EXTENDED_REGISTERS. |
| 3769 | ARM_VFP_32_REGISTERS_AVAILABLE = 18, | 3774 | ARM_VFP_32_REGISTERS_AVAILABLE = 18, |
| 3770 | | 3775 | |
| | 3776 | /// This ARM processor implements the ARM v8 NEON instruction set. |
| | 3777 | ARM_NEON_INSTRUCTIONS_AVAILABLE = 19, |
| | 3778 | |
| 3771 | /// Second Level Address Translation is supported by the hardware. | 3779 | /// Second Level Address Translation is supported by the hardware. |
| 3772 | SECOND_LEVEL_ADDRESS_TRANSLATION = 20, | 3780 | SECOND_LEVEL_ADDRESS_TRANSLATION = 20, |
| 3773 | | 3781 | |
| ... | @@ -3792,6 +3800,8 @@ pub const PF = enum(DWORD) { | ... | @@ -3792,6 +3800,8 @@ pub const PF = enum(DWORD) { |
| 3792 | /// The floating-point multiply-accumulate instruction is available. | 3800 | /// The floating-point multiply-accumulate instruction is available. |
| 3793 | ARM_FMAC_INSTRUCTIONS_AVAILABLE = 27, | 3801 | ARM_FMAC_INSTRUCTIONS_AVAILABLE = 27, |
| 3794 | | 3802 | |
| | 3803 | RDRAND_INSTRUCTION_AVAILABLE = 28, |
| | 3804 | |
| 3795 | /// This ARM processor implements the ARM v8 instructions set. | 3805 | /// This ARM processor implements the ARM v8 instructions set. |
| 3796 | ARM_V8_INSTRUCTIONS_AVAILABLE = 29, | 3806 | ARM_V8_INSTRUCTIONS_AVAILABLE = 29, |
| 3797 | | 3807 | |
| ... | @@ -3801,9 +3811,14 @@ pub const PF = enum(DWORD) { | ... | @@ -3801,9 +3811,14 @@ pub const PF = enum(DWORD) { |
| 3801 | /// This ARM processor implements the ARM v8 extra CRC32 instructions. | 3811 | /// This ARM processor implements the ARM v8 extra CRC32 instructions. |
| 3802 | ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE = 31, | 3812 | ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE = 31, |
| 3803 | | 3813 | |
| | 3814 | RDTSCP_INSTRUCTION_AVAILABLE = 32, |
| | 3815 | RDPID_INSTRUCTION_AVAILABLE = 33, |
| | 3816 | |
| 3804 | /// This ARM processor implements the ARM v8.1 atomic instructions (e.g., CAS, SWP). | 3817 | /// This ARM processor implements the ARM v8.1 atomic instructions (e.g., CAS, SWP). |
| 3805 | ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE = 34, | 3818 | ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE = 34, |
| 3806 | | 3819 | |
| | 3820 | MONITORX_INSTRUCTION_AVAILABLE = 35, |
| | 3821 | |
| 3807 | /// The SSSE3 instruction set is available. | 3822 | /// The SSSE3 instruction set is available. |
| 3808 | SSSE3_INSTRUCTIONS_AVAILABLE = 36, | 3823 | SSSE3_INSTRUCTIONS_AVAILABLE = 36, |
| 3809 | | 3824 | |
| ... | @@ -3821,6 +3836,10 @@ pub const PF = enum(DWORD) { | ... | @@ -3821,6 +3836,10 @@ pub const PF = enum(DWORD) { |
| 3821 | | 3836 | |
| 3822 | /// The AVX512F instruction set is available. | 3837 | /// The AVX512F instruction set is available. |
| 3823 | AVX512F_INSTRUCTIONS_AVAILABLE = 41, | 3838 | AVX512F_INSTRUCTIONS_AVAILABLE = 41, |
| | 3839 | |
| | 3840 | ERMS_AVAILABLE = 42, |
| | 3841 | ARM_V82_DP_INSTRUCTIONS_AVAILABLE = 43, |
| | 3842 | ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE = 44, |
| 3824 | }; | 3843 | }; |
| 3825 | | 3844 | |
| 3826 | pub const MAX_WOW64_SHARED_ENTRIES = 16; | 3845 | pub const MAX_WOW64_SHARED_ENTRIES = 16; |