| author | |
| committer | |
| log | 6f3ed2f71f3548b399214f604d820cd2dd2887f3 |
| tree | 3d3e25dd7e53bb40f25fb25769e18c2ec3d1d6c8 |
| parent | 38bf94280bb9735a005673d3eae132f75795b854 |
llvm commit b2851aea80e5a8f0cfd6c3c5a56a6b00fb28c6b6
zig-llvm-target-details-generator commit
4299674ecabeb668b0d84285cd1b41a652a391b115 files changed, 2040 insertions(+), 1500 deletions(-)
lib/std/target/aarch64.zig+529-263| ... | @@ -8,9 +8,18 @@ const CpuFeature = std.Target.Cpu.Feature; | ... | @@ -8,9 +8,18 @@ const CpuFeature = std.Target.Cpu.Feature; |
| 8 | const CpuModel = std.Target.Cpu.Model; | 8 | const CpuModel = std.Target.Cpu.Model; |
| 9 | 9 | ||
| 10 | pub const Feature = enum { | 10 | pub const Feature = enum { |
| 11 | a34, | 11 | CONTEXTIDREL2, |
| 12 | a35, | ||
| 13 | a53, | ||
| 14 | a55, | ||
| 15 | a57, | ||
| 16 | a64fx, | ||
| 12 | a65, | 17 | a65, |
| 18 | a72, | ||
| 19 | a73, | ||
| 20 | a75, | ||
| 13 | a76, | 21 | a76, |
| 22 | a77, | ||
| 14 | aes, | 23 | aes, |
| 15 | aggressive_fma, | 24 | aggressive_fma, |
| 16 | alternate_sextload_cvt_f32_pattern, | 25 | alternate_sextload_cvt_f32_pattern, |
| ... | @@ -36,10 +45,14 @@ pub const Feature = enum { | ... | @@ -36,10 +45,14 @@ pub const Feature = enum { |
| 36 | call_saved_x18, | 45 | call_saved_x18, |
| 37 | call_saved_x8, | 46 | call_saved_x8, |
| 38 | call_saved_x9, | 47 | call_saved_x9, |
| 48 | carmel, | ||
| 39 | ccdp, | 49 | ccdp, |
| 40 | ccidx, | 50 | ccidx, |
| 41 | ccpp, | 51 | ccpp, |
| 42 | complxnum, | 52 | complxnum, |
| 53 | cortex_a78, | ||
| 54 | cortex_r82, | ||
| 55 | cortex_x1, | ||
| 43 | crc, | 56 | crc, |
| 44 | crypto, | 57 | crypto, |
| 45 | custom_cheap_as_move, | 58 | custom_cheap_as_move, |
| ... | @@ -49,9 +62,11 @@ pub const Feature = enum { | ... | @@ -49,9 +62,11 @@ pub const Feature = enum { |
| 49 | ecv, | 62 | ecv, |
| 50 | ete, | 63 | ete, |
| 51 | exynos_cheap_as_move, | 64 | exynos_cheap_as_move, |
| 65 | exynosm3, | ||
| 52 | exynosm4, | 66 | exynosm4, |
| 53 | f32mm, | 67 | f32mm, |
| 54 | f64mm, | 68 | f64mm, |
| 69 | falkor, | ||
| 55 | fgt, | 70 | fgt, |
| 56 | fmi, | 71 | fmi, |
| 57 | force_32bit_jump_tables, | 72 | force_32bit_jump_tables, |
| ... | @@ -67,8 +82,9 @@ pub const Feature = enum { | ... | @@ -67,8 +82,9 @@ pub const Feature = enum { |
| 67 | fuse_literals, | 82 | fuse_literals, |
| 68 | harden_sls_blr, | 83 | harden_sls_blr, |
| 69 | harden_sls_retbr, | 84 | harden_sls_retbr, |
| 70 | i8mm, | 85 | _i8mm, |
| 71 | jsconv, | 86 | jsconv, |
| 87 | kryo, | ||
| 72 | lor, | 88 | lor, |
| 73 | lse, | 89 | lse, |
| 74 | lsl_fast, | 90 | lsl_fast, |
| ... | @@ -77,8 +93,11 @@ pub const Feature = enum { | ... | @@ -77,8 +93,11 @@ pub const Feature = enum { |
| 77 | neon, | 93 | neon, |
| 78 | neoversee1, | 94 | neoversee1, |
| 79 | neoversen1, | 95 | neoversen1, |
| 96 | neoversen2, | ||
| 97 | neoversev1, | ||
| 80 | no_neg_immediates, | 98 | no_neg_immediates, |
| 81 | nv, | 99 | nv, |
| 100 | outline_atomics, | ||
| 82 | pa, | 101 | pa, |
| 83 | pan, | 102 | pan, |
| 84 | pan_rwv, | 103 | pan_rwv, |
| ... | @@ -88,7 +107,6 @@ pub const Feature = enum { | ... | @@ -88,7 +107,6 @@ pub const Feature = enum { |
| 88 | predres, | 107 | predres, |
| 89 | rand, | 108 | rand, |
| 90 | ras, | 109 | ras, |
| 91 | rasv8_4, | ||
| 92 | rcpc, | 110 | rcpc, |
| 93 | rcpc_immo, | 111 | rcpc_immo, |
| 94 | rdm, | 112 | rdm, |
| ... | @@ -117,6 +135,7 @@ pub const Feature = enum { | ... | @@ -117,6 +135,7 @@ pub const Feature = enum { |
| 117 | reserve_x6, | 135 | reserve_x6, |
| 118 | reserve_x7, | 136 | reserve_x7, |
| 119 | reserve_x9, | 137 | reserve_x9, |
| 138 | saphira, | ||
| 120 | sb, | 139 | sb, |
| 121 | sel2, | 140 | sel2, |
| 122 | sha2, | 141 | sha2, |
| ... | @@ -136,6 +155,12 @@ pub const Feature = enum { | ... | @@ -136,6 +155,12 @@ pub const Feature = enum { |
| 136 | sve2_sha3, | 155 | sve2_sha3, |
| 137 | sve2_sm4, | 156 | sve2_sm4, |
| 138 | tagged_globals, | 157 | tagged_globals, |
| 158 | thunderx, | ||
| 159 | thunderx2t99, | ||
| 160 | thunderx3t110, | ||
| 161 | thunderxt81, | ||
| 162 | thunderxt83, | ||
| 163 | thunderxt88, | ||
| 139 | tlb_rmi, | 164 | tlb_rmi, |
| 140 | tme, | 165 | tme, |
| 141 | tpidr_el1, | 166 | tpidr_el1, |
| ... | @@ -143,18 +168,19 @@ pub const Feature = enum { | ... | @@ -143,18 +168,19 @@ pub const Feature = enum { |
| 143 | tpidr_el3, | 168 | tpidr_el3, |
| 144 | tracev8_4, | 169 | tracev8_4, |
| 145 | trbe, | 170 | trbe, |
| 171 | tsv110, | ||
| 146 | uaops, | 172 | uaops, |
| 147 | use_aa, | 173 | use_aa, |
| 148 | use_experimental_zeroing_pseudos, | 174 | use_experimental_zeroing_pseudos, |
| 149 | use_postra_scheduler, | 175 | use_postra_scheduler, |
| 150 | use_reciprocal_square_root, | 176 | use_reciprocal_square_root, |
| 151 | v8a, | ||
| 152 | v8_1a, | 177 | v8_1a, |
| 153 | v8_2a, | 178 | v8_2a, |
| 154 | v8_3a, | 179 | v8_3a, |
| 155 | v8_4a, | 180 | v8_4a, |
| 156 | v8_5a, | 181 | v8_5a, |
| 157 | v8_6a, | 182 | v8_6a, |
| 183 | v8r, | ||
| 158 | vh, | 184 | vh, |
| 159 | zcm, | 185 | zcm, |
| 160 | zcz, | 186 | zcz, |
| ... | @@ -166,18 +192,87 @@ pub const Feature = enum { | ... | @@ -166,18 +192,87 @@ pub const Feature = enum { |
| 166 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 192 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 167 | 193 | ||
| 168 | pub const all_features = blk: { | 194 | pub const all_features = blk: { |
| 169 | @setEvalBranchQuota(2000); | 195 | @setEvalBranchQuota(10000); |
| 170 | const len = @typeInfo(Feature).Enum.fields.len; | 196 | const len = @typeInfo(Feature).Enum.fields.len; |
| 171 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 197 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 172 | var result: [len]CpuFeature = undefined; | 198 | var result: [len]CpuFeature = undefined; |
| 173 | result[@enumToInt(Feature.a34)] = .{ | 199 | result[@enumToInt(Feature.CONTEXTIDREL2)] = .{ |
| 200 | .llvm_name = "CONTEXTIDREL2", | ||
| 201 | .description = "Enable RW operand CONTEXTIDR_EL2", | ||
| 202 | .dependencies = featureSet(&[_]Feature{}), | ||
| 203 | }; | ||
| 204 | result[@enumToInt(Feature.a35)] = .{ | ||
| 174 | .llvm_name = "a35", | 205 | .llvm_name = "a35", |
| 175 | .description = "Cortex-A34 ARM processors", | 206 | .description = "Cortex-A35 ARM processors", |
| 207 | .dependencies = featureSet(&[_]Feature{ | ||
| 208 | .crc, | ||
| 209 | .crypto, | ||
| 210 | .fp_armv8, | ||
| 211 | .neon, | ||
| 212 | .perfmon, | ||
| 213 | }), | ||
| 214 | }; | ||
| 215 | result[@enumToInt(Feature.a53)] = .{ | ||
| 216 | .llvm_name = "a53", | ||
| 217 | .description = "Cortex-A53 ARM processors", | ||
| 218 | .dependencies = featureSet(&[_]Feature{ | ||
| 219 | .balance_fp_ops, | ||
| 220 | .crc, | ||
| 221 | .crypto, | ||
| 222 | .custom_cheap_as_move, | ||
| 223 | .fp_armv8, | ||
| 224 | .fuse_aes, | ||
| 225 | .neon, | ||
| 226 | .perfmon, | ||
| 227 | .use_aa, | ||
| 228 | .use_postra_scheduler, | ||
| 229 | }), | ||
| 230 | }; | ||
| 231 | result[@enumToInt(Feature.a55)] = .{ | ||
| 232 | .llvm_name = "a55", | ||
| 233 | .description = "Cortex-A55 ARM processors", | ||
| 234 | .dependencies = featureSet(&[_]Feature{ | ||
| 235 | .crypto, | ||
| 236 | .dotprod, | ||
| 237 | .fp_armv8, | ||
| 238 | .fullfp16, | ||
| 239 | .fuse_aes, | ||
| 240 | .neon, | ||
| 241 | .perfmon, | ||
| 242 | .rcpc, | ||
| 243 | .v8_2a, | ||
| 244 | }), | ||
| 245 | }; | ||
| 246 | result[@enumToInt(Feature.a57)] = .{ | ||
| 247 | .llvm_name = "a57", | ||
| 248 | .description = "Cortex-A57 ARM processors", | ||
| 176 | .dependencies = featureSet(&[_]Feature{ | 249 | .dependencies = featureSet(&[_]Feature{ |
| 250 | .balance_fp_ops, | ||
| 177 | .crc, | 251 | .crc, |
| 178 | .crypto, | 252 | .crypto, |
| 253 | .custom_cheap_as_move, | ||
| 254 | .fp_armv8, | ||
| 255 | .fuse_aes, | ||
| 256 | .fuse_literals, | ||
| 257 | .neon, | ||
| 258 | .perfmon, | ||
| 259 | .predictable_select_expensive, | ||
| 260 | .use_postra_scheduler, | ||
| 261 | }), | ||
| 262 | }; | ||
| 263 | result[@enumToInt(Feature.a64fx)] = .{ | ||
| 264 | .llvm_name = "a64fx", | ||
| 265 | .description = "Fujitsu A64FX processors", | ||
| 266 | .dependencies = featureSet(&[_]Feature{ | ||
| 267 | .complxnum, | ||
| 268 | .fp_armv8, | ||
| 269 | .fullfp16, | ||
| 270 | .neon, | ||
| 179 | .perfmon, | 271 | .perfmon, |
| 180 | .v8a, | 272 | .sha2, |
| 273 | .sve, | ||
| 274 | .use_postra_scheduler, | ||
| 275 | .v8_2a, | ||
| 181 | }), | 276 | }), |
| 182 | }; | 277 | }; |
| 183 | result[@enumToInt(Feature.a65)] = .{ | 278 | result[@enumToInt(Feature.a65)] = .{ |
| ... | @@ -195,18 +290,72 @@ pub const all_features = blk: { | ... | @@ -195,18 +290,72 @@ pub const all_features = blk: { |
| 195 | .v8_2a, | 290 | .v8_2a, |
| 196 | }), | 291 | }), |
| 197 | }; | 292 | }; |
| 293 | result[@enumToInt(Feature.a72)] = .{ | ||
| 294 | .llvm_name = "a72", | ||
| 295 | .description = "Cortex-A72 ARM processors", | ||
| 296 | .dependencies = featureSet(&[_]Feature{ | ||
| 297 | .crc, | ||
| 298 | .crypto, | ||
| 299 | .fp_armv8, | ||
| 300 | .fuse_aes, | ||
| 301 | .neon, | ||
| 302 | .perfmon, | ||
| 303 | }), | ||
| 304 | }; | ||
| 305 | result[@enumToInt(Feature.a73)] = .{ | ||
| 306 | .llvm_name = "a73", | ||
| 307 | .description = "Cortex-A73 ARM processors", | ||
| 308 | .dependencies = featureSet(&[_]Feature{ | ||
| 309 | .crc, | ||
| 310 | .crypto, | ||
| 311 | .fp_armv8, | ||
| 312 | .fuse_aes, | ||
| 313 | .neon, | ||
| 314 | .perfmon, | ||
| 315 | }), | ||
| 316 | }; | ||
| 317 | result[@enumToInt(Feature.a75)] = .{ | ||
| 318 | .llvm_name = "a75", | ||
| 319 | .description = "Cortex-A75 ARM processors", | ||
| 320 | .dependencies = featureSet(&[_]Feature{ | ||
| 321 | .crypto, | ||
| 322 | .dotprod, | ||
| 323 | .fp_armv8, | ||
| 324 | .fullfp16, | ||
| 325 | .fuse_aes, | ||
| 326 | .neon, | ||
| 327 | .perfmon, | ||
| 328 | .rcpc, | ||
| 329 | .v8_2a, | ||
| 330 | }), | ||
| 331 | }; | ||
| 198 | result[@enumToInt(Feature.a76)] = .{ | 332 | result[@enumToInt(Feature.a76)] = .{ |
| 199 | .llvm_name = "a76", | 333 | .llvm_name = "a76", |
| 200 | .description = "Cortex-A76 ARM processors", | 334 | .description = "Cortex-A76 ARM processors", |
| 201 | .dependencies = featureSet(&[_]Feature{ | 335 | .dependencies = featureSet(&[_]Feature{ |
| 202 | .crypto, | 336 | .crypto, |
| 203 | .dotprod, | 337 | .dotprod, |
| 338 | .fp_armv8, | ||
| 204 | .fullfp16, | 339 | .fullfp16, |
| 340 | .neon, | ||
| 205 | .rcpc, | 341 | .rcpc, |
| 206 | .ssbs, | 342 | .ssbs, |
| 207 | .v8_2a, | 343 | .v8_2a, |
| 208 | }), | 344 | }), |
| 209 | }; | 345 | }; |
| 346 | result[@enumToInt(Feature.a77)] = .{ | ||
| 347 | .llvm_name = "a77", | ||
| 348 | .description = "Cortex-A77 ARM processors", | ||
| 349 | .dependencies = featureSet(&[_]Feature{ | ||
| 350 | .crypto, | ||
| 351 | .dotprod, | ||
| 352 | .fp_armv8, | ||
| 353 | .fullfp16, | ||
| 354 | .neon, | ||
| 355 | .rcpc, | ||
| 356 | .v8_2a, | ||
| 357 | }), | ||
| 358 | }; | ||
| 210 | result[@enumToInt(Feature.aes)] = .{ | 359 | result[@enumToInt(Feature.aes)] = .{ |
| 211 | .llvm_name = "aes", | 360 | .llvm_name = "aes", |
| 212 | .description = "Enable AES support", | 361 | .description = "Enable AES support", |
| ... | @@ -415,6 +564,16 @@ pub const all_features = blk: { | ... | @@ -415,6 +564,16 @@ pub const all_features = blk: { |
| 415 | .description = "Make X9 callee saved.", | 564 | .description = "Make X9 callee saved.", |
| 416 | .dependencies = featureSet(&[_]Feature{}), | 565 | .dependencies = featureSet(&[_]Feature{}), |
| 417 | }; | 566 | }; |
| 567 | result[@enumToInt(Feature.carmel)] = .{ | ||
| 568 | .llvm_name = "carmel", | ||
| 569 | .description = "Nvidia Carmel processors", | ||
| 570 | .dependencies = featureSet(&[_]Feature{ | ||
| 571 | .crypto, | ||
| 572 | .fullfp16, | ||
| 573 | .neon, | ||
| 574 | .v8_2a, | ||
| 575 | }), | ||
| 576 | }; | ||
| 418 | result[@enumToInt(Feature.ccdp)] = .{ | 577 | result[@enumToInt(Feature.ccdp)] = .{ |
| 419 | .llvm_name = "ccdp", | 578 | .llvm_name = "ccdp", |
| 420 | .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", | 579 | .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", |
| ... | @@ -437,6 +596,49 @@ pub const all_features = blk: { | ... | @@ -437,6 +596,49 @@ pub const all_features = blk: { |
| 437 | .neon, | 596 | .neon, |
| 438 | }), | 597 | }), |
| 439 | }; | 598 | }; |
| 599 | result[@enumToInt(Feature.cortex_a78)] = .{ | ||
| 600 | .llvm_name = "cortex-a78", | ||
| 601 | .description = "Cortex-A78 ARM processors", | ||
| 602 | .dependencies = featureSet(&[_]Feature{ | ||
| 603 | .crypto, | ||
| 604 | .dotprod, | ||
| 605 | .fp_armv8, | ||
| 606 | .fullfp16, | ||
| 607 | .fuse_aes, | ||
| 608 | .neon, | ||
| 609 | .perfmon, | ||
| 610 | .rcpc, | ||
| 611 | .spe, | ||
| 612 | .ssbs, | ||
| 613 | .use_postra_scheduler, | ||
| 614 | .v8_2a, | ||
| 615 | }), | ||
| 616 | }; | ||
| 617 | result[@enumToInt(Feature.cortex_r82)] = .{ | ||
| 618 | .llvm_name = "cortex-r82", | ||
| 619 | .description = "Cortex-R82 ARM Processors", | ||
| 620 | .dependencies = featureSet(&[_]Feature{ | ||
| 621 | .use_postra_scheduler, | ||
| 622 | .v8r, | ||
| 623 | }), | ||
| 624 | }; | ||
| 625 | result[@enumToInt(Feature.cortex_x1)] = .{ | ||
| 626 | .llvm_name = "cortex-x1", | ||
| 627 | .description = "Cortex-X1 ARM processors", | ||
| 628 | .dependencies = featureSet(&[_]Feature{ | ||
| 629 | .crypto, | ||
| 630 | .dotprod, | ||
| 631 | .fp_armv8, | ||
| 632 | .fullfp16, | ||
| 633 | .fuse_aes, | ||
| 634 | .neon, | ||
| 635 | .perfmon, | ||
| 636 | .rcpc, | ||
| 637 | .spe, | ||
| 638 | .use_postra_scheduler, | ||
| 639 | .v8_2a, | ||
| 640 | }), | ||
| 641 | }; | ||
| 440 | result[@enumToInt(Feature.crc)] = .{ | 642 | result[@enumToInt(Feature.crc)] = .{ |
| 441 | .llvm_name = "crc", | 643 | .llvm_name = "crc", |
| 442 | .description = "Enable ARMv8 CRC-32 checksum instructions", | 644 | .description = "Enable ARMv8 CRC-32 checksum instructions", |
| ... | @@ -490,6 +692,25 @@ pub const all_features = blk: { | ... | @@ -490,6 +692,25 @@ pub const all_features = blk: { |
| 490 | .custom_cheap_as_move, | 692 | .custom_cheap_as_move, |
| 491 | }), | 693 | }), |
| 492 | }; | 694 | }; |
| 695 | result[@enumToInt(Feature.exynosm3)] = .{ | ||
| 696 | .llvm_name = "exynosm3", | ||
| 697 | .description = "Samsung Exynos-M3 processors", | ||
| 698 | .dependencies = featureSet(&[_]Feature{ | ||
| 699 | .crc, | ||
| 700 | .crypto, | ||
| 701 | .exynos_cheap_as_move, | ||
| 702 | .force_32bit_jump_tables, | ||
| 703 | .fuse_address, | ||
| 704 | .fuse_aes, | ||
| 705 | .fuse_csel, | ||
| 706 | .fuse_literals, | ||
| 707 | .lsl_fast, | ||
| 708 | .perfmon, | ||
| 709 | .predictable_select_expensive, | ||
| 710 | .use_postra_scheduler, | ||
| 711 | .zcz_fp, | ||
| 712 | }), | ||
| 713 | }; | ||
| 493 | result[@enumToInt(Feature.exynosm4)] = .{ | 714 | result[@enumToInt(Feature.exynosm4)] = .{ |
| 494 | .llvm_name = "exynosm4", | 715 | .llvm_name = "exynosm4", |
| 495 | .description = "Samsung Exynos-M4 processors", | 716 | .description = "Samsung Exynos-M4 processors", |
| ... | @@ -527,6 +748,24 @@ pub const all_features = blk: { | ... | @@ -527,6 +748,24 @@ pub const all_features = blk: { |
| 527 | .sve, | 748 | .sve, |
| 528 | }), | 749 | }), |
| 529 | }; | 750 | }; |
| 751 | result[@enumToInt(Feature.falkor)] = .{ | ||
| 752 | .llvm_name = "falkor", | ||
| 753 | .description = "Qualcomm Falkor processors", | ||
| 754 | .dependencies = featureSet(&[_]Feature{ | ||
| 755 | .crc, | ||
| 756 | .crypto, | ||
| 757 | .custom_cheap_as_move, | ||
| 758 | .fp_armv8, | ||
| 759 | .lsl_fast, | ||
| 760 | .neon, | ||
| 761 | .perfmon, | ||
| 762 | .predictable_select_expensive, | ||
| 763 | .rdm, | ||
| 764 | .slow_strqro_store, | ||
| 765 | .use_postra_scheduler, | ||
| 766 | .zcz, | ||
| 767 | }), | ||
| 768 | }; | ||
| 530 | result[@enumToInt(Feature.fgt)] = .{ | 769 | result[@enumToInt(Feature.fgt)] = .{ |
| 531 | .llvm_name = "fgt", | 770 | .llvm_name = "fgt", |
| 532 | .description = "Enable fine grained virtualization traps extension", | 771 | .description = "Enable fine grained virtualization traps extension", |
| ... | @@ -606,7 +845,7 @@ pub const all_features = blk: { | ... | @@ -606,7 +845,7 @@ pub const all_features = blk: { |
| 606 | .description = "Harden against straight line speculation across RET and BR instructions", | 845 | .description = "Harden against straight line speculation across RET and BR instructions", |
| 607 | .dependencies = featureSet(&[_]Feature{}), | 846 | .dependencies = featureSet(&[_]Feature{}), |
| 608 | }; | 847 | }; |
| 609 | result[@enumToInt(Feature.i8mm)] = .{ | 848 | result[@enumToInt(Feature._i8mm)] = .{ |
| 610 | .llvm_name = "i8mm", | 849 | .llvm_name = "i8mm", |
| 611 | .description = "Enable Matrix Multiply Int8 Extension", | 850 | .description = "Enable Matrix Multiply Int8 Extension", |
| 612 | .dependencies = featureSet(&[_]Feature{}), | 851 | .dependencies = featureSet(&[_]Feature{}), |
| ... | @@ -618,6 +857,22 @@ pub const all_features = blk: { | ... | @@ -618,6 +857,22 @@ pub const all_features = blk: { |
| 618 | .fp_armv8, | 857 | .fp_armv8, |
| 619 | }), | 858 | }), |
| 620 | }; | 859 | }; |
| 860 | result[@enumToInt(Feature.kryo)] = .{ | ||
| 861 | .llvm_name = "kryo", | ||
| 862 | .description = "Qualcomm Kryo processors", | ||
| 863 | .dependencies = featureSet(&[_]Feature{ | ||
| 864 | .crc, | ||
| 865 | .crypto, | ||
| 866 | .custom_cheap_as_move, | ||
| 867 | .fp_armv8, | ||
| 868 | .lsl_fast, | ||
| 869 | .neon, | ||
| 870 | .perfmon, | ||
| 871 | .predictable_select_expensive, | ||
| 872 | .use_postra_scheduler, | ||
| 873 | .zcz, | ||
| 874 | }), | ||
| 875 | }; | ||
| 621 | result[@enumToInt(Feature.lor)] = .{ | 876 | result[@enumToInt(Feature.lor)] = .{ |
| 622 | .llvm_name = "lor", | 877 | .llvm_name = "lor", |
| 623 | .description = "Enables ARM v8.1 Limited Ordering Regions extension", | 878 | .description = "Enables ARM v8.1 Limited Ordering Regions extension", |
| ... | @@ -679,6 +934,42 @@ pub const all_features = blk: { | ... | @@ -679,6 +934,42 @@ pub const all_features = blk: { |
| 679 | .v8_2a, | 934 | .v8_2a, |
| 680 | }), | 935 | }), |
| 681 | }; | 936 | }; |
| 937 | result[@enumToInt(Feature.neoversen2)] = .{ | ||
| 938 | .llvm_name = "neoversen2", | ||
| 939 | .description = "Neoverse N2 ARM processors", | ||
| 940 | .dependencies = featureSet(&[_]Feature{ | ||
| 941 | .bf16, | ||
| 942 | .ete, | ||
| 943 | ._i8mm, | ||
| 944 | .mte, | ||
| 945 | .sve2, | ||
| 946 | .sve2_bitperm, | ||
| 947 | .trbe, | ||
| 948 | .v8_5a, | ||
| 949 | }), | ||
| 950 | }; | ||
| 951 | result[@enumToInt(Feature.neoversev1)] = .{ | ||
| 952 | .llvm_name = "neoversev1", | ||
| 953 | .description = "Neoverse V1 ARM processors", | ||
| 954 | .dependencies = featureSet(&[_]Feature{ | ||
| 955 | .bf16, | ||
| 956 | .ccdp, | ||
| 957 | .crypto, | ||
| 958 | .fp_armv8, | ||
| 959 | .fp16fml, | ||
| 960 | .fullfp16, | ||
| 961 | .fuse_aes, | ||
| 962 | ._i8mm, | ||
| 963 | .neon, | ||
| 964 | .perfmon, | ||
| 965 | .rand, | ||
| 966 | .spe, | ||
| 967 | .ssbs, | ||
| 968 | .sve, | ||
| 969 | .use_postra_scheduler, | ||
| 970 | .v8_4a, | ||
| 971 | }), | ||
| 972 | }; | ||
| 682 | result[@enumToInt(Feature.no_neg_immediates)] = .{ | 973 | result[@enumToInt(Feature.no_neg_immediates)] = .{ |
| 683 | .llvm_name = "no-neg-immediates", | 974 | .llvm_name = "no-neg-immediates", |
| 684 | .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", | 975 | .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", |
| ... | @@ -686,7 +977,12 @@ pub const all_features = blk: { | ... | @@ -686,7 +977,12 @@ pub const all_features = blk: { |
| 686 | }; | 977 | }; |
| 687 | result[@enumToInt(Feature.nv)] = .{ | 978 | result[@enumToInt(Feature.nv)] = .{ |
| 688 | .llvm_name = "nv", | 979 | .llvm_name = "nv", |
| 689 | .description = "Enable v8.4-A Nested Virtualization extension", | 980 | .description = "Enable v8.4-A Nested Virtualization Enchancement", |
| 981 | .dependencies = featureSet(&[_]Feature{}), | ||
| 982 | }; | ||
| 983 | result[@enumToInt(Feature.outline_atomics)] = .{ | ||
| 984 | .llvm_name = "outline-atomics", | ||
| 985 | .description = "Enable out of line atomics to support LSE instructions", | ||
| 690 | .dependencies = featureSet(&[_]Feature{}), | 986 | .dependencies = featureSet(&[_]Feature{}), |
| 691 | }; | 987 | }; |
| 692 | result[@enumToInt(Feature.pa)] = .{ | 988 | result[@enumToInt(Feature.pa)] = .{ |
| ... | @@ -736,13 +1032,6 @@ pub const all_features = blk: { | ... | @@ -736,13 +1032,6 @@ pub const all_features = blk: { |
| 736 | .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", | 1032 | .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", |
| 737 | .dependencies = featureSet(&[_]Feature{}), | 1033 | .dependencies = featureSet(&[_]Feature{}), |
| 738 | }; | 1034 | }; |
| 739 | result[@enumToInt(Feature.rasv8_4)] = .{ | ||
| 740 | .llvm_name = "rasv8_4", | ||
| 741 | .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", | ||
| 742 | .dependencies = featureSet(&[_]Feature{ | ||
| 743 | .ras, | ||
| 744 | }), | ||
| 745 | }; | ||
| 746 | result[@enumToInt(Feature.rcpc)] = .{ | 1035 | result[@enumToInt(Feature.rcpc)] = .{ |
| 747 | .llvm_name = "rcpc", | 1036 | .llvm_name = "rcpc", |
| 748 | .description = "Enable support for RCPC extension", | 1037 | .description = "Enable support for RCPC extension", |
| ... | @@ -885,6 +1174,23 @@ pub const all_features = blk: { | ... | @@ -885,6 +1174,23 @@ pub const all_features = blk: { |
| 885 | .description = "Reserve X9, making it unavailable as a GPR", | 1174 | .description = "Reserve X9, making it unavailable as a GPR", |
| 886 | .dependencies = featureSet(&[_]Feature{}), | 1175 | .dependencies = featureSet(&[_]Feature{}), |
| 887 | }; | 1176 | }; |
| 1177 | result[@enumToInt(Feature.saphira)] = .{ | ||
| 1178 | .llvm_name = "saphira", | ||
| 1179 | .description = "Qualcomm Saphira processors", | ||
| 1180 | .dependencies = featureSet(&[_]Feature{ | ||
| 1181 | .crypto, | ||
| 1182 | .custom_cheap_as_move, | ||
| 1183 | .fp_armv8, | ||
| 1184 | .lsl_fast, | ||
| 1185 | .neon, | ||
| 1186 | .perfmon, | ||
| 1187 | .predictable_select_expensive, | ||
| 1188 | .spe, | ||
| 1189 | .use_postra_scheduler, | ||
| 1190 | .v8_4a, | ||
| 1191 | .zcz, | ||
| 1192 | }), | ||
| 1193 | }; | ||
| 888 | result[@enumToInt(Feature.sb)] = .{ | 1194 | result[@enumToInt(Feature.sb)] = .{ |
| 889 | .llvm_name = "sb", | 1195 | .llvm_name = "sb", |
| 890 | .description = "Enable v8.5 Speculation Barrier", | 1196 | .description = "Enable v8.5 Speculation Barrier", |
| ... | @@ -955,7 +1261,9 @@ pub const all_features = blk: { | ... | @@ -955,7 +1261,9 @@ pub const all_features = blk: { |
| 955 | result[@enumToInt(Feature.sve)] = .{ | 1261 | result[@enumToInt(Feature.sve)] = .{ |
| 956 | .llvm_name = "sve", | 1262 | .llvm_name = "sve", |
| 957 | .description = "Enable Scalable Vector Extension (SVE) instructions", | 1263 | .description = "Enable Scalable Vector Extension (SVE) instructions", |
| 958 | .dependencies = featureSet(&[_]Feature{}), | 1264 | .dependencies = featureSet(&[_]Feature{ |
| 1265 | .fullfp16, | ||
| 1266 | }), | ||
| 959 | }; | 1267 | }; |
| 960 | result[@enumToInt(Feature.sve2)] = .{ | 1268 | result[@enumToInt(Feature.sve2)] = .{ |
| 961 | .llvm_name = "sve2", | 1269 | .llvm_name = "sve2", |
| ... | @@ -1000,15 +1308,104 @@ pub const all_features = blk: { | ... | @@ -1000,15 +1308,104 @@ pub const all_features = blk: { |
| 1000 | .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", | 1308 | .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", |
| 1001 | .dependencies = featureSet(&[_]Feature{}), | 1309 | .dependencies = featureSet(&[_]Feature{}), |
| 1002 | }; | 1310 | }; |
| 1003 | result[@enumToInt(Feature.tlb_rmi)] = .{ | 1311 | result[@enumToInt(Feature.thunderx)] = .{ |
| 1004 | .llvm_name = "tlb-rmi", | 1312 | .llvm_name = "thunderx", |
| 1005 | .description = "Enable v8.4-A TLB Range and Maintenance Instructions", | 1313 | .description = "Cavium ThunderX processors", |
| 1006 | .dependencies = featureSet(&[_]Feature{}), | 1314 | .dependencies = featureSet(&[_]Feature{ |
| 1007 | }; | 1315 | .crc, |
| 1008 | result[@enumToInt(Feature.tme)] = .{ | 1316 | .crypto, |
| 1009 | .llvm_name = "tme", | 1317 | .fp_armv8, |
| 1010 | .description = "Enable Transactional Memory Extension", | 1318 | .neon, |
| 1011 | .dependencies = featureSet(&[_]Feature{}), | 1319 | .perfmon, |
| 1320 | .predictable_select_expensive, | ||
| 1321 | .use_postra_scheduler, | ||
| 1322 | }), | ||
| 1323 | }; | ||
| 1324 | result[@enumToInt(Feature.thunderx2t99)] = .{ | ||
| 1325 | .llvm_name = "thunderx2t99", | ||
| 1326 | .description = "Cavium ThunderX2 processors", | ||
| 1327 | .dependencies = featureSet(&[_]Feature{ | ||
| 1328 | .aggressive_fma, | ||
| 1329 | .arith_bcc_fusion, | ||
| 1330 | .crc, | ||
| 1331 | .crypto, | ||
| 1332 | .fp_armv8, | ||
| 1333 | .lse, | ||
| 1334 | .neon, | ||
| 1335 | .predictable_select_expensive, | ||
| 1336 | .use_postra_scheduler, | ||
| 1337 | .v8_1a, | ||
| 1338 | }), | ||
| 1339 | }; | ||
| 1340 | result[@enumToInt(Feature.thunderx3t110)] = .{ | ||
| 1341 | .llvm_name = "thunderx3t110", | ||
| 1342 | .description = "Marvell ThunderX3 processors", | ||
| 1343 | .dependencies = featureSet(&[_]Feature{ | ||
| 1344 | .aggressive_fma, | ||
| 1345 | .arith_bcc_fusion, | ||
| 1346 | .balance_fp_ops, | ||
| 1347 | .crc, | ||
| 1348 | .crypto, | ||
| 1349 | .fp_armv8, | ||
| 1350 | .lse, | ||
| 1351 | .neon, | ||
| 1352 | .pa, | ||
| 1353 | .perfmon, | ||
| 1354 | .predictable_select_expensive, | ||
| 1355 | .strict_align, | ||
| 1356 | .use_aa, | ||
| 1357 | .use_postra_scheduler, | ||
| 1358 | .v8_3a, | ||
| 1359 | }), | ||
| 1360 | }; | ||
| 1361 | result[@enumToInt(Feature.thunderxt81)] = .{ | ||
| 1362 | .llvm_name = "thunderxt81", | ||
| 1363 | .description = "Cavium ThunderX processors", | ||
| 1364 | .dependencies = featureSet(&[_]Feature{ | ||
| 1365 | .crc, | ||
| 1366 | .crypto, | ||
| 1367 | .fp_armv8, | ||
| 1368 | .neon, | ||
| 1369 | .perfmon, | ||
| 1370 | .predictable_select_expensive, | ||
| 1371 | .use_postra_scheduler, | ||
| 1372 | }), | ||
| 1373 | }; | ||
| 1374 | result[@enumToInt(Feature.thunderxt83)] = .{ | ||
| 1375 | .llvm_name = "thunderxt83", | ||
| 1376 | .description = "Cavium ThunderX processors", | ||
| 1377 | .dependencies = featureSet(&[_]Feature{ | ||
| 1378 | .crc, | ||
| 1379 | .crypto, | ||
| 1380 | .fp_armv8, | ||
| 1381 | .neon, | ||
| 1382 | .perfmon, | ||
| 1383 | .predictable_select_expensive, | ||
| 1384 | .use_postra_scheduler, | ||
| 1385 | }), | ||
| 1386 | }; | ||
| 1387 | result[@enumToInt(Feature.thunderxt88)] = .{ | ||
| 1388 | .llvm_name = "thunderxt88", | ||
| 1389 | .description = "Cavium ThunderX processors", | ||
| 1390 | .dependencies = featureSet(&[_]Feature{ | ||
| 1391 | .crc, | ||
| 1392 | .crypto, | ||
| 1393 | .fp_armv8, | ||
| 1394 | .neon, | ||
| 1395 | .perfmon, | ||
| 1396 | .predictable_select_expensive, | ||
| 1397 | .use_postra_scheduler, | ||
| 1398 | }), | ||
| 1399 | }; | ||
| 1400 | result[@enumToInt(Feature.tlb_rmi)] = .{ | ||
| 1401 | .llvm_name = "tlb-rmi", | ||
| 1402 | .description = "Enable v8.4-A TLB Range and Maintenance Instructions", | ||
| 1403 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1404 | }; | ||
| 1405 | result[@enumToInt(Feature.tme)] = .{ | ||
| 1406 | .llvm_name = "tme", | ||
| 1407 | .description = "Enable Transactional Memory Extension", | ||
| 1408 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1012 | }; | 1409 | }; |
| 1013 | result[@enumToInt(Feature.tpidr_el1)] = .{ | 1410 | result[@enumToInt(Feature.tpidr_el1)] = .{ |
| 1014 | .llvm_name = "tpidr-el1", | 1411 | .llvm_name = "tpidr-el1", |
| ... | @@ -1035,6 +1432,24 @@ pub const all_features = blk: { | ... | @@ -1035,6 +1432,24 @@ pub const all_features = blk: { |
| 1035 | .description = "Enable Trace Buffer Extension", | 1432 | .description = "Enable Trace Buffer Extension", |
| 1036 | .dependencies = featureSet(&[_]Feature{}), | 1433 | .dependencies = featureSet(&[_]Feature{}), |
| 1037 | }; | 1434 | }; |
| 1435 | result[@enumToInt(Feature.tsv110)] = .{ | ||
| 1436 | .llvm_name = "tsv110", | ||
| 1437 | .description = "HiSilicon TS-V110 processors", | ||
| 1438 | .dependencies = featureSet(&[_]Feature{ | ||
| 1439 | .crypto, | ||
| 1440 | .custom_cheap_as_move, | ||
| 1441 | .dotprod, | ||
| 1442 | .fp_armv8, | ||
| 1443 | .fp16fml, | ||
| 1444 | .fullfp16, | ||
| 1445 | .fuse_aes, | ||
| 1446 | .neon, | ||
| 1447 | .perfmon, | ||
| 1448 | .spe, | ||
| 1449 | .use_postra_scheduler, | ||
| 1450 | .v8_2a, | ||
| 1451 | }), | ||
| 1452 | }; | ||
| 1038 | result[@enumToInt(Feature.uaops)] = .{ | 1453 | result[@enumToInt(Feature.uaops)] = .{ |
| 1039 | .llvm_name = "uaops", | 1454 | .llvm_name = "uaops", |
| 1040 | .description = "Enable v8.2 UAO PState", | 1455 | .description = "Enable v8.2 UAO PState", |
| ... | @@ -1060,14 +1475,6 @@ pub const all_features = blk: { | ... | @@ -1060,14 +1475,6 @@ pub const all_features = blk: { |
| 1060 | .description = "Use the reciprocal square root approximation", | 1475 | .description = "Use the reciprocal square root approximation", |
| 1061 | .dependencies = featureSet(&[_]Feature{}), | 1476 | .dependencies = featureSet(&[_]Feature{}), |
| 1062 | }; | 1477 | }; |
| 1063 | result[@enumToInt(Feature.v8a)] = .{ | ||
| 1064 | .llvm_name = null, | ||
| 1065 | .description = "Support ARM v8a instructions", | ||
| 1066 | .dependencies = featureSet(&[_]Feature{ | ||
| 1067 | .fp_armv8, | ||
| 1068 | .neon, | ||
| 1069 | }), | ||
| 1070 | }; | ||
| 1071 | result[@enumToInt(Feature.v8_1a)] = .{ | 1478 | result[@enumToInt(Feature.v8_1a)] = .{ |
| 1072 | .llvm_name = "v8.1a", | 1479 | .llvm_name = "v8.1a", |
| 1073 | .description = "Support ARM v8.1a instructions", | 1480 | .description = "Support ARM v8.1a instructions", |
| ... | @@ -1078,7 +1485,6 @@ pub const all_features = blk: { | ... | @@ -1078,7 +1485,6 @@ pub const all_features = blk: { |
| 1078 | .pan, | 1485 | .pan, |
| 1079 | .rdm, | 1486 | .rdm, |
| 1080 | .vh, | 1487 | .vh, |
| 1081 | .v8a, | ||
| 1082 | }), | 1488 | }), |
| 1083 | }; | 1489 | }; |
| 1084 | result[@enumToInt(Feature.v8_2a)] = .{ | 1490 | result[@enumToInt(Feature.v8_2a)] = .{ |
| ... | @@ -1115,7 +1521,6 @@ pub const all_features = blk: { | ... | @@ -1115,7 +1521,6 @@ pub const all_features = blk: { |
| 1115 | .mpam, | 1521 | .mpam, |
| 1116 | .nv, | 1522 | .nv, |
| 1117 | .pmu, | 1523 | .pmu, |
| 1118 | .rasv8_4, | ||
| 1119 | .rcpc_immo, | 1524 | .rcpc_immo, |
| 1120 | .sel2, | 1525 | .sel2, |
| 1121 | .tlb_rmi, | 1526 | .tlb_rmi, |
| ... | @@ -1146,14 +1551,52 @@ pub const all_features = blk: { | ... | @@ -1146,14 +1551,52 @@ pub const all_features = blk: { |
| 1146 | .bf16, | 1551 | .bf16, |
| 1147 | .ecv, | 1552 | .ecv, |
| 1148 | .fgt, | 1553 | .fgt, |
| 1149 | .i8mm, | 1554 | ._i8mm, |
| 1150 | .v8_5a, | 1555 | .v8_5a, |
| 1151 | }), | 1556 | }), |
| 1152 | }; | 1557 | }; |
| 1558 | result[@enumToInt(Feature.v8r)] = .{ | ||
| 1559 | .llvm_name = "v8r", | ||
| 1560 | .description = "Support ARM v8r instructions", | ||
| 1561 | .dependencies = featureSet(&[_]Feature{ | ||
| 1562 | .CONTEXTIDREL2, | ||
| 1563 | .ccidx, | ||
| 1564 | .ccpp, | ||
| 1565 | .complxnum, | ||
| 1566 | .crc, | ||
| 1567 | .dit, | ||
| 1568 | .dotprod, | ||
| 1569 | .fmi, | ||
| 1570 | .fp16fml, | ||
| 1571 | .fullfp16, | ||
| 1572 | .jsconv, | ||
| 1573 | .lse, | ||
| 1574 | .pa, | ||
| 1575 | .pan, | ||
| 1576 | .pan_rwv, | ||
| 1577 | .perfmon, | ||
| 1578 | .predres, | ||
| 1579 | .ras, | ||
| 1580 | .rcpc, | ||
| 1581 | .rcpc_immo, | ||
| 1582 | .rdm, | ||
| 1583 | .sb, | ||
| 1584 | .sel2, | ||
| 1585 | .sha3, | ||
| 1586 | .sm4, | ||
| 1587 | .specrestrict, | ||
| 1588 | .ssbs, | ||
| 1589 | .tlb_rmi, | ||
| 1590 | .tracev8_4, | ||
| 1591 | .uaops, | ||
| 1592 | }), | ||
| 1593 | }; | ||
| 1153 | result[@enumToInt(Feature.vh)] = .{ | 1594 | result[@enumToInt(Feature.vh)] = .{ |
| 1154 | .llvm_name = "vh", | 1595 | .llvm_name = "vh", |
| 1155 | .description = "Enables ARM v8.1 Virtual Host extension", | 1596 | .description = "Enables ARM v8.1 Virtual Host extension", |
| 1156 | .dependencies = featureSet(&[_]Feature{}), | 1597 | .dependencies = featureSet(&[_]Feature{ |
| 1598 | .CONTEXTIDREL2, | ||
| 1599 | }), | ||
| 1157 | }; | 1600 | }; |
| 1158 | result[@enumToInt(Feature.zcm)] = .{ | 1601 | result[@enumToInt(Feature.zcm)] = .{ |
| 1159 | .llvm_name = "zcm", | 1602 | .llvm_name = "zcm", |
| ... | @@ -1196,15 +1639,7 @@ pub const cpu = struct { | ... | @@ -1196,15 +1639,7 @@ pub const cpu = struct { |
| 1196 | .name = "a64fx", | 1639 | .name = "a64fx", |
| 1197 | .llvm_name = "a64fx", | 1640 | .llvm_name = "a64fx", |
| 1198 | .features = featureSet(&[_]Feature{ | 1641 | .features = featureSet(&[_]Feature{ |
| 1199 | .complxnum, | 1642 | .a64fx, |
| 1200 | .fp_armv8, | ||
| 1201 | .fullfp16, | ||
| 1202 | .neon, | ||
| 1203 | .perfmon, | ||
| 1204 | .sha2, | ||
| 1205 | .sve, | ||
| 1206 | .use_postra_scheduler, | ||
| 1207 | .v8_2a, | ||
| 1208 | }), | 1643 | }), |
| 1209 | }; | 1644 | }; |
| 1210 | pub const apple_a10 = CpuModel{ | 1645 | pub const apple_a10 = CpuModel{ |
| ... | @@ -1281,68 +1716,42 @@ pub const cpu = struct { | ... | @@ -1281,68 +1716,42 @@ pub const cpu = struct { |
| 1281 | .name = "carmel", | 1716 | .name = "carmel", |
| 1282 | .llvm_name = "carmel", | 1717 | .llvm_name = "carmel", |
| 1283 | .features = featureSet(&[_]Feature{ | 1718 | .features = featureSet(&[_]Feature{ |
| 1284 | .crypto, | 1719 | .carmel, |
| 1285 | .fullfp16, | ||
| 1286 | .neon, | ||
| 1287 | .v8_2a, | ||
| 1288 | }), | 1720 | }), |
| 1289 | }; | 1721 | }; |
| 1290 | pub const cortex_a34 = CpuModel{ | 1722 | pub const cortex_a34 = CpuModel{ |
| 1291 | .name = "cortex_a34", | 1723 | .name = "cortex_a34", |
| 1292 | .llvm_name = "cortex-a34", | 1724 | .llvm_name = "cortex-a34", |
| 1293 | .features = featureSet(&[_]Feature{ | 1725 | .features = featureSet(&[_]Feature{ |
| 1294 | .a34, | 1726 | .a35, |
| 1295 | }), | 1727 | }), |
| 1296 | }; | 1728 | }; |
| 1297 | pub const cortex_a35 = CpuModel{ | 1729 | pub const cortex_a35 = CpuModel{ |
| 1298 | .name = "cortex_a35", | 1730 | .name = "cortex_a35", |
| 1299 | .llvm_name = "cortex-a35", | 1731 | .llvm_name = "cortex-a35", |
| 1300 | .features = featureSet(&[_]Feature{ | 1732 | .features = featureSet(&[_]Feature{ |
| 1301 | .a34, | 1733 | .a35, |
| 1302 | }), | 1734 | }), |
| 1303 | }; | 1735 | }; |
| 1304 | pub const cortex_a53 = CpuModel{ | 1736 | pub const cortex_a53 = CpuModel{ |
| 1305 | .name = "cortex_a53", | 1737 | .name = "cortex_a53", |
| 1306 | .llvm_name = "cortex-a53", | 1738 | .llvm_name = "cortex-a53", |
| 1307 | .features = featureSet(&[_]Feature{ | 1739 | .features = featureSet(&[_]Feature{ |
| 1308 | .balance_fp_ops, | 1740 | .a53, |
| 1309 | .crc, | ||
| 1310 | .crypto, | ||
| 1311 | .custom_cheap_as_move, | ||
| 1312 | .fuse_aes, | ||
| 1313 | .perfmon, | ||
| 1314 | .use_aa, | ||
| 1315 | .use_postra_scheduler, | ||
| 1316 | .v8a, | ||
| 1317 | }), | 1741 | }), |
| 1318 | }; | 1742 | }; |
| 1319 | pub const cortex_a55 = CpuModel{ | 1743 | pub const cortex_a55 = CpuModel{ |
| 1320 | .name = "cortex_a55", | 1744 | .name = "cortex_a55", |
| 1321 | .llvm_name = "cortex-a55", | 1745 | .llvm_name = "cortex-a55", |
| 1322 | .features = featureSet(&[_]Feature{ | 1746 | .features = featureSet(&[_]Feature{ |
| 1323 | .crypto, | 1747 | .a55, |
| 1324 | .dotprod, | ||
| 1325 | .fullfp16, | ||
| 1326 | .fuse_aes, | ||
| 1327 | .perfmon, | ||
| 1328 | .rcpc, | ||
| 1329 | .v8_2a, | ||
| 1330 | }), | 1748 | }), |
| 1331 | }; | 1749 | }; |
| 1332 | pub const cortex_a57 = CpuModel{ | 1750 | pub const cortex_a57 = CpuModel{ |
| 1333 | .name = "cortex_a57", | 1751 | .name = "cortex_a57", |
| 1334 | .llvm_name = "cortex-a57", | 1752 | .llvm_name = "cortex-a57", |
| 1335 | .features = featureSet(&[_]Feature{ | 1753 | .features = featureSet(&[_]Feature{ |
| 1336 | .balance_fp_ops, | 1754 | .a57, |
| 1337 | .crc, | ||
| 1338 | .crypto, | ||
| 1339 | .custom_cheap_as_move, | ||
| 1340 | .fuse_aes, | ||
| 1341 | .fuse_literals, | ||
| 1342 | .perfmon, | ||
| 1343 | .predictable_select_expensive, | ||
| 1344 | .use_postra_scheduler, | ||
| 1345 | .v8a, | ||
| 1346 | }), | 1755 | }), |
| 1347 | }; | 1756 | }; |
| 1348 | pub const cortex_a65 = CpuModel{ | 1757 | pub const cortex_a65 = CpuModel{ |
| ... | @@ -1363,35 +1772,21 @@ pub const cpu = struct { | ... | @@ -1363,35 +1772,21 @@ pub const cpu = struct { |
| 1363 | .name = "cortex_a72", | 1772 | .name = "cortex_a72", |
| 1364 | .llvm_name = "cortex-a72", | 1773 | .llvm_name = "cortex-a72", |
| 1365 | .features = featureSet(&[_]Feature{ | 1774 | .features = featureSet(&[_]Feature{ |
| 1366 | .crc, | 1775 | .a72, |
| 1367 | .crypto, | ||
| 1368 | .fuse_aes, | ||
| 1369 | .perfmon, | ||
| 1370 | .v8a, | ||
| 1371 | }), | 1776 | }), |
| 1372 | }; | 1777 | }; |
| 1373 | pub const cortex_a73 = CpuModel{ | 1778 | pub const cortex_a73 = CpuModel{ |
| 1374 | .name = "cortex_a73", | 1779 | .name = "cortex_a73", |
| 1375 | .llvm_name = "cortex-a73", | 1780 | .llvm_name = "cortex-a73", |
| 1376 | .features = featureSet(&[_]Feature{ | 1781 | .features = featureSet(&[_]Feature{ |
| 1377 | .crc, | 1782 | .a73, |
| 1378 | .crypto, | ||
| 1379 | .fuse_aes, | ||
| 1380 | .perfmon, | ||
| 1381 | .v8a, | ||
| 1382 | }), | 1783 | }), |
| 1383 | }; | 1784 | }; |
| 1384 | pub const cortex_a75 = CpuModel{ | 1785 | pub const cortex_a75 = CpuModel{ |
| 1385 | .name = "cortex_a75", | 1786 | .name = "cortex_a75", |
| 1386 | .llvm_name = "cortex-a75", | 1787 | .llvm_name = "cortex-a75", |
| 1387 | .features = featureSet(&[_]Feature{ | 1788 | .features = featureSet(&[_]Feature{ |
| 1388 | .crypto, | 1789 | .a75, |
| 1389 | .dotprod, | ||
| 1390 | .fullfp16, | ||
| 1391 | .fuse_aes, | ||
| 1392 | .perfmon, | ||
| 1393 | .rcpc, | ||
| 1394 | .v8_2a, | ||
| 1395 | }), | 1790 | }), |
| 1396 | }; | 1791 | }; |
| 1397 | pub const cortex_a76 = CpuModel{ | 1792 | pub const cortex_a76 = CpuModel{ |
| ... | @@ -1412,48 +1807,28 @@ pub const cpu = struct { | ... | @@ -1412,48 +1807,28 @@ pub const cpu = struct { |
| 1412 | .name = "cortex_a77", | 1807 | .name = "cortex_a77", |
| 1413 | .llvm_name = "cortex-a77", | 1808 | .llvm_name = "cortex-a77", |
| 1414 | .features = featureSet(&[_]Feature{ | 1809 | .features = featureSet(&[_]Feature{ |
| 1415 | .crypto, | 1810 | .a77, |
| 1416 | .dotprod, | ||
| 1417 | .fp_armv8, | ||
| 1418 | .fullfp16, | ||
| 1419 | .neon, | ||
| 1420 | .rcpc, | ||
| 1421 | .v8_2a, | ||
| 1422 | }), | 1811 | }), |
| 1423 | }; | 1812 | }; |
| 1424 | pub const cortex_a78 = CpuModel{ | 1813 | pub const cortex_a78 = CpuModel{ |
| 1425 | .name = "cortex_a78", | 1814 | .name = "cortex_a78", |
| 1426 | .llvm_name = "cortex-a78", | 1815 | .llvm_name = "cortex-a78", |
| 1427 | .features = featureSet(&[_]Feature{ | 1816 | .features = featureSet(&[_]Feature{ |
| 1428 | .crypto, | 1817 | .cortex_a78, |
| 1429 | .dotprod, | 1818 | }), |
| 1430 | .fp_armv8, | 1819 | }; |
| 1431 | .fullfp16, | 1820 | pub const cortex_r82 = CpuModel{ |
| 1432 | .fuse_aes, | 1821 | .name = "cortex_r82", |
| 1433 | .neon, | 1822 | .llvm_name = "cortex-r82", |
| 1434 | .perfmon, | 1823 | .features = featureSet(&[_]Feature{ |
| 1435 | .rcpc, | 1824 | .cortex_r82, |
| 1436 | .spe, | ||
| 1437 | .ssbs, | ||
| 1438 | .use_postra_scheduler, | ||
| 1439 | .v8_2a, | ||
| 1440 | }), | 1825 | }), |
| 1441 | }; | 1826 | }; |
| 1442 | pub const cortex_x1 = CpuModel{ | 1827 | pub const cortex_x1 = CpuModel{ |
| 1443 | .name = "cortex_x1", | 1828 | .name = "cortex_x1", |
| 1444 | .llvm_name = "cortex-x1", | 1829 | .llvm_name = "cortex-x1", |
| 1445 | .features = featureSet(&[_]Feature{ | 1830 | .features = featureSet(&[_]Feature{ |
| 1446 | .crypto, | 1831 | .cortex_x1, |
| 1447 | .dotprod, | ||
| 1448 | .fp_armv8, | ||
| 1449 | .fullfp16, | ||
| 1450 | .fuse_aes, | ||
| 1451 | .neon, | ||
| 1452 | .perfmon, | ||
| 1453 | .rcpc, | ||
| 1454 | .spe, | ||
| 1455 | .use_postra_scheduler, | ||
| 1456 | .v8_2a, | ||
| 1457 | }), | 1832 | }), |
| 1458 | }; | 1833 | }; |
| 1459 | pub const cyclone = CpuModel{ | 1834 | pub const cyclone = CpuModel{ |
| ... | @@ -1463,59 +1838,11 @@ pub const cpu = struct { | ... | @@ -1463,59 +1838,11 @@ pub const cpu = struct { |
| 1463 | .apple_a7, | 1838 | .apple_a7, |
| 1464 | }), | 1839 | }), |
| 1465 | }; | 1840 | }; |
| 1466 | pub const exynos_m1 = CpuModel{ | ||
| 1467 | .name = "exynos_m1", | ||
| 1468 | .llvm_name = null, | ||
| 1469 | .features = featureSet(&[_]Feature{ | ||
| 1470 | .crc, | ||
| 1471 | .crypto, | ||
| 1472 | .exynos_cheap_as_move, | ||
| 1473 | .force_32bit_jump_tables, | ||
| 1474 | .fuse_aes, | ||
| 1475 | .perfmon, | ||
| 1476 | .slow_misaligned_128store, | ||
| 1477 | .slow_paired_128, | ||
| 1478 | .use_postra_scheduler, | ||
| 1479 | .use_reciprocal_square_root, | ||
| 1480 | .v8a, | ||
| 1481 | .zcz_fp, | ||
| 1482 | }), | ||
| 1483 | }; | ||
| 1484 | pub const exynos_m2 = CpuModel{ | ||
| 1485 | .name = "exynos_m2", | ||
| 1486 | .llvm_name = null, | ||
| 1487 | .features = featureSet(&[_]Feature{ | ||
| 1488 | .crc, | ||
| 1489 | .crypto, | ||
| 1490 | .exynos_cheap_as_move, | ||
| 1491 | .force_32bit_jump_tables, | ||
| 1492 | .fuse_aes, | ||
| 1493 | .perfmon, | ||
| 1494 | .slow_misaligned_128store, | ||
| 1495 | .slow_paired_128, | ||
| 1496 | .use_postra_scheduler, | ||
| 1497 | .v8a, | ||
| 1498 | .zcz_fp, | ||
| 1499 | }), | ||
| 1500 | }; | ||
| 1501 | pub const exynos_m3 = CpuModel{ | 1841 | pub const exynos_m3 = CpuModel{ |
| 1502 | .name = "exynos_m3", | 1842 | .name = "exynos_m3", |
| 1503 | .llvm_name = "exynos-m3", | 1843 | .llvm_name = "exynos-m3", |
| 1504 | .features = featureSet(&[_]Feature{ | 1844 | .features = featureSet(&[_]Feature{ |
| 1505 | .crc, | 1845 | .exynosm3, |
| 1506 | .crypto, | ||
| 1507 | .exynos_cheap_as_move, | ||
| 1508 | .force_32bit_jump_tables, | ||
| 1509 | .fuse_address, | ||
| 1510 | .fuse_aes, | ||
| 1511 | .fuse_csel, | ||
| 1512 | .fuse_literals, | ||
| 1513 | .lsl_fast, | ||
| 1514 | .perfmon, | ||
| 1515 | .predictable_select_expensive, | ||
| 1516 | .use_postra_scheduler, | ||
| 1517 | .v8a, | ||
| 1518 | .zcz_fp, | ||
| 1519 | }), | 1846 | }), |
| 1520 | }; | 1847 | }; |
| 1521 | pub const exynos_m4 = CpuModel{ | 1848 | pub const exynos_m4 = CpuModel{ |
| ... | @@ -1536,17 +1863,7 @@ pub const cpu = struct { | ... | @@ -1536,17 +1863,7 @@ pub const cpu = struct { |
| 1536 | .name = "falkor", | 1863 | .name = "falkor", |
| 1537 | .llvm_name = "falkor", | 1864 | .llvm_name = "falkor", |
| 1538 | .features = featureSet(&[_]Feature{ | 1865 | .features = featureSet(&[_]Feature{ |
| 1539 | .crc, | 1866 | .falkor, |
| 1540 | .crypto, | ||
| 1541 | .custom_cheap_as_move, | ||
| 1542 | .lsl_fast, | ||
| 1543 | .perfmon, | ||
| 1544 | .predictable_select_expensive, | ||
| 1545 | .rdm, | ||
| 1546 | .slow_strqro_store, | ||
| 1547 | .use_postra_scheduler, | ||
| 1548 | .v8a, | ||
| 1549 | .zcz, | ||
| 1550 | }), | 1867 | }), |
| 1551 | }; | 1868 | }; |
| 1552 | pub const generic = CpuModel{ | 1869 | pub const generic = CpuModel{ |
| ... | @@ -1554,25 +1871,18 @@ pub const cpu = struct { | ... | @@ -1554,25 +1871,18 @@ pub const cpu = struct { |
| 1554 | .llvm_name = "generic", | 1871 | .llvm_name = "generic", |
| 1555 | .features = featureSet(&[_]Feature{ | 1872 | .features = featureSet(&[_]Feature{ |
| 1556 | .ete, | 1873 | .ete, |
| 1874 | .fp_armv8, | ||
| 1557 | .fuse_aes, | 1875 | .fuse_aes, |
| 1876 | .neon, | ||
| 1558 | .perfmon, | 1877 | .perfmon, |
| 1559 | .use_postra_scheduler, | 1878 | .use_postra_scheduler, |
| 1560 | .v8a, | ||
| 1561 | }), | 1879 | }), |
| 1562 | }; | 1880 | }; |
| 1563 | pub const kryo = CpuModel{ | 1881 | pub const kryo = CpuModel{ |
| 1564 | .name = "kryo", | 1882 | .name = "kryo", |
| 1565 | .llvm_name = "kryo", | 1883 | .llvm_name = "kryo", |
| 1566 | .features = featureSet(&[_]Feature{ | 1884 | .features = featureSet(&[_]Feature{ |
| 1567 | .crc, | 1885 | .kryo, |
| 1568 | .crypto, | ||
| 1569 | .custom_cheap_as_move, | ||
| 1570 | .lsl_fast, | ||
| 1571 | .perfmon, | ||
| 1572 | .predictable_select_expensive, | ||
| 1573 | .use_postra_scheduler, | ||
| 1574 | .zcz, | ||
| 1575 | .v8a, | ||
| 1576 | }), | 1886 | }), |
| 1577 | }; | 1887 | }; |
| 1578 | pub const neoverse_e1 = CpuModel{ | 1888 | pub const neoverse_e1 = CpuModel{ |
| ... | @@ -1589,118 +1899,74 @@ pub const cpu = struct { | ... | @@ -1589,118 +1899,74 @@ pub const cpu = struct { |
| 1589 | .neoversen1, | 1899 | .neoversen1, |
| 1590 | }), | 1900 | }), |
| 1591 | }; | 1901 | }; |
| 1902 | pub const neoverse_n2 = CpuModel{ | ||
| 1903 | .name = "neoverse_n2", | ||
| 1904 | .llvm_name = "neoverse-n2", | ||
| 1905 | .features = featureSet(&[_]Feature{ | ||
| 1906 | .neoversen2, | ||
| 1907 | }), | ||
| 1908 | }; | ||
| 1909 | pub const neoverse_v1 = CpuModel{ | ||
| 1910 | .name = "neoverse_v1", | ||
| 1911 | .llvm_name = "neoverse-v1", | ||
| 1912 | .features = featureSet(&[_]Feature{ | ||
| 1913 | .neoversev1, | ||
| 1914 | }), | ||
| 1915 | }; | ||
| 1592 | pub const saphira = CpuModel{ | 1916 | pub const saphira = CpuModel{ |
| 1593 | .name = "saphira", | 1917 | .name = "saphira", |
| 1594 | .llvm_name = "saphira", | 1918 | .llvm_name = "saphira", |
| 1595 | .features = featureSet(&[_]Feature{ | 1919 | .features = featureSet(&[_]Feature{ |
| 1596 | .crypto, | 1920 | .saphira, |
| 1597 | .custom_cheap_as_move, | ||
| 1598 | .lsl_fast, | ||
| 1599 | .perfmon, | ||
| 1600 | .predictable_select_expensive, | ||
| 1601 | .spe, | ||
| 1602 | .use_postra_scheduler, | ||
| 1603 | .v8_4a, | ||
| 1604 | .zcz, | ||
| 1605 | }), | 1921 | }), |
| 1606 | }; | 1922 | }; |
| 1607 | pub const thunderx = CpuModel{ | 1923 | pub const thunderx = CpuModel{ |
| 1608 | .name = "thunderx", | 1924 | .name = "thunderx", |
| 1609 | .llvm_name = "thunderx", | 1925 | .llvm_name = "thunderx", |
| 1610 | .features = featureSet(&[_]Feature{ | 1926 | .features = featureSet(&[_]Feature{ |
| 1611 | .crc, | 1927 | .thunderx, |
| 1612 | .crypto, | ||
| 1613 | .perfmon, | ||
| 1614 | .predictable_select_expensive, | ||
| 1615 | .use_postra_scheduler, | ||
| 1616 | .v8a, | ||
| 1617 | }), | 1928 | }), |
| 1618 | }; | 1929 | }; |
| 1619 | pub const thunderx2t99 = CpuModel{ | 1930 | pub const thunderx2t99 = CpuModel{ |
| 1620 | .name = "thunderx2t99", | 1931 | .name = "thunderx2t99", |
| 1621 | .llvm_name = "thunderx2t99", | 1932 | .llvm_name = "thunderx2t99", |
| 1622 | .features = featureSet(&[_]Feature{ | 1933 | .features = featureSet(&[_]Feature{ |
| 1623 | .aggressive_fma, | 1934 | .thunderx2t99, |
| 1624 | .arith_bcc_fusion, | ||
| 1625 | .crc, | ||
| 1626 | .crypto, | ||
| 1627 | .lse, | ||
| 1628 | .predictable_select_expensive, | ||
| 1629 | .use_postra_scheduler, | ||
| 1630 | .v8_1a, | ||
| 1631 | }), | 1935 | }), |
| 1632 | }; | 1936 | }; |
| 1633 | pub const thunderx3t110 = CpuModel{ | 1937 | pub const thunderx3t110 = CpuModel{ |
| 1634 | .name = "thunderx3t110", | 1938 | .name = "thunderx3t110", |
| 1635 | .llvm_name = "thunderx3t110", | 1939 | .llvm_name = "thunderx3t110", |
| 1636 | .features = featureSet(&[_]Feature{ | 1940 | .features = featureSet(&[_]Feature{ |
| 1637 | .aggressive_fma, | 1941 | .thunderx3t110, |
| 1638 | .arith_bcc_fusion, | ||
| 1639 | .balance_fp_ops, | ||
| 1640 | .crc, | ||
| 1641 | .crypto, | ||
| 1642 | .fp_armv8, | ||
| 1643 | .lse, | ||
| 1644 | .neon, | ||
| 1645 | .pa, | ||
| 1646 | .perfmon, | ||
| 1647 | .predictable_select_expensive, | ||
| 1648 | .strict_align, | ||
| 1649 | .use_aa, | ||
| 1650 | .use_postra_scheduler, | ||
| 1651 | .v8_3a, | ||
| 1652 | }), | 1942 | }), |
| 1653 | }; | 1943 | }; |
| 1654 | pub const thunderxt81 = CpuModel{ | 1944 | pub const thunderxt81 = CpuModel{ |
| 1655 | .name = "thunderxt81", | 1945 | .name = "thunderxt81", |
| 1656 | .llvm_name = "thunderxt81", | 1946 | .llvm_name = "thunderxt81", |
| 1657 | .features = featureSet(&[_]Feature{ | 1947 | .features = featureSet(&[_]Feature{ |
| 1658 | .crc, | 1948 | .thunderxt81, |
| 1659 | .crypto, | ||
| 1660 | .perfmon, | ||
| 1661 | .predictable_select_expensive, | ||
| 1662 | .use_postra_scheduler, | ||
| 1663 | .v8a, | ||
| 1664 | }), | 1949 | }), |
| 1665 | }; | 1950 | }; |
| 1666 | pub const thunderxt83 = CpuModel{ | 1951 | pub const thunderxt83 = CpuModel{ |
| 1667 | .name = "thunderxt83", | 1952 | .name = "thunderxt83", |
| 1668 | .llvm_name = "thunderxt83", | 1953 | .llvm_name = "thunderxt83", |
| 1669 | .features = featureSet(&[_]Feature{ | 1954 | .features = featureSet(&[_]Feature{ |
| 1670 | .crc, | 1955 | .thunderxt83, |
| 1671 | .crypto, | ||
| 1672 | .perfmon, | ||
| 1673 | .predictable_select_expensive, | ||
| 1674 | .use_postra_scheduler, | ||
| 1675 | .v8a, | ||
| 1676 | }), | 1956 | }), |
| 1677 | }; | 1957 | }; |
| 1678 | pub const thunderxt88 = CpuModel{ | 1958 | pub const thunderxt88 = CpuModel{ |
| 1679 | .name = "thunderxt88", | 1959 | .name = "thunderxt88", |
| 1680 | .llvm_name = "thunderxt88", | 1960 | .llvm_name = "thunderxt88", |
| 1681 | .features = featureSet(&[_]Feature{ | 1961 | .features = featureSet(&[_]Feature{ |
| 1682 | .crc, | 1962 | .thunderxt88, |
| 1683 | .crypto, | ||
| 1684 | .perfmon, | ||
| 1685 | .predictable_select_expensive, | ||
| 1686 | .use_postra_scheduler, | ||
| 1687 | .v8a, | ||
| 1688 | }), | 1963 | }), |
| 1689 | }; | 1964 | }; |
| 1690 | pub const tsv110 = CpuModel{ | 1965 | pub const tsv110 = CpuModel{ |
| 1691 | .name = "tsv110", | 1966 | .name = "tsv110", |
| 1692 | .llvm_name = "tsv110", | 1967 | .llvm_name = "tsv110", |
| 1693 | .features = featureSet(&[_]Feature{ | 1968 | .features = featureSet(&[_]Feature{ |
| 1694 | .crypto, | 1969 | .tsv110, |
| 1695 | .custom_cheap_as_move, | ||
| 1696 | .dotprod, | ||
| 1697 | .fp16fml, | ||
| 1698 | .fullfp16, | ||
| 1699 | .fuse_aes, | ||
| 1700 | .perfmon, | ||
| 1701 | .spe, | ||
| 1702 | .use_postra_scheduler, | ||
| 1703 | .v8_2a, | ||
| 1704 | }), | 1970 | }), |
| 1705 | }; | 1971 | }; |
| 1706 | }; | 1972 | }; |
lib/std/target/amdgpu.zig+149-46| ... | @@ -16,7 +16,6 @@ pub const Feature = enum { | ... | @@ -16,7 +16,6 @@ pub const Feature = enum { |
| 16 | atomic_fadd_insts, | 16 | atomic_fadd_insts, |
| 17 | auto_waitcnt_before_barrier, | 17 | auto_waitcnt_before_barrier, |
| 18 | ci_insts, | 18 | ci_insts, |
| 19 | code_object_v3, | ||
| 20 | cumode, | 19 | cumode, |
| 21 | dl_insts, | 20 | dl_insts, |
| 22 | dot1_insts, | 21 | dot1_insts, |
| ... | @@ -54,6 +53,8 @@ pub const Feature = enum { | ... | @@ -54,6 +53,8 @@ pub const Feature = enum { |
| 54 | gfx9, | 53 | gfx9, |
| 55 | gfx9_insts, | 54 | gfx9_insts, |
| 56 | half_rate_64_ops, | 55 | half_rate_64_ops, |
| 56 | image_gather4_d16_bug, | ||
| 57 | image_store_d16_bug, | ||
| 57 | inst_fwd_prefetch_bug, | 58 | inst_fwd_prefetch_bug, |
| 58 | int_clamp_insts, | 59 | int_clamp_insts, |
| 59 | inv_2pi_inline_imm, | 60 | inv_2pi_inline_imm, |
| ... | @@ -104,7 +105,9 @@ pub const Feature = enum { | ... | @@ -104,7 +105,9 @@ pub const Feature = enum { |
| 104 | sram_ecc, | 105 | sram_ecc, |
| 105 | trap_handler, | 106 | trap_handler, |
| 106 | trig_reduced_range, | 107 | trig_reduced_range, |
| 108 | unaligned_access_mode, | ||
| 107 | unaligned_buffer_access, | 109 | unaligned_buffer_access, |
| 110 | unaligned_ds_access, | ||
| 108 | unaligned_scratch_access, | 111 | unaligned_scratch_access, |
| 109 | unpacked_d16_vmem, | 112 | unpacked_d16_vmem, |
| 110 | unsafe_ds_offset_folding, | 113 | unsafe_ds_offset_folding, |
| ... | @@ -125,6 +128,7 @@ pub const Feature = enum { | ... | @@ -125,6 +128,7 @@ pub const Feature = enum { |
| 125 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 128 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 126 | 129 | ||
| 127 | pub const all_features = blk: { | 130 | pub const all_features = blk: { |
| 131 | @setEvalBranchQuota(10000); | ||
| 128 | const len = @typeInfo(Feature).Enum.fields.len; | 132 | const len = @typeInfo(Feature).Enum.fields.len; |
| 129 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 133 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 130 | var result: [len]CpuFeature = undefined; | 134 | var result: [len]CpuFeature = undefined; |
| ... | @@ -170,11 +174,6 @@ pub const all_features = blk: { | ... | @@ -170,11 +174,6 @@ pub const all_features = blk: { |
| 170 | .description = "Additional instructions for CI+", | 174 | .description = "Additional instructions for CI+", |
| 171 | .dependencies = featureSet(&[_]Feature{}), | 175 | .dependencies = featureSet(&[_]Feature{}), |
| 172 | }; | 176 | }; |
| 173 | result[@enumToInt(Feature.code_object_v3)] = .{ | ||
| 174 | .llvm_name = "code-object-v3", | ||
| 175 | .description = "Generate code object version 3", | ||
| 176 | .dependencies = featureSet(&[_]Feature{}), | ||
| 177 | }; | ||
| 178 | result[@enumToInt(Feature.cumode)] = .{ | 177 | result[@enumToInt(Feature.cumode)] = .{ |
| 179 | .llvm_name = "cumode", | 178 | .llvm_name = "cumode", |
| 180 | .description = "Enable CU wavefront execution mode", | 179 | .description = "Enable CU wavefront execution mode", |
| ... | @@ -353,6 +352,8 @@ pub const all_features = blk: { | ... | @@ -353,6 +352,8 @@ pub const all_features = blk: { |
| 353 | .sdwa_omod, | 352 | .sdwa_omod, |
| 354 | .sdwa_scalar, | 353 | .sdwa_scalar, |
| 355 | .sdwa_sdst, | 354 | .sdwa_sdst, |
| 355 | .unaligned_buffer_access, | ||
| 356 | .unaligned_ds_access, | ||
| 356 | .vop3_literal, | 357 | .vop3_literal, |
| 357 | .vop3p, | 358 | .vop3p, |
| 358 | .vscnt, | 359 | .vscnt, |
| ... | @@ -418,6 +419,8 @@ pub const all_features = blk: { | ... | @@ -418,6 +419,8 @@ pub const all_features = blk: { |
| 418 | .sdwa_omod, | 419 | .sdwa_omod, |
| 419 | .sdwa_scalar, | 420 | .sdwa_scalar, |
| 420 | .sdwa_sdst, | 421 | .sdwa_sdst, |
| 422 | .unaligned_buffer_access, | ||
| 423 | .unaligned_ds_access, | ||
| 421 | .vgpr_index_mode, | 424 | .vgpr_index_mode, |
| 422 | .vop3p, | 425 | .vop3p, |
| 423 | .wavefrontsize64, | 426 | .wavefrontsize64, |
| ... | @@ -433,6 +436,16 @@ pub const all_features = blk: { | ... | @@ -433,6 +436,16 @@ pub const all_features = blk: { |
| 433 | .description = "Most fp64 instructions are half rate instead of quarter", | 436 | .description = "Most fp64 instructions are half rate instead of quarter", |
| 434 | .dependencies = featureSet(&[_]Feature{}), | 437 | .dependencies = featureSet(&[_]Feature{}), |
| 435 | }; | 438 | }; |
| 439 | result[@enumToInt(Feature.image_gather4_d16_bug)] = .{ | ||
| 440 | .llvm_name = "image-gather4-d16-bug", | ||
| 441 | .description = "Image Gather4 D16 hardware bug", | ||
| 442 | .dependencies = featureSet(&[_]Feature{}), | ||
| 443 | }; | ||
| 444 | result[@enumToInt(Feature.image_store_d16_bug)] = .{ | ||
| 445 | .llvm_name = "image-store-d16-bug", | ||
| 446 | .description = "Image Store D16 hardware bug", | ||
| 447 | .dependencies = featureSet(&[_]Feature{}), | ||
| 448 | }; | ||
| 436 | result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{ | 449 | result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{ |
| 437 | .llvm_name = "inst-fwd-prefetch-bug", | 450 | .llvm_name = "inst-fwd-prefetch-bug", |
| 438 | .description = "S_INST_PREFETCH instruction causes shader to hang", | 451 | .description = "S_INST_PREFETCH instruction causes shader to hang", |
| ... | @@ -455,7 +468,7 @@ pub const all_features = blk: { | ... | @@ -455,7 +468,7 @@ pub const all_features = blk: { |
| 455 | }; | 468 | }; |
| 456 | result[@enumToInt(Feature.lds_misaligned_bug)] = .{ | 469 | result[@enumToInt(Feature.lds_misaligned_bug)] = .{ |
| 457 | .llvm_name = "lds-misaligned-bug", | 470 | .llvm_name = "lds-misaligned-bug", |
| 458 | .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", | 471 | .description = "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode", |
| 459 | .dependencies = featureSet(&[_]Feature{}), | 472 | .dependencies = featureSet(&[_]Feature{}), |
| 460 | }; | 473 | }; |
| 461 | result[@enumToInt(Feature.ldsbankcount16)] = .{ | 474 | result[@enumToInt(Feature.ldsbankcount16)] = .{ |
| ... | @@ -659,6 +672,7 @@ pub const all_features = blk: { | ... | @@ -659,6 +672,7 @@ pub const all_features = blk: { |
| 659 | .no_sram_ecc_support, | 672 | .no_sram_ecc_support, |
| 660 | .s_memtime_inst, | 673 | .s_memtime_inst, |
| 661 | .trig_reduced_range, | 674 | .trig_reduced_range, |
| 675 | .unaligned_buffer_access, | ||
| 662 | .wavefrontsize64, | 676 | .wavefrontsize64, |
| 663 | }), | 677 | }), |
| 664 | }; | 678 | }; |
| ... | @@ -710,9 +724,19 @@ pub const all_features = blk: { | ... | @@ -710,9 +724,19 @@ pub const all_features = blk: { |
| 710 | .description = "Requires use of fract on arguments to trig instructions", | 724 | .description = "Requires use of fract on arguments to trig instructions", |
| 711 | .dependencies = featureSet(&[_]Feature{}), | 725 | .dependencies = featureSet(&[_]Feature{}), |
| 712 | }; | 726 | }; |
| 727 | result[@enumToInt(Feature.unaligned_access_mode)] = .{ | ||
| 728 | .llvm_name = "unaligned-access-mode", | ||
| 729 | .description = "Enable unaligned global, local and region loads and stores if the hardware supports it", | ||
| 730 | .dependencies = featureSet(&[_]Feature{}), | ||
| 731 | }; | ||
| 713 | result[@enumToInt(Feature.unaligned_buffer_access)] = .{ | 732 | result[@enumToInt(Feature.unaligned_buffer_access)] = .{ |
| 714 | .llvm_name = "unaligned-buffer-access", | 733 | .llvm_name = "unaligned-buffer-access", |
| 715 | .description = "Support unaligned global loads and stores", | 734 | .description = "Hardware supports unaligned global loads and stores", |
| 735 | .dependencies = featureSet(&[_]Feature{}), | ||
| 736 | }; | ||
| 737 | result[@enumToInt(Feature.unaligned_ds_access)] = .{ | ||
| 738 | .llvm_name = "unaligned-ds-access", | ||
| 739 | .description = "Hardware supports unaligned local and region loads and stores", | ||
| 716 | .dependencies = featureSet(&[_]Feature{}), | 740 | .dependencies = featureSet(&[_]Feature{}), |
| 717 | }; | 741 | }; |
| 718 | result[@enumToInt(Feature.unaligned_scratch_access)] = .{ | 742 | result[@enumToInt(Feature.unaligned_scratch_access)] = .{ |
| ... | @@ -778,6 +802,7 @@ pub const all_features = blk: { | ... | @@ -778,6 +802,7 @@ pub const all_features = blk: { |
| 778 | .sdwa_mav, | 802 | .sdwa_mav, |
| 779 | .sdwa_out_mods_vopc, | 803 | .sdwa_out_mods_vopc, |
| 780 | .trig_reduced_range, | 804 | .trig_reduced_range, |
| 805 | .unaligned_buffer_access, | ||
| 781 | .vgpr_index_mode, | 806 | .vgpr_index_mode, |
| 782 | .wavefrontsize64, | 807 | .wavefrontsize64, |
| 783 | }), | 808 | }), |
| ... | @@ -830,7 +855,6 @@ pub const cpu = struct { | ... | @@ -830,7 +855,6 @@ pub const cpu = struct { |
| 830 | .name = "bonaire", | 855 | .name = "bonaire", |
| 831 | .llvm_name = "bonaire", | 856 | .llvm_name = "bonaire", |
| 832 | .features = featureSet(&[_]Feature{ | 857 | .features = featureSet(&[_]Feature{ |
| 833 | .code_object_v3, | ||
| 834 | .ldsbankcount32, | 858 | .ldsbankcount32, |
| 835 | .no_xnack_support, | 859 | .no_xnack_support, |
| 836 | .sea_islands, | 860 | .sea_islands, |
| ... | @@ -840,7 +864,6 @@ pub const cpu = struct { | ... | @@ -840,7 +864,6 @@ pub const cpu = struct { |
| 840 | .name = "carrizo", | 864 | .name = "carrizo", |
| 841 | .llvm_name = "carrizo", | 865 | .llvm_name = "carrizo", |
| 842 | .features = featureSet(&[_]Feature{ | 866 | .features = featureSet(&[_]Feature{ |
| 843 | .code_object_v3, | ||
| 844 | .fast_fmaf, | 867 | .fast_fmaf, |
| 845 | .half_rate_64_ops, | 868 | .half_rate_64_ops, |
| 846 | .ldsbankcount32, | 869 | .ldsbankcount32, |
| ... | @@ -853,7 +876,6 @@ pub const cpu = struct { | ... | @@ -853,7 +876,6 @@ pub const cpu = struct { |
| 853 | .name = "fiji", | 876 | .name = "fiji", |
| 854 | .llvm_name = "fiji", | 877 | .llvm_name = "fiji", |
| 855 | .features = featureSet(&[_]Feature{ | 878 | .features = featureSet(&[_]Feature{ |
| 856 | .code_object_v3, | ||
| 857 | .ldsbankcount32, | 879 | .ldsbankcount32, |
| 858 | .no_xnack_support, | 880 | .no_xnack_support, |
| 859 | .unpacked_d16_vmem, | 881 | .unpacked_d16_vmem, |
| ... | @@ -879,7 +901,6 @@ pub const cpu = struct { | ... | @@ -879,7 +901,6 @@ pub const cpu = struct { |
| 879 | .name = "gfx1010", | 901 | .name = "gfx1010", |
| 880 | .llvm_name = "gfx1010", | 902 | .llvm_name = "gfx1010", |
| 881 | .features = featureSet(&[_]Feature{ | 903 | .features = featureSet(&[_]Feature{ |
| 882 | .code_object_v3, | ||
| 883 | .dl_insts, | 904 | .dl_insts, |
| 884 | .ds_src2_insts, | 905 | .ds_src2_insts, |
| 885 | .flat_segment_offset_bug, | 906 | .flat_segment_offset_bug, |
| ... | @@ -909,7 +930,6 @@ pub const cpu = struct { | ... | @@ -909,7 +930,6 @@ pub const cpu = struct { |
| 909 | .name = "gfx1011", | 930 | .name = "gfx1011", |
| 910 | .llvm_name = "gfx1011", | 931 | .llvm_name = "gfx1011", |
| 911 | .features = featureSet(&[_]Feature{ | 932 | .features = featureSet(&[_]Feature{ |
| 912 | .code_object_v3, | ||
| 913 | .dl_insts, | 933 | .dl_insts, |
| 914 | .dot1_insts, | 934 | .dot1_insts, |
| 915 | .dot2_insts, | 935 | .dot2_insts, |
| ... | @@ -921,6 +941,7 @@ pub const cpu = struct { | ... | @@ -921,6 +941,7 @@ pub const cpu = struct { |
| 921 | .gfx10, | 941 | .gfx10, |
| 922 | .inst_fwd_prefetch_bug, | 942 | .inst_fwd_prefetch_bug, |
| 923 | .lds_branch_vmem_war_hazard, | 943 | .lds_branch_vmem_war_hazard, |
| 944 | .lds_misaligned_bug, | ||
| 924 | .ldsbankcount32, | 945 | .ldsbankcount32, |
| 925 | .mad_mac_f32_insts, | 946 | .mad_mac_f32_insts, |
| 926 | .no_xnack_support, | 947 | .no_xnack_support, |
| ... | @@ -942,7 +963,6 @@ pub const cpu = struct { | ... | @@ -942,7 +963,6 @@ pub const cpu = struct { |
| 942 | .name = "gfx1012", | 963 | .name = "gfx1012", |
| 943 | .llvm_name = "gfx1012", | 964 | .llvm_name = "gfx1012", |
| 944 | .features = featureSet(&[_]Feature{ | 965 | .features = featureSet(&[_]Feature{ |
| 945 | .code_object_v3, | ||
| 946 | .dl_insts, | 966 | .dl_insts, |
| 947 | .dot1_insts, | 967 | .dot1_insts, |
| 948 | .dot2_insts, | 968 | .dot2_insts, |
| ... | @@ -976,7 +996,60 @@ pub const cpu = struct { | ... | @@ -976,7 +996,60 @@ pub const cpu = struct { |
| 976 | .name = "gfx1030", | 996 | .name = "gfx1030", |
| 977 | .llvm_name = "gfx1030", | 997 | .llvm_name = "gfx1030", |
| 978 | .features = featureSet(&[_]Feature{ | 998 | .features = featureSet(&[_]Feature{ |
| 979 | .code_object_v3, | 999 | .dl_insts, |
| 1000 | .dot1_insts, | ||
| 1001 | .dot2_insts, | ||
| 1002 | .dot5_insts, | ||
| 1003 | .dot6_insts, | ||
| 1004 | .gfx10, | ||
| 1005 | .gfx10_3_insts, | ||
| 1006 | .gfx10_b_encoding, | ||
| 1007 | .ldsbankcount32, | ||
| 1008 | .no_xnack_support, | ||
| 1009 | .nsa_encoding, | ||
| 1010 | .wavefrontsize32, | ||
| 1011 | }), | ||
| 1012 | }; | ||
| 1013 | pub const gfx1031 = CpuModel{ | ||
| 1014 | .name = "gfx1031", | ||
| 1015 | .llvm_name = "gfx1031", | ||
| 1016 | .features = featureSet(&[_]Feature{ | ||
| 1017 | .dl_insts, | ||
| 1018 | .dot1_insts, | ||
| 1019 | .dot2_insts, | ||
| 1020 | .dot5_insts, | ||
| 1021 | .dot6_insts, | ||
| 1022 | .gfx10, | ||
| 1023 | .gfx10_3_insts, | ||
| 1024 | .gfx10_b_encoding, | ||
| 1025 | .ldsbankcount32, | ||
| 1026 | .no_xnack_support, | ||
| 1027 | .nsa_encoding, | ||
| 1028 | .wavefrontsize32, | ||
| 1029 | }), | ||
| 1030 | }; | ||
| 1031 | pub const gfx1032 = CpuModel{ | ||
| 1032 | .name = "gfx1032", | ||
| 1033 | .llvm_name = "gfx1032", | ||
| 1034 | .features = featureSet(&[_]Feature{ | ||
| 1035 | .dl_insts, | ||
| 1036 | .dot1_insts, | ||
| 1037 | .dot2_insts, | ||
| 1038 | .dot5_insts, | ||
| 1039 | .dot6_insts, | ||
| 1040 | .gfx10, | ||
| 1041 | .gfx10_3_insts, | ||
| 1042 | .gfx10_b_encoding, | ||
| 1043 | .ldsbankcount32, | ||
| 1044 | .no_xnack_support, | ||
| 1045 | .nsa_encoding, | ||
| 1046 | .wavefrontsize32, | ||
| 1047 | }), | ||
| 1048 | }; | ||
| 1049 | pub const gfx1033 = CpuModel{ | ||
| 1050 | .name = "gfx1033", | ||
| 1051 | .llvm_name = "gfx1033", | ||
| 1052 | .features = featureSet(&[_]Feature{ | ||
| 980 | .dl_insts, | 1053 | .dl_insts, |
| 981 | .dot1_insts, | 1054 | .dot1_insts, |
| 982 | .dot2_insts, | 1055 | .dot2_insts, |
| ... | @@ -995,7 +1068,6 @@ pub const cpu = struct { | ... | @@ -995,7 +1068,6 @@ pub const cpu = struct { |
| 995 | .name = "gfx600", | 1068 | .name = "gfx600", |
| 996 | .llvm_name = "gfx600", | 1069 | .llvm_name = "gfx600", |
| 997 | .features = featureSet(&[_]Feature{ | 1070 | .features = featureSet(&[_]Feature{ |
| 998 | .code_object_v3, | ||
| 999 | .fast_fmaf, | 1071 | .fast_fmaf, |
| 1000 | .half_rate_64_ops, | 1072 | .half_rate_64_ops, |
| 1001 | .ldsbankcount32, | 1073 | .ldsbankcount32, |
| ... | @@ -1007,7 +1079,15 @@ pub const cpu = struct { | ... | @@ -1007,7 +1079,15 @@ pub const cpu = struct { |
| 1007 | .name = "gfx601", | 1079 | .name = "gfx601", |
| 1008 | .llvm_name = "gfx601", | 1080 | .llvm_name = "gfx601", |
| 1009 | .features = featureSet(&[_]Feature{ | 1081 | .features = featureSet(&[_]Feature{ |
| 1010 | .code_object_v3, | 1082 | .ldsbankcount32, |
| 1083 | .no_xnack_support, | ||
| 1084 | .southern_islands, | ||
| 1085 | }), | ||
| 1086 | }; | ||
| 1087 | pub const gfx602 = CpuModel{ | ||
| 1088 | .name = "gfx602", | ||
| 1089 | .llvm_name = "gfx602", | ||
| 1090 | .features = featureSet(&[_]Feature{ | ||
| 1011 | .ldsbankcount32, | 1091 | .ldsbankcount32, |
| 1012 | .no_xnack_support, | 1092 | .no_xnack_support, |
| 1013 | .southern_islands, | 1093 | .southern_islands, |
| ... | @@ -1017,7 +1097,6 @@ pub const cpu = struct { | ... | @@ -1017,7 +1097,6 @@ pub const cpu = struct { |
| 1017 | .name = "gfx700", | 1097 | .name = "gfx700", |
| 1018 | .llvm_name = "gfx700", | 1098 | .llvm_name = "gfx700", |
| 1019 | .features = featureSet(&[_]Feature{ | 1099 | .features = featureSet(&[_]Feature{ |
| 1020 | .code_object_v3, | ||
| 1021 | .ldsbankcount32, | 1100 | .ldsbankcount32, |
| 1022 | .no_xnack_support, | 1101 | .no_xnack_support, |
| 1023 | .sea_islands, | 1102 | .sea_islands, |
| ... | @@ -1027,7 +1106,6 @@ pub const cpu = struct { | ... | @@ -1027,7 +1106,6 @@ pub const cpu = struct { |
| 1027 | .name = "gfx701", | 1106 | .name = "gfx701", |
| 1028 | .llvm_name = "gfx701", | 1107 | .llvm_name = "gfx701", |
| 1029 | .features = featureSet(&[_]Feature{ | 1108 | .features = featureSet(&[_]Feature{ |
| 1030 | .code_object_v3, | ||
| 1031 | .fast_fmaf, | 1109 | .fast_fmaf, |
| 1032 | .half_rate_64_ops, | 1110 | .half_rate_64_ops, |
| 1033 | .ldsbankcount32, | 1111 | .ldsbankcount32, |
| ... | @@ -1039,7 +1117,6 @@ pub const cpu = struct { | ... | @@ -1039,7 +1117,6 @@ pub const cpu = struct { |
| 1039 | .name = "gfx702", | 1117 | .name = "gfx702", |
| 1040 | .llvm_name = "gfx702", | 1118 | .llvm_name = "gfx702", |
| 1041 | .features = featureSet(&[_]Feature{ | 1119 | .features = featureSet(&[_]Feature{ |
| 1042 | .code_object_v3, | ||
| 1043 | .fast_fmaf, | 1120 | .fast_fmaf, |
| 1044 | .ldsbankcount16, | 1121 | .ldsbankcount16, |
| 1045 | .no_xnack_support, | 1122 | .no_xnack_support, |
| ... | @@ -1050,7 +1127,6 @@ pub const cpu = struct { | ... | @@ -1050,7 +1127,6 @@ pub const cpu = struct { |
| 1050 | .name = "gfx703", | 1127 | .name = "gfx703", |
| 1051 | .llvm_name = "gfx703", | 1128 | .llvm_name = "gfx703", |
| 1052 | .features = featureSet(&[_]Feature{ | 1129 | .features = featureSet(&[_]Feature{ |
| 1053 | .code_object_v3, | ||
| 1054 | .ldsbankcount16, | 1130 | .ldsbankcount16, |
| 1055 | .no_xnack_support, | 1131 | .no_xnack_support, |
| 1056 | .sea_islands, | 1132 | .sea_islands, |
| ... | @@ -1060,17 +1136,24 @@ pub const cpu = struct { | ... | @@ -1060,17 +1136,24 @@ pub const cpu = struct { |
| 1060 | .name = "gfx704", | 1136 | .name = "gfx704", |
| 1061 | .llvm_name = "gfx704", | 1137 | .llvm_name = "gfx704", |
| 1062 | .features = featureSet(&[_]Feature{ | 1138 | .features = featureSet(&[_]Feature{ |
| 1063 | .code_object_v3, | ||
| 1064 | .ldsbankcount32, | 1139 | .ldsbankcount32, |
| 1065 | .no_xnack_support, | 1140 | .no_xnack_support, |
| 1066 | .sea_islands, | 1141 | .sea_islands, |
| 1067 | }), | 1142 | }), |
| 1068 | }; | 1143 | }; |
| 1144 | pub const gfx705 = CpuModel{ | ||
| 1145 | .name = "gfx705", | ||
| 1146 | .llvm_name = "gfx705", | ||
| 1147 | .features = featureSet(&[_]Feature{ | ||
| 1148 | .ldsbankcount16, | ||
| 1149 | .no_xnack_support, | ||
| 1150 | .sea_islands, | ||
| 1151 | }), | ||
| 1152 | }; | ||
| 1069 | pub const gfx801 = CpuModel{ | 1153 | pub const gfx801 = CpuModel{ |
| 1070 | .name = "gfx801", | 1154 | .name = "gfx801", |
| 1071 | .llvm_name = "gfx801", | 1155 | .llvm_name = "gfx801", |
| 1072 | .features = featureSet(&[_]Feature{ | 1156 | .features = featureSet(&[_]Feature{ |
| 1073 | .code_object_v3, | ||
| 1074 | .fast_fmaf, | 1157 | .fast_fmaf, |
| 1075 | .half_rate_64_ops, | 1158 | .half_rate_64_ops, |
| 1076 | .ldsbankcount32, | 1159 | .ldsbankcount32, |
| ... | @@ -1083,7 +1166,6 @@ pub const cpu = struct { | ... | @@ -1083,7 +1166,6 @@ pub const cpu = struct { |
| 1083 | .name = "gfx802", | 1166 | .name = "gfx802", |
| 1084 | .llvm_name = "gfx802", | 1167 | .llvm_name = "gfx802", |
| 1085 | .features = featureSet(&[_]Feature{ | 1168 | .features = featureSet(&[_]Feature{ |
| 1086 | .code_object_v3, | ||
| 1087 | .ldsbankcount32, | 1169 | .ldsbankcount32, |
| 1088 | .no_xnack_support, | 1170 | .no_xnack_support, |
| 1089 | .sgpr_init_bug, | 1171 | .sgpr_init_bug, |
| ... | @@ -1095,18 +1177,29 @@ pub const cpu = struct { | ... | @@ -1095,18 +1177,29 @@ pub const cpu = struct { |
| 1095 | .name = "gfx803", | 1177 | .name = "gfx803", |
| 1096 | .llvm_name = "gfx803", | 1178 | .llvm_name = "gfx803", |
| 1097 | .features = featureSet(&[_]Feature{ | 1179 | .features = featureSet(&[_]Feature{ |
| 1098 | .code_object_v3, | ||
| 1099 | .ldsbankcount32, | 1180 | .ldsbankcount32, |
| 1100 | .no_xnack_support, | 1181 | .no_xnack_support, |
| 1101 | .unpacked_d16_vmem, | 1182 | .unpacked_d16_vmem, |
| 1102 | .volcanic_islands, | 1183 | .volcanic_islands, |
| 1103 | }), | 1184 | }), |
| 1104 | }; | 1185 | }; |
| 1186 | pub const gfx805 = CpuModel{ | ||
| 1187 | .name = "gfx805", | ||
| 1188 | .llvm_name = "gfx805", | ||
| 1189 | .features = featureSet(&[_]Feature{ | ||
| 1190 | .ldsbankcount32, | ||
| 1191 | .no_xnack_support, | ||
| 1192 | .sgpr_init_bug, | ||
| 1193 | .unpacked_d16_vmem, | ||
| 1194 | .volcanic_islands, | ||
| 1195 | }), | ||
| 1196 | }; | ||
| 1105 | pub const gfx810 = CpuModel{ | 1197 | pub const gfx810 = CpuModel{ |
| 1106 | .name = "gfx810", | 1198 | .name = "gfx810", |
| 1107 | .llvm_name = "gfx810", | 1199 | .llvm_name = "gfx810", |
| 1108 | .features = featureSet(&[_]Feature{ | 1200 | .features = featureSet(&[_]Feature{ |
| 1109 | .code_object_v3, | 1201 | .image_gather4_d16_bug, |
| 1202 | .image_store_d16_bug, | ||
| 1110 | .ldsbankcount16, | 1203 | .ldsbankcount16, |
| 1111 | .volcanic_islands, | 1204 | .volcanic_islands, |
| 1112 | .xnack, | 1205 | .xnack, |
| ... | @@ -1116,8 +1209,8 @@ pub const cpu = struct { | ... | @@ -1116,8 +1209,8 @@ pub const cpu = struct { |
| 1116 | .name = "gfx900", | 1209 | .name = "gfx900", |
| 1117 | .llvm_name = "gfx900", | 1210 | .llvm_name = "gfx900", |
| 1118 | .features = featureSet(&[_]Feature{ | 1211 | .features = featureSet(&[_]Feature{ |
| 1119 | .code_object_v3, | ||
| 1120 | .gfx9, | 1212 | .gfx9, |
| 1213 | .image_gather4_d16_bug, | ||
| 1121 | .ldsbankcount32, | 1214 | .ldsbankcount32, |
| 1122 | .mad_mix_insts, | 1215 | .mad_mix_insts, |
| 1123 | .no_sram_ecc_support, | 1216 | .no_sram_ecc_support, |
| ... | @@ -1128,8 +1221,8 @@ pub const cpu = struct { | ... | @@ -1128,8 +1221,8 @@ pub const cpu = struct { |
| 1128 | .name = "gfx902", | 1221 | .name = "gfx902", |
| 1129 | .llvm_name = "gfx902", | 1222 | .llvm_name = "gfx902", |
| 1130 | .features = featureSet(&[_]Feature{ | 1223 | .features = featureSet(&[_]Feature{ |
| 1131 | .code_object_v3, | ||
| 1132 | .gfx9, | 1224 | .gfx9, |
| 1225 | .image_gather4_d16_bug, | ||
| 1133 | .ldsbankcount32, | 1226 | .ldsbankcount32, |
| 1134 | .mad_mix_insts, | 1227 | .mad_mix_insts, |
| 1135 | .no_sram_ecc_support, | 1228 | .no_sram_ecc_support, |
| ... | @@ -1140,9 +1233,9 @@ pub const cpu = struct { | ... | @@ -1140,9 +1233,9 @@ pub const cpu = struct { |
| 1140 | .name = "gfx904", | 1233 | .name = "gfx904", |
| 1141 | .llvm_name = "gfx904", | 1234 | .llvm_name = "gfx904", |
| 1142 | .features = featureSet(&[_]Feature{ | 1235 | .features = featureSet(&[_]Feature{ |
| 1143 | .code_object_v3, | ||
| 1144 | .fma_mix_insts, | 1236 | .fma_mix_insts, |
| 1145 | .gfx9, | 1237 | .gfx9, |
| 1238 | .image_gather4_d16_bug, | ||
| 1146 | .ldsbankcount32, | 1239 | .ldsbankcount32, |
| 1147 | .no_sram_ecc_support, | 1240 | .no_sram_ecc_support, |
| 1148 | .no_xnack_support, | 1241 | .no_xnack_support, |
| ... | @@ -1152,13 +1245,13 @@ pub const cpu = struct { | ... | @@ -1152,13 +1245,13 @@ pub const cpu = struct { |
| 1152 | .name = "gfx906", | 1245 | .name = "gfx906", |
| 1153 | .llvm_name = "gfx906", | 1246 | .llvm_name = "gfx906", |
| 1154 | .features = featureSet(&[_]Feature{ | 1247 | .features = featureSet(&[_]Feature{ |
| 1155 | .code_object_v3, | ||
| 1156 | .dl_insts, | 1248 | .dl_insts, |
| 1157 | .dot1_insts, | 1249 | .dot1_insts, |
| 1158 | .dot2_insts, | 1250 | .dot2_insts, |
| 1159 | .fma_mix_insts, | 1251 | .fma_mix_insts, |
| 1160 | .gfx9, | 1252 | .gfx9, |
| 1161 | .half_rate_64_ops, | 1253 | .half_rate_64_ops, |
| 1254 | .image_gather4_d16_bug, | ||
| 1162 | .ldsbankcount32, | 1255 | .ldsbankcount32, |
| 1163 | .no_xnack_support, | 1256 | .no_xnack_support, |
| 1164 | }), | 1257 | }), |
| ... | @@ -1168,7 +1261,6 @@ pub const cpu = struct { | ... | @@ -1168,7 +1261,6 @@ pub const cpu = struct { |
| 1168 | .llvm_name = "gfx908", | 1261 | .llvm_name = "gfx908", |
| 1169 | .features = featureSet(&[_]Feature{ | 1262 | .features = featureSet(&[_]Feature{ |
| 1170 | .atomic_fadd_insts, | 1263 | .atomic_fadd_insts, |
| 1171 | .code_object_v3, | ||
| 1172 | .dl_insts, | 1264 | .dl_insts, |
| 1173 | .dot1_insts, | 1265 | .dot1_insts, |
| 1174 | .dot2_insts, | 1266 | .dot2_insts, |
| ... | @@ -1179,6 +1271,7 @@ pub const cpu = struct { | ... | @@ -1179,6 +1271,7 @@ pub const cpu = struct { |
| 1179 | .fma_mix_insts, | 1271 | .fma_mix_insts, |
| 1180 | .gfx9, | 1272 | .gfx9, |
| 1181 | .half_rate_64_ops, | 1273 | .half_rate_64_ops, |
| 1274 | .image_gather4_d16_bug, | ||
| 1182 | .ldsbankcount32, | 1275 | .ldsbankcount32, |
| 1183 | .mai_insts, | 1276 | .mai_insts, |
| 1184 | .mfma_inline_literal_bug, | 1277 | .mfma_inline_literal_bug, |
| ... | @@ -1190,8 +1283,19 @@ pub const cpu = struct { | ... | @@ -1190,8 +1283,19 @@ pub const cpu = struct { |
| 1190 | .name = "gfx909", | 1283 | .name = "gfx909", |
| 1191 | .llvm_name = "gfx909", | 1284 | .llvm_name = "gfx909", |
| 1192 | .features = featureSet(&[_]Feature{ | 1285 | .features = featureSet(&[_]Feature{ |
| 1193 | .code_object_v3, | ||
| 1194 | .gfx9, | 1286 | .gfx9, |
| 1287 | .image_gather4_d16_bug, | ||
| 1288 | .ldsbankcount32, | ||
| 1289 | .mad_mix_insts, | ||
| 1290 | .xnack, | ||
| 1291 | }), | ||
| 1292 | }; | ||
| 1293 | pub const gfx90c = CpuModel{ | ||
| 1294 | .name = "gfx90c", | ||
| 1295 | .llvm_name = "gfx90c", | ||
| 1296 | .features = featureSet(&[_]Feature{ | ||
| 1297 | .gfx9, | ||
| 1298 | .image_gather4_d16_bug, | ||
| 1195 | .ldsbankcount32, | 1299 | .ldsbankcount32, |
| 1196 | .mad_mix_insts, | 1300 | .mad_mix_insts, |
| 1197 | .xnack, | 1301 | .xnack, |
| ... | @@ -1201,7 +1305,6 @@ pub const cpu = struct { | ... | @@ -1201,7 +1305,6 @@ pub const cpu = struct { |
| 1201 | .name = "hainan", | 1305 | .name = "hainan", |
| 1202 | .llvm_name = "hainan", | 1306 | .llvm_name = "hainan", |
| 1203 | .features = featureSet(&[_]Feature{ | 1307 | .features = featureSet(&[_]Feature{ |
| 1204 | .code_object_v3, | ||
| 1205 | .ldsbankcount32, | 1308 | .ldsbankcount32, |
| 1206 | .no_xnack_support, | 1309 | .no_xnack_support, |
| 1207 | .southern_islands, | 1310 | .southern_islands, |
| ... | @@ -1211,7 +1314,6 @@ pub const cpu = struct { | ... | @@ -1211,7 +1314,6 @@ pub const cpu = struct { |
| 1211 | .name = "hawaii", | 1314 | .name = "hawaii", |
| 1212 | .llvm_name = "hawaii", | 1315 | .llvm_name = "hawaii", |
| 1213 | .features = featureSet(&[_]Feature{ | 1316 | .features = featureSet(&[_]Feature{ |
| 1214 | .code_object_v3, | ||
| 1215 | .fast_fmaf, | 1317 | .fast_fmaf, |
| 1216 | .half_rate_64_ops, | 1318 | .half_rate_64_ops, |
| 1217 | .ldsbankcount32, | 1319 | .ldsbankcount32, |
| ... | @@ -1223,7 +1325,6 @@ pub const cpu = struct { | ... | @@ -1223,7 +1325,6 @@ pub const cpu = struct { |
| 1223 | .name = "iceland", | 1325 | .name = "iceland", |
| 1224 | .llvm_name = "iceland", | 1326 | .llvm_name = "iceland", |
| 1225 | .features = featureSet(&[_]Feature{ | 1327 | .features = featureSet(&[_]Feature{ |
| 1226 | .code_object_v3, | ||
| 1227 | .ldsbankcount32, | 1328 | .ldsbankcount32, |
| 1228 | .no_xnack_support, | 1329 | .no_xnack_support, |
| 1229 | .sgpr_init_bug, | 1330 | .sgpr_init_bug, |
| ... | @@ -1235,7 +1336,6 @@ pub const cpu = struct { | ... | @@ -1235,7 +1336,6 @@ pub const cpu = struct { |
| 1235 | .name = "kabini", | 1336 | .name = "kabini", |
| 1236 | .llvm_name = "kabini", | 1337 | .llvm_name = "kabini", |
| 1237 | .features = featureSet(&[_]Feature{ | 1338 | .features = featureSet(&[_]Feature{ |
| 1238 | .code_object_v3, | ||
| 1239 | .ldsbankcount16, | 1339 | .ldsbankcount16, |
| 1240 | .no_xnack_support, | 1340 | .no_xnack_support, |
| 1241 | .sea_islands, | 1341 | .sea_islands, |
| ... | @@ -1245,7 +1345,6 @@ pub const cpu = struct { | ... | @@ -1245,7 +1345,6 @@ pub const cpu = struct { |
| 1245 | .name = "kaveri", | 1345 | .name = "kaveri", |
| 1246 | .llvm_name = "kaveri", | 1346 | .llvm_name = "kaveri", |
| 1247 | .features = featureSet(&[_]Feature{ | 1347 | .features = featureSet(&[_]Feature{ |
| 1248 | .code_object_v3, | ||
| 1249 | .ldsbankcount32, | 1348 | .ldsbankcount32, |
| 1250 | .no_xnack_support, | 1349 | .no_xnack_support, |
| 1251 | .sea_islands, | 1350 | .sea_islands, |
| ... | @@ -1255,7 +1354,6 @@ pub const cpu = struct { | ... | @@ -1255,7 +1354,6 @@ pub const cpu = struct { |
| 1255 | .name = "mullins", | 1354 | .name = "mullins", |
| 1256 | .llvm_name = "mullins", | 1355 | .llvm_name = "mullins", |
| 1257 | .features = featureSet(&[_]Feature{ | 1356 | .features = featureSet(&[_]Feature{ |
| 1258 | .code_object_v3, | ||
| 1259 | .ldsbankcount16, | 1357 | .ldsbankcount16, |
| 1260 | .no_xnack_support, | 1358 | .no_xnack_support, |
| 1261 | .sea_islands, | 1359 | .sea_islands, |
| ... | @@ -1265,7 +1363,6 @@ pub const cpu = struct { | ... | @@ -1265,7 +1363,6 @@ pub const cpu = struct { |
| 1265 | .name = "oland", | 1363 | .name = "oland", |
| 1266 | .llvm_name = "oland", | 1364 | .llvm_name = "oland", |
| 1267 | .features = featureSet(&[_]Feature{ | 1365 | .features = featureSet(&[_]Feature{ |
| 1268 | .code_object_v3, | ||
| 1269 | .ldsbankcount32, | 1366 | .ldsbankcount32, |
| 1270 | .no_xnack_support, | 1367 | .no_xnack_support, |
| 1271 | .southern_islands, | 1368 | .southern_islands, |
| ... | @@ -1275,7 +1372,6 @@ pub const cpu = struct { | ... | @@ -1275,7 +1372,6 @@ pub const cpu = struct { |
| 1275 | .name = "pitcairn", | 1372 | .name = "pitcairn", |
| 1276 | .llvm_name = "pitcairn", | 1373 | .llvm_name = "pitcairn", |
| 1277 | .features = featureSet(&[_]Feature{ | 1374 | .features = featureSet(&[_]Feature{ |
| 1278 | .code_object_v3, | ||
| 1279 | .ldsbankcount32, | 1375 | .ldsbankcount32, |
| 1280 | .no_xnack_support, | 1376 | .no_xnack_support, |
| 1281 | .southern_islands, | 1377 | .southern_islands, |
| ... | @@ -1285,7 +1381,6 @@ pub const cpu = struct { | ... | @@ -1285,7 +1381,6 @@ pub const cpu = struct { |
| 1285 | .name = "polaris10", | 1381 | .name = "polaris10", |
| 1286 | .llvm_name = "polaris10", | 1382 | .llvm_name = "polaris10", |
| 1287 | .features = featureSet(&[_]Feature{ | 1383 | .features = featureSet(&[_]Feature{ |
| 1288 | .code_object_v3, | ||
| 1289 | .ldsbankcount32, | 1384 | .ldsbankcount32, |
| 1290 | .no_xnack_support, | 1385 | .no_xnack_support, |
| 1291 | .unpacked_d16_vmem, | 1386 | .unpacked_d16_vmem, |
| ... | @@ -1296,7 +1391,6 @@ pub const cpu = struct { | ... | @@ -1296,7 +1391,6 @@ pub const cpu = struct { |
| 1296 | .name = "polaris11", | 1391 | .name = "polaris11", |
| 1297 | .llvm_name = "polaris11", | 1392 | .llvm_name = "polaris11", |
| 1298 | .features = featureSet(&[_]Feature{ | 1393 | .features = featureSet(&[_]Feature{ |
| 1299 | .code_object_v3, | ||
| 1300 | .ldsbankcount32, | 1394 | .ldsbankcount32, |
| 1301 | .no_xnack_support, | 1395 | .no_xnack_support, |
| 1302 | .unpacked_d16_vmem, | 1396 | .unpacked_d16_vmem, |
| ... | @@ -1307,7 +1401,8 @@ pub const cpu = struct { | ... | @@ -1307,7 +1401,8 @@ pub const cpu = struct { |
| 1307 | .name = "stoney", | 1401 | .name = "stoney", |
| 1308 | .llvm_name = "stoney", | 1402 | .llvm_name = "stoney", |
| 1309 | .features = featureSet(&[_]Feature{ | 1403 | .features = featureSet(&[_]Feature{ |
| 1310 | .code_object_v3, | 1404 | .image_gather4_d16_bug, |
| 1405 | .image_store_d16_bug, | ||
| 1311 | .ldsbankcount16, | 1406 | .ldsbankcount16, |
| 1312 | .volcanic_islands, | 1407 | .volcanic_islands, |
| 1313 | .xnack, | 1408 | .xnack, |
| ... | @@ -1317,7 +1412,6 @@ pub const cpu = struct { | ... | @@ -1317,7 +1412,6 @@ pub const cpu = struct { |
| 1317 | .name = "tahiti", | 1412 | .name = "tahiti", |
| 1318 | .llvm_name = "tahiti", | 1413 | .llvm_name = "tahiti", |
| 1319 | .features = featureSet(&[_]Feature{ | 1414 | .features = featureSet(&[_]Feature{ |
| 1320 | .code_object_v3, | ||
| 1321 | .fast_fmaf, | 1415 | .fast_fmaf, |
| 1322 | .half_rate_64_ops, | 1416 | .half_rate_64_ops, |
| 1323 | .ldsbankcount32, | 1417 | .ldsbankcount32, |
| ... | @@ -1329,7 +1423,17 @@ pub const cpu = struct { | ... | @@ -1329,7 +1423,17 @@ pub const cpu = struct { |
| 1329 | .name = "tonga", | 1423 | .name = "tonga", |
| 1330 | .llvm_name = "tonga", | 1424 | .llvm_name = "tonga", |
| 1331 | .features = featureSet(&[_]Feature{ | 1425 | .features = featureSet(&[_]Feature{ |
| 1332 | .code_object_v3, | 1426 | .ldsbankcount32, |
| 1427 | .no_xnack_support, | ||
| 1428 | .sgpr_init_bug, | ||
| 1429 | .unpacked_d16_vmem, | ||
| 1430 | .volcanic_islands, | ||
| 1431 | }), | ||
| 1432 | }; | ||
| 1433 | pub const tongapro = CpuModel{ | ||
| 1434 | .name = "tongapro", | ||
| 1435 | .llvm_name = "tongapro", | ||
| 1436 | .features = featureSet(&[_]Feature{ | ||
| 1333 | .ldsbankcount32, | 1437 | .ldsbankcount32, |
| 1334 | .no_xnack_support, | 1438 | .no_xnack_support, |
| 1335 | .sgpr_init_bug, | 1439 | .sgpr_init_bug, |
| ... | @@ -1341,7 +1445,6 @@ pub const cpu = struct { | ... | @@ -1341,7 +1445,6 @@ pub const cpu = struct { |
| 1341 | .name = "verde", | 1445 | .name = "verde", |
| 1342 | .llvm_name = "verde", | 1446 | .llvm_name = "verde", |
| 1343 | .features = featureSet(&[_]Feature{ | 1447 | .features = featureSet(&[_]Feature{ |
| 1344 | .code_object_v3, | ||
| 1345 | .ldsbankcount32, | 1448 | .ldsbankcount32, |
| 1346 | .no_xnack_support, | 1449 | .no_xnack_support, |
| 1347 | .southern_islands, | 1450 | .southern_islands, |
lib/std/target/arm.zig+831-677| ... | @@ -10,10 +10,60 @@ const CpuModel = std.Target.Cpu.Model; | ... | @@ -10,10 +10,60 @@ const CpuModel = std.Target.Cpu.Model; |
| 10 | pub const Feature = enum { | 10 | pub const Feature = enum { |
| 11 | @"32bit", | 11 | @"32bit", |
| 12 | @"8msecext", | 12 | @"8msecext", |
| 13 | a12, | ||
| 14 | a15, | ||
| 15 | a17, | ||
| 16 | a32, | ||
| 17 | a35, | ||
| 18 | a5, | ||
| 19 | a53, | ||
| 20 | a55, | ||
| 21 | a57, | ||
| 22 | a7, | ||
| 23 | a72, | ||
| 24 | a73, | ||
| 25 | a75, | ||
| 13 | a76, | 26 | a76, |
| 27 | a77, | ||
| 28 | a8, | ||
| 29 | a9, | ||
| 14 | aclass, | 30 | aclass, |
| 15 | acquire_release, | 31 | acquire_release, |
| 16 | aes, | 32 | aes, |
| 33 | armv2, | ||
| 34 | armv2a, | ||
| 35 | armv3, | ||
| 36 | armv3m, | ||
| 37 | armv4, | ||
| 38 | armv4t, | ||
| 39 | armv5t, | ||
| 40 | armv5te, | ||
| 41 | armv5tej, | ||
| 42 | armv6, | ||
| 43 | armv6_m, | ||
| 44 | armv6j, | ||
| 45 | armv6k, | ||
| 46 | armv6kz, | ||
| 47 | armv6s_m, | ||
| 48 | armv6t2, | ||
| 49 | armv7_a, | ||
| 50 | armv7_m, | ||
| 51 | armv7_r, | ||
| 52 | armv7e_m, | ||
| 53 | armv7k, | ||
| 54 | armv7s, | ||
| 55 | armv7ve, | ||
| 56 | armv8_a, | ||
| 57 | armv8_m_base, | ||
| 58 | armv8_m_main, | ||
| 59 | armv8_r, | ||
| 60 | armv8_1_a, | ||
| 61 | armv8_1_m_main, | ||
| 62 | armv8_2_a, | ||
| 63 | armv8_3_a, | ||
| 64 | armv8_4_a, | ||
| 65 | armv8_5_a, | ||
| 66 | armv8_6_a, | ||
| 17 | avoid_movs_shop, | 67 | avoid_movs_shop, |
| 18 | avoid_partial_cpsr, | 68 | avoid_partial_cpsr, |
| 19 | bf16, | 69 | bf16, |
| ... | @@ -27,6 +77,8 @@ pub const Feature = enum { | ... | @@ -27,6 +77,8 @@ pub const Feature = enum { |
| 27 | cdecp6, | 77 | cdecp6, |
| 28 | cdecp7, | 78 | cdecp7, |
| 29 | cheap_predicable_cpsr, | 79 | cheap_predicable_cpsr, |
| 80 | cortex_a78, | ||
| 81 | cortex_x1, | ||
| 30 | crc, | 82 | crc, |
| 31 | crypto, | 83 | crypto, |
| 32 | d32, | 84 | d32, |
| ... | @@ -39,13 +91,13 @@ pub const Feature = enum { | ... | @@ -39,13 +91,13 @@ pub const Feature = enum { |
| 39 | execute_only, | 91 | execute_only, |
| 40 | expand_fp_mlx, | 92 | expand_fp_mlx, |
| 41 | exynos, | 93 | exynos, |
| 42 | fp16, | ||
| 43 | fp16fml, | ||
| 44 | fp64, | ||
| 45 | fp_armv8, | 94 | fp_armv8, |
| 46 | fp_armv8d16, | 95 | fp_armv8d16, |
| 47 | fp_armv8d16sp, | 96 | fp_armv8d16sp, |
| 48 | fp_armv8sp, | 97 | fp_armv8sp, |
| 98 | fp16, | ||
| 99 | fp16fml, | ||
| 100 | fp64, | ||
| 49 | fpao, | 101 | fpao, |
| 50 | fpregs, | 102 | fpregs, |
| 51 | fpregs16, | 103 | fpregs16, |
| ... | @@ -53,30 +105,13 @@ pub const Feature = enum { | ... | @@ -53,30 +105,13 @@ pub const Feature = enum { |
| 53 | fullfp16, | 105 | fullfp16, |
| 54 | fuse_aes, | 106 | fuse_aes, |
| 55 | fuse_literals, | 107 | fuse_literals, |
| 56 | has_v4t, | ||
| 57 | has_v5t, | ||
| 58 | has_v5te, | ||
| 59 | has_v6, | ||
| 60 | has_v6k, | ||
| 61 | has_v6m, | ||
| 62 | has_v6t2, | ||
| 63 | has_v7, | ||
| 64 | has_v7clrex, | ||
| 65 | has_v8_1a, | ||
| 66 | has_v8_1m_main, | ||
| 67 | has_v8_2a, | ||
| 68 | has_v8_3a, | ||
| 69 | has_v8_4a, | ||
| 70 | has_v8_5a, | ||
| 71 | has_v8_6a, | ||
| 72 | has_v8, | ||
| 73 | has_v8m, | ||
| 74 | has_v8m_main, | ||
| 75 | hwdiv, | 108 | hwdiv, |
| 76 | hwdiv_arm, | 109 | hwdiv_arm, |
| 77 | i8mm, | 110 | _i8mm, |
| 78 | iwmmxt, | 111 | iwmmxt, |
| 79 | iwmmxt2, | 112 | iwmmxt2, |
| 113 | krait, | ||
| 114 | kryo, | ||
| 80 | lob, | 115 | lob, |
| 81 | long_calls, | 116 | long_calls, |
| 82 | loop_align, | 117 | loop_align, |
| ... | @@ -93,6 +128,7 @@ pub const Feature = enum { | ... | @@ -93,6 +128,7 @@ pub const Feature = enum { |
| 93 | neon, | 128 | neon, |
| 94 | neon_fpmovs, | 129 | neon_fpmovs, |
| 95 | neonfp, | 130 | neonfp, |
| 131 | neoverse_v1, | ||
| 96 | no_branch_predictor, | 132 | no_branch_predictor, |
| 97 | no_movt, | 133 | no_movt, |
| 98 | no_neg_immediates, | 134 | no_neg_immediates, |
| ... | @@ -103,6 +139,9 @@ pub const Feature = enum { | ... | @@ -103,6 +139,9 @@ pub const Feature = enum { |
| 103 | prefer_vmovsr, | 139 | prefer_vmovsr, |
| 104 | prof_unpr, | 140 | prof_unpr, |
| 105 | r4, | 141 | r4, |
| 142 | r5, | ||
| 143 | r52, | ||
| 144 | r7, | ||
| 106 | ras, | 145 | ras, |
| 107 | rclass, | 146 | rclass, |
| 108 | read_tp_hard, | 147 | read_tp_hard, |
| ... | @@ -121,37 +160,20 @@ pub const Feature = enum { | ... | @@ -121,37 +160,20 @@ pub const Feature = enum { |
| 121 | splat_vfp_neon, | 160 | splat_vfp_neon, |
| 122 | strict_align, | 161 | strict_align, |
| 123 | swift, | 162 | swift, |
| 124 | thumb2, | ||
| 125 | thumb_mode, | 163 | thumb_mode, |
| 164 | thumb2, | ||
| 126 | trustzone, | 165 | trustzone, |
| 127 | use_misched, | 166 | use_misched, |
| 128 | v2, | ||
| 129 | v2a, | ||
| 130 | v3, | ||
| 131 | v3m, | ||
| 132 | v4, | ||
| 133 | v4t, | 167 | v4t, |
| 134 | v5t, | 168 | v5t, |
| 135 | v5te, | 169 | v5te, |
| 136 | v5tej, | ||
| 137 | v6, | 170 | v6, |
| 138 | v6j, | ||
| 139 | v6k, | 171 | v6k, |
| 140 | v6kz, | ||
| 141 | v6m, | 172 | v6m, |
| 142 | v6sm, | ||
| 143 | v6t2, | 173 | v6t2, |
| 144 | v7a, | 174 | v7, |
| 145 | v7em, | 175 | v7clrex, |
| 146 | v7k, | 176 | v8, |
| 147 | v7m, | ||
| 148 | v7r, | ||
| 149 | v7s, | ||
| 150 | v7ve, | ||
| 151 | v8a, | ||
| 152 | v8m, | ||
| 153 | v8m_main, | ||
| 154 | v8r, | ||
| 155 | v8_1a, | 177 | v8_1a, |
| 156 | v8_1m_main, | 178 | v8_1m_main, |
| 157 | v8_2a, | 179 | v8_2a, |
| ... | @@ -159,6 +181,8 @@ pub const Feature = enum { | ... | @@ -159,6 +181,8 @@ pub const Feature = enum { |
| 159 | v8_4a, | 181 | v8_4a, |
| 160 | v8_5a, | 182 | v8_5a, |
| 161 | v8_6a, | 183 | v8_6a, |
| 184 | v8m, | ||
| 185 | v8m_main, | ||
| 162 | vfp2, | 186 | vfp2, |
| 163 | vfp2sp, | 187 | vfp2sp, |
| 164 | vfp3, | 188 | vfp3, |
| ... | @@ -195,11 +219,91 @@ pub const all_features = blk: { | ... | @@ -195,11 +219,91 @@ pub const all_features = blk: { |
| 195 | .description = "Enable support for ARMv8-M Security Extensions", | 219 | .description = "Enable support for ARMv8-M Security Extensions", |
| 196 | .dependencies = featureSet(&[_]Feature{}), | 220 | .dependencies = featureSet(&[_]Feature{}), |
| 197 | }; | 221 | }; |
| 222 | result[@enumToInt(Feature.a12)] = .{ | ||
| 223 | .llvm_name = "a12", | ||
| 224 | .description = "Cortex-A12 ARM processors", | ||
| 225 | .dependencies = featureSet(&[_]Feature{}), | ||
| 226 | }; | ||
| 227 | result[@enumToInt(Feature.a15)] = .{ | ||
| 228 | .llvm_name = "a15", | ||
| 229 | .description = "Cortex-A15 ARM processors", | ||
| 230 | .dependencies = featureSet(&[_]Feature{}), | ||
| 231 | }; | ||
| 232 | result[@enumToInt(Feature.a17)] = .{ | ||
| 233 | .llvm_name = "a17", | ||
| 234 | .description = "Cortex-A17 ARM processors", | ||
| 235 | .dependencies = featureSet(&[_]Feature{}), | ||
| 236 | }; | ||
| 237 | result[@enumToInt(Feature.a32)] = .{ | ||
| 238 | .llvm_name = "a32", | ||
| 239 | .description = "Cortex-A32 ARM processors", | ||
| 240 | .dependencies = featureSet(&[_]Feature{}), | ||
| 241 | }; | ||
| 242 | result[@enumToInt(Feature.a35)] = .{ | ||
| 243 | .llvm_name = "a35", | ||
| 244 | .description = "Cortex-A35 ARM processors", | ||
| 245 | .dependencies = featureSet(&[_]Feature{}), | ||
| 246 | }; | ||
| 247 | result[@enumToInt(Feature.a5)] = .{ | ||
| 248 | .llvm_name = "a5", | ||
| 249 | .description = "Cortex-A5 ARM processors", | ||
| 250 | .dependencies = featureSet(&[_]Feature{}), | ||
| 251 | }; | ||
| 252 | result[@enumToInt(Feature.a53)] = .{ | ||
| 253 | .llvm_name = "a53", | ||
| 254 | .description = "Cortex-A53 ARM processors", | ||
| 255 | .dependencies = featureSet(&[_]Feature{}), | ||
| 256 | }; | ||
| 257 | result[@enumToInt(Feature.a55)] = .{ | ||
| 258 | .llvm_name = "a55", | ||
| 259 | .description = "Cortex-A55 ARM processors", | ||
| 260 | .dependencies = featureSet(&[_]Feature{}), | ||
| 261 | }; | ||
| 262 | result[@enumToInt(Feature.a57)] = .{ | ||
| 263 | .llvm_name = "a57", | ||
| 264 | .description = "Cortex-A57 ARM processors", | ||
| 265 | .dependencies = featureSet(&[_]Feature{}), | ||
| 266 | }; | ||
| 267 | result[@enumToInt(Feature.a7)] = .{ | ||
| 268 | .llvm_name = "a7", | ||
| 269 | .description = "Cortex-A7 ARM processors", | ||
| 270 | .dependencies = featureSet(&[_]Feature{}), | ||
| 271 | }; | ||
| 272 | result[@enumToInt(Feature.a72)] = .{ | ||
| 273 | .llvm_name = "a72", | ||
| 274 | .description = "Cortex-A72 ARM processors", | ||
| 275 | .dependencies = featureSet(&[_]Feature{}), | ||
| 276 | }; | ||
| 277 | result[@enumToInt(Feature.a73)] = .{ | ||
| 278 | .llvm_name = "a73", | ||
| 279 | .description = "Cortex-A73 ARM processors", | ||
| 280 | .dependencies = featureSet(&[_]Feature{}), | ||
| 281 | }; | ||
| 282 | result[@enumToInt(Feature.a75)] = .{ | ||
| 283 | .llvm_name = "a75", | ||
| 284 | .description = "Cortex-A75 ARM processors", | ||
| 285 | .dependencies = featureSet(&[_]Feature{}), | ||
| 286 | }; | ||
| 198 | result[@enumToInt(Feature.a76)] = .{ | 287 | result[@enumToInt(Feature.a76)] = .{ |
| 199 | .llvm_name = "a76", | 288 | .llvm_name = "a76", |
| 200 | .description = "Cortex-A76 ARM processors", | 289 | .description = "Cortex-A76 ARM processors", |
| 201 | .dependencies = featureSet(&[_]Feature{}), | 290 | .dependencies = featureSet(&[_]Feature{}), |
| 202 | }; | 291 | }; |
| 292 | result[@enumToInt(Feature.a77)] = .{ | ||
| 293 | .llvm_name = "a77", | ||
| 294 | .description = "Cortex-A77 ARM processors", | ||
| 295 | .dependencies = featureSet(&[_]Feature{}), | ||
| 296 | }; | ||
| 297 | result[@enumToInt(Feature.a8)] = .{ | ||
| 298 | .llvm_name = "a8", | ||
| 299 | .description = "Cortex-A8 ARM processors", | ||
| 300 | .dependencies = featureSet(&[_]Feature{}), | ||
| 301 | }; | ||
| 302 | result[@enumToInt(Feature.a9)] = .{ | ||
| 303 | .llvm_name = "a9", | ||
| 304 | .description = "Cortex-A9 ARM processors", | ||
| 305 | .dependencies = featureSet(&[_]Feature{}), | ||
| 306 | }; | ||
| 203 | result[@enumToInt(Feature.aclass)] = .{ | 307 | result[@enumToInt(Feature.aclass)] = .{ |
| 204 | .llvm_name = "aclass", | 308 | .llvm_name = "aclass", |
| 205 | .description = "Is application profile ('A' series)", | 309 | .description = "Is application profile ('A' series)", |
| ... | @@ -217,6 +321,387 @@ pub const all_features = blk: { | ... | @@ -217,6 +321,387 @@ pub const all_features = blk: { |
| 217 | .neon, | 321 | .neon, |
| 218 | }), | 322 | }), |
| 219 | }; | 323 | }; |
| 324 | result[@enumToInt(Feature.armv2)] = .{ | ||
| 325 | .llvm_name = "armv2", | ||
| 326 | .description = "ARMv2 architecture", | ||
| 327 | .dependencies = featureSet(&[_]Feature{}), | ||
| 328 | }; | ||
| 329 | result[@enumToInt(Feature.armv2a)] = .{ | ||
| 330 | .llvm_name = "armv2a", | ||
| 331 | .description = "ARMv2a architecture", | ||
| 332 | .dependencies = featureSet(&[_]Feature{}), | ||
| 333 | }; | ||
| 334 | result[@enumToInt(Feature.armv3)] = .{ | ||
| 335 | .llvm_name = "armv3", | ||
| 336 | .description = "ARMv3 architecture", | ||
| 337 | .dependencies = featureSet(&[_]Feature{}), | ||
| 338 | }; | ||
| 339 | result[@enumToInt(Feature.armv3m)] = .{ | ||
| 340 | .llvm_name = "armv3m", | ||
| 341 | .description = "ARMv3m architecture", | ||
| 342 | .dependencies = featureSet(&[_]Feature{}), | ||
| 343 | }; | ||
| 344 | result[@enumToInt(Feature.armv4)] = .{ | ||
| 345 | .llvm_name = "armv4", | ||
| 346 | .description = "ARMv4 architecture", | ||
| 347 | .dependencies = featureSet(&[_]Feature{}), | ||
| 348 | }; | ||
| 349 | result[@enumToInt(Feature.armv4t)] = .{ | ||
| 350 | .llvm_name = "armv4t", | ||
| 351 | .description = "ARMv4t architecture", | ||
| 352 | .dependencies = featureSet(&[_]Feature{ | ||
| 353 | .v4t, | ||
| 354 | }), | ||
| 355 | }; | ||
| 356 | result[@enumToInt(Feature.armv5t)] = .{ | ||
| 357 | .llvm_name = "armv5t", | ||
| 358 | .description = "ARMv5t architecture", | ||
| 359 | .dependencies = featureSet(&[_]Feature{ | ||
| 360 | .v5t, | ||
| 361 | }), | ||
| 362 | }; | ||
| 363 | result[@enumToInt(Feature.armv5te)] = .{ | ||
| 364 | .llvm_name = "armv5te", | ||
| 365 | .description = "ARMv5te architecture", | ||
| 366 | .dependencies = featureSet(&[_]Feature{ | ||
| 367 | .v5te, | ||
| 368 | }), | ||
| 369 | }; | ||
| 370 | result[@enumToInt(Feature.armv5tej)] = .{ | ||
| 371 | .llvm_name = "armv5tej", | ||
| 372 | .description = "ARMv5tej architecture", | ||
| 373 | .dependencies = featureSet(&[_]Feature{ | ||
| 374 | .v5te, | ||
| 375 | }), | ||
| 376 | }; | ||
| 377 | result[@enumToInt(Feature.armv6)] = .{ | ||
| 378 | .llvm_name = "armv6", | ||
| 379 | .description = "ARMv6 architecture", | ||
| 380 | .dependencies = featureSet(&[_]Feature{ | ||
| 381 | .dsp, | ||
| 382 | .v6, | ||
| 383 | }), | ||
| 384 | }; | ||
| 385 | result[@enumToInt(Feature.armv6_m)] = .{ | ||
| 386 | .llvm_name = "armv6-m", | ||
| 387 | .description = "ARMv6m architecture", | ||
| 388 | .dependencies = featureSet(&[_]Feature{ | ||
| 389 | .db, | ||
| 390 | .mclass, | ||
| 391 | .noarm, | ||
| 392 | .strict_align, | ||
| 393 | .thumb_mode, | ||
| 394 | .v6m, | ||
| 395 | }), | ||
| 396 | }; | ||
| 397 | result[@enumToInt(Feature.armv6j)] = .{ | ||
| 398 | .llvm_name = "armv6j", | ||
| 399 | .description = "ARMv7a architecture", | ||
| 400 | .dependencies = featureSet(&[_]Feature{ | ||
| 401 | .armv6, | ||
| 402 | }), | ||
| 403 | }; | ||
| 404 | result[@enumToInt(Feature.armv6k)] = .{ | ||
| 405 | .llvm_name = "armv6k", | ||
| 406 | .description = "ARMv6k architecture", | ||
| 407 | .dependencies = featureSet(&[_]Feature{ | ||
| 408 | .v6k, | ||
| 409 | }), | ||
| 410 | }; | ||
| 411 | result[@enumToInt(Feature.armv6kz)] = .{ | ||
| 412 | .llvm_name = "armv6kz", | ||
| 413 | .description = "ARMv6kz architecture", | ||
| 414 | .dependencies = featureSet(&[_]Feature{ | ||
| 415 | .trustzone, | ||
| 416 | .v6k, | ||
| 417 | }), | ||
| 418 | }; | ||
| 419 | result[@enumToInt(Feature.armv6s_m)] = .{ | ||
| 420 | .llvm_name = "armv6s-m", | ||
| 421 | .description = "ARMv6sm architecture", | ||
| 422 | .dependencies = featureSet(&[_]Feature{ | ||
| 423 | .db, | ||
| 424 | .mclass, | ||
| 425 | .noarm, | ||
| 426 | .strict_align, | ||
| 427 | .thumb_mode, | ||
| 428 | .v6m, | ||
| 429 | }), | ||
| 430 | }; | ||
| 431 | result[@enumToInt(Feature.armv6t2)] = .{ | ||
| 432 | .llvm_name = "armv6t2", | ||
| 433 | .description = "ARMv6t2 architecture", | ||
| 434 | .dependencies = featureSet(&[_]Feature{ | ||
| 435 | .dsp, | ||
| 436 | .v6t2, | ||
| 437 | }), | ||
| 438 | }; | ||
| 439 | result[@enumToInt(Feature.armv7_a)] = .{ | ||
| 440 | .llvm_name = "armv7-a", | ||
| 441 | .description = "ARMv7a architecture", | ||
| 442 | .dependencies = featureSet(&[_]Feature{ | ||
| 443 | .aclass, | ||
| 444 | .db, | ||
| 445 | .dsp, | ||
| 446 | .neon, | ||
| 447 | .v7, | ||
| 448 | }), | ||
| 449 | }; | ||
| 450 | result[@enumToInt(Feature.armv7_m)] = .{ | ||
| 451 | .llvm_name = "armv7-m", | ||
| 452 | .description = "ARMv7m architecture", | ||
| 453 | .dependencies = featureSet(&[_]Feature{ | ||
| 454 | .db, | ||
| 455 | .hwdiv, | ||
| 456 | .mclass, | ||
| 457 | .noarm, | ||
| 458 | .thumb_mode, | ||
| 459 | .thumb2, | ||
| 460 | .v7, | ||
| 461 | }), | ||
| 462 | }; | ||
| 463 | result[@enumToInt(Feature.armv7_r)] = .{ | ||
| 464 | .llvm_name = "armv7-r", | ||
| 465 | .description = "ARMv7r architecture", | ||
| 466 | .dependencies = featureSet(&[_]Feature{ | ||
| 467 | .db, | ||
| 468 | .dsp, | ||
| 469 | .hwdiv, | ||
| 470 | .rclass, | ||
| 471 | .v7, | ||
| 472 | }), | ||
| 473 | }; | ||
| 474 | result[@enumToInt(Feature.armv7e_m)] = .{ | ||
| 475 | .llvm_name = "armv7e-m", | ||
| 476 | .description = "ARMv7em architecture", | ||
| 477 | .dependencies = featureSet(&[_]Feature{ | ||
| 478 | .db, | ||
| 479 | .dsp, | ||
| 480 | .hwdiv, | ||
| 481 | .mclass, | ||
| 482 | .noarm, | ||
| 483 | .thumb_mode, | ||
| 484 | .thumb2, | ||
| 485 | .v7, | ||
| 486 | }), | ||
| 487 | }; | ||
| 488 | result[@enumToInt(Feature.armv7k)] = .{ | ||
| 489 | .llvm_name = "armv7k", | ||
| 490 | .description = "ARMv7a architecture", | ||
| 491 | .dependencies = featureSet(&[_]Feature{ | ||
| 492 | .armv7_a, | ||
| 493 | }), | ||
| 494 | }; | ||
| 495 | result[@enumToInt(Feature.armv7s)] = .{ | ||
| 496 | .llvm_name = "armv7s", | ||
| 497 | .description = "ARMv7a architecture", | ||
| 498 | .dependencies = featureSet(&[_]Feature{ | ||
| 499 | .armv7_a, | ||
| 500 | }), | ||
| 501 | }; | ||
| 502 | result[@enumToInt(Feature.armv7ve)] = .{ | ||
| 503 | .llvm_name = "armv7ve", | ||
| 504 | .description = "ARMv7ve architecture", | ||
| 505 | .dependencies = featureSet(&[_]Feature{ | ||
| 506 | .aclass, | ||
| 507 | .db, | ||
| 508 | .dsp, | ||
| 509 | .mp, | ||
| 510 | .neon, | ||
| 511 | .trustzone, | ||
| 512 | .v7, | ||
| 513 | .virtualization, | ||
| 514 | }), | ||
| 515 | }; | ||
| 516 | result[@enumToInt(Feature.armv8_a)] = .{ | ||
| 517 | .llvm_name = "armv8-a", | ||
| 518 | .description = "ARMv8a architecture", | ||
| 519 | .dependencies = featureSet(&[_]Feature{ | ||
| 520 | .aclass, | ||
| 521 | .crc, | ||
| 522 | .crypto, | ||
| 523 | .db, | ||
| 524 | .dsp, | ||
| 525 | .fp_armv8, | ||
| 526 | .mp, | ||
| 527 | .neon, | ||
| 528 | .trustzone, | ||
| 529 | .v8, | ||
| 530 | .virtualization, | ||
| 531 | }), | ||
| 532 | }; | ||
| 533 | result[@enumToInt(Feature.armv8_m_base)] = .{ | ||
| 534 | .llvm_name = "armv8-m.base", | ||
| 535 | .description = "ARMv8mBaseline architecture", | ||
| 536 | .dependencies = featureSet(&[_]Feature{ | ||
| 537 | .@"8msecext", | ||
| 538 | .acquire_release, | ||
| 539 | .db, | ||
| 540 | .hwdiv, | ||
| 541 | .mclass, | ||
| 542 | .noarm, | ||
| 543 | .strict_align, | ||
| 544 | .thumb_mode, | ||
| 545 | .v7clrex, | ||
| 546 | .v8m, | ||
| 547 | }), | ||
| 548 | }; | ||
| 549 | result[@enumToInt(Feature.armv8_m_main)] = .{ | ||
| 550 | .llvm_name = "armv8-m.main", | ||
| 551 | .description = "ARMv8mMainline architecture", | ||
| 552 | .dependencies = featureSet(&[_]Feature{ | ||
| 553 | .@"8msecext", | ||
| 554 | .acquire_release, | ||
| 555 | .db, | ||
| 556 | .hwdiv, | ||
| 557 | .mclass, | ||
| 558 | .noarm, | ||
| 559 | .thumb_mode, | ||
| 560 | .v8m_main, | ||
| 561 | }), | ||
| 562 | }; | ||
| 563 | result[@enumToInt(Feature.armv8_r)] = .{ | ||
| 564 | .llvm_name = "armv8-r", | ||
| 565 | .description = "ARMv8r architecture", | ||
| 566 | .dependencies = featureSet(&[_]Feature{ | ||
| 567 | .crc, | ||
| 568 | .db, | ||
| 569 | .dfb, | ||
| 570 | .dsp, | ||
| 571 | .fp_armv8, | ||
| 572 | .mp, | ||
| 573 | .neon, | ||
| 574 | .rclass, | ||
| 575 | .v8, | ||
| 576 | .virtualization, | ||
| 577 | }), | ||
| 578 | }; | ||
| 579 | result[@enumToInt(Feature.armv8_1_a)] = .{ | ||
| 580 | .llvm_name = "armv8.1-a", | ||
| 581 | .description = "ARMv81a architecture", | ||
| 582 | .dependencies = featureSet(&[_]Feature{ | ||
| 583 | .aclass, | ||
| 584 | .crc, | ||
| 585 | .crypto, | ||
| 586 | .db, | ||
| 587 | .dsp, | ||
| 588 | .fp_armv8, | ||
| 589 | .mp, | ||
| 590 | .neon, | ||
| 591 | .trustzone, | ||
| 592 | .v8_1a, | ||
| 593 | .virtualization, | ||
| 594 | }), | ||
| 595 | }; | ||
| 596 | result[@enumToInt(Feature.armv8_1_m_main)] = .{ | ||
| 597 | .llvm_name = "armv8.1-m.main", | ||
| 598 | .description = "ARMv81mMainline architecture", | ||
| 599 | .dependencies = featureSet(&[_]Feature{ | ||
| 600 | .@"8msecext", | ||
| 601 | .acquire_release, | ||
| 602 | .db, | ||
| 603 | .hwdiv, | ||
| 604 | .lob, | ||
| 605 | .mclass, | ||
| 606 | .noarm, | ||
| 607 | .ras, | ||
| 608 | .thumb_mode, | ||
| 609 | .v8_1m_main, | ||
| 610 | }), | ||
| 611 | }; | ||
| 612 | result[@enumToInt(Feature.armv8_2_a)] = .{ | ||
| 613 | .llvm_name = "armv8.2-a", | ||
| 614 | .description = "ARMv82a architecture", | ||
| 615 | .dependencies = featureSet(&[_]Feature{ | ||
| 616 | .aclass, | ||
| 617 | .crc, | ||
| 618 | .crypto, | ||
| 619 | .db, | ||
| 620 | .dsp, | ||
| 621 | .fp_armv8, | ||
| 622 | .mp, | ||
| 623 | .neon, | ||
| 624 | .ras, | ||
| 625 | .trustzone, | ||
| 626 | .v8_2a, | ||
| 627 | .virtualization, | ||
| 628 | }), | ||
| 629 | }; | ||
| 630 | result[@enumToInt(Feature.armv8_3_a)] = .{ | ||
| 631 | .llvm_name = "armv8.3-a", | ||
| 632 | .description = "ARMv83a architecture", | ||
| 633 | .dependencies = featureSet(&[_]Feature{ | ||
| 634 | .aclass, | ||
| 635 | .crc, | ||
| 636 | .crypto, | ||
| 637 | .db, | ||
| 638 | .dsp, | ||
| 639 | .fp_armv8, | ||
| 640 | .mp, | ||
| 641 | .neon, | ||
| 642 | .ras, | ||
| 643 | .trustzone, | ||
| 644 | .v8_3a, | ||
| 645 | .virtualization, | ||
| 646 | }), | ||
| 647 | }; | ||
| 648 | result[@enumToInt(Feature.armv8_4_a)] = .{ | ||
| 649 | .llvm_name = "armv8.4-a", | ||
| 650 | .description = "ARMv84a architecture", | ||
| 651 | .dependencies = featureSet(&[_]Feature{ | ||
| 652 | .aclass, | ||
| 653 | .crc, | ||
| 654 | .crypto, | ||
| 655 | .db, | ||
| 656 | .dotprod, | ||
| 657 | .dsp, | ||
| 658 | .fp_armv8, | ||
| 659 | .mp, | ||
| 660 | .neon, | ||
| 661 | .ras, | ||
| 662 | .trustzone, | ||
| 663 | .v8_4a, | ||
| 664 | .virtualization, | ||
| 665 | }), | ||
| 666 | }; | ||
| 667 | result[@enumToInt(Feature.armv8_5_a)] = .{ | ||
| 668 | .llvm_name = "armv8.5-a", | ||
| 669 | .description = "ARMv85a architecture", | ||
| 670 | .dependencies = featureSet(&[_]Feature{ | ||
| 671 | .aclass, | ||
| 672 | .crc, | ||
| 673 | .crypto, | ||
| 674 | .db, | ||
| 675 | .dotprod, | ||
| 676 | .dsp, | ||
| 677 | .fp_armv8, | ||
| 678 | .mp, | ||
| 679 | .neon, | ||
| 680 | .ras, | ||
| 681 | .trustzone, | ||
| 682 | .v8_5a, | ||
| 683 | .virtualization, | ||
| 684 | }), | ||
| 685 | }; | ||
| 686 | result[@enumToInt(Feature.armv8_6_a)] = .{ | ||
| 687 | .llvm_name = "armv8.6-a", | ||
| 688 | .description = "ARMv86a architecture", | ||
| 689 | .dependencies = featureSet(&[_]Feature{ | ||
| 690 | .aclass, | ||
| 691 | .crc, | ||
| 692 | .crypto, | ||
| 693 | .db, | ||
| 694 | .dotprod, | ||
| 695 | .dsp, | ||
| 696 | .fp_armv8, | ||
| 697 | .mp, | ||
| 698 | .neon, | ||
| 699 | .ras, | ||
| 700 | .trustzone, | ||
| 701 | .v8_6a, | ||
| 702 | .virtualization, | ||
| 703 | }), | ||
| 704 | }; | ||
| 220 | result[@enumToInt(Feature.avoid_movs_shop)] = .{ | 705 | result[@enumToInt(Feature.avoid_movs_shop)] = .{ |
| 221 | .llvm_name = "avoid-movs-shop", | 706 | .llvm_name = "avoid-movs-shop", |
| 222 | .description = "Avoid movs instructions with shifter operand", | 707 | .description = "Avoid movs instructions with shifter operand", |
| ... | @@ -302,6 +787,16 @@ pub const all_features = blk: { | ... | @@ -302,6 +787,16 @@ pub const all_features = blk: { |
| 302 | .description = "Disable +1 predication cost for instructions updating CPSR", | 787 | .description = "Disable +1 predication cost for instructions updating CPSR", |
| 303 | .dependencies = featureSet(&[_]Feature{}), | 788 | .dependencies = featureSet(&[_]Feature{}), |
| 304 | }; | 789 | }; |
| 790 | result[@enumToInt(Feature.cortex_a78)] = .{ | ||
| 791 | .llvm_name = "cortex-a78", | ||
| 792 | .description = "Cortex-A78 ARM processors", | ||
| 793 | .dependencies = featureSet(&[_]Feature{}), | ||
| 794 | }; | ||
| 795 | result[@enumToInt(Feature.cortex_x1)] = .{ | ||
| 796 | .llvm_name = "cortex-x1", | ||
| 797 | .description = "Cortex-X1 ARM processors", | ||
| 798 | .dependencies = featureSet(&[_]Feature{}), | ||
| 799 | }; | ||
| 305 | result[@enumToInt(Feature.crc)] = .{ | 800 | result[@enumToInt(Feature.crc)] = .{ |
| 306 | .llvm_name = "crc", | 801 | .llvm_name = "crc", |
| 307 | .description = "Enable support for CRC instructions", | 802 | .description = "Enable support for CRC instructions", |
| ... | @@ -386,25 +881,6 @@ pub const all_features = blk: { | ... | @@ -386,25 +881,6 @@ pub const all_features = blk: { |
| 386 | .zcz, | 881 | .zcz, |
| 387 | }), | 882 | }), |
| 388 | }; | 883 | }; |
| 389 | result[@enumToInt(Feature.fp16)] = .{ | ||
| 390 | .llvm_name = "fp16", | ||
| 391 | .description = "Enable half-precision floating point", | ||
| 392 | .dependencies = featureSet(&[_]Feature{}), | ||
| 393 | }; | ||
| 394 | result[@enumToInt(Feature.fp16fml)] = .{ | ||
| 395 | .llvm_name = "fp16fml", | ||
| 396 | .description = "Enable full half-precision floating point fml instructions", | ||
| 397 | .dependencies = featureSet(&[_]Feature{ | ||
| 398 | .fullfp16, | ||
| 399 | }), | ||
| 400 | }; | ||
| 401 | result[@enumToInt(Feature.fp64)] = .{ | ||
| 402 | .llvm_name = "fp64", | ||
| 403 | .description = "Floating point unit supports double precision", | ||
| 404 | .dependencies = featureSet(&[_]Feature{ | ||
| 405 | .fpregs64, | ||
| 406 | }), | ||
| 407 | }; | ||
| 408 | result[@enumToInt(Feature.fp_armv8)] = .{ | 884 | result[@enumToInt(Feature.fp_armv8)] = .{ |
| 409 | .llvm_name = "fp-armv8", | 885 | .llvm_name = "fp-armv8", |
| 410 | .description = "Enable ARMv8 FP", | 886 | .description = "Enable ARMv8 FP", |
| ... | @@ -439,186 +915,67 @@ pub const all_features = blk: { | ... | @@ -439,186 +915,67 @@ pub const all_features = blk: { |
| 439 | .vfp4sp, | 915 | .vfp4sp, |
| 440 | }), | 916 | }), |
| 441 | }; | 917 | }; |
| 442 | result[@enumToInt(Feature.fpao)] = .{ | 918 | result[@enumToInt(Feature.fp16)] = .{ |
| 443 | .llvm_name = "fpao", | 919 | .llvm_name = "fp16", |
| 444 | .description = "Enable fast computation of positive address offsets", | 920 | .description = "Enable half-precision floating point", |
| 445 | .dependencies = featureSet(&[_]Feature{}), | ||
| 446 | }; | ||
| 447 | result[@enumToInt(Feature.fpregs)] = .{ | ||
| 448 | .llvm_name = "fpregs", | ||
| 449 | .description = "Enable FP registers", | ||
| 450 | .dependencies = featureSet(&[_]Feature{}), | ||
| 451 | }; | ||
| 452 | result[@enumToInt(Feature.fpregs16)] = .{ | ||
| 453 | .llvm_name = "fpregs16", | ||
| 454 | .description = "Enable 16-bit FP registers", | ||
| 455 | .dependencies = featureSet(&[_]Feature{ | ||
| 456 | .fpregs, | ||
| 457 | }), | ||
| 458 | }; | ||
| 459 | result[@enumToInt(Feature.fpregs64)] = .{ | ||
| 460 | .llvm_name = "fpregs64", | ||
| 461 | .description = "Enable 64-bit FP registers", | ||
| 462 | .dependencies = featureSet(&[_]Feature{ | ||
| 463 | .fpregs, | ||
| 464 | }), | ||
| 465 | }; | ||
| 466 | result[@enumToInt(Feature.fullfp16)] = .{ | ||
| 467 | .llvm_name = "fullfp16", | ||
| 468 | .description = "Enable full half-precision floating point", | ||
| 469 | .dependencies = featureSet(&[_]Feature{ | ||
| 470 | .fp_armv8d16sp, | ||
| 471 | .fpregs16, | ||
| 472 | }), | ||
| 473 | }; | ||
| 474 | result[@enumToInt(Feature.fuse_aes)] = .{ | ||
| 475 | .llvm_name = "fuse-aes", | ||
| 476 | .description = "CPU fuses AES crypto operations", | ||
| 477 | .dependencies = featureSet(&[_]Feature{}), | ||
| 478 | }; | ||
| 479 | result[@enumToInt(Feature.fuse_literals)] = .{ | ||
| 480 | .llvm_name = "fuse-literals", | ||
| 481 | .description = "CPU fuses literal generation operations", | ||
| 482 | .dependencies = featureSet(&[_]Feature{}), | ||
| 483 | }; | ||
| 484 | result[@enumToInt(Feature.has_v4t)] = .{ | ||
| 485 | .llvm_name = "v4t", | ||
| 486 | .description = "Support ARM v4T instructions", | ||
| 487 | .dependencies = featureSet(&[_]Feature{}), | ||
| 488 | }; | ||
| 489 | result[@enumToInt(Feature.has_v5t)] = .{ | ||
| 490 | .llvm_name = "v5t", | ||
| 491 | .description = "Support ARM v5T instructions", | ||
| 492 | .dependencies = featureSet(&[_]Feature{ | ||
| 493 | .has_v4t, | ||
| 494 | }), | ||
| 495 | }; | ||
| 496 | result[@enumToInt(Feature.has_v5te)] = .{ | ||
| 497 | .llvm_name = "v5te", | ||
| 498 | .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", | ||
| 499 | .dependencies = featureSet(&[_]Feature{ | ||
| 500 | .has_v5t, | ||
| 501 | }), | ||
| 502 | }; | ||
| 503 | result[@enumToInt(Feature.has_v6)] = .{ | ||
| 504 | .llvm_name = "v6", | ||
| 505 | .description = "Support ARM v6 instructions", | ||
| 506 | .dependencies = featureSet(&[_]Feature{ | ||
| 507 | .has_v5te, | ||
| 508 | }), | ||
| 509 | }; | ||
| 510 | result[@enumToInt(Feature.has_v6k)] = .{ | ||
| 511 | .llvm_name = "v6k", | ||
| 512 | .description = "Support ARM v6k instructions", | ||
| 513 | .dependencies = featureSet(&[_]Feature{ | ||
| 514 | .has_v6, | ||
| 515 | }), | ||
| 516 | }; | ||
| 517 | result[@enumToInt(Feature.has_v6m)] = .{ | ||
| 518 | .llvm_name = "v6m", | ||
| 519 | .description = "Support ARM v6M instructions", | ||
| 520 | .dependencies = featureSet(&[_]Feature{ | ||
| 521 | .has_v6, | ||
| 522 | }), | ||
| 523 | }; | ||
| 524 | result[@enumToInt(Feature.has_v6t2)] = .{ | ||
| 525 | .llvm_name = "v6t2", | ||
| 526 | .description = "Support ARM v6t2 instructions", | ||
| 527 | .dependencies = featureSet(&[_]Feature{ | ||
| 528 | .thumb2, | ||
| 529 | .has_v6k, | ||
| 530 | .has_v8m, | ||
| 531 | }), | ||
| 532 | }; | ||
| 533 | result[@enumToInt(Feature.has_v7)] = .{ | ||
| 534 | .llvm_name = "v7", | ||
| 535 | .description = "Support ARM v7 instructions", | ||
| 536 | .dependencies = featureSet(&[_]Feature{ | ||
| 537 | .perfmon, | ||
| 538 | .has_v6t2, | ||
| 539 | .has_v7clrex, | ||
| 540 | }), | ||
| 541 | }; | ||
| 542 | result[@enumToInt(Feature.has_v7clrex)] = .{ | ||
| 543 | .llvm_name = "v7clrex", | ||
| 544 | .description = "Has v7 clrex instruction", | ||
| 545 | .dependencies = featureSet(&[_]Feature{}), | 921 | .dependencies = featureSet(&[_]Feature{}), |
| 546 | }; | 922 | }; |
| 547 | result[@enumToInt(Feature.has_v8)] = .{ | 923 | result[@enumToInt(Feature.fp16fml)] = .{ |
| 548 | .llvm_name = "v8", | 924 | .llvm_name = "fp16fml", |
| 549 | .description = "Support ARM v8 instructions", | 925 | .description = "Enable full half-precision floating point fml instructions", |
| 550 | .dependencies = featureSet(&[_]Feature{ | ||
| 551 | .acquire_release, | ||
| 552 | .has_v7, | ||
| 553 | }), | ||
| 554 | }; | ||
| 555 | result[@enumToInt(Feature.has_v8_1a)] = .{ | ||
| 556 | .llvm_name = "v8.1a", | ||
| 557 | .description = "Support ARM v8.1a instructions", | ||
| 558 | .dependencies = featureSet(&[_]Feature{ | ||
| 559 | .has_v8, | ||
| 560 | }), | ||
| 561 | }; | ||
| 562 | result[@enumToInt(Feature.has_v8_1m_main)] = .{ | ||
| 563 | .llvm_name = "v8.1m.main", | ||
| 564 | .description = "Support ARM v8-1M Mainline instructions", | ||
| 565 | .dependencies = featureSet(&[_]Feature{ | ||
| 566 | .has_v8m_main, | ||
| 567 | }), | ||
| 568 | }; | ||
| 569 | result[@enumToInt(Feature.has_v8_2a)] = .{ | ||
| 570 | .llvm_name = "v8.2a", | ||
| 571 | .description = "Support ARM v8.2a instructions", | ||
| 572 | .dependencies = featureSet(&[_]Feature{ | 926 | .dependencies = featureSet(&[_]Feature{ |
| 573 | .has_v8_1a, | 927 | .fullfp16, |
| 574 | }), | 928 | }), |
| 575 | }; | 929 | }; |
| 576 | result[@enumToInt(Feature.has_v8_3a)] = .{ | 930 | result[@enumToInt(Feature.fp64)] = .{ |
| 577 | .llvm_name = "v8.3a", | 931 | .llvm_name = "fp64", |
| 578 | .description = "Support ARM v8.3a instructions", | 932 | .description = "Floating point unit supports double precision", |
| 579 | .dependencies = featureSet(&[_]Feature{ | 933 | .dependencies = featureSet(&[_]Feature{ |
| 580 | .has_v8_2a, | 934 | .fpregs64, |
| 581 | }), | 935 | }), |
| 582 | }; | 936 | }; |
| 583 | result[@enumToInt(Feature.has_v8_4a)] = .{ | 937 | result[@enumToInt(Feature.fpao)] = .{ |
| 584 | .llvm_name = "v8.4a", | 938 | .llvm_name = "fpao", |
| 585 | .description = "Support ARM v8.4a instructions", | 939 | .description = "Enable fast computation of positive address offsets", |
| 586 | .dependencies = featureSet(&[_]Feature{ | 940 | .dependencies = featureSet(&[_]Feature{}), |
| 587 | .dotprod, | ||
| 588 | .has_v8_3a, | ||
| 589 | }), | ||
| 590 | }; | 941 | }; |
| 591 | result[@enumToInt(Feature.has_v8_5a)] = .{ | 942 | result[@enumToInt(Feature.fpregs)] = .{ |
| 592 | .llvm_name = "v8.5a", | 943 | .llvm_name = "fpregs", |
| 593 | .description = "Support ARM v8.5a instructions", | 944 | .description = "Enable FP registers", |
| 594 | .dependencies = featureSet(&[_]Feature{ | 945 | .dependencies = featureSet(&[_]Feature{}), |
| 595 | .sb, | ||
| 596 | .has_v8_4a, | ||
| 597 | }), | ||
| 598 | }; | 946 | }; |
| 599 | result[@enumToInt(Feature.has_v8_6a)] = .{ | 947 | result[@enumToInt(Feature.fpregs16)] = .{ |
| 600 | .llvm_name = "v8.6a", | 948 | .llvm_name = "fpregs16", |
| 601 | .description = "Support ARM v8.6a instructions", | 949 | .description = "Enable 16-bit FP registers", |
| 602 | .dependencies = featureSet(&[_]Feature{ | 950 | .dependencies = featureSet(&[_]Feature{ |
| 603 | .bf16, | 951 | .fpregs, |
| 604 | .i8mm, | ||
| 605 | .has_v8_5a, | ||
| 606 | }), | 952 | }), |
| 607 | }; | 953 | }; |
| 608 | result[@enumToInt(Feature.has_v8m)] = .{ | 954 | result[@enumToInt(Feature.fpregs64)] = .{ |
| 609 | .llvm_name = "v8m", | 955 | .llvm_name = "fpregs64", |
| 610 | .description = "Support ARM v8M Baseline instructions", | 956 | .description = "Enable 64-bit FP registers", |
| 611 | .dependencies = featureSet(&[_]Feature{ | 957 | .dependencies = featureSet(&[_]Feature{ |
| 612 | .has_v6m, | 958 | .fpregs, |
| 613 | }), | 959 | }), |
| 614 | }; | 960 | }; |
| 615 | result[@enumToInt(Feature.has_v8m_main)] = .{ | 961 | result[@enumToInt(Feature.fullfp16)] = .{ |
| 616 | .llvm_name = "v8m.main", | 962 | .llvm_name = "fullfp16", |
| 617 | .description = "Support ARM v8M Mainline instructions", | 963 | .description = "Enable full half-precision floating point", |
| 618 | .dependencies = featureSet(&[_]Feature{ | 964 | .dependencies = featureSet(&[_]Feature{ |
| 619 | .has_v7, | 965 | .fp_armv8d16sp, |
| 966 | .fpregs16, | ||
| 620 | }), | 967 | }), |
| 621 | }; | 968 | }; |
| 969 | result[@enumToInt(Feature.fuse_aes)] = .{ | ||
| 970 | .llvm_name = "fuse-aes", | ||
| 971 | .description = "CPU fuses AES crypto operations", | ||
| 972 | .dependencies = featureSet(&[_]Feature{}), | ||
| 973 | }; | ||
| 974 | result[@enumToInt(Feature.fuse_literals)] = .{ | ||
| 975 | .llvm_name = "fuse-literals", | ||
| 976 | .description = "CPU fuses literal generation operations", | ||
| 977 | .dependencies = featureSet(&[_]Feature{}), | ||
| 978 | }; | ||
| 622 | result[@enumToInt(Feature.hwdiv)] = .{ | 979 | result[@enumToInt(Feature.hwdiv)] = .{ |
| 623 | .llvm_name = "hwdiv", | 980 | .llvm_name = "hwdiv", |
| 624 | .description = "Enable divide instructions in Thumb", | 981 | .description = "Enable divide instructions in Thumb", |
| ... | @@ -629,7 +986,7 @@ pub const all_features = blk: { | ... | @@ -629,7 +986,7 @@ pub const all_features = blk: { |
| 629 | .description = "Enable divide instructions in ARM mode", | 986 | .description = "Enable divide instructions in ARM mode", |
| 630 | .dependencies = featureSet(&[_]Feature{}), | 987 | .dependencies = featureSet(&[_]Feature{}), |
| 631 | }; | 988 | }; |
| 632 | result[@enumToInt(Feature.i8mm)] = .{ | 989 | result[@enumToInt(Feature._i8mm)] = .{ |
| 633 | .llvm_name = "i8mm", | 990 | .llvm_name = "i8mm", |
| 634 | .description = "Enable Matrix Multiply Int8 Extension", | 991 | .description = "Enable Matrix Multiply Int8 Extension", |
| 635 | .dependencies = featureSet(&[_]Feature{ | 992 | .dependencies = featureSet(&[_]Feature{ |
| ... | @@ -640,16 +997,26 @@ pub const all_features = blk: { | ... | @@ -640,16 +997,26 @@ pub const all_features = blk: { |
| 640 | .llvm_name = "iwmmxt", | 997 | .llvm_name = "iwmmxt", |
| 641 | .description = "ARMv5te architecture", | 998 | .description = "ARMv5te architecture", |
| 642 | .dependencies = featureSet(&[_]Feature{ | 999 | .dependencies = featureSet(&[_]Feature{ |
| 643 | .has_v5te, | 1000 | .armv5te, |
| 644 | }), | 1001 | }), |
| 645 | }; | 1002 | }; |
| 646 | result[@enumToInt(Feature.iwmmxt2)] = .{ | 1003 | result[@enumToInt(Feature.iwmmxt2)] = .{ |
| 647 | .llvm_name = "iwmmxt2", | 1004 | .llvm_name = "iwmmxt2", |
| 648 | .description = "ARMv5te architecture", | 1005 | .description = "ARMv5te architecture", |
| 649 | .dependencies = featureSet(&[_]Feature{ | 1006 | .dependencies = featureSet(&[_]Feature{ |
| 650 | .has_v5te, | 1007 | .armv5te, |
| 651 | }), | 1008 | }), |
| 652 | }; | 1009 | }; |
| 1010 | result[@enumToInt(Feature.krait)] = .{ | ||
| 1011 | .llvm_name = "krait", | ||
| 1012 | .description = "Qualcomm Krait processors", | ||
| 1013 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1014 | }; | ||
| 1015 | result[@enumToInt(Feature.kryo)] = .{ | ||
| 1016 | .llvm_name = "kryo", | ||
| 1017 | .description = "Qualcomm Kryo processors", | ||
| 1018 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1019 | }; | ||
| 653 | result[@enumToInt(Feature.lob)] = .{ | 1020 | result[@enumToInt(Feature.lob)] = .{ |
| 654 | .llvm_name = "lob", | 1021 | .llvm_name = "lob", |
| 655 | .description = "Enable Low Overhead Branch extensions", | 1022 | .description = "Enable Low Overhead Branch extensions", |
| ... | @@ -692,7 +1059,7 @@ pub const all_features = blk: { | ... | @@ -692,7 +1059,7 @@ pub const all_features = blk: { |
| 692 | .dsp, | 1059 | .dsp, |
| 693 | .fpregs16, | 1060 | .fpregs16, |
| 694 | .fpregs64, | 1061 | .fpregs64, |
| 695 | .has_v8_1m_main, | 1062 | .v8_1m_main, |
| 696 | }), | 1063 | }), |
| 697 | }; | 1064 | }; |
| 698 | result[@enumToInt(Feature.mve_fp)] = .{ | 1065 | result[@enumToInt(Feature.mve_fp)] = .{ |
| ... | @@ -741,6 +1108,11 @@ pub const all_features = blk: { | ... | @@ -741,6 +1108,11 @@ pub const all_features = blk: { |
| 741 | .description = "Use NEON for single precision FP", | 1108 | .description = "Use NEON for single precision FP", |
| 742 | .dependencies = featureSet(&[_]Feature{}), | 1109 | .dependencies = featureSet(&[_]Feature{}), |
| 743 | }; | 1110 | }; |
| 1111 | result[@enumToInt(Feature.neoverse_v1)] = .{ | ||
| 1112 | .llvm_name = "neoverse-v1", | ||
| 1113 | .description = "Neoverse-V1 ARM processors", | ||
| 1114 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1115 | }; | ||
| 744 | result[@enumToInt(Feature.no_branch_predictor)] = .{ | 1116 | result[@enumToInt(Feature.no_branch_predictor)] = .{ |
| 745 | .llvm_name = "no-branch-predictor", | 1117 | .llvm_name = "no-branch-predictor", |
| 746 | .description = "Has no branch predictor", | 1118 | .description = "Has no branch predictor", |
| ... | @@ -791,6 +1163,21 @@ pub const all_features = blk: { | ... | @@ -791,6 +1163,21 @@ pub const all_features = blk: { |
| 791 | .description = "Cortex-R4 ARM processors", | 1163 | .description = "Cortex-R4 ARM processors", |
| 792 | .dependencies = featureSet(&[_]Feature{}), | 1164 | .dependencies = featureSet(&[_]Feature{}), |
| 793 | }; | 1165 | }; |
| 1166 | result[@enumToInt(Feature.r5)] = .{ | ||
| 1167 | .llvm_name = "r5", | ||
| 1168 | .description = "Cortex-R5 ARM processors", | ||
| 1169 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1170 | }; | ||
| 1171 | result[@enumToInt(Feature.r52)] = .{ | ||
| 1172 | .llvm_name = "r52", | ||
| 1173 | .description = "Cortex-R52 ARM processors", | ||
| 1174 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1175 | }; | ||
| 1176 | result[@enumToInt(Feature.r7)] = .{ | ||
| 1177 | .llvm_name = "r7", | ||
| 1178 | .description = "Cortex-R7 ARM processors", | ||
| 1179 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1180 | }; | ||
| 794 | result[@enumToInt(Feature.ras)] = .{ | 1181 | result[@enumToInt(Feature.ras)] = .{ |
| 795 | .llvm_name = "ras", | 1182 | .llvm_name = "ras", |
| 796 | .description = "Enable Reliability, Availability and Serviceability extensions", | 1183 | .description = "Enable Reliability, Availability and Serviceability extensions", |
| ... | @@ -885,16 +1272,16 @@ pub const all_features = blk: { | ... | @@ -885,16 +1272,16 @@ pub const all_features = blk: { |
| 885 | .description = "Swift ARM processors", | 1272 | .description = "Swift ARM processors", |
| 886 | .dependencies = featureSet(&[_]Feature{}), | 1273 | .dependencies = featureSet(&[_]Feature{}), |
| 887 | }; | 1274 | }; |
| 888 | result[@enumToInt(Feature.thumb2)] = .{ | ||
| 889 | .llvm_name = "thumb2", | ||
| 890 | .description = "Enable Thumb2 instructions", | ||
| 891 | .dependencies = featureSet(&[_]Feature{}), | ||
| 892 | }; | ||
| 893 | result[@enumToInt(Feature.thumb_mode)] = .{ | 1275 | result[@enumToInt(Feature.thumb_mode)] = .{ |
| 894 | .llvm_name = "thumb-mode", | 1276 | .llvm_name = "thumb-mode", |
| 895 | .description = "Thumb mode", | 1277 | .description = "Thumb mode", |
| 896 | .dependencies = featureSet(&[_]Feature{}), | 1278 | .dependencies = featureSet(&[_]Feature{}), |
| 897 | }; | 1279 | }; |
| 1280 | result[@enumToInt(Feature.thumb2)] = .{ | ||
| 1281 | .llvm_name = "thumb2", | ||
| 1282 | .description = "Enable Thumb2 instructions", | ||
| 1283 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1284 | }; | ||
| 898 | result[@enumToInt(Feature.trustzone)] = .{ | 1285 | result[@enumToInt(Feature.trustzone)] = .{ |
| 899 | .llvm_name = "trustzone", | 1286 | .llvm_name = "trustzone", |
| 900 | .description = "Enable support for TrustZone security extensions", | 1287 | .description = "Enable support for TrustZone security extensions", |
| ... | @@ -905,399 +1292,142 @@ pub const all_features = blk: { | ... | @@ -905,399 +1292,142 @@ pub const all_features = blk: { |
| 905 | .description = "Use the MachineScheduler", | 1292 | .description = "Use the MachineScheduler", |
| 906 | .dependencies = featureSet(&[_]Feature{}), | 1293 | .dependencies = featureSet(&[_]Feature{}), |
| 907 | }; | 1294 | }; |
| 908 | result[@enumToInt(Feature.v2)] = .{ | ||
| 909 | .llvm_name = "armv2", | ||
| 910 | .description = "ARMv2 architecture", | ||
| 911 | .dependencies = featureSet(&[_]Feature{ | ||
| 912 | .strict_align, | ||
| 913 | }), | ||
| 914 | }; | ||
| 915 | result[@enumToInt(Feature.v2a)] = .{ | ||
| 916 | .llvm_name = "armv2a", | ||
| 917 | .description = "ARMv2a architecture", | ||
| 918 | .dependencies = featureSet(&[_]Feature{ | ||
| 919 | .strict_align, | ||
| 920 | }), | ||
| 921 | }; | ||
| 922 | result[@enumToInt(Feature.v3)] = .{ | ||
| 923 | .llvm_name = "armv3", | ||
| 924 | .description = "ARMv3 architecture", | ||
| 925 | .dependencies = featureSet(&[_]Feature{ | ||
| 926 | .strict_align, | ||
| 927 | }), | ||
| 928 | }; | ||
| 929 | result[@enumToInt(Feature.v3m)] = .{ | ||
| 930 | .llvm_name = "armv3m", | ||
| 931 | .description = "ARMv3m architecture", | ||
| 932 | .dependencies = featureSet(&[_]Feature{ | ||
| 933 | .strict_align, | ||
| 934 | }), | ||
| 935 | }; | ||
| 936 | result[@enumToInt(Feature.v4)] = .{ | ||
| 937 | .llvm_name = "armv4", | ||
| 938 | .description = "ARMv4 architecture", | ||
| 939 | .dependencies = featureSet(&[_]Feature{ | ||
| 940 | .strict_align, | ||
| 941 | }), | ||
| 942 | }; | ||
| 943 | result[@enumToInt(Feature.v4t)] = .{ | 1295 | result[@enumToInt(Feature.v4t)] = .{ |
| 944 | .llvm_name = "armv4t", | 1296 | .llvm_name = "v4t", |
| 945 | .description = "ARMv4t architecture", | 1297 | .description = "Support ARM v4T instructions", |
| 946 | .dependencies = featureSet(&[_]Feature{ | 1298 | .dependencies = featureSet(&[_]Feature{}), |
| 947 | .strict_align, | ||
| 948 | .has_v4t, | ||
| 949 | }), | ||
| 950 | }; | 1299 | }; |
| 951 | result[@enumToInt(Feature.v5t)] = .{ | 1300 | result[@enumToInt(Feature.v5t)] = .{ |
| 952 | .llvm_name = "armv5t", | 1301 | .llvm_name = "v5t", |
| 953 | .description = "ARMv5t architecture", | 1302 | .description = "Support ARM v5T instructions", |
| 954 | .dependencies = featureSet(&[_]Feature{ | 1303 | .dependencies = featureSet(&[_]Feature{ |
| 955 | .strict_align, | 1304 | .v4t, |
| 956 | .has_v5t, | ||
| 957 | }), | 1305 | }), |
| 958 | }; | 1306 | }; |
| 959 | result[@enumToInt(Feature.v5te)] = .{ | 1307 | result[@enumToInt(Feature.v5te)] = .{ |
| 960 | .llvm_name = "armv5te", | 1308 | .llvm_name = "v5te", |
| 961 | .description = "ARMv5te architecture", | 1309 | .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", |
| 962 | .dependencies = featureSet(&[_]Feature{ | ||
| 963 | .strict_align, | ||
| 964 | .has_v5te, | ||
| 965 | }), | ||
| 966 | }; | ||
| 967 | result[@enumToInt(Feature.v5tej)] = .{ | ||
| 968 | .llvm_name = "armv5tej", | ||
| 969 | .description = "ARMv5tej architecture", | ||
| 970 | .dependencies = featureSet(&[_]Feature{ | 1310 | .dependencies = featureSet(&[_]Feature{ |
| 971 | .strict_align, | 1311 | .v5t, |
| 972 | .has_v5te, | ||
| 973 | }), | 1312 | }), |
| 974 | }; | 1313 | }; |
| 975 | result[@enumToInt(Feature.v6)] = .{ | 1314 | result[@enumToInt(Feature.v6)] = .{ |
| 976 | .llvm_name = "armv6", | 1315 | .llvm_name = "v6", |
| 977 | .description = "ARMv6 architecture", | 1316 | .description = "Support ARM v6 instructions", |
| 978 | .dependencies = featureSet(&[_]Feature{ | ||
| 979 | .dsp, | ||
| 980 | .has_v6, | ||
| 981 | }), | ||
| 982 | }; | ||
| 983 | result[@enumToInt(Feature.v6m)] = .{ | ||
| 984 | .llvm_name = "armv6-m", | ||
| 985 | .description = "ARMv6m architecture", | ||
| 986 | .dependencies = featureSet(&[_]Feature{ | ||
| 987 | .db, | ||
| 988 | .mclass, | ||
| 989 | .noarm, | ||
| 990 | .strict_align, | ||
| 991 | .thumb_mode, | ||
| 992 | .has_v6m, | ||
| 993 | }), | ||
| 994 | }; | ||
| 995 | result[@enumToInt(Feature.v6j)] = .{ | ||
| 996 | .llvm_name = "armv6j", | ||
| 997 | .description = "ARMv7a architecture", | ||
| 998 | .dependencies = featureSet(&[_]Feature{ | 1317 | .dependencies = featureSet(&[_]Feature{ |
| 999 | .v6, | 1318 | .v5te, |
| 1000 | }), | 1319 | }), |
| 1001 | }; | 1320 | }; |
| 1002 | result[@enumToInt(Feature.v6k)] = .{ | 1321 | result[@enumToInt(Feature.v6k)] = .{ |
| 1003 | .llvm_name = "armv6k", | 1322 | .llvm_name = "v6k", |
| 1004 | .description = "ARMv6k architecture", | 1323 | .description = "Support ARM v6k instructions", |
| 1005 | .dependencies = featureSet(&[_]Feature{ | ||
| 1006 | .has_v6k, | ||
| 1007 | }), | ||
| 1008 | }; | ||
| 1009 | result[@enumToInt(Feature.v6kz)] = .{ | ||
| 1010 | .llvm_name = "armv6kz", | ||
| 1011 | .description = "ARMv6kz architecture", | ||
| 1012 | .dependencies = featureSet(&[_]Feature{ | ||
| 1013 | .trustzone, | ||
| 1014 | .has_v6k, | ||
| 1015 | }), | ||
| 1016 | }; | ||
| 1017 | result[@enumToInt(Feature.v6sm)] = .{ | ||
| 1018 | .llvm_name = "armv6s-m", | ||
| 1019 | .description = "ARMv6sm architecture", | ||
| 1020 | .dependencies = featureSet(&[_]Feature{ | ||
| 1021 | .db, | ||
| 1022 | .mclass, | ||
| 1023 | .noarm, | ||
| 1024 | .strict_align, | ||
| 1025 | .thumb_mode, | ||
| 1026 | .has_v6m, | ||
| 1027 | }), | ||
| 1028 | }; | ||
| 1029 | result[@enumToInt(Feature.v6t2)] = .{ | ||
| 1030 | .llvm_name = "armv6t2", | ||
| 1031 | .description = "ARMv6t2 architecture", | ||
| 1032 | .dependencies = featureSet(&[_]Feature{ | ||
| 1033 | .dsp, | ||
| 1034 | .has_v6t2, | ||
| 1035 | }), | ||
| 1036 | }; | ||
| 1037 | result[@enumToInt(Feature.v7a)] = .{ | ||
| 1038 | .llvm_name = "armv7-a", | ||
| 1039 | .description = "ARMv7a architecture", | ||
| 1040 | .dependencies = featureSet(&[_]Feature{ | ||
| 1041 | .aclass, | ||
| 1042 | .db, | ||
| 1043 | .dsp, | ||
| 1044 | .neon, | ||
| 1045 | .has_v7, | ||
| 1046 | }), | ||
| 1047 | }; | ||
| 1048 | result[@enumToInt(Feature.v7m)] = .{ | ||
| 1049 | .llvm_name = "armv7-m", | ||
| 1050 | .description = "ARMv7m architecture", | ||
| 1051 | .dependencies = featureSet(&[_]Feature{ | ||
| 1052 | .db, | ||
| 1053 | .hwdiv, | ||
| 1054 | .mclass, | ||
| 1055 | .noarm, | ||
| 1056 | .thumb_mode, | ||
| 1057 | .thumb2, | ||
| 1058 | .has_v7, | ||
| 1059 | }), | ||
| 1060 | }; | ||
| 1061 | result[@enumToInt(Feature.v7r)] = .{ | ||
| 1062 | .llvm_name = "armv7-r", | ||
| 1063 | .description = "ARMv7r architecture", | ||
| 1064 | .dependencies = featureSet(&[_]Feature{ | ||
| 1065 | .db, | ||
| 1066 | .dsp, | ||
| 1067 | .hwdiv, | ||
| 1068 | .rclass, | ||
| 1069 | .has_v7, | ||
| 1070 | }), | ||
| 1071 | }; | ||
| 1072 | result[@enumToInt(Feature.v7em)] = .{ | ||
| 1073 | .llvm_name = "armv7e-m", | ||
| 1074 | .description = "ARMv7em architecture", | ||
| 1075 | .dependencies = featureSet(&[_]Feature{ | ||
| 1076 | .db, | ||
| 1077 | .dsp, | ||
| 1078 | .hwdiv, | ||
| 1079 | .mclass, | ||
| 1080 | .noarm, | ||
| 1081 | .thumb_mode, | ||
| 1082 | .thumb2, | ||
| 1083 | .has_v7, | ||
| 1084 | }), | ||
| 1085 | }; | ||
| 1086 | result[@enumToInt(Feature.v7k)] = .{ | ||
| 1087 | .llvm_name = "armv7k", | ||
| 1088 | .description = "ARMv7a architecture", | ||
| 1089 | .dependencies = featureSet(&[_]Feature{ | ||
| 1090 | .v7a, | ||
| 1091 | }), | ||
| 1092 | }; | ||
| 1093 | result[@enumToInt(Feature.v7s)] = .{ | ||
| 1094 | .llvm_name = "armv7s", | ||
| 1095 | .description = "ARMv7a architecture", | ||
| 1096 | .dependencies = featureSet(&[_]Feature{ | ||
| 1097 | .v7a, | ||
| 1098 | }), | ||
| 1099 | }; | ||
| 1100 | result[@enumToInt(Feature.v7ve)] = .{ | ||
| 1101 | .llvm_name = "armv7ve", | ||
| 1102 | .description = "ARMv7ve architecture", | ||
| 1103 | .dependencies = featureSet(&[_]Feature{ | 1324 | .dependencies = featureSet(&[_]Feature{ |
| 1104 | .aclass, | 1325 | .v6, |
| 1105 | .db, | ||
| 1106 | .dsp, | ||
| 1107 | .mp, | ||
| 1108 | .neon, | ||
| 1109 | .trustzone, | ||
| 1110 | .has_v7, | ||
| 1111 | .virtualization, | ||
| 1112 | }), | 1326 | }), |
| 1113 | }; | 1327 | }; |
| 1114 | result[@enumToInt(Feature.v8a)] = .{ | 1328 | result[@enumToInt(Feature.v6m)] = .{ |
| 1115 | .llvm_name = "armv8-a", | 1329 | .llvm_name = "v6m", |
| 1116 | .description = "ARMv8a architecture", | 1330 | .description = "Support ARM v6M instructions", |
| 1117 | .dependencies = featureSet(&[_]Feature{ | 1331 | .dependencies = featureSet(&[_]Feature{ |
| 1118 | .aclass, | 1332 | .v6, |
| 1119 | .crc, | ||
| 1120 | .crypto, | ||
| 1121 | .db, | ||
| 1122 | .dsp, | ||
| 1123 | .fp_armv8, | ||
| 1124 | .mp, | ||
| 1125 | .neon, | ||
| 1126 | .trustzone, | ||
| 1127 | .has_v8, | ||
| 1128 | .virtualization, | ||
| 1129 | }), | 1333 | }), |
| 1130 | }; | 1334 | }; |
| 1131 | result[@enumToInt(Feature.v8m)] = .{ | 1335 | result[@enumToInt(Feature.v6t2)] = .{ |
| 1132 | .llvm_name = "armv8-m.base", | 1336 | .llvm_name = "v6t2", |
| 1133 | .description = "ARMv8mBaseline architecture", | 1337 | .description = "Support ARM v6t2 instructions", |
| 1134 | .dependencies = featureSet(&[_]Feature{ | 1338 | .dependencies = featureSet(&[_]Feature{ |
| 1135 | .@"8msecext", | 1339 | .thumb2, |
| 1136 | .acquire_release, | 1340 | .v6k, |
| 1137 | .db, | 1341 | .v8m, |
| 1138 | .hwdiv, | ||
| 1139 | .mclass, | ||
| 1140 | .noarm, | ||
| 1141 | .strict_align, | ||
| 1142 | .thumb_mode, | ||
| 1143 | .has_v7clrex, | ||
| 1144 | .has_v8m, | ||
| 1145 | }), | 1342 | }), |
| 1146 | }; | 1343 | }; |
| 1147 | result[@enumToInt(Feature.v8m_main)] = .{ | 1344 | result[@enumToInt(Feature.v7)] = .{ |
| 1148 | .llvm_name = "armv8-m.main", | 1345 | .llvm_name = "v7", |
| 1149 | .description = "ARMv8mMainline architecture", | 1346 | .description = "Support ARM v7 instructions", |
| 1150 | .dependencies = featureSet(&[_]Feature{ | 1347 | .dependencies = featureSet(&[_]Feature{ |
| 1151 | .@"8msecext", | 1348 | .perfmon, |
| 1152 | .acquire_release, | 1349 | .v6t2, |
| 1153 | .db, | 1350 | .v7clrex, |
| 1154 | .hwdiv, | ||
| 1155 | .mclass, | ||
| 1156 | .noarm, | ||
| 1157 | .thumb_mode, | ||
| 1158 | .has_v8m_main, | ||
| 1159 | }), | 1351 | }), |
| 1160 | }; | 1352 | }; |
| 1161 | result[@enumToInt(Feature.v8r)] = .{ | 1353 | result[@enumToInt(Feature.v7clrex)] = .{ |
| 1162 | .llvm_name = "armv8-r", | 1354 | .llvm_name = "v7clrex", |
| 1163 | .description = "ARMv8r architecture", | 1355 | .description = "Has v7 clrex instruction", |
| 1356 | .dependencies = featureSet(&[_]Feature{}), | ||
| 1357 | }; | ||
| 1358 | result[@enumToInt(Feature.v8)] = .{ | ||
| 1359 | .llvm_name = "v8", | ||
| 1360 | .description = "Support ARM v8 instructions", | ||
| 1164 | .dependencies = featureSet(&[_]Feature{ | 1361 | .dependencies = featureSet(&[_]Feature{ |
| 1165 | .crc, | 1362 | .acquire_release, |
| 1166 | .db, | 1363 | .v7, |
| 1167 | .dfb, | ||
| 1168 | .dsp, | ||
| 1169 | .fp_armv8, | ||
| 1170 | .mp, | ||
| 1171 | .neon, | ||
| 1172 | .rclass, | ||
| 1173 | .has_v8, | ||
| 1174 | .virtualization, | ||
| 1175 | }), | 1364 | }), |
| 1176 | }; | 1365 | }; |
| 1177 | result[@enumToInt(Feature.v8_1a)] = .{ | 1366 | result[@enumToInt(Feature.v8_1a)] = .{ |
| 1178 | .llvm_name = "armv8.1-a", | 1367 | .llvm_name = "v8.1a", |
| 1179 | .description = "ARMv81a architecture", | 1368 | .description = "Support ARM v8.1a instructions", |
| 1180 | .dependencies = featureSet(&[_]Feature{ | 1369 | .dependencies = featureSet(&[_]Feature{ |
| 1181 | .aclass, | 1370 | .v8, |
| 1182 | .crc, | ||
| 1183 | .crypto, | ||
| 1184 | .db, | ||
| 1185 | .dsp, | ||
| 1186 | .fp_armv8, | ||
| 1187 | .mp, | ||
| 1188 | .neon, | ||
| 1189 | .trustzone, | ||
| 1190 | .has_v8_1a, | ||
| 1191 | .virtualization, | ||
| 1192 | }), | 1371 | }), |
| 1193 | }; | 1372 | }; |
| 1194 | result[@enumToInt(Feature.v8_1m_main)] = .{ | 1373 | result[@enumToInt(Feature.v8_1m_main)] = .{ |
| 1195 | .llvm_name = "armv8.1-m.main", | 1374 | .llvm_name = "v8.1m.main", |
| 1196 | .description = "ARMv81mMainline architecture", | 1375 | .description = "Support ARM v8-1M Mainline instructions", |
| 1197 | .dependencies = featureSet(&[_]Feature{ | 1376 | .dependencies = featureSet(&[_]Feature{ |
| 1198 | .@"8msecext", | 1377 | .v8m_main, |
| 1199 | .acquire_release, | ||
| 1200 | .db, | ||
| 1201 | .hwdiv, | ||
| 1202 | .lob, | ||
| 1203 | .mclass, | ||
| 1204 | .noarm, | ||
| 1205 | .ras, | ||
| 1206 | .thumb_mode, | ||
| 1207 | .has_v8_1m_main, | ||
| 1208 | }), | 1378 | }), |
| 1209 | }; | 1379 | }; |
| 1210 | result[@enumToInt(Feature.v8_2a)] = .{ | 1380 | result[@enumToInt(Feature.v8_2a)] = .{ |
| 1211 | .llvm_name = "armv8.2-a", | 1381 | .llvm_name = "v8.2a", |
| 1212 | .description = "ARMv82a architecture", | 1382 | .description = "Support ARM v8.2a instructions", |
| 1213 | .dependencies = featureSet(&[_]Feature{ | 1383 | .dependencies = featureSet(&[_]Feature{ |
| 1214 | .aclass, | 1384 | .v8_1a, |
| 1215 | .crc, | ||
| 1216 | .crypto, | ||
| 1217 | .db, | ||
| 1218 | .dsp, | ||
| 1219 | .fp_armv8, | ||
| 1220 | .mp, | ||
| 1221 | .neon, | ||
| 1222 | .ras, | ||
| 1223 | .trustzone, | ||
| 1224 | .has_v8_2a, | ||
| 1225 | .virtualization, | ||
| 1226 | }), | 1385 | }), |
| 1227 | }; | 1386 | }; |
| 1228 | result[@enumToInt(Feature.v8_3a)] = .{ | 1387 | result[@enumToInt(Feature.v8_3a)] = .{ |
| 1229 | .llvm_name = "armv8.3-a", | 1388 | .llvm_name = "v8.3a", |
| 1230 | .description = "ARMv83a architecture", | 1389 | .description = "Support ARM v8.3a instructions", |
| 1231 | .dependencies = featureSet(&[_]Feature{ | 1390 | .dependencies = featureSet(&[_]Feature{ |
| 1232 | .aclass, | 1391 | .v8_2a, |
| 1233 | .crc, | ||
| 1234 | .crypto, | ||
| 1235 | .db, | ||
| 1236 | .dsp, | ||
| 1237 | .fp_armv8, | ||
| 1238 | .mp, | ||
| 1239 | .neon, | ||
| 1240 | .ras, | ||
| 1241 | .trustzone, | ||
| 1242 | .has_v8_3a, | ||
| 1243 | .virtualization, | ||
| 1244 | }), | 1392 | }), |
| 1245 | }; | 1393 | }; |
| 1246 | result[@enumToInt(Feature.v8_4a)] = .{ | 1394 | result[@enumToInt(Feature.v8_4a)] = .{ |
| 1247 | .llvm_name = "armv8.4-a", | 1395 | .llvm_name = "v8.4a", |
| 1248 | .description = "ARMv84a architecture", | 1396 | .description = "Support ARM v8.4a instructions", |
| 1249 | .dependencies = featureSet(&[_]Feature{ | 1397 | .dependencies = featureSet(&[_]Feature{ |
| 1250 | .aclass, | ||
| 1251 | .crc, | ||
| 1252 | .crypto, | ||
| 1253 | .db, | ||
| 1254 | .dotprod, | 1398 | .dotprod, |
| 1255 | .dsp, | 1399 | .v8_3a, |
| 1256 | .fp_armv8, | ||
| 1257 | .mp, | ||
| 1258 | .neon, | ||
| 1259 | .ras, | ||
| 1260 | .trustzone, | ||
| 1261 | .has_v8_4a, | ||
| 1262 | .virtualization, | ||
| 1263 | }), | 1400 | }), |
| 1264 | }; | 1401 | }; |
| 1265 | result[@enumToInt(Feature.v8_5a)] = .{ | 1402 | result[@enumToInt(Feature.v8_5a)] = .{ |
| 1266 | .llvm_name = "armv8.5-a", | 1403 | .llvm_name = "v8.5a", |
| 1267 | .description = "ARMv85a architecture", | 1404 | .description = "Support ARM v8.5a instructions", |
| 1268 | .dependencies = featureSet(&[_]Feature{ | 1405 | .dependencies = featureSet(&[_]Feature{ |
| 1269 | .aclass, | 1406 | .sb, |
| 1270 | .crc, | 1407 | .v8_4a, |
| 1271 | .crypto, | ||
| 1272 | .db, | ||
| 1273 | .dotprod, | ||
| 1274 | .dsp, | ||
| 1275 | .fp_armv8, | ||
| 1276 | .mp, | ||
| 1277 | .neon, | ||
| 1278 | .ras, | ||
| 1279 | .trustzone, | ||
| 1280 | .has_v8_5a, | ||
| 1281 | .virtualization, | ||
| 1282 | }), | 1408 | }), |
| 1283 | }; | 1409 | }; |
| 1284 | result[@enumToInt(Feature.v8_6a)] = .{ | 1410 | result[@enumToInt(Feature.v8_6a)] = .{ |
| 1285 | .llvm_name = "armv8.6-a", | 1411 | .llvm_name = "v8.6a", |
| 1286 | .description = "ARMv86a architecture", | 1412 | .description = "Support ARM v8.6a instructions", |
| 1287 | .dependencies = featureSet(&[_]Feature{ | 1413 | .dependencies = featureSet(&[_]Feature{ |
| 1288 | .aclass, | 1414 | .bf16, |
| 1289 | .crc, | 1415 | ._i8mm, |
| 1290 | .crypto, | 1416 | .v8_5a, |
| 1291 | .db, | 1417 | }), |
| 1292 | .dotprod, | 1418 | }; |
| 1293 | .dsp, | 1419 | result[@enumToInt(Feature.v8m)] = .{ |
| 1294 | .fp_armv8, | 1420 | .llvm_name = "v8m", |
| 1295 | .mp, | 1421 | .description = "Support ARM v8M Baseline instructions", |
| 1296 | .neon, | 1422 | .dependencies = featureSet(&[_]Feature{ |
| 1297 | .ras, | 1423 | .v6m, |
| 1298 | .trustzone, | 1424 | }), |
| 1299 | .has_v8_6a, | 1425 | }; |
| 1300 | .virtualization, | 1426 | result[@enumToInt(Feature.v8m_main)] = .{ |
| 1427 | .llvm_name = "v8m.main", | ||
| 1428 | .description = "Support ARM v8M Mainline instructions", | ||
| 1429 | .dependencies = featureSet(&[_]Feature{ | ||
| 1430 | .v7, | ||
| 1301 | }), | 1431 | }), |
| 1302 | }; | 1432 | }; |
| 1303 | result[@enumToInt(Feature.vfp2)] = .{ | 1433 | result[@enumToInt(Feature.vfp2)] = .{ |
| ... | @@ -1417,7 +1547,7 @@ pub const all_features = blk: { | ... | @@ -1417,7 +1547,7 @@ pub const all_features = blk: { |
| 1417 | .llvm_name = "xscale", | 1547 | .llvm_name = "xscale", |
| 1418 | .description = "ARMv5te architecture", | 1548 | .description = "ARMv5te architecture", |
| 1419 | .dependencies = featureSet(&[_]Feature{ | 1549 | .dependencies = featureSet(&[_]Feature{ |
| 1420 | .has_v5te, | 1550 | .armv5te, |
| 1421 | }), | 1551 | }), |
| 1422 | }; | 1552 | }; |
| 1423 | result[@enumToInt(Feature.zcz)] = .{ | 1553 | result[@enumToInt(Feature.zcz)] = .{ |
| ... | @@ -1438,49 +1568,49 @@ pub const cpu = struct { | ... | @@ -1438,49 +1568,49 @@ pub const cpu = struct { |
| 1438 | .name = "arm1020e", | 1568 | .name = "arm1020e", |
| 1439 | .llvm_name = "arm1020e", | 1569 | .llvm_name = "arm1020e", |
| 1440 | .features = featureSet(&[_]Feature{ | 1570 | .features = featureSet(&[_]Feature{ |
| 1441 | .v5te, | 1571 | .armv5te, |
| 1442 | }), | 1572 | }), |
| 1443 | }; | 1573 | }; |
| 1444 | pub const arm1020t = CpuModel{ | 1574 | pub const arm1020t = CpuModel{ |
| 1445 | .name = "arm1020t", | 1575 | .name = "arm1020t", |
| 1446 | .llvm_name = "arm1020t", | 1576 | .llvm_name = "arm1020t", |
| 1447 | .features = featureSet(&[_]Feature{ | 1577 | .features = featureSet(&[_]Feature{ |
| 1448 | .v5t, | 1578 | .armv5t, |
| 1449 | }), | 1579 | }), |
| 1450 | }; | 1580 | }; |
| 1451 | pub const arm1022e = CpuModel{ | 1581 | pub const arm1022e = CpuModel{ |
| 1452 | .name = "arm1022e", | 1582 | .name = "arm1022e", |
| 1453 | .llvm_name = "arm1022e", | 1583 | .llvm_name = "arm1022e", |
| 1454 | .features = featureSet(&[_]Feature{ | 1584 | .features = featureSet(&[_]Feature{ |
| 1455 | .v5te, | 1585 | .armv5te, |
| 1456 | }), | 1586 | }), |
| 1457 | }; | 1587 | }; |
| 1458 | pub const arm10e = CpuModel{ | 1588 | pub const arm10e = CpuModel{ |
| 1459 | .name = "arm10e", | 1589 | .name = "arm10e", |
| 1460 | .llvm_name = "arm10e", | 1590 | .llvm_name = "arm10e", |
| 1461 | .features = featureSet(&[_]Feature{ | 1591 | .features = featureSet(&[_]Feature{ |
| 1462 | .v5te, | 1592 | .armv5te, |
| 1463 | }), | 1593 | }), |
| 1464 | }; | 1594 | }; |
| 1465 | pub const arm10tdmi = CpuModel{ | 1595 | pub const arm10tdmi = CpuModel{ |
| 1466 | .name = "arm10tdmi", | 1596 | .name = "arm10tdmi", |
| 1467 | .llvm_name = "arm10tdmi", | 1597 | .llvm_name = "arm10tdmi", |
| 1468 | .features = featureSet(&[_]Feature{ | 1598 | .features = featureSet(&[_]Feature{ |
| 1469 | .v5t, | 1599 | .armv5t, |
| 1470 | }), | 1600 | }), |
| 1471 | }; | 1601 | }; |
| 1472 | pub const arm1136j_s = CpuModel{ | 1602 | pub const arm1136j_s = CpuModel{ |
| 1473 | .name = "arm1136j_s", | 1603 | .name = "arm1136j_s", |
| 1474 | .llvm_name = "arm1136j-s", | 1604 | .llvm_name = "arm1136j-s", |
| 1475 | .features = featureSet(&[_]Feature{ | 1605 | .features = featureSet(&[_]Feature{ |
| 1476 | .v6, | 1606 | .armv6, |
| 1477 | }), | 1607 | }), |
| 1478 | }; | 1608 | }; |
| 1479 | pub const arm1136jf_s = CpuModel{ | 1609 | pub const arm1136jf_s = CpuModel{ |
| 1480 | .name = "arm1136jf_s", | 1610 | .name = "arm1136jf_s", |
| 1481 | .llvm_name = "arm1136jf-s", | 1611 | .llvm_name = "arm1136jf-s", |
| 1482 | .features = featureSet(&[_]Feature{ | 1612 | .features = featureSet(&[_]Feature{ |
| 1483 | .v6, | 1613 | .armv6, |
| 1484 | .slowfpvmlx, | 1614 | .slowfpvmlx, |
| 1485 | .vfp2, | 1615 | .vfp2, |
| 1486 | }), | 1616 | }), |
| ... | @@ -1489,14 +1619,14 @@ pub const cpu = struct { | ... | @@ -1489,14 +1619,14 @@ pub const cpu = struct { |
| 1489 | .name = "arm1156t2_s", | 1619 | .name = "arm1156t2_s", |
| 1490 | .llvm_name = "arm1156t2-s", | 1620 | .llvm_name = "arm1156t2-s", |
| 1491 | .features = featureSet(&[_]Feature{ | 1621 | .features = featureSet(&[_]Feature{ |
| 1492 | .v6t2, | 1622 | .armv6t2, |
| 1493 | }), | 1623 | }), |
| 1494 | }; | 1624 | }; |
| 1495 | pub const arm1156t2f_s = CpuModel{ | 1625 | pub const arm1156t2f_s = CpuModel{ |
| 1496 | .name = "arm1156t2f_s", | 1626 | .name = "arm1156t2f_s", |
| 1497 | .llvm_name = "arm1156t2f-s", | 1627 | .llvm_name = "arm1156t2f-s", |
| 1498 | .features = featureSet(&[_]Feature{ | 1628 | .features = featureSet(&[_]Feature{ |
| 1499 | .v6t2, | 1629 | .armv6t2, |
| 1500 | .slowfpvmlx, | 1630 | .slowfpvmlx, |
| 1501 | .vfp2, | 1631 | .vfp2, |
| 1502 | }), | 1632 | }), |
| ... | @@ -1505,21 +1635,21 @@ pub const cpu = struct { | ... | @@ -1505,21 +1635,21 @@ pub const cpu = struct { |
| 1505 | .name = "arm1176j_s", | 1635 | .name = "arm1176j_s", |
| 1506 | .llvm_name = "arm1176j-s", | 1636 | .llvm_name = "arm1176j-s", |
| 1507 | .features = featureSet(&[_]Feature{ | 1637 | .features = featureSet(&[_]Feature{ |
| 1508 | .v6kz, | 1638 | .armv6kz, |
| 1509 | }), | 1639 | }), |
| 1510 | }; | 1640 | }; |
| 1511 | pub const arm1176jz_s = CpuModel{ | 1641 | pub const arm1176jz_s = CpuModel{ |
| 1512 | .name = "arm1176jz_s", | 1642 | .name = "arm1176jz_s", |
| 1513 | .llvm_name = "arm1176jz-s", | 1643 | .llvm_name = "arm1176jz-s", |
| 1514 | .features = featureSet(&[_]Feature{ | 1644 | .features = featureSet(&[_]Feature{ |
| 1515 | .v6kz, | 1645 | .armv6kz, |
| 1516 | }), | 1646 | }), |
| 1517 | }; | 1647 | }; |
| 1518 | pub const arm1176jzf_s = CpuModel{ | 1648 | pub const arm1176jzf_s = CpuModel{ |
| 1519 | .name = "arm1176jzf_s", | 1649 | .name = "arm1176jzf_s", |
| 1520 | .llvm_name = "arm1176jzf-s", | 1650 | .llvm_name = "arm1176jzf-s", |
| 1521 | .features = featureSet(&[_]Feature{ | 1651 | .features = featureSet(&[_]Feature{ |
| 1522 | .v6kz, | 1652 | .armv6kz, |
| 1523 | .slowfpvmlx, | 1653 | .slowfpvmlx, |
| 1524 | .vfp2, | 1654 | .vfp2, |
| 1525 | }), | 1655 | }), |
| ... | @@ -1528,133 +1658,127 @@ pub const cpu = struct { | ... | @@ -1528,133 +1658,127 @@ pub const cpu = struct { |
| 1528 | .name = "arm710t", | 1658 | .name = "arm710t", |
| 1529 | .llvm_name = "arm710t", | 1659 | .llvm_name = "arm710t", |
| 1530 | .features = featureSet(&[_]Feature{ | 1660 | .features = featureSet(&[_]Feature{ |
| 1531 | .v4t, | 1661 | .armv4t, |
| 1532 | }), | 1662 | }), |
| 1533 | }; | 1663 | }; |
| 1534 | pub const arm720t = CpuModel{ | 1664 | pub const arm720t = CpuModel{ |
| 1535 | .name = "arm720t", | 1665 | .name = "arm720t", |
| 1536 | .llvm_name = "arm720t", | 1666 | .llvm_name = "arm720t", |
| 1537 | .features = featureSet(&[_]Feature{ | 1667 | .features = featureSet(&[_]Feature{ |
| 1538 | .v4t, | 1668 | .armv4t, |
| 1539 | }), | 1669 | }), |
| 1540 | }; | 1670 | }; |
| 1541 | pub const arm7tdmi = CpuModel{ | 1671 | pub const arm7tdmi = CpuModel{ |
| 1542 | .name = "arm7tdmi", | 1672 | .name = "arm7tdmi", |
| 1543 | .llvm_name = "arm7tdmi", | 1673 | .llvm_name = "arm7tdmi", |
| 1544 | .features = featureSet(&[_]Feature{ | 1674 | .features = featureSet(&[_]Feature{ |
| 1545 | .v4t, | 1675 | .armv4t, |
| 1546 | }), | 1676 | }), |
| 1547 | }; | 1677 | }; |
| 1548 | pub const arm7tdmi_s = CpuModel{ | 1678 | pub const arm7tdmi_s = CpuModel{ |
| 1549 | .name = "arm7tdmi_s", | 1679 | .name = "arm7tdmi_s", |
| 1550 | .llvm_name = "arm7tdmi-s", | 1680 | .llvm_name = "arm7tdmi-s", |
| 1551 | .features = featureSet(&[_]Feature{ | 1681 | .features = featureSet(&[_]Feature{ |
| 1552 | .v4t, | 1682 | .armv4t, |
| 1553 | }), | 1683 | }), |
| 1554 | }; | 1684 | }; |
| 1555 | pub const arm8 = CpuModel{ | 1685 | pub const arm8 = CpuModel{ |
| 1556 | .name = "arm8", | 1686 | .name = "arm8", |
| 1557 | .llvm_name = "arm8", | 1687 | .llvm_name = "arm8", |
| 1558 | .features = featureSet(&[_]Feature{ | 1688 | .features = featureSet(&[_]Feature{ |
| 1559 | .v4, | 1689 | .armv4, |
| 1560 | }), | 1690 | }), |
| 1561 | }; | 1691 | }; |
| 1562 | pub const arm810 = CpuModel{ | 1692 | pub const arm810 = CpuModel{ |
| 1563 | .name = "arm810", | 1693 | .name = "arm810", |
| 1564 | .llvm_name = "arm810", | 1694 | .llvm_name = "arm810", |
| 1565 | .features = featureSet(&[_]Feature{ | 1695 | .features = featureSet(&[_]Feature{ |
| 1566 | .v4, | 1696 | .armv4, |
| 1567 | }), | 1697 | }), |
| 1568 | }; | 1698 | }; |
| 1569 | pub const arm9 = CpuModel{ | 1699 | pub const arm9 = CpuModel{ |
| 1570 | .name = "arm9", | 1700 | .name = "arm9", |
| 1571 | .llvm_name = "arm9", | 1701 | .llvm_name = "arm9", |
| 1572 | .features = featureSet(&[_]Feature{ | 1702 | .features = featureSet(&[_]Feature{ |
| 1573 | .v4t, | 1703 | .armv4t, |
| 1574 | }), | 1704 | }), |
| 1575 | }; | 1705 | }; |
| 1576 | pub const arm920 = CpuModel{ | 1706 | pub const arm920 = CpuModel{ |
| 1577 | .name = "arm920", | 1707 | .name = "arm920", |
| 1578 | .llvm_name = "arm920", | 1708 | .llvm_name = "arm920", |
| 1579 | .features = featureSet(&[_]Feature{ | 1709 | .features = featureSet(&[_]Feature{ |
| 1580 | .v4t, | 1710 | .armv4t, |
| 1581 | }), | 1711 | }), |
| 1582 | }; | 1712 | }; |
| 1583 | pub const arm920t = CpuModel{ | 1713 | pub const arm920t = CpuModel{ |
| 1584 | .name = "arm920t", | 1714 | .name = "arm920t", |
| 1585 | .llvm_name = "arm920t", | 1715 | .llvm_name = "arm920t", |
| 1586 | .features = featureSet(&[_]Feature{ | 1716 | .features = featureSet(&[_]Feature{ |
| 1587 | .v4t, | 1717 | .armv4t, |
| 1588 | }), | 1718 | }), |
| 1589 | }; | 1719 | }; |
| 1590 | pub const arm922t = CpuModel{ | 1720 | pub const arm922t = CpuModel{ |
| 1591 | .name = "arm922t", | 1721 | .name = "arm922t", |
| 1592 | .llvm_name = "arm922t", | 1722 | .llvm_name = "arm922t", |
| 1593 | .features = featureSet(&[_]Feature{ | 1723 | .features = featureSet(&[_]Feature{ |
| 1594 | .v4t, | 1724 | .armv4t, |
| 1595 | }), | 1725 | }), |
| 1596 | }; | 1726 | }; |
| 1597 | pub const arm926ej_s = CpuModel{ | 1727 | pub const arm926ej_s = CpuModel{ |
| 1598 | .name = "arm926ej_s", | 1728 | .name = "arm926ej_s", |
| 1599 | .llvm_name = "arm926ej-s", | 1729 | .llvm_name = "arm926ej-s", |
| 1600 | .features = featureSet(&[_]Feature{ | 1730 | .features = featureSet(&[_]Feature{ |
| 1601 | .v5te, | 1731 | .armv5te, |
| 1602 | }), | 1732 | }), |
| 1603 | }; | 1733 | }; |
| 1604 | pub const arm940t = CpuModel{ | 1734 | pub const arm940t = CpuModel{ |
| 1605 | .name = "arm940t", | 1735 | .name = "arm940t", |
| 1606 | .llvm_name = "arm940t", | 1736 | .llvm_name = "arm940t", |
| 1607 | .features = featureSet(&[_]Feature{ | 1737 | .features = featureSet(&[_]Feature{ |
| 1608 | .v4t, | 1738 | .armv4t, |
| 1609 | }), | 1739 | }), |
| 1610 | }; | 1740 | }; |
| 1611 | pub const arm946e_s = CpuModel{ | 1741 | pub const arm946e_s = CpuModel{ |
| 1612 | .name = "arm946e_s", | 1742 | .name = "arm946e_s", |
| 1613 | .llvm_name = "arm946e-s", | 1743 | .llvm_name = "arm946e-s", |
| 1614 | .features = featureSet(&[_]Feature{ | 1744 | .features = featureSet(&[_]Feature{ |
| 1615 | .v5te, | 1745 | .armv5te, |
| 1616 | }), | 1746 | }), |
| 1617 | }; | 1747 | }; |
| 1618 | pub const arm966e_s = CpuModel{ | 1748 | pub const arm966e_s = CpuModel{ |
| 1619 | .name = "arm966e_s", | 1749 | .name = "arm966e_s", |
| 1620 | .llvm_name = "arm966e-s", | 1750 | .llvm_name = "arm966e-s", |
| 1621 | .features = featureSet(&[_]Feature{ | 1751 | .features = featureSet(&[_]Feature{ |
| 1622 | .v5te, | 1752 | .armv5te, |
| 1623 | }), | 1753 | }), |
| 1624 | }; | 1754 | }; |
| 1625 | pub const arm968e_s = CpuModel{ | 1755 | pub const arm968e_s = CpuModel{ |
| 1626 | .name = "arm968e_s", | 1756 | .name = "arm968e_s", |
| 1627 | .llvm_name = "arm968e-s", | 1757 | .llvm_name = "arm968e-s", |
| 1628 | .features = featureSet(&[_]Feature{ | 1758 | .features = featureSet(&[_]Feature{ |
| 1629 | .v5te, | 1759 | .armv5te, |
| 1630 | }), | 1760 | }), |
| 1631 | }; | 1761 | }; |
| 1632 | pub const arm9e = CpuModel{ | 1762 | pub const arm9e = CpuModel{ |
| 1633 | .name = "arm9e", | 1763 | .name = "arm9e", |
| 1634 | .llvm_name = "arm9e", | 1764 | .llvm_name = "arm9e", |
| 1635 | .features = featureSet(&[_]Feature{ | 1765 | .features = featureSet(&[_]Feature{ |
| 1636 | .v5te, | 1766 | .armv5te, |
| 1637 | }), | 1767 | }), |
| 1638 | }; | 1768 | }; |
| 1639 | pub const arm9tdmi = CpuModel{ | 1769 | pub const arm9tdmi = CpuModel{ |
| 1640 | .name = "arm9tdmi", | 1770 | .name = "arm9tdmi", |
| 1641 | .llvm_name = "arm9tdmi", | 1771 | .llvm_name = "arm9tdmi", |
| 1642 | .features = featureSet(&[_]Feature{ | 1772 | .features = featureSet(&[_]Feature{ |
| 1643 | .v4t, | 1773 | .armv4t, |
| 1644 | }), | ||
| 1645 | }; | ||
| 1646 | pub const baseline = CpuModel{ | ||
| 1647 | .name = "baseline", | ||
| 1648 | .llvm_name = "generic", | ||
| 1649 | .features = featureSet(&[_]Feature{ | ||
| 1650 | .v7a, | ||
| 1651 | }), | 1774 | }), |
| 1652 | }; | 1775 | }; |
| 1653 | pub const cortex_a12 = CpuModel{ | 1776 | pub const cortex_a12 = CpuModel{ |
| 1654 | .name = "cortex_a12", | 1777 | .name = "cortex_a12", |
| 1655 | .llvm_name = "cortex-a12", | 1778 | .llvm_name = "cortex-a12", |
| 1656 | .features = featureSet(&[_]Feature{ | 1779 | .features = featureSet(&[_]Feature{ |
| 1657 | .v7a, | 1780 | .a12, |
| 1781 | .armv7_a, | ||
| 1658 | .avoid_partial_cpsr, | 1782 | .avoid_partial_cpsr, |
| 1659 | .mp, | 1783 | .mp, |
| 1660 | .ret_addr_stack, | 1784 | .ret_addr_stack, |
| ... | @@ -1668,7 +1792,8 @@ pub const cpu = struct { | ... | @@ -1668,7 +1792,8 @@ pub const cpu = struct { |
| 1668 | .name = "cortex_a15", | 1792 | .name = "cortex_a15", |
| 1669 | .llvm_name = "cortex-a15", | 1793 | .llvm_name = "cortex-a15", |
| 1670 | .features = featureSet(&[_]Feature{ | 1794 | .features = featureSet(&[_]Feature{ |
| 1671 | .v7a, | 1795 | .a15, |
| 1796 | .armv7_a, | ||
| 1672 | .avoid_partial_cpsr, | 1797 | .avoid_partial_cpsr, |
| 1673 | .dont_widen_vmovs, | 1798 | .dont_widen_vmovs, |
| 1674 | .mp, | 1799 | .mp, |
| ... | @@ -1685,7 +1810,8 @@ pub const cpu = struct { | ... | @@ -1685,7 +1810,8 @@ pub const cpu = struct { |
| 1685 | .name = "cortex_a17", | 1810 | .name = "cortex_a17", |
| 1686 | .llvm_name = "cortex-a17", | 1811 | .llvm_name = "cortex-a17", |
| 1687 | .features = featureSet(&[_]Feature{ | 1812 | .features = featureSet(&[_]Feature{ |
| 1688 | .v7a, | 1813 | .a17, |
| 1814 | .armv7_a, | ||
| 1689 | .avoid_partial_cpsr, | 1815 | .avoid_partial_cpsr, |
| 1690 | .mp, | 1816 | .mp, |
| 1691 | .ret_addr_stack, | 1817 | .ret_addr_stack, |
| ... | @@ -1699,29 +1825,31 @@ pub const cpu = struct { | ... | @@ -1699,29 +1825,31 @@ pub const cpu = struct { |
| 1699 | .name = "cortex_a32", | 1825 | .name = "cortex_a32", |
| 1700 | .llvm_name = "cortex-a32", | 1826 | .llvm_name = "cortex-a32", |
| 1701 | .features = featureSet(&[_]Feature{ | 1827 | .features = featureSet(&[_]Feature{ |
| 1828 | .armv8_a, | ||
| 1702 | .crc, | 1829 | .crc, |
| 1703 | .crypto, | 1830 | .crypto, |
| 1704 | .hwdiv, | 1831 | .hwdiv, |
| 1705 | .hwdiv_arm, | 1832 | .hwdiv_arm, |
| 1706 | .v8a, | ||
| 1707 | }), | 1833 | }), |
| 1708 | }; | 1834 | }; |
| 1709 | pub const cortex_a35 = CpuModel{ | 1835 | pub const cortex_a35 = CpuModel{ |
| 1710 | .name = "cortex_a35", | 1836 | .name = "cortex_a35", |
| 1711 | .llvm_name = "cortex-a35", | 1837 | .llvm_name = "cortex-a35", |
| 1712 | .features = featureSet(&[_]Feature{ | 1838 | .features = featureSet(&[_]Feature{ |
| 1839 | .a35, | ||
| 1840 | .armv8_a, | ||
| 1713 | .crc, | 1841 | .crc, |
| 1714 | .crypto, | 1842 | .crypto, |
| 1715 | .hwdiv, | 1843 | .hwdiv, |
| 1716 | .hwdiv_arm, | 1844 | .hwdiv_arm, |
| 1717 | .v8a, | ||
| 1718 | }), | 1845 | }), |
| 1719 | }; | 1846 | }; |
| 1720 | pub const cortex_a5 = CpuModel{ | 1847 | pub const cortex_a5 = CpuModel{ |
| 1721 | .name = "cortex_a5", | 1848 | .name = "cortex_a5", |
| 1722 | .llvm_name = "cortex-a5", | 1849 | .llvm_name = "cortex-a5", |
| 1723 | .features = featureSet(&[_]Feature{ | 1850 | .features = featureSet(&[_]Feature{ |
| 1724 | .v7a, | 1851 | .a5, |
| 1852 | .armv7_a, | ||
| 1725 | .mp, | 1853 | .mp, |
| 1726 | .ret_addr_stack, | 1854 | .ret_addr_stack, |
| 1727 | .slow_fp_brcc, | 1855 | .slow_fp_brcc, |
| ... | @@ -1736,7 +1864,8 @@ pub const cpu = struct { | ... | @@ -1736,7 +1864,8 @@ pub const cpu = struct { |
| 1736 | .name = "cortex_a53", | 1864 | .name = "cortex_a53", |
| 1737 | .llvm_name = "cortex-a53", | 1865 | .llvm_name = "cortex-a53", |
| 1738 | .features = featureSet(&[_]Feature{ | 1866 | .features = featureSet(&[_]Feature{ |
| 1739 | .v8a, | 1867 | .a53, |
| 1868 | .armv8_a, | ||
| 1740 | .crc, | 1869 | .crc, |
| 1741 | .crypto, | 1870 | .crypto, |
| 1742 | .fpao, | 1871 | .fpao, |
| ... | @@ -1748,7 +1877,8 @@ pub const cpu = struct { | ... | @@ -1748,7 +1877,8 @@ pub const cpu = struct { |
| 1748 | .name = "cortex_a55", | 1877 | .name = "cortex_a55", |
| 1749 | .llvm_name = "cortex-a55", | 1878 | .llvm_name = "cortex-a55", |
| 1750 | .features = featureSet(&[_]Feature{ | 1879 | .features = featureSet(&[_]Feature{ |
| 1751 | .v8_2a, | 1880 | .a55, |
| 1881 | .armv8_2_a, | ||
| 1752 | .dotprod, | 1882 | .dotprod, |
| 1753 | .hwdiv, | 1883 | .hwdiv, |
| 1754 | .hwdiv_arm, | 1884 | .hwdiv_arm, |
| ... | @@ -1758,7 +1888,8 @@ pub const cpu = struct { | ... | @@ -1758,7 +1888,8 @@ pub const cpu = struct { |
| 1758 | .name = "cortex_a57", | 1888 | .name = "cortex_a57", |
| 1759 | .llvm_name = "cortex-a57", | 1889 | .llvm_name = "cortex-a57", |
| 1760 | .features = featureSet(&[_]Feature{ | 1890 | .features = featureSet(&[_]Feature{ |
| 1761 | .v8a, | 1891 | .a57, |
| 1892 | .armv8_a, | ||
| 1762 | .avoid_partial_cpsr, | 1893 | .avoid_partial_cpsr, |
| 1763 | .cheap_predicable_cpsr, | 1894 | .cheap_predicable_cpsr, |
| 1764 | .crc, | 1895 | .crc, |
| ... | @@ -1772,7 +1903,8 @@ pub const cpu = struct { | ... | @@ -1772,7 +1903,8 @@ pub const cpu = struct { |
| 1772 | .name = "cortex_a7", | 1903 | .name = "cortex_a7", |
| 1773 | .llvm_name = "cortex-a7", | 1904 | .llvm_name = "cortex-a7", |
| 1774 | .features = featureSet(&[_]Feature{ | 1905 | .features = featureSet(&[_]Feature{ |
| 1775 | .v7a, | 1906 | .a7, |
| 1907 | .armv7_a, | ||
| 1776 | .mp, | 1908 | .mp, |
| 1777 | .ret_addr_stack, | 1909 | .ret_addr_stack, |
| 1778 | .slow_fp_brcc, | 1910 | .slow_fp_brcc, |
| ... | @@ -1789,7 +1921,8 @@ pub const cpu = struct { | ... | @@ -1789,7 +1921,8 @@ pub const cpu = struct { |
| 1789 | .name = "cortex_a72", | 1921 | .name = "cortex_a72", |
| 1790 | .llvm_name = "cortex-a72", | 1922 | .llvm_name = "cortex-a72", |
| 1791 | .features = featureSet(&[_]Feature{ | 1923 | .features = featureSet(&[_]Feature{ |
| 1792 | .v8a, | 1924 | .a72, |
| 1925 | .armv8_a, | ||
| 1793 | .crc, | 1926 | .crc, |
| 1794 | .crypto, | 1927 | .crypto, |
| 1795 | .hwdiv, | 1928 | .hwdiv, |
| ... | @@ -1800,7 +1933,8 @@ pub const cpu = struct { | ... | @@ -1800,7 +1933,8 @@ pub const cpu = struct { |
| 1800 | .name = "cortex_a73", | 1933 | .name = "cortex_a73", |
| 1801 | .llvm_name = "cortex-a73", | 1934 | .llvm_name = "cortex-a73", |
| 1802 | .features = featureSet(&[_]Feature{ | 1935 | .features = featureSet(&[_]Feature{ |
| 1803 | .v8a, | 1936 | .a73, |
| 1937 | .armv8_a, | ||
| 1804 | .crc, | 1938 | .crc, |
| 1805 | .crypto, | 1939 | .crypto, |
| 1806 | .hwdiv, | 1940 | .hwdiv, |
| ... | @@ -1811,7 +1945,8 @@ pub const cpu = struct { | ... | @@ -1811,7 +1945,8 @@ pub const cpu = struct { |
| 1811 | .name = "cortex_a75", | 1945 | .name = "cortex_a75", |
| 1812 | .llvm_name = "cortex-a75", | 1946 | .llvm_name = "cortex-a75", |
| 1813 | .features = featureSet(&[_]Feature{ | 1947 | .features = featureSet(&[_]Feature{ |
| 1814 | .v8_2a, | 1948 | .a75, |
| 1949 | .armv8_2_a, | ||
| 1815 | .dotprod, | 1950 | .dotprod, |
| 1816 | .hwdiv, | 1951 | .hwdiv, |
| 1817 | .hwdiv_arm, | 1952 | .hwdiv_arm, |
| ... | @@ -1822,7 +1957,7 @@ pub const cpu = struct { | ... | @@ -1822,7 +1957,7 @@ pub const cpu = struct { |
| 1822 | .llvm_name = "cortex-a76", | 1957 | .llvm_name = "cortex-a76", |
| 1823 | .features = featureSet(&[_]Feature{ | 1958 | .features = featureSet(&[_]Feature{ |
| 1824 | .a76, | 1959 | .a76, |
| 1825 | .v8_2a, | 1960 | .armv8_2_a, |
| 1826 | .crc, | 1961 | .crc, |
| 1827 | .crypto, | 1962 | .crypto, |
| 1828 | .dotprod, | 1963 | .dotprod, |
| ... | @@ -1836,7 +1971,7 @@ pub const cpu = struct { | ... | @@ -1836,7 +1971,7 @@ pub const cpu = struct { |
| 1836 | .llvm_name = "cortex-a76ae", | 1971 | .llvm_name = "cortex-a76ae", |
| 1837 | .features = featureSet(&[_]Feature{ | 1972 | .features = featureSet(&[_]Feature{ |
| 1838 | .a76, | 1973 | .a76, |
| 1839 | .v8_2a, | 1974 | .armv8_2_a, |
| 1840 | .crc, | 1975 | .crc, |
| 1841 | .crypto, | 1976 | .crypto, |
| 1842 | .dotprod, | 1977 | .dotprod, |
| ... | @@ -1849,7 +1984,8 @@ pub const cpu = struct { | ... | @@ -1849,7 +1984,8 @@ pub const cpu = struct { |
| 1849 | .name = "cortex_a77", | 1984 | .name = "cortex_a77", |
| 1850 | .llvm_name = "cortex-a77", | 1985 | .llvm_name = "cortex-a77", |
| 1851 | .features = featureSet(&[_]Feature{ | 1986 | .features = featureSet(&[_]Feature{ |
| 1852 | .v8_2a, | 1987 | .a77, |
| 1988 | .armv8_2_a, | ||
| 1853 | .crc, | 1989 | .crc, |
| 1854 | .crypto, | 1990 | .crypto, |
| 1855 | .dotprod, | 1991 | .dotprod, |
| ... | @@ -1862,7 +1998,8 @@ pub const cpu = struct { | ... | @@ -1862,7 +1998,8 @@ pub const cpu = struct { |
| 1862 | .name = "cortex_a78", | 1998 | .name = "cortex_a78", |
| 1863 | .llvm_name = "cortex-a78", | 1999 | .llvm_name = "cortex-a78", |
| 1864 | .features = featureSet(&[_]Feature{ | 2000 | .features = featureSet(&[_]Feature{ |
| 1865 | .v8_2a, | 2001 | .armv8_2_a, |
| 2002 | .cortex_a78, | ||
| 1866 | .crc, | 2003 | .crc, |
| 1867 | .crypto, | 2004 | .crypto, |
| 1868 | .dotprod, | 2005 | .dotprod, |
| ... | @@ -1875,7 +2012,8 @@ pub const cpu = struct { | ... | @@ -1875,7 +2012,8 @@ pub const cpu = struct { |
| 1875 | .name = "cortex_a8", | 2012 | .name = "cortex_a8", |
| 1876 | .llvm_name = "cortex-a8", | 2013 | .llvm_name = "cortex-a8", |
| 1877 | .features = featureSet(&[_]Feature{ | 2014 | .features = featureSet(&[_]Feature{ |
| 1878 | .v7a, | 2015 | .a8, |
| 2016 | .armv7_a, | ||
| 1879 | .nonpipelined_vfp, | 2017 | .nonpipelined_vfp, |
| 1880 | .ret_addr_stack, | 2018 | .ret_addr_stack, |
| 1881 | .slow_fp_brcc, | 2019 | .slow_fp_brcc, |
| ... | @@ -1890,7 +2028,8 @@ pub const cpu = struct { | ... | @@ -1890,7 +2028,8 @@ pub const cpu = struct { |
| 1890 | .name = "cortex_a9", | 2028 | .name = "cortex_a9", |
| 1891 | .llvm_name = "cortex-a9", | 2029 | .llvm_name = "cortex-a9", |
| 1892 | .features = featureSet(&[_]Feature{ | 2030 | .features = featureSet(&[_]Feature{ |
| 1893 | .v7a, | 2031 | .a9, |
| 2032 | .armv7_a, | ||
| 1894 | .avoid_partial_cpsr, | 2033 | .avoid_partial_cpsr, |
| 1895 | .expand_fp_mlx, | 2034 | .expand_fp_mlx, |
| 1896 | .fp16, | 2035 | .fp16, |
| ... | @@ -1909,28 +2048,28 @@ pub const cpu = struct { | ... | @@ -1909,28 +2048,28 @@ pub const cpu = struct { |
| 1909 | .name = "cortex_m0", | 2048 | .name = "cortex_m0", |
| 1910 | .llvm_name = "cortex-m0", | 2049 | .llvm_name = "cortex-m0", |
| 1911 | .features = featureSet(&[_]Feature{ | 2050 | .features = featureSet(&[_]Feature{ |
| 1912 | .v6m, | 2051 | .armv6_m, |
| 1913 | }), | 2052 | }), |
| 1914 | }; | 2053 | }; |
| 1915 | pub const cortex_m0plus = CpuModel{ | 2054 | pub const cortex_m0plus = CpuModel{ |
| 1916 | .name = "cortex_m0plus", | 2055 | .name = "cortex_m0plus", |
| 1917 | .llvm_name = "cortex-m0plus", | 2056 | .llvm_name = "cortex-m0plus", |
| 1918 | .features = featureSet(&[_]Feature{ | 2057 | .features = featureSet(&[_]Feature{ |
| 1919 | .v6m, | 2058 | .armv6_m, |
| 1920 | }), | 2059 | }), |
| 1921 | }; | 2060 | }; |
| 1922 | pub const cortex_m1 = CpuModel{ | 2061 | pub const cortex_m1 = CpuModel{ |
| 1923 | .name = "cortex_m1", | 2062 | .name = "cortex_m1", |
| 1924 | .llvm_name = "cortex-m1", | 2063 | .llvm_name = "cortex-m1", |
| 1925 | .features = featureSet(&[_]Feature{ | 2064 | .features = featureSet(&[_]Feature{ |
| 1926 | .v6m, | 2065 | .armv6_m, |
| 1927 | }), | 2066 | }), |
| 1928 | }; | 2067 | }; |
| 1929 | pub const cortex_m23 = CpuModel{ | 2068 | pub const cortex_m23 = CpuModel{ |
| 1930 | .name = "cortex_m23", | 2069 | .name = "cortex_m23", |
| 1931 | .llvm_name = "cortex-m23", | 2070 | .llvm_name = "cortex-m23", |
| 1932 | .features = featureSet(&[_]Feature{ | 2071 | .features = featureSet(&[_]Feature{ |
| 1933 | .v8m, | 2072 | .armv8_m_base, |
| 1934 | .no_movt, | 2073 | .no_movt, |
| 1935 | }), | 2074 | }), |
| 1936 | }; | 2075 | }; |
| ... | @@ -1938,7 +2077,7 @@ pub const cpu = struct { | ... | @@ -1938,7 +2077,7 @@ pub const cpu = struct { |
| 1938 | .name = "cortex_m3", | 2077 | .name = "cortex_m3", |
| 1939 | .llvm_name = "cortex-m3", | 2078 | .llvm_name = "cortex-m3", |
| 1940 | .features = featureSet(&[_]Feature{ | 2079 | .features = featureSet(&[_]Feature{ |
| 1941 | .v7m, | 2080 | .armv7_m, |
| 1942 | .loop_align, | 2081 | .loop_align, |
| 1943 | .m3, | 2082 | .m3, |
| 1944 | .no_branch_predictor, | 2083 | .no_branch_predictor, |
| ... | @@ -1949,7 +2088,7 @@ pub const cpu = struct { | ... | @@ -1949,7 +2088,7 @@ pub const cpu = struct { |
| 1949 | .name = "cortex_m33", | 2088 | .name = "cortex_m33", |
| 1950 | .llvm_name = "cortex-m33", | 2089 | .llvm_name = "cortex-m33", |
| 1951 | .features = featureSet(&[_]Feature{ | 2090 | .features = featureSet(&[_]Feature{ |
| 1952 | .v8m_main, | 2091 | .armv8_m_main, |
| 1953 | .dsp, | 2092 | .dsp, |
| 1954 | .fp_armv8d16sp, | 2093 | .fp_armv8d16sp, |
| 1955 | .loop_align, | 2094 | .loop_align, |
| ... | @@ -1963,7 +2102,7 @@ pub const cpu = struct { | ... | @@ -1963,7 +2102,7 @@ pub const cpu = struct { |
| 1963 | .name = "cortex_m35p", | 2102 | .name = "cortex_m35p", |
| 1964 | .llvm_name = "cortex-m35p", | 2103 | .llvm_name = "cortex-m35p", |
| 1965 | .features = featureSet(&[_]Feature{ | 2104 | .features = featureSet(&[_]Feature{ |
| 1966 | .v8m_main, | 2105 | .armv8_m_main, |
| 1967 | .dsp, | 2106 | .dsp, |
| 1968 | .fp_armv8d16sp, | 2107 | .fp_armv8d16sp, |
| 1969 | .loop_align, | 2108 | .loop_align, |
| ... | @@ -1977,7 +2116,7 @@ pub const cpu = struct { | ... | @@ -1977,7 +2116,7 @@ pub const cpu = struct { |
| 1977 | .name = "cortex_m4", | 2116 | .name = "cortex_m4", |
| 1978 | .llvm_name = "cortex-m4", | 2117 | .llvm_name = "cortex-m4", |
| 1979 | .features = featureSet(&[_]Feature{ | 2118 | .features = featureSet(&[_]Feature{ |
| 1980 | .v7em, | 2119 | .armv7e_m, |
| 1981 | .loop_align, | 2120 | .loop_align, |
| 1982 | .no_branch_predictor, | 2121 | .no_branch_predictor, |
| 1983 | .slowfpvfmx, | 2122 | .slowfpvfmx, |
| ... | @@ -1990,7 +2129,7 @@ pub const cpu = struct { | ... | @@ -1990,7 +2129,7 @@ pub const cpu = struct { |
| 1990 | .name = "cortex_m55", | 2129 | .name = "cortex_m55", |
| 1991 | .llvm_name = "cortex-m55", | 2130 | .llvm_name = "cortex-m55", |
| 1992 | .features = featureSet(&[_]Feature{ | 2131 | .features = featureSet(&[_]Feature{ |
| 1993 | .v8_1m_main, | 2132 | .armv8_1_m_main, |
| 1994 | .dsp, | 2133 | .dsp, |
| 1995 | .fp_armv8d16, | 2134 | .fp_armv8d16, |
| 1996 | .loop_align, | 2135 | .loop_align, |
| ... | @@ -2004,15 +2143,16 @@ pub const cpu = struct { | ... | @@ -2004,15 +2143,16 @@ pub const cpu = struct { |
| 2004 | .name = "cortex_m7", | 2143 | .name = "cortex_m7", |
| 2005 | .llvm_name = "cortex-m7", | 2144 | .llvm_name = "cortex-m7", |
| 2006 | .features = featureSet(&[_]Feature{ | 2145 | .features = featureSet(&[_]Feature{ |
| 2007 | .v7em, | 2146 | .armv7e_m, |
| 2008 | .fp_armv8d16, | 2147 | .fp_armv8d16, |
| 2148 | .use_misched, | ||
| 2009 | }), | 2149 | }), |
| 2010 | }; | 2150 | }; |
| 2011 | pub const cortex_r4 = CpuModel{ | 2151 | pub const cortex_r4 = CpuModel{ |
| 2012 | .name = "cortex_r4", | 2152 | .name = "cortex_r4", |
| 2013 | .llvm_name = "cortex-r4", | 2153 | .llvm_name = "cortex-r4", |
| 2014 | .features = featureSet(&[_]Feature{ | 2154 | .features = featureSet(&[_]Feature{ |
| 2015 | .v7r, | 2155 | .armv7_r, |
| 2016 | .avoid_partial_cpsr, | 2156 | .avoid_partial_cpsr, |
| 2017 | .r4, | 2157 | .r4, |
| 2018 | .ret_addr_stack, | 2158 | .ret_addr_stack, |
| ... | @@ -2022,7 +2162,7 @@ pub const cpu = struct { | ... | @@ -2022,7 +2162,7 @@ pub const cpu = struct { |
| 2022 | .name = "cortex_r4f", | 2162 | .name = "cortex_r4f", |
| 2023 | .llvm_name = "cortex-r4f", | 2163 | .llvm_name = "cortex-r4f", |
| 2024 | .features = featureSet(&[_]Feature{ | 2164 | .features = featureSet(&[_]Feature{ |
| 2025 | .v7r, | 2165 | .armv7_r, |
| 2026 | .avoid_partial_cpsr, | 2166 | .avoid_partial_cpsr, |
| 2027 | .r4, | 2167 | .r4, |
| 2028 | .ret_addr_stack, | 2168 | .ret_addr_stack, |
| ... | @@ -2036,9 +2176,10 @@ pub const cpu = struct { | ... | @@ -2036,9 +2176,10 @@ pub const cpu = struct { |
| 2036 | .name = "cortex_r5", | 2176 | .name = "cortex_r5", |
| 2037 | .llvm_name = "cortex-r5", | 2177 | .llvm_name = "cortex-r5", |
| 2038 | .features = featureSet(&[_]Feature{ | 2178 | .features = featureSet(&[_]Feature{ |
| 2039 | .v7r, | 2179 | .armv7_r, |
| 2040 | .avoid_partial_cpsr, | 2180 | .avoid_partial_cpsr, |
| 2041 | .hwdiv_arm, | 2181 | .hwdiv_arm, |
| 2182 | .r5, | ||
| 2042 | .ret_addr_stack, | 2183 | .ret_addr_stack, |
| 2043 | .slow_fp_brcc, | 2184 | .slow_fp_brcc, |
| 2044 | .slowfpvfmx, | 2185 | .slowfpvfmx, |
| ... | @@ -2050,8 +2191,9 @@ pub const cpu = struct { | ... | @@ -2050,8 +2191,9 @@ pub const cpu = struct { |
| 2050 | .name = "cortex_r52", | 2191 | .name = "cortex_r52", |
| 2051 | .llvm_name = "cortex-r52", | 2192 | .llvm_name = "cortex-r52", |
| 2052 | .features = featureSet(&[_]Feature{ | 2193 | .features = featureSet(&[_]Feature{ |
| 2053 | .v8r, | 2194 | .armv8_r, |
| 2054 | .fpao, | 2195 | .fpao, |
| 2196 | .r52, | ||
| 2055 | .use_misched, | 2197 | .use_misched, |
| 2056 | }), | 2198 | }), |
| 2057 | }; | 2199 | }; |
| ... | @@ -2059,11 +2201,12 @@ pub const cpu = struct { | ... | @@ -2059,11 +2201,12 @@ pub const cpu = struct { |
| 2059 | .name = "cortex_r7", | 2201 | .name = "cortex_r7", |
| 2060 | .llvm_name = "cortex-r7", | 2202 | .llvm_name = "cortex-r7", |
| 2061 | .features = featureSet(&[_]Feature{ | 2203 | .features = featureSet(&[_]Feature{ |
| 2062 | .v7r, | 2204 | .armv7_r, |
| 2063 | .avoid_partial_cpsr, | 2205 | .avoid_partial_cpsr, |
| 2064 | .fp16, | 2206 | .fp16, |
| 2065 | .hwdiv_arm, | 2207 | .hwdiv_arm, |
| 2066 | .mp, | 2208 | .mp, |
| 2209 | .r7, | ||
| 2067 | .ret_addr_stack, | 2210 | .ret_addr_stack, |
| 2068 | .slow_fp_brcc, | 2211 | .slow_fp_brcc, |
| 2069 | .slowfpvfmx, | 2212 | .slowfpvfmx, |
| ... | @@ -2075,7 +2218,7 @@ pub const cpu = struct { | ... | @@ -2075,7 +2218,7 @@ pub const cpu = struct { |
| 2075 | .name = "cortex_r8", | 2218 | .name = "cortex_r8", |
| 2076 | .llvm_name = "cortex-r8", | 2219 | .llvm_name = "cortex-r8", |
| 2077 | .features = featureSet(&[_]Feature{ | 2220 | .features = featureSet(&[_]Feature{ |
| 2078 | .v7r, | 2221 | .armv7_r, |
| 2079 | .avoid_partial_cpsr, | 2222 | .avoid_partial_cpsr, |
| 2080 | .fp16, | 2223 | .fp16, |
| 2081 | .hwdiv_arm, | 2224 | .hwdiv_arm, |
| ... | @@ -2091,7 +2234,8 @@ pub const cpu = struct { | ... | @@ -2091,7 +2234,8 @@ pub const cpu = struct { |
| 2091 | .name = "cortex_x1", | 2234 | .name = "cortex_x1", |
| 2092 | .llvm_name = "cortex-x1", | 2235 | .llvm_name = "cortex-x1", |
| 2093 | .features = featureSet(&[_]Feature{ | 2236 | .features = featureSet(&[_]Feature{ |
| 2094 | .v8_2a, | 2237 | .armv8_2_a, |
| 2238 | .cortex_x1, | ||
| 2095 | .crc, | 2239 | .crc, |
| 2096 | .crypto, | 2240 | .crypto, |
| 2097 | .dotprod, | 2241 | .dotprod, |
| ... | @@ -2104,7 +2248,7 @@ pub const cpu = struct { | ... | @@ -2104,7 +2248,7 @@ pub const cpu = struct { |
| 2104 | .name = "cyclone", | 2248 | .name = "cyclone", |
| 2105 | .llvm_name = "cyclone", | 2249 | .llvm_name = "cyclone", |
| 2106 | .features = featureSet(&[_]Feature{ | 2250 | .features = featureSet(&[_]Feature{ |
| 2107 | .v8a, | 2251 | .armv8_a, |
| 2108 | .avoid_movs_shop, | 2252 | .avoid_movs_shop, |
| 2109 | .avoid_partial_cpsr, | 2253 | .avoid_partial_cpsr, |
| 2110 | .crypto, | 2254 | .crypto, |
| ... | @@ -2126,30 +2270,14 @@ pub const cpu = struct { | ... | @@ -2126,30 +2270,14 @@ pub const cpu = struct { |
| 2126 | .name = "ep9312", | 2270 | .name = "ep9312", |
| 2127 | .llvm_name = "ep9312", | 2271 | .llvm_name = "ep9312", |
| 2128 | .features = featureSet(&[_]Feature{ | 2272 | .features = featureSet(&[_]Feature{ |
| 2129 | .v4t, | 2273 | .armv4t, |
| 2130 | }), | ||
| 2131 | }; | ||
| 2132 | pub const exynos_m1 = CpuModel{ | ||
| 2133 | .name = "exynos_m1", | ||
| 2134 | .llvm_name = null, | ||
| 2135 | .features = featureSet(&[_]Feature{ | ||
| 2136 | .v8a, | ||
| 2137 | .exynos, | ||
| 2138 | }), | ||
| 2139 | }; | ||
| 2140 | pub const exynos_m2 = CpuModel{ | ||
| 2141 | .name = "exynos_m2", | ||
| 2142 | .llvm_name = null, | ||
| 2143 | .features = featureSet(&[_]Feature{ | ||
| 2144 | .v8a, | ||
| 2145 | .exynos, | ||
| 2146 | }), | 2274 | }), |
| 2147 | }; | 2275 | }; |
| 2148 | pub const exynos_m3 = CpuModel{ | 2276 | pub const exynos_m3 = CpuModel{ |
| 2149 | .name = "exynos_m3", | 2277 | .name = "exynos_m3", |
| 2150 | .llvm_name = "exynos-m3", | 2278 | .llvm_name = "exynos-m3", |
| 2151 | .features = featureSet(&[_]Feature{ | 2279 | .features = featureSet(&[_]Feature{ |
| 2152 | .v8_2a, | 2280 | .armv8_a, |
| 2153 | .exynos, | 2281 | .exynos, |
| 2154 | }), | 2282 | }), |
| 2155 | }; | 2283 | }; |
| ... | @@ -2157,7 +2285,7 @@ pub const cpu = struct { | ... | @@ -2157,7 +2285,7 @@ pub const cpu = struct { |
| 2157 | .name = "exynos_m4", | 2285 | .name = "exynos_m4", |
| 2158 | .llvm_name = "exynos-m4", | 2286 | .llvm_name = "exynos-m4", |
| 2159 | .features = featureSet(&[_]Feature{ | 2287 | .features = featureSet(&[_]Feature{ |
| 2160 | .v8_2a, | 2288 | .armv8_2_a, |
| 2161 | .dotprod, | 2289 | .dotprod, |
| 2162 | .exynos, | 2290 | .exynos, |
| 2163 | .fullfp16, | 2291 | .fullfp16, |
| ... | @@ -2167,10 +2295,10 @@ pub const cpu = struct { | ... | @@ -2167,10 +2295,10 @@ pub const cpu = struct { |
| 2167 | .name = "exynos_m5", | 2295 | .name = "exynos_m5", |
| 2168 | .llvm_name = "exynos-m5", | 2296 | .llvm_name = "exynos-m5", |
| 2169 | .features = featureSet(&[_]Feature{ | 2297 | .features = featureSet(&[_]Feature{ |
| 2298 | .armv8_2_a, | ||
| 2170 | .dotprod, | 2299 | .dotprod, |
| 2171 | .exynos, | 2300 | .exynos, |
| 2172 | .fullfp16, | 2301 | .fullfp16, |
| 2173 | .v8_2a, | ||
| 2174 | }), | 2302 | }), |
| 2175 | }; | 2303 | }; |
| 2176 | pub const generic = CpuModel{ | 2304 | pub const generic = CpuModel{ |
| ... | @@ -2182,20 +2310,21 @@ pub const cpu = struct { | ... | @@ -2182,20 +2310,21 @@ pub const cpu = struct { |
| 2182 | .name = "iwmmxt", | 2310 | .name = "iwmmxt", |
| 2183 | .llvm_name = "iwmmxt", | 2311 | .llvm_name = "iwmmxt", |
| 2184 | .features = featureSet(&[_]Feature{ | 2312 | .features = featureSet(&[_]Feature{ |
| 2185 | .v5te, | 2313 | .armv5te, |
| 2186 | }), | 2314 | }), |
| 2187 | }; | 2315 | }; |
| 2188 | pub const krait = CpuModel{ | 2316 | pub const krait = CpuModel{ |
| 2189 | .name = "krait", | 2317 | .name = "krait", |
| 2190 | .llvm_name = "krait", | 2318 | .llvm_name = "krait", |
| 2191 | .features = featureSet(&[_]Feature{ | 2319 | .features = featureSet(&[_]Feature{ |
| 2320 | .armv7_a, | ||
| 2192 | .avoid_partial_cpsr, | 2321 | .avoid_partial_cpsr, |
| 2193 | .fp16, | 2322 | .fp16, |
| 2194 | .hwdiv, | 2323 | .hwdiv, |
| 2195 | .hwdiv_arm, | 2324 | .hwdiv_arm, |
| 2325 | .krait, | ||
| 2196 | .muxed_units, | 2326 | .muxed_units, |
| 2197 | .ret_addr_stack, | 2327 | .ret_addr_stack, |
| 2198 | .v7a, | ||
| 2199 | .vfp4, | 2328 | .vfp4, |
| 2200 | .vldn_align, | 2329 | .vldn_align, |
| 2201 | .vmlx_forwarding, | 2330 | .vmlx_forwarding, |
| ... | @@ -2205,18 +2334,19 @@ pub const cpu = struct { | ... | @@ -2205,18 +2334,19 @@ pub const cpu = struct { |
| 2205 | .name = "kryo", | 2334 | .name = "kryo", |
| 2206 | .llvm_name = "kryo", | 2335 | .llvm_name = "kryo", |
| 2207 | .features = featureSet(&[_]Feature{ | 2336 | .features = featureSet(&[_]Feature{ |
| 2337 | .armv8_a, | ||
| 2208 | .crc, | 2338 | .crc, |
| 2209 | .crypto, | 2339 | .crypto, |
| 2210 | .hwdiv, | 2340 | .hwdiv, |
| 2211 | .hwdiv_arm, | 2341 | .hwdiv_arm, |
| 2212 | .v8a, | 2342 | .kryo, |
| 2213 | }), | 2343 | }), |
| 2214 | }; | 2344 | }; |
| 2215 | pub const mpcore = CpuModel{ | 2345 | pub const mpcore = CpuModel{ |
| 2216 | .name = "mpcore", | 2346 | .name = "mpcore", |
| 2217 | .llvm_name = "mpcore", | 2347 | .llvm_name = "mpcore", |
| 2218 | .features = featureSet(&[_]Feature{ | 2348 | .features = featureSet(&[_]Feature{ |
| 2219 | .v6k, | 2349 | .armv6k, |
| 2220 | .slowfpvmlx, | 2350 | .slowfpvmlx, |
| 2221 | .vfp2, | 2351 | .vfp2, |
| 2222 | }), | 2352 | }), |
| ... | @@ -2225,14 +2355,14 @@ pub const cpu = struct { | ... | @@ -2225,14 +2355,14 @@ pub const cpu = struct { |
| 2225 | .name = "mpcorenovfp", | 2355 | .name = "mpcorenovfp", |
| 2226 | .llvm_name = "mpcorenovfp", | 2356 | .llvm_name = "mpcorenovfp", |
| 2227 | .features = featureSet(&[_]Feature{ | 2357 | .features = featureSet(&[_]Feature{ |
| 2228 | .v6k, | 2358 | .armv6k, |
| 2229 | }), | 2359 | }), |
| 2230 | }; | 2360 | }; |
| 2231 | pub const neoverse_n1 = CpuModel{ | 2361 | pub const neoverse_n1 = CpuModel{ |
| 2232 | .name = "neoverse_n1", | 2362 | .name = "neoverse_n1", |
| 2233 | .llvm_name = "neoverse-n1", | 2363 | .llvm_name = "neoverse-n1", |
| 2234 | .features = featureSet(&[_]Feature{ | 2364 | .features = featureSet(&[_]Feature{ |
| 2235 | .v8_2a, | 2365 | .armv8_2_a, |
| 2236 | .crc, | 2366 | .crc, |
| 2237 | .crypto, | 2367 | .crypto, |
| 2238 | .dotprod, | 2368 | .dotprod, |
| ... | @@ -2240,18 +2370,42 @@ pub const cpu = struct { | ... | @@ -2240,18 +2370,42 @@ pub const cpu = struct { |
| 2240 | .hwdiv_arm, | 2370 | .hwdiv_arm, |
| 2241 | }), | 2371 | }), |
| 2242 | }; | 2372 | }; |
| 2373 | pub const neoverse_n2 = CpuModel{ | ||
| 2374 | .name = "neoverse_n2", | ||
| 2375 | .llvm_name = "neoverse-n2", | ||
| 2376 | .features = featureSet(&[_]Feature{ | ||
| 2377 | .armv8_5_a, | ||
| 2378 | .bf16, | ||
| 2379 | ._i8mm, | ||
| 2380 | .perfmon, | ||
| 2381 | }), | ||
| 2382 | }; | ||
| 2383 | pub const neoverse_v1 = CpuModel{ | ||
| 2384 | .name = "neoverse_v1", | ||
| 2385 | .llvm_name = "neoverse-v1", | ||
| 2386 | .features = featureSet(&[_]Feature{ | ||
| 2387 | .armv8_4_a, | ||
| 2388 | .bf16, | ||
| 2389 | .crc, | ||
| 2390 | .crypto, | ||
| 2391 | .fullfp16, | ||
| 2392 | .hwdiv, | ||
| 2393 | .hwdiv_arm, | ||
| 2394 | ._i8mm, | ||
| 2395 | }), | ||
| 2396 | }; | ||
| 2243 | pub const sc000 = CpuModel{ | 2397 | pub const sc000 = CpuModel{ |
| 2244 | .name = "sc000", | 2398 | .name = "sc000", |
| 2245 | .llvm_name = "sc000", | 2399 | .llvm_name = "sc000", |
| 2246 | .features = featureSet(&[_]Feature{ | 2400 | .features = featureSet(&[_]Feature{ |
| 2247 | .v6m, | 2401 | .armv6_m, |
| 2248 | }), | 2402 | }), |
| 2249 | }; | 2403 | }; |
| 2250 | pub const sc300 = CpuModel{ | 2404 | pub const sc300 = CpuModel{ |
| 2251 | .name = "sc300", | 2405 | .name = "sc300", |
| 2252 | .llvm_name = "sc300", | 2406 | .llvm_name = "sc300", |
| 2253 | .features = featureSet(&[_]Feature{ | 2407 | .features = featureSet(&[_]Feature{ |
| 2254 | .v7m, | 2408 | .armv7_m, |
| 2255 | .m3, | 2409 | .m3, |
| 2256 | .no_branch_predictor, | 2410 | .no_branch_predictor, |
| 2257 | .use_misched, | 2411 | .use_misched, |
| ... | @@ -2261,35 +2415,35 @@ pub const cpu = struct { | ... | @@ -2261,35 +2415,35 @@ pub const cpu = struct { |
| 2261 | .name = "strongarm", | 2415 | .name = "strongarm", |
| 2262 | .llvm_name = "strongarm", | 2416 | .llvm_name = "strongarm", |
| 2263 | .features = featureSet(&[_]Feature{ | 2417 | .features = featureSet(&[_]Feature{ |
| 2264 | .v4, | 2418 | .armv4, |
| 2265 | }), | 2419 | }), |
| 2266 | }; | 2420 | }; |
| 2267 | pub const strongarm110 = CpuModel{ | 2421 | pub const strongarm110 = CpuModel{ |
| 2268 | .name = "strongarm110", | 2422 | .name = "strongarm110", |
| 2269 | .llvm_name = "strongarm110", | 2423 | .llvm_name = "strongarm110", |
| 2270 | .features = featureSet(&[_]Feature{ | 2424 | .features = featureSet(&[_]Feature{ |
| 2271 | .v4, | 2425 | .armv4, |
| 2272 | }), | 2426 | }), |
| 2273 | }; | 2427 | }; |
| 2274 | pub const strongarm1100 = CpuModel{ | 2428 | pub const strongarm1100 = CpuModel{ |
| 2275 | .name = "strongarm1100", | 2429 | .name = "strongarm1100", |
| 2276 | .llvm_name = "strongarm1100", | 2430 | .llvm_name = "strongarm1100", |
| 2277 | .features = featureSet(&[_]Feature{ | 2431 | .features = featureSet(&[_]Feature{ |
| 2278 | .v4, | 2432 | .armv4, |
| 2279 | }), | 2433 | }), |
| 2280 | }; | 2434 | }; |
| 2281 | pub const strongarm1110 = CpuModel{ | 2435 | pub const strongarm1110 = CpuModel{ |
| 2282 | .name = "strongarm1110", | 2436 | .name = "strongarm1110", |
| 2283 | .llvm_name = "strongarm1110", | 2437 | .llvm_name = "strongarm1110", |
| 2284 | .features = featureSet(&[_]Feature{ | 2438 | .features = featureSet(&[_]Feature{ |
| 2285 | .v4, | 2439 | .armv4, |
| 2286 | }), | 2440 | }), |
| 2287 | }; | 2441 | }; |
| 2288 | pub const swift = CpuModel{ | 2442 | pub const swift = CpuModel{ |
| 2289 | .name = "swift", | 2443 | .name = "swift", |
| 2290 | .llvm_name = "swift", | 2444 | .llvm_name = "swift", |
| 2291 | .features = featureSet(&[_]Feature{ | 2445 | .features = featureSet(&[_]Feature{ |
| 2292 | .v7a, | 2446 | .armv7_a, |
| 2293 | .avoid_movs_shop, | 2447 | .avoid_movs_shop, |
| 2294 | .avoid_partial_cpsr, | 2448 | .avoid_partial_cpsr, |
| 2295 | .disable_postra_scheduler, | 2449 | .disable_postra_scheduler, |
| ... | @@ -2317,7 +2471,7 @@ pub const cpu = struct { | ... | @@ -2317,7 +2471,7 @@ pub const cpu = struct { |
| 2317 | .name = "xscale", | 2471 | .name = "xscale", |
| 2318 | .llvm_name = "xscale", | 2472 | .llvm_name = "xscale", |
| 2319 | .features = featureSet(&[_]Feature{ | 2473 | .features = featureSet(&[_]Feature{ |
| 2320 | .v5te, | 2474 | .armv5te, |
| 2321 | }), | 2475 | }), |
| 2322 | }; | 2476 | }; |
| 2323 | }; | 2477 | }; |
lib/std/target/avr.zig+63-6| ... | @@ -47,6 +47,7 @@ pub const Feature = enum { | ... | @@ -47,6 +47,7 @@ pub const Feature = enum { |
| 47 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 47 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 48 | 48 | ||
| 49 | pub const all_features = blk: { | 49 | pub const all_features = blk: { |
| 50 | @setEvalBranchQuota(10000); | ||
| 50 | const len = @typeInfo(Feature).Enum.fields.len; | 51 | const len = @typeInfo(Feature).Enum.fields.len; |
| 51 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 52 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 52 | var result: [len]CpuFeature = undefined; | 53 | var result: [len]CpuFeature = undefined; |
| ... | @@ -163,7 +164,6 @@ pub const all_features = blk: { | ... | @@ -163,7 +164,6 @@ pub const all_features = blk: { |
| 163 | .dependencies = featureSet(&[_]Feature{ | 164 | .dependencies = featureSet(&[_]Feature{ |
| 164 | .avr0, | 165 | .avr0, |
| 165 | .@"break", | 166 | .@"break", |
| 166 | .memmappedregs, | ||
| 167 | .sram, | 167 | .sram, |
| 168 | .tinyencoding, | 168 | .tinyencoding, |
| 169 | }), | 169 | }), |
| ... | @@ -802,6 +802,13 @@ pub const cpu = struct { | ... | @@ -802,6 +802,13 @@ pub const cpu = struct { |
| 802 | .avr5, | 802 | .avr5, |
| 803 | }), | 803 | }), |
| 804 | }; | 804 | }; |
| 805 | pub const atmega168pb = CpuModel{ | ||
| 806 | .name = "atmega168pb", | ||
| 807 | .llvm_name = "atmega168pb", | ||
| 808 | .features = featureSet(&[_]Feature{ | ||
| 809 | .avr5, | ||
| 810 | }), | ||
| 811 | }; | ||
| 805 | pub const atmega169 = CpuModel{ | 812 | pub const atmega169 = CpuModel{ |
| 806 | .name = "atmega169", | 813 | .name = "atmega169", |
| 807 | .llvm_name = "atmega169", | 814 | .llvm_name = "atmega169", |
| ... | @@ -949,6 +956,13 @@ pub const cpu = struct { | ... | @@ -949,6 +956,13 @@ pub const cpu = struct { |
| 949 | .avr5, | 956 | .avr5, |
| 950 | }), | 957 | }), |
| 951 | }; | 958 | }; |
| 959 | pub const atmega324pb = CpuModel{ | ||
| 960 | .name = "atmega324pb", | ||
| 961 | .llvm_name = "atmega324pb", | ||
| 962 | .features = featureSet(&[_]Feature{ | ||
| 963 | .avr5, | ||
| 964 | }), | ||
| 965 | }; | ||
| 952 | pub const atmega325 = CpuModel{ | 966 | pub const atmega325 = CpuModel{ |
| 953 | .name = "atmega325", | 967 | .name = "atmega325", |
| 954 | .llvm_name = "atmega325", | 968 | .llvm_name = "atmega325", |
| ... | @@ -1019,6 +1033,13 @@ pub const cpu = struct { | ... | @@ -1019,6 +1033,13 @@ pub const cpu = struct { |
| 1019 | .avr5, | 1033 | .avr5, |
| 1020 | }), | 1034 | }), |
| 1021 | }; | 1035 | }; |
| 1036 | pub const atmega328pb = CpuModel{ | ||
| 1037 | .name = "atmega328pb", | ||
| 1038 | .llvm_name = "atmega328pb", | ||
| 1039 | .features = featureSet(&[_]Feature{ | ||
| 1040 | .avr5, | ||
| 1041 | }), | ||
| 1042 | }; | ||
| 1022 | pub const atmega329 = CpuModel{ | 1043 | pub const atmega329 = CpuModel{ |
| 1023 | .name = "atmega329", | 1044 | .name = "atmega329", |
| 1024 | .llvm_name = "atmega329", | 1045 | .llvm_name = "atmega329", |
| ... | @@ -1166,6 +1187,13 @@ pub const cpu = struct { | ... | @@ -1166,6 +1187,13 @@ pub const cpu = struct { |
| 1166 | .avr4, | 1187 | .avr4, |
| 1167 | }), | 1188 | }), |
| 1168 | }; | 1189 | }; |
| 1190 | pub const atmega48pb = CpuModel{ | ||
| 1191 | .name = "atmega48pb", | ||
| 1192 | .llvm_name = "atmega48pb", | ||
| 1193 | .features = featureSet(&[_]Feature{ | ||
| 1194 | .avr4, | ||
| 1195 | }), | ||
| 1196 | }; | ||
| 1169 | pub const atmega64 = CpuModel{ | 1197 | pub const atmega64 = CpuModel{ |
| 1170 | .name = "atmega64", | 1198 | .name = "atmega64", |
| 1171 | .llvm_name = "atmega64", | 1199 | .llvm_name = "atmega64", |
| ... | @@ -1338,7 +1366,11 @@ pub const cpu = struct { | ... | @@ -1338,7 +1366,11 @@ pub const cpu = struct { |
| 1338 | .name = "atmega8", | 1366 | .name = "atmega8", |
| 1339 | .llvm_name = "atmega8", | 1367 | .llvm_name = "atmega8", |
| 1340 | .features = featureSet(&[_]Feature{ | 1368 | .features = featureSet(&[_]Feature{ |
| 1341 | .avr4, | 1369 | .avr2, |
| 1370 | .lpmx, | ||
| 1371 | .movw, | ||
| 1372 | .mul, | ||
| 1373 | .spm, | ||
| 1342 | }), | 1374 | }), |
| 1343 | }; | 1375 | }; |
| 1344 | pub const atmega8515 = CpuModel{ | 1376 | pub const atmega8515 = CpuModel{ |
| ... | @@ -1391,11 +1423,22 @@ pub const cpu = struct { | ... | @@ -1391,11 +1423,22 @@ pub const cpu = struct { |
| 1391 | .avr4, | 1423 | .avr4, |
| 1392 | }), | 1424 | }), |
| 1393 | }; | 1425 | }; |
| 1426 | pub const atmega88pb = CpuModel{ | ||
| 1427 | .name = "atmega88pb", | ||
| 1428 | .llvm_name = "atmega88pb", | ||
| 1429 | .features = featureSet(&[_]Feature{ | ||
| 1430 | .avr4, | ||
| 1431 | }), | ||
| 1432 | }; | ||
| 1394 | pub const atmega8a = CpuModel{ | 1433 | pub const atmega8a = CpuModel{ |
| 1395 | .name = "atmega8a", | 1434 | .name = "atmega8a", |
| 1396 | .llvm_name = "atmega8a", | 1435 | .llvm_name = "atmega8a", |
| 1397 | .features = featureSet(&[_]Feature{ | 1436 | .features = featureSet(&[_]Feature{ |
| 1398 | .avr4, | 1437 | .avr2, |
| 1438 | .lpmx, | ||
| 1439 | .movw, | ||
| 1440 | .mul, | ||
| 1441 | .spm, | ||
| 1399 | }), | 1442 | }), |
| 1400 | }; | 1443 | }; |
| 1401 | pub const atmega8hva = CpuModel{ | 1444 | pub const atmega8hva = CpuModel{ |
| ... | @@ -1595,6 +1638,13 @@ pub const cpu = struct { | ... | @@ -1595,6 +1638,13 @@ pub const cpu = struct { |
| 1595 | .avr25, | 1638 | .avr25, |
| 1596 | }), | 1639 | }), |
| 1597 | }; | 1640 | }; |
| 1641 | pub const attiny441 = CpuModel{ | ||
| 1642 | .name = "attiny441", | ||
| 1643 | .llvm_name = "attiny441", | ||
| 1644 | .features = featureSet(&[_]Feature{ | ||
| 1645 | .avr25, | ||
| 1646 | }), | ||
| 1647 | }; | ||
| 1598 | pub const attiny44a = CpuModel{ | 1648 | pub const attiny44a = CpuModel{ |
| 1599 | .name = "attiny44a", | 1649 | .name = "attiny44a", |
| 1600 | .llvm_name = "attiny44a", | 1650 | .llvm_name = "attiny44a", |
| ... | @@ -1651,6 +1701,13 @@ pub const cpu = struct { | ... | @@ -1651,6 +1701,13 @@ pub const cpu = struct { |
| 1651 | .avr25, | 1701 | .avr25, |
| 1652 | }), | 1702 | }), |
| 1653 | }; | 1703 | }; |
| 1704 | pub const attiny841 = CpuModel{ | ||
| 1705 | .name = "attiny841", | ||
| 1706 | .llvm_name = "attiny841", | ||
| 1707 | .features = featureSet(&[_]Feature{ | ||
| 1708 | .avr25, | ||
| 1709 | }), | ||
| 1710 | }; | ||
| 1654 | pub const attiny84a = CpuModel{ | 1711 | pub const attiny84a = CpuModel{ |
| 1655 | .name = "attiny84a", | 1712 | .name = "attiny84a", |
| 1656 | .llvm_name = "attiny84a", | 1713 | .llvm_name = "attiny84a", |
| ... | @@ -1802,7 +1859,7 @@ pub const cpu = struct { | ... | @@ -1802,7 +1859,7 @@ pub const cpu = struct { |
| 1802 | .name = "atxmega16e5", | 1859 | .name = "atxmega16e5", |
| 1803 | .llvm_name = "atxmega16e5", | 1860 | .llvm_name = "atxmega16e5", |
| 1804 | .features = featureSet(&[_]Feature{ | 1861 | .features = featureSet(&[_]Feature{ |
| 1805 | .xmega, | 1862 | .xmegau, |
| 1806 | }), | 1863 | }), |
| 1807 | }; | 1864 | }; |
| 1808 | pub const atxmega192a3 = CpuModel{ | 1865 | pub const atxmega192a3 = CpuModel{ |
| ... | @@ -1907,7 +1964,7 @@ pub const cpu = struct { | ... | @@ -1907,7 +1964,7 @@ pub const cpu = struct { |
| 1907 | .name = "atxmega32e5", | 1964 | .name = "atxmega32e5", |
| 1908 | .llvm_name = "atxmega32e5", | 1965 | .llvm_name = "atxmega32e5", |
| 1909 | .features = featureSet(&[_]Feature{ | 1966 | .features = featureSet(&[_]Feature{ |
| 1910 | .xmega, | 1967 | .xmegau, |
| 1911 | }), | 1968 | }), |
| 1912 | }; | 1969 | }; |
| 1913 | pub const atxmega32x1 = CpuModel{ | 1970 | pub const atxmega32x1 = CpuModel{ |
| ... | @@ -2005,7 +2062,7 @@ pub const cpu = struct { | ... | @@ -2005,7 +2062,7 @@ pub const cpu = struct { |
| 2005 | .name = "atxmega8e5", | 2062 | .name = "atxmega8e5", |
| 2006 | .llvm_name = "atxmega8e5", | 2063 | .llvm_name = "atxmega8e5", |
| 2007 | .features = featureSet(&[_]Feature{ | 2064 | .features = featureSet(&[_]Feature{ |
| 2008 | .xmega, | 2065 | .xmegau, |
| 2009 | }), | 2066 | }), |
| 2010 | }; | 2067 | }; |
| 2011 | pub const avr1 = CpuModel{ | 2068 | pub const avr1 = CpuModel{ |
lib/std/target/bpf.zig+1| ... | @@ -16,6 +16,7 @@ pub const Feature = enum { | ... | @@ -16,6 +16,7 @@ pub const Feature = enum { |
| 16 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 16 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 17 | 17 | ||
| 18 | pub const all_features = blk: { | 18 | pub const all_features = blk: { |
| 19 | @setEvalBranchQuota(10000); | ||
| 19 | const len = @typeInfo(Feature).Enum.fields.len; | 20 | const len = @typeInfo(Feature).Enum.fields.len; |
| 20 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 21 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 21 | var result: [len]CpuFeature = undefined; | 22 | var result: [len]CpuFeature = undefined; |
lib/std/target/hexagon.zig+1| ... | @@ -44,6 +44,7 @@ pub const Feature = enum { | ... | @@ -44,6 +44,7 @@ pub const Feature = enum { |
| 44 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 44 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 45 | 45 | ||
| 46 | pub const all_features = blk: { | 46 | pub const all_features = blk: { |
| 47 | @setEvalBranchQuota(10000); | ||
| 47 | const len = @typeInfo(Feature).Enum.fields.len; | 48 | const len = @typeInfo(Feature).Enum.fields.len; |
| 48 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 49 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 49 | var result: [len]CpuFeature = undefined; | 50 | var result: [len]CpuFeature = undefined; |
lib/std/target/mips.zig+1| ... | @@ -65,6 +65,7 @@ pub const Feature = enum { | ... | @@ -65,6 +65,7 @@ pub const Feature = enum { |
| 65 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 65 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 66 | 66 | ||
| 67 | pub const all_features = blk: { | 67 | pub const all_features = blk: { |
| 68 | @setEvalBranchQuota(10000); | ||
| 68 | const len = @typeInfo(Feature).Enum.fields.len; | 69 | const len = @typeInfo(Feature).Enum.fields.len; |
| 69 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 70 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 70 | var result: [len]CpuFeature = undefined; | 71 | var result: [len]CpuFeature = undefined; |
lib/std/target/msp430.zig+1| ... | @@ -17,6 +17,7 @@ pub const Feature = enum { | ... | @@ -17,6 +17,7 @@ pub const Feature = enum { |
| 17 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 17 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 18 | 18 | ||
| 19 | pub const all_features = blk: { | 19 | pub const all_features = blk: { |
| 20 | @setEvalBranchQuota(10000); | ||
| 20 | const len = @typeInfo(Feature).Enum.fields.len; | 21 | const len = @typeInfo(Feature).Enum.fields.len; |
| 21 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 22 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 22 | var result: [len]CpuFeature = undefined; | 23 | var result: [len]CpuFeature = undefined; |
lib/std/target/nvptx.zig+1| ... | @@ -41,6 +41,7 @@ pub const Feature = enum { | ... | @@ -41,6 +41,7 @@ pub const Feature = enum { |
| 41 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 41 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 42 | 42 | ||
| 43 | pub const all_features = blk: { | 43 | pub const all_features = blk: { |
| 44 | @setEvalBranchQuota(10000); | ||
| 44 | const len = @typeInfo(Feature).Enum.fields.len; | 45 | const len = @typeInfo(Feature).Enum.fields.len; |
| 45 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 46 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 46 | var result: [len]CpuFeature = undefined; | 47 | var result: [len]CpuFeature = undefined; |
lib/std/target/powerpc.zig+66-62| ... | @@ -32,6 +32,7 @@ pub const Feature = enum { | ... | @@ -32,6 +32,7 @@ pub const Feature = enum { |
| 32 | fsqrt, | 32 | fsqrt, |
| 33 | fuse_addi_load, | 33 | fuse_addi_load, |
| 34 | fuse_addis_load, | 34 | fuse_addis_load, |
| 35 | fuse_store, | ||
| 35 | fusion, | 36 | fusion, |
| 36 | hard_float, | 37 | hard_float, |
| 37 | htm, | 38 | htm, |
| ... | @@ -44,7 +45,9 @@ pub const Feature = enum { | ... | @@ -44,7 +45,9 @@ pub const Feature = enum { |
| 44 | lfiwax, | 45 | lfiwax, |
| 45 | longcall, | 46 | longcall, |
| 46 | mfocrf, | 47 | mfocrf, |
| 48 | mma, | ||
| 47 | msync, | 49 | msync, |
| 50 | paired_vector_memops, | ||
| 48 | partword_atomics, | 51 | partword_atomics, |
| 49 | pcrelative_memops, | 52 | pcrelative_memops, |
| 50 | popcntd, | 53 | popcntd, |
| ... | @@ -59,7 +62,6 @@ pub const Feature = enum { | ... | @@ -59,7 +62,6 @@ pub const Feature = enum { |
| 59 | ppc6xx, | 62 | ppc6xx, |
| 60 | predictable_select_expensive, | 63 | predictable_select_expensive, |
| 61 | prefix_instrs, | 64 | prefix_instrs, |
| 62 | qpx, | ||
| 63 | recipprec, | 65 | recipprec, |
| 64 | secure_plt, | 66 | secure_plt, |
| 65 | slow_popcntd, | 67 | slow_popcntd, |
| ... | @@ -73,6 +75,7 @@ pub const Feature = enum { | ... | @@ -73,6 +75,7 @@ pub const Feature = enum { |
| 73 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 75 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 74 | 76 | ||
| 75 | pub const all_features = blk: { | 77 | pub const all_features = blk: { |
| 78 | @setEvalBranchQuota(10000); | ||
| 76 | const len = @typeInfo(Feature).Enum.fields.len; | 79 | const len = @typeInfo(Feature).Enum.fields.len; |
| 77 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 80 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 78 | var result: [len]CpuFeature = undefined; | 81 | var result: [len]CpuFeature = undefined; |
| ... | @@ -228,6 +231,13 @@ pub const all_features = blk: { | ... | @@ -228,6 +231,13 @@ pub const all_features = blk: { |
| 228 | .fusion, | 231 | .fusion, |
| 229 | }), | 232 | }), |
| 230 | }; | 233 | }; |
| 234 | result[@enumToInt(Feature.fuse_store)] = .{ | ||
| 235 | .llvm_name = "fuse-store", | ||
| 236 | .description = "Target supports store clustering", | ||
| 237 | .dependencies = featureSet(&[_]Feature{ | ||
| 238 | .fusion, | ||
| 239 | }), | ||
| 240 | }; | ||
| 231 | result[@enumToInt(Feature.fusion)] = .{ | 241 | result[@enumToInt(Feature.fusion)] = .{ |
| 232 | .llvm_name = "fusion", | 242 | .llvm_name = "fusion", |
| 233 | .description = "Target supports instruction fusion", | 243 | .description = "Target supports instruction fusion", |
| ... | @@ -292,6 +302,15 @@ pub const all_features = blk: { | ... | @@ -292,6 +302,15 @@ pub const all_features = blk: { |
| 292 | .description = "Enable the MFOCRF instruction", | 302 | .description = "Enable the MFOCRF instruction", |
| 293 | .dependencies = featureSet(&[_]Feature{}), | 303 | .dependencies = featureSet(&[_]Feature{}), |
| 294 | }; | 304 | }; |
| 305 | result[@enumToInt(Feature.mma)] = .{ | ||
| 306 | .llvm_name = "mma", | ||
| 307 | .description = "Enable MMA instructions", | ||
| 308 | .dependencies = featureSet(&[_]Feature{ | ||
| 309 | .paired_vector_memops, | ||
| 310 | .power8_vector, | ||
| 311 | .power9_altivec, | ||
| 312 | }), | ||
| 313 | }; | ||
| 295 | result[@enumToInt(Feature.msync)] = .{ | 314 | result[@enumToInt(Feature.msync)] = .{ |
| 296 | .llvm_name = "msync", | 315 | .llvm_name = "msync", |
| 297 | .description = "Has only the msync instruction instead of sync", | 316 | .description = "Has only the msync instruction instead of sync", |
| ... | @@ -299,6 +318,13 @@ pub const all_features = blk: { | ... | @@ -299,6 +318,13 @@ pub const all_features = blk: { |
| 299 | .booke, | 318 | .booke, |
| 300 | }), | 319 | }), |
| 301 | }; | 320 | }; |
| 321 | result[@enumToInt(Feature.paired_vector_memops)] = .{ | ||
| 322 | .llvm_name = "paired-vector-memops", | ||
| 323 | .description = "32Byte load and store instructions", | ||
| 324 | .dependencies = featureSet(&[_]Feature{ | ||
| 325 | .isa_v30_instructions, | ||
| 326 | }), | ||
| 327 | }; | ||
| 302 | result[@enumToInt(Feature.partword_atomics)] = .{ | 328 | result[@enumToInt(Feature.partword_atomics)] = .{ |
| 303 | .llvm_name = "partword-atomics", | 329 | .llvm_name = "partword-atomics", |
| 304 | .description = "Enable l[bh]arx and st[bh]cx.", | 330 | .description = "Enable l[bh]arx and st[bh]cx.", |
| ... | @@ -309,6 +335,7 @@ pub const all_features = blk: { | ... | @@ -309,6 +335,7 @@ pub const all_features = blk: { |
| 309 | .description = "Enable PC relative Memory Ops", | 335 | .description = "Enable PC relative Memory Ops", |
| 310 | .dependencies = featureSet(&[_]Feature{ | 336 | .dependencies = featureSet(&[_]Feature{ |
| 311 | .isa_v30_instructions, | 337 | .isa_v30_instructions, |
| 338 | .prefix_instrs, | ||
| 312 | }), | 339 | }), |
| 313 | }; | 340 | }; |
| 314 | result[@enumToInt(Feature.popcntd)] = .{ | 341 | result[@enumToInt(Feature.popcntd)] = .{ |
| ... | @@ -390,13 +417,6 @@ pub const all_features = blk: { | ... | @@ -390,13 +417,6 @@ pub const all_features = blk: { |
| 390 | .power9_altivec, | 417 | .power9_altivec, |
| 391 | }), | 418 | }), |
| 392 | }; | 419 | }; |
| 393 | result[@enumToInt(Feature.qpx)] = .{ | ||
| 394 | .llvm_name = "qpx", | ||
| 395 | .description = "Enable QPX instructions", | ||
| 396 | .dependencies = featureSet(&[_]Feature{ | ||
| 397 | .fpu, | ||
| 398 | }), | ||
| 399 | }; | ||
| 400 | result[@enumToInt(Feature.recipprec)] = .{ | 420 | result[@enumToInt(Feature.recipprec)] = .{ |
| 401 | .llvm_name = "recipprec", | 421 | .llvm_name = "recipprec", |
| 402 | .description = "Assume higher precision reciprocal estimates", | 422 | .description = "Assume higher precision reciprocal estimates", |
| ... | @@ -452,8 +472,8 @@ pub const all_features = blk: { | ... | @@ -452,8 +472,8 @@ pub const all_features = blk: { |
| 452 | }; | 472 | }; |
| 453 | 473 | ||
| 454 | pub const cpu = struct { | 474 | pub const cpu = struct { |
| 455 | pub const @"ppc440" = CpuModel{ | 475 | pub const @"440" = CpuModel{ |
| 456 | .name = "ppc440", | 476 | .name = "440", |
| 457 | .llvm_name = "440", | 477 | .llvm_name = "440", |
| 458 | .features = featureSet(&[_]Feature{ | 478 | .features = featureSet(&[_]Feature{ |
| 459 | .booke, | 479 | .booke, |
| ... | @@ -464,8 +484,8 @@ pub const cpu = struct { | ... | @@ -464,8 +484,8 @@ pub const cpu = struct { |
| 464 | .msync, | 484 | .msync, |
| 465 | }), | 485 | }), |
| 466 | }; | 486 | }; |
| 467 | pub const @"ppc450" = CpuModel{ | 487 | pub const @"450" = CpuModel{ |
| 468 | .name = "ppc450", | 488 | .name = "450", |
| 469 | .llvm_name = "450", | 489 | .llvm_name = "450", |
| 470 | .features = featureSet(&[_]Feature{ | 490 | .features = featureSet(&[_]Feature{ |
| 471 | .booke, | 491 | .booke, |
| ... | @@ -476,70 +496,70 @@ pub const cpu = struct { | ... | @@ -476,70 +496,70 @@ pub const cpu = struct { |
| 476 | .msync, | 496 | .msync, |
| 477 | }), | 497 | }), |
| 478 | }; | 498 | }; |
| 479 | pub const @"ppc601" = CpuModel{ | 499 | pub const @"601" = CpuModel{ |
| 480 | .name = "ppc601", | 500 | .name = "601", |
| 481 | .llvm_name = "601", | 501 | .llvm_name = "601", |
| 482 | .features = featureSet(&[_]Feature{ | 502 | .features = featureSet(&[_]Feature{ |
| 483 | .fpu, | 503 | .fpu, |
| 484 | }), | 504 | }), |
| 485 | }; | 505 | }; |
| 486 | pub const @"ppc602" = CpuModel{ | 506 | pub const @"602" = CpuModel{ |
| 487 | .name = "ppc602", | 507 | .name = "602", |
| 488 | .llvm_name = "602", | 508 | .llvm_name = "602", |
| 489 | .features = featureSet(&[_]Feature{ | 509 | .features = featureSet(&[_]Feature{ |
| 490 | .fpu, | 510 | .fpu, |
| 491 | }), | 511 | }), |
| 492 | }; | 512 | }; |
| 493 | pub const @"ppc603" = CpuModel{ | 513 | pub const @"603" = CpuModel{ |
| 494 | .name = "ppc603", | 514 | .name = "603", |
| 495 | .llvm_name = "603", | 515 | .llvm_name = "603", |
| 496 | .features = featureSet(&[_]Feature{ | 516 | .features = featureSet(&[_]Feature{ |
| 497 | .fres, | 517 | .fres, |
| 498 | .frsqrte, | 518 | .frsqrte, |
| 499 | }), | 519 | }), |
| 500 | }; | 520 | }; |
| 501 | pub const @"ppc603e" = CpuModel{ | 521 | pub const @"603e" = CpuModel{ |
| 502 | .name = "ppc603e", | 522 | .name = "603e", |
| 503 | .llvm_name = "603e", | 523 | .llvm_name = "603e", |
| 504 | .features = featureSet(&[_]Feature{ | 524 | .features = featureSet(&[_]Feature{ |
| 505 | .fres, | 525 | .fres, |
| 506 | .frsqrte, | 526 | .frsqrte, |
| 507 | }), | 527 | }), |
| 508 | }; | 528 | }; |
| 509 | pub const @"ppc603ev" = CpuModel{ | 529 | pub const @"603ev" = CpuModel{ |
| 510 | .name = "ppc603ev", | 530 | .name = "603ev", |
| 511 | .llvm_name = "603ev", | 531 | .llvm_name = "603ev", |
| 512 | .features = featureSet(&[_]Feature{ | 532 | .features = featureSet(&[_]Feature{ |
| 513 | .fres, | 533 | .fres, |
| 514 | .frsqrte, | 534 | .frsqrte, |
| 515 | }), | 535 | }), |
| 516 | }; | 536 | }; |
| 517 | pub const @"ppc604" = CpuModel{ | 537 | pub const @"604" = CpuModel{ |
| 518 | .name = "ppc604", | 538 | .name = "604", |
| 519 | .llvm_name = "604", | 539 | .llvm_name = "604", |
| 520 | .features = featureSet(&[_]Feature{ | 540 | .features = featureSet(&[_]Feature{ |
| 521 | .fres, | 541 | .fres, |
| 522 | .frsqrte, | 542 | .frsqrte, |
| 523 | }), | 543 | }), |
| 524 | }; | 544 | }; |
| 525 | pub const @"ppc604e" = CpuModel{ | 545 | pub const @"604e" = CpuModel{ |
| 526 | .name = "ppc604e", | 546 | .name = "604e", |
| 527 | .llvm_name = "604e", | 547 | .llvm_name = "604e", |
| 528 | .features = featureSet(&[_]Feature{ | 548 | .features = featureSet(&[_]Feature{ |
| 529 | .fres, | 549 | .fres, |
| 530 | .frsqrte, | 550 | .frsqrte, |
| 531 | }), | 551 | }), |
| 532 | }; | 552 | }; |
| 533 | pub const @"ppc620" = CpuModel{ | 553 | pub const @"620" = CpuModel{ |
| 534 | .name = "ppc620", | 554 | .name = "620", |
| 535 | .llvm_name = "620", | 555 | .llvm_name = "620", |
| 536 | .features = featureSet(&[_]Feature{ | 556 | .features = featureSet(&[_]Feature{ |
| 537 | .fres, | 557 | .fres, |
| 538 | .frsqrte, | 558 | .frsqrte, |
| 539 | }), | 559 | }), |
| 540 | }; | 560 | }; |
| 541 | pub const @"ppc7400" = CpuModel{ | 561 | pub const @"7400" = CpuModel{ |
| 542 | .name = "ppc7400", | 562 | .name = "7400", |
| 543 | .llvm_name = "7400", | 563 | .llvm_name = "7400", |
| 544 | .features = featureSet(&[_]Feature{ | 564 | .features = featureSet(&[_]Feature{ |
| 545 | .altivec, | 565 | .altivec, |
| ... | @@ -547,8 +567,8 @@ pub const cpu = struct { | ... | @@ -547,8 +567,8 @@ pub const cpu = struct { |
| 547 | .frsqrte, | 567 | .frsqrte, |
| 548 | }), | 568 | }), |
| 549 | }; | 569 | }; |
| 550 | pub const @"ppc7450" = CpuModel{ | 570 | pub const @"7450" = CpuModel{ |
| 551 | .name = "ppc7450", | 571 | .name = "7450", |
| 552 | .llvm_name = "7450", | 572 | .llvm_name = "7450", |
| 553 | .features = featureSet(&[_]Feature{ | 573 | .features = featureSet(&[_]Feature{ |
| 554 | .altivec, | 574 | .altivec, |
| ... | @@ -556,16 +576,16 @@ pub const cpu = struct { | ... | @@ -556,16 +576,16 @@ pub const cpu = struct { |
| 556 | .frsqrte, | 576 | .frsqrte, |
| 557 | }), | 577 | }), |
| 558 | }; | 578 | }; |
| 559 | pub const @"ppc750" = CpuModel{ | 579 | pub const @"750" = CpuModel{ |
| 560 | .name = "ppc750", | 580 | .name = "750", |
| 561 | .llvm_name = "750", | 581 | .llvm_name = "750", |
| 562 | .features = featureSet(&[_]Feature{ | 582 | .features = featureSet(&[_]Feature{ |
| 563 | .fres, | 583 | .fres, |
| 564 | .frsqrte, | 584 | .frsqrte, |
| 565 | }), | 585 | }), |
| 566 | }; | 586 | }; |
| 567 | pub const @"ppc970" = CpuModel{ | 587 | pub const @"970" = CpuModel{ |
| 568 | .name = "ppc970", | 588 | .name = "970", |
| 569 | .llvm_name = "970", | 589 | .llvm_name = "970", |
| 570 | .features = featureSet(&[_]Feature{ | 590 | .features = featureSet(&[_]Feature{ |
| 571 | .@"64bit", | 591 | .@"64bit", |
| ... | @@ -602,32 +622,6 @@ pub const cpu = struct { | ... | @@ -602,32 +622,6 @@ pub const cpu = struct { |
| 602 | .stfiwx, | 622 | .stfiwx, |
| 603 | }), | 623 | }), |
| 604 | }; | 624 | }; |
| 605 | pub const a2q = CpuModel{ | ||
| 606 | .name = "a2q", | ||
| 607 | .llvm_name = "a2q", | ||
| 608 | .features = featureSet(&[_]Feature{ | ||
| 609 | .@"64bit", | ||
| 610 | .booke, | ||
| 611 | .cmpb, | ||
| 612 | .fcpsgn, | ||
| 613 | .fpcvt, | ||
| 614 | .fprnd, | ||
| 615 | .fre, | ||
| 616 | .fres, | ||
| 617 | .frsqrte, | ||
| 618 | .frsqrtes, | ||
| 619 | .fsqrt, | ||
| 620 | .icbt, | ||
| 621 | .isel, | ||
| 622 | .ldbrx, | ||
| 623 | .lfiwax, | ||
| 624 | .mfocrf, | ||
| 625 | .qpx, | ||
| 626 | .recipprec, | ||
| 627 | .slow_popcntd, | ||
| 628 | .stfiwx, | ||
| 629 | }), | ||
| 630 | }; | ||
| 631 | pub const e500 = CpuModel{ | 625 | pub const e500 = CpuModel{ |
| 632 | .name = "e500", | 626 | .name = "e500", |
| 633 | .llvm_name = "e500", | 627 | .llvm_name = "e500", |
| ... | @@ -681,6 +675,7 @@ pub const cpu = struct { | ... | @@ -681,6 +675,7 @@ pub const cpu = struct { |
| 681 | .frsqrte, | 675 | .frsqrte, |
| 682 | .frsqrtes, | 676 | .frsqrtes, |
| 683 | .fsqrt, | 677 | .fsqrt, |
| 678 | .fuse_store, | ||
| 684 | .htm, | 679 | .htm, |
| 685 | .icbt, | 680 | .icbt, |
| 686 | .isa_v30_instructions, | 681 | .isa_v30_instructions, |
| ... | @@ -689,6 +684,8 @@ pub const cpu = struct { | ... | @@ -689,6 +684,8 @@ pub const cpu = struct { |
| 689 | .ldbrx, | 684 | .ldbrx, |
| 690 | .lfiwax, | 685 | .lfiwax, |
| 691 | .mfocrf, | 686 | .mfocrf, |
| 687 | .mma, | ||
| 688 | .paired_vector_memops, | ||
| 692 | .partword_atomics, | 689 | .partword_atomics, |
| 693 | .pcrelative_memops, | 690 | .pcrelative_memops, |
| 694 | .popcntd, | 691 | .popcntd, |
| ... | @@ -697,6 +694,8 @@ pub const cpu = struct { | ... | @@ -697,6 +694,8 @@ pub const cpu = struct { |
| 697 | .power8_vector, | 694 | .power8_vector, |
| 698 | .power9_altivec, | 695 | .power9_altivec, |
| 699 | .power9_vector, | 696 | .power9_vector, |
| 697 | .ppc_postra_sched, | ||
| 698 | .ppc_prera_sched, | ||
| 700 | .predictable_select_expensive, | 699 | .predictable_select_expensive, |
| 701 | .prefix_instrs, | 700 | .prefix_instrs, |
| 702 | .recipprec, | 701 | .recipprec, |
| ... | @@ -837,6 +836,7 @@ pub const cpu = struct { | ... | @@ -837,6 +836,7 @@ pub const cpu = struct { |
| 837 | .frsqrte, | 836 | .frsqrte, |
| 838 | .frsqrtes, | 837 | .frsqrtes, |
| 839 | .fsqrt, | 838 | .fsqrt, |
| 839 | .fuse_store, | ||
| 840 | .htm, | 840 | .htm, |
| 841 | .icbt, | 841 | .icbt, |
| 842 | .isa_v30_instructions, | 842 | .isa_v30_instructions, |
| ... | @@ -845,6 +845,8 @@ pub const cpu = struct { | ... | @@ -845,6 +845,8 @@ pub const cpu = struct { |
| 845 | .ldbrx, | 845 | .ldbrx, |
| 846 | .lfiwax, | 846 | .lfiwax, |
| 847 | .mfocrf, | 847 | .mfocrf, |
| 848 | .mma, | ||
| 849 | .paired_vector_memops, | ||
| 848 | .partword_atomics, | 850 | .partword_atomics, |
| 849 | .pcrelative_memops, | 851 | .pcrelative_memops, |
| 850 | .popcntd, | 852 | .popcntd, |
| ... | @@ -853,6 +855,8 @@ pub const cpu = struct { | ... | @@ -853,6 +855,8 @@ pub const cpu = struct { |
| 853 | .power8_vector, | 855 | .power8_vector, |
| 854 | .power9_altivec, | 856 | .power9_altivec, |
| 855 | .power9_vector, | 857 | .power9_vector, |
| 858 | .ppc_postra_sched, | ||
| 859 | .ppc_prera_sched, | ||
| 856 | .predictable_select_expensive, | 860 | .predictable_select_expensive, |
| 857 | .prefix_instrs, | 861 | .prefix_instrs, |
| 858 | .recipprec, | 862 | .recipprec, |
lib/std/target/riscv.zig+59-23| ... | @@ -25,6 +25,9 @@ pub const Feature = enum { | ... | @@ -25,6 +25,9 @@ pub const Feature = enum { |
| 25 | experimental_zbr, | 25 | experimental_zbr, |
| 26 | experimental_zbs, | 26 | experimental_zbs, |
| 27 | experimental_zbt, | 27 | experimental_zbt, |
| 28 | experimental_zfh, | ||
| 29 | experimental_zvamo, | ||
| 30 | experimental_zvlsseg, | ||
| 28 | f, | 31 | f, |
| 29 | m, | 32 | m, |
| 30 | no_rvc_hints, | 33 | no_rvc_hints, |
| ... | @@ -66,6 +69,7 @@ pub const Feature = enum { | ... | @@ -66,6 +69,7 @@ pub const Feature = enum { |
| 66 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 69 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 67 | 70 | ||
| 68 | pub const all_features = blk: { | 71 | pub const all_features = blk: { |
| 72 | @setEvalBranchQuota(10000); | ||
| 69 | const len = @typeInfo(Feature).Enum.fields.len; | 73 | const len = @typeInfo(Feature).Enum.fields.len; |
| 70 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 74 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 71 | var result: [len]CpuFeature = undefined; | 75 | var result: [len]CpuFeature = undefined; |
| ... | @@ -168,6 +172,27 @@ pub const all_features = blk: { | ... | @@ -168,6 +172,27 @@ pub const all_features = blk: { |
| 168 | .description = "'Zbt' (Ternary 'B' Instructions)", | 172 | .description = "'Zbt' (Ternary 'B' Instructions)", |
| 169 | .dependencies = featureSet(&[_]Feature{}), | 173 | .dependencies = featureSet(&[_]Feature{}), |
| 170 | }; | 174 | }; |
| 175 | result[@enumToInt(Feature.experimental_zfh)] = .{ | ||
| 176 | .llvm_name = "experimental-zfh", | ||
| 177 | .description = "'Zfh' (Half-Precision Floating-Point)", | ||
| 178 | .dependencies = featureSet(&[_]Feature{ | ||
| 179 | .f, | ||
| 180 | }), | ||
| 181 | }; | ||
| 182 | result[@enumToInt(Feature.experimental_zvamo)] = .{ | ||
| 183 | .llvm_name = "experimental-zvamo", | ||
| 184 | .description = "'Zvamo'(Vector AMO Operations)", | ||
| 185 | .dependencies = featureSet(&[_]Feature{ | ||
| 186 | .experimental_v, | ||
| 187 | }), | ||
| 188 | }; | ||
| 189 | result[@enumToInt(Feature.experimental_zvlsseg)] = .{ | ||
| 190 | .llvm_name = "experimental-zvlsseg", | ||
| 191 | .description = "'Zvlsseg' (Vector segment load/store instructions)", | ||
| 192 | .dependencies = featureSet(&[_]Feature{ | ||
| 193 | .experimental_v, | ||
| 194 | }), | ||
| 195 | }; | ||
| 171 | result[@enumToInt(Feature.f)] = .{ | 196 | result[@enumToInt(Feature.f)] = .{ |
| 172 | .llvm_name = "f", | 197 | .llvm_name = "f", |
| 173 | .description = "'F' (Single-Precision Floating-Point)", | 198 | .description = "'F' (Single-Precision Floating-Point)", |
| ... | @@ -357,29 +382,6 @@ pub const all_features = blk: { | ... | @@ -357,29 +382,6 @@ pub const all_features = blk: { |
| 357 | }; | 382 | }; |
| 358 | 383 | ||
| 359 | pub const cpu = struct { | 384 | pub const cpu = struct { |
| 360 | pub const baseline_rv32 = CpuModel{ | ||
| 361 | .name = "baseline_rv32", | ||
| 362 | .llvm_name = null, | ||
| 363 | .features = featureSet(&[_]Feature{ | ||
| 364 | .a, | ||
| 365 | .c, | ||
| 366 | .d, | ||
| 367 | .f, | ||
| 368 | .m, | ||
| 369 | }), | ||
| 370 | }; | ||
| 371 | pub const baseline_rv64 = CpuModel{ | ||
| 372 | .name = "baseline_rv64", | ||
| 373 | .llvm_name = null, | ||
| 374 | .features = featureSet(&[_]Feature{ | ||
| 375 | .@"64bit", | ||
| 376 | .a, | ||
| 377 | .c, | ||
| 378 | .d, | ||
| 379 | .f, | ||
| 380 | .m, | ||
| 381 | }), | ||
| 382 | }; | ||
| 383 | pub const generic_rv32 = CpuModel{ | 385 | pub const generic_rv32 = CpuModel{ |
| 384 | .name = "generic_rv32", | 386 | .name = "generic_rv32", |
| 385 | .llvm_name = "generic-rv32", | 387 | .llvm_name = "generic-rv32", |
| ... | @@ -404,6 +406,18 @@ pub const cpu = struct { | ... | @@ -404,6 +406,18 @@ pub const cpu = struct { |
| 404 | .@"64bit", | 406 | .@"64bit", |
| 405 | }), | 407 | }), |
| 406 | }; | 408 | }; |
| 409 | pub const sifive_7_rv32 = CpuModel{ | ||
| 410 | .name = "sifive_7_rv32", | ||
| 411 | .llvm_name = "sifive-7-rv32", | ||
| 412 | .features = featureSet(&[_]Feature{}), | ||
| 413 | }; | ||
| 414 | pub const sifive_7_rv64 = CpuModel{ | ||
| 415 | .name = "sifive_7_rv64", | ||
| 416 | .llvm_name = "sifive-7-rv64", | ||
| 417 | .features = featureSet(&[_]Feature{ | ||
| 418 | .@"64bit", | ||
| 419 | }), | ||
| 420 | }; | ||
| 407 | pub const sifive_e31 = CpuModel{ | 421 | pub const sifive_e31 = CpuModel{ |
| 408 | .name = "sifive_e31", | 422 | .name = "sifive_e31", |
| 409 | .llvm_name = "sifive-e31", | 423 | .llvm_name = "sifive-e31", |
| ... | @@ -413,6 +427,16 @@ pub const cpu = struct { | ... | @@ -413,6 +427,16 @@ pub const cpu = struct { |
| 413 | .m, | 427 | .m, |
| 414 | }), | 428 | }), |
| 415 | }; | 429 | }; |
| 430 | pub const sifive_e76 = CpuModel{ | ||
| 431 | .name = "sifive_e76", | ||
| 432 | .llvm_name = "sifive-e76", | ||
| 433 | .features = featureSet(&[_]Feature{ | ||
| 434 | .a, | ||
| 435 | .c, | ||
| 436 | .f, | ||
| 437 | .m, | ||
| 438 | }), | ||
| 439 | }; | ||
| 416 | pub const sifive_u54 = CpuModel{ | 440 | pub const sifive_u54 = CpuModel{ |
| 417 | .name = "sifive_u54", | 441 | .name = "sifive_u54", |
| 418 | .llvm_name = "sifive-u54", | 442 | .llvm_name = "sifive-u54", |
| ... | @@ -425,4 +449,16 @@ pub const cpu = struct { | ... | @@ -425,4 +449,16 @@ pub const cpu = struct { |
| 425 | .m, | 449 | .m, |
| 426 | }), | 450 | }), |
| 427 | }; | 451 | }; |
| 452 | pub const sifive_u74 = CpuModel{ | ||
| 453 | .name = "sifive_u74", | ||
| 454 | .llvm_name = "sifive-u74", | ||
| 455 | .features = featureSet(&[_]Feature{ | ||
| 456 | .@"64bit", | ||
| 457 | .a, | ||
| 458 | .c, | ||
| 459 | .d, | ||
| 460 | .f, | ||
| 461 | .m, | ||
| 462 | }), | ||
| 463 | }; | ||
| 428 | }; | 464 | }; |
lib/std/target/sparc.zig+6| ... | @@ -32,6 +32,7 @@ pub const Feature = enum { | ... | @@ -32,6 +32,7 @@ pub const Feature = enum { |
| 32 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 32 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 33 | 33 | ||
| 34 | pub const all_features = blk: { | 34 | pub const all_features = blk: { |
| 35 | @setEvalBranchQuota(10000); | ||
| 35 | const len = @typeInfo(Feature).Enum.fields.len; | 36 | const len = @typeInfo(Feature).Enum.fields.len; |
| 36 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 37 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 37 | var result: [len]CpuFeature = undefined; | 38 | var result: [len]CpuFeature = undefined; |
| ... | @@ -160,6 +161,11 @@ pub const cpu = struct { | ... | @@ -160,6 +161,11 @@ pub const cpu = struct { |
| 160 | .llvm_name = "f934", | 161 | .llvm_name = "f934", |
| 161 | .features = featureSet(&[_]Feature{}), | 162 | .features = featureSet(&[_]Feature{}), |
| 162 | }; | 163 | }; |
| 164 | pub const generic = CpuModel{ | ||
| 165 | .name = "generic", | ||
| 166 | .llvm_name = "generic", | ||
| 167 | .features = featureSet(&[_]Feature{}), | ||
| 168 | }; | ||
| 163 | pub const gr712rc = CpuModel{ | 169 | pub const gr712rc = CpuModel{ |
| 164 | .name = "gr712rc", | 170 | .name = "gr712rc", |
| 165 | .llvm_name = "gr712rc", | 171 | .llvm_name = "gr712rc", |
lib/std/target/systemz.zig+1| ... | @@ -49,6 +49,7 @@ pub const Feature = enum { | ... | @@ -49,6 +49,7 @@ pub const Feature = enum { |
| 49 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 49 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 50 | 50 | ||
| 51 | pub const all_features = blk: { | 51 | pub const all_features = blk: { |
| 52 | @setEvalBranchQuota(10000); | ||
| 52 | const len = @typeInfo(Feature).Enum.fields.len; | 53 | const len = @typeInfo(Feature).Enum.fields.len; |
| 53 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 54 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 54 | var result: [len]CpuFeature = undefined; | 55 | var result: [len]CpuFeature = undefined; |
lib/std/target/wasm.zig+1| ... | @@ -24,6 +24,7 @@ pub const Feature = enum { | ... | @@ -24,6 +24,7 @@ pub const Feature = enum { |
| 24 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 24 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 25 | 25 | ||
| 26 | pub const all_features = blk: { | 26 | pub const all_features = blk: { |
| 27 | @setEvalBranchQuota(10000); | ||
| 27 | const len = @typeInfo(Feature).Enum.fields.len; | 28 | const len = @typeInfo(Feature).Enum.fields.len; |
| 28 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 29 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 29 | var result: [len]CpuFeature = undefined; | 30 | var result: [len]CpuFeature = undefined; |
lib/std/target/x86.zig+330-423| ... | @@ -8,9 +8,12 @@ const CpuFeature = std.Target.Cpu.Feature; | ... | @@ -8,9 +8,12 @@ const CpuFeature = std.Target.Cpu.Feature; |
| 8 | const CpuModel = std.Target.Cpu.Model; | 8 | const CpuModel = std.Target.Cpu.Model; |
| 9 | 9 | ||
| 10 | pub const Feature = enum { | 10 | pub const Feature = enum { |
| 11 | @"16bit_mode", | ||
| 12 | @"32bit_mode", | ||
| 11 | @"3dnow", | 13 | @"3dnow", |
| 12 | @"3dnowa", | 14 | @"3dnowa", |
| 13 | @"64bit", | 15 | @"64bit", |
| 16 | @"64bit_mode", | ||
| 14 | adx, | 17 | adx, |
| 15 | aes, | 18 | aes, |
| 16 | amx_bf16, | 19 | amx_bf16, |
| ... | @@ -33,6 +36,7 @@ pub const Feature = enum { | ... | @@ -33,6 +36,7 @@ pub const Feature = enum { |
| 33 | avx512vnni, | 36 | avx512vnni, |
| 34 | avx512vp2intersect, | 37 | avx512vp2intersect, |
| 35 | avx512vpopcntdq, | 38 | avx512vpopcntdq, |
| 39 | avxvnni, | ||
| 36 | bmi, | 40 | bmi, |
| 37 | bmi2, | 41 | bmi2, |
| 38 | branchfusion, | 42 | branchfusion, |
| ... | @@ -64,11 +68,14 @@ pub const Feature = enum { | ... | @@ -64,11 +68,14 @@ pub const Feature = enum { |
| 64 | fma, | 68 | fma, |
| 65 | fma4, | 69 | fma4, |
| 66 | fsgsbase, | 70 | fsgsbase, |
| 71 | fsrm, | ||
| 67 | fxsr, | 72 | fxsr, |
| 68 | gfni, | 73 | gfni, |
| 74 | hreset, | ||
| 69 | idivl_to_divb, | 75 | idivl_to_divb, |
| 70 | idivq_to_divl, | 76 | idivq_to_divl, |
| 71 | invpcid, | 77 | invpcid, |
| 78 | kl, | ||
| 72 | lea_sp, | 79 | lea_sp, |
| 73 | lea_uses_ag, | 80 | lea_uses_ag, |
| 74 | lvi_cfi, | 81 | lvi_cfi, |
| ... | @@ -76,12 +83,10 @@ pub const Feature = enum { | ... | @@ -76,12 +83,10 @@ pub const Feature = enum { |
| 76 | lwp, | 83 | lwp, |
| 77 | lzcnt, | 84 | lzcnt, |
| 78 | macrofusion, | 85 | macrofusion, |
| 79 | merge_to_threeway_branch, | ||
| 80 | mmx, | 86 | mmx, |
| 81 | movbe, | 87 | movbe, |
| 82 | movdir64b, | 88 | movdir64b, |
| 83 | movdiri, | 89 | movdiri, |
| 84 | mpx, | ||
| 85 | mwaitx, | 90 | mwaitx, |
| 86 | nopl, | 91 | nopl, |
| 87 | pad_short_functions, | 92 | pad_short_functions, |
| ... | @@ -129,6 +134,7 @@ pub const Feature = enum { | ... | @@ -129,6 +134,7 @@ pub const Feature = enum { |
| 129 | ssse3, | 134 | ssse3, |
| 130 | tbm, | 135 | tbm, |
| 131 | tsxldtrk, | 136 | tsxldtrk, |
| 137 | uintr, | ||
| 132 | use_aa, | 138 | use_aa, |
| 133 | use_glm_div_sqrt_costs, | 139 | use_glm_div_sqrt_costs, |
| 134 | vaes, | 140 | vaes, |
| ... | @@ -136,6 +142,7 @@ pub const Feature = enum { | ... | @@ -136,6 +142,7 @@ pub const Feature = enum { |
| 136 | vzeroupper, | 142 | vzeroupper, |
| 137 | waitpkg, | 143 | waitpkg, |
| 138 | wbnoinvd, | 144 | wbnoinvd, |
| 145 | widekl, | ||
| 139 | x87, | 146 | x87, |
| 140 | xop, | 147 | xop, |
| 141 | xsave, | 148 | xsave, |
| ... | @@ -147,9 +154,20 @@ pub const Feature = enum { | ... | @@ -147,9 +154,20 @@ pub const Feature = enum { |
| 147 | pub usingnamespace CpuFeature.feature_set_fns(Feature); | 154 | pub usingnamespace CpuFeature.feature_set_fns(Feature); |
| 148 | 155 | ||
| 149 | pub const all_features = blk: { | 156 | pub const all_features = blk: { |
| 157 | @setEvalBranchQuota(10000); | ||
| 150 | const len = @typeInfo(Feature).Enum.fields.len; | 158 | const len = @typeInfo(Feature).Enum.fields.len; |
| 151 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); | 159 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 152 | var result: [len]CpuFeature = undefined; | 160 | var result: [len]CpuFeature = undefined; |
| 161 | result[@enumToInt(Feature.@"16bit_mode")] = .{ | ||
| 162 | .llvm_name = "16bit-mode", | ||
| 163 | .description = "16-bit mode (i8086)", | ||
| 164 | .dependencies = featureSet(&[_]Feature{}), | ||
| 165 | }; | ||
| 166 | result[@enumToInt(Feature.@"32bit_mode")] = .{ | ||
| 167 | .llvm_name = "32bit-mode", | ||
| 168 | .description = "32-bit mode (80386)", | ||
| 169 | .dependencies = featureSet(&[_]Feature{}), | ||
| 170 | }; | ||
| 153 | result[@enumToInt(Feature.@"3dnow")] = .{ | 171 | result[@enumToInt(Feature.@"3dnow")] = .{ |
| 154 | .llvm_name = "3dnow", | 172 | .llvm_name = "3dnow", |
| 155 | .description = "Enable 3DNow! instructions", | 173 | .description = "Enable 3DNow! instructions", |
| ... | @@ -169,6 +187,11 @@ pub const all_features = blk: { | ... | @@ -169,6 +187,11 @@ pub const all_features = blk: { |
| 169 | .description = "Support 64-bit instructions", | 187 | .description = "Support 64-bit instructions", |
| 170 | .dependencies = featureSet(&[_]Feature{}), | 188 | .dependencies = featureSet(&[_]Feature{}), |
| 171 | }; | 189 | }; |
| 190 | result[@enumToInt(Feature.@"64bit_mode")] = .{ | ||
| 191 | .llvm_name = "64bit-mode", | ||
| 192 | .description = "64-bit mode (x86_64)", | ||
| 193 | .dependencies = featureSet(&[_]Feature{}), | ||
| 194 | }; | ||
| 172 | result[@enumToInt(Feature.adx)] = .{ | 195 | result[@enumToInt(Feature.adx)] = .{ |
| 173 | .llvm_name = "adx", | 196 | .llvm_name = "adx", |
| 174 | .description = "Support ADX instructions", | 197 | .description = "Support ADX instructions", |
| ... | @@ -321,6 +344,13 @@ pub const all_features = blk: { | ... | @@ -321,6 +344,13 @@ pub const all_features = blk: { |
| 321 | .avx512f, | 344 | .avx512f, |
| 322 | }), | 345 | }), |
| 323 | }; | 346 | }; |
| 347 | result[@enumToInt(Feature.avxvnni)] = .{ | ||
| 348 | .llvm_name = "avxvnni", | ||
| 349 | .description = "Support AVX_VNNI encoding", | ||
| 350 | .dependencies = featureSet(&[_]Feature{ | ||
| 351 | .avx2, | ||
| 352 | }), | ||
| 353 | }; | ||
| 324 | result[@enumToInt(Feature.bmi)] = .{ | 354 | result[@enumToInt(Feature.bmi)] = .{ |
| 325 | .llvm_name = "bmi", | 355 | .llvm_name = "bmi", |
| 326 | .description = "Support BMI instructions", | 356 | .description = "Support BMI instructions", |
| ... | @@ -485,6 +515,11 @@ pub const all_features = blk: { | ... | @@ -485,6 +515,11 @@ pub const all_features = blk: { |
| 485 | .description = "Support FS/GS Base instructions", | 515 | .description = "Support FS/GS Base instructions", |
| 486 | .dependencies = featureSet(&[_]Feature{}), | 516 | .dependencies = featureSet(&[_]Feature{}), |
| 487 | }; | 517 | }; |
| 518 | result[@enumToInt(Feature.fsrm)] = .{ | ||
| 519 | .llvm_name = "fsrm", | ||
| 520 | .description = "REP MOVSB of short lengths is faster", | ||
| 521 | .dependencies = featureSet(&[_]Feature{}), | ||
| 522 | }; | ||
| 488 | result[@enumToInt(Feature.fxsr)] = .{ | 523 | result[@enumToInt(Feature.fxsr)] = .{ |
| 489 | .llvm_name = "fxsr", | 524 | .llvm_name = "fxsr", |
| 490 | .description = "Support fxsave/fxrestore instructions", | 525 | .description = "Support fxsave/fxrestore instructions", |
| ... | @@ -497,6 +532,11 @@ pub const all_features = blk: { | ... | @@ -497,6 +532,11 @@ pub const all_features = blk: { |
| 497 | .sse2, | 532 | .sse2, |
| 498 | }), | 533 | }), |
| 499 | }; | 534 | }; |
| 535 | result[@enumToInt(Feature.hreset)] = .{ | ||
| 536 | .llvm_name = "hreset", | ||
| 537 | .description = "Has hreset instruction", | ||
| 538 | .dependencies = featureSet(&[_]Feature{}), | ||
| 539 | }; | ||
| 500 | result[@enumToInt(Feature.idivl_to_divb)] = .{ | 540 | result[@enumToInt(Feature.idivl_to_divb)] = .{ |
| 501 | .llvm_name = "idivl-to-divb", | 541 | .llvm_name = "idivl-to-divb", |
| 502 | .description = "Use 8-bit divide for positive values less than 256", | 542 | .description = "Use 8-bit divide for positive values less than 256", |
| ... | @@ -512,6 +552,13 @@ pub const all_features = blk: { | ... | @@ -512,6 +552,13 @@ pub const all_features = blk: { |
| 512 | .description = "Invalidate Process-Context Identifier", | 552 | .description = "Invalidate Process-Context Identifier", |
| 513 | .dependencies = featureSet(&[_]Feature{}), | 553 | .dependencies = featureSet(&[_]Feature{}), |
| 514 | }; | 554 | }; |
| 555 | result[@enumToInt(Feature.kl)] = .{ | ||
| 556 | .llvm_name = "kl", | ||
| 557 | .description = "Support Key Locker kl Instructions", | ||
| 558 | .dependencies = featureSet(&[_]Feature{ | ||
| 559 | .sse2, | ||
| 560 | }), | ||
| 561 | }; | ||
| 515 | result[@enumToInt(Feature.lea_sp)] = .{ | 562 | result[@enumToInt(Feature.lea_sp)] = .{ |
| 516 | .llvm_name = "lea-sp", | 563 | .llvm_name = "lea-sp", |
| 517 | .description = "Use LEA for adjusting the stack pointer", | 564 | .description = "Use LEA for adjusting the stack pointer", |
| ... | @@ -547,11 +594,6 @@ pub const all_features = blk: { | ... | @@ -547,11 +594,6 @@ pub const all_features = blk: { |
| 547 | .description = "Various instructions can be fused with conditional branches", | 594 | .description = "Various instructions can be fused with conditional branches", |
| 548 | .dependencies = featureSet(&[_]Feature{}), | 595 | .dependencies = featureSet(&[_]Feature{}), |
| 549 | }; | 596 | }; |
| 550 | result[@enumToInt(Feature.merge_to_threeway_branch)] = .{ | ||
| 551 | .llvm_name = "merge-to-threeway-branch", | ||
| 552 | .description = "Merge branches to a three-way conditional branch", | ||
| 553 | .dependencies = featureSet(&[_]Feature{}), | ||
| 554 | }; | ||
| 555 | result[@enumToInt(Feature.mmx)] = .{ | 597 | result[@enumToInt(Feature.mmx)] = .{ |
| 556 | .llvm_name = "mmx", | 598 | .llvm_name = "mmx", |
| 557 | .description = "Enable MMX instructions", | 599 | .description = "Enable MMX instructions", |
| ... | @@ -572,11 +614,6 @@ pub const all_features = blk: { | ... | @@ -572,11 +614,6 @@ pub const all_features = blk: { |
| 572 | .description = "Support movdiri instruction", | 614 | .description = "Support movdiri instruction", |
| 573 | .dependencies = featureSet(&[_]Feature{}), | 615 | .dependencies = featureSet(&[_]Feature{}), |
| 574 | }; | 616 | }; |
| 575 | result[@enumToInt(Feature.mpx)] = .{ | ||
| 576 | .llvm_name = "mpx", | ||
| 577 | .description = "Deprecated. Support MPX instructions", | ||
| 578 | .dependencies = featureSet(&[_]Feature{}), | ||
| 579 | }; | ||
| 580 | result[@enumToInt(Feature.mwaitx)] = .{ | 617 | result[@enumToInt(Feature.mwaitx)] = .{ |
| 581 | .llvm_name = "mwaitx", | 618 | .llvm_name = "mwaitx", |
| 582 | .description = "Enable MONITORX/MWAITX timer functionality", | 619 | .description = "Enable MONITORX/MWAITX timer functionality", |
| ... | @@ -691,7 +728,7 @@ pub const all_features = blk: { | ... | @@ -691,7 +728,7 @@ pub const all_features = blk: { |
| 691 | }; | 728 | }; |
| 692 | result[@enumToInt(Feature.sahf)] = .{ | 729 | result[@enumToInt(Feature.sahf)] = .{ |
| 693 | .llvm_name = "sahf", | 730 | .llvm_name = "sahf", |
| 694 | .description = "Support LAHF and SAHF instructions", | 731 | .description = "Support LAHF and SAHF instructions in 64-bit mode", |
| 695 | .dependencies = featureSet(&[_]Feature{}), | 732 | .dependencies = featureSet(&[_]Feature{}), |
| 696 | }; | 733 | }; |
| 697 | result[@enumToInt(Feature.serialize)] = .{ | 734 | result[@enumToInt(Feature.serialize)] = .{ |
| ... | @@ -835,6 +872,11 @@ pub const all_features = blk: { | ... | @@ -835,6 +872,11 @@ pub const all_features = blk: { |
| 835 | .description = "Support TSXLDTRK instructions", | 872 | .description = "Support TSXLDTRK instructions", |
| 836 | .dependencies = featureSet(&[_]Feature{}), | 873 | .dependencies = featureSet(&[_]Feature{}), |
| 837 | }; | 874 | }; |
| 875 | result[@enumToInt(Feature.uintr)] = .{ | ||
| 876 | .llvm_name = "uintr", | ||
| 877 | .description = "Has UINTR Instructions", | ||
| 878 | .dependencies = featureSet(&[_]Feature{}), | ||
| 879 | }; | ||
| 838 | result[@enumToInt(Feature.use_aa)] = .{ | 880 | result[@enumToInt(Feature.use_aa)] = .{ |
| 839 | .llvm_name = "use-aa", | 881 | .llvm_name = "use-aa", |
| 840 | .description = "Use alias analysis during codegen", | 882 | .description = "Use alias analysis during codegen", |
| ... | @@ -876,6 +918,13 @@ pub const all_features = blk: { | ... | @@ -876,6 +918,13 @@ pub const all_features = blk: { |
| 876 | .description = "Write Back No Invalidate", | 918 | .description = "Write Back No Invalidate", |
| 877 | .dependencies = featureSet(&[_]Feature{}), | 919 | .dependencies = featureSet(&[_]Feature{}), |
| 878 | }; | 920 | }; |
| 921 | result[@enumToInt(Feature.widekl)] = .{ | ||
| 922 | .llvm_name = "widekl", | ||
| 923 | .description = "Support Key Locker wide Instructions", | ||
| 924 | .dependencies = featureSet(&[_]Feature{ | ||
| 925 | .kl, | ||
| 926 | }), | ||
| 927 | }; | ||
| 879 | result[@enumToInt(Feature.x87)] = .{ | 928 | result[@enumToInt(Feature.x87)] = .{ |
| 880 | .llvm_name = "x87", | 929 | .llvm_name = "x87", |
| 881 | .description = "Enable X87 float instructions", | 930 | .description = "Enable X87 float instructions", |
| ... | @@ -923,6 +972,53 @@ pub const all_features = blk: { | ... | @@ -923,6 +972,53 @@ pub const all_features = blk: { |
| 923 | }; | 972 | }; |
| 924 | 973 | ||
| 925 | pub const cpu = struct { | 974 | pub const cpu = struct { |
| 975 | pub const alderlake = CpuModel{ | ||
| 976 | .name = "alderlake", | ||
| 977 | .llvm_name = "alderlake", | ||
| 978 | .features = featureSet(&[_]Feature{ | ||
| 979 | .@"64bit", | ||
| 980 | .adx, | ||
| 981 | .aes, | ||
| 982 | .avx, | ||
| 983 | .avx2, | ||
| 984 | .avxvnni, | ||
| 985 | .bmi, | ||
| 986 | .bmi2, | ||
| 987 | .cldemote, | ||
| 988 | .clflushopt, | ||
| 989 | .cmov, | ||
| 990 | .cx16, | ||
| 991 | .cx8, | ||
| 992 | .ermsb, | ||
| 993 | .f16c, | ||
| 994 | .fma, | ||
| 995 | .fsgsbase, | ||
| 996 | .fxsr, | ||
| 997 | .hreset, | ||
| 998 | .invpcid, | ||
| 999 | .lzcnt, | ||
| 1000 | .mmx, | ||
| 1001 | .movbe, | ||
| 1002 | .nopl, | ||
| 1003 | .pclmul, | ||
| 1004 | .popcnt, | ||
| 1005 | .prfchw, | ||
| 1006 | .ptwrite, | ||
| 1007 | .rdrnd, | ||
| 1008 | .rdseed, | ||
| 1009 | .sahf, | ||
| 1010 | .serialize, | ||
| 1011 | .sgx, | ||
| 1012 | .sse2, | ||
| 1013 | .sse4_2, | ||
| 1014 | .waitpkg, | ||
| 1015 | .x87, | ||
| 1016 | .xsave, | ||
| 1017 | .xsavec, | ||
| 1018 | .xsaveopt, | ||
| 1019 | .xsaves, | ||
| 1020 | }), | ||
| 1021 | }; | ||
| 926 | pub const amdfam10 = CpuModel{ | 1022 | pub const amdfam10 = CpuModel{ |
| 927 | .name = "amdfam10", | 1023 | .name = "amdfam10", |
| 928 | .llvm_name = "amdfam10", | 1024 | .llvm_name = "amdfam10", |
| ... | @@ -932,16 +1028,13 @@ pub const cpu = struct { | ... | @@ -932,16 +1028,13 @@ pub const cpu = struct { |
| 932 | .cmov, | 1028 | .cmov, |
| 933 | .cx16, | 1029 | .cx16, |
| 934 | .cx8, | 1030 | .cx8, |
| 935 | .fast_scalar_shift_masks, | ||
| 936 | .fxsr, | 1031 | .fxsr, |
| 937 | .lzcnt, | 1032 | .lzcnt, |
| 938 | .nopl, | 1033 | .nopl, |
| 939 | .popcnt, | 1034 | .popcnt, |
| 940 | .prfchw, | 1035 | .prfchw, |
| 941 | .sahf, | 1036 | .sahf, |
| 942 | .slow_shld, | ||
| 943 | .sse4a, | 1037 | .sse4a, |
| 944 | .vzeroupper, | ||
| 945 | .x87, | 1038 | .x87, |
| 946 | }), | 1039 | }), |
| 947 | }; | 1040 | }; |
| ... | @@ -953,9 +1046,6 @@ pub const cpu = struct { | ... | @@ -953,9 +1046,6 @@ pub const cpu = struct { |
| 953 | .cmov, | 1046 | .cmov, |
| 954 | .cx8, | 1047 | .cx8, |
| 955 | .nopl, | 1048 | .nopl, |
| 956 | .slow_shld, | ||
| 957 | .slow_unaligned_mem_16, | ||
| 958 | .vzeroupper, | ||
| 959 | .x87, | 1049 | .x87, |
| 960 | }), | 1050 | }), |
| 961 | }; | 1051 | }; |
| ... | @@ -968,10 +1058,7 @@ pub const cpu = struct { | ... | @@ -968,10 +1058,7 @@ pub const cpu = struct { |
| 968 | .cx8, | 1058 | .cx8, |
| 969 | .fxsr, | 1059 | .fxsr, |
| 970 | .nopl, | 1060 | .nopl, |
| 971 | .slow_shld, | ||
| 972 | .slow_unaligned_mem_16, | ||
| 973 | .sse, | 1061 | .sse, |
| 974 | .vzeroupper, | ||
| 975 | .x87, | 1062 | .x87, |
| 976 | }), | 1063 | }), |
| 977 | }; | 1064 | }; |
| ... | @@ -983,13 +1070,9 @@ pub const cpu = struct { | ... | @@ -983,13 +1070,9 @@ pub const cpu = struct { |
| 983 | .@"64bit", | 1070 | .@"64bit", |
| 984 | .cmov, | 1071 | .cmov, |
| 985 | .cx8, | 1072 | .cx8, |
| 986 | .fast_scalar_shift_masks, | ||
| 987 | .fxsr, | 1073 | .fxsr, |
| 988 | .nopl, | 1074 | .nopl, |
| 989 | .slow_shld, | ||
| 990 | .slow_unaligned_mem_16, | ||
| 991 | .sse2, | 1075 | .sse2, |
| 992 | .vzeroupper, | ||
| 993 | .x87, | 1076 | .x87, |
| 994 | }), | 1077 | }), |
| 995 | }; | 1078 | }; |
| ... | @@ -1002,10 +1085,7 @@ pub const cpu = struct { | ... | @@ -1002,10 +1085,7 @@ pub const cpu = struct { |
| 1002 | .cx8, | 1085 | .cx8, |
| 1003 | .fxsr, | 1086 | .fxsr, |
| 1004 | .nopl, | 1087 | .nopl, |
| 1005 | .slow_shld, | ||
| 1006 | .slow_unaligned_mem_16, | ||
| 1007 | .sse, | 1088 | .sse, |
| 1008 | .vzeroupper, | ||
| 1009 | .x87, | 1089 | .x87, |
| 1010 | }), | 1090 | }), |
| 1011 | }; | 1091 | }; |
| ... | @@ -1017,9 +1097,6 @@ pub const cpu = struct { | ... | @@ -1017,9 +1097,6 @@ pub const cpu = struct { |
| 1017 | .cmov, | 1097 | .cmov, |
| 1018 | .cx8, | 1098 | .cx8, |
| 1019 | .nopl, | 1099 | .nopl, |
| 1020 | .slow_shld, | ||
| 1021 | .slow_unaligned_mem_16, | ||
| 1022 | .vzeroupper, | ||
| 1023 | .x87, | 1100 | .x87, |
| 1024 | }), | 1101 | }), |
| 1025 | }; | 1102 | }; |
| ... | @@ -1032,10 +1109,7 @@ pub const cpu = struct { | ... | @@ -1032,10 +1109,7 @@ pub const cpu = struct { |
| 1032 | .cx8, | 1109 | .cx8, |
| 1033 | .fxsr, | 1110 | .fxsr, |
| 1034 | .nopl, | 1111 | .nopl, |
| 1035 | .slow_shld, | ||
| 1036 | .slow_unaligned_mem_16, | ||
| 1037 | .sse, | 1112 | .sse, |
| 1038 | .vzeroupper, | ||
| 1039 | .x87, | 1113 | .x87, |
| 1040 | }), | 1114 | }), |
| 1041 | }; | 1115 | }; |
| ... | @@ -1047,13 +1121,9 @@ pub const cpu = struct { | ... | @@ -1047,13 +1121,9 @@ pub const cpu = struct { |
| 1047 | .@"64bit", | 1121 | .@"64bit", |
| 1048 | .cmov, | 1122 | .cmov, |
| 1049 | .cx8, | 1123 | .cx8, |
| 1050 | .fast_scalar_shift_masks, | ||
| 1051 | .fxsr, | 1124 | .fxsr, |
| 1052 | .nopl, | 1125 | .nopl, |
| 1053 | .slow_shld, | ||
| 1054 | .slow_unaligned_mem_16, | ||
| 1055 | .sse2, | 1126 | .sse2, |
| 1056 | .vzeroupper, | ||
| 1057 | .x87, | 1127 | .x87, |
| 1058 | }), | 1128 | }), |
| 1059 | }; | 1129 | }; |
| ... | @@ -1066,13 +1136,9 @@ pub const cpu = struct { | ... | @@ -1066,13 +1136,9 @@ pub const cpu = struct { |
| 1066 | .cmov, | 1136 | .cmov, |
| 1067 | .cx16, | 1137 | .cx16, |
| 1068 | .cx8, | 1138 | .cx8, |
| 1069 | .fast_scalar_shift_masks, | ||
| 1070 | .fxsr, | 1139 | .fxsr, |
| 1071 | .nopl, | 1140 | .nopl, |
| 1072 | .slow_shld, | ||
| 1073 | .slow_unaligned_mem_16, | ||
| 1074 | .sse3, | 1141 | .sse3, |
| 1075 | .vzeroupper, | ||
| 1076 | .x87, | 1142 | .x87, |
| 1077 | }), | 1143 | }), |
| 1078 | }; | 1144 | }; |
| ... | @@ -1085,19 +1151,11 @@ pub const cpu = struct { | ... | @@ -1085,19 +1151,11 @@ pub const cpu = struct { |
| 1085 | .cx16, | 1151 | .cx16, |
| 1086 | .cx8, | 1152 | .cx8, |
| 1087 | .fxsr, | 1153 | .fxsr, |
| 1088 | .idivl_to_divb, | ||
| 1089 | .idivq_to_divl, | ||
| 1090 | .lea_sp, | ||
| 1091 | .lea_uses_ag, | ||
| 1092 | .mmx, | 1154 | .mmx, |
| 1093 | .movbe, | 1155 | .movbe, |
| 1094 | .nopl, | 1156 | .nopl, |
| 1095 | .pad_short_functions, | ||
| 1096 | .sahf, | 1157 | .sahf, |
| 1097 | .slow_two_mem_ops, | ||
| 1098 | .slow_unaligned_mem_16, | ||
| 1099 | .ssse3, | 1158 | .ssse3, |
| 1100 | .vzeroupper, | ||
| 1101 | .x87, | 1159 | .x87, |
| 1102 | }), | 1160 | }), |
| 1103 | }; | 1161 | }; |
| ... | @@ -1110,16 +1168,13 @@ pub const cpu = struct { | ... | @@ -1110,16 +1168,13 @@ pub const cpu = struct { |
| 1110 | .cmov, | 1168 | .cmov, |
| 1111 | .cx16, | 1169 | .cx16, |
| 1112 | .cx8, | 1170 | .cx8, |
| 1113 | .fast_scalar_shift_masks, | ||
| 1114 | .fxsr, | 1171 | .fxsr, |
| 1115 | .lzcnt, | 1172 | .lzcnt, |
| 1116 | .nopl, | 1173 | .nopl, |
| 1117 | .popcnt, | 1174 | .popcnt, |
| 1118 | .prfchw, | 1175 | .prfchw, |
| 1119 | .sahf, | 1176 | .sahf, |
| 1120 | .slow_shld, | ||
| 1121 | .sse4a, | 1177 | .sse4a, |
| 1122 | .vzeroupper, | ||
| 1123 | .x87, | 1178 | .x87, |
| 1124 | }), | 1179 | }), |
| 1125 | }; | 1180 | }; |
| ... | @@ -1129,12 +1184,9 @@ pub const cpu = struct { | ... | @@ -1129,12 +1184,9 @@ pub const cpu = struct { |
| 1129 | .features = featureSet(&[_]Feature{ | 1184 | .features = featureSet(&[_]Feature{ |
| 1130 | .@"64bit", | 1185 | .@"64bit", |
| 1131 | .aes, | 1186 | .aes, |
| 1132 | .branchfusion, | ||
| 1133 | .cmov, | 1187 | .cmov, |
| 1134 | .cx16, | 1188 | .cx16, |
| 1135 | .cx8, | 1189 | .cx8, |
| 1136 | .fast_11bytenop, | ||
| 1137 | .fast_scalar_shift_masks, | ||
| 1138 | .fxsr, | 1190 | .fxsr, |
| 1139 | .lwp, | 1191 | .lwp, |
| 1140 | .lzcnt, | 1192 | .lzcnt, |
| ... | @@ -1144,8 +1196,6 @@ pub const cpu = struct { | ... | @@ -1144,8 +1196,6 @@ pub const cpu = struct { |
| 1144 | .popcnt, | 1196 | .popcnt, |
| 1145 | .prfchw, | 1197 | .prfchw, |
| 1146 | .sahf, | 1198 | .sahf, |
| 1147 | .slow_shld, | ||
| 1148 | .vzeroupper, | ||
| 1149 | .x87, | 1199 | .x87, |
| 1150 | .xop, | 1200 | .xop, |
| 1151 | .xsave, | 1201 | .xsave, |
| ... | @@ -1158,14 +1208,11 @@ pub const cpu = struct { | ... | @@ -1158,14 +1208,11 @@ pub const cpu = struct { |
| 1158 | .@"64bit", | 1208 | .@"64bit", |
| 1159 | .aes, | 1209 | .aes, |
| 1160 | .bmi, | 1210 | .bmi, |
| 1161 | .branchfusion, | ||
| 1162 | .cmov, | 1211 | .cmov, |
| 1163 | .cx16, | 1212 | .cx16, |
| 1164 | .cx8, | 1213 | .cx8, |
| 1165 | .f16c, | 1214 | .f16c, |
| 1166 | .fast_11bytenop, | ||
| 1167 | .fast_bextr, | 1215 | .fast_bextr, |
| 1168 | .fast_scalar_shift_masks, | ||
| 1169 | .fma, | 1216 | .fma, |
| 1170 | .fxsr, | 1217 | .fxsr, |
| 1171 | .lwp, | 1218 | .lwp, |
| ... | @@ -1176,9 +1223,7 @@ pub const cpu = struct { | ... | @@ -1176,9 +1223,7 @@ pub const cpu = struct { |
| 1176 | .popcnt, | 1223 | .popcnt, |
| 1177 | .prfchw, | 1224 | .prfchw, |
| 1178 | .sahf, | 1225 | .sahf, |
| 1179 | .slow_shld, | ||
| 1180 | .tbm, | 1226 | .tbm, |
| 1181 | .vzeroupper, | ||
| 1182 | .x87, | 1227 | .x87, |
| 1183 | .xop, | 1228 | .xop, |
| 1184 | .xsave, | 1229 | .xsave, |
| ... | @@ -1191,14 +1236,11 @@ pub const cpu = struct { | ... | @@ -1191,14 +1236,11 @@ pub const cpu = struct { |
| 1191 | .@"64bit", | 1236 | .@"64bit", |
| 1192 | .aes, | 1237 | .aes, |
| 1193 | .bmi, | 1238 | .bmi, |
| 1194 | .branchfusion, | ||
| 1195 | .cmov, | 1239 | .cmov, |
| 1196 | .cx16, | 1240 | .cx16, |
| 1197 | .cx8, | 1241 | .cx8, |
| 1198 | .f16c, | 1242 | .f16c, |
| 1199 | .fast_11bytenop, | ||
| 1200 | .fast_bextr, | 1243 | .fast_bextr, |
| 1201 | .fast_scalar_shift_masks, | ||
| 1202 | .fma, | 1244 | .fma, |
| 1203 | .fsgsbase, | 1245 | .fsgsbase, |
| 1204 | .fxsr, | 1246 | .fxsr, |
| ... | @@ -1210,9 +1252,7 @@ pub const cpu = struct { | ... | @@ -1210,9 +1252,7 @@ pub const cpu = struct { |
| 1210 | .popcnt, | 1252 | .popcnt, |
| 1211 | .prfchw, | 1253 | .prfchw, |
| 1212 | .sahf, | 1254 | .sahf, |
| 1213 | .slow_shld, | ||
| 1214 | .tbm, | 1255 | .tbm, |
| 1215 | .vzeroupper, | ||
| 1216 | .x87, | 1256 | .x87, |
| 1217 | .xop, | 1257 | .xop, |
| 1218 | .xsave, | 1258 | .xsave, |
| ... | @@ -1228,14 +1268,11 @@ pub const cpu = struct { | ... | @@ -1228,14 +1268,11 @@ pub const cpu = struct { |
| 1228 | .avx2, | 1268 | .avx2, |
| 1229 | .bmi, | 1269 | .bmi, |
| 1230 | .bmi2, | 1270 | .bmi2, |
| 1231 | .branchfusion, | ||
| 1232 | .cmov, | 1271 | .cmov, |
| 1233 | .cx16, | 1272 | .cx16, |
| 1234 | .cx8, | 1273 | .cx8, |
| 1235 | .f16c, | 1274 | .f16c, |
| 1236 | .fast_11bytenop, | ||
| 1237 | .fast_bextr, | 1275 | .fast_bextr, |
| 1238 | .fast_scalar_shift_masks, | ||
| 1239 | .fma, | 1276 | .fma, |
| 1240 | .fsgsbase, | 1277 | .fsgsbase, |
| 1241 | .fxsr, | 1278 | .fxsr, |
| ... | @@ -1250,9 +1287,7 @@ pub const cpu = struct { | ... | @@ -1250,9 +1287,7 @@ pub const cpu = struct { |
| 1250 | .prfchw, | 1287 | .prfchw, |
| 1251 | .rdrnd, | 1288 | .rdrnd, |
| 1252 | .sahf, | 1289 | .sahf, |
| 1253 | .slow_shld, | ||
| 1254 | .tbm, | 1290 | .tbm, |
| 1255 | .vzeroupper, | ||
| 1256 | .x87, | 1291 | .x87, |
| 1257 | .xop, | 1292 | .xop, |
| 1258 | .xsave, | 1293 | .xsave, |
| ... | @@ -1268,19 +1303,11 @@ pub const cpu = struct { | ... | @@ -1268,19 +1303,11 @@ pub const cpu = struct { |
| 1268 | .cx16, | 1303 | .cx16, |
| 1269 | .cx8, | 1304 | .cx8, |
| 1270 | .fxsr, | 1305 | .fxsr, |
| 1271 | .idivl_to_divb, | ||
| 1272 | .idivq_to_divl, | ||
| 1273 | .lea_sp, | ||
| 1274 | .lea_uses_ag, | ||
| 1275 | .mmx, | 1306 | .mmx, |
| 1276 | .movbe, | 1307 | .movbe, |
| 1277 | .nopl, | 1308 | .nopl, |
| 1278 | .pad_short_functions, | ||
| 1279 | .sahf, | 1309 | .sahf, |
| 1280 | .slow_two_mem_ops, | ||
| 1281 | .slow_unaligned_mem_16, | ||
| 1282 | .ssse3, | 1310 | .ssse3, |
| 1283 | .vzeroupper, | ||
| 1284 | .x87, | 1311 | .x87, |
| 1285 | }), | 1312 | }), |
| 1286 | }; | 1313 | }; |
| ... | @@ -1299,20 +1326,11 @@ pub const cpu = struct { | ... | @@ -1299,20 +1326,11 @@ pub const cpu = struct { |
| 1299 | .cx8, | 1326 | .cx8, |
| 1300 | .ermsb, | 1327 | .ermsb, |
| 1301 | .f16c, | 1328 | .f16c, |
| 1302 | .false_deps_lzcnt_tzcnt, | ||
| 1303 | .false_deps_popcnt, | ||
| 1304 | .fast_15bytenop, | ||
| 1305 | .fast_scalar_fsqrt, | ||
| 1306 | .fast_shld_rotate, | ||
| 1307 | .fast_variable_shuffle, | ||
| 1308 | .fma, | 1329 | .fma, |
| 1309 | .fsgsbase, | 1330 | .fsgsbase, |
| 1310 | .fxsr, | 1331 | .fxsr, |
| 1311 | .idivq_to_divl, | ||
| 1312 | .invpcid, | 1332 | .invpcid, |
| 1313 | .lzcnt, | 1333 | .lzcnt, |
| 1314 | .macrofusion, | ||
| 1315 | .merge_to_threeway_branch, | ||
| 1316 | .mmx, | 1334 | .mmx, |
| 1317 | .movbe, | 1335 | .movbe, |
| 1318 | .nopl, | 1336 | .nopl, |
| ... | @@ -1322,9 +1340,8 @@ pub const cpu = struct { | ... | @@ -1322,9 +1340,8 @@ pub const cpu = struct { |
| 1322 | .rdrnd, | 1340 | .rdrnd, |
| 1323 | .rdseed, | 1341 | .rdseed, |
| 1324 | .sahf, | 1342 | .sahf, |
| 1325 | .slow_3ops_lea, | 1343 | .sse2, |
| 1326 | .sse4_2, | 1344 | .sse4_2, |
| 1327 | .vzeroupper, | ||
| 1328 | .x87, | 1345 | .x87, |
| 1329 | .xsave, | 1346 | .xsave, |
| 1330 | .xsaveopt, | 1347 | .xsaveopt, |
| ... | @@ -1338,9 +1355,6 @@ pub const cpu = struct { | ... | @@ -1338,9 +1355,6 @@ pub const cpu = struct { |
| 1338 | .cmov, | 1355 | .cmov, |
| 1339 | .cx16, | 1356 | .cx16, |
| 1340 | .cx8, | 1357 | .cx8, |
| 1341 | .fast_15bytenop, | ||
| 1342 | .fast_scalar_shift_masks, | ||
| 1343 | .fast_vector_shift_masks, | ||
| 1344 | .fxsr, | 1358 | .fxsr, |
| 1345 | .lzcnt, | 1359 | .lzcnt, |
| 1346 | .mmx, | 1360 | .mmx, |
| ... | @@ -1348,10 +1362,8 @@ pub const cpu = struct { | ... | @@ -1348,10 +1362,8 @@ pub const cpu = struct { |
| 1348 | .popcnt, | 1362 | .popcnt, |
| 1349 | .prfchw, | 1363 | .prfchw, |
| 1350 | .sahf, | 1364 | .sahf, |
| 1351 | .slow_shld, | ||
| 1352 | .sse4a, | 1365 | .sse4a, |
| 1353 | .ssse3, | 1366 | .ssse3, |
| 1354 | .vzeroupper, | ||
| 1355 | .x87, | 1367 | .x87, |
| 1356 | }), | 1368 | }), |
| 1357 | }; | 1369 | }; |
| ... | @@ -1367,12 +1379,6 @@ pub const cpu = struct { | ... | @@ -1367,12 +1379,6 @@ pub const cpu = struct { |
| 1367 | .cx16, | 1379 | .cx16, |
| 1368 | .cx8, | 1380 | .cx8, |
| 1369 | .f16c, | 1381 | .f16c, |
| 1370 | .fast_15bytenop, | ||
| 1371 | .fast_bextr, | ||
| 1372 | .fast_hops, | ||
| 1373 | .fast_lzcnt, | ||
| 1374 | .fast_scalar_shift_masks, | ||
| 1375 | .fast_vector_shift_masks, | ||
| 1376 | .fxsr, | 1382 | .fxsr, |
| 1377 | .lzcnt, | 1383 | .lzcnt, |
| 1378 | .mmx, | 1384 | .mmx, |
| ... | @@ -1382,7 +1388,6 @@ pub const cpu = struct { | ... | @@ -1382,7 +1388,6 @@ pub const cpu = struct { |
| 1382 | .popcnt, | 1388 | .popcnt, |
| 1383 | .prfchw, | 1389 | .prfchw, |
| 1384 | .sahf, | 1390 | .sahf, |
| 1385 | .slow_shld, | ||
| 1386 | .sse4a, | 1391 | .sse4a, |
| 1387 | .ssse3, | 1392 | .ssse3, |
| 1388 | .x87, | 1393 | .x87, |
| ... | @@ -1395,8 +1400,6 @@ pub const cpu = struct { | ... | @@ -1395,8 +1400,6 @@ pub const cpu = struct { |
| 1395 | .llvm_name = "c3", | 1400 | .llvm_name = "c3", |
| 1396 | .features = featureSet(&[_]Feature{ | 1401 | .features = featureSet(&[_]Feature{ |
| 1397 | .@"3dnow", | 1402 | .@"3dnow", |
| 1398 | .slow_unaligned_mem_16, | ||
| 1399 | .vzeroupper, | ||
| 1400 | .x87, | 1403 | .x87, |
| 1401 | }), | 1404 | }), |
| 1402 | }; | 1405 | }; |
| ... | @@ -1408,9 +1411,7 @@ pub const cpu = struct { | ... | @@ -1408,9 +1411,7 @@ pub const cpu = struct { |
| 1408 | .cx8, | 1411 | .cx8, |
| 1409 | .fxsr, | 1412 | .fxsr, |
| 1410 | .mmx, | 1413 | .mmx, |
| 1411 | .slow_unaligned_mem_16, | ||
| 1412 | .sse, | 1414 | .sse, |
| 1413 | .vzeroupper, | ||
| 1414 | .x87, | 1415 | .x87, |
| 1415 | }), | 1416 | }), |
| 1416 | }; | 1417 | }; |
| ... | @@ -1438,36 +1439,25 @@ pub const cpu = struct { | ... | @@ -1438,36 +1439,25 @@ pub const cpu = struct { |
| 1438 | .cx8, | 1439 | .cx8, |
| 1439 | .ermsb, | 1440 | .ermsb, |
| 1440 | .f16c, | 1441 | .f16c, |
| 1441 | .fast_15bytenop, | ||
| 1442 | .fast_gather, | ||
| 1443 | .fast_scalar_fsqrt, | ||
| 1444 | .fast_shld_rotate, | ||
| 1445 | .fast_variable_shuffle, | ||
| 1446 | .fast_vector_fsqrt, | ||
| 1447 | .fma, | 1442 | .fma, |
| 1448 | .fsgsbase, | 1443 | .fsgsbase, |
| 1449 | .fxsr, | 1444 | .fxsr, |
| 1450 | .idivq_to_divl, | ||
| 1451 | .invpcid, | 1445 | .invpcid, |
| 1452 | .lzcnt, | 1446 | .lzcnt, |
| 1453 | .macrofusion, | ||
| 1454 | .merge_to_threeway_branch, | ||
| 1455 | .mmx, | 1447 | .mmx, |
| 1456 | .movbe, | 1448 | .movbe, |
| 1457 | .nopl, | 1449 | .nopl, |
| 1458 | .pclmul, | 1450 | .pclmul, |
| 1459 | .pku, | 1451 | .pku, |
| 1460 | .popcnt, | 1452 | .popcnt, |
| 1461 | .prefer_256_bit, | ||
| 1462 | .prfchw, | 1453 | .prfchw, |
| 1463 | .rdrnd, | 1454 | .rdrnd, |
| 1464 | .rdseed, | 1455 | .rdseed, |
| 1465 | .sahf, | 1456 | .sahf, |
| 1466 | .sgx, | 1457 | .sgx, |
| 1467 | .sha, | 1458 | .sha, |
| 1468 | .slow_3ops_lea, | 1459 | .sse2, |
| 1469 | .sse4_2, | 1460 | .sse4_2, |
| 1470 | .vzeroupper, | ||
| 1471 | .x87, | 1461 | .x87, |
| 1472 | .xsave, | 1462 | .xsave, |
| 1473 | .xsavec, | 1463 | .xsavec, |
| ... | @@ -1499,35 +1489,23 @@ pub const cpu = struct { | ... | @@ -1499,35 +1489,23 @@ pub const cpu = struct { |
| 1499 | .cx8, | 1489 | .cx8, |
| 1500 | .ermsb, | 1490 | .ermsb, |
| 1501 | .f16c, | 1491 | .f16c, |
| 1502 | .false_deps_popcnt, | ||
| 1503 | .fast_15bytenop, | ||
| 1504 | .fast_gather, | ||
| 1505 | .fast_scalar_fsqrt, | ||
| 1506 | .fast_shld_rotate, | ||
| 1507 | .fast_variable_shuffle, | ||
| 1508 | .fast_vector_fsqrt, | ||
| 1509 | .fma, | 1492 | .fma, |
| 1510 | .fsgsbase, | 1493 | .fsgsbase, |
| 1511 | .fxsr, | 1494 | .fxsr, |
| 1512 | .idivq_to_divl, | ||
| 1513 | .invpcid, | 1495 | .invpcid, |
| 1514 | .lzcnt, | 1496 | .lzcnt, |
| 1515 | .macrofusion, | ||
| 1516 | .merge_to_threeway_branch, | ||
| 1517 | .mmx, | 1497 | .mmx, |
| 1518 | .movbe, | 1498 | .movbe, |
| 1519 | .nopl, | 1499 | .nopl, |
| 1520 | .pclmul, | 1500 | .pclmul, |
| 1521 | .pku, | 1501 | .pku, |
| 1522 | .popcnt, | 1502 | .popcnt, |
| 1523 | .prefer_256_bit, | ||
| 1524 | .prfchw, | 1503 | .prfchw, |
| 1525 | .rdrnd, | 1504 | .rdrnd, |
| 1526 | .rdseed, | 1505 | .rdseed, |
| 1527 | .sahf, | 1506 | .sahf, |
| 1528 | .slow_3ops_lea, | 1507 | .sse2, |
| 1529 | .sse4_2, | 1508 | .sse4_2, |
| 1530 | .vzeroupper, | ||
| 1531 | .x87, | 1509 | .x87, |
| 1532 | .xsave, | 1510 | .xsave, |
| 1533 | .xsavec, | 1511 | .xsavec, |
| ... | @@ -1560,35 +1538,23 @@ pub const cpu = struct { | ... | @@ -1560,35 +1538,23 @@ pub const cpu = struct { |
| 1560 | .cx8, | 1538 | .cx8, |
| 1561 | .ermsb, | 1539 | .ermsb, |
| 1562 | .f16c, | 1540 | .f16c, |
| 1563 | .false_deps_popcnt, | ||
| 1564 | .fast_15bytenop, | ||
| 1565 | .fast_gather, | ||
| 1566 | .fast_scalar_fsqrt, | ||
| 1567 | .fast_shld_rotate, | ||
| 1568 | .fast_variable_shuffle, | ||
| 1569 | .fast_vector_fsqrt, | ||
| 1570 | .fma, | 1541 | .fma, |
| 1571 | .fsgsbase, | 1542 | .fsgsbase, |
| 1572 | .fxsr, | 1543 | .fxsr, |
| 1573 | .idivq_to_divl, | ||
| 1574 | .invpcid, | 1544 | .invpcid, |
| 1575 | .lzcnt, | 1545 | .lzcnt, |
| 1576 | .macrofusion, | ||
| 1577 | .merge_to_threeway_branch, | ||
| 1578 | .mmx, | 1546 | .mmx, |
| 1579 | .movbe, | 1547 | .movbe, |
| 1580 | .nopl, | 1548 | .nopl, |
| 1581 | .pclmul, | 1549 | .pclmul, |
| 1582 | .pku, | 1550 | .pku, |
| 1583 | .popcnt, | 1551 | .popcnt, |
| 1584 | .prefer_256_bit, | ||
| 1585 | .prfchw, | 1552 | .prfchw, |
| 1586 | .rdrnd, | 1553 | .rdrnd, |
| 1587 | .rdseed, | 1554 | .rdseed, |
| 1588 | .sahf, | 1555 | .sahf, |
| 1589 | .slow_3ops_lea, | 1556 | .sse2, |
| 1590 | .sse4_2, | 1557 | .sse4_2, |
| 1591 | .vzeroupper, | ||
| 1592 | .x87, | 1558 | .x87, |
| 1593 | .xsave, | 1559 | .xsave, |
| 1594 | .xsavec, | 1560 | .xsavec, |
| ... | @@ -1606,25 +1572,16 @@ pub const cpu = struct { | ... | @@ -1606,25 +1572,16 @@ pub const cpu = struct { |
| 1606 | .cx16, | 1572 | .cx16, |
| 1607 | .cx8, | 1573 | .cx8, |
| 1608 | .f16c, | 1574 | .f16c, |
| 1609 | .false_deps_popcnt, | ||
| 1610 | .fast_15bytenop, | ||
| 1611 | .fast_scalar_fsqrt, | ||
| 1612 | .fast_shld_rotate, | ||
| 1613 | .fsgsbase, | 1575 | .fsgsbase, |
| 1614 | .fxsr, | 1576 | .fxsr, |
| 1615 | .idivq_to_divl, | ||
| 1616 | .macrofusion, | ||
| 1617 | .merge_to_threeway_branch, | ||
| 1618 | .mmx, | 1577 | .mmx, |
| 1619 | .nopl, | 1578 | .nopl, |
| 1620 | .pclmul, | 1579 | .pclmul, |
| 1621 | .popcnt, | 1580 | .popcnt, |
| 1622 | .rdrnd, | 1581 | .rdrnd, |
| 1623 | .sahf, | 1582 | .sahf, |
| 1624 | .slow_3ops_lea, | 1583 | .sse2, |
| 1625 | .slow_unaligned_mem_32, | ||
| 1626 | .sse4_2, | 1584 | .sse4_2, |
| 1627 | .vzeroupper, | ||
| 1628 | .x87, | 1585 | .x87, |
| 1629 | .xsave, | 1586 | .xsave, |
| 1630 | .xsaveopt, | 1587 | .xsaveopt, |
| ... | @@ -1644,20 +1601,11 @@ pub const cpu = struct { | ... | @@ -1644,20 +1601,11 @@ pub const cpu = struct { |
| 1644 | .cx8, | 1601 | .cx8, |
| 1645 | .ermsb, | 1602 | .ermsb, |
| 1646 | .f16c, | 1603 | .f16c, |
| 1647 | .false_deps_lzcnt_tzcnt, | ||
| 1648 | .false_deps_popcnt, | ||
| 1649 | .fast_15bytenop, | ||
| 1650 | .fast_scalar_fsqrt, | ||
| 1651 | .fast_shld_rotate, | ||
| 1652 | .fast_variable_shuffle, | ||
| 1653 | .fma, | 1604 | .fma, |
| 1654 | .fsgsbase, | 1605 | .fsgsbase, |
| 1655 | .fxsr, | 1606 | .fxsr, |
| 1656 | .idivq_to_divl, | ||
| 1657 | .invpcid, | 1607 | .invpcid, |
| 1658 | .lzcnt, | 1608 | .lzcnt, |
| 1659 | .macrofusion, | ||
| 1660 | .merge_to_threeway_branch, | ||
| 1661 | .mmx, | 1609 | .mmx, |
| 1662 | .movbe, | 1610 | .movbe, |
| 1663 | .nopl, | 1611 | .nopl, |
| ... | @@ -1665,9 +1613,8 @@ pub const cpu = struct { | ... | @@ -1665,9 +1613,8 @@ pub const cpu = struct { |
| 1665 | .popcnt, | 1613 | .popcnt, |
| 1666 | .rdrnd, | 1614 | .rdrnd, |
| 1667 | .sahf, | 1615 | .sahf, |
| 1668 | .slow_3ops_lea, | 1616 | .sse2, |
| 1669 | .sse4_2, | 1617 | .sse4_2, |
| 1670 | .vzeroupper, | ||
| 1671 | .x87, | 1618 | .x87, |
| 1672 | .xsave, | 1619 | .xsave, |
| 1673 | .xsaveopt, | 1620 | .xsaveopt, |
| ... | @@ -1682,13 +1629,10 @@ pub const cpu = struct { | ... | @@ -1682,13 +1629,10 @@ pub const cpu = struct { |
| 1682 | .cx16, | 1629 | .cx16, |
| 1683 | .cx8, | 1630 | .cx8, |
| 1684 | .fxsr, | 1631 | .fxsr, |
| 1685 | .macrofusion, | ||
| 1686 | .mmx, | 1632 | .mmx, |
| 1687 | .nopl, | 1633 | .nopl, |
| 1688 | .sahf, | 1634 | .sahf, |
| 1689 | .slow_unaligned_mem_16, | ||
| 1690 | .ssse3, | 1635 | .ssse3, |
| 1691 | .vzeroupper, | ||
| 1692 | .x87, | 1636 | .x87, |
| 1693 | }), | 1637 | }), |
| 1694 | }; | 1638 | }; |
| ... | @@ -1701,13 +1645,12 @@ pub const cpu = struct { | ... | @@ -1701,13 +1645,12 @@ pub const cpu = struct { |
| 1701 | .cx16, | 1645 | .cx16, |
| 1702 | .cx8, | 1646 | .cx8, |
| 1703 | .fxsr, | 1647 | .fxsr, |
| 1704 | .macrofusion, | ||
| 1705 | .mmx, | 1648 | .mmx, |
| 1706 | .nopl, | 1649 | .nopl, |
| 1707 | .popcnt, | 1650 | .popcnt, |
| 1708 | .sahf, | 1651 | .sahf, |
| 1652 | .sse2, | ||
| 1709 | .sse4_2, | 1653 | .sse4_2, |
| 1710 | .vzeroupper, | ||
| 1711 | .x87, | 1654 | .x87, |
| 1712 | }), | 1655 | }), |
| 1713 | }; | 1656 | }; |
| ... | @@ -1720,23 +1663,14 @@ pub const cpu = struct { | ... | @@ -1720,23 +1663,14 @@ pub const cpu = struct { |
| 1720 | .cmov, | 1663 | .cmov, |
| 1721 | .cx16, | 1664 | .cx16, |
| 1722 | .cx8, | 1665 | .cx8, |
| 1723 | .false_deps_popcnt, | ||
| 1724 | .fast_15bytenop, | ||
| 1725 | .fast_scalar_fsqrt, | ||
| 1726 | .fast_shld_rotate, | ||
| 1727 | .fxsr, | 1666 | .fxsr, |
| 1728 | .idivq_to_divl, | ||
| 1729 | .macrofusion, | ||
| 1730 | .merge_to_threeway_branch, | ||
| 1731 | .mmx, | 1667 | .mmx, |
| 1732 | .nopl, | 1668 | .nopl, |
| 1733 | .pclmul, | 1669 | .pclmul, |
| 1734 | .popcnt, | 1670 | .popcnt, |
| 1735 | .sahf, | 1671 | .sahf, |
| 1736 | .slow_3ops_lea, | 1672 | .sse2, |
| 1737 | .slow_unaligned_mem_32, | ||
| 1738 | .sse4_2, | 1673 | .sse4_2, |
| 1739 | .vzeroupper, | ||
| 1740 | .x87, | 1674 | .x87, |
| 1741 | .xsave, | 1675 | .xsave, |
| 1742 | .xsaveopt, | 1676 | .xsaveopt, |
| ... | @@ -1746,9 +1680,8 @@ pub const cpu = struct { | ... | @@ -1746,9 +1680,8 @@ pub const cpu = struct { |
| 1746 | .name = "generic", | 1680 | .name = "generic", |
| 1747 | .llvm_name = "generic", | 1681 | .llvm_name = "generic", |
| 1748 | .features = featureSet(&[_]Feature{ | 1682 | .features = featureSet(&[_]Feature{ |
| 1683 | .@"64bit", | ||
| 1749 | .cx8, | 1684 | .cx8, |
| 1750 | .slow_unaligned_mem_16, | ||
| 1751 | .vzeroupper, | ||
| 1752 | .x87, | 1685 | .x87, |
| 1753 | }), | 1686 | }), |
| 1754 | }; | 1687 | }; |
| ... | @@ -1758,8 +1691,6 @@ pub const cpu = struct { | ... | @@ -1758,8 +1691,6 @@ pub const cpu = struct { |
| 1758 | .features = featureSet(&[_]Feature{ | 1691 | .features = featureSet(&[_]Feature{ |
| 1759 | .@"3dnowa", | 1692 | .@"3dnowa", |
| 1760 | .cx8, | 1693 | .cx8, |
| 1761 | .slow_unaligned_mem_16, | ||
| 1762 | .vzeroupper, | ||
| 1763 | .x87, | 1694 | .x87, |
| 1764 | }), | 1695 | }), |
| 1765 | }; | 1696 | }; |
| ... | @@ -1773,7 +1704,6 @@ pub const cpu = struct { | ... | @@ -1773,7 +1704,6 @@ pub const cpu = struct { |
| 1773 | .cmov, | 1704 | .cmov, |
| 1774 | .cx16, | 1705 | .cx16, |
| 1775 | .cx8, | 1706 | .cx8, |
| 1776 | .false_deps_popcnt, | ||
| 1777 | .fsgsbase, | 1707 | .fsgsbase, |
| 1778 | .fxsr, | 1708 | .fxsr, |
| 1779 | .mmx, | 1709 | .mmx, |
| ... | @@ -1786,13 +1716,8 @@ pub const cpu = struct { | ... | @@ -1786,13 +1716,8 @@ pub const cpu = struct { |
| 1786 | .rdseed, | 1716 | .rdseed, |
| 1787 | .sahf, | 1717 | .sahf, |
| 1788 | .sha, | 1718 | .sha, |
| 1789 | .slow_incdec, | ||
| 1790 | .slow_lea, | ||
| 1791 | .slow_two_mem_ops, | ||
| 1792 | .sse4_2, | 1719 | .sse4_2, |
| 1793 | .ssse3, | 1720 | .ssse3, |
| 1794 | .use_glm_div_sqrt_costs, | ||
| 1795 | .vzeroupper, | ||
| 1796 | .x87, | 1721 | .x87, |
| 1797 | .xsave, | 1722 | .xsave, |
| 1798 | .xsavec, | 1723 | .xsavec, |
| ... | @@ -1825,13 +1750,8 @@ pub const cpu = struct { | ... | @@ -1825,13 +1750,8 @@ pub const cpu = struct { |
| 1825 | .sahf, | 1750 | .sahf, |
| 1826 | .sgx, | 1751 | .sgx, |
| 1827 | .sha, | 1752 | .sha, |
| 1828 | .slow_incdec, | ||
| 1829 | .slow_lea, | ||
| 1830 | .slow_two_mem_ops, | ||
| 1831 | .sse4_2, | 1753 | .sse4_2, |
| 1832 | .ssse3, | 1754 | .ssse3, |
| 1833 | .use_glm_div_sqrt_costs, | ||
| 1834 | .vzeroupper, | ||
| 1835 | .x87, | 1755 | .x87, |
| 1836 | .xsave, | 1756 | .xsave, |
| 1837 | .xsavec, | 1757 | .xsavec, |
| ... | @@ -1853,20 +1773,11 @@ pub const cpu = struct { | ... | @@ -1853,20 +1773,11 @@ pub const cpu = struct { |
| 1853 | .cx8, | 1773 | .cx8, |
| 1854 | .ermsb, | 1774 | .ermsb, |
| 1855 | .f16c, | 1775 | .f16c, |
| 1856 | .false_deps_lzcnt_tzcnt, | ||
| 1857 | .false_deps_popcnt, | ||
| 1858 | .fast_15bytenop, | ||
| 1859 | .fast_scalar_fsqrt, | ||
| 1860 | .fast_shld_rotate, | ||
| 1861 | .fast_variable_shuffle, | ||
| 1862 | .fma, | 1776 | .fma, |
| 1863 | .fsgsbase, | 1777 | .fsgsbase, |
| 1864 | .fxsr, | 1778 | .fxsr, |
| 1865 | .idivq_to_divl, | ||
| 1866 | .invpcid, | 1779 | .invpcid, |
| 1867 | .lzcnt, | 1780 | .lzcnt, |
| 1868 | .macrofusion, | ||
| 1869 | .merge_to_threeway_branch, | ||
| 1870 | .mmx, | 1781 | .mmx, |
| 1871 | .movbe, | 1782 | .movbe, |
| 1872 | .nopl, | 1783 | .nopl, |
| ... | @@ -1874,9 +1785,8 @@ pub const cpu = struct { | ... | @@ -1874,9 +1785,8 @@ pub const cpu = struct { |
| 1874 | .popcnt, | 1785 | .popcnt, |
| 1875 | .rdrnd, | 1786 | .rdrnd, |
| 1876 | .sahf, | 1787 | .sahf, |
| 1877 | .slow_3ops_lea, | 1788 | .sse2, |
| 1878 | .sse4_2, | 1789 | .sse4_2, |
| 1879 | .vzeroupper, | ||
| 1880 | .x87, | 1790 | .x87, |
| 1881 | .xsave, | 1791 | .xsave, |
| 1882 | .xsaveopt, | 1792 | .xsaveopt, |
| ... | @@ -1886,8 +1796,6 @@ pub const cpu = struct { | ... | @@ -1886,8 +1796,6 @@ pub const cpu = struct { |
| 1886 | .name = "_i386", | 1796 | .name = "_i386", |
| 1887 | .llvm_name = "i386", | 1797 | .llvm_name = "i386", |
| 1888 | .features = featureSet(&[_]Feature{ | 1798 | .features = featureSet(&[_]Feature{ |
| 1889 | .slow_unaligned_mem_16, | ||
| 1890 | .vzeroupper, | ||
| 1891 | .x87, | 1799 | .x87, |
| 1892 | }), | 1800 | }), |
| 1893 | }; | 1801 | }; |
| ... | @@ -1895,8 +1803,6 @@ pub const cpu = struct { | ... | @@ -1895,8 +1803,6 @@ pub const cpu = struct { |
| 1895 | .name = "_i486", | 1803 | .name = "_i486", |
| 1896 | .llvm_name = "i486", | 1804 | .llvm_name = "i486", |
| 1897 | .features = featureSet(&[_]Feature{ | 1805 | .features = featureSet(&[_]Feature{ |
| 1898 | .slow_unaligned_mem_16, | ||
| 1899 | .vzeroupper, | ||
| 1900 | .x87, | 1806 | .x87, |
| 1901 | }), | 1807 | }), |
| 1902 | }; | 1808 | }; |
| ... | @@ -1905,8 +1811,6 @@ pub const cpu = struct { | ... | @@ -1905,8 +1811,6 @@ pub const cpu = struct { |
| 1905 | .llvm_name = "i586", | 1811 | .llvm_name = "i586", |
| 1906 | .features = featureSet(&[_]Feature{ | 1812 | .features = featureSet(&[_]Feature{ |
| 1907 | .cx8, | 1813 | .cx8, |
| 1908 | .slow_unaligned_mem_16, | ||
| 1909 | .vzeroupper, | ||
| 1910 | .x87, | 1814 | .x87, |
| 1911 | }), | 1815 | }), |
| 1912 | }; | 1816 | }; |
| ... | @@ -1916,8 +1820,6 @@ pub const cpu = struct { | ... | @@ -1916,8 +1820,6 @@ pub const cpu = struct { |
| 1916 | .features = featureSet(&[_]Feature{ | 1820 | .features = featureSet(&[_]Feature{ |
| 1917 | .cmov, | 1821 | .cmov, |
| 1918 | .cx8, | 1822 | .cx8, |
| 1919 | .slow_unaligned_mem_16, | ||
| 1920 | .vzeroupper, | ||
| 1921 | .x87, | 1823 | .x87, |
| 1922 | }), | 1824 | }), |
| 1923 | }; | 1825 | }; |
| ... | @@ -1950,28 +1852,19 @@ pub const cpu = struct { | ... | @@ -1950,28 +1852,19 @@ pub const cpu = struct { |
| 1950 | .cx8, | 1852 | .cx8, |
| 1951 | .ermsb, | 1853 | .ermsb, |
| 1952 | .f16c, | 1854 | .f16c, |
| 1953 | .fast_15bytenop, | ||
| 1954 | .fast_gather, | ||
| 1955 | .fast_scalar_fsqrt, | ||
| 1956 | .fast_shld_rotate, | ||
| 1957 | .fast_variable_shuffle, | ||
| 1958 | .fast_vector_fsqrt, | ||
| 1959 | .fma, | 1855 | .fma, |
| 1960 | .fsgsbase, | 1856 | .fsgsbase, |
| 1857 | .fsrm, | ||
| 1961 | .fxsr, | 1858 | .fxsr, |
| 1962 | .gfni, | 1859 | .gfni, |
| 1963 | .idivq_to_divl, | ||
| 1964 | .invpcid, | 1860 | .invpcid, |
| 1965 | .lzcnt, | 1861 | .lzcnt, |
| 1966 | .macrofusion, | ||
| 1967 | .merge_to_threeway_branch, | ||
| 1968 | .mmx, | 1862 | .mmx, |
| 1969 | .movbe, | 1863 | .movbe, |
| 1970 | .nopl, | 1864 | .nopl, |
| 1971 | .pclmul, | 1865 | .pclmul, |
| 1972 | .pku, | 1866 | .pku, |
| 1973 | .popcnt, | 1867 | .popcnt, |
| 1974 | .prefer_256_bit, | ||
| 1975 | .prfchw, | 1868 | .prfchw, |
| 1976 | .rdpid, | 1869 | .rdpid, |
| 1977 | .rdrnd, | 1870 | .rdrnd, |
| ... | @@ -1979,11 +1872,10 @@ pub const cpu = struct { | ... | @@ -1979,11 +1872,10 @@ pub const cpu = struct { |
| 1979 | .sahf, | 1872 | .sahf, |
| 1980 | .sgx, | 1873 | .sgx, |
| 1981 | .sha, | 1874 | .sha, |
| 1982 | .slow_3ops_lea, | 1875 | .sse2, |
| 1983 | .sse4_2, | 1876 | .sse4_2, |
| 1984 | .vaes, | 1877 | .vaes, |
| 1985 | .vpclmulqdq, | 1878 | .vpclmulqdq, |
| 1986 | .vzeroupper, | ||
| 1987 | .x87, | 1879 | .x87, |
| 1988 | .xsave, | 1880 | .xsave, |
| 1989 | .xsavec, | 1881 | .xsavec, |
| ... | @@ -2020,21 +1912,13 @@ pub const cpu = struct { | ... | @@ -2020,21 +1912,13 @@ pub const cpu = struct { |
| 2020 | .cx8, | 1912 | .cx8, |
| 2021 | .ermsb, | 1913 | .ermsb, |
| 2022 | .f16c, | 1914 | .f16c, |
| 2023 | .fast_15bytenop, | ||
| 2024 | .fast_gather, | ||
| 2025 | .fast_scalar_fsqrt, | ||
| 2026 | .fast_shld_rotate, | ||
| 2027 | .fast_variable_shuffle, | ||
| 2028 | .fast_vector_fsqrt, | ||
| 2029 | .fma, | 1915 | .fma, |
| 2030 | .fsgsbase, | 1916 | .fsgsbase, |
| 1917 | .fsrm, | ||
| 2031 | .fxsr, | 1918 | .fxsr, |
| 2032 | .gfni, | 1919 | .gfni, |
| 2033 | .idivq_to_divl, | ||
| 2034 | .invpcid, | 1920 | .invpcid, |
| 2035 | .lzcnt, | 1921 | .lzcnt, |
| 2036 | .macrofusion, | ||
| 2037 | .merge_to_threeway_branch, | ||
| 2038 | .mmx, | 1922 | .mmx, |
| 2039 | .movbe, | 1923 | .movbe, |
| 2040 | .nopl, | 1924 | .nopl, |
| ... | @@ -2042,7 +1926,6 @@ pub const cpu = struct { | ... | @@ -2042,7 +1926,6 @@ pub const cpu = struct { |
| 2042 | .pconfig, | 1926 | .pconfig, |
| 2043 | .pku, | 1927 | .pku, |
| 2044 | .popcnt, | 1928 | .popcnt, |
| 2045 | .prefer_256_bit, | ||
| 2046 | .prfchw, | 1929 | .prfchw, |
| 2047 | .rdpid, | 1930 | .rdpid, |
| 2048 | .rdrnd, | 1931 | .rdrnd, |
| ... | @@ -2050,11 +1933,10 @@ pub const cpu = struct { | ... | @@ -2050,11 +1933,10 @@ pub const cpu = struct { |
| 2050 | .sahf, | 1933 | .sahf, |
| 2051 | .sgx, | 1934 | .sgx, |
| 2052 | .sha, | 1935 | .sha, |
| 2053 | .slow_3ops_lea, | 1936 | .sse2, |
| 2054 | .sse4_2, | 1937 | .sse4_2, |
| 2055 | .vaes, | 1938 | .vaes, |
| 2056 | .vpclmulqdq, | 1939 | .vpclmulqdq, |
| 2057 | .vzeroupper, | ||
| 2058 | .wbnoinvd, | 1940 | .wbnoinvd, |
| 2059 | .x87, | 1941 | .x87, |
| 2060 | .xsave, | 1942 | .xsave, |
| ... | @@ -2073,25 +1955,16 @@ pub const cpu = struct { | ... | @@ -2073,25 +1955,16 @@ pub const cpu = struct { |
| 2073 | .cx16, | 1955 | .cx16, |
| 2074 | .cx8, | 1956 | .cx8, |
| 2075 | .f16c, | 1957 | .f16c, |
| 2076 | .false_deps_popcnt, | ||
| 2077 | .fast_15bytenop, | ||
| 2078 | .fast_scalar_fsqrt, | ||
| 2079 | .fast_shld_rotate, | ||
| 2080 | .fsgsbase, | 1958 | .fsgsbase, |
| 2081 | .fxsr, | 1959 | .fxsr, |
| 2082 | .idivq_to_divl, | ||
| 2083 | .macrofusion, | ||
| 2084 | .merge_to_threeway_branch, | ||
| 2085 | .mmx, | 1960 | .mmx, |
| 2086 | .nopl, | 1961 | .nopl, |
| 2087 | .pclmul, | 1962 | .pclmul, |
| 2088 | .popcnt, | 1963 | .popcnt, |
| 2089 | .rdrnd, | 1964 | .rdrnd, |
| 2090 | .sahf, | 1965 | .sahf, |
| 2091 | .slow_3ops_lea, | 1966 | .sse2, |
| 2092 | .slow_unaligned_mem_32, | ||
| 2093 | .sse4_2, | 1967 | .sse4_2, |
| 2094 | .vzeroupper, | ||
| 2095 | .x87, | 1968 | .x87, |
| 2096 | .xsave, | 1969 | .xsave, |
| 2097 | .xsaveopt, | 1970 | .xsaveopt, |
| ... | @@ -2103,8 +1976,6 @@ pub const cpu = struct { | ... | @@ -2103,8 +1976,6 @@ pub const cpu = struct { |
| 2103 | .features = featureSet(&[_]Feature{ | 1976 | .features = featureSet(&[_]Feature{ |
| 2104 | .cx8, | 1977 | .cx8, |
| 2105 | .mmx, | 1978 | .mmx, |
| 2106 | .slow_unaligned_mem_16, | ||
| 2107 | .vzeroupper, | ||
| 2108 | .x87, | 1979 | .x87, |
| 2109 | }), | 1980 | }), |
| 2110 | }; | 1981 | }; |
| ... | @@ -2114,8 +1985,6 @@ pub const cpu = struct { | ... | @@ -2114,8 +1985,6 @@ pub const cpu = struct { |
| 2114 | .features = featureSet(&[_]Feature{ | 1985 | .features = featureSet(&[_]Feature{ |
| 2115 | .@"3dnow", | 1986 | .@"3dnow", |
| 2116 | .cx8, | 1987 | .cx8, |
| 2117 | .slow_unaligned_mem_16, | ||
| 2118 | .vzeroupper, | ||
| 2119 | .x87, | 1988 | .x87, |
| 2120 | }), | 1989 | }), |
| 2121 | }; | 1990 | }; |
| ... | @@ -2125,8 +1994,6 @@ pub const cpu = struct { | ... | @@ -2125,8 +1994,6 @@ pub const cpu = struct { |
| 2125 | .features = featureSet(&[_]Feature{ | 1994 | .features = featureSet(&[_]Feature{ |
| 2126 | .@"3dnow", | 1995 | .@"3dnow", |
| 2127 | .cx8, | 1996 | .cx8, |
| 2128 | .slow_unaligned_mem_16, | ||
| 2129 | .vzeroupper, | ||
| 2130 | .x87, | 1997 | .x87, |
| 2131 | }), | 1998 | }), |
| 2132 | }; | 1999 | }; |
| ... | @@ -2138,13 +2005,9 @@ pub const cpu = struct { | ... | @@ -2138,13 +2005,9 @@ pub const cpu = struct { |
| 2138 | .@"64bit", | 2005 | .@"64bit", |
| 2139 | .cmov, | 2006 | .cmov, |
| 2140 | .cx8, | 2007 | .cx8, |
| 2141 | .fast_scalar_shift_masks, | ||
| 2142 | .fxsr, | 2008 | .fxsr, |
| 2143 | .nopl, | 2009 | .nopl, |
| 2144 | .slow_shld, | ||
| 2145 | .slow_unaligned_mem_16, | ||
| 2146 | .sse2, | 2010 | .sse2, |
| 2147 | .vzeroupper, | ||
| 2148 | .x87, | 2011 | .x87, |
| 2149 | }), | 2012 | }), |
| 2150 | }; | 2013 | }; |
| ... | @@ -2157,13 +2020,9 @@ pub const cpu = struct { | ... | @@ -2157,13 +2020,9 @@ pub const cpu = struct { |
| 2157 | .cmov, | 2020 | .cmov, |
| 2158 | .cx16, | 2021 | .cx16, |
| 2159 | .cx8, | 2022 | .cx8, |
| 2160 | .fast_scalar_shift_masks, | ||
| 2161 | .fxsr, | 2023 | .fxsr, |
| 2162 | .nopl, | 2024 | .nopl, |
| 2163 | .slow_shld, | ||
| 2164 | .slow_unaligned_mem_16, | ||
| 2165 | .sse3, | 2025 | .sse3, |
| 2166 | .vzeroupper, | ||
| 2167 | .x87, | 2026 | .x87, |
| 2168 | }), | 2027 | }), |
| 2169 | }; | 2028 | }; |
| ... | @@ -2184,27 +2043,20 @@ pub const cpu = struct { | ... | @@ -2184,27 +2043,20 @@ pub const cpu = struct { |
| 2184 | .cx16, | 2043 | .cx16, |
| 2185 | .cx8, | 2044 | .cx8, |
| 2186 | .f16c, | 2045 | .f16c, |
| 2187 | .fast_gather, | ||
| 2188 | .fma, | 2046 | .fma, |
| 2189 | .fsgsbase, | 2047 | .fsgsbase, |
| 2190 | .fxsr, | 2048 | .fxsr, |
| 2191 | .idivq_to_divl, | ||
| 2192 | .lzcnt, | 2049 | .lzcnt, |
| 2193 | .mmx, | 2050 | .mmx, |
| 2194 | .movbe, | 2051 | .movbe, |
| 2195 | .nopl, | 2052 | .nopl, |
| 2196 | .pclmul, | 2053 | .pclmul, |
| 2197 | .popcnt, | 2054 | .popcnt, |
| 2198 | .prefer_mask_registers, | ||
| 2199 | .prefetchwt1, | 2055 | .prefetchwt1, |
| 2200 | .prfchw, | 2056 | .prfchw, |
| 2201 | .rdrnd, | 2057 | .rdrnd, |
| 2202 | .rdseed, | 2058 | .rdseed, |
| 2203 | .sahf, | 2059 | .sahf, |
| 2204 | .slow_3ops_lea, | ||
| 2205 | .slow_incdec, | ||
| 2206 | .slow_pmaddwd, | ||
| 2207 | .slow_two_mem_ops, | ||
| 2208 | .x87, | 2060 | .x87, |
| 2209 | .xsave, | 2061 | .xsave, |
| 2210 | .xsaveopt, | 2062 | .xsaveopt, |
| ... | @@ -2228,27 +2080,20 @@ pub const cpu = struct { | ... | @@ -2228,27 +2080,20 @@ pub const cpu = struct { |
| 2228 | .cx16, | 2080 | .cx16, |
| 2229 | .cx8, | 2081 | .cx8, |
| 2230 | .f16c, | 2082 | .f16c, |
| 2231 | .fast_gather, | ||
| 2232 | .fma, | 2083 | .fma, |
| 2233 | .fsgsbase, | 2084 | .fsgsbase, |
| 2234 | .fxsr, | 2085 | .fxsr, |
| 2235 | .idivq_to_divl, | ||
| 2236 | .lzcnt, | 2086 | .lzcnt, |
| 2237 | .mmx, | 2087 | .mmx, |
| 2238 | .movbe, | 2088 | .movbe, |
| 2239 | .nopl, | 2089 | .nopl, |
| 2240 | .pclmul, | 2090 | .pclmul, |
| 2241 | .popcnt, | 2091 | .popcnt, |
| 2242 | .prefer_mask_registers, | ||
| 2243 | .prefetchwt1, | 2092 | .prefetchwt1, |
| 2244 | .prfchw, | 2093 | .prfchw, |
| 2245 | .rdrnd, | 2094 | .rdrnd, |
| 2246 | .rdseed, | 2095 | .rdseed, |
| 2247 | .sahf, | 2096 | .sahf, |
| 2248 | .slow_3ops_lea, | ||
| 2249 | .slow_incdec, | ||
| 2250 | .slow_pmaddwd, | ||
| 2251 | .slow_two_mem_ops, | ||
| 2252 | .x87, | 2097 | .x87, |
| 2253 | .xsave, | 2098 | .xsave, |
| 2254 | .xsaveopt, | 2099 | .xsaveopt, |
| ... | @@ -2258,7 +2103,7 @@ pub const cpu = struct { | ... | @@ -2258,7 +2103,7 @@ pub const cpu = struct { |
| 2258 | .name = "lakemont", | 2103 | .name = "lakemont", |
| 2259 | .llvm_name = "lakemont", | 2104 | .llvm_name = "lakemont", |
| 2260 | .features = featureSet(&[_]Feature{ | 2105 | .features = featureSet(&[_]Feature{ |
| 2261 | .vzeroupper, | 2106 | .cx8, |
| 2262 | }), | 2107 | }), |
| 2263 | }; | 2108 | }; |
| 2264 | pub const nehalem = CpuModel{ | 2109 | pub const nehalem = CpuModel{ |
| ... | @@ -2270,13 +2115,12 @@ pub const cpu = struct { | ... | @@ -2270,13 +2115,12 @@ pub const cpu = struct { |
| 2270 | .cx16, | 2115 | .cx16, |
| 2271 | .cx8, | 2116 | .cx8, |
| 2272 | .fxsr, | 2117 | .fxsr, |
| 2273 | .macrofusion, | ||
| 2274 | .mmx, | 2118 | .mmx, |
| 2275 | .nopl, | 2119 | .nopl, |
| 2276 | .popcnt, | 2120 | .popcnt, |
| 2277 | .sahf, | 2121 | .sahf, |
| 2122 | .sse2, | ||
| 2278 | .sse4_2, | 2123 | .sse4_2, |
| 2279 | .vzeroupper, | ||
| 2280 | .x87, | 2124 | .x87, |
| 2281 | }), | 2125 | }), |
| 2282 | }; | 2126 | }; |
| ... | @@ -2291,9 +2135,7 @@ pub const cpu = struct { | ... | @@ -2291,9 +2135,7 @@ pub const cpu = struct { |
| 2291 | .fxsr, | 2135 | .fxsr, |
| 2292 | .mmx, | 2136 | .mmx, |
| 2293 | .nopl, | 2137 | .nopl, |
| 2294 | .slow_unaligned_mem_16, | ||
| 2295 | .sse3, | 2138 | .sse3, |
| 2296 | .vzeroupper, | ||
| 2297 | .x87, | 2139 | .x87, |
| 2298 | }), | 2140 | }), |
| 2299 | }; | 2141 | }; |
| ... | @@ -2305,13 +2147,9 @@ pub const cpu = struct { | ... | @@ -2305,13 +2147,9 @@ pub const cpu = struct { |
| 2305 | .@"64bit", | 2147 | .@"64bit", |
| 2306 | .cmov, | 2148 | .cmov, |
| 2307 | .cx8, | 2149 | .cx8, |
| 2308 | .fast_scalar_shift_masks, | ||
| 2309 | .fxsr, | 2150 | .fxsr, |
| 2310 | .nopl, | 2151 | .nopl, |
| 2311 | .slow_shld, | ||
| 2312 | .slow_unaligned_mem_16, | ||
| 2313 | .sse2, | 2152 | .sse2, |
| 2314 | .vzeroupper, | ||
| 2315 | .x87, | 2153 | .x87, |
| 2316 | }), | 2154 | }), |
| 2317 | }; | 2155 | }; |
| ... | @@ -2324,13 +2162,9 @@ pub const cpu = struct { | ... | @@ -2324,13 +2162,9 @@ pub const cpu = struct { |
| 2324 | .cmov, | 2162 | .cmov, |
| 2325 | .cx16, | 2163 | .cx16, |
| 2326 | .cx8, | 2164 | .cx8, |
| 2327 | .fast_scalar_shift_masks, | ||
| 2328 | .fxsr, | 2165 | .fxsr, |
| 2329 | .nopl, | 2166 | .nopl, |
| 2330 | .slow_shld, | ||
| 2331 | .slow_unaligned_mem_16, | ||
| 2332 | .sse3, | 2167 | .sse3, |
| 2333 | .vzeroupper, | ||
| 2334 | .x87, | 2168 | .x87, |
| 2335 | }), | 2169 | }), |
| 2336 | }; | 2170 | }; |
| ... | @@ -2343,13 +2177,10 @@ pub const cpu = struct { | ... | @@ -2343,13 +2177,10 @@ pub const cpu = struct { |
| 2343 | .cx16, | 2177 | .cx16, |
| 2344 | .cx8, | 2178 | .cx8, |
| 2345 | .fxsr, | 2179 | .fxsr, |
| 2346 | .macrofusion, | ||
| 2347 | .mmx, | 2180 | .mmx, |
| 2348 | .nopl, | 2181 | .nopl, |
| 2349 | .sahf, | 2182 | .sahf, |
| 2350 | .slow_unaligned_mem_16, | ||
| 2351 | .sse4_1, | 2183 | .sse4_1, |
| 2352 | .vzeroupper, | ||
| 2353 | .x87, | 2184 | .x87, |
| 2354 | }), | 2185 | }), |
| 2355 | }; | 2186 | }; |
| ... | @@ -2358,8 +2189,6 @@ pub const cpu = struct { | ... | @@ -2358,8 +2189,6 @@ pub const cpu = struct { |
| 2358 | .llvm_name = "pentium", | 2189 | .llvm_name = "pentium", |
| 2359 | .features = featureSet(&[_]Feature{ | 2190 | .features = featureSet(&[_]Feature{ |
| 2360 | .cx8, | 2191 | .cx8, |
| 2361 | .slow_unaligned_mem_16, | ||
| 2362 | .vzeroupper, | ||
| 2363 | .x87, | 2192 | .x87, |
| 2364 | }), | 2193 | }), |
| 2365 | }; | 2194 | }; |
| ... | @@ -2372,9 +2201,7 @@ pub const cpu = struct { | ... | @@ -2372,9 +2201,7 @@ pub const cpu = struct { |
| 2372 | .fxsr, | 2201 | .fxsr, |
| 2373 | .mmx, | 2202 | .mmx, |
| 2374 | .nopl, | 2203 | .nopl, |
| 2375 | .slow_unaligned_mem_16, | ||
| 2376 | .sse2, | 2204 | .sse2, |
| 2377 | .vzeroupper, | ||
| 2378 | .x87, | 2205 | .x87, |
| 2379 | }), | 2206 | }), |
| 2380 | }; | 2207 | }; |
| ... | @@ -2384,8 +2211,6 @@ pub const cpu = struct { | ... | @@ -2384,8 +2211,6 @@ pub const cpu = struct { |
| 2384 | .features = featureSet(&[_]Feature{ | 2211 | .features = featureSet(&[_]Feature{ |
| 2385 | .cx8, | 2212 | .cx8, |
| 2386 | .mmx, | 2213 | .mmx, |
| 2387 | .slow_unaligned_mem_16, | ||
| 2388 | .vzeroupper, | ||
| 2389 | .x87, | 2214 | .x87, |
| 2390 | }), | 2215 | }), |
| 2391 | }; | 2216 | }; |
| ... | @@ -2398,8 +2223,6 @@ pub const cpu = struct { | ... | @@ -2398,8 +2223,6 @@ pub const cpu = struct { |
| 2398 | .fxsr, | 2223 | .fxsr, |
| 2399 | .mmx, | 2224 | .mmx, |
| 2400 | .nopl, | 2225 | .nopl, |
| 2401 | .slow_unaligned_mem_16, | ||
| 2402 | .vzeroupper, | ||
| 2403 | .x87, | 2226 | .x87, |
| 2404 | }), | 2227 | }), |
| 2405 | }; | 2228 | }; |
| ... | @@ -2412,9 +2235,7 @@ pub const cpu = struct { | ... | @@ -2412,9 +2235,7 @@ pub const cpu = struct { |
| 2412 | .fxsr, | 2235 | .fxsr, |
| 2413 | .mmx, | 2236 | .mmx, |
| 2414 | .nopl, | 2237 | .nopl, |
| 2415 | .slow_unaligned_mem_16, | ||
| 2416 | .sse, | 2238 | .sse, |
| 2417 | .vzeroupper, | ||
| 2418 | .x87, | 2239 | .x87, |
| 2419 | }), | 2240 | }), |
| 2420 | }; | 2241 | }; |
| ... | @@ -2427,9 +2248,7 @@ pub const cpu = struct { | ... | @@ -2427,9 +2248,7 @@ pub const cpu = struct { |
| 2427 | .fxsr, | 2248 | .fxsr, |
| 2428 | .mmx, | 2249 | .mmx, |
| 2429 | .nopl, | 2250 | .nopl, |
| 2430 | .slow_unaligned_mem_16, | ||
| 2431 | .sse, | 2251 | .sse, |
| 2432 | .vzeroupper, | ||
| 2433 | .x87, | 2252 | .x87, |
| 2434 | }), | 2253 | }), |
| 2435 | }; | 2254 | }; |
| ... | @@ -2442,9 +2261,7 @@ pub const cpu = struct { | ... | @@ -2442,9 +2261,7 @@ pub const cpu = struct { |
| 2442 | .fxsr, | 2261 | .fxsr, |
| 2443 | .mmx, | 2262 | .mmx, |
| 2444 | .nopl, | 2263 | .nopl, |
| 2445 | .slow_unaligned_mem_16, | ||
| 2446 | .sse2, | 2264 | .sse2, |
| 2447 | .vzeroupper, | ||
| 2448 | .x87, | 2265 | .x87, |
| 2449 | }), | 2266 | }), |
| 2450 | }; | 2267 | }; |
| ... | @@ -2457,9 +2274,7 @@ pub const cpu = struct { | ... | @@ -2457,9 +2274,7 @@ pub const cpu = struct { |
| 2457 | .fxsr, | 2274 | .fxsr, |
| 2458 | .mmx, | 2275 | .mmx, |
| 2459 | .nopl, | 2276 | .nopl, |
| 2460 | .slow_unaligned_mem_16, | ||
| 2461 | .sse2, | 2277 | .sse2, |
| 2462 | .vzeroupper, | ||
| 2463 | .x87, | 2278 | .x87, |
| 2464 | }), | 2279 | }), |
| 2465 | }; | 2280 | }; |
| ... | @@ -2470,8 +2285,6 @@ pub const cpu = struct { | ... | @@ -2470,8 +2285,6 @@ pub const cpu = struct { |
| 2470 | .cmov, | 2285 | .cmov, |
| 2471 | .cx8, | 2286 | .cx8, |
| 2472 | .nopl, | 2287 | .nopl, |
| 2473 | .slow_unaligned_mem_16, | ||
| 2474 | .vzeroupper, | ||
| 2475 | .x87, | 2288 | .x87, |
| 2476 | }), | 2289 | }), |
| 2477 | }; | 2290 | }; |
| ... | @@ -2484,9 +2297,7 @@ pub const cpu = struct { | ... | @@ -2484,9 +2297,7 @@ pub const cpu = struct { |
| 2484 | .fxsr, | 2297 | .fxsr, |
| 2485 | .mmx, | 2298 | .mmx, |
| 2486 | .nopl, | 2299 | .nopl, |
| 2487 | .slow_unaligned_mem_16, | ||
| 2488 | .sse3, | 2300 | .sse3, |
| 2489 | .vzeroupper, | ||
| 2490 | .x87, | 2301 | .x87, |
| 2491 | }), | 2302 | }), |
| 2492 | }; | 2303 | }; |
| ... | @@ -2499,26 +2310,95 @@ pub const cpu = struct { | ... | @@ -2499,26 +2310,95 @@ pub const cpu = struct { |
| 2499 | .cmov, | 2310 | .cmov, |
| 2500 | .cx16, | 2311 | .cx16, |
| 2501 | .cx8, | 2312 | .cx8, |
| 2502 | .false_deps_popcnt, | ||
| 2503 | .fast_15bytenop, | ||
| 2504 | .fast_scalar_fsqrt, | ||
| 2505 | .fast_shld_rotate, | ||
| 2506 | .fxsr, | 2313 | .fxsr, |
| 2507 | .idivq_to_divl, | ||
| 2508 | .macrofusion, | ||
| 2509 | .merge_to_threeway_branch, | ||
| 2510 | .mmx, | 2314 | .mmx, |
| 2511 | .nopl, | 2315 | .nopl, |
| 2512 | .pclmul, | 2316 | .pclmul, |
| 2513 | .popcnt, | 2317 | .popcnt, |
| 2514 | .sahf, | 2318 | .sahf, |
| 2515 | .slow_3ops_lea, | 2319 | .sse2, |
| 2516 | .slow_unaligned_mem_32, | 2320 | .sse4_2, |
| 2321 | .x87, | ||
| 2322 | .xsave, | ||
| 2323 | .xsaveopt, | ||
| 2324 | }), | ||
| 2325 | }; | ||
| 2326 | pub const sapphirerapids = CpuModel{ | ||
| 2327 | .name = "sapphirerapids", | ||
| 2328 | .llvm_name = "sapphirerapids", | ||
| 2329 | .features = featureSet(&[_]Feature{ | ||
| 2330 | .@"64bit", | ||
| 2331 | .adx, | ||
| 2332 | .aes, | ||
| 2333 | .amx_bf16, | ||
| 2334 | .amx_int8, | ||
| 2335 | .amx_tile, | ||
| 2336 | .avx, | ||
| 2337 | .avx2, | ||
| 2338 | .avx512bf16, | ||
| 2339 | .avx512bitalg, | ||
| 2340 | .avx512bw, | ||
| 2341 | .avx512cd, | ||
| 2342 | .avx512dq, | ||
| 2343 | .avx512f, | ||
| 2344 | .avx512ifma, | ||
| 2345 | .avx512vbmi, | ||
| 2346 | .avx512vbmi2, | ||
| 2347 | .avx512vl, | ||
| 2348 | .avx512vnni, | ||
| 2349 | .avx512vp2intersect, | ||
| 2350 | .avx512vpopcntdq, | ||
| 2351 | .avxvnni, | ||
| 2352 | .bmi, | ||
| 2353 | .bmi2, | ||
| 2354 | .cldemote, | ||
| 2355 | .clflushopt, | ||
| 2356 | .clwb, | ||
| 2357 | .cmov, | ||
| 2358 | .cx16, | ||
| 2359 | .cx8, | ||
| 2360 | .enqcmd, | ||
| 2361 | .ermsb, | ||
| 2362 | .f16c, | ||
| 2363 | .fma, | ||
| 2364 | .fsgsbase, | ||
| 2365 | .fsrm, | ||
| 2366 | .fxsr, | ||
| 2367 | .gfni, | ||
| 2368 | .invpcid, | ||
| 2369 | .lzcnt, | ||
| 2370 | .mmx, | ||
| 2371 | .movbe, | ||
| 2372 | .movdir64b, | ||
| 2373 | .movdiri, | ||
| 2374 | .nopl, | ||
| 2375 | .pclmul, | ||
| 2376 | .pconfig, | ||
| 2377 | .pku, | ||
| 2378 | .popcnt, | ||
| 2379 | .prfchw, | ||
| 2380 | .ptwrite, | ||
| 2381 | .rdpid, | ||
| 2382 | .rdrnd, | ||
| 2383 | .rdseed, | ||
| 2384 | .sahf, | ||
| 2385 | .serialize, | ||
| 2386 | .sgx, | ||
| 2387 | .sha, | ||
| 2388 | .shstk, | ||
| 2389 | .sse2, | ||
| 2517 | .sse4_2, | 2390 | .sse4_2, |
| 2518 | .vzeroupper, | 2391 | .tsxldtrk, |
| 2392 | .uintr, | ||
| 2393 | .vaes, | ||
| 2394 | .vpclmulqdq, | ||
| 2395 | .waitpkg, | ||
| 2396 | .wbnoinvd, | ||
| 2519 | .x87, | 2397 | .x87, |
| 2520 | .xsave, | 2398 | .xsave, |
| 2399 | .xsavec, | ||
| 2521 | .xsaveopt, | 2400 | .xsaveopt, |
| 2401 | .xsaves, | ||
| 2522 | }), | 2402 | }), |
| 2523 | }; | 2403 | }; |
| 2524 | pub const silvermont = CpuModel{ | 2404 | pub const silvermont = CpuModel{ |
| ... | @@ -2529,10 +2409,7 @@ pub const cpu = struct { | ... | @@ -2529,10 +2409,7 @@ pub const cpu = struct { |
| 2529 | .cmov, | 2409 | .cmov, |
| 2530 | .cx16, | 2410 | .cx16, |
| 2531 | .cx8, | 2411 | .cx8, |
| 2532 | .false_deps_popcnt, | ||
| 2533 | .fast_7bytenop, | ||
| 2534 | .fxsr, | 2412 | .fxsr, |
| 2535 | .idivq_to_divl, | ||
| 2536 | .mmx, | 2413 | .mmx, |
| 2537 | .movbe, | 2414 | .movbe, |
| 2538 | .nopl, | 2415 | .nopl, |
| ... | @@ -2541,13 +2418,8 @@ pub const cpu = struct { | ... | @@ -2541,13 +2418,8 @@ pub const cpu = struct { |
| 2541 | .prfchw, | 2418 | .prfchw, |
| 2542 | .rdrnd, | 2419 | .rdrnd, |
| 2543 | .sahf, | 2420 | .sahf, |
| 2544 | .slow_incdec, | ||
| 2545 | .slow_lea, | ||
| 2546 | .slow_pmulld, | ||
| 2547 | .slow_two_mem_ops, | ||
| 2548 | .sse4_2, | 2421 | .sse4_2, |
| 2549 | .ssse3, | 2422 | .ssse3, |
| 2550 | .vzeroupper, | ||
| 2551 | .x87, | 2423 | .x87, |
| 2552 | }), | 2424 | }), |
| 2553 | }; | 2425 | }; |
| ... | @@ -2574,35 +2446,23 @@ pub const cpu = struct { | ... | @@ -2574,35 +2446,23 @@ pub const cpu = struct { |
| 2574 | .cx8, | 2446 | .cx8, |
| 2575 | .ermsb, | 2447 | .ermsb, |
| 2576 | .f16c, | 2448 | .f16c, |
| 2577 | .false_deps_popcnt, | ||
| 2578 | .fast_15bytenop, | ||
| 2579 | .fast_gather, | ||
| 2580 | .fast_scalar_fsqrt, | ||
| 2581 | .fast_shld_rotate, | ||
| 2582 | .fast_variable_shuffle, | ||
| 2583 | .fast_vector_fsqrt, | ||
| 2584 | .fma, | 2449 | .fma, |
| 2585 | .fsgsbase, | 2450 | .fsgsbase, |
| 2586 | .fxsr, | 2451 | .fxsr, |
| 2587 | .idivq_to_divl, | ||
| 2588 | .invpcid, | 2452 | .invpcid, |
| 2589 | .lzcnt, | 2453 | .lzcnt, |
| 2590 | .macrofusion, | ||
| 2591 | .merge_to_threeway_branch, | ||
| 2592 | .mmx, | 2454 | .mmx, |
| 2593 | .movbe, | 2455 | .movbe, |
| 2594 | .nopl, | 2456 | .nopl, |
| 2595 | .pclmul, | 2457 | .pclmul, |
| 2596 | .pku, | 2458 | .pku, |
| 2597 | .popcnt, | 2459 | .popcnt, |
| 2598 | .prefer_256_bit, | ||
| 2599 | .prfchw, | 2460 | .prfchw, |
| 2600 | .rdrnd, | 2461 | .rdrnd, |
| 2601 | .rdseed, | 2462 | .rdseed, |
| 2602 | .sahf, | 2463 | .sahf, |
| 2603 | .slow_3ops_lea, | 2464 | .sse2, |
| 2604 | .sse4_2, | 2465 | .sse4_2, |
| 2605 | .vzeroupper, | ||
| 2606 | .x87, | 2466 | .x87, |
| 2607 | .xsave, | 2467 | .xsave, |
| 2608 | .xsavec, | 2468 | .xsavec, |
| ... | @@ -2627,21 +2487,11 @@ pub const cpu = struct { | ... | @@ -2627,21 +2487,11 @@ pub const cpu = struct { |
| 2627 | .cx8, | 2487 | .cx8, |
| 2628 | .ermsb, | 2488 | .ermsb, |
| 2629 | .f16c, | 2489 | .f16c, |
| 2630 | .false_deps_popcnt, | ||
| 2631 | .fast_15bytenop, | ||
| 2632 | .fast_gather, | ||
| 2633 | .fast_scalar_fsqrt, | ||
| 2634 | .fast_shld_rotate, | ||
| 2635 | .fast_variable_shuffle, | ||
| 2636 | .fast_vector_fsqrt, | ||
| 2637 | .fma, | 2490 | .fma, |
| 2638 | .fsgsbase, | 2491 | .fsgsbase, |
| 2639 | .fxsr, | 2492 | .fxsr, |
| 2640 | .idivq_to_divl, | ||
| 2641 | .invpcid, | 2493 | .invpcid, |
| 2642 | .lzcnt, | 2494 | .lzcnt, |
| 2643 | .macrofusion, | ||
| 2644 | .merge_to_threeway_branch, | ||
| 2645 | .mmx, | 2495 | .mmx, |
| 2646 | .movbe, | 2496 | .movbe, |
| 2647 | .nopl, | 2497 | .nopl, |
| ... | @@ -2652,9 +2502,8 @@ pub const cpu = struct { | ... | @@ -2652,9 +2502,8 @@ pub const cpu = struct { |
| 2652 | .rdseed, | 2502 | .rdseed, |
| 2653 | .sahf, | 2503 | .sahf, |
| 2654 | .sgx, | 2504 | .sgx, |
| 2655 | .slow_3ops_lea, | 2505 | .sse2, |
| 2656 | .sse4_2, | 2506 | .sse4_2, |
| 2657 | .vzeroupper, | ||
| 2658 | .x87, | 2507 | .x87, |
| 2659 | .xsave, | 2508 | .xsave, |
| 2660 | .xsavec, | 2509 | .xsavec, |
| ... | @@ -2685,35 +2534,23 @@ pub const cpu = struct { | ... | @@ -2685,35 +2534,23 @@ pub const cpu = struct { |
| 2685 | .cx8, | 2534 | .cx8, |
| 2686 | .ermsb, | 2535 | .ermsb, |
| 2687 | .f16c, | 2536 | .f16c, |
| 2688 | .false_deps_popcnt, | ||
| 2689 | .fast_15bytenop, | ||
| 2690 | .fast_gather, | ||
| 2691 | .fast_scalar_fsqrt, | ||
| 2692 | .fast_shld_rotate, | ||
| 2693 | .fast_variable_shuffle, | ||
| 2694 | .fast_vector_fsqrt, | ||
| 2695 | .fma, | 2537 | .fma, |
| 2696 | .fsgsbase, | 2538 | .fsgsbase, |
| 2697 | .fxsr, | 2539 | .fxsr, |
| 2698 | .idivq_to_divl, | ||
| 2699 | .invpcid, | 2540 | .invpcid, |
| 2700 | .lzcnt, | 2541 | .lzcnt, |
| 2701 | .macrofusion, | ||
| 2702 | .merge_to_threeway_branch, | ||
| 2703 | .mmx, | 2542 | .mmx, |
| 2704 | .movbe, | 2543 | .movbe, |
| 2705 | .nopl, | 2544 | .nopl, |
| 2706 | .pclmul, | 2545 | .pclmul, |
| 2707 | .pku, | 2546 | .pku, |
| 2708 | .popcnt, | 2547 | .popcnt, |
| 2709 | .prefer_256_bit, | ||
| 2710 | .prfchw, | 2548 | .prfchw, |
| 2711 | .rdrnd, | 2549 | .rdrnd, |
| 2712 | .rdseed, | 2550 | .rdseed, |
| 2713 | .sahf, | 2551 | .sahf, |
| 2714 | .slow_3ops_lea, | 2552 | .sse2, |
| 2715 | .sse4_2, | 2553 | .sse4_2, |
| 2716 | .vzeroupper, | ||
| 2717 | .x87, | 2554 | .x87, |
| 2718 | .xsave, | 2555 | .xsave, |
| 2719 | .xsavec, | 2556 | .xsavec, |
| ... | @@ -2729,10 +2566,7 @@ pub const cpu = struct { | ... | @@ -2729,10 +2566,7 @@ pub const cpu = struct { |
| 2729 | .cmov, | 2566 | .cmov, |
| 2730 | .cx16, | 2567 | .cx16, |
| 2731 | .cx8, | 2568 | .cx8, |
| 2732 | .false_deps_popcnt, | ||
| 2733 | .fast_7bytenop, | ||
| 2734 | .fxsr, | 2569 | .fxsr, |
| 2735 | .idivq_to_divl, | ||
| 2736 | .mmx, | 2570 | .mmx, |
| 2737 | .movbe, | 2571 | .movbe, |
| 2738 | .nopl, | 2572 | .nopl, |
| ... | @@ -2741,13 +2575,8 @@ pub const cpu = struct { | ... | @@ -2741,13 +2575,8 @@ pub const cpu = struct { |
| 2741 | .prfchw, | 2575 | .prfchw, |
| 2742 | .rdrnd, | 2576 | .rdrnd, |
| 2743 | .sahf, | 2577 | .sahf, |
| 2744 | .slow_incdec, | ||
| 2745 | .slow_lea, | ||
| 2746 | .slow_pmulld, | ||
| 2747 | .slow_two_mem_ops, | ||
| 2748 | .sse4_2, | 2578 | .sse4_2, |
| 2749 | .ssse3, | 2579 | .ssse3, |
| 2750 | .vzeroupper, | ||
| 2751 | .x87, | 2580 | .x87, |
| 2752 | }), | 2581 | }), |
| 2753 | }; | 2582 | }; |
| ... | @@ -2781,21 +2610,13 @@ pub const cpu = struct { | ... | @@ -2781,21 +2610,13 @@ pub const cpu = struct { |
| 2781 | .cx8, | 2610 | .cx8, |
| 2782 | .ermsb, | 2611 | .ermsb, |
| 2783 | .f16c, | 2612 | .f16c, |
| 2784 | .fast_15bytenop, | ||
| 2785 | .fast_gather, | ||
| 2786 | .fast_scalar_fsqrt, | ||
| 2787 | .fast_shld_rotate, | ||
| 2788 | .fast_variable_shuffle, | ||
| 2789 | .fast_vector_fsqrt, | ||
| 2790 | .fma, | 2613 | .fma, |
| 2791 | .fsgsbase, | 2614 | .fsgsbase, |
| 2615 | .fsrm, | ||
| 2792 | .fxsr, | 2616 | .fxsr, |
| 2793 | .gfni, | 2617 | .gfni, |
| 2794 | .idivq_to_divl, | ||
| 2795 | .invpcid, | 2618 | .invpcid, |
| 2796 | .lzcnt, | 2619 | .lzcnt, |
| 2797 | .macrofusion, | ||
| 2798 | .merge_to_threeway_branch, | ||
| 2799 | .mmx, | 2620 | .mmx, |
| 2800 | .movbe, | 2621 | .movbe, |
| 2801 | .movdir64b, | 2622 | .movdir64b, |
| ... | @@ -2804,7 +2625,6 @@ pub const cpu = struct { | ... | @@ -2804,7 +2625,6 @@ pub const cpu = struct { |
| 2804 | .pclmul, | 2625 | .pclmul, |
| 2805 | .pku, | 2626 | .pku, |
| 2806 | .popcnt, | 2627 | .popcnt, |
| 2807 | .prefer_256_bit, | ||
| 2808 | .prfchw, | 2628 | .prfchw, |
| 2809 | .rdpid, | 2629 | .rdpid, |
| 2810 | .rdrnd, | 2630 | .rdrnd, |
| ... | @@ -2813,11 +2633,10 @@ pub const cpu = struct { | ... | @@ -2813,11 +2633,10 @@ pub const cpu = struct { |
| 2813 | .sgx, | 2633 | .sgx, |
| 2814 | .sha, | 2634 | .sha, |
| 2815 | .shstk, | 2635 | .shstk, |
| 2816 | .slow_3ops_lea, | 2636 | .sse2, |
| 2817 | .sse4_2, | 2637 | .sse4_2, |
| 2818 | .vaes, | 2638 | .vaes, |
| 2819 | .vpclmulqdq, | 2639 | .vpclmulqdq, |
| 2820 | .vzeroupper, | ||
| 2821 | .x87, | 2640 | .x87, |
| 2822 | .xsave, | 2641 | .xsave, |
| 2823 | .xsavec, | 2642 | .xsavec, |
| ... | @@ -2852,13 +2671,8 @@ pub const cpu = struct { | ... | @@ -2852,13 +2671,8 @@ pub const cpu = struct { |
| 2852 | .sahf, | 2671 | .sahf, |
| 2853 | .sgx, | 2672 | .sgx, |
| 2854 | .sha, | 2673 | .sha, |
| 2855 | .slow_incdec, | ||
| 2856 | .slow_lea, | ||
| 2857 | .slow_two_mem_ops, | ||
| 2858 | .sse4_2, | 2674 | .sse4_2, |
| 2859 | .ssse3, | 2675 | .ssse3, |
| 2860 | .use_glm_div_sqrt_costs, | ||
| 2861 | .vzeroupper, | ||
| 2862 | .x87, | 2676 | .x87, |
| 2863 | .xsave, | 2677 | .xsave, |
| 2864 | .xsavec, | 2678 | .xsavec, |
| ... | @@ -2875,14 +2689,13 @@ pub const cpu = struct { | ... | @@ -2875,14 +2689,13 @@ pub const cpu = struct { |
| 2875 | .cx16, | 2689 | .cx16, |
| 2876 | .cx8, | 2690 | .cx8, |
| 2877 | .fxsr, | 2691 | .fxsr, |
| 2878 | .macrofusion, | ||
| 2879 | .mmx, | 2692 | .mmx, |
| 2880 | .nopl, | 2693 | .nopl, |
| 2881 | .pclmul, | 2694 | .pclmul, |
| 2882 | .popcnt, | 2695 | .popcnt, |
| 2883 | .sahf, | 2696 | .sahf, |
| 2697 | .sse2, | ||
| 2884 | .sse4_2, | 2698 | .sse4_2, |
| 2885 | .vzeroupper, | ||
| 2886 | .x87, | 2699 | .x87, |
| 2887 | }), | 2700 | }), |
| 2888 | }; | 2701 | }; |
| ... | @@ -2891,8 +2704,6 @@ pub const cpu = struct { | ... | @@ -2891,8 +2704,6 @@ pub const cpu = struct { |
| 2891 | .llvm_name = "winchip-c6", | 2704 | .llvm_name = "winchip-c6", |
| 2892 | .features = featureSet(&[_]Feature{ | 2705 | .features = featureSet(&[_]Feature{ |
| 2893 | .mmx, | 2706 | .mmx, |
| 2894 | .slow_unaligned_mem_16, | ||
| 2895 | .vzeroupper, | ||
| 2896 | .x87, | 2707 | .x87, |
| 2897 | }), | 2708 | }), |
| 2898 | }; | 2709 | }; |
| ... | @@ -2901,8 +2712,6 @@ pub const cpu = struct { | ... | @@ -2901,8 +2712,6 @@ pub const cpu = struct { |
| 2901 | .llvm_name = "winchip2", | 2712 | .llvm_name = "winchip2", |
| 2902 | .features = featureSet(&[_]Feature{ | 2713 | .features = featureSet(&[_]Feature{ |
| 2903 | .@"3dnow", | 2714 | .@"3dnow", |
| 2904 | .slow_unaligned_mem_16, | ||
| 2905 | .vzeroupper, | ||
| 2906 | .x87, | 2715 | .x87, |
| 2907 | }), | 2716 | }), |
| 2908 | }; | 2717 | }; |
| ... | @@ -2914,17 +2723,86 @@ pub const cpu = struct { | ... | @@ -2914,17 +2723,86 @@ pub const cpu = struct { |
| 2914 | .cmov, | 2723 | .cmov, |
| 2915 | .cx8, | 2724 | .cx8, |
| 2916 | .fxsr, | 2725 | .fxsr, |
| 2917 | .idivq_to_divl, | ||
| 2918 | .macrofusion, | ||
| 2919 | .mmx, | 2726 | .mmx, |
| 2920 | .nopl, | 2727 | .nopl, |
| 2921 | .slow_3ops_lea, | ||
| 2922 | .slow_incdec, | ||
| 2923 | .sse2, | 2728 | .sse2, |
| 2924 | .vzeroupper, | ||
| 2925 | .x87, | 2729 | .x87, |
| 2926 | }), | 2730 | }), |
| 2927 | }; | 2731 | }; |
| 2732 | pub const x86_64_v2 = CpuModel{ | ||
| 2733 | .name = "x86_64_v2", | ||
| 2734 | .llvm_name = "x86-64-v2", | ||
| 2735 | .features = featureSet(&[_]Feature{ | ||
| 2736 | .@"64bit", | ||
| 2737 | .cmov, | ||
| 2738 | .cx16, | ||
| 2739 | .cx8, | ||
| 2740 | .fxsr, | ||
| 2741 | .mmx, | ||
| 2742 | .nopl, | ||
| 2743 | .popcnt, | ||
| 2744 | .sahf, | ||
| 2745 | .sse2, | ||
| 2746 | .sse4_2, | ||
| 2747 | .x87, | ||
| 2748 | }), | ||
| 2749 | }; | ||
| 2750 | pub const x86_64_v3 = CpuModel{ | ||
| 2751 | .name = "x86_64_v3", | ||
| 2752 | .llvm_name = "x86-64-v3", | ||
| 2753 | .features = featureSet(&[_]Feature{ | ||
| 2754 | .@"64bit", | ||
| 2755 | .avx2, | ||
| 2756 | .bmi, | ||
| 2757 | .bmi2, | ||
| 2758 | .cmov, | ||
| 2759 | .cx16, | ||
| 2760 | .cx8, | ||
| 2761 | .f16c, | ||
| 2762 | .fma, | ||
| 2763 | .fxsr, | ||
| 2764 | .lzcnt, | ||
| 2765 | .mmx, | ||
| 2766 | .movbe, | ||
| 2767 | .nopl, | ||
| 2768 | .popcnt, | ||
| 2769 | .sahf, | ||
| 2770 | .sse2, | ||
| 2771 | .sse4_2, | ||
| 2772 | .x87, | ||
| 2773 | .xsave, | ||
| 2774 | }), | ||
| 2775 | }; | ||
| 2776 | pub const x86_64_v4 = CpuModel{ | ||
| 2777 | .name = "x86_64_v4", | ||
| 2778 | .llvm_name = "x86-64-v4", | ||
| 2779 | .features = featureSet(&[_]Feature{ | ||
| 2780 | .@"64bit", | ||
| 2781 | .avx2, | ||
| 2782 | .avx512bw, | ||
| 2783 | .avx512cd, | ||
| 2784 | .avx512dq, | ||
| 2785 | .avx512vl, | ||
| 2786 | .bmi, | ||
| 2787 | .bmi2, | ||
| 2788 | .cmov, | ||
| 2789 | .cx16, | ||
| 2790 | .cx8, | ||
| 2791 | .f16c, | ||
| 2792 | .fma, | ||
| 2793 | .fxsr, | ||
| 2794 | .lzcnt, | ||
| 2795 | .mmx, | ||
| 2796 | .movbe, | ||
| 2797 | .nopl, | ||
| 2798 | .popcnt, | ||
| 2799 | .sahf, | ||
| 2800 | .sse2, | ||
| 2801 | .sse4_2, | ||
| 2802 | .x87, | ||
| 2803 | .xsave, | ||
| 2804 | }), | ||
| 2805 | }; | ||
| 2928 | pub const yonah = CpuModel{ | 2806 | pub const yonah = CpuModel{ |
| 2929 | .name = "yonah", | 2807 | .name = "yonah", |
| 2930 | .llvm_name = "yonah", | 2808 | .llvm_name = "yonah", |
| ... | @@ -2934,9 +2812,7 @@ pub const cpu = struct { | ... | @@ -2934,9 +2812,7 @@ pub const cpu = struct { |
| 2934 | .fxsr, | 2812 | .fxsr, |
| 2935 | .mmx, | 2813 | .mmx, |
| 2936 | .nopl, | 2814 | .nopl, |
| 2937 | .slow_unaligned_mem_16, | ||
| 2938 | .sse3, | 2815 | .sse3, |
| 2939 | .vzeroupper, | ||
| 2940 | .x87, | 2816 | .x87, |
| 2941 | }), | 2817 | }), |
| 2942 | }; | 2818 | }; |
| ... | @@ -2950,16 +2826,11 @@ pub const cpu = struct { | ... | @@ -2950,16 +2826,11 @@ pub const cpu = struct { |
| 2950 | .avx2, | 2826 | .avx2, |
| 2951 | .bmi, | 2827 | .bmi, |
| 2952 | .bmi2, | 2828 | .bmi2, |
| 2953 | .branchfusion, | ||
| 2954 | .clflushopt, | 2829 | .clflushopt, |
| 2955 | .clzero, | 2830 | .clzero, |
| 2956 | .cmov, | 2831 | .cmov, |
| 2957 | .cx16, | 2832 | .cx16, |
| 2958 | .f16c, | 2833 | .f16c, |
| 2959 | .fast_15bytenop, | ||
| 2960 | .fast_bextr, | ||
| 2961 | .fast_lzcnt, | ||
| 2962 | .fast_scalar_shift_masks, | ||
| 2963 | .fma, | 2834 | .fma, |
| 2964 | .fsgsbase, | 2835 | .fsgsbase, |
| 2965 | .fxsr, | 2836 | .fxsr, |
| ... | @@ -2975,9 +2846,7 @@ pub const cpu = struct { | ... | @@ -2975,9 +2846,7 @@ pub const cpu = struct { |
| 2975 | .rdseed, | 2846 | .rdseed, |
| 2976 | .sahf, | 2847 | .sahf, |
| 2977 | .sha, | 2848 | .sha, |
| 2978 | .slow_shld, | ||
| 2979 | .sse4a, | 2849 | .sse4a, |
| 2980 | .vzeroupper, | ||
| 2981 | .x87, | 2850 | .x87, |
| 2982 | .xsave, | 2851 | .xsave, |
| 2983 | .xsavec, | 2852 | .xsavec, |
| ... | @@ -2995,17 +2864,12 @@ pub const cpu = struct { | ... | @@ -2995,17 +2864,12 @@ pub const cpu = struct { |
| 2995 | .avx2, | 2864 | .avx2, |
| 2996 | .bmi, | 2865 | .bmi, |
| 2997 | .bmi2, | 2866 | .bmi2, |
| 2998 | .branchfusion, | ||
| 2999 | .clflushopt, | 2867 | .clflushopt, |
| 3000 | .clwb, | 2868 | .clwb, |
| 3001 | .clzero, | 2869 | .clzero, |
| 3002 | .cmov, | 2870 | .cmov, |
| 3003 | .cx16, | 2871 | .cx16, |
| 3004 | .f16c, | 2872 | .f16c, |
| 3005 | .fast_15bytenop, | ||
| 3006 | .fast_bextr, | ||
| 3007 | .fast_lzcnt, | ||
| 3008 | .fast_scalar_shift_masks, | ||
| 3009 | .fma, | 2873 | .fma, |
| 3010 | .fsgsbase, | 2874 | .fsgsbase, |
| 3011 | .fxsr, | 2875 | .fxsr, |
| ... | @@ -3022,9 +2886,52 @@ pub const cpu = struct { | ... | @@ -3022,9 +2886,52 @@ pub const cpu = struct { |
| 3022 | .rdseed, | 2886 | .rdseed, |
| 3023 | .sahf, | 2887 | .sahf, |
| 3024 | .sha, | 2888 | .sha, |
| 3025 | .slow_shld, | ||
| 3026 | .sse4a, | 2889 | .sse4a, |
| 3027 | .vzeroupper, | 2890 | .wbnoinvd, |
| 2891 | .x87, | ||
| 2892 | .xsave, | ||
| 2893 | .xsavec, | ||
| 2894 | .xsaveopt, | ||
| 2895 | .xsaves, | ||
| 2896 | }), | ||
| 2897 | }; | ||
| 2898 | pub const znver3 = CpuModel{ | ||
| 2899 | .name = "znver3", | ||
| 2900 | .llvm_name = "znver3", | ||
| 2901 | .features = featureSet(&[_]Feature{ | ||
| 2902 | .@"64bit", | ||
| 2903 | .adx, | ||
| 2904 | .aes, | ||
| 2905 | .avx2, | ||
| 2906 | .bmi, | ||
| 2907 | .bmi2, | ||
| 2908 | .clflushopt, | ||
| 2909 | .clwb, | ||
| 2910 | .clzero, | ||
| 2911 | .cmov, | ||
| 2912 | .cx16, | ||
| 2913 | .f16c, | ||
| 2914 | .fma, | ||
| 2915 | .fsgsbase, | ||
| 2916 | .fxsr, | ||
| 2917 | .invpcid, | ||
| 2918 | .lzcnt, | ||
| 2919 | .mmx, | ||
| 2920 | .movbe, | ||
| 2921 | .mwaitx, | ||
| 2922 | .nopl, | ||
| 2923 | .pclmul, | ||
| 2924 | .pku, | ||
| 2925 | .popcnt, | ||
| 2926 | .prfchw, | ||
| 2927 | .rdpid, | ||
| 2928 | .rdrnd, | ||
| 2929 | .rdseed, | ||
| 2930 | .sahf, | ||
| 2931 | .sha, | ||
| 2932 | .sse4a, | ||
| 2933 | .vaes, | ||
| 2934 | .vpclmulqdq, | ||
| 3028 | .wbnoinvd, | 2935 | .wbnoinvd, |
| 3029 | .x87, | 2936 | .x87, |
| 3030 | .xsave, | 2937 | .xsave, |