| ... | @@ -997,19 +997,10 @@ static bool instr_is_unreachable(IrInstSrc *instruction) { | ... | @@ -997,19 +997,10 @@ static bool instr_is_unreachable(IrInstSrc *instruction) { |
| 997 | return instruction->is_noreturn; | 997 | return instruction->is_noreturn; |
| 998 | } | 998 | } |
| 999 | | 999 | |
| 1000 | static void ir_link_new_bb(IrBasicBlockGen *new_bb, IrBasicBlockSrc *old_bb) { | | |
| 1001 | new_bb->parent = old_bb; | | |
| 1002 | old_bb->child = new_bb; | | |
| 1003 | } | | |
| 1004 | | | |
| 1005 | static void ir_ref_bb(IrBasicBlockSrc *bb) { | 1000 | static void ir_ref_bb(IrBasicBlockSrc *bb) { |
| 1006 | bb->ref_count += 1; | 1001 | bb->ref_count += 1; |
| 1007 | } | 1002 | } |
| 1008 | | 1003 | |
| 1009 | static void ir_ref_bb_gen(IrBasicBlockGen *bb) { | | |
| 1010 | bb->ref_count += 1; | | |
| 1011 | } | | |
| 1012 | | | |
| 1013 | static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) { | 1004 | static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) { |
| 1014 | assert(instruction->id != IrInstSrcIdInvalid); | 1005 | assert(instruction->id != IrInstSrcIdInvalid); |
| 1015 | instruction->base.ref_count += 1; | 1006 | instruction->base.ref_count += 1; |
| ... | @@ -1023,8 +1014,6 @@ static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) | ... | @@ -1023,8 +1014,6 @@ static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) |
| 1023 | static void ir_ref_inst_gen(IrInstGen *instruction, IrBasicBlockGen *cur_bb) { | 1014 | static void ir_ref_inst_gen(IrInstGen *instruction, IrBasicBlockGen *cur_bb) { |
| 1024 | assert(instruction->id != IrInstGenIdInvalid); | 1015 | assert(instruction->id != IrInstGenIdInvalid); |
| 1025 | instruction->base.ref_count += 1; | 1016 | instruction->base.ref_count += 1; |
| 1026 | if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction)) | | |
| 1027 | ir_ref_bb_gen(instruction->owner_bb); | | |
| 1028 | } | 1017 | } |
| 1029 | | 1018 | |
| 1030 | static void ir_ref_var(ZigVar *var) { | 1019 | static void ir_ref_var(ZigVar *var) { |
| ... | @@ -1084,13 +1073,12 @@ static IrBasicBlockGen *ir_create_basic_block_gen(IrAnalyze *ira, Scope *scope, | ... | @@ -1084,13 +1073,12 @@ static IrBasicBlockGen *ir_create_basic_block_gen(IrAnalyze *ira, Scope *scope, |
| 1084 | result->scope = scope; | 1073 | result->scope = scope; |
| 1085 | result->name_hint = name_hint; | 1074 | result->name_hint = name_hint; |
| 1086 | result->debug_id = exec_next_debug_id_gen(ira->new_irb.exec); | 1075 | result->debug_id = exec_next_debug_id_gen(ira->new_irb.exec); |
| 1087 | result->index = UINT32_MAX; // set later | | |
| 1088 | return result; | 1076 | return result; |
| 1089 | } | 1077 | } |
| 1090 | | 1078 | |
| 1091 | static IrBasicBlockGen *ir_build_bb_from(IrAnalyze *ira, IrBasicBlockSrc *other_bb) { | 1079 | static IrBasicBlockGen *ir_build_bb_from(IrAnalyze *ira, IrBasicBlockSrc *other_bb) { |
| 1092 | IrBasicBlockGen *new_bb = ir_create_basic_block_gen(ira, other_bb->scope, other_bb->name_hint); | 1080 | IrBasicBlockGen *new_bb = ir_create_basic_block_gen(ira, other_bb->scope, other_bb->name_hint); |
| 1093 | ir_link_new_bb(new_bb, other_bb); | 1081 | other_bb->child = new_bb; |
| 1094 | return new_bb; | 1082 | return new_bb; |
| 1095 | } | 1083 | } |
| 1096 | | 1084 | |
| ... | @@ -2082,8 +2070,6 @@ static IrInstGen *ir_build_cond_br_gen(IrAnalyze *ira, IrInst *source_instr, IrI | ... | @@ -2082,8 +2070,6 @@ static IrInstGen *ir_build_cond_br_gen(IrAnalyze *ira, IrInst *source_instr, IrI |
| 2082 | inst->else_block = else_block; | 2070 | inst->else_block = else_block; |
| 2083 | | 2071 | |
| 2084 | ir_ref_inst_gen(condition, ira->new_irb.current_basic_block); | 2072 | ir_ref_inst_gen(condition, ira->new_irb.current_basic_block); |
| 2085 | ir_ref_bb_gen(then_block); | | |
| 2086 | ir_ref_bb_gen(else_block); | | |
| 2087 | | 2073 | |
| 2088 | return &inst->base; | 2074 | return &inst->base; |
| 2089 | } | 2075 | } |
| ... | @@ -2527,7 +2513,6 @@ static IrInstGen *ir_build_phi_gen(IrAnalyze *ira, IrInst *source_instr, size_t | ... | @@ -2527,7 +2513,6 @@ static IrInstGen *ir_build_phi_gen(IrAnalyze *ira, IrInst *source_instr, size_t |
| 2527 | phi_instruction->incoming_values = incoming_values; | 2513 | phi_instruction->incoming_values = incoming_values; |
| 2528 | | 2514 | |
| 2529 | for (size_t i = 0; i < incoming_count; i += 1) { | 2515 | for (size_t i = 0; i < incoming_count; i += 1) { |
| 2530 | ir_ref_bb_gen(incoming_blocks[i]); | | |
| 2531 | ir_ref_inst_gen(incoming_values[i], ira->new_irb.current_basic_block); | 2516 | ir_ref_inst_gen(incoming_values[i], ira->new_irb.current_basic_block); |
| 2532 | } | 2517 | } |
| 2533 | | 2518 | |
| ... | @@ -2552,8 +2537,6 @@ static IrInstGen *ir_build_br_gen(IrAnalyze *ira, IrInst *source_instr, IrBasicB | ... | @@ -2552,8 +2537,6 @@ static IrInstGen *ir_build_br_gen(IrAnalyze *ira, IrInst *source_instr, IrBasicB |
| 2552 | IrInstGenBr *inst = ir_build_inst_noreturn<IrInstGenBr>(&ira->new_irb, source_instr->scope, source_instr->source_node); | 2537 | IrInstGenBr *inst = ir_build_inst_noreturn<IrInstGenBr>(&ira->new_irb, source_instr->scope, source_instr->source_node); |
| 2553 | inst->dest_block = dest_block; | 2538 | inst->dest_block = dest_block; |
| 2554 | | 2539 | |
| 2555 | ir_ref_bb_gen(dest_block); | | |
| 2556 | | | |
| 2557 | return &inst->base; | 2540 | return &inst->base; |
| 2558 | } | 2541 | } |
| 2559 | | 2542 | |
| ... | @@ -3219,11 +3202,9 @@ static IrInstGenSwitchBr *ir_build_switch_br_gen(IrAnalyze *ira, IrInst *source_ | ... | @@ -3219,11 +3202,9 @@ static IrInstGenSwitchBr *ir_build_switch_br_gen(IrAnalyze *ira, IrInst *source_ |
| 3219 | instruction->cases = cases; | 3202 | instruction->cases = cases; |
| 3220 | | 3203 | |
| 3221 | ir_ref_inst_gen(target_value, ira->new_irb.current_basic_block); | 3204 | ir_ref_inst_gen(target_value, ira->new_irb.current_basic_block); |
| 3222 | ir_ref_bb_gen(else_block); | | |
| 3223 | | 3205 | |
| 3224 | for (size_t i = 0; i < case_count; i += 1) { | 3206 | for (size_t i = 0; i < case_count; i += 1) { |
| 3225 | ir_ref_inst_gen(cases[i].value, ira->new_irb.current_basic_block); | 3207 | ir_ref_inst_gen(cases[i].value, ira->new_irb.current_basic_block); |
| 3226 | ir_ref_bb_gen(cases[i].block); | | |
| 3227 | } | 3208 | } |
| 3228 | | 3209 | |
| 3229 | return instruction; | 3210 | return instruction; |
| ... | @@ -30590,7 +30571,6 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutableSrc *old_exec, IrExecutableGen | ... | @@ -30590,7 +30571,6 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutableSrc *old_exec, IrExecutableGen |
| 30590 | | 30571 | |
| 30591 | IrBasicBlockSrc *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0); | 30572 | IrBasicBlockSrc *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0); |
| 30592 | IrBasicBlockGen *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr); | 30573 | IrBasicBlockGen *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr); |
| 30593 | ir_ref_bb_gen(new_entry_bb); | | |
| 30594 | ira->new_irb.current_basic_block = new_entry_bb; | 30574 | ira->new_irb.current_basic_block = new_entry_bb; |
| 30595 | ira->old_bb_index = 0; | 30575 | ira->old_bb_index = 0; |
| 30596 | | 30576 | |