authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2023-01-25 20:56:43-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2023-01-25 20:56:43-07:00
log740a0d8f12a20b8feb2e756929f3063cf8740c65
tree259caaee50c5cde9fd7af85b769bbe90b578a8d9
parent5994a5d18d341f826b12a99c9d800601c69fc186

update zig_llvm.cpp and zig_llvm.h to LLVM 16

4 files changed, 25 insertions(+), 16 deletions(-)

lib/std/target.zig+4
...@@ -479,6 +479,9 @@ pub const Target = struct {...@@ -479,6 +479,9 @@ pub const Target = struct {
479 gnuabi64,479 gnuabi64,
480 gnueabi,480 gnueabi,
481 gnueabihf,481 gnueabihf,
482 gnuf32,
483 gnuf64,
484 gnusf,
482 gnux32,485 gnux32,
483 gnuilp32,486 gnuilp32,
484 code16,487 code16,
...@@ -855,6 +858,7 @@ pub const Target = struct {...@@ -855,6 +858,7 @@ pub const Target = struct {
855 x86,858 x86,
856 x86_64,859 x86_64,
857 xcore,860 xcore,
861 xtensa,
858 nvptx,862 nvptx,
859 nvptx64,863 nvptx64,
860 le32,864 le32,
src/codegen/llvm/bindings.zig+1
...@@ -1333,6 +1333,7 @@ pub const ArchType = enum(c_int) {...@@ -1333,6 +1333,7 @@ pub const ArchType = enum(c_int) {
1333 x86,1333 x86,
1334 x86_64,1334 x86_64,
1335 xcore,1335 xcore,
1336 xtensa,
1336 nvptx,1337 nvptx,
1337 nvptx64,1338 nvptx64,
1338 le32,1339 le32,
src/zig_llvm.cpp+16-16
...@@ -112,7 +112,7 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri...@@ -112,7 +112,7 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri
112 const char *CPU, const char *Features, LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc,112 const char *CPU, const char *Features, LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc,
113 LLVMCodeModel CodeModel, bool function_sections, ZigLLVMABIType float_abi, const char *abi_name)113 LLVMCodeModel CodeModel, bool function_sections, ZigLLVMABIType float_abi, const char *abi_name)
114{114{
115 Optional<Reloc::Model> RM;115 std::optional<Reloc::Model> RM;
116 switch (Reloc){116 switch (Reloc){
117 case LLVMRelocStatic:117 case LLVMRelocStatic:
118 RM = Reloc::Static;118 RM = Reloc::Static;
...@@ -137,7 +137,7 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri...@@ -137,7 +137,7 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri
137 }137 }
138138
139 bool JIT;139 bool JIT;
140 Optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);140 std::optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);
141141
142 CodeGenOpt::Level OL;142 CodeGenOpt::Level OL;
143 switch (Level) {143 switch (Level) {
...@@ -287,11 +287,12 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM...@@ -287,11 +287,12 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
287287
288 // Instrumentations288 // Instrumentations
289 PassInstrumentationCallbacks instr_callbacks;289 PassInstrumentationCallbacks instr_callbacks;
290 StandardInstrumentations std_instrumentations(false);290 StandardInstrumentations std_instrumentations(llvm_module.getContext(), false);
291 std_instrumentations.registerCallbacks(instr_callbacks);291 std_instrumentations.registerCallbacks(instr_callbacks);
292292
293 std::optional<PGOOptions> opt_pgo_options = {};
293 PassBuilder pass_builder(&target_machine, pipeline_opts,294 PassBuilder pass_builder(&target_machine, pipeline_opts,
294 None, &instr_callbacks);295 opt_pgo_options, &instr_callbacks);
295296
296 LoopAnalysisManager loop_am;297 LoopAnalysisManager loop_am;
297 FunctionAnalysisManager function_am;298 FunctionAnalysisManager function_am;
...@@ -415,14 +416,9 @@ ZIG_EXTERN_C LLVMTypeRef ZigLLVMTokenTypeInContext(LLVMContextRef context_ref) {...@@ -415,14 +416,9 @@ ZIG_EXTERN_C LLVMTypeRef ZigLLVMTokenTypeInContext(LLVMContextRef context_ref) {
415416
416417
417ZIG_EXTERN_C void ZigLLVMSetOptBisectLimit(LLVMContextRef context_ref, int limit) {418ZIG_EXTERN_C void ZigLLVMSetOptBisectLimit(LLVMContextRef context_ref, int limit) {
418 // In LLVM15 we just have an OptBisect singleton we can edit.419 static OptBisect opt_bisect;
419 OptBisect& bisect = getOptBisector();420 opt_bisect.setLimit(limit);
420 bisect.setLimit(limit);421 unwrap(context_ref)->setOptPassGate(opt_bisect);
421
422 // In LLVM16 OptBisect will be wrapped in OptPassGate, and will need to be set per context.
423 // static OptBisect _opt_bisector;
424 // _opt_bisector.setLimit(limit);
425 // unwrap(context_ref)->setOptPassGate(_opt_bisector);
426}422}
427423
428LLVMValueRef ZigLLVMAddFunctionInAddressSpace(LLVMModuleRef M, const char *Name, LLVMTypeRef FunctionTy, unsigned AddressSpace) {424LLVMValueRef ZigLLVMAddFunctionInAddressSpace(LLVMModuleRef M, const char *Name, LLVMTypeRef FunctionTy, unsigned AddressSpace) {
...@@ -435,8 +431,8 @@ LLVMValueRef ZigLLVMBuildCall(LLVMBuilderRef B, LLVMTypeRef Ty, LLVMValueRef Fn,...@@ -435,8 +431,8 @@ LLVMValueRef ZigLLVMBuildCall(LLVMBuilderRef B, LLVMTypeRef Ty, LLVMValueRef Fn,
435 const char *Name)431 const char *Name)
436{432{
437 FunctionType *FTy = unwrap<FunctionType>(Ty);433 FunctionType *FTy = unwrap<FunctionType>(Ty);
438 CallInst *call_inst = unwrap(B)->CreateCall(FTy, unwrap(Fn), makeArrayRef(unwrap(Args),434 CallInst *call_inst = unwrap(B)->CreateCall(FTy, unwrap(Fn),
439 NumArgs), Name);435 ArrayRef(unwrap(Args), NumArgs), Name);
440 call_inst->setCallingConv(static_cast<CallingConv::ID>(CC));436 call_inst->setCallingConv(static_cast<CallingConv::ID>(CC));
441 switch (attr) {437 switch (attr) {
442 case ZigLLVM_CallAttrAuto:438 case ZigLLVM_CallAttrAuto:
...@@ -579,7 +575,7 @@ ZigLLVMDIType *ZigLLVMCreateDebugPointerType(ZigLLVMDIBuilder *dibuilder, ZigLLV...@@ -579,7 +575,7 @@ ZigLLVMDIType *ZigLLVMCreateDebugPointerType(ZigLLVMDIBuilder *dibuilder, ZigLLV
579 uint64_t size_in_bits, uint64_t align_in_bits, const char *name)575 uint64_t size_in_bits, uint64_t align_in_bits, const char *name)
580{576{
581 DIType *di_type = reinterpret_cast<DIBuilder*>(dibuilder)->createPointerType(577 DIType *di_type = reinterpret_cast<DIBuilder*>(dibuilder)->createPointerType(
582 reinterpret_cast<DIType*>(pointee_type), size_in_bits, align_in_bits, Optional<unsigned>(), name);578 reinterpret_cast<DIType*>(pointee_type), size_in_bits, align_in_bits, std::optional<unsigned>(), name);
583 return reinterpret_cast<ZigLLVMDIType*>(di_type);579 return reinterpret_cast<ZigLLVMDIType*>(di_type);
584}580}
585581
...@@ -625,7 +621,7 @@ ZigLLVMDIEnumerator *ZigLLVMCreateDebugEnumeratorOfArbitraryPrecision(ZigLLVMDIB...@@ -625,7 +621,7 @@ ZigLLVMDIEnumerator *ZigLLVMCreateDebugEnumeratorOfArbitraryPrecision(ZigLLVMDIB
625 const char *name, unsigned NumWords, const uint64_t Words[], unsigned int bits, bool isUnsigned)621 const char *name, unsigned NumWords, const uint64_t Words[], unsigned int bits, bool isUnsigned)
626{622{
627 DIEnumerator *di_enumerator = reinterpret_cast<DIBuilder*>(dibuilder)->createEnumerator(name,623 DIEnumerator *di_enumerator = reinterpret_cast<DIBuilder*>(dibuilder)->createEnumerator(name,
628 APSInt(APInt(bits, makeArrayRef(Words, NumWords)), isUnsigned));624 APSInt(APInt(bits, ArrayRef(Words, NumWords)), isUnsigned));
629 return reinterpret_cast<ZigLLVMDIEnumerator*>(di_enumerator);625 return reinterpret_cast<ZigLLVMDIEnumerator*>(di_enumerator);
630}626}
631627
...@@ -1493,6 +1489,7 @@ static_assert((Triple::ArchType)ZigLLVM_thumbeb == Triple::thumbeb, "");...@@ -1493,6 +1489,7 @@ static_assert((Triple::ArchType)ZigLLVM_thumbeb == Triple::thumbeb, "");
1493static_assert((Triple::ArchType)ZigLLVM_x86 == Triple::x86, "");1489static_assert((Triple::ArchType)ZigLLVM_x86 == Triple::x86, "");
1494static_assert((Triple::ArchType)ZigLLVM_x86_64 == Triple::x86_64, "");1490static_assert((Triple::ArchType)ZigLLVM_x86_64 == Triple::x86_64, "");
1495static_assert((Triple::ArchType)ZigLLVM_xcore == Triple::xcore, "");1491static_assert((Triple::ArchType)ZigLLVM_xcore == Triple::xcore, "");
1492static_assert((Triple::ArchType)ZigLLVM_xtensa == Triple::xtensa, "");
1496static_assert((Triple::ArchType)ZigLLVM_nvptx == Triple::nvptx, "");1493static_assert((Triple::ArchType)ZigLLVM_nvptx == Triple::nvptx, "");
1497static_assert((Triple::ArchType)ZigLLVM_nvptx64 == Triple::nvptx64, "");1494static_assert((Triple::ArchType)ZigLLVM_nvptx64 == Triple::nvptx64, "");
1498static_assert((Triple::ArchType)ZigLLVM_le32 == Triple::le32, "");1495static_assert((Triple::ArchType)ZigLLVM_le32 == Triple::le32, "");
...@@ -1578,6 +1575,9 @@ static_assert((Triple::EnvironmentType)ZigLLVM_GNUABIN32 == Triple::GNUABIN32, "...@@ -1578,6 +1575,9 @@ static_assert((Triple::EnvironmentType)ZigLLVM_GNUABIN32 == Triple::GNUABIN32, "
1578static_assert((Triple::EnvironmentType)ZigLLVM_GNUABI64 == Triple::GNUABI64, "");1575static_assert((Triple::EnvironmentType)ZigLLVM_GNUABI64 == Triple::GNUABI64, "");
1579static_assert((Triple::EnvironmentType)ZigLLVM_GNUEABI == Triple::GNUEABI, "");1576static_assert((Triple::EnvironmentType)ZigLLVM_GNUEABI == Triple::GNUEABI, "");
1580static_assert((Triple::EnvironmentType)ZigLLVM_GNUEABIHF == Triple::GNUEABIHF, "");1577static_assert((Triple::EnvironmentType)ZigLLVM_GNUEABIHF == Triple::GNUEABIHF, "");
1578static_assert((Triple::EnvironmentType)ZigLLVM_GNUF32 == Triple::GNUF32, "");
1579static_assert((Triple::EnvironmentType)ZigLLVM_GNUF64 == Triple::GNUF64, "");
1580static_assert((Triple::EnvironmentType)ZigLLVM_GNUSF == Triple::GNUSF, "");
1581static_assert((Triple::EnvironmentType)ZigLLVM_GNUX32 == Triple::GNUX32, "");1581static_assert((Triple::EnvironmentType)ZigLLVM_GNUX32 == Triple::GNUX32, "");
1582static_assert((Triple::EnvironmentType)ZigLLVM_GNUILP32 == Triple::GNUILP32, "");1582static_assert((Triple::EnvironmentType)ZigLLVM_GNUILP32 == Triple::GNUILP32, "");
1583static_assert((Triple::EnvironmentType)ZigLLVM_CODE16 == Triple::CODE16, "");1583static_assert((Triple::EnvironmentType)ZigLLVM_CODE16 == Triple::CODE16, "");
src/zig_llvm.h+4
...@@ -382,6 +382,7 @@ enum ZigLLVM_ArchType {...@@ -382,6 +382,7 @@ enum ZigLLVM_ArchType {
382 ZigLLVM_x86, // X86: i[3-9]86382 ZigLLVM_x86, // X86: i[3-9]86
383 ZigLLVM_x86_64, // X86-64: amd64, x86_64383 ZigLLVM_x86_64, // X86-64: amd64, x86_64
384 ZigLLVM_xcore, // XCore: xcore384 ZigLLVM_xcore, // XCore: xcore
385 ZigLLVM_xtensa, // Tensilica: Xtensa
385 ZigLLVM_nvptx, // NVPTX: 32-bit386 ZigLLVM_nvptx, // NVPTX: 32-bit
386 ZigLLVM_nvptx64, // NVPTX: 64-bit387 ZigLLVM_nvptx64, // NVPTX: 64-bit
387 ZigLLVM_le32, // le32: generic little-endian 32-bit CPU (PNaCl)388 ZigLLVM_le32, // le32: generic little-endian 32-bit CPU (PNaCl)
...@@ -482,6 +483,9 @@ enum ZigLLVM_EnvironmentType {...@@ -482,6 +483,9 @@ enum ZigLLVM_EnvironmentType {
482 ZigLLVM_GNUABI64,483 ZigLLVM_GNUABI64,
483 ZigLLVM_GNUEABI,484 ZigLLVM_GNUEABI,
484 ZigLLVM_GNUEABIHF,485 ZigLLVM_GNUEABIHF,
486 ZigLLVM_GNUF32,
487 ZigLLVM_GNUF64,
488 ZigLLVM_GNUSF,
485 ZigLLVM_GNUX32,489 ZigLLVM_GNUX32,
486 ZigLLVM_GNUILP32,490 ZigLLVM_GNUILP32,
487 ZigLLVM_CODE16,491 ZigLLVM_CODE16,