| ... | @@ -1042,20 +1042,11 @@ __ai uint32x2_t vadd_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -1042,20 +1042,11 @@ __ai uint32x2_t vadd_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 1042 | } | 1042 | } |
| 1043 | #endif | 1043 | #endif |
| 1044 | | 1044 | |
| 1045 | #ifdef __LITTLE_ENDIAN__ | | |
| 1046 | __ai uint64x1_t vadd_u64(uint64x1_t __p0, uint64x1_t __p1) { | 1045 | __ai uint64x1_t vadd_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 1047 | uint64x1_t __ret; | 1046 | uint64x1_t __ret; |
| 1048 | __ret = __p0 + __p1; | 1047 | __ret = __p0 + __p1; |
| 1049 | return __ret; | 1048 | return __ret; |
| 1050 | } | 1049 | } |
| 1051 | #else | | |
| 1052 | __ai uint64x1_t vadd_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 1053 | uint64x1_t __ret; | | |
| 1054 | __ret = __p0 + __p1; | | |
| 1055 | return __ret; | | |
| 1056 | } | | |
| 1057 | #endif | | |
| 1058 | | | |
| 1059 | #ifdef __LITTLE_ENDIAN__ | 1050 | #ifdef __LITTLE_ENDIAN__ |
| 1060 | __ai uint16x4_t vadd_u16(uint16x4_t __p0, uint16x4_t __p1) { | 1051 | __ai uint16x4_t vadd_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 1061 | uint16x4_t __ret; | 1052 | uint16x4_t __ret; |
| ... | @@ -1124,20 +1115,11 @@ __ai int32x2_t vadd_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -1124,20 +1115,11 @@ __ai int32x2_t vadd_s32(int32x2_t __p0, int32x2_t __p1) { |
| 1124 | } | 1115 | } |
| 1125 | #endif | 1116 | #endif |
| 1126 | | 1117 | |
| 1127 | #ifdef __LITTLE_ENDIAN__ | | |
| 1128 | __ai int64x1_t vadd_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 1129 | int64x1_t __ret; | | |
| 1130 | __ret = __p0 + __p1; | | |
| 1131 | return __ret; | | |
| 1132 | } | | |
| 1133 | #else | | |
| 1134 | __ai int64x1_t vadd_s64(int64x1_t __p0, int64x1_t __p1) { | 1118 | __ai int64x1_t vadd_s64(int64x1_t __p0, int64x1_t __p1) { |
| 1135 | int64x1_t __ret; | 1119 | int64x1_t __ret; |
| 1136 | __ret = __p0 + __p1; | 1120 | __ret = __p0 + __p1; |
| 1137 | return __ret; | 1121 | return __ret; |
| 1138 | } | 1122 | } |
| 1139 | #endif | | |
| 1140 | | | |
| 1141 | #ifdef __LITTLE_ENDIAN__ | 1123 | #ifdef __LITTLE_ENDIAN__ |
| 1142 | __ai int16x4_t vadd_s16(int16x4_t __p0, int16x4_t __p1) { | 1124 | __ai int16x4_t vadd_s16(int16x4_t __p0, int16x4_t __p1) { |
| 1143 | int16x4_t __ret; | 1125 | int16x4_t __ret; |
| ... | @@ -1457,20 +1439,11 @@ __ai uint32x2_t vand_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -1457,20 +1439,11 @@ __ai uint32x2_t vand_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 1457 | } | 1439 | } |
| 1458 | #endif | 1440 | #endif |
| 1459 | | 1441 | |
| 1460 | #ifdef __LITTLE_ENDIAN__ | | |
| 1461 | __ai uint64x1_t vand_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 1462 | uint64x1_t __ret; | | |
| 1463 | __ret = __p0 & __p1; | | |
| 1464 | return __ret; | | |
| 1465 | } | | |
| 1466 | #else | | |
| 1467 | __ai uint64x1_t vand_u64(uint64x1_t __p0, uint64x1_t __p1) { | 1442 | __ai uint64x1_t vand_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 1468 | uint64x1_t __ret; | 1443 | uint64x1_t __ret; |
| 1469 | __ret = __p0 & __p1; | 1444 | __ret = __p0 & __p1; |
| 1470 | return __ret; | 1445 | return __ret; |
| 1471 | } | 1446 | } |
| 1472 | #endif | | |
| 1473 | | | |
| 1474 | #ifdef __LITTLE_ENDIAN__ | 1447 | #ifdef __LITTLE_ENDIAN__ |
| 1475 | __ai uint16x4_t vand_u16(uint16x4_t __p0, uint16x4_t __p1) { | 1448 | __ai uint16x4_t vand_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 1476 | uint16x4_t __ret; | 1449 | uint16x4_t __ret; |
| ... | @@ -1522,20 +1495,11 @@ __ai int32x2_t vand_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -1522,20 +1495,11 @@ __ai int32x2_t vand_s32(int32x2_t __p0, int32x2_t __p1) { |
| 1522 | } | 1495 | } |
| 1523 | #endif | 1496 | #endif |
| 1524 | | 1497 | |
| 1525 | #ifdef __LITTLE_ENDIAN__ | | |
| 1526 | __ai int64x1_t vand_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 1527 | int64x1_t __ret; | | |
| 1528 | __ret = __p0 & __p1; | | |
| 1529 | return __ret; | | |
| 1530 | } | | |
| 1531 | #else | | |
| 1532 | __ai int64x1_t vand_s64(int64x1_t __p0, int64x1_t __p1) { | 1498 | __ai int64x1_t vand_s64(int64x1_t __p0, int64x1_t __p1) { |
| 1533 | int64x1_t __ret; | 1499 | int64x1_t __ret; |
| 1534 | __ret = __p0 & __p1; | 1500 | __ret = __p0 & __p1; |
| 1535 | return __ret; | 1501 | return __ret; |
| 1536 | } | 1502 | } |
| 1537 | #endif | | |
| 1538 | | | |
| 1539 | #ifdef __LITTLE_ENDIAN__ | 1503 | #ifdef __LITTLE_ENDIAN__ |
| 1540 | __ai int16x4_t vand_s16(int16x4_t __p0, int16x4_t __p1) { | 1504 | __ai int16x4_t vand_s16(int16x4_t __p0, int16x4_t __p1) { |
| 1541 | int16x4_t __ret; | 1505 | int16x4_t __ret; |
| ... | @@ -1723,20 +1687,11 @@ __ai uint32x2_t vbic_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -1723,20 +1687,11 @@ __ai uint32x2_t vbic_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 1723 | } | 1687 | } |
| 1724 | #endif | 1688 | #endif |
| 1725 | | 1689 | |
| 1726 | #ifdef __LITTLE_ENDIAN__ | | |
| 1727 | __ai uint64x1_t vbic_u64(uint64x1_t __p0, uint64x1_t __p1) { | 1690 | __ai uint64x1_t vbic_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 1728 | uint64x1_t __ret; | 1691 | uint64x1_t __ret; |
| 1729 | __ret = __p0 & ~__p1; | 1692 | __ret = __p0 & ~__p1; |
| 1730 | return __ret; | 1693 | return __ret; |
| 1731 | } | 1694 | } |
| 1732 | #else | | |
| 1733 | __ai uint64x1_t vbic_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 1734 | uint64x1_t __ret; | | |
| 1735 | __ret = __p0 & ~__p1; | | |
| 1736 | return __ret; | | |
| 1737 | } | | |
| 1738 | #endif | | |
| 1739 | | | |
| 1740 | #ifdef __LITTLE_ENDIAN__ | 1695 | #ifdef __LITTLE_ENDIAN__ |
| 1741 | __ai uint16x4_t vbic_u16(uint16x4_t __p0, uint16x4_t __p1) { | 1696 | __ai uint16x4_t vbic_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 1742 | uint16x4_t __ret; | 1697 | uint16x4_t __ret; |
| ... | @@ -1788,20 +1743,11 @@ __ai int32x2_t vbic_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -1788,20 +1743,11 @@ __ai int32x2_t vbic_s32(int32x2_t __p0, int32x2_t __p1) { |
| 1788 | } | 1743 | } |
| 1789 | #endif | 1744 | #endif |
| 1790 | | 1745 | |
| 1791 | #ifdef __LITTLE_ENDIAN__ | | |
| 1792 | __ai int64x1_t vbic_s64(int64x1_t __p0, int64x1_t __p1) { | 1746 | __ai int64x1_t vbic_s64(int64x1_t __p0, int64x1_t __p1) { |
| 1793 | int64x1_t __ret; | 1747 | int64x1_t __ret; |
| 1794 | __ret = __p0 & ~__p1; | 1748 | __ret = __p0 & ~__p1; |
| 1795 | return __ret; | 1749 | return __ret; |
| 1796 | } | 1750 | } |
| 1797 | #else | | |
| 1798 | __ai int64x1_t vbic_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 1799 | int64x1_t __ret; | | |
| 1800 | __ret = __p0 & ~__p1; | | |
| 1801 | return __ret; | | |
| 1802 | } | | |
| 1803 | #endif | | |
| 1804 | | | |
| 1805 | #ifdef __LITTLE_ENDIAN__ | 1751 | #ifdef __LITTLE_ENDIAN__ |
| 1806 | __ai int16x4_t vbic_s16(int16x4_t __p0, int16x4_t __p1) { | 1752 | __ai int16x4_t vbic_s16(int16x4_t __p0, int16x4_t __p1) { |
| 1807 | int16x4_t __ret; | 1753 | int16x4_t __ret; |
| ... | @@ -2089,20 +2035,11 @@ __ai uint32x2_t vbsl_u32(uint32x2_t __p0, uint32x2_t __p1, uint32x2_t __p2) { | ... | @@ -2089,20 +2035,11 @@ __ai uint32x2_t vbsl_u32(uint32x2_t __p0, uint32x2_t __p1, uint32x2_t __p2) { |
| 2089 | } | 2035 | } |
| 2090 | #endif | 2036 | #endif |
| 2091 | | 2037 | |
| 2092 | #ifdef __LITTLE_ENDIAN__ | | |
| 2093 | __ai uint64x1_t vbsl_u64(uint64x1_t __p0, uint64x1_t __p1, uint64x1_t __p2) { | | |
| 2094 | uint64x1_t __ret; | | |
| 2095 | __ret = (uint64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 19); | | |
| 2096 | return __ret; | | |
| 2097 | } | | |
| 2098 | #else | | |
| 2099 | __ai uint64x1_t vbsl_u64(uint64x1_t __p0, uint64x1_t __p1, uint64x1_t __p2) { | 2038 | __ai uint64x1_t vbsl_u64(uint64x1_t __p0, uint64x1_t __p1, uint64x1_t __p2) { |
| 2100 | uint64x1_t __ret; | 2039 | uint64x1_t __ret; |
| 2101 | __ret = (uint64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 19); | 2040 | __ret = (uint64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 19); |
| 2102 | return __ret; | 2041 | return __ret; |
| 2103 | } | 2042 | } |
| 2104 | #endif | | |
| 2105 | | | |
| 2106 | #ifdef __LITTLE_ENDIAN__ | 2043 | #ifdef __LITTLE_ENDIAN__ |
| 2107 | __ai uint16x4_t vbsl_u16(uint16x4_t __p0, uint16x4_t __p1, uint16x4_t __p2) { | 2044 | __ai uint16x4_t vbsl_u16(uint16x4_t __p0, uint16x4_t __p1, uint16x4_t __p2) { |
| 2108 | uint16x4_t __ret; | 2045 | uint16x4_t __ret; |
| ... | @@ -2175,20 +2112,11 @@ __ai int32x2_t vbsl_s32(uint32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { | ... | @@ -2175,20 +2112,11 @@ __ai int32x2_t vbsl_s32(uint32x2_t __p0, int32x2_t __p1, int32x2_t __p2) { |
| 2175 | } | 2112 | } |
| 2176 | #endif | 2113 | #endif |
| 2177 | | 2114 | |
| 2178 | #ifdef __LITTLE_ENDIAN__ | | |
| 2179 | __ai int64x1_t vbsl_s64(uint64x1_t __p0, int64x1_t __p1, int64x1_t __p2) { | 2115 | __ai int64x1_t vbsl_s64(uint64x1_t __p0, int64x1_t __p1, int64x1_t __p2) { |
| 2180 | int64x1_t __ret; | 2116 | int64x1_t __ret; |
| 2181 | __ret = (int64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 3); | 2117 | __ret = (int64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 3); |
| 2182 | return __ret; | 2118 | return __ret; |
| 2183 | } | 2119 | } |
| 2184 | #else | | |
| 2185 | __ai int64x1_t vbsl_s64(uint64x1_t __p0, int64x1_t __p1, int64x1_t __p2) { | | |
| 2186 | int64x1_t __ret; | | |
| 2187 | __ret = (int64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 3); | | |
| 2188 | return __ret; | | |
| 2189 | } | | |
| 2190 | #endif | | |
| 2191 | | | |
| 2192 | #ifdef __LITTLE_ENDIAN__ | 2120 | #ifdef __LITTLE_ENDIAN__ |
| 2193 | __ai int16x4_t vbsl_s16(uint16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { | 2121 | __ai int16x4_t vbsl_s16(uint16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 2194 | int16x4_t __ret; | 2122 | int16x4_t __ret; |
| ... | @@ -4191,174 +4119,78 @@ __ai int16x8_t __noswap_vcombine_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -4191,174 +4119,78 @@ __ai int16x8_t __noswap_vcombine_s16(int16x4_t __p0, int16x4_t __p1) { |
| 4191 | } | 4119 | } |
| 4192 | #endif | 4120 | #endif |
| 4193 | | 4121 | |
| 4194 | #ifdef __LITTLE_ENDIAN__ | 4122 | #define vcreate_p8(__p0) __extension__ ({ \ |
| 4195 | __ai poly8x8_t vcreate_p8(uint64_t __p0) { | 4123 | poly8x8_t __ret; \ |
| 4196 | poly8x8_t __ret; | 4124 | uint64_t __promote = __p0; \ |
| 4197 | __ret = (poly8x8_t)(__p0); | 4125 | __ret = (poly8x8_t)(__promote); \ |
| 4198 | return __ret; | 4126 | __ret; \ |
| 4199 | } | 4127 | }) |
| 4200 | #else | 4128 | #define vcreate_p16(__p0) __extension__ ({ \ |
| 4201 | __ai poly8x8_t vcreate_p8(uint64_t __p0) { | 4129 | poly16x4_t __ret; \ |
| 4202 | poly8x8_t __ret; | 4130 | uint64_t __promote = __p0; \ |
| 4203 | __ret = (poly8x8_t)(__p0); | 4131 | __ret = (poly16x4_t)(__promote); \ |
| 4204 | return __ret; | 4132 | __ret; \ |
| 4205 | } | 4133 | }) |
| 4206 | #endif | 4134 | #define vcreate_u8(__p0) __extension__ ({ \ |
| 4207 | | 4135 | uint8x8_t __ret; \ |
| 4208 | #ifdef __LITTLE_ENDIAN__ | 4136 | uint64_t __promote = __p0; \ |
| 4209 | __ai poly16x4_t vcreate_p16(uint64_t __p0) { | 4137 | __ret = (uint8x8_t)(__promote); \ |
| 4210 | poly16x4_t __ret; | 4138 | __ret; \ |
| 4211 | __ret = (poly16x4_t)(__p0); | 4139 | }) |
| 4212 | return __ret; | 4140 | #define vcreate_u32(__p0) __extension__ ({ \ |
| 4213 | } | 4141 | uint32x2_t __ret; \ |
| 4214 | #else | 4142 | uint64_t __promote = __p0; \ |
| 4215 | __ai poly16x4_t vcreate_p16(uint64_t __p0) { | 4143 | __ret = (uint32x2_t)(__promote); \ |
| 4216 | poly16x4_t __ret; | 4144 | __ret; \ |
| 4217 | __ret = (poly16x4_t)(__p0); | 4145 | }) |
| 4218 | return __ret; | 4146 | #define vcreate_u64(__p0) __extension__ ({ \ |
| 4219 | } | 4147 | uint64x1_t __ret; \ |
| 4220 | #endif | 4148 | uint64_t __promote = __p0; \ |
| 4221 | | 4149 | __ret = (uint64x1_t)(__promote); \ |
| 4222 | #ifdef __LITTLE_ENDIAN__ | 4150 | __ret; \ |
| 4223 | __ai uint8x8_t vcreate_u8(uint64_t __p0) { | 4151 | }) |
| 4224 | uint8x8_t __ret; | 4152 | #define vcreate_u16(__p0) __extension__ ({ \ |
| 4225 | __ret = (uint8x8_t)(__p0); | 4153 | uint16x4_t __ret; \ |
| 4226 | return __ret; | 4154 | uint64_t __promote = __p0; \ |
| 4227 | } | 4155 | __ret = (uint16x4_t)(__promote); \ |
| 4228 | #else | 4156 | __ret; \ |
| 4229 | __ai uint8x8_t vcreate_u8(uint64_t __p0) { | 4157 | }) |
| 4230 | uint8x8_t __ret; | 4158 | #define vcreate_s8(__p0) __extension__ ({ \ |
| 4231 | __ret = (uint8x8_t)(__p0); | 4159 | int8x8_t __ret; \ |
| 4232 | return __ret; | 4160 | uint64_t __promote = __p0; \ |
| 4233 | } | 4161 | __ret = (int8x8_t)(__promote); \ |
| 4234 | #endif | 4162 | __ret; \ |
| 4235 | | 4163 | }) |
| 4236 | #ifdef __LITTLE_ENDIAN__ | 4164 | #define vcreate_f32(__p0) __extension__ ({ \ |
| 4237 | __ai uint32x2_t vcreate_u32(uint64_t __p0) { | 4165 | float32x2_t __ret; \ |
| 4238 | uint32x2_t __ret; | 4166 | uint64_t __promote = __p0; \ |
| 4239 | __ret = (uint32x2_t)(__p0); | 4167 | __ret = (float32x2_t)(__promote); \ |
| 4240 | return __ret; | 4168 | __ret; \ |
| 4241 | } | 4169 | }) |
| 4242 | #else | 4170 | #define vcreate_f16(__p0) __extension__ ({ \ |
| 4243 | __ai uint32x2_t vcreate_u32(uint64_t __p0) { | 4171 | float16x4_t __ret; \ |
| 4244 | uint32x2_t __ret; | 4172 | uint64_t __promote = __p0; \ |
| 4245 | __ret = (uint32x2_t)(__p0); | 4173 | __ret = (float16x4_t)(__promote); \ |
| 4246 | return __ret; | 4174 | __ret; \ |
| 4247 | } | 4175 | }) |
| 4248 | #endif | 4176 | #define vcreate_s32(__p0) __extension__ ({ \ |
| 4249 | | 4177 | int32x2_t __ret; \ |
| 4250 | #ifdef __LITTLE_ENDIAN__ | 4178 | uint64_t __promote = __p0; \ |
| 4251 | __ai uint64x1_t vcreate_u64(uint64_t __p0) { | 4179 | __ret = (int32x2_t)(__promote); \ |
| 4252 | uint64x1_t __ret; | 4180 | __ret; \ |
| 4253 | __ret = (uint64x1_t)(__p0); | 4181 | }) |
| 4254 | return __ret; | 4182 | #define vcreate_s64(__p0) __extension__ ({ \ |
| 4255 | } | 4183 | int64x1_t __ret; \ |
| 4256 | #else | 4184 | uint64_t __promote = __p0; \ |
| 4257 | __ai uint64x1_t vcreate_u64(uint64_t __p0) { | 4185 | __ret = (int64x1_t)(__promote); \ |
| 4258 | uint64x1_t __ret; | 4186 | __ret; \ |
| 4259 | __ret = (uint64x1_t)(__p0); | 4187 | }) |
| 4260 | return __ret; | 4188 | #define vcreate_s16(__p0) __extension__ ({ \ |
| 4261 | } | 4189 | int16x4_t __ret; \ |
| 4262 | #endif | 4190 | uint64_t __promote = __p0; \ |
| 4263 | | 4191 | __ret = (int16x4_t)(__promote); \ |
| 4264 | #ifdef __LITTLE_ENDIAN__ | 4192 | __ret; \ |
| 4265 | __ai uint16x4_t vcreate_u16(uint64_t __p0) { | 4193 | }) |
| 4266 | uint16x4_t __ret; | | |
| 4267 | __ret = (uint16x4_t)(__p0); | | |
| 4268 | return __ret; | | |
| 4269 | } | | |
| 4270 | #else | | |
| 4271 | __ai uint16x4_t vcreate_u16(uint64_t __p0) { | | |
| 4272 | uint16x4_t __ret; | | |
| 4273 | __ret = (uint16x4_t)(__p0); | | |
| 4274 | return __ret; | | |
| 4275 | } | | |
| 4276 | #endif | | |
| 4277 | | | |
| 4278 | #ifdef __LITTLE_ENDIAN__ | | |
| 4279 | __ai int8x8_t vcreate_s8(uint64_t __p0) { | | |
| 4280 | int8x8_t __ret; | | |
| 4281 | __ret = (int8x8_t)(__p0); | | |
| 4282 | return __ret; | | |
| 4283 | } | | |
| 4284 | #else | | |
| 4285 | __ai int8x8_t vcreate_s8(uint64_t __p0) { | | |
| 4286 | int8x8_t __ret; | | |
| 4287 | __ret = (int8x8_t)(__p0); | | |
| 4288 | return __ret; | | |
| 4289 | } | | |
| 4290 | #endif | | |
| 4291 | | | |
| 4292 | #ifdef __LITTLE_ENDIAN__ | | |
| 4293 | __ai float32x2_t vcreate_f32(uint64_t __p0) { | | |
| 4294 | float32x2_t __ret; | | |
| 4295 | __ret = (float32x2_t)(__p0); | | |
| 4296 | return __ret; | | |
| 4297 | } | | |
| 4298 | #else | | |
| 4299 | __ai float32x2_t vcreate_f32(uint64_t __p0) { | | |
| 4300 | float32x2_t __ret; | | |
| 4301 | __ret = (float32x2_t)(__p0); | | |
| 4302 | return __ret; | | |
| 4303 | } | | |
| 4304 | #endif | | |
| 4305 | | | |
| 4306 | #ifdef __LITTLE_ENDIAN__ | | |
| 4307 | __ai float16x4_t vcreate_f16(uint64_t __p0) { | | |
| 4308 | float16x4_t __ret; | | |
| 4309 | __ret = (float16x4_t)(__p0); | | |
| 4310 | return __ret; | | |
| 4311 | } | | |
| 4312 | #else | | |
| 4313 | __ai float16x4_t vcreate_f16(uint64_t __p0) { | | |
| 4314 | float16x4_t __ret; | | |
| 4315 | __ret = (float16x4_t)(__p0); | | |
| 4316 | return __ret; | | |
| 4317 | } | | |
| 4318 | #endif | | |
| 4319 | | | |
| 4320 | #ifdef __LITTLE_ENDIAN__ | | |
| 4321 | __ai int32x2_t vcreate_s32(uint64_t __p0) { | | |
| 4322 | int32x2_t __ret; | | |
| 4323 | __ret = (int32x2_t)(__p0); | | |
| 4324 | return __ret; | | |
| 4325 | } | | |
| 4326 | #else | | |
| 4327 | __ai int32x2_t vcreate_s32(uint64_t __p0) { | | |
| 4328 | int32x2_t __ret; | | |
| 4329 | __ret = (int32x2_t)(__p0); | | |
| 4330 | return __ret; | | |
| 4331 | } | | |
| 4332 | #endif | | |
| 4333 | | | |
| 4334 | #ifdef __LITTLE_ENDIAN__ | | |
| 4335 | __ai int64x1_t vcreate_s64(uint64_t __p0) { | | |
| 4336 | int64x1_t __ret; | | |
| 4337 | __ret = (int64x1_t)(__p0); | | |
| 4338 | return __ret; | | |
| 4339 | } | | |
| 4340 | #else | | |
| 4341 | __ai int64x1_t vcreate_s64(uint64_t __p0) { | | |
| 4342 | int64x1_t __ret; | | |
| 4343 | __ret = (int64x1_t)(__p0); | | |
| 4344 | return __ret; | | |
| 4345 | } | | |
| 4346 | #endif | | |
| 4347 | | | |
| 4348 | #ifdef __LITTLE_ENDIAN__ | | |
| 4349 | __ai int16x4_t vcreate_s16(uint64_t __p0) { | | |
| 4350 | int16x4_t __ret; | | |
| 4351 | __ret = (int16x4_t)(__p0); | | |
| 4352 | return __ret; | | |
| 4353 | } | | |
| 4354 | #else | | |
| 4355 | __ai int16x4_t vcreate_s16(uint64_t __p0) { | | |
| 4356 | int16x4_t __ret; | | |
| 4357 | __ret = (int16x4_t)(__p0); | | |
| 4358 | return __ret; | | |
| 4359 | } | | |
| 4360 | #endif | | |
| 4361 | | | |
| 4362 | #ifdef __LITTLE_ENDIAN__ | 4194 | #ifdef __LITTLE_ENDIAN__ |
| 4363 | __ai float32x4_t vcvtq_f32_u32(uint32x4_t __p0) { | 4195 | __ai float32x4_t vcvtq_f32_u32(uint32x4_t __p0) { |
| 4364 | float32x4_t __ret; | 4196 | float32x4_t __ret; |
| ... | @@ -4899,22 +4731,12 @@ __ai uint32x2_t vcvt_u32_f32(float32x2_t __p0) { | ... | @@ -4899,22 +4731,12 @@ __ai uint32x2_t vcvt_u32_f32(float32x2_t __p0) { |
| 4899 | }) | 4731 | }) |
| 4900 | #endif | 4732 | #endif |
| 4901 | | 4733 | |
| 4902 | #ifdef __LITTLE_ENDIAN__ | | |
| 4903 | #define vdup_lane_u64(__p0, __p1) __extension__ ({ \ | | |
| 4904 | uint64x1_t __s0 = __p0; \ | | |
| 4905 | uint64x1_t __ret; \ | | |
| 4906 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ | | |
| 4907 | __ret; \ | | |
| 4908 | }) | | |
| 4909 | #else | | |
| 4910 | #define vdup_lane_u64(__p0, __p1) __extension__ ({ \ | 4734 | #define vdup_lane_u64(__p0, __p1) __extension__ ({ \ |
| 4911 | uint64x1_t __s0 = __p0; \ | 4735 | uint64x1_t __s0 = __p0; \ |
| 4912 | uint64x1_t __ret; \ | 4736 | uint64x1_t __ret; \ |
| 4913 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ | 4737 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ |
| 4914 | __ret; \ | 4738 | __ret; \ |
| 4915 | }) | 4739 | }) |
| 4916 | #endif | | |
| 4917 | | | |
| 4918 | #ifdef __LITTLE_ENDIAN__ | 4740 | #ifdef __LITTLE_ENDIAN__ |
| 4919 | #define vdup_lane_u16(__p0, __p1) __extension__ ({ \ | 4741 | #define vdup_lane_u16(__p0, __p1) __extension__ ({ \ |
| 4920 | uint16x4_t __s0 = __p0; \ | 4742 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -4987,22 +4809,12 @@ __ai uint32x2_t vcvt_u32_f32(float32x2_t __p0) { | ... | @@ -4987,22 +4809,12 @@ __ai uint32x2_t vcvt_u32_f32(float32x2_t __p0) { |
| 4987 | }) | 4809 | }) |
| 4988 | #endif | 4810 | #endif |
| 4989 | | 4811 | |
| 4990 | #ifdef __LITTLE_ENDIAN__ | | |
| 4991 | #define vdup_lane_s64(__p0, __p1) __extension__ ({ \ | 4812 | #define vdup_lane_s64(__p0, __p1) __extension__ ({ \ |
| 4992 | int64x1_t __s0 = __p0; \ | 4813 | int64x1_t __s0 = __p0; \ |
| 4993 | int64x1_t __ret; \ | 4814 | int64x1_t __ret; \ |
| 4994 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ | 4815 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ |
| 4995 | __ret; \ | 4816 | __ret; \ |
| 4996 | }) | 4817 | }) |
| 4997 | #else | | |
| 4998 | #define vdup_lane_s64(__p0, __p1) __extension__ ({ \ | | |
| 4999 | int64x1_t __s0 = __p0; \ | | |
| 5000 | int64x1_t __ret; \ | | |
| 5001 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ | | |
| 5002 | __ret; \ | | |
| 5003 | }) | | |
| 5004 | #endif | | |
| 5005 | | | |
| 5006 | #ifdef __LITTLE_ENDIAN__ | 4818 | #ifdef __LITTLE_ENDIAN__ |
| 5007 | #define vdup_lane_s16(__p0, __p1) __extension__ ({ \ | 4819 | #define vdup_lane_s16(__p0, __p1) __extension__ ({ \ |
| 5008 | int16x4_t __s0 = __p0; \ | 4820 | int16x4_t __s0 = __p0; \ |
| ... | @@ -5263,20 +5075,11 @@ __ai uint32x2_t vdup_n_u32(uint32_t __p0) { | ... | @@ -5263,20 +5075,11 @@ __ai uint32x2_t vdup_n_u32(uint32_t __p0) { |
| 5263 | } | 5075 | } |
| 5264 | #endif | 5076 | #endif |
| 5265 | | 5077 | |
| 5266 | #ifdef __LITTLE_ENDIAN__ | | |
| 5267 | __ai uint64x1_t vdup_n_u64(uint64_t __p0) { | | |
| 5268 | uint64x1_t __ret; | | |
| 5269 | __ret = (uint64x1_t) {__p0}; | | |
| 5270 | return __ret; | | |
| 5271 | } | | |
| 5272 | #else | | |
| 5273 | __ai uint64x1_t vdup_n_u64(uint64_t __p0) { | 5078 | __ai uint64x1_t vdup_n_u64(uint64_t __p0) { |
| 5274 | uint64x1_t __ret; | 5079 | uint64x1_t __ret; |
| 5275 | __ret = (uint64x1_t) {__p0}; | 5080 | __ret = (uint64x1_t) {__p0}; |
| 5276 | return __ret; | 5081 | return __ret; |
| 5277 | } | 5082 | } |
| 5278 | #endif | | |
| 5279 | | | |
| 5280 | #ifdef __LITTLE_ENDIAN__ | 5083 | #ifdef __LITTLE_ENDIAN__ |
| 5281 | __ai uint16x4_t vdup_n_u16(uint16_t __p0) { | 5084 | __ai uint16x4_t vdup_n_u16(uint16_t __p0) { |
| 5282 | uint16x4_t __ret; | 5085 | uint16x4_t __ret; |
| ... | @@ -5354,20 +5157,11 @@ __ai int32x2_t vdup_n_s32(int32_t __p0) { | ... | @@ -5354,20 +5157,11 @@ __ai int32x2_t vdup_n_s32(int32_t __p0) { |
| 5354 | } | 5157 | } |
| 5355 | #endif | 5158 | #endif |
| 5356 | | 5159 | |
| 5357 | #ifdef __LITTLE_ENDIAN__ | | |
| 5358 | __ai int64x1_t vdup_n_s64(int64_t __p0) { | | |
| 5359 | int64x1_t __ret; | | |
| 5360 | __ret = (int64x1_t) {__p0}; | | |
| 5361 | return __ret; | | |
| 5362 | } | | |
| 5363 | #else | | |
| 5364 | __ai int64x1_t vdup_n_s64(int64_t __p0) { | 5160 | __ai int64x1_t vdup_n_s64(int64_t __p0) { |
| 5365 | int64x1_t __ret; | 5161 | int64x1_t __ret; |
| 5366 | __ret = (int64x1_t) {__p0}; | 5162 | __ret = (int64x1_t) {__p0}; |
| 5367 | return __ret; | 5163 | return __ret; |
| 5368 | } | 5164 | } |
| 5369 | #endif | | |
| 5370 | | | |
| 5371 | #ifdef __LITTLE_ENDIAN__ | 5165 | #ifdef __LITTLE_ENDIAN__ |
| 5372 | __ai int16x4_t vdup_n_s16(int16_t __p0) { | 5166 | __ai int16x4_t vdup_n_s16(int16_t __p0) { |
| 5373 | int16x4_t __ret; | 5167 | int16x4_t __ret; |
| ... | @@ -5553,20 +5347,11 @@ __ai uint32x2_t veor_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -5553,20 +5347,11 @@ __ai uint32x2_t veor_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 5553 | } | 5347 | } |
| 5554 | #endif | 5348 | #endif |
| 5555 | | 5349 | |
| 5556 | #ifdef __LITTLE_ENDIAN__ | | |
| 5557 | __ai uint64x1_t veor_u64(uint64x1_t __p0, uint64x1_t __p1) { | 5350 | __ai uint64x1_t veor_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 5558 | uint64x1_t __ret; | 5351 | uint64x1_t __ret; |
| 5559 | __ret = __p0 ^ __p1; | 5352 | __ret = __p0 ^ __p1; |
| 5560 | return __ret; | 5353 | return __ret; |
| 5561 | } | 5354 | } |
| 5562 | #else | | |
| 5563 | __ai uint64x1_t veor_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 5564 | uint64x1_t __ret; | | |
| 5565 | __ret = __p0 ^ __p1; | | |
| 5566 | return __ret; | | |
| 5567 | } | | |
| 5568 | #endif | | |
| 5569 | | | |
| 5570 | #ifdef __LITTLE_ENDIAN__ | 5355 | #ifdef __LITTLE_ENDIAN__ |
| 5571 | __ai uint16x4_t veor_u16(uint16x4_t __p0, uint16x4_t __p1) { | 5356 | __ai uint16x4_t veor_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 5572 | uint16x4_t __ret; | 5357 | uint16x4_t __ret; |
| ... | @@ -5618,20 +5403,11 @@ __ai int32x2_t veor_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -5618,20 +5403,11 @@ __ai int32x2_t veor_s32(int32x2_t __p0, int32x2_t __p1) { |
| 5618 | } | 5403 | } |
| 5619 | #endif | 5404 | #endif |
| 5620 | | 5405 | |
| 5621 | #ifdef __LITTLE_ENDIAN__ | | |
| 5622 | __ai int64x1_t veor_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 5623 | int64x1_t __ret; | | |
| 5624 | __ret = __p0 ^ __p1; | | |
| 5625 | return __ret; | | |
| 5626 | } | | |
| 5627 | #else | | |
| 5628 | __ai int64x1_t veor_s64(int64x1_t __p0, int64x1_t __p1) { | 5406 | __ai int64x1_t veor_s64(int64x1_t __p0, int64x1_t __p1) { |
| 5629 | int64x1_t __ret; | 5407 | int64x1_t __ret; |
| 5630 | __ret = __p0 ^ __p1; | 5408 | __ret = __p0 ^ __p1; |
| 5631 | return __ret; | 5409 | return __ret; |
| 5632 | } | 5410 | } |
| 5633 | #endif | | |
| 5634 | | | |
| 5635 | #ifdef __LITTLE_ENDIAN__ | 5411 | #ifdef __LITTLE_ENDIAN__ |
| 5636 | __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { | 5412 | __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { |
| 5637 | int16x4_t __ret; | 5413 | int16x4_t __ret; |
| ... | @@ -5964,15 +5740,6 @@ __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -5964,15 +5740,6 @@ __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { |
| 5964 | }) | 5740 | }) |
| 5965 | #endif | 5741 | #endif |
| 5966 | | 5742 | |
| 5967 | #ifdef __LITTLE_ENDIAN__ | | |
| 5968 | #define vext_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 5969 | uint64x1_t __s0 = __p0; \ | | |
| 5970 | uint64x1_t __s1 = __p1; \ | | |
| 5971 | uint64x1_t __ret; \ | | |
| 5972 | __ret = (uint64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | | |
| 5973 | __ret; \ | | |
| 5974 | }) | | |
| 5975 | #else | | |
| 5976 | #define vext_u64(__p0, __p1, __p2) __extension__ ({ \ | 5743 | #define vext_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 5977 | uint64x1_t __s0 = __p0; \ | 5744 | uint64x1_t __s0 = __p0; \ |
| 5978 | uint64x1_t __s1 = __p1; \ | 5745 | uint64x1_t __s1 = __p1; \ |
| ... | @@ -5980,8 +5747,6 @@ __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -5980,8 +5747,6 @@ __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { |
| 5980 | __ret = (uint64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | 5747 | __ret = (uint64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ |
| 5981 | __ret; \ | 5748 | __ret; \ |
| 5982 | }) | 5749 | }) |
| 5983 | #endif | | |
| 5984 | | | |
| 5985 | #ifdef __LITTLE_ENDIAN__ | 5750 | #ifdef __LITTLE_ENDIAN__ |
| 5986 | #define vext_u16(__p0, __p1, __p2) __extension__ ({ \ | 5751 | #define vext_u16(__p0, __p1, __p2) __extension__ ({ \ |
| 5987 | uint16x4_t __s0 = __p0; \ | 5752 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -6066,7 +5831,6 @@ __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -6066,7 +5831,6 @@ __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { |
| 6066 | }) | 5831 | }) |
| 6067 | #endif | 5832 | #endif |
| 6068 | | 5833 | |
| 6069 | #ifdef __LITTLE_ENDIAN__ | | |
| 6070 | #define vext_s64(__p0, __p1, __p2) __extension__ ({ \ | 5834 | #define vext_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 6071 | int64x1_t __s0 = __p0; \ | 5835 | int64x1_t __s0 = __p0; \ |
| 6072 | int64x1_t __s1 = __p1; \ | 5836 | int64x1_t __s1 = __p1; \ |
| ... | @@ -6074,16 +5838,6 @@ __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -6074,16 +5838,6 @@ __ai int16x4_t veor_s16(int16x4_t __p0, int16x4_t __p1) { |
| 6074 | __ret = (int64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | 5838 | __ret = (int64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ |
| 6075 | __ret; \ | 5839 | __ret; \ |
| 6076 | }) | 5840 | }) |
| 6077 | #else | | |
| 6078 | #define vext_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 6079 | int64x1_t __s0 = __p0; \ | | |
| 6080 | int64x1_t __s1 = __p1; \ | | |
| 6081 | int64x1_t __ret; \ | | |
| 6082 | __ret = (int64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | | |
| 6083 | __ret; \ | | |
| 6084 | }) | | |
| 6085 | #endif | | |
| 6086 | | | |
| 6087 | #ifdef __LITTLE_ENDIAN__ | 5841 | #ifdef __LITTLE_ENDIAN__ |
| 6088 | #define vext_s16(__p0, __p1, __p2) __extension__ ({ \ | 5842 | #define vext_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 6089 | int16x4_t __s0 = __p0; \ | 5843 | int16x4_t __s0 = __p0; \ |
| ... | @@ -6344,7 +6098,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6344,7 +6098,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6344 | #define vget_lane_p8(__p0, __p1) __extension__ ({ \ | 6098 | #define vget_lane_p8(__p0, __p1) __extension__ ({ \ |
| 6345 | poly8x8_t __s0 = __p0; \ | 6099 | poly8x8_t __s0 = __p0; \ |
| 6346 | poly8_t __ret; \ | 6100 | poly8_t __ret; \ |
| 6347 | __ret = (poly8_t) __builtin_neon_vget_lane_i8((int8x8_t)__s0, __p1); \ | 6101 | __ret = (poly8_t) __builtin_neon_vget_lane_i8((poly8x8_t)__s0, __p1); \ |
| 6348 | __ret; \ | 6102 | __ret; \ |
| 6349 | }) | 6103 | }) |
| 6350 | #else | 6104 | #else |
| ... | @@ -6352,13 +6106,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6352,13 +6106,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6352 | poly8x8_t __s0 = __p0; \ | 6106 | poly8x8_t __s0 = __p0; \ |
| 6353 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6107 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6354 | poly8_t __ret; \ | 6108 | poly8_t __ret; \ |
| 6355 | __ret = (poly8_t) __builtin_neon_vget_lane_i8((int8x8_t)__rev0, __p1); \ | 6109 | __ret = (poly8_t) __builtin_neon_vget_lane_i8((poly8x8_t)__rev0, __p1); \ |
| 6356 | __ret; \ | 6110 | __ret; \ |
| 6357 | }) | 6111 | }) |
| 6358 | #define __noswap_vget_lane_p8(__p0, __p1) __extension__ ({ \ | 6112 | #define __noswap_vget_lane_p8(__p0, __p1) __extension__ ({ \ |
| 6359 | poly8x8_t __s0 = __p0; \ | 6113 | poly8x8_t __s0 = __p0; \ |
| 6360 | poly8_t __ret; \ | 6114 | poly8_t __ret; \ |
| 6361 | __ret = (poly8_t) __builtin_neon_vget_lane_i8((int8x8_t)__s0, __p1); \ | 6115 | __ret = (poly8_t) __builtin_neon_vget_lane_i8((poly8x8_t)__s0, __p1); \ |
| 6362 | __ret; \ | 6116 | __ret; \ |
| 6363 | }) | 6117 | }) |
| 6364 | #endif | 6118 | #endif |
| ... | @@ -6367,7 +6121,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6367,7 +6121,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6367 | #define vget_lane_p16(__p0, __p1) __extension__ ({ \ | 6121 | #define vget_lane_p16(__p0, __p1) __extension__ ({ \ |
| 6368 | poly16x4_t __s0 = __p0; \ | 6122 | poly16x4_t __s0 = __p0; \ |
| 6369 | poly16_t __ret; \ | 6123 | poly16_t __ret; \ |
| 6370 | __ret = (poly16_t) __builtin_neon_vget_lane_i16((int8x8_t)__s0, __p1); \ | 6124 | __ret = (poly16_t) __builtin_neon_vget_lane_i16((poly16x4_t)__s0, __p1); \ |
| 6371 | __ret; \ | 6125 | __ret; \ |
| 6372 | }) | 6126 | }) |
| 6373 | #else | 6127 | #else |
| ... | @@ -6375,13 +6129,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6375,13 +6129,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6375 | poly16x4_t __s0 = __p0; \ | 6129 | poly16x4_t __s0 = __p0; \ |
| 6376 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 6130 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 6377 | poly16_t __ret; \ | 6131 | poly16_t __ret; \ |
| 6378 | __ret = (poly16_t) __builtin_neon_vget_lane_i16((int8x8_t)__rev0, __p1); \ | 6132 | __ret = (poly16_t) __builtin_neon_vget_lane_i16((poly16x4_t)__rev0, __p1); \ |
| 6379 | __ret; \ | 6133 | __ret; \ |
| 6380 | }) | 6134 | }) |
| 6381 | #define __noswap_vget_lane_p16(__p0, __p1) __extension__ ({ \ | 6135 | #define __noswap_vget_lane_p16(__p0, __p1) __extension__ ({ \ |
| 6382 | poly16x4_t __s0 = __p0; \ | 6136 | poly16x4_t __s0 = __p0; \ |
| 6383 | poly16_t __ret; \ | 6137 | poly16_t __ret; \ |
| 6384 | __ret = (poly16_t) __builtin_neon_vget_lane_i16((int8x8_t)__s0, __p1); \ | 6138 | __ret = (poly16_t) __builtin_neon_vget_lane_i16((poly16x4_t)__s0, __p1); \ |
| 6385 | __ret; \ | 6139 | __ret; \ |
| 6386 | }) | 6140 | }) |
| 6387 | #endif | 6141 | #endif |
| ... | @@ -6390,7 +6144,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6390,7 +6144,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6390 | #define vgetq_lane_p8(__p0, __p1) __extension__ ({ \ | 6144 | #define vgetq_lane_p8(__p0, __p1) __extension__ ({ \ |
| 6391 | poly8x16_t __s0 = __p0; \ | 6145 | poly8x16_t __s0 = __p0; \ |
| 6392 | poly8_t __ret; \ | 6146 | poly8_t __ret; \ |
| 6393 | __ret = (poly8_t) __builtin_neon_vgetq_lane_i8((int8x16_t)__s0, __p1); \ | 6147 | __ret = (poly8_t) __builtin_neon_vgetq_lane_i8((poly8x16_t)__s0, __p1); \ |
| 6394 | __ret; \ | 6148 | __ret; \ |
| 6395 | }) | 6149 | }) |
| 6396 | #else | 6150 | #else |
| ... | @@ -6398,13 +6152,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6398,13 +6152,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6398 | poly8x16_t __s0 = __p0; \ | 6152 | poly8x16_t __s0 = __p0; \ |
| 6399 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6153 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6400 | poly8_t __ret; \ | 6154 | poly8_t __ret; \ |
| 6401 | __ret = (poly8_t) __builtin_neon_vgetq_lane_i8((int8x16_t)__rev0, __p1); \ | 6155 | __ret = (poly8_t) __builtin_neon_vgetq_lane_i8((poly8x16_t)__rev0, __p1); \ |
| 6402 | __ret; \ | 6156 | __ret; \ |
| 6403 | }) | 6157 | }) |
| 6404 | #define __noswap_vgetq_lane_p8(__p0, __p1) __extension__ ({ \ | 6158 | #define __noswap_vgetq_lane_p8(__p0, __p1) __extension__ ({ \ |
| 6405 | poly8x16_t __s0 = __p0; \ | 6159 | poly8x16_t __s0 = __p0; \ |
| 6406 | poly8_t __ret; \ | 6160 | poly8_t __ret; \ |
| 6407 | __ret = (poly8_t) __builtin_neon_vgetq_lane_i8((int8x16_t)__s0, __p1); \ | 6161 | __ret = (poly8_t) __builtin_neon_vgetq_lane_i8((poly8x16_t)__s0, __p1); \ |
| 6408 | __ret; \ | 6162 | __ret; \ |
| 6409 | }) | 6163 | }) |
| 6410 | #endif | 6164 | #endif |
| ... | @@ -6413,7 +6167,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6413,7 +6167,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6413 | #define vgetq_lane_p16(__p0, __p1) __extension__ ({ \ | 6167 | #define vgetq_lane_p16(__p0, __p1) __extension__ ({ \ |
| 6414 | poly16x8_t __s0 = __p0; \ | 6168 | poly16x8_t __s0 = __p0; \ |
| 6415 | poly16_t __ret; \ | 6169 | poly16_t __ret; \ |
| 6416 | __ret = (poly16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__s0, __p1); \ | 6170 | __ret = (poly16_t) __builtin_neon_vgetq_lane_i16((poly16x8_t)__s0, __p1); \ |
| 6417 | __ret; \ | 6171 | __ret; \ |
| 6418 | }) | 6172 | }) |
| 6419 | #else | 6173 | #else |
| ... | @@ -6421,13 +6175,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6421,13 +6175,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6421 | poly16x8_t __s0 = __p0; \ | 6175 | poly16x8_t __s0 = __p0; \ |
| 6422 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6176 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6423 | poly16_t __ret; \ | 6177 | poly16_t __ret; \ |
| 6424 | __ret = (poly16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__rev0, __p1); \ | 6178 | __ret = (poly16_t) __builtin_neon_vgetq_lane_i16((poly16x8_t)__rev0, __p1); \ |
| 6425 | __ret; \ | 6179 | __ret; \ |
| 6426 | }) | 6180 | }) |
| 6427 | #define __noswap_vgetq_lane_p16(__p0, __p1) __extension__ ({ \ | 6181 | #define __noswap_vgetq_lane_p16(__p0, __p1) __extension__ ({ \ |
| 6428 | poly16x8_t __s0 = __p0; \ | 6182 | poly16x8_t __s0 = __p0; \ |
| 6429 | poly16_t __ret; \ | 6183 | poly16_t __ret; \ |
| 6430 | __ret = (poly16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__s0, __p1); \ | 6184 | __ret = (poly16_t) __builtin_neon_vgetq_lane_i16((poly16x8_t)__s0, __p1); \ |
| 6431 | __ret; \ | 6185 | __ret; \ |
| 6432 | }) | 6186 | }) |
| 6433 | #endif | 6187 | #endif |
| ... | @@ -6459,7 +6213,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6459,7 +6213,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6459 | #define vgetq_lane_u32(__p0, __p1) __extension__ ({ \ | 6213 | #define vgetq_lane_u32(__p0, __p1) __extension__ ({ \ |
| 6460 | uint32x4_t __s0 = __p0; \ | 6214 | uint32x4_t __s0 = __p0; \ |
| 6461 | uint32_t __ret; \ | 6215 | uint32_t __ret; \ |
| 6462 | __ret = (uint32_t) __builtin_neon_vgetq_lane_i32((int8x16_t)__s0, __p1); \ | 6216 | __ret = (uint32_t) __builtin_neon_vgetq_lane_i32((int32x4_t)__s0, __p1); \ |
| 6463 | __ret; \ | 6217 | __ret; \ |
| 6464 | }) | 6218 | }) |
| 6465 | #else | 6219 | #else |
| ... | @@ -6467,13 +6221,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6467,13 +6221,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6467 | uint32x4_t __s0 = __p0; \ | 6221 | uint32x4_t __s0 = __p0; \ |
| 6468 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 6222 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 6469 | uint32_t __ret; \ | 6223 | uint32_t __ret; \ |
| 6470 | __ret = (uint32_t) __builtin_neon_vgetq_lane_i32((int8x16_t)__rev0, __p1); \ | 6224 | __ret = (uint32_t) __builtin_neon_vgetq_lane_i32((int32x4_t)__rev0, __p1); \ |
| 6471 | __ret; \ | 6225 | __ret; \ |
| 6472 | }) | 6226 | }) |
| 6473 | #define __noswap_vgetq_lane_u32(__p0, __p1) __extension__ ({ \ | 6227 | #define __noswap_vgetq_lane_u32(__p0, __p1) __extension__ ({ \ |
| 6474 | uint32x4_t __s0 = __p0; \ | 6228 | uint32x4_t __s0 = __p0; \ |
| 6475 | uint32_t __ret; \ | 6229 | uint32_t __ret; \ |
| 6476 | __ret = (uint32_t) __builtin_neon_vgetq_lane_i32((int8x16_t)__s0, __p1); \ | 6230 | __ret = (uint32_t) __builtin_neon_vgetq_lane_i32((int32x4_t)__s0, __p1); \ |
| 6477 | __ret; \ | 6231 | __ret; \ |
| 6478 | }) | 6232 | }) |
| 6479 | #endif | 6233 | #endif |
| ... | @@ -6482,7 +6236,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6482,7 +6236,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6482 | #define vgetq_lane_u64(__p0, __p1) __extension__ ({ \ | 6236 | #define vgetq_lane_u64(__p0, __p1) __extension__ ({ \ |
| 6483 | uint64x2_t __s0 = __p0; \ | 6237 | uint64x2_t __s0 = __p0; \ |
| 6484 | uint64_t __ret; \ | 6238 | uint64_t __ret; \ |
| 6485 | __ret = (uint64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__s0, __p1); \ | 6239 | __ret = (uint64_t) __builtin_neon_vgetq_lane_i64((int64x2_t)__s0, __p1); \ |
| 6486 | __ret; \ | 6240 | __ret; \ |
| 6487 | }) | 6241 | }) |
| 6488 | #else | 6242 | #else |
| ... | @@ -6490,13 +6244,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6490,13 +6244,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6490 | uint64x2_t __s0 = __p0; \ | 6244 | uint64x2_t __s0 = __p0; \ |
| 6491 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 6245 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 6492 | uint64_t __ret; \ | 6246 | uint64_t __ret; \ |
| 6493 | __ret = (uint64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__rev0, __p1); \ | 6247 | __ret = (uint64_t) __builtin_neon_vgetq_lane_i64((int64x2_t)__rev0, __p1); \ |
| 6494 | __ret; \ | 6248 | __ret; \ |
| 6495 | }) | 6249 | }) |
| 6496 | #define __noswap_vgetq_lane_u64(__p0, __p1) __extension__ ({ \ | 6250 | #define __noswap_vgetq_lane_u64(__p0, __p1) __extension__ ({ \ |
| 6497 | uint64x2_t __s0 = __p0; \ | 6251 | uint64x2_t __s0 = __p0; \ |
| 6498 | uint64_t __ret; \ | 6252 | uint64_t __ret; \ |
| 6499 | __ret = (uint64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__s0, __p1); \ | 6253 | __ret = (uint64_t) __builtin_neon_vgetq_lane_i64((int64x2_t)__s0, __p1); \ |
| 6500 | __ret; \ | 6254 | __ret; \ |
| 6501 | }) | 6255 | }) |
| 6502 | #endif | 6256 | #endif |
| ... | @@ -6505,7 +6259,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6505,7 +6259,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6505 | #define vgetq_lane_u16(__p0, __p1) __extension__ ({ \ | 6259 | #define vgetq_lane_u16(__p0, __p1) __extension__ ({ \ |
| 6506 | uint16x8_t __s0 = __p0; \ | 6260 | uint16x8_t __s0 = __p0; \ |
| 6507 | uint16_t __ret; \ | 6261 | uint16_t __ret; \ |
| 6508 | __ret = (uint16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__s0, __p1); \ | 6262 | __ret = (uint16_t) __builtin_neon_vgetq_lane_i16((int16x8_t)__s0, __p1); \ |
| 6509 | __ret; \ | 6263 | __ret; \ |
| 6510 | }) | 6264 | }) |
| 6511 | #else | 6265 | #else |
| ... | @@ -6513,13 +6267,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6513,13 +6267,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6513 | uint16x8_t __s0 = __p0; \ | 6267 | uint16x8_t __s0 = __p0; \ |
| 6514 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6268 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6515 | uint16_t __ret; \ | 6269 | uint16_t __ret; \ |
| 6516 | __ret = (uint16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__rev0, __p1); \ | 6270 | __ret = (uint16_t) __builtin_neon_vgetq_lane_i16((int16x8_t)__rev0, __p1); \ |
| 6517 | __ret; \ | 6271 | __ret; \ |
| 6518 | }) | 6272 | }) |
| 6519 | #define __noswap_vgetq_lane_u16(__p0, __p1) __extension__ ({ \ | 6273 | #define __noswap_vgetq_lane_u16(__p0, __p1) __extension__ ({ \ |
| 6520 | uint16x8_t __s0 = __p0; \ | 6274 | uint16x8_t __s0 = __p0; \ |
| 6521 | uint16_t __ret; \ | 6275 | uint16_t __ret; \ |
| 6522 | __ret = (uint16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__s0, __p1); \ | 6276 | __ret = (uint16_t) __builtin_neon_vgetq_lane_i16((int16x8_t)__s0, __p1); \ |
| 6523 | __ret; \ | 6277 | __ret; \ |
| 6524 | }) | 6278 | }) |
| 6525 | #endif | 6279 | #endif |
| ... | @@ -6551,7 +6305,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6551,7 +6305,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6551 | #define vgetq_lane_f32(__p0, __p1) __extension__ ({ \ | 6305 | #define vgetq_lane_f32(__p0, __p1) __extension__ ({ \ |
| 6552 | float32x4_t __s0 = __p0; \ | 6306 | float32x4_t __s0 = __p0; \ |
| 6553 | float32_t __ret; \ | 6307 | float32_t __ret; \ |
| 6554 | __ret = (float32_t) __builtin_neon_vgetq_lane_f32((int8x16_t)__s0, __p1); \ | 6308 | __ret = (float32_t) __builtin_neon_vgetq_lane_f32((float32x4_t)__s0, __p1); \ |
| 6555 | __ret; \ | 6309 | __ret; \ |
| 6556 | }) | 6310 | }) |
| 6557 | #else | 6311 | #else |
| ... | @@ -6559,13 +6313,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6559,13 +6313,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6559 | float32x4_t __s0 = __p0; \ | 6313 | float32x4_t __s0 = __p0; \ |
| 6560 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 6314 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 6561 | float32_t __ret; \ | 6315 | float32_t __ret; \ |
| 6562 | __ret = (float32_t) __builtin_neon_vgetq_lane_f32((int8x16_t)__rev0, __p1); \ | 6316 | __ret = (float32_t) __builtin_neon_vgetq_lane_f32((float32x4_t)__rev0, __p1); \ |
| 6563 | __ret; \ | 6317 | __ret; \ |
| 6564 | }) | 6318 | }) |
| 6565 | #define __noswap_vgetq_lane_f32(__p0, __p1) __extension__ ({ \ | 6319 | #define __noswap_vgetq_lane_f32(__p0, __p1) __extension__ ({ \ |
| 6566 | float32x4_t __s0 = __p0; \ | 6320 | float32x4_t __s0 = __p0; \ |
| 6567 | float32_t __ret; \ | 6321 | float32_t __ret; \ |
| 6568 | __ret = (float32_t) __builtin_neon_vgetq_lane_f32((int8x16_t)__s0, __p1); \ | 6322 | __ret = (float32_t) __builtin_neon_vgetq_lane_f32((float32x4_t)__s0, __p1); \ |
| 6569 | __ret; \ | 6323 | __ret; \ |
| 6570 | }) | 6324 | }) |
| 6571 | #endif | 6325 | #endif |
| ... | @@ -6574,7 +6328,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6574,7 +6328,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6574 | #define vgetq_lane_s32(__p0, __p1) __extension__ ({ \ | 6328 | #define vgetq_lane_s32(__p0, __p1) __extension__ ({ \ |
| 6575 | int32x4_t __s0 = __p0; \ | 6329 | int32x4_t __s0 = __p0; \ |
| 6576 | int32_t __ret; \ | 6330 | int32_t __ret; \ |
| 6577 | __ret = (int32_t) __builtin_neon_vgetq_lane_i32((int8x16_t)__s0, __p1); \ | 6331 | __ret = (int32_t) __builtin_neon_vgetq_lane_i32((int32x4_t)__s0, __p1); \ |
| 6578 | __ret; \ | 6332 | __ret; \ |
| 6579 | }) | 6333 | }) |
| 6580 | #else | 6334 | #else |
| ... | @@ -6582,13 +6336,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6582,13 +6336,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6582 | int32x4_t __s0 = __p0; \ | 6336 | int32x4_t __s0 = __p0; \ |
| 6583 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 6337 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 6584 | int32_t __ret; \ | 6338 | int32_t __ret; \ |
| 6585 | __ret = (int32_t) __builtin_neon_vgetq_lane_i32((int8x16_t)__rev0, __p1); \ | 6339 | __ret = (int32_t) __builtin_neon_vgetq_lane_i32((int32x4_t)__rev0, __p1); \ |
| 6586 | __ret; \ | 6340 | __ret; \ |
| 6587 | }) | 6341 | }) |
| 6588 | #define __noswap_vgetq_lane_s32(__p0, __p1) __extension__ ({ \ | 6342 | #define __noswap_vgetq_lane_s32(__p0, __p1) __extension__ ({ \ |
| 6589 | int32x4_t __s0 = __p0; \ | 6343 | int32x4_t __s0 = __p0; \ |
| 6590 | int32_t __ret; \ | 6344 | int32_t __ret; \ |
| 6591 | __ret = (int32_t) __builtin_neon_vgetq_lane_i32((int8x16_t)__s0, __p1); \ | 6345 | __ret = (int32_t) __builtin_neon_vgetq_lane_i32((int32x4_t)__s0, __p1); \ |
| 6592 | __ret; \ | 6346 | __ret; \ |
| 6593 | }) | 6347 | }) |
| 6594 | #endif | 6348 | #endif |
| ... | @@ -6597,7 +6351,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6597,7 +6351,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6597 | #define vgetq_lane_s64(__p0, __p1) __extension__ ({ \ | 6351 | #define vgetq_lane_s64(__p0, __p1) __extension__ ({ \ |
| 6598 | int64x2_t __s0 = __p0; \ | 6352 | int64x2_t __s0 = __p0; \ |
| 6599 | int64_t __ret; \ | 6353 | int64_t __ret; \ |
| 6600 | __ret = (int64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__s0, __p1); \ | 6354 | __ret = (int64_t) __builtin_neon_vgetq_lane_i64((int64x2_t)__s0, __p1); \ |
| 6601 | __ret; \ | 6355 | __ret; \ |
| 6602 | }) | 6356 | }) |
| 6603 | #else | 6357 | #else |
| ... | @@ -6605,13 +6359,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6605,13 +6359,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6605 | int64x2_t __s0 = __p0; \ | 6359 | int64x2_t __s0 = __p0; \ |
| 6606 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 6360 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 6607 | int64_t __ret; \ | 6361 | int64_t __ret; \ |
| 6608 | __ret = (int64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__rev0, __p1); \ | 6362 | __ret = (int64_t) __builtin_neon_vgetq_lane_i64((int64x2_t)__rev0, __p1); \ |
| 6609 | __ret; \ | 6363 | __ret; \ |
| 6610 | }) | 6364 | }) |
| 6611 | #define __noswap_vgetq_lane_s64(__p0, __p1) __extension__ ({ \ | 6365 | #define __noswap_vgetq_lane_s64(__p0, __p1) __extension__ ({ \ |
| 6612 | int64x2_t __s0 = __p0; \ | 6366 | int64x2_t __s0 = __p0; \ |
| 6613 | int64_t __ret; \ | 6367 | int64_t __ret; \ |
| 6614 | __ret = (int64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__s0, __p1); \ | 6368 | __ret = (int64_t) __builtin_neon_vgetq_lane_i64((int64x2_t)__s0, __p1); \ |
| 6615 | __ret; \ | 6369 | __ret; \ |
| 6616 | }) | 6370 | }) |
| 6617 | #endif | 6371 | #endif |
| ... | @@ -6620,7 +6374,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6620,7 +6374,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6620 | #define vgetq_lane_s16(__p0, __p1) __extension__ ({ \ | 6374 | #define vgetq_lane_s16(__p0, __p1) __extension__ ({ \ |
| 6621 | int16x8_t __s0 = __p0; \ | 6375 | int16x8_t __s0 = __p0; \ |
| 6622 | int16_t __ret; \ | 6376 | int16_t __ret; \ |
| 6623 | __ret = (int16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__s0, __p1); \ | 6377 | __ret = (int16_t) __builtin_neon_vgetq_lane_i16((int16x8_t)__s0, __p1); \ |
| 6624 | __ret; \ | 6378 | __ret; \ |
| 6625 | }) | 6379 | }) |
| 6626 | #else | 6380 | #else |
| ... | @@ -6628,13 +6382,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6628,13 +6382,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6628 | int16x8_t __s0 = __p0; \ | 6382 | int16x8_t __s0 = __p0; \ |
| 6629 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 6383 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 6630 | int16_t __ret; \ | 6384 | int16_t __ret; \ |
| 6631 | __ret = (int16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__rev0, __p1); \ | 6385 | __ret = (int16_t) __builtin_neon_vgetq_lane_i16((int16x8_t)__rev0, __p1); \ |
| 6632 | __ret; \ | 6386 | __ret; \ |
| 6633 | }) | 6387 | }) |
| 6634 | #define __noswap_vgetq_lane_s16(__p0, __p1) __extension__ ({ \ | 6388 | #define __noswap_vgetq_lane_s16(__p0, __p1) __extension__ ({ \ |
| 6635 | int16x8_t __s0 = __p0; \ | 6389 | int16x8_t __s0 = __p0; \ |
| 6636 | int16_t __ret; \ | 6390 | int16_t __ret; \ |
| 6637 | __ret = (int16_t) __builtin_neon_vgetq_lane_i16((int8x16_t)__s0, __p1); \ | 6391 | __ret = (int16_t) __builtin_neon_vgetq_lane_i16((int16x8_t)__s0, __p1); \ |
| 6638 | __ret; \ | 6392 | __ret; \ |
| 6639 | }) | 6393 | }) |
| 6640 | #endif | 6394 | #endif |
| ... | @@ -6666,7 +6420,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6666,7 +6420,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6666 | #define vget_lane_u32(__p0, __p1) __extension__ ({ \ | 6420 | #define vget_lane_u32(__p0, __p1) __extension__ ({ \ |
| 6667 | uint32x2_t __s0 = __p0; \ | 6421 | uint32x2_t __s0 = __p0; \ |
| 6668 | uint32_t __ret; \ | 6422 | uint32_t __ret; \ |
| 6669 | __ret = (uint32_t) __builtin_neon_vget_lane_i32((int8x8_t)__s0, __p1); \ | 6423 | __ret = (uint32_t) __builtin_neon_vget_lane_i32((int32x2_t)__s0, __p1); \ |
| 6670 | __ret; \ | 6424 | __ret; \ |
| 6671 | }) | 6425 | }) |
| 6672 | #else | 6426 | #else |
| ... | @@ -6674,44 +6428,28 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6674,44 +6428,28 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6674 | uint32x2_t __s0 = __p0; \ | 6428 | uint32x2_t __s0 = __p0; \ |
| 6675 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 6429 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 6676 | uint32_t __ret; \ | 6430 | uint32_t __ret; \ |
| 6677 | __ret = (uint32_t) __builtin_neon_vget_lane_i32((int8x8_t)__rev0, __p1); \ | 6431 | __ret = (uint32_t) __builtin_neon_vget_lane_i32((int32x2_t)__rev0, __p1); \ |
| 6678 | __ret; \ | 6432 | __ret; \ |
| 6679 | }) | 6433 | }) |
| 6680 | #define __noswap_vget_lane_u32(__p0, __p1) __extension__ ({ \ | 6434 | #define __noswap_vget_lane_u32(__p0, __p1) __extension__ ({ \ |
| 6681 | uint32x2_t __s0 = __p0; \ | 6435 | uint32x2_t __s0 = __p0; \ |
| 6682 | uint32_t __ret; \ | 6436 | uint32_t __ret; \ |
| 6683 | __ret = (uint32_t) __builtin_neon_vget_lane_i32((int8x8_t)__s0, __p1); \ | 6437 | __ret = (uint32_t) __builtin_neon_vget_lane_i32((int32x2_t)__s0, __p1); \ |
| 6684 | __ret; \ | 6438 | __ret; \ |
| 6685 | }) | 6439 | }) |
| 6686 | #endif | 6440 | #endif |
| 6687 | | 6441 | |
| 6688 | #ifdef __LITTLE_ENDIAN__ | | |
| 6689 | #define vget_lane_u64(__p0, __p1) __extension__ ({ \ | | |
| 6690 | uint64x1_t __s0 = __p0; \ | | |
| 6691 | uint64_t __ret; \ | | |
| 6692 | __ret = (uint64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | | |
| 6693 | __ret; \ | | |
| 6694 | }) | | |
| 6695 | #else | | |
| 6696 | #define vget_lane_u64(__p0, __p1) __extension__ ({ \ | 6442 | #define vget_lane_u64(__p0, __p1) __extension__ ({ \ |
| 6697 | uint64x1_t __s0 = __p0; \ | 6443 | uint64x1_t __s0 = __p0; \ |
| 6698 | uint64_t __ret; \ | 6444 | uint64_t __ret; \ |
| 6699 | __ret = (uint64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | 6445 | __ret = (uint64_t) __builtin_neon_vget_lane_i64((int64x1_t)__s0, __p1); \ |
| 6700 | __ret; \ | | |
| 6701 | }) | | |
| 6702 | #define __noswap_vget_lane_u64(__p0, __p1) __extension__ ({ \ | | |
| 6703 | uint64x1_t __s0 = __p0; \ | | |
| 6704 | uint64_t __ret; \ | | |
| 6705 | __ret = (uint64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | | |
| 6706 | __ret; \ | 6446 | __ret; \ |
| 6707 | }) | 6447 | }) |
| 6708 | #endif | | |
| 6709 | | | |
| 6710 | #ifdef __LITTLE_ENDIAN__ | 6448 | #ifdef __LITTLE_ENDIAN__ |
| 6711 | #define vget_lane_u16(__p0, __p1) __extension__ ({ \ | 6449 | #define vget_lane_u16(__p0, __p1) __extension__ ({ \ |
| 6712 | uint16x4_t __s0 = __p0; \ | 6450 | uint16x4_t __s0 = __p0; \ |
| 6713 | uint16_t __ret; \ | 6451 | uint16_t __ret; \ |
| 6714 | __ret = (uint16_t) __builtin_neon_vget_lane_i16((int8x8_t)__s0, __p1); \ | 6452 | __ret = (uint16_t) __builtin_neon_vget_lane_i16((int16x4_t)__s0, __p1); \ |
| 6715 | __ret; \ | 6453 | __ret; \ |
| 6716 | }) | 6454 | }) |
| 6717 | #else | 6455 | #else |
| ... | @@ -6719,13 +6457,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6719,13 +6457,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6719 | uint16x4_t __s0 = __p0; \ | 6457 | uint16x4_t __s0 = __p0; \ |
| 6720 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 6458 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 6721 | uint16_t __ret; \ | 6459 | uint16_t __ret; \ |
| 6722 | __ret = (uint16_t) __builtin_neon_vget_lane_i16((int8x8_t)__rev0, __p1); \ | 6460 | __ret = (uint16_t) __builtin_neon_vget_lane_i16((int16x4_t)__rev0, __p1); \ |
| 6723 | __ret; \ | 6461 | __ret; \ |
| 6724 | }) | 6462 | }) |
| 6725 | #define __noswap_vget_lane_u16(__p0, __p1) __extension__ ({ \ | 6463 | #define __noswap_vget_lane_u16(__p0, __p1) __extension__ ({ \ |
| 6726 | uint16x4_t __s0 = __p0; \ | 6464 | uint16x4_t __s0 = __p0; \ |
| 6727 | uint16_t __ret; \ | 6465 | uint16_t __ret; \ |
| 6728 | __ret = (uint16_t) __builtin_neon_vget_lane_i16((int8x8_t)__s0, __p1); \ | 6466 | __ret = (uint16_t) __builtin_neon_vget_lane_i16((int16x4_t)__s0, __p1); \ |
| 6729 | __ret; \ | 6467 | __ret; \ |
| 6730 | }) | 6468 | }) |
| 6731 | #endif | 6469 | #endif |
| ... | @@ -6757,7 +6495,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6757,7 +6495,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6757 | #define vget_lane_f32(__p0, __p1) __extension__ ({ \ | 6495 | #define vget_lane_f32(__p0, __p1) __extension__ ({ \ |
| 6758 | float32x2_t __s0 = __p0; \ | 6496 | float32x2_t __s0 = __p0; \ |
| 6759 | float32_t __ret; \ | 6497 | float32_t __ret; \ |
| 6760 | __ret = (float32_t) __builtin_neon_vget_lane_f32((int8x8_t)__s0, __p1); \ | 6498 | __ret = (float32_t) __builtin_neon_vget_lane_f32((float32x2_t)__s0, __p1); \ |
| 6761 | __ret; \ | 6499 | __ret; \ |
| 6762 | }) | 6500 | }) |
| 6763 | #else | 6501 | #else |
| ... | @@ -6765,13 +6503,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6765,13 +6503,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6765 | float32x2_t __s0 = __p0; \ | 6503 | float32x2_t __s0 = __p0; \ |
| 6766 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 6504 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 6767 | float32_t __ret; \ | 6505 | float32_t __ret; \ |
| 6768 | __ret = (float32_t) __builtin_neon_vget_lane_f32((int8x8_t)__rev0, __p1); \ | 6506 | __ret = (float32_t) __builtin_neon_vget_lane_f32((float32x2_t)__rev0, __p1); \ |
| 6769 | __ret; \ | 6507 | __ret; \ |
| 6770 | }) | 6508 | }) |
| 6771 | #define __noswap_vget_lane_f32(__p0, __p1) __extension__ ({ \ | 6509 | #define __noswap_vget_lane_f32(__p0, __p1) __extension__ ({ \ |
| 6772 | float32x2_t __s0 = __p0; \ | 6510 | float32x2_t __s0 = __p0; \ |
| 6773 | float32_t __ret; \ | 6511 | float32_t __ret; \ |
| 6774 | __ret = (float32_t) __builtin_neon_vget_lane_f32((int8x8_t)__s0, __p1); \ | 6512 | __ret = (float32_t) __builtin_neon_vget_lane_f32((float32x2_t)__s0, __p1); \ |
| 6775 | __ret; \ | 6513 | __ret; \ |
| 6776 | }) | 6514 | }) |
| 6777 | #endif | 6515 | #endif |
| ... | @@ -6780,7 +6518,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6780,7 +6518,7 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6780 | #define vget_lane_s32(__p0, __p1) __extension__ ({ \ | 6518 | #define vget_lane_s32(__p0, __p1) __extension__ ({ \ |
| 6781 | int32x2_t __s0 = __p0; \ | 6519 | int32x2_t __s0 = __p0; \ |
| 6782 | int32_t __ret; \ | 6520 | int32_t __ret; \ |
| 6783 | __ret = (int32_t) __builtin_neon_vget_lane_i32((int8x8_t)__s0, __p1); \ | 6521 | __ret = (int32_t) __builtin_neon_vget_lane_i32((int32x2_t)__s0, __p1); \ |
| 6784 | __ret; \ | 6522 | __ret; \ |
| 6785 | }) | 6523 | }) |
| 6786 | #else | 6524 | #else |
| ... | @@ -6788,44 +6526,28 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6788,44 +6526,28 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6788 | int32x2_t __s0 = __p0; \ | 6526 | int32x2_t __s0 = __p0; \ |
| 6789 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 6527 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 6790 | int32_t __ret; \ | 6528 | int32_t __ret; \ |
| 6791 | __ret = (int32_t) __builtin_neon_vget_lane_i32((int8x8_t)__rev0, __p1); \ | 6529 | __ret = (int32_t) __builtin_neon_vget_lane_i32((int32x2_t)__rev0, __p1); \ |
| 6792 | __ret; \ | 6530 | __ret; \ |
| 6793 | }) | 6531 | }) |
| 6794 | #define __noswap_vget_lane_s32(__p0, __p1) __extension__ ({ \ | 6532 | #define __noswap_vget_lane_s32(__p0, __p1) __extension__ ({ \ |
| 6795 | int32x2_t __s0 = __p0; \ | 6533 | int32x2_t __s0 = __p0; \ |
| 6796 | int32_t __ret; \ | 6534 | int32_t __ret; \ |
| 6797 | __ret = (int32_t) __builtin_neon_vget_lane_i32((int8x8_t)__s0, __p1); \ | 6535 | __ret = (int32_t) __builtin_neon_vget_lane_i32((int32x2_t)__s0, __p1); \ |
| 6798 | __ret; \ | 6536 | __ret; \ |
| 6799 | }) | 6537 | }) |
| 6800 | #endif | 6538 | #endif |
| 6801 | | 6539 | |
| 6802 | #ifdef __LITTLE_ENDIAN__ | | |
| 6803 | #define vget_lane_s64(__p0, __p1) __extension__ ({ \ | | |
| 6804 | int64x1_t __s0 = __p0; \ | | |
| 6805 | int64_t __ret; \ | | |
| 6806 | __ret = (int64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | | |
| 6807 | __ret; \ | | |
| 6808 | }) | | |
| 6809 | #else | | |
| 6810 | #define vget_lane_s64(__p0, __p1) __extension__ ({ \ | 6540 | #define vget_lane_s64(__p0, __p1) __extension__ ({ \ |
| 6811 | int64x1_t __s0 = __p0; \ | 6541 | int64x1_t __s0 = __p0; \ |
| 6812 | int64_t __ret; \ | 6542 | int64_t __ret; \ |
| 6813 | __ret = (int64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | 6543 | __ret = (int64_t) __builtin_neon_vget_lane_i64((int64x1_t)__s0, __p1); \ |
| 6814 | __ret; \ | | |
| 6815 | }) | | |
| 6816 | #define __noswap_vget_lane_s64(__p0, __p1) __extension__ ({ \ | | |
| 6817 | int64x1_t __s0 = __p0; \ | | |
| 6818 | int64_t __ret; \ | | |
| 6819 | __ret = (int64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | | |
| 6820 | __ret; \ | 6544 | __ret; \ |
| 6821 | }) | 6545 | }) |
| 6822 | #endif | | |
| 6823 | | | |
| 6824 | #ifdef __LITTLE_ENDIAN__ | 6546 | #ifdef __LITTLE_ENDIAN__ |
| 6825 | #define vget_lane_s16(__p0, __p1) __extension__ ({ \ | 6547 | #define vget_lane_s16(__p0, __p1) __extension__ ({ \ |
| 6826 | int16x4_t __s0 = __p0; \ | 6548 | int16x4_t __s0 = __p0; \ |
| 6827 | int16_t __ret; \ | 6549 | int16_t __ret; \ |
| 6828 | __ret = (int16_t) __builtin_neon_vget_lane_i16((int8x8_t)__s0, __p1); \ | 6550 | __ret = (int16_t) __builtin_neon_vget_lane_i16((int16x4_t)__s0, __p1); \ |
| 6829 | __ret; \ | 6551 | __ret; \ |
| 6830 | }) | 6552 | }) |
| 6831 | #else | 6553 | #else |
| ... | @@ -6833,13 +6555,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { | ... | @@ -6833,13 +6555,13 @@ __ai int16x4_t __noswap_vget_high_s16(int16x8_t __p0) { |
| 6833 | int16x4_t __s0 = __p0; \ | 6555 | int16x4_t __s0 = __p0; \ |
| 6834 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 6556 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 6835 | int16_t __ret; \ | 6557 | int16_t __ret; \ |
| 6836 | __ret = (int16_t) __builtin_neon_vget_lane_i16((int8x8_t)__rev0, __p1); \ | 6558 | __ret = (int16_t) __builtin_neon_vget_lane_i16((int16x4_t)__rev0, __p1); \ |
| 6837 | __ret; \ | 6559 | __ret; \ |
| 6838 | }) | 6560 | }) |
| 6839 | #define __noswap_vget_lane_s16(__p0, __p1) __extension__ ({ \ | 6561 | #define __noswap_vget_lane_s16(__p0, __p1) __extension__ ({ \ |
| 6840 | int16x4_t __s0 = __p0; \ | 6562 | int16x4_t __s0 = __p0; \ |
| 6841 | int16_t __ret; \ | 6563 | int16_t __ret; \ |
| 6842 | __ret = (int16_t) __builtin_neon_vget_lane_i16((int8x8_t)__s0, __p1); \ | 6564 | __ret = (int16_t) __builtin_neon_vget_lane_i16((int16x4_t)__s0, __p1); \ |
| 6843 | __ret; \ | 6565 | __ret; \ |
| 6844 | }) | 6566 | }) |
| 6845 | #endif | 6567 | #endif |
| ... | @@ -7667,20 +7389,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -7667,20 +7389,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 7667 | }) | 7389 | }) |
| 7668 | #endif | 7390 | #endif |
| 7669 | | 7391 | |
| 7670 | #ifdef __LITTLE_ENDIAN__ | | |
| 7671 | #define vld1_u64(__p0) __extension__ ({ \ | | |
| 7672 | uint64x1_t __ret; \ | | |
| 7673 | __ret = (uint64x1_t) __builtin_neon_vld1_v(__p0, 19); \ | | |
| 7674 | __ret; \ | | |
| 7675 | }) | | |
| 7676 | #else | | |
| 7677 | #define vld1_u64(__p0) __extension__ ({ \ | 7392 | #define vld1_u64(__p0) __extension__ ({ \ |
| 7678 | uint64x1_t __ret; \ | 7393 | uint64x1_t __ret; \ |
| 7679 | __ret = (uint64x1_t) __builtin_neon_vld1_v(__p0, 19); \ | 7394 | __ret = (uint64x1_t) __builtin_neon_vld1_v(__p0, 19); \ |
| 7680 | __ret; \ | 7395 | __ret; \ |
| 7681 | }) | 7396 | }) |
| 7682 | #endif | | |
| 7683 | | | |
| 7684 | #ifdef __LITTLE_ENDIAN__ | 7397 | #ifdef __LITTLE_ENDIAN__ |
| 7685 | #define vld1_u16(__p0) __extension__ ({ \ | 7398 | #define vld1_u16(__p0) __extension__ ({ \ |
| 7686 | uint16x4_t __ret; \ | 7399 | uint16x4_t __ret; \ |
| ... | @@ -7741,20 +7454,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -7741,20 +7454,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 7741 | }) | 7454 | }) |
| 7742 | #endif | 7455 | #endif |
| 7743 | | 7456 | |
| 7744 | #ifdef __LITTLE_ENDIAN__ | | |
| 7745 | #define vld1_s64(__p0) __extension__ ({ \ | | |
| 7746 | int64x1_t __ret; \ | | |
| 7747 | __ret = (int64x1_t) __builtin_neon_vld1_v(__p0, 3); \ | | |
| 7748 | __ret; \ | | |
| 7749 | }) | | |
| 7750 | #else | | |
| 7751 | #define vld1_s64(__p0) __extension__ ({ \ | 7457 | #define vld1_s64(__p0) __extension__ ({ \ |
| 7752 | int64x1_t __ret; \ | 7458 | int64x1_t __ret; \ |
| 7753 | __ret = (int64x1_t) __builtin_neon_vld1_v(__p0, 3); \ | 7459 | __ret = (int64x1_t) __builtin_neon_vld1_v(__p0, 3); \ |
| 7754 | __ret; \ | 7460 | __ret; \ |
| 7755 | }) | 7461 | }) |
| 7756 | #endif | | |
| 7757 | | | |
| 7758 | #ifdef __LITTLE_ENDIAN__ | 7462 | #ifdef __LITTLE_ENDIAN__ |
| 7759 | #define vld1_s16(__p0) __extension__ ({ \ | 7463 | #define vld1_s16(__p0) __extension__ ({ \ |
| 7760 | int16x4_t __ret; \ | 7464 | int16x4_t __ret; \ |
| ... | @@ -7995,20 +7699,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -7995,20 +7699,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 7995 | }) | 7699 | }) |
| 7996 | #endif | 7700 | #endif |
| 7997 | | 7701 | |
| 7998 | #ifdef __LITTLE_ENDIAN__ | | |
| 7999 | #define vld1_dup_u64(__p0) __extension__ ({ \ | 7702 | #define vld1_dup_u64(__p0) __extension__ ({ \ |
| 8000 | uint64x1_t __ret; \ | 7703 | uint64x1_t __ret; \ |
| 8001 | __ret = (uint64x1_t) __builtin_neon_vld1_dup_v(__p0, 19); \ | 7704 | __ret = (uint64x1_t) __builtin_neon_vld1_dup_v(__p0, 19); \ |
| 8002 | __ret; \ | 7705 | __ret; \ |
| 8003 | }) | 7706 | }) |
| 8004 | #else | | |
| 8005 | #define vld1_dup_u64(__p0) __extension__ ({ \ | | |
| 8006 | uint64x1_t __ret; \ | | |
| 8007 | __ret = (uint64x1_t) __builtin_neon_vld1_dup_v(__p0, 19); \ | | |
| 8008 | __ret; \ | | |
| 8009 | }) | | |
| 8010 | #endif | | |
| 8011 | | | |
| 8012 | #ifdef __LITTLE_ENDIAN__ | 7707 | #ifdef __LITTLE_ENDIAN__ |
| 8013 | #define vld1_dup_u16(__p0) __extension__ ({ \ | 7708 | #define vld1_dup_u16(__p0) __extension__ ({ \ |
| 8014 | uint16x4_t __ret; \ | 7709 | uint16x4_t __ret; \ |
| ... | @@ -8069,20 +7764,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -8069,20 +7764,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 8069 | }) | 7764 | }) |
| 8070 | #endif | 7765 | #endif |
| 8071 | | 7766 | |
| 8072 | #ifdef __LITTLE_ENDIAN__ | | |
| 8073 | #define vld1_dup_s64(__p0) __extension__ ({ \ | | |
| 8074 | int64x1_t __ret; \ | | |
| 8075 | __ret = (int64x1_t) __builtin_neon_vld1_dup_v(__p0, 3); \ | | |
| 8076 | __ret; \ | | |
| 8077 | }) | | |
| 8078 | #else | | |
| 8079 | #define vld1_dup_s64(__p0) __extension__ ({ \ | 7767 | #define vld1_dup_s64(__p0) __extension__ ({ \ |
| 8080 | int64x1_t __ret; \ | 7768 | int64x1_t __ret; \ |
| 8081 | __ret = (int64x1_t) __builtin_neon_vld1_dup_v(__p0, 3); \ | 7769 | __ret = (int64x1_t) __builtin_neon_vld1_dup_v(__p0, 3); \ |
| 8082 | __ret; \ | 7770 | __ret; \ |
| 8083 | }) | 7771 | }) |
| 8084 | #endif | | |
| 8085 | | | |
| 8086 | #ifdef __LITTLE_ENDIAN__ | 7772 | #ifdef __LITTLE_ENDIAN__ |
| 8087 | #define vld1_dup_s16(__p0) __extension__ ({ \ | 7773 | #define vld1_dup_s16(__p0) __extension__ ({ \ |
| 8088 | int16x4_t __ret; \ | 7774 | int16x4_t __ret; \ |
| ... | @@ -8368,22 +8054,12 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -8368,22 +8054,12 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 8368 | }) | 8054 | }) |
| 8369 | #endif | 8055 | #endif |
| 8370 | | 8056 | |
| 8371 | #ifdef __LITTLE_ENDIAN__ | | |
| 8372 | #define vld1_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 8373 | uint64x1_t __s1 = __p1; \ | | |
| 8374 | uint64x1_t __ret; \ | | |
| 8375 | __ret = (uint64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 19); \ | | |
| 8376 | __ret; \ | | |
| 8377 | }) | | |
| 8378 | #else | | |
| 8379 | #define vld1_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 8057 | #define vld1_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 8380 | uint64x1_t __s1 = __p1; \ | 8058 | uint64x1_t __s1 = __p1; \ |
| 8381 | uint64x1_t __ret; \ | 8059 | uint64x1_t __ret; \ |
| 8382 | __ret = (uint64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 19); \ | 8060 | __ret = (uint64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 19); \ |
| 8383 | __ret; \ | 8061 | __ret; \ |
| 8384 | }) | 8062 | }) |
| 8385 | #endif | | |
| 8386 | | | |
| 8387 | #ifdef __LITTLE_ENDIAN__ | 8063 | #ifdef __LITTLE_ENDIAN__ |
| 8388 | #define vld1_lane_u16(__p0, __p1, __p2) __extension__ ({ \ | 8064 | #define vld1_lane_u16(__p0, __p1, __p2) __extension__ ({ \ |
| 8389 | uint16x4_t __s1 = __p1; \ | 8065 | uint16x4_t __s1 = __p1; \ |
| ... | @@ -8456,22 +8132,12 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -8456,22 +8132,12 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 8456 | }) | 8132 | }) |
| 8457 | #endif | 8133 | #endif |
| 8458 | | 8134 | |
| 8459 | #ifdef __LITTLE_ENDIAN__ | | |
| 8460 | #define vld1_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 8135 | #define vld1_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 8461 | int64x1_t __s1 = __p1; \ | 8136 | int64x1_t __s1 = __p1; \ |
| 8462 | int64x1_t __ret; \ | 8137 | int64x1_t __ret; \ |
| 8463 | __ret = (int64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 3); \ | 8138 | __ret = (int64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 3); \ |
| 8464 | __ret; \ | 8139 | __ret; \ |
| 8465 | }) | 8140 | }) |
| 8466 | #else | | |
| 8467 | #define vld1_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 8468 | int64x1_t __s1 = __p1; \ | | |
| 8469 | int64x1_t __ret; \ | | |
| 8470 | __ret = (int64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 3); \ | | |
| 8471 | __ret; \ | | |
| 8472 | }) | | |
| 8473 | #endif | | |
| 8474 | | | |
| 8475 | #ifdef __LITTLE_ENDIAN__ | 8141 | #ifdef __LITTLE_ENDIAN__ |
| 8476 | #define vld1_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 8142 | #define vld1_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 8477 | int16x4_t __s1 = __p1; \ | 8143 | int16x4_t __s1 = __p1; \ |
| ... | @@ -8745,20 +8411,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -8745,20 +8411,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 8745 | }) | 8411 | }) |
| 8746 | #endif | 8412 | #endif |
| 8747 | | 8413 | |
| 8748 | #ifdef __LITTLE_ENDIAN__ | | |
| 8749 | #define vld1_u64_x2(__p0) __extension__ ({ \ | | |
| 8750 | uint64x1x2_t __ret; \ | | |
| 8751 | __builtin_neon_vld1_x2_v(&__ret, __p0, 19); \ | | |
| 8752 | __ret; \ | | |
| 8753 | }) | | |
| 8754 | #else | | |
| 8755 | #define vld1_u64_x2(__p0) __extension__ ({ \ | 8414 | #define vld1_u64_x2(__p0) __extension__ ({ \ |
| 8756 | uint64x1x2_t __ret; \ | 8415 | uint64x1x2_t __ret; \ |
| 8757 | __builtin_neon_vld1_x2_v(&__ret, __p0, 19); \ | 8416 | __builtin_neon_vld1_x2_v(&__ret, __p0, 19); \ |
| 8758 | __ret; \ | 8417 | __ret; \ |
| 8759 | }) | 8418 | }) |
| 8760 | #endif | | |
| 8761 | | | |
| 8762 | #ifdef __LITTLE_ENDIAN__ | 8419 | #ifdef __LITTLE_ENDIAN__ |
| 8763 | #define vld1_u16_x2(__p0) __extension__ ({ \ | 8420 | #define vld1_u16_x2(__p0) __extension__ ({ \ |
| 8764 | uint16x4x2_t __ret; \ | 8421 | uint16x4x2_t __ret; \ |
| ... | @@ -8827,20 +8484,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -8827,20 +8484,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 8827 | }) | 8484 | }) |
| 8828 | #endif | 8485 | #endif |
| 8829 | | 8486 | |
| 8830 | #ifdef __LITTLE_ENDIAN__ | | |
| 8831 | #define vld1_s64_x2(__p0) __extension__ ({ \ | 8487 | #define vld1_s64_x2(__p0) __extension__ ({ \ |
| 8832 | int64x1x2_t __ret; \ | 8488 | int64x1x2_t __ret; \ |
| 8833 | __builtin_neon_vld1_x2_v(&__ret, __p0, 3); \ | 8489 | __builtin_neon_vld1_x2_v(&__ret, __p0, 3); \ |
| 8834 | __ret; \ | 8490 | __ret; \ |
| 8835 | }) | 8491 | }) |
| 8836 | #else | | |
| 8837 | #define vld1_s64_x2(__p0) __extension__ ({ \ | | |
| 8838 | int64x1x2_t __ret; \ | | |
| 8839 | __builtin_neon_vld1_x2_v(&__ret, __p0, 3); \ | | |
| 8840 | __ret; \ | | |
| 8841 | }) | | |
| 8842 | #endif | | |
| 8843 | | | |
| 8844 | #ifdef __LITTLE_ENDIAN__ | 8492 | #ifdef __LITTLE_ENDIAN__ |
| 8845 | #define vld1_s16_x2(__p0) __extension__ ({ \ | 8493 | #define vld1_s16_x2(__p0) __extension__ ({ \ |
| 8846 | int16x4x2_t __ret; \ | 8494 | int16x4x2_t __ret; \ |
| ... | @@ -9128,20 +8776,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -9128,20 +8776,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 9128 | }) | 8776 | }) |
| 9129 | #endif | 8777 | #endif |
| 9130 | | 8778 | |
| 9131 | #ifdef __LITTLE_ENDIAN__ | | |
| 9132 | #define vld1_u64_x3(__p0) __extension__ ({ \ | | |
| 9133 | uint64x1x3_t __ret; \ | | |
| 9134 | __builtin_neon_vld1_x3_v(&__ret, __p0, 19); \ | | |
| 9135 | __ret; \ | | |
| 9136 | }) | | |
| 9137 | #else | | |
| 9138 | #define vld1_u64_x3(__p0) __extension__ ({ \ | 8779 | #define vld1_u64_x3(__p0) __extension__ ({ \ |
| 9139 | uint64x1x3_t __ret; \ | 8780 | uint64x1x3_t __ret; \ |
| 9140 | __builtin_neon_vld1_x3_v(&__ret, __p0, 19); \ | 8781 | __builtin_neon_vld1_x3_v(&__ret, __p0, 19); \ |
| 9141 | __ret; \ | 8782 | __ret; \ |
| 9142 | }) | 8783 | }) |
| 9143 | #endif | | |
| 9144 | | | |
| 9145 | #ifdef __LITTLE_ENDIAN__ | 8784 | #ifdef __LITTLE_ENDIAN__ |
| 9146 | #define vld1_u16_x3(__p0) __extension__ ({ \ | 8785 | #define vld1_u16_x3(__p0) __extension__ ({ \ |
| 9147 | uint16x4x3_t __ret; \ | 8786 | uint16x4x3_t __ret; \ |
| ... | @@ -9214,20 +8853,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -9214,20 +8853,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 9214 | }) | 8853 | }) |
| 9215 | #endif | 8854 | #endif |
| 9216 | | 8855 | |
| 9217 | #ifdef __LITTLE_ENDIAN__ | | |
| 9218 | #define vld1_s64_x3(__p0) __extension__ ({ \ | 8856 | #define vld1_s64_x3(__p0) __extension__ ({ \ |
| 9219 | int64x1x3_t __ret; \ | 8857 | int64x1x3_t __ret; \ |
| 9220 | __builtin_neon_vld1_x3_v(&__ret, __p0, 3); \ | 8858 | __builtin_neon_vld1_x3_v(&__ret, __p0, 3); \ |
| 9221 | __ret; \ | 8859 | __ret; \ |
| 9222 | }) | 8860 | }) |
| 9223 | #else | | |
| 9224 | #define vld1_s64_x3(__p0) __extension__ ({ \ | | |
| 9225 | int64x1x3_t __ret; \ | | |
| 9226 | __builtin_neon_vld1_x3_v(&__ret, __p0, 3); \ | | |
| 9227 | __ret; \ | | |
| 9228 | }) | | |
| 9229 | #endif | | |
| 9230 | | | |
| 9231 | #ifdef __LITTLE_ENDIAN__ | 8861 | #ifdef __LITTLE_ENDIAN__ |
| 9232 | #define vld1_s16_x3(__p0) __extension__ ({ \ | 8862 | #define vld1_s16_x3(__p0) __extension__ ({ \ |
| 9233 | int16x4x3_t __ret; \ | 8863 | int16x4x3_t __ret; \ |
| ... | @@ -9531,20 +9161,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -9531,20 +9161,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 9531 | }) | 9161 | }) |
| 9532 | #endif | 9162 | #endif |
| 9533 | | 9163 | |
| 9534 | #ifdef __LITTLE_ENDIAN__ | | |
| 9535 | #define vld1_u64_x4(__p0) __extension__ ({ \ | | |
| 9536 | uint64x1x4_t __ret; \ | | |
| 9537 | __builtin_neon_vld1_x4_v(&__ret, __p0, 19); \ | | |
| 9538 | __ret; \ | | |
| 9539 | }) | | |
| 9540 | #else | | |
| 9541 | #define vld1_u64_x4(__p0) __extension__ ({ \ | 9164 | #define vld1_u64_x4(__p0) __extension__ ({ \ |
| 9542 | uint64x1x4_t __ret; \ | 9165 | uint64x1x4_t __ret; \ |
| 9543 | __builtin_neon_vld1_x4_v(&__ret, __p0, 19); \ | 9166 | __builtin_neon_vld1_x4_v(&__ret, __p0, 19); \ |
| 9544 | __ret; \ | 9167 | __ret; \ |
| 9545 | }) | 9168 | }) |
| 9546 | #endif | | |
| 9547 | | | |
| 9548 | #ifdef __LITTLE_ENDIAN__ | 9169 | #ifdef __LITTLE_ENDIAN__ |
| 9549 | #define vld1_u16_x4(__p0) __extension__ ({ \ | 9170 | #define vld1_u16_x4(__p0) __extension__ ({ \ |
| 9550 | uint16x4x4_t __ret; \ | 9171 | uint16x4x4_t __ret; \ |
| ... | @@ -9621,20 +9242,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -9621,20 +9242,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 9621 | }) | 9242 | }) |
| 9622 | #endif | 9243 | #endif |
| 9623 | | 9244 | |
| 9624 | #ifdef __LITTLE_ENDIAN__ | | |
| 9625 | #define vld1_s64_x4(__p0) __extension__ ({ \ | | |
| 9626 | int64x1x4_t __ret; \ | | |
| 9627 | __builtin_neon_vld1_x4_v(&__ret, __p0, 3); \ | | |
| 9628 | __ret; \ | | |
| 9629 | }) | | |
| 9630 | #else | | |
| 9631 | #define vld1_s64_x4(__p0) __extension__ ({ \ | 9245 | #define vld1_s64_x4(__p0) __extension__ ({ \ |
| 9632 | int64x1x4_t __ret; \ | 9246 | int64x1x4_t __ret; \ |
| 9633 | __builtin_neon_vld1_x4_v(&__ret, __p0, 3); \ | 9247 | __builtin_neon_vld1_x4_v(&__ret, __p0, 3); \ |
| 9634 | __ret; \ | 9248 | __ret; \ |
| 9635 | }) | 9249 | }) |
| 9636 | #endif | | |
| 9637 | | | |
| 9638 | #ifdef __LITTLE_ENDIAN__ | 9250 | #ifdef __LITTLE_ENDIAN__ |
| 9639 | #define vld1_s16_x4(__p0) __extension__ ({ \ | 9251 | #define vld1_s16_x4(__p0) __extension__ ({ \ |
| 9640 | int16x4x4_t __ret; \ | 9252 | int16x4x4_t __ret; \ |
| ... | @@ -9875,20 +9487,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -9875,20 +9487,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 9875 | }) | 9487 | }) |
| 9876 | #endif | 9488 | #endif |
| 9877 | | 9489 | |
| 9878 | #ifdef __LITTLE_ENDIAN__ | | |
| 9879 | #define vld2_u64(__p0) __extension__ ({ \ | | |
| 9880 | uint64x1x2_t __ret; \ | | |
| 9881 | __builtin_neon_vld2_v(&__ret, __p0, 19); \ | | |
| 9882 | __ret; \ | | |
| 9883 | }) | | |
| 9884 | #else | | |
| 9885 | #define vld2_u64(__p0) __extension__ ({ \ | 9490 | #define vld2_u64(__p0) __extension__ ({ \ |
| 9886 | uint64x1x2_t __ret; \ | 9491 | uint64x1x2_t __ret; \ |
| 9887 | __builtin_neon_vld2_v(&__ret, __p0, 19); \ | 9492 | __builtin_neon_vld2_v(&__ret, __p0, 19); \ |
| 9888 | __ret; \ | 9493 | __ret; \ |
| 9889 | }) | 9494 | }) |
| 9890 | #endif | | |
| 9891 | | | |
| 9892 | #ifdef __LITTLE_ENDIAN__ | 9495 | #ifdef __LITTLE_ENDIAN__ |
| 9893 | #define vld2_u16(__p0) __extension__ ({ \ | 9496 | #define vld2_u16(__p0) __extension__ ({ \ |
| 9894 | uint16x4x2_t __ret; \ | 9497 | uint16x4x2_t __ret; \ |
| ... | @@ -9957,20 +9560,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -9957,20 +9560,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 9957 | }) | 9560 | }) |
| 9958 | #endif | 9561 | #endif |
| 9959 | | 9562 | |
| 9960 | #ifdef __LITTLE_ENDIAN__ | | |
| 9961 | #define vld2_s64(__p0) __extension__ ({ \ | | |
| 9962 | int64x1x2_t __ret; \ | | |
| 9963 | __builtin_neon_vld2_v(&__ret, __p0, 3); \ | | |
| 9964 | __ret; \ | | |
| 9965 | }) | | |
| 9966 | #else | | |
| 9967 | #define vld2_s64(__p0) __extension__ ({ \ | 9563 | #define vld2_s64(__p0) __extension__ ({ \ |
| 9968 | int64x1x2_t __ret; \ | 9564 | int64x1x2_t __ret; \ |
| 9969 | __builtin_neon_vld2_v(&__ret, __p0, 3); \ | 9565 | __builtin_neon_vld2_v(&__ret, __p0, 3); \ |
| 9970 | __ret; \ | 9566 | __ret; \ |
| 9971 | }) | 9567 | }) |
| 9972 | #endif | | |
| 9973 | | | |
| 9974 | #ifdef __LITTLE_ENDIAN__ | 9568 | #ifdef __LITTLE_ENDIAN__ |
| 9975 | #define vld2_s16(__p0) __extension__ ({ \ | 9569 | #define vld2_s16(__p0) __extension__ ({ \ |
| 9976 | int16x4x2_t __ret; \ | 9570 | int16x4x2_t __ret; \ |
| ... | @@ -10243,20 +9837,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10243,20 +9837,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10243 | }) | 9837 | }) |
| 10244 | #endif | 9838 | #endif |
| 10245 | | 9839 | |
| 10246 | #ifdef __LITTLE_ENDIAN__ | | |
| 10247 | #define vld2_dup_u64(__p0) __extension__ ({ \ | | |
| 10248 | uint64x1x2_t __ret; \ | | |
| 10249 | __builtin_neon_vld2_dup_v(&__ret, __p0, 19); \ | | |
| 10250 | __ret; \ | | |
| 10251 | }) | | |
| 10252 | #else | | |
| 10253 | #define vld2_dup_u64(__p0) __extension__ ({ \ | 9840 | #define vld2_dup_u64(__p0) __extension__ ({ \ |
| 10254 | uint64x1x2_t __ret; \ | 9841 | uint64x1x2_t __ret; \ |
| 10255 | __builtin_neon_vld2_dup_v(&__ret, __p0, 19); \ | 9842 | __builtin_neon_vld2_dup_v(&__ret, __p0, 19); \ |
| 10256 | __ret; \ | 9843 | __ret; \ |
| 10257 | }) | 9844 | }) |
| 10258 | #endif | | |
| 10259 | | | |
| 10260 | #ifdef __LITTLE_ENDIAN__ | 9845 | #ifdef __LITTLE_ENDIAN__ |
| 10261 | #define vld2_dup_u16(__p0) __extension__ ({ \ | 9846 | #define vld2_dup_u16(__p0) __extension__ ({ \ |
| 10262 | uint16x4x2_t __ret; \ | 9847 | uint16x4x2_t __ret; \ |
| ... | @@ -10325,20 +9910,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10325,20 +9910,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10325 | }) | 9910 | }) |
| 10326 | #endif | 9911 | #endif |
| 10327 | | 9912 | |
| 10328 | #ifdef __LITTLE_ENDIAN__ | | |
| 10329 | #define vld2_dup_s64(__p0) __extension__ ({ \ | | |
| 10330 | int64x1x2_t __ret; \ | | |
| 10331 | __builtin_neon_vld2_dup_v(&__ret, __p0, 3); \ | | |
| 10332 | __ret; \ | | |
| 10333 | }) | | |
| 10334 | #else | | |
| 10335 | #define vld2_dup_s64(__p0) __extension__ ({ \ | 9913 | #define vld2_dup_s64(__p0) __extension__ ({ \ |
| 10336 | int64x1x2_t __ret; \ | 9914 | int64x1x2_t __ret; \ |
| 10337 | __builtin_neon_vld2_dup_v(&__ret, __p0, 3); \ | 9915 | __builtin_neon_vld2_dup_v(&__ret, __p0, 3); \ |
| 10338 | __ret; \ | 9916 | __ret; \ |
| 10339 | }) | 9917 | }) |
| 10340 | #endif | | |
| 10341 | | | |
| 10342 | #ifdef __LITTLE_ENDIAN__ | 9918 | #ifdef __LITTLE_ENDIAN__ |
| 10343 | #define vld2_dup_s16(__p0) __extension__ ({ \ | 9919 | #define vld2_dup_s16(__p0) __extension__ ({ \ |
| 10344 | int16x4x2_t __ret; \ | 9920 | int16x4x2_t __ret; \ |
| ... | @@ -10470,7 +10046,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10470,7 +10046,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10470 | #define vld2q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 10046 | #define vld2q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 10471 | float32x4x2_t __s1 = __p1; \ | 10047 | float32x4x2_t __s1 = __p1; \ |
| 10472 | float32x4x2_t __ret; \ | 10048 | float32x4x2_t __ret; \ |
| 10473 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 41); \ | 10049 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 41); \ |
| 10474 | __ret; \ | 10050 | __ret; \ |
| 10475 | }) | 10051 | }) |
| 10476 | #else | 10052 | #else |
| ... | @@ -10480,7 +10056,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10480,7 +10056,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10480 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 10056 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 10481 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 10057 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 10482 | float32x4x2_t __ret; \ | 10058 | float32x4x2_t __ret; \ |
| 10483 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 41); \ | 10059 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 41); \ |
| 10484 | \ | 10060 | \ |
| 10485 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 10061 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 10486 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 10062 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -10492,7 +10068,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10492,7 +10068,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10492 | #define vld2q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 10068 | #define vld2q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 10493 | int32x4x2_t __s1 = __p1; \ | 10069 | int32x4x2_t __s1 = __p1; \ |
| 10494 | int32x4x2_t __ret; \ | 10070 | int32x4x2_t __ret; \ |
| 10495 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 34); \ | 10071 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 34); \ |
| 10496 | __ret; \ | 10072 | __ret; \ |
| 10497 | }) | 10073 | }) |
| 10498 | #else | 10074 | #else |
| ... | @@ -10502,7 +10078,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10502,7 +10078,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10502 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 10078 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 10503 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 10079 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 10504 | int32x4x2_t __ret; \ | 10080 | int32x4x2_t __ret; \ |
| 10505 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 34); \ | 10081 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 34); \ |
| 10506 | \ | 10082 | \ |
| 10507 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 10083 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 10508 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 10084 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -10514,7 +10090,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10514,7 +10090,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10514 | #define vld2q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 10090 | #define vld2q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 10515 | int16x8x2_t __s1 = __p1; \ | 10091 | int16x8x2_t __s1 = __p1; \ |
| 10516 | int16x8x2_t __ret; \ | 10092 | int16x8x2_t __ret; \ |
| 10517 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 33); \ | 10093 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 33); \ |
| 10518 | __ret; \ | 10094 | __ret; \ |
| 10519 | }) | 10095 | }) |
| 10520 | #else | 10096 | #else |
| ... | @@ -10524,7 +10100,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10524,7 +10100,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10524 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 10100 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 10525 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 10101 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 10526 | int16x8x2_t __ret; \ | 10102 | int16x8x2_t __ret; \ |
| 10527 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 33); \ | 10103 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 33); \ |
| 10528 | \ | 10104 | \ |
| 10529 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 10105 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 10530 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 10106 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| ... | @@ -10624,7 +10200,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10624,7 +10200,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10624 | #define vld2_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 10200 | #define vld2_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 10625 | float32x2x2_t __s1 = __p1; \ | 10201 | float32x2x2_t __s1 = __p1; \ |
| 10626 | float32x2x2_t __ret; \ | 10202 | float32x2x2_t __ret; \ |
| 10627 | __builtin_neon_vld2_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 9); \ | 10203 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 9); \ |
| 10628 | __ret; \ | 10204 | __ret; \ |
| 10629 | }) | 10205 | }) |
| 10630 | #else | 10206 | #else |
| ... | @@ -10634,7 +10210,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10634,7 +10210,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10634 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 10210 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 10635 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 10211 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 10636 | float32x2x2_t __ret; \ | 10212 | float32x2x2_t __ret; \ |
| 10637 | __builtin_neon_vld2_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 9); \ | 10213 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 9); \ |
| 10638 | \ | 10214 | \ |
| 10639 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 10215 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 10640 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 10216 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -10646,7 +10222,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10646,7 +10222,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10646 | #define vld2_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 10222 | #define vld2_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 10647 | int32x2x2_t __s1 = __p1; \ | 10223 | int32x2x2_t __s1 = __p1; \ |
| 10648 | int32x2x2_t __ret; \ | 10224 | int32x2x2_t __ret; \ |
| 10649 | __builtin_neon_vld2_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 2); \ | 10225 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 2); \ |
| 10650 | __ret; \ | 10226 | __ret; \ |
| 10651 | }) | 10227 | }) |
| 10652 | #else | 10228 | #else |
| ... | @@ -10656,7 +10232,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10656,7 +10232,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10656 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 10232 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 10657 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 10233 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 10658 | int32x2x2_t __ret; \ | 10234 | int32x2x2_t __ret; \ |
| 10659 | __builtin_neon_vld2_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 2); \ | 10235 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 2); \ |
| 10660 | \ | 10236 | \ |
| 10661 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 10237 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 10662 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 10238 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -10668,7 +10244,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10668,7 +10244,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10668 | #define vld2_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 10244 | #define vld2_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 10669 | int16x4x2_t __s1 = __p1; \ | 10245 | int16x4x2_t __s1 = __p1; \ |
| 10670 | int16x4x2_t __ret; \ | 10246 | int16x4x2_t __ret; \ |
| 10671 | __builtin_neon_vld2_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 1); \ | 10247 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 1); \ |
| 10672 | __ret; \ | 10248 | __ret; \ |
| 10673 | }) | 10249 | }) |
| 10674 | #else | 10250 | #else |
| ... | @@ -10678,7 +10254,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10678,7 +10254,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10678 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 10254 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 10679 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 10255 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 10680 | int16x4x2_t __ret; \ | 10256 | int16x4x2_t __ret; \ |
| 10681 | __builtin_neon_vld2_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 1); \ | 10257 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 1); \ |
| 10682 | \ | 10258 | \ |
| 10683 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 10259 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 10684 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 10260 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -10920,20 +10496,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -10920,20 +10496,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 10920 | }) | 10496 | }) |
| 10921 | #endif | 10497 | #endif |
| 10922 | | 10498 | |
| 10923 | #ifdef __LITTLE_ENDIAN__ | | |
| 10924 | #define vld3_u64(__p0) __extension__ ({ \ | | |
| 10925 | uint64x1x3_t __ret; \ | | |
| 10926 | __builtin_neon_vld3_v(&__ret, __p0, 19); \ | | |
| 10927 | __ret; \ | | |
| 10928 | }) | | |
| 10929 | #else | | |
| 10930 | #define vld3_u64(__p0) __extension__ ({ \ | 10499 | #define vld3_u64(__p0) __extension__ ({ \ |
| 10931 | uint64x1x3_t __ret; \ | 10500 | uint64x1x3_t __ret; \ |
| 10932 | __builtin_neon_vld3_v(&__ret, __p0, 19); \ | 10501 | __builtin_neon_vld3_v(&__ret, __p0, 19); \ |
| 10933 | __ret; \ | 10502 | __ret; \ |
| 10934 | }) | 10503 | }) |
| 10935 | #endif | | |
| 10936 | | | |
| 10937 | #ifdef __LITTLE_ENDIAN__ | 10504 | #ifdef __LITTLE_ENDIAN__ |
| 10938 | #define vld3_u16(__p0) __extension__ ({ \ | 10505 | #define vld3_u16(__p0) __extension__ ({ \ |
| 10939 | uint16x4x3_t __ret; \ | 10506 | uint16x4x3_t __ret; \ |
| ... | @@ -11006,20 +10573,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11006,20 +10573,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11006 | }) | 10573 | }) |
| 11007 | #endif | 10574 | #endif |
| 11008 | | 10575 | |
| 11009 | #ifdef __LITTLE_ENDIAN__ | | |
| 11010 | #define vld3_s64(__p0) __extension__ ({ \ | 10576 | #define vld3_s64(__p0) __extension__ ({ \ |
| 11011 | int64x1x3_t __ret; \ | 10577 | int64x1x3_t __ret; \ |
| 11012 | __builtin_neon_vld3_v(&__ret, __p0, 3); \ | 10578 | __builtin_neon_vld3_v(&__ret, __p0, 3); \ |
| 11013 | __ret; \ | 10579 | __ret; \ |
| 11014 | }) | 10580 | }) |
| 11015 | #else | | |
| 11016 | #define vld3_s64(__p0) __extension__ ({ \ | | |
| 11017 | int64x1x3_t __ret; \ | | |
| 11018 | __builtin_neon_vld3_v(&__ret, __p0, 3); \ | | |
| 11019 | __ret; \ | | |
| 11020 | }) | | |
| 11021 | #endif | | |
| 11022 | | | |
| 11023 | #ifdef __LITTLE_ENDIAN__ | 10581 | #ifdef __LITTLE_ENDIAN__ |
| 11024 | #define vld3_s16(__p0) __extension__ ({ \ | 10582 | #define vld3_s16(__p0) __extension__ ({ \ |
| 11025 | int16x4x3_t __ret; \ | 10583 | int16x4x3_t __ret; \ |
| ... | @@ -11308,20 +10866,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11308,20 +10866,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11308 | }) | 10866 | }) |
| 11309 | #endif | 10867 | #endif |
| 11310 | | 10868 | |
| 11311 | #ifdef __LITTLE_ENDIAN__ | | |
| 11312 | #define vld3_dup_u64(__p0) __extension__ ({ \ | 10869 | #define vld3_dup_u64(__p0) __extension__ ({ \ |
| 11313 | uint64x1x3_t __ret; \ | 10870 | uint64x1x3_t __ret; \ |
| 11314 | __builtin_neon_vld3_dup_v(&__ret, __p0, 19); \ | 10871 | __builtin_neon_vld3_dup_v(&__ret, __p0, 19); \ |
| 11315 | __ret; \ | 10872 | __ret; \ |
| 11316 | }) | 10873 | }) |
| 11317 | #else | | |
| 11318 | #define vld3_dup_u64(__p0) __extension__ ({ \ | | |
| 11319 | uint64x1x3_t __ret; \ | | |
| 11320 | __builtin_neon_vld3_dup_v(&__ret, __p0, 19); \ | | |
| 11321 | __ret; \ | | |
| 11322 | }) | | |
| 11323 | #endif | | |
| 11324 | | | |
| 11325 | #ifdef __LITTLE_ENDIAN__ | 10874 | #ifdef __LITTLE_ENDIAN__ |
| 11326 | #define vld3_dup_u16(__p0) __extension__ ({ \ | 10875 | #define vld3_dup_u16(__p0) __extension__ ({ \ |
| 11327 | uint16x4x3_t __ret; \ | 10876 | uint16x4x3_t __ret; \ |
| ... | @@ -11394,20 +10943,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11394,20 +10943,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11394 | }) | 10943 | }) |
| 11395 | #endif | 10944 | #endif |
| 11396 | | 10945 | |
| 11397 | #ifdef __LITTLE_ENDIAN__ | | |
| 11398 | #define vld3_dup_s64(__p0) __extension__ ({ \ | | |
| 11399 | int64x1x3_t __ret; \ | | |
| 11400 | __builtin_neon_vld3_dup_v(&__ret, __p0, 3); \ | | |
| 11401 | __ret; \ | | |
| 11402 | }) | | |
| 11403 | #else | | |
| 11404 | #define vld3_dup_s64(__p0) __extension__ ({ \ | 10946 | #define vld3_dup_s64(__p0) __extension__ ({ \ |
| 11405 | int64x1x3_t __ret; \ | 10947 | int64x1x3_t __ret; \ |
| 11406 | __builtin_neon_vld3_dup_v(&__ret, __p0, 3); \ | 10948 | __builtin_neon_vld3_dup_v(&__ret, __p0, 3); \ |
| 11407 | __ret; \ | 10949 | __ret; \ |
| 11408 | }) | 10950 | }) |
| 11409 | #endif | | |
| 11410 | | | |
| 11411 | #ifdef __LITTLE_ENDIAN__ | 10951 | #ifdef __LITTLE_ENDIAN__ |
| 11412 | #define vld3_dup_s16(__p0) __extension__ ({ \ | 10952 | #define vld3_dup_s16(__p0) __extension__ ({ \ |
| 11413 | int16x4x3_t __ret; \ | 10953 | int16x4x3_t __ret; \ |
| ... | @@ -11550,7 +11090,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11550,7 +11090,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11550 | #define vld3q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 11090 | #define vld3q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 11551 | float32x4x3_t __s1 = __p1; \ | 11091 | float32x4x3_t __s1 = __p1; \ |
| 11552 | float32x4x3_t __ret; \ | 11092 | float32x4x3_t __ret; \ |
| 11553 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 41); \ | 11093 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 41); \ |
| 11554 | __ret; \ | 11094 | __ret; \ |
| 11555 | }) | 11095 | }) |
| 11556 | #else | 11096 | #else |
| ... | @@ -11561,7 +11101,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11561,7 +11101,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11561 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 11101 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 11562 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 11102 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 11563 | float32x4x3_t __ret; \ | 11103 | float32x4x3_t __ret; \ |
| 11564 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 41); \ | 11104 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 41); \ |
| 11565 | \ | 11105 | \ |
| 11566 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 11106 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 11567 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 11107 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -11574,7 +11114,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11574,7 +11114,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11574 | #define vld3q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 11114 | #define vld3q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 11575 | int32x4x3_t __s1 = __p1; \ | 11115 | int32x4x3_t __s1 = __p1; \ |
| 11576 | int32x4x3_t __ret; \ | 11116 | int32x4x3_t __ret; \ |
| 11577 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 34); \ | 11117 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 34); \ |
| 11578 | __ret; \ | 11118 | __ret; \ |
| 11579 | }) | 11119 | }) |
| 11580 | #else | 11120 | #else |
| ... | @@ -11585,7 +11125,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11585,7 +11125,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11585 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 11125 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 11586 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 11126 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 11587 | int32x4x3_t __ret; \ | 11127 | int32x4x3_t __ret; \ |
| 11588 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 34); \ | 11128 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 34); \ |
| 11589 | \ | 11129 | \ |
| 11590 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 11130 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 11591 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 11131 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -11598,7 +11138,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11598,7 +11138,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11598 | #define vld3q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 11138 | #define vld3q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 11599 | int16x8x3_t __s1 = __p1; \ | 11139 | int16x8x3_t __s1 = __p1; \ |
| 11600 | int16x8x3_t __ret; \ | 11140 | int16x8x3_t __ret; \ |
| 11601 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 33); \ | 11141 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 33); \ |
| 11602 | __ret; \ | 11142 | __ret; \ |
| 11603 | }) | 11143 | }) |
| 11604 | #else | 11144 | #else |
| ... | @@ -11609,7 +11149,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11609,7 +11149,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11609 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 11149 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 11610 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 11150 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 11611 | int16x8x3_t __ret; \ | 11151 | int16x8x3_t __ret; \ |
| 11612 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 33); \ | 11152 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 33); \ |
| 11613 | \ | 11153 | \ |
| 11614 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 11154 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 11615 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 11155 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| ... | @@ -11718,7 +11258,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11718,7 +11258,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11718 | #define vld3_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 11258 | #define vld3_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 11719 | float32x2x3_t __s1 = __p1; \ | 11259 | float32x2x3_t __s1 = __p1; \ |
| 11720 | float32x2x3_t __ret; \ | 11260 | float32x2x3_t __ret; \ |
| 11721 | __builtin_neon_vld3_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 9); \ | 11261 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 9); \ |
| 11722 | __ret; \ | 11262 | __ret; \ |
| 11723 | }) | 11263 | }) |
| 11724 | #else | 11264 | #else |
| ... | @@ -11729,7 +11269,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11729,7 +11269,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11729 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 11269 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 11730 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 11270 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 11731 | float32x2x3_t __ret; \ | 11271 | float32x2x3_t __ret; \ |
| 11732 | __builtin_neon_vld3_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 9); \ | 11272 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 9); \ |
| 11733 | \ | 11273 | \ |
| 11734 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 11274 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 11735 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 11275 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -11742,7 +11282,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11742,7 +11282,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11742 | #define vld3_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 11282 | #define vld3_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 11743 | int32x2x3_t __s1 = __p1; \ | 11283 | int32x2x3_t __s1 = __p1; \ |
| 11744 | int32x2x3_t __ret; \ | 11284 | int32x2x3_t __ret; \ |
| 11745 | __builtin_neon_vld3_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 2); \ | 11285 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 2); \ |
| 11746 | __ret; \ | 11286 | __ret; \ |
| 11747 | }) | 11287 | }) |
| 11748 | #else | 11288 | #else |
| ... | @@ -11753,7 +11293,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11753,7 +11293,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11753 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 11293 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 11754 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 11294 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 11755 | int32x2x3_t __ret; \ | 11295 | int32x2x3_t __ret; \ |
| 11756 | __builtin_neon_vld3_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 2); \ | 11296 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 2); \ |
| 11757 | \ | 11297 | \ |
| 11758 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 11298 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 11759 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 11299 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -11766,7 +11306,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11766,7 +11306,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11766 | #define vld3_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 11306 | #define vld3_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 11767 | int16x4x3_t __s1 = __p1; \ | 11307 | int16x4x3_t __s1 = __p1; \ |
| 11768 | int16x4x3_t __ret; \ | 11308 | int16x4x3_t __ret; \ |
| 11769 | __builtin_neon_vld3_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 1); \ | 11309 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 1); \ |
| 11770 | __ret; \ | 11310 | __ret; \ |
| 11771 | }) | 11311 | }) |
| 11772 | #else | 11312 | #else |
| ... | @@ -11777,7 +11317,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -11777,7 +11317,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 11777 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 11317 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 11778 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 11318 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 11779 | int16x4x3_t __ret; \ | 11319 | int16x4x3_t __ret; \ |
| 11780 | __builtin_neon_vld3_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 1); \ | 11320 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 1); \ |
| 11781 | \ | 11321 | \ |
| 11782 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 11322 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 11783 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 11323 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -12033,20 +11573,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12033,20 +11573,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12033 | }) | 11573 | }) |
| 12034 | #endif | 11574 | #endif |
| 12035 | | 11575 | |
| 12036 | #ifdef __LITTLE_ENDIAN__ | | |
| 12037 | #define vld4_u64(__p0) __extension__ ({ \ | | |
| 12038 | uint64x1x4_t __ret; \ | | |
| 12039 | __builtin_neon_vld4_v(&__ret, __p0, 19); \ | | |
| 12040 | __ret; \ | | |
| 12041 | }) | | |
| 12042 | #else | | |
| 12043 | #define vld4_u64(__p0) __extension__ ({ \ | 11576 | #define vld4_u64(__p0) __extension__ ({ \ |
| 12044 | uint64x1x4_t __ret; \ | 11577 | uint64x1x4_t __ret; \ |
| 12045 | __builtin_neon_vld4_v(&__ret, __p0, 19); \ | 11578 | __builtin_neon_vld4_v(&__ret, __p0, 19); \ |
| 12046 | __ret; \ | 11579 | __ret; \ |
| 12047 | }) | 11580 | }) |
| 12048 | #endif | | |
| 12049 | | | |
| 12050 | #ifdef __LITTLE_ENDIAN__ | 11581 | #ifdef __LITTLE_ENDIAN__ |
| 12051 | #define vld4_u16(__p0) __extension__ ({ \ | 11582 | #define vld4_u16(__p0) __extension__ ({ \ |
| 12052 | uint16x4x4_t __ret; \ | 11583 | uint16x4x4_t __ret; \ |
| ... | @@ -12123,20 +11654,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12123,20 +11654,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12123 | }) | 11654 | }) |
| 12124 | #endif | 11655 | #endif |
| 12125 | | 11656 | |
| 12126 | #ifdef __LITTLE_ENDIAN__ | | |
| 12127 | #define vld4_s64(__p0) __extension__ ({ \ | 11657 | #define vld4_s64(__p0) __extension__ ({ \ |
| 12128 | int64x1x4_t __ret; \ | 11658 | int64x1x4_t __ret; \ |
| 12129 | __builtin_neon_vld4_v(&__ret, __p0, 3); \ | 11659 | __builtin_neon_vld4_v(&__ret, __p0, 3); \ |
| 12130 | __ret; \ | 11660 | __ret; \ |
| 12131 | }) | 11661 | }) |
| 12132 | #else | | |
| 12133 | #define vld4_s64(__p0) __extension__ ({ \ | | |
| 12134 | int64x1x4_t __ret; \ | | |
| 12135 | __builtin_neon_vld4_v(&__ret, __p0, 3); \ | | |
| 12136 | __ret; \ | | |
| 12137 | }) | | |
| 12138 | #endif | | |
| 12139 | | | |
| 12140 | #ifdef __LITTLE_ENDIAN__ | 11662 | #ifdef __LITTLE_ENDIAN__ |
| 12141 | #define vld4_s16(__p0) __extension__ ({ \ | 11663 | #define vld4_s16(__p0) __extension__ ({ \ |
| 12142 | int16x4x4_t __ret; \ | 11664 | int16x4x4_t __ret; \ |
| ... | @@ -12441,20 +11963,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12441,20 +11963,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12441 | }) | 11963 | }) |
| 12442 | #endif | 11964 | #endif |
| 12443 | | 11965 | |
| 12444 | #ifdef __LITTLE_ENDIAN__ | | |
| 12445 | #define vld4_dup_u64(__p0) __extension__ ({ \ | | |
| 12446 | uint64x1x4_t __ret; \ | | |
| 12447 | __builtin_neon_vld4_dup_v(&__ret, __p0, 19); \ | | |
| 12448 | __ret; \ | | |
| 12449 | }) | | |
| 12450 | #else | | |
| 12451 | #define vld4_dup_u64(__p0) __extension__ ({ \ | 11966 | #define vld4_dup_u64(__p0) __extension__ ({ \ |
| 12452 | uint64x1x4_t __ret; \ | 11967 | uint64x1x4_t __ret; \ |
| 12453 | __builtin_neon_vld4_dup_v(&__ret, __p0, 19); \ | 11968 | __builtin_neon_vld4_dup_v(&__ret, __p0, 19); \ |
| 12454 | __ret; \ | 11969 | __ret; \ |
| 12455 | }) | 11970 | }) |
| 12456 | #endif | | |
| 12457 | | | |
| 12458 | #ifdef __LITTLE_ENDIAN__ | 11971 | #ifdef __LITTLE_ENDIAN__ |
| 12459 | #define vld4_dup_u16(__p0) __extension__ ({ \ | 11972 | #define vld4_dup_u16(__p0) __extension__ ({ \ |
| 12460 | uint16x4x4_t __ret; \ | 11973 | uint16x4x4_t __ret; \ |
| ... | @@ -12531,20 +12044,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12531,20 +12044,11 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12531 | }) | 12044 | }) |
| 12532 | #endif | 12045 | #endif |
| 12533 | | 12046 | |
| 12534 | #ifdef __LITTLE_ENDIAN__ | | |
| 12535 | #define vld4_dup_s64(__p0) __extension__ ({ \ | | |
| 12536 | int64x1x4_t __ret; \ | | |
| 12537 | __builtin_neon_vld4_dup_v(&__ret, __p0, 3); \ | | |
| 12538 | __ret; \ | | |
| 12539 | }) | | |
| 12540 | #else | | |
| 12541 | #define vld4_dup_s64(__p0) __extension__ ({ \ | 12047 | #define vld4_dup_s64(__p0) __extension__ ({ \ |
| 12542 | int64x1x4_t __ret; \ | 12048 | int64x1x4_t __ret; \ |
| 12543 | __builtin_neon_vld4_dup_v(&__ret, __p0, 3); \ | 12049 | __builtin_neon_vld4_dup_v(&__ret, __p0, 3); \ |
| 12544 | __ret; \ | 12050 | __ret; \ |
| 12545 | }) | 12051 | }) |
| 12546 | #endif | | |
| 12547 | | | |
| 12548 | #ifdef __LITTLE_ENDIAN__ | 12052 | #ifdef __LITTLE_ENDIAN__ |
| 12549 | #define vld4_dup_s16(__p0) __extension__ ({ \ | 12053 | #define vld4_dup_s16(__p0) __extension__ ({ \ |
| 12550 | int16x4x4_t __ret; \ | 12054 | int16x4x4_t __ret; \ |
| ... | @@ -12698,7 +12202,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12698,7 +12202,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12698 | #define vld4q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 12202 | #define vld4q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 12699 | float32x4x4_t __s1 = __p1; \ | 12203 | float32x4x4_t __s1 = __p1; \ |
| 12700 | float32x4x4_t __ret; \ | 12204 | float32x4x4_t __ret; \ |
| 12701 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 41); \ | 12205 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 41); \ |
| 12702 | __ret; \ | 12206 | __ret; \ |
| 12703 | }) | 12207 | }) |
| 12704 | #else | 12208 | #else |
| ... | @@ -12710,7 +12214,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12710,7 +12214,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12710 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 12214 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 12711 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 12215 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 12712 | float32x4x4_t __ret; \ | 12216 | float32x4x4_t __ret; \ |
| 12713 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 41); \ | 12217 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 41); \ |
| 12714 | \ | 12218 | \ |
| 12715 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 12219 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 12716 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 12220 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -12724,7 +12228,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12724,7 +12228,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12724 | #define vld4q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 12228 | #define vld4q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 12725 | int32x4x4_t __s1 = __p1; \ | 12229 | int32x4x4_t __s1 = __p1; \ |
| 12726 | int32x4x4_t __ret; \ | 12230 | int32x4x4_t __ret; \ |
| 12727 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 34); \ | 12231 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 34); \ |
| 12728 | __ret; \ | 12232 | __ret; \ |
| 12729 | }) | 12233 | }) |
| 12730 | #else | 12234 | #else |
| ... | @@ -12736,7 +12240,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12736,7 +12240,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12736 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 12240 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 12737 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 12241 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 12738 | int32x4x4_t __ret; \ | 12242 | int32x4x4_t __ret; \ |
| 12739 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 34); \ | 12243 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 34); \ |
| 12740 | \ | 12244 | \ |
| 12741 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 12245 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 12742 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 12246 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -12750,7 +12254,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12750,7 +12254,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12750 | #define vld4q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 12254 | #define vld4q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 12751 | int16x8x4_t __s1 = __p1; \ | 12255 | int16x8x4_t __s1 = __p1; \ |
| 12752 | int16x8x4_t __ret; \ | 12256 | int16x8x4_t __ret; \ |
| 12753 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 33); \ | 12257 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 33); \ |
| 12754 | __ret; \ | 12258 | __ret; \ |
| 12755 | }) | 12259 | }) |
| 12756 | #else | 12260 | #else |
| ... | @@ -12762,7 +12266,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12762,7 +12266,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12762 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 12266 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 12763 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 12267 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 12764 | int16x8x4_t __ret; \ | 12268 | int16x8x4_t __ret; \ |
| 12765 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 33); \ | 12269 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 33); \ |
| 12766 | \ | 12270 | \ |
| 12767 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 12271 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 12768 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 12272 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| ... | @@ -12880,7 +12384,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12880,7 +12384,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12880 | #define vld4_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 12384 | #define vld4_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 12881 | float32x2x4_t __s1 = __p1; \ | 12385 | float32x2x4_t __s1 = __p1; \ |
| 12882 | float32x2x4_t __ret; \ | 12386 | float32x2x4_t __ret; \ |
| 12883 | __builtin_neon_vld4_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 9); \ | 12387 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 9); \ |
| 12884 | __ret; \ | 12388 | __ret; \ |
| 12885 | }) | 12389 | }) |
| 12886 | #else | 12390 | #else |
| ... | @@ -12892,7 +12396,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12892,7 +12396,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12892 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 12396 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 12893 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 12397 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 12894 | float32x2x4_t __ret; \ | 12398 | float32x2x4_t __ret; \ |
| 12895 | __builtin_neon_vld4_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 9); \ | 12399 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 9); \ |
| 12896 | \ | 12400 | \ |
| 12897 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 12401 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 12898 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 12402 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -12906,7 +12410,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12906,7 +12410,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12906 | #define vld4_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 12410 | #define vld4_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 12907 | int32x2x4_t __s1 = __p1; \ | 12411 | int32x2x4_t __s1 = __p1; \ |
| 12908 | int32x2x4_t __ret; \ | 12412 | int32x2x4_t __ret; \ |
| 12909 | __builtin_neon_vld4_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 2); \ | 12413 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 2); \ |
| 12910 | __ret; \ | 12414 | __ret; \ |
| 12911 | }) | 12415 | }) |
| 12912 | #else | 12416 | #else |
| ... | @@ -12918,7 +12422,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12918,7 +12422,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12918 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 12422 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 12919 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 12423 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 12920 | int32x2x4_t __ret; \ | 12424 | int32x2x4_t __ret; \ |
| 12921 | __builtin_neon_vld4_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 2); \ | 12425 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 2); \ |
| 12922 | \ | 12426 | \ |
| 12923 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 12427 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 12924 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 12428 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -12932,7 +12436,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12932,7 +12436,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12932 | #define vld4_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 12436 | #define vld4_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 12933 | int16x4x4_t __s1 = __p1; \ | 12437 | int16x4x4_t __s1 = __p1; \ |
| 12934 | int16x4x4_t __ret; \ | 12438 | int16x4x4_t __ret; \ |
| 12935 | __builtin_neon_vld4_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 1); \ | 12439 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 1); \ |
| 12936 | __ret; \ | 12440 | __ret; \ |
| 12937 | }) | 12441 | }) |
| 12938 | #else | 12442 | #else |
| ... | @@ -12944,7 +12448,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -12944,7 +12448,7 @@ __ai int16x4_t vhsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 12944 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 12448 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 12945 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 12449 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 12946 | int16x4x4_t __ret; \ | 12450 | int16x4x4_t __ret; \ |
| 12947 | __builtin_neon_vld4_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 1); \ | 12451 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 1); \ |
| 12948 | \ | 12452 | \ |
| 12949 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 12453 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 12950 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 12454 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -14996,20 +14500,11 @@ __ai uint32x2_t vmov_n_u32(uint32_t __p0) { | ... | @@ -14996,20 +14500,11 @@ __ai uint32x2_t vmov_n_u32(uint32_t __p0) { |
| 14996 | } | 14500 | } |
| 14997 | #endif | 14501 | #endif |
| 14998 | | 14502 | |
| 14999 | #ifdef __LITTLE_ENDIAN__ | | |
| 15000 | __ai uint64x1_t vmov_n_u64(uint64_t __p0) { | | |
| 15001 | uint64x1_t __ret; | | |
| 15002 | __ret = (uint64x1_t) {__p0}; | | |
| 15003 | return __ret; | | |
| 15004 | } | | |
| 15005 | #else | | |
| 15006 | __ai uint64x1_t vmov_n_u64(uint64_t __p0) { | 14503 | __ai uint64x1_t vmov_n_u64(uint64_t __p0) { |
| 15007 | uint64x1_t __ret; | 14504 | uint64x1_t __ret; |
| 15008 | __ret = (uint64x1_t) {__p0}; | 14505 | __ret = (uint64x1_t) {__p0}; |
| 15009 | return __ret; | 14506 | return __ret; |
| 15010 | } | 14507 | } |
| 15011 | #endif | | |
| 15012 | | | |
| 15013 | #ifdef __LITTLE_ENDIAN__ | 14508 | #ifdef __LITTLE_ENDIAN__ |
| 15014 | __ai uint16x4_t vmov_n_u16(uint16_t __p0) { | 14509 | __ai uint16x4_t vmov_n_u16(uint16_t __p0) { |
| 15015 | uint16x4_t __ret; | 14510 | uint16x4_t __ret; |
| ... | @@ -15087,20 +14582,11 @@ __ai int32x2_t vmov_n_s32(int32_t __p0) { | ... | @@ -15087,20 +14582,11 @@ __ai int32x2_t vmov_n_s32(int32_t __p0) { |
| 15087 | } | 14582 | } |
| 15088 | #endif | 14583 | #endif |
| 15089 | | 14584 | |
| 15090 | #ifdef __LITTLE_ENDIAN__ | | |
| 15091 | __ai int64x1_t vmov_n_s64(int64_t __p0) { | | |
| 15092 | int64x1_t __ret; | | |
| 15093 | __ret = (int64x1_t) {__p0}; | | |
| 15094 | return __ret; | | |
| 15095 | } | | |
| 15096 | #else | | |
| 15097 | __ai int64x1_t vmov_n_s64(int64_t __p0) { | 14585 | __ai int64x1_t vmov_n_s64(int64_t __p0) { |
| 15098 | int64x1_t __ret; | 14586 | int64x1_t __ret; |
| 15099 | __ret = (int64x1_t) {__p0}; | 14587 | __ret = (int64x1_t) {__p0}; |
| 15100 | return __ret; | 14588 | return __ret; |
| 15101 | } | 14589 | } |
| 15102 | #endif | | |
| 15103 | | | |
| 15104 | #ifdef __LITTLE_ENDIAN__ | 14590 | #ifdef __LITTLE_ENDIAN__ |
| 15105 | __ai int16x4_t vmov_n_s16(int16_t __p0) { | 14591 | __ai int16x4_t vmov_n_s16(int16_t __p0) { |
| 15106 | int16x4_t __ret; | 14592 | int16x4_t __ret; |
| ... | @@ -16251,20 +15737,20 @@ __ai int32x4_t __noswap_vmull_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -16251,20 +15737,20 @@ __ai int32x4_t __noswap_vmull_s16(int16x4_t __p0, int16x4_t __p1) { |
| 16251 | #ifdef __LITTLE_ENDIAN__ | 15737 | #ifdef __LITTLE_ENDIAN__ |
| 16252 | __ai uint64x2_t vmull_n_u32(uint32x2_t __p0, uint32_t __p1) { | 15738 | __ai uint64x2_t vmull_n_u32(uint32x2_t __p0, uint32_t __p1) { |
| 16253 | uint64x2_t __ret; | 15739 | uint64x2_t __ret; |
| 16254 | __ret = (uint64x2_t) __builtin_neon_vmull_v((int8x8_t)__p0, (int8x8_t)(uint32x2_t) {__p1, __p1}, 51); | 15740 | __ret = vmull_u32(__p0, (uint32x2_t) {__p1, __p1}); |
| 16255 | return __ret; | 15741 | return __ret; |
| 16256 | } | 15742 | } |
| 16257 | #else | 15743 | #else |
| 16258 | __ai uint64x2_t vmull_n_u32(uint32x2_t __p0, uint32_t __p1) { | 15744 | __ai uint64x2_t vmull_n_u32(uint32x2_t __p0, uint32_t __p1) { |
| 16259 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 15745 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 16260 | uint64x2_t __ret; | 15746 | uint64x2_t __ret; |
| 16261 | __ret = (uint64x2_t) __builtin_neon_vmull_v((int8x8_t)__rev0, (int8x8_t)(uint32x2_t) {__p1, __p1}, 51); | 15747 | __ret = __noswap_vmull_u32(__rev0, (uint32x2_t) {__p1, __p1}); |
| 16262 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 15748 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 16263 | return __ret; | 15749 | return __ret; |
| 16264 | } | 15750 | } |
| 16265 | __ai uint64x2_t __noswap_vmull_n_u32(uint32x2_t __p0, uint32_t __p1) { | 15751 | __ai uint64x2_t __noswap_vmull_n_u32(uint32x2_t __p0, uint32_t __p1) { |
| 16266 | uint64x2_t __ret; | 15752 | uint64x2_t __ret; |
| 16267 | __ret = (uint64x2_t) __builtin_neon_vmull_v((int8x8_t)__p0, (int8x8_t)(uint32x2_t) {__p1, __p1}, 51); | 15753 | __ret = __noswap_vmull_u32(__p0, (uint32x2_t) {__p1, __p1}); |
| 16268 | return __ret; | 15754 | return __ret; |
| 16269 | } | 15755 | } |
| 16270 | #endif | 15756 | #endif |
| ... | @@ -16272,20 +15758,20 @@ __ai uint64x2_t __noswap_vmull_n_u32(uint32x2_t __p0, uint32_t __p1) { | ... | @@ -16272,20 +15758,20 @@ __ai uint64x2_t __noswap_vmull_n_u32(uint32x2_t __p0, uint32_t __p1) { |
| 16272 | #ifdef __LITTLE_ENDIAN__ | 15758 | #ifdef __LITTLE_ENDIAN__ |
| 16273 | __ai uint32x4_t vmull_n_u16(uint16x4_t __p0, uint16_t __p1) { | 15759 | __ai uint32x4_t vmull_n_u16(uint16x4_t __p0, uint16_t __p1) { |
| 16274 | uint32x4_t __ret; | 15760 | uint32x4_t __ret; |
| 16275 | __ret = (uint32x4_t) __builtin_neon_vmull_v((int8x8_t)__p0, (int8x8_t)(uint16x4_t) {__p1, __p1, __p1, __p1}, 50); | 15761 | __ret = vmull_u16(__p0, (uint16x4_t) {__p1, __p1, __p1, __p1}); |
| 16276 | return __ret; | 15762 | return __ret; |
| 16277 | } | 15763 | } |
| 16278 | #else | 15764 | #else |
| 16279 | __ai uint32x4_t vmull_n_u16(uint16x4_t __p0, uint16_t __p1) { | 15765 | __ai uint32x4_t vmull_n_u16(uint16x4_t __p0, uint16_t __p1) { |
| 16280 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 15766 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 16281 | uint32x4_t __ret; | 15767 | uint32x4_t __ret; |
| 16282 | __ret = (uint32x4_t) __builtin_neon_vmull_v((int8x8_t)__rev0, (int8x8_t)(uint16x4_t) {__p1, __p1, __p1, __p1}, 50); | 15768 | __ret = __noswap_vmull_u16(__rev0, (uint16x4_t) {__p1, __p1, __p1, __p1}); |
| 16283 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 15769 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 16284 | return __ret; | 15770 | return __ret; |
| 16285 | } | 15771 | } |
| 16286 | __ai uint32x4_t __noswap_vmull_n_u16(uint16x4_t __p0, uint16_t __p1) { | 15772 | __ai uint32x4_t __noswap_vmull_n_u16(uint16x4_t __p0, uint16_t __p1) { |
| 16287 | uint32x4_t __ret; | 15773 | uint32x4_t __ret; |
| 16288 | __ret = (uint32x4_t) __builtin_neon_vmull_v((int8x8_t)__p0, (int8x8_t)(uint16x4_t) {__p1, __p1, __p1, __p1}, 50); | 15774 | __ret = __noswap_vmull_u16(__p0, (uint16x4_t) {__p1, __p1, __p1, __p1}); |
| 16289 | return __ret; | 15775 | return __ret; |
| 16290 | } | 15776 | } |
| 16291 | #endif | 15777 | #endif |
| ... | @@ -16293,20 +15779,20 @@ __ai uint32x4_t __noswap_vmull_n_u16(uint16x4_t __p0, uint16_t __p1) { | ... | @@ -16293,20 +15779,20 @@ __ai uint32x4_t __noswap_vmull_n_u16(uint16x4_t __p0, uint16_t __p1) { |
| 16293 | #ifdef __LITTLE_ENDIAN__ | 15779 | #ifdef __LITTLE_ENDIAN__ |
| 16294 | __ai int64x2_t vmull_n_s32(int32x2_t __p0, int32_t __p1) { | 15780 | __ai int64x2_t vmull_n_s32(int32x2_t __p0, int32_t __p1) { |
| 16295 | int64x2_t __ret; | 15781 | int64x2_t __ret; |
| 16296 | __ret = (int64x2_t) __builtin_neon_vmull_v((int8x8_t)__p0, (int8x8_t)(int32x2_t) {__p1, __p1}, 35); | 15782 | __ret = vmull_s32(__p0, (int32x2_t) {__p1, __p1}); |
| 16297 | return __ret; | 15783 | return __ret; |
| 16298 | } | 15784 | } |
| 16299 | #else | 15785 | #else |
| 16300 | __ai int64x2_t vmull_n_s32(int32x2_t __p0, int32_t __p1) { | 15786 | __ai int64x2_t vmull_n_s32(int32x2_t __p0, int32_t __p1) { |
| 16301 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 15787 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 16302 | int64x2_t __ret; | 15788 | int64x2_t __ret; |
| 16303 | __ret = (int64x2_t) __builtin_neon_vmull_v((int8x8_t)__rev0, (int8x8_t)(int32x2_t) {__p1, __p1}, 35); | 15789 | __ret = __noswap_vmull_s32(__rev0, (int32x2_t) {__p1, __p1}); |
| 16304 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 15790 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 16305 | return __ret; | 15791 | return __ret; |
| 16306 | } | 15792 | } |
| 16307 | __ai int64x2_t __noswap_vmull_n_s32(int32x2_t __p0, int32_t __p1) { | 15793 | __ai int64x2_t __noswap_vmull_n_s32(int32x2_t __p0, int32_t __p1) { |
| 16308 | int64x2_t __ret; | 15794 | int64x2_t __ret; |
| 16309 | __ret = (int64x2_t) __builtin_neon_vmull_v((int8x8_t)__p0, (int8x8_t)(int32x2_t) {__p1, __p1}, 35); | 15795 | __ret = __noswap_vmull_s32(__p0, (int32x2_t) {__p1, __p1}); |
| 16310 | return __ret; | 15796 | return __ret; |
| 16311 | } | 15797 | } |
| 16312 | #endif | 15798 | #endif |
| ... | @@ -16314,20 +15800,20 @@ __ai int64x2_t __noswap_vmull_n_s32(int32x2_t __p0, int32_t __p1) { | ... | @@ -16314,20 +15800,20 @@ __ai int64x2_t __noswap_vmull_n_s32(int32x2_t __p0, int32_t __p1) { |
| 16314 | #ifdef __LITTLE_ENDIAN__ | 15800 | #ifdef __LITTLE_ENDIAN__ |
| 16315 | __ai int32x4_t vmull_n_s16(int16x4_t __p0, int16_t __p1) { | 15801 | __ai int32x4_t vmull_n_s16(int16x4_t __p0, int16_t __p1) { |
| 16316 | int32x4_t __ret; | 15802 | int32x4_t __ret; |
| 16317 | __ret = (int32x4_t) __builtin_neon_vmull_v((int8x8_t)__p0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 34); | 15803 | __ret = vmull_s16(__p0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 16318 | return __ret; | 15804 | return __ret; |
| 16319 | } | 15805 | } |
| 16320 | #else | 15806 | #else |
| 16321 | __ai int32x4_t vmull_n_s16(int16x4_t __p0, int16_t __p1) { | 15807 | __ai int32x4_t vmull_n_s16(int16x4_t __p0, int16_t __p1) { |
| 16322 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 15808 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 16323 | int32x4_t __ret; | 15809 | int32x4_t __ret; |
| 16324 | __ret = (int32x4_t) __builtin_neon_vmull_v((int8x8_t)__rev0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 34); | 15810 | __ret = __noswap_vmull_s16(__rev0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 16325 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 15811 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 16326 | return __ret; | 15812 | return __ret; |
| 16327 | } | 15813 | } |
| 16328 | __ai int32x4_t __noswap_vmull_n_s16(int16x4_t __p0, int16_t __p1) { | 15814 | __ai int32x4_t __noswap_vmull_n_s16(int16x4_t __p0, int16_t __p1) { |
| 16329 | int32x4_t __ret; | 15815 | int32x4_t __ret; |
| 16330 | __ret = (int32x4_t) __builtin_neon_vmull_v((int8x8_t)__p0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 34); | 15816 | __ret = __noswap_vmull_s16(__p0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 16331 | return __ret; | 15817 | return __ret; |
| 16332 | } | 15818 | } |
| 16333 | #endif | 15819 | #endif |
| ... | @@ -16854,20 +16340,11 @@ __ai uint32x2_t vorn_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -16854,20 +16340,11 @@ __ai uint32x2_t vorn_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 16854 | } | 16340 | } |
| 16855 | #endif | 16341 | #endif |
| 16856 | | 16342 | |
| 16857 | #ifdef __LITTLE_ENDIAN__ | | |
| 16858 | __ai uint64x1_t vorn_u64(uint64x1_t __p0, uint64x1_t __p1) { | 16343 | __ai uint64x1_t vorn_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 16859 | uint64x1_t __ret; | 16344 | uint64x1_t __ret; |
| 16860 | __ret = __p0 | ~__p1; | 16345 | __ret = __p0 | ~__p1; |
| 16861 | return __ret; | 16346 | return __ret; |
| 16862 | } | 16347 | } |
| 16863 | #else | | |
| 16864 | __ai uint64x1_t vorn_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 16865 | uint64x1_t __ret; | | |
| 16866 | __ret = __p0 | ~__p1; | | |
| 16867 | return __ret; | | |
| 16868 | } | | |
| 16869 | #endif | | |
| 16870 | | | |
| 16871 | #ifdef __LITTLE_ENDIAN__ | 16348 | #ifdef __LITTLE_ENDIAN__ |
| 16872 | __ai uint16x4_t vorn_u16(uint16x4_t __p0, uint16x4_t __p1) { | 16349 | __ai uint16x4_t vorn_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 16873 | uint16x4_t __ret; | 16350 | uint16x4_t __ret; |
| ... | @@ -16919,20 +16396,11 @@ __ai int32x2_t vorn_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -16919,20 +16396,11 @@ __ai int32x2_t vorn_s32(int32x2_t __p0, int32x2_t __p1) { |
| 16919 | } | 16396 | } |
| 16920 | #endif | 16397 | #endif |
| 16921 | | 16398 | |
| 16922 | #ifdef __LITTLE_ENDIAN__ | | |
| 16923 | __ai int64x1_t vorn_s64(int64x1_t __p0, int64x1_t __p1) { | 16399 | __ai int64x1_t vorn_s64(int64x1_t __p0, int64x1_t __p1) { |
| 16924 | int64x1_t __ret; | 16400 | int64x1_t __ret; |
| 16925 | __ret = __p0 | ~__p1; | 16401 | __ret = __p0 | ~__p1; |
| 16926 | return __ret; | 16402 | return __ret; |
| 16927 | } | 16403 | } |
| 16928 | #else | | |
| 16929 | __ai int64x1_t vorn_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 16930 | int64x1_t __ret; | | |
| 16931 | __ret = __p0 | ~__p1; | | |
| 16932 | return __ret; | | |
| 16933 | } | | |
| 16934 | #endif | | |
| 16935 | | | |
| 16936 | #ifdef __LITTLE_ENDIAN__ | 16404 | #ifdef __LITTLE_ENDIAN__ |
| 16937 | __ai int16x4_t vorn_s16(int16x4_t __p0, int16x4_t __p1) { | 16405 | __ai int16x4_t vorn_s16(int16x4_t __p0, int16x4_t __p1) { |
| 16938 | int16x4_t __ret; | 16406 | int16x4_t __ret; |
| ... | @@ -17120,20 +16588,11 @@ __ai uint32x2_t vorr_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -17120,20 +16588,11 @@ __ai uint32x2_t vorr_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 17120 | } | 16588 | } |
| 17121 | #endif | 16589 | #endif |
| 17122 | | 16590 | |
| 17123 | #ifdef __LITTLE_ENDIAN__ | | |
| 17124 | __ai uint64x1_t vorr_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 17125 | uint64x1_t __ret; | | |
| 17126 | __ret = __p0 | __p1; | | |
| 17127 | return __ret; | | |
| 17128 | } | | |
| 17129 | #else | | |
| 17130 | __ai uint64x1_t vorr_u64(uint64x1_t __p0, uint64x1_t __p1) { | 16591 | __ai uint64x1_t vorr_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 17131 | uint64x1_t __ret; | 16592 | uint64x1_t __ret; |
| 17132 | __ret = __p0 | __p1; | 16593 | __ret = __p0 | __p1; |
| 17133 | return __ret; | 16594 | return __ret; |
| 17134 | } | 16595 | } |
| 17135 | #endif | | |
| 17136 | | | |
| 17137 | #ifdef __LITTLE_ENDIAN__ | 16596 | #ifdef __LITTLE_ENDIAN__ |
| 17138 | __ai uint16x4_t vorr_u16(uint16x4_t __p0, uint16x4_t __p1) { | 16597 | __ai uint16x4_t vorr_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 17139 | uint16x4_t __ret; | 16598 | uint16x4_t __ret; |
| ... | @@ -17185,20 +16644,11 @@ __ai int32x2_t vorr_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -17185,20 +16644,11 @@ __ai int32x2_t vorr_s32(int32x2_t __p0, int32x2_t __p1) { |
| 17185 | } | 16644 | } |
| 17186 | #endif | 16645 | #endif |
| 17187 | | 16646 | |
| 17188 | #ifdef __LITTLE_ENDIAN__ | | |
| 17189 | __ai int64x1_t vorr_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 17190 | int64x1_t __ret; | | |
| 17191 | __ret = __p0 | __p1; | | |
| 17192 | return __ret; | | |
| 17193 | } | | |
| 17194 | #else | | |
| 17195 | __ai int64x1_t vorr_s64(int64x1_t __p0, int64x1_t __p1) { | 16647 | __ai int64x1_t vorr_s64(int64x1_t __p0, int64x1_t __p1) { |
| 17196 | int64x1_t __ret; | 16648 | int64x1_t __ret; |
| 17197 | __ret = __p0 | __p1; | 16649 | __ret = __p0 | __p1; |
| 17198 | return __ret; | 16650 | return __ret; |
| 17199 | } | 16651 | } |
| 17200 | #endif | | |
| 17201 | | | |
| 17202 | #ifdef __LITTLE_ENDIAN__ | 16652 | #ifdef __LITTLE_ENDIAN__ |
| 17203 | __ai int16x4_t vorr_s16(int16x4_t __p0, int16x4_t __p1) { | 16653 | __ai int16x4_t vorr_s16(int16x4_t __p0, int16x4_t __p1) { |
| 17204 | int16x4_t __ret; | 16654 | int16x4_t __ret; |
| ... | @@ -18239,20 +17689,11 @@ __ai uint32x2_t vqadd_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -18239,20 +17689,11 @@ __ai uint32x2_t vqadd_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 18239 | } | 17689 | } |
| 18240 | #endif | 17690 | #endif |
| 18241 | | 17691 | |
| 18242 | #ifdef __LITTLE_ENDIAN__ | | |
| 18243 | __ai uint64x1_t vqadd_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 18244 | uint64x1_t __ret; | | |
| 18245 | __ret = (uint64x1_t) __builtin_neon_vqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 18246 | return __ret; | | |
| 18247 | } | | |
| 18248 | #else | | |
| 18249 | __ai uint64x1_t vqadd_u64(uint64x1_t __p0, uint64x1_t __p1) { | 17692 | __ai uint64x1_t vqadd_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 18250 | uint64x1_t __ret; | 17693 | uint64x1_t __ret; |
| 18251 | __ret = (uint64x1_t) __builtin_neon_vqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 17694 | __ret = (uint64x1_t) __builtin_neon_vqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 18252 | return __ret; | 17695 | return __ret; |
| 18253 | } | 17696 | } |
| 18254 | #endif | | |
| 18255 | | | |
| 18256 | #ifdef __LITTLE_ENDIAN__ | 17697 | #ifdef __LITTLE_ENDIAN__ |
| 18257 | __ai uint16x4_t vqadd_u16(uint16x4_t __p0, uint16x4_t __p1) { | 17698 | __ai uint16x4_t vqadd_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 18258 | uint16x4_t __ret; | 17699 | uint16x4_t __ret; |
| ... | @@ -18309,20 +17750,11 @@ __ai int32x2_t __noswap_vqadd_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -18309,20 +17750,11 @@ __ai int32x2_t __noswap_vqadd_s32(int32x2_t __p0, int32x2_t __p1) { |
| 18309 | } | 17750 | } |
| 18310 | #endif | 17751 | #endif |
| 18311 | | 17752 | |
| 18312 | #ifdef __LITTLE_ENDIAN__ | | |
| 18313 | __ai int64x1_t vqadd_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 18314 | int64x1_t __ret; | | |
| 18315 | __ret = (int64x1_t) __builtin_neon_vqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | | |
| 18316 | return __ret; | | |
| 18317 | } | | |
| 18318 | #else | | |
| 18319 | __ai int64x1_t vqadd_s64(int64x1_t __p0, int64x1_t __p1) { | 17753 | __ai int64x1_t vqadd_s64(int64x1_t __p0, int64x1_t __p1) { |
| 18320 | int64x1_t __ret; | 17754 | int64x1_t __ret; |
| 18321 | __ret = (int64x1_t) __builtin_neon_vqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | 17755 | __ret = (int64x1_t) __builtin_neon_vqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 3); |
| 18322 | return __ret; | 17756 | return __ret; |
| 18323 | } | 17757 | } |
| 18324 | #endif | | |
| 18325 | | | |
| 18326 | #ifdef __LITTLE_ENDIAN__ | 17758 | #ifdef __LITTLE_ENDIAN__ |
| 18327 | __ai int16x4_t vqadd_s16(int16x4_t __p0, int16x4_t __p1) { | 17759 | __ai int16x4_t vqadd_s16(int16x4_t __p0, int16x4_t __p1) { |
| 18328 | int16x4_t __ret; | 17760 | int16x4_t __ret; |
| ... | @@ -18442,7 +17874,7 @@ __ai int32x4_t __noswap_vqdmlal_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __ | ... | @@ -18442,7 +17874,7 @@ __ai int32x4_t __noswap_vqdmlal_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __ |
| 18442 | #ifdef __LITTLE_ENDIAN__ | 17874 | #ifdef __LITTLE_ENDIAN__ |
| 18443 | __ai int64x2_t vqdmlal_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { | 17875 | __ai int64x2_t vqdmlal_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { |
| 18444 | int64x2_t __ret; | 17876 | int64x2_t __ret; |
| 18445 | __ret = (int64x2_t) __builtin_neon_vqdmlal_v((int8x16_t)__p0, (int8x8_t)__p1, (int8x8_t)(int32x2_t) {__p2, __p2}, 35); | 17877 | __ret = vqdmlal_s32(__p0, __p1, (int32x2_t) {__p2, __p2}); |
| 18446 | return __ret; | 17878 | return __ret; |
| 18447 | } | 17879 | } |
| 18448 | #else | 17880 | #else |
| ... | @@ -18450,13 +17882,13 @@ __ai int64x2_t vqdmlal_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { | ... | @@ -18450,13 +17882,13 @@ __ai int64x2_t vqdmlal_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { |
| 18450 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 17882 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 18451 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 17883 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 18452 | int64x2_t __ret; | 17884 | int64x2_t __ret; |
| 18453 | __ret = (int64x2_t) __builtin_neon_vqdmlal_v((int8x16_t)__rev0, (int8x8_t)__rev1, (int8x8_t)(int32x2_t) {__p2, __p2}, 35); | 17885 | __ret = __noswap_vqdmlal_s32(__rev0, __rev1, (int32x2_t) {__p2, __p2}); |
| 18454 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 17886 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 18455 | return __ret; | 17887 | return __ret; |
| 18456 | } | 17888 | } |
| 18457 | __ai int64x2_t __noswap_vqdmlal_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { | 17889 | __ai int64x2_t __noswap_vqdmlal_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { |
| 18458 | int64x2_t __ret; | 17890 | int64x2_t __ret; |
| 18459 | __ret = (int64x2_t) __builtin_neon_vqdmlal_v((int8x16_t)__p0, (int8x8_t)__p1, (int8x8_t)(int32x2_t) {__p2, __p2}, 35); | 17891 | __ret = __noswap_vqdmlal_s32(__p0, __p1, (int32x2_t) {__p2, __p2}); |
| 18460 | return __ret; | 17892 | return __ret; |
| 18461 | } | 17893 | } |
| 18462 | #endif | 17894 | #endif |
| ... | @@ -18464,7 +17896,7 @@ __ai int64x2_t __noswap_vqdmlal_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __ | ... | @@ -18464,7 +17896,7 @@ __ai int64x2_t __noswap_vqdmlal_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __ |
| 18464 | #ifdef __LITTLE_ENDIAN__ | 17896 | #ifdef __LITTLE_ENDIAN__ |
| 18465 | __ai int32x4_t vqdmlal_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { | 17897 | __ai int32x4_t vqdmlal_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { |
| 18466 | int32x4_t __ret; | 17898 | int32x4_t __ret; |
| 18467 | __ret = (int32x4_t) __builtin_neon_vqdmlal_v((int8x16_t)__p0, (int8x8_t)__p1, (int8x8_t)(int16x4_t) {__p2, __p2, __p2, __p2}, 34); | 17899 | __ret = vqdmlal_s16(__p0, __p1, (int16x4_t) {__p2, __p2, __p2, __p2}); |
| 18468 | return __ret; | 17900 | return __ret; |
| 18469 | } | 17901 | } |
| 18470 | #else | 17902 | #else |
| ... | @@ -18472,13 +17904,13 @@ __ai int32x4_t vqdmlal_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { | ... | @@ -18472,13 +17904,13 @@ __ai int32x4_t vqdmlal_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { |
| 18472 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 17904 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 18473 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 17905 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 18474 | int32x4_t __ret; | 17906 | int32x4_t __ret; |
| 18475 | __ret = (int32x4_t) __builtin_neon_vqdmlal_v((int8x16_t)__rev0, (int8x8_t)__rev1, (int8x8_t)(int16x4_t) {__p2, __p2, __p2, __p2}, 34); | 17907 | __ret = __noswap_vqdmlal_s16(__rev0, __rev1, (int16x4_t) {__p2, __p2, __p2, __p2}); |
| 18476 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 17908 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 18477 | return __ret; | 17909 | return __ret; |
| 18478 | } | 17910 | } |
| 18479 | __ai int32x4_t __noswap_vqdmlal_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { | 17911 | __ai int32x4_t __noswap_vqdmlal_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { |
| 18480 | int32x4_t __ret; | 17912 | int32x4_t __ret; |
| 18481 | __ret = (int32x4_t) __builtin_neon_vqdmlal_v((int8x16_t)__p0, (int8x8_t)__p1, (int8x8_t)(int16x4_t) {__p2, __p2, __p2, __p2}, 34); | 17913 | __ret = __noswap_vqdmlal_s16(__p0, __p1, (int16x4_t) {__p2, __p2, __p2, __p2}); |
| 18482 | return __ret; | 17914 | return __ret; |
| 18483 | } | 17915 | } |
| 18484 | #endif | 17916 | #endif |
| ... | @@ -18580,7 +18012,7 @@ __ai int32x4_t __noswap_vqdmlsl_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __ | ... | @@ -18580,7 +18012,7 @@ __ai int32x4_t __noswap_vqdmlsl_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __ |
| 18580 | #ifdef __LITTLE_ENDIAN__ | 18012 | #ifdef __LITTLE_ENDIAN__ |
| 18581 | __ai int64x2_t vqdmlsl_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { | 18013 | __ai int64x2_t vqdmlsl_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { |
| 18582 | int64x2_t __ret; | 18014 | int64x2_t __ret; |
| 18583 | __ret = (int64x2_t) __builtin_neon_vqdmlsl_v((int8x16_t)__p0, (int8x8_t)__p1, (int8x8_t)(int32x2_t) {__p2, __p2}, 35); | 18015 | __ret = vqdmlsl_s32(__p0, __p1, (int32x2_t) {__p2, __p2}); |
| 18584 | return __ret; | 18016 | return __ret; |
| 18585 | } | 18017 | } |
| 18586 | #else | 18018 | #else |
| ... | @@ -18588,13 +18020,13 @@ __ai int64x2_t vqdmlsl_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { | ... | @@ -18588,13 +18020,13 @@ __ai int64x2_t vqdmlsl_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { |
| 18588 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 18020 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 18589 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 18021 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 18590 | int64x2_t __ret; | 18022 | int64x2_t __ret; |
| 18591 | __ret = (int64x2_t) __builtin_neon_vqdmlsl_v((int8x16_t)__rev0, (int8x8_t)__rev1, (int8x8_t)(int32x2_t) {__p2, __p2}, 35); | 18023 | __ret = __noswap_vqdmlsl_s32(__rev0, __rev1, (int32x2_t) {__p2, __p2}); |
| 18592 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 18024 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 18593 | return __ret; | 18025 | return __ret; |
| 18594 | } | 18026 | } |
| 18595 | __ai int64x2_t __noswap_vqdmlsl_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { | 18027 | __ai int64x2_t __noswap_vqdmlsl_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __p2) { |
| 18596 | int64x2_t __ret; | 18028 | int64x2_t __ret; |
| 18597 | __ret = (int64x2_t) __builtin_neon_vqdmlsl_v((int8x16_t)__p0, (int8x8_t)__p1, (int8x8_t)(int32x2_t) {__p2, __p2}, 35); | 18029 | __ret = __noswap_vqdmlsl_s32(__p0, __p1, (int32x2_t) {__p2, __p2}); |
| 18598 | return __ret; | 18030 | return __ret; |
| 18599 | } | 18031 | } |
| 18600 | #endif | 18032 | #endif |
| ... | @@ -18602,7 +18034,7 @@ __ai int64x2_t __noswap_vqdmlsl_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __ | ... | @@ -18602,7 +18034,7 @@ __ai int64x2_t __noswap_vqdmlsl_n_s32(int64x2_t __p0, int32x2_t __p1, int32_t __ |
| 18602 | #ifdef __LITTLE_ENDIAN__ | 18034 | #ifdef __LITTLE_ENDIAN__ |
| 18603 | __ai int32x4_t vqdmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { | 18035 | __ai int32x4_t vqdmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { |
| 18604 | int32x4_t __ret; | 18036 | int32x4_t __ret; |
| 18605 | __ret = (int32x4_t) __builtin_neon_vqdmlsl_v((int8x16_t)__p0, (int8x8_t)__p1, (int8x8_t)(int16x4_t) {__p2, __p2, __p2, __p2}, 34); | 18037 | __ret = vqdmlsl_s16(__p0, __p1, (int16x4_t) {__p2, __p2, __p2, __p2}); |
| 18606 | return __ret; | 18038 | return __ret; |
| 18607 | } | 18039 | } |
| 18608 | #else | 18040 | #else |
| ... | @@ -18610,13 +18042,13 @@ __ai int32x4_t vqdmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { | ... | @@ -18610,13 +18042,13 @@ __ai int32x4_t vqdmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { |
| 18610 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 18042 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 18611 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); | 18043 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 18612 | int32x4_t __ret; | 18044 | int32x4_t __ret; |
| 18613 | __ret = (int32x4_t) __builtin_neon_vqdmlsl_v((int8x16_t)__rev0, (int8x8_t)__rev1, (int8x8_t)(int16x4_t) {__p2, __p2, __p2, __p2}, 34); | 18045 | __ret = __noswap_vqdmlsl_s16(__rev0, __rev1, (int16x4_t) {__p2, __p2, __p2, __p2}); |
| 18614 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 18046 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 18615 | return __ret; | 18047 | return __ret; |
| 18616 | } | 18048 | } |
| 18617 | __ai int32x4_t __noswap_vqdmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { | 18049 | __ai int32x4_t __noswap_vqdmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2) { |
| 18618 | int32x4_t __ret; | 18050 | int32x4_t __ret; |
| 18619 | __ret = (int32x4_t) __builtin_neon_vqdmlsl_v((int8x16_t)__p0, (int8x8_t)__p1, (int8x8_t)(int16x4_t) {__p2, __p2, __p2, __p2}, 34); | 18051 | __ret = __noswap_vqdmlsl_s16(__p0, __p1, (int16x4_t) {__p2, __p2, __p2, __p2}); |
| 18620 | return __ret; | 18052 | return __ret; |
| 18621 | } | 18053 | } |
| 18622 | #endif | 18054 | #endif |
| ... | @@ -18796,14 +18228,14 @@ __ai int16x4_t __noswap_vqdmulh_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -18796,14 +18228,14 @@ __ai int16x4_t __noswap_vqdmulh_s16(int16x4_t __p0, int16x4_t __p1) { |
| 18796 | #ifdef __LITTLE_ENDIAN__ | 18228 | #ifdef __LITTLE_ENDIAN__ |
| 18797 | __ai int32x4_t vqdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { | 18229 | __ai int32x4_t vqdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { |
| 18798 | int32x4_t __ret; | 18230 | int32x4_t __ret; |
| 18799 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_v((int8x16_t)__p0, (int8x16_t)(int32x4_t) {__p1, __p1, __p1, __p1}, 34); | 18231 | __ret = vqdmulhq_s32(__p0, (int32x4_t) {__p1, __p1, __p1, __p1}); |
| 18800 | return __ret; | 18232 | return __ret; |
| 18801 | } | 18233 | } |
| 18802 | #else | 18234 | #else |
| 18803 | __ai int32x4_t vqdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { | 18235 | __ai int32x4_t vqdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { |
| 18804 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 18236 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 18805 | int32x4_t __ret; | 18237 | int32x4_t __ret; |
| 18806 | __ret = (int32x4_t) __builtin_neon_vqdmulhq_v((int8x16_t)__rev0, (int8x16_t)(int32x4_t) {__p1, __p1, __p1, __p1}, 34); | 18238 | __ret = __noswap_vqdmulhq_s32(__rev0, (int32x4_t) {__p1, __p1, __p1, __p1}); |
| 18807 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 18239 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 18808 | return __ret; | 18240 | return __ret; |
| 18809 | } | 18241 | } |
| ... | @@ -18812,14 +18244,14 @@ __ai int32x4_t vqdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { | ... | @@ -18812,14 +18244,14 @@ __ai int32x4_t vqdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { |
| 18812 | #ifdef __LITTLE_ENDIAN__ | 18244 | #ifdef __LITTLE_ENDIAN__ |
| 18813 | __ai int16x8_t vqdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { | 18245 | __ai int16x8_t vqdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { |
| 18814 | int16x8_t __ret; | 18246 | int16x8_t __ret; |
| 18815 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_v((int8x16_t)__p0, (int8x16_t)(int16x8_t) {__p1, __p1, __p1, __p1, __p1, __p1, __p1, __p1}, 33); | 18247 | __ret = vqdmulhq_s16(__p0, (int16x8_t) {__p1, __p1, __p1, __p1, __p1, __p1, __p1, __p1}); |
| 18816 | return __ret; | 18248 | return __ret; |
| 18817 | } | 18249 | } |
| 18818 | #else | 18250 | #else |
| 18819 | __ai int16x8_t vqdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { | 18251 | __ai int16x8_t vqdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { |
| 18820 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 18252 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 18821 | int16x8_t __ret; | 18253 | int16x8_t __ret; |
| 18822 | __ret = (int16x8_t) __builtin_neon_vqdmulhq_v((int8x16_t)__rev0, (int8x16_t)(int16x8_t) {__p1, __p1, __p1, __p1, __p1, __p1, __p1, __p1}, 33); | 18254 | __ret = __noswap_vqdmulhq_s16(__rev0, (int16x8_t) {__p1, __p1, __p1, __p1, __p1, __p1, __p1, __p1}); |
| 18823 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 18255 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 18824 | return __ret; | 18256 | return __ret; |
| 18825 | } | 18257 | } |
| ... | @@ -18828,14 +18260,14 @@ __ai int16x8_t vqdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { | ... | @@ -18828,14 +18260,14 @@ __ai int16x8_t vqdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { |
| 18828 | #ifdef __LITTLE_ENDIAN__ | 18260 | #ifdef __LITTLE_ENDIAN__ |
| 18829 | __ai int32x2_t vqdmulh_n_s32(int32x2_t __p0, int32_t __p1) { | 18261 | __ai int32x2_t vqdmulh_n_s32(int32x2_t __p0, int32_t __p1) { |
| 18830 | int32x2_t __ret; | 18262 | int32x2_t __ret; |
| 18831 | __ret = (int32x2_t) __builtin_neon_vqdmulh_v((int8x8_t)__p0, (int8x8_t)(int32x2_t) {__p1, __p1}, 2); | 18263 | __ret = vqdmulh_s32(__p0, (int32x2_t) {__p1, __p1}); |
| 18832 | return __ret; | 18264 | return __ret; |
| 18833 | } | 18265 | } |
| 18834 | #else | 18266 | #else |
| 18835 | __ai int32x2_t vqdmulh_n_s32(int32x2_t __p0, int32_t __p1) { | 18267 | __ai int32x2_t vqdmulh_n_s32(int32x2_t __p0, int32_t __p1) { |
| 18836 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 18268 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 18837 | int32x2_t __ret; | 18269 | int32x2_t __ret; |
| 18838 | __ret = (int32x2_t) __builtin_neon_vqdmulh_v((int8x8_t)__rev0, (int8x8_t)(int32x2_t) {__p1, __p1}, 2); | 18270 | __ret = __noswap_vqdmulh_s32(__rev0, (int32x2_t) {__p1, __p1}); |
| 18839 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 18271 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 18840 | return __ret; | 18272 | return __ret; |
| 18841 | } | 18273 | } |
| ... | @@ -18844,14 +18276,14 @@ __ai int32x2_t vqdmulh_n_s32(int32x2_t __p0, int32_t __p1) { | ... | @@ -18844,14 +18276,14 @@ __ai int32x2_t vqdmulh_n_s32(int32x2_t __p0, int32_t __p1) { |
| 18844 | #ifdef __LITTLE_ENDIAN__ | 18276 | #ifdef __LITTLE_ENDIAN__ |
| 18845 | __ai int16x4_t vqdmulh_n_s16(int16x4_t __p0, int16_t __p1) { | 18277 | __ai int16x4_t vqdmulh_n_s16(int16x4_t __p0, int16_t __p1) { |
| 18846 | int16x4_t __ret; | 18278 | int16x4_t __ret; |
| 18847 | __ret = (int16x4_t) __builtin_neon_vqdmulh_v((int8x8_t)__p0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 1); | 18279 | __ret = vqdmulh_s16(__p0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 18848 | return __ret; | 18280 | return __ret; |
| 18849 | } | 18281 | } |
| 18850 | #else | 18282 | #else |
| 18851 | __ai int16x4_t vqdmulh_n_s16(int16x4_t __p0, int16_t __p1) { | 18283 | __ai int16x4_t vqdmulh_n_s16(int16x4_t __p0, int16_t __p1) { |
| 18852 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 18284 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 18853 | int16x4_t __ret; | 18285 | int16x4_t __ret; |
| 18854 | __ret = (int16x4_t) __builtin_neon_vqdmulh_v((int8x8_t)__rev0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 1); | 18286 | __ret = __noswap_vqdmulh_s16(__rev0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 18855 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 18287 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 18856 | return __ret; | 18288 | return __ret; |
| 18857 | } | 18289 | } |
| ... | @@ -18946,20 +18378,20 @@ __ai int32x4_t __noswap_vqdmull_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -18946,20 +18378,20 @@ __ai int32x4_t __noswap_vqdmull_s16(int16x4_t __p0, int16x4_t __p1) { |
| 18946 | #ifdef __LITTLE_ENDIAN__ | 18378 | #ifdef __LITTLE_ENDIAN__ |
| 18947 | __ai int64x2_t vqdmull_n_s32(int32x2_t __p0, int32_t __p1) { | 18379 | __ai int64x2_t vqdmull_n_s32(int32x2_t __p0, int32_t __p1) { |
| 18948 | int64x2_t __ret; | 18380 | int64x2_t __ret; |
| 18949 | __ret = (int64x2_t) __builtin_neon_vqdmull_v((int8x8_t)__p0, (int8x8_t)(int32x2_t) {__p1, __p1}, 35); | 18381 | __ret = vqdmull_s32(__p0, (int32x2_t) {__p1, __p1}); |
| 18950 | return __ret; | 18382 | return __ret; |
| 18951 | } | 18383 | } |
| 18952 | #else | 18384 | #else |
| 18953 | __ai int64x2_t vqdmull_n_s32(int32x2_t __p0, int32_t __p1) { | 18385 | __ai int64x2_t vqdmull_n_s32(int32x2_t __p0, int32_t __p1) { |
| 18954 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 18386 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 18955 | int64x2_t __ret; | 18387 | int64x2_t __ret; |
| 18956 | __ret = (int64x2_t) __builtin_neon_vqdmull_v((int8x8_t)__rev0, (int8x8_t)(int32x2_t) {__p1, __p1}, 35); | 18388 | __ret = __noswap_vqdmull_s32(__rev0, (int32x2_t) {__p1, __p1}); |
| 18957 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 18389 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 18958 | return __ret; | 18390 | return __ret; |
| 18959 | } | 18391 | } |
| 18960 | __ai int64x2_t __noswap_vqdmull_n_s32(int32x2_t __p0, int32_t __p1) { | 18392 | __ai int64x2_t __noswap_vqdmull_n_s32(int32x2_t __p0, int32_t __p1) { |
| 18961 | int64x2_t __ret; | 18393 | int64x2_t __ret; |
| 18962 | __ret = (int64x2_t) __builtin_neon_vqdmull_v((int8x8_t)__p0, (int8x8_t)(int32x2_t) {__p1, __p1}, 35); | 18394 | __ret = __noswap_vqdmull_s32(__p0, (int32x2_t) {__p1, __p1}); |
| 18963 | return __ret; | 18395 | return __ret; |
| 18964 | } | 18396 | } |
| 18965 | #endif | 18397 | #endif |
| ... | @@ -18967,20 +18399,20 @@ __ai int64x2_t __noswap_vqdmull_n_s32(int32x2_t __p0, int32_t __p1) { | ... | @@ -18967,20 +18399,20 @@ __ai int64x2_t __noswap_vqdmull_n_s32(int32x2_t __p0, int32_t __p1) { |
| 18967 | #ifdef __LITTLE_ENDIAN__ | 18399 | #ifdef __LITTLE_ENDIAN__ |
| 18968 | __ai int32x4_t vqdmull_n_s16(int16x4_t __p0, int16_t __p1) { | 18400 | __ai int32x4_t vqdmull_n_s16(int16x4_t __p0, int16_t __p1) { |
| 18969 | int32x4_t __ret; | 18401 | int32x4_t __ret; |
| 18970 | __ret = (int32x4_t) __builtin_neon_vqdmull_v((int8x8_t)__p0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 34); | 18402 | __ret = vqdmull_s16(__p0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 18971 | return __ret; | 18403 | return __ret; |
| 18972 | } | 18404 | } |
| 18973 | #else | 18405 | #else |
| 18974 | __ai int32x4_t vqdmull_n_s16(int16x4_t __p0, int16_t __p1) { | 18406 | __ai int32x4_t vqdmull_n_s16(int16x4_t __p0, int16_t __p1) { |
| 18975 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 18407 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 18976 | int32x4_t __ret; | 18408 | int32x4_t __ret; |
| 18977 | __ret = (int32x4_t) __builtin_neon_vqdmull_v((int8x8_t)__rev0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 34); | 18409 | __ret = __noswap_vqdmull_s16(__rev0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 18978 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 18410 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 18979 | return __ret; | 18411 | return __ret; |
| 18980 | } | 18412 | } |
| 18981 | __ai int32x4_t __noswap_vqdmull_n_s16(int16x4_t __p0, int16_t __p1) { | 18413 | __ai int32x4_t __noswap_vqdmull_n_s16(int16x4_t __p0, int16_t __p1) { |
| 18982 | int32x4_t __ret; | 18414 | int32x4_t __ret; |
| 18983 | __ret = (int32x4_t) __builtin_neon_vqdmull_v((int8x8_t)__p0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 34); | 18415 | __ret = __noswap_vqdmull_s16(__p0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 18984 | return __ret; | 18416 | return __ret; |
| 18985 | } | 18417 | } |
| 18986 | #endif | 18418 | #endif |
| ... | @@ -19445,14 +18877,14 @@ __ai int16x4_t __noswap_vqrdmulh_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -19445,14 +18877,14 @@ __ai int16x4_t __noswap_vqrdmulh_s16(int16x4_t __p0, int16x4_t __p1) { |
| 19445 | #ifdef __LITTLE_ENDIAN__ | 18877 | #ifdef __LITTLE_ENDIAN__ |
| 19446 | __ai int32x4_t vqrdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { | 18878 | __ai int32x4_t vqrdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { |
| 19447 | int32x4_t __ret; | 18879 | int32x4_t __ret; |
| 19448 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_v((int8x16_t)__p0, (int8x16_t)(int32x4_t) {__p1, __p1, __p1, __p1}, 34); | 18880 | __ret = vqrdmulhq_s32(__p0, (int32x4_t) {__p1, __p1, __p1, __p1}); |
| 19449 | return __ret; | 18881 | return __ret; |
| 19450 | } | 18882 | } |
| 19451 | #else | 18883 | #else |
| 19452 | __ai int32x4_t vqrdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { | 18884 | __ai int32x4_t vqrdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { |
| 19453 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 18885 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 19454 | int32x4_t __ret; | 18886 | int32x4_t __ret; |
| 19455 | __ret = (int32x4_t) __builtin_neon_vqrdmulhq_v((int8x16_t)__rev0, (int8x16_t)(int32x4_t) {__p1, __p1, __p1, __p1}, 34); | 18887 | __ret = __noswap_vqrdmulhq_s32(__rev0, (int32x4_t) {__p1, __p1, __p1, __p1}); |
| 19456 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 18888 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 19457 | return __ret; | 18889 | return __ret; |
| 19458 | } | 18890 | } |
| ... | @@ -19461,14 +18893,14 @@ __ai int32x4_t vqrdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { | ... | @@ -19461,14 +18893,14 @@ __ai int32x4_t vqrdmulhq_n_s32(int32x4_t __p0, int32_t __p1) { |
| 19461 | #ifdef __LITTLE_ENDIAN__ | 18893 | #ifdef __LITTLE_ENDIAN__ |
| 19462 | __ai int16x8_t vqrdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { | 18894 | __ai int16x8_t vqrdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { |
| 19463 | int16x8_t __ret; | 18895 | int16x8_t __ret; |
| 19464 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_v((int8x16_t)__p0, (int8x16_t)(int16x8_t) {__p1, __p1, __p1, __p1, __p1, __p1, __p1, __p1}, 33); | 18896 | __ret = vqrdmulhq_s16(__p0, (int16x8_t) {__p1, __p1, __p1, __p1, __p1, __p1, __p1, __p1}); |
| 19465 | return __ret; | 18897 | return __ret; |
| 19466 | } | 18898 | } |
| 19467 | #else | 18899 | #else |
| 19468 | __ai int16x8_t vqrdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { | 18900 | __ai int16x8_t vqrdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { |
| 19469 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 18901 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 19470 | int16x8_t __ret; | 18902 | int16x8_t __ret; |
| 19471 | __ret = (int16x8_t) __builtin_neon_vqrdmulhq_v((int8x16_t)__rev0, (int8x16_t)(int16x8_t) {__p1, __p1, __p1, __p1, __p1, __p1, __p1, __p1}, 33); | 18903 | __ret = __noswap_vqrdmulhq_s16(__rev0, (int16x8_t) {__p1, __p1, __p1, __p1, __p1, __p1, __p1, __p1}); |
| 19472 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); | 18904 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 19473 | return __ret; | 18905 | return __ret; |
| 19474 | } | 18906 | } |
| ... | @@ -19477,14 +18909,14 @@ __ai int16x8_t vqrdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { | ... | @@ -19477,14 +18909,14 @@ __ai int16x8_t vqrdmulhq_n_s16(int16x8_t __p0, int16_t __p1) { |
| 19477 | #ifdef __LITTLE_ENDIAN__ | 18909 | #ifdef __LITTLE_ENDIAN__ |
| 19478 | __ai int32x2_t vqrdmulh_n_s32(int32x2_t __p0, int32_t __p1) { | 18910 | __ai int32x2_t vqrdmulh_n_s32(int32x2_t __p0, int32_t __p1) { |
| 19479 | int32x2_t __ret; | 18911 | int32x2_t __ret; |
| 19480 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_v((int8x8_t)__p0, (int8x8_t)(int32x2_t) {__p1, __p1}, 2); | 18912 | __ret = vqrdmulh_s32(__p0, (int32x2_t) {__p1, __p1}); |
| 19481 | return __ret; | 18913 | return __ret; |
| 19482 | } | 18914 | } |
| 19483 | #else | 18915 | #else |
| 19484 | __ai int32x2_t vqrdmulh_n_s32(int32x2_t __p0, int32_t __p1) { | 18916 | __ai int32x2_t vqrdmulh_n_s32(int32x2_t __p0, int32_t __p1) { |
| 19485 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 18917 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 19486 | int32x2_t __ret; | 18918 | int32x2_t __ret; |
| 19487 | __ret = (int32x2_t) __builtin_neon_vqrdmulh_v((int8x8_t)__rev0, (int8x8_t)(int32x2_t) {__p1, __p1}, 2); | 18919 | __ret = __noswap_vqrdmulh_s32(__rev0, (int32x2_t) {__p1, __p1}); |
| 19488 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); | 18920 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 19489 | return __ret; | 18921 | return __ret; |
| 19490 | } | 18922 | } |
| ... | @@ -19493,14 +18925,14 @@ __ai int32x2_t vqrdmulh_n_s32(int32x2_t __p0, int32_t __p1) { | ... | @@ -19493,14 +18925,14 @@ __ai int32x2_t vqrdmulh_n_s32(int32x2_t __p0, int32_t __p1) { |
| 19493 | #ifdef __LITTLE_ENDIAN__ | 18925 | #ifdef __LITTLE_ENDIAN__ |
| 19494 | __ai int16x4_t vqrdmulh_n_s16(int16x4_t __p0, int16_t __p1) { | 18926 | __ai int16x4_t vqrdmulh_n_s16(int16x4_t __p0, int16_t __p1) { |
| 19495 | int16x4_t __ret; | 18927 | int16x4_t __ret; |
| 19496 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_v((int8x8_t)__p0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 1); | 18928 | __ret = vqrdmulh_s16(__p0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 19497 | return __ret; | 18929 | return __ret; |
| 19498 | } | 18930 | } |
| 19499 | #else | 18931 | #else |
| 19500 | __ai int16x4_t vqrdmulh_n_s16(int16x4_t __p0, int16_t __p1) { | 18932 | __ai int16x4_t vqrdmulh_n_s16(int16x4_t __p0, int16_t __p1) { |
| 19501 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 18933 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 19502 | int16x4_t __ret; | 18934 | int16x4_t __ret; |
| 19503 | __ret = (int16x4_t) __builtin_neon_vqrdmulh_v((int8x8_t)__rev0, (int8x8_t)(int16x4_t) {__p1, __p1, __p1, __p1}, 1); | 18935 | __ret = __noswap_vqrdmulh_s16(__rev0, (int16x4_t) {__p1, __p1, __p1, __p1}); |
| 19504 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 18936 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 19505 | return __ret; | 18937 | return __ret; |
| 19506 | } | 18938 | } |
| ... | @@ -19676,20 +19108,11 @@ __ai uint32x2_t vqrshl_u32(uint32x2_t __p0, int32x2_t __p1) { | ... | @@ -19676,20 +19108,11 @@ __ai uint32x2_t vqrshl_u32(uint32x2_t __p0, int32x2_t __p1) { |
| 19676 | } | 19108 | } |
| 19677 | #endif | 19109 | #endif |
| 19678 | | 19110 | |
| 19679 | #ifdef __LITTLE_ENDIAN__ | | |
| 19680 | __ai uint64x1_t vqrshl_u64(uint64x1_t __p0, int64x1_t __p1) { | 19111 | __ai uint64x1_t vqrshl_u64(uint64x1_t __p0, int64x1_t __p1) { |
| 19681 | uint64x1_t __ret; | 19112 | uint64x1_t __ret; |
| 19682 | __ret = (uint64x1_t) __builtin_neon_vqrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 19113 | __ret = (uint64x1_t) __builtin_neon_vqrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 19683 | return __ret; | 19114 | return __ret; |
| 19684 | } | 19115 | } |
| 19685 | #else | | |
| 19686 | __ai uint64x1_t vqrshl_u64(uint64x1_t __p0, int64x1_t __p1) { | | |
| 19687 | uint64x1_t __ret; | | |
| 19688 | __ret = (uint64x1_t) __builtin_neon_vqrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 19689 | return __ret; | | |
| 19690 | } | | |
| 19691 | #endif | | |
| 19692 | | | |
| 19693 | #ifdef __LITTLE_ENDIAN__ | 19116 | #ifdef __LITTLE_ENDIAN__ |
| 19694 | __ai uint16x4_t vqrshl_u16(uint16x4_t __p0, int16x4_t __p1) { | 19117 | __ai uint16x4_t vqrshl_u16(uint16x4_t __p0, int16x4_t __p1) { |
| 19695 | uint16x4_t __ret; | 19118 | uint16x4_t __ret; |
| ... | @@ -19741,20 +19164,11 @@ __ai int32x2_t vqrshl_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -19741,20 +19164,11 @@ __ai int32x2_t vqrshl_s32(int32x2_t __p0, int32x2_t __p1) { |
| 19741 | } | 19164 | } |
| 19742 | #endif | 19165 | #endif |
| 19743 | | 19166 | |
| 19744 | #ifdef __LITTLE_ENDIAN__ | | |
| 19745 | __ai int64x1_t vqrshl_s64(int64x1_t __p0, int64x1_t __p1) { | 19167 | __ai int64x1_t vqrshl_s64(int64x1_t __p0, int64x1_t __p1) { |
| 19746 | int64x1_t __ret; | 19168 | int64x1_t __ret; |
| 19747 | __ret = (int64x1_t) __builtin_neon_vqrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | 19169 | __ret = (int64x1_t) __builtin_neon_vqrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); |
| 19748 | return __ret; | 19170 | return __ret; |
| 19749 | } | 19171 | } |
| 19750 | #else | | |
| 19751 | __ai int64x1_t vqrshl_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 19752 | int64x1_t __ret; | | |
| 19753 | __ret = (int64x1_t) __builtin_neon_vqrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | | |
| 19754 | return __ret; | | |
| 19755 | } | | |
| 19756 | #endif | | |
| 19757 | | | |
| 19758 | #ifdef __LITTLE_ENDIAN__ | 19172 | #ifdef __LITTLE_ENDIAN__ |
| 19759 | __ai int16x4_t vqrshl_s16(int16x4_t __p0, int16x4_t __p1) { | 19173 | __ai int16x4_t vqrshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 19760 | int16x4_t __ret; | 19174 | int16x4_t __ret; |
| ... | @@ -20158,20 +19572,11 @@ __ai uint32x2_t vqshl_u32(uint32x2_t __p0, int32x2_t __p1) { | ... | @@ -20158,20 +19572,11 @@ __ai uint32x2_t vqshl_u32(uint32x2_t __p0, int32x2_t __p1) { |
| 20158 | } | 19572 | } |
| 20159 | #endif | 19573 | #endif |
| 20160 | | 19574 | |
| 20161 | #ifdef __LITTLE_ENDIAN__ | | |
| 20162 | __ai uint64x1_t vqshl_u64(uint64x1_t __p0, int64x1_t __p1) { | 19575 | __ai uint64x1_t vqshl_u64(uint64x1_t __p0, int64x1_t __p1) { |
| 20163 | uint64x1_t __ret; | 19576 | uint64x1_t __ret; |
| 20164 | __ret = (uint64x1_t) __builtin_neon_vqshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 19577 | __ret = (uint64x1_t) __builtin_neon_vqshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 20165 | return __ret; | 19578 | return __ret; |
| 20166 | } | 19579 | } |
| 20167 | #else | | |
| 20168 | __ai uint64x1_t vqshl_u64(uint64x1_t __p0, int64x1_t __p1) { | | |
| 20169 | uint64x1_t __ret; | | |
| 20170 | __ret = (uint64x1_t) __builtin_neon_vqshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 20171 | return __ret; | | |
| 20172 | } | | |
| 20173 | #endif | | |
| 20174 | | | |
| 20175 | #ifdef __LITTLE_ENDIAN__ | 19580 | #ifdef __LITTLE_ENDIAN__ |
| 20176 | __ai uint16x4_t vqshl_u16(uint16x4_t __p0, int16x4_t __p1) { | 19581 | __ai uint16x4_t vqshl_u16(uint16x4_t __p0, int16x4_t __p1) { |
| 20177 | uint16x4_t __ret; | 19582 | uint16x4_t __ret; |
| ... | @@ -20223,20 +19628,11 @@ __ai int32x2_t vqshl_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -20223,20 +19628,11 @@ __ai int32x2_t vqshl_s32(int32x2_t __p0, int32x2_t __p1) { |
| 20223 | } | 19628 | } |
| 20224 | #endif | 19629 | #endif |
| 20225 | | 19630 | |
| 20226 | #ifdef __LITTLE_ENDIAN__ | | |
| 20227 | __ai int64x1_t vqshl_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 20228 | int64x1_t __ret; | | |
| 20229 | __ret = (int64x1_t) __builtin_neon_vqshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | | |
| 20230 | return __ret; | | |
| 20231 | } | | |
| 20232 | #else | | |
| 20233 | __ai int64x1_t vqshl_s64(int64x1_t __p0, int64x1_t __p1) { | 19631 | __ai int64x1_t vqshl_s64(int64x1_t __p0, int64x1_t __p1) { |
| 20234 | int64x1_t __ret; | 19632 | int64x1_t __ret; |
| 20235 | __ret = (int64x1_t) __builtin_neon_vqshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | 19633 | __ret = (int64x1_t) __builtin_neon_vqshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); |
| 20236 | return __ret; | 19634 | return __ret; |
| 20237 | } | 19635 | } |
| 20238 | #endif | | |
| 20239 | | | |
| 20240 | #ifdef __LITTLE_ENDIAN__ | 19636 | #ifdef __LITTLE_ENDIAN__ |
| 20241 | __ai int16x4_t vqshl_s16(int16x4_t __p0, int16x4_t __p1) { | 19637 | __ai int16x4_t vqshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 20242 | int16x4_t __ret; | 19638 | int16x4_t __ret; |
| ... | @@ -20434,22 +19830,12 @@ __ai int16x4_t vqshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -20434,22 +19830,12 @@ __ai int16x4_t vqshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 20434 | }) | 19830 | }) |
| 20435 | #endif | 19831 | #endif |
| 20436 | | 19832 | |
| 20437 | #ifdef __LITTLE_ENDIAN__ | | |
| 20438 | #define vqshl_n_u64(__p0, __p1) __extension__ ({ \ | 19833 | #define vqshl_n_u64(__p0, __p1) __extension__ ({ \ |
| 20439 | uint64x1_t __s0 = __p0; \ | 19834 | uint64x1_t __s0 = __p0; \ |
| 20440 | uint64x1_t __ret; \ | 19835 | uint64x1_t __ret; \ |
| 20441 | __ret = (uint64x1_t) __builtin_neon_vqshl_n_v((int8x8_t)__s0, __p1, 19); \ | 19836 | __ret = (uint64x1_t) __builtin_neon_vqshl_n_v((int8x8_t)__s0, __p1, 19); \ |
| 20442 | __ret; \ | 19837 | __ret; \ |
| 20443 | }) | 19838 | }) |
| 20444 | #else | | |
| 20445 | #define vqshl_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 20446 | uint64x1_t __s0 = __p0; \ | | |
| 20447 | uint64x1_t __ret; \ | | |
| 20448 | __ret = (uint64x1_t) __builtin_neon_vqshl_n_v((int8x8_t)__s0, __p1, 19); \ | | |
| 20449 | __ret; \ | | |
| 20450 | }) | | |
| 20451 | #endif | | |
| 20452 | | | |
| 20453 | #ifdef __LITTLE_ENDIAN__ | 19839 | #ifdef __LITTLE_ENDIAN__ |
| 20454 | #define vqshl_n_u16(__p0, __p1) __extension__ ({ \ | 19840 | #define vqshl_n_u16(__p0, __p1) __extension__ ({ \ |
| 20455 | uint16x4_t __s0 = __p0; \ | 19841 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -20504,22 +19890,12 @@ __ai int16x4_t vqshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -20504,22 +19890,12 @@ __ai int16x4_t vqshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 20504 | }) | 19890 | }) |
| 20505 | #endif | 19891 | #endif |
| 20506 | | 19892 | |
| 20507 | #ifdef __LITTLE_ENDIAN__ | | |
| 20508 | #define vqshl_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 20509 | int64x1_t __s0 = __p0; \ | | |
| 20510 | int64x1_t __ret; \ | | |
| 20511 | __ret = (int64x1_t) __builtin_neon_vqshl_n_v((int8x8_t)__s0, __p1, 3); \ | | |
| 20512 | __ret; \ | | |
| 20513 | }) | | |
| 20514 | #else | | |
| 20515 | #define vqshl_n_s64(__p0, __p1) __extension__ ({ \ | 19893 | #define vqshl_n_s64(__p0, __p1) __extension__ ({ \ |
| 20516 | int64x1_t __s0 = __p0; \ | 19894 | int64x1_t __s0 = __p0; \ |
| 20517 | int64x1_t __ret; \ | 19895 | int64x1_t __ret; \ |
| 20518 | __ret = (int64x1_t) __builtin_neon_vqshl_n_v((int8x8_t)__s0, __p1, 3); \ | 19896 | __ret = (int64x1_t) __builtin_neon_vqshl_n_v((int8x8_t)__s0, __p1, 3); \ |
| 20519 | __ret; \ | 19897 | __ret; \ |
| 20520 | }) | 19898 | }) |
| 20521 | #endif | | |
| 20522 | | | |
| 20523 | #ifdef __LITTLE_ENDIAN__ | 19899 | #ifdef __LITTLE_ENDIAN__ |
| 20524 | #define vqshl_n_s16(__p0, __p1) __extension__ ({ \ | 19900 | #define vqshl_n_s16(__p0, __p1) __extension__ ({ \ |
| 20525 | int16x4_t __s0 = __p0; \ | 19901 | int16x4_t __s0 = __p0; \ |
| ... | @@ -20646,22 +20022,12 @@ __ai int16x4_t vqshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -20646,22 +20022,12 @@ __ai int16x4_t vqshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 20646 | }) | 20022 | }) |
| 20647 | #endif | 20023 | #endif |
| 20648 | | 20024 | |
| 20649 | #ifdef __LITTLE_ENDIAN__ | | |
| 20650 | #define vqshlu_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 20651 | int64x1_t __s0 = __p0; \ | | |
| 20652 | uint64x1_t __ret; \ | | |
| 20653 | __ret = (uint64x1_t) __builtin_neon_vqshlu_n_v((int8x8_t)__s0, __p1, 19); \ | | |
| 20654 | __ret; \ | | |
| 20655 | }) | | |
| 20656 | #else | | |
| 20657 | #define vqshlu_n_s64(__p0, __p1) __extension__ ({ \ | 20025 | #define vqshlu_n_s64(__p0, __p1) __extension__ ({ \ |
| 20658 | int64x1_t __s0 = __p0; \ | 20026 | int64x1_t __s0 = __p0; \ |
| 20659 | uint64x1_t __ret; \ | 20027 | uint64x1_t __ret; \ |
| 20660 | __ret = (uint64x1_t) __builtin_neon_vqshlu_n_v((int8x8_t)__s0, __p1, 19); \ | 20028 | __ret = (uint64x1_t) __builtin_neon_vqshlu_n_v((int8x8_t)__s0, __p1, 19); \ |
| 20661 | __ret; \ | 20029 | __ret; \ |
| 20662 | }) | 20030 | }) |
| 20663 | #endif | | |
| 20664 | | | |
| 20665 | #ifdef __LITTLE_ENDIAN__ | 20031 | #ifdef __LITTLE_ENDIAN__ |
| 20666 | #define vqshlu_n_s16(__p0, __p1) __extension__ ({ \ | 20032 | #define vqshlu_n_s16(__p0, __p1) __extension__ ({ \ |
| 20667 | int16x4_t __s0 = __p0; \ | 20033 | int16x4_t __s0 = __p0; \ |
| ... | @@ -21076,20 +20442,11 @@ __ai uint32x2_t vqsub_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -21076,20 +20442,11 @@ __ai uint32x2_t vqsub_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 21076 | } | 20442 | } |
| 21077 | #endif | 20443 | #endif |
| 21078 | | 20444 | |
| 21079 | #ifdef __LITTLE_ENDIAN__ | | |
| 21080 | __ai uint64x1_t vqsub_u64(uint64x1_t __p0, uint64x1_t __p1) { | 20445 | __ai uint64x1_t vqsub_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 21081 | uint64x1_t __ret; | 20446 | uint64x1_t __ret; |
| 21082 | __ret = (uint64x1_t) __builtin_neon_vqsub_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 20447 | __ret = (uint64x1_t) __builtin_neon_vqsub_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 21083 | return __ret; | 20448 | return __ret; |
| 21084 | } | 20449 | } |
| 21085 | #else | | |
| 21086 | __ai uint64x1_t vqsub_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 21087 | uint64x1_t __ret; | | |
| 21088 | __ret = (uint64x1_t) __builtin_neon_vqsub_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 21089 | return __ret; | | |
| 21090 | } | | |
| 21091 | #endif | | |
| 21092 | | | |
| 21093 | #ifdef __LITTLE_ENDIAN__ | 20450 | #ifdef __LITTLE_ENDIAN__ |
| 21094 | __ai uint16x4_t vqsub_u16(uint16x4_t __p0, uint16x4_t __p1) { | 20451 | __ai uint16x4_t vqsub_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 21095 | uint16x4_t __ret; | 20452 | uint16x4_t __ret; |
| ... | @@ -21146,20 +20503,11 @@ __ai int32x2_t __noswap_vqsub_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -21146,20 +20503,11 @@ __ai int32x2_t __noswap_vqsub_s32(int32x2_t __p0, int32x2_t __p1) { |
| 21146 | } | 20503 | } |
| 21147 | #endif | 20504 | #endif |
| 21148 | | 20505 | |
| 21149 | #ifdef __LITTLE_ENDIAN__ | | |
| 21150 | __ai int64x1_t vqsub_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 21151 | int64x1_t __ret; | | |
| 21152 | __ret = (int64x1_t) __builtin_neon_vqsub_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | | |
| 21153 | return __ret; | | |
| 21154 | } | | |
| 21155 | #else | | |
| 21156 | __ai int64x1_t vqsub_s64(int64x1_t __p0, int64x1_t __p1) { | 20506 | __ai int64x1_t vqsub_s64(int64x1_t __p0, int64x1_t __p1) { |
| 21157 | int64x1_t __ret; | 20507 | int64x1_t __ret; |
| 21158 | __ret = (int64x1_t) __builtin_neon_vqsub_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | 20508 | __ret = (int64x1_t) __builtin_neon_vqsub_v((int8x8_t)__p0, (int8x8_t)__p1, 3); |
| 21159 | return __ret; | 20509 | return __ret; |
| 21160 | } | 20510 | } |
| 21161 | #endif | | |
| 21162 | | | |
| 21163 | #ifdef __LITTLE_ENDIAN__ | 20511 | #ifdef __LITTLE_ENDIAN__ |
| 21164 | __ai int16x4_t vqsub_s16(int16x4_t __p0, int16x4_t __p1) { | 20512 | __ai int16x4_t vqsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 21165 | int16x4_t __ret; | 20513 | int16x4_t __ret; |
| ... | @@ -22362,20 +21710,11 @@ __ai uint32x2_t vrshl_u32(uint32x2_t __p0, int32x2_t __p1) { | ... | @@ -22362,20 +21710,11 @@ __ai uint32x2_t vrshl_u32(uint32x2_t __p0, int32x2_t __p1) { |
| 22362 | } | 21710 | } |
| 22363 | #endif | 21711 | #endif |
| 22364 | | 21712 | |
| 22365 | #ifdef __LITTLE_ENDIAN__ | | |
| 22366 | __ai uint64x1_t vrshl_u64(uint64x1_t __p0, int64x1_t __p1) { | 21713 | __ai uint64x1_t vrshl_u64(uint64x1_t __p0, int64x1_t __p1) { |
| 22367 | uint64x1_t __ret; | 21714 | uint64x1_t __ret; |
| 22368 | __ret = (uint64x1_t) __builtin_neon_vrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 21715 | __ret = (uint64x1_t) __builtin_neon_vrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 22369 | return __ret; | 21716 | return __ret; |
| 22370 | } | 21717 | } |
| 22371 | #else | | |
| 22372 | __ai uint64x1_t vrshl_u64(uint64x1_t __p0, int64x1_t __p1) { | | |
| 22373 | uint64x1_t __ret; | | |
| 22374 | __ret = (uint64x1_t) __builtin_neon_vrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 22375 | return __ret; | | |
| 22376 | } | | |
| 22377 | #endif | | |
| 22378 | | | |
| 22379 | #ifdef __LITTLE_ENDIAN__ | 21718 | #ifdef __LITTLE_ENDIAN__ |
| 22380 | __ai uint16x4_t vrshl_u16(uint16x4_t __p0, int16x4_t __p1) { | 21719 | __ai uint16x4_t vrshl_u16(uint16x4_t __p0, int16x4_t __p1) { |
| 22381 | uint16x4_t __ret; | 21720 | uint16x4_t __ret; |
| ... | @@ -22427,20 +21766,11 @@ __ai int32x2_t vrshl_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -22427,20 +21766,11 @@ __ai int32x2_t vrshl_s32(int32x2_t __p0, int32x2_t __p1) { |
| 22427 | } | 21766 | } |
| 22428 | #endif | 21767 | #endif |
| 22429 | | 21768 | |
| 22430 | #ifdef __LITTLE_ENDIAN__ | | |
| 22431 | __ai int64x1_t vrshl_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 22432 | int64x1_t __ret; | | |
| 22433 | __ret = (int64x1_t) __builtin_neon_vrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | | |
| 22434 | return __ret; | | |
| 22435 | } | | |
| 22436 | #else | | |
| 22437 | __ai int64x1_t vrshl_s64(int64x1_t __p0, int64x1_t __p1) { | 21769 | __ai int64x1_t vrshl_s64(int64x1_t __p0, int64x1_t __p1) { |
| 22438 | int64x1_t __ret; | 21770 | int64x1_t __ret; |
| 22439 | __ret = (int64x1_t) __builtin_neon_vrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | 21771 | __ret = (int64x1_t) __builtin_neon_vrshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); |
| 22440 | return __ret; | 21772 | return __ret; |
| 22441 | } | 21773 | } |
| 22442 | #endif | | |
| 22443 | | | |
| 22444 | #ifdef __LITTLE_ENDIAN__ | 21774 | #ifdef __LITTLE_ENDIAN__ |
| 22445 | __ai int16x4_t vrshl_s16(int16x4_t __p0, int16x4_t __p1) { | 21775 | __ai int16x4_t vrshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 22446 | int16x4_t __ret; | 21776 | int16x4_t __ret; |
| ... | @@ -22638,22 +21968,12 @@ __ai int16x4_t vrshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -22638,22 +21968,12 @@ __ai int16x4_t vrshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 22638 | }) | 21968 | }) |
| 22639 | #endif | 21969 | #endif |
| 22640 | | 21970 | |
| 22641 | #ifdef __LITTLE_ENDIAN__ | | |
| 22642 | #define vrshr_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 22643 | uint64x1_t __s0 = __p0; \ | | |
| 22644 | uint64x1_t __ret; \ | | |
| 22645 | __ret = (uint64x1_t) __builtin_neon_vrshr_n_v((int8x8_t)__s0, __p1, 19); \ | | |
| 22646 | __ret; \ | | |
| 22647 | }) | | |
| 22648 | #else | | |
| 22649 | #define vrshr_n_u64(__p0, __p1) __extension__ ({ \ | 21971 | #define vrshr_n_u64(__p0, __p1) __extension__ ({ \ |
| 22650 | uint64x1_t __s0 = __p0; \ | 21972 | uint64x1_t __s0 = __p0; \ |
| 22651 | uint64x1_t __ret; \ | 21973 | uint64x1_t __ret; \ |
| 22652 | __ret = (uint64x1_t) __builtin_neon_vrshr_n_v((int8x8_t)__s0, __p1, 19); \ | 21974 | __ret = (uint64x1_t) __builtin_neon_vrshr_n_v((int8x8_t)__s0, __p1, 19); \ |
| 22653 | __ret; \ | 21975 | __ret; \ |
| 22654 | }) | 21976 | }) |
| 22655 | #endif | | |
| 22656 | | | |
| 22657 | #ifdef __LITTLE_ENDIAN__ | 21977 | #ifdef __LITTLE_ENDIAN__ |
| 22658 | #define vrshr_n_u16(__p0, __p1) __extension__ ({ \ | 21978 | #define vrshr_n_u16(__p0, __p1) __extension__ ({ \ |
| 22659 | uint16x4_t __s0 = __p0; \ | 21979 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -22708,22 +22028,12 @@ __ai int16x4_t vrshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -22708,22 +22028,12 @@ __ai int16x4_t vrshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 22708 | }) | 22028 | }) |
| 22709 | #endif | 22029 | #endif |
| 22710 | | 22030 | |
| 22711 | #ifdef __LITTLE_ENDIAN__ | | |
| 22712 | #define vrshr_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 22713 | int64x1_t __s0 = __p0; \ | | |
| 22714 | int64x1_t __ret; \ | | |
| 22715 | __ret = (int64x1_t) __builtin_neon_vrshr_n_v((int8x8_t)__s0, __p1, 3); \ | | |
| 22716 | __ret; \ | | |
| 22717 | }) | | |
| 22718 | #else | | |
| 22719 | #define vrshr_n_s64(__p0, __p1) __extension__ ({ \ | 22031 | #define vrshr_n_s64(__p0, __p1) __extension__ ({ \ |
| 22720 | int64x1_t __s0 = __p0; \ | 22032 | int64x1_t __s0 = __p0; \ |
| 22721 | int64x1_t __ret; \ | 22033 | int64x1_t __ret; \ |
| 22722 | __ret = (int64x1_t) __builtin_neon_vrshr_n_v((int8x8_t)__s0, __p1, 3); \ | 22034 | __ret = (int64x1_t) __builtin_neon_vrshr_n_v((int8x8_t)__s0, __p1, 3); \ |
| 22723 | __ret; \ | 22035 | __ret; \ |
| 22724 | }) | 22036 | }) |
| 22725 | #endif | | |
| 22726 | | | |
| 22727 | #ifdef __LITTLE_ENDIAN__ | 22037 | #ifdef __LITTLE_ENDIAN__ |
| 22728 | #define vrshr_n_s16(__p0, __p1) __extension__ ({ \ | 22038 | #define vrshr_n_s16(__p0, __p1) __extension__ ({ \ |
| 22729 | int16x4_t __s0 = __p0; \ | 22039 | int16x4_t __s0 = __p0; \ |
| ... | @@ -23194,15 +22504,6 @@ __ai float32x2_t vrsqrts_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -23194,15 +22504,6 @@ __ai float32x2_t vrsqrts_f32(float32x2_t __p0, float32x2_t __p1) { |
| 23194 | }) | 22504 | }) |
| 23195 | #endif | 22505 | #endif |
| 23196 | | 22506 | |
| 23197 | #ifdef __LITTLE_ENDIAN__ | | |
| 23198 | #define vrsra_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 23199 | uint64x1_t __s0 = __p0; \ | | |
| 23200 | uint64x1_t __s1 = __p1; \ | | |
| 23201 | uint64x1_t __ret; \ | | |
| 23202 | __ret = (uint64x1_t) __builtin_neon_vrsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | | |
| 23203 | __ret; \ | | |
| 23204 | }) | | |
| 23205 | #else | | |
| 23206 | #define vrsra_n_u64(__p0, __p1, __p2) __extension__ ({ \ | 22507 | #define vrsra_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 23207 | uint64x1_t __s0 = __p0; \ | 22508 | uint64x1_t __s0 = __p0; \ |
| 23208 | uint64x1_t __s1 = __p1; \ | 22509 | uint64x1_t __s1 = __p1; \ |
| ... | @@ -23210,8 +22511,6 @@ __ai float32x2_t vrsqrts_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -23210,8 +22511,6 @@ __ai float32x2_t vrsqrts_f32(float32x2_t __p0, float32x2_t __p1) { |
| 23210 | __ret = (uint64x1_t) __builtin_neon_vrsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | 22511 | __ret = (uint64x1_t) __builtin_neon_vrsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ |
| 23211 | __ret; \ | 22512 | __ret; \ |
| 23212 | }) | 22513 | }) |
| 23213 | #endif | | |
| 23214 | | | |
| 23215 | #ifdef __LITTLE_ENDIAN__ | 22514 | #ifdef __LITTLE_ENDIAN__ |
| 23216 | #define vrsra_n_u16(__p0, __p1, __p2) __extension__ ({ \ | 22515 | #define vrsra_n_u16(__p0, __p1, __p2) __extension__ ({ \ |
| 23217 | uint16x4_t __s0 = __p0; \ | 22516 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -23275,15 +22574,6 @@ __ai float32x2_t vrsqrts_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -23275,15 +22574,6 @@ __ai float32x2_t vrsqrts_f32(float32x2_t __p0, float32x2_t __p1) { |
| 23275 | }) | 22574 | }) |
| 23276 | #endif | 22575 | #endif |
| 23277 | | 22576 | |
| 23278 | #ifdef __LITTLE_ENDIAN__ | | |
| 23279 | #define vrsra_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 23280 | int64x1_t __s0 = __p0; \ | | |
| 23281 | int64x1_t __s1 = __p1; \ | | |
| 23282 | int64x1_t __ret; \ | | |
| 23283 | __ret = (int64x1_t) __builtin_neon_vrsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | | |
| 23284 | __ret; \ | | |
| 23285 | }) | | |
| 23286 | #else | | |
| 23287 | #define vrsra_n_s64(__p0, __p1, __p2) __extension__ ({ \ | 22577 | #define vrsra_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 23288 | int64x1_t __s0 = __p0; \ | 22578 | int64x1_t __s0 = __p0; \ |
| 23289 | int64x1_t __s1 = __p1; \ | 22579 | int64x1_t __s1 = __p1; \ |
| ... | @@ -23291,8 +22581,6 @@ __ai float32x2_t vrsqrts_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -23291,8 +22581,6 @@ __ai float32x2_t vrsqrts_f32(float32x2_t __p0, float32x2_t __p1) { |
| 23291 | __ret = (int64x1_t) __builtin_neon_vrsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | 22581 | __ret = (int64x1_t) __builtin_neon_vrsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ |
| 23292 | __ret; \ | 22582 | __ret; \ |
| 23293 | }) | 22583 | }) |
| 23294 | #endif | | |
| 23295 | | | |
| 23296 | #ifdef __LITTLE_ENDIAN__ | 22584 | #ifdef __LITTLE_ENDIAN__ |
| 23297 | #define vrsra_n_s16(__p0, __p1, __p2) __extension__ ({ \ | 22585 | #define vrsra_n_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 23298 | int16x4_t __s0 = __p0; \ | 22586 | int16x4_t __s0 = __p0; \ |
| ... | @@ -23451,7 +22739,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23451,7 +22739,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23451 | poly8_t __s0 = __p0; \ | 22739 | poly8_t __s0 = __p0; \ |
| 23452 | poly8x8_t __s1 = __p1; \ | 22740 | poly8x8_t __s1 = __p1; \ |
| 23453 | poly8x8_t __ret; \ | 22741 | poly8x8_t __ret; \ |
| 23454 | __ret = (poly8x8_t) __builtin_neon_vset_lane_i8(__s0, (int8x8_t)__s1, __p2); \ | 22742 | __ret = (poly8x8_t) __builtin_neon_vset_lane_i8(__s0, (poly8x8_t)__s1, __p2); \ |
| 23455 | __ret; \ | 22743 | __ret; \ |
| 23456 | }) | 22744 | }) |
| 23457 | #else | 22745 | #else |
| ... | @@ -23460,7 +22748,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23460,7 +22748,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23460 | poly8x8_t __s1 = __p1; \ | 22748 | poly8x8_t __s1 = __p1; \ |
| 23461 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 22749 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23462 | poly8x8_t __ret; \ | 22750 | poly8x8_t __ret; \ |
| 23463 | __ret = (poly8x8_t) __builtin_neon_vset_lane_i8(__s0, (int8x8_t)__rev1, __p2); \ | 22751 | __ret = (poly8x8_t) __builtin_neon_vset_lane_i8(__s0, (poly8x8_t)__rev1, __p2); \ |
| 23464 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 22752 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23465 | __ret; \ | 22753 | __ret; \ |
| 23466 | }) | 22754 | }) |
| ... | @@ -23468,7 +22756,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23468,7 +22756,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23468 | poly8_t __s0 = __p0; \ | 22756 | poly8_t __s0 = __p0; \ |
| 23469 | poly8x8_t __s1 = __p1; \ | 22757 | poly8x8_t __s1 = __p1; \ |
| 23470 | poly8x8_t __ret; \ | 22758 | poly8x8_t __ret; \ |
| 23471 | __ret = (poly8x8_t) __builtin_neon_vset_lane_i8(__s0, (int8x8_t)__s1, __p2); \ | 22759 | __ret = (poly8x8_t) __builtin_neon_vset_lane_i8(__s0, (poly8x8_t)__s1, __p2); \ |
| 23472 | __ret; \ | 22760 | __ret; \ |
| 23473 | }) | 22761 | }) |
| 23474 | #endif | 22762 | #endif |
| ... | @@ -23478,7 +22766,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23478,7 +22766,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23478 | poly16_t __s0 = __p0; \ | 22766 | poly16_t __s0 = __p0; \ |
| 23479 | poly16x4_t __s1 = __p1; \ | 22767 | poly16x4_t __s1 = __p1; \ |
| 23480 | poly16x4_t __ret; \ | 22768 | poly16x4_t __ret; \ |
| 23481 | __ret = (poly16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__s1, __p2); \ | 22769 | __ret = (poly16x4_t) __builtin_neon_vset_lane_i16(__s0, (poly16x4_t)__s1, __p2); \ |
| 23482 | __ret; \ | 22770 | __ret; \ |
| 23483 | }) | 22771 | }) |
| 23484 | #else | 22772 | #else |
| ... | @@ -23487,7 +22775,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23487,7 +22775,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23487 | poly16x4_t __s1 = __p1; \ | 22775 | poly16x4_t __s1 = __p1; \ |
| 23488 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 22776 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 23489 | poly16x4_t __ret; \ | 22777 | poly16x4_t __ret; \ |
| 23490 | __ret = (poly16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__rev1, __p2); \ | 22778 | __ret = (poly16x4_t) __builtin_neon_vset_lane_i16(__s0, (poly16x4_t)__rev1, __p2); \ |
| 23491 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 22779 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 23492 | __ret; \ | 22780 | __ret; \ |
| 23493 | }) | 22781 | }) |
| ... | @@ -23495,7 +22783,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23495,7 +22783,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23495 | poly16_t __s0 = __p0; \ | 22783 | poly16_t __s0 = __p0; \ |
| 23496 | poly16x4_t __s1 = __p1; \ | 22784 | poly16x4_t __s1 = __p1; \ |
| 23497 | poly16x4_t __ret; \ | 22785 | poly16x4_t __ret; \ |
| 23498 | __ret = (poly16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__s1, __p2); \ | 22786 | __ret = (poly16x4_t) __builtin_neon_vset_lane_i16(__s0, (poly16x4_t)__s1, __p2); \ |
| 23499 | __ret; \ | 22787 | __ret; \ |
| 23500 | }) | 22788 | }) |
| 23501 | #endif | 22789 | #endif |
| ... | @@ -23505,7 +22793,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23505,7 +22793,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23505 | poly8_t __s0 = __p0; \ | 22793 | poly8_t __s0 = __p0; \ |
| 23506 | poly8x16_t __s1 = __p1; \ | 22794 | poly8x16_t __s1 = __p1; \ |
| 23507 | poly8x16_t __ret; \ | 22795 | poly8x16_t __ret; \ |
| 23508 | __ret = (poly8x16_t) __builtin_neon_vsetq_lane_i8(__s0, (int8x16_t)__s1, __p2); \ | 22796 | __ret = (poly8x16_t) __builtin_neon_vsetq_lane_i8(__s0, (poly8x16_t)__s1, __p2); \ |
| 23509 | __ret; \ | 22797 | __ret; \ |
| 23510 | }) | 22798 | }) |
| 23511 | #else | 22799 | #else |
| ... | @@ -23514,7 +22802,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23514,7 +22802,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23514 | poly8x16_t __s1 = __p1; \ | 22802 | poly8x16_t __s1 = __p1; \ |
| 23515 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 22803 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23516 | poly8x16_t __ret; \ | 22804 | poly8x16_t __ret; \ |
| 23517 | __ret = (poly8x16_t) __builtin_neon_vsetq_lane_i8(__s0, (int8x16_t)__rev1, __p2); \ | 22805 | __ret = (poly8x16_t) __builtin_neon_vsetq_lane_i8(__s0, (poly8x16_t)__rev1, __p2); \ |
| 23518 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 22806 | __ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23519 | __ret; \ | 22807 | __ret; \ |
| 23520 | }) | 22808 | }) |
| ... | @@ -23522,7 +22810,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23522,7 +22810,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23522 | poly8_t __s0 = __p0; \ | 22810 | poly8_t __s0 = __p0; \ |
| 23523 | poly8x16_t __s1 = __p1; \ | 22811 | poly8x16_t __s1 = __p1; \ |
| 23524 | poly8x16_t __ret; \ | 22812 | poly8x16_t __ret; \ |
| 23525 | __ret = (poly8x16_t) __builtin_neon_vsetq_lane_i8(__s0, (int8x16_t)__s1, __p2); \ | 22813 | __ret = (poly8x16_t) __builtin_neon_vsetq_lane_i8(__s0, (poly8x16_t)__s1, __p2); \ |
| 23526 | __ret; \ | 22814 | __ret; \ |
| 23527 | }) | 22815 | }) |
| 23528 | #endif | 22816 | #endif |
| ... | @@ -23532,7 +22820,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23532,7 +22820,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23532 | poly16_t __s0 = __p0; \ | 22820 | poly16_t __s0 = __p0; \ |
| 23533 | poly16x8_t __s1 = __p1; \ | 22821 | poly16x8_t __s1 = __p1; \ |
| 23534 | poly16x8_t __ret; \ | 22822 | poly16x8_t __ret; \ |
| 23535 | __ret = (poly16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__s1, __p2); \ | 22823 | __ret = (poly16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (poly16x8_t)__s1, __p2); \ |
| 23536 | __ret; \ | 22824 | __ret; \ |
| 23537 | }) | 22825 | }) |
| 23538 | #else | 22826 | #else |
| ... | @@ -23541,7 +22829,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23541,7 +22829,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23541 | poly16x8_t __s1 = __p1; \ | 22829 | poly16x8_t __s1 = __p1; \ |
| 23542 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 22830 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23543 | poly16x8_t __ret; \ | 22831 | poly16x8_t __ret; \ |
| 23544 | __ret = (poly16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__rev1, __p2); \ | 22832 | __ret = (poly16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (poly16x8_t)__rev1, __p2); \ |
| 23545 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 22833 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23546 | __ret; \ | 22834 | __ret; \ |
| 23547 | }) | 22835 | }) |
| ... | @@ -23549,7 +22837,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23549,7 +22837,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23549 | poly16_t __s0 = __p0; \ | 22837 | poly16_t __s0 = __p0; \ |
| 23550 | poly16x8_t __s1 = __p1; \ | 22838 | poly16x8_t __s1 = __p1; \ |
| 23551 | poly16x8_t __ret; \ | 22839 | poly16x8_t __ret; \ |
| 23552 | __ret = (poly16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__s1, __p2); \ | 22840 | __ret = (poly16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (poly16x8_t)__s1, __p2); \ |
| 23553 | __ret; \ | 22841 | __ret; \ |
| 23554 | }) | 22842 | }) |
| 23555 | #endif | 22843 | #endif |
| ... | @@ -23586,7 +22874,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23586,7 +22874,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23586 | uint32_t __s0 = __p0; \ | 22874 | uint32_t __s0 = __p0; \ |
| 23587 | uint32x4_t __s1 = __p1; \ | 22875 | uint32x4_t __s1 = __p1; \ |
| 23588 | uint32x4_t __ret; \ | 22876 | uint32x4_t __ret; \ |
| 23589 | __ret = (uint32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int8x16_t)__s1, __p2); \ | 22877 | __ret = (uint32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int32x4_t)__s1, __p2); \ |
| 23590 | __ret; \ | 22878 | __ret; \ |
| 23591 | }) | 22879 | }) |
| 23592 | #else | 22880 | #else |
| ... | @@ -23595,7 +22883,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23595,7 +22883,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23595 | uint32x4_t __s1 = __p1; \ | 22883 | uint32x4_t __s1 = __p1; \ |
| 23596 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 22884 | uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 23597 | uint32x4_t __ret; \ | 22885 | uint32x4_t __ret; \ |
| 23598 | __ret = (uint32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int8x16_t)__rev1, __p2); \ | 22886 | __ret = (uint32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int32x4_t)__rev1, __p2); \ |
| 23599 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 22887 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 23600 | __ret; \ | 22888 | __ret; \ |
| 23601 | }) | 22889 | }) |
| ... | @@ -23603,7 +22891,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23603,7 +22891,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23603 | uint32_t __s0 = __p0; \ | 22891 | uint32_t __s0 = __p0; \ |
| 23604 | uint32x4_t __s1 = __p1; \ | 22892 | uint32x4_t __s1 = __p1; \ |
| 23605 | uint32x4_t __ret; \ | 22893 | uint32x4_t __ret; \ |
| 23606 | __ret = (uint32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int8x16_t)__s1, __p2); \ | 22894 | __ret = (uint32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int32x4_t)__s1, __p2); \ |
| 23607 | __ret; \ | 22895 | __ret; \ |
| 23608 | }) | 22896 | }) |
| 23609 | #endif | 22897 | #endif |
| ... | @@ -23613,7 +22901,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23613,7 +22901,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23613 | uint64_t __s0 = __p0; \ | 22901 | uint64_t __s0 = __p0; \ |
| 23614 | uint64x2_t __s1 = __p1; \ | 22902 | uint64x2_t __s1 = __p1; \ |
| 23615 | uint64x2_t __ret; \ | 22903 | uint64x2_t __ret; \ |
| 23616 | __ret = (uint64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__s1, __p2); \ | 22904 | __ret = (uint64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int64x2_t)__s1, __p2); \ |
| 23617 | __ret; \ | 22905 | __ret; \ |
| 23618 | }) | 22906 | }) |
| 23619 | #else | 22907 | #else |
| ... | @@ -23622,7 +22910,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23622,7 +22910,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23622 | uint64x2_t __s1 = __p1; \ | 22910 | uint64x2_t __s1 = __p1; \ |
| 23623 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 22911 | uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 23624 | uint64x2_t __ret; \ | 22912 | uint64x2_t __ret; \ |
| 23625 | __ret = (uint64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__rev1, __p2); \ | 22913 | __ret = (uint64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int64x2_t)__rev1, __p2); \ |
| 23626 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 22914 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 23627 | __ret; \ | 22915 | __ret; \ |
| 23628 | }) | 22916 | }) |
| ... | @@ -23630,7 +22918,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23630,7 +22918,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23630 | uint64_t __s0 = __p0; \ | 22918 | uint64_t __s0 = __p0; \ |
| 23631 | uint64x2_t __s1 = __p1; \ | 22919 | uint64x2_t __s1 = __p1; \ |
| 23632 | uint64x2_t __ret; \ | 22920 | uint64x2_t __ret; \ |
| 23633 | __ret = (uint64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__s1, __p2); \ | 22921 | __ret = (uint64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int64x2_t)__s1, __p2); \ |
| 23634 | __ret; \ | 22922 | __ret; \ |
| 23635 | }) | 22923 | }) |
| 23636 | #endif | 22924 | #endif |
| ... | @@ -23640,7 +22928,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23640,7 +22928,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23640 | uint16_t __s0 = __p0; \ | 22928 | uint16_t __s0 = __p0; \ |
| 23641 | uint16x8_t __s1 = __p1; \ | 22929 | uint16x8_t __s1 = __p1; \ |
| 23642 | uint16x8_t __ret; \ | 22930 | uint16x8_t __ret; \ |
| 23643 | __ret = (uint16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__s1, __p2); \ | 22931 | __ret = (uint16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int16x8_t)__s1, __p2); \ |
| 23644 | __ret; \ | 22932 | __ret; \ |
| 23645 | }) | 22933 | }) |
| 23646 | #else | 22934 | #else |
| ... | @@ -23649,7 +22937,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23649,7 +22937,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23649 | uint16x8_t __s1 = __p1; \ | 22937 | uint16x8_t __s1 = __p1; \ |
| 23650 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 22938 | uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23651 | uint16x8_t __ret; \ | 22939 | uint16x8_t __ret; \ |
| 23652 | __ret = (uint16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__rev1, __p2); \ | 22940 | __ret = (uint16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int16x8_t)__rev1, __p2); \ |
| 23653 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 22941 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23654 | __ret; \ | 22942 | __ret; \ |
| 23655 | }) | 22943 | }) |
| ... | @@ -23657,7 +22945,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23657,7 +22945,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23657 | uint16_t __s0 = __p0; \ | 22945 | uint16_t __s0 = __p0; \ |
| 23658 | uint16x8_t __s1 = __p1; \ | 22946 | uint16x8_t __s1 = __p1; \ |
| 23659 | uint16x8_t __ret; \ | 22947 | uint16x8_t __ret; \ |
| 23660 | __ret = (uint16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__s1, __p2); \ | 22948 | __ret = (uint16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int16x8_t)__s1, __p2); \ |
| 23661 | __ret; \ | 22949 | __ret; \ |
| 23662 | }) | 22950 | }) |
| 23663 | #endif | 22951 | #endif |
| ... | @@ -23694,7 +22982,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23694,7 +22982,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23694 | float32_t __s0 = __p0; \ | 22982 | float32_t __s0 = __p0; \ |
| 23695 | float32x4_t __s1 = __p1; \ | 22983 | float32x4_t __s1 = __p1; \ |
| 23696 | float32x4_t __ret; \ | 22984 | float32x4_t __ret; \ |
| 23697 | __ret = (float32x4_t) __builtin_neon_vsetq_lane_f32(__s0, (int8x16_t)__s1, __p2); \ | 22985 | __ret = (float32x4_t) __builtin_neon_vsetq_lane_f32(__s0, (float32x4_t)__s1, __p2); \ |
| 23698 | __ret; \ | 22986 | __ret; \ |
| 23699 | }) | 22987 | }) |
| 23700 | #else | 22988 | #else |
| ... | @@ -23703,7 +22991,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23703,7 +22991,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23703 | float32x4_t __s1 = __p1; \ | 22991 | float32x4_t __s1 = __p1; \ |
| 23704 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 22992 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 23705 | float32x4_t __ret; \ | 22993 | float32x4_t __ret; \ |
| 23706 | __ret = (float32x4_t) __builtin_neon_vsetq_lane_f32(__s0, (int8x16_t)__rev1, __p2); \ | 22994 | __ret = (float32x4_t) __builtin_neon_vsetq_lane_f32(__s0, (float32x4_t)__rev1, __p2); \ |
| 23707 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 22995 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 23708 | __ret; \ | 22996 | __ret; \ |
| 23709 | }) | 22997 | }) |
| ... | @@ -23711,7 +22999,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23711,7 +22999,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23711 | float32_t __s0 = __p0; \ | 22999 | float32_t __s0 = __p0; \ |
| 23712 | float32x4_t __s1 = __p1; \ | 23000 | float32x4_t __s1 = __p1; \ |
| 23713 | float32x4_t __ret; \ | 23001 | float32x4_t __ret; \ |
| 23714 | __ret = (float32x4_t) __builtin_neon_vsetq_lane_f32(__s0, (int8x16_t)__s1, __p2); \ | 23002 | __ret = (float32x4_t) __builtin_neon_vsetq_lane_f32(__s0, (float32x4_t)__s1, __p2); \ |
| 23715 | __ret; \ | 23003 | __ret; \ |
| 23716 | }) | 23004 | }) |
| 23717 | #endif | 23005 | #endif |
| ... | @@ -23721,7 +23009,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23721,7 +23009,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23721 | int32_t __s0 = __p0; \ | 23009 | int32_t __s0 = __p0; \ |
| 23722 | int32x4_t __s1 = __p1; \ | 23010 | int32x4_t __s1 = __p1; \ |
| 23723 | int32x4_t __ret; \ | 23011 | int32x4_t __ret; \ |
| 23724 | __ret = (int32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int8x16_t)__s1, __p2); \ | 23012 | __ret = (int32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int32x4_t)__s1, __p2); \ |
| 23725 | __ret; \ | 23013 | __ret; \ |
| 23726 | }) | 23014 | }) |
| 23727 | #else | 23015 | #else |
| ... | @@ -23730,7 +23018,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23730,7 +23018,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23730 | int32x4_t __s1 = __p1; \ | 23018 | int32x4_t __s1 = __p1; \ |
| 23731 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 23019 | int32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 23732 | int32x4_t __ret; \ | 23020 | int32x4_t __ret; \ |
| 23733 | __ret = (int32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int8x16_t)__rev1, __p2); \ | 23021 | __ret = (int32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int32x4_t)__rev1, __p2); \ |
| 23734 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 23022 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 23735 | __ret; \ | 23023 | __ret; \ |
| 23736 | }) | 23024 | }) |
| ... | @@ -23738,7 +23026,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23738,7 +23026,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23738 | int32_t __s0 = __p0; \ | 23026 | int32_t __s0 = __p0; \ |
| 23739 | int32x4_t __s1 = __p1; \ | 23027 | int32x4_t __s1 = __p1; \ |
| 23740 | int32x4_t __ret; \ | 23028 | int32x4_t __ret; \ |
| 23741 | __ret = (int32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int8x16_t)__s1, __p2); \ | 23029 | __ret = (int32x4_t) __builtin_neon_vsetq_lane_i32(__s0, (int32x4_t)__s1, __p2); \ |
| 23742 | __ret; \ | 23030 | __ret; \ |
| 23743 | }) | 23031 | }) |
| 23744 | #endif | 23032 | #endif |
| ... | @@ -23748,7 +23036,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23748,7 +23036,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23748 | int64_t __s0 = __p0; \ | 23036 | int64_t __s0 = __p0; \ |
| 23749 | int64x2_t __s1 = __p1; \ | 23037 | int64x2_t __s1 = __p1; \ |
| 23750 | int64x2_t __ret; \ | 23038 | int64x2_t __ret; \ |
| 23751 | __ret = (int64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__s1, __p2); \ | 23039 | __ret = (int64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int64x2_t)__s1, __p2); \ |
| 23752 | __ret; \ | 23040 | __ret; \ |
| 23753 | }) | 23041 | }) |
| 23754 | #else | 23042 | #else |
| ... | @@ -23757,7 +23045,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23757,7 +23045,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23757 | int64x2_t __s1 = __p1; \ | 23045 | int64x2_t __s1 = __p1; \ |
| 23758 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 23046 | int64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 23759 | int64x2_t __ret; \ | 23047 | int64x2_t __ret; \ |
| 23760 | __ret = (int64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__rev1, __p2); \ | 23048 | __ret = (int64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int64x2_t)__rev1, __p2); \ |
| 23761 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 23049 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 23762 | __ret; \ | 23050 | __ret; \ |
| 23763 | }) | 23051 | }) |
| ... | @@ -23765,7 +23053,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23765,7 +23053,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23765 | int64_t __s0 = __p0; \ | 23053 | int64_t __s0 = __p0; \ |
| 23766 | int64x2_t __s1 = __p1; \ | 23054 | int64x2_t __s1 = __p1; \ |
| 23767 | int64x2_t __ret; \ | 23055 | int64x2_t __ret; \ |
| 23768 | __ret = (int64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__s1, __p2); \ | 23056 | __ret = (int64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int64x2_t)__s1, __p2); \ |
| 23769 | __ret; \ | 23057 | __ret; \ |
| 23770 | }) | 23058 | }) |
| 23771 | #endif | 23059 | #endif |
| ... | @@ -23775,7 +23063,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23775,7 +23063,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23775 | int16_t __s0 = __p0; \ | 23063 | int16_t __s0 = __p0; \ |
| 23776 | int16x8_t __s1 = __p1; \ | 23064 | int16x8_t __s1 = __p1; \ |
| 23777 | int16x8_t __ret; \ | 23065 | int16x8_t __ret; \ |
| 23778 | __ret = (int16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__s1, __p2); \ | 23066 | __ret = (int16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int16x8_t)__s1, __p2); \ |
| 23779 | __ret; \ | 23067 | __ret; \ |
| 23780 | }) | 23068 | }) |
| 23781 | #else | 23069 | #else |
| ... | @@ -23784,7 +23072,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23784,7 +23072,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23784 | int16x8_t __s1 = __p1; \ | 23072 | int16x8_t __s1 = __p1; \ |
| 23785 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 23073 | int16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23786 | int16x8_t __ret; \ | 23074 | int16x8_t __ret; \ |
| 23787 | __ret = (int16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__rev1, __p2); \ | 23075 | __ret = (int16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int16x8_t)__rev1, __p2); \ |
| 23788 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ | 23076 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 23789 | __ret; \ | 23077 | __ret; \ |
| 23790 | }) | 23078 | }) |
| ... | @@ -23792,7 +23080,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23792,7 +23080,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23792 | int16_t __s0 = __p0; \ | 23080 | int16_t __s0 = __p0; \ |
| 23793 | int16x8_t __s1 = __p1; \ | 23081 | int16x8_t __s1 = __p1; \ |
| 23794 | int16x8_t __ret; \ | 23082 | int16x8_t __ret; \ |
| 23795 | __ret = (int16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int8x16_t)__s1, __p2); \ | 23083 | __ret = (int16x8_t) __builtin_neon_vsetq_lane_i16(__s0, (int16x8_t)__s1, __p2); \ |
| 23796 | __ret; \ | 23084 | __ret; \ |
| 23797 | }) | 23085 | }) |
| 23798 | #endif | 23086 | #endif |
| ... | @@ -23829,7 +23117,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23829,7 +23117,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23829 | uint32_t __s0 = __p0; \ | 23117 | uint32_t __s0 = __p0; \ |
| 23830 | uint32x2_t __s1 = __p1; \ | 23118 | uint32x2_t __s1 = __p1; \ |
| 23831 | uint32x2_t __ret; \ | 23119 | uint32x2_t __ret; \ |
| 23832 | __ret = (uint32x2_t) __builtin_neon_vset_lane_i32(__s0, (int8x8_t)__s1, __p2); \ | 23120 | __ret = (uint32x2_t) __builtin_neon_vset_lane_i32(__s0, (int32x2_t)__s1, __p2); \ |
| 23833 | __ret; \ | 23121 | __ret; \ |
| 23834 | }) | 23122 | }) |
| 23835 | #else | 23123 | #else |
| ... | @@ -23838,7 +23126,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23838,7 +23126,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23838 | uint32x2_t __s1 = __p1; \ | 23126 | uint32x2_t __s1 = __p1; \ |
| 23839 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 23127 | uint32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 23840 | uint32x2_t __ret; \ | 23128 | uint32x2_t __ret; \ |
| 23841 | __ret = (uint32x2_t) __builtin_neon_vset_lane_i32(__s0, (int8x8_t)__rev1, __p2); \ | 23129 | __ret = (uint32x2_t) __builtin_neon_vset_lane_i32(__s0, (int32x2_t)__rev1, __p2); \ |
| 23842 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 23130 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 23843 | __ret; \ | 23131 | __ret; \ |
| 23844 | }) | 23132 | }) |
| ... | @@ -23846,42 +23134,24 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23846,42 +23134,24 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23846 | uint32_t __s0 = __p0; \ | 23134 | uint32_t __s0 = __p0; \ |
| 23847 | uint32x2_t __s1 = __p1; \ | 23135 | uint32x2_t __s1 = __p1; \ |
| 23848 | uint32x2_t __ret; \ | 23136 | uint32x2_t __ret; \ |
| 23849 | __ret = (uint32x2_t) __builtin_neon_vset_lane_i32(__s0, (int8x8_t)__s1, __p2); \ | 23137 | __ret = (uint32x2_t) __builtin_neon_vset_lane_i32(__s0, (int32x2_t)__s1, __p2); \ |
| 23850 | __ret; \ | 23138 | __ret; \ |
| 23851 | }) | 23139 | }) |
| 23852 | #endif | 23140 | #endif |
| 23853 | | 23141 | |
| 23854 | #ifdef __LITTLE_ENDIAN__ | | |
| 23855 | #define vset_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 23142 | #define vset_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 23856 | uint64_t __s0 = __p0; \ | 23143 | uint64_t __s0 = __p0; \ |
| 23857 | uint64x1_t __s1 = __p1; \ | 23144 | uint64x1_t __s1 = __p1; \ |
| 23858 | uint64x1_t __ret; \ | 23145 | uint64x1_t __ret; \ |
| 23859 | __ret = (uint64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | 23146 | __ret = (uint64x1_t) __builtin_neon_vset_lane_i64(__s0, (int64x1_t)__s1, __p2); \ |
| 23860 | __ret; \ | 23147 | __ret; \ |
| 23861 | }) | 23148 | }) |
| 23862 | #else | | |
| 23863 | #define vset_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 23864 | uint64_t __s0 = __p0; \ | | |
| 23865 | uint64x1_t __s1 = __p1; \ | | |
| 23866 | uint64x1_t __ret; \ | | |
| 23867 | __ret = (uint64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | | |
| 23868 | __ret; \ | | |
| 23869 | }) | | |
| 23870 | #define __noswap_vset_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 23871 | uint64_t __s0 = __p0; \ | | |
| 23872 | uint64x1_t __s1 = __p1; \ | | |
| 23873 | uint64x1_t __ret; \ | | |
| 23874 | __ret = (uint64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | | |
| 23875 | __ret; \ | | |
| 23876 | }) | | |
| 23877 | #endif | | |
| 23878 | | | |
| 23879 | #ifdef __LITTLE_ENDIAN__ | 23149 | #ifdef __LITTLE_ENDIAN__ |
| 23880 | #define vset_lane_u16(__p0, __p1, __p2) __extension__ ({ \ | 23150 | #define vset_lane_u16(__p0, __p1, __p2) __extension__ ({ \ |
| 23881 | uint16_t __s0 = __p0; \ | 23151 | uint16_t __s0 = __p0; \ |
| 23882 | uint16x4_t __s1 = __p1; \ | 23152 | uint16x4_t __s1 = __p1; \ |
| 23883 | uint16x4_t __ret; \ | 23153 | uint16x4_t __ret; \ |
| 23884 | __ret = (uint16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__s1, __p2); \ | 23154 | __ret = (uint16x4_t) __builtin_neon_vset_lane_i16(__s0, (int16x4_t)__s1, __p2); \ |
| 23885 | __ret; \ | 23155 | __ret; \ |
| 23886 | }) | 23156 | }) |
| 23887 | #else | 23157 | #else |
| ... | @@ -23890,7 +23160,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23890,7 +23160,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23890 | uint16x4_t __s1 = __p1; \ | 23160 | uint16x4_t __s1 = __p1; \ |
| 23891 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 23161 | uint16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 23892 | uint16x4_t __ret; \ | 23162 | uint16x4_t __ret; \ |
| 23893 | __ret = (uint16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__rev1, __p2); \ | 23163 | __ret = (uint16x4_t) __builtin_neon_vset_lane_i16(__s0, (int16x4_t)__rev1, __p2); \ |
| 23894 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 23164 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 23895 | __ret; \ | 23165 | __ret; \ |
| 23896 | }) | 23166 | }) |
| ... | @@ -23898,7 +23168,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23898,7 +23168,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23898 | uint16_t __s0 = __p0; \ | 23168 | uint16_t __s0 = __p0; \ |
| 23899 | uint16x4_t __s1 = __p1; \ | 23169 | uint16x4_t __s1 = __p1; \ |
| 23900 | uint16x4_t __ret; \ | 23170 | uint16x4_t __ret; \ |
| 23901 | __ret = (uint16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__s1, __p2); \ | 23171 | __ret = (uint16x4_t) __builtin_neon_vset_lane_i16(__s0, (int16x4_t)__s1, __p2); \ |
| 23902 | __ret; \ | 23172 | __ret; \ |
| 23903 | }) | 23173 | }) |
| 23904 | #endif | 23174 | #endif |
| ... | @@ -23935,7 +23205,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23935,7 +23205,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23935 | float32_t __s0 = __p0; \ | 23205 | float32_t __s0 = __p0; \ |
| 23936 | float32x2_t __s1 = __p1; \ | 23206 | float32x2_t __s1 = __p1; \ |
| 23937 | float32x2_t __ret; \ | 23207 | float32x2_t __ret; \ |
| 23938 | __ret = (float32x2_t) __builtin_neon_vset_lane_f32(__s0, (int8x8_t)__s1, __p2); \ | 23208 | __ret = (float32x2_t) __builtin_neon_vset_lane_f32(__s0, (float32x2_t)__s1, __p2); \ |
| 23939 | __ret; \ | 23209 | __ret; \ |
| 23940 | }) | 23210 | }) |
| 23941 | #else | 23211 | #else |
| ... | @@ -23944,7 +23214,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23944,7 +23214,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23944 | float32x2_t __s1 = __p1; \ | 23214 | float32x2_t __s1 = __p1; \ |
| 23945 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 23215 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 23946 | float32x2_t __ret; \ | 23216 | float32x2_t __ret; \ |
| 23947 | __ret = (float32x2_t) __builtin_neon_vset_lane_f32(__s0, (int8x8_t)__rev1, __p2); \ | 23217 | __ret = (float32x2_t) __builtin_neon_vset_lane_f32(__s0, (float32x2_t)__rev1, __p2); \ |
| 23948 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 23218 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 23949 | __ret; \ | 23219 | __ret; \ |
| 23950 | }) | 23220 | }) |
| ... | @@ -23952,7 +23222,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23952,7 +23222,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23952 | float32_t __s0 = __p0; \ | 23222 | float32_t __s0 = __p0; \ |
| 23953 | float32x2_t __s1 = __p1; \ | 23223 | float32x2_t __s1 = __p1; \ |
| 23954 | float32x2_t __ret; \ | 23224 | float32x2_t __ret; \ |
| 23955 | __ret = (float32x2_t) __builtin_neon_vset_lane_f32(__s0, (int8x8_t)__s1, __p2); \ | 23225 | __ret = (float32x2_t) __builtin_neon_vset_lane_f32(__s0, (float32x2_t)__s1, __p2); \ |
| 23956 | __ret; \ | 23226 | __ret; \ |
| 23957 | }) | 23227 | }) |
| 23958 | #endif | 23228 | #endif |
| ... | @@ -23962,7 +23232,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23962,7 +23232,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23962 | int32_t __s0 = __p0; \ | 23232 | int32_t __s0 = __p0; \ |
| 23963 | int32x2_t __s1 = __p1; \ | 23233 | int32x2_t __s1 = __p1; \ |
| 23964 | int32x2_t __ret; \ | 23234 | int32x2_t __ret; \ |
| 23965 | __ret = (int32x2_t) __builtin_neon_vset_lane_i32(__s0, (int8x8_t)__s1, __p2); \ | 23235 | __ret = (int32x2_t) __builtin_neon_vset_lane_i32(__s0, (int32x2_t)__s1, __p2); \ |
| 23966 | __ret; \ | 23236 | __ret; \ |
| 23967 | }) | 23237 | }) |
| 23968 | #else | 23238 | #else |
| ... | @@ -23971,7 +23241,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23971,7 +23241,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23971 | int32x2_t __s1 = __p1; \ | 23241 | int32x2_t __s1 = __p1; \ |
| 23972 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 23242 | int32x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 23973 | int32x2_t __ret; \ | 23243 | int32x2_t __ret; \ |
| 23974 | __ret = (int32x2_t) __builtin_neon_vset_lane_i32(__s0, (int8x8_t)__rev1, __p2); \ | 23244 | __ret = (int32x2_t) __builtin_neon_vset_lane_i32(__s0, (int32x2_t)__rev1, __p2); \ |
| 23975 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 23245 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 23976 | __ret; \ | 23246 | __ret; \ |
| 23977 | }) | 23247 | }) |
| ... | @@ -23979,42 +23249,24 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -23979,42 +23249,24 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 23979 | int32_t __s0 = __p0; \ | 23249 | int32_t __s0 = __p0; \ |
| 23980 | int32x2_t __s1 = __p1; \ | 23250 | int32x2_t __s1 = __p1; \ |
| 23981 | int32x2_t __ret; \ | 23251 | int32x2_t __ret; \ |
| 23982 | __ret = (int32x2_t) __builtin_neon_vset_lane_i32(__s0, (int8x8_t)__s1, __p2); \ | 23252 | __ret = (int32x2_t) __builtin_neon_vset_lane_i32(__s0, (int32x2_t)__s1, __p2); \ |
| 23983 | __ret; \ | 23253 | __ret; \ |
| 23984 | }) | 23254 | }) |
| 23985 | #endif | 23255 | #endif |
| 23986 | | 23256 | |
| 23987 | #ifdef __LITTLE_ENDIAN__ | | |
| 23988 | #define vset_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 23257 | #define vset_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 23989 | int64_t __s0 = __p0; \ | 23258 | int64_t __s0 = __p0; \ |
| 23990 | int64x1_t __s1 = __p1; \ | 23259 | int64x1_t __s1 = __p1; \ |
| 23991 | int64x1_t __ret; \ | 23260 | int64x1_t __ret; \ |
| 23992 | __ret = (int64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | 23261 | __ret = (int64x1_t) __builtin_neon_vset_lane_i64(__s0, (int64x1_t)__s1, __p2); \ |
| 23993 | __ret; \ | 23262 | __ret; \ |
| 23994 | }) | 23263 | }) |
| 23995 | #else | | |
| 23996 | #define vset_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 23997 | int64_t __s0 = __p0; \ | | |
| 23998 | int64x1_t __s1 = __p1; \ | | |
| 23999 | int64x1_t __ret; \ | | |
| 24000 | __ret = (int64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | | |
| 24001 | __ret; \ | | |
| 24002 | }) | | |
| 24003 | #define __noswap_vset_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 24004 | int64_t __s0 = __p0; \ | | |
| 24005 | int64x1_t __s1 = __p1; \ | | |
| 24006 | int64x1_t __ret; \ | | |
| 24007 | __ret = (int64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | | |
| 24008 | __ret; \ | | |
| 24009 | }) | | |
| 24010 | #endif | | |
| 24011 | | | |
| 24012 | #ifdef __LITTLE_ENDIAN__ | 23264 | #ifdef __LITTLE_ENDIAN__ |
| 24013 | #define vset_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 23265 | #define vset_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 24014 | int16_t __s0 = __p0; \ | 23266 | int16_t __s0 = __p0; \ |
| 24015 | int16x4_t __s1 = __p1; \ | 23267 | int16x4_t __s1 = __p1; \ |
| 24016 | int16x4_t __ret; \ | 23268 | int16x4_t __ret; \ |
| 24017 | __ret = (int16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__s1, __p2); \ | 23269 | __ret = (int16x4_t) __builtin_neon_vset_lane_i16(__s0, (int16x4_t)__s1, __p2); \ |
| 24018 | __ret; \ | 23270 | __ret; \ |
| 24019 | }) | 23271 | }) |
| 24020 | #else | 23272 | #else |
| ... | @@ -24023,7 +23275,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -24023,7 +23275,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 24023 | int16x4_t __s1 = __p1; \ | 23275 | int16x4_t __s1 = __p1; \ |
| 24024 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 23276 | int16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 24025 | int16x4_t __ret; \ | 23277 | int16x4_t __ret; \ |
| 24026 | __ret = (int16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__rev1, __p2); \ | 23278 | __ret = (int16x4_t) __builtin_neon_vset_lane_i16(__s0, (int16x4_t)__rev1, __p2); \ |
| 24027 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ | 23279 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \ |
| 24028 | __ret; \ | 23280 | __ret; \ |
| 24029 | }) | 23281 | }) |
| ... | @@ -24031,7 +23283,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -24031,7 +23283,7 @@ __ai int8x8_t __noswap_vrsubhn_s16(int16x8_t __p0, int16x8_t __p1) { |
| 24031 | int16_t __s0 = __p0; \ | 23283 | int16_t __s0 = __p0; \ |
| 24032 | int16x4_t __s1 = __p1; \ | 23284 | int16x4_t __s1 = __p1; \ |
| 24033 | int16x4_t __ret; \ | 23285 | int16x4_t __ret; \ |
| 24034 | __ret = (int16x4_t) __builtin_neon_vset_lane_i16(__s0, (int8x8_t)__s1, __p2); \ | 23286 | __ret = (int16x4_t) __builtin_neon_vset_lane_i16(__s0, (int16x4_t)__s1, __p2); \ |
| 24035 | __ret; \ | 23287 | __ret; \ |
| 24036 | }) | 23288 | }) |
| 24037 | #endif | 23289 | #endif |
| ... | @@ -24206,20 +23458,11 @@ __ai uint32x2_t vshl_u32(uint32x2_t __p0, int32x2_t __p1) { | ... | @@ -24206,20 +23458,11 @@ __ai uint32x2_t vshl_u32(uint32x2_t __p0, int32x2_t __p1) { |
| 24206 | } | 23458 | } |
| 24207 | #endif | 23459 | #endif |
| 24208 | | 23460 | |
| 24209 | #ifdef __LITTLE_ENDIAN__ | | |
| 24210 | __ai uint64x1_t vshl_u64(uint64x1_t __p0, int64x1_t __p1) { | | |
| 24211 | uint64x1_t __ret; | | |
| 24212 | __ret = (uint64x1_t) __builtin_neon_vshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 24213 | return __ret; | | |
| 24214 | } | | |
| 24215 | #else | | |
| 24216 | __ai uint64x1_t vshl_u64(uint64x1_t __p0, int64x1_t __p1) { | 23461 | __ai uint64x1_t vshl_u64(uint64x1_t __p0, int64x1_t __p1) { |
| 24217 | uint64x1_t __ret; | 23462 | uint64x1_t __ret; |
| 24218 | __ret = (uint64x1_t) __builtin_neon_vshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 23463 | __ret = (uint64x1_t) __builtin_neon_vshl_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 24219 | return __ret; | 23464 | return __ret; |
| 24220 | } | 23465 | } |
| 24221 | #endif | | |
| 24222 | | | |
| 24223 | #ifdef __LITTLE_ENDIAN__ | 23466 | #ifdef __LITTLE_ENDIAN__ |
| 24224 | __ai uint16x4_t vshl_u16(uint16x4_t __p0, int16x4_t __p1) { | 23467 | __ai uint16x4_t vshl_u16(uint16x4_t __p0, int16x4_t __p1) { |
| 24225 | uint16x4_t __ret; | 23468 | uint16x4_t __ret; |
| ... | @@ -24271,20 +23514,11 @@ __ai int32x2_t vshl_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -24271,20 +23514,11 @@ __ai int32x2_t vshl_s32(int32x2_t __p0, int32x2_t __p1) { |
| 24271 | } | 23514 | } |
| 24272 | #endif | 23515 | #endif |
| 24273 | | 23516 | |
| 24274 | #ifdef __LITTLE_ENDIAN__ | | |
| 24275 | __ai int64x1_t vshl_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 24276 | int64x1_t __ret; | | |
| 24277 | __ret = (int64x1_t) __builtin_neon_vshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | | |
| 24278 | return __ret; | | |
| 24279 | } | | |
| 24280 | #else | | |
| 24281 | __ai int64x1_t vshl_s64(int64x1_t __p0, int64x1_t __p1) { | 23517 | __ai int64x1_t vshl_s64(int64x1_t __p0, int64x1_t __p1) { |
| 24282 | int64x1_t __ret; | 23518 | int64x1_t __ret; |
| 24283 | __ret = (int64x1_t) __builtin_neon_vshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | 23519 | __ret = (int64x1_t) __builtin_neon_vshl_v((int8x8_t)__p0, (int8x8_t)__p1, 3); |
| 24284 | return __ret; | 23520 | return __ret; |
| 24285 | } | 23521 | } |
| 24286 | #endif | | |
| 24287 | | | |
| 24288 | #ifdef __LITTLE_ENDIAN__ | 23522 | #ifdef __LITTLE_ENDIAN__ |
| 24289 | __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | 23523 | __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 24290 | int16x4_t __ret; | 23524 | int16x4_t __ret; |
| ... | @@ -24482,22 +23716,12 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -24482,22 +23716,12 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 24482 | }) | 23716 | }) |
| 24483 | #endif | 23717 | #endif |
| 24484 | | 23718 | |
| 24485 | #ifdef __LITTLE_ENDIAN__ | | |
| 24486 | #define vshl_n_u64(__p0, __p1) __extension__ ({ \ | 23719 | #define vshl_n_u64(__p0, __p1) __extension__ ({ \ |
| 24487 | uint64x1_t __s0 = __p0; \ | 23720 | uint64x1_t __s0 = __p0; \ |
| 24488 | uint64x1_t __ret; \ | 23721 | uint64x1_t __ret; \ |
| 24489 | __ret = (uint64x1_t) __builtin_neon_vshl_n_v((int8x8_t)__s0, __p1, 19); \ | 23722 | __ret = (uint64x1_t) __builtin_neon_vshl_n_v((int8x8_t)__s0, __p1, 19); \ |
| 24490 | __ret; \ | 23723 | __ret; \ |
| 24491 | }) | 23724 | }) |
| 24492 | #else | | |
| 24493 | #define vshl_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 24494 | uint64x1_t __s0 = __p0; \ | | |
| 24495 | uint64x1_t __ret; \ | | |
| 24496 | __ret = (uint64x1_t) __builtin_neon_vshl_n_v((int8x8_t)__s0, __p1, 19); \ | | |
| 24497 | __ret; \ | | |
| 24498 | }) | | |
| 24499 | #endif | | |
| 24500 | | | |
| 24501 | #ifdef __LITTLE_ENDIAN__ | 23725 | #ifdef __LITTLE_ENDIAN__ |
| 24502 | #define vshl_n_u16(__p0, __p1) __extension__ ({ \ | 23726 | #define vshl_n_u16(__p0, __p1) __extension__ ({ \ |
| 24503 | uint16x4_t __s0 = __p0; \ | 23727 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -24552,22 +23776,12 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -24552,22 +23776,12 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 24552 | }) | 23776 | }) |
| 24553 | #endif | 23777 | #endif |
| 24554 | | 23778 | |
| 24555 | #ifdef __LITTLE_ENDIAN__ | | |
| 24556 | #define vshl_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 24557 | int64x1_t __s0 = __p0; \ | | |
| 24558 | int64x1_t __ret; \ | | |
| 24559 | __ret = (int64x1_t) __builtin_neon_vshl_n_v((int8x8_t)__s0, __p1, 3); \ | | |
| 24560 | __ret; \ | | |
| 24561 | }) | | |
| 24562 | #else | | |
| 24563 | #define vshl_n_s64(__p0, __p1) __extension__ ({ \ | 23779 | #define vshl_n_s64(__p0, __p1) __extension__ ({ \ |
| 24564 | int64x1_t __s0 = __p0; \ | 23780 | int64x1_t __s0 = __p0; \ |
| 24565 | int64x1_t __ret; \ | 23781 | int64x1_t __ret; \ |
| 24566 | __ret = (int64x1_t) __builtin_neon_vshl_n_v((int8x8_t)__s0, __p1, 3); \ | 23782 | __ret = (int64x1_t) __builtin_neon_vshl_n_v((int8x8_t)__s0, __p1, 3); \ |
| 24567 | __ret; \ | 23783 | __ret; \ |
| 24568 | }) | 23784 | }) |
| 24569 | #endif | | |
| 24570 | | | |
| 24571 | #ifdef __LITTLE_ENDIAN__ | 23785 | #ifdef __LITTLE_ENDIAN__ |
| 24572 | #define vshl_n_s16(__p0, __p1) __extension__ ({ \ | 23786 | #define vshl_n_s16(__p0, __p1) __extension__ ({ \ |
| 24573 | int16x4_t __s0 = __p0; \ | 23787 | int16x4_t __s0 = __p0; \ |
| ... | @@ -24910,22 +24124,12 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -24910,22 +24124,12 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 24910 | }) | 24124 | }) |
| 24911 | #endif | 24125 | #endif |
| 24912 | | 24126 | |
| 24913 | #ifdef __LITTLE_ENDIAN__ | | |
| 24914 | #define vshr_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 24915 | uint64x1_t __s0 = __p0; \ | | |
| 24916 | uint64x1_t __ret; \ | | |
| 24917 | __ret = (uint64x1_t) __builtin_neon_vshr_n_v((int8x8_t)__s0, __p1, 19); \ | | |
| 24918 | __ret; \ | | |
| 24919 | }) | | |
| 24920 | #else | | |
| 24921 | #define vshr_n_u64(__p0, __p1) __extension__ ({ \ | 24127 | #define vshr_n_u64(__p0, __p1) __extension__ ({ \ |
| 24922 | uint64x1_t __s0 = __p0; \ | 24128 | uint64x1_t __s0 = __p0; \ |
| 24923 | uint64x1_t __ret; \ | 24129 | uint64x1_t __ret; \ |
| 24924 | __ret = (uint64x1_t) __builtin_neon_vshr_n_v((int8x8_t)__s0, __p1, 19); \ | 24130 | __ret = (uint64x1_t) __builtin_neon_vshr_n_v((int8x8_t)__s0, __p1, 19); \ |
| 24925 | __ret; \ | 24131 | __ret; \ |
| 24926 | }) | 24132 | }) |
| 24927 | #endif | | |
| 24928 | | | |
| 24929 | #ifdef __LITTLE_ENDIAN__ | 24133 | #ifdef __LITTLE_ENDIAN__ |
| 24930 | #define vshr_n_u16(__p0, __p1) __extension__ ({ \ | 24134 | #define vshr_n_u16(__p0, __p1) __extension__ ({ \ |
| 24931 | uint16x4_t __s0 = __p0; \ | 24135 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -24980,22 +24184,12 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -24980,22 +24184,12 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 24980 | }) | 24184 | }) |
| 24981 | #endif | 24185 | #endif |
| 24982 | | 24186 | |
| 24983 | #ifdef __LITTLE_ENDIAN__ | | |
| 24984 | #define vshr_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 24985 | int64x1_t __s0 = __p0; \ | | |
| 24986 | int64x1_t __ret; \ | | |
| 24987 | __ret = (int64x1_t) __builtin_neon_vshr_n_v((int8x8_t)__s0, __p1, 3); \ | | |
| 24988 | __ret; \ | | |
| 24989 | }) | | |
| 24990 | #else | | |
| 24991 | #define vshr_n_s64(__p0, __p1) __extension__ ({ \ | 24187 | #define vshr_n_s64(__p0, __p1) __extension__ ({ \ |
| 24992 | int64x1_t __s0 = __p0; \ | 24188 | int64x1_t __s0 = __p0; \ |
| 24993 | int64x1_t __ret; \ | 24189 | int64x1_t __ret; \ |
| 24994 | __ret = (int64x1_t) __builtin_neon_vshr_n_v((int8x8_t)__s0, __p1, 3); \ | 24190 | __ret = (int64x1_t) __builtin_neon_vshr_n_v((int8x8_t)__s0, __p1, 3); \ |
| 24995 | __ret; \ | 24191 | __ret; \ |
| 24996 | }) | 24192 | }) |
| 24997 | #endif | | |
| 24998 | | | |
| 24999 | #ifdef __LITTLE_ENDIAN__ | 24193 | #ifdef __LITTLE_ENDIAN__ |
| 25000 | #define vshr_n_s16(__p0, __p1) __extension__ ({ \ | 24194 | #define vshr_n_s16(__p0, __p1) __extension__ ({ \ |
| 25001 | int16x4_t __s0 = __p0; \ | 24195 | int16x4_t __s0 = __p0; \ |
| ... | @@ -25452,15 +24646,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -25452,15 +24646,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 25452 | }) | 24646 | }) |
| 25453 | #endif | 24647 | #endif |
| 25454 | | 24648 | |
| 25455 | #ifdef __LITTLE_ENDIAN__ | | |
| 25456 | #define vsli_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 25457 | uint64x1_t __s0 = __p0; \ | | |
| 25458 | uint64x1_t __s1 = __p1; \ | | |
| 25459 | uint64x1_t __ret; \ | | |
| 25460 | __ret = (uint64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | | |
| 25461 | __ret; \ | | |
| 25462 | }) | | |
| 25463 | #else | | |
| 25464 | #define vsli_n_u64(__p0, __p1, __p2) __extension__ ({ \ | 24649 | #define vsli_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 25465 | uint64x1_t __s0 = __p0; \ | 24650 | uint64x1_t __s0 = __p0; \ |
| 25466 | uint64x1_t __s1 = __p1; \ | 24651 | uint64x1_t __s1 = __p1; \ |
| ... | @@ -25468,8 +24653,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -25468,8 +24653,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 25468 | __ret = (uint64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | 24653 | __ret = (uint64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ |
| 25469 | __ret; \ | 24654 | __ret; \ |
| 25470 | }) | 24655 | }) |
| 25471 | #endif | | |
| 25472 | | | |
| 25473 | #ifdef __LITTLE_ENDIAN__ | 24656 | #ifdef __LITTLE_ENDIAN__ |
| 25474 | #define vsli_n_u16(__p0, __p1, __p2) __extension__ ({ \ | 24657 | #define vsli_n_u16(__p0, __p1, __p2) __extension__ ({ \ |
| 25475 | uint16x4_t __s0 = __p0; \ | 24658 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -25533,15 +24716,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -25533,15 +24716,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 25533 | }) | 24716 | }) |
| 25534 | #endif | 24717 | #endif |
| 25535 | | 24718 | |
| 25536 | #ifdef __LITTLE_ENDIAN__ | | |
| 25537 | #define vsli_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 25538 | int64x1_t __s0 = __p0; \ | | |
| 25539 | int64x1_t __s1 = __p1; \ | | |
| 25540 | int64x1_t __ret; \ | | |
| 25541 | __ret = (int64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | | |
| 25542 | __ret; \ | | |
| 25543 | }) | | |
| 25544 | #else | | |
| 25545 | #define vsli_n_s64(__p0, __p1, __p2) __extension__ ({ \ | 24719 | #define vsli_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 25546 | int64x1_t __s0 = __p0; \ | 24720 | int64x1_t __s0 = __p0; \ |
| 25547 | int64x1_t __s1 = __p1; \ | 24721 | int64x1_t __s1 = __p1; \ |
| ... | @@ -25549,8 +24723,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -25549,8 +24723,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 25549 | __ret = (int64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | 24723 | __ret = (int64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ |
| 25550 | __ret; \ | 24724 | __ret; \ |
| 25551 | }) | 24725 | }) |
| 25552 | #endif | | |
| 25553 | | | |
| 25554 | #ifdef __LITTLE_ENDIAN__ | 24726 | #ifdef __LITTLE_ENDIAN__ |
| 25555 | #define vsli_n_s16(__p0, __p1, __p2) __extension__ ({ \ | 24727 | #define vsli_n_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 25556 | int16x4_t __s0 = __p0; \ | 24728 | int16x4_t __s0 = __p0; \ |
| ... | @@ -25782,7 +24954,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -25782,7 +24954,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 25782 | }) | 24954 | }) |
| 25783 | #endif | 24955 | #endif |
| 25784 | | 24956 | |
| 25785 | #ifdef __LITTLE_ENDIAN__ | | |
| 25786 | #define vsra_n_u64(__p0, __p1, __p2) __extension__ ({ \ | 24957 | #define vsra_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 25787 | uint64x1_t __s0 = __p0; \ | 24958 | uint64x1_t __s0 = __p0; \ |
| 25788 | uint64x1_t __s1 = __p1; \ | 24959 | uint64x1_t __s1 = __p1; \ |
| ... | @@ -25790,16 +24961,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -25790,16 +24961,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 25790 | __ret = (uint64x1_t) __builtin_neon_vsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | 24961 | __ret = (uint64x1_t) __builtin_neon_vsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ |
| 25791 | __ret; \ | 24962 | __ret; \ |
| 25792 | }) | 24963 | }) |
| 25793 | #else | | |
| 25794 | #define vsra_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 25795 | uint64x1_t __s0 = __p0; \ | | |
| 25796 | uint64x1_t __s1 = __p1; \ | | |
| 25797 | uint64x1_t __ret; \ | | |
| 25798 | __ret = (uint64x1_t) __builtin_neon_vsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | | |
| 25799 | __ret; \ | | |
| 25800 | }) | | |
| 25801 | #endif | | |
| 25802 | | | |
| 25803 | #ifdef __LITTLE_ENDIAN__ | 24964 | #ifdef __LITTLE_ENDIAN__ |
| 25804 | #define vsra_n_u16(__p0, __p1, __p2) __extension__ ({ \ | 24965 | #define vsra_n_u16(__p0, __p1, __p2) __extension__ ({ \ |
| 25805 | uint16x4_t __s0 = __p0; \ | 24966 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -25863,15 +25024,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -25863,15 +25024,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 25863 | }) | 25024 | }) |
| 25864 | #endif | 25025 | #endif |
| 25865 | | 25026 | |
| 25866 | #ifdef __LITTLE_ENDIAN__ | | |
| 25867 | #define vsra_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 25868 | int64x1_t __s0 = __p0; \ | | |
| 25869 | int64x1_t __s1 = __p1; \ | | |
| 25870 | int64x1_t __ret; \ | | |
| 25871 | __ret = (int64x1_t) __builtin_neon_vsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | | |
| 25872 | __ret; \ | | |
| 25873 | }) | | |
| 25874 | #else | | |
| 25875 | #define vsra_n_s64(__p0, __p1, __p2) __extension__ ({ \ | 25027 | #define vsra_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 25876 | int64x1_t __s0 = __p0; \ | 25028 | int64x1_t __s0 = __p0; \ |
| 25877 | int64x1_t __s1 = __p1; \ | 25029 | int64x1_t __s1 = __p1; \ |
| ... | @@ -25879,8 +25031,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -25879,8 +25031,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 25879 | __ret = (int64x1_t) __builtin_neon_vsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | 25031 | __ret = (int64x1_t) __builtin_neon_vsra_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ |
| 25880 | __ret; \ | 25032 | __ret; \ |
| 25881 | }) | 25033 | }) |
| 25882 | #endif | | |
| 25883 | | | |
| 25884 | #ifdef __LITTLE_ENDIAN__ | 25034 | #ifdef __LITTLE_ENDIAN__ |
| 25885 | #define vsra_n_s16(__p0, __p1, __p2) __extension__ ({ \ | 25035 | #define vsra_n_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 25886 | int16x4_t __s0 = __p0; \ | 25036 | int16x4_t __s0 = __p0; \ |
| ... | @@ -26196,15 +25346,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -26196,15 +25346,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 26196 | }) | 25346 | }) |
| 26197 | #endif | 25347 | #endif |
| 26198 | | 25348 | |
| 26199 | #ifdef __LITTLE_ENDIAN__ | | |
| 26200 | #define vsri_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 26201 | uint64x1_t __s0 = __p0; \ | | |
| 26202 | uint64x1_t __s1 = __p1; \ | | |
| 26203 | uint64x1_t __ret; \ | | |
| 26204 | __ret = (uint64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | | |
| 26205 | __ret; \ | | |
| 26206 | }) | | |
| 26207 | #else | | |
| 26208 | #define vsri_n_u64(__p0, __p1, __p2) __extension__ ({ \ | 25349 | #define vsri_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 26209 | uint64x1_t __s0 = __p0; \ | 25350 | uint64x1_t __s0 = __p0; \ |
| 26210 | uint64x1_t __s1 = __p1; \ | 25351 | uint64x1_t __s1 = __p1; \ |
| ... | @@ -26212,8 +25353,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -26212,8 +25353,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 26212 | __ret = (uint64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ | 25353 | __ret = (uint64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 19); \ |
| 26213 | __ret; \ | 25354 | __ret; \ |
| 26214 | }) | 25355 | }) |
| 26215 | #endif | | |
| 26216 | | | |
| 26217 | #ifdef __LITTLE_ENDIAN__ | 25356 | #ifdef __LITTLE_ENDIAN__ |
| 26218 | #define vsri_n_u16(__p0, __p1, __p2) __extension__ ({ \ | 25357 | #define vsri_n_u16(__p0, __p1, __p2) __extension__ ({ \ |
| 26219 | uint16x4_t __s0 = __p0; \ | 25358 | uint16x4_t __s0 = __p0; \ |
| ... | @@ -26277,15 +25416,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -26277,15 +25416,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 26277 | }) | 25416 | }) |
| 26278 | #endif | 25417 | #endif |
| 26279 | | 25418 | |
| 26280 | #ifdef __LITTLE_ENDIAN__ | | |
| 26281 | #define vsri_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 26282 | int64x1_t __s0 = __p0; \ | | |
| 26283 | int64x1_t __s1 = __p1; \ | | |
| 26284 | int64x1_t __ret; \ | | |
| 26285 | __ret = (int64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | | |
| 26286 | __ret; \ | | |
| 26287 | }) | | |
| 26288 | #else | | |
| 26289 | #define vsri_n_s64(__p0, __p1, __p2) __extension__ ({ \ | 25419 | #define vsri_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 26290 | int64x1_t __s0 = __p0; \ | 25420 | int64x1_t __s0 = __p0; \ |
| 26291 | int64x1_t __s1 = __p1; \ | 25421 | int64x1_t __s1 = __p1; \ |
| ... | @@ -26293,8 +25423,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -26293,8 +25423,6 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 26293 | __ret = (int64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ | 25423 | __ret = (int64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 3); \ |
| 26294 | __ret; \ | 25424 | __ret; \ |
| 26295 | }) | 25425 | }) |
| 26296 | #endif | | |
| 26297 | | | |
| 26298 | #ifdef __LITTLE_ENDIAN__ | 25426 | #ifdef __LITTLE_ENDIAN__ |
| 26299 | #define vsri_n_s16(__p0, __p1, __p2) __extension__ ({ \ | 25427 | #define vsri_n_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 26300 | int16x4_t __s0 = __p0; \ | 25428 | int16x4_t __s0 = __p0; \ |
| ... | @@ -26511,18 +25639,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -26511,18 +25639,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 26511 | }) | 25639 | }) |
| 26512 | #endif | 25640 | #endif |
| 26513 | | 25641 | |
| 26514 | #ifdef __LITTLE_ENDIAN__ | | |
| 26515 | #define vst1_u64(__p0, __p1) __extension__ ({ \ | | |
| 26516 | uint64x1_t __s1 = __p1; \ | | |
| 26517 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 19); \ | | |
| 26518 | }) | | |
| 26519 | #else | | |
| 26520 | #define vst1_u64(__p0, __p1) __extension__ ({ \ | 25642 | #define vst1_u64(__p0, __p1) __extension__ ({ \ |
| 26521 | uint64x1_t __s1 = __p1; \ | 25643 | uint64x1_t __s1 = __p1; \ |
| 26522 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 19); \ | 25644 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 19); \ |
| 26523 | }) | 25645 | }) |
| 26524 | #endif | | |
| 26525 | | | |
| 26526 | #ifdef __LITTLE_ENDIAN__ | 25646 | #ifdef __LITTLE_ENDIAN__ |
| 26527 | #define vst1_u16(__p0, __p1) __extension__ ({ \ | 25647 | #define vst1_u16(__p0, __p1) __extension__ ({ \ |
| 26528 | uint16x4_t __s1 = __p1; \ | 25648 | uint16x4_t __s1 = __p1; \ |
| ... | @@ -26575,18 +25695,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -26575,18 +25695,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 26575 | }) | 25695 | }) |
| 26576 | #endif | 25696 | #endif |
| 26577 | | 25697 | |
| 26578 | #ifdef __LITTLE_ENDIAN__ | | |
| 26579 | #define vst1_s64(__p0, __p1) __extension__ ({ \ | | |
| 26580 | int64x1_t __s1 = __p1; \ | | |
| 26581 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 3); \ | | |
| 26582 | }) | | |
| 26583 | #else | | |
| 26584 | #define vst1_s64(__p0, __p1) __extension__ ({ \ | 25698 | #define vst1_s64(__p0, __p1) __extension__ ({ \ |
| 26585 | int64x1_t __s1 = __p1; \ | 25699 | int64x1_t __s1 = __p1; \ |
| 26586 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 3); \ | 25700 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 3); \ |
| 26587 | }) | 25701 | }) |
| 26588 | #endif | | |
| 26589 | | | |
| 26590 | #ifdef __LITTLE_ENDIAN__ | 25702 | #ifdef __LITTLE_ENDIAN__ |
| 26591 | #define vst1_s16(__p0, __p1) __extension__ ({ \ | 25703 | #define vst1_s16(__p0, __p1) __extension__ ({ \ |
| 26592 | int16x4_t __s1 = __p1; \ | 25704 | int16x4_t __s1 = __p1; \ |
| ... | @@ -26795,18 +25907,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -26795,18 +25907,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 26795 | }) | 25907 | }) |
| 26796 | #endif | 25908 | #endif |
| 26797 | | 25909 | |
| 26798 | #ifdef __LITTLE_ENDIAN__ | | |
| 26799 | #define vst1_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 26800 | uint64x1_t __s1 = __p1; \ | | |
| 26801 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 19); \ | | |
| 26802 | }) | | |
| 26803 | #else | | |
| 26804 | #define vst1_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 25910 | #define vst1_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 26805 | uint64x1_t __s1 = __p1; \ | 25911 | uint64x1_t __s1 = __p1; \ |
| 26806 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 19); \ | 25912 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 19); \ |
| 26807 | }) | 25913 | }) |
| 26808 | #endif | | |
| 26809 | | | |
| 26810 | #ifdef __LITTLE_ENDIAN__ | 25914 | #ifdef __LITTLE_ENDIAN__ |
| 26811 | #define vst1_lane_u16(__p0, __p1, __p2) __extension__ ({ \ | 25915 | #define vst1_lane_u16(__p0, __p1, __p2) __extension__ ({ \ |
| 26812 | uint16x4_t __s1 = __p1; \ | 25916 | uint16x4_t __s1 = __p1; \ |
| ... | @@ -26859,18 +25963,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -26859,18 +25963,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 26859 | }) | 25963 | }) |
| 26860 | #endif | 25964 | #endif |
| 26861 | | 25965 | |
| 26862 | #ifdef __LITTLE_ENDIAN__ | | |
| 26863 | #define vst1_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 26864 | int64x1_t __s1 = __p1; \ | | |
| 26865 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 3); \ | | |
| 26866 | }) | | |
| 26867 | #else | | |
| 26868 | #define vst1_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 25966 | #define vst1_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 26869 | int64x1_t __s1 = __p1; \ | 25967 | int64x1_t __s1 = __p1; \ |
| 26870 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 3); \ | 25968 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 3); \ |
| 26871 | }) | 25969 | }) |
| 26872 | #endif | | |
| 26873 | | | |
| 26874 | #ifdef __LITTLE_ENDIAN__ | 25970 | #ifdef __LITTLE_ENDIAN__ |
| 26875 | #define vst1_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 25971 | #define vst1_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 26876 | int16x4_t __s1 = __p1; \ | 25972 | int16x4_t __s1 = __p1; \ |
| ... | @@ -27022,7 +26118,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27022,7 +26118,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27022 | #ifdef __LITTLE_ENDIAN__ | 26118 | #ifdef __LITTLE_ENDIAN__ |
| 27023 | #define vst1q_f32_x2(__p0, __p1) __extension__ ({ \ | 26119 | #define vst1q_f32_x2(__p0, __p1) __extension__ ({ \ |
| 27024 | float32x4x2_t __s1 = __p1; \ | 26120 | float32x4x2_t __s1 = __p1; \ |
| 27025 | __builtin_neon_vst1q_x2_v(__p0, __s1.val[0], __s1.val[1], 41); \ | 26121 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 41); \ |
| 27026 | }) | 26122 | }) |
| 27027 | #else | 26123 | #else |
| 27028 | #define vst1q_f32_x2(__p0, __p1) __extension__ ({ \ | 26124 | #define vst1q_f32_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27030,14 +26126,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27030,14 +26126,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27030 | float32x4x2_t __rev1; \ | 26126 | float32x4x2_t __rev1; \ |
| 27031 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 26127 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 27032 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26128 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27033 | __builtin_neon_vst1q_x2_v(__p0, __rev1.val[0], __rev1.val[1], 41); \ | 26129 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 41); \ |
| 27034 | }) | 26130 | }) |
| 27035 | #endif | 26131 | #endif |
| 27036 | | 26132 | |
| 27037 | #ifdef __LITTLE_ENDIAN__ | 26133 | #ifdef __LITTLE_ENDIAN__ |
| 27038 | #define vst1q_s32_x2(__p0, __p1) __extension__ ({ \ | 26134 | #define vst1q_s32_x2(__p0, __p1) __extension__ ({ \ |
| 27039 | int32x4x2_t __s1 = __p1; \ | 26135 | int32x4x2_t __s1 = __p1; \ |
| 27040 | __builtin_neon_vst1q_x2_v(__p0, __s1.val[0], __s1.val[1], 34); \ | 26136 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 34); \ |
| 27041 | }) | 26137 | }) |
| 27042 | #else | 26138 | #else |
| 27043 | #define vst1q_s32_x2(__p0, __p1) __extension__ ({ \ | 26139 | #define vst1q_s32_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27045,14 +26141,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27045,14 +26141,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27045 | int32x4x2_t __rev1; \ | 26141 | int32x4x2_t __rev1; \ |
| 27046 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 26142 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 27047 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26143 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27048 | __builtin_neon_vst1q_x2_v(__p0, __rev1.val[0], __rev1.val[1], 34); \ | 26144 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 34); \ |
| 27049 | }) | 26145 | }) |
| 27050 | #endif | 26146 | #endif |
| 27051 | | 26147 | |
| 27052 | #ifdef __LITTLE_ENDIAN__ | 26148 | #ifdef __LITTLE_ENDIAN__ |
| 27053 | #define vst1q_s64_x2(__p0, __p1) __extension__ ({ \ | 26149 | #define vst1q_s64_x2(__p0, __p1) __extension__ ({ \ |
| 27054 | int64x2x2_t __s1 = __p1; \ | 26150 | int64x2x2_t __s1 = __p1; \ |
| 27055 | __builtin_neon_vst1q_x2_v(__p0, __s1.val[0], __s1.val[1], 35); \ | 26151 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 35); \ |
| 27056 | }) | 26152 | }) |
| 27057 | #else | 26153 | #else |
| 27058 | #define vst1q_s64_x2(__p0, __p1) __extension__ ({ \ | 26154 | #define vst1q_s64_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27060,14 +26156,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27060,14 +26156,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27060 | int64x2x2_t __rev1; \ | 26156 | int64x2x2_t __rev1; \ |
| 27061 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 26157 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 27062 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26158 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27063 | __builtin_neon_vst1q_x2_v(__p0, __rev1.val[0], __rev1.val[1], 35); \ | 26159 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 35); \ |
| 27064 | }) | 26160 | }) |
| 27065 | #endif | 26161 | #endif |
| 27066 | | 26162 | |
| 27067 | #ifdef __LITTLE_ENDIAN__ | 26163 | #ifdef __LITTLE_ENDIAN__ |
| 27068 | #define vst1q_s16_x2(__p0, __p1) __extension__ ({ \ | 26164 | #define vst1q_s16_x2(__p0, __p1) __extension__ ({ \ |
| 27069 | int16x8x2_t __s1 = __p1; \ | 26165 | int16x8x2_t __s1 = __p1; \ |
| 27070 | __builtin_neon_vst1q_x2_v(__p0, __s1.val[0], __s1.val[1], 33); \ | 26166 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 33); \ |
| 27071 | }) | 26167 | }) |
| 27072 | #else | 26168 | #else |
| 27073 | #define vst1q_s16_x2(__p0, __p1) __extension__ ({ \ | 26169 | #define vst1q_s16_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27075,7 +26171,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27075,7 +26171,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27075 | int16x8x2_t __rev1; \ | 26171 | int16x8x2_t __rev1; \ |
| 27076 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 26172 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 27077 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 26173 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 27078 | __builtin_neon_vst1q_x2_v(__p0, __rev1.val[0], __rev1.val[1], 33); \ | 26174 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 33); \ |
| 27079 | }) | 26175 | }) |
| 27080 | #endif | 26176 | #endif |
| 27081 | | 26177 | |
| ... | @@ -27109,18 +26205,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27109,18 +26205,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27109 | }) | 26205 | }) |
| 27110 | #endif | 26206 | #endif |
| 27111 | | 26207 | |
| 27112 | #ifdef __LITTLE_ENDIAN__ | | |
| 27113 | #define vst1_u64_x2(__p0, __p1) __extension__ ({ \ | | |
| 27114 | uint64x1x2_t __s1 = __p1; \ | | |
| 27115 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 19); \ | | |
| 27116 | }) | | |
| 27117 | #else | | |
| 27118 | #define vst1_u64_x2(__p0, __p1) __extension__ ({ \ | 26208 | #define vst1_u64_x2(__p0, __p1) __extension__ ({ \ |
| 27119 | uint64x1x2_t __s1 = __p1; \ | 26209 | uint64x1x2_t __s1 = __p1; \ |
| 27120 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 19); \ | 26210 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 19); \ |
| 27121 | }) | 26211 | }) |
| 27122 | #endif | | |
| 27123 | | | |
| 27124 | #ifdef __LITTLE_ENDIAN__ | 26212 | #ifdef __LITTLE_ENDIAN__ |
| 27125 | #define vst1_u16_x2(__p0, __p1) __extension__ ({ \ | 26213 | #define vst1_u16_x2(__p0, __p1) __extension__ ({ \ |
| 27126 | uint16x4x2_t __s1 = __p1; \ | 26214 | uint16x4x2_t __s1 = __p1; \ |
| ... | @@ -27154,7 +26242,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27154,7 +26242,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27154 | #ifdef __LITTLE_ENDIAN__ | 26242 | #ifdef __LITTLE_ENDIAN__ |
| 27155 | #define vst1_f32_x2(__p0, __p1) __extension__ ({ \ | 26243 | #define vst1_f32_x2(__p0, __p1) __extension__ ({ \ |
| 27156 | float32x2x2_t __s1 = __p1; \ | 26244 | float32x2x2_t __s1 = __p1; \ |
| 27157 | __builtin_neon_vst1_x2_v(__p0, __s1.val[0], __s1.val[1], 9); \ | 26245 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 9); \ |
| 27158 | }) | 26246 | }) |
| 27159 | #else | 26247 | #else |
| 27160 | #define vst1_f32_x2(__p0, __p1) __extension__ ({ \ | 26248 | #define vst1_f32_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27162,14 +26250,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27162,14 +26250,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27162 | float32x2x2_t __rev1; \ | 26250 | float32x2x2_t __rev1; \ |
| 27163 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 26251 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 27164 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26252 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27165 | __builtin_neon_vst1_x2_v(__p0, __rev1.val[0], __rev1.val[1], 9); \ | 26253 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 9); \ |
| 27166 | }) | 26254 | }) |
| 27167 | #endif | 26255 | #endif |
| 27168 | | 26256 | |
| 27169 | #ifdef __LITTLE_ENDIAN__ | 26257 | #ifdef __LITTLE_ENDIAN__ |
| 27170 | #define vst1_s32_x2(__p0, __p1) __extension__ ({ \ | 26258 | #define vst1_s32_x2(__p0, __p1) __extension__ ({ \ |
| 27171 | int32x2x2_t __s1 = __p1; \ | 26259 | int32x2x2_t __s1 = __p1; \ |
| 27172 | __builtin_neon_vst1_x2_v(__p0, __s1.val[0], __s1.val[1], 2); \ | 26260 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 2); \ |
| 27173 | }) | 26261 | }) |
| 27174 | #else | 26262 | #else |
| 27175 | #define vst1_s32_x2(__p0, __p1) __extension__ ({ \ | 26263 | #define vst1_s32_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27177,26 +26265,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27177,26 +26265,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27177 | int32x2x2_t __rev1; \ | 26265 | int32x2x2_t __rev1; \ |
| 27178 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 26266 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 27179 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26267 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27180 | __builtin_neon_vst1_x2_v(__p0, __rev1.val[0], __rev1.val[1], 2); \ | 26268 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 2); \ |
| 27181 | }) | 26269 | }) |
| 27182 | #endif | 26270 | #endif |
| 27183 | | 26271 | |
| 27184 | #ifdef __LITTLE_ENDIAN__ | | |
| 27185 | #define vst1_s64_x2(__p0, __p1) __extension__ ({ \ | | |
| 27186 | int64x1x2_t __s1 = __p1; \ | | |
| 27187 | __builtin_neon_vst1_x2_v(__p0, __s1.val[0], __s1.val[1], 3); \ | | |
| 27188 | }) | | |
| 27189 | #else | | |
| 27190 | #define vst1_s64_x2(__p0, __p1) __extension__ ({ \ | 26272 | #define vst1_s64_x2(__p0, __p1) __extension__ ({ \ |
| 27191 | int64x1x2_t __s1 = __p1; \ | 26273 | int64x1x2_t __s1 = __p1; \ |
| 27192 | __builtin_neon_vst1_x2_v(__p0, __s1.val[0], __s1.val[1], 3); \ | 26274 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 3); \ |
| 27193 | }) | 26275 | }) |
| 27194 | #endif | | |
| 27195 | | | |
| 27196 | #ifdef __LITTLE_ENDIAN__ | 26276 | #ifdef __LITTLE_ENDIAN__ |
| 27197 | #define vst1_s16_x2(__p0, __p1) __extension__ ({ \ | 26277 | #define vst1_s16_x2(__p0, __p1) __extension__ ({ \ |
| 27198 | int16x4x2_t __s1 = __p1; \ | 26278 | int16x4x2_t __s1 = __p1; \ |
| 27199 | __builtin_neon_vst1_x2_v(__p0, __s1.val[0], __s1.val[1], 1); \ | 26279 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 1); \ |
| 27200 | }) | 26280 | }) |
| 27201 | #else | 26281 | #else |
| 27202 | #define vst1_s16_x2(__p0, __p1) __extension__ ({ \ | 26282 | #define vst1_s16_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27204,7 +26284,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27204,7 +26284,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27204 | int16x4x2_t __rev1; \ | 26284 | int16x4x2_t __rev1; \ |
| 27205 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 26285 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 27206 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26286 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27207 | __builtin_neon_vst1_x2_v(__p0, __rev1.val[0], __rev1.val[1], 1); \ | 26287 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 1); \ |
| 27208 | }) | 26288 | }) |
| 27209 | #endif | 26289 | #endif |
| 27210 | | 26290 | |
| ... | @@ -27355,7 +26435,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27355,7 +26435,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27355 | #ifdef __LITTLE_ENDIAN__ | 26435 | #ifdef __LITTLE_ENDIAN__ |
| 27356 | #define vst1q_f32_x3(__p0, __p1) __extension__ ({ \ | 26436 | #define vst1q_f32_x3(__p0, __p1) __extension__ ({ \ |
| 27357 | float32x4x3_t __s1 = __p1; \ | 26437 | float32x4x3_t __s1 = __p1; \ |
| 27358 | __builtin_neon_vst1q_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 41); \ | 26438 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 41); \ |
| 27359 | }) | 26439 | }) |
| 27360 | #else | 26440 | #else |
| 27361 | #define vst1q_f32_x3(__p0, __p1) __extension__ ({ \ | 26441 | #define vst1q_f32_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27364,14 +26444,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27364,14 +26444,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27364 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 26444 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 27365 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26445 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27366 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 26446 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 27367 | __builtin_neon_vst1q_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 41); \ | 26447 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 41); \ |
| 27368 | }) | 26448 | }) |
| 27369 | #endif | 26449 | #endif |
| 27370 | | 26450 | |
| 27371 | #ifdef __LITTLE_ENDIAN__ | 26451 | #ifdef __LITTLE_ENDIAN__ |
| 27372 | #define vst1q_s32_x3(__p0, __p1) __extension__ ({ \ | 26452 | #define vst1q_s32_x3(__p0, __p1) __extension__ ({ \ |
| 27373 | int32x4x3_t __s1 = __p1; \ | 26453 | int32x4x3_t __s1 = __p1; \ |
| 27374 | __builtin_neon_vst1q_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 34); \ | 26454 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 34); \ |
| 27375 | }) | 26455 | }) |
| 27376 | #else | 26456 | #else |
| 27377 | #define vst1q_s32_x3(__p0, __p1) __extension__ ({ \ | 26457 | #define vst1q_s32_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27380,14 +26460,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27380,14 +26460,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27380 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 26460 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 27381 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26461 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27382 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 26462 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 27383 | __builtin_neon_vst1q_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 34); \ | 26463 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 34); \ |
| 27384 | }) | 26464 | }) |
| 27385 | #endif | 26465 | #endif |
| 27386 | | 26466 | |
| 27387 | #ifdef __LITTLE_ENDIAN__ | 26467 | #ifdef __LITTLE_ENDIAN__ |
| 27388 | #define vst1q_s64_x3(__p0, __p1) __extension__ ({ \ | 26468 | #define vst1q_s64_x3(__p0, __p1) __extension__ ({ \ |
| 27389 | int64x2x3_t __s1 = __p1; \ | 26469 | int64x2x3_t __s1 = __p1; \ |
| 27390 | __builtin_neon_vst1q_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 35); \ | 26470 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 35); \ |
| 27391 | }) | 26471 | }) |
| 27392 | #else | 26472 | #else |
| 27393 | #define vst1q_s64_x3(__p0, __p1) __extension__ ({ \ | 26473 | #define vst1q_s64_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27396,14 +26476,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27396,14 +26476,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27396 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 26476 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 27397 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26477 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27398 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 26478 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 27399 | __builtin_neon_vst1q_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 35); \ | 26479 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 35); \ |
| 27400 | }) | 26480 | }) |
| 27401 | #endif | 26481 | #endif |
| 27402 | | 26482 | |
| 27403 | #ifdef __LITTLE_ENDIAN__ | 26483 | #ifdef __LITTLE_ENDIAN__ |
| 27404 | #define vst1q_s16_x3(__p0, __p1) __extension__ ({ \ | 26484 | #define vst1q_s16_x3(__p0, __p1) __extension__ ({ \ |
| 27405 | int16x8x3_t __s1 = __p1; \ | 26485 | int16x8x3_t __s1 = __p1; \ |
| 27406 | __builtin_neon_vst1q_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 33); \ | 26486 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 33); \ |
| 27407 | }) | 26487 | }) |
| 27408 | #else | 26488 | #else |
| 27409 | #define vst1q_s16_x3(__p0, __p1) __extension__ ({ \ | 26489 | #define vst1q_s16_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27412,7 +26492,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27412,7 +26492,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27412 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 26492 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 27413 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 26493 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 27414 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 26494 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 27415 | __builtin_neon_vst1q_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 33); \ | 26495 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 33); \ |
| 27416 | }) | 26496 | }) |
| 27417 | #endif | 26497 | #endif |
| 27418 | | 26498 | |
| ... | @@ -27448,18 +26528,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27448,18 +26528,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27448 | }) | 26528 | }) |
| 27449 | #endif | 26529 | #endif |
| 27450 | | 26530 | |
| 27451 | #ifdef __LITTLE_ENDIAN__ | | |
| 27452 | #define vst1_u64_x3(__p0, __p1) __extension__ ({ \ | | |
| 27453 | uint64x1x3_t __s1 = __p1; \ | | |
| 27454 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 19); \ | | |
| 27455 | }) | | |
| 27456 | #else | | |
| 27457 | #define vst1_u64_x3(__p0, __p1) __extension__ ({ \ | 26531 | #define vst1_u64_x3(__p0, __p1) __extension__ ({ \ |
| 27458 | uint64x1x3_t __s1 = __p1; \ | 26532 | uint64x1x3_t __s1 = __p1; \ |
| 27459 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 19); \ | 26533 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 19); \ |
| 27460 | }) | 26534 | }) |
| 27461 | #endif | | |
| 27462 | | | |
| 27463 | #ifdef __LITTLE_ENDIAN__ | 26535 | #ifdef __LITTLE_ENDIAN__ |
| 27464 | #define vst1_u16_x3(__p0, __p1) __extension__ ({ \ | 26536 | #define vst1_u16_x3(__p0, __p1) __extension__ ({ \ |
| 27465 | uint16x4x3_t __s1 = __p1; \ | 26537 | uint16x4x3_t __s1 = __p1; \ |
| ... | @@ -27495,7 +26567,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27495,7 +26567,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27495 | #ifdef __LITTLE_ENDIAN__ | 26567 | #ifdef __LITTLE_ENDIAN__ |
| 27496 | #define vst1_f32_x3(__p0, __p1) __extension__ ({ \ | 26568 | #define vst1_f32_x3(__p0, __p1) __extension__ ({ \ |
| 27497 | float32x2x3_t __s1 = __p1; \ | 26569 | float32x2x3_t __s1 = __p1; \ |
| 27498 | __builtin_neon_vst1_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 9); \ | 26570 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 9); \ |
| 27499 | }) | 26571 | }) |
| 27500 | #else | 26572 | #else |
| 27501 | #define vst1_f32_x3(__p0, __p1) __extension__ ({ \ | 26573 | #define vst1_f32_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27504,14 +26576,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27504,14 +26576,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27504 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 26576 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 27505 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26577 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27506 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 26578 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 27507 | __builtin_neon_vst1_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 9); \ | 26579 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 9); \ |
| 27508 | }) | 26580 | }) |
| 27509 | #endif | 26581 | #endif |
| 27510 | | 26582 | |
| 27511 | #ifdef __LITTLE_ENDIAN__ | 26583 | #ifdef __LITTLE_ENDIAN__ |
| 27512 | #define vst1_s32_x3(__p0, __p1) __extension__ ({ \ | 26584 | #define vst1_s32_x3(__p0, __p1) __extension__ ({ \ |
| 27513 | int32x2x3_t __s1 = __p1; \ | 26585 | int32x2x3_t __s1 = __p1; \ |
| 27514 | __builtin_neon_vst1_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 2); \ | 26586 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 2); \ |
| 27515 | }) | 26587 | }) |
| 27516 | #else | 26588 | #else |
| 27517 | #define vst1_s32_x3(__p0, __p1) __extension__ ({ \ | 26589 | #define vst1_s32_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27520,26 +26592,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27520,26 +26592,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27520 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 26592 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 27521 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26593 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27522 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 26594 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 27523 | __builtin_neon_vst1_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 2); \ | 26595 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 2); \ |
| 27524 | }) | 26596 | }) |
| 27525 | #endif | 26597 | #endif |
| 27526 | | 26598 | |
| 27527 | #ifdef __LITTLE_ENDIAN__ | | |
| 27528 | #define vst1_s64_x3(__p0, __p1) __extension__ ({ \ | | |
| 27529 | int64x1x3_t __s1 = __p1; \ | | |
| 27530 | __builtin_neon_vst1_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 3); \ | | |
| 27531 | }) | | |
| 27532 | #else | | |
| 27533 | #define vst1_s64_x3(__p0, __p1) __extension__ ({ \ | 26599 | #define vst1_s64_x3(__p0, __p1) __extension__ ({ \ |
| 27534 | int64x1x3_t __s1 = __p1; \ | 26600 | int64x1x3_t __s1 = __p1; \ |
| 27535 | __builtin_neon_vst1_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 3); \ | 26601 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 3); \ |
| 27536 | }) | 26602 | }) |
| 27537 | #endif | | |
| 27538 | | | |
| 27539 | #ifdef __LITTLE_ENDIAN__ | 26603 | #ifdef __LITTLE_ENDIAN__ |
| 27540 | #define vst1_s16_x3(__p0, __p1) __extension__ ({ \ | 26604 | #define vst1_s16_x3(__p0, __p1) __extension__ ({ \ |
| 27541 | int16x4x3_t __s1 = __p1; \ | 26605 | int16x4x3_t __s1 = __p1; \ |
| 27542 | __builtin_neon_vst1_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 1); \ | 26606 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 1); \ |
| 27543 | }) | 26607 | }) |
| 27544 | #else | 26608 | #else |
| 27545 | #define vst1_s16_x3(__p0, __p1) __extension__ ({ \ | 26609 | #define vst1_s16_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27548,7 +26612,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27548,7 +26612,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27548 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 26612 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 27549 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26613 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27550 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 26614 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 27551 | __builtin_neon_vst1_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 1); \ | 26615 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 1); \ |
| 27552 | }) | 26616 | }) |
| 27553 | #endif | 26617 | #endif |
| 27554 | | 26618 | |
| ... | @@ -27708,7 +26772,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27708,7 +26772,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27708 | #ifdef __LITTLE_ENDIAN__ | 26772 | #ifdef __LITTLE_ENDIAN__ |
| 27709 | #define vst1q_f32_x4(__p0, __p1) __extension__ ({ \ | 26773 | #define vst1q_f32_x4(__p0, __p1) __extension__ ({ \ |
| 27710 | float32x4x4_t __s1 = __p1; \ | 26774 | float32x4x4_t __s1 = __p1; \ |
| 27711 | __builtin_neon_vst1q_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 41); \ | 26775 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 41); \ |
| 27712 | }) | 26776 | }) |
| 27713 | #else | 26777 | #else |
| 27714 | #define vst1q_f32_x4(__p0, __p1) __extension__ ({ \ | 26778 | #define vst1q_f32_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27718,14 +26782,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27718,14 +26782,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27718 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26782 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27719 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 26783 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 27720 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 26784 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 27721 | __builtin_neon_vst1q_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 41); \ | 26785 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 41); \ |
| 27722 | }) | 26786 | }) |
| 27723 | #endif | 26787 | #endif |
| 27724 | | 26788 | |
| 27725 | #ifdef __LITTLE_ENDIAN__ | 26789 | #ifdef __LITTLE_ENDIAN__ |
| 27726 | #define vst1q_s32_x4(__p0, __p1) __extension__ ({ \ | 26790 | #define vst1q_s32_x4(__p0, __p1) __extension__ ({ \ |
| 27727 | int32x4x4_t __s1 = __p1; \ | 26791 | int32x4x4_t __s1 = __p1; \ |
| 27728 | __builtin_neon_vst1q_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 34); \ | 26792 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 34); \ |
| 27729 | }) | 26793 | }) |
| 27730 | #else | 26794 | #else |
| 27731 | #define vst1q_s32_x4(__p0, __p1) __extension__ ({ \ | 26795 | #define vst1q_s32_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27735,14 +26799,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27735,14 +26799,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27735 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26799 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27736 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 26800 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 27737 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 26801 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 27738 | __builtin_neon_vst1q_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 34); \ | 26802 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 34); \ |
| 27739 | }) | 26803 | }) |
| 27740 | #endif | 26804 | #endif |
| 27741 | | 26805 | |
| 27742 | #ifdef __LITTLE_ENDIAN__ | 26806 | #ifdef __LITTLE_ENDIAN__ |
| 27743 | #define vst1q_s64_x4(__p0, __p1) __extension__ ({ \ | 26807 | #define vst1q_s64_x4(__p0, __p1) __extension__ ({ \ |
| 27744 | int64x2x4_t __s1 = __p1; \ | 26808 | int64x2x4_t __s1 = __p1; \ |
| 27745 | __builtin_neon_vst1q_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 35); \ | 26809 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 35); \ |
| 27746 | }) | 26810 | }) |
| 27747 | #else | 26811 | #else |
| 27748 | #define vst1q_s64_x4(__p0, __p1) __extension__ ({ \ | 26812 | #define vst1q_s64_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27752,14 +26816,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27752,14 +26816,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27752 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26816 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27753 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 26817 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 27754 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 26818 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 27755 | __builtin_neon_vst1q_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 35); \ | 26819 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 35); \ |
| 27756 | }) | 26820 | }) |
| 27757 | #endif | 26821 | #endif |
| 27758 | | 26822 | |
| 27759 | #ifdef __LITTLE_ENDIAN__ | 26823 | #ifdef __LITTLE_ENDIAN__ |
| 27760 | #define vst1q_s16_x4(__p0, __p1) __extension__ ({ \ | 26824 | #define vst1q_s16_x4(__p0, __p1) __extension__ ({ \ |
| 27761 | int16x8x4_t __s1 = __p1; \ | 26825 | int16x8x4_t __s1 = __p1; \ |
| 27762 | __builtin_neon_vst1q_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 33); \ | 26826 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 33); \ |
| 27763 | }) | 26827 | }) |
| 27764 | #else | 26828 | #else |
| 27765 | #define vst1q_s16_x4(__p0, __p1) __extension__ ({ \ | 26829 | #define vst1q_s16_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27769,7 +26833,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27769,7 +26833,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27769 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 26833 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 27770 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 26834 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 27771 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 26835 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 27772 | __builtin_neon_vst1q_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 33); \ | 26836 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 33); \ |
| 27773 | }) | 26837 | }) |
| 27774 | #endif | 26838 | #endif |
| 27775 | | 26839 | |
| ... | @@ -27807,18 +26871,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27807,18 +26871,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27807 | }) | 26871 | }) |
| 27808 | #endif | 26872 | #endif |
| 27809 | | 26873 | |
| 27810 | #ifdef __LITTLE_ENDIAN__ | | |
| 27811 | #define vst1_u64_x4(__p0, __p1) __extension__ ({ \ | | |
| 27812 | uint64x1x4_t __s1 = __p1; \ | | |
| 27813 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 19); \ | | |
| 27814 | }) | | |
| 27815 | #else | | |
| 27816 | #define vst1_u64_x4(__p0, __p1) __extension__ ({ \ | 26874 | #define vst1_u64_x4(__p0, __p1) __extension__ ({ \ |
| 27817 | uint64x1x4_t __s1 = __p1; \ | 26875 | uint64x1x4_t __s1 = __p1; \ |
| 27818 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 19); \ | 26876 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 19); \ |
| 27819 | }) | 26877 | }) |
| 27820 | #endif | | |
| 27821 | | | |
| 27822 | #ifdef __LITTLE_ENDIAN__ | 26878 | #ifdef __LITTLE_ENDIAN__ |
| 27823 | #define vst1_u16_x4(__p0, __p1) __extension__ ({ \ | 26879 | #define vst1_u16_x4(__p0, __p1) __extension__ ({ \ |
| 27824 | uint16x4x4_t __s1 = __p1; \ | 26880 | uint16x4x4_t __s1 = __p1; \ |
| ... | @@ -27856,7 +26912,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27856,7 +26912,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27856 | #ifdef __LITTLE_ENDIAN__ | 26912 | #ifdef __LITTLE_ENDIAN__ |
| 27857 | #define vst1_f32_x4(__p0, __p1) __extension__ ({ \ | 26913 | #define vst1_f32_x4(__p0, __p1) __extension__ ({ \ |
| 27858 | float32x2x4_t __s1 = __p1; \ | 26914 | float32x2x4_t __s1 = __p1; \ |
| 27859 | __builtin_neon_vst1_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 9); \ | 26915 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 9); \ |
| 27860 | }) | 26916 | }) |
| 27861 | #else | 26917 | #else |
| 27862 | #define vst1_f32_x4(__p0, __p1) __extension__ ({ \ | 26918 | #define vst1_f32_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27866,14 +26922,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27866,14 +26922,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27866 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26922 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27867 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 26923 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 27868 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 26924 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 27869 | __builtin_neon_vst1_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 9); \ | 26925 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 9); \ |
| 27870 | }) | 26926 | }) |
| 27871 | #endif | 26927 | #endif |
| 27872 | | 26928 | |
| 27873 | #ifdef __LITTLE_ENDIAN__ | 26929 | #ifdef __LITTLE_ENDIAN__ |
| 27874 | #define vst1_s32_x4(__p0, __p1) __extension__ ({ \ | 26930 | #define vst1_s32_x4(__p0, __p1) __extension__ ({ \ |
| 27875 | int32x2x4_t __s1 = __p1; \ | 26931 | int32x2x4_t __s1 = __p1; \ |
| 27876 | __builtin_neon_vst1_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 2); \ | 26932 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 2); \ |
| 27877 | }) | 26933 | }) |
| 27878 | #else | 26934 | #else |
| 27879 | #define vst1_s32_x4(__p0, __p1) __extension__ ({ \ | 26935 | #define vst1_s32_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27883,26 +26939,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27883,26 +26939,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27883 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 26939 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 27884 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 26940 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 27885 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 26941 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 27886 | __builtin_neon_vst1_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 2); \ | 26942 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 2); \ |
| 27887 | }) | 26943 | }) |
| 27888 | #endif | 26944 | #endif |
| 27889 | | 26945 | |
| 27890 | #ifdef __LITTLE_ENDIAN__ | | |
| 27891 | #define vst1_s64_x4(__p0, __p1) __extension__ ({ \ | | |
| 27892 | int64x1x4_t __s1 = __p1; \ | | |
| 27893 | __builtin_neon_vst1_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 3); \ | | |
| 27894 | }) | | |
| 27895 | #else | | |
| 27896 | #define vst1_s64_x4(__p0, __p1) __extension__ ({ \ | 26946 | #define vst1_s64_x4(__p0, __p1) __extension__ ({ \ |
| 27897 | int64x1x4_t __s1 = __p1; \ | 26947 | int64x1x4_t __s1 = __p1; \ |
| 27898 | __builtin_neon_vst1_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 3); \ | 26948 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 3); \ |
| 27899 | }) | 26949 | }) |
| 27900 | #endif | | |
| 27901 | | | |
| 27902 | #ifdef __LITTLE_ENDIAN__ | 26950 | #ifdef __LITTLE_ENDIAN__ |
| 27903 | #define vst1_s16_x4(__p0, __p1) __extension__ ({ \ | 26951 | #define vst1_s16_x4(__p0, __p1) __extension__ ({ \ |
| 27904 | int16x4x4_t __s1 = __p1; \ | 26952 | int16x4x4_t __s1 = __p1; \ |
| 27905 | __builtin_neon_vst1_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 1); \ | 26953 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 1); \ |
| 27906 | }) | 26954 | }) |
| 27907 | #else | 26955 | #else |
| 27908 | #define vst1_s16_x4(__p0, __p1) __extension__ ({ \ | 26956 | #define vst1_s16_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -27912,7 +26960,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -27912,7 +26960,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 27912 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 26960 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 27913 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 26961 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 27914 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 26962 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 27915 | __builtin_neon_vst1_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 1); \ | 26963 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 1); \ |
| 27916 | }) | 26964 | }) |
| 27917 | #endif | 26965 | #endif |
| 27918 | | 26966 | |
| ... | @@ -28039,7 +27087,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28039,7 +27087,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28039 | #ifdef __LITTLE_ENDIAN__ | 27087 | #ifdef __LITTLE_ENDIAN__ |
| 28040 | #define vst2q_f32(__p0, __p1) __extension__ ({ \ | 27088 | #define vst2q_f32(__p0, __p1) __extension__ ({ \ |
| 28041 | float32x4x2_t __s1 = __p1; \ | 27089 | float32x4x2_t __s1 = __p1; \ |
| 28042 | __builtin_neon_vst2q_v(__p0, __s1.val[0], __s1.val[1], 41); \ | 27090 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 41); \ |
| 28043 | }) | 27091 | }) |
| 28044 | #else | 27092 | #else |
| 28045 | #define vst2q_f32(__p0, __p1) __extension__ ({ \ | 27093 | #define vst2q_f32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28047,14 +27095,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28047,14 +27095,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28047 | float32x4x2_t __rev1; \ | 27095 | float32x4x2_t __rev1; \ |
| 28048 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27096 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28049 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27097 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28050 | __builtin_neon_vst2q_v(__p0, __rev1.val[0], __rev1.val[1], 41); \ | 27098 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 41); \ |
| 28051 | }) | 27099 | }) |
| 28052 | #endif | 27100 | #endif |
| 28053 | | 27101 | |
| 28054 | #ifdef __LITTLE_ENDIAN__ | 27102 | #ifdef __LITTLE_ENDIAN__ |
| 28055 | #define vst2q_s32(__p0, __p1) __extension__ ({ \ | 27103 | #define vst2q_s32(__p0, __p1) __extension__ ({ \ |
| 28056 | int32x4x2_t __s1 = __p1; \ | 27104 | int32x4x2_t __s1 = __p1; \ |
| 28057 | __builtin_neon_vst2q_v(__p0, __s1.val[0], __s1.val[1], 34); \ | 27105 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 34); \ |
| 28058 | }) | 27106 | }) |
| 28059 | #else | 27107 | #else |
| 28060 | #define vst2q_s32(__p0, __p1) __extension__ ({ \ | 27108 | #define vst2q_s32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28062,14 +27110,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28062,14 +27110,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28062 | int32x4x2_t __rev1; \ | 27110 | int32x4x2_t __rev1; \ |
| 28063 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27111 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28064 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27112 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28065 | __builtin_neon_vst2q_v(__p0, __rev1.val[0], __rev1.val[1], 34); \ | 27113 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 34); \ |
| 28066 | }) | 27114 | }) |
| 28067 | #endif | 27115 | #endif |
| 28068 | | 27116 | |
| 28069 | #ifdef __LITTLE_ENDIAN__ | 27117 | #ifdef __LITTLE_ENDIAN__ |
| 28070 | #define vst2q_s16(__p0, __p1) __extension__ ({ \ | 27118 | #define vst2q_s16(__p0, __p1) __extension__ ({ \ |
| 28071 | int16x8x2_t __s1 = __p1; \ | 27119 | int16x8x2_t __s1 = __p1; \ |
| 28072 | __builtin_neon_vst2q_v(__p0, __s1.val[0], __s1.val[1], 33); \ | 27120 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 33); \ |
| 28073 | }) | 27121 | }) |
| 28074 | #else | 27122 | #else |
| 28075 | #define vst2q_s16(__p0, __p1) __extension__ ({ \ | 27123 | #define vst2q_s16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28077,7 +27125,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28077,7 +27125,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28077 | int16x8x2_t __rev1; \ | 27125 | int16x8x2_t __rev1; \ |
| 28078 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27126 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28079 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27127 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28080 | __builtin_neon_vst2q_v(__p0, __rev1.val[0], __rev1.val[1], 33); \ | 27128 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 33); \ |
| 28081 | }) | 27129 | }) |
| 28082 | #endif | 27130 | #endif |
| 28083 | | 27131 | |
| ... | @@ -28111,18 +27159,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28111,18 +27159,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28111 | }) | 27159 | }) |
| 28112 | #endif | 27160 | #endif |
| 28113 | | 27161 | |
| 28114 | #ifdef __LITTLE_ENDIAN__ | | |
| 28115 | #define vst2_u64(__p0, __p1) __extension__ ({ \ | | |
| 28116 | uint64x1x2_t __s1 = __p1; \ | | |
| 28117 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 19); \ | | |
| 28118 | }) | | |
| 28119 | #else | | |
| 28120 | #define vst2_u64(__p0, __p1) __extension__ ({ \ | 27162 | #define vst2_u64(__p0, __p1) __extension__ ({ \ |
| 28121 | uint64x1x2_t __s1 = __p1; \ | 27163 | uint64x1x2_t __s1 = __p1; \ |
| 28122 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 19); \ | 27164 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 19); \ |
| 28123 | }) | 27165 | }) |
| 28124 | #endif | | |
| 28125 | | | |
| 28126 | #ifdef __LITTLE_ENDIAN__ | 27166 | #ifdef __LITTLE_ENDIAN__ |
| 28127 | #define vst2_u16(__p0, __p1) __extension__ ({ \ | 27167 | #define vst2_u16(__p0, __p1) __extension__ ({ \ |
| 28128 | uint16x4x2_t __s1 = __p1; \ | 27168 | uint16x4x2_t __s1 = __p1; \ |
| ... | @@ -28156,7 +27196,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28156,7 +27196,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28156 | #ifdef __LITTLE_ENDIAN__ | 27196 | #ifdef __LITTLE_ENDIAN__ |
| 28157 | #define vst2_f32(__p0, __p1) __extension__ ({ \ | 27197 | #define vst2_f32(__p0, __p1) __extension__ ({ \ |
| 28158 | float32x2x2_t __s1 = __p1; \ | 27198 | float32x2x2_t __s1 = __p1; \ |
| 28159 | __builtin_neon_vst2_v(__p0, __s1.val[0], __s1.val[1], 9); \ | 27199 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 9); \ |
| 28160 | }) | 27200 | }) |
| 28161 | #else | 27201 | #else |
| 28162 | #define vst2_f32(__p0, __p1) __extension__ ({ \ | 27202 | #define vst2_f32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28164,14 +27204,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28164,14 +27204,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28164 | float32x2x2_t __rev1; \ | 27204 | float32x2x2_t __rev1; \ |
| 28165 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 27205 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 28166 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 27206 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 28167 | __builtin_neon_vst2_v(__p0, __rev1.val[0], __rev1.val[1], 9); \ | 27207 | __builtin_neon_vst2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 9); \ |
| 28168 | }) | 27208 | }) |
| 28169 | #endif | 27209 | #endif |
| 28170 | | 27210 | |
| 28171 | #ifdef __LITTLE_ENDIAN__ | 27211 | #ifdef __LITTLE_ENDIAN__ |
| 28172 | #define vst2_s32(__p0, __p1) __extension__ ({ \ | 27212 | #define vst2_s32(__p0, __p1) __extension__ ({ \ |
| 28173 | int32x2x2_t __s1 = __p1; \ | 27213 | int32x2x2_t __s1 = __p1; \ |
| 28174 | __builtin_neon_vst2_v(__p0, __s1.val[0], __s1.val[1], 2); \ | 27214 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 2); \ |
| 28175 | }) | 27215 | }) |
| 28176 | #else | 27216 | #else |
| 28177 | #define vst2_s32(__p0, __p1) __extension__ ({ \ | 27217 | #define vst2_s32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28179,26 +27219,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28179,26 +27219,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28179 | int32x2x2_t __rev1; \ | 27219 | int32x2x2_t __rev1; \ |
| 28180 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 27220 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 28181 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 27221 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 28182 | __builtin_neon_vst2_v(__p0, __rev1.val[0], __rev1.val[1], 2); \ | 27222 | __builtin_neon_vst2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 2); \ |
| 28183 | }) | 27223 | }) |
| 28184 | #endif | 27224 | #endif |
| 28185 | | 27225 | |
| 28186 | #ifdef __LITTLE_ENDIAN__ | | |
| 28187 | #define vst2_s64(__p0, __p1) __extension__ ({ \ | | |
| 28188 | int64x1x2_t __s1 = __p1; \ | | |
| 28189 | __builtin_neon_vst2_v(__p0, __s1.val[0], __s1.val[1], 3); \ | | |
| 28190 | }) | | |
| 28191 | #else | | |
| 28192 | #define vst2_s64(__p0, __p1) __extension__ ({ \ | 27226 | #define vst2_s64(__p0, __p1) __extension__ ({ \ |
| 28193 | int64x1x2_t __s1 = __p1; \ | 27227 | int64x1x2_t __s1 = __p1; \ |
| 28194 | __builtin_neon_vst2_v(__p0, __s1.val[0], __s1.val[1], 3); \ | 27228 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 3); \ |
| 28195 | }) | 27229 | }) |
| 28196 | #endif | | |
| 28197 | | | |
| 28198 | #ifdef __LITTLE_ENDIAN__ | 27230 | #ifdef __LITTLE_ENDIAN__ |
| 28199 | #define vst2_s16(__p0, __p1) __extension__ ({ \ | 27231 | #define vst2_s16(__p0, __p1) __extension__ ({ \ |
| 28200 | int16x4x2_t __s1 = __p1; \ | 27232 | int16x4x2_t __s1 = __p1; \ |
| 28201 | __builtin_neon_vst2_v(__p0, __s1.val[0], __s1.val[1], 1); \ | 27233 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 1); \ |
| 28202 | }) | 27234 | }) |
| 28203 | #else | 27235 | #else |
| 28204 | #define vst2_s16(__p0, __p1) __extension__ ({ \ | 27236 | #define vst2_s16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28206,7 +27238,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28206,7 +27238,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28206 | int16x4x2_t __rev1; \ | 27238 | int16x4x2_t __rev1; \ |
| 28207 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27239 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28208 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27240 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28209 | __builtin_neon_vst2_v(__p0, __rev1.val[0], __rev1.val[1], 1); \ | 27241 | __builtin_neon_vst2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 1); \ |
| 28210 | }) | 27242 | }) |
| 28211 | #endif | 27243 | #endif |
| 28212 | | 27244 | |
| ... | @@ -28288,7 +27320,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28288,7 +27320,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28288 | #ifdef __LITTLE_ENDIAN__ | 27320 | #ifdef __LITTLE_ENDIAN__ |
| 28289 | #define vst2q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 27321 | #define vst2q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 28290 | float32x4x2_t __s1 = __p1; \ | 27322 | float32x4x2_t __s1 = __p1; \ |
| 28291 | __builtin_neon_vst2q_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 41); \ | 27323 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 41); \ |
| 28292 | }) | 27324 | }) |
| 28293 | #else | 27325 | #else |
| 28294 | #define vst2q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 27326 | #define vst2q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28296,14 +27328,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28296,14 +27328,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28296 | float32x4x2_t __rev1; \ | 27328 | float32x4x2_t __rev1; \ |
| 28297 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27329 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28298 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27330 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28299 | __builtin_neon_vst2q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 41); \ | 27331 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 41); \ |
| 28300 | }) | 27332 | }) |
| 28301 | #endif | 27333 | #endif |
| 28302 | | 27334 | |
| 28303 | #ifdef __LITTLE_ENDIAN__ | 27335 | #ifdef __LITTLE_ENDIAN__ |
| 28304 | #define vst2q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 27336 | #define vst2q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 28305 | int32x4x2_t __s1 = __p1; \ | 27337 | int32x4x2_t __s1 = __p1; \ |
| 28306 | __builtin_neon_vst2q_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 34); \ | 27338 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 34); \ |
| 28307 | }) | 27339 | }) |
| 28308 | #else | 27340 | #else |
| 28309 | #define vst2q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 27341 | #define vst2q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28311,14 +27343,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28311,14 +27343,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28311 | int32x4x2_t __rev1; \ | 27343 | int32x4x2_t __rev1; \ |
| 28312 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27344 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28313 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27345 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28314 | __builtin_neon_vst2q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 34); \ | 27346 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 34); \ |
| 28315 | }) | 27347 | }) |
| 28316 | #endif | 27348 | #endif |
| 28317 | | 27349 | |
| 28318 | #ifdef __LITTLE_ENDIAN__ | 27350 | #ifdef __LITTLE_ENDIAN__ |
| 28319 | #define vst2q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 27351 | #define vst2q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 28320 | int16x8x2_t __s1 = __p1; \ | 27352 | int16x8x2_t __s1 = __p1; \ |
| 28321 | __builtin_neon_vst2q_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 33); \ | 27353 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 33); \ |
| 28322 | }) | 27354 | }) |
| 28323 | #else | 27355 | #else |
| 28324 | #define vst2q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 27356 | #define vst2q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28326,7 +27358,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28326,7 +27358,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28326 | int16x8x2_t __rev1; \ | 27358 | int16x8x2_t __rev1; \ |
| 28327 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27359 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28328 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27360 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28329 | __builtin_neon_vst2q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 33); \ | 27361 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 33); \ |
| 28330 | }) | 27362 | }) |
| 28331 | #endif | 27363 | #endif |
| 28332 | | 27364 | |
| ... | @@ -28393,7 +27425,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28393,7 +27425,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28393 | #ifdef __LITTLE_ENDIAN__ | 27425 | #ifdef __LITTLE_ENDIAN__ |
| 28394 | #define vst2_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 27426 | #define vst2_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 28395 | float32x2x2_t __s1 = __p1; \ | 27427 | float32x2x2_t __s1 = __p1; \ |
| 28396 | __builtin_neon_vst2_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 9); \ | 27428 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 9); \ |
| 28397 | }) | 27429 | }) |
| 28398 | #else | 27430 | #else |
| 28399 | #define vst2_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 27431 | #define vst2_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28401,14 +27433,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28401,14 +27433,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28401 | float32x2x2_t __rev1; \ | 27433 | float32x2x2_t __rev1; \ |
| 28402 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 27434 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 28403 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 27435 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 28404 | __builtin_neon_vst2_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 9); \ | 27436 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 9); \ |
| 28405 | }) | 27437 | }) |
| 28406 | #endif | 27438 | #endif |
| 28407 | | 27439 | |
| 28408 | #ifdef __LITTLE_ENDIAN__ | 27440 | #ifdef __LITTLE_ENDIAN__ |
| 28409 | #define vst2_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 27441 | #define vst2_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 28410 | int32x2x2_t __s1 = __p1; \ | 27442 | int32x2x2_t __s1 = __p1; \ |
| 28411 | __builtin_neon_vst2_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 2); \ | 27443 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 2); \ |
| 28412 | }) | 27444 | }) |
| 28413 | #else | 27445 | #else |
| 28414 | #define vst2_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 27446 | #define vst2_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28416,14 +27448,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28416,14 +27448,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28416 | int32x2x2_t __rev1; \ | 27448 | int32x2x2_t __rev1; \ |
| 28417 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 27449 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 28418 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 27450 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 28419 | __builtin_neon_vst2_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 2); \ | 27451 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 2); \ |
| 28420 | }) | 27452 | }) |
| 28421 | #endif | 27453 | #endif |
| 28422 | | 27454 | |
| 28423 | #ifdef __LITTLE_ENDIAN__ | 27455 | #ifdef __LITTLE_ENDIAN__ |
| 28424 | #define vst2_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 27456 | #define vst2_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 28425 | int16x4x2_t __s1 = __p1; \ | 27457 | int16x4x2_t __s1 = __p1; \ |
| 28426 | __builtin_neon_vst2_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 1); \ | 27458 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 1); \ |
| 28427 | }) | 27459 | }) |
| 28428 | #else | 27460 | #else |
| 28429 | #define vst2_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 27461 | #define vst2_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28431,7 +27463,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28431,7 +27463,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28431 | int16x4x2_t __rev1; \ | 27463 | int16x4x2_t __rev1; \ |
| 28432 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27464 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28433 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27465 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28434 | __builtin_neon_vst2_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 1); \ | 27466 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 1); \ |
| 28435 | }) | 27467 | }) |
| 28436 | #endif | 27468 | #endif |
| 28437 | | 27469 | |
| ... | @@ -28566,7 +27598,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28566,7 +27598,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28566 | #ifdef __LITTLE_ENDIAN__ | 27598 | #ifdef __LITTLE_ENDIAN__ |
| 28567 | #define vst3q_f32(__p0, __p1) __extension__ ({ \ | 27599 | #define vst3q_f32(__p0, __p1) __extension__ ({ \ |
| 28568 | float32x4x3_t __s1 = __p1; \ | 27600 | float32x4x3_t __s1 = __p1; \ |
| 28569 | __builtin_neon_vst3q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 41); \ | 27601 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 41); \ |
| 28570 | }) | 27602 | }) |
| 28571 | #else | 27603 | #else |
| 28572 | #define vst3q_f32(__p0, __p1) __extension__ ({ \ | 27604 | #define vst3q_f32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28575,14 +27607,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28575,14 +27607,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28575 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27607 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28576 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27608 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28577 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 27609 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 28578 | __builtin_neon_vst3q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 41); \ | 27610 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 41); \ |
| 28579 | }) | 27611 | }) |
| 28580 | #endif | 27612 | #endif |
| 28581 | | 27613 | |
| 28582 | #ifdef __LITTLE_ENDIAN__ | 27614 | #ifdef __LITTLE_ENDIAN__ |
| 28583 | #define vst3q_s32(__p0, __p1) __extension__ ({ \ | 27615 | #define vst3q_s32(__p0, __p1) __extension__ ({ \ |
| 28584 | int32x4x3_t __s1 = __p1; \ | 27616 | int32x4x3_t __s1 = __p1; \ |
| 28585 | __builtin_neon_vst3q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 34); \ | 27617 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 34); \ |
| 28586 | }) | 27618 | }) |
| 28587 | #else | 27619 | #else |
| 28588 | #define vst3q_s32(__p0, __p1) __extension__ ({ \ | 27620 | #define vst3q_s32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28591,14 +27623,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28591,14 +27623,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28591 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27623 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28592 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27624 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28593 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 27625 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 28594 | __builtin_neon_vst3q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 34); \ | 27626 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 34); \ |
| 28595 | }) | 27627 | }) |
| 28596 | #endif | 27628 | #endif |
| 28597 | | 27629 | |
| 28598 | #ifdef __LITTLE_ENDIAN__ | 27630 | #ifdef __LITTLE_ENDIAN__ |
| 28599 | #define vst3q_s16(__p0, __p1) __extension__ ({ \ | 27631 | #define vst3q_s16(__p0, __p1) __extension__ ({ \ |
| 28600 | int16x8x3_t __s1 = __p1; \ | 27632 | int16x8x3_t __s1 = __p1; \ |
| 28601 | __builtin_neon_vst3q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 33); \ | 27633 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 33); \ |
| 28602 | }) | 27634 | }) |
| 28603 | #else | 27635 | #else |
| 28604 | #define vst3q_s16(__p0, __p1) __extension__ ({ \ | 27636 | #define vst3q_s16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28607,7 +27639,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28607,7 +27639,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28607 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27639 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28608 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27640 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28609 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27641 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28610 | __builtin_neon_vst3q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 33); \ | 27642 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 33); \ |
| 28611 | }) | 27643 | }) |
| 28612 | #endif | 27644 | #endif |
| 28613 | | 27645 | |
| ... | @@ -28643,18 +27675,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28643,18 +27675,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28643 | }) | 27675 | }) |
| 28644 | #endif | 27676 | #endif |
| 28645 | | 27677 | |
| 28646 | #ifdef __LITTLE_ENDIAN__ | | |
| 28647 | #define vst3_u64(__p0, __p1) __extension__ ({ \ | | |
| 28648 | uint64x1x3_t __s1 = __p1; \ | | |
| 28649 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 19); \ | | |
| 28650 | }) | | |
| 28651 | #else | | |
| 28652 | #define vst3_u64(__p0, __p1) __extension__ ({ \ | 27678 | #define vst3_u64(__p0, __p1) __extension__ ({ \ |
| 28653 | uint64x1x3_t __s1 = __p1; \ | 27679 | uint64x1x3_t __s1 = __p1; \ |
| 28654 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 19); \ | 27680 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 19); \ |
| 28655 | }) | 27681 | }) |
| 28656 | #endif | | |
| 28657 | | | |
| 28658 | #ifdef __LITTLE_ENDIAN__ | 27682 | #ifdef __LITTLE_ENDIAN__ |
| 28659 | #define vst3_u16(__p0, __p1) __extension__ ({ \ | 27683 | #define vst3_u16(__p0, __p1) __extension__ ({ \ |
| 28660 | uint16x4x3_t __s1 = __p1; \ | 27684 | uint16x4x3_t __s1 = __p1; \ |
| ... | @@ -28690,7 +27714,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28690,7 +27714,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28690 | #ifdef __LITTLE_ENDIAN__ | 27714 | #ifdef __LITTLE_ENDIAN__ |
| 28691 | #define vst3_f32(__p0, __p1) __extension__ ({ \ | 27715 | #define vst3_f32(__p0, __p1) __extension__ ({ \ |
| 28692 | float32x2x3_t __s1 = __p1; \ | 27716 | float32x2x3_t __s1 = __p1; \ |
| 28693 | __builtin_neon_vst3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 9); \ | 27717 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 9); \ |
| 28694 | }) | 27718 | }) |
| 28695 | #else | 27719 | #else |
| 28696 | #define vst3_f32(__p0, __p1) __extension__ ({ \ | 27720 | #define vst3_f32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28699,14 +27723,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28699,14 +27723,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28699 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 27723 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 28700 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 27724 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 28701 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 27725 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 28702 | __builtin_neon_vst3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 9); \ | 27726 | __builtin_neon_vst3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 9); \ |
| 28703 | }) | 27727 | }) |
| 28704 | #endif | 27728 | #endif |
| 28705 | | 27729 | |
| 28706 | #ifdef __LITTLE_ENDIAN__ | 27730 | #ifdef __LITTLE_ENDIAN__ |
| 28707 | #define vst3_s32(__p0, __p1) __extension__ ({ \ | 27731 | #define vst3_s32(__p0, __p1) __extension__ ({ \ |
| 28708 | int32x2x3_t __s1 = __p1; \ | 27732 | int32x2x3_t __s1 = __p1; \ |
| 28709 | __builtin_neon_vst3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 2); \ | 27733 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 2); \ |
| 28710 | }) | 27734 | }) |
| 28711 | #else | 27735 | #else |
| 28712 | #define vst3_s32(__p0, __p1) __extension__ ({ \ | 27736 | #define vst3_s32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28715,26 +27739,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28715,26 +27739,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28715 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 27739 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 28716 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 27740 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 28717 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 27741 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 28718 | __builtin_neon_vst3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 2); \ | 27742 | __builtin_neon_vst3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 2); \ |
| 28719 | }) | 27743 | }) |
| 28720 | #endif | 27744 | #endif |
| 28721 | | 27745 | |
| 28722 | #ifdef __LITTLE_ENDIAN__ | | |
| 28723 | #define vst3_s64(__p0, __p1) __extension__ ({ \ | | |
| 28724 | int64x1x3_t __s1 = __p1; \ | | |
| 28725 | __builtin_neon_vst3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 3); \ | | |
| 28726 | }) | | |
| 28727 | #else | | |
| 28728 | #define vst3_s64(__p0, __p1) __extension__ ({ \ | 27746 | #define vst3_s64(__p0, __p1) __extension__ ({ \ |
| 28729 | int64x1x3_t __s1 = __p1; \ | 27747 | int64x1x3_t __s1 = __p1; \ |
| 28730 | __builtin_neon_vst3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 3); \ | 27748 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 3); \ |
| 28731 | }) | 27749 | }) |
| 28732 | #endif | | |
| 28733 | | | |
| 28734 | #ifdef __LITTLE_ENDIAN__ | 27750 | #ifdef __LITTLE_ENDIAN__ |
| 28735 | #define vst3_s16(__p0, __p1) __extension__ ({ \ | 27751 | #define vst3_s16(__p0, __p1) __extension__ ({ \ |
| 28736 | int16x4x3_t __s1 = __p1; \ | 27752 | int16x4x3_t __s1 = __p1; \ |
| 28737 | __builtin_neon_vst3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 1); \ | 27753 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 1); \ |
| 28738 | }) | 27754 | }) |
| 28739 | #else | 27755 | #else |
| 28740 | #define vst3_s16(__p0, __p1) __extension__ ({ \ | 27756 | #define vst3_s16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -28743,7 +27759,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28743,7 +27759,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28743 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27759 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28744 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27760 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28745 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 27761 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 28746 | __builtin_neon_vst3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 1); \ | 27762 | __builtin_neon_vst3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 1); \ |
| 28747 | }) | 27763 | }) |
| 28748 | #endif | 27764 | #endif |
| 28749 | | 27765 | |
| ... | @@ -28830,7 +27846,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28830,7 +27846,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28830 | #ifdef __LITTLE_ENDIAN__ | 27846 | #ifdef __LITTLE_ENDIAN__ |
| 28831 | #define vst3q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 27847 | #define vst3q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 28832 | float32x4x3_t __s1 = __p1; \ | 27848 | float32x4x3_t __s1 = __p1; \ |
| 28833 | __builtin_neon_vst3q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 41); \ | 27849 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 41); \ |
| 28834 | }) | 27850 | }) |
| 28835 | #else | 27851 | #else |
| 28836 | #define vst3q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 27852 | #define vst3q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28839,14 +27855,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28839,14 +27855,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28839 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27855 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28840 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27856 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28841 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 27857 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 28842 | __builtin_neon_vst3q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 41); \ | 27858 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 41); \ |
| 28843 | }) | 27859 | }) |
| 28844 | #endif | 27860 | #endif |
| 28845 | | 27861 | |
| 28846 | #ifdef __LITTLE_ENDIAN__ | 27862 | #ifdef __LITTLE_ENDIAN__ |
| 28847 | #define vst3q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 27863 | #define vst3q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 28848 | int32x4x3_t __s1 = __p1; \ | 27864 | int32x4x3_t __s1 = __p1; \ |
| 28849 | __builtin_neon_vst3q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 34); \ | 27865 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 34); \ |
| 28850 | }) | 27866 | }) |
| 28851 | #else | 27867 | #else |
| 28852 | #define vst3q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 27868 | #define vst3q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28855,14 +27871,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28855,14 +27871,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28855 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27871 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28856 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 27872 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28857 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 27873 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 28858 | __builtin_neon_vst3q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 34); \ | 27874 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 34); \ |
| 28859 | }) | 27875 | }) |
| 28860 | #endif | 27876 | #endif |
| 28861 | | 27877 | |
| 28862 | #ifdef __LITTLE_ENDIAN__ | 27878 | #ifdef __LITTLE_ENDIAN__ |
| 28863 | #define vst3q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 27879 | #define vst3q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 28864 | int16x8x3_t __s1 = __p1; \ | 27880 | int16x8x3_t __s1 = __p1; \ |
| 28865 | __builtin_neon_vst3q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 33); \ | 27881 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 33); \ |
| 28866 | }) | 27882 | }) |
| 28867 | #else | 27883 | #else |
| 28868 | #define vst3q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 27884 | #define vst3q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28871,7 +27887,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28871,7 +27887,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28871 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27887 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28872 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27888 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28873 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 27889 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 28874 | __builtin_neon_vst3q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 33); \ | 27890 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 33); \ |
| 28875 | }) | 27891 | }) |
| 28876 | #endif | 27892 | #endif |
| 28877 | | 27893 | |
| ... | @@ -28942,7 +27958,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28942,7 +27958,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28942 | #ifdef __LITTLE_ENDIAN__ | 27958 | #ifdef __LITTLE_ENDIAN__ |
| 28943 | #define vst3_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 27959 | #define vst3_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 28944 | float32x2x3_t __s1 = __p1; \ | 27960 | float32x2x3_t __s1 = __p1; \ |
| 28945 | __builtin_neon_vst3_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 9); \ | 27961 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 9); \ |
| 28946 | }) | 27962 | }) |
| 28947 | #else | 27963 | #else |
| 28948 | #define vst3_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 27964 | #define vst3_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28951,14 +27967,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28951,14 +27967,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28951 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 27967 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 28952 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 27968 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 28953 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 27969 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 28954 | __builtin_neon_vst3_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 9); \ | 27970 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 9); \ |
| 28955 | }) | 27971 | }) |
| 28956 | #endif | 27972 | #endif |
| 28957 | | 27973 | |
| 28958 | #ifdef __LITTLE_ENDIAN__ | 27974 | #ifdef __LITTLE_ENDIAN__ |
| 28959 | #define vst3_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 27975 | #define vst3_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 28960 | int32x2x3_t __s1 = __p1; \ | 27976 | int32x2x3_t __s1 = __p1; \ |
| 28961 | __builtin_neon_vst3_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 2); \ | 27977 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 2); \ |
| 28962 | }) | 27978 | }) |
| 28963 | #else | 27979 | #else |
| 28964 | #define vst3_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 27980 | #define vst3_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28967,14 +27983,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28967,14 +27983,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28967 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 27983 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 28968 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 27984 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 28969 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 27985 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 28970 | __builtin_neon_vst3_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 2); \ | 27986 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 2); \ |
| 28971 | }) | 27987 | }) |
| 28972 | #endif | 27988 | #endif |
| 28973 | | 27989 | |
| 28974 | #ifdef __LITTLE_ENDIAN__ | 27990 | #ifdef __LITTLE_ENDIAN__ |
| 28975 | #define vst3_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 27991 | #define vst3_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 28976 | int16x4x3_t __s1 = __p1; \ | 27992 | int16x4x3_t __s1 = __p1; \ |
| 28977 | __builtin_neon_vst3_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 1); \ | 27993 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 1); \ |
| 28978 | }) | 27994 | }) |
| 28979 | #else | 27995 | #else |
| 28980 | #define vst3_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 27996 | #define vst3_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -28983,7 +27999,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -28983,7 +27999,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 28983 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 27999 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 28984 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 28000 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 28985 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 28001 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 28986 | __builtin_neon_vst3_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 1); \ | 28002 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 1); \ |
| 28987 | }) | 28003 | }) |
| 28988 | #endif | 28004 | #endif |
| 28989 | | 28005 | |
| ... | @@ -29126,7 +28142,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29126,7 +28142,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29126 | #ifdef __LITTLE_ENDIAN__ | 28142 | #ifdef __LITTLE_ENDIAN__ |
| 29127 | #define vst4q_f32(__p0, __p1) __extension__ ({ \ | 28143 | #define vst4q_f32(__p0, __p1) __extension__ ({ \ |
| 29128 | float32x4x4_t __s1 = __p1; \ | 28144 | float32x4x4_t __s1 = __p1; \ |
| 29129 | __builtin_neon_vst4q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 41); \ | 28145 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 41); \ |
| 29130 | }) | 28146 | }) |
| 29131 | #else | 28147 | #else |
| 29132 | #define vst4q_f32(__p0, __p1) __extension__ ({ \ | 28148 | #define vst4q_f32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -29136,14 +28152,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29136,14 +28152,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29136 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 28152 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 29137 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 28153 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 29138 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 28154 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 29139 | __builtin_neon_vst4q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 41); \ | 28155 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 41); \ |
| 29140 | }) | 28156 | }) |
| 29141 | #endif | 28157 | #endif |
| 29142 | | 28158 | |
| 29143 | #ifdef __LITTLE_ENDIAN__ | 28159 | #ifdef __LITTLE_ENDIAN__ |
| 29144 | #define vst4q_s32(__p0, __p1) __extension__ ({ \ | 28160 | #define vst4q_s32(__p0, __p1) __extension__ ({ \ |
| 29145 | int32x4x4_t __s1 = __p1; \ | 28161 | int32x4x4_t __s1 = __p1; \ |
| 29146 | __builtin_neon_vst4q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 34); \ | 28162 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 34); \ |
| 29147 | }) | 28163 | }) |
| 29148 | #else | 28164 | #else |
| 29149 | #define vst4q_s32(__p0, __p1) __extension__ ({ \ | 28165 | #define vst4q_s32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -29153,14 +28169,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29153,14 +28169,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29153 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 28169 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 29154 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 28170 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 29155 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 28171 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 29156 | __builtin_neon_vst4q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 34); \ | 28172 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 34); \ |
| 29157 | }) | 28173 | }) |
| 29158 | #endif | 28174 | #endif |
| 29159 | | 28175 | |
| 29160 | #ifdef __LITTLE_ENDIAN__ | 28176 | #ifdef __LITTLE_ENDIAN__ |
| 29161 | #define vst4q_s16(__p0, __p1) __extension__ ({ \ | 28177 | #define vst4q_s16(__p0, __p1) __extension__ ({ \ |
| 29162 | int16x8x4_t __s1 = __p1; \ | 28178 | int16x8x4_t __s1 = __p1; \ |
| 29163 | __builtin_neon_vst4q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 33); \ | 28179 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 33); \ |
| 29164 | }) | 28180 | }) |
| 29165 | #else | 28181 | #else |
| 29166 | #define vst4q_s16(__p0, __p1) __extension__ ({ \ | 28182 | #define vst4q_s16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -29170,7 +28186,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29170,7 +28186,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29170 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 28186 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 29171 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 28187 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 29172 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 28188 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 29173 | __builtin_neon_vst4q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 33); \ | 28189 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 33); \ |
| 29174 | }) | 28190 | }) |
| 29175 | #endif | 28191 | #endif |
| 29176 | | 28192 | |
| ... | @@ -29208,18 +28224,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29208,18 +28224,10 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29208 | }) | 28224 | }) |
| 29209 | #endif | 28225 | #endif |
| 29210 | | 28226 | |
| 29211 | #ifdef __LITTLE_ENDIAN__ | | |
| 29212 | #define vst4_u64(__p0, __p1) __extension__ ({ \ | 28227 | #define vst4_u64(__p0, __p1) __extension__ ({ \ |
| 29213 | uint64x1x4_t __s1 = __p1; \ | 28228 | uint64x1x4_t __s1 = __p1; \ |
| 29214 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 19); \ | 28229 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 19); \ |
| 29215 | }) | 28230 | }) |
| 29216 | #else | | |
| 29217 | #define vst4_u64(__p0, __p1) __extension__ ({ \ | | |
| 29218 | uint64x1x4_t __s1 = __p1; \ | | |
| 29219 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 19); \ | | |
| 29220 | }) | | |
| 29221 | #endif | | |
| 29222 | | | |
| 29223 | #ifdef __LITTLE_ENDIAN__ | 28231 | #ifdef __LITTLE_ENDIAN__ |
| 29224 | #define vst4_u16(__p0, __p1) __extension__ ({ \ | 28232 | #define vst4_u16(__p0, __p1) __extension__ ({ \ |
| 29225 | uint16x4x4_t __s1 = __p1; \ | 28233 | uint16x4x4_t __s1 = __p1; \ |
| ... | @@ -29257,7 +28265,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29257,7 +28265,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29257 | #ifdef __LITTLE_ENDIAN__ | 28265 | #ifdef __LITTLE_ENDIAN__ |
| 29258 | #define vst4_f32(__p0, __p1) __extension__ ({ \ | 28266 | #define vst4_f32(__p0, __p1) __extension__ ({ \ |
| 29259 | float32x2x4_t __s1 = __p1; \ | 28267 | float32x2x4_t __s1 = __p1; \ |
| 29260 | __builtin_neon_vst4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 9); \ | 28268 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 9); \ |
| 29261 | }) | 28269 | }) |
| 29262 | #else | 28270 | #else |
| 29263 | #define vst4_f32(__p0, __p1) __extension__ ({ \ | 28271 | #define vst4_f32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -29267,14 +28275,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29267,14 +28275,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29267 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 28275 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 29268 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 28276 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 29269 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 28277 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 29270 | __builtin_neon_vst4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 9); \ | 28278 | __builtin_neon_vst4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 9); \ |
| 29271 | }) | 28279 | }) |
| 29272 | #endif | 28280 | #endif |
| 29273 | | 28281 | |
| 29274 | #ifdef __LITTLE_ENDIAN__ | 28282 | #ifdef __LITTLE_ENDIAN__ |
| 29275 | #define vst4_s32(__p0, __p1) __extension__ ({ \ | 28283 | #define vst4_s32(__p0, __p1) __extension__ ({ \ |
| 29276 | int32x2x4_t __s1 = __p1; \ | 28284 | int32x2x4_t __s1 = __p1; \ |
| 29277 | __builtin_neon_vst4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 2); \ | 28285 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 2); \ |
| 29278 | }) | 28286 | }) |
| 29279 | #else | 28287 | #else |
| 29280 | #define vst4_s32(__p0, __p1) __extension__ ({ \ | 28288 | #define vst4_s32(__p0, __p1) __extension__ ({ \ |
| ... | @@ -29284,26 +28292,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29284,26 +28292,18 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29284 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 28292 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 29285 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 28293 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 29286 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 28294 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 29287 | __builtin_neon_vst4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 2); \ | 28295 | __builtin_neon_vst4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 2); \ |
| 29288 | }) | 28296 | }) |
| 29289 | #endif | 28297 | #endif |
| 29290 | | 28298 | |
| 29291 | #ifdef __LITTLE_ENDIAN__ | | |
| 29292 | #define vst4_s64(__p0, __p1) __extension__ ({ \ | 28299 | #define vst4_s64(__p0, __p1) __extension__ ({ \ |
| 29293 | int64x1x4_t __s1 = __p1; \ | 28300 | int64x1x4_t __s1 = __p1; \ |
| 29294 | __builtin_neon_vst4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 3); \ | 28301 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 3); \ |
| 29295 | }) | 28302 | }) |
| 29296 | #else | | |
| 29297 | #define vst4_s64(__p0, __p1) __extension__ ({ \ | | |
| 29298 | int64x1x4_t __s1 = __p1; \ | | |
| 29299 | __builtin_neon_vst4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 3); \ | | |
| 29300 | }) | | |
| 29301 | #endif | | |
| 29302 | | | |
| 29303 | #ifdef __LITTLE_ENDIAN__ | 28303 | #ifdef __LITTLE_ENDIAN__ |
| 29304 | #define vst4_s16(__p0, __p1) __extension__ ({ \ | 28304 | #define vst4_s16(__p0, __p1) __extension__ ({ \ |
| 29305 | int16x4x4_t __s1 = __p1; \ | 28305 | int16x4x4_t __s1 = __p1; \ |
| 29306 | __builtin_neon_vst4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 1); \ | 28306 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 1); \ |
| 29307 | }) | 28307 | }) |
| 29308 | #else | 28308 | #else |
| 29309 | #define vst4_s16(__p0, __p1) __extension__ ({ \ | 28309 | #define vst4_s16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -29313,7 +28313,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29313,7 +28313,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29313 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 28313 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 29314 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 28314 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 29315 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 28315 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 29316 | __builtin_neon_vst4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 1); \ | 28316 | __builtin_neon_vst4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 1); \ |
| 29317 | }) | 28317 | }) |
| 29318 | #endif | 28318 | #endif |
| 29319 | | 28319 | |
| ... | @@ -29405,7 +28405,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29405,7 +28405,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29405 | #ifdef __LITTLE_ENDIAN__ | 28405 | #ifdef __LITTLE_ENDIAN__ |
| 29406 | #define vst4q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 28406 | #define vst4q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 29407 | float32x4x4_t __s1 = __p1; \ | 28407 | float32x4x4_t __s1 = __p1; \ |
| 29408 | __builtin_neon_vst4q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 41); \ | 28408 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 41); \ |
| 29409 | }) | 28409 | }) |
| 29410 | #else | 28410 | #else |
| 29411 | #define vst4q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 28411 | #define vst4q_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -29415,14 +28415,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29415,14 +28415,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29415 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 28415 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 29416 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 28416 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 29417 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 28417 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 29418 | __builtin_neon_vst4q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 41); \ | 28418 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 41); \ |
| 29419 | }) | 28419 | }) |
| 29420 | #endif | 28420 | #endif |
| 29421 | | 28421 | |
| 29422 | #ifdef __LITTLE_ENDIAN__ | 28422 | #ifdef __LITTLE_ENDIAN__ |
| 29423 | #define vst4q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 28423 | #define vst4q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 29424 | int32x4x4_t __s1 = __p1; \ | 28424 | int32x4x4_t __s1 = __p1; \ |
| 29425 | __builtin_neon_vst4q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 34); \ | 28425 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 34); \ |
| 29426 | }) | 28426 | }) |
| 29427 | #else | 28427 | #else |
| 29428 | #define vst4q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 28428 | #define vst4q_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -29432,14 +28432,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29432,14 +28432,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29432 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 28432 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 29433 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 28433 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 29434 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 28434 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 29435 | __builtin_neon_vst4q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 34); \ | 28435 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 34); \ |
| 29436 | }) | 28436 | }) |
| 29437 | #endif | 28437 | #endif |
| 29438 | | 28438 | |
| 29439 | #ifdef __LITTLE_ENDIAN__ | 28439 | #ifdef __LITTLE_ENDIAN__ |
| 29440 | #define vst4q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 28440 | #define vst4q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 29441 | int16x8x4_t __s1 = __p1; \ | 28441 | int16x8x4_t __s1 = __p1; \ |
| 29442 | __builtin_neon_vst4q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 33); \ | 28442 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 33); \ |
| 29443 | }) | 28443 | }) |
| 29444 | #else | 28444 | #else |
| 29445 | #define vst4q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 28445 | #define vst4q_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -29449,7 +28449,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29449,7 +28449,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29449 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 28449 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 29450 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 28450 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 29451 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 28451 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 29452 | __builtin_neon_vst4q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 33); \ | 28452 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 33); \ |
| 29453 | }) | 28453 | }) |
| 29454 | #endif | 28454 | #endif |
| 29455 | | 28455 | |
| ... | @@ -29524,7 +28524,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29524,7 +28524,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29524 | #ifdef __LITTLE_ENDIAN__ | 28524 | #ifdef __LITTLE_ENDIAN__ |
| 29525 | #define vst4_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 28525 | #define vst4_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| 29526 | float32x2x4_t __s1 = __p1; \ | 28526 | float32x2x4_t __s1 = __p1; \ |
| 29527 | __builtin_neon_vst4_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 9); \ | 28527 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 9); \ |
| 29528 | }) | 28528 | }) |
| 29529 | #else | 28529 | #else |
| 29530 | #define vst4_lane_f32(__p0, __p1, __p2) __extension__ ({ \ | 28530 | #define vst4_lane_f32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -29534,14 +28534,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29534,14 +28534,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29534 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 28534 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 29535 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 28535 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 29536 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 28536 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 29537 | __builtin_neon_vst4_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 9); \ | 28537 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 9); \ |
| 29538 | }) | 28538 | }) |
| 29539 | #endif | 28539 | #endif |
| 29540 | | 28540 | |
| 29541 | #ifdef __LITTLE_ENDIAN__ | 28541 | #ifdef __LITTLE_ENDIAN__ |
| 29542 | #define vst4_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 28542 | #define vst4_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| 29543 | int32x2x4_t __s1 = __p1; \ | 28543 | int32x2x4_t __s1 = __p1; \ |
| 29544 | __builtin_neon_vst4_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 2); \ | 28544 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 2); \ |
| 29545 | }) | 28545 | }) |
| 29546 | #else | 28546 | #else |
| 29547 | #define vst4_lane_s32(__p0, __p1, __p2) __extension__ ({ \ | 28547 | #define vst4_lane_s32(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -29551,14 +28551,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29551,14 +28551,14 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29551 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 28551 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 29552 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 28552 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 29553 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 28553 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 29554 | __builtin_neon_vst4_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 2); \ | 28554 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 2); \ |
| 29555 | }) | 28555 | }) |
| 29556 | #endif | 28556 | #endif |
| 29557 | | 28557 | |
| 29558 | #ifdef __LITTLE_ENDIAN__ | 28558 | #ifdef __LITTLE_ENDIAN__ |
| 29559 | #define vst4_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 28559 | #define vst4_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| 29560 | int16x4x4_t __s1 = __p1; \ | 28560 | int16x4x4_t __s1 = __p1; \ |
| 29561 | __builtin_neon_vst4_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 1); \ | 28561 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 1); \ |
| 29562 | }) | 28562 | }) |
| 29563 | #else | 28563 | #else |
| 29564 | #define vst4_lane_s16(__p0, __p1, __p2) __extension__ ({ \ | 28564 | #define vst4_lane_s16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -29568,7 +28568,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -29568,7 +28568,7 @@ __ai int16x4_t vshl_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29568 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 28568 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 29569 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 28569 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 29570 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 28570 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 29571 | __builtin_neon_vst4_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 1); \ | 28571 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 1); \ |
| 29572 | }) | 28572 | }) |
| 29573 | #endif | 28573 | #endif |
| 29574 | | 28574 | |
| ... | @@ -29759,20 +28759,11 @@ __ai uint32x2_t vsub_u32(uint32x2_t __p0, uint32x2_t __p1) { | ... | @@ -29759,20 +28759,11 @@ __ai uint32x2_t vsub_u32(uint32x2_t __p0, uint32x2_t __p1) { |
| 29759 | } | 28759 | } |
| 29760 | #endif | 28760 | #endif |
| 29761 | | 28761 | |
| 29762 | #ifdef __LITTLE_ENDIAN__ | | |
| 29763 | __ai uint64x1_t vsub_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 29764 | uint64x1_t __ret; | | |
| 29765 | __ret = __p0 - __p1; | | |
| 29766 | return __ret; | | |
| 29767 | } | | |
| 29768 | #else | | |
| 29769 | __ai uint64x1_t vsub_u64(uint64x1_t __p0, uint64x1_t __p1) { | 28762 | __ai uint64x1_t vsub_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 29770 | uint64x1_t __ret; | 28763 | uint64x1_t __ret; |
| 29771 | __ret = __p0 - __p1; | 28764 | __ret = __p0 - __p1; |
| 29772 | return __ret; | 28765 | return __ret; |
| 29773 | } | 28766 | } |
| 29774 | #endif | | |
| 29775 | | | |
| 29776 | #ifdef __LITTLE_ENDIAN__ | 28767 | #ifdef __LITTLE_ENDIAN__ |
| 29777 | __ai uint16x4_t vsub_u16(uint16x4_t __p0, uint16x4_t __p1) { | 28768 | __ai uint16x4_t vsub_u16(uint16x4_t __p0, uint16x4_t __p1) { |
| 29778 | uint16x4_t __ret; | 28769 | uint16x4_t __ret; |
| ... | @@ -29841,20 +28832,11 @@ __ai int32x2_t vsub_s32(int32x2_t __p0, int32x2_t __p1) { | ... | @@ -29841,20 +28832,11 @@ __ai int32x2_t vsub_s32(int32x2_t __p0, int32x2_t __p1) { |
| 29841 | } | 28832 | } |
| 29842 | #endif | 28833 | #endif |
| 29843 | | 28834 | |
| 29844 | #ifdef __LITTLE_ENDIAN__ | | |
| 29845 | __ai int64x1_t vsub_s64(int64x1_t __p0, int64x1_t __p1) { | 28835 | __ai int64x1_t vsub_s64(int64x1_t __p0, int64x1_t __p1) { |
| 29846 | int64x1_t __ret; | 28836 | int64x1_t __ret; |
| 29847 | __ret = __p0 - __p1; | 28837 | __ret = __p0 - __p1; |
| 29848 | return __ret; | 28838 | return __ret; |
| 29849 | } | 28839 | } |
| 29850 | #else | | |
| 29851 | __ai int64x1_t vsub_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 29852 | int64x1_t __ret; | | |
| 29853 | __ret = __p0 - __p1; | | |
| 29854 | return __ret; | | |
| 29855 | } | | |
| 29856 | #endif | | |
| 29857 | | | |
| 29858 | #ifdef __LITTLE_ENDIAN__ | 28840 | #ifdef __LITTLE_ENDIAN__ |
| 29859 | __ai int16x4_t vsub_s16(int16x4_t __p0, int16x4_t __p1) { | 28841 | __ai int16x4_t vsub_s16(int16x4_t __p0, int16x4_t __p1) { |
| 29860 | int16x4_t __ret; | 28842 | int16x4_t __ret; |
| ... | @@ -32085,3721 +31067,1345 @@ __ai int16x4x2_t vzip_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -32085,3721 +31067,1345 @@ __ai int16x4x2_t vzip_s16(int16x4_t __p0, int16x4_t __p1) { |
| 32085 | }) | 31067 | }) |
| 32086 | #endif | 31068 | #endif |
| 32087 | | 31069 | |
| 32088 | #ifdef __LITTLE_ENDIAN__ | | |
| 32089 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { | | |
| 32090 | poly8x8_t __ret; | | |
| 32091 | __ret = (poly8x8_t)(__p0); | | |
| 32092 | return __ret; | | |
| 32093 | } | | |
| 32094 | #else | | |
| 32095 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { | 31070 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { |
| 32096 | poly8x8_t __ret; | 31071 | poly8x8_t __ret; |
| 32097 | __ret = (poly8x8_t)(__p0); | 31072 | __ret = (poly8x8_t)(__p0); |
| 32098 | return __ret; | 31073 | return __ret; |
| 32099 | } | 31074 | } |
| 32100 | #endif | | |
| 32101 | | | |
| 32102 | #ifdef __LITTLE_ENDIAN__ | | |
| 32103 | __ai poly8x8_t vreinterpret_p8_u8(uint8x8_t __p0) { | | |
| 32104 | poly8x8_t __ret; | | |
| 32105 | __ret = (poly8x8_t)(__p0); | | |
| 32106 | return __ret; | | |
| 32107 | } | | |
| 32108 | #else | | |
| 32109 | __ai poly8x8_t vreinterpret_p8_u8(uint8x8_t __p0) { | 31075 | __ai poly8x8_t vreinterpret_p8_u8(uint8x8_t __p0) { |
| 32110 | poly8x8_t __ret; | 31076 | poly8x8_t __ret; |
| 32111 | __ret = (poly8x8_t)(__p0); | 31077 | __ret = (poly8x8_t)(__p0); |
| 32112 | return __ret; | 31078 | return __ret; |
| 32113 | } | 31079 | } |
| 32114 | #endif | | |
| 32115 | | | |
| 32116 | #ifdef __LITTLE_ENDIAN__ | | |
| 32117 | __ai poly8x8_t vreinterpret_p8_u32(uint32x2_t __p0) { | | |
| 32118 | poly8x8_t __ret; | | |
| 32119 | __ret = (poly8x8_t)(__p0); | | |
| 32120 | return __ret; | | |
| 32121 | } | | |
| 32122 | #else | | |
| 32123 | __ai poly8x8_t vreinterpret_p8_u32(uint32x2_t __p0) { | 31080 | __ai poly8x8_t vreinterpret_p8_u32(uint32x2_t __p0) { |
| 32124 | poly8x8_t __ret; | 31081 | poly8x8_t __ret; |
| 32125 | __ret = (poly8x8_t)(__p0); | 31082 | __ret = (poly8x8_t)(__p0); |
| 32126 | return __ret; | 31083 | return __ret; |
| 32127 | } | 31084 | } |
| 32128 | #endif | | |
| 32129 | | | |
| 32130 | #ifdef __LITTLE_ENDIAN__ | | |
| 32131 | __ai poly8x8_t vreinterpret_p8_u64(uint64x1_t __p0) { | | |
| 32132 | poly8x8_t __ret; | | |
| 32133 | __ret = (poly8x8_t)(__p0); | | |
| 32134 | return __ret; | | |
| 32135 | } | | |
| 32136 | #else | | |
| 32137 | __ai poly8x8_t vreinterpret_p8_u64(uint64x1_t __p0) { | 31085 | __ai poly8x8_t vreinterpret_p8_u64(uint64x1_t __p0) { |
| 32138 | poly8x8_t __ret; | 31086 | poly8x8_t __ret; |
| 32139 | __ret = (poly8x8_t)(__p0); | 31087 | __ret = (poly8x8_t)(__p0); |
| 32140 | return __ret; | 31088 | return __ret; |
| 32141 | } | 31089 | } |
| 32142 | #endif | | |
| 32143 | | | |
| 32144 | #ifdef __LITTLE_ENDIAN__ | | |
| 32145 | __ai poly8x8_t vreinterpret_p8_u16(uint16x4_t __p0) { | | |
| 32146 | poly8x8_t __ret; | | |
| 32147 | __ret = (poly8x8_t)(__p0); | | |
| 32148 | return __ret; | | |
| 32149 | } | | |
| 32150 | #else | | |
| 32151 | __ai poly8x8_t vreinterpret_p8_u16(uint16x4_t __p0) { | 31090 | __ai poly8x8_t vreinterpret_p8_u16(uint16x4_t __p0) { |
| 32152 | poly8x8_t __ret; | 31091 | poly8x8_t __ret; |
| 32153 | __ret = (poly8x8_t)(__p0); | 31092 | __ret = (poly8x8_t)(__p0); |
| 32154 | return __ret; | 31093 | return __ret; |
| 32155 | } | 31094 | } |
| 32156 | #endif | | |
| 32157 | | | |
| 32158 | #ifdef __LITTLE_ENDIAN__ | | |
| 32159 | __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { | | |
| 32160 | poly8x8_t __ret; | | |
| 32161 | __ret = (poly8x8_t)(__p0); | | |
| 32162 | return __ret; | | |
| 32163 | } | | |
| 32164 | #else | | |
| 32165 | __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { | 31095 | __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { |
| 32166 | poly8x8_t __ret; | 31096 | poly8x8_t __ret; |
| 32167 | __ret = (poly8x8_t)(__p0); | 31097 | __ret = (poly8x8_t)(__p0); |
| 32168 | return __ret; | 31098 | return __ret; |
| 32169 | } | 31099 | } |
| 32170 | #endif | | |
| 32171 | | | |
| 32172 | #ifdef __LITTLE_ENDIAN__ | | |
| 32173 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { | | |
| 32174 | poly8x8_t __ret; | | |
| 32175 | __ret = (poly8x8_t)(__p0); | | |
| 32176 | return __ret; | | |
| 32177 | } | | |
| 32178 | #else | | |
| 32179 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { | 31100 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { |
| 32180 | poly8x8_t __ret; | 31101 | poly8x8_t __ret; |
| 32181 | __ret = (poly8x8_t)(__p0); | 31102 | __ret = (poly8x8_t)(__p0); |
| 32182 | return __ret; | 31103 | return __ret; |
| 32183 | } | 31104 | } |
| 32184 | #endif | | |
| 32185 | | | |
| 32186 | #ifdef __LITTLE_ENDIAN__ | | |
| 32187 | __ai poly8x8_t vreinterpret_p8_f16(float16x4_t __p0) { | | |
| 32188 | poly8x8_t __ret; | | |
| 32189 | __ret = (poly8x8_t)(__p0); | | |
| 32190 | return __ret; | | |
| 32191 | } | | |
| 32192 | #else | | |
| 32193 | __ai poly8x8_t vreinterpret_p8_f16(float16x4_t __p0) { | 31105 | __ai poly8x8_t vreinterpret_p8_f16(float16x4_t __p0) { |
| 32194 | poly8x8_t __ret; | 31106 | poly8x8_t __ret; |
| 32195 | __ret = (poly8x8_t)(__p0); | 31107 | __ret = (poly8x8_t)(__p0); |
| 32196 | return __ret; | 31108 | return __ret; |
| 32197 | } | 31109 | } |
| 32198 | #endif | | |
| 32199 | | | |
| 32200 | #ifdef __LITTLE_ENDIAN__ | | |
| 32201 | __ai poly8x8_t vreinterpret_p8_s32(int32x2_t __p0) { | | |
| 32202 | poly8x8_t __ret; | | |
| 32203 | __ret = (poly8x8_t)(__p0); | | |
| 32204 | return __ret; | | |
| 32205 | } | | |
| 32206 | #else | | |
| 32207 | __ai poly8x8_t vreinterpret_p8_s32(int32x2_t __p0) { | 31110 | __ai poly8x8_t vreinterpret_p8_s32(int32x2_t __p0) { |
| 32208 | poly8x8_t __ret; | 31111 | poly8x8_t __ret; |
| 32209 | __ret = (poly8x8_t)(__p0); | 31112 | __ret = (poly8x8_t)(__p0); |
| 32210 | return __ret; | 31113 | return __ret; |
| 32211 | } | 31114 | } |
| 32212 | #endif | | |
| 32213 | | | |
| 32214 | #ifdef __LITTLE_ENDIAN__ | | |
| 32215 | __ai poly8x8_t vreinterpret_p8_s64(int64x1_t __p0) { | | |
| 32216 | poly8x8_t __ret; | | |
| 32217 | __ret = (poly8x8_t)(__p0); | | |
| 32218 | return __ret; | | |
| 32219 | } | | |
| 32220 | #else | | |
| 32221 | __ai poly8x8_t vreinterpret_p8_s64(int64x1_t __p0) { | 31115 | __ai poly8x8_t vreinterpret_p8_s64(int64x1_t __p0) { |
| 32222 | poly8x8_t __ret; | 31116 | poly8x8_t __ret; |
| 32223 | __ret = (poly8x8_t)(__p0); | 31117 | __ret = (poly8x8_t)(__p0); |
| 32224 | return __ret; | 31118 | return __ret; |
| 32225 | } | 31119 | } |
| 32226 | #endif | | |
| 32227 | | | |
| 32228 | #ifdef __LITTLE_ENDIAN__ | | |
| 32229 | __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { | | |
| 32230 | poly8x8_t __ret; | | |
| 32231 | __ret = (poly8x8_t)(__p0); | | |
| 32232 | return __ret; | | |
| 32233 | } | | |
| 32234 | #else | | |
| 32235 | __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { | 31120 | __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { |
| 32236 | poly8x8_t __ret; | 31121 | poly8x8_t __ret; |
| 32237 | __ret = (poly8x8_t)(__p0); | 31122 | __ret = (poly8x8_t)(__p0); |
| 32238 | return __ret; | 31123 | return __ret; |
| 32239 | } | 31124 | } |
| 32240 | #endif | | |
| 32241 | | | |
| 32242 | #ifdef __LITTLE_ENDIAN__ | | |
| 32243 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { | | |
| 32244 | poly16x4_t __ret; | | |
| 32245 | __ret = (poly16x4_t)(__p0); | | |
| 32246 | return __ret; | | |
| 32247 | } | | |
| 32248 | #else | | |
| 32249 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { | 31125 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { |
| 32250 | poly16x4_t __ret; | 31126 | poly16x4_t __ret; |
| 32251 | __ret = (poly16x4_t)(__p0); | 31127 | __ret = (poly16x4_t)(__p0); |
| 32252 | return __ret; | 31128 | return __ret; |
| 32253 | } | 31129 | } |
| 32254 | #endif | | |
| 32255 | | | |
| 32256 | #ifdef __LITTLE_ENDIAN__ | | |
| 32257 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { | | |
| 32258 | poly16x4_t __ret; | | |
| 32259 | __ret = (poly16x4_t)(__p0); | | |
| 32260 | return __ret; | | |
| 32261 | } | | |
| 32262 | #else | | |
| 32263 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { | 31130 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { |
| 32264 | poly16x4_t __ret; | 31131 | poly16x4_t __ret; |
| 32265 | __ret = (poly16x4_t)(__p0); | 31132 | __ret = (poly16x4_t)(__p0); |
| 32266 | return __ret; | 31133 | return __ret; |
| 32267 | } | 31134 | } |
| 32268 | #endif | | |
| 32269 | | | |
| 32270 | #ifdef __LITTLE_ENDIAN__ | | |
| 32271 | __ai poly16x4_t vreinterpret_p16_u32(uint32x2_t __p0) { | | |
| 32272 | poly16x4_t __ret; | | |
| 32273 | __ret = (poly16x4_t)(__p0); | | |
| 32274 | return __ret; | | |
| 32275 | } | | |
| 32276 | #else | | |
| 32277 | __ai poly16x4_t vreinterpret_p16_u32(uint32x2_t __p0) { | 31135 | __ai poly16x4_t vreinterpret_p16_u32(uint32x2_t __p0) { |
| 32278 | poly16x4_t __ret; | 31136 | poly16x4_t __ret; |
| 32279 | __ret = (poly16x4_t)(__p0); | 31137 | __ret = (poly16x4_t)(__p0); |
| 32280 | return __ret; | 31138 | return __ret; |
| 32281 | } | 31139 | } |
| 32282 | #endif | | |
| 32283 | | | |
| 32284 | #ifdef __LITTLE_ENDIAN__ | | |
| 32285 | __ai poly16x4_t vreinterpret_p16_u64(uint64x1_t __p0) { | | |
| 32286 | poly16x4_t __ret; | | |
| 32287 | __ret = (poly16x4_t)(__p0); | | |
| 32288 | return __ret; | | |
| 32289 | } | | |
| 32290 | #else | | |
| 32291 | __ai poly16x4_t vreinterpret_p16_u64(uint64x1_t __p0) { | 31140 | __ai poly16x4_t vreinterpret_p16_u64(uint64x1_t __p0) { |
| 32292 | poly16x4_t __ret; | 31141 | poly16x4_t __ret; |
| 32293 | __ret = (poly16x4_t)(__p0); | 31142 | __ret = (poly16x4_t)(__p0); |
| 32294 | return __ret; | 31143 | return __ret; |
| 32295 | } | 31144 | } |
| 32296 | #endif | | |
| 32297 | | | |
| 32298 | #ifdef __LITTLE_ENDIAN__ | | |
| 32299 | __ai poly16x4_t vreinterpret_p16_u16(uint16x4_t __p0) { | | |
| 32300 | poly16x4_t __ret; | | |
| 32301 | __ret = (poly16x4_t)(__p0); | | |
| 32302 | return __ret; | | |
| 32303 | } | | |
| 32304 | #else | | |
| 32305 | __ai poly16x4_t vreinterpret_p16_u16(uint16x4_t __p0) { | 31145 | __ai poly16x4_t vreinterpret_p16_u16(uint16x4_t __p0) { |
| 32306 | poly16x4_t __ret; | 31146 | poly16x4_t __ret; |
| 32307 | __ret = (poly16x4_t)(__p0); | 31147 | __ret = (poly16x4_t)(__p0); |
| 32308 | return __ret; | 31148 | return __ret; |
| 32309 | } | 31149 | } |
| 32310 | #endif | | |
| 32311 | | | |
| 32312 | #ifdef __LITTLE_ENDIAN__ | | |
| 32313 | __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { | | |
| 32314 | poly16x4_t __ret; | | |
| 32315 | __ret = (poly16x4_t)(__p0); | | |
| 32316 | return __ret; | | |
| 32317 | } | | |
| 32318 | #else | | |
| 32319 | __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { | 31150 | __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { |
| 32320 | poly16x4_t __ret; | 31151 | poly16x4_t __ret; |
| 32321 | __ret = (poly16x4_t)(__p0); | 31152 | __ret = (poly16x4_t)(__p0); |
| 32322 | return __ret; | 31153 | return __ret; |
| 32323 | } | 31154 | } |
| 32324 | #endif | | |
| 32325 | | | |
| 32326 | #ifdef __LITTLE_ENDIAN__ | | |
| 32327 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { | | |
| 32328 | poly16x4_t __ret; | | |
| 32329 | __ret = (poly16x4_t)(__p0); | | |
| 32330 | return __ret; | | |
| 32331 | } | | |
| 32332 | #else | | |
| 32333 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { | 31155 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { |
| 32334 | poly16x4_t __ret; | 31156 | poly16x4_t __ret; |
| 32335 | __ret = (poly16x4_t)(__p0); | 31157 | __ret = (poly16x4_t)(__p0); |
| 32336 | return __ret; | 31158 | return __ret; |
| 32337 | } | 31159 | } |
| 32338 | #endif | | |
| 32339 | | | |
| 32340 | #ifdef __LITTLE_ENDIAN__ | | |
| 32341 | __ai poly16x4_t vreinterpret_p16_f16(float16x4_t __p0) { | | |
| 32342 | poly16x4_t __ret; | | |
| 32343 | __ret = (poly16x4_t)(__p0); | | |
| 32344 | return __ret; | | |
| 32345 | } | | |
| 32346 | #else | | |
| 32347 | __ai poly16x4_t vreinterpret_p16_f16(float16x4_t __p0) { | 31160 | __ai poly16x4_t vreinterpret_p16_f16(float16x4_t __p0) { |
| 32348 | poly16x4_t __ret; | 31161 | poly16x4_t __ret; |
| 32349 | __ret = (poly16x4_t)(__p0); | 31162 | __ret = (poly16x4_t)(__p0); |
| 32350 | return __ret; | 31163 | return __ret; |
| 32351 | } | 31164 | } |
| 32352 | #endif | | |
| 32353 | | | |
| 32354 | #ifdef __LITTLE_ENDIAN__ | | |
| 32355 | __ai poly16x4_t vreinterpret_p16_s32(int32x2_t __p0) { | | |
| 32356 | poly16x4_t __ret; | | |
| 32357 | __ret = (poly16x4_t)(__p0); | | |
| 32358 | return __ret; | | |
| 32359 | } | | |
| 32360 | #else | | |
| 32361 | __ai poly16x4_t vreinterpret_p16_s32(int32x2_t __p0) { | 31165 | __ai poly16x4_t vreinterpret_p16_s32(int32x2_t __p0) { |
| 32362 | poly16x4_t __ret; | 31166 | poly16x4_t __ret; |
| 32363 | __ret = (poly16x4_t)(__p0); | 31167 | __ret = (poly16x4_t)(__p0); |
| 32364 | return __ret; | 31168 | return __ret; |
| 32365 | } | 31169 | } |
| 32366 | #endif | | |
| 32367 | | | |
| 32368 | #ifdef __LITTLE_ENDIAN__ | | |
| 32369 | __ai poly16x4_t vreinterpret_p16_s64(int64x1_t __p0) { | | |
| 32370 | poly16x4_t __ret; | | |
| 32371 | __ret = (poly16x4_t)(__p0); | | |
| 32372 | return __ret; | | |
| 32373 | } | | |
| 32374 | #else | | |
| 32375 | __ai poly16x4_t vreinterpret_p16_s64(int64x1_t __p0) { | 31170 | __ai poly16x4_t vreinterpret_p16_s64(int64x1_t __p0) { |
| 32376 | poly16x4_t __ret; | 31171 | poly16x4_t __ret; |
| 32377 | __ret = (poly16x4_t)(__p0); | 31172 | __ret = (poly16x4_t)(__p0); |
| 32378 | return __ret; | 31173 | return __ret; |
| 32379 | } | 31174 | } |
| 32380 | #endif | | |
| 32381 | | | |
| 32382 | #ifdef __LITTLE_ENDIAN__ | | |
| 32383 | __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { | | |
| 32384 | poly16x4_t __ret; | | |
| 32385 | __ret = (poly16x4_t)(__p0); | | |
| 32386 | return __ret; | | |
| 32387 | } | | |
| 32388 | #else | | |
| 32389 | __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { | 31175 | __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { |
| 32390 | poly16x4_t __ret; | 31176 | poly16x4_t __ret; |
| 32391 | __ret = (poly16x4_t)(__p0); | 31177 | __ret = (poly16x4_t)(__p0); |
| 32392 | return __ret; | 31178 | return __ret; |
| 32393 | } | 31179 | } |
| 32394 | #endif | | |
| 32395 | | | |
| 32396 | #ifdef __LITTLE_ENDIAN__ | | |
| 32397 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { | | |
| 32398 | poly8x16_t __ret; | | |
| 32399 | __ret = (poly8x16_t)(__p0); | | |
| 32400 | return __ret; | | |
| 32401 | } | | |
| 32402 | #else | | |
| 32403 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { | 31180 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { |
| 32404 | poly8x16_t __ret; | 31181 | poly8x16_t __ret; |
| 32405 | __ret = (poly8x16_t)(__p0); | 31182 | __ret = (poly8x16_t)(__p0); |
| 32406 | return __ret; | 31183 | return __ret; |
| 32407 | } | 31184 | } |
| 32408 | #endif | | |
| 32409 | | | |
| 32410 | #ifdef __LITTLE_ENDIAN__ | | |
| 32411 | __ai poly8x16_t vreinterpretq_p8_u8(uint8x16_t __p0) { | | |
| 32412 | poly8x16_t __ret; | | |
| 32413 | __ret = (poly8x16_t)(__p0); | | |
| 32414 | return __ret; | | |
| 32415 | } | | |
| 32416 | #else | | |
| 32417 | __ai poly8x16_t vreinterpretq_p8_u8(uint8x16_t __p0) { | 31185 | __ai poly8x16_t vreinterpretq_p8_u8(uint8x16_t __p0) { |
| 32418 | poly8x16_t __ret; | 31186 | poly8x16_t __ret; |
| 32419 | __ret = (poly8x16_t)(__p0); | 31187 | __ret = (poly8x16_t)(__p0); |
| 32420 | return __ret; | 31188 | return __ret; |
| 32421 | } | 31189 | } |
| 32422 | #endif | | |
| 32423 | | | |
| 32424 | #ifdef __LITTLE_ENDIAN__ | | |
| 32425 | __ai poly8x16_t vreinterpretq_p8_u32(uint32x4_t __p0) { | | |
| 32426 | poly8x16_t __ret; | | |
| 32427 | __ret = (poly8x16_t)(__p0); | | |
| 32428 | return __ret; | | |
| 32429 | } | | |
| 32430 | #else | | |
| 32431 | __ai poly8x16_t vreinterpretq_p8_u32(uint32x4_t __p0) { | 31190 | __ai poly8x16_t vreinterpretq_p8_u32(uint32x4_t __p0) { |
| 32432 | poly8x16_t __ret; | 31191 | poly8x16_t __ret; |
| 32433 | __ret = (poly8x16_t)(__p0); | 31192 | __ret = (poly8x16_t)(__p0); |
| 32434 | return __ret; | 31193 | return __ret; |
| 32435 | } | 31194 | } |
| 32436 | #endif | | |
| 32437 | | | |
| 32438 | #ifdef __LITTLE_ENDIAN__ | | |
| 32439 | __ai poly8x16_t vreinterpretq_p8_u64(uint64x2_t __p0) { | | |
| 32440 | poly8x16_t __ret; | | |
| 32441 | __ret = (poly8x16_t)(__p0); | | |
| 32442 | return __ret; | | |
| 32443 | } | | |
| 32444 | #else | | |
| 32445 | __ai poly8x16_t vreinterpretq_p8_u64(uint64x2_t __p0) { | 31195 | __ai poly8x16_t vreinterpretq_p8_u64(uint64x2_t __p0) { |
| 32446 | poly8x16_t __ret; | 31196 | poly8x16_t __ret; |
| 32447 | __ret = (poly8x16_t)(__p0); | 31197 | __ret = (poly8x16_t)(__p0); |
| 32448 | return __ret; | 31198 | return __ret; |
| 32449 | } | 31199 | } |
| 32450 | #endif | | |
| 32451 | | | |
| 32452 | #ifdef __LITTLE_ENDIAN__ | | |
| 32453 | __ai poly8x16_t vreinterpretq_p8_u16(uint16x8_t __p0) { | | |
| 32454 | poly8x16_t __ret; | | |
| 32455 | __ret = (poly8x16_t)(__p0); | | |
| 32456 | return __ret; | | |
| 32457 | } | | |
| 32458 | #else | | |
| 32459 | __ai poly8x16_t vreinterpretq_p8_u16(uint16x8_t __p0) { | 31200 | __ai poly8x16_t vreinterpretq_p8_u16(uint16x8_t __p0) { |
| 32460 | poly8x16_t __ret; | 31201 | poly8x16_t __ret; |
| 32461 | __ret = (poly8x16_t)(__p0); | 31202 | __ret = (poly8x16_t)(__p0); |
| 32462 | return __ret; | 31203 | return __ret; |
| 32463 | } | 31204 | } |
| 32464 | #endif | | |
| 32465 | | | |
| 32466 | #ifdef __LITTLE_ENDIAN__ | | |
| 32467 | __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { | | |
| 32468 | poly8x16_t __ret; | | |
| 32469 | __ret = (poly8x16_t)(__p0); | | |
| 32470 | return __ret; | | |
| 32471 | } | | |
| 32472 | #else | | |
| 32473 | __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { | 31205 | __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { |
| 32474 | poly8x16_t __ret; | 31206 | poly8x16_t __ret; |
| 32475 | __ret = (poly8x16_t)(__p0); | 31207 | __ret = (poly8x16_t)(__p0); |
| 32476 | return __ret; | 31208 | return __ret; |
| 32477 | } | 31209 | } |
| 32478 | #endif | | |
| 32479 | | | |
| 32480 | #ifdef __LITTLE_ENDIAN__ | | |
| 32481 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { | | |
| 32482 | poly8x16_t __ret; | | |
| 32483 | __ret = (poly8x16_t)(__p0); | | |
| 32484 | return __ret; | | |
| 32485 | } | | |
| 32486 | #else | | |
| 32487 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { | 31210 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { |
| 32488 | poly8x16_t __ret; | 31211 | poly8x16_t __ret; |
| 32489 | __ret = (poly8x16_t)(__p0); | 31212 | __ret = (poly8x16_t)(__p0); |
| 32490 | return __ret; | 31213 | return __ret; |
| 32491 | } | 31214 | } |
| 32492 | #endif | | |
| 32493 | | | |
| 32494 | #ifdef __LITTLE_ENDIAN__ | | |
| 32495 | __ai poly8x16_t vreinterpretq_p8_f16(float16x8_t __p0) { | | |
| 32496 | poly8x16_t __ret; | | |
| 32497 | __ret = (poly8x16_t)(__p0); | | |
| 32498 | return __ret; | | |
| 32499 | } | | |
| 32500 | #else | | |
| 32501 | __ai poly8x16_t vreinterpretq_p8_f16(float16x8_t __p0) { | 31215 | __ai poly8x16_t vreinterpretq_p8_f16(float16x8_t __p0) { |
| 32502 | poly8x16_t __ret; | 31216 | poly8x16_t __ret; |
| 32503 | __ret = (poly8x16_t)(__p0); | 31217 | __ret = (poly8x16_t)(__p0); |
| 32504 | return __ret; | 31218 | return __ret; |
| 32505 | } | 31219 | } |
| 32506 | #endif | | |
| 32507 | | | |
| 32508 | #ifdef __LITTLE_ENDIAN__ | | |
| 32509 | __ai poly8x16_t vreinterpretq_p8_s32(int32x4_t __p0) { | | |
| 32510 | poly8x16_t __ret; | | |
| 32511 | __ret = (poly8x16_t)(__p0); | | |
| 32512 | return __ret; | | |
| 32513 | } | | |
| 32514 | #else | | |
| 32515 | __ai poly8x16_t vreinterpretq_p8_s32(int32x4_t __p0) { | 31220 | __ai poly8x16_t vreinterpretq_p8_s32(int32x4_t __p0) { |
| 32516 | poly8x16_t __ret; | 31221 | poly8x16_t __ret; |
| 32517 | __ret = (poly8x16_t)(__p0); | 31222 | __ret = (poly8x16_t)(__p0); |
| 32518 | return __ret; | 31223 | return __ret; |
| 32519 | } | 31224 | } |
| 32520 | #endif | | |
| 32521 | | | |
| 32522 | #ifdef __LITTLE_ENDIAN__ | | |
| 32523 | __ai poly8x16_t vreinterpretq_p8_s64(int64x2_t __p0) { | | |
| 32524 | poly8x16_t __ret; | | |
| 32525 | __ret = (poly8x16_t)(__p0); | | |
| 32526 | return __ret; | | |
| 32527 | } | | |
| 32528 | #else | | |
| 32529 | __ai poly8x16_t vreinterpretq_p8_s64(int64x2_t __p0) { | 31225 | __ai poly8x16_t vreinterpretq_p8_s64(int64x2_t __p0) { |
| 32530 | poly8x16_t __ret; | 31226 | poly8x16_t __ret; |
| 32531 | __ret = (poly8x16_t)(__p0); | 31227 | __ret = (poly8x16_t)(__p0); |
| 32532 | return __ret; | 31228 | return __ret; |
| 32533 | } | 31229 | } |
| 32534 | #endif | | |
| 32535 | | | |
| 32536 | #ifdef __LITTLE_ENDIAN__ | | |
| 32537 | __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { | | |
| 32538 | poly8x16_t __ret; | | |
| 32539 | __ret = (poly8x16_t)(__p0); | | |
| 32540 | return __ret; | | |
| 32541 | } | | |
| 32542 | #else | | |
| 32543 | __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { | 31230 | __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { |
| 32544 | poly8x16_t __ret; | 31231 | poly8x16_t __ret; |
| 32545 | __ret = (poly8x16_t)(__p0); | 31232 | __ret = (poly8x16_t)(__p0); |
| 32546 | return __ret; | 31233 | return __ret; |
| 32547 | } | 31234 | } |
| 32548 | #endif | | |
| 32549 | | | |
| 32550 | #ifdef __LITTLE_ENDIAN__ | | |
| 32551 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { | | |
| 32552 | poly16x8_t __ret; | | |
| 32553 | __ret = (poly16x8_t)(__p0); | | |
| 32554 | return __ret; | | |
| 32555 | } | | |
| 32556 | #else | | |
| 32557 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { | 31235 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { |
| 32558 | poly16x8_t __ret; | 31236 | poly16x8_t __ret; |
| 32559 | __ret = (poly16x8_t)(__p0); | 31237 | __ret = (poly16x8_t)(__p0); |
| 32560 | return __ret; | 31238 | return __ret; |
| 32561 | } | 31239 | } |
| 32562 | #endif | | |
| 32563 | | | |
| 32564 | #ifdef __LITTLE_ENDIAN__ | | |
| 32565 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { | | |
| 32566 | poly16x8_t __ret; | | |
| 32567 | __ret = (poly16x8_t)(__p0); | | |
| 32568 | return __ret; | | |
| 32569 | } | | |
| 32570 | #else | | |
| 32571 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { | 31240 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { |
| 32572 | poly16x8_t __ret; | 31241 | poly16x8_t __ret; |
| 32573 | __ret = (poly16x8_t)(__p0); | 31242 | __ret = (poly16x8_t)(__p0); |
| 32574 | return __ret; | 31243 | return __ret; |
| 32575 | } | 31244 | } |
| 32576 | #endif | | |
| 32577 | | | |
| 32578 | #ifdef __LITTLE_ENDIAN__ | | |
| 32579 | __ai poly16x8_t vreinterpretq_p16_u32(uint32x4_t __p0) { | | |
| 32580 | poly16x8_t __ret; | | |
| 32581 | __ret = (poly16x8_t)(__p0); | | |
| 32582 | return __ret; | | |
| 32583 | } | | |
| 32584 | #else | | |
| 32585 | __ai poly16x8_t vreinterpretq_p16_u32(uint32x4_t __p0) { | 31245 | __ai poly16x8_t vreinterpretq_p16_u32(uint32x4_t __p0) { |
| 32586 | poly16x8_t __ret; | 31246 | poly16x8_t __ret; |
| 32587 | __ret = (poly16x8_t)(__p0); | 31247 | __ret = (poly16x8_t)(__p0); |
| 32588 | return __ret; | 31248 | return __ret; |
| 32589 | } | 31249 | } |
| 32590 | #endif | | |
| 32591 | | | |
| 32592 | #ifdef __LITTLE_ENDIAN__ | | |
| 32593 | __ai poly16x8_t vreinterpretq_p16_u64(uint64x2_t __p0) { | | |
| 32594 | poly16x8_t __ret; | | |
| 32595 | __ret = (poly16x8_t)(__p0); | | |
| 32596 | return __ret; | | |
| 32597 | } | | |
| 32598 | #else | | |
| 32599 | __ai poly16x8_t vreinterpretq_p16_u64(uint64x2_t __p0) { | 31250 | __ai poly16x8_t vreinterpretq_p16_u64(uint64x2_t __p0) { |
| 32600 | poly16x8_t __ret; | 31251 | poly16x8_t __ret; |
| 32601 | __ret = (poly16x8_t)(__p0); | 31252 | __ret = (poly16x8_t)(__p0); |
| 32602 | return __ret; | 31253 | return __ret; |
| 32603 | } | 31254 | } |
| 32604 | #endif | | |
| 32605 | | | |
| 32606 | #ifdef __LITTLE_ENDIAN__ | | |
| 32607 | __ai poly16x8_t vreinterpretq_p16_u16(uint16x8_t __p0) { | | |
| 32608 | poly16x8_t __ret; | | |
| 32609 | __ret = (poly16x8_t)(__p0); | | |
| 32610 | return __ret; | | |
| 32611 | } | | |
| 32612 | #else | | |
| 32613 | __ai poly16x8_t vreinterpretq_p16_u16(uint16x8_t __p0) { | 31255 | __ai poly16x8_t vreinterpretq_p16_u16(uint16x8_t __p0) { |
| 32614 | poly16x8_t __ret; | 31256 | poly16x8_t __ret; |
| 32615 | __ret = (poly16x8_t)(__p0); | 31257 | __ret = (poly16x8_t)(__p0); |
| 32616 | return __ret; | 31258 | return __ret; |
| 32617 | } | 31259 | } |
| 32618 | #endif | | |
| 32619 | | | |
| 32620 | #ifdef __LITTLE_ENDIAN__ | | |
| 32621 | __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { | | |
| 32622 | poly16x8_t __ret; | | |
| 32623 | __ret = (poly16x8_t)(__p0); | | |
| 32624 | return __ret; | | |
| 32625 | } | | |
| 32626 | #else | | |
| 32627 | __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { | 31260 | __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { |
| 32628 | poly16x8_t __ret; | 31261 | poly16x8_t __ret; |
| 32629 | __ret = (poly16x8_t)(__p0); | 31262 | __ret = (poly16x8_t)(__p0); |
| 32630 | return __ret; | 31263 | return __ret; |
| 32631 | } | 31264 | } |
| 32632 | #endif | | |
| 32633 | | | |
| 32634 | #ifdef __LITTLE_ENDIAN__ | | |
| 32635 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { | | |
| 32636 | poly16x8_t __ret; | | |
| 32637 | __ret = (poly16x8_t)(__p0); | | |
| 32638 | return __ret; | | |
| 32639 | } | | |
| 32640 | #else | | |
| 32641 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { | 31265 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { |
| 32642 | poly16x8_t __ret; | 31266 | poly16x8_t __ret; |
| 32643 | __ret = (poly16x8_t)(__p0); | 31267 | __ret = (poly16x8_t)(__p0); |
| 32644 | return __ret; | 31268 | return __ret; |
| 32645 | } | 31269 | } |
| 32646 | #endif | | |
| 32647 | | | |
| 32648 | #ifdef __LITTLE_ENDIAN__ | | |
| 32649 | __ai poly16x8_t vreinterpretq_p16_f16(float16x8_t __p0) { | | |
| 32650 | poly16x8_t __ret; | | |
| 32651 | __ret = (poly16x8_t)(__p0); | | |
| 32652 | return __ret; | | |
| 32653 | } | | |
| 32654 | #else | | |
| 32655 | __ai poly16x8_t vreinterpretq_p16_f16(float16x8_t __p0) { | 31270 | __ai poly16x8_t vreinterpretq_p16_f16(float16x8_t __p0) { |
| 32656 | poly16x8_t __ret; | 31271 | poly16x8_t __ret; |
| 32657 | __ret = (poly16x8_t)(__p0); | 31272 | __ret = (poly16x8_t)(__p0); |
| 32658 | return __ret; | 31273 | return __ret; |
| 32659 | } | 31274 | } |
| 32660 | #endif | | |
| 32661 | | | |
| 32662 | #ifdef __LITTLE_ENDIAN__ | | |
| 32663 | __ai poly16x8_t vreinterpretq_p16_s32(int32x4_t __p0) { | | |
| 32664 | poly16x8_t __ret; | | |
| 32665 | __ret = (poly16x8_t)(__p0); | | |
| 32666 | return __ret; | | |
| 32667 | } | | |
| 32668 | #else | | |
| 32669 | __ai poly16x8_t vreinterpretq_p16_s32(int32x4_t __p0) { | 31275 | __ai poly16x8_t vreinterpretq_p16_s32(int32x4_t __p0) { |
| 32670 | poly16x8_t __ret; | 31276 | poly16x8_t __ret; |
| 32671 | __ret = (poly16x8_t)(__p0); | 31277 | __ret = (poly16x8_t)(__p0); |
| 32672 | return __ret; | 31278 | return __ret; |
| 32673 | } | 31279 | } |
| 32674 | #endif | | |
| 32675 | | | |
| 32676 | #ifdef __LITTLE_ENDIAN__ | | |
| 32677 | __ai poly16x8_t vreinterpretq_p16_s64(int64x2_t __p0) { | | |
| 32678 | poly16x8_t __ret; | | |
| 32679 | __ret = (poly16x8_t)(__p0); | | |
| 32680 | return __ret; | | |
| 32681 | } | | |
| 32682 | #else | | |
| 32683 | __ai poly16x8_t vreinterpretq_p16_s64(int64x2_t __p0) { | 31280 | __ai poly16x8_t vreinterpretq_p16_s64(int64x2_t __p0) { |
| 32684 | poly16x8_t __ret; | 31281 | poly16x8_t __ret; |
| 32685 | __ret = (poly16x8_t)(__p0); | 31282 | __ret = (poly16x8_t)(__p0); |
| 32686 | return __ret; | 31283 | return __ret; |
| 32687 | } | 31284 | } |
| 32688 | #endif | | |
| 32689 | | | |
| 32690 | #ifdef __LITTLE_ENDIAN__ | | |
| 32691 | __ai poly16x8_t vreinterpretq_p16_s16(int16x8_t __p0) { | | |
| 32692 | poly16x8_t __ret; | | |
| 32693 | __ret = (poly16x8_t)(__p0); | | |
| 32694 | return __ret; | | |
| 32695 | } | | |
| 32696 | #else | | |
| 32697 | __ai poly16x8_t vreinterpretq_p16_s16(int16x8_t __p0) { | 31285 | __ai poly16x8_t vreinterpretq_p16_s16(int16x8_t __p0) { |
| 32698 | poly16x8_t __ret; | 31286 | poly16x8_t __ret; |
| 32699 | __ret = (poly16x8_t)(__p0); | 31287 | __ret = (poly16x8_t)(__p0); |
| 32700 | return __ret; | 31288 | return __ret; |
| 32701 | } | 31289 | } |
| 32702 | #endif | | |
| 32703 | | | |
| 32704 | #ifdef __LITTLE_ENDIAN__ | | |
| 32705 | __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { | | |
| 32706 | uint8x16_t __ret; | | |
| 32707 | __ret = (uint8x16_t)(__p0); | | |
| 32708 | return __ret; | | |
| 32709 | } | | |
| 32710 | #else | | |
| 32711 | __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { | 31290 | __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { |
| 32712 | uint8x16_t __ret; | 31291 | uint8x16_t __ret; |
| 32713 | __ret = (uint8x16_t)(__p0); | 31292 | __ret = (uint8x16_t)(__p0); |
| 32714 | return __ret; | 31293 | return __ret; |
| 32715 | } | 31294 | } |
| 32716 | #endif | | |
| 32717 | | | |
| 32718 | #ifdef __LITTLE_ENDIAN__ | | |
| 32719 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { | | |
| 32720 | uint8x16_t __ret; | | |
| 32721 | __ret = (uint8x16_t)(__p0); | | |
| 32722 | return __ret; | | |
| 32723 | } | | |
| 32724 | #else | | |
| 32725 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { | 31295 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { |
| 32726 | uint8x16_t __ret; | 31296 | uint8x16_t __ret; |
| 32727 | __ret = (uint8x16_t)(__p0); | 31297 | __ret = (uint8x16_t)(__p0); |
| 32728 | return __ret; | 31298 | return __ret; |
| 32729 | } | 31299 | } |
| 32730 | #endif | | |
| 32731 | | | |
| 32732 | #ifdef __LITTLE_ENDIAN__ | | |
| 32733 | __ai uint8x16_t vreinterpretq_u8_u32(uint32x4_t __p0) { | | |
| 32734 | uint8x16_t __ret; | | |
| 32735 | __ret = (uint8x16_t)(__p0); | | |
| 32736 | return __ret; | | |
| 32737 | } | | |
| 32738 | #else | | |
| 32739 | __ai uint8x16_t vreinterpretq_u8_u32(uint32x4_t __p0) { | 31300 | __ai uint8x16_t vreinterpretq_u8_u32(uint32x4_t __p0) { |
| 32740 | uint8x16_t __ret; | 31301 | uint8x16_t __ret; |
| 32741 | __ret = (uint8x16_t)(__p0); | 31302 | __ret = (uint8x16_t)(__p0); |
| 32742 | return __ret; | 31303 | return __ret; |
| 32743 | } | 31304 | } |
| 32744 | #endif | | |
| 32745 | | | |
| 32746 | #ifdef __LITTLE_ENDIAN__ | | |
| 32747 | __ai uint8x16_t vreinterpretq_u8_u64(uint64x2_t __p0) { | | |
| 32748 | uint8x16_t __ret; | | |
| 32749 | __ret = (uint8x16_t)(__p0); | | |
| 32750 | return __ret; | | |
| 32751 | } | | |
| 32752 | #else | | |
| 32753 | __ai uint8x16_t vreinterpretq_u8_u64(uint64x2_t __p0) { | 31305 | __ai uint8x16_t vreinterpretq_u8_u64(uint64x2_t __p0) { |
| 32754 | uint8x16_t __ret; | 31306 | uint8x16_t __ret; |
| 32755 | __ret = (uint8x16_t)(__p0); | 31307 | __ret = (uint8x16_t)(__p0); |
| 32756 | return __ret; | 31308 | return __ret; |
| 32757 | } | 31309 | } |
| 32758 | #endif | | |
| 32759 | | | |
| 32760 | #ifdef __LITTLE_ENDIAN__ | | |
| 32761 | __ai uint8x16_t vreinterpretq_u8_u16(uint16x8_t __p0) { | 31310 | __ai uint8x16_t vreinterpretq_u8_u16(uint16x8_t __p0) { |
| 32762 | uint8x16_t __ret; | 31311 | uint8x16_t __ret; |
| 32763 | __ret = (uint8x16_t)(__p0); | 31312 | __ret = (uint8x16_t)(__p0); |
| 32764 | return __ret; | 31313 | return __ret; |
| 32765 | } | 31314 | } |
| 32766 | #else | 31315 | __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { |
| 32767 | __ai uint8x16_t vreinterpretq_u8_u16(uint16x8_t __p0) { | | |
| 32768 | uint8x16_t __ret; | 31316 | uint8x16_t __ret; |
| 32769 | __ret = (uint8x16_t)(__p0); | 31317 | __ret = (uint8x16_t)(__p0); |
| 32770 | return __ret; | 31318 | return __ret; |
| 32771 | } | 31319 | } |
| 32772 | #endif | 31320 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { |
| 32773 | | | |
| 32774 | #ifdef __LITTLE_ENDIAN__ | | |
| 32775 | __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { | | |
| 32776 | uint8x16_t __ret; | 31321 | uint8x16_t __ret; |
| 32777 | __ret = (uint8x16_t)(__p0); | 31322 | __ret = (uint8x16_t)(__p0); |
| 32778 | return __ret; | 31323 | return __ret; |
| 32779 | } | 31324 | } |
| 32780 | #else | 31325 | __ai uint8x16_t vreinterpretq_u8_f16(float16x8_t __p0) { |
| 32781 | __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { | | |
| 32782 | uint8x16_t __ret; | 31326 | uint8x16_t __ret; |
| 32783 | __ret = (uint8x16_t)(__p0); | 31327 | __ret = (uint8x16_t)(__p0); |
| 32784 | return __ret; | 31328 | return __ret; |
| 32785 | } | 31329 | } |
| 32786 | #endif | 31330 | __ai uint8x16_t vreinterpretq_u8_s32(int32x4_t __p0) { |
| 32787 | | | |
| 32788 | #ifdef __LITTLE_ENDIAN__ | | |
| 32789 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { | | |
| 32790 | uint8x16_t __ret; | 31331 | uint8x16_t __ret; |
| 32791 | __ret = (uint8x16_t)(__p0); | 31332 | __ret = (uint8x16_t)(__p0); |
| 32792 | return __ret; | 31333 | return __ret; |
| 32793 | } | 31334 | } |
| 32794 | #else | 31335 | __ai uint8x16_t vreinterpretq_u8_s64(int64x2_t __p0) { |
| 32795 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { | | |
| 32796 | uint8x16_t __ret; | 31336 | uint8x16_t __ret; |
| 32797 | __ret = (uint8x16_t)(__p0); | 31337 | __ret = (uint8x16_t)(__p0); |
| 32798 | return __ret; | 31338 | return __ret; |
| 32799 | } | 31339 | } |
| 32800 | #endif | 31340 | __ai uint8x16_t vreinterpretq_u8_s16(int16x8_t __p0) { |
| 32801 | | | |
| 32802 | #ifdef __LITTLE_ENDIAN__ | | |
| 32803 | __ai uint8x16_t vreinterpretq_u8_f16(float16x8_t __p0) { | | |
| 32804 | uint8x16_t __ret; | 31341 | uint8x16_t __ret; |
| 32805 | __ret = (uint8x16_t)(__p0); | 31342 | __ret = (uint8x16_t)(__p0); |
| 32806 | return __ret; | 31343 | return __ret; |
| 32807 | } | 31344 | } |
| 32808 | #else | 31345 | __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { |
| 32809 | __ai uint8x16_t vreinterpretq_u8_f16(float16x8_t __p0) { | 31346 | uint32x4_t __ret; |
| 32810 | uint8x16_t __ret; | 31347 | __ret = (uint32x4_t)(__p0); |
| 32811 | __ret = (uint8x16_t)(__p0); | | |
| 32812 | return __ret; | 31348 | return __ret; |
| 32813 | } | 31349 | } |
| 32814 | #endif | | |
| 32815 | | | |
| 32816 | #ifdef __LITTLE_ENDIAN__ | | |
| 32817 | __ai uint8x16_t vreinterpretq_u8_s32(int32x4_t __p0) { | | |
| 32818 | uint8x16_t __ret; | | |
| 32819 | __ret = (uint8x16_t)(__p0); | | |
| 32820 | return __ret; | | |
| 32821 | } | | |
| 32822 | #else | | |
| 32823 | __ai uint8x16_t vreinterpretq_u8_s32(int32x4_t __p0) { | | |
| 32824 | uint8x16_t __ret; | | |
| 32825 | __ret = (uint8x16_t)(__p0); | | |
| 32826 | return __ret; | | |
| 32827 | } | | |
| 32828 | #endif | | |
| 32829 | | | |
| 32830 | #ifdef __LITTLE_ENDIAN__ | | |
| 32831 | __ai uint8x16_t vreinterpretq_u8_s64(int64x2_t __p0) { | | |
| 32832 | uint8x16_t __ret; | | |
| 32833 | __ret = (uint8x16_t)(__p0); | | |
| 32834 | return __ret; | | |
| 32835 | } | | |
| 32836 | #else | | |
| 32837 | __ai uint8x16_t vreinterpretq_u8_s64(int64x2_t __p0) { | | |
| 32838 | uint8x16_t __ret; | | |
| 32839 | __ret = (uint8x16_t)(__p0); | | |
| 32840 | return __ret; | | |
| 32841 | } | | |
| 32842 | #endif | | |
| 32843 | | | |
| 32844 | #ifdef __LITTLE_ENDIAN__ | | |
| 32845 | __ai uint8x16_t vreinterpretq_u8_s16(int16x8_t __p0) { | | |
| 32846 | uint8x16_t __ret; | | |
| 32847 | __ret = (uint8x16_t)(__p0); | | |
| 32848 | return __ret; | | |
| 32849 | } | | |
| 32850 | #else | | |
| 32851 | __ai uint8x16_t vreinterpretq_u8_s16(int16x8_t __p0) { | | |
| 32852 | uint8x16_t __ret; | | |
| 32853 | __ret = (uint8x16_t)(__p0); | | |
| 32854 | return __ret; | | |
| 32855 | } | | |
| 32856 | #endif | | |
| 32857 | | | |
| 32858 | #ifdef __LITTLE_ENDIAN__ | | |
| 32859 | __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { | | |
| 32860 | uint32x4_t __ret; | | |
| 32861 | __ret = (uint32x4_t)(__p0); | | |
| 32862 | return __ret; | | |
| 32863 | } | | |
| 32864 | #else | | |
| 32865 | __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { | | |
| 32866 | uint32x4_t __ret; | | |
| 32867 | __ret = (uint32x4_t)(__p0); | | |
| 32868 | return __ret; | | |
| 32869 | } | | |
| 32870 | #endif | | |
| 32871 | | | |
| 32872 | #ifdef __LITTLE_ENDIAN__ | | |
| 32873 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { | | |
| 32874 | uint32x4_t __ret; | | |
| 32875 | __ret = (uint32x4_t)(__p0); | | |
| 32876 | return __ret; | | |
| 32877 | } | | |
| 32878 | #else | | |
| 32879 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { | 31350 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { |
| 32880 | uint32x4_t __ret; | 31351 | uint32x4_t __ret; |
| 32881 | __ret = (uint32x4_t)(__p0); | 31352 | __ret = (uint32x4_t)(__p0); |
| 32882 | return __ret; | 31353 | return __ret; |
| 32883 | } | 31354 | } |
| 32884 | #endif | | |
| 32885 | | | |
| 32886 | #ifdef __LITTLE_ENDIAN__ | | |
| 32887 | __ai uint32x4_t vreinterpretq_u32_u8(uint8x16_t __p0) { | | |
| 32888 | uint32x4_t __ret; | | |
| 32889 | __ret = (uint32x4_t)(__p0); | | |
| 32890 | return __ret; | | |
| 32891 | } | | |
| 32892 | #else | | |
| 32893 | __ai uint32x4_t vreinterpretq_u32_u8(uint8x16_t __p0) { | 31355 | __ai uint32x4_t vreinterpretq_u32_u8(uint8x16_t __p0) { |
| 32894 | uint32x4_t __ret; | 31356 | uint32x4_t __ret; |
| 32895 | __ret = (uint32x4_t)(__p0); | 31357 | __ret = (uint32x4_t)(__p0); |
| 32896 | return __ret; | 31358 | return __ret; |
| 32897 | } | 31359 | } |
| 32898 | #endif | | |
| 32899 | | | |
| 32900 | #ifdef __LITTLE_ENDIAN__ | | |
| 32901 | __ai uint32x4_t vreinterpretq_u32_u64(uint64x2_t __p0) { | | |
| 32902 | uint32x4_t __ret; | | |
| 32903 | __ret = (uint32x4_t)(__p0); | | |
| 32904 | return __ret; | | |
| 32905 | } | | |
| 32906 | #else | | |
| 32907 | __ai uint32x4_t vreinterpretq_u32_u64(uint64x2_t __p0) { | 31360 | __ai uint32x4_t vreinterpretq_u32_u64(uint64x2_t __p0) { |
| 32908 | uint32x4_t __ret; | 31361 | uint32x4_t __ret; |
| 32909 | __ret = (uint32x4_t)(__p0); | 31362 | __ret = (uint32x4_t)(__p0); |
| 32910 | return __ret; | 31363 | return __ret; |
| 32911 | } | 31364 | } |
| 32912 | #endif | | |
| 32913 | | | |
| 32914 | #ifdef __LITTLE_ENDIAN__ | | |
| 32915 | __ai uint32x4_t vreinterpretq_u32_u16(uint16x8_t __p0) { | | |
| 32916 | uint32x4_t __ret; | | |
| 32917 | __ret = (uint32x4_t)(__p0); | | |
| 32918 | return __ret; | | |
| 32919 | } | | |
| 32920 | #else | | |
| 32921 | __ai uint32x4_t vreinterpretq_u32_u16(uint16x8_t __p0) { | 31365 | __ai uint32x4_t vreinterpretq_u32_u16(uint16x8_t __p0) { |
| 32922 | uint32x4_t __ret; | 31366 | uint32x4_t __ret; |
| 32923 | __ret = (uint32x4_t)(__p0); | 31367 | __ret = (uint32x4_t)(__p0); |
| 32924 | return __ret; | 31368 | return __ret; |
| 32925 | } | 31369 | } |
| 32926 | #endif | | |
| 32927 | | | |
| 32928 | #ifdef __LITTLE_ENDIAN__ | | |
| 32929 | __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { | | |
| 32930 | uint32x4_t __ret; | | |
| 32931 | __ret = (uint32x4_t)(__p0); | | |
| 32932 | return __ret; | | |
| 32933 | } | | |
| 32934 | #else | | |
| 32935 | __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { | 31370 | __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { |
| 32936 | uint32x4_t __ret; | 31371 | uint32x4_t __ret; |
| 32937 | __ret = (uint32x4_t)(__p0); | 31372 | __ret = (uint32x4_t)(__p0); |
| 32938 | return __ret; | 31373 | return __ret; |
| 32939 | } | 31374 | } |
| 32940 | #endif | | |
| 32941 | | | |
| 32942 | #ifdef __LITTLE_ENDIAN__ | | |
| 32943 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { | | |
| 32944 | uint32x4_t __ret; | | |
| 32945 | __ret = (uint32x4_t)(__p0); | | |
| 32946 | return __ret; | | |
| 32947 | } | | |
| 32948 | #else | | |
| 32949 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { | 31375 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { |
| 32950 | uint32x4_t __ret; | 31376 | uint32x4_t __ret; |
| 32951 | __ret = (uint32x4_t)(__p0); | 31377 | __ret = (uint32x4_t)(__p0); |
| 32952 | return __ret; | 31378 | return __ret; |
| 32953 | } | 31379 | } |
| 32954 | #endif | | |
| 32955 | | | |
| 32956 | #ifdef __LITTLE_ENDIAN__ | | |
| 32957 | __ai uint32x4_t vreinterpretq_u32_f16(float16x8_t __p0) { | | |
| 32958 | uint32x4_t __ret; | | |
| 32959 | __ret = (uint32x4_t)(__p0); | | |
| 32960 | return __ret; | | |
| 32961 | } | | |
| 32962 | #else | | |
| 32963 | __ai uint32x4_t vreinterpretq_u32_f16(float16x8_t __p0) { | 31380 | __ai uint32x4_t vreinterpretq_u32_f16(float16x8_t __p0) { |
| 32964 | uint32x4_t __ret; | 31381 | uint32x4_t __ret; |
| 32965 | __ret = (uint32x4_t)(__p0); | 31382 | __ret = (uint32x4_t)(__p0); |
| 32966 | return __ret; | 31383 | return __ret; |
| 32967 | } | 31384 | } |
| 32968 | #endif | | |
| 32969 | | | |
| 32970 | #ifdef __LITTLE_ENDIAN__ | | |
| 32971 | __ai uint32x4_t vreinterpretq_u32_s32(int32x4_t __p0) { | | |
| 32972 | uint32x4_t __ret; | | |
| 32973 | __ret = (uint32x4_t)(__p0); | | |
| 32974 | return __ret; | | |
| 32975 | } | | |
| 32976 | #else | | |
| 32977 | __ai uint32x4_t vreinterpretq_u32_s32(int32x4_t __p0) { | 31385 | __ai uint32x4_t vreinterpretq_u32_s32(int32x4_t __p0) { |
| 32978 | uint32x4_t __ret; | 31386 | uint32x4_t __ret; |
| 32979 | __ret = (uint32x4_t)(__p0); | 31387 | __ret = (uint32x4_t)(__p0); |
| 32980 | return __ret; | 31388 | return __ret; |
| 32981 | } | 31389 | } |
| 32982 | #endif | | |
| 32983 | | | |
| 32984 | #ifdef __LITTLE_ENDIAN__ | | |
| 32985 | __ai uint32x4_t vreinterpretq_u32_s64(int64x2_t __p0) { | | |
| 32986 | uint32x4_t __ret; | | |
| 32987 | __ret = (uint32x4_t)(__p0); | | |
| 32988 | return __ret; | | |
| 32989 | } | | |
| 32990 | #else | | |
| 32991 | __ai uint32x4_t vreinterpretq_u32_s64(int64x2_t __p0) { | 31390 | __ai uint32x4_t vreinterpretq_u32_s64(int64x2_t __p0) { |
| 32992 | uint32x4_t __ret; | 31391 | uint32x4_t __ret; |
| 32993 | __ret = (uint32x4_t)(__p0); | 31392 | __ret = (uint32x4_t)(__p0); |
| 32994 | return __ret; | 31393 | return __ret; |
| 32995 | } | 31394 | } |
| 32996 | #endif | | |
| 32997 | | | |
| 32998 | #ifdef __LITTLE_ENDIAN__ | | |
| 32999 | __ai uint32x4_t vreinterpretq_u32_s16(int16x8_t __p0) { | | |
| 33000 | uint32x4_t __ret; | | |
| 33001 | __ret = (uint32x4_t)(__p0); | | |
| 33002 | return __ret; | | |
| 33003 | } | | |
| 33004 | #else | | |
| 33005 | __ai uint32x4_t vreinterpretq_u32_s16(int16x8_t __p0) { | 31395 | __ai uint32x4_t vreinterpretq_u32_s16(int16x8_t __p0) { |
| 33006 | uint32x4_t __ret; | 31396 | uint32x4_t __ret; |
| 33007 | __ret = (uint32x4_t)(__p0); | 31397 | __ret = (uint32x4_t)(__p0); |
| 33008 | return __ret; | 31398 | return __ret; |
| 33009 | } | 31399 | } |
| 33010 | #endif | | |
| 33011 | | | |
| 33012 | #ifdef __LITTLE_ENDIAN__ | | |
| 33013 | __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { | | |
| 33014 | uint64x2_t __ret; | | |
| 33015 | __ret = (uint64x2_t)(__p0); | | |
| 33016 | return __ret; | | |
| 33017 | } | | |
| 33018 | #else | | |
| 33019 | __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { | 31400 | __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { |
| 33020 | uint64x2_t __ret; | 31401 | uint64x2_t __ret; |
| 33021 | __ret = (uint64x2_t)(__p0); | 31402 | __ret = (uint64x2_t)(__p0); |
| 33022 | return __ret; | 31403 | return __ret; |
| 33023 | } | 31404 | } |
| 33024 | #endif | | |
| 33025 | | | |
| 33026 | #ifdef __LITTLE_ENDIAN__ | | |
| 33027 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { | | |
| 33028 | uint64x2_t __ret; | | |
| 33029 | __ret = (uint64x2_t)(__p0); | | |
| 33030 | return __ret; | | |
| 33031 | } | | |
| 33032 | #else | | |
| 33033 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { | 31405 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { |
| 33034 | uint64x2_t __ret; | 31406 | uint64x2_t __ret; |
| 33035 | __ret = (uint64x2_t)(__p0); | 31407 | __ret = (uint64x2_t)(__p0); |
| 33036 | return __ret; | 31408 | return __ret; |
| 33037 | } | 31409 | } |
| 33038 | #endif | | |
| 33039 | | | |
| 33040 | #ifdef __LITTLE_ENDIAN__ | | |
| 33041 | __ai uint64x2_t vreinterpretq_u64_u8(uint8x16_t __p0) { | | |
| 33042 | uint64x2_t __ret; | | |
| 33043 | __ret = (uint64x2_t)(__p0); | | |
| 33044 | return __ret; | | |
| 33045 | } | | |
| 33046 | #else | | |
| 33047 | __ai uint64x2_t vreinterpretq_u64_u8(uint8x16_t __p0) { | 31410 | __ai uint64x2_t vreinterpretq_u64_u8(uint8x16_t __p0) { |
| 33048 | uint64x2_t __ret; | 31411 | uint64x2_t __ret; |
| 33049 | __ret = (uint64x2_t)(__p0); | 31412 | __ret = (uint64x2_t)(__p0); |
| 33050 | return __ret; | 31413 | return __ret; |
| 33051 | } | 31414 | } |
| 33052 | #endif | | |
| 33053 | | | |
| 33054 | #ifdef __LITTLE_ENDIAN__ | | |
| 33055 | __ai uint64x2_t vreinterpretq_u64_u32(uint32x4_t __p0) { | | |
| 33056 | uint64x2_t __ret; | | |
| 33057 | __ret = (uint64x2_t)(__p0); | | |
| 33058 | return __ret; | | |
| 33059 | } | | |
| 33060 | #else | | |
| 33061 | __ai uint64x2_t vreinterpretq_u64_u32(uint32x4_t __p0) { | 31415 | __ai uint64x2_t vreinterpretq_u64_u32(uint32x4_t __p0) { |
| 33062 | uint64x2_t __ret; | 31416 | uint64x2_t __ret; |
| 33063 | __ret = (uint64x2_t)(__p0); | 31417 | __ret = (uint64x2_t)(__p0); |
| 33064 | return __ret; | 31418 | return __ret; |
| 33065 | } | 31419 | } |
| 33066 | #endif | | |
| 33067 | | | |
| 33068 | #ifdef __LITTLE_ENDIAN__ | | |
| 33069 | __ai uint64x2_t vreinterpretq_u64_u16(uint16x8_t __p0) { | | |
| 33070 | uint64x2_t __ret; | | |
| 33071 | __ret = (uint64x2_t)(__p0); | | |
| 33072 | return __ret; | | |
| 33073 | } | | |
| 33074 | #else | | |
| 33075 | __ai uint64x2_t vreinterpretq_u64_u16(uint16x8_t __p0) { | 31420 | __ai uint64x2_t vreinterpretq_u64_u16(uint16x8_t __p0) { |
| 33076 | uint64x2_t __ret; | 31421 | uint64x2_t __ret; |
| 33077 | __ret = (uint64x2_t)(__p0); | 31422 | __ret = (uint64x2_t)(__p0); |
| 33078 | return __ret; | 31423 | return __ret; |
| 33079 | } | 31424 | } |
| 33080 | #endif | | |
| 33081 | | | |
| 33082 | #ifdef __LITTLE_ENDIAN__ | | |
| 33083 | __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { | | |
| 33084 | uint64x2_t __ret; | | |
| 33085 | __ret = (uint64x2_t)(__p0); | | |
| 33086 | return __ret; | | |
| 33087 | } | | |
| 33088 | #else | | |
| 33089 | __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { | 31425 | __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { |
| 33090 | uint64x2_t __ret; | 31426 | uint64x2_t __ret; |
| 33091 | __ret = (uint64x2_t)(__p0); | 31427 | __ret = (uint64x2_t)(__p0); |
| 33092 | return __ret; | 31428 | return __ret; |
| 33093 | } | 31429 | } |
| 33094 | #endif | | |
| 33095 | | | |
| 33096 | #ifdef __LITTLE_ENDIAN__ | | |
| 33097 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { | | |
| 33098 | uint64x2_t __ret; | | |
| 33099 | __ret = (uint64x2_t)(__p0); | | |
| 33100 | return __ret; | | |
| 33101 | } | | |
| 33102 | #else | | |
| 33103 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { | 31430 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { |
| 33104 | uint64x2_t __ret; | 31431 | uint64x2_t __ret; |
| 33105 | __ret = (uint64x2_t)(__p0); | 31432 | __ret = (uint64x2_t)(__p0); |
| 33106 | return __ret; | 31433 | return __ret; |
| 33107 | } | 31434 | } |
| 33108 | #endif | | |
| 33109 | | | |
| 33110 | #ifdef __LITTLE_ENDIAN__ | | |
| 33111 | __ai uint64x2_t vreinterpretq_u64_f16(float16x8_t __p0) { | | |
| 33112 | uint64x2_t __ret; | | |
| 33113 | __ret = (uint64x2_t)(__p0); | | |
| 33114 | return __ret; | | |
| 33115 | } | | |
| 33116 | #else | | |
| 33117 | __ai uint64x2_t vreinterpretq_u64_f16(float16x8_t __p0) { | 31435 | __ai uint64x2_t vreinterpretq_u64_f16(float16x8_t __p0) { |
| 33118 | uint64x2_t __ret; | 31436 | uint64x2_t __ret; |
| 33119 | __ret = (uint64x2_t)(__p0); | 31437 | __ret = (uint64x2_t)(__p0); |
| 33120 | return __ret; | 31438 | return __ret; |
| 33121 | } | 31439 | } |
| 33122 | #endif | | |
| 33123 | | | |
| 33124 | #ifdef __LITTLE_ENDIAN__ | | |
| 33125 | __ai uint64x2_t vreinterpretq_u64_s32(int32x4_t __p0) { | | |
| 33126 | uint64x2_t __ret; | | |
| 33127 | __ret = (uint64x2_t)(__p0); | | |
| 33128 | return __ret; | | |
| 33129 | } | | |
| 33130 | #else | | |
| 33131 | __ai uint64x2_t vreinterpretq_u64_s32(int32x4_t __p0) { | 31440 | __ai uint64x2_t vreinterpretq_u64_s32(int32x4_t __p0) { |
| 33132 | uint64x2_t __ret; | 31441 | uint64x2_t __ret; |
| 33133 | __ret = (uint64x2_t)(__p0); | 31442 | __ret = (uint64x2_t)(__p0); |
| 33134 | return __ret; | 31443 | return __ret; |
| 33135 | } | 31444 | } |
| 33136 | #endif | | |
| 33137 | | | |
| 33138 | #ifdef __LITTLE_ENDIAN__ | | |
| 33139 | __ai uint64x2_t vreinterpretq_u64_s64(int64x2_t __p0) { | | |
| 33140 | uint64x2_t __ret; | | |
| 33141 | __ret = (uint64x2_t)(__p0); | | |
| 33142 | return __ret; | | |
| 33143 | } | | |
| 33144 | #else | | |
| 33145 | __ai uint64x2_t vreinterpretq_u64_s64(int64x2_t __p0) { | 31445 | __ai uint64x2_t vreinterpretq_u64_s64(int64x2_t __p0) { |
| 33146 | uint64x2_t __ret; | 31446 | uint64x2_t __ret; |
| 33147 | __ret = (uint64x2_t)(__p0); | 31447 | __ret = (uint64x2_t)(__p0); |
| 33148 | return __ret; | 31448 | return __ret; |
| 33149 | } | 31449 | } |
| 33150 | #endif | | |
| 33151 | | | |
| 33152 | #ifdef __LITTLE_ENDIAN__ | | |
| 33153 | __ai uint64x2_t vreinterpretq_u64_s16(int16x8_t __p0) { | | |
| 33154 | uint64x2_t __ret; | | |
| 33155 | __ret = (uint64x2_t)(__p0); | | |
| 33156 | return __ret; | | |
| 33157 | } | | |
| 33158 | #else | | |
| 33159 | __ai uint64x2_t vreinterpretq_u64_s16(int16x8_t __p0) { | 31450 | __ai uint64x2_t vreinterpretq_u64_s16(int16x8_t __p0) { |
| 33160 | uint64x2_t __ret; | 31451 | uint64x2_t __ret; |
| 33161 | __ret = (uint64x2_t)(__p0); | 31452 | __ret = (uint64x2_t)(__p0); |
| 33162 | return __ret; | 31453 | return __ret; |
| 33163 | } | 31454 | } |
| 33164 | #endif | | |
| 33165 | | | |
| 33166 | #ifdef __LITTLE_ENDIAN__ | | |
| 33167 | __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { | | |
| 33168 | uint16x8_t __ret; | | |
| 33169 | __ret = (uint16x8_t)(__p0); | | |
| 33170 | return __ret; | | |
| 33171 | } | | |
| 33172 | #else | | |
| 33173 | __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { | 31455 | __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { |
| 33174 | uint16x8_t __ret; | 31456 | uint16x8_t __ret; |
| 33175 | __ret = (uint16x8_t)(__p0); | 31457 | __ret = (uint16x8_t)(__p0); |
| 33176 | return __ret; | 31458 | return __ret; |
| 33177 | } | 31459 | } |
| 33178 | #endif | | |
| 33179 | | | |
| 33180 | #ifdef __LITTLE_ENDIAN__ | | |
| 33181 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { | | |
| 33182 | uint16x8_t __ret; | | |
| 33183 | __ret = (uint16x8_t)(__p0); | | |
| 33184 | return __ret; | | |
| 33185 | } | | |
| 33186 | #else | | |
| 33187 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { | 31460 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { |
| 33188 | uint16x8_t __ret; | 31461 | uint16x8_t __ret; |
| 33189 | __ret = (uint16x8_t)(__p0); | 31462 | __ret = (uint16x8_t)(__p0); |
| 33190 | return __ret; | 31463 | return __ret; |
| 33191 | } | 31464 | } |
| 33192 | #endif | | |
| 33193 | | | |
| 33194 | #ifdef __LITTLE_ENDIAN__ | | |
| 33195 | __ai uint16x8_t vreinterpretq_u16_u8(uint8x16_t __p0) { | | |
| 33196 | uint16x8_t __ret; | | |
| 33197 | __ret = (uint16x8_t)(__p0); | | |
| 33198 | return __ret; | | |
| 33199 | } | | |
| 33200 | #else | | |
| 33201 | __ai uint16x8_t vreinterpretq_u16_u8(uint8x16_t __p0) { | 31465 | __ai uint16x8_t vreinterpretq_u16_u8(uint8x16_t __p0) { |
| 33202 | uint16x8_t __ret; | 31466 | uint16x8_t __ret; |
| 33203 | __ret = (uint16x8_t)(__p0); | 31467 | __ret = (uint16x8_t)(__p0); |
| 33204 | return __ret; | 31468 | return __ret; |
| 33205 | } | 31469 | } |
| 33206 | #endif | | |
| 33207 | | | |
| 33208 | #ifdef __LITTLE_ENDIAN__ | | |
| 33209 | __ai uint16x8_t vreinterpretq_u16_u32(uint32x4_t __p0) { | | |
| 33210 | uint16x8_t __ret; | | |
| 33211 | __ret = (uint16x8_t)(__p0); | | |
| 33212 | return __ret; | | |
| 33213 | } | | |
| 33214 | #else | | |
| 33215 | __ai uint16x8_t vreinterpretq_u16_u32(uint32x4_t __p0) { | 31470 | __ai uint16x8_t vreinterpretq_u16_u32(uint32x4_t __p0) { |
| 33216 | uint16x8_t __ret; | 31471 | uint16x8_t __ret; |
| 33217 | __ret = (uint16x8_t)(__p0); | 31472 | __ret = (uint16x8_t)(__p0); |
| 33218 | return __ret; | 31473 | return __ret; |
| 33219 | } | 31474 | } |
| 33220 | #endif | | |
| 33221 | | | |
| 33222 | #ifdef __LITTLE_ENDIAN__ | | |
| 33223 | __ai uint16x8_t vreinterpretq_u16_u64(uint64x2_t __p0) { | | |
| 33224 | uint16x8_t __ret; | | |
| 33225 | __ret = (uint16x8_t)(__p0); | | |
| 33226 | return __ret; | | |
| 33227 | } | | |
| 33228 | #else | | |
| 33229 | __ai uint16x8_t vreinterpretq_u16_u64(uint64x2_t __p0) { | 31475 | __ai uint16x8_t vreinterpretq_u16_u64(uint64x2_t __p0) { |
| 33230 | uint16x8_t __ret; | 31476 | uint16x8_t __ret; |
| 33231 | __ret = (uint16x8_t)(__p0); | 31477 | __ret = (uint16x8_t)(__p0); |
| 33232 | return __ret; | 31478 | return __ret; |
| 33233 | } | 31479 | } |
| 33234 | #endif | | |
| 33235 | | | |
| 33236 | #ifdef __LITTLE_ENDIAN__ | | |
| 33237 | __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { | | |
| 33238 | uint16x8_t __ret; | | |
| 33239 | __ret = (uint16x8_t)(__p0); | | |
| 33240 | return __ret; | | |
| 33241 | } | | |
| 33242 | #else | | |
| 33243 | __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { | 31480 | __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { |
| 33244 | uint16x8_t __ret; | 31481 | uint16x8_t __ret; |
| 33245 | __ret = (uint16x8_t)(__p0); | 31482 | __ret = (uint16x8_t)(__p0); |
| 33246 | return __ret; | 31483 | return __ret; |
| 33247 | } | 31484 | } |
| 33248 | #endif | | |
| 33249 | | | |
| 33250 | #ifdef __LITTLE_ENDIAN__ | | |
| 33251 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { | | |
| 33252 | uint16x8_t __ret; | | |
| 33253 | __ret = (uint16x8_t)(__p0); | | |
| 33254 | return __ret; | | |
| 33255 | } | | |
| 33256 | #else | | |
| 33257 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { | 31485 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { |
| 33258 | uint16x8_t __ret; | 31486 | uint16x8_t __ret; |
| 33259 | __ret = (uint16x8_t)(__p0); | 31487 | __ret = (uint16x8_t)(__p0); |
| 33260 | return __ret; | 31488 | return __ret; |
| 33261 | } | 31489 | } |
| 33262 | #endif | | |
| 33263 | | | |
| 33264 | #ifdef __LITTLE_ENDIAN__ | | |
| 33265 | __ai uint16x8_t vreinterpretq_u16_f16(float16x8_t __p0) { | | |
| 33266 | uint16x8_t __ret; | | |
| 33267 | __ret = (uint16x8_t)(__p0); | | |
| 33268 | return __ret; | | |
| 33269 | } | | |
| 33270 | #else | | |
| 33271 | __ai uint16x8_t vreinterpretq_u16_f16(float16x8_t __p0) { | 31490 | __ai uint16x8_t vreinterpretq_u16_f16(float16x8_t __p0) { |
| 33272 | uint16x8_t __ret; | 31491 | uint16x8_t __ret; |
| 33273 | __ret = (uint16x8_t)(__p0); | 31492 | __ret = (uint16x8_t)(__p0); |
| 33274 | return __ret; | 31493 | return __ret; |
| 33275 | } | 31494 | } |
| 33276 | #endif | | |
| 33277 | | | |
| 33278 | #ifdef __LITTLE_ENDIAN__ | | |
| 33279 | __ai uint16x8_t vreinterpretq_u16_s32(int32x4_t __p0) { | | |
| 33280 | uint16x8_t __ret; | | |
| 33281 | __ret = (uint16x8_t)(__p0); | | |
| 33282 | return __ret; | | |
| 33283 | } | | |
| 33284 | #else | | |
| 33285 | __ai uint16x8_t vreinterpretq_u16_s32(int32x4_t __p0) { | 31495 | __ai uint16x8_t vreinterpretq_u16_s32(int32x4_t __p0) { |
| 33286 | uint16x8_t __ret; | 31496 | uint16x8_t __ret; |
| 33287 | __ret = (uint16x8_t)(__p0); | 31497 | __ret = (uint16x8_t)(__p0); |
| 33288 | return __ret; | 31498 | return __ret; |
| 33289 | } | 31499 | } |
| 33290 | #endif | | |
| 33291 | | | |
| 33292 | #ifdef __LITTLE_ENDIAN__ | | |
| 33293 | __ai uint16x8_t vreinterpretq_u16_s64(int64x2_t __p0) { | | |
| 33294 | uint16x8_t __ret; | | |
| 33295 | __ret = (uint16x8_t)(__p0); | | |
| 33296 | return __ret; | | |
| 33297 | } | | |
| 33298 | #else | | |
| 33299 | __ai uint16x8_t vreinterpretq_u16_s64(int64x2_t __p0) { | 31500 | __ai uint16x8_t vreinterpretq_u16_s64(int64x2_t __p0) { |
| 33300 | uint16x8_t __ret; | 31501 | uint16x8_t __ret; |
| 33301 | __ret = (uint16x8_t)(__p0); | 31502 | __ret = (uint16x8_t)(__p0); |
| 33302 | return __ret; | 31503 | return __ret; |
| 33303 | } | 31504 | } |
| 33304 | #endif | | |
| 33305 | | | |
| 33306 | #ifdef __LITTLE_ENDIAN__ | | |
| 33307 | __ai uint16x8_t vreinterpretq_u16_s16(int16x8_t __p0) { | | |
| 33308 | uint16x8_t __ret; | | |
| 33309 | __ret = (uint16x8_t)(__p0); | | |
| 33310 | return __ret; | | |
| 33311 | } | | |
| 33312 | #else | | |
| 33313 | __ai uint16x8_t vreinterpretq_u16_s16(int16x8_t __p0) { | 31505 | __ai uint16x8_t vreinterpretq_u16_s16(int16x8_t __p0) { |
| 33314 | uint16x8_t __ret; | 31506 | uint16x8_t __ret; |
| 33315 | __ret = (uint16x8_t)(__p0); | 31507 | __ret = (uint16x8_t)(__p0); |
| 33316 | return __ret; | 31508 | return __ret; |
| 33317 | } | 31509 | } |
| 33318 | #endif | | |
| 33319 | | | |
| 33320 | #ifdef __LITTLE_ENDIAN__ | | |
| 33321 | __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { | | |
| 33322 | int8x16_t __ret; | | |
| 33323 | __ret = (int8x16_t)(__p0); | | |
| 33324 | return __ret; | | |
| 33325 | } | | |
| 33326 | #else | | |
| 33327 | __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { | 31510 | __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { |
| 33328 | int8x16_t __ret; | 31511 | int8x16_t __ret; |
| 33329 | __ret = (int8x16_t)(__p0); | 31512 | __ret = (int8x16_t)(__p0); |
| 33330 | return __ret; | 31513 | return __ret; |
| 33331 | } | 31514 | } |
| 33332 | #endif | | |
| 33333 | | | |
| 33334 | #ifdef __LITTLE_ENDIAN__ | | |
| 33335 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { | | |
| 33336 | int8x16_t __ret; | | |
| 33337 | __ret = (int8x16_t)(__p0); | | |
| 33338 | return __ret; | | |
| 33339 | } | | |
| 33340 | #else | | |
| 33341 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { | 31515 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { |
| 33342 | int8x16_t __ret; | 31516 | int8x16_t __ret; |
| 33343 | __ret = (int8x16_t)(__p0); | 31517 | __ret = (int8x16_t)(__p0); |
| 33344 | return __ret; | 31518 | return __ret; |
| 33345 | } | 31519 | } |
| 33346 | #endif | | |
| 33347 | | | |
| 33348 | #ifdef __LITTLE_ENDIAN__ | | |
| 33349 | __ai int8x16_t vreinterpretq_s8_u8(uint8x16_t __p0) { | | |
| 33350 | int8x16_t __ret; | | |
| 33351 | __ret = (int8x16_t)(__p0); | | |
| 33352 | return __ret; | | |
| 33353 | } | | |
| 33354 | #else | | |
| 33355 | __ai int8x16_t vreinterpretq_s8_u8(uint8x16_t __p0) { | 31520 | __ai int8x16_t vreinterpretq_s8_u8(uint8x16_t __p0) { |
| 33356 | int8x16_t __ret; | 31521 | int8x16_t __ret; |
| 33357 | __ret = (int8x16_t)(__p0); | 31522 | __ret = (int8x16_t)(__p0); |
| 33358 | return __ret; | 31523 | return __ret; |
| 33359 | } | 31524 | } |
| 33360 | #endif | | |
| 33361 | | | |
| 33362 | #ifdef __LITTLE_ENDIAN__ | | |
| 33363 | __ai int8x16_t vreinterpretq_s8_u32(uint32x4_t __p0) { | | |
| 33364 | int8x16_t __ret; | | |
| 33365 | __ret = (int8x16_t)(__p0); | | |
| 33366 | return __ret; | | |
| 33367 | } | | |
| 33368 | #else | | |
| 33369 | __ai int8x16_t vreinterpretq_s8_u32(uint32x4_t __p0) { | 31525 | __ai int8x16_t vreinterpretq_s8_u32(uint32x4_t __p0) { |
| 33370 | int8x16_t __ret; | 31526 | int8x16_t __ret; |
| 33371 | __ret = (int8x16_t)(__p0); | 31527 | __ret = (int8x16_t)(__p0); |
| 33372 | return __ret; | 31528 | return __ret; |
| 33373 | } | 31529 | } |
| 33374 | #endif | | |
| 33375 | | | |
| 33376 | #ifdef __LITTLE_ENDIAN__ | | |
| 33377 | __ai int8x16_t vreinterpretq_s8_u64(uint64x2_t __p0) { | | |
| 33378 | int8x16_t __ret; | | |
| 33379 | __ret = (int8x16_t)(__p0); | | |
| 33380 | return __ret; | | |
| 33381 | } | | |
| 33382 | #else | | |
| 33383 | __ai int8x16_t vreinterpretq_s8_u64(uint64x2_t __p0) { | 31530 | __ai int8x16_t vreinterpretq_s8_u64(uint64x2_t __p0) { |
| 33384 | int8x16_t __ret; | 31531 | int8x16_t __ret; |
| 33385 | __ret = (int8x16_t)(__p0); | 31532 | __ret = (int8x16_t)(__p0); |
| 33386 | return __ret; | 31533 | return __ret; |
| 33387 | } | 31534 | } |
| 33388 | #endif | | |
| 33389 | | | |
| 33390 | #ifdef __LITTLE_ENDIAN__ | | |
| 33391 | __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { | | |
| 33392 | int8x16_t __ret; | | |
| 33393 | __ret = (int8x16_t)(__p0); | | |
| 33394 | return __ret; | | |
| 33395 | } | | |
| 33396 | #else | | |
| 33397 | __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { | 31535 | __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { |
| 33398 | int8x16_t __ret; | 31536 | int8x16_t __ret; |
| 33399 | __ret = (int8x16_t)(__p0); | 31537 | __ret = (int8x16_t)(__p0); |
| 33400 | return __ret; | 31538 | return __ret; |
| 33401 | } | 31539 | } |
| 33402 | #endif | | |
| 33403 | | | |
| 33404 | #ifdef __LITTLE_ENDIAN__ | | |
| 33405 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { | | |
| 33406 | int8x16_t __ret; | | |
| 33407 | __ret = (int8x16_t)(__p0); | | |
| 33408 | return __ret; | | |
| 33409 | } | | |
| 33410 | #else | | |
| 33411 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { | 31540 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { |
| 33412 | int8x16_t __ret; | 31541 | int8x16_t __ret; |
| 33413 | __ret = (int8x16_t)(__p0); | 31542 | __ret = (int8x16_t)(__p0); |
| 33414 | return __ret; | 31543 | return __ret; |
| 33415 | } | 31544 | } |
| 33416 | #endif | | |
| 33417 | | | |
| 33418 | #ifdef __LITTLE_ENDIAN__ | | |
| 33419 | __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { | | |
| 33420 | int8x16_t __ret; | | |
| 33421 | __ret = (int8x16_t)(__p0); | | |
| 33422 | return __ret; | | |
| 33423 | } | | |
| 33424 | #else | | |
| 33425 | __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { | 31545 | __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { |
| 33426 | int8x16_t __ret; | 31546 | int8x16_t __ret; |
| 33427 | __ret = (int8x16_t)(__p0); | 31547 | __ret = (int8x16_t)(__p0); |
| 33428 | return __ret; | 31548 | return __ret; |
| 33429 | } | 31549 | } |
| 33430 | #endif | | |
| 33431 | | | |
| 33432 | #ifdef __LITTLE_ENDIAN__ | | |
| 33433 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { | | |
| 33434 | int8x16_t __ret; | | |
| 33435 | __ret = (int8x16_t)(__p0); | | |
| 33436 | return __ret; | | |
| 33437 | } | | |
| 33438 | #else | | |
| 33439 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { | 31550 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { |
| 33440 | int8x16_t __ret; | 31551 | int8x16_t __ret; |
| 33441 | __ret = (int8x16_t)(__p0); | 31552 | __ret = (int8x16_t)(__p0); |
| 33442 | return __ret; | 31553 | return __ret; |
| 33443 | } | 31554 | } |
| 33444 | #endif | | |
| 33445 | | | |
| 33446 | #ifdef __LITTLE_ENDIAN__ | | |
| 33447 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { | | |
| 33448 | int8x16_t __ret; | | |
| 33449 | __ret = (int8x16_t)(__p0); | | |
| 33450 | return __ret; | | |
| 33451 | } | | |
| 33452 | #else | | |
| 33453 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { | 31555 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { |
| 33454 | int8x16_t __ret; | 31556 | int8x16_t __ret; |
| 33455 | __ret = (int8x16_t)(__p0); | 31557 | __ret = (int8x16_t)(__p0); |
| 33456 | return __ret; | 31558 | return __ret; |
| 33457 | } | 31559 | } |
| 33458 | #endif | | |
| 33459 | | | |
| 33460 | #ifdef __LITTLE_ENDIAN__ | | |
| 33461 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { | | |
| 33462 | int8x16_t __ret; | | |
| 33463 | __ret = (int8x16_t)(__p0); | | |
| 33464 | return __ret; | | |
| 33465 | } | | |
| 33466 | #else | | |
| 33467 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { | 31560 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { |
| 33468 | int8x16_t __ret; | 31561 | int8x16_t __ret; |
| 33469 | __ret = (int8x16_t)(__p0); | 31562 | __ret = (int8x16_t)(__p0); |
| 33470 | return __ret; | 31563 | return __ret; |
| 33471 | } | 31564 | } |
| 33472 | #endif | | |
| 33473 | | | |
| 33474 | #ifdef __LITTLE_ENDIAN__ | | |
| 33475 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { | | |
| 33476 | float32x4_t __ret; | | |
| 33477 | __ret = (float32x4_t)(__p0); | | |
| 33478 | return __ret; | | |
| 33479 | } | | |
| 33480 | #else | | |
| 33481 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { | 31565 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { |
| 33482 | float32x4_t __ret; | 31566 | float32x4_t __ret; |
| 33483 | __ret = (float32x4_t)(__p0); | 31567 | __ret = (float32x4_t)(__p0); |
| 33484 | return __ret; | 31568 | return __ret; |
| 33485 | } | 31569 | } |
| 33486 | #endif | | |
| 33487 | | | |
| 33488 | #ifdef __LITTLE_ENDIAN__ | | |
| 33489 | __ai float32x4_t vreinterpretq_f32_p16(poly16x8_t __p0) { | | |
| 33490 | float32x4_t __ret; | | |
| 33491 | __ret = (float32x4_t)(__p0); | | |
| 33492 | return __ret; | | |
| 33493 | } | | |
| 33494 | #else | | |
| 33495 | __ai float32x4_t vreinterpretq_f32_p16(poly16x8_t __p0) { | 31570 | __ai float32x4_t vreinterpretq_f32_p16(poly16x8_t __p0) { |
| 33496 | float32x4_t __ret; | 31571 | float32x4_t __ret; |
| 33497 | __ret = (float32x4_t)(__p0); | 31572 | __ret = (float32x4_t)(__p0); |
| 33498 | return __ret; | 31573 | return __ret; |
| 33499 | } | 31574 | } |
| 33500 | #endif | | |
| 33501 | | | |
| 33502 | #ifdef __LITTLE_ENDIAN__ | | |
| 33503 | __ai float32x4_t vreinterpretq_f32_u8(uint8x16_t __p0) { | 31575 | __ai float32x4_t vreinterpretq_f32_u8(uint8x16_t __p0) { |
| 33504 | float32x4_t __ret; | 31576 | float32x4_t __ret; |
| 33505 | __ret = (float32x4_t)(__p0); | 31577 | __ret = (float32x4_t)(__p0); |
| 33506 | return __ret; | 31578 | return __ret; |
| 33507 | } | 31579 | } |
| 33508 | #else | 31580 | __ai float32x4_t vreinterpretq_f32_u32(uint32x4_t __p0) { |
| 33509 | __ai float32x4_t vreinterpretq_f32_u8(uint8x16_t __p0) { | | |
| 33510 | float32x4_t __ret; | 31581 | float32x4_t __ret; |
| 33511 | __ret = (float32x4_t)(__p0); | 31582 | __ret = (float32x4_t)(__p0); |
| 33512 | return __ret; | 31583 | return __ret; |
| 33513 | } | 31584 | } |
| 33514 | #endif | 31585 | __ai float32x4_t vreinterpretq_f32_u64(uint64x2_t __p0) { |
| 33515 | | | |
| 33516 | #ifdef __LITTLE_ENDIAN__ | | |
| 33517 | __ai float32x4_t vreinterpretq_f32_u32(uint32x4_t __p0) { | | |
| 33518 | float32x4_t __ret; | 31586 | float32x4_t __ret; |
| 33519 | __ret = (float32x4_t)(__p0); | 31587 | __ret = (float32x4_t)(__p0); |
| 33520 | return __ret; | 31588 | return __ret; |
| 33521 | } | 31589 | } |
| 33522 | #else | 31590 | __ai float32x4_t vreinterpretq_f32_u16(uint16x8_t __p0) { |
| 33523 | __ai float32x4_t vreinterpretq_f32_u32(uint32x4_t __p0) { | | |
| 33524 | float32x4_t __ret; | 31591 | float32x4_t __ret; |
| 33525 | __ret = (float32x4_t)(__p0); | 31592 | __ret = (float32x4_t)(__p0); |
| 33526 | return __ret; | 31593 | return __ret; |
| 33527 | } | 31594 | } |
| 33528 | #endif | 31595 | __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { |
| 33529 | | | |
| 33530 | #ifdef __LITTLE_ENDIAN__ | | |
| 33531 | __ai float32x4_t vreinterpretq_f32_u64(uint64x2_t __p0) { | | |
| 33532 | float32x4_t __ret; | 31596 | float32x4_t __ret; |
| 33533 | __ret = (float32x4_t)(__p0); | 31597 | __ret = (float32x4_t)(__p0); |
| 33534 | return __ret; | 31598 | return __ret; |
| 33535 | } | 31599 | } |
| 33536 | #else | 31600 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { |
| 33537 | __ai float32x4_t vreinterpretq_f32_u64(uint64x2_t __p0) { | | |
| 33538 | float32x4_t __ret; | 31601 | float32x4_t __ret; |
| 33539 | __ret = (float32x4_t)(__p0); | 31602 | __ret = (float32x4_t)(__p0); |
| 33540 | return __ret; | 31603 | return __ret; |
| 33541 | } | 31604 | } |
| 33542 | #endif | 31605 | __ai float32x4_t vreinterpretq_f32_s32(int32x4_t __p0) { |
| 33543 | | | |
| 33544 | #ifdef __LITTLE_ENDIAN__ | | |
| 33545 | __ai float32x4_t vreinterpretq_f32_u16(uint16x8_t __p0) { | | |
| 33546 | float32x4_t __ret; | 31606 | float32x4_t __ret; |
| 33547 | __ret = (float32x4_t)(__p0); | 31607 | __ret = (float32x4_t)(__p0); |
| 33548 | return __ret; | 31608 | return __ret; |
| 33549 | } | 31609 | } |
| 33550 | #else | 31610 | __ai float32x4_t vreinterpretq_f32_s64(int64x2_t __p0) { |
| 33551 | __ai float32x4_t vreinterpretq_f32_u16(uint16x8_t __p0) { | | |
| 33552 | float32x4_t __ret; | 31611 | float32x4_t __ret; |
| 33553 | __ret = (float32x4_t)(__p0); | 31612 | __ret = (float32x4_t)(__p0); |
| 33554 | return __ret; | 31613 | return __ret; |
| 33555 | } | 31614 | } |
| 33556 | #endif | 31615 | __ai float32x4_t vreinterpretq_f32_s16(int16x8_t __p0) { |
| 33557 | | | |
| 33558 | #ifdef __LITTLE_ENDIAN__ | | |
| 33559 | __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { | | |
| 33560 | float32x4_t __ret; | 31616 | float32x4_t __ret; |
| 33561 | __ret = (float32x4_t)(__p0); | 31617 | __ret = (float32x4_t)(__p0); |
| 33562 | return __ret; | 31618 | return __ret; |
| 33563 | } | 31619 | } |
| 33564 | #else | 31620 | __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { |
| 33565 | __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { | 31621 | float16x8_t __ret; |
| 33566 | float32x4_t __ret; | 31622 | __ret = (float16x8_t)(__p0); |
| 33567 | __ret = (float32x4_t)(__p0); | | |
| 33568 | return __ret; | 31623 | return __ret; |
| 33569 | } | 31624 | } |
| 33570 | #endif | 31625 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { |
| 33571 | | 31626 | float16x8_t __ret; |
| 33572 | #ifdef __LITTLE_ENDIAN__ | 31627 | __ret = (float16x8_t)(__p0); |
| 33573 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { | | |
| 33574 | float32x4_t __ret; | | |
| 33575 | __ret = (float32x4_t)(__p0); | | |
| 33576 | return __ret; | 31628 | return __ret; |
| 33577 | } | 31629 | } |
| 33578 | #else | | |
| 33579 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { | | |
| 33580 | float32x4_t __ret; | | |
| 33581 | __ret = (float32x4_t)(__p0); | | |
| 33582 | return __ret; | | |
| 33583 | } | | |
| 33584 | #endif | | |
| 33585 | | | |
| 33586 | #ifdef __LITTLE_ENDIAN__ | | |
| 33587 | __ai float32x4_t vreinterpretq_f32_s32(int32x4_t __p0) { | | |
| 33588 | float32x4_t __ret; | | |
| 33589 | __ret = (float32x4_t)(__p0); | | |
| 33590 | return __ret; | | |
| 33591 | } | | |
| 33592 | #else | | |
| 33593 | __ai float32x4_t vreinterpretq_f32_s32(int32x4_t __p0) { | | |
| 33594 | float32x4_t __ret; | | |
| 33595 | __ret = (float32x4_t)(__p0); | | |
| 33596 | return __ret; | | |
| 33597 | } | | |
| 33598 | #endif | | |
| 33599 | | | |
| 33600 | #ifdef __LITTLE_ENDIAN__ | | |
| 33601 | __ai float32x4_t vreinterpretq_f32_s64(int64x2_t __p0) { | | |
| 33602 | float32x4_t __ret; | | |
| 33603 | __ret = (float32x4_t)(__p0); | | |
| 33604 | return __ret; | | |
| 33605 | } | | |
| 33606 | #else | | |
| 33607 | __ai float32x4_t vreinterpretq_f32_s64(int64x2_t __p0) { | | |
| 33608 | float32x4_t __ret; | | |
| 33609 | __ret = (float32x4_t)(__p0); | | |
| 33610 | return __ret; | | |
| 33611 | } | | |
| 33612 | #endif | | |
| 33613 | | | |
| 33614 | #ifdef __LITTLE_ENDIAN__ | | |
| 33615 | __ai float32x4_t vreinterpretq_f32_s16(int16x8_t __p0) { | | |
| 33616 | float32x4_t __ret; | | |
| 33617 | __ret = (float32x4_t)(__p0); | | |
| 33618 | return __ret; | | |
| 33619 | } | | |
| 33620 | #else | | |
| 33621 | __ai float32x4_t vreinterpretq_f32_s16(int16x8_t __p0) { | | |
| 33622 | float32x4_t __ret; | | |
| 33623 | __ret = (float32x4_t)(__p0); | | |
| 33624 | return __ret; | | |
| 33625 | } | | |
| 33626 | #endif | | |
| 33627 | | | |
| 33628 | #ifdef __LITTLE_ENDIAN__ | | |
| 33629 | __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { | | |
| 33630 | float16x8_t __ret; | | |
| 33631 | __ret = (float16x8_t)(__p0); | | |
| 33632 | return __ret; | | |
| 33633 | } | | |
| 33634 | #else | | |
| 33635 | __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { | | |
| 33636 | float16x8_t __ret; | | |
| 33637 | __ret = (float16x8_t)(__p0); | | |
| 33638 | return __ret; | | |
| 33639 | } | | |
| 33640 | #endif | | |
| 33641 | | | |
| 33642 | #ifdef __LITTLE_ENDIAN__ | | |
| 33643 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { | | |
| 33644 | float16x8_t __ret; | | |
| 33645 | __ret = (float16x8_t)(__p0); | | |
| 33646 | return __ret; | | |
| 33647 | } | | |
| 33648 | #else | | |
| 33649 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { | | |
| 33650 | float16x8_t __ret; | | |
| 33651 | __ret = (float16x8_t)(__p0); | | |
| 33652 | return __ret; | | |
| 33653 | } | | |
| 33654 | #endif | | |
| 33655 | | | |
| 33656 | #ifdef __LITTLE_ENDIAN__ | | |
| 33657 | __ai float16x8_t vreinterpretq_f16_u8(uint8x16_t __p0) { | | |
| 33658 | float16x8_t __ret; | | |
| 33659 | __ret = (float16x8_t)(__p0); | | |
| 33660 | return __ret; | | |
| 33661 | } | | |
| 33662 | #else | | |
| 33663 | __ai float16x8_t vreinterpretq_f16_u8(uint8x16_t __p0) { | 31630 | __ai float16x8_t vreinterpretq_f16_u8(uint8x16_t __p0) { |
| 33664 | float16x8_t __ret; | 31631 | float16x8_t __ret; |
| 33665 | __ret = (float16x8_t)(__p0); | 31632 | __ret = (float16x8_t)(__p0); |
| 33666 | return __ret; | 31633 | return __ret; |
| 33667 | } | 31634 | } |
| 33668 | #endif | | |
| 33669 | | | |
| 33670 | #ifdef __LITTLE_ENDIAN__ | | |
| 33671 | __ai float16x8_t vreinterpretq_f16_u32(uint32x4_t __p0) { | | |
| 33672 | float16x8_t __ret; | | |
| 33673 | __ret = (float16x8_t)(__p0); | | |
| 33674 | return __ret; | | |
| 33675 | } | | |
| 33676 | #else | | |
| 33677 | __ai float16x8_t vreinterpretq_f16_u32(uint32x4_t __p0) { | 31635 | __ai float16x8_t vreinterpretq_f16_u32(uint32x4_t __p0) { |
| 33678 | float16x8_t __ret; | 31636 | float16x8_t __ret; |
| 33679 | __ret = (float16x8_t)(__p0); | 31637 | __ret = (float16x8_t)(__p0); |
| 33680 | return __ret; | 31638 | return __ret; |
| 33681 | } | 31639 | } |
| 33682 | #endif | | |
| 33683 | | | |
| 33684 | #ifdef __LITTLE_ENDIAN__ | | |
| 33685 | __ai float16x8_t vreinterpretq_f16_u64(uint64x2_t __p0) { | | |
| 33686 | float16x8_t __ret; | | |
| 33687 | __ret = (float16x8_t)(__p0); | | |
| 33688 | return __ret; | | |
| 33689 | } | | |
| 33690 | #else | | |
| 33691 | __ai float16x8_t vreinterpretq_f16_u64(uint64x2_t __p0) { | 31640 | __ai float16x8_t vreinterpretq_f16_u64(uint64x2_t __p0) { |
| 33692 | float16x8_t __ret; | 31641 | float16x8_t __ret; |
| 33693 | __ret = (float16x8_t)(__p0); | 31642 | __ret = (float16x8_t)(__p0); |
| 33694 | return __ret; | 31643 | return __ret; |
| 33695 | } | 31644 | } |
| 33696 | #endif | | |
| 33697 | | | |
| 33698 | #ifdef __LITTLE_ENDIAN__ | | |
| 33699 | __ai float16x8_t vreinterpretq_f16_u16(uint16x8_t __p0) { | | |
| 33700 | float16x8_t __ret; | | |
| 33701 | __ret = (float16x8_t)(__p0); | | |
| 33702 | return __ret; | | |
| 33703 | } | | |
| 33704 | #else | | |
| 33705 | __ai float16x8_t vreinterpretq_f16_u16(uint16x8_t __p0) { | 31645 | __ai float16x8_t vreinterpretq_f16_u16(uint16x8_t __p0) { |
| 33706 | float16x8_t __ret; | 31646 | float16x8_t __ret; |
| 33707 | __ret = (float16x8_t)(__p0); | 31647 | __ret = (float16x8_t)(__p0); |
| 33708 | return __ret; | 31648 | return __ret; |
| 33709 | } | 31649 | } |
| 33710 | #endif | | |
| 33711 | | | |
| 33712 | #ifdef __LITTLE_ENDIAN__ | | |
| 33713 | __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { | | |
| 33714 | float16x8_t __ret; | | |
| 33715 | __ret = (float16x8_t)(__p0); | | |
| 33716 | return __ret; | | |
| 33717 | } | | |
| 33718 | #else | | |
| 33719 | __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { | 31650 | __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { |
| 33720 | float16x8_t __ret; | 31651 | float16x8_t __ret; |
| 33721 | __ret = (float16x8_t)(__p0); | 31652 | __ret = (float16x8_t)(__p0); |
| 33722 | return __ret; | 31653 | return __ret; |
| 33723 | } | 31654 | } |
| 33724 | #endif | | |
| 33725 | | | |
| 33726 | #ifdef __LITTLE_ENDIAN__ | | |
| 33727 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { | | |
| 33728 | float16x8_t __ret; | | |
| 33729 | __ret = (float16x8_t)(__p0); | | |
| 33730 | return __ret; | | |
| 33731 | } | | |
| 33732 | #else | | |
| 33733 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { | 31655 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { |
| 33734 | float16x8_t __ret; | 31656 | float16x8_t __ret; |
| 33735 | __ret = (float16x8_t)(__p0); | 31657 | __ret = (float16x8_t)(__p0); |
| 33736 | return __ret; | 31658 | return __ret; |
| 33737 | } | 31659 | } |
| 33738 | #endif | | |
| 33739 | | | |
| 33740 | #ifdef __LITTLE_ENDIAN__ | | |
| 33741 | __ai float16x8_t vreinterpretq_f16_s32(int32x4_t __p0) { | | |
| 33742 | float16x8_t __ret; | | |
| 33743 | __ret = (float16x8_t)(__p0); | | |
| 33744 | return __ret; | | |
| 33745 | } | | |
| 33746 | #else | | |
| 33747 | __ai float16x8_t vreinterpretq_f16_s32(int32x4_t __p0) { | 31660 | __ai float16x8_t vreinterpretq_f16_s32(int32x4_t __p0) { |
| 33748 | float16x8_t __ret; | 31661 | float16x8_t __ret; |
| 33749 | __ret = (float16x8_t)(__p0); | 31662 | __ret = (float16x8_t)(__p0); |
| 33750 | return __ret; | 31663 | return __ret; |
| 33751 | } | 31664 | } |
| 33752 | #endif | | |
| 33753 | | | |
| 33754 | #ifdef __LITTLE_ENDIAN__ | | |
| 33755 | __ai float16x8_t vreinterpretq_f16_s64(int64x2_t __p0) { | | |
| 33756 | float16x8_t __ret; | | |
| 33757 | __ret = (float16x8_t)(__p0); | | |
| 33758 | return __ret; | | |
| 33759 | } | | |
| 33760 | #else | | |
| 33761 | __ai float16x8_t vreinterpretq_f16_s64(int64x2_t __p0) { | 31665 | __ai float16x8_t vreinterpretq_f16_s64(int64x2_t __p0) { |
| 33762 | float16x8_t __ret; | 31666 | float16x8_t __ret; |
| 33763 | __ret = (float16x8_t)(__p0); | 31667 | __ret = (float16x8_t)(__p0); |
| 33764 | return __ret; | 31668 | return __ret; |
| 33765 | } | 31669 | } |
| 33766 | #endif | | |
| 33767 | | | |
| 33768 | #ifdef __LITTLE_ENDIAN__ | | |
| 33769 | __ai float16x8_t vreinterpretq_f16_s16(int16x8_t __p0) { | | |
| 33770 | float16x8_t __ret; | | |
| 33771 | __ret = (float16x8_t)(__p0); | | |
| 33772 | return __ret; | | |
| 33773 | } | | |
| 33774 | #else | | |
| 33775 | __ai float16x8_t vreinterpretq_f16_s16(int16x8_t __p0) { | 31670 | __ai float16x8_t vreinterpretq_f16_s16(int16x8_t __p0) { |
| 33776 | float16x8_t __ret; | 31671 | float16x8_t __ret; |
| 33777 | __ret = (float16x8_t)(__p0); | 31672 | __ret = (float16x8_t)(__p0); |
| 33778 | return __ret; | 31673 | return __ret; |
| 33779 | } | 31674 | } |
| 33780 | #endif | | |
| 33781 | | | |
| 33782 | #ifdef __LITTLE_ENDIAN__ | | |
| 33783 | __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { | | |
| 33784 | int32x4_t __ret; | | |
| 33785 | __ret = (int32x4_t)(__p0); | | |
| 33786 | return __ret; | | |
| 33787 | } | | |
| 33788 | #else | | |
| 33789 | __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { | 31675 | __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { |
| 33790 | int32x4_t __ret; | 31676 | int32x4_t __ret; |
| 33791 | __ret = (int32x4_t)(__p0); | 31677 | __ret = (int32x4_t)(__p0); |
| 33792 | return __ret; | 31678 | return __ret; |
| 33793 | } | 31679 | } |
| 33794 | #endif | | |
| 33795 | | | |
| 33796 | #ifdef __LITTLE_ENDIAN__ | | |
| 33797 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { | | |
| 33798 | int32x4_t __ret; | | |
| 33799 | __ret = (int32x4_t)(__p0); | | |
| 33800 | return __ret; | | |
| 33801 | } | | |
| 33802 | #else | | |
| 33803 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { | 31680 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { |
| 33804 | int32x4_t __ret; | 31681 | int32x4_t __ret; |
| 33805 | __ret = (int32x4_t)(__p0); | 31682 | __ret = (int32x4_t)(__p0); |
| 33806 | return __ret; | 31683 | return __ret; |
| 33807 | } | 31684 | } |
| 33808 | #endif | | |
| 33809 | | | |
| 33810 | #ifdef __LITTLE_ENDIAN__ | | |
| 33811 | __ai int32x4_t vreinterpretq_s32_u8(uint8x16_t __p0) { | | |
| 33812 | int32x4_t __ret; | | |
| 33813 | __ret = (int32x4_t)(__p0); | | |
| 33814 | return __ret; | | |
| 33815 | } | | |
| 33816 | #else | | |
| 33817 | __ai int32x4_t vreinterpretq_s32_u8(uint8x16_t __p0) { | 31685 | __ai int32x4_t vreinterpretq_s32_u8(uint8x16_t __p0) { |
| 33818 | int32x4_t __ret; | 31686 | int32x4_t __ret; |
| 33819 | __ret = (int32x4_t)(__p0); | 31687 | __ret = (int32x4_t)(__p0); |
| 33820 | return __ret; | 31688 | return __ret; |
| 33821 | } | 31689 | } |
| 33822 | #endif | | |
| 33823 | | | |
| 33824 | #ifdef __LITTLE_ENDIAN__ | | |
| 33825 | __ai int32x4_t vreinterpretq_s32_u32(uint32x4_t __p0) { | | |
| 33826 | int32x4_t __ret; | | |
| 33827 | __ret = (int32x4_t)(__p0); | | |
| 33828 | return __ret; | | |
| 33829 | } | | |
| 33830 | #else | | |
| 33831 | __ai int32x4_t vreinterpretq_s32_u32(uint32x4_t __p0) { | 31690 | __ai int32x4_t vreinterpretq_s32_u32(uint32x4_t __p0) { |
| 33832 | int32x4_t __ret; | 31691 | int32x4_t __ret; |
| 33833 | __ret = (int32x4_t)(__p0); | 31692 | __ret = (int32x4_t)(__p0); |
| 33834 | return __ret; | 31693 | return __ret; |
| 33835 | } | 31694 | } |
| 33836 | #endif | | |
| 33837 | | | |
| 33838 | #ifdef __LITTLE_ENDIAN__ | | |
| 33839 | __ai int32x4_t vreinterpretq_s32_u64(uint64x2_t __p0) { | | |
| 33840 | int32x4_t __ret; | | |
| 33841 | __ret = (int32x4_t)(__p0); | | |
| 33842 | return __ret; | | |
| 33843 | } | | |
| 33844 | #else | | |
| 33845 | __ai int32x4_t vreinterpretq_s32_u64(uint64x2_t __p0) { | 31695 | __ai int32x4_t vreinterpretq_s32_u64(uint64x2_t __p0) { |
| 33846 | int32x4_t __ret; | 31696 | int32x4_t __ret; |
| 33847 | __ret = (int32x4_t)(__p0); | 31697 | __ret = (int32x4_t)(__p0); |
| 33848 | return __ret; | 31698 | return __ret; |
| 33849 | } | 31699 | } |
| 33850 | #endif | | |
| 33851 | | | |
| 33852 | #ifdef __LITTLE_ENDIAN__ | | |
| 33853 | __ai int32x4_t vreinterpretq_s32_u16(uint16x8_t __p0) { | | |
| 33854 | int32x4_t __ret; | | |
| 33855 | __ret = (int32x4_t)(__p0); | | |
| 33856 | return __ret; | | |
| 33857 | } | | |
| 33858 | #else | | |
| 33859 | __ai int32x4_t vreinterpretq_s32_u16(uint16x8_t __p0) { | 31700 | __ai int32x4_t vreinterpretq_s32_u16(uint16x8_t __p0) { |
| 33860 | int32x4_t __ret; | 31701 | int32x4_t __ret; |
| 33861 | __ret = (int32x4_t)(__p0); | 31702 | __ret = (int32x4_t)(__p0); |
| 33862 | return __ret; | 31703 | return __ret; |
| 33863 | } | 31704 | } |
| 33864 | #endif | | |
| 33865 | | | |
| 33866 | #ifdef __LITTLE_ENDIAN__ | | |
| 33867 | __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { | | |
| 33868 | int32x4_t __ret; | | |
| 33869 | __ret = (int32x4_t)(__p0); | | |
| 33870 | return __ret; | | |
| 33871 | } | | |
| 33872 | #else | | |
| 33873 | __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { | 31705 | __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { |
| 33874 | int32x4_t __ret; | 31706 | int32x4_t __ret; |
| 33875 | __ret = (int32x4_t)(__p0); | 31707 | __ret = (int32x4_t)(__p0); |
| 33876 | return __ret; | 31708 | return __ret; |
| 33877 | } | 31709 | } |
| 33878 | #endif | | |
| 33879 | | | |
| 33880 | #ifdef __LITTLE_ENDIAN__ | | |
| 33881 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { | | |
| 33882 | int32x4_t __ret; | | |
| 33883 | __ret = (int32x4_t)(__p0); | | |
| 33884 | return __ret; | | |
| 33885 | } | | |
| 33886 | #else | | |
| 33887 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { | 31710 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { |
| 33888 | int32x4_t __ret; | 31711 | int32x4_t __ret; |
| 33889 | __ret = (int32x4_t)(__p0); | 31712 | __ret = (int32x4_t)(__p0); |
| 33890 | return __ret; | 31713 | return __ret; |
| 33891 | } | 31714 | } |
| 33892 | #endif | | |
| 33893 | | | |
| 33894 | #ifdef __LITTLE_ENDIAN__ | | |
| 33895 | __ai int32x4_t vreinterpretq_s32_f16(float16x8_t __p0) { | | |
| 33896 | int32x4_t __ret; | | |
| 33897 | __ret = (int32x4_t)(__p0); | | |
| 33898 | return __ret; | | |
| 33899 | } | | |
| 33900 | #else | | |
| 33901 | __ai int32x4_t vreinterpretq_s32_f16(float16x8_t __p0) { | 31715 | __ai int32x4_t vreinterpretq_s32_f16(float16x8_t __p0) { |
| 33902 | int32x4_t __ret; | 31716 | int32x4_t __ret; |
| 33903 | __ret = (int32x4_t)(__p0); | 31717 | __ret = (int32x4_t)(__p0); |
| 33904 | return __ret; | 31718 | return __ret; |
| 33905 | } | 31719 | } |
| 33906 | #endif | | |
| 33907 | | | |
| 33908 | #ifdef __LITTLE_ENDIAN__ | | |
| 33909 | __ai int32x4_t vreinterpretq_s32_s64(int64x2_t __p0) { | | |
| 33910 | int32x4_t __ret; | | |
| 33911 | __ret = (int32x4_t)(__p0); | | |
| 33912 | return __ret; | | |
| 33913 | } | | |
| 33914 | #else | | |
| 33915 | __ai int32x4_t vreinterpretq_s32_s64(int64x2_t __p0) { | 31720 | __ai int32x4_t vreinterpretq_s32_s64(int64x2_t __p0) { |
| 33916 | int32x4_t __ret; | 31721 | int32x4_t __ret; |
| 33917 | __ret = (int32x4_t)(__p0); | 31722 | __ret = (int32x4_t)(__p0); |
| 33918 | return __ret; | 31723 | return __ret; |
| 33919 | } | 31724 | } |
| 33920 | #endif | | |
| 33921 | | | |
| 33922 | #ifdef __LITTLE_ENDIAN__ | | |
| 33923 | __ai int32x4_t vreinterpretq_s32_s16(int16x8_t __p0) { | | |
| 33924 | int32x4_t __ret; | | |
| 33925 | __ret = (int32x4_t)(__p0); | | |
| 33926 | return __ret; | | |
| 33927 | } | | |
| 33928 | #else | | |
| 33929 | __ai int32x4_t vreinterpretq_s32_s16(int16x8_t __p0) { | 31725 | __ai int32x4_t vreinterpretq_s32_s16(int16x8_t __p0) { |
| 33930 | int32x4_t __ret; | 31726 | int32x4_t __ret; |
| 33931 | __ret = (int32x4_t)(__p0); | 31727 | __ret = (int32x4_t)(__p0); |
| 33932 | return __ret; | 31728 | return __ret; |
| 33933 | } | 31729 | } |
| 33934 | #endif | | |
| 33935 | | | |
| 33936 | #ifdef __LITTLE_ENDIAN__ | | |
| 33937 | __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { | | |
| 33938 | int64x2_t __ret; | | |
| 33939 | __ret = (int64x2_t)(__p0); | | |
| 33940 | return __ret; | | |
| 33941 | } | | |
| 33942 | #else | | |
| 33943 | __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { | 31730 | __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { |
| 33944 | int64x2_t __ret; | 31731 | int64x2_t __ret; |
| 33945 | __ret = (int64x2_t)(__p0); | 31732 | __ret = (int64x2_t)(__p0); |
| 33946 | return __ret; | 31733 | return __ret; |
| 33947 | } | 31734 | } |
| 33948 | #endif | | |
| 33949 | | | |
| 33950 | #ifdef __LITTLE_ENDIAN__ | | |
| 33951 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { | | |
| 33952 | int64x2_t __ret; | | |
| 33953 | __ret = (int64x2_t)(__p0); | | |
| 33954 | return __ret; | | |
| 33955 | } | | |
| 33956 | #else | | |
| 33957 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { | 31735 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { |
| 33958 | int64x2_t __ret; | 31736 | int64x2_t __ret; |
| 33959 | __ret = (int64x2_t)(__p0); | 31737 | __ret = (int64x2_t)(__p0); |
| 33960 | return __ret; | 31738 | return __ret; |
| 33961 | } | 31739 | } |
| 33962 | #endif | | |
| 33963 | | | |
| 33964 | #ifdef __LITTLE_ENDIAN__ | | |
| 33965 | __ai int64x2_t vreinterpretq_s64_u8(uint8x16_t __p0) { | | |
| 33966 | int64x2_t __ret; | | |
| 33967 | __ret = (int64x2_t)(__p0); | | |
| 33968 | return __ret; | | |
| 33969 | } | | |
| 33970 | #else | | |
| 33971 | __ai int64x2_t vreinterpretq_s64_u8(uint8x16_t __p0) { | 31740 | __ai int64x2_t vreinterpretq_s64_u8(uint8x16_t __p0) { |
| 33972 | int64x2_t __ret; | 31741 | int64x2_t __ret; |
| 33973 | __ret = (int64x2_t)(__p0); | 31742 | __ret = (int64x2_t)(__p0); |
| 33974 | return __ret; | 31743 | return __ret; |
| 33975 | } | 31744 | } |
| 33976 | #endif | | |
| 33977 | | | |
| 33978 | #ifdef __LITTLE_ENDIAN__ | | |
| 33979 | __ai int64x2_t vreinterpretq_s64_u32(uint32x4_t __p0) { | | |
| 33980 | int64x2_t __ret; | | |
| 33981 | __ret = (int64x2_t)(__p0); | | |
| 33982 | return __ret; | | |
| 33983 | } | | |
| 33984 | #else | | |
| 33985 | __ai int64x2_t vreinterpretq_s64_u32(uint32x4_t __p0) { | 31745 | __ai int64x2_t vreinterpretq_s64_u32(uint32x4_t __p0) { |
| 33986 | int64x2_t __ret; | 31746 | int64x2_t __ret; |
| 33987 | __ret = (int64x2_t)(__p0); | 31747 | __ret = (int64x2_t)(__p0); |
| 33988 | return __ret; | 31748 | return __ret; |
| 33989 | } | 31749 | } |
| 33990 | #endif | | |
| 33991 | | | |
| 33992 | #ifdef __LITTLE_ENDIAN__ | | |
| 33993 | __ai int64x2_t vreinterpretq_s64_u64(uint64x2_t __p0) { | | |
| 33994 | int64x2_t __ret; | | |
| 33995 | __ret = (int64x2_t)(__p0); | | |
| 33996 | return __ret; | | |
| 33997 | } | | |
| 33998 | #else | | |
| 33999 | __ai int64x2_t vreinterpretq_s64_u64(uint64x2_t __p0) { | 31750 | __ai int64x2_t vreinterpretq_s64_u64(uint64x2_t __p0) { |
| 34000 | int64x2_t __ret; | 31751 | int64x2_t __ret; |
| 34001 | __ret = (int64x2_t)(__p0); | 31752 | __ret = (int64x2_t)(__p0); |
| 34002 | return __ret; | 31753 | return __ret; |
| 34003 | } | 31754 | } |
| 34004 | #endif | | |
| 34005 | | | |
| 34006 | #ifdef __LITTLE_ENDIAN__ | | |
| 34007 | __ai int64x2_t vreinterpretq_s64_u16(uint16x8_t __p0) { | | |
| 34008 | int64x2_t __ret; | | |
| 34009 | __ret = (int64x2_t)(__p0); | | |
| 34010 | return __ret; | | |
| 34011 | } | | |
| 34012 | #else | | |
| 34013 | __ai int64x2_t vreinterpretq_s64_u16(uint16x8_t __p0) { | 31755 | __ai int64x2_t vreinterpretq_s64_u16(uint16x8_t __p0) { |
| 34014 | int64x2_t __ret; | 31756 | int64x2_t __ret; |
| 34015 | __ret = (int64x2_t)(__p0); | 31757 | __ret = (int64x2_t)(__p0); |
| 34016 | return __ret; | 31758 | return __ret; |
| 34017 | } | 31759 | } |
| 34018 | #endif | | |
| 34019 | | | |
| 34020 | #ifdef __LITTLE_ENDIAN__ | | |
| 34021 | __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { | | |
| 34022 | int64x2_t __ret; | | |
| 34023 | __ret = (int64x2_t)(__p0); | | |
| 34024 | return __ret; | | |
| 34025 | } | | |
| 34026 | #else | | |
| 34027 | __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { | 31760 | __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { |
| 34028 | int64x2_t __ret; | 31761 | int64x2_t __ret; |
| 34029 | __ret = (int64x2_t)(__p0); | 31762 | __ret = (int64x2_t)(__p0); |
| 34030 | return __ret; | 31763 | return __ret; |
| 34031 | } | 31764 | } |
| 34032 | #endif | | |
| 34033 | | | |
| 34034 | #ifdef __LITTLE_ENDIAN__ | | |
| 34035 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { | | |
| 34036 | int64x2_t __ret; | | |
| 34037 | __ret = (int64x2_t)(__p0); | | |
| 34038 | return __ret; | | |
| 34039 | } | | |
| 34040 | #else | | |
| 34041 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { | 31765 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { |
| 34042 | int64x2_t __ret; | 31766 | int64x2_t __ret; |
| 34043 | __ret = (int64x2_t)(__p0); | 31767 | __ret = (int64x2_t)(__p0); |
| 34044 | return __ret; | 31768 | return __ret; |
| 34045 | } | 31769 | } |
| 34046 | #endif | | |
| 34047 | | | |
| 34048 | #ifdef __LITTLE_ENDIAN__ | | |
| 34049 | __ai int64x2_t vreinterpretq_s64_f16(float16x8_t __p0) { | | |
| 34050 | int64x2_t __ret; | | |
| 34051 | __ret = (int64x2_t)(__p0); | | |
| 34052 | return __ret; | | |
| 34053 | } | | |
| 34054 | #else | | |
| 34055 | __ai int64x2_t vreinterpretq_s64_f16(float16x8_t __p0) { | 31770 | __ai int64x2_t vreinterpretq_s64_f16(float16x8_t __p0) { |
| 34056 | int64x2_t __ret; | 31771 | int64x2_t __ret; |
| 34057 | __ret = (int64x2_t)(__p0); | 31772 | __ret = (int64x2_t)(__p0); |
| 34058 | return __ret; | 31773 | return __ret; |
| 34059 | } | 31774 | } |
| 34060 | #endif | | |
| 34061 | | | |
| 34062 | #ifdef __LITTLE_ENDIAN__ | | |
| 34063 | __ai int64x2_t vreinterpretq_s64_s32(int32x4_t __p0) { | | |
| 34064 | int64x2_t __ret; | | |
| 34065 | __ret = (int64x2_t)(__p0); | | |
| 34066 | return __ret; | | |
| 34067 | } | | |
| 34068 | #else | | |
| 34069 | __ai int64x2_t vreinterpretq_s64_s32(int32x4_t __p0) { | 31775 | __ai int64x2_t vreinterpretq_s64_s32(int32x4_t __p0) { |
| 34070 | int64x2_t __ret; | 31776 | int64x2_t __ret; |
| 34071 | __ret = (int64x2_t)(__p0); | 31777 | __ret = (int64x2_t)(__p0); |
| 34072 | return __ret; | 31778 | return __ret; |
| 34073 | } | 31779 | } |
| 34074 | #endif | | |
| 34075 | | | |
| 34076 | #ifdef __LITTLE_ENDIAN__ | | |
| 34077 | __ai int64x2_t vreinterpretq_s64_s16(int16x8_t __p0) { | | |
| 34078 | int64x2_t __ret; | | |
| 34079 | __ret = (int64x2_t)(__p0); | | |
| 34080 | return __ret; | | |
| 34081 | } | | |
| 34082 | #else | | |
| 34083 | __ai int64x2_t vreinterpretq_s64_s16(int16x8_t __p0) { | 31780 | __ai int64x2_t vreinterpretq_s64_s16(int16x8_t __p0) { |
| 34084 | int64x2_t __ret; | 31781 | int64x2_t __ret; |
| 34085 | __ret = (int64x2_t)(__p0); | 31782 | __ret = (int64x2_t)(__p0); |
| 34086 | return __ret; | 31783 | return __ret; |
| 34087 | } | 31784 | } |
| 34088 | #endif | | |
| 34089 | | | |
| 34090 | #ifdef __LITTLE_ENDIAN__ | | |
| 34091 | __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { | | |
| 34092 | int16x8_t __ret; | | |
| 34093 | __ret = (int16x8_t)(__p0); | | |
| 34094 | return __ret; | | |
| 34095 | } | | |
| 34096 | #else | | |
| 34097 | __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { | 31785 | __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { |
| 34098 | int16x8_t __ret; | 31786 | int16x8_t __ret; |
| 34099 | __ret = (int16x8_t)(__p0); | 31787 | __ret = (int16x8_t)(__p0); |
| 34100 | return __ret; | 31788 | return __ret; |
| 34101 | } | 31789 | } |
| 34102 | #endif | | |
| 34103 | | | |
| 34104 | #ifdef __LITTLE_ENDIAN__ | | |
| 34105 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { | | |
| 34106 | int16x8_t __ret; | | |
| 34107 | __ret = (int16x8_t)(__p0); | | |
| 34108 | return __ret; | | |
| 34109 | } | | |
| 34110 | #else | | |
| 34111 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { | 31790 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { |
| 34112 | int16x8_t __ret; | 31791 | int16x8_t __ret; |
| 34113 | __ret = (int16x8_t)(__p0); | 31792 | __ret = (int16x8_t)(__p0); |
| 34114 | return __ret; | 31793 | return __ret; |
| 34115 | } | 31794 | } |
| 34116 | #endif | | |
| 34117 | | | |
| 34118 | #ifdef __LITTLE_ENDIAN__ | | |
| 34119 | __ai int16x8_t vreinterpretq_s16_u8(uint8x16_t __p0) { | | |
| 34120 | int16x8_t __ret; | | |
| 34121 | __ret = (int16x8_t)(__p0); | | |
| 34122 | return __ret; | | |
| 34123 | } | | |
| 34124 | #else | | |
| 34125 | __ai int16x8_t vreinterpretq_s16_u8(uint8x16_t __p0) { | 31795 | __ai int16x8_t vreinterpretq_s16_u8(uint8x16_t __p0) { |
| 34126 | int16x8_t __ret; | 31796 | int16x8_t __ret; |
| 34127 | __ret = (int16x8_t)(__p0); | 31797 | __ret = (int16x8_t)(__p0); |
| 34128 | return __ret; | 31798 | return __ret; |
| 34129 | } | 31799 | } |
| 34130 | #endif | | |
| 34131 | | | |
| 34132 | #ifdef __LITTLE_ENDIAN__ | | |
| 34133 | __ai int16x8_t vreinterpretq_s16_u32(uint32x4_t __p0) { | | |
| 34134 | int16x8_t __ret; | | |
| 34135 | __ret = (int16x8_t)(__p0); | | |
| 34136 | return __ret; | | |
| 34137 | } | | |
| 34138 | #else | | |
| 34139 | __ai int16x8_t vreinterpretq_s16_u32(uint32x4_t __p0) { | 31800 | __ai int16x8_t vreinterpretq_s16_u32(uint32x4_t __p0) { |
| 34140 | int16x8_t __ret; | 31801 | int16x8_t __ret; |
| 34141 | __ret = (int16x8_t)(__p0); | 31802 | __ret = (int16x8_t)(__p0); |
| 34142 | return __ret; | 31803 | return __ret; |
| 34143 | } | 31804 | } |
| 34144 | #endif | | |
| 34145 | | | |
| 34146 | #ifdef __LITTLE_ENDIAN__ | | |
| 34147 | __ai int16x8_t vreinterpretq_s16_u64(uint64x2_t __p0) { | | |
| 34148 | int16x8_t __ret; | | |
| 34149 | __ret = (int16x8_t)(__p0); | | |
| 34150 | return __ret; | | |
| 34151 | } | | |
| 34152 | #else | | |
| 34153 | __ai int16x8_t vreinterpretq_s16_u64(uint64x2_t __p0) { | 31805 | __ai int16x8_t vreinterpretq_s16_u64(uint64x2_t __p0) { |
| 34154 | int16x8_t __ret; | 31806 | int16x8_t __ret; |
| 34155 | __ret = (int16x8_t)(__p0); | 31807 | __ret = (int16x8_t)(__p0); |
| 34156 | return __ret; | 31808 | return __ret; |
| 34157 | } | 31809 | } |
| 34158 | #endif | | |
| 34159 | | | |
| 34160 | #ifdef __LITTLE_ENDIAN__ | | |
| 34161 | __ai int16x8_t vreinterpretq_s16_u16(uint16x8_t __p0) { | | |
| 34162 | int16x8_t __ret; | | |
| 34163 | __ret = (int16x8_t)(__p0); | | |
| 34164 | return __ret; | | |
| 34165 | } | | |
| 34166 | #else | | |
| 34167 | __ai int16x8_t vreinterpretq_s16_u16(uint16x8_t __p0) { | 31810 | __ai int16x8_t vreinterpretq_s16_u16(uint16x8_t __p0) { |
| 34168 | int16x8_t __ret; | 31811 | int16x8_t __ret; |
| 34169 | __ret = (int16x8_t)(__p0); | 31812 | __ret = (int16x8_t)(__p0); |
| 34170 | return __ret; | 31813 | return __ret; |
| 34171 | } | 31814 | } |
| 34172 | #endif | | |
| 34173 | | | |
| 34174 | #ifdef __LITTLE_ENDIAN__ | | |
| 34175 | __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { | | |
| 34176 | int16x8_t __ret; | | |
| 34177 | __ret = (int16x8_t)(__p0); | | |
| 34178 | return __ret; | | |
| 34179 | } | | |
| 34180 | #else | | |
| 34181 | __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { | 31815 | __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { |
| 34182 | int16x8_t __ret; | 31816 | int16x8_t __ret; |
| 34183 | __ret = (int16x8_t)(__p0); | 31817 | __ret = (int16x8_t)(__p0); |
| 34184 | return __ret; | 31818 | return __ret; |
| 34185 | } | 31819 | } |
| 34186 | #endif | | |
| 34187 | | | |
| 34188 | #ifdef __LITTLE_ENDIAN__ | | |
| 34189 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { | | |
| 34190 | int16x8_t __ret; | | |
| 34191 | __ret = (int16x8_t)(__p0); | | |
| 34192 | return __ret; | | |
| 34193 | } | | |
| 34194 | #else | | |
| 34195 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { | 31820 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { |
| 34196 | int16x8_t __ret; | 31821 | int16x8_t __ret; |
| 34197 | __ret = (int16x8_t)(__p0); | 31822 | __ret = (int16x8_t)(__p0); |
| 34198 | return __ret; | 31823 | return __ret; |
| 34199 | } | 31824 | } |
| 34200 | #endif | | |
| 34201 | | | |
| 34202 | #ifdef __LITTLE_ENDIAN__ | | |
| 34203 | __ai int16x8_t vreinterpretq_s16_f16(float16x8_t __p0) { | | |
| 34204 | int16x8_t __ret; | | |
| 34205 | __ret = (int16x8_t)(__p0); | | |
| 34206 | return __ret; | | |
| 34207 | } | | |
| 34208 | #else | | |
| 34209 | __ai int16x8_t vreinterpretq_s16_f16(float16x8_t __p0) { | 31825 | __ai int16x8_t vreinterpretq_s16_f16(float16x8_t __p0) { |
| 34210 | int16x8_t __ret; | 31826 | int16x8_t __ret; |
| 34211 | __ret = (int16x8_t)(__p0); | 31827 | __ret = (int16x8_t)(__p0); |
| 34212 | return __ret; | 31828 | return __ret; |
| 34213 | } | 31829 | } |
| 34214 | #endif | | |
| 34215 | | | |
| 34216 | #ifdef __LITTLE_ENDIAN__ | | |
| 34217 | __ai int16x8_t vreinterpretq_s16_s32(int32x4_t __p0) { | | |
| 34218 | int16x8_t __ret; | | |
| 34219 | __ret = (int16x8_t)(__p0); | | |
| 34220 | return __ret; | | |
| 34221 | } | | |
| 34222 | #else | | |
| 34223 | __ai int16x8_t vreinterpretq_s16_s32(int32x4_t __p0) { | 31830 | __ai int16x8_t vreinterpretq_s16_s32(int32x4_t __p0) { |
| 34224 | int16x8_t __ret; | 31831 | int16x8_t __ret; |
| 34225 | __ret = (int16x8_t)(__p0); | 31832 | __ret = (int16x8_t)(__p0); |
| 34226 | return __ret; | 31833 | return __ret; |
| 34227 | } | 31834 | } |
| 34228 | #endif | | |
| 34229 | | | |
| 34230 | #ifdef __LITTLE_ENDIAN__ | | |
| 34231 | __ai int16x8_t vreinterpretq_s16_s64(int64x2_t __p0) { | | |
| 34232 | int16x8_t __ret; | | |
| 34233 | __ret = (int16x8_t)(__p0); | | |
| 34234 | return __ret; | | |
| 34235 | } | | |
| 34236 | #else | | |
| 34237 | __ai int16x8_t vreinterpretq_s16_s64(int64x2_t __p0) { | 31835 | __ai int16x8_t vreinterpretq_s16_s64(int64x2_t __p0) { |
| 34238 | int16x8_t __ret; | 31836 | int16x8_t __ret; |
| 34239 | __ret = (int16x8_t)(__p0); | 31837 | __ret = (int16x8_t)(__p0); |
| 34240 | return __ret; | 31838 | return __ret; |
| 34241 | } | 31839 | } |
| 34242 | #endif | | |
| 34243 | | | |
| 34244 | #ifdef __LITTLE_ENDIAN__ | | |
| 34245 | __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { | | |
| 34246 | uint8x8_t __ret; | | |
| 34247 | __ret = (uint8x8_t)(__p0); | | |
| 34248 | return __ret; | | |
| 34249 | } | | |
| 34250 | #else | | |
| 34251 | __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { | 31840 | __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { |
| 34252 | uint8x8_t __ret; | 31841 | uint8x8_t __ret; |
| 34253 | __ret = (uint8x8_t)(__p0); | 31842 | __ret = (uint8x8_t)(__p0); |
| 34254 | return __ret; | 31843 | return __ret; |
| 34255 | } | 31844 | } |
| 34256 | #endif | | |
| 34257 | | | |
| 34258 | #ifdef __LITTLE_ENDIAN__ | | |
| 34259 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { | | |
| 34260 | uint8x8_t __ret; | | |
| 34261 | __ret = (uint8x8_t)(__p0); | | |
| 34262 | return __ret; | | |
| 34263 | } | | |
| 34264 | #else | | |
| 34265 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { | 31845 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { |
| 34266 | uint8x8_t __ret; | 31846 | uint8x8_t __ret; |
| 34267 | __ret = (uint8x8_t)(__p0); | 31847 | __ret = (uint8x8_t)(__p0); |
| 34268 | return __ret; | 31848 | return __ret; |
| 34269 | } | 31849 | } |
| 34270 | #endif | | |
| 34271 | | | |
| 34272 | #ifdef __LITTLE_ENDIAN__ | | |
| 34273 | __ai uint8x8_t vreinterpret_u8_u32(uint32x2_t __p0) { | | |
| 34274 | uint8x8_t __ret; | | |
| 34275 | __ret = (uint8x8_t)(__p0); | | |
| 34276 | return __ret; | | |
| 34277 | } | | |
| 34278 | #else | | |
| 34279 | __ai uint8x8_t vreinterpret_u8_u32(uint32x2_t __p0) { | 31850 | __ai uint8x8_t vreinterpret_u8_u32(uint32x2_t __p0) { |
| 34280 | uint8x8_t __ret; | 31851 | uint8x8_t __ret; |
| 34281 | __ret = (uint8x8_t)(__p0); | 31852 | __ret = (uint8x8_t)(__p0); |
| 34282 | return __ret; | 31853 | return __ret; |
| 34283 | } | 31854 | } |
| 34284 | #endif | | |
| 34285 | | | |
| 34286 | #ifdef __LITTLE_ENDIAN__ | | |
| 34287 | __ai uint8x8_t vreinterpret_u8_u64(uint64x1_t __p0) { | 31855 | __ai uint8x8_t vreinterpret_u8_u64(uint64x1_t __p0) { |
| 34288 | uint8x8_t __ret; | 31856 | uint8x8_t __ret; |
| 34289 | __ret = (uint8x8_t)(__p0); | 31857 | __ret = (uint8x8_t)(__p0); |
| 34290 | return __ret; | 31858 | return __ret; |
| 34291 | } | 31859 | } |
| 34292 | #else | 31860 | __ai uint8x8_t vreinterpret_u8_u16(uint16x4_t __p0) { |
| 34293 | __ai uint8x8_t vreinterpret_u8_u64(uint64x1_t __p0) { | | |
| 34294 | uint8x8_t __ret; | 31861 | uint8x8_t __ret; |
| 34295 | __ret = (uint8x8_t)(__p0); | 31862 | __ret = (uint8x8_t)(__p0); |
| 34296 | return __ret; | 31863 | return __ret; |
| 34297 | } | 31864 | } |
| 34298 | #endif | 31865 | __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { |
| 34299 | | | |
| 34300 | #ifdef __LITTLE_ENDIAN__ | | |
| 34301 | __ai uint8x8_t vreinterpret_u8_u16(uint16x4_t __p0) { | | |
| 34302 | uint8x8_t __ret; | 31866 | uint8x8_t __ret; |
| 34303 | __ret = (uint8x8_t)(__p0); | 31867 | __ret = (uint8x8_t)(__p0); |
| 34304 | return __ret; | 31868 | return __ret; |
| 34305 | } | 31869 | } |
| 34306 | #else | 31870 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { |
| 34307 | __ai uint8x8_t vreinterpret_u8_u16(uint16x4_t __p0) { | | |
| 34308 | uint8x8_t __ret; | 31871 | uint8x8_t __ret; |
| 34309 | __ret = (uint8x8_t)(__p0); | 31872 | __ret = (uint8x8_t)(__p0); |
| 34310 | return __ret; | 31873 | return __ret; |
| 34311 | } | 31874 | } |
| 34312 | #endif | 31875 | __ai uint8x8_t vreinterpret_u8_f16(float16x4_t __p0) { |
| 34313 | | | |
| 34314 | #ifdef __LITTLE_ENDIAN__ | | |
| 34315 | __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { | | |
| 34316 | uint8x8_t __ret; | 31876 | uint8x8_t __ret; |
| 34317 | __ret = (uint8x8_t)(__p0); | 31877 | __ret = (uint8x8_t)(__p0); |
| 34318 | return __ret; | 31878 | return __ret; |
| 34319 | } | 31879 | } |
| 34320 | #else | 31880 | __ai uint8x8_t vreinterpret_u8_s32(int32x2_t __p0) { |
| 34321 | __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { | | |
| 34322 | uint8x8_t __ret; | 31881 | uint8x8_t __ret; |
| 34323 | __ret = (uint8x8_t)(__p0); | 31882 | __ret = (uint8x8_t)(__p0); |
| 34324 | return __ret; | 31883 | return __ret; |
| 34325 | } | 31884 | } |
| 34326 | #endif | 31885 | __ai uint8x8_t vreinterpret_u8_s64(int64x1_t __p0) { |
| 34327 | | | |
| 34328 | #ifdef __LITTLE_ENDIAN__ | | |
| 34329 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { | | |
| 34330 | uint8x8_t __ret; | 31886 | uint8x8_t __ret; |
| 34331 | __ret = (uint8x8_t)(__p0); | 31887 | __ret = (uint8x8_t)(__p0); |
| 34332 | return __ret; | 31888 | return __ret; |
| 34333 | } | 31889 | } |
| 34334 | #else | 31890 | __ai uint8x8_t vreinterpret_u8_s16(int16x4_t __p0) { |
| 34335 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { | | |
| 34336 | uint8x8_t __ret; | 31891 | uint8x8_t __ret; |
| 34337 | __ret = (uint8x8_t)(__p0); | 31892 | __ret = (uint8x8_t)(__p0); |
| 34338 | return __ret; | 31893 | return __ret; |
| 34339 | } | 31894 | } |
| 34340 | #endif | | |
| 34341 | | | |
| 34342 | #ifdef __LITTLE_ENDIAN__ | | |
| 34343 | __ai uint8x8_t vreinterpret_u8_f16(float16x4_t __p0) { | | |
| 34344 | uint8x8_t __ret; | | |
| 34345 | __ret = (uint8x8_t)(__p0); | | |
| 34346 | return __ret; | | |
| 34347 | } | | |
| 34348 | #else | | |
| 34349 | __ai uint8x8_t vreinterpret_u8_f16(float16x4_t __p0) { | | |
| 34350 | uint8x8_t __ret; | | |
| 34351 | __ret = (uint8x8_t)(__p0); | | |
| 34352 | return __ret; | | |
| 34353 | } | | |
| 34354 | #endif | | |
| 34355 | | | |
| 34356 | #ifdef __LITTLE_ENDIAN__ | | |
| 34357 | __ai uint8x8_t vreinterpret_u8_s32(int32x2_t __p0) { | | |
| 34358 | uint8x8_t __ret; | | |
| 34359 | __ret = (uint8x8_t)(__p0); | | |
| 34360 | return __ret; | | |
| 34361 | } | | |
| 34362 | #else | | |
| 34363 | __ai uint8x8_t vreinterpret_u8_s32(int32x2_t __p0) { | | |
| 34364 | uint8x8_t __ret; | | |
| 34365 | __ret = (uint8x8_t)(__p0); | | |
| 34366 | return __ret; | | |
| 34367 | } | | |
| 34368 | #endif | | |
| 34369 | | | |
| 34370 | #ifdef __LITTLE_ENDIAN__ | | |
| 34371 | __ai uint8x8_t vreinterpret_u8_s64(int64x1_t __p0) { | | |
| 34372 | uint8x8_t __ret; | | |
| 34373 | __ret = (uint8x8_t)(__p0); | | |
| 34374 | return __ret; | | |
| 34375 | } | | |
| 34376 | #else | | |
| 34377 | __ai uint8x8_t vreinterpret_u8_s64(int64x1_t __p0) { | | |
| 34378 | uint8x8_t __ret; | | |
| 34379 | __ret = (uint8x8_t)(__p0); | | |
| 34380 | return __ret; | | |
| 34381 | } | | |
| 34382 | #endif | | |
| 34383 | | | |
| 34384 | #ifdef __LITTLE_ENDIAN__ | | |
| 34385 | __ai uint8x8_t vreinterpret_u8_s16(int16x4_t __p0) { | | |
| 34386 | uint8x8_t __ret; | | |
| 34387 | __ret = (uint8x8_t)(__p0); | | |
| 34388 | return __ret; | | |
| 34389 | } | | |
| 34390 | #else | | |
| 34391 | __ai uint8x8_t vreinterpret_u8_s16(int16x4_t __p0) { | | |
| 34392 | uint8x8_t __ret; | | |
| 34393 | __ret = (uint8x8_t)(__p0); | | |
| 34394 | return __ret; | | |
| 34395 | } | | |
| 34396 | #endif | | |
| 34397 | | | |
| 34398 | #ifdef __LITTLE_ENDIAN__ | | |
| 34399 | __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { | | |
| 34400 | uint32x2_t __ret; | | |
| 34401 | __ret = (uint32x2_t)(__p0); | | |
| 34402 | return __ret; | | |
| 34403 | } | | |
| 34404 | #else | | |
| 34405 | __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { | 31895 | __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { |
| 34406 | uint32x2_t __ret; | 31896 | uint32x2_t __ret; |
| 34407 | __ret = (uint32x2_t)(__p0); | 31897 | __ret = (uint32x2_t)(__p0); |
| 34408 | return __ret; | 31898 | return __ret; |
| 34409 | } | 31899 | } |
| 34410 | #endif | | |
| 34411 | | | |
| 34412 | #ifdef __LITTLE_ENDIAN__ | | |
| 34413 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { | | |
| 34414 | uint32x2_t __ret; | | |
| 34415 | __ret = (uint32x2_t)(__p0); | | |
| 34416 | return __ret; | | |
| 34417 | } | | |
| 34418 | #else | | |
| 34419 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { | 31900 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { |
| 34420 | uint32x2_t __ret; | 31901 | uint32x2_t __ret; |
| 34421 | __ret = (uint32x2_t)(__p0); | 31902 | __ret = (uint32x2_t)(__p0); |
| 34422 | return __ret; | 31903 | return __ret; |
| 34423 | } | 31904 | } |
| 34424 | #endif | | |
| 34425 | | | |
| 34426 | #ifdef __LITTLE_ENDIAN__ | | |
| 34427 | __ai uint32x2_t vreinterpret_u32_u8(uint8x8_t __p0) { | | |
| 34428 | uint32x2_t __ret; | | |
| 34429 | __ret = (uint32x2_t)(__p0); | | |
| 34430 | return __ret; | | |
| 34431 | } | | |
| 34432 | #else | | |
| 34433 | __ai uint32x2_t vreinterpret_u32_u8(uint8x8_t __p0) { | 31905 | __ai uint32x2_t vreinterpret_u32_u8(uint8x8_t __p0) { |
| 34434 | uint32x2_t __ret; | 31906 | uint32x2_t __ret; |
| 34435 | __ret = (uint32x2_t)(__p0); | 31907 | __ret = (uint32x2_t)(__p0); |
| 34436 | return __ret; | 31908 | return __ret; |
| 34437 | } | 31909 | } |
| 34438 | #endif | | |
| 34439 | | | |
| 34440 | #ifdef __LITTLE_ENDIAN__ | | |
| 34441 | __ai uint32x2_t vreinterpret_u32_u64(uint64x1_t __p0) { | | |
| 34442 | uint32x2_t __ret; | | |
| 34443 | __ret = (uint32x2_t)(__p0); | | |
| 34444 | return __ret; | | |
| 34445 | } | | |
| 34446 | #else | | |
| 34447 | __ai uint32x2_t vreinterpret_u32_u64(uint64x1_t __p0) { | 31910 | __ai uint32x2_t vreinterpret_u32_u64(uint64x1_t __p0) { |
| 34448 | uint32x2_t __ret; | 31911 | uint32x2_t __ret; |
| 34449 | __ret = (uint32x2_t)(__p0); | 31912 | __ret = (uint32x2_t)(__p0); |
| 34450 | return __ret; | 31913 | return __ret; |
| 34451 | } | 31914 | } |
| 34452 | #endif | | |
| 34453 | | | |
| 34454 | #ifdef __LITTLE_ENDIAN__ | | |
| 34455 | __ai uint32x2_t vreinterpret_u32_u16(uint16x4_t __p0) { | | |
| 34456 | uint32x2_t __ret; | | |
| 34457 | __ret = (uint32x2_t)(__p0); | | |
| 34458 | return __ret; | | |
| 34459 | } | | |
| 34460 | #else | | |
| 34461 | __ai uint32x2_t vreinterpret_u32_u16(uint16x4_t __p0) { | 31915 | __ai uint32x2_t vreinterpret_u32_u16(uint16x4_t __p0) { |
| 34462 | uint32x2_t __ret; | 31916 | uint32x2_t __ret; |
| 34463 | __ret = (uint32x2_t)(__p0); | 31917 | __ret = (uint32x2_t)(__p0); |
| 34464 | return __ret; | 31918 | return __ret; |
| 34465 | } | 31919 | } |
| 34466 | #endif | | |
| 34467 | | | |
| 34468 | #ifdef __LITTLE_ENDIAN__ | | |
| 34469 | __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { | | |
| 34470 | uint32x2_t __ret; | | |
| 34471 | __ret = (uint32x2_t)(__p0); | | |
| 34472 | return __ret; | | |
| 34473 | } | | |
| 34474 | #else | | |
| 34475 | __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { | 31920 | __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { |
| 34476 | uint32x2_t __ret; | 31921 | uint32x2_t __ret; |
| 34477 | __ret = (uint32x2_t)(__p0); | 31922 | __ret = (uint32x2_t)(__p0); |
| 34478 | return __ret; | 31923 | return __ret; |
| 34479 | } | 31924 | } |
| 34480 | #endif | | |
| 34481 | | | |
| 34482 | #ifdef __LITTLE_ENDIAN__ | | |
| 34483 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { | | |
| 34484 | uint32x2_t __ret; | | |
| 34485 | __ret = (uint32x2_t)(__p0); | | |
| 34486 | return __ret; | | |
| 34487 | } | | |
| 34488 | #else | | |
| 34489 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { | 31925 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { |
| 34490 | uint32x2_t __ret; | 31926 | uint32x2_t __ret; |
| 34491 | __ret = (uint32x2_t)(__p0); | 31927 | __ret = (uint32x2_t)(__p0); |
| 34492 | return __ret; | 31928 | return __ret; |
| 34493 | } | 31929 | } |
| 34494 | #endif | | |
| 34495 | | | |
| 34496 | #ifdef __LITTLE_ENDIAN__ | | |
| 34497 | __ai uint32x2_t vreinterpret_u32_f16(float16x4_t __p0) { | | |
| 34498 | uint32x2_t __ret; | | |
| 34499 | __ret = (uint32x2_t)(__p0); | | |
| 34500 | return __ret; | | |
| 34501 | } | | |
| 34502 | #else | | |
| 34503 | __ai uint32x2_t vreinterpret_u32_f16(float16x4_t __p0) { | 31930 | __ai uint32x2_t vreinterpret_u32_f16(float16x4_t __p0) { |
| 34504 | uint32x2_t __ret; | 31931 | uint32x2_t __ret; |
| 34505 | __ret = (uint32x2_t)(__p0); | 31932 | __ret = (uint32x2_t)(__p0); |
| 34506 | return __ret; | 31933 | return __ret; |
| 34507 | } | 31934 | } |
| 34508 | #endif | | |
| 34509 | | | |
| 34510 | #ifdef __LITTLE_ENDIAN__ | | |
| 34511 | __ai uint32x2_t vreinterpret_u32_s32(int32x2_t __p0) { | | |
| 34512 | uint32x2_t __ret; | | |
| 34513 | __ret = (uint32x2_t)(__p0); | | |
| 34514 | return __ret; | | |
| 34515 | } | | |
| 34516 | #else | | |
| 34517 | __ai uint32x2_t vreinterpret_u32_s32(int32x2_t __p0) { | 31935 | __ai uint32x2_t vreinterpret_u32_s32(int32x2_t __p0) { |
| 34518 | uint32x2_t __ret; | 31936 | uint32x2_t __ret; |
| 34519 | __ret = (uint32x2_t)(__p0); | 31937 | __ret = (uint32x2_t)(__p0); |
| 34520 | return __ret; | 31938 | return __ret; |
| 34521 | } | 31939 | } |
| 34522 | #endif | | |
| 34523 | | | |
| 34524 | #ifdef __LITTLE_ENDIAN__ | | |
| 34525 | __ai uint32x2_t vreinterpret_u32_s64(int64x1_t __p0) { | | |
| 34526 | uint32x2_t __ret; | | |
| 34527 | __ret = (uint32x2_t)(__p0); | | |
| 34528 | return __ret; | | |
| 34529 | } | | |
| 34530 | #else | | |
| 34531 | __ai uint32x2_t vreinterpret_u32_s64(int64x1_t __p0) { | 31940 | __ai uint32x2_t vreinterpret_u32_s64(int64x1_t __p0) { |
| 34532 | uint32x2_t __ret; | 31941 | uint32x2_t __ret; |
| 34533 | __ret = (uint32x2_t)(__p0); | 31942 | __ret = (uint32x2_t)(__p0); |
| 34534 | return __ret; | 31943 | return __ret; |
| 34535 | } | 31944 | } |
| 34536 | #endif | | |
| 34537 | | | |
| 34538 | #ifdef __LITTLE_ENDIAN__ | | |
| 34539 | __ai uint32x2_t vreinterpret_u32_s16(int16x4_t __p0) { | | |
| 34540 | uint32x2_t __ret; | | |
| 34541 | __ret = (uint32x2_t)(__p0); | | |
| 34542 | return __ret; | | |
| 34543 | } | | |
| 34544 | #else | | |
| 34545 | __ai uint32x2_t vreinterpret_u32_s16(int16x4_t __p0) { | 31945 | __ai uint32x2_t vreinterpret_u32_s16(int16x4_t __p0) { |
| 34546 | uint32x2_t __ret; | 31946 | uint32x2_t __ret; |
| 34547 | __ret = (uint32x2_t)(__p0); | 31947 | __ret = (uint32x2_t)(__p0); |
| 34548 | return __ret; | 31948 | return __ret; |
| 34549 | } | 31949 | } |
| 34550 | #endif | | |
| 34551 | | | |
| 34552 | #ifdef __LITTLE_ENDIAN__ | | |
| 34553 | __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { | | |
| 34554 | uint64x1_t __ret; | | |
| 34555 | __ret = (uint64x1_t)(__p0); | | |
| 34556 | return __ret; | | |
| 34557 | } | | |
| 34558 | #else | | |
| 34559 | __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { | 31950 | __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { |
| 34560 | uint64x1_t __ret; | 31951 | uint64x1_t __ret; |
| 34561 | __ret = (uint64x1_t)(__p0); | 31952 | __ret = (uint64x1_t)(__p0); |
| 34562 | return __ret; | 31953 | return __ret; |
| 34563 | } | 31954 | } |
| 34564 | #endif | | |
| 34565 | | | |
| 34566 | #ifdef __LITTLE_ENDIAN__ | | |
| 34567 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { | | |
| 34568 | uint64x1_t __ret; | | |
| 34569 | __ret = (uint64x1_t)(__p0); | | |
| 34570 | return __ret; | | |
| 34571 | } | | |
| 34572 | #else | | |
| 34573 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { | 31955 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { |
| 34574 | uint64x1_t __ret; | 31956 | uint64x1_t __ret; |
| 34575 | __ret = (uint64x1_t)(__p0); | 31957 | __ret = (uint64x1_t)(__p0); |
| 34576 | return __ret; | 31958 | return __ret; |
| 34577 | } | 31959 | } |
| 34578 | #endif | | |
| 34579 | | | |
| 34580 | #ifdef __LITTLE_ENDIAN__ | | |
| 34581 | __ai uint64x1_t vreinterpret_u64_u8(uint8x8_t __p0) { | | |
| 34582 | uint64x1_t __ret; | | |
| 34583 | __ret = (uint64x1_t)(__p0); | | |
| 34584 | return __ret; | | |
| 34585 | } | | |
| 34586 | #else | | |
| 34587 | __ai uint64x1_t vreinterpret_u64_u8(uint8x8_t __p0) { | 31960 | __ai uint64x1_t vreinterpret_u64_u8(uint8x8_t __p0) { |
| 34588 | uint64x1_t __ret; | 31961 | uint64x1_t __ret; |
| 34589 | __ret = (uint64x1_t)(__p0); | 31962 | __ret = (uint64x1_t)(__p0); |
| 34590 | return __ret; | 31963 | return __ret; |
| 34591 | } | 31964 | } |
| 34592 | #endif | | |
| 34593 | | | |
| 34594 | #ifdef __LITTLE_ENDIAN__ | | |
| 34595 | __ai uint64x1_t vreinterpret_u64_u32(uint32x2_t __p0) { | | |
| 34596 | uint64x1_t __ret; | | |
| 34597 | __ret = (uint64x1_t)(__p0); | | |
| 34598 | return __ret; | | |
| 34599 | } | | |
| 34600 | #else | | |
| 34601 | __ai uint64x1_t vreinterpret_u64_u32(uint32x2_t __p0) { | 31965 | __ai uint64x1_t vreinterpret_u64_u32(uint32x2_t __p0) { |
| 34602 | uint64x1_t __ret; | 31966 | uint64x1_t __ret; |
| 34603 | __ret = (uint64x1_t)(__p0); | 31967 | __ret = (uint64x1_t)(__p0); |
| 34604 | return __ret; | 31968 | return __ret; |
| 34605 | } | 31969 | } |
| 34606 | #endif | | |
| 34607 | | | |
| 34608 | #ifdef __LITTLE_ENDIAN__ | | |
| 34609 | __ai uint64x1_t vreinterpret_u64_u16(uint16x4_t __p0) { | | |
| 34610 | uint64x1_t __ret; | | |
| 34611 | __ret = (uint64x1_t)(__p0); | | |
| 34612 | return __ret; | | |
| 34613 | } | | |
| 34614 | #else | | |
| 34615 | __ai uint64x1_t vreinterpret_u64_u16(uint16x4_t __p0) { | 31970 | __ai uint64x1_t vreinterpret_u64_u16(uint16x4_t __p0) { |
| 34616 | uint64x1_t __ret; | 31971 | uint64x1_t __ret; |
| 34617 | __ret = (uint64x1_t)(__p0); | 31972 | __ret = (uint64x1_t)(__p0); |
| 34618 | return __ret; | 31973 | return __ret; |
| 34619 | } | 31974 | } |
| 34620 | #endif | | |
| 34621 | | | |
| 34622 | #ifdef __LITTLE_ENDIAN__ | | |
| 34623 | __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { | | |
| 34624 | uint64x1_t __ret; | | |
| 34625 | __ret = (uint64x1_t)(__p0); | | |
| 34626 | return __ret; | | |
| 34627 | } | | |
| 34628 | #else | | |
| 34629 | __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { | 31975 | __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { |
| 34630 | uint64x1_t __ret; | 31976 | uint64x1_t __ret; |
| 34631 | __ret = (uint64x1_t)(__p0); | 31977 | __ret = (uint64x1_t)(__p0); |
| 34632 | return __ret; | 31978 | return __ret; |
| 34633 | } | 31979 | } |
| 34634 | #endif | | |
| 34635 | | | |
| 34636 | #ifdef __LITTLE_ENDIAN__ | | |
| 34637 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { | | |
| 34638 | uint64x1_t __ret; | | |
| 34639 | __ret = (uint64x1_t)(__p0); | | |
| 34640 | return __ret; | | |
| 34641 | } | | |
| 34642 | #else | | |
| 34643 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { | 31980 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { |
| 34644 | uint64x1_t __ret; | 31981 | uint64x1_t __ret; |
| 34645 | __ret = (uint64x1_t)(__p0); | 31982 | __ret = (uint64x1_t)(__p0); |
| 34646 | return __ret; | 31983 | return __ret; |
| 34647 | } | 31984 | } |
| 34648 | #endif | | |
| 34649 | | | |
| 34650 | #ifdef __LITTLE_ENDIAN__ | | |
| 34651 | __ai uint64x1_t vreinterpret_u64_f16(float16x4_t __p0) { | | |
| 34652 | uint64x1_t __ret; | | |
| 34653 | __ret = (uint64x1_t)(__p0); | | |
| 34654 | return __ret; | | |
| 34655 | } | | |
| 34656 | #else | | |
| 34657 | __ai uint64x1_t vreinterpret_u64_f16(float16x4_t __p0) { | 31985 | __ai uint64x1_t vreinterpret_u64_f16(float16x4_t __p0) { |
| 34658 | uint64x1_t __ret; | 31986 | uint64x1_t __ret; |
| 34659 | __ret = (uint64x1_t)(__p0); | 31987 | __ret = (uint64x1_t)(__p0); |
| 34660 | return __ret; | 31988 | return __ret; |
| 34661 | } | 31989 | } |
| 34662 | #endif | | |
| 34663 | | | |
| 34664 | #ifdef __LITTLE_ENDIAN__ | | |
| 34665 | __ai uint64x1_t vreinterpret_u64_s32(int32x2_t __p0) { | | |
| 34666 | uint64x1_t __ret; | | |
| 34667 | __ret = (uint64x1_t)(__p0); | | |
| 34668 | return __ret; | | |
| 34669 | } | | |
| 34670 | #else | | |
| 34671 | __ai uint64x1_t vreinterpret_u64_s32(int32x2_t __p0) { | 31990 | __ai uint64x1_t vreinterpret_u64_s32(int32x2_t __p0) { |
| 34672 | uint64x1_t __ret; | 31991 | uint64x1_t __ret; |
| 34673 | __ret = (uint64x1_t)(__p0); | 31992 | __ret = (uint64x1_t)(__p0); |
| 34674 | return __ret; | 31993 | return __ret; |
| 34675 | } | 31994 | } |
| 34676 | #endif | | |
| 34677 | | | |
| 34678 | #ifdef __LITTLE_ENDIAN__ | | |
| 34679 | __ai uint64x1_t vreinterpret_u64_s64(int64x1_t __p0) { | | |
| 34680 | uint64x1_t __ret; | | |
| 34681 | __ret = (uint64x1_t)(__p0); | | |
| 34682 | return __ret; | | |
| 34683 | } | | |
| 34684 | #else | | |
| 34685 | __ai uint64x1_t vreinterpret_u64_s64(int64x1_t __p0) { | 31995 | __ai uint64x1_t vreinterpret_u64_s64(int64x1_t __p0) { |
| 34686 | uint64x1_t __ret; | 31996 | uint64x1_t __ret; |
| 34687 | __ret = (uint64x1_t)(__p0); | 31997 | __ret = (uint64x1_t)(__p0); |
| 34688 | return __ret; | 31998 | return __ret; |
| 34689 | } | 31999 | } |
| 34690 | #endif | | |
| 34691 | | | |
| 34692 | #ifdef __LITTLE_ENDIAN__ | | |
| 34693 | __ai uint64x1_t vreinterpret_u64_s16(int16x4_t __p0) { | | |
| 34694 | uint64x1_t __ret; | | |
| 34695 | __ret = (uint64x1_t)(__p0); | | |
| 34696 | return __ret; | | |
| 34697 | } | | |
| 34698 | #else | | |
| 34699 | __ai uint64x1_t vreinterpret_u64_s16(int16x4_t __p0) { | 32000 | __ai uint64x1_t vreinterpret_u64_s16(int16x4_t __p0) { |
| 34700 | uint64x1_t __ret; | 32001 | uint64x1_t __ret; |
| 34701 | __ret = (uint64x1_t)(__p0); | 32002 | __ret = (uint64x1_t)(__p0); |
| 34702 | return __ret; | 32003 | return __ret; |
| 34703 | } | 32004 | } |
| 34704 | #endif | | |
| 34705 | | | |
| 34706 | #ifdef __LITTLE_ENDIAN__ | | |
| 34707 | __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { | | |
| 34708 | uint16x4_t __ret; | | |
| 34709 | __ret = (uint16x4_t)(__p0); | | |
| 34710 | return __ret; | | |
| 34711 | } | | |
| 34712 | #else | | |
| 34713 | __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { | 32005 | __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { |
| 34714 | uint16x4_t __ret; | 32006 | uint16x4_t __ret; |
| 34715 | __ret = (uint16x4_t)(__p0); | 32007 | __ret = (uint16x4_t)(__p0); |
| 34716 | return __ret; | 32008 | return __ret; |
| 34717 | } | 32009 | } |
| 34718 | #endif | | |
| 34719 | | | |
| 34720 | #ifdef __LITTLE_ENDIAN__ | | |
| 34721 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { | | |
| 34722 | uint16x4_t __ret; | | |
| 34723 | __ret = (uint16x4_t)(__p0); | | |
| 34724 | return __ret; | | |
| 34725 | } | | |
| 34726 | #else | | |
| 34727 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { | 32010 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { |
| 34728 | uint16x4_t __ret; | 32011 | uint16x4_t __ret; |
| 34729 | __ret = (uint16x4_t)(__p0); | 32012 | __ret = (uint16x4_t)(__p0); |
| 34730 | return __ret; | 32013 | return __ret; |
| 34731 | } | 32014 | } |
| 34732 | #endif | | |
| 34733 | | | |
| 34734 | #ifdef __LITTLE_ENDIAN__ | | |
| 34735 | __ai uint16x4_t vreinterpret_u16_u8(uint8x8_t __p0) { | | |
| 34736 | uint16x4_t __ret; | | |
| 34737 | __ret = (uint16x4_t)(__p0); | | |
| 34738 | return __ret; | | |
| 34739 | } | | |
| 34740 | #else | | |
| 34741 | __ai uint16x4_t vreinterpret_u16_u8(uint8x8_t __p0) { | 32015 | __ai uint16x4_t vreinterpret_u16_u8(uint8x8_t __p0) { |
| 34742 | uint16x4_t __ret; | 32016 | uint16x4_t __ret; |
| 34743 | __ret = (uint16x4_t)(__p0); | 32017 | __ret = (uint16x4_t)(__p0); |
| 34744 | return __ret; | 32018 | return __ret; |
| 34745 | } | 32019 | } |
| 34746 | #endif | | |
| 34747 | | | |
| 34748 | #ifdef __LITTLE_ENDIAN__ | | |
| 34749 | __ai uint16x4_t vreinterpret_u16_u32(uint32x2_t __p0) { | | |
| 34750 | uint16x4_t __ret; | | |
| 34751 | __ret = (uint16x4_t)(__p0); | | |
| 34752 | return __ret; | | |
| 34753 | } | | |
| 34754 | #else | | |
| 34755 | __ai uint16x4_t vreinterpret_u16_u32(uint32x2_t __p0) { | 32020 | __ai uint16x4_t vreinterpret_u16_u32(uint32x2_t __p0) { |
| 34756 | uint16x4_t __ret; | 32021 | uint16x4_t __ret; |
| 34757 | __ret = (uint16x4_t)(__p0); | 32022 | __ret = (uint16x4_t)(__p0); |
| 34758 | return __ret; | 32023 | return __ret; |
| 34759 | } | 32024 | } |
| 34760 | #endif | | |
| 34761 | | | |
| 34762 | #ifdef __LITTLE_ENDIAN__ | | |
| 34763 | __ai uint16x4_t vreinterpret_u16_u64(uint64x1_t __p0) { | | |
| 34764 | uint16x4_t __ret; | | |
| 34765 | __ret = (uint16x4_t)(__p0); | | |
| 34766 | return __ret; | | |
| 34767 | } | | |
| 34768 | #else | | |
| 34769 | __ai uint16x4_t vreinterpret_u16_u64(uint64x1_t __p0) { | 32025 | __ai uint16x4_t vreinterpret_u16_u64(uint64x1_t __p0) { |
| 34770 | uint16x4_t __ret; | 32026 | uint16x4_t __ret; |
| 34771 | __ret = (uint16x4_t)(__p0); | 32027 | __ret = (uint16x4_t)(__p0); |
| 34772 | return __ret; | 32028 | return __ret; |
| 34773 | } | 32029 | } |
| 34774 | #endif | | |
| 34775 | | | |
| 34776 | #ifdef __LITTLE_ENDIAN__ | | |
| 34777 | __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { | | |
| 34778 | uint16x4_t __ret; | | |
| 34779 | __ret = (uint16x4_t)(__p0); | | |
| 34780 | return __ret; | | |
| 34781 | } | | |
| 34782 | #else | | |
| 34783 | __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { | 32030 | __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { |
| 34784 | uint16x4_t __ret; | 32031 | uint16x4_t __ret; |
| 34785 | __ret = (uint16x4_t)(__p0); | 32032 | __ret = (uint16x4_t)(__p0); |
| 34786 | return __ret; | 32033 | return __ret; |
| 34787 | } | 32034 | } |
| 34788 | #endif | | |
| 34789 | | | |
| 34790 | #ifdef __LITTLE_ENDIAN__ | | |
| 34791 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { | | |
| 34792 | uint16x4_t __ret; | | |
| 34793 | __ret = (uint16x4_t)(__p0); | | |
| 34794 | return __ret; | | |
| 34795 | } | | |
| 34796 | #else | | |
| 34797 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { | 32035 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { |
| 34798 | uint16x4_t __ret; | 32036 | uint16x4_t __ret; |
| 34799 | __ret = (uint16x4_t)(__p0); | 32037 | __ret = (uint16x4_t)(__p0); |
| 34800 | return __ret; | 32038 | return __ret; |
| 34801 | } | 32039 | } |
| 34802 | #endif | | |
| 34803 | | | |
| 34804 | #ifdef __LITTLE_ENDIAN__ | | |
| 34805 | __ai uint16x4_t vreinterpret_u16_f16(float16x4_t __p0) { | | |
| 34806 | uint16x4_t __ret; | | |
| 34807 | __ret = (uint16x4_t)(__p0); | | |
| 34808 | return __ret; | | |
| 34809 | } | | |
| 34810 | #else | | |
| 34811 | __ai uint16x4_t vreinterpret_u16_f16(float16x4_t __p0) { | 32040 | __ai uint16x4_t vreinterpret_u16_f16(float16x4_t __p0) { |
| 34812 | uint16x4_t __ret; | 32041 | uint16x4_t __ret; |
| 34813 | __ret = (uint16x4_t)(__p0); | 32042 | __ret = (uint16x4_t)(__p0); |
| 34814 | return __ret; | 32043 | return __ret; |
| 34815 | } | 32044 | } |
| 34816 | #endif | | |
| 34817 | | | |
| 34818 | #ifdef __LITTLE_ENDIAN__ | | |
| 34819 | __ai uint16x4_t vreinterpret_u16_s32(int32x2_t __p0) { | | |
| 34820 | uint16x4_t __ret; | | |
| 34821 | __ret = (uint16x4_t)(__p0); | | |
| 34822 | return __ret; | | |
| 34823 | } | | |
| 34824 | #else | | |
| 34825 | __ai uint16x4_t vreinterpret_u16_s32(int32x2_t __p0) { | 32045 | __ai uint16x4_t vreinterpret_u16_s32(int32x2_t __p0) { |
| 34826 | uint16x4_t __ret; | 32046 | uint16x4_t __ret; |
| 34827 | __ret = (uint16x4_t)(__p0); | 32047 | __ret = (uint16x4_t)(__p0); |
| 34828 | return __ret; | 32048 | return __ret; |
| 34829 | } | 32049 | } |
| 34830 | #endif | | |
| 34831 | | | |
| 34832 | #ifdef __LITTLE_ENDIAN__ | | |
| 34833 | __ai uint16x4_t vreinterpret_u16_s64(int64x1_t __p0) { | | |
| 34834 | uint16x4_t __ret; | | |
| 34835 | __ret = (uint16x4_t)(__p0); | | |
| 34836 | return __ret; | | |
| 34837 | } | | |
| 34838 | #else | | |
| 34839 | __ai uint16x4_t vreinterpret_u16_s64(int64x1_t __p0) { | 32050 | __ai uint16x4_t vreinterpret_u16_s64(int64x1_t __p0) { |
| 34840 | uint16x4_t __ret; | 32051 | uint16x4_t __ret; |
| 34841 | __ret = (uint16x4_t)(__p0); | 32052 | __ret = (uint16x4_t)(__p0); |
| 34842 | return __ret; | 32053 | return __ret; |
| 34843 | } | 32054 | } |
| 34844 | #endif | | |
| 34845 | | | |
| 34846 | #ifdef __LITTLE_ENDIAN__ | | |
| 34847 | __ai uint16x4_t vreinterpret_u16_s16(int16x4_t __p0) { | | |
| 34848 | uint16x4_t __ret; | | |
| 34849 | __ret = (uint16x4_t)(__p0); | | |
| 34850 | return __ret; | | |
| 34851 | } | | |
| 34852 | #else | | |
| 34853 | __ai uint16x4_t vreinterpret_u16_s16(int16x4_t __p0) { | 32055 | __ai uint16x4_t vreinterpret_u16_s16(int16x4_t __p0) { |
| 34854 | uint16x4_t __ret; | 32056 | uint16x4_t __ret; |
| 34855 | __ret = (uint16x4_t)(__p0); | 32057 | __ret = (uint16x4_t)(__p0); |
| 34856 | return __ret; | 32058 | return __ret; |
| 34857 | } | 32059 | } |
| 34858 | #endif | | |
| 34859 | | | |
| 34860 | #ifdef __LITTLE_ENDIAN__ | | |
| 34861 | __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { | | |
| 34862 | int8x8_t __ret; | | |
| 34863 | __ret = (int8x8_t)(__p0); | | |
| 34864 | return __ret; | | |
| 34865 | } | | |
| 34866 | #else | | |
| 34867 | __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { | 32060 | __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { |
| 34868 | int8x8_t __ret; | 32061 | int8x8_t __ret; |
| 34869 | __ret = (int8x8_t)(__p0); | 32062 | __ret = (int8x8_t)(__p0); |
| 34870 | return __ret; | 32063 | return __ret; |
| 34871 | } | 32064 | } |
| 34872 | #endif | | |
| 34873 | | | |
| 34874 | #ifdef __LITTLE_ENDIAN__ | | |
| 34875 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { | | |
| 34876 | int8x8_t __ret; | | |
| 34877 | __ret = (int8x8_t)(__p0); | | |
| 34878 | return __ret; | | |
| 34879 | } | | |
| 34880 | #else | | |
| 34881 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { | 32065 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { |
| 34882 | int8x8_t __ret; | 32066 | int8x8_t __ret; |
| 34883 | __ret = (int8x8_t)(__p0); | 32067 | __ret = (int8x8_t)(__p0); |
| 34884 | return __ret; | 32068 | return __ret; |
| 34885 | } | 32069 | } |
| 34886 | #endif | | |
| 34887 | | | |
| 34888 | #ifdef __LITTLE_ENDIAN__ | | |
| 34889 | __ai int8x8_t vreinterpret_s8_u8(uint8x8_t __p0) { | | |
| 34890 | int8x8_t __ret; | | |
| 34891 | __ret = (int8x8_t)(__p0); | | |
| 34892 | return __ret; | | |
| 34893 | } | | |
| 34894 | #else | | |
| 34895 | __ai int8x8_t vreinterpret_s8_u8(uint8x8_t __p0) { | 32070 | __ai int8x8_t vreinterpret_s8_u8(uint8x8_t __p0) { |
| 34896 | int8x8_t __ret; | 32071 | int8x8_t __ret; |
| 34897 | __ret = (int8x8_t)(__p0); | 32072 | __ret = (int8x8_t)(__p0); |
| 34898 | return __ret; | 32073 | return __ret; |
| 34899 | } | 32074 | } |
| 34900 | #endif | | |
| 34901 | | | |
| 34902 | #ifdef __LITTLE_ENDIAN__ | | |
| 34903 | __ai int8x8_t vreinterpret_s8_u32(uint32x2_t __p0) { | | |
| 34904 | int8x8_t __ret; | | |
| 34905 | __ret = (int8x8_t)(__p0); | | |
| 34906 | return __ret; | | |
| 34907 | } | | |
| 34908 | #else | | |
| 34909 | __ai int8x8_t vreinterpret_s8_u32(uint32x2_t __p0) { | 32075 | __ai int8x8_t vreinterpret_s8_u32(uint32x2_t __p0) { |
| 34910 | int8x8_t __ret; | 32076 | int8x8_t __ret; |
| 34911 | __ret = (int8x8_t)(__p0); | 32077 | __ret = (int8x8_t)(__p0); |
| 34912 | return __ret; | 32078 | return __ret; |
| 34913 | } | 32079 | } |
| 34914 | #endif | | |
| 34915 | | | |
| 34916 | #ifdef __LITTLE_ENDIAN__ | | |
| 34917 | __ai int8x8_t vreinterpret_s8_u64(uint64x1_t __p0) { | | |
| 34918 | int8x8_t __ret; | | |
| 34919 | __ret = (int8x8_t)(__p0); | | |
| 34920 | return __ret; | | |
| 34921 | } | | |
| 34922 | #else | | |
| 34923 | __ai int8x8_t vreinterpret_s8_u64(uint64x1_t __p0) { | 32080 | __ai int8x8_t vreinterpret_s8_u64(uint64x1_t __p0) { |
| 34924 | int8x8_t __ret; | 32081 | int8x8_t __ret; |
| 34925 | __ret = (int8x8_t)(__p0); | 32082 | __ret = (int8x8_t)(__p0); |
| 34926 | return __ret; | 32083 | return __ret; |
| 34927 | } | 32084 | } |
| 34928 | #endif | | |
| 34929 | | | |
| 34930 | #ifdef __LITTLE_ENDIAN__ | | |
| 34931 | __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { | | |
| 34932 | int8x8_t __ret; | | |
| 34933 | __ret = (int8x8_t)(__p0); | | |
| 34934 | return __ret; | | |
| 34935 | } | | |
| 34936 | #else | | |
| 34937 | __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { | 32085 | __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { |
| 34938 | int8x8_t __ret; | 32086 | int8x8_t __ret; |
| 34939 | __ret = (int8x8_t)(__p0); | 32087 | __ret = (int8x8_t)(__p0); |
| 34940 | return __ret; | 32088 | return __ret; |
| 34941 | } | 32089 | } |
| 34942 | #endif | | |
| 34943 | | | |
| 34944 | #ifdef __LITTLE_ENDIAN__ | | |
| 34945 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { | | |
| 34946 | int8x8_t __ret; | | |
| 34947 | __ret = (int8x8_t)(__p0); | | |
| 34948 | return __ret; | | |
| 34949 | } | | |
| 34950 | #else | | |
| 34951 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { | 32090 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { |
| 34952 | int8x8_t __ret; | 32091 | int8x8_t __ret; |
| 34953 | __ret = (int8x8_t)(__p0); | 32092 | __ret = (int8x8_t)(__p0); |
| 34954 | return __ret; | 32093 | return __ret; |
| 34955 | } | 32094 | } |
| 34956 | #endif | | |
| 34957 | | | |
| 34958 | #ifdef __LITTLE_ENDIAN__ | | |
| 34959 | __ai int8x8_t vreinterpret_s8_f16(float16x4_t __p0) { | | |
| 34960 | int8x8_t __ret; | | |
| 34961 | __ret = (int8x8_t)(__p0); | | |
| 34962 | return __ret; | | |
| 34963 | } | | |
| 34964 | #else | | |
| 34965 | __ai int8x8_t vreinterpret_s8_f16(float16x4_t __p0) { | 32095 | __ai int8x8_t vreinterpret_s8_f16(float16x4_t __p0) { |
| 34966 | int8x8_t __ret; | 32096 | int8x8_t __ret; |
| 34967 | __ret = (int8x8_t)(__p0); | 32097 | __ret = (int8x8_t)(__p0); |
| 34968 | return __ret; | 32098 | return __ret; |
| 34969 | } | 32099 | } |
| 34970 | #endif | | |
| 34971 | | | |
| 34972 | #ifdef __LITTLE_ENDIAN__ | | |
| 34973 | __ai int8x8_t vreinterpret_s8_s32(int32x2_t __p0) { | | |
| 34974 | int8x8_t __ret; | | |
| 34975 | __ret = (int8x8_t)(__p0); | | |
| 34976 | return __ret; | | |
| 34977 | } | | |
| 34978 | #else | | |
| 34979 | __ai int8x8_t vreinterpret_s8_s32(int32x2_t __p0) { | 32100 | __ai int8x8_t vreinterpret_s8_s32(int32x2_t __p0) { |
| 34980 | int8x8_t __ret; | 32101 | int8x8_t __ret; |
| 34981 | __ret = (int8x8_t)(__p0); | 32102 | __ret = (int8x8_t)(__p0); |
| 34982 | return __ret; | 32103 | return __ret; |
| 34983 | } | 32104 | } |
| 34984 | #endif | | |
| 34985 | | | |
| 34986 | #ifdef __LITTLE_ENDIAN__ | | |
| 34987 | __ai int8x8_t vreinterpret_s8_s64(int64x1_t __p0) { | | |
| 34988 | int8x8_t __ret; | | |
| 34989 | __ret = (int8x8_t)(__p0); | | |
| 34990 | return __ret; | | |
| 34991 | } | | |
| 34992 | #else | | |
| 34993 | __ai int8x8_t vreinterpret_s8_s64(int64x1_t __p0) { | 32105 | __ai int8x8_t vreinterpret_s8_s64(int64x1_t __p0) { |
| 34994 | int8x8_t __ret; | 32106 | int8x8_t __ret; |
| 34995 | __ret = (int8x8_t)(__p0); | 32107 | __ret = (int8x8_t)(__p0); |
| 34996 | return __ret; | 32108 | return __ret; |
| 34997 | } | 32109 | } |
| 34998 | #endif | | |
| 34999 | | | |
| 35000 | #ifdef __LITTLE_ENDIAN__ | | |
| 35001 | __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { | | |
| 35002 | int8x8_t __ret; | | |
| 35003 | __ret = (int8x8_t)(__p0); | | |
| 35004 | return __ret; | | |
| 35005 | } | | |
| 35006 | #else | | |
| 35007 | __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { | 32110 | __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { |
| 35008 | int8x8_t __ret; | 32111 | int8x8_t __ret; |
| 35009 | __ret = (int8x8_t)(__p0); | 32112 | __ret = (int8x8_t)(__p0); |
| 35010 | return __ret; | 32113 | return __ret; |
| 35011 | } | 32114 | } |
| 35012 | #endif | | |
| 35013 | | | |
| 35014 | #ifdef __LITTLE_ENDIAN__ | | |
| 35015 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { | | |
| 35016 | float32x2_t __ret; | | |
| 35017 | __ret = (float32x2_t)(__p0); | | |
| 35018 | return __ret; | | |
| 35019 | } | | |
| 35020 | #else | | |
| 35021 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { | 32115 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { |
| 35022 | float32x2_t __ret; | 32116 | float32x2_t __ret; |
| 35023 | __ret = (float32x2_t)(__p0); | 32117 | __ret = (float32x2_t)(__p0); |
| 35024 | return __ret; | 32118 | return __ret; |
| 35025 | } | 32119 | } |
| 35026 | #endif | | |
| 35027 | | | |
| 35028 | #ifdef __LITTLE_ENDIAN__ | | |
| 35029 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { | | |
| 35030 | float32x2_t __ret; | | |
| 35031 | __ret = (float32x2_t)(__p0); | | |
| 35032 | return __ret; | | |
| 35033 | } | | |
| 35034 | #else | | |
| 35035 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { | 32120 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { |
| 35036 | float32x2_t __ret; | 32121 | float32x2_t __ret; |
| 35037 | __ret = (float32x2_t)(__p0); | 32122 | __ret = (float32x2_t)(__p0); |
| 35038 | return __ret; | 32123 | return __ret; |
| 35039 | } | 32124 | } |
| 35040 | #endif | | |
| 35041 | | | |
| 35042 | #ifdef __LITTLE_ENDIAN__ | | |
| 35043 | __ai float32x2_t vreinterpret_f32_u8(uint8x8_t __p0) { | 32125 | __ai float32x2_t vreinterpret_f32_u8(uint8x8_t __p0) { |
| 35044 | float32x2_t __ret; | 32126 | float32x2_t __ret; |
| 35045 | __ret = (float32x2_t)(__p0); | 32127 | __ret = (float32x2_t)(__p0); |
| 35046 | return __ret; | 32128 | return __ret; |
| 35047 | } | 32129 | } |
| 35048 | #else | 32130 | __ai float32x2_t vreinterpret_f32_u32(uint32x2_t __p0) { |
| 35049 | __ai float32x2_t vreinterpret_f32_u8(uint8x8_t __p0) { | | |
| 35050 | float32x2_t __ret; | 32131 | float32x2_t __ret; |
| 35051 | __ret = (float32x2_t)(__p0); | 32132 | __ret = (float32x2_t)(__p0); |
| 35052 | return __ret; | 32133 | return __ret; |
| 35053 | } | 32134 | } |
| 35054 | #endif | 32135 | __ai float32x2_t vreinterpret_f32_u64(uint64x1_t __p0) { |
| 35055 | | | |
| 35056 | #ifdef __LITTLE_ENDIAN__ | | |
| 35057 | __ai float32x2_t vreinterpret_f32_u32(uint32x2_t __p0) { | | |
| 35058 | float32x2_t __ret; | 32136 | float32x2_t __ret; |
| 35059 | __ret = (float32x2_t)(__p0); | 32137 | __ret = (float32x2_t)(__p0); |
| 35060 | return __ret; | 32138 | return __ret; |
| 35061 | } | 32139 | } |
| 35062 | #else | 32140 | __ai float32x2_t vreinterpret_f32_u16(uint16x4_t __p0) { |
| 35063 | __ai float32x2_t vreinterpret_f32_u32(uint32x2_t __p0) { | | |
| 35064 | float32x2_t __ret; | 32141 | float32x2_t __ret; |
| 35065 | __ret = (float32x2_t)(__p0); | 32142 | __ret = (float32x2_t)(__p0); |
| 35066 | return __ret; | 32143 | return __ret; |
| 35067 | } | 32144 | } |
| 35068 | #endif | 32145 | __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { |
| 35069 | | | |
| 35070 | #ifdef __LITTLE_ENDIAN__ | | |
| 35071 | __ai float32x2_t vreinterpret_f32_u64(uint64x1_t __p0) { | | |
| 35072 | float32x2_t __ret; | 32146 | float32x2_t __ret; |
| 35073 | __ret = (float32x2_t)(__p0); | 32147 | __ret = (float32x2_t)(__p0); |
| 35074 | return __ret; | 32148 | return __ret; |
| 35075 | } | 32149 | } |
| 35076 | #else | 32150 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { |
| 35077 | __ai float32x2_t vreinterpret_f32_u64(uint64x1_t __p0) { | | |
| 35078 | float32x2_t __ret; | 32151 | float32x2_t __ret; |
| 35079 | __ret = (float32x2_t)(__p0); | 32152 | __ret = (float32x2_t)(__p0); |
| 35080 | return __ret; | 32153 | return __ret; |
| 35081 | } | 32154 | } |
| 35082 | #endif | 32155 | __ai float32x2_t vreinterpret_f32_s32(int32x2_t __p0) { |
| 35083 | | | |
| 35084 | #ifdef __LITTLE_ENDIAN__ | | |
| 35085 | __ai float32x2_t vreinterpret_f32_u16(uint16x4_t __p0) { | | |
| 35086 | float32x2_t __ret; | 32156 | float32x2_t __ret; |
| 35087 | __ret = (float32x2_t)(__p0); | 32157 | __ret = (float32x2_t)(__p0); |
| 35088 | return __ret; | 32158 | return __ret; |
| 35089 | } | 32159 | } |
| 35090 | #else | 32160 | __ai float32x2_t vreinterpret_f32_s64(int64x1_t __p0) { |
| 35091 | __ai float32x2_t vreinterpret_f32_u16(uint16x4_t __p0) { | | |
| 35092 | float32x2_t __ret; | 32161 | float32x2_t __ret; |
| 35093 | __ret = (float32x2_t)(__p0); | 32162 | __ret = (float32x2_t)(__p0); |
| 35094 | return __ret; | 32163 | return __ret; |
| 35095 | } | 32164 | } |
| 35096 | #endif | 32165 | __ai float32x2_t vreinterpret_f32_s16(int16x4_t __p0) { |
| 35097 | | | |
| 35098 | #ifdef __LITTLE_ENDIAN__ | | |
| 35099 | __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { | | |
| 35100 | float32x2_t __ret; | 32166 | float32x2_t __ret; |
| 35101 | __ret = (float32x2_t)(__p0); | 32167 | __ret = (float32x2_t)(__p0); |
| 35102 | return __ret; | 32168 | return __ret; |
| 35103 | } | 32169 | } |
| 35104 | #else | 32170 | __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { |
| 35105 | __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { | 32171 | float16x4_t __ret; |
| 35106 | float32x2_t __ret; | 32172 | __ret = (float16x4_t)(__p0); |
| 35107 | __ret = (float32x2_t)(__p0); | | |
| 35108 | return __ret; | 32173 | return __ret; |
| 35109 | } | 32174 | } |
| 35110 | #endif | | |
| 35111 | | | |
| 35112 | #ifdef __LITTLE_ENDIAN__ | | |
| 35113 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { | | |
| 35114 | float32x2_t __ret; | | |
| 35115 | __ret = (float32x2_t)(__p0); | | |
| 35116 | return __ret; | | |
| 35117 | } | | |
| 35118 | #else | | |
| 35119 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { | | |
| 35120 | float32x2_t __ret; | | |
| 35121 | __ret = (float32x2_t)(__p0); | | |
| 35122 | return __ret; | | |
| 35123 | } | | |
| 35124 | #endif | | |
| 35125 | | | |
| 35126 | #ifdef __LITTLE_ENDIAN__ | | |
| 35127 | __ai float32x2_t vreinterpret_f32_s32(int32x2_t __p0) { | | |
| 35128 | float32x2_t __ret; | | |
| 35129 | __ret = (float32x2_t)(__p0); | | |
| 35130 | return __ret; | | |
| 35131 | } | | |
| 35132 | #else | | |
| 35133 | __ai float32x2_t vreinterpret_f32_s32(int32x2_t __p0) { | | |
| 35134 | float32x2_t __ret; | | |
| 35135 | __ret = (float32x2_t)(__p0); | | |
| 35136 | return __ret; | | |
| 35137 | } | | |
| 35138 | #endif | | |
| 35139 | | | |
| 35140 | #ifdef __LITTLE_ENDIAN__ | | |
| 35141 | __ai float32x2_t vreinterpret_f32_s64(int64x1_t __p0) { | | |
| 35142 | float32x2_t __ret; | | |
| 35143 | __ret = (float32x2_t)(__p0); | | |
| 35144 | return __ret; | | |
| 35145 | } | | |
| 35146 | #else | | |
| 35147 | __ai float32x2_t vreinterpret_f32_s64(int64x1_t __p0) { | | |
| 35148 | float32x2_t __ret; | | |
| 35149 | __ret = (float32x2_t)(__p0); | | |
| 35150 | return __ret; | | |
| 35151 | } | | |
| 35152 | #endif | | |
| 35153 | | | |
| 35154 | #ifdef __LITTLE_ENDIAN__ | | |
| 35155 | __ai float32x2_t vreinterpret_f32_s16(int16x4_t __p0) { | | |
| 35156 | float32x2_t __ret; | | |
| 35157 | __ret = (float32x2_t)(__p0); | | |
| 35158 | return __ret; | | |
| 35159 | } | | |
| 35160 | #else | | |
| 35161 | __ai float32x2_t vreinterpret_f32_s16(int16x4_t __p0) { | | |
| 35162 | float32x2_t __ret; | | |
| 35163 | __ret = (float32x2_t)(__p0); | | |
| 35164 | return __ret; | | |
| 35165 | } | | |
| 35166 | #endif | | |
| 35167 | | | |
| 35168 | #ifdef __LITTLE_ENDIAN__ | | |
| 35169 | __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { | | |
| 35170 | float16x4_t __ret; | | |
| 35171 | __ret = (float16x4_t)(__p0); | | |
| 35172 | return __ret; | | |
| 35173 | } | | |
| 35174 | #else | | |
| 35175 | __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { | | |
| 35176 | float16x4_t __ret; | | |
| 35177 | __ret = (float16x4_t)(__p0); | | |
| 35178 | return __ret; | | |
| 35179 | } | | |
| 35180 | #endif | | |
| 35181 | | | |
| 35182 | #ifdef __LITTLE_ENDIAN__ | | |
| 35183 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { | 32175 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { |
| 35184 | float16x4_t __ret; | 32176 | float16x4_t __ret; |
| 35185 | __ret = (float16x4_t)(__p0); | 32177 | __ret = (float16x4_t)(__p0); |
| 35186 | return __ret; | 32178 | return __ret; |
| 35187 | } | 32179 | } |
| 35188 | #else | | |
| 35189 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { | | |
| 35190 | float16x4_t __ret; | | |
| 35191 | __ret = (float16x4_t)(__p0); | | |
| 35192 | return __ret; | | |
| 35193 | } | | |
| 35194 | #endif | | |
| 35195 | | | |
| 35196 | #ifdef __LITTLE_ENDIAN__ | | |
| 35197 | __ai float16x4_t vreinterpret_f16_u8(uint8x8_t __p0) { | | |
| 35198 | float16x4_t __ret; | | |
| 35199 | __ret = (float16x4_t)(__p0); | | |
| 35200 | return __ret; | | |
| 35201 | } | | |
| 35202 | #else | | |
| 35203 | __ai float16x4_t vreinterpret_f16_u8(uint8x8_t __p0) { | 32180 | __ai float16x4_t vreinterpret_f16_u8(uint8x8_t __p0) { |
| 35204 | float16x4_t __ret; | 32181 | float16x4_t __ret; |
| 35205 | __ret = (float16x4_t)(__p0); | 32182 | __ret = (float16x4_t)(__p0); |
| 35206 | return __ret; | 32183 | return __ret; |
| 35207 | } | 32184 | } |
| 35208 | #endif | | |
| 35209 | | | |
| 35210 | #ifdef __LITTLE_ENDIAN__ | | |
| 35211 | __ai float16x4_t vreinterpret_f16_u32(uint32x2_t __p0) { | | |
| 35212 | float16x4_t __ret; | | |
| 35213 | __ret = (float16x4_t)(__p0); | | |
| 35214 | return __ret; | | |
| 35215 | } | | |
| 35216 | #else | | |
| 35217 | __ai float16x4_t vreinterpret_f16_u32(uint32x2_t __p0) { | 32185 | __ai float16x4_t vreinterpret_f16_u32(uint32x2_t __p0) { |
| 35218 | float16x4_t __ret; | 32186 | float16x4_t __ret; |
| 35219 | __ret = (float16x4_t)(__p0); | 32187 | __ret = (float16x4_t)(__p0); |
| 35220 | return __ret; | 32188 | return __ret; |
| 35221 | } | 32189 | } |
| 35222 | #endif | | |
| 35223 | | | |
| 35224 | #ifdef __LITTLE_ENDIAN__ | | |
| 35225 | __ai float16x4_t vreinterpret_f16_u64(uint64x1_t __p0) { | | |
| 35226 | float16x4_t __ret; | | |
| 35227 | __ret = (float16x4_t)(__p0); | | |
| 35228 | return __ret; | | |
| 35229 | } | | |
| 35230 | #else | | |
| 35231 | __ai float16x4_t vreinterpret_f16_u64(uint64x1_t __p0) { | 32190 | __ai float16x4_t vreinterpret_f16_u64(uint64x1_t __p0) { |
| 35232 | float16x4_t __ret; | 32191 | float16x4_t __ret; |
| 35233 | __ret = (float16x4_t)(__p0); | 32192 | __ret = (float16x4_t)(__p0); |
| 35234 | return __ret; | 32193 | return __ret; |
| 35235 | } | 32194 | } |
| 35236 | #endif | | |
| 35237 | | | |
| 35238 | #ifdef __LITTLE_ENDIAN__ | | |
| 35239 | __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { | | |
| 35240 | float16x4_t __ret; | | |
| 35241 | __ret = (float16x4_t)(__p0); | | |
| 35242 | return __ret; | | |
| 35243 | } | | |
| 35244 | #else | | |
| 35245 | __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { | 32195 | __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { |
| 35246 | float16x4_t __ret; | 32196 | float16x4_t __ret; |
| 35247 | __ret = (float16x4_t)(__p0); | 32197 | __ret = (float16x4_t)(__p0); |
| 35248 | return __ret; | 32198 | return __ret; |
| 35249 | } | 32199 | } |
| 35250 | #endif | | |
| 35251 | | | |
| 35252 | #ifdef __LITTLE_ENDIAN__ | | |
| 35253 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { | | |
| 35254 | float16x4_t __ret; | | |
| 35255 | __ret = (float16x4_t)(__p0); | | |
| 35256 | return __ret; | | |
| 35257 | } | | |
| 35258 | #else | | |
| 35259 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { | 32200 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { |
| 35260 | float16x4_t __ret; | 32201 | float16x4_t __ret; |
| 35261 | __ret = (float16x4_t)(__p0); | 32202 | __ret = (float16x4_t)(__p0); |
| 35262 | return __ret; | 32203 | return __ret; |
| 35263 | } | 32204 | } |
| 35264 | #endif | | |
| 35265 | | | |
| 35266 | #ifdef __LITTLE_ENDIAN__ | | |
| 35267 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { | 32205 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { |
| 35268 | float16x4_t __ret; | 32206 | float16x4_t __ret; |
| 35269 | __ret = (float16x4_t)(__p0); | 32207 | __ret = (float16x4_t)(__p0); |
| 35270 | return __ret; | 32208 | return __ret; |
| 35271 | } | 32209 | } |
| 35272 | #else | | |
| 35273 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { | | |
| 35274 | float16x4_t __ret; | | |
| 35275 | __ret = (float16x4_t)(__p0); | | |
| 35276 | return __ret; | | |
| 35277 | } | | |
| 35278 | #endif | | |
| 35279 | | | |
| 35280 | #ifdef __LITTLE_ENDIAN__ | | |
| 35281 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { | | |
| 35282 | float16x4_t __ret; | | |
| 35283 | __ret = (float16x4_t)(__p0); | | |
| 35284 | return __ret; | | |
| 35285 | } | | |
| 35286 | #else | | |
| 35287 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { | 32210 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { |
| 35288 | float16x4_t __ret; | 32211 | float16x4_t __ret; |
| 35289 | __ret = (float16x4_t)(__p0); | 32212 | __ret = (float16x4_t)(__p0); |
| 35290 | return __ret; | 32213 | return __ret; |
| 35291 | } | 32214 | } |
| 35292 | #endif | | |
| 35293 | | | |
| 35294 | #ifdef __LITTLE_ENDIAN__ | | |
| 35295 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { | 32215 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { |
| 35296 | float16x4_t __ret; | 32216 | float16x4_t __ret; |
| 35297 | __ret = (float16x4_t)(__p0); | 32217 | __ret = (float16x4_t)(__p0); |
| 35298 | return __ret; | 32218 | return __ret; |
| 35299 | } | 32219 | } |
| 35300 | #else | | |
| 35301 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { | | |
| 35302 | float16x4_t __ret; | | |
| 35303 | __ret = (float16x4_t)(__p0); | | |
| 35304 | return __ret; | | |
| 35305 | } | | |
| 35306 | #endif | | |
| 35307 | | | |
| 35308 | #ifdef __LITTLE_ENDIAN__ | | |
| 35309 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { | | |
| 35310 | float16x4_t __ret; | | |
| 35311 | __ret = (float16x4_t)(__p0); | | |
| 35312 | return __ret; | | |
| 35313 | } | | |
| 35314 | #else | | |
| 35315 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { | 32220 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { |
| 35316 | float16x4_t __ret; | 32221 | float16x4_t __ret; |
| 35317 | __ret = (float16x4_t)(__p0); | 32222 | __ret = (float16x4_t)(__p0); |
| 35318 | return __ret; | 32223 | return __ret; |
| 35319 | } | 32224 | } |
| 35320 | #endif | | |
| 35321 | | | |
| 35322 | #ifdef __LITTLE_ENDIAN__ | | |
| 35323 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { | | |
| 35324 | int32x2_t __ret; | | |
| 35325 | __ret = (int32x2_t)(__p0); | | |
| 35326 | return __ret; | | |
| 35327 | } | | |
| 35328 | #else | | |
| 35329 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { | 32225 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { |
| 35330 | int32x2_t __ret; | 32226 | int32x2_t __ret; |
| 35331 | __ret = (int32x2_t)(__p0); | 32227 | __ret = (int32x2_t)(__p0); |
| 35332 | return __ret; | 32228 | return __ret; |
| 35333 | } | 32229 | } |
| 35334 | #endif | | |
| 35335 | | | |
| 35336 | #ifdef __LITTLE_ENDIAN__ | | |
| 35337 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { | | |
| 35338 | int32x2_t __ret; | | |
| 35339 | __ret = (int32x2_t)(__p0); | | |
| 35340 | return __ret; | | |
| 35341 | } | | |
| 35342 | #else | | |
| 35343 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { | 32230 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { |
| 35344 | int32x2_t __ret; | 32231 | int32x2_t __ret; |
| 35345 | __ret = (int32x2_t)(__p0); | 32232 | __ret = (int32x2_t)(__p0); |
| 35346 | return __ret; | 32233 | return __ret; |
| 35347 | } | 32234 | } |
| 35348 | #endif | | |
| 35349 | | | |
| 35350 | #ifdef __LITTLE_ENDIAN__ | | |
| 35351 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { | 32235 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { |
| 35352 | int32x2_t __ret; | 32236 | int32x2_t __ret; |
| 35353 | __ret = (int32x2_t)(__p0); | 32237 | __ret = (int32x2_t)(__p0); |
| 35354 | return __ret; | 32238 | return __ret; |
| 35355 | } | 32239 | } |
| 35356 | #else | | |
| 35357 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { | | |
| 35358 | int32x2_t __ret; | | |
| 35359 | __ret = (int32x2_t)(__p0); | | |
| 35360 | return __ret; | | |
| 35361 | } | | |
| 35362 | #endif | | |
| 35363 | | | |
| 35364 | #ifdef __LITTLE_ENDIAN__ | | |
| 35365 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { | | |
| 35366 | int32x2_t __ret; | | |
| 35367 | __ret = (int32x2_t)(__p0); | | |
| 35368 | return __ret; | | |
| 35369 | } | | |
| 35370 | #else | | |
| 35371 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { | 32240 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { |
| 35372 | int32x2_t __ret; | 32241 | int32x2_t __ret; |
| 35373 | __ret = (int32x2_t)(__p0); | 32242 | __ret = (int32x2_t)(__p0); |
| 35374 | return __ret; | 32243 | return __ret; |
| 35375 | } | 32244 | } |
| 35376 | #endif | | |
| 35377 | | | |
| 35378 | #ifdef __LITTLE_ENDIAN__ | | |
| 35379 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { | 32245 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { |
| 35380 | int32x2_t __ret; | 32246 | int32x2_t __ret; |
| 35381 | __ret = (int32x2_t)(__p0); | 32247 | __ret = (int32x2_t)(__p0); |
| 35382 | return __ret; | 32248 | return __ret; |
| 35383 | } | 32249 | } |
| 35384 | #else | | |
| 35385 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { | | |
| 35386 | int32x2_t __ret; | | |
| 35387 | __ret = (int32x2_t)(__p0); | | |
| 35388 | return __ret; | | |
| 35389 | } | | |
| 35390 | #endif | | |
| 35391 | | | |
| 35392 | #ifdef __LITTLE_ENDIAN__ | | |
| 35393 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { | | |
| 35394 | int32x2_t __ret; | | |
| 35395 | __ret = (int32x2_t)(__p0); | | |
| 35396 | return __ret; | | |
| 35397 | } | | |
| 35398 | #else | | |
| 35399 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { | 32250 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { |
| 35400 | int32x2_t __ret; | 32251 | int32x2_t __ret; |
| 35401 | __ret = (int32x2_t)(__p0); | 32252 | __ret = (int32x2_t)(__p0); |
| 35402 | return __ret; | 32253 | return __ret; |
| 35403 | } | 32254 | } |
| 35404 | #endif | | |
| 35405 | | | |
| 35406 | #ifdef __LITTLE_ENDIAN__ | | |
| 35407 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { | | |
| 35408 | int32x2_t __ret; | | |
| 35409 | __ret = (int32x2_t)(__p0); | | |
| 35410 | return __ret; | | |
| 35411 | } | | |
| 35412 | #else | | |
| 35413 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { | 32255 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { |
| 35414 | int32x2_t __ret; | 32256 | int32x2_t __ret; |
| 35415 | __ret = (int32x2_t)(__p0); | 32257 | __ret = (int32x2_t)(__p0); |
| 35416 | return __ret; | 32258 | return __ret; |
| 35417 | } | 32259 | } |
| 35418 | #endif | | |
| 35419 | | | |
| 35420 | #ifdef __LITTLE_ENDIAN__ | | |
| 35421 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { | | |
| 35422 | int32x2_t __ret; | | |
| 35423 | __ret = (int32x2_t)(__p0); | | |
| 35424 | return __ret; | | |
| 35425 | } | | |
| 35426 | #else | | |
| 35427 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { | 32260 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { |
| 35428 | int32x2_t __ret; | 32261 | int32x2_t __ret; |
| 35429 | __ret = (int32x2_t)(__p0); | 32262 | __ret = (int32x2_t)(__p0); |
| 35430 | return __ret; | 32263 | return __ret; |
| 35431 | } | 32264 | } |
| 35432 | #endif | | |
| 35433 | | | |
| 35434 | #ifdef __LITTLE_ENDIAN__ | | |
| 35435 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { | 32265 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { |
| 35436 | int32x2_t __ret; | 32266 | int32x2_t __ret; |
| 35437 | __ret = (int32x2_t)(__p0); | 32267 | __ret = (int32x2_t)(__p0); |
| 35438 | return __ret; | 32268 | return __ret; |
| 35439 | } | 32269 | } |
| 35440 | #else | | |
| 35441 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { | | |
| 35442 | int32x2_t __ret; | | |
| 35443 | __ret = (int32x2_t)(__p0); | | |
| 35444 | return __ret; | | |
| 35445 | } | | |
| 35446 | #endif | | |
| 35447 | | | |
| 35448 | #ifdef __LITTLE_ENDIAN__ | | |
| 35449 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { | 32270 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { |
| 35450 | int32x2_t __ret; | 32271 | int32x2_t __ret; |
| 35451 | __ret = (int32x2_t)(__p0); | 32272 | __ret = (int32x2_t)(__p0); |
| 35452 | return __ret; | 32273 | return __ret; |
| 35453 | } | 32274 | } |
| 35454 | #else | | |
| 35455 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { | | |
| 35456 | int32x2_t __ret; | | |
| 35457 | __ret = (int32x2_t)(__p0); | | |
| 35458 | return __ret; | | |
| 35459 | } | | |
| 35460 | #endif | | |
| 35461 | | | |
| 35462 | #ifdef __LITTLE_ENDIAN__ | | |
| 35463 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { | | |
| 35464 | int32x2_t __ret; | | |
| 35465 | __ret = (int32x2_t)(__p0); | | |
| 35466 | return __ret; | | |
| 35467 | } | | |
| 35468 | #else | | |
| 35469 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { | 32275 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { |
| 35470 | int32x2_t __ret; | 32276 | int32x2_t __ret; |
| 35471 | __ret = (int32x2_t)(__p0); | 32277 | __ret = (int32x2_t)(__p0); |
| 35472 | return __ret; | 32278 | return __ret; |
| 35473 | } | 32279 | } |
| 35474 | #endif | | |
| 35475 | | | |
| 35476 | #ifdef __LITTLE_ENDIAN__ | | |
| 35477 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { | 32280 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { |
| 35478 | int64x1_t __ret; | 32281 | int64x1_t __ret; |
| 35479 | __ret = (int64x1_t)(__p0); | 32282 | __ret = (int64x1_t)(__p0); |
| 35480 | return __ret; | 32283 | return __ret; |
| 35481 | } | 32284 | } |
| 35482 | #else | | |
| 35483 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { | | |
| 35484 | int64x1_t __ret; | | |
| 35485 | __ret = (int64x1_t)(__p0); | | |
| 35486 | return __ret; | | |
| 35487 | } | | |
| 35488 | #endif | | |
| 35489 | | | |
| 35490 | #ifdef __LITTLE_ENDIAN__ | | |
| 35491 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { | 32285 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { |
| 35492 | int64x1_t __ret; | 32286 | int64x1_t __ret; |
| 35493 | __ret = (int64x1_t)(__p0); | 32287 | __ret = (int64x1_t)(__p0); |
| 35494 | return __ret; | 32288 | return __ret; |
| 35495 | } | 32289 | } |
| 35496 | #else | | |
| 35497 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { | | |
| 35498 | int64x1_t __ret; | | |
| 35499 | __ret = (int64x1_t)(__p0); | | |
| 35500 | return __ret; | | |
| 35501 | } | | |
| 35502 | #endif | | |
| 35503 | | | |
| 35504 | #ifdef __LITTLE_ENDIAN__ | | |
| 35505 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { | | |
| 35506 | int64x1_t __ret; | | |
| 35507 | __ret = (int64x1_t)(__p0); | | |
| 35508 | return __ret; | | |
| 35509 | } | | |
| 35510 | #else | | |
| 35511 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { | 32290 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { |
| 35512 | int64x1_t __ret; | 32291 | int64x1_t __ret; |
| 35513 | __ret = (int64x1_t)(__p0); | 32292 | __ret = (int64x1_t)(__p0); |
| 35514 | return __ret; | 32293 | return __ret; |
| 35515 | } | 32294 | } |
| 35516 | #endif | | |
| 35517 | | | |
| 35518 | #ifdef __LITTLE_ENDIAN__ | | |
| 35519 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { | | |
| 35520 | int64x1_t __ret; | | |
| 35521 | __ret = (int64x1_t)(__p0); | | |
| 35522 | return __ret; | | |
| 35523 | } | | |
| 35524 | #else | | |
| 35525 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { | 32295 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { |
| 35526 | int64x1_t __ret; | 32296 | int64x1_t __ret; |
| 35527 | __ret = (int64x1_t)(__p0); | 32297 | __ret = (int64x1_t)(__p0); |
| 35528 | return __ret; | 32298 | return __ret; |
| 35529 | } | 32299 | } |
| 35530 | #endif | | |
| 35531 | | | |
| 35532 | #ifdef __LITTLE_ENDIAN__ | | |
| 35533 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { | 32300 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { |
| 35534 | int64x1_t __ret; | 32301 | int64x1_t __ret; |
| 35535 | __ret = (int64x1_t)(__p0); | 32302 | __ret = (int64x1_t)(__p0); |
| 35536 | return __ret; | 32303 | return __ret; |
| 35537 | } | 32304 | } |
| 35538 | #else | | |
| 35539 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { | | |
| 35540 | int64x1_t __ret; | | |
| 35541 | __ret = (int64x1_t)(__p0); | | |
| 35542 | return __ret; | | |
| 35543 | } | | |
| 35544 | #endif | | |
| 35545 | | | |
| 35546 | #ifdef __LITTLE_ENDIAN__ | | |
| 35547 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { | | |
| 35548 | int64x1_t __ret; | | |
| 35549 | __ret = (int64x1_t)(__p0); | | |
| 35550 | return __ret; | | |
| 35551 | } | | |
| 35552 | #else | | |
| 35553 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { | 32305 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { |
| 35554 | int64x1_t __ret; | 32306 | int64x1_t __ret; |
| 35555 | __ret = (int64x1_t)(__p0); | 32307 | __ret = (int64x1_t)(__p0); |
| 35556 | return __ret; | 32308 | return __ret; |
| 35557 | } | 32309 | } |
| 35558 | #endif | | |
| 35559 | | | |
| 35560 | #ifdef __LITTLE_ENDIAN__ | | |
| 35561 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { | 32310 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { |
| 35562 | int64x1_t __ret; | 32311 | int64x1_t __ret; |
| 35563 | __ret = (int64x1_t)(__p0); | 32312 | __ret = (int64x1_t)(__p0); |
| 35564 | return __ret; | 32313 | return __ret; |
| 35565 | } | 32314 | } |
| 35566 | #else | | |
| 35567 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { | | |
| 35568 | int64x1_t __ret; | | |
| 35569 | __ret = (int64x1_t)(__p0); | | |
| 35570 | return __ret; | | |
| 35571 | } | | |
| 35572 | #endif | | |
| 35573 | | | |
| 35574 | #ifdef __LITTLE_ENDIAN__ | | |
| 35575 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { | | |
| 35576 | int64x1_t __ret; | | |
| 35577 | __ret = (int64x1_t)(__p0); | | |
| 35578 | return __ret; | | |
| 35579 | } | | |
| 35580 | #else | | |
| 35581 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { | 32315 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { |
| 35582 | int64x1_t __ret; | 32316 | int64x1_t __ret; |
| 35583 | __ret = (int64x1_t)(__p0); | 32317 | __ret = (int64x1_t)(__p0); |
| 35584 | return __ret; | 32318 | return __ret; |
| 35585 | } | 32319 | } |
| 35586 | #endif | | |
| 35587 | | | |
| 35588 | #ifdef __LITTLE_ENDIAN__ | | |
| 35589 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { | | |
| 35590 | int64x1_t __ret; | | |
| 35591 | __ret = (int64x1_t)(__p0); | | |
| 35592 | return __ret; | | |
| 35593 | } | | |
| 35594 | #else | | |
| 35595 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { | 32320 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { |
| 35596 | int64x1_t __ret; | 32321 | int64x1_t __ret; |
| 35597 | __ret = (int64x1_t)(__p0); | 32322 | __ret = (int64x1_t)(__p0); |
| 35598 | return __ret; | 32323 | return __ret; |
| 35599 | } | 32324 | } |
| 35600 | #endif | | |
| 35601 | | | |
| 35602 | #ifdef __LITTLE_ENDIAN__ | | |
| 35603 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { | 32325 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { |
| 35604 | int64x1_t __ret; | 32326 | int64x1_t __ret; |
| 35605 | __ret = (int64x1_t)(__p0); | 32327 | __ret = (int64x1_t)(__p0); |
| 35606 | return __ret; | 32328 | return __ret; |
| 35607 | } | 32329 | } |
| 35608 | #else | | |
| 35609 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { | | |
| 35610 | int64x1_t __ret; | | |
| 35611 | __ret = (int64x1_t)(__p0); | | |
| 35612 | return __ret; | | |
| 35613 | } | | |
| 35614 | #endif | | |
| 35615 | | | |
| 35616 | #ifdef __LITTLE_ENDIAN__ | | |
| 35617 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { | 32330 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { |
| 35618 | int64x1_t __ret; | 32331 | int64x1_t __ret; |
| 35619 | __ret = (int64x1_t)(__p0); | 32332 | __ret = (int64x1_t)(__p0); |
| 35620 | return __ret; | 32333 | return __ret; |
| 35621 | } | 32334 | } |
| 35622 | #else | | |
| 35623 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { | | |
| 35624 | int64x1_t __ret; | | |
| 35625 | __ret = (int64x1_t)(__p0); | | |
| 35626 | return __ret; | | |
| 35627 | } | | |
| 35628 | #endif | | |
| 35629 | | | |
| 35630 | #ifdef __LITTLE_ENDIAN__ | | |
| 35631 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { | | |
| 35632 | int16x4_t __ret; | | |
| 35633 | __ret = (int16x4_t)(__p0); | | |
| 35634 | return __ret; | | |
| 35635 | } | | |
| 35636 | #else | | |
| 35637 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { | 32335 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { |
| 35638 | int16x4_t __ret; | 32336 | int16x4_t __ret; |
| 35639 | __ret = (int16x4_t)(__p0); | 32337 | __ret = (int16x4_t)(__p0); |
| 35640 | return __ret; | 32338 | return __ret; |
| 35641 | } | 32339 | } |
| 35642 | #endif | | |
| 35643 | | | |
| 35644 | #ifdef __LITTLE_ENDIAN__ | | |
| 35645 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { | 32340 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { |
| 35646 | int16x4_t __ret; | 32341 | int16x4_t __ret; |
| 35647 | __ret = (int16x4_t)(__p0); | 32342 | __ret = (int16x4_t)(__p0); |
| 35648 | return __ret; | 32343 | return __ret; |
| 35649 | } | 32344 | } |
| 35650 | #else | | |
| 35651 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { | | |
| 35652 | int16x4_t __ret; | | |
| 35653 | __ret = (int16x4_t)(__p0); | | |
| 35654 | return __ret; | | |
| 35655 | } | | |
| 35656 | #endif | | |
| 35657 | | | |
| 35658 | #ifdef __LITTLE_ENDIAN__ | | |
| 35659 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { | | |
| 35660 | int16x4_t __ret; | | |
| 35661 | __ret = (int16x4_t)(__p0); | | |
| 35662 | return __ret; | | |
| 35663 | } | | |
| 35664 | #else | | |
| 35665 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { | 32345 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { |
| 35666 | int16x4_t __ret; | 32346 | int16x4_t __ret; |
| 35667 | __ret = (int16x4_t)(__p0); | 32347 | __ret = (int16x4_t)(__p0); |
| 35668 | return __ret; | 32348 | return __ret; |
| 35669 | } | 32349 | } |
| 35670 | #endif | | |
| 35671 | | | |
| 35672 | #ifdef __LITTLE_ENDIAN__ | | |
| 35673 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { | | |
| 35674 | int16x4_t __ret; | | |
| 35675 | __ret = (int16x4_t)(__p0); | | |
| 35676 | return __ret; | | |
| 35677 | } | | |
| 35678 | #else | | |
| 35679 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { | 32350 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { |
| 35680 | int16x4_t __ret; | 32351 | int16x4_t __ret; |
| 35681 | __ret = (int16x4_t)(__p0); | 32352 | __ret = (int16x4_t)(__p0); |
| 35682 | return __ret; | 32353 | return __ret; |
| 35683 | } | 32354 | } |
| 35684 | #endif | | |
| 35685 | | | |
| 35686 | #ifdef __LITTLE_ENDIAN__ | | |
| 35687 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { | | |
| 35688 | int16x4_t __ret; | | |
| 35689 | __ret = (int16x4_t)(__p0); | | |
| 35690 | return __ret; | | |
| 35691 | } | | |
| 35692 | #else | | |
| 35693 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { | 32355 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { |
| 35694 | int16x4_t __ret; | 32356 | int16x4_t __ret; |
| 35695 | __ret = (int16x4_t)(__p0); | 32357 | __ret = (int16x4_t)(__p0); |
| 35696 | return __ret; | 32358 | return __ret; |
| 35697 | } | 32359 | } |
| 35698 | #endif | | |
| 35699 | | | |
| 35700 | #ifdef __LITTLE_ENDIAN__ | | |
| 35701 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { | 32360 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { |
| 35702 | int16x4_t __ret; | 32361 | int16x4_t __ret; |
| 35703 | __ret = (int16x4_t)(__p0); | 32362 | __ret = (int16x4_t)(__p0); |
| 35704 | return __ret; | 32363 | return __ret; |
| 35705 | } | 32364 | } |
| 35706 | #else | | |
| 35707 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { | | |
| 35708 | int16x4_t __ret; | | |
| 35709 | __ret = (int16x4_t)(__p0); | | |
| 35710 | return __ret; | | |
| 35711 | } | | |
| 35712 | #endif | | |
| 35713 | | | |
| 35714 | #ifdef __LITTLE_ENDIAN__ | | |
| 35715 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { | 32365 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { |
| 35716 | int16x4_t __ret; | 32366 | int16x4_t __ret; |
| 35717 | __ret = (int16x4_t)(__p0); | 32367 | __ret = (int16x4_t)(__p0); |
| 35718 | return __ret; | 32368 | return __ret; |
| 35719 | } | 32369 | } |
| 35720 | #else | | |
| 35721 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { | | |
| 35722 | int16x4_t __ret; | | |
| 35723 | __ret = (int16x4_t)(__p0); | | |
| 35724 | return __ret; | | |
| 35725 | } | | |
| 35726 | #endif | | |
| 35727 | | | |
| 35728 | #ifdef __LITTLE_ENDIAN__ | | |
| 35729 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { | 32370 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { |
| 35730 | int16x4_t __ret; | 32371 | int16x4_t __ret; |
| 35731 | __ret = (int16x4_t)(__p0); | 32372 | __ret = (int16x4_t)(__p0); |
| 35732 | return __ret; | 32373 | return __ret; |
| 35733 | } | 32374 | } |
| 35734 | #else | | |
| 35735 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { | | |
| 35736 | int16x4_t __ret; | | |
| 35737 | __ret = (int16x4_t)(__p0); | | |
| 35738 | return __ret; | | |
| 35739 | } | | |
| 35740 | #endif | | |
| 35741 | | | |
| 35742 | #ifdef __LITTLE_ENDIAN__ | | |
| 35743 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { | | |
| 35744 | int16x4_t __ret; | | |
| 35745 | __ret = (int16x4_t)(__p0); | | |
| 35746 | return __ret; | | |
| 35747 | } | | |
| 35748 | #else | | |
| 35749 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { | 32375 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { |
| 35750 | int16x4_t __ret; | 32376 | int16x4_t __ret; |
| 35751 | __ret = (int16x4_t)(__p0); | 32377 | __ret = (int16x4_t)(__p0); |
| 35752 | return __ret; | 32378 | return __ret; |
| 35753 | } | 32379 | } |
| 35754 | #endif | | |
| 35755 | | | |
| 35756 | #ifdef __LITTLE_ENDIAN__ | | |
| 35757 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { | | |
| 35758 | int16x4_t __ret; | | |
| 35759 | __ret = (int16x4_t)(__p0); | | |
| 35760 | return __ret; | | |
| 35761 | } | | |
| 35762 | #else | | |
| 35763 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { | 32380 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { |
| 35764 | int16x4_t __ret; | 32381 | int16x4_t __ret; |
| 35765 | __ret = (int16x4_t)(__p0); | 32382 | __ret = (int16x4_t)(__p0); |
| 35766 | return __ret; | 32383 | return __ret; |
| 35767 | } | 32384 | } |
| 35768 | #endif | | |
| 35769 | | | |
| 35770 | #ifdef __LITTLE_ENDIAN__ | | |
| 35771 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { | | |
| 35772 | int16x4_t __ret; | | |
| 35773 | __ret = (int16x4_t)(__p0); | | |
| 35774 | return __ret; | | |
| 35775 | } | | |
| 35776 | #else | | |
| 35777 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { | 32385 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { |
| 35778 | int16x4_t __ret; | 32386 | int16x4_t __ret; |
| 35779 | __ret = (int16x4_t)(__p0); | 32387 | __ret = (int16x4_t)(__p0); |
| 35780 | return __ret; | 32388 | return __ret; |
| 35781 | } | 32389 | } |
| 35782 | #endif | | |
| 35783 | | | |
| 35784 | #endif | 32390 | #endif |
| 35785 | #if (__ARM_FP & 2) | 32391 | #if (__ARM_FP & 2) |
| 35786 | #ifdef __LITTLE_ENDIAN__ | 32392 | #ifdef __LITTLE_ENDIAN__ |
| 35787 | __ai float16x4_t vcvt_f16_f32(float32x4_t __p0) { | 32393 | __ai float16x4_t vcvt_f16_f32(float32x4_t __p0) { |
| 35788 | float16x4_t __ret; | 32394 | float16x4_t __ret; |
| 35789 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__p0, 8); | 32395 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__p0, 41); |
| 35790 | return __ret; | 32396 | return __ret; |
| 35791 | } | 32397 | } |
| 35792 | #else | 32398 | #else |
| 35793 | __ai float16x4_t vcvt_f16_f32(float32x4_t __p0) { | 32399 | __ai float16x4_t vcvt_f16_f32(float32x4_t __p0) { |
| 35794 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 32400 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35795 | float16x4_t __ret; | 32401 | float16x4_t __ret; |
| 35796 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__rev0, 8); | 32402 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__rev0, 41); |
| 35797 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 32403 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35798 | return __ret; | 32404 | return __ret; |
| 35799 | } | 32405 | } |
| 35800 | __ai float16x4_t __noswap_vcvt_f16_f32(float32x4_t __p0) { | 32406 | __ai float16x4_t __noswap_vcvt_f16_f32(float32x4_t __p0) { |
| 35801 | float16x4_t __ret; | 32407 | float16x4_t __ret; |
| 35802 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__p0, 8); | 32408 | __ret = (float16x4_t) __builtin_neon_vcvt_f16_f32((int8x16_t)__p0, 41); |
| 35803 | return __ret; | 32409 | return __ret; |
| 35804 | } | 32410 | } |
| 35805 | #endif | 32411 | #endif |
| ... | @@ -35807,20 +32413,20 @@ __ai float16x4_t __noswap_vcvt_f16_f32(float32x4_t __p0) { | ... | @@ -35807,20 +32413,20 @@ __ai float16x4_t __noswap_vcvt_f16_f32(float32x4_t __p0) { |
| 35807 | #ifdef __LITTLE_ENDIAN__ | 32413 | #ifdef __LITTLE_ENDIAN__ |
| 35808 | __ai float32x4_t vcvt_f32_f16(float16x4_t __p0) { | 32414 | __ai float32x4_t vcvt_f32_f16(float16x4_t __p0) { |
| 35809 | float32x4_t __ret; | 32415 | float32x4_t __ret; |
| 35810 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__p0, 41); | 32416 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__p0, 8); |
| 35811 | return __ret; | 32417 | return __ret; |
| 35812 | } | 32418 | } |
| 35813 | #else | 32419 | #else |
| 35814 | __ai float32x4_t vcvt_f32_f16(float16x4_t __p0) { | 32420 | __ai float32x4_t vcvt_f32_f16(float16x4_t __p0) { |
| 35815 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 32421 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 35816 | float32x4_t __ret; | 32422 | float32x4_t __ret; |
| 35817 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__rev0, 41); | 32423 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__rev0, 8); |
| 35818 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 32424 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 35819 | return __ret; | 32425 | return __ret; |
| 35820 | } | 32426 | } |
| 35821 | __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | 32427 | __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 35822 | float32x4_t __ret; | 32428 | float32x4_t __ret; |
| 35823 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__p0, 41); | 32429 | __ret = (float32x4_t) __builtin_neon_vcvt_f32_f16((int8x8_t)__p0, 8); |
| 35824 | return __ret; | 32430 | return __ret; |
| 35825 | } | 32431 | } |
| 35826 | #endif | 32432 | #endif |
| ... | @@ -36101,7 +32707,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36101,7 +32707,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36101 | #define vld2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 32707 | #define vld2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36102 | float16x8x2_t __s1 = __p1; \ | 32708 | float16x8x2_t __s1 = __p1; \ |
| 36103 | float16x8x2_t __ret; \ | 32709 | float16x8x2_t __ret; \ |
| 36104 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 40); \ | 32710 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 40); \ |
| 36105 | __ret; \ | 32711 | __ret; \ |
| 36106 | }) | 32712 | }) |
| 36107 | #else | 32713 | #else |
| ... | @@ -36111,7 +32717,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36111,7 +32717,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36111 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32717 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36112 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32718 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36113 | float16x8x2_t __ret; \ | 32719 | float16x8x2_t __ret; \ |
| 36114 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 40); \ | 32720 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 40); \ |
| 36115 | \ | 32721 | \ |
| 36116 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32722 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36117 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32723 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| ... | @@ -36123,7 +32729,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36123,7 +32729,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36123 | #define vld2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 32729 | #define vld2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36124 | float16x4x2_t __s1 = __p1; \ | 32730 | float16x4x2_t __s1 = __p1; \ |
| 36125 | float16x4x2_t __ret; \ | 32731 | float16x4x2_t __ret; \ |
| 36126 | __builtin_neon_vld2_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 8); \ | 32732 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 8); \ |
| 36127 | __ret; \ | 32733 | __ret; \ |
| 36128 | }) | 32734 | }) |
| 36129 | #else | 32735 | #else |
| ... | @@ -36133,7 +32739,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36133,7 +32739,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36133 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 32739 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 36134 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 32740 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36135 | float16x4x2_t __ret; \ | 32741 | float16x4x2_t __ret; \ |
| 36136 | __builtin_neon_vld2_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 8); \ | 32742 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 8); \ |
| 36137 | \ | 32743 | \ |
| 36138 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 32744 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 36139 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 32745 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -36217,7 +32823,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36217,7 +32823,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36217 | #define vld3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 32823 | #define vld3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36218 | float16x8x3_t __s1 = __p1; \ | 32824 | float16x8x3_t __s1 = __p1; \ |
| 36219 | float16x8x3_t __ret; \ | 32825 | float16x8x3_t __ret; \ |
| 36220 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 40); \ | 32826 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 40); \ |
| 36221 | __ret; \ | 32827 | __ret; \ |
| 36222 | }) | 32828 | }) |
| 36223 | #else | 32829 | #else |
| ... | @@ -36228,7 +32834,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36228,7 +32834,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36228 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32834 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36229 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32835 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36230 | float16x8x3_t __ret; \ | 32836 | float16x8x3_t __ret; \ |
| 36231 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 40); \ | 32837 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 40); \ |
| 36232 | \ | 32838 | \ |
| 36233 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32839 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36234 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32840 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| ... | @@ -36241,7 +32847,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36241,7 +32847,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36241 | #define vld3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 32847 | #define vld3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36242 | float16x4x3_t __s1 = __p1; \ | 32848 | float16x4x3_t __s1 = __p1; \ |
| 36243 | float16x4x3_t __ret; \ | 32849 | float16x4x3_t __ret; \ |
| 36244 | __builtin_neon_vld3_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 8); \ | 32850 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 8); \ |
| 36245 | __ret; \ | 32851 | __ret; \ |
| 36246 | }) | 32852 | }) |
| 36247 | #else | 32853 | #else |
| ... | @@ -36252,7 +32858,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36252,7 +32858,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36252 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 32858 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36253 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 32859 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 36254 | float16x4x3_t __ret; \ | 32860 | float16x4x3_t __ret; \ |
| 36255 | __builtin_neon_vld3_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 8); \ | 32861 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 8); \ |
| 36256 | \ | 32862 | \ |
| 36257 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 32863 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 36258 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 32864 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -36341,7 +32947,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36341,7 +32947,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36341 | #define vld4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 32947 | #define vld4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36342 | float16x8x4_t __s1 = __p1; \ | 32948 | float16x8x4_t __s1 = __p1; \ |
| 36343 | float16x8x4_t __ret; \ | 32949 | float16x8x4_t __ret; \ |
| 36344 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 40); \ | 32950 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 40); \ |
| 36345 | __ret; \ | 32951 | __ret; \ |
| 36346 | }) | 32952 | }) |
| 36347 | #else | 32953 | #else |
| ... | @@ -36353,7 +32959,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36353,7 +32959,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36353 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32959 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36354 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32960 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36355 | float16x8x4_t __ret; \ | 32961 | float16x8x4_t __ret; \ |
| 36356 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 40); \ | 32962 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 40); \ |
| 36357 | \ | 32963 | \ |
| 36358 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32964 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36359 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 32965 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| ... | @@ -36367,7 +32973,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36367,7 +32973,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36367 | #define vld4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 32973 | #define vld4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36368 | float16x4x4_t __s1 = __p1; \ | 32974 | float16x4x4_t __s1 = __p1; \ |
| 36369 | float16x4x4_t __ret; \ | 32975 | float16x4x4_t __ret; \ |
| 36370 | __builtin_neon_vld4_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 8); \ | 32976 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 8); \ |
| 36371 | __ret; \ | 32977 | __ret; \ |
| 36372 | }) | 32978 | }) |
| 36373 | #else | 32979 | #else |
| ... | @@ -36379,7 +32985,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36379,7 +32985,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36379 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 32985 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 36380 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 32986 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 36381 | float16x4x4_t __ret; \ | 32987 | float16x4x4_t __ret; \ |
| 36382 | __builtin_neon_vld4_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 8); \ | 32988 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 8); \ |
| 36383 | \ | 32989 | \ |
| 36384 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ | 32990 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 3, 2, 1, 0); \ |
| 36385 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ | 32991 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 3, 2, 1, 0); \ |
| ... | @@ -36444,7 +33050,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36444,7 +33050,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36444 | #ifdef __LITTLE_ENDIAN__ | 33050 | #ifdef __LITTLE_ENDIAN__ |
| 36445 | #define vst1q_f16_x2(__p0, __p1) __extension__ ({ \ | 33051 | #define vst1q_f16_x2(__p0, __p1) __extension__ ({ \ |
| 36446 | float16x8x2_t __s1 = __p1; \ | 33052 | float16x8x2_t __s1 = __p1; \ |
| 36447 | __builtin_neon_vst1q_x2_v(__p0, __s1.val[0], __s1.val[1], 40); \ | 33053 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 40); \ |
| 36448 | }) | 33054 | }) |
| 36449 | #else | 33055 | #else |
| 36450 | #define vst1q_f16_x2(__p0, __p1) __extension__ ({ \ | 33056 | #define vst1q_f16_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36452,14 +33058,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36452,14 +33058,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36452 | float16x8x2_t __rev1; \ | 33058 | float16x8x2_t __rev1; \ |
| 36453 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33059 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36454 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33060 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36455 | __builtin_neon_vst1q_x2_v(__p0, __rev1.val[0], __rev1.val[1], 40); \ | 33061 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 40); \ |
| 36456 | }) | 33062 | }) |
| 36457 | #endif | 33063 | #endif |
| 36458 | | 33064 | |
| 36459 | #ifdef __LITTLE_ENDIAN__ | 33065 | #ifdef __LITTLE_ENDIAN__ |
| 36460 | #define vst1_f16_x2(__p0, __p1) __extension__ ({ \ | 33066 | #define vst1_f16_x2(__p0, __p1) __extension__ ({ \ |
| 36461 | float16x4x2_t __s1 = __p1; \ | 33067 | float16x4x2_t __s1 = __p1; \ |
| 36462 | __builtin_neon_vst1_x2_v(__p0, __s1.val[0], __s1.val[1], 8); \ | 33068 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 8); \ |
| 36463 | }) | 33069 | }) |
| 36464 | #else | 33070 | #else |
| 36465 | #define vst1_f16_x2(__p0, __p1) __extension__ ({ \ | 33071 | #define vst1_f16_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36467,14 +33073,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36467,14 +33073,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36467 | float16x4x2_t __rev1; \ | 33073 | float16x4x2_t __rev1; \ |
| 36468 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 33074 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 36469 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33075 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36470 | __builtin_neon_vst1_x2_v(__p0, __rev1.val[0], __rev1.val[1], 8); \ | 33076 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 8); \ |
| 36471 | }) | 33077 | }) |
| 36472 | #endif | 33078 | #endif |
| 36473 | | 33079 | |
| 36474 | #ifdef __LITTLE_ENDIAN__ | 33080 | #ifdef __LITTLE_ENDIAN__ |
| 36475 | #define vst1q_f16_x3(__p0, __p1) __extension__ ({ \ | 33081 | #define vst1q_f16_x3(__p0, __p1) __extension__ ({ \ |
| 36476 | float16x8x3_t __s1 = __p1; \ | 33082 | float16x8x3_t __s1 = __p1; \ |
| 36477 | __builtin_neon_vst1q_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 40); \ | 33083 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 40); \ |
| 36478 | }) | 33084 | }) |
| 36479 | #else | 33085 | #else |
| 36480 | #define vst1q_f16_x3(__p0, __p1) __extension__ ({ \ | 33086 | #define vst1q_f16_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36483,14 +33089,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36483,14 +33089,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36483 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33089 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36484 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33090 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36485 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33091 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36486 | __builtin_neon_vst1q_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 40); \ | 33092 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 40); \ |
| 36487 | }) | 33093 | }) |
| 36488 | #endif | 33094 | #endif |
| 36489 | | 33095 | |
| 36490 | #ifdef __LITTLE_ENDIAN__ | 33096 | #ifdef __LITTLE_ENDIAN__ |
| 36491 | #define vst1_f16_x3(__p0, __p1) __extension__ ({ \ | 33097 | #define vst1_f16_x3(__p0, __p1) __extension__ ({ \ |
| 36492 | float16x4x3_t __s1 = __p1; \ | 33098 | float16x4x3_t __s1 = __p1; \ |
| 36493 | __builtin_neon_vst1_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 8); \ | 33099 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 8); \ |
| 36494 | }) | 33100 | }) |
| 36495 | #else | 33101 | #else |
| 36496 | #define vst1_f16_x3(__p0, __p1) __extension__ ({ \ | 33102 | #define vst1_f16_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36499,14 +33105,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36499,14 +33105,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36499 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 33105 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 36500 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33106 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36501 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 33107 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 36502 | __builtin_neon_vst1_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 8); \ | 33108 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 8); \ |
| 36503 | }) | 33109 | }) |
| 36504 | #endif | 33110 | #endif |
| 36505 | | 33111 | |
| 36506 | #ifdef __LITTLE_ENDIAN__ | 33112 | #ifdef __LITTLE_ENDIAN__ |
| 36507 | #define vst1q_f16_x4(__p0, __p1) __extension__ ({ \ | 33113 | #define vst1q_f16_x4(__p0, __p1) __extension__ ({ \ |
| 36508 | float16x8x4_t __s1 = __p1; \ | 33114 | float16x8x4_t __s1 = __p1; \ |
| 36509 | __builtin_neon_vst1q_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 40); \ | 33115 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 40); \ |
| 36510 | }) | 33116 | }) |
| 36511 | #else | 33117 | #else |
| 36512 | #define vst1q_f16_x4(__p0, __p1) __extension__ ({ \ | 33118 | #define vst1q_f16_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36516,14 +33122,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36516,14 +33122,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36516 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33122 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36517 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33123 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36518 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33124 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36519 | __builtin_neon_vst1q_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 40); \ | 33125 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 40); \ |
| 36520 | }) | 33126 | }) |
| 36521 | #endif | 33127 | #endif |
| 36522 | | 33128 | |
| 36523 | #ifdef __LITTLE_ENDIAN__ | 33129 | #ifdef __LITTLE_ENDIAN__ |
| 36524 | #define vst1_f16_x4(__p0, __p1) __extension__ ({ \ | 33130 | #define vst1_f16_x4(__p0, __p1) __extension__ ({ \ |
| 36525 | float16x4x4_t __s1 = __p1; \ | 33131 | float16x4x4_t __s1 = __p1; \ |
| 36526 | __builtin_neon_vst1_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 8); \ | 33132 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 8); \ |
| 36527 | }) | 33133 | }) |
| 36528 | #else | 33134 | #else |
| 36529 | #define vst1_f16_x4(__p0, __p1) __extension__ ({ \ | 33135 | #define vst1_f16_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36533,14 +33139,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36533,14 +33139,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36533 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33139 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36534 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 33140 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 36535 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 33141 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 36536 | __builtin_neon_vst1_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 8); \ | 33142 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 8); \ |
| 36537 | }) | 33143 | }) |
| 36538 | #endif | 33144 | #endif |
| 36539 | | 33145 | |
| 36540 | #ifdef __LITTLE_ENDIAN__ | 33146 | #ifdef __LITTLE_ENDIAN__ |
| 36541 | #define vst2q_f16(__p0, __p1) __extension__ ({ \ | 33147 | #define vst2q_f16(__p0, __p1) __extension__ ({ \ |
| 36542 | float16x8x2_t __s1 = __p1; \ | 33148 | float16x8x2_t __s1 = __p1; \ |
| 36543 | __builtin_neon_vst2q_v(__p0, __s1.val[0], __s1.val[1], 40); \ | 33149 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 40); \ |
| 36544 | }) | 33150 | }) |
| 36545 | #else | 33151 | #else |
| 36546 | #define vst2q_f16(__p0, __p1) __extension__ ({ \ | 33152 | #define vst2q_f16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36548,14 +33154,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36548,14 +33154,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36548 | float16x8x2_t __rev1; \ | 33154 | float16x8x2_t __rev1; \ |
| 36549 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33155 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36550 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33156 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36551 | __builtin_neon_vst2q_v(__p0, __rev1.val[0], __rev1.val[1], 40); \ | 33157 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 40); \ |
| 36552 | }) | 33158 | }) |
| 36553 | #endif | 33159 | #endif |
| 36554 | | 33160 | |
| 36555 | #ifdef __LITTLE_ENDIAN__ | 33161 | #ifdef __LITTLE_ENDIAN__ |
| 36556 | #define vst2_f16(__p0, __p1) __extension__ ({ \ | 33162 | #define vst2_f16(__p0, __p1) __extension__ ({ \ |
| 36557 | float16x4x2_t __s1 = __p1; \ | 33163 | float16x4x2_t __s1 = __p1; \ |
| 36558 | __builtin_neon_vst2_v(__p0, __s1.val[0], __s1.val[1], 8); \ | 33164 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 8); \ |
| 36559 | }) | 33165 | }) |
| 36560 | #else | 33166 | #else |
| 36561 | #define vst2_f16(__p0, __p1) __extension__ ({ \ | 33167 | #define vst2_f16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36563,14 +33169,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36563,14 +33169,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36563 | float16x4x2_t __rev1; \ | 33169 | float16x4x2_t __rev1; \ |
| 36564 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 33170 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 36565 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33171 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36566 | __builtin_neon_vst2_v(__p0, __rev1.val[0], __rev1.val[1], 8); \ | 33172 | __builtin_neon_vst2_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], 8); \ |
| 36567 | }) | 33173 | }) |
| 36568 | #endif | 33174 | #endif |
| 36569 | | 33175 | |
| 36570 | #ifdef __LITTLE_ENDIAN__ | 33176 | #ifdef __LITTLE_ENDIAN__ |
| 36571 | #define vst2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33177 | #define vst2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36572 | float16x8x2_t __s1 = __p1; \ | 33178 | float16x8x2_t __s1 = __p1; \ |
| 36573 | __builtin_neon_vst2q_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 40); \ | 33179 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 40); \ |
| 36574 | }) | 33180 | }) |
| 36575 | #else | 33181 | #else |
| 36576 | #define vst2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33182 | #define vst2q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -36578,14 +33184,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36578,14 +33184,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36578 | float16x8x2_t __rev1; \ | 33184 | float16x8x2_t __rev1; \ |
| 36579 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33185 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36580 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33186 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36581 | __builtin_neon_vst2q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 40); \ | 33187 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 40); \ |
| 36582 | }) | 33188 | }) |
| 36583 | #endif | 33189 | #endif |
| 36584 | | 33190 | |
| 36585 | #ifdef __LITTLE_ENDIAN__ | 33191 | #ifdef __LITTLE_ENDIAN__ |
| 36586 | #define vst2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33192 | #define vst2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36587 | float16x4x2_t __s1 = __p1; \ | 33193 | float16x4x2_t __s1 = __p1; \ |
| 36588 | __builtin_neon_vst2_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 8); \ | 33194 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 8); \ |
| 36589 | }) | 33195 | }) |
| 36590 | #else | 33196 | #else |
| 36591 | #define vst2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33197 | #define vst2_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -36593,14 +33199,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36593,14 +33199,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36593 | float16x4x2_t __rev1; \ | 33199 | float16x4x2_t __rev1; \ |
| 36594 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 33200 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 36595 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33201 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36596 | __builtin_neon_vst2_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 8); \ | 33202 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], __p2, 8); \ |
| 36597 | }) | 33203 | }) |
| 36598 | #endif | 33204 | #endif |
| 36599 | | 33205 | |
| 36600 | #ifdef __LITTLE_ENDIAN__ | 33206 | #ifdef __LITTLE_ENDIAN__ |
| 36601 | #define vst3q_f16(__p0, __p1) __extension__ ({ \ | 33207 | #define vst3q_f16(__p0, __p1) __extension__ ({ \ |
| 36602 | float16x8x3_t __s1 = __p1; \ | 33208 | float16x8x3_t __s1 = __p1; \ |
| 36603 | __builtin_neon_vst3q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 40); \ | 33209 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 40); \ |
| 36604 | }) | 33210 | }) |
| 36605 | #else | 33211 | #else |
| 36606 | #define vst3q_f16(__p0, __p1) __extension__ ({ \ | 33212 | #define vst3q_f16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36609,14 +33215,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36609,14 +33215,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36609 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33215 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36610 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33216 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36611 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33217 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36612 | __builtin_neon_vst3q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 40); \ | 33218 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 40); \ |
| 36613 | }) | 33219 | }) |
| 36614 | #endif | 33220 | #endif |
| 36615 | | 33221 | |
| 36616 | #ifdef __LITTLE_ENDIAN__ | 33222 | #ifdef __LITTLE_ENDIAN__ |
| 36617 | #define vst3_f16(__p0, __p1) __extension__ ({ \ | 33223 | #define vst3_f16(__p0, __p1) __extension__ ({ \ |
| 36618 | float16x4x3_t __s1 = __p1; \ | 33224 | float16x4x3_t __s1 = __p1; \ |
| 36619 | __builtin_neon_vst3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 8); \ | 33225 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 8); \ |
| 36620 | }) | 33226 | }) |
| 36621 | #else | 33227 | #else |
| 36622 | #define vst3_f16(__p0, __p1) __extension__ ({ \ | 33228 | #define vst3_f16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36625,14 +33231,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36625,14 +33231,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36625 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 33231 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 36626 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33232 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36627 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 33233 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 36628 | __builtin_neon_vst3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 8); \ | 33234 | __builtin_neon_vst3_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], 8); \ |
| 36629 | }) | 33235 | }) |
| 36630 | #endif | 33236 | #endif |
| 36631 | | 33237 | |
| 36632 | #ifdef __LITTLE_ENDIAN__ | 33238 | #ifdef __LITTLE_ENDIAN__ |
| 36633 | #define vst3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33239 | #define vst3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36634 | float16x8x3_t __s1 = __p1; \ | 33240 | float16x8x3_t __s1 = __p1; \ |
| 36635 | __builtin_neon_vst3q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 40); \ | 33241 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 40); \ |
| 36636 | }) | 33242 | }) |
| 36637 | #else | 33243 | #else |
| 36638 | #define vst3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33244 | #define vst3q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -36641,14 +33247,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36641,14 +33247,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36641 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33247 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36642 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33248 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36643 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33249 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36644 | __builtin_neon_vst3q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 40); \ | 33250 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 40); \ |
| 36645 | }) | 33251 | }) |
| 36646 | #endif | 33252 | #endif |
| 36647 | | 33253 | |
| 36648 | #ifdef __LITTLE_ENDIAN__ | 33254 | #ifdef __LITTLE_ENDIAN__ |
| 36649 | #define vst3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33255 | #define vst3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36650 | float16x4x3_t __s1 = __p1; \ | 33256 | float16x4x3_t __s1 = __p1; \ |
| 36651 | __builtin_neon_vst3_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 8); \ | 33257 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 8); \ |
| 36652 | }) | 33258 | }) |
| 36653 | #else | 33259 | #else |
| 36654 | #define vst3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33260 | #define vst3_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -36657,14 +33263,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36657,14 +33263,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36657 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ | 33263 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 3, 2, 1, 0); \ |
| 36658 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33264 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36659 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 33265 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 36660 | __builtin_neon_vst3_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 8); \ | 33266 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], __p2, 8); \ |
| 36661 | }) | 33267 | }) |
| 36662 | #endif | 33268 | #endif |
| 36663 | | 33269 | |
| 36664 | #ifdef __LITTLE_ENDIAN__ | 33270 | #ifdef __LITTLE_ENDIAN__ |
| 36665 | #define vst4q_f16(__p0, __p1) __extension__ ({ \ | 33271 | #define vst4q_f16(__p0, __p1) __extension__ ({ \ |
| 36666 | float16x8x4_t __s1 = __p1; \ | 33272 | float16x8x4_t __s1 = __p1; \ |
| 36667 | __builtin_neon_vst4q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 40); \ | 33273 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 40); \ |
| 36668 | }) | 33274 | }) |
| 36669 | #else | 33275 | #else |
| 36670 | #define vst4q_f16(__p0, __p1) __extension__ ({ \ | 33276 | #define vst4q_f16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36674,14 +33280,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36674,14 +33280,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36674 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33280 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36675 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33281 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36676 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33282 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36677 | __builtin_neon_vst4q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 40); \ | 33283 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 40); \ |
| 36678 | }) | 33284 | }) |
| 36679 | #endif | 33285 | #endif |
| 36680 | | 33286 | |
| 36681 | #ifdef __LITTLE_ENDIAN__ | 33287 | #ifdef __LITTLE_ENDIAN__ |
| 36682 | #define vst4_f16(__p0, __p1) __extension__ ({ \ | 33288 | #define vst4_f16(__p0, __p1) __extension__ ({ \ |
| 36683 | float16x4x4_t __s1 = __p1; \ | 33289 | float16x4x4_t __s1 = __p1; \ |
| 36684 | __builtin_neon_vst4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 8); \ | 33290 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 8); \ |
| 36685 | }) | 33291 | }) |
| 36686 | #else | 33292 | #else |
| 36687 | #define vst4_f16(__p0, __p1) __extension__ ({ \ | 33293 | #define vst4_f16(__p0, __p1) __extension__ ({ \ |
| ... | @@ -36691,14 +33297,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36691,14 +33297,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36691 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33297 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36692 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 33298 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 36693 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 33299 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 36694 | __builtin_neon_vst4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 8); \ | 33300 | __builtin_neon_vst4_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], 8); \ |
| 36695 | }) | 33301 | }) |
| 36696 | #endif | 33302 | #endif |
| 36697 | | 33303 | |
| 36698 | #ifdef __LITTLE_ENDIAN__ | 33304 | #ifdef __LITTLE_ENDIAN__ |
| 36699 | #define vst4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33305 | #define vst4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36700 | float16x8x4_t __s1 = __p1; \ | 33306 | float16x8x4_t __s1 = __p1; \ |
| 36701 | __builtin_neon_vst4q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 40); \ | 33307 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 40); \ |
| 36702 | }) | 33308 | }) |
| 36703 | #else | 33309 | #else |
| 36704 | #define vst4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33310 | #define vst4q_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -36708,14 +33314,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36708,14 +33314,14 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36708 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33314 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36709 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33315 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36710 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ | 33316 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 36711 | __builtin_neon_vst4q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 40); \ | 33317 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 40); \ |
| 36712 | }) | 33318 | }) |
| 36713 | #endif | 33319 | #endif |
| 36714 | | 33320 | |
| 36715 | #ifdef __LITTLE_ENDIAN__ | 33321 | #ifdef __LITTLE_ENDIAN__ |
| 36716 | #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33322 | #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| 36717 | float16x4x4_t __s1 = __p1; \ | 33323 | float16x4x4_t __s1 = __p1; \ |
| 36718 | __builtin_neon_vst4_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 8); \ | 33324 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 8); \ |
| 36719 | }) | 33325 | }) |
| 36720 | #else | 33326 | #else |
| 36721 | #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ | 33327 | #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -36725,7 +33331,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { | ... | @@ -36725,7 +33331,7 @@ __ai float32x4_t __noswap_vcvt_f32_f16(float16x4_t __p0) { |
| 36725 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ | 33331 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 3, 2, 1, 0); \ |
| 36726 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ | 33332 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 3, 2, 1, 0); \ |
| 36727 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ | 33333 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 3, 2, 1, 0); \ |
| 36728 | __builtin_neon_vst4_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 8); \ | 33334 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__rev1.val[0], (int8x8_t)__rev1.val[1], (int8x8_t)__rev1.val[2], (int8x8_t)__rev1.val[3], __p2, 8); \ |
| 36729 | }) | 33335 | }) |
| 36730 | #endif | 33336 | #endif |
| 36731 | | 33337 | |
| ... | @@ -37058,7 +33664,7 @@ __ai uint8x16_t vaesmcq_u8(uint8x16_t __p0) { | ... | @@ -37058,7 +33664,7 @@ __ai uint8x16_t vaesmcq_u8(uint8x16_t __p0) { |
| 37058 | #ifdef __LITTLE_ENDIAN__ | 33664 | #ifdef __LITTLE_ENDIAN__ |
| 37059 | __ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 33665 | __ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 37060 | uint32x4_t __ret; | 33666 | uint32x4_t __ret; |
| 37061 | __ret = (uint32x4_t) __builtin_neon_vsha1cq_u32((int8x16_t)__p0, __p1, (int8x16_t)__p2); | 33667 | __ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__p0, __p1, __p2); |
| 37062 | return __ret; | 33668 | return __ret; |
| 37063 | } | 33669 | } |
| 37064 | #else | 33670 | #else |
| ... | @@ -37066,30 +33672,21 @@ __ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | ... | @@ -37066,30 +33672,21 @@ __ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 37066 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 33672 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 37067 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 33673 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 37068 | uint32x4_t __ret; | 33674 | uint32x4_t __ret; |
| 37069 | __ret = (uint32x4_t) __builtin_neon_vsha1cq_u32((int8x16_t)__rev0, __p1, (int8x16_t)__rev2); | 33675 | __ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__rev0, __p1, __rev2); |
| 37070 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 33676 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 37071 | return __ret; | 33677 | return __ret; |
| 37072 | } | 33678 | } |
| 37073 | #endif | 33679 | #endif |
| 37074 | | 33680 | |
| 37075 | #ifdef __LITTLE_ENDIAN__ | | |
| 37076 | __ai uint32_t vsha1h_u32(uint32_t __p0) { | | |
| 37077 | uint32_t __ret; | | |
| 37078 | __ret = (uint32_t) __builtin_neon_vsha1h_u32(__p0); | | |
| 37079 | return __ret; | | |
| 37080 | } | | |
| 37081 | #else | | |
| 37082 | __ai uint32_t vsha1h_u32(uint32_t __p0) { | 33681 | __ai uint32_t vsha1h_u32(uint32_t __p0) { |
| 37083 | uint32_t __ret; | 33682 | uint32_t __ret; |
| 37084 | __ret = (uint32_t) __builtin_neon_vsha1h_u32(__p0); | 33683 | __ret = (uint32_t) __builtin_neon_vsha1h_u32(__p0); |
| 37085 | return __ret; | 33684 | return __ret; |
| 37086 | } | 33685 | } |
| 37087 | #endif | | |
| 37088 | | | |
| 37089 | #ifdef __LITTLE_ENDIAN__ | 33686 | #ifdef __LITTLE_ENDIAN__ |
| 37090 | __ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 33687 | __ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 37091 | uint32x4_t __ret; | 33688 | uint32x4_t __ret; |
| 37092 | __ret = (uint32x4_t) __builtin_neon_vsha1mq_u32((int8x16_t)__p0, __p1, (int8x16_t)__p2); | 33689 | __ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__p0, __p1, __p2); |
| 37093 | return __ret; | 33690 | return __ret; |
| 37094 | } | 33691 | } |
| 37095 | #else | 33692 | #else |
| ... | @@ -37097,7 +33694,7 @@ __ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | ... | @@ -37097,7 +33694,7 @@ __ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 37097 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 33694 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 37098 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 33695 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 37099 | uint32x4_t __ret; | 33696 | uint32x4_t __ret; |
| 37100 | __ret = (uint32x4_t) __builtin_neon_vsha1mq_u32((int8x16_t)__rev0, __p1, (int8x16_t)__rev2); | 33697 | __ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__rev0, __p1, __rev2); |
| 37101 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 33698 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 37102 | return __ret; | 33699 | return __ret; |
| 37103 | } | 33700 | } |
| ... | @@ -37106,7 +33703,7 @@ __ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | ... | @@ -37106,7 +33703,7 @@ __ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 37106 | #ifdef __LITTLE_ENDIAN__ | 33703 | #ifdef __LITTLE_ENDIAN__ |
| 37107 | __ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | 33704 | __ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 37108 | uint32x4_t __ret; | 33705 | uint32x4_t __ret; |
| 37109 | __ret = (uint32x4_t) __builtin_neon_vsha1pq_u32((int8x16_t)__p0, __p1, (int8x16_t)__p2); | 33706 | __ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__p0, __p1, __p2); |
| 37110 | return __ret; | 33707 | return __ret; |
| 37111 | } | 33708 | } |
| 37112 | #else | 33709 | #else |
| ... | @@ -37114,7 +33711,7 @@ __ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { | ... | @@ -37114,7 +33711,7 @@ __ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) { |
| 37114 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 33711 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 37115 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); | 33712 | uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 37116 | uint32x4_t __ret; | 33713 | uint32x4_t __ret; |
| 37117 | __ret = (uint32x4_t) __builtin_neon_vsha1pq_u32((int8x16_t)__rev0, __p1, (int8x16_t)__rev2); | 33714 | __ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__rev0, __p1, __rev2); |
| 37118 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); | 33715 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 37119 | return __ret; | 33716 | return __ret; |
| 37120 | } | 33717 | } |
| ... | @@ -37388,20 +33985,11 @@ __ai float32x2_t vrndn_f32(float32x2_t __p0) { | ... | @@ -37388,20 +33985,11 @@ __ai float32x2_t vrndn_f32(float32x2_t __p0) { |
| 37388 | } | 33985 | } |
| 37389 | #endif | 33986 | #endif |
| 37390 | | 33987 | |
| 37391 | #ifdef __LITTLE_ENDIAN__ | | |
| 37392 | __ai float32_t vrndns_f32(float32_t __p0) { | | |
| 37393 | float32_t __ret; | | |
| 37394 | __ret = (float32_t) __builtin_neon_vrndns_f32(__p0); | | |
| 37395 | return __ret; | | |
| 37396 | } | | |
| 37397 | #else | | |
| 37398 | __ai float32_t vrndns_f32(float32_t __p0) { | 33988 | __ai float32_t vrndns_f32(float32_t __p0) { |
| 37399 | float32_t __ret; | 33989 | float32_t __ret; |
| 37400 | __ret = (float32_t) __builtin_neon_vrndns_f32(__p0); | 33990 | __ret = (float32_t) __builtin_neon_vrndns_f32(__p0); |
| 37401 | return __ret; | 33991 | return __ret; |
| 37402 | } | 33992 | } |
| 37403 | #endif | | |
| 37404 | | | |
| 37405 | #ifdef __LITTLE_ENDIAN__ | 33993 | #ifdef __LITTLE_ENDIAN__ |
| 37406 | __ai float32x4_t vrndpq_f32(float32x4_t __p0) { | 33994 | __ai float32x4_t vrndpq_f32(float32x4_t __p0) { |
| 37407 | float32x4_t __ret; | 33995 | float32x4_t __ret; |
| ... | @@ -37818,20 +34406,11 @@ __ai int64x2_t vcvtaq_s64_f64(float64x2_t __p0) { | ... | @@ -37818,20 +34406,11 @@ __ai int64x2_t vcvtaq_s64_f64(float64x2_t __p0) { |
| 37818 | } | 34406 | } |
| 37819 | #endif | 34407 | #endif |
| 37820 | | 34408 | |
| 37821 | #ifdef __LITTLE_ENDIAN__ | | |
| 37822 | __ai int64x1_t vcvta_s64_f64(float64x1_t __p0) { | | |
| 37823 | int64x1_t __ret; | | |
| 37824 | __ret = (int64x1_t) __builtin_neon_vcvta_s64_v((int8x8_t)__p0, 3); | | |
| 37825 | return __ret; | | |
| 37826 | } | | |
| 37827 | #else | | |
| 37828 | __ai int64x1_t vcvta_s64_f64(float64x1_t __p0) { | 34409 | __ai int64x1_t vcvta_s64_f64(float64x1_t __p0) { |
| 37829 | int64x1_t __ret; | 34410 | int64x1_t __ret; |
| 37830 | __ret = (int64x1_t) __builtin_neon_vcvta_s64_v((int8x8_t)__p0, 3); | 34411 | __ret = (int64x1_t) __builtin_neon_vcvta_s64_v((int8x8_t)__p0, 3); |
| 37831 | return __ret; | 34412 | return __ret; |
| 37832 | } | 34413 | } |
| 37833 | #endif | | |
| 37834 | | | |
| 37835 | #ifdef __LITTLE_ENDIAN__ | 34414 | #ifdef __LITTLE_ENDIAN__ |
| 37836 | __ai uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { | 34415 | __ai uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { |
| 37837 | uint64x2_t __ret; | 34416 | uint64x2_t __ret; |
| ... | @@ -37848,20 +34427,11 @@ __ai uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { | ... | @@ -37848,20 +34427,11 @@ __ai uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { |
| 37848 | } | 34427 | } |
| 37849 | #endif | 34428 | #endif |
| 37850 | | 34429 | |
| 37851 | #ifdef __LITTLE_ENDIAN__ | | |
| 37852 | __ai uint64x1_t vcvta_u64_f64(float64x1_t __p0) { | | |
| 37853 | uint64x1_t __ret; | | |
| 37854 | __ret = (uint64x1_t) __builtin_neon_vcvta_u64_v((int8x8_t)__p0, 19); | | |
| 37855 | return __ret; | | |
| 37856 | } | | |
| 37857 | #else | | |
| 37858 | __ai uint64x1_t vcvta_u64_f64(float64x1_t __p0) { | 34430 | __ai uint64x1_t vcvta_u64_f64(float64x1_t __p0) { |
| 37859 | uint64x1_t __ret; | 34431 | uint64x1_t __ret; |
| 37860 | __ret = (uint64x1_t) __builtin_neon_vcvta_u64_v((int8x8_t)__p0, 19); | 34432 | __ret = (uint64x1_t) __builtin_neon_vcvta_u64_v((int8x8_t)__p0, 19); |
| 37861 | return __ret; | 34433 | return __ret; |
| 37862 | } | 34434 | } |
| 37863 | #endif | | |
| 37864 | | | |
| 37865 | #ifdef __LITTLE_ENDIAN__ | 34435 | #ifdef __LITTLE_ENDIAN__ |
| 37866 | __ai int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { | 34436 | __ai int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { |
| 37867 | int64x2_t __ret; | 34437 | int64x2_t __ret; |
| ... | @@ -37878,20 +34448,11 @@ __ai int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { | ... | @@ -37878,20 +34448,11 @@ __ai int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { |
| 37878 | } | 34448 | } |
| 37879 | #endif | 34449 | #endif |
| 37880 | | 34450 | |
| 37881 | #ifdef __LITTLE_ENDIAN__ | | |
| 37882 | __ai int64x1_t vcvtm_s64_f64(float64x1_t __p0) { | | |
| 37883 | int64x1_t __ret; | | |
| 37884 | __ret = (int64x1_t) __builtin_neon_vcvtm_s64_v((int8x8_t)__p0, 3); | | |
| 37885 | return __ret; | | |
| 37886 | } | | |
| 37887 | #else | | |
| 37888 | __ai int64x1_t vcvtm_s64_f64(float64x1_t __p0) { | 34451 | __ai int64x1_t vcvtm_s64_f64(float64x1_t __p0) { |
| 37889 | int64x1_t __ret; | 34452 | int64x1_t __ret; |
| 37890 | __ret = (int64x1_t) __builtin_neon_vcvtm_s64_v((int8x8_t)__p0, 3); | 34453 | __ret = (int64x1_t) __builtin_neon_vcvtm_s64_v((int8x8_t)__p0, 3); |
| 37891 | return __ret; | 34454 | return __ret; |
| 37892 | } | 34455 | } |
| 37893 | #endif | | |
| 37894 | | | |
| 37895 | #ifdef __LITTLE_ENDIAN__ | 34456 | #ifdef __LITTLE_ENDIAN__ |
| 37896 | __ai uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { | 34457 | __ai uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { |
| 37897 | uint64x2_t __ret; | 34458 | uint64x2_t __ret; |
| ... | @@ -37908,20 +34469,11 @@ __ai uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { | ... | @@ -37908,20 +34469,11 @@ __ai uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { |
| 37908 | } | 34469 | } |
| 37909 | #endif | 34470 | #endif |
| 37910 | | 34471 | |
| 37911 | #ifdef __LITTLE_ENDIAN__ | | |
| 37912 | __ai uint64x1_t vcvtm_u64_f64(float64x1_t __p0) { | | |
| 37913 | uint64x1_t __ret; | | |
| 37914 | __ret = (uint64x1_t) __builtin_neon_vcvtm_u64_v((int8x8_t)__p0, 19); | | |
| 37915 | return __ret; | | |
| 37916 | } | | |
| 37917 | #else | | |
| 37918 | __ai uint64x1_t vcvtm_u64_f64(float64x1_t __p0) { | 34472 | __ai uint64x1_t vcvtm_u64_f64(float64x1_t __p0) { |
| 37919 | uint64x1_t __ret; | 34473 | uint64x1_t __ret; |
| 37920 | __ret = (uint64x1_t) __builtin_neon_vcvtm_u64_v((int8x8_t)__p0, 19); | 34474 | __ret = (uint64x1_t) __builtin_neon_vcvtm_u64_v((int8x8_t)__p0, 19); |
| 37921 | return __ret; | 34475 | return __ret; |
| 37922 | } | 34476 | } |
| 37923 | #endif | | |
| 37924 | | | |
| 37925 | #ifdef __LITTLE_ENDIAN__ | 34477 | #ifdef __LITTLE_ENDIAN__ |
| 37926 | __ai int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { | 34478 | __ai int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { |
| 37927 | int64x2_t __ret; | 34479 | int64x2_t __ret; |
| ... | @@ -37938,20 +34490,11 @@ __ai int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { | ... | @@ -37938,20 +34490,11 @@ __ai int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { |
| 37938 | } | 34490 | } |
| 37939 | #endif | 34491 | #endif |
| 37940 | | 34492 | |
| 37941 | #ifdef __LITTLE_ENDIAN__ | | |
| 37942 | __ai int64x1_t vcvtn_s64_f64(float64x1_t __p0) { | | |
| 37943 | int64x1_t __ret; | | |
| 37944 | __ret = (int64x1_t) __builtin_neon_vcvtn_s64_v((int8x8_t)__p0, 3); | | |
| 37945 | return __ret; | | |
| 37946 | } | | |
| 37947 | #else | | |
| 37948 | __ai int64x1_t vcvtn_s64_f64(float64x1_t __p0) { | 34493 | __ai int64x1_t vcvtn_s64_f64(float64x1_t __p0) { |
| 37949 | int64x1_t __ret; | 34494 | int64x1_t __ret; |
| 37950 | __ret = (int64x1_t) __builtin_neon_vcvtn_s64_v((int8x8_t)__p0, 3); | 34495 | __ret = (int64x1_t) __builtin_neon_vcvtn_s64_v((int8x8_t)__p0, 3); |
| 37951 | return __ret; | 34496 | return __ret; |
| 37952 | } | 34497 | } |
| 37953 | #endif | | |
| 37954 | | | |
| 37955 | #ifdef __LITTLE_ENDIAN__ | 34498 | #ifdef __LITTLE_ENDIAN__ |
| 37956 | __ai uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { | 34499 | __ai uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { |
| 37957 | uint64x2_t __ret; | 34500 | uint64x2_t __ret; |
| ... | @@ -37968,20 +34511,11 @@ __ai uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { | ... | @@ -37968,20 +34511,11 @@ __ai uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { |
| 37968 | } | 34511 | } |
| 37969 | #endif | 34512 | #endif |
| 37970 | | 34513 | |
| 37971 | #ifdef __LITTLE_ENDIAN__ | | |
| 37972 | __ai uint64x1_t vcvtn_u64_f64(float64x1_t __p0) { | 34514 | __ai uint64x1_t vcvtn_u64_f64(float64x1_t __p0) { |
| 37973 | uint64x1_t __ret; | 34515 | uint64x1_t __ret; |
| 37974 | __ret = (uint64x1_t) __builtin_neon_vcvtn_u64_v((int8x8_t)__p0, 19); | 34516 | __ret = (uint64x1_t) __builtin_neon_vcvtn_u64_v((int8x8_t)__p0, 19); |
| 37975 | return __ret; | 34517 | return __ret; |
| 37976 | } | 34518 | } |
| 37977 | #else | | |
| 37978 | __ai uint64x1_t vcvtn_u64_f64(float64x1_t __p0) { | | |
| 37979 | uint64x1_t __ret; | | |
| 37980 | __ret = (uint64x1_t) __builtin_neon_vcvtn_u64_v((int8x8_t)__p0, 19); | | |
| 37981 | return __ret; | | |
| 37982 | } | | |
| 37983 | #endif | | |
| 37984 | | | |
| 37985 | #ifdef __LITTLE_ENDIAN__ | 34519 | #ifdef __LITTLE_ENDIAN__ |
| 37986 | __ai int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { | 34520 | __ai int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { |
| 37987 | int64x2_t __ret; | 34521 | int64x2_t __ret; |
| ... | @@ -37998,20 +34532,11 @@ __ai int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { | ... | @@ -37998,20 +34532,11 @@ __ai int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { |
| 37998 | } | 34532 | } |
| 37999 | #endif | 34533 | #endif |
| 38000 | | 34534 | |
| 38001 | #ifdef __LITTLE_ENDIAN__ | | |
| 38002 | __ai int64x1_t vcvtp_s64_f64(float64x1_t __p0) { | | |
| 38003 | int64x1_t __ret; | | |
| 38004 | __ret = (int64x1_t) __builtin_neon_vcvtp_s64_v((int8x8_t)__p0, 3); | | |
| 38005 | return __ret; | | |
| 38006 | } | | |
| 38007 | #else | | |
| 38008 | __ai int64x1_t vcvtp_s64_f64(float64x1_t __p0) { | 34535 | __ai int64x1_t vcvtp_s64_f64(float64x1_t __p0) { |
| 38009 | int64x1_t __ret; | 34536 | int64x1_t __ret; |
| 38010 | __ret = (int64x1_t) __builtin_neon_vcvtp_s64_v((int8x8_t)__p0, 3); | 34537 | __ret = (int64x1_t) __builtin_neon_vcvtp_s64_v((int8x8_t)__p0, 3); |
| 38011 | return __ret; | 34538 | return __ret; |
| 38012 | } | 34539 | } |
| 38013 | #endif | | |
| 38014 | | | |
| 38015 | #ifdef __LITTLE_ENDIAN__ | 34540 | #ifdef __LITTLE_ENDIAN__ |
| 38016 | __ai uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { | 34541 | __ai uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { |
| 38017 | uint64x2_t __ret; | 34542 | uint64x2_t __ret; |
| ... | @@ -38028,5508 +34553,1971 @@ __ai uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { | ... | @@ -38028,5508 +34553,1971 @@ __ai uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { |
| 38028 | } | 34553 | } |
| 38029 | #endif | 34554 | #endif |
| 38030 | | 34555 | |
| 38031 | #ifdef __LITTLE_ENDIAN__ | | |
| 38032 | __ai uint64x1_t vcvtp_u64_f64(float64x1_t __p0) { | | |
| 38033 | uint64x1_t __ret; | | |
| 38034 | __ret = (uint64x1_t) __builtin_neon_vcvtp_u64_v((int8x8_t)__p0, 19); | | |
| 38035 | return __ret; | | |
| 38036 | } | | |
| 38037 | #else | | |
| 38038 | __ai uint64x1_t vcvtp_u64_f64(float64x1_t __p0) { | 34556 | __ai uint64x1_t vcvtp_u64_f64(float64x1_t __p0) { |
| 38039 | uint64x1_t __ret; | 34557 | uint64x1_t __ret; |
| 38040 | __ret = (uint64x1_t) __builtin_neon_vcvtp_u64_v((int8x8_t)__p0, 19); | 34558 | __ret = (uint64x1_t) __builtin_neon_vcvtp_u64_v((int8x8_t)__p0, 19); |
| 38041 | return __ret; | 34559 | return __ret; |
| 38042 | } | 34560 | } |
| 38043 | #endif | | |
| 38044 | | | |
| 38045 | #ifdef __LITTLE_ENDIAN__ | | |
| 38046 | __ai poly8x8_t vreinterpret_p8_p64(poly64x1_t __p0) { | | |
| 38047 | poly8x8_t __ret; | | |
| 38048 | __ret = (poly8x8_t)(__p0); | | |
| 38049 | return __ret; | | |
| 38050 | } | | |
| 38051 | #else | | |
| 38052 | __ai poly8x8_t vreinterpret_p8_p64(poly64x1_t __p0) { | 34561 | __ai poly8x8_t vreinterpret_p8_p64(poly64x1_t __p0) { |
| 38053 | poly8x8_t __ret; | 34562 | poly8x8_t __ret; |
| 38054 | __ret = (poly8x8_t)(__p0); | 34563 | __ret = (poly8x8_t)(__p0); |
| 38055 | return __ret; | 34564 | return __ret; |
| 38056 | } | 34565 | } |
| 38057 | #endif | | |
| 38058 | | | |
| 38059 | #ifdef __LITTLE_ENDIAN__ | | |
| 38060 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { | | |
| 38061 | poly8x8_t __ret; | | |
| 38062 | __ret = (poly8x8_t)(__p0); | | |
| 38063 | return __ret; | | |
| 38064 | } | | |
| 38065 | #else | | |
| 38066 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { | 34566 | __ai poly8x8_t vreinterpret_p8_p16(poly16x4_t __p0) { |
| 38067 | poly8x8_t __ret; | 34567 | poly8x8_t __ret; |
| 38068 | __ret = (poly8x8_t)(__p0); | 34568 | __ret = (poly8x8_t)(__p0); |
| 38069 | return __ret; | 34569 | return __ret; |
| 38070 | } | 34570 | } |
| 38071 | #endif | | |
| 38072 | | | |
| 38073 | #ifdef __LITTLE_ENDIAN__ | | |
| 38074 | __ai poly8x8_t vreinterpret_p8_u8(uint8x8_t __p0) { | | |
| 38075 | poly8x8_t __ret; | | |
| 38076 | __ret = (poly8x8_t)(__p0); | | |
| 38077 | return __ret; | | |
| 38078 | } | | |
| 38079 | #else | | |
| 38080 | __ai poly8x8_t vreinterpret_p8_u8(uint8x8_t __p0) { | 34571 | __ai poly8x8_t vreinterpret_p8_u8(uint8x8_t __p0) { |
| 38081 | poly8x8_t __ret; | 34572 | poly8x8_t __ret; |
| 38082 | __ret = (poly8x8_t)(__p0); | 34573 | __ret = (poly8x8_t)(__p0); |
| 38083 | return __ret; | 34574 | return __ret; |
| 38084 | } | 34575 | } |
| 38085 | #endif | | |
| 38086 | | | |
| 38087 | #ifdef __LITTLE_ENDIAN__ | | |
| 38088 | __ai poly8x8_t vreinterpret_p8_u32(uint32x2_t __p0) { | | |
| 38089 | poly8x8_t __ret; | | |
| 38090 | __ret = (poly8x8_t)(__p0); | | |
| 38091 | return __ret; | | |
| 38092 | } | | |
| 38093 | #else | | |
| 38094 | __ai poly8x8_t vreinterpret_p8_u32(uint32x2_t __p0) { | 34576 | __ai poly8x8_t vreinterpret_p8_u32(uint32x2_t __p0) { |
| 38095 | poly8x8_t __ret; | 34577 | poly8x8_t __ret; |
| 38096 | __ret = (poly8x8_t)(__p0); | 34578 | __ret = (poly8x8_t)(__p0); |
| 38097 | return __ret; | 34579 | return __ret; |
| 38098 | } | 34580 | } |
| 38099 | #endif | | |
| 38100 | | | |
| 38101 | #ifdef __LITTLE_ENDIAN__ | | |
| 38102 | __ai poly8x8_t vreinterpret_p8_u64(uint64x1_t __p0) { | | |
| 38103 | poly8x8_t __ret; | | |
| 38104 | __ret = (poly8x8_t)(__p0); | | |
| 38105 | return __ret; | | |
| 38106 | } | | |
| 38107 | #else | | |
| 38108 | __ai poly8x8_t vreinterpret_p8_u64(uint64x1_t __p0) { | 34581 | __ai poly8x8_t vreinterpret_p8_u64(uint64x1_t __p0) { |
| 38109 | poly8x8_t __ret; | 34582 | poly8x8_t __ret; |
| 38110 | __ret = (poly8x8_t)(__p0); | 34583 | __ret = (poly8x8_t)(__p0); |
| 38111 | return __ret; | 34584 | return __ret; |
| 38112 | } | 34585 | } |
| 38113 | #endif | | |
| 38114 | | | |
| 38115 | #ifdef __LITTLE_ENDIAN__ | | |
| 38116 | __ai poly8x8_t vreinterpret_p8_u16(uint16x4_t __p0) { | | |
| 38117 | poly8x8_t __ret; | | |
| 38118 | __ret = (poly8x8_t)(__p0); | | |
| 38119 | return __ret; | | |
| 38120 | } | | |
| 38121 | #else | | |
| 38122 | __ai poly8x8_t vreinterpret_p8_u16(uint16x4_t __p0) { | 34586 | __ai poly8x8_t vreinterpret_p8_u16(uint16x4_t __p0) { |
| 38123 | poly8x8_t __ret; | 34587 | poly8x8_t __ret; |
| 38124 | __ret = (poly8x8_t)(__p0); | 34588 | __ret = (poly8x8_t)(__p0); |
| 38125 | return __ret; | 34589 | return __ret; |
| 38126 | } | 34590 | } |
| 38127 | #endif | | |
| 38128 | | | |
| 38129 | #ifdef __LITTLE_ENDIAN__ | | |
| 38130 | __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { | | |
| 38131 | poly8x8_t __ret; | | |
| 38132 | __ret = (poly8x8_t)(__p0); | | |
| 38133 | return __ret; | | |
| 38134 | } | | |
| 38135 | #else | | |
| 38136 | __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { | 34591 | __ai poly8x8_t vreinterpret_p8_s8(int8x8_t __p0) { |
| 38137 | poly8x8_t __ret; | 34592 | poly8x8_t __ret; |
| 38138 | __ret = (poly8x8_t)(__p0); | 34593 | __ret = (poly8x8_t)(__p0); |
| 38139 | return __ret; | 34594 | return __ret; |
| 38140 | } | 34595 | } |
| 38141 | #endif | | |
| 38142 | | | |
| 38143 | #ifdef __LITTLE_ENDIAN__ | | |
| 38144 | __ai poly8x8_t vreinterpret_p8_f64(float64x1_t __p0) { | | |
| 38145 | poly8x8_t __ret; | | |
| 38146 | __ret = (poly8x8_t)(__p0); | | |
| 38147 | return __ret; | | |
| 38148 | } | | |
| 38149 | #else | | |
| 38150 | __ai poly8x8_t vreinterpret_p8_f64(float64x1_t __p0) { | 34596 | __ai poly8x8_t vreinterpret_p8_f64(float64x1_t __p0) { |
| 38151 | poly8x8_t __ret; | 34597 | poly8x8_t __ret; |
| 38152 | __ret = (poly8x8_t)(__p0); | 34598 | __ret = (poly8x8_t)(__p0); |
| 38153 | return __ret; | 34599 | return __ret; |
| 38154 | } | 34600 | } |
| 38155 | #endif | | |
| 38156 | | | |
| 38157 | #ifdef __LITTLE_ENDIAN__ | | |
| 38158 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { | | |
| 38159 | poly8x8_t __ret; | | |
| 38160 | __ret = (poly8x8_t)(__p0); | | |
| 38161 | return __ret; | | |
| 38162 | } | | |
| 38163 | #else | | |
| 38164 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { | 34601 | __ai poly8x8_t vreinterpret_p8_f32(float32x2_t __p0) { |
| 38165 | poly8x8_t __ret; | 34602 | poly8x8_t __ret; |
| 38166 | __ret = (poly8x8_t)(__p0); | 34603 | __ret = (poly8x8_t)(__p0); |
| 38167 | return __ret; | 34604 | return __ret; |
| 38168 | } | 34605 | } |
| 38169 | #endif | | |
| 38170 | | | |
| 38171 | #ifdef __LITTLE_ENDIAN__ | | |
| 38172 | __ai poly8x8_t vreinterpret_p8_f16(float16x4_t __p0) { | | |
| 38173 | poly8x8_t __ret; | | |
| 38174 | __ret = (poly8x8_t)(__p0); | | |
| 38175 | return __ret; | | |
| 38176 | } | | |
| 38177 | #else | | |
| 38178 | __ai poly8x8_t vreinterpret_p8_f16(float16x4_t __p0) { | 34606 | __ai poly8x8_t vreinterpret_p8_f16(float16x4_t __p0) { |
| 38179 | poly8x8_t __ret; | 34607 | poly8x8_t __ret; |
| 38180 | __ret = (poly8x8_t)(__p0); | 34608 | __ret = (poly8x8_t)(__p0); |
| 38181 | return __ret; | 34609 | return __ret; |
| 38182 | } | 34610 | } |
| 38183 | #endif | | |
| 38184 | | | |
| 38185 | #ifdef __LITTLE_ENDIAN__ | | |
| 38186 | __ai poly8x8_t vreinterpret_p8_s32(int32x2_t __p0) { | | |
| 38187 | poly8x8_t __ret; | | |
| 38188 | __ret = (poly8x8_t)(__p0); | | |
| 38189 | return __ret; | | |
| 38190 | } | | |
| 38191 | #else | | |
| 38192 | __ai poly8x8_t vreinterpret_p8_s32(int32x2_t __p0) { | 34611 | __ai poly8x8_t vreinterpret_p8_s32(int32x2_t __p0) { |
| 38193 | poly8x8_t __ret; | 34612 | poly8x8_t __ret; |
| 38194 | __ret = (poly8x8_t)(__p0); | 34613 | __ret = (poly8x8_t)(__p0); |
| 38195 | return __ret; | 34614 | return __ret; |
| 38196 | } | 34615 | } |
| 38197 | #endif | | |
| 38198 | | | |
| 38199 | #ifdef __LITTLE_ENDIAN__ | | |
| 38200 | __ai poly8x8_t vreinterpret_p8_s64(int64x1_t __p0) { | | |
| 38201 | poly8x8_t __ret; | | |
| 38202 | __ret = (poly8x8_t)(__p0); | | |
| 38203 | return __ret; | | |
| 38204 | } | | |
| 38205 | #else | | |
| 38206 | __ai poly8x8_t vreinterpret_p8_s64(int64x1_t __p0) { | 34616 | __ai poly8x8_t vreinterpret_p8_s64(int64x1_t __p0) { |
| 38207 | poly8x8_t __ret; | 34617 | poly8x8_t __ret; |
| 38208 | __ret = (poly8x8_t)(__p0); | 34618 | __ret = (poly8x8_t)(__p0); |
| 38209 | return __ret; | 34619 | return __ret; |
| 38210 | } | 34620 | } |
| 38211 | #endif | | |
| 38212 | | | |
| 38213 | #ifdef __LITTLE_ENDIAN__ | | |
| 38214 | __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { | | |
| 38215 | poly8x8_t __ret; | | |
| 38216 | __ret = (poly8x8_t)(__p0); | | |
| 38217 | return __ret; | | |
| 38218 | } | | |
| 38219 | #else | | |
| 38220 | __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { | 34621 | __ai poly8x8_t vreinterpret_p8_s16(int16x4_t __p0) { |
| 38221 | poly8x8_t __ret; | 34622 | poly8x8_t __ret; |
| 38222 | __ret = (poly8x8_t)(__p0); | 34623 | __ret = (poly8x8_t)(__p0); |
| 38223 | return __ret; | 34624 | return __ret; |
| 38224 | } | 34625 | } |
| 38225 | #endif | | |
| 38226 | | | |
| 38227 | #ifdef __LITTLE_ENDIAN__ | | |
| 38228 | __ai poly64x1_t vreinterpret_p64_p8(poly8x8_t __p0) { | | |
| 38229 | poly64x1_t __ret; | | |
| 38230 | __ret = (poly64x1_t)(__p0); | | |
| 38231 | return __ret; | | |
| 38232 | } | | |
| 38233 | #else | | |
| 38234 | __ai poly64x1_t vreinterpret_p64_p8(poly8x8_t __p0) { | 34626 | __ai poly64x1_t vreinterpret_p64_p8(poly8x8_t __p0) { |
| 38235 | poly64x1_t __ret; | 34627 | poly64x1_t __ret; |
| 38236 | __ret = (poly64x1_t)(__p0); | 34628 | __ret = (poly64x1_t)(__p0); |
| 38237 | return __ret; | 34629 | return __ret; |
| 38238 | } | 34630 | } |
| 38239 | #endif | | |
| 38240 | | | |
| 38241 | #ifdef __LITTLE_ENDIAN__ | | |
| 38242 | __ai poly64x1_t vreinterpret_p64_p16(poly16x4_t __p0) { | | |
| 38243 | poly64x1_t __ret; | | |
| 38244 | __ret = (poly64x1_t)(__p0); | | |
| 38245 | return __ret; | | |
| 38246 | } | | |
| 38247 | #else | | |
| 38248 | __ai poly64x1_t vreinterpret_p64_p16(poly16x4_t __p0) { | 34631 | __ai poly64x1_t vreinterpret_p64_p16(poly16x4_t __p0) { |
| 38249 | poly64x1_t __ret; | 34632 | poly64x1_t __ret; |
| 38250 | __ret = (poly64x1_t)(__p0); | 34633 | __ret = (poly64x1_t)(__p0); |
| 38251 | return __ret; | 34634 | return __ret; |
| 38252 | } | 34635 | } |
| 38253 | #endif | | |
| 38254 | | | |
| 38255 | #ifdef __LITTLE_ENDIAN__ | | |
| 38256 | __ai poly64x1_t vreinterpret_p64_u8(uint8x8_t __p0) { | | |
| 38257 | poly64x1_t __ret; | | |
| 38258 | __ret = (poly64x1_t)(__p0); | | |
| 38259 | return __ret; | | |
| 38260 | } | | |
| 38261 | #else | | |
| 38262 | __ai poly64x1_t vreinterpret_p64_u8(uint8x8_t __p0) { | 34636 | __ai poly64x1_t vreinterpret_p64_u8(uint8x8_t __p0) { |
| 38263 | poly64x1_t __ret; | 34637 | poly64x1_t __ret; |
| 38264 | __ret = (poly64x1_t)(__p0); | 34638 | __ret = (poly64x1_t)(__p0); |
| 38265 | return __ret; | 34639 | return __ret; |
| 38266 | } | 34640 | } |
| 38267 | #endif | | |
| 38268 | | | |
| 38269 | #ifdef __LITTLE_ENDIAN__ | | |
| 38270 | __ai poly64x1_t vreinterpret_p64_u32(uint32x2_t __p0) { | | |
| 38271 | poly64x1_t __ret; | | |
| 38272 | __ret = (poly64x1_t)(__p0); | | |
| 38273 | return __ret; | | |
| 38274 | } | | |
| 38275 | #else | | |
| 38276 | __ai poly64x1_t vreinterpret_p64_u32(uint32x2_t __p0) { | 34641 | __ai poly64x1_t vreinterpret_p64_u32(uint32x2_t __p0) { |
| 38277 | poly64x1_t __ret; | 34642 | poly64x1_t __ret; |
| 38278 | __ret = (poly64x1_t)(__p0); | 34643 | __ret = (poly64x1_t)(__p0); |
| 38279 | return __ret; | 34644 | return __ret; |
| 38280 | } | 34645 | } |
| 38281 | #endif | | |
| 38282 | | | |
| 38283 | #ifdef __LITTLE_ENDIAN__ | | |
| 38284 | __ai poly64x1_t vreinterpret_p64_u64(uint64x1_t __p0) { | | |
| 38285 | poly64x1_t __ret; | | |
| 38286 | __ret = (poly64x1_t)(__p0); | | |
| 38287 | return __ret; | | |
| 38288 | } | | |
| 38289 | #else | | |
| 38290 | __ai poly64x1_t vreinterpret_p64_u64(uint64x1_t __p0) { | 34646 | __ai poly64x1_t vreinterpret_p64_u64(uint64x1_t __p0) { |
| 38291 | poly64x1_t __ret; | 34647 | poly64x1_t __ret; |
| 38292 | __ret = (poly64x1_t)(__p0); | 34648 | __ret = (poly64x1_t)(__p0); |
| 38293 | return __ret; | 34649 | return __ret; |
| 38294 | } | 34650 | } |
| 38295 | #endif | | |
| 38296 | | | |
| 38297 | #ifdef __LITTLE_ENDIAN__ | | |
| 38298 | __ai poly64x1_t vreinterpret_p64_u16(uint16x4_t __p0) { | | |
| 38299 | poly64x1_t __ret; | | |
| 38300 | __ret = (poly64x1_t)(__p0); | | |
| 38301 | return __ret; | | |
| 38302 | } | | |
| 38303 | #else | | |
| 38304 | __ai poly64x1_t vreinterpret_p64_u16(uint16x4_t __p0) { | 34651 | __ai poly64x1_t vreinterpret_p64_u16(uint16x4_t __p0) { |
| 38305 | poly64x1_t __ret; | 34652 | poly64x1_t __ret; |
| 38306 | __ret = (poly64x1_t)(__p0); | 34653 | __ret = (poly64x1_t)(__p0); |
| 38307 | return __ret; | 34654 | return __ret; |
| 38308 | } | 34655 | } |
| 38309 | #endif | | |
| 38310 | | | |
| 38311 | #ifdef __LITTLE_ENDIAN__ | | |
| 38312 | __ai poly64x1_t vreinterpret_p64_s8(int8x8_t __p0) { | | |
| 38313 | poly64x1_t __ret; | | |
| 38314 | __ret = (poly64x1_t)(__p0); | | |
| 38315 | return __ret; | | |
| 38316 | } | | |
| 38317 | #else | | |
| 38318 | __ai poly64x1_t vreinterpret_p64_s8(int8x8_t __p0) { | 34656 | __ai poly64x1_t vreinterpret_p64_s8(int8x8_t __p0) { |
| 38319 | poly64x1_t __ret; | 34657 | poly64x1_t __ret; |
| 38320 | __ret = (poly64x1_t)(__p0); | 34658 | __ret = (poly64x1_t)(__p0); |
| 38321 | return __ret; | 34659 | return __ret; |
| 38322 | } | 34660 | } |
| 38323 | #endif | | |
| 38324 | | | |
| 38325 | #ifdef __LITTLE_ENDIAN__ | | |
| 38326 | __ai poly64x1_t vreinterpret_p64_f64(float64x1_t __p0) { | | |
| 38327 | poly64x1_t __ret; | | |
| 38328 | __ret = (poly64x1_t)(__p0); | | |
| 38329 | return __ret; | | |
| 38330 | } | | |
| 38331 | #else | | |
| 38332 | __ai poly64x1_t vreinterpret_p64_f64(float64x1_t __p0) { | 34661 | __ai poly64x1_t vreinterpret_p64_f64(float64x1_t __p0) { |
| 38333 | poly64x1_t __ret; | 34662 | poly64x1_t __ret; |
| 38334 | __ret = (poly64x1_t)(__p0); | 34663 | __ret = (poly64x1_t)(__p0); |
| 38335 | return __ret; | 34664 | return __ret; |
| 38336 | } | 34665 | } |
| 38337 | #endif | | |
| 38338 | | | |
| 38339 | #ifdef __LITTLE_ENDIAN__ | | |
| 38340 | __ai poly64x1_t vreinterpret_p64_f32(float32x2_t __p0) { | | |
| 38341 | poly64x1_t __ret; | | |
| 38342 | __ret = (poly64x1_t)(__p0); | | |
| 38343 | return __ret; | | |
| 38344 | } | | |
| 38345 | #else | | |
| 38346 | __ai poly64x1_t vreinterpret_p64_f32(float32x2_t __p0) { | 34666 | __ai poly64x1_t vreinterpret_p64_f32(float32x2_t __p0) { |
| 38347 | poly64x1_t __ret; | 34667 | poly64x1_t __ret; |
| 38348 | __ret = (poly64x1_t)(__p0); | 34668 | __ret = (poly64x1_t)(__p0); |
| 38349 | return __ret; | 34669 | return __ret; |
| 38350 | } | 34670 | } |
| 38351 | #endif | | |
| 38352 | | | |
| 38353 | #ifdef __LITTLE_ENDIAN__ | | |
| 38354 | __ai poly64x1_t vreinterpret_p64_f16(float16x4_t __p0) { | | |
| 38355 | poly64x1_t __ret; | | |
| 38356 | __ret = (poly64x1_t)(__p0); | | |
| 38357 | return __ret; | | |
| 38358 | } | | |
| 38359 | #else | | |
| 38360 | __ai poly64x1_t vreinterpret_p64_f16(float16x4_t __p0) { | 34671 | __ai poly64x1_t vreinterpret_p64_f16(float16x4_t __p0) { |
| 38361 | poly64x1_t __ret; | 34672 | poly64x1_t __ret; |
| 38362 | __ret = (poly64x1_t)(__p0); | 34673 | __ret = (poly64x1_t)(__p0); |
| 38363 | return __ret; | 34674 | return __ret; |
| 38364 | } | 34675 | } |
| 38365 | #endif | | |
| 38366 | | | |
| 38367 | #ifdef __LITTLE_ENDIAN__ | | |
| 38368 | __ai poly64x1_t vreinterpret_p64_s32(int32x2_t __p0) { | | |
| 38369 | poly64x1_t __ret; | | |
| 38370 | __ret = (poly64x1_t)(__p0); | | |
| 38371 | return __ret; | | |
| 38372 | } | | |
| 38373 | #else | | |
| 38374 | __ai poly64x1_t vreinterpret_p64_s32(int32x2_t __p0) { | 34676 | __ai poly64x1_t vreinterpret_p64_s32(int32x2_t __p0) { |
| 38375 | poly64x1_t __ret; | 34677 | poly64x1_t __ret; |
| 38376 | __ret = (poly64x1_t)(__p0); | 34678 | __ret = (poly64x1_t)(__p0); |
| 38377 | return __ret; | 34679 | return __ret; |
| 38378 | } | 34680 | } |
| 38379 | #endif | | |
| 38380 | | | |
| 38381 | #ifdef __LITTLE_ENDIAN__ | | |
| 38382 | __ai poly64x1_t vreinterpret_p64_s64(int64x1_t __p0) { | | |
| 38383 | poly64x1_t __ret; | | |
| 38384 | __ret = (poly64x1_t)(__p0); | | |
| 38385 | return __ret; | | |
| 38386 | } | | |
| 38387 | #else | | |
| 38388 | __ai poly64x1_t vreinterpret_p64_s64(int64x1_t __p0) { | 34681 | __ai poly64x1_t vreinterpret_p64_s64(int64x1_t __p0) { |
| 38389 | poly64x1_t __ret; | 34682 | poly64x1_t __ret; |
| 38390 | __ret = (poly64x1_t)(__p0); | 34683 | __ret = (poly64x1_t)(__p0); |
| 38391 | return __ret; | 34684 | return __ret; |
| 38392 | } | 34685 | } |
| 38393 | #endif | | |
| 38394 | | | |
| 38395 | #ifdef __LITTLE_ENDIAN__ | | |
| 38396 | __ai poly64x1_t vreinterpret_p64_s16(int16x4_t __p0) { | | |
| 38397 | poly64x1_t __ret; | | |
| 38398 | __ret = (poly64x1_t)(__p0); | | |
| 38399 | return __ret; | | |
| 38400 | } | | |
| 38401 | #else | | |
| 38402 | __ai poly64x1_t vreinterpret_p64_s16(int16x4_t __p0) { | 34686 | __ai poly64x1_t vreinterpret_p64_s16(int16x4_t __p0) { |
| 38403 | poly64x1_t __ret; | 34687 | poly64x1_t __ret; |
| 38404 | __ret = (poly64x1_t)(__p0); | 34688 | __ret = (poly64x1_t)(__p0); |
| 38405 | return __ret; | 34689 | return __ret; |
| 38406 | } | 34690 | } |
| 38407 | #endif | | |
| 38408 | | | |
| 38409 | #ifdef __LITTLE_ENDIAN__ | | |
| 38410 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { | | |
| 38411 | poly16x4_t __ret; | | |
| 38412 | __ret = (poly16x4_t)(__p0); | | |
| 38413 | return __ret; | | |
| 38414 | } | | |
| 38415 | #else | | |
| 38416 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { | 34691 | __ai poly16x4_t vreinterpret_p16_p8(poly8x8_t __p0) { |
| 38417 | poly16x4_t __ret; | 34692 | poly16x4_t __ret; |
| 38418 | __ret = (poly16x4_t)(__p0); | 34693 | __ret = (poly16x4_t)(__p0); |
| 38419 | return __ret; | 34694 | return __ret; |
| 38420 | } | 34695 | } |
| 38421 | #endif | | |
| 38422 | | | |
| 38423 | #ifdef __LITTLE_ENDIAN__ | | |
| 38424 | __ai poly16x4_t vreinterpret_p16_p64(poly64x1_t __p0) { | | |
| 38425 | poly16x4_t __ret; | | |
| 38426 | __ret = (poly16x4_t)(__p0); | | |
| 38427 | return __ret; | | |
| 38428 | } | | |
| 38429 | #else | | |
| 38430 | __ai poly16x4_t vreinterpret_p16_p64(poly64x1_t __p0) { | 34696 | __ai poly16x4_t vreinterpret_p16_p64(poly64x1_t __p0) { |
| 38431 | poly16x4_t __ret; | 34697 | poly16x4_t __ret; |
| 38432 | __ret = (poly16x4_t)(__p0); | 34698 | __ret = (poly16x4_t)(__p0); |
| 38433 | return __ret; | 34699 | return __ret; |
| 38434 | } | 34700 | } |
| 38435 | #endif | | |
| 38436 | | | |
| 38437 | #ifdef __LITTLE_ENDIAN__ | | |
| 38438 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { | | |
| 38439 | poly16x4_t __ret; | | |
| 38440 | __ret = (poly16x4_t)(__p0); | | |
| 38441 | return __ret; | | |
| 38442 | } | | |
| 38443 | #else | | |
| 38444 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { | 34701 | __ai poly16x4_t vreinterpret_p16_u8(uint8x8_t __p0) { |
| 38445 | poly16x4_t __ret; | 34702 | poly16x4_t __ret; |
| 38446 | __ret = (poly16x4_t)(__p0); | 34703 | __ret = (poly16x4_t)(__p0); |
| 38447 | return __ret; | 34704 | return __ret; |
| 38448 | } | 34705 | } |
| 38449 | #endif | | |
| 38450 | | | |
| 38451 | #ifdef __LITTLE_ENDIAN__ | | |
| 38452 | __ai poly16x4_t vreinterpret_p16_u32(uint32x2_t __p0) { | | |
| 38453 | poly16x4_t __ret; | | |
| 38454 | __ret = (poly16x4_t)(__p0); | | |
| 38455 | return __ret; | | |
| 38456 | } | | |
| 38457 | #else | | |
| 38458 | __ai poly16x4_t vreinterpret_p16_u32(uint32x2_t __p0) { | 34706 | __ai poly16x4_t vreinterpret_p16_u32(uint32x2_t __p0) { |
| 38459 | poly16x4_t __ret; | 34707 | poly16x4_t __ret; |
| 38460 | __ret = (poly16x4_t)(__p0); | 34708 | __ret = (poly16x4_t)(__p0); |
| 38461 | return __ret; | 34709 | return __ret; |
| 38462 | } | 34710 | } |
| 38463 | #endif | | |
| 38464 | | | |
| 38465 | #ifdef __LITTLE_ENDIAN__ | | |
| 38466 | __ai poly16x4_t vreinterpret_p16_u64(uint64x1_t __p0) { | | |
| 38467 | poly16x4_t __ret; | | |
| 38468 | __ret = (poly16x4_t)(__p0); | | |
| 38469 | return __ret; | | |
| 38470 | } | | |
| 38471 | #else | | |
| 38472 | __ai poly16x4_t vreinterpret_p16_u64(uint64x1_t __p0) { | 34711 | __ai poly16x4_t vreinterpret_p16_u64(uint64x1_t __p0) { |
| 38473 | poly16x4_t __ret; | 34712 | poly16x4_t __ret; |
| 38474 | __ret = (poly16x4_t)(__p0); | 34713 | __ret = (poly16x4_t)(__p0); |
| 38475 | return __ret; | 34714 | return __ret; |
| 38476 | } | 34715 | } |
| 38477 | #endif | | |
| 38478 | | | |
| 38479 | #ifdef __LITTLE_ENDIAN__ | | |
| 38480 | __ai poly16x4_t vreinterpret_p16_u16(uint16x4_t __p0) { | | |
| 38481 | poly16x4_t __ret; | | |
| 38482 | __ret = (poly16x4_t)(__p0); | | |
| 38483 | return __ret; | | |
| 38484 | } | | |
| 38485 | #else | | |
| 38486 | __ai poly16x4_t vreinterpret_p16_u16(uint16x4_t __p0) { | 34716 | __ai poly16x4_t vreinterpret_p16_u16(uint16x4_t __p0) { |
| 38487 | poly16x4_t __ret; | 34717 | poly16x4_t __ret; |
| 38488 | __ret = (poly16x4_t)(__p0); | 34718 | __ret = (poly16x4_t)(__p0); |
| 38489 | return __ret; | 34719 | return __ret; |
| 38490 | } | 34720 | } |
| 38491 | #endif | | |
| 38492 | | | |
| 38493 | #ifdef __LITTLE_ENDIAN__ | | |
| 38494 | __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { | | |
| 38495 | poly16x4_t __ret; | | |
| 38496 | __ret = (poly16x4_t)(__p0); | | |
| 38497 | return __ret; | | |
| 38498 | } | | |
| 38499 | #else | | |
| 38500 | __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { | 34721 | __ai poly16x4_t vreinterpret_p16_s8(int8x8_t __p0) { |
| 38501 | poly16x4_t __ret; | 34722 | poly16x4_t __ret; |
| 38502 | __ret = (poly16x4_t)(__p0); | 34723 | __ret = (poly16x4_t)(__p0); |
| 38503 | return __ret; | 34724 | return __ret; |
| 38504 | } | 34725 | } |
| 38505 | #endif | | |
| 38506 | | | |
| 38507 | #ifdef __LITTLE_ENDIAN__ | | |
| 38508 | __ai poly16x4_t vreinterpret_p16_f64(float64x1_t __p0) { | | |
| 38509 | poly16x4_t __ret; | | |
| 38510 | __ret = (poly16x4_t)(__p0); | | |
| 38511 | return __ret; | | |
| 38512 | } | | |
| 38513 | #else | | |
| 38514 | __ai poly16x4_t vreinterpret_p16_f64(float64x1_t __p0) { | 34726 | __ai poly16x4_t vreinterpret_p16_f64(float64x1_t __p0) { |
| 38515 | poly16x4_t __ret; | 34727 | poly16x4_t __ret; |
| 38516 | __ret = (poly16x4_t)(__p0); | 34728 | __ret = (poly16x4_t)(__p0); |
| 38517 | return __ret; | 34729 | return __ret; |
| 38518 | } | 34730 | } |
| 38519 | #endif | | |
| 38520 | | | |
| 38521 | #ifdef __LITTLE_ENDIAN__ | | |
| 38522 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { | | |
| 38523 | poly16x4_t __ret; | | |
| 38524 | __ret = (poly16x4_t)(__p0); | | |
| 38525 | return __ret; | | |
| 38526 | } | | |
| 38527 | #else | | |
| 38528 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { | 34731 | __ai poly16x4_t vreinterpret_p16_f32(float32x2_t __p0) { |
| 38529 | poly16x4_t __ret; | 34732 | poly16x4_t __ret; |
| 38530 | __ret = (poly16x4_t)(__p0); | 34733 | __ret = (poly16x4_t)(__p0); |
| 38531 | return __ret; | 34734 | return __ret; |
| 38532 | } | 34735 | } |
| 38533 | #endif | | |
| 38534 | | | |
| 38535 | #ifdef __LITTLE_ENDIAN__ | | |
| 38536 | __ai poly16x4_t vreinterpret_p16_f16(float16x4_t __p0) { | | |
| 38537 | poly16x4_t __ret; | | |
| 38538 | __ret = (poly16x4_t)(__p0); | | |
| 38539 | return __ret; | | |
| 38540 | } | | |
| 38541 | #else | | |
| 38542 | __ai poly16x4_t vreinterpret_p16_f16(float16x4_t __p0) { | 34736 | __ai poly16x4_t vreinterpret_p16_f16(float16x4_t __p0) { |
| 38543 | poly16x4_t __ret; | 34737 | poly16x4_t __ret; |
| 38544 | __ret = (poly16x4_t)(__p0); | 34738 | __ret = (poly16x4_t)(__p0); |
| 38545 | return __ret; | 34739 | return __ret; |
| 38546 | } | 34740 | } |
| 38547 | #endif | | |
| 38548 | | | |
| 38549 | #ifdef __LITTLE_ENDIAN__ | | |
| 38550 | __ai poly16x4_t vreinterpret_p16_s32(int32x2_t __p0) { | | |
| 38551 | poly16x4_t __ret; | | |
| 38552 | __ret = (poly16x4_t)(__p0); | | |
| 38553 | return __ret; | | |
| 38554 | } | | |
| 38555 | #else | | |
| 38556 | __ai poly16x4_t vreinterpret_p16_s32(int32x2_t __p0) { | 34741 | __ai poly16x4_t vreinterpret_p16_s32(int32x2_t __p0) { |
| 38557 | poly16x4_t __ret; | 34742 | poly16x4_t __ret; |
| 38558 | __ret = (poly16x4_t)(__p0); | 34743 | __ret = (poly16x4_t)(__p0); |
| 38559 | return __ret; | 34744 | return __ret; |
| 38560 | } | 34745 | } |
| 38561 | #endif | | |
| 38562 | | | |
| 38563 | #ifdef __LITTLE_ENDIAN__ | | |
| 38564 | __ai poly16x4_t vreinterpret_p16_s64(int64x1_t __p0) { | | |
| 38565 | poly16x4_t __ret; | | |
| 38566 | __ret = (poly16x4_t)(__p0); | | |
| 38567 | return __ret; | | |
| 38568 | } | | |
| 38569 | #else | | |
| 38570 | __ai poly16x4_t vreinterpret_p16_s64(int64x1_t __p0) { | 34746 | __ai poly16x4_t vreinterpret_p16_s64(int64x1_t __p0) { |
| 38571 | poly16x4_t __ret; | 34747 | poly16x4_t __ret; |
| 38572 | __ret = (poly16x4_t)(__p0); | 34748 | __ret = (poly16x4_t)(__p0); |
| 38573 | return __ret; | 34749 | return __ret; |
| 38574 | } | 34750 | } |
| 38575 | #endif | | |
| 38576 | | | |
| 38577 | #ifdef __LITTLE_ENDIAN__ | | |
| 38578 | __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { | | |
| 38579 | poly16x4_t __ret; | | |
| 38580 | __ret = (poly16x4_t)(__p0); | | |
| 38581 | return __ret; | | |
| 38582 | } | | |
| 38583 | #else | | |
| 38584 | __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { | 34751 | __ai poly16x4_t vreinterpret_p16_s16(int16x4_t __p0) { |
| 38585 | poly16x4_t __ret; | 34752 | poly16x4_t __ret; |
| 38586 | __ret = (poly16x4_t)(__p0); | 34753 | __ret = (poly16x4_t)(__p0); |
| 38587 | return __ret; | 34754 | return __ret; |
| 38588 | } | 34755 | } |
| 38589 | #endif | | |
| 38590 | | | |
| 38591 | #ifdef __LITTLE_ENDIAN__ | | |
| 38592 | __ai poly8x16_t vreinterpretq_p8_p128(poly128_t __p0) { | | |
| 38593 | poly8x16_t __ret; | | |
| 38594 | __ret = (poly8x16_t)(__p0); | | |
| 38595 | return __ret; | | |
| 38596 | } | | |
| 38597 | #else | | |
| 38598 | __ai poly8x16_t vreinterpretq_p8_p128(poly128_t __p0) { | 34756 | __ai poly8x16_t vreinterpretq_p8_p128(poly128_t __p0) { |
| 38599 | poly8x16_t __ret; | 34757 | poly8x16_t __ret; |
| 38600 | __ret = (poly8x16_t)(__p0); | 34758 | __ret = (poly8x16_t)(__p0); |
| 38601 | return __ret; | 34759 | return __ret; |
| 38602 | } | 34760 | } |
| 38603 | #endif | | |
| 38604 | | | |
| 38605 | #ifdef __LITTLE_ENDIAN__ | | |
| 38606 | __ai poly8x16_t vreinterpretq_p8_p64(poly64x2_t __p0) { | | |
| 38607 | poly8x16_t __ret; | | |
| 38608 | __ret = (poly8x16_t)(__p0); | | |
| 38609 | return __ret; | | |
| 38610 | } | | |
| 38611 | #else | | |
| 38612 | __ai poly8x16_t vreinterpretq_p8_p64(poly64x2_t __p0) { | 34761 | __ai poly8x16_t vreinterpretq_p8_p64(poly64x2_t __p0) { |
| 38613 | poly8x16_t __ret; | 34762 | poly8x16_t __ret; |
| 38614 | __ret = (poly8x16_t)(__p0); | 34763 | __ret = (poly8x16_t)(__p0); |
| 38615 | return __ret; | 34764 | return __ret; |
| 38616 | } | 34765 | } |
| 38617 | #endif | | |
| 38618 | | | |
| 38619 | #ifdef __LITTLE_ENDIAN__ | | |
| 38620 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { | 34766 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { |
| 38621 | poly8x16_t __ret; | 34767 | poly8x16_t __ret; |
| 38622 | __ret = (poly8x16_t)(__p0); | 34768 | __ret = (poly8x16_t)(__p0); |
| 38623 | return __ret; | 34769 | return __ret; |
| 38624 | } | 34770 | } |
| 38625 | #else | 34771 | __ai poly8x16_t vreinterpretq_p8_u8(uint8x16_t __p0) { |
| 38626 | __ai poly8x16_t vreinterpretq_p8_p16(poly16x8_t __p0) { | | |
| 38627 | poly8x16_t __ret; | 34772 | poly8x16_t __ret; |
| 38628 | __ret = (poly8x16_t)(__p0); | 34773 | __ret = (poly8x16_t)(__p0); |
| 38629 | return __ret; | 34774 | return __ret; |
| 38630 | } | 34775 | } |
| 38631 | #endif | 34776 | __ai poly8x16_t vreinterpretq_p8_u32(uint32x4_t __p0) { |
| 38632 | | | |
| 38633 | #ifdef __LITTLE_ENDIAN__ | | |
| 38634 | __ai poly8x16_t vreinterpretq_p8_u8(uint8x16_t __p0) { | | |
| 38635 | poly8x16_t __ret; | 34777 | poly8x16_t __ret; |
| 38636 | __ret = (poly8x16_t)(__p0); | 34778 | __ret = (poly8x16_t)(__p0); |
| 38637 | return __ret; | 34779 | return __ret; |
| 38638 | } | 34780 | } |
| 38639 | #else | 34781 | __ai poly8x16_t vreinterpretq_p8_u64(uint64x2_t __p0) { |
| 38640 | __ai poly8x16_t vreinterpretq_p8_u8(uint8x16_t __p0) { | | |
| 38641 | poly8x16_t __ret; | 34782 | poly8x16_t __ret; |
| 38642 | __ret = (poly8x16_t)(__p0); | 34783 | __ret = (poly8x16_t)(__p0); |
| 38643 | return __ret; | 34784 | return __ret; |
| 38644 | } | 34785 | } |
| 38645 | #endif | 34786 | __ai poly8x16_t vreinterpretq_p8_u16(uint16x8_t __p0) { |
| 38646 | | | |
| 38647 | #ifdef __LITTLE_ENDIAN__ | | |
| 38648 | __ai poly8x16_t vreinterpretq_p8_u32(uint32x4_t __p0) { | | |
| 38649 | poly8x16_t __ret; | 34787 | poly8x16_t __ret; |
| 38650 | __ret = (poly8x16_t)(__p0); | 34788 | __ret = (poly8x16_t)(__p0); |
| 38651 | return __ret; | 34789 | return __ret; |
| 38652 | } | 34790 | } |
| 38653 | #else | 34791 | __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { |
| 38654 | __ai poly8x16_t vreinterpretq_p8_u32(uint32x4_t __p0) { | | |
| 38655 | poly8x16_t __ret; | 34792 | poly8x16_t __ret; |
| 38656 | __ret = (poly8x16_t)(__p0); | 34793 | __ret = (poly8x16_t)(__p0); |
| 38657 | return __ret; | 34794 | return __ret; |
| 38658 | } | 34795 | } |
| 38659 | #endif | 34796 | __ai poly8x16_t vreinterpretq_p8_f64(float64x2_t __p0) { |
| 38660 | | | |
| 38661 | #ifdef __LITTLE_ENDIAN__ | | |
| 38662 | __ai poly8x16_t vreinterpretq_p8_u64(uint64x2_t __p0) { | | |
| 38663 | poly8x16_t __ret; | 34797 | poly8x16_t __ret; |
| 38664 | __ret = (poly8x16_t)(__p0); | 34798 | __ret = (poly8x16_t)(__p0); |
| 38665 | return __ret; | 34799 | return __ret; |
| 38666 | } | 34800 | } |
| 38667 | #else | 34801 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { |
| 38668 | __ai poly8x16_t vreinterpretq_p8_u64(uint64x2_t __p0) { | | |
| 38669 | poly8x16_t __ret; | 34802 | poly8x16_t __ret; |
| 38670 | __ret = (poly8x16_t)(__p0); | 34803 | __ret = (poly8x16_t)(__p0); |
| 38671 | return __ret; | 34804 | return __ret; |
| 38672 | } | 34805 | } |
| 38673 | #endif | 34806 | __ai poly8x16_t vreinterpretq_p8_f16(float16x8_t __p0) { |
| 38674 | | | |
| 38675 | #ifdef __LITTLE_ENDIAN__ | | |
| 38676 | __ai poly8x16_t vreinterpretq_p8_u16(uint16x8_t __p0) { | | |
| 38677 | poly8x16_t __ret; | 34807 | poly8x16_t __ret; |
| 38678 | __ret = (poly8x16_t)(__p0); | 34808 | __ret = (poly8x16_t)(__p0); |
| 38679 | return __ret; | 34809 | return __ret; |
| 38680 | } | 34810 | } |
| 38681 | #else | 34811 | __ai poly8x16_t vreinterpretq_p8_s32(int32x4_t __p0) { |
| 38682 | __ai poly8x16_t vreinterpretq_p8_u16(uint16x8_t __p0) { | | |
| 38683 | poly8x16_t __ret; | 34812 | poly8x16_t __ret; |
| 38684 | __ret = (poly8x16_t)(__p0); | 34813 | __ret = (poly8x16_t)(__p0); |
| 38685 | return __ret; | 34814 | return __ret; |
| 38686 | } | 34815 | } |
| 38687 | #endif | 34816 | __ai poly8x16_t vreinterpretq_p8_s64(int64x2_t __p0) { |
| 38688 | | | |
| 38689 | #ifdef __LITTLE_ENDIAN__ | | |
| 38690 | __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { | | |
| 38691 | poly8x16_t __ret; | 34817 | poly8x16_t __ret; |
| 38692 | __ret = (poly8x16_t)(__p0); | 34818 | __ret = (poly8x16_t)(__p0); |
| 38693 | return __ret; | 34819 | return __ret; |
| 38694 | } | 34820 | } |
| 38695 | #else | 34821 | __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { |
| 38696 | __ai poly8x16_t vreinterpretq_p8_s8(int8x16_t __p0) { | | |
| 38697 | poly8x16_t __ret; | 34822 | poly8x16_t __ret; |
| 38698 | __ret = (poly8x16_t)(__p0); | 34823 | __ret = (poly8x16_t)(__p0); |
| 38699 | return __ret; | 34824 | return __ret; |
| 38700 | } | 34825 | } |
| 38701 | #endif | 34826 | __ai poly128_t vreinterpretq_p128_p8(poly8x16_t __p0) { |
| 38702 | | 34827 | poly128_t __ret; |
| 38703 | #ifdef __LITTLE_ENDIAN__ | 34828 | __ret = (poly128_t)(__p0); |
| 38704 | __ai poly8x16_t vreinterpretq_p8_f64(float64x2_t __p0) { | | |
| 38705 | poly8x16_t __ret; | | |
| 38706 | __ret = (poly8x16_t)(__p0); | | |
| 38707 | return __ret; | 34829 | return __ret; |
| 38708 | } | 34830 | } |
| 38709 | #else | | |
| 38710 | __ai poly8x16_t vreinterpretq_p8_f64(float64x2_t __p0) { | | |
| 38711 | poly8x16_t __ret; | | |
| 38712 | __ret = (poly8x16_t)(__p0); | | |
| 38713 | return __ret; | | |
| 38714 | } | | |
| 38715 | #endif | | |
| 38716 | | | |
| 38717 | #ifdef __LITTLE_ENDIAN__ | | |
| 38718 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { | | |
| 38719 | poly8x16_t __ret; | | |
| 38720 | __ret = (poly8x16_t)(__p0); | | |
| 38721 | return __ret; | | |
| 38722 | } | | |
| 38723 | #else | | |
| 38724 | __ai poly8x16_t vreinterpretq_p8_f32(float32x4_t __p0) { | | |
| 38725 | poly8x16_t __ret; | | |
| 38726 | __ret = (poly8x16_t)(__p0); | | |
| 38727 | return __ret; | | |
| 38728 | } | | |
| 38729 | #endif | | |
| 38730 | | | |
| 38731 | #ifdef __LITTLE_ENDIAN__ | | |
| 38732 | __ai poly8x16_t vreinterpretq_p8_f16(float16x8_t __p0) { | | |
| 38733 | poly8x16_t __ret; | | |
| 38734 | __ret = (poly8x16_t)(__p0); | | |
| 38735 | return __ret; | | |
| 38736 | } | | |
| 38737 | #else | | |
| 38738 | __ai poly8x16_t vreinterpretq_p8_f16(float16x8_t __p0) { | | |
| 38739 | poly8x16_t __ret; | | |
| 38740 | __ret = (poly8x16_t)(__p0); | | |
| 38741 | return __ret; | | |
| 38742 | } | | |
| 38743 | #endif | | |
| 38744 | | | |
| 38745 | #ifdef __LITTLE_ENDIAN__ | | |
| 38746 | __ai poly8x16_t vreinterpretq_p8_s32(int32x4_t __p0) { | | |
| 38747 | poly8x16_t __ret; | | |
| 38748 | __ret = (poly8x16_t)(__p0); | | |
| 38749 | return __ret; | | |
| 38750 | } | | |
| 38751 | #else | | |
| 38752 | __ai poly8x16_t vreinterpretq_p8_s32(int32x4_t __p0) { | | |
| 38753 | poly8x16_t __ret; | | |
| 38754 | __ret = (poly8x16_t)(__p0); | | |
| 38755 | return __ret; | | |
| 38756 | } | | |
| 38757 | #endif | | |
| 38758 | | | |
| 38759 | #ifdef __LITTLE_ENDIAN__ | | |
| 38760 | __ai poly8x16_t vreinterpretq_p8_s64(int64x2_t __p0) { | | |
| 38761 | poly8x16_t __ret; | | |
| 38762 | __ret = (poly8x16_t)(__p0); | | |
| 38763 | return __ret; | | |
| 38764 | } | | |
| 38765 | #else | | |
| 38766 | __ai poly8x16_t vreinterpretq_p8_s64(int64x2_t __p0) { | | |
| 38767 | poly8x16_t __ret; | | |
| 38768 | __ret = (poly8x16_t)(__p0); | | |
| 38769 | return __ret; | | |
| 38770 | } | | |
| 38771 | #endif | | |
| 38772 | | | |
| 38773 | #ifdef __LITTLE_ENDIAN__ | | |
| 38774 | __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { | | |
| 38775 | poly8x16_t __ret; | | |
| 38776 | __ret = (poly8x16_t)(__p0); | | |
| 38777 | return __ret; | | |
| 38778 | } | | |
| 38779 | #else | | |
| 38780 | __ai poly8x16_t vreinterpretq_p8_s16(int16x8_t __p0) { | | |
| 38781 | poly8x16_t __ret; | | |
| 38782 | __ret = (poly8x16_t)(__p0); | | |
| 38783 | return __ret; | | |
| 38784 | } | | |
| 38785 | #endif | | |
| 38786 | | | |
| 38787 | #ifdef __LITTLE_ENDIAN__ | | |
| 38788 | __ai poly128_t vreinterpretq_p128_p8(poly8x16_t __p0) { | | |
| 38789 | poly128_t __ret; | | |
| 38790 | __ret = (poly128_t)(__p0); | | |
| 38791 | return __ret; | | |
| 38792 | } | | |
| 38793 | #else | | |
| 38794 | __ai poly128_t vreinterpretq_p128_p8(poly8x16_t __p0) { | | |
| 38795 | poly128_t __ret; | | |
| 38796 | __ret = (poly128_t)(__p0); | | |
| 38797 | return __ret; | | |
| 38798 | } | | |
| 38799 | #endif | | |
| 38800 | | | |
| 38801 | #ifdef __LITTLE_ENDIAN__ | | |
| 38802 | __ai poly128_t vreinterpretq_p128_p64(poly64x2_t __p0) { | | |
| 38803 | poly128_t __ret; | | |
| 38804 | __ret = (poly128_t)(__p0); | | |
| 38805 | return __ret; | | |
| 38806 | } | | |
| 38807 | #else | | |
| 38808 | __ai poly128_t vreinterpretq_p128_p64(poly64x2_t __p0) { | 34831 | __ai poly128_t vreinterpretq_p128_p64(poly64x2_t __p0) { |
| 38809 | poly128_t __ret; | 34832 | poly128_t __ret; |
| 38810 | __ret = (poly128_t)(__p0); | 34833 | __ret = (poly128_t)(__p0); |
| 38811 | return __ret; | 34834 | return __ret; |
| 38812 | } | 34835 | } |
| 38813 | #endif | | |
| 38814 | | | |
| 38815 | #ifdef __LITTLE_ENDIAN__ | | |
| 38816 | __ai poly128_t vreinterpretq_p128_p16(poly16x8_t __p0) { | | |
| 38817 | poly128_t __ret; | | |
| 38818 | __ret = (poly128_t)(__p0); | | |
| 38819 | return __ret; | | |
| 38820 | } | | |
| 38821 | #else | | |
| 38822 | __ai poly128_t vreinterpretq_p128_p16(poly16x8_t __p0) { | 34836 | __ai poly128_t vreinterpretq_p128_p16(poly16x8_t __p0) { |
| 38823 | poly128_t __ret; | 34837 | poly128_t __ret; |
| 38824 | __ret = (poly128_t)(__p0); | 34838 | __ret = (poly128_t)(__p0); |
| 38825 | return __ret; | 34839 | return __ret; |
| 38826 | } | 34840 | } |
| 38827 | #endif | | |
| 38828 | | | |
| 38829 | #ifdef __LITTLE_ENDIAN__ | | |
| 38830 | __ai poly128_t vreinterpretq_p128_u8(uint8x16_t __p0) { | | |
| 38831 | poly128_t __ret; | | |
| 38832 | __ret = (poly128_t)(__p0); | | |
| 38833 | return __ret; | | |
| 38834 | } | | |
| 38835 | #else | | |
| 38836 | __ai poly128_t vreinterpretq_p128_u8(uint8x16_t __p0) { | 34841 | __ai poly128_t vreinterpretq_p128_u8(uint8x16_t __p0) { |
| 38837 | poly128_t __ret; | 34842 | poly128_t __ret; |
| 38838 | __ret = (poly128_t)(__p0); | 34843 | __ret = (poly128_t)(__p0); |
| 38839 | return __ret; | 34844 | return __ret; |
| 38840 | } | 34845 | } |
| 38841 | #endif | | |
| 38842 | | | |
| 38843 | #ifdef __LITTLE_ENDIAN__ | | |
| 38844 | __ai poly128_t vreinterpretq_p128_u32(uint32x4_t __p0) { | | |
| 38845 | poly128_t __ret; | | |
| 38846 | __ret = (poly128_t)(__p0); | | |
| 38847 | return __ret; | | |
| 38848 | } | | |
| 38849 | #else | | |
| 38850 | __ai poly128_t vreinterpretq_p128_u32(uint32x4_t __p0) { | 34846 | __ai poly128_t vreinterpretq_p128_u32(uint32x4_t __p0) { |
| 38851 | poly128_t __ret; | 34847 | poly128_t __ret; |
| 38852 | __ret = (poly128_t)(__p0); | 34848 | __ret = (poly128_t)(__p0); |
| 38853 | return __ret; | 34849 | return __ret; |
| 38854 | } | 34850 | } |
| 38855 | #endif | | |
| 38856 | | | |
| 38857 | #ifdef __LITTLE_ENDIAN__ | | |
| 38858 | __ai poly128_t vreinterpretq_p128_u64(uint64x2_t __p0) { | | |
| 38859 | poly128_t __ret; | | |
| 38860 | __ret = (poly128_t)(__p0); | | |
| 38861 | return __ret; | | |
| 38862 | } | | |
| 38863 | #else | | |
| 38864 | __ai poly128_t vreinterpretq_p128_u64(uint64x2_t __p0) { | 34851 | __ai poly128_t vreinterpretq_p128_u64(uint64x2_t __p0) { |
| 38865 | poly128_t __ret; | 34852 | poly128_t __ret; |
| 38866 | __ret = (poly128_t)(__p0); | 34853 | __ret = (poly128_t)(__p0); |
| 38867 | return __ret; | 34854 | return __ret; |
| 38868 | } | 34855 | } |
| 38869 | #endif | | |
| 38870 | | | |
| 38871 | #ifdef __LITTLE_ENDIAN__ | | |
| 38872 | __ai poly128_t vreinterpretq_p128_u16(uint16x8_t __p0) { | | |
| 38873 | poly128_t __ret; | | |
| 38874 | __ret = (poly128_t)(__p0); | | |
| 38875 | return __ret; | | |
| 38876 | } | | |
| 38877 | #else | | |
| 38878 | __ai poly128_t vreinterpretq_p128_u16(uint16x8_t __p0) { | 34856 | __ai poly128_t vreinterpretq_p128_u16(uint16x8_t __p0) { |
| 38879 | poly128_t __ret; | 34857 | poly128_t __ret; |
| 38880 | __ret = (poly128_t)(__p0); | 34858 | __ret = (poly128_t)(__p0); |
| 38881 | return __ret; | 34859 | return __ret; |
| 38882 | } | 34860 | } |
| 38883 | #endif | | |
| 38884 | | | |
| 38885 | #ifdef __LITTLE_ENDIAN__ | | |
| 38886 | __ai poly128_t vreinterpretq_p128_s8(int8x16_t __p0) { | | |
| 38887 | poly128_t __ret; | | |
| 38888 | __ret = (poly128_t)(__p0); | | |
| 38889 | return __ret; | | |
| 38890 | } | | |
| 38891 | #else | | |
| 38892 | __ai poly128_t vreinterpretq_p128_s8(int8x16_t __p0) { | 34861 | __ai poly128_t vreinterpretq_p128_s8(int8x16_t __p0) { |
| 38893 | poly128_t __ret; | 34862 | poly128_t __ret; |
| 38894 | __ret = (poly128_t)(__p0); | 34863 | __ret = (poly128_t)(__p0); |
| 38895 | return __ret; | 34864 | return __ret; |
| 38896 | } | 34865 | } |
| 38897 | #endif | | |
| 38898 | | | |
| 38899 | #ifdef __LITTLE_ENDIAN__ | | |
| 38900 | __ai poly128_t vreinterpretq_p128_f64(float64x2_t __p0) { | | |
| 38901 | poly128_t __ret; | | |
| 38902 | __ret = (poly128_t)(__p0); | | |
| 38903 | return __ret; | | |
| 38904 | } | | |
| 38905 | #else | | |
| 38906 | __ai poly128_t vreinterpretq_p128_f64(float64x2_t __p0) { | 34866 | __ai poly128_t vreinterpretq_p128_f64(float64x2_t __p0) { |
| 38907 | poly128_t __ret; | 34867 | poly128_t __ret; |
| 38908 | __ret = (poly128_t)(__p0); | 34868 | __ret = (poly128_t)(__p0); |
| 38909 | return __ret; | 34869 | return __ret; |
| 38910 | } | 34870 | } |
| 38911 | #endif | | |
| 38912 | | | |
| 38913 | #ifdef __LITTLE_ENDIAN__ | | |
| 38914 | __ai poly128_t vreinterpretq_p128_f32(float32x4_t __p0) { | | |
| 38915 | poly128_t __ret; | | |
| 38916 | __ret = (poly128_t)(__p0); | | |
| 38917 | return __ret; | | |
| 38918 | } | | |
| 38919 | #else | | |
| 38920 | __ai poly128_t vreinterpretq_p128_f32(float32x4_t __p0) { | 34871 | __ai poly128_t vreinterpretq_p128_f32(float32x4_t __p0) { |
| 38921 | poly128_t __ret; | 34872 | poly128_t __ret; |
| 38922 | __ret = (poly128_t)(__p0); | 34873 | __ret = (poly128_t)(__p0); |
| 38923 | return __ret; | 34874 | return __ret; |
| 38924 | } | 34875 | } |
| 38925 | #endif | | |
| 38926 | | | |
| 38927 | #ifdef __LITTLE_ENDIAN__ | | |
| 38928 | __ai poly128_t vreinterpretq_p128_f16(float16x8_t __p0) { | | |
| 38929 | poly128_t __ret; | | |
| 38930 | __ret = (poly128_t)(__p0); | | |
| 38931 | return __ret; | | |
| 38932 | } | | |
| 38933 | #else | | |
| 38934 | __ai poly128_t vreinterpretq_p128_f16(float16x8_t __p0) { | 34876 | __ai poly128_t vreinterpretq_p128_f16(float16x8_t __p0) { |
| 38935 | poly128_t __ret; | 34877 | poly128_t __ret; |
| 38936 | __ret = (poly128_t)(__p0); | 34878 | __ret = (poly128_t)(__p0); |
| 38937 | return __ret; | 34879 | return __ret; |
| 38938 | } | 34880 | } |
| 38939 | #endif | | |
| 38940 | | | |
| 38941 | #ifdef __LITTLE_ENDIAN__ | | |
| 38942 | __ai poly128_t vreinterpretq_p128_s32(int32x4_t __p0) { | | |
| 38943 | poly128_t __ret; | | |
| 38944 | __ret = (poly128_t)(__p0); | | |
| 38945 | return __ret; | | |
| 38946 | } | | |
| 38947 | #else | | |
| 38948 | __ai poly128_t vreinterpretq_p128_s32(int32x4_t __p0) { | 34881 | __ai poly128_t vreinterpretq_p128_s32(int32x4_t __p0) { |
| 38949 | poly128_t __ret; | 34882 | poly128_t __ret; |
| 38950 | __ret = (poly128_t)(__p0); | 34883 | __ret = (poly128_t)(__p0); |
| 38951 | return __ret; | 34884 | return __ret; |
| 38952 | } | 34885 | } |
| 38953 | #endif | | |
| 38954 | | | |
| 38955 | #ifdef __LITTLE_ENDIAN__ | | |
| 38956 | __ai poly128_t vreinterpretq_p128_s64(int64x2_t __p0) { | | |
| 38957 | poly128_t __ret; | | |
| 38958 | __ret = (poly128_t)(__p0); | | |
| 38959 | return __ret; | | |
| 38960 | } | | |
| 38961 | #else | | |
| 38962 | __ai poly128_t vreinterpretq_p128_s64(int64x2_t __p0) { | 34886 | __ai poly128_t vreinterpretq_p128_s64(int64x2_t __p0) { |
| 38963 | poly128_t __ret; | 34887 | poly128_t __ret; |
| 38964 | __ret = (poly128_t)(__p0); | 34888 | __ret = (poly128_t)(__p0); |
| 38965 | return __ret; | 34889 | return __ret; |
| 38966 | } | 34890 | } |
| 38967 | #endif | | |
| 38968 | | | |
| 38969 | #ifdef __LITTLE_ENDIAN__ | | |
| 38970 | __ai poly128_t vreinterpretq_p128_s16(int16x8_t __p0) { | | |
| 38971 | poly128_t __ret; | | |
| 38972 | __ret = (poly128_t)(__p0); | | |
| 38973 | return __ret; | | |
| 38974 | } | | |
| 38975 | #else | | |
| 38976 | __ai poly128_t vreinterpretq_p128_s16(int16x8_t __p0) { | 34891 | __ai poly128_t vreinterpretq_p128_s16(int16x8_t __p0) { |
| 38977 | poly128_t __ret; | 34892 | poly128_t __ret; |
| 38978 | __ret = (poly128_t)(__p0); | 34893 | __ret = (poly128_t)(__p0); |
| 38979 | return __ret; | 34894 | return __ret; |
| 38980 | } | 34895 | } |
| 38981 | #endif | | |
| 38982 | | | |
| 38983 | #ifdef __LITTLE_ENDIAN__ | | |
| 38984 | __ai poly64x2_t vreinterpretq_p64_p8(poly8x16_t __p0) { | | |
| 38985 | poly64x2_t __ret; | | |
| 38986 | __ret = (poly64x2_t)(__p0); | | |
| 38987 | return __ret; | | |
| 38988 | } | | |
| 38989 | #else | | |
| 38990 | __ai poly64x2_t vreinterpretq_p64_p8(poly8x16_t __p0) { | 34896 | __ai poly64x2_t vreinterpretq_p64_p8(poly8x16_t __p0) { |
| 38991 | poly64x2_t __ret; | 34897 | poly64x2_t __ret; |
| 38992 | __ret = (poly64x2_t)(__p0); | 34898 | __ret = (poly64x2_t)(__p0); |
| 38993 | return __ret; | 34899 | return __ret; |
| 38994 | } | 34900 | } |
| 38995 | #endif | | |
| 38996 | | | |
| 38997 | #ifdef __LITTLE_ENDIAN__ | | |
| 38998 | __ai poly64x2_t vreinterpretq_p64_p128(poly128_t __p0) { | | |
| 38999 | poly64x2_t __ret; | | |
| 39000 | __ret = (poly64x2_t)(__p0); | | |
| 39001 | return __ret; | | |
| 39002 | } | | |
| 39003 | #else | | |
| 39004 | __ai poly64x2_t vreinterpretq_p64_p128(poly128_t __p0) { | 34901 | __ai poly64x2_t vreinterpretq_p64_p128(poly128_t __p0) { |
| 39005 | poly64x2_t __ret; | 34902 | poly64x2_t __ret; |
| 39006 | __ret = (poly64x2_t)(__p0); | 34903 | __ret = (poly64x2_t)(__p0); |
| 39007 | return __ret; | 34904 | return __ret; |
| 39008 | } | 34905 | } |
| 39009 | #endif | | |
| 39010 | | | |
| 39011 | #ifdef __LITTLE_ENDIAN__ | | |
| 39012 | __ai poly64x2_t vreinterpretq_p64_p16(poly16x8_t __p0) { | | |
| 39013 | poly64x2_t __ret; | | |
| 39014 | __ret = (poly64x2_t)(__p0); | | |
| 39015 | return __ret; | | |
| 39016 | } | | |
| 39017 | #else | | |
| 39018 | __ai poly64x2_t vreinterpretq_p64_p16(poly16x8_t __p0) { | 34906 | __ai poly64x2_t vreinterpretq_p64_p16(poly16x8_t __p0) { |
| 39019 | poly64x2_t __ret; | 34907 | poly64x2_t __ret; |
| 39020 | __ret = (poly64x2_t)(__p0); | 34908 | __ret = (poly64x2_t)(__p0); |
| 39021 | return __ret; | 34909 | return __ret; |
| 39022 | } | 34910 | } |
| 39023 | #endif | | |
| 39024 | | | |
| 39025 | #ifdef __LITTLE_ENDIAN__ | | |
| 39026 | __ai poly64x2_t vreinterpretq_p64_u8(uint8x16_t __p0) { | | |
| 39027 | poly64x2_t __ret; | | |
| 39028 | __ret = (poly64x2_t)(__p0); | | |
| 39029 | return __ret; | | |
| 39030 | } | | |
| 39031 | #else | | |
| 39032 | __ai poly64x2_t vreinterpretq_p64_u8(uint8x16_t __p0) { | 34911 | __ai poly64x2_t vreinterpretq_p64_u8(uint8x16_t __p0) { |
| 39033 | poly64x2_t __ret; | 34912 | poly64x2_t __ret; |
| 39034 | __ret = (poly64x2_t)(__p0); | 34913 | __ret = (poly64x2_t)(__p0); |
| 39035 | return __ret; | 34914 | return __ret; |
| 39036 | } | 34915 | } |
| 39037 | #endif | | |
| 39038 | | | |
| 39039 | #ifdef __LITTLE_ENDIAN__ | | |
| 39040 | __ai poly64x2_t vreinterpretq_p64_u32(uint32x4_t __p0) { | | |
| 39041 | poly64x2_t __ret; | | |
| 39042 | __ret = (poly64x2_t)(__p0); | | |
| 39043 | return __ret; | | |
| 39044 | } | | |
| 39045 | #else | | |
| 39046 | __ai poly64x2_t vreinterpretq_p64_u32(uint32x4_t __p0) { | 34916 | __ai poly64x2_t vreinterpretq_p64_u32(uint32x4_t __p0) { |
| 39047 | poly64x2_t __ret; | 34917 | poly64x2_t __ret; |
| 39048 | __ret = (poly64x2_t)(__p0); | 34918 | __ret = (poly64x2_t)(__p0); |
| 39049 | return __ret; | 34919 | return __ret; |
| 39050 | } | 34920 | } |
| 39051 | #endif | | |
| 39052 | | | |
| 39053 | #ifdef __LITTLE_ENDIAN__ | | |
| 39054 | __ai poly64x2_t vreinterpretq_p64_u64(uint64x2_t __p0) { | | |
| 39055 | poly64x2_t __ret; | | |
| 39056 | __ret = (poly64x2_t)(__p0); | | |
| 39057 | return __ret; | | |
| 39058 | } | | |
| 39059 | #else | | |
| 39060 | __ai poly64x2_t vreinterpretq_p64_u64(uint64x2_t __p0) { | 34921 | __ai poly64x2_t vreinterpretq_p64_u64(uint64x2_t __p0) { |
| 39061 | poly64x2_t __ret; | 34922 | poly64x2_t __ret; |
| 39062 | __ret = (poly64x2_t)(__p0); | 34923 | __ret = (poly64x2_t)(__p0); |
| 39063 | return __ret; | 34924 | return __ret; |
| 39064 | } | 34925 | } |
| 39065 | #endif | | |
| 39066 | | | |
| 39067 | #ifdef __LITTLE_ENDIAN__ | | |
| 39068 | __ai poly64x2_t vreinterpretq_p64_u16(uint16x8_t __p0) { | | |
| 39069 | poly64x2_t __ret; | | |
| 39070 | __ret = (poly64x2_t)(__p0); | | |
| 39071 | return __ret; | | |
| 39072 | } | | |
| 39073 | #else | | |
| 39074 | __ai poly64x2_t vreinterpretq_p64_u16(uint16x8_t __p0) { | 34926 | __ai poly64x2_t vreinterpretq_p64_u16(uint16x8_t __p0) { |
| 39075 | poly64x2_t __ret; | 34927 | poly64x2_t __ret; |
| 39076 | __ret = (poly64x2_t)(__p0); | 34928 | __ret = (poly64x2_t)(__p0); |
| 39077 | return __ret; | 34929 | return __ret; |
| 39078 | } | 34930 | } |
| 39079 | #endif | | |
| 39080 | | | |
| 39081 | #ifdef __LITTLE_ENDIAN__ | | |
| 39082 | __ai poly64x2_t vreinterpretq_p64_s8(int8x16_t __p0) { | | |
| 39083 | poly64x2_t __ret; | | |
| 39084 | __ret = (poly64x2_t)(__p0); | | |
| 39085 | return __ret; | | |
| 39086 | } | | |
| 39087 | #else | | |
| 39088 | __ai poly64x2_t vreinterpretq_p64_s8(int8x16_t __p0) { | 34931 | __ai poly64x2_t vreinterpretq_p64_s8(int8x16_t __p0) { |
| 39089 | poly64x2_t __ret; | 34932 | poly64x2_t __ret; |
| 39090 | __ret = (poly64x2_t)(__p0); | 34933 | __ret = (poly64x2_t)(__p0); |
| 39091 | return __ret; | 34934 | return __ret; |
| 39092 | } | 34935 | } |
| 39093 | #endif | | |
| 39094 | | | |
| 39095 | #ifdef __LITTLE_ENDIAN__ | | |
| 39096 | __ai poly64x2_t vreinterpretq_p64_f64(float64x2_t __p0) { | | |
| 39097 | poly64x2_t __ret; | | |
| 39098 | __ret = (poly64x2_t)(__p0); | | |
| 39099 | return __ret; | | |
| 39100 | } | | |
| 39101 | #else | | |
| 39102 | __ai poly64x2_t vreinterpretq_p64_f64(float64x2_t __p0) { | 34936 | __ai poly64x2_t vreinterpretq_p64_f64(float64x2_t __p0) { |
| 39103 | poly64x2_t __ret; | 34937 | poly64x2_t __ret; |
| 39104 | __ret = (poly64x2_t)(__p0); | 34938 | __ret = (poly64x2_t)(__p0); |
| 39105 | return __ret; | 34939 | return __ret; |
| 39106 | } | 34940 | } |
| 39107 | #endif | | |
| 39108 | | | |
| 39109 | #ifdef __LITTLE_ENDIAN__ | | |
| 39110 | __ai poly64x2_t vreinterpretq_p64_f32(float32x4_t __p0) { | | |
| 39111 | poly64x2_t __ret; | | |
| 39112 | __ret = (poly64x2_t)(__p0); | | |
| 39113 | return __ret; | | |
| 39114 | } | | |
| 39115 | #else | | |
| 39116 | __ai poly64x2_t vreinterpretq_p64_f32(float32x4_t __p0) { | 34941 | __ai poly64x2_t vreinterpretq_p64_f32(float32x4_t __p0) { |
| 39117 | poly64x2_t __ret; | 34942 | poly64x2_t __ret; |
| 39118 | __ret = (poly64x2_t)(__p0); | 34943 | __ret = (poly64x2_t)(__p0); |
| 39119 | return __ret; | 34944 | return __ret; |
| 39120 | } | 34945 | } |
| 39121 | #endif | | |
| 39122 | | | |
| 39123 | #ifdef __LITTLE_ENDIAN__ | | |
| 39124 | __ai poly64x2_t vreinterpretq_p64_f16(float16x8_t __p0) { | | |
| 39125 | poly64x2_t __ret; | | |
| 39126 | __ret = (poly64x2_t)(__p0); | | |
| 39127 | return __ret; | | |
| 39128 | } | | |
| 39129 | #else | | |
| 39130 | __ai poly64x2_t vreinterpretq_p64_f16(float16x8_t __p0) { | 34946 | __ai poly64x2_t vreinterpretq_p64_f16(float16x8_t __p0) { |
| 39131 | poly64x2_t __ret; | 34947 | poly64x2_t __ret; |
| 39132 | __ret = (poly64x2_t)(__p0); | 34948 | __ret = (poly64x2_t)(__p0); |
| 39133 | return __ret; | 34949 | return __ret; |
| 39134 | } | 34950 | } |
| 39135 | #endif | | |
| 39136 | | | |
| 39137 | #ifdef __LITTLE_ENDIAN__ | | |
| 39138 | __ai poly64x2_t vreinterpretq_p64_s32(int32x4_t __p0) { | | |
| 39139 | poly64x2_t __ret; | | |
| 39140 | __ret = (poly64x2_t)(__p0); | | |
| 39141 | return __ret; | | |
| 39142 | } | | |
| 39143 | #else | | |
| 39144 | __ai poly64x2_t vreinterpretq_p64_s32(int32x4_t __p0) { | 34951 | __ai poly64x2_t vreinterpretq_p64_s32(int32x4_t __p0) { |
| 39145 | poly64x2_t __ret; | 34952 | poly64x2_t __ret; |
| 39146 | __ret = (poly64x2_t)(__p0); | 34953 | __ret = (poly64x2_t)(__p0); |
| 39147 | return __ret; | 34954 | return __ret; |
| 39148 | } | 34955 | } |
| 39149 | #endif | | |
| 39150 | | | |
| 39151 | #ifdef __LITTLE_ENDIAN__ | | |
| 39152 | __ai poly64x2_t vreinterpretq_p64_s64(int64x2_t __p0) { | | |
| 39153 | poly64x2_t __ret; | | |
| 39154 | __ret = (poly64x2_t)(__p0); | | |
| 39155 | return __ret; | | |
| 39156 | } | | |
| 39157 | #else | | |
| 39158 | __ai poly64x2_t vreinterpretq_p64_s64(int64x2_t __p0) { | 34956 | __ai poly64x2_t vreinterpretq_p64_s64(int64x2_t __p0) { |
| 39159 | poly64x2_t __ret; | 34957 | poly64x2_t __ret; |
| 39160 | __ret = (poly64x2_t)(__p0); | 34958 | __ret = (poly64x2_t)(__p0); |
| 39161 | return __ret; | 34959 | return __ret; |
| 39162 | } | 34960 | } |
| 39163 | #endif | | |
| 39164 | | | |
| 39165 | #ifdef __LITTLE_ENDIAN__ | | |
| 39166 | __ai poly64x2_t vreinterpretq_p64_s16(int16x8_t __p0) { | | |
| 39167 | poly64x2_t __ret; | | |
| 39168 | __ret = (poly64x2_t)(__p0); | | |
| 39169 | return __ret; | | |
| 39170 | } | | |
| 39171 | #else | | |
| 39172 | __ai poly64x2_t vreinterpretq_p64_s16(int16x8_t __p0) { | 34961 | __ai poly64x2_t vreinterpretq_p64_s16(int16x8_t __p0) { |
| 39173 | poly64x2_t __ret; | 34962 | poly64x2_t __ret; |
| 39174 | __ret = (poly64x2_t)(__p0); | 34963 | __ret = (poly64x2_t)(__p0); |
| 39175 | return __ret; | 34964 | return __ret; |
| 39176 | } | 34965 | } |
| 39177 | #endif | | |
| 39178 | | | |
| 39179 | #ifdef __LITTLE_ENDIAN__ | | |
| 39180 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { | | |
| 39181 | poly16x8_t __ret; | | |
| 39182 | __ret = (poly16x8_t)(__p0); | | |
| 39183 | return __ret; | | |
| 39184 | } | | |
| 39185 | #else | | |
| 39186 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { | 34966 | __ai poly16x8_t vreinterpretq_p16_p8(poly8x16_t __p0) { |
| 39187 | poly16x8_t __ret; | 34967 | poly16x8_t __ret; |
| 39188 | __ret = (poly16x8_t)(__p0); | 34968 | __ret = (poly16x8_t)(__p0); |
| 39189 | return __ret; | 34969 | return __ret; |
| 39190 | } | 34970 | } |
| 39191 | #endif | | |
| 39192 | | | |
| 39193 | #ifdef __LITTLE_ENDIAN__ | | |
| 39194 | __ai poly16x8_t vreinterpretq_p16_p128(poly128_t __p0) { | | |
| 39195 | poly16x8_t __ret; | | |
| 39196 | __ret = (poly16x8_t)(__p0); | | |
| 39197 | return __ret; | | |
| 39198 | } | | |
| 39199 | #else | | |
| 39200 | __ai poly16x8_t vreinterpretq_p16_p128(poly128_t __p0) { | 34971 | __ai poly16x8_t vreinterpretq_p16_p128(poly128_t __p0) { |
| 39201 | poly16x8_t __ret; | 34972 | poly16x8_t __ret; |
| 39202 | __ret = (poly16x8_t)(__p0); | 34973 | __ret = (poly16x8_t)(__p0); |
| 39203 | return __ret; | 34974 | return __ret; |
| 39204 | } | 34975 | } |
| 39205 | #endif | | |
| 39206 | | | |
| 39207 | #ifdef __LITTLE_ENDIAN__ | | |
| 39208 | __ai poly16x8_t vreinterpretq_p16_p64(poly64x2_t __p0) { | | |
| 39209 | poly16x8_t __ret; | | |
| 39210 | __ret = (poly16x8_t)(__p0); | | |
| 39211 | return __ret; | | |
| 39212 | } | | |
| 39213 | #else | | |
| 39214 | __ai poly16x8_t vreinterpretq_p16_p64(poly64x2_t __p0) { | 34976 | __ai poly16x8_t vreinterpretq_p16_p64(poly64x2_t __p0) { |
| 39215 | poly16x8_t __ret; | 34977 | poly16x8_t __ret; |
| 39216 | __ret = (poly16x8_t)(__p0); | 34978 | __ret = (poly16x8_t)(__p0); |
| 39217 | return __ret; | 34979 | return __ret; |
| 39218 | } | 34980 | } |
| 39219 | #endif | | |
| 39220 | | | |
| 39221 | #ifdef __LITTLE_ENDIAN__ | | |
| 39222 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { | | |
| 39223 | poly16x8_t __ret; | | |
| 39224 | __ret = (poly16x8_t)(__p0); | | |
| 39225 | return __ret; | | |
| 39226 | } | | |
| 39227 | #else | | |
| 39228 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { | 34981 | __ai poly16x8_t vreinterpretq_p16_u8(uint8x16_t __p0) { |
| 39229 | poly16x8_t __ret; | 34982 | poly16x8_t __ret; |
| 39230 | __ret = (poly16x8_t)(__p0); | 34983 | __ret = (poly16x8_t)(__p0); |
| 39231 | return __ret; | 34984 | return __ret; |
| 39232 | } | 34985 | } |
| 39233 | #endif | | |
| 39234 | | | |
| 39235 | #ifdef __LITTLE_ENDIAN__ | | |
| 39236 | __ai poly16x8_t vreinterpretq_p16_u32(uint32x4_t __p0) { | | |
| 39237 | poly16x8_t __ret; | | |
| 39238 | __ret = (poly16x8_t)(__p0); | | |
| 39239 | return __ret; | | |
| 39240 | } | | |
| 39241 | #else | | |
| 39242 | __ai poly16x8_t vreinterpretq_p16_u32(uint32x4_t __p0) { | 34986 | __ai poly16x8_t vreinterpretq_p16_u32(uint32x4_t __p0) { |
| 39243 | poly16x8_t __ret; | 34987 | poly16x8_t __ret; |
| 39244 | __ret = (poly16x8_t)(__p0); | 34988 | __ret = (poly16x8_t)(__p0); |
| 39245 | return __ret; | 34989 | return __ret; |
| 39246 | } | 34990 | } |
| 39247 | #endif | | |
| 39248 | | | |
| 39249 | #ifdef __LITTLE_ENDIAN__ | | |
| 39250 | __ai poly16x8_t vreinterpretq_p16_u64(uint64x2_t __p0) { | | |
| 39251 | poly16x8_t __ret; | | |
| 39252 | __ret = (poly16x8_t)(__p0); | | |
| 39253 | return __ret; | | |
| 39254 | } | | |
| 39255 | #else | | |
| 39256 | __ai poly16x8_t vreinterpretq_p16_u64(uint64x2_t __p0) { | 34991 | __ai poly16x8_t vreinterpretq_p16_u64(uint64x2_t __p0) { |
| 39257 | poly16x8_t __ret; | 34992 | poly16x8_t __ret; |
| 39258 | __ret = (poly16x8_t)(__p0); | 34993 | __ret = (poly16x8_t)(__p0); |
| 39259 | return __ret; | 34994 | return __ret; |
| 39260 | } | 34995 | } |
| 39261 | #endif | | |
| 39262 | | | |
| 39263 | #ifdef __LITTLE_ENDIAN__ | | |
| 39264 | __ai poly16x8_t vreinterpretq_p16_u16(uint16x8_t __p0) { | | |
| 39265 | poly16x8_t __ret; | | |
| 39266 | __ret = (poly16x8_t)(__p0); | | |
| 39267 | return __ret; | | |
| 39268 | } | | |
| 39269 | #else | | |
| 39270 | __ai poly16x8_t vreinterpretq_p16_u16(uint16x8_t __p0) { | 34996 | __ai poly16x8_t vreinterpretq_p16_u16(uint16x8_t __p0) { |
| 39271 | poly16x8_t __ret; | 34997 | poly16x8_t __ret; |
| 39272 | __ret = (poly16x8_t)(__p0); | 34998 | __ret = (poly16x8_t)(__p0); |
| 39273 | return __ret; | 34999 | return __ret; |
| 39274 | } | 35000 | } |
| 39275 | #endif | | |
| 39276 | | | |
| 39277 | #ifdef __LITTLE_ENDIAN__ | | |
| 39278 | __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { | | |
| 39279 | poly16x8_t __ret; | | |
| 39280 | __ret = (poly16x8_t)(__p0); | | |
| 39281 | return __ret; | | |
| 39282 | } | | |
| 39283 | #else | | |
| 39284 | __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { | 35001 | __ai poly16x8_t vreinterpretq_p16_s8(int8x16_t __p0) { |
| 39285 | poly16x8_t __ret; | 35002 | poly16x8_t __ret; |
| 39286 | __ret = (poly16x8_t)(__p0); | 35003 | __ret = (poly16x8_t)(__p0); |
| 39287 | return __ret; | 35004 | return __ret; |
| 39288 | } | 35005 | } |
| 39289 | #endif | | |
| 39290 | | | |
| 39291 | #ifdef __LITTLE_ENDIAN__ | | |
| 39292 | __ai poly16x8_t vreinterpretq_p16_f64(float64x2_t __p0) { | | |
| 39293 | poly16x8_t __ret; | | |
| 39294 | __ret = (poly16x8_t)(__p0); | | |
| 39295 | return __ret; | | |
| 39296 | } | | |
| 39297 | #else | | |
| 39298 | __ai poly16x8_t vreinterpretq_p16_f64(float64x2_t __p0) { | 35006 | __ai poly16x8_t vreinterpretq_p16_f64(float64x2_t __p0) { |
| 39299 | poly16x8_t __ret; | 35007 | poly16x8_t __ret; |
| 39300 | __ret = (poly16x8_t)(__p0); | 35008 | __ret = (poly16x8_t)(__p0); |
| 39301 | return __ret; | 35009 | return __ret; |
| 39302 | } | 35010 | } |
| 39303 | #endif | | |
| 39304 | | | |
| 39305 | #ifdef __LITTLE_ENDIAN__ | | |
| 39306 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { | | |
| 39307 | poly16x8_t __ret; | | |
| 39308 | __ret = (poly16x8_t)(__p0); | | |
| 39309 | return __ret; | | |
| 39310 | } | | |
| 39311 | #else | | |
| 39312 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { | 35011 | __ai poly16x8_t vreinterpretq_p16_f32(float32x4_t __p0) { |
| 39313 | poly16x8_t __ret; | 35012 | poly16x8_t __ret; |
| 39314 | __ret = (poly16x8_t)(__p0); | 35013 | __ret = (poly16x8_t)(__p0); |
| 39315 | return __ret; | 35014 | return __ret; |
| 39316 | } | 35015 | } |
| 39317 | #endif | | |
| 39318 | | | |
| 39319 | #ifdef __LITTLE_ENDIAN__ | | |
| 39320 | __ai poly16x8_t vreinterpretq_p16_f16(float16x8_t __p0) { | | |
| 39321 | poly16x8_t __ret; | | |
| 39322 | __ret = (poly16x8_t)(__p0); | | |
| 39323 | return __ret; | | |
| 39324 | } | | |
| 39325 | #else | | |
| 39326 | __ai poly16x8_t vreinterpretq_p16_f16(float16x8_t __p0) { | 35016 | __ai poly16x8_t vreinterpretq_p16_f16(float16x8_t __p0) { |
| 39327 | poly16x8_t __ret; | 35017 | poly16x8_t __ret; |
| 39328 | __ret = (poly16x8_t)(__p0); | 35018 | __ret = (poly16x8_t)(__p0); |
| 39329 | return __ret; | 35019 | return __ret; |
| 39330 | } | 35020 | } |
| 39331 | #endif | | |
| 39332 | | | |
| 39333 | #ifdef __LITTLE_ENDIAN__ | | |
| 39334 | __ai poly16x8_t vreinterpretq_p16_s32(int32x4_t __p0) { | | |
| 39335 | poly16x8_t __ret; | | |
| 39336 | __ret = (poly16x8_t)(__p0); | | |
| 39337 | return __ret; | | |
| 39338 | } | | |
| 39339 | #else | | |
| 39340 | __ai poly16x8_t vreinterpretq_p16_s32(int32x4_t __p0) { | 35021 | __ai poly16x8_t vreinterpretq_p16_s32(int32x4_t __p0) { |
| 39341 | poly16x8_t __ret; | 35022 | poly16x8_t __ret; |
| 39342 | __ret = (poly16x8_t)(__p0); | 35023 | __ret = (poly16x8_t)(__p0); |
| 39343 | return __ret; | 35024 | return __ret; |
| 39344 | } | 35025 | } |
| 39345 | #endif | | |
| 39346 | | | |
| 39347 | #ifdef __LITTLE_ENDIAN__ | | |
| 39348 | __ai poly16x8_t vreinterpretq_p16_s64(int64x2_t __p0) { | | |
| 39349 | poly16x8_t __ret; | | |
| 39350 | __ret = (poly16x8_t)(__p0); | | |
| 39351 | return __ret; | | |
| 39352 | } | | |
| 39353 | #else | | |
| 39354 | __ai poly16x8_t vreinterpretq_p16_s64(int64x2_t __p0) { | 35026 | __ai poly16x8_t vreinterpretq_p16_s64(int64x2_t __p0) { |
| 39355 | poly16x8_t __ret; | 35027 | poly16x8_t __ret; |
| 39356 | __ret = (poly16x8_t)(__p0); | 35028 | __ret = (poly16x8_t)(__p0); |
| 39357 | return __ret; | 35029 | return __ret; |
| 39358 | } | 35030 | } |
| 39359 | #endif | | |
| 39360 | | | |
| 39361 | #ifdef __LITTLE_ENDIAN__ | | |
| 39362 | __ai poly16x8_t vreinterpretq_p16_s16(int16x8_t __p0) { | | |
| 39363 | poly16x8_t __ret; | | |
| 39364 | __ret = (poly16x8_t)(__p0); | | |
| 39365 | return __ret; | | |
| 39366 | } | | |
| 39367 | #else | | |
| 39368 | __ai poly16x8_t vreinterpretq_p16_s16(int16x8_t __p0) { | 35031 | __ai poly16x8_t vreinterpretq_p16_s16(int16x8_t __p0) { |
| 39369 | poly16x8_t __ret; | 35032 | poly16x8_t __ret; |
| 39370 | __ret = (poly16x8_t)(__p0); | 35033 | __ret = (poly16x8_t)(__p0); |
| 39371 | return __ret; | 35034 | return __ret; |
| 39372 | } | 35035 | } |
| 39373 | #endif | | |
| 39374 | | | |
| 39375 | #ifdef __LITTLE_ENDIAN__ | | |
| 39376 | __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { | 35036 | __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { |
| 39377 | uint8x16_t __ret; | 35037 | uint8x16_t __ret; |
| 39378 | __ret = (uint8x16_t)(__p0); | 35038 | __ret = (uint8x16_t)(__p0); |
| 39379 | return __ret; | 35039 | return __ret; |
| 39380 | } | 35040 | } |
| 39381 | #else | 35041 | __ai uint8x16_t vreinterpretq_u8_p128(poly128_t __p0) { |
| 39382 | __ai uint8x16_t vreinterpretq_u8_p8(poly8x16_t __p0) { | | |
| 39383 | uint8x16_t __ret; | 35042 | uint8x16_t __ret; |
| 39384 | __ret = (uint8x16_t)(__p0); | 35043 | __ret = (uint8x16_t)(__p0); |
| 39385 | return __ret; | 35044 | return __ret; |
| 39386 | } | 35045 | } |
| 39387 | #endif | 35046 | __ai uint8x16_t vreinterpretq_u8_p64(poly64x2_t __p0) { |
| 39388 | | | |
| 39389 | #ifdef __LITTLE_ENDIAN__ | | |
| 39390 | __ai uint8x16_t vreinterpretq_u8_p128(poly128_t __p0) { | | |
| 39391 | uint8x16_t __ret; | 35047 | uint8x16_t __ret; |
| 39392 | __ret = (uint8x16_t)(__p0); | 35048 | __ret = (uint8x16_t)(__p0); |
| 39393 | return __ret; | 35049 | return __ret; |
| 39394 | } | 35050 | } |
| 39395 | #else | 35051 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { |
| 39396 | __ai uint8x16_t vreinterpretq_u8_p128(poly128_t __p0) { | | |
| 39397 | uint8x16_t __ret; | 35052 | uint8x16_t __ret; |
| 39398 | __ret = (uint8x16_t)(__p0); | 35053 | __ret = (uint8x16_t)(__p0); |
| 39399 | return __ret; | 35054 | return __ret; |
| 39400 | } | 35055 | } |
| 39401 | #endif | 35056 | __ai uint8x16_t vreinterpretq_u8_u32(uint32x4_t __p0) { |
| 39402 | | | |
| 39403 | #ifdef __LITTLE_ENDIAN__ | | |
| 39404 | __ai uint8x16_t vreinterpretq_u8_p64(poly64x2_t __p0) { | | |
| 39405 | uint8x16_t __ret; | 35057 | uint8x16_t __ret; |
| 39406 | __ret = (uint8x16_t)(__p0); | 35058 | __ret = (uint8x16_t)(__p0); |
| 39407 | return __ret; | 35059 | return __ret; |
| 39408 | } | 35060 | } |
| 39409 | #else | 35061 | __ai uint8x16_t vreinterpretq_u8_u64(uint64x2_t __p0) { |
| 39410 | __ai uint8x16_t vreinterpretq_u8_p64(poly64x2_t __p0) { | | |
| 39411 | uint8x16_t __ret; | 35062 | uint8x16_t __ret; |
| 39412 | __ret = (uint8x16_t)(__p0); | 35063 | __ret = (uint8x16_t)(__p0); |
| 39413 | return __ret; | 35064 | return __ret; |
| 39414 | } | 35065 | } |
| 39415 | #endif | 35066 | __ai uint8x16_t vreinterpretq_u8_u16(uint16x8_t __p0) { |
| 39416 | | | |
| 39417 | #ifdef __LITTLE_ENDIAN__ | | |
| 39418 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { | | |
| 39419 | uint8x16_t __ret; | 35067 | uint8x16_t __ret; |
| 39420 | __ret = (uint8x16_t)(__p0); | 35068 | __ret = (uint8x16_t)(__p0); |
| 39421 | return __ret; | 35069 | return __ret; |
| 39422 | } | 35070 | } |
| 39423 | #else | 35071 | __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { |
| 39424 | __ai uint8x16_t vreinterpretq_u8_p16(poly16x8_t __p0) { | | |
| 39425 | uint8x16_t __ret; | 35072 | uint8x16_t __ret; |
| 39426 | __ret = (uint8x16_t)(__p0); | 35073 | __ret = (uint8x16_t)(__p0); |
| 39427 | return __ret; | 35074 | return __ret; |
| 39428 | } | 35075 | } |
| 39429 | #endif | 35076 | __ai uint8x16_t vreinterpretq_u8_f64(float64x2_t __p0) { |
| 39430 | | | |
| 39431 | #ifdef __LITTLE_ENDIAN__ | | |
| 39432 | __ai uint8x16_t vreinterpretq_u8_u32(uint32x4_t __p0) { | | |
| 39433 | uint8x16_t __ret; | 35077 | uint8x16_t __ret; |
| 39434 | __ret = (uint8x16_t)(__p0); | 35078 | __ret = (uint8x16_t)(__p0); |
| 39435 | return __ret; | 35079 | return __ret; |
| 39436 | } | 35080 | } |
| 39437 | #else | 35081 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { |
| 39438 | __ai uint8x16_t vreinterpretq_u8_u32(uint32x4_t __p0) { | | |
| 39439 | uint8x16_t __ret; | 35082 | uint8x16_t __ret; |
| 39440 | __ret = (uint8x16_t)(__p0); | 35083 | __ret = (uint8x16_t)(__p0); |
| 39441 | return __ret; | 35084 | return __ret; |
| 39442 | } | 35085 | } |
| 39443 | #endif | 35086 | __ai uint8x16_t vreinterpretq_u8_f16(float16x8_t __p0) { |
| 39444 | | | |
| 39445 | #ifdef __LITTLE_ENDIAN__ | | |
| 39446 | __ai uint8x16_t vreinterpretq_u8_u64(uint64x2_t __p0) { | | |
| 39447 | uint8x16_t __ret; | 35087 | uint8x16_t __ret; |
| 39448 | __ret = (uint8x16_t)(__p0); | 35088 | __ret = (uint8x16_t)(__p0); |
| 39449 | return __ret; | 35089 | return __ret; |
| 39450 | } | 35090 | } |
| 39451 | #else | 35091 | __ai uint8x16_t vreinterpretq_u8_s32(int32x4_t __p0) { |
| 39452 | __ai uint8x16_t vreinterpretq_u8_u64(uint64x2_t __p0) { | | |
| 39453 | uint8x16_t __ret; | 35092 | uint8x16_t __ret; |
| 39454 | __ret = (uint8x16_t)(__p0); | 35093 | __ret = (uint8x16_t)(__p0); |
| 39455 | return __ret; | 35094 | return __ret; |
| 39456 | } | 35095 | } |
| 39457 | #endif | 35096 | __ai uint8x16_t vreinterpretq_u8_s64(int64x2_t __p0) { |
| 39458 | | | |
| 39459 | #ifdef __LITTLE_ENDIAN__ | | |
| 39460 | __ai uint8x16_t vreinterpretq_u8_u16(uint16x8_t __p0) { | | |
| 39461 | uint8x16_t __ret; | 35097 | uint8x16_t __ret; |
| 39462 | __ret = (uint8x16_t)(__p0); | 35098 | __ret = (uint8x16_t)(__p0); |
| 39463 | return __ret; | 35099 | return __ret; |
| 39464 | } | 35100 | } |
| 39465 | #else | | |
| 39466 | __ai uint8x16_t vreinterpretq_u8_u16(uint16x8_t __p0) { | | |
| 39467 | uint8x16_t __ret; | | |
| 39468 | __ret = (uint8x16_t)(__p0); | | |
| 39469 | return __ret; | | |
| 39470 | } | | |
| 39471 | #endif | | |
| 39472 | | | |
| 39473 | #ifdef __LITTLE_ENDIAN__ | | |
| 39474 | __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { | | |
| 39475 | uint8x16_t __ret; | | |
| 39476 | __ret = (uint8x16_t)(__p0); | | |
| 39477 | return __ret; | | |
| 39478 | } | | |
| 39479 | #else | | |
| 39480 | __ai uint8x16_t vreinterpretq_u8_s8(int8x16_t __p0) { | | |
| 39481 | uint8x16_t __ret; | | |
| 39482 | __ret = (uint8x16_t)(__p0); | | |
| 39483 | return __ret; | | |
| 39484 | } | | |
| 39485 | #endif | | |
| 39486 | | | |
| 39487 | #ifdef __LITTLE_ENDIAN__ | | |
| 39488 | __ai uint8x16_t vreinterpretq_u8_f64(float64x2_t __p0) { | | |
| 39489 | uint8x16_t __ret; | | |
| 39490 | __ret = (uint8x16_t)(__p0); | | |
| 39491 | return __ret; | | |
| 39492 | } | | |
| 39493 | #else | | |
| 39494 | __ai uint8x16_t vreinterpretq_u8_f64(float64x2_t __p0) { | | |
| 39495 | uint8x16_t __ret; | | |
| 39496 | __ret = (uint8x16_t)(__p0); | | |
| 39497 | return __ret; | | |
| 39498 | } | | |
| 39499 | #endif | | |
| 39500 | | | |
| 39501 | #ifdef __LITTLE_ENDIAN__ | | |
| 39502 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { | | |
| 39503 | uint8x16_t __ret; | | |
| 39504 | __ret = (uint8x16_t)(__p0); | | |
| 39505 | return __ret; | | |
| 39506 | } | | |
| 39507 | #else | | |
| 39508 | __ai uint8x16_t vreinterpretq_u8_f32(float32x4_t __p0) { | | |
| 39509 | uint8x16_t __ret; | | |
| 39510 | __ret = (uint8x16_t)(__p0); | | |
| 39511 | return __ret; | | |
| 39512 | } | | |
| 39513 | #endif | | |
| 39514 | | | |
| 39515 | #ifdef __LITTLE_ENDIAN__ | | |
| 39516 | __ai uint8x16_t vreinterpretq_u8_f16(float16x8_t __p0) { | | |
| 39517 | uint8x16_t __ret; | | |
| 39518 | __ret = (uint8x16_t)(__p0); | | |
| 39519 | return __ret; | | |
| 39520 | } | | |
| 39521 | #else | | |
| 39522 | __ai uint8x16_t vreinterpretq_u8_f16(float16x8_t __p0) { | | |
| 39523 | uint8x16_t __ret; | | |
| 39524 | __ret = (uint8x16_t)(__p0); | | |
| 39525 | return __ret; | | |
| 39526 | } | | |
| 39527 | #endif | | |
| 39528 | | | |
| 39529 | #ifdef __LITTLE_ENDIAN__ | | |
| 39530 | __ai uint8x16_t vreinterpretq_u8_s32(int32x4_t __p0) { | | |
| 39531 | uint8x16_t __ret; | | |
| 39532 | __ret = (uint8x16_t)(__p0); | | |
| 39533 | return __ret; | | |
| 39534 | } | | |
| 39535 | #else | | |
| 39536 | __ai uint8x16_t vreinterpretq_u8_s32(int32x4_t __p0) { | | |
| 39537 | uint8x16_t __ret; | | |
| 39538 | __ret = (uint8x16_t)(__p0); | | |
| 39539 | return __ret; | | |
| 39540 | } | | |
| 39541 | #endif | | |
| 39542 | | | |
| 39543 | #ifdef __LITTLE_ENDIAN__ | | |
| 39544 | __ai uint8x16_t vreinterpretq_u8_s64(int64x2_t __p0) { | | |
| 39545 | uint8x16_t __ret; | | |
| 39546 | __ret = (uint8x16_t)(__p0); | | |
| 39547 | return __ret; | | |
| 39548 | } | | |
| 39549 | #else | | |
| 39550 | __ai uint8x16_t vreinterpretq_u8_s64(int64x2_t __p0) { | | |
| 39551 | uint8x16_t __ret; | | |
| 39552 | __ret = (uint8x16_t)(__p0); | | |
| 39553 | return __ret; | | |
| 39554 | } | | |
| 39555 | #endif | | |
| 39556 | | | |
| 39557 | #ifdef __LITTLE_ENDIAN__ | | |
| 39558 | __ai uint8x16_t vreinterpretq_u8_s16(int16x8_t __p0) { | | |
| 39559 | uint8x16_t __ret; | | |
| 39560 | __ret = (uint8x16_t)(__p0); | | |
| 39561 | return __ret; | | |
| 39562 | } | | |
| 39563 | #else | | |
| 39564 | __ai uint8x16_t vreinterpretq_u8_s16(int16x8_t __p0) { | 35101 | __ai uint8x16_t vreinterpretq_u8_s16(int16x8_t __p0) { |
| 39565 | uint8x16_t __ret; | 35102 | uint8x16_t __ret; |
| 39566 | __ret = (uint8x16_t)(__p0); | 35103 | __ret = (uint8x16_t)(__p0); |
| 39567 | return __ret; | 35104 | return __ret; |
| 39568 | } | 35105 | } |
| 39569 | #endif | | |
| 39570 | | | |
| 39571 | #ifdef __LITTLE_ENDIAN__ | | |
| 39572 | __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { | | |
| 39573 | uint32x4_t __ret; | | |
| 39574 | __ret = (uint32x4_t)(__p0); | | |
| 39575 | return __ret; | | |
| 39576 | } | | |
| 39577 | #else | | |
| 39578 | __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { | 35106 | __ai uint32x4_t vreinterpretq_u32_p8(poly8x16_t __p0) { |
| 39579 | uint32x4_t __ret; | 35107 | uint32x4_t __ret; |
| 39580 | __ret = (uint32x4_t)(__p0); | 35108 | __ret = (uint32x4_t)(__p0); |
| 39581 | return __ret; | 35109 | return __ret; |
| 39582 | } | 35110 | } |
| 39583 | #endif | | |
| 39584 | | | |
| 39585 | #ifdef __LITTLE_ENDIAN__ | | |
| 39586 | __ai uint32x4_t vreinterpretq_u32_p128(poly128_t __p0) { | | |
| 39587 | uint32x4_t __ret; | | |
| 39588 | __ret = (uint32x4_t)(__p0); | | |
| 39589 | return __ret; | | |
| 39590 | } | | |
| 39591 | #else | | |
| 39592 | __ai uint32x4_t vreinterpretq_u32_p128(poly128_t __p0) { | 35111 | __ai uint32x4_t vreinterpretq_u32_p128(poly128_t __p0) { |
| 39593 | uint32x4_t __ret; | 35112 | uint32x4_t __ret; |
| 39594 | __ret = (uint32x4_t)(__p0); | 35113 | __ret = (uint32x4_t)(__p0); |
| 39595 | return __ret; | 35114 | return __ret; |
| 39596 | } | 35115 | } |
| 39597 | #endif | | |
| 39598 | | | |
| 39599 | #ifdef __LITTLE_ENDIAN__ | | |
| 39600 | __ai uint32x4_t vreinterpretq_u32_p64(poly64x2_t __p0) { | | |
| 39601 | uint32x4_t __ret; | | |
| 39602 | __ret = (uint32x4_t)(__p0); | | |
| 39603 | return __ret; | | |
| 39604 | } | | |
| 39605 | #else | | |
| 39606 | __ai uint32x4_t vreinterpretq_u32_p64(poly64x2_t __p0) { | 35116 | __ai uint32x4_t vreinterpretq_u32_p64(poly64x2_t __p0) { |
| 39607 | uint32x4_t __ret; | 35117 | uint32x4_t __ret; |
| 39608 | __ret = (uint32x4_t)(__p0); | 35118 | __ret = (uint32x4_t)(__p0); |
| 39609 | return __ret; | 35119 | return __ret; |
| 39610 | } | 35120 | } |
| 39611 | #endif | | |
| 39612 | | | |
| 39613 | #ifdef __LITTLE_ENDIAN__ | | |
| 39614 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { | | |
| 39615 | uint32x4_t __ret; | | |
| 39616 | __ret = (uint32x4_t)(__p0); | | |
| 39617 | return __ret; | | |
| 39618 | } | | |
| 39619 | #else | | |
| 39620 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { | 35121 | __ai uint32x4_t vreinterpretq_u32_p16(poly16x8_t __p0) { |
| 39621 | uint32x4_t __ret; | 35122 | uint32x4_t __ret; |
| 39622 | __ret = (uint32x4_t)(__p0); | 35123 | __ret = (uint32x4_t)(__p0); |
| 39623 | return __ret; | 35124 | return __ret; |
| 39624 | } | 35125 | } |
| 39625 | #endif | | |
| 39626 | | | |
| 39627 | #ifdef __LITTLE_ENDIAN__ | | |
| 39628 | __ai uint32x4_t vreinterpretq_u32_u8(uint8x16_t __p0) { | | |
| 39629 | uint32x4_t __ret; | | |
| 39630 | __ret = (uint32x4_t)(__p0); | | |
| 39631 | return __ret; | | |
| 39632 | } | | |
| 39633 | #else | | |
| 39634 | __ai uint32x4_t vreinterpretq_u32_u8(uint8x16_t __p0) { | 35126 | __ai uint32x4_t vreinterpretq_u32_u8(uint8x16_t __p0) { |
| 39635 | uint32x4_t __ret; | 35127 | uint32x4_t __ret; |
| 39636 | __ret = (uint32x4_t)(__p0); | 35128 | __ret = (uint32x4_t)(__p0); |
| 39637 | return __ret; | 35129 | return __ret; |
| 39638 | } | 35130 | } |
| 39639 | #endif | | |
| 39640 | | | |
| 39641 | #ifdef __LITTLE_ENDIAN__ | | |
| 39642 | __ai uint32x4_t vreinterpretq_u32_u64(uint64x2_t __p0) { | | |
| 39643 | uint32x4_t __ret; | | |
| 39644 | __ret = (uint32x4_t)(__p0); | | |
| 39645 | return __ret; | | |
| 39646 | } | | |
| 39647 | #else | | |
| 39648 | __ai uint32x4_t vreinterpretq_u32_u64(uint64x2_t __p0) { | 35131 | __ai uint32x4_t vreinterpretq_u32_u64(uint64x2_t __p0) { |
| 39649 | uint32x4_t __ret; | 35132 | uint32x4_t __ret; |
| 39650 | __ret = (uint32x4_t)(__p0); | 35133 | __ret = (uint32x4_t)(__p0); |
| 39651 | return __ret; | 35134 | return __ret; |
| 39652 | } | 35135 | } |
| 39653 | #endif | | |
| 39654 | | | |
| 39655 | #ifdef __LITTLE_ENDIAN__ | | |
| 39656 | __ai uint32x4_t vreinterpretq_u32_u16(uint16x8_t __p0) { | | |
| 39657 | uint32x4_t __ret; | | |
| 39658 | __ret = (uint32x4_t)(__p0); | | |
| 39659 | return __ret; | | |
| 39660 | } | | |
| 39661 | #else | | |
| 39662 | __ai uint32x4_t vreinterpretq_u32_u16(uint16x8_t __p0) { | 35136 | __ai uint32x4_t vreinterpretq_u32_u16(uint16x8_t __p0) { |
| 39663 | uint32x4_t __ret; | 35137 | uint32x4_t __ret; |
| 39664 | __ret = (uint32x4_t)(__p0); | 35138 | __ret = (uint32x4_t)(__p0); |
| 39665 | return __ret; | 35139 | return __ret; |
| 39666 | } | 35140 | } |
| 39667 | #endif | | |
| 39668 | | | |
| 39669 | #ifdef __LITTLE_ENDIAN__ | | |
| 39670 | __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { | | |
| 39671 | uint32x4_t __ret; | | |
| 39672 | __ret = (uint32x4_t)(__p0); | | |
| 39673 | return __ret; | | |
| 39674 | } | | |
| 39675 | #else | | |
| 39676 | __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { | 35141 | __ai uint32x4_t vreinterpretq_u32_s8(int8x16_t __p0) { |
| 39677 | uint32x4_t __ret; | 35142 | uint32x4_t __ret; |
| 39678 | __ret = (uint32x4_t)(__p0); | 35143 | __ret = (uint32x4_t)(__p0); |
| 39679 | return __ret; | 35144 | return __ret; |
| 39680 | } | 35145 | } |
| 39681 | #endif | | |
| 39682 | | | |
| 39683 | #ifdef __LITTLE_ENDIAN__ | | |
| 39684 | __ai uint32x4_t vreinterpretq_u32_f64(float64x2_t __p0) { | | |
| 39685 | uint32x4_t __ret; | | |
| 39686 | __ret = (uint32x4_t)(__p0); | | |
| 39687 | return __ret; | | |
| 39688 | } | | |
| 39689 | #else | | |
| 39690 | __ai uint32x4_t vreinterpretq_u32_f64(float64x2_t __p0) { | 35146 | __ai uint32x4_t vreinterpretq_u32_f64(float64x2_t __p0) { |
| 39691 | uint32x4_t __ret; | 35147 | uint32x4_t __ret; |
| 39692 | __ret = (uint32x4_t)(__p0); | 35148 | __ret = (uint32x4_t)(__p0); |
| 39693 | return __ret; | 35149 | return __ret; |
| 39694 | } | 35150 | } |
| 39695 | #endif | | |
| 39696 | | | |
| 39697 | #ifdef __LITTLE_ENDIAN__ | | |
| 39698 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { | | |
| 39699 | uint32x4_t __ret; | | |
| 39700 | __ret = (uint32x4_t)(__p0); | | |
| 39701 | return __ret; | | |
| 39702 | } | | |
| 39703 | #else | | |
| 39704 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { | 35151 | __ai uint32x4_t vreinterpretq_u32_f32(float32x4_t __p0) { |
| 39705 | uint32x4_t __ret; | 35152 | uint32x4_t __ret; |
| 39706 | __ret = (uint32x4_t)(__p0); | 35153 | __ret = (uint32x4_t)(__p0); |
| 39707 | return __ret; | 35154 | return __ret; |
| 39708 | } | 35155 | } |
| 39709 | #endif | | |
| 39710 | | | |
| 39711 | #ifdef __LITTLE_ENDIAN__ | | |
| 39712 | __ai uint32x4_t vreinterpretq_u32_f16(float16x8_t __p0) { | | |
| 39713 | uint32x4_t __ret; | | |
| 39714 | __ret = (uint32x4_t)(__p0); | | |
| 39715 | return __ret; | | |
| 39716 | } | | |
| 39717 | #else | | |
| 39718 | __ai uint32x4_t vreinterpretq_u32_f16(float16x8_t __p0) { | 35156 | __ai uint32x4_t vreinterpretq_u32_f16(float16x8_t __p0) { |
| 39719 | uint32x4_t __ret; | 35157 | uint32x4_t __ret; |
| 39720 | __ret = (uint32x4_t)(__p0); | 35158 | __ret = (uint32x4_t)(__p0); |
| 39721 | return __ret; | 35159 | return __ret; |
| 39722 | } | 35160 | } |
| 39723 | #endif | | |
| 39724 | | | |
| 39725 | #ifdef __LITTLE_ENDIAN__ | | |
| 39726 | __ai uint32x4_t vreinterpretq_u32_s32(int32x4_t __p0) { | | |
| 39727 | uint32x4_t __ret; | | |
| 39728 | __ret = (uint32x4_t)(__p0); | | |
| 39729 | return __ret; | | |
| 39730 | } | | |
| 39731 | #else | | |
| 39732 | __ai uint32x4_t vreinterpretq_u32_s32(int32x4_t __p0) { | 35161 | __ai uint32x4_t vreinterpretq_u32_s32(int32x4_t __p0) { |
| 39733 | uint32x4_t __ret; | 35162 | uint32x4_t __ret; |
| 39734 | __ret = (uint32x4_t)(__p0); | 35163 | __ret = (uint32x4_t)(__p0); |
| 39735 | return __ret; | 35164 | return __ret; |
| 39736 | } | 35165 | } |
| 39737 | #endif | | |
| 39738 | | | |
| 39739 | #ifdef __LITTLE_ENDIAN__ | | |
| 39740 | __ai uint32x4_t vreinterpretq_u32_s64(int64x2_t __p0) { | | |
| 39741 | uint32x4_t __ret; | | |
| 39742 | __ret = (uint32x4_t)(__p0); | | |
| 39743 | return __ret; | | |
| 39744 | } | | |
| 39745 | #else | | |
| 39746 | __ai uint32x4_t vreinterpretq_u32_s64(int64x2_t __p0) { | 35166 | __ai uint32x4_t vreinterpretq_u32_s64(int64x2_t __p0) { |
| 39747 | uint32x4_t __ret; | 35167 | uint32x4_t __ret; |
| 39748 | __ret = (uint32x4_t)(__p0); | 35168 | __ret = (uint32x4_t)(__p0); |
| 39749 | return __ret; | 35169 | return __ret; |
| 39750 | } | 35170 | } |
| 39751 | #endif | | |
| 39752 | | | |
| 39753 | #ifdef __LITTLE_ENDIAN__ | | |
| 39754 | __ai uint32x4_t vreinterpretq_u32_s16(int16x8_t __p0) { | | |
| 39755 | uint32x4_t __ret; | | |
| 39756 | __ret = (uint32x4_t)(__p0); | | |
| 39757 | return __ret; | | |
| 39758 | } | | |
| 39759 | #else | | |
| 39760 | __ai uint32x4_t vreinterpretq_u32_s16(int16x8_t __p0) { | 35171 | __ai uint32x4_t vreinterpretq_u32_s16(int16x8_t __p0) { |
| 39761 | uint32x4_t __ret; | 35172 | uint32x4_t __ret; |
| 39762 | __ret = (uint32x4_t)(__p0); | 35173 | __ret = (uint32x4_t)(__p0); |
| 39763 | return __ret; | 35174 | return __ret; |
| 39764 | } | 35175 | } |
| 39765 | #endif | | |
| 39766 | | | |
| 39767 | #ifdef __LITTLE_ENDIAN__ | | |
| 39768 | __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { | | |
| 39769 | uint64x2_t __ret; | | |
| 39770 | __ret = (uint64x2_t)(__p0); | | |
| 39771 | return __ret; | | |
| 39772 | } | | |
| 39773 | #else | | |
| 39774 | __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { | 35176 | __ai uint64x2_t vreinterpretq_u64_p8(poly8x16_t __p0) { |
| 39775 | uint64x2_t __ret; | 35177 | uint64x2_t __ret; |
| 39776 | __ret = (uint64x2_t)(__p0); | 35178 | __ret = (uint64x2_t)(__p0); |
| 39777 | return __ret; | 35179 | return __ret; |
| 39778 | } | 35180 | } |
| 39779 | #endif | | |
| 39780 | | | |
| 39781 | #ifdef __LITTLE_ENDIAN__ | | |
| 39782 | __ai uint64x2_t vreinterpretq_u64_p128(poly128_t __p0) { | | |
| 39783 | uint64x2_t __ret; | | |
| 39784 | __ret = (uint64x2_t)(__p0); | | |
| 39785 | return __ret; | | |
| 39786 | } | | |
| 39787 | #else | | |
| 39788 | __ai uint64x2_t vreinterpretq_u64_p128(poly128_t __p0) { | 35181 | __ai uint64x2_t vreinterpretq_u64_p128(poly128_t __p0) { |
| 39789 | uint64x2_t __ret; | 35182 | uint64x2_t __ret; |
| 39790 | __ret = (uint64x2_t)(__p0); | 35183 | __ret = (uint64x2_t)(__p0); |
| 39791 | return __ret; | 35184 | return __ret; |
| 39792 | } | 35185 | } |
| 39793 | #endif | | |
| 39794 | | | |
| 39795 | #ifdef __LITTLE_ENDIAN__ | | |
| 39796 | __ai uint64x2_t vreinterpretq_u64_p64(poly64x2_t __p0) { | | |
| 39797 | uint64x2_t __ret; | | |
| 39798 | __ret = (uint64x2_t)(__p0); | | |
| 39799 | return __ret; | | |
| 39800 | } | | |
| 39801 | #else | | |
| 39802 | __ai uint64x2_t vreinterpretq_u64_p64(poly64x2_t __p0) { | 35186 | __ai uint64x2_t vreinterpretq_u64_p64(poly64x2_t __p0) { |
| 39803 | uint64x2_t __ret; | 35187 | uint64x2_t __ret; |
| 39804 | __ret = (uint64x2_t)(__p0); | 35188 | __ret = (uint64x2_t)(__p0); |
| 39805 | return __ret; | 35189 | return __ret; |
| 39806 | } | 35190 | } |
| 39807 | #endif | | |
| 39808 | | | |
| 39809 | #ifdef __LITTLE_ENDIAN__ | | |
| 39810 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { | | |
| 39811 | uint64x2_t __ret; | | |
| 39812 | __ret = (uint64x2_t)(__p0); | | |
| 39813 | return __ret; | | |
| 39814 | } | | |
| 39815 | #else | | |
| 39816 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { | 35191 | __ai uint64x2_t vreinterpretq_u64_p16(poly16x8_t __p0) { |
| 39817 | uint64x2_t __ret; | 35192 | uint64x2_t __ret; |
| 39818 | __ret = (uint64x2_t)(__p0); | 35193 | __ret = (uint64x2_t)(__p0); |
| 39819 | return __ret; | 35194 | return __ret; |
| 39820 | } | 35195 | } |
| 39821 | #endif | | |
| 39822 | | | |
| 39823 | #ifdef __LITTLE_ENDIAN__ | | |
| 39824 | __ai uint64x2_t vreinterpretq_u64_u8(uint8x16_t __p0) { | | |
| 39825 | uint64x2_t __ret; | | |
| 39826 | __ret = (uint64x2_t)(__p0); | | |
| 39827 | return __ret; | | |
| 39828 | } | | |
| 39829 | #else | | |
| 39830 | __ai uint64x2_t vreinterpretq_u64_u8(uint8x16_t __p0) { | 35196 | __ai uint64x2_t vreinterpretq_u64_u8(uint8x16_t __p0) { |
| 39831 | uint64x2_t __ret; | 35197 | uint64x2_t __ret; |
| 39832 | __ret = (uint64x2_t)(__p0); | 35198 | __ret = (uint64x2_t)(__p0); |
| 39833 | return __ret; | 35199 | return __ret; |
| 39834 | } | 35200 | } |
| 39835 | #endif | | |
| 39836 | | | |
| 39837 | #ifdef __LITTLE_ENDIAN__ | | |
| 39838 | __ai uint64x2_t vreinterpretq_u64_u32(uint32x4_t __p0) { | | |
| 39839 | uint64x2_t __ret; | | |
| 39840 | __ret = (uint64x2_t)(__p0); | | |
| 39841 | return __ret; | | |
| 39842 | } | | |
| 39843 | #else | | |
| 39844 | __ai uint64x2_t vreinterpretq_u64_u32(uint32x4_t __p0) { | 35201 | __ai uint64x2_t vreinterpretq_u64_u32(uint32x4_t __p0) { |
| 39845 | uint64x2_t __ret; | 35202 | uint64x2_t __ret; |
| 39846 | __ret = (uint64x2_t)(__p0); | 35203 | __ret = (uint64x2_t)(__p0); |
| 39847 | return __ret; | 35204 | return __ret; |
| 39848 | } | 35205 | } |
| 39849 | #endif | | |
| 39850 | | | |
| 39851 | #ifdef __LITTLE_ENDIAN__ | | |
| 39852 | __ai uint64x2_t vreinterpretq_u64_u16(uint16x8_t __p0) { | | |
| 39853 | uint64x2_t __ret; | | |
| 39854 | __ret = (uint64x2_t)(__p0); | | |
| 39855 | return __ret; | | |
| 39856 | } | | |
| 39857 | #else | | |
| 39858 | __ai uint64x2_t vreinterpretq_u64_u16(uint16x8_t __p0) { | 35206 | __ai uint64x2_t vreinterpretq_u64_u16(uint16x8_t __p0) { |
| 39859 | uint64x2_t __ret; | 35207 | uint64x2_t __ret; |
| 39860 | __ret = (uint64x2_t)(__p0); | 35208 | __ret = (uint64x2_t)(__p0); |
| 39861 | return __ret; | 35209 | return __ret; |
| 39862 | } | 35210 | } |
| 39863 | #endif | | |
| 39864 | | | |
| 39865 | #ifdef __LITTLE_ENDIAN__ | | |
| 39866 | __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { | | |
| 39867 | uint64x2_t __ret; | | |
| 39868 | __ret = (uint64x2_t)(__p0); | | |
| 39869 | return __ret; | | |
| 39870 | } | | |
| 39871 | #else | | |
| 39872 | __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { | 35211 | __ai uint64x2_t vreinterpretq_u64_s8(int8x16_t __p0) { |
| 39873 | uint64x2_t __ret; | 35212 | uint64x2_t __ret; |
| 39874 | __ret = (uint64x2_t)(__p0); | 35213 | __ret = (uint64x2_t)(__p0); |
| 39875 | return __ret; | 35214 | return __ret; |
| 39876 | } | 35215 | } |
| 39877 | #endif | | |
| 39878 | | | |
| 39879 | #ifdef __LITTLE_ENDIAN__ | | |
| 39880 | __ai uint64x2_t vreinterpretq_u64_f64(float64x2_t __p0) { | | |
| 39881 | uint64x2_t __ret; | | |
| 39882 | __ret = (uint64x2_t)(__p0); | | |
| 39883 | return __ret; | | |
| 39884 | } | | |
| 39885 | #else | | |
| 39886 | __ai uint64x2_t vreinterpretq_u64_f64(float64x2_t __p0) { | 35216 | __ai uint64x2_t vreinterpretq_u64_f64(float64x2_t __p0) { |
| 39887 | uint64x2_t __ret; | 35217 | uint64x2_t __ret; |
| 39888 | __ret = (uint64x2_t)(__p0); | 35218 | __ret = (uint64x2_t)(__p0); |
| 39889 | return __ret; | 35219 | return __ret; |
| 39890 | } | 35220 | } |
| 39891 | #endif | | |
| 39892 | | | |
| 39893 | #ifdef __LITTLE_ENDIAN__ | | |
| 39894 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { | | |
| 39895 | uint64x2_t __ret; | | |
| 39896 | __ret = (uint64x2_t)(__p0); | | |
| 39897 | return __ret; | | |
| 39898 | } | | |
| 39899 | #else | | |
| 39900 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { | 35221 | __ai uint64x2_t vreinterpretq_u64_f32(float32x4_t __p0) { |
| 39901 | uint64x2_t __ret; | 35222 | uint64x2_t __ret; |
| 39902 | __ret = (uint64x2_t)(__p0); | 35223 | __ret = (uint64x2_t)(__p0); |
| 39903 | return __ret; | 35224 | return __ret; |
| 39904 | } | 35225 | } |
| 39905 | #endif | | |
| 39906 | | | |
| 39907 | #ifdef __LITTLE_ENDIAN__ | | |
| 39908 | __ai uint64x2_t vreinterpretq_u64_f16(float16x8_t __p0) { | | |
| 39909 | uint64x2_t __ret; | | |
| 39910 | __ret = (uint64x2_t)(__p0); | | |
| 39911 | return __ret; | | |
| 39912 | } | | |
| 39913 | #else | | |
| 39914 | __ai uint64x2_t vreinterpretq_u64_f16(float16x8_t __p0) { | 35226 | __ai uint64x2_t vreinterpretq_u64_f16(float16x8_t __p0) { |
| 39915 | uint64x2_t __ret; | 35227 | uint64x2_t __ret; |
| 39916 | __ret = (uint64x2_t)(__p0); | 35228 | __ret = (uint64x2_t)(__p0); |
| 39917 | return __ret; | 35229 | return __ret; |
| 39918 | } | 35230 | } |
| 39919 | #endif | | |
| 39920 | | | |
| 39921 | #ifdef __LITTLE_ENDIAN__ | | |
| 39922 | __ai uint64x2_t vreinterpretq_u64_s32(int32x4_t __p0) { | | |
| 39923 | uint64x2_t __ret; | | |
| 39924 | __ret = (uint64x2_t)(__p0); | | |
| 39925 | return __ret; | | |
| 39926 | } | | |
| 39927 | #else | | |
| 39928 | __ai uint64x2_t vreinterpretq_u64_s32(int32x4_t __p0) { | 35231 | __ai uint64x2_t vreinterpretq_u64_s32(int32x4_t __p0) { |
| 39929 | uint64x2_t __ret; | 35232 | uint64x2_t __ret; |
| 39930 | __ret = (uint64x2_t)(__p0); | 35233 | __ret = (uint64x2_t)(__p0); |
| 39931 | return __ret; | 35234 | return __ret; |
| 39932 | } | 35235 | } |
| 39933 | #endif | | |
| 39934 | | | |
| 39935 | #ifdef __LITTLE_ENDIAN__ | | |
| 39936 | __ai uint64x2_t vreinterpretq_u64_s64(int64x2_t __p0) { | | |
| 39937 | uint64x2_t __ret; | | |
| 39938 | __ret = (uint64x2_t)(__p0); | | |
| 39939 | return __ret; | | |
| 39940 | } | | |
| 39941 | #else | | |
| 39942 | __ai uint64x2_t vreinterpretq_u64_s64(int64x2_t __p0) { | 35236 | __ai uint64x2_t vreinterpretq_u64_s64(int64x2_t __p0) { |
| 39943 | uint64x2_t __ret; | 35237 | uint64x2_t __ret; |
| 39944 | __ret = (uint64x2_t)(__p0); | 35238 | __ret = (uint64x2_t)(__p0); |
| 39945 | return __ret; | 35239 | return __ret; |
| 39946 | } | 35240 | } |
| 39947 | #endif | | |
| 39948 | | | |
| 39949 | #ifdef __LITTLE_ENDIAN__ | | |
| 39950 | __ai uint64x2_t vreinterpretq_u64_s16(int16x8_t __p0) { | | |
| 39951 | uint64x2_t __ret; | | |
| 39952 | __ret = (uint64x2_t)(__p0); | | |
| 39953 | return __ret; | | |
| 39954 | } | | |
| 39955 | #else | | |
| 39956 | __ai uint64x2_t vreinterpretq_u64_s16(int16x8_t __p0) { | 35241 | __ai uint64x2_t vreinterpretq_u64_s16(int16x8_t __p0) { |
| 39957 | uint64x2_t __ret; | 35242 | uint64x2_t __ret; |
| 39958 | __ret = (uint64x2_t)(__p0); | 35243 | __ret = (uint64x2_t)(__p0); |
| 39959 | return __ret; | 35244 | return __ret; |
| 39960 | } | 35245 | } |
| 39961 | #endif | | |
| 39962 | | | |
| 39963 | #ifdef __LITTLE_ENDIAN__ | | |
| 39964 | __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { | | |
| 39965 | uint16x8_t __ret; | | |
| 39966 | __ret = (uint16x8_t)(__p0); | | |
| 39967 | return __ret; | | |
| 39968 | } | | |
| 39969 | #else | | |
| 39970 | __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { | 35246 | __ai uint16x8_t vreinterpretq_u16_p8(poly8x16_t __p0) { |
| 39971 | uint16x8_t __ret; | 35247 | uint16x8_t __ret; |
| 39972 | __ret = (uint16x8_t)(__p0); | 35248 | __ret = (uint16x8_t)(__p0); |
| 39973 | return __ret; | 35249 | return __ret; |
| 39974 | } | 35250 | } |
| 39975 | #endif | | |
| 39976 | | | |
| 39977 | #ifdef __LITTLE_ENDIAN__ | | |
| 39978 | __ai uint16x8_t vreinterpretq_u16_p128(poly128_t __p0) { | | |
| 39979 | uint16x8_t __ret; | | |
| 39980 | __ret = (uint16x8_t)(__p0); | | |
| 39981 | return __ret; | | |
| 39982 | } | | |
| 39983 | #else | | |
| 39984 | __ai uint16x8_t vreinterpretq_u16_p128(poly128_t __p0) { | 35251 | __ai uint16x8_t vreinterpretq_u16_p128(poly128_t __p0) { |
| 39985 | uint16x8_t __ret; | 35252 | uint16x8_t __ret; |
| 39986 | __ret = (uint16x8_t)(__p0); | 35253 | __ret = (uint16x8_t)(__p0); |
| 39987 | return __ret; | 35254 | return __ret; |
| 39988 | } | 35255 | } |
| 39989 | #endif | | |
| 39990 | | | |
| 39991 | #ifdef __LITTLE_ENDIAN__ | | |
| 39992 | __ai uint16x8_t vreinterpretq_u16_p64(poly64x2_t __p0) { | | |
| 39993 | uint16x8_t __ret; | | |
| 39994 | __ret = (uint16x8_t)(__p0); | | |
| 39995 | return __ret; | | |
| 39996 | } | | |
| 39997 | #else | | |
| 39998 | __ai uint16x8_t vreinterpretq_u16_p64(poly64x2_t __p0) { | 35256 | __ai uint16x8_t vreinterpretq_u16_p64(poly64x2_t __p0) { |
| 39999 | uint16x8_t __ret; | 35257 | uint16x8_t __ret; |
| 40000 | __ret = (uint16x8_t)(__p0); | 35258 | __ret = (uint16x8_t)(__p0); |
| 40001 | return __ret; | 35259 | return __ret; |
| 40002 | } | 35260 | } |
| 40003 | #endif | | |
| 40004 | | | |
| 40005 | #ifdef __LITTLE_ENDIAN__ | | |
| 40006 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { | | |
| 40007 | uint16x8_t __ret; | | |
| 40008 | __ret = (uint16x8_t)(__p0); | | |
| 40009 | return __ret; | | |
| 40010 | } | | |
| 40011 | #else | | |
| 40012 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { | 35261 | __ai uint16x8_t vreinterpretq_u16_p16(poly16x8_t __p0) { |
| 40013 | uint16x8_t __ret; | 35262 | uint16x8_t __ret; |
| 40014 | __ret = (uint16x8_t)(__p0); | 35263 | __ret = (uint16x8_t)(__p0); |
| 40015 | return __ret; | 35264 | return __ret; |
| 40016 | } | 35265 | } |
| 40017 | #endif | | |
| 40018 | | | |
| 40019 | #ifdef __LITTLE_ENDIAN__ | | |
| 40020 | __ai uint16x8_t vreinterpretq_u16_u8(uint8x16_t __p0) { | | |
| 40021 | uint16x8_t __ret; | | |
| 40022 | __ret = (uint16x8_t)(__p0); | | |
| 40023 | return __ret; | | |
| 40024 | } | | |
| 40025 | #else | | |
| 40026 | __ai uint16x8_t vreinterpretq_u16_u8(uint8x16_t __p0) { | 35266 | __ai uint16x8_t vreinterpretq_u16_u8(uint8x16_t __p0) { |
| 40027 | uint16x8_t __ret; | 35267 | uint16x8_t __ret; |
| 40028 | __ret = (uint16x8_t)(__p0); | 35268 | __ret = (uint16x8_t)(__p0); |
| 40029 | return __ret; | 35269 | return __ret; |
| 40030 | } | 35270 | } |
| 40031 | #endif | | |
| 40032 | | | |
| 40033 | #ifdef __LITTLE_ENDIAN__ | | |
| 40034 | __ai uint16x8_t vreinterpretq_u16_u32(uint32x4_t __p0) { | | |
| 40035 | uint16x8_t __ret; | | |
| 40036 | __ret = (uint16x8_t)(__p0); | | |
| 40037 | return __ret; | | |
| 40038 | } | | |
| 40039 | #else | | |
| 40040 | __ai uint16x8_t vreinterpretq_u16_u32(uint32x4_t __p0) { | 35271 | __ai uint16x8_t vreinterpretq_u16_u32(uint32x4_t __p0) { |
| 40041 | uint16x8_t __ret; | 35272 | uint16x8_t __ret; |
| 40042 | __ret = (uint16x8_t)(__p0); | 35273 | __ret = (uint16x8_t)(__p0); |
| 40043 | return __ret; | 35274 | return __ret; |
| 40044 | } | 35275 | } |
| 40045 | #endif | | |
| 40046 | | | |
| 40047 | #ifdef __LITTLE_ENDIAN__ | | |
| 40048 | __ai uint16x8_t vreinterpretq_u16_u64(uint64x2_t __p0) { | | |
| 40049 | uint16x8_t __ret; | | |
| 40050 | __ret = (uint16x8_t)(__p0); | | |
| 40051 | return __ret; | | |
| 40052 | } | | |
| 40053 | #else | | |
| 40054 | __ai uint16x8_t vreinterpretq_u16_u64(uint64x2_t __p0) { | 35276 | __ai uint16x8_t vreinterpretq_u16_u64(uint64x2_t __p0) { |
| 40055 | uint16x8_t __ret; | 35277 | uint16x8_t __ret; |
| 40056 | __ret = (uint16x8_t)(__p0); | 35278 | __ret = (uint16x8_t)(__p0); |
| 40057 | return __ret; | 35279 | return __ret; |
| 40058 | } | 35280 | } |
| 40059 | #endif | | |
| 40060 | | | |
| 40061 | #ifdef __LITTLE_ENDIAN__ | | |
| 40062 | __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { | | |
| 40063 | uint16x8_t __ret; | | |
| 40064 | __ret = (uint16x8_t)(__p0); | | |
| 40065 | return __ret; | | |
| 40066 | } | | |
| 40067 | #else | | |
| 40068 | __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { | 35281 | __ai uint16x8_t vreinterpretq_u16_s8(int8x16_t __p0) { |
| 40069 | uint16x8_t __ret; | 35282 | uint16x8_t __ret; |
| 40070 | __ret = (uint16x8_t)(__p0); | 35283 | __ret = (uint16x8_t)(__p0); |
| 40071 | return __ret; | 35284 | return __ret; |
| 40072 | } | 35285 | } |
| 40073 | #endif | | |
| 40074 | | | |
| 40075 | #ifdef __LITTLE_ENDIAN__ | | |
| 40076 | __ai uint16x8_t vreinterpretq_u16_f64(float64x2_t __p0) { | | |
| 40077 | uint16x8_t __ret; | | |
| 40078 | __ret = (uint16x8_t)(__p0); | | |
| 40079 | return __ret; | | |
| 40080 | } | | |
| 40081 | #else | | |
| 40082 | __ai uint16x8_t vreinterpretq_u16_f64(float64x2_t __p0) { | 35286 | __ai uint16x8_t vreinterpretq_u16_f64(float64x2_t __p0) { |
| 40083 | uint16x8_t __ret; | 35287 | uint16x8_t __ret; |
| 40084 | __ret = (uint16x8_t)(__p0); | 35288 | __ret = (uint16x8_t)(__p0); |
| 40085 | return __ret; | 35289 | return __ret; |
| 40086 | } | 35290 | } |
| 40087 | #endif | | |
| 40088 | | | |
| 40089 | #ifdef __LITTLE_ENDIAN__ | | |
| 40090 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { | | |
| 40091 | uint16x8_t __ret; | | |
| 40092 | __ret = (uint16x8_t)(__p0); | | |
| 40093 | return __ret; | | |
| 40094 | } | | |
| 40095 | #else | | |
| 40096 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { | 35291 | __ai uint16x8_t vreinterpretq_u16_f32(float32x4_t __p0) { |
| 40097 | uint16x8_t __ret; | 35292 | uint16x8_t __ret; |
| 40098 | __ret = (uint16x8_t)(__p0); | 35293 | __ret = (uint16x8_t)(__p0); |
| 40099 | return __ret; | 35294 | return __ret; |
| 40100 | } | 35295 | } |
| 40101 | #endif | | |
| 40102 | | | |
| 40103 | #ifdef __LITTLE_ENDIAN__ | | |
| 40104 | __ai uint16x8_t vreinterpretq_u16_f16(float16x8_t __p0) { | | |
| 40105 | uint16x8_t __ret; | | |
| 40106 | __ret = (uint16x8_t)(__p0); | | |
| 40107 | return __ret; | | |
| 40108 | } | | |
| 40109 | #else | | |
| 40110 | __ai uint16x8_t vreinterpretq_u16_f16(float16x8_t __p0) { | 35296 | __ai uint16x8_t vreinterpretq_u16_f16(float16x8_t __p0) { |
| 40111 | uint16x8_t __ret; | 35297 | uint16x8_t __ret; |
| 40112 | __ret = (uint16x8_t)(__p0); | 35298 | __ret = (uint16x8_t)(__p0); |
| 40113 | return __ret; | 35299 | return __ret; |
| 40114 | } | 35300 | } |
| 40115 | #endif | | |
| 40116 | | | |
| 40117 | #ifdef __LITTLE_ENDIAN__ | | |
| 40118 | __ai uint16x8_t vreinterpretq_u16_s32(int32x4_t __p0) { | | |
| 40119 | uint16x8_t __ret; | | |
| 40120 | __ret = (uint16x8_t)(__p0); | | |
| 40121 | return __ret; | | |
| 40122 | } | | |
| 40123 | #else | | |
| 40124 | __ai uint16x8_t vreinterpretq_u16_s32(int32x4_t __p0) { | 35301 | __ai uint16x8_t vreinterpretq_u16_s32(int32x4_t __p0) { |
| 40125 | uint16x8_t __ret; | 35302 | uint16x8_t __ret; |
| 40126 | __ret = (uint16x8_t)(__p0); | 35303 | __ret = (uint16x8_t)(__p0); |
| 40127 | return __ret; | 35304 | return __ret; |
| 40128 | } | 35305 | } |
| 40129 | #endif | | |
| 40130 | | | |
| 40131 | #ifdef __LITTLE_ENDIAN__ | | |
| 40132 | __ai uint16x8_t vreinterpretq_u16_s64(int64x2_t __p0) { | | |
| 40133 | uint16x8_t __ret; | | |
| 40134 | __ret = (uint16x8_t)(__p0); | | |
| 40135 | return __ret; | | |
| 40136 | } | | |
| 40137 | #else | | |
| 40138 | __ai uint16x8_t vreinterpretq_u16_s64(int64x2_t __p0) { | 35306 | __ai uint16x8_t vreinterpretq_u16_s64(int64x2_t __p0) { |
| 40139 | uint16x8_t __ret; | 35307 | uint16x8_t __ret; |
| 40140 | __ret = (uint16x8_t)(__p0); | 35308 | __ret = (uint16x8_t)(__p0); |
| 40141 | return __ret; | 35309 | return __ret; |
| 40142 | } | 35310 | } |
| 40143 | #endif | | |
| 40144 | | | |
| 40145 | #ifdef __LITTLE_ENDIAN__ | | |
| 40146 | __ai uint16x8_t vreinterpretq_u16_s16(int16x8_t __p0) { | | |
| 40147 | uint16x8_t __ret; | | |
| 40148 | __ret = (uint16x8_t)(__p0); | | |
| 40149 | return __ret; | | |
| 40150 | } | | |
| 40151 | #else | | |
| 40152 | __ai uint16x8_t vreinterpretq_u16_s16(int16x8_t __p0) { | 35311 | __ai uint16x8_t vreinterpretq_u16_s16(int16x8_t __p0) { |
| 40153 | uint16x8_t __ret; | 35312 | uint16x8_t __ret; |
| 40154 | __ret = (uint16x8_t)(__p0); | 35313 | __ret = (uint16x8_t)(__p0); |
| 40155 | return __ret; | 35314 | return __ret; |
| 40156 | } | 35315 | } |
| 40157 | #endif | | |
| 40158 | | | |
| 40159 | #ifdef __LITTLE_ENDIAN__ | | |
| 40160 | __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { | 35316 | __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { |
| 40161 | int8x16_t __ret; | 35317 | int8x16_t __ret; |
| 40162 | __ret = (int8x16_t)(__p0); | 35318 | __ret = (int8x16_t)(__p0); |
| 40163 | return __ret; | 35319 | return __ret; |
| 40164 | } | 35320 | } |
| 40165 | #else | 35321 | __ai int8x16_t vreinterpretq_s8_p128(poly128_t __p0) { |
| 40166 | __ai int8x16_t vreinterpretq_s8_p8(poly8x16_t __p0) { | | |
| 40167 | int8x16_t __ret; | 35322 | int8x16_t __ret; |
| 40168 | __ret = (int8x16_t)(__p0); | 35323 | __ret = (int8x16_t)(__p0); |
| 40169 | return __ret; | 35324 | return __ret; |
| 40170 | } | 35325 | } |
| 40171 | #endif | 35326 | __ai int8x16_t vreinterpretq_s8_p64(poly64x2_t __p0) { |
| 40172 | | | |
| 40173 | #ifdef __LITTLE_ENDIAN__ | | |
| 40174 | __ai int8x16_t vreinterpretq_s8_p128(poly128_t __p0) { | | |
| 40175 | int8x16_t __ret; | 35327 | int8x16_t __ret; |
| 40176 | __ret = (int8x16_t)(__p0); | 35328 | __ret = (int8x16_t)(__p0); |
| 40177 | return __ret; | 35329 | return __ret; |
| 40178 | } | 35330 | } |
| 40179 | #else | 35331 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { |
| 40180 | __ai int8x16_t vreinterpretq_s8_p128(poly128_t __p0) { | | |
| 40181 | int8x16_t __ret; | 35332 | int8x16_t __ret; |
| 40182 | __ret = (int8x16_t)(__p0); | 35333 | __ret = (int8x16_t)(__p0); |
| 40183 | return __ret; | 35334 | return __ret; |
| 40184 | } | 35335 | } |
| 40185 | #endif | 35336 | __ai int8x16_t vreinterpretq_s8_u8(uint8x16_t __p0) { |
| 40186 | | | |
| 40187 | #ifdef __LITTLE_ENDIAN__ | | |
| 40188 | __ai int8x16_t vreinterpretq_s8_p64(poly64x2_t __p0) { | | |
| 40189 | int8x16_t __ret; | 35337 | int8x16_t __ret; |
| 40190 | __ret = (int8x16_t)(__p0); | 35338 | __ret = (int8x16_t)(__p0); |
| 40191 | return __ret; | 35339 | return __ret; |
| 40192 | } | 35340 | } |
| 40193 | #else | 35341 | __ai int8x16_t vreinterpretq_s8_u32(uint32x4_t __p0) { |
| 40194 | __ai int8x16_t vreinterpretq_s8_p64(poly64x2_t __p0) { | | |
| 40195 | int8x16_t __ret; | 35342 | int8x16_t __ret; |
| 40196 | __ret = (int8x16_t)(__p0); | 35343 | __ret = (int8x16_t)(__p0); |
| 40197 | return __ret; | 35344 | return __ret; |
| 40198 | } | 35345 | } |
| 40199 | #endif | 35346 | __ai int8x16_t vreinterpretq_s8_u64(uint64x2_t __p0) { |
| 40200 | | | |
| 40201 | #ifdef __LITTLE_ENDIAN__ | | |
| 40202 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { | | |
| 40203 | int8x16_t __ret; | 35347 | int8x16_t __ret; |
| 40204 | __ret = (int8x16_t)(__p0); | 35348 | __ret = (int8x16_t)(__p0); |
| 40205 | return __ret; | 35349 | return __ret; |
| 40206 | } | 35350 | } |
| 40207 | #else | 35351 | __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { |
| 40208 | __ai int8x16_t vreinterpretq_s8_p16(poly16x8_t __p0) { | | |
| 40209 | int8x16_t __ret; | 35352 | int8x16_t __ret; |
| 40210 | __ret = (int8x16_t)(__p0); | 35353 | __ret = (int8x16_t)(__p0); |
| 40211 | return __ret; | 35354 | return __ret; |
| 40212 | } | 35355 | } |
| 40213 | #endif | 35356 | __ai int8x16_t vreinterpretq_s8_f64(float64x2_t __p0) { |
| 40214 | | | |
| 40215 | #ifdef __LITTLE_ENDIAN__ | | |
| 40216 | __ai int8x16_t vreinterpretq_s8_u8(uint8x16_t __p0) { | | |
| 40217 | int8x16_t __ret; | 35357 | int8x16_t __ret; |
| 40218 | __ret = (int8x16_t)(__p0); | 35358 | __ret = (int8x16_t)(__p0); |
| 40219 | return __ret; | 35359 | return __ret; |
| 40220 | } | 35360 | } |
| 40221 | #else | | |
| 40222 | __ai int8x16_t vreinterpretq_s8_u8(uint8x16_t __p0) { | | |
| 40223 | int8x16_t __ret; | | |
| 40224 | __ret = (int8x16_t)(__p0); | | |
| 40225 | return __ret; | | |
| 40226 | } | | |
| 40227 | #endif | | |
| 40228 | | | |
| 40229 | #ifdef __LITTLE_ENDIAN__ | | |
| 40230 | __ai int8x16_t vreinterpretq_s8_u32(uint32x4_t __p0) { | | |
| 40231 | int8x16_t __ret; | | |
| 40232 | __ret = (int8x16_t)(__p0); | | |
| 40233 | return __ret; | | |
| 40234 | } | | |
| 40235 | #else | | |
| 40236 | __ai int8x16_t vreinterpretq_s8_u32(uint32x4_t __p0) { | | |
| 40237 | int8x16_t __ret; | | |
| 40238 | __ret = (int8x16_t)(__p0); | | |
| 40239 | return __ret; | | |
| 40240 | } | | |
| 40241 | #endif | | |
| 40242 | | | |
| 40243 | #ifdef __LITTLE_ENDIAN__ | | |
| 40244 | __ai int8x16_t vreinterpretq_s8_u64(uint64x2_t __p0) { | | |
| 40245 | int8x16_t __ret; | | |
| 40246 | __ret = (int8x16_t)(__p0); | | |
| 40247 | return __ret; | | |
| 40248 | } | | |
| 40249 | #else | | |
| 40250 | __ai int8x16_t vreinterpretq_s8_u64(uint64x2_t __p0) { | | |
| 40251 | int8x16_t __ret; | | |
| 40252 | __ret = (int8x16_t)(__p0); | | |
| 40253 | return __ret; | | |
| 40254 | } | | |
| 40255 | #endif | | |
| 40256 | | | |
| 40257 | #ifdef __LITTLE_ENDIAN__ | | |
| 40258 | __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { | | |
| 40259 | int8x16_t __ret; | | |
| 40260 | __ret = (int8x16_t)(__p0); | | |
| 40261 | return __ret; | | |
| 40262 | } | | |
| 40263 | #else | | |
| 40264 | __ai int8x16_t vreinterpretq_s8_u16(uint16x8_t __p0) { | | |
| 40265 | int8x16_t __ret; | | |
| 40266 | __ret = (int8x16_t)(__p0); | | |
| 40267 | return __ret; | | |
| 40268 | } | | |
| 40269 | #endif | | |
| 40270 | | | |
| 40271 | #ifdef __LITTLE_ENDIAN__ | | |
| 40272 | __ai int8x16_t vreinterpretq_s8_f64(float64x2_t __p0) { | | |
| 40273 | int8x16_t __ret; | | |
| 40274 | __ret = (int8x16_t)(__p0); | | |
| 40275 | return __ret; | | |
| 40276 | } | | |
| 40277 | #else | | |
| 40278 | __ai int8x16_t vreinterpretq_s8_f64(float64x2_t __p0) { | | |
| 40279 | int8x16_t __ret; | | |
| 40280 | __ret = (int8x16_t)(__p0); | | |
| 40281 | return __ret; | | |
| 40282 | } | | |
| 40283 | #endif | | |
| 40284 | | | |
| 40285 | #ifdef __LITTLE_ENDIAN__ | | |
| 40286 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { | | |
| 40287 | int8x16_t __ret; | | |
| 40288 | __ret = (int8x16_t)(__p0); | | |
| 40289 | return __ret; | | |
| 40290 | } | | |
| 40291 | #else | | |
| 40292 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { | 35361 | __ai int8x16_t vreinterpretq_s8_f32(float32x4_t __p0) { |
| 40293 | int8x16_t __ret; | 35362 | int8x16_t __ret; |
| 40294 | __ret = (int8x16_t)(__p0); | 35363 | __ret = (int8x16_t)(__p0); |
| 40295 | return __ret; | 35364 | return __ret; |
| 40296 | } | 35365 | } |
| 40297 | #endif | | |
| 40298 | | | |
| 40299 | #ifdef __LITTLE_ENDIAN__ | | |
| 40300 | __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { | | |
| 40301 | int8x16_t __ret; | | |
| 40302 | __ret = (int8x16_t)(__p0); | | |
| 40303 | return __ret; | | |
| 40304 | } | | |
| 40305 | #else | | |
| 40306 | __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { | 35366 | __ai int8x16_t vreinterpretq_s8_f16(float16x8_t __p0) { |
| 40307 | int8x16_t __ret; | 35367 | int8x16_t __ret; |
| 40308 | __ret = (int8x16_t)(__p0); | 35368 | __ret = (int8x16_t)(__p0); |
| 40309 | return __ret; | 35369 | return __ret; |
| 40310 | } | 35370 | } |
| 40311 | #endif | | |
| 40312 | | | |
| 40313 | #ifdef __LITTLE_ENDIAN__ | | |
| 40314 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { | | |
| 40315 | int8x16_t __ret; | | |
| 40316 | __ret = (int8x16_t)(__p0); | | |
| 40317 | return __ret; | | |
| 40318 | } | | |
| 40319 | #else | | |
| 40320 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { | 35371 | __ai int8x16_t vreinterpretq_s8_s32(int32x4_t __p0) { |
| 40321 | int8x16_t __ret; | 35372 | int8x16_t __ret; |
| 40322 | __ret = (int8x16_t)(__p0); | 35373 | __ret = (int8x16_t)(__p0); |
| 40323 | return __ret; | 35374 | return __ret; |
| 40324 | } | 35375 | } |
| 40325 | #endif | | |
| 40326 | | | |
| 40327 | #ifdef __LITTLE_ENDIAN__ | | |
| 40328 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { | | |
| 40329 | int8x16_t __ret; | | |
| 40330 | __ret = (int8x16_t)(__p0); | | |
| 40331 | return __ret; | | |
| 40332 | } | | |
| 40333 | #else | | |
| 40334 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { | 35376 | __ai int8x16_t vreinterpretq_s8_s64(int64x2_t __p0) { |
| 40335 | int8x16_t __ret; | 35377 | int8x16_t __ret; |
| 40336 | __ret = (int8x16_t)(__p0); | 35378 | __ret = (int8x16_t)(__p0); |
| 40337 | return __ret; | 35379 | return __ret; |
| 40338 | } | 35380 | } |
| 40339 | #endif | | |
| 40340 | | | |
| 40341 | #ifdef __LITTLE_ENDIAN__ | | |
| 40342 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { | | |
| 40343 | int8x16_t __ret; | | |
| 40344 | __ret = (int8x16_t)(__p0); | | |
| 40345 | return __ret; | | |
| 40346 | } | | |
| 40347 | #else | | |
| 40348 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { | 35381 | __ai int8x16_t vreinterpretq_s8_s16(int16x8_t __p0) { |
| 40349 | int8x16_t __ret; | 35382 | int8x16_t __ret; |
| 40350 | __ret = (int8x16_t)(__p0); | 35383 | __ret = (int8x16_t)(__p0); |
| 40351 | return __ret; | 35384 | return __ret; |
| 40352 | } | 35385 | } |
| 40353 | #endif | | |
| 40354 | | | |
| 40355 | #ifdef __LITTLE_ENDIAN__ | | |
| 40356 | __ai float64x2_t vreinterpretq_f64_p8(poly8x16_t __p0) { | | |
| 40357 | float64x2_t __ret; | | |
| 40358 | __ret = (float64x2_t)(__p0); | | |
| 40359 | return __ret; | | |
| 40360 | } | | |
| 40361 | #else | | |
| 40362 | __ai float64x2_t vreinterpretq_f64_p8(poly8x16_t __p0) { | 35386 | __ai float64x2_t vreinterpretq_f64_p8(poly8x16_t __p0) { |
| 40363 | float64x2_t __ret; | 35387 | float64x2_t __ret; |
| 40364 | __ret = (float64x2_t)(__p0); | 35388 | __ret = (float64x2_t)(__p0); |
| 40365 | return __ret; | 35389 | return __ret; |
| 40366 | } | 35390 | } |
| 40367 | #endif | | |
| 40368 | | | |
| 40369 | #ifdef __LITTLE_ENDIAN__ | | |
| 40370 | __ai float64x2_t vreinterpretq_f64_p128(poly128_t __p0) { | | |
| 40371 | float64x2_t __ret; | | |
| 40372 | __ret = (float64x2_t)(__p0); | | |
| 40373 | return __ret; | | |
| 40374 | } | | |
| 40375 | #else | | |
| 40376 | __ai float64x2_t vreinterpretq_f64_p128(poly128_t __p0) { | 35391 | __ai float64x2_t vreinterpretq_f64_p128(poly128_t __p0) { |
| 40377 | float64x2_t __ret; | 35392 | float64x2_t __ret; |
| 40378 | __ret = (float64x2_t)(__p0); | 35393 | __ret = (float64x2_t)(__p0); |
| 40379 | return __ret; | 35394 | return __ret; |
| 40380 | } | 35395 | } |
| 40381 | #endif | | |
| 40382 | | | |
| 40383 | #ifdef __LITTLE_ENDIAN__ | | |
| 40384 | __ai float64x2_t vreinterpretq_f64_p64(poly64x2_t __p0) { | | |
| 40385 | float64x2_t __ret; | | |
| 40386 | __ret = (float64x2_t)(__p0); | | |
| 40387 | return __ret; | | |
| 40388 | } | | |
| 40389 | #else | | |
| 40390 | __ai float64x2_t vreinterpretq_f64_p64(poly64x2_t __p0) { | 35396 | __ai float64x2_t vreinterpretq_f64_p64(poly64x2_t __p0) { |
| 40391 | float64x2_t __ret; | 35397 | float64x2_t __ret; |
| 40392 | __ret = (float64x2_t)(__p0); | 35398 | __ret = (float64x2_t)(__p0); |
| 40393 | return __ret; | 35399 | return __ret; |
| 40394 | } | 35400 | } |
| 40395 | #endif | | |
| 40396 | | | |
| 40397 | #ifdef __LITTLE_ENDIAN__ | | |
| 40398 | __ai float64x2_t vreinterpretq_f64_p16(poly16x8_t __p0) { | | |
| 40399 | float64x2_t __ret; | | |
| 40400 | __ret = (float64x2_t)(__p0); | | |
| 40401 | return __ret; | | |
| 40402 | } | | |
| 40403 | #else | | |
| 40404 | __ai float64x2_t vreinterpretq_f64_p16(poly16x8_t __p0) { | 35401 | __ai float64x2_t vreinterpretq_f64_p16(poly16x8_t __p0) { |
| 40405 | float64x2_t __ret; | 35402 | float64x2_t __ret; |
| 40406 | __ret = (float64x2_t)(__p0); | 35403 | __ret = (float64x2_t)(__p0); |
| 40407 | return __ret; | 35404 | return __ret; |
| 40408 | } | 35405 | } |
| 40409 | #endif | | |
| 40410 | | | |
| 40411 | #ifdef __LITTLE_ENDIAN__ | | |
| 40412 | __ai float64x2_t vreinterpretq_f64_u8(uint8x16_t __p0) { | | |
| 40413 | float64x2_t __ret; | | |
| 40414 | __ret = (float64x2_t)(__p0); | | |
| 40415 | return __ret; | | |
| 40416 | } | | |
| 40417 | #else | | |
| 40418 | __ai float64x2_t vreinterpretq_f64_u8(uint8x16_t __p0) { | 35406 | __ai float64x2_t vreinterpretq_f64_u8(uint8x16_t __p0) { |
| 40419 | float64x2_t __ret; | 35407 | float64x2_t __ret; |
| 40420 | __ret = (float64x2_t)(__p0); | 35408 | __ret = (float64x2_t)(__p0); |
| 40421 | return __ret; | 35409 | return __ret; |
| 40422 | } | 35410 | } |
| 40423 | #endif | | |
| 40424 | | | |
| 40425 | #ifdef __LITTLE_ENDIAN__ | | |
| 40426 | __ai float64x2_t vreinterpretq_f64_u32(uint32x4_t __p0) { | | |
| 40427 | float64x2_t __ret; | | |
| 40428 | __ret = (float64x2_t)(__p0); | | |
| 40429 | return __ret; | | |
| 40430 | } | | |
| 40431 | #else | | |
| 40432 | __ai float64x2_t vreinterpretq_f64_u32(uint32x4_t __p0) { | 35411 | __ai float64x2_t vreinterpretq_f64_u32(uint32x4_t __p0) { |
| 40433 | float64x2_t __ret; | 35412 | float64x2_t __ret; |
| 40434 | __ret = (float64x2_t)(__p0); | 35413 | __ret = (float64x2_t)(__p0); |
| 40435 | return __ret; | 35414 | return __ret; |
| 40436 | } | 35415 | } |
| 40437 | #endif | | |
| 40438 | | | |
| 40439 | #ifdef __LITTLE_ENDIAN__ | | |
| 40440 | __ai float64x2_t vreinterpretq_f64_u64(uint64x2_t __p0) { | | |
| 40441 | float64x2_t __ret; | | |
| 40442 | __ret = (float64x2_t)(__p0); | | |
| 40443 | return __ret; | | |
| 40444 | } | | |
| 40445 | #else | | |
| 40446 | __ai float64x2_t vreinterpretq_f64_u64(uint64x2_t __p0) { | 35416 | __ai float64x2_t vreinterpretq_f64_u64(uint64x2_t __p0) { |
| 40447 | float64x2_t __ret; | 35417 | float64x2_t __ret; |
| 40448 | __ret = (float64x2_t)(__p0); | 35418 | __ret = (float64x2_t)(__p0); |
| 40449 | return __ret; | 35419 | return __ret; |
| 40450 | } | 35420 | } |
| 40451 | #endif | | |
| 40452 | | | |
| 40453 | #ifdef __LITTLE_ENDIAN__ | | |
| 40454 | __ai float64x2_t vreinterpretq_f64_u16(uint16x8_t __p0) { | | |
| 40455 | float64x2_t __ret; | | |
| 40456 | __ret = (float64x2_t)(__p0); | | |
| 40457 | return __ret; | | |
| 40458 | } | | |
| 40459 | #else | | |
| 40460 | __ai float64x2_t vreinterpretq_f64_u16(uint16x8_t __p0) { | 35421 | __ai float64x2_t vreinterpretq_f64_u16(uint16x8_t __p0) { |
| 40461 | float64x2_t __ret; | 35422 | float64x2_t __ret; |
| 40462 | __ret = (float64x2_t)(__p0); | 35423 | __ret = (float64x2_t)(__p0); |
| 40463 | return __ret; | 35424 | return __ret; |
| 40464 | } | 35425 | } |
| 40465 | #endif | | |
| 40466 | | | |
| 40467 | #ifdef __LITTLE_ENDIAN__ | | |
| 40468 | __ai float64x2_t vreinterpretq_f64_s8(int8x16_t __p0) { | | |
| 40469 | float64x2_t __ret; | | |
| 40470 | __ret = (float64x2_t)(__p0); | | |
| 40471 | return __ret; | | |
| 40472 | } | | |
| 40473 | #else | | |
| 40474 | __ai float64x2_t vreinterpretq_f64_s8(int8x16_t __p0) { | 35426 | __ai float64x2_t vreinterpretq_f64_s8(int8x16_t __p0) { |
| 40475 | float64x2_t __ret; | 35427 | float64x2_t __ret; |
| 40476 | __ret = (float64x2_t)(__p0); | 35428 | __ret = (float64x2_t)(__p0); |
| 40477 | return __ret; | 35429 | return __ret; |
| 40478 | } | 35430 | } |
| 40479 | #endif | | |
| 40480 | | | |
| 40481 | #ifdef __LITTLE_ENDIAN__ | | |
| 40482 | __ai float64x2_t vreinterpretq_f64_f32(float32x4_t __p0) { | | |
| 40483 | float64x2_t __ret; | | |
| 40484 | __ret = (float64x2_t)(__p0); | | |
| 40485 | return __ret; | | |
| 40486 | } | | |
| 40487 | #else | | |
| 40488 | __ai float64x2_t vreinterpretq_f64_f32(float32x4_t __p0) { | 35431 | __ai float64x2_t vreinterpretq_f64_f32(float32x4_t __p0) { |
| 40489 | float64x2_t __ret; | 35432 | float64x2_t __ret; |
| 40490 | __ret = (float64x2_t)(__p0); | 35433 | __ret = (float64x2_t)(__p0); |
| 40491 | return __ret; | 35434 | return __ret; |
| 40492 | } | 35435 | } |
| 40493 | #endif | | |
| 40494 | | | |
| 40495 | #ifdef __LITTLE_ENDIAN__ | | |
| 40496 | __ai float64x2_t vreinterpretq_f64_f16(float16x8_t __p0) { | | |
| 40497 | float64x2_t __ret; | | |
| 40498 | __ret = (float64x2_t)(__p0); | | |
| 40499 | return __ret; | | |
| 40500 | } | | |
| 40501 | #else | | |
| 40502 | __ai float64x2_t vreinterpretq_f64_f16(float16x8_t __p0) { | 35436 | __ai float64x2_t vreinterpretq_f64_f16(float16x8_t __p0) { |
| 40503 | float64x2_t __ret; | 35437 | float64x2_t __ret; |
| 40504 | __ret = (float64x2_t)(__p0); | 35438 | __ret = (float64x2_t)(__p0); |
| 40505 | return __ret; | 35439 | return __ret; |
| 40506 | } | 35440 | } |
| 40507 | #endif | | |
| 40508 | | | |
| 40509 | #ifdef __LITTLE_ENDIAN__ | | |
| 40510 | __ai float64x2_t vreinterpretq_f64_s32(int32x4_t __p0) { | | |
| 40511 | float64x2_t __ret; | | |
| 40512 | __ret = (float64x2_t)(__p0); | | |
| 40513 | return __ret; | | |
| 40514 | } | | |
| 40515 | #else | | |
| 40516 | __ai float64x2_t vreinterpretq_f64_s32(int32x4_t __p0) { | 35441 | __ai float64x2_t vreinterpretq_f64_s32(int32x4_t __p0) { |
| 40517 | float64x2_t __ret; | 35442 | float64x2_t __ret; |
| 40518 | __ret = (float64x2_t)(__p0); | 35443 | __ret = (float64x2_t)(__p0); |
| 40519 | return __ret; | 35444 | return __ret; |
| 40520 | } | 35445 | } |
| 40521 | #endif | | |
| 40522 | | | |
| 40523 | #ifdef __LITTLE_ENDIAN__ | | |
| 40524 | __ai float64x2_t vreinterpretq_f64_s64(int64x2_t __p0) { | | |
| 40525 | float64x2_t __ret; | | |
| 40526 | __ret = (float64x2_t)(__p0); | | |
| 40527 | return __ret; | | |
| 40528 | } | | |
| 40529 | #else | | |
| 40530 | __ai float64x2_t vreinterpretq_f64_s64(int64x2_t __p0) { | 35446 | __ai float64x2_t vreinterpretq_f64_s64(int64x2_t __p0) { |
| 40531 | float64x2_t __ret; | 35447 | float64x2_t __ret; |
| 40532 | __ret = (float64x2_t)(__p0); | 35448 | __ret = (float64x2_t)(__p0); |
| 40533 | return __ret; | 35449 | return __ret; |
| 40534 | } | 35450 | } |
| 40535 | #endif | | |
| 40536 | | | |
| 40537 | #ifdef __LITTLE_ENDIAN__ | | |
| 40538 | __ai float64x2_t vreinterpretq_f64_s16(int16x8_t __p0) { | | |
| 40539 | float64x2_t __ret; | | |
| 40540 | __ret = (float64x2_t)(__p0); | | |
| 40541 | return __ret; | | |
| 40542 | } | | |
| 40543 | #else | | |
| 40544 | __ai float64x2_t vreinterpretq_f64_s16(int16x8_t __p0) { | 35451 | __ai float64x2_t vreinterpretq_f64_s16(int16x8_t __p0) { |
| 40545 | float64x2_t __ret; | 35452 | float64x2_t __ret; |
| 40546 | __ret = (float64x2_t)(__p0); | 35453 | __ret = (float64x2_t)(__p0); |
| 40547 | return __ret; | 35454 | return __ret; |
| 40548 | } | 35455 | } |
| 40549 | #endif | | |
| 40550 | | | |
| 40551 | #ifdef __LITTLE_ENDIAN__ | | |
| 40552 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { | | |
| 40553 | float32x4_t __ret; | | |
| 40554 | __ret = (float32x4_t)(__p0); | | |
| 40555 | return __ret; | | |
| 40556 | } | | |
| 40557 | #else | | |
| 40558 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { | 35456 | __ai float32x4_t vreinterpretq_f32_p8(poly8x16_t __p0) { |
| 40559 | float32x4_t __ret; | 35457 | float32x4_t __ret; |
| 40560 | __ret = (float32x4_t)(__p0); | 35458 | __ret = (float32x4_t)(__p0); |
| 40561 | return __ret; | 35459 | return __ret; |
| 40562 | } | 35460 | } |
| 40563 | #endif | | |
| 40564 | | | |
| 40565 | #ifdef __LITTLE_ENDIAN__ | | |
| 40566 | __ai float32x4_t vreinterpretq_f32_p128(poly128_t __p0) { | | |
| 40567 | float32x4_t __ret; | | |
| 40568 | __ret = (float32x4_t)(__p0); | | |
| 40569 | return __ret; | | |
| 40570 | } | | |
| 40571 | #else | | |
| 40572 | __ai float32x4_t vreinterpretq_f32_p128(poly128_t __p0) { | 35461 | __ai float32x4_t vreinterpretq_f32_p128(poly128_t __p0) { |
| 40573 | float32x4_t __ret; | 35462 | float32x4_t __ret; |
| 40574 | __ret = (float32x4_t)(__p0); | 35463 | __ret = (float32x4_t)(__p0); |
| 40575 | return __ret; | 35464 | return __ret; |
| 40576 | } | 35465 | } |
| 40577 | #endif | | |
| 40578 | | | |
| 40579 | #ifdef __LITTLE_ENDIAN__ | | |
| 40580 | __ai float32x4_t vreinterpretq_f32_p64(poly64x2_t __p0) { | | |
| 40581 | float32x4_t __ret; | | |
| 40582 | __ret = (float32x4_t)(__p0); | | |
| 40583 | return __ret; | | |
| 40584 | } | | |
| 40585 | #else | | |
| 40586 | __ai float32x4_t vreinterpretq_f32_p64(poly64x2_t __p0) { | 35466 | __ai float32x4_t vreinterpretq_f32_p64(poly64x2_t __p0) { |
| 40587 | float32x4_t __ret; | 35467 | float32x4_t __ret; |
| 40588 | __ret = (float32x4_t)(__p0); | 35468 | __ret = (float32x4_t)(__p0); |
| 40589 | return __ret; | 35469 | return __ret; |
| 40590 | } | 35470 | } |
| 40591 | #endif | | |
| 40592 | | | |
| 40593 | #ifdef __LITTLE_ENDIAN__ | | |
| 40594 | __ai float32x4_t vreinterpretq_f32_p16(poly16x8_t __p0) { | | |
| 40595 | float32x4_t __ret; | | |
| 40596 | __ret = (float32x4_t)(__p0); | | |
| 40597 | return __ret; | | |
| 40598 | } | | |
| 40599 | #else | | |
| 40600 | __ai float32x4_t vreinterpretq_f32_p16(poly16x8_t __p0) { | 35471 | __ai float32x4_t vreinterpretq_f32_p16(poly16x8_t __p0) { |
| 40601 | float32x4_t __ret; | 35472 | float32x4_t __ret; |
| 40602 | __ret = (float32x4_t)(__p0); | 35473 | __ret = (float32x4_t)(__p0); |
| 40603 | return __ret; | 35474 | return __ret; |
| 40604 | } | 35475 | } |
| 40605 | #endif | | |
| 40606 | | | |
| 40607 | #ifdef __LITTLE_ENDIAN__ | | |
| 40608 | __ai float32x4_t vreinterpretq_f32_u8(uint8x16_t __p0) { | | |
| 40609 | float32x4_t __ret; | | |
| 40610 | __ret = (float32x4_t)(__p0); | | |
| 40611 | return __ret; | | |
| 40612 | } | | |
| 40613 | #else | | |
| 40614 | __ai float32x4_t vreinterpretq_f32_u8(uint8x16_t __p0) { | 35476 | __ai float32x4_t vreinterpretq_f32_u8(uint8x16_t __p0) { |
| 40615 | float32x4_t __ret; | 35477 | float32x4_t __ret; |
| 40616 | __ret = (float32x4_t)(__p0); | 35478 | __ret = (float32x4_t)(__p0); |
| 40617 | return __ret; | 35479 | return __ret; |
| 40618 | } | 35480 | } |
| 40619 | #endif | | |
| 40620 | | | |
| 40621 | #ifdef __LITTLE_ENDIAN__ | | |
| 40622 | __ai float32x4_t vreinterpretq_f32_u32(uint32x4_t __p0) { | | |
| 40623 | float32x4_t __ret; | | |
| 40624 | __ret = (float32x4_t)(__p0); | | |
| 40625 | return __ret; | | |
| 40626 | } | | |
| 40627 | #else | | |
| 40628 | __ai float32x4_t vreinterpretq_f32_u32(uint32x4_t __p0) { | 35481 | __ai float32x4_t vreinterpretq_f32_u32(uint32x4_t __p0) { |
| 40629 | float32x4_t __ret; | 35482 | float32x4_t __ret; |
| 40630 | __ret = (float32x4_t)(__p0); | 35483 | __ret = (float32x4_t)(__p0); |
| 40631 | return __ret; | 35484 | return __ret; |
| 40632 | } | 35485 | } |
| 40633 | #endif | | |
| 40634 | | | |
| 40635 | #ifdef __LITTLE_ENDIAN__ | | |
| 40636 | __ai float32x4_t vreinterpretq_f32_u64(uint64x2_t __p0) { | | |
| 40637 | float32x4_t __ret; | | |
| 40638 | __ret = (float32x4_t)(__p0); | | |
| 40639 | return __ret; | | |
| 40640 | } | | |
| 40641 | #else | | |
| 40642 | __ai float32x4_t vreinterpretq_f32_u64(uint64x2_t __p0) { | 35486 | __ai float32x4_t vreinterpretq_f32_u64(uint64x2_t __p0) { |
| 40643 | float32x4_t __ret; | 35487 | float32x4_t __ret; |
| 40644 | __ret = (float32x4_t)(__p0); | 35488 | __ret = (float32x4_t)(__p0); |
| 40645 | return __ret; | 35489 | return __ret; |
| 40646 | } | 35490 | } |
| 40647 | #endif | | |
| 40648 | | | |
| 40649 | #ifdef __LITTLE_ENDIAN__ | | |
| 40650 | __ai float32x4_t vreinterpretq_f32_u16(uint16x8_t __p0) { | | |
| 40651 | float32x4_t __ret; | | |
| 40652 | __ret = (float32x4_t)(__p0); | | |
| 40653 | return __ret; | | |
| 40654 | } | | |
| 40655 | #else | | |
| 40656 | __ai float32x4_t vreinterpretq_f32_u16(uint16x8_t __p0) { | 35491 | __ai float32x4_t vreinterpretq_f32_u16(uint16x8_t __p0) { |
| 40657 | float32x4_t __ret; | 35492 | float32x4_t __ret; |
| 40658 | __ret = (float32x4_t)(__p0); | 35493 | __ret = (float32x4_t)(__p0); |
| 40659 | return __ret; | 35494 | return __ret; |
| 40660 | } | 35495 | } |
| 40661 | #endif | | |
| 40662 | | | |
| 40663 | #ifdef __LITTLE_ENDIAN__ | | |
| 40664 | __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { | | |
| 40665 | float32x4_t __ret; | | |
| 40666 | __ret = (float32x4_t)(__p0); | | |
| 40667 | return __ret; | | |
| 40668 | } | | |
| 40669 | #else | | |
| 40670 | __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { | 35496 | __ai float32x4_t vreinterpretq_f32_s8(int8x16_t __p0) { |
| 40671 | float32x4_t __ret; | 35497 | float32x4_t __ret; |
| 40672 | __ret = (float32x4_t)(__p0); | 35498 | __ret = (float32x4_t)(__p0); |
| 40673 | return __ret; | 35499 | return __ret; |
| 40674 | } | 35500 | } |
| 40675 | #endif | | |
| 40676 | | | |
| 40677 | #ifdef __LITTLE_ENDIAN__ | | |
| 40678 | __ai float32x4_t vreinterpretq_f32_f64(float64x2_t __p0) { | | |
| 40679 | float32x4_t __ret; | | |
| 40680 | __ret = (float32x4_t)(__p0); | | |
| 40681 | return __ret; | | |
| 40682 | } | | |
| 40683 | #else | | |
| 40684 | __ai float32x4_t vreinterpretq_f32_f64(float64x2_t __p0) { | 35501 | __ai float32x4_t vreinterpretq_f32_f64(float64x2_t __p0) { |
| 40685 | float32x4_t __ret; | 35502 | float32x4_t __ret; |
| 40686 | __ret = (float32x4_t)(__p0); | 35503 | __ret = (float32x4_t)(__p0); |
| 40687 | return __ret; | 35504 | return __ret; |
| 40688 | } | 35505 | } |
| 40689 | #endif | | |
| 40690 | | | |
| 40691 | #ifdef __LITTLE_ENDIAN__ | | |
| 40692 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { | | |
| 40693 | float32x4_t __ret; | | |
| 40694 | __ret = (float32x4_t)(__p0); | | |
| 40695 | return __ret; | | |
| 40696 | } | | |
| 40697 | #else | | |
| 40698 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { | 35506 | __ai float32x4_t vreinterpretq_f32_f16(float16x8_t __p0) { |
| 40699 | float32x4_t __ret; | 35507 | float32x4_t __ret; |
| 40700 | __ret = (float32x4_t)(__p0); | 35508 | __ret = (float32x4_t)(__p0); |
| 40701 | return __ret; | 35509 | return __ret; |
| 40702 | } | 35510 | } |
| 40703 | #endif | | |
| 40704 | | | |
| 40705 | #ifdef __LITTLE_ENDIAN__ | | |
| 40706 | __ai float32x4_t vreinterpretq_f32_s32(int32x4_t __p0) { | | |
| 40707 | float32x4_t __ret; | | |
| 40708 | __ret = (float32x4_t)(__p0); | | |
| 40709 | return __ret; | | |
| 40710 | } | | |
| 40711 | #else | | |
| 40712 | __ai float32x4_t vreinterpretq_f32_s32(int32x4_t __p0) { | 35511 | __ai float32x4_t vreinterpretq_f32_s32(int32x4_t __p0) { |
| 40713 | float32x4_t __ret; | 35512 | float32x4_t __ret; |
| 40714 | __ret = (float32x4_t)(__p0); | 35513 | __ret = (float32x4_t)(__p0); |
| 40715 | return __ret; | 35514 | return __ret; |
| 40716 | } | 35515 | } |
| 40717 | #endif | | |
| 40718 | | | |
| 40719 | #ifdef __LITTLE_ENDIAN__ | | |
| 40720 | __ai float32x4_t vreinterpretq_f32_s64(int64x2_t __p0) { | | |
| 40721 | float32x4_t __ret; | | |
| 40722 | __ret = (float32x4_t)(__p0); | | |
| 40723 | return __ret; | | |
| 40724 | } | | |
| 40725 | #else | | |
| 40726 | __ai float32x4_t vreinterpretq_f32_s64(int64x2_t __p0) { | 35516 | __ai float32x4_t vreinterpretq_f32_s64(int64x2_t __p0) { |
| 40727 | float32x4_t __ret; | 35517 | float32x4_t __ret; |
| 40728 | __ret = (float32x4_t)(__p0); | 35518 | __ret = (float32x4_t)(__p0); |
| 40729 | return __ret; | 35519 | return __ret; |
| 40730 | } | 35520 | } |
| 40731 | #endif | | |
| 40732 | | | |
| 40733 | #ifdef __LITTLE_ENDIAN__ | | |
| 40734 | __ai float32x4_t vreinterpretq_f32_s16(int16x8_t __p0) { | | |
| 40735 | float32x4_t __ret; | | |
| 40736 | __ret = (float32x4_t)(__p0); | | |
| 40737 | return __ret; | | |
| 40738 | } | | |
| 40739 | #else | | |
| 40740 | __ai float32x4_t vreinterpretq_f32_s16(int16x8_t __p0) { | 35521 | __ai float32x4_t vreinterpretq_f32_s16(int16x8_t __p0) { |
| 40741 | float32x4_t __ret; | 35522 | float32x4_t __ret; |
| 40742 | __ret = (float32x4_t)(__p0); | 35523 | __ret = (float32x4_t)(__p0); |
| 40743 | return __ret; | 35524 | return __ret; |
| 40744 | } | 35525 | } |
| 40745 | #endif | | |
| 40746 | | | |
| 40747 | #ifdef __LITTLE_ENDIAN__ | | |
| 40748 | __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { | | |
| 40749 | float16x8_t __ret; | | |
| 40750 | __ret = (float16x8_t)(__p0); | | |
| 40751 | return __ret; | | |
| 40752 | } | | |
| 40753 | #else | | |
| 40754 | __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { | 35526 | __ai float16x8_t vreinterpretq_f16_p8(poly8x16_t __p0) { |
| 40755 | float16x8_t __ret; | 35527 | float16x8_t __ret; |
| 40756 | __ret = (float16x8_t)(__p0); | 35528 | __ret = (float16x8_t)(__p0); |
| 40757 | return __ret; | 35529 | return __ret; |
| 40758 | } | 35530 | } |
| 40759 | #endif | | |
| 40760 | | | |
| 40761 | #ifdef __LITTLE_ENDIAN__ | | |
| 40762 | __ai float16x8_t vreinterpretq_f16_p128(poly128_t __p0) { | | |
| 40763 | float16x8_t __ret; | | |
| 40764 | __ret = (float16x8_t)(__p0); | | |
| 40765 | return __ret; | | |
| 40766 | } | | |
| 40767 | #else | | |
| 40768 | __ai float16x8_t vreinterpretq_f16_p128(poly128_t __p0) { | 35531 | __ai float16x8_t vreinterpretq_f16_p128(poly128_t __p0) { |
| 40769 | float16x8_t __ret; | 35532 | float16x8_t __ret; |
| 40770 | __ret = (float16x8_t)(__p0); | 35533 | __ret = (float16x8_t)(__p0); |
| 40771 | return __ret; | 35534 | return __ret; |
| 40772 | } | 35535 | } |
| 40773 | #endif | | |
| 40774 | | | |
| 40775 | #ifdef __LITTLE_ENDIAN__ | | |
| 40776 | __ai float16x8_t vreinterpretq_f16_p64(poly64x2_t __p0) { | | |
| 40777 | float16x8_t __ret; | | |
| 40778 | __ret = (float16x8_t)(__p0); | | |
| 40779 | return __ret; | | |
| 40780 | } | | |
| 40781 | #else | | |
| 40782 | __ai float16x8_t vreinterpretq_f16_p64(poly64x2_t __p0) { | 35536 | __ai float16x8_t vreinterpretq_f16_p64(poly64x2_t __p0) { |
| 40783 | float16x8_t __ret; | 35537 | float16x8_t __ret; |
| 40784 | __ret = (float16x8_t)(__p0); | 35538 | __ret = (float16x8_t)(__p0); |
| 40785 | return __ret; | 35539 | return __ret; |
| 40786 | } | 35540 | } |
| 40787 | #endif | | |
| 40788 | | | |
| 40789 | #ifdef __LITTLE_ENDIAN__ | | |
| 40790 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { | | |
| 40791 | float16x8_t __ret; | | |
| 40792 | __ret = (float16x8_t)(__p0); | | |
| 40793 | return __ret; | | |
| 40794 | } | | |
| 40795 | #else | | |
| 40796 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { | 35541 | __ai float16x8_t vreinterpretq_f16_p16(poly16x8_t __p0) { |
| 40797 | float16x8_t __ret; | 35542 | float16x8_t __ret; |
| 40798 | __ret = (float16x8_t)(__p0); | 35543 | __ret = (float16x8_t)(__p0); |
| 40799 | return __ret; | 35544 | return __ret; |
| 40800 | } | 35545 | } |
| 40801 | #endif | | |
| 40802 | | | |
| 40803 | #ifdef __LITTLE_ENDIAN__ | | |
| 40804 | __ai float16x8_t vreinterpretq_f16_u8(uint8x16_t __p0) { | | |
| 40805 | float16x8_t __ret; | | |
| 40806 | __ret = (float16x8_t)(__p0); | | |
| 40807 | return __ret; | | |
| 40808 | } | | |
| 40809 | #else | | |
| 40810 | __ai float16x8_t vreinterpretq_f16_u8(uint8x16_t __p0) { | 35546 | __ai float16x8_t vreinterpretq_f16_u8(uint8x16_t __p0) { |
| 40811 | float16x8_t __ret; | 35547 | float16x8_t __ret; |
| 40812 | __ret = (float16x8_t)(__p0); | 35548 | __ret = (float16x8_t)(__p0); |
| 40813 | return __ret; | 35549 | return __ret; |
| 40814 | } | 35550 | } |
| 40815 | #endif | | |
| 40816 | | | |
| 40817 | #ifdef __LITTLE_ENDIAN__ | | |
| 40818 | __ai float16x8_t vreinterpretq_f16_u32(uint32x4_t __p0) { | | |
| 40819 | float16x8_t __ret; | | |
| 40820 | __ret = (float16x8_t)(__p0); | | |
| 40821 | return __ret; | | |
| 40822 | } | | |
| 40823 | #else | | |
| 40824 | __ai float16x8_t vreinterpretq_f16_u32(uint32x4_t __p0) { | 35551 | __ai float16x8_t vreinterpretq_f16_u32(uint32x4_t __p0) { |
| 40825 | float16x8_t __ret; | 35552 | float16x8_t __ret; |
| 40826 | __ret = (float16x8_t)(__p0); | 35553 | __ret = (float16x8_t)(__p0); |
| 40827 | return __ret; | 35554 | return __ret; |
| 40828 | } | 35555 | } |
| 40829 | #endif | | |
| 40830 | | | |
| 40831 | #ifdef __LITTLE_ENDIAN__ | | |
| 40832 | __ai float16x8_t vreinterpretq_f16_u64(uint64x2_t __p0) { | | |
| 40833 | float16x8_t __ret; | | |
| 40834 | __ret = (float16x8_t)(__p0); | | |
| 40835 | return __ret; | | |
| 40836 | } | | |
| 40837 | #else | | |
| 40838 | __ai float16x8_t vreinterpretq_f16_u64(uint64x2_t __p0) { | 35556 | __ai float16x8_t vreinterpretq_f16_u64(uint64x2_t __p0) { |
| 40839 | float16x8_t __ret; | 35557 | float16x8_t __ret; |
| 40840 | __ret = (float16x8_t)(__p0); | 35558 | __ret = (float16x8_t)(__p0); |
| 40841 | return __ret; | 35559 | return __ret; |
| 40842 | } | 35560 | } |
| 40843 | #endif | | |
| 40844 | | | |
| 40845 | #ifdef __LITTLE_ENDIAN__ | | |
| 40846 | __ai float16x8_t vreinterpretq_f16_u16(uint16x8_t __p0) { | | |
| 40847 | float16x8_t __ret; | | |
| 40848 | __ret = (float16x8_t)(__p0); | | |
| 40849 | return __ret; | | |
| 40850 | } | | |
| 40851 | #else | | |
| 40852 | __ai float16x8_t vreinterpretq_f16_u16(uint16x8_t __p0) { | 35561 | __ai float16x8_t vreinterpretq_f16_u16(uint16x8_t __p0) { |
| 40853 | float16x8_t __ret; | 35562 | float16x8_t __ret; |
| 40854 | __ret = (float16x8_t)(__p0); | 35563 | __ret = (float16x8_t)(__p0); |
| 40855 | return __ret; | 35564 | return __ret; |
| 40856 | } | 35565 | } |
| 40857 | #endif | | |
| 40858 | | | |
| 40859 | #ifdef __LITTLE_ENDIAN__ | | |
| 40860 | __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { | | |
| 40861 | float16x8_t __ret; | | |
| 40862 | __ret = (float16x8_t)(__p0); | | |
| 40863 | return __ret; | | |
| 40864 | } | | |
| 40865 | #else | | |
| 40866 | __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { | 35566 | __ai float16x8_t vreinterpretq_f16_s8(int8x16_t __p0) { |
| 40867 | float16x8_t __ret; | 35567 | float16x8_t __ret; |
| 40868 | __ret = (float16x8_t)(__p0); | 35568 | __ret = (float16x8_t)(__p0); |
| 40869 | return __ret; | 35569 | return __ret; |
| 40870 | } | 35570 | } |
| 40871 | #endif | | |
| 40872 | | | |
| 40873 | #ifdef __LITTLE_ENDIAN__ | | |
| 40874 | __ai float16x8_t vreinterpretq_f16_f64(float64x2_t __p0) { | | |
| 40875 | float16x8_t __ret; | | |
| 40876 | __ret = (float16x8_t)(__p0); | | |
| 40877 | return __ret; | | |
| 40878 | } | | |
| 40879 | #else | | |
| 40880 | __ai float16x8_t vreinterpretq_f16_f64(float64x2_t __p0) { | 35571 | __ai float16x8_t vreinterpretq_f16_f64(float64x2_t __p0) { |
| 40881 | float16x8_t __ret; | 35572 | float16x8_t __ret; |
| 40882 | __ret = (float16x8_t)(__p0); | 35573 | __ret = (float16x8_t)(__p0); |
| 40883 | return __ret; | 35574 | return __ret; |
| 40884 | } | 35575 | } |
| 40885 | #endif | | |
| 40886 | | | |
| 40887 | #ifdef __LITTLE_ENDIAN__ | | |
| 40888 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { | | |
| 40889 | float16x8_t __ret; | | |
| 40890 | __ret = (float16x8_t)(__p0); | | |
| 40891 | return __ret; | | |
| 40892 | } | | |
| 40893 | #else | | |
| 40894 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { | 35576 | __ai float16x8_t vreinterpretq_f16_f32(float32x4_t __p0) { |
| 40895 | float16x8_t __ret; | 35577 | float16x8_t __ret; |
| 40896 | __ret = (float16x8_t)(__p0); | 35578 | __ret = (float16x8_t)(__p0); |
| 40897 | return __ret; | 35579 | return __ret; |
| 40898 | } | 35580 | } |
| 40899 | #endif | | |
| 40900 | | | |
| 40901 | #ifdef __LITTLE_ENDIAN__ | | |
| 40902 | __ai float16x8_t vreinterpretq_f16_s32(int32x4_t __p0) { | | |
| 40903 | float16x8_t __ret; | | |
| 40904 | __ret = (float16x8_t)(__p0); | | |
| 40905 | return __ret; | | |
| 40906 | } | | |
| 40907 | #else | | |
| 40908 | __ai float16x8_t vreinterpretq_f16_s32(int32x4_t __p0) { | 35581 | __ai float16x8_t vreinterpretq_f16_s32(int32x4_t __p0) { |
| 40909 | float16x8_t __ret; | 35582 | float16x8_t __ret; |
| 40910 | __ret = (float16x8_t)(__p0); | 35583 | __ret = (float16x8_t)(__p0); |
| 40911 | return __ret; | 35584 | return __ret; |
| 40912 | } | 35585 | } |
| 40913 | #endif | | |
| 40914 | | | |
| 40915 | #ifdef __LITTLE_ENDIAN__ | | |
| 40916 | __ai float16x8_t vreinterpretq_f16_s64(int64x2_t __p0) { | | |
| 40917 | float16x8_t __ret; | | |
| 40918 | __ret = (float16x8_t)(__p0); | | |
| 40919 | return __ret; | | |
| 40920 | } | | |
| 40921 | #else | | |
| 40922 | __ai float16x8_t vreinterpretq_f16_s64(int64x2_t __p0) { | 35586 | __ai float16x8_t vreinterpretq_f16_s64(int64x2_t __p0) { |
| 40923 | float16x8_t __ret; | 35587 | float16x8_t __ret; |
| 40924 | __ret = (float16x8_t)(__p0); | 35588 | __ret = (float16x8_t)(__p0); |
| 40925 | return __ret; | 35589 | return __ret; |
| 40926 | } | 35590 | } |
| 40927 | #endif | | |
| 40928 | | | |
| 40929 | #ifdef __LITTLE_ENDIAN__ | | |
| 40930 | __ai float16x8_t vreinterpretq_f16_s16(int16x8_t __p0) { | | |
| 40931 | float16x8_t __ret; | | |
| 40932 | __ret = (float16x8_t)(__p0); | | |
| 40933 | return __ret; | | |
| 40934 | } | | |
| 40935 | #else | | |
| 40936 | __ai float16x8_t vreinterpretq_f16_s16(int16x8_t __p0) { | 35591 | __ai float16x8_t vreinterpretq_f16_s16(int16x8_t __p0) { |
| 40937 | float16x8_t __ret; | 35592 | float16x8_t __ret; |
| 40938 | __ret = (float16x8_t)(__p0); | 35593 | __ret = (float16x8_t)(__p0); |
| 40939 | return __ret; | 35594 | return __ret; |
| 40940 | } | 35595 | } |
| 40941 | #endif | | |
| 40942 | | | |
| 40943 | #ifdef __LITTLE_ENDIAN__ | | |
| 40944 | __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { | 35596 | __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { |
| 40945 | int32x4_t __ret; | 35597 | int32x4_t __ret; |
| 40946 | __ret = (int32x4_t)(__p0); | 35598 | __ret = (int32x4_t)(__p0); |
| 40947 | return __ret; | 35599 | return __ret; |
| 40948 | } | 35600 | } |
| 40949 | #else | 35601 | __ai int32x4_t vreinterpretq_s32_p128(poly128_t __p0) { |
| 40950 | __ai int32x4_t vreinterpretq_s32_p8(poly8x16_t __p0) { | | |
| 40951 | int32x4_t __ret; | 35602 | int32x4_t __ret; |
| 40952 | __ret = (int32x4_t)(__p0); | 35603 | __ret = (int32x4_t)(__p0); |
| 40953 | return __ret; | 35604 | return __ret; |
| 40954 | } | 35605 | } |
| 40955 | #endif | 35606 | __ai int32x4_t vreinterpretq_s32_p64(poly64x2_t __p0) { |
| 40956 | | | |
| 40957 | #ifdef __LITTLE_ENDIAN__ | | |
| 40958 | __ai int32x4_t vreinterpretq_s32_p128(poly128_t __p0) { | | |
| 40959 | int32x4_t __ret; | 35607 | int32x4_t __ret; |
| 40960 | __ret = (int32x4_t)(__p0); | 35608 | __ret = (int32x4_t)(__p0); |
| 40961 | return __ret; | 35609 | return __ret; |
| 40962 | } | 35610 | } |
| 40963 | #else | 35611 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { |
| 40964 | __ai int32x4_t vreinterpretq_s32_p128(poly128_t __p0) { | | |
| 40965 | int32x4_t __ret; | 35612 | int32x4_t __ret; |
| 40966 | __ret = (int32x4_t)(__p0); | 35613 | __ret = (int32x4_t)(__p0); |
| 40967 | return __ret; | 35614 | return __ret; |
| 40968 | } | 35615 | } |
| 40969 | #endif | 35616 | __ai int32x4_t vreinterpretq_s32_u8(uint8x16_t __p0) { |
| 40970 | | | |
| 40971 | #ifdef __LITTLE_ENDIAN__ | | |
| 40972 | __ai int32x4_t vreinterpretq_s32_p64(poly64x2_t __p0) { | | |
| 40973 | int32x4_t __ret; | 35617 | int32x4_t __ret; |
| 40974 | __ret = (int32x4_t)(__p0); | 35618 | __ret = (int32x4_t)(__p0); |
| 40975 | return __ret; | 35619 | return __ret; |
| 40976 | } | 35620 | } |
| 40977 | #else | 35621 | __ai int32x4_t vreinterpretq_s32_u32(uint32x4_t __p0) { |
| 40978 | __ai int32x4_t vreinterpretq_s32_p64(poly64x2_t __p0) { | | |
| 40979 | int32x4_t __ret; | 35622 | int32x4_t __ret; |
| 40980 | __ret = (int32x4_t)(__p0); | 35623 | __ret = (int32x4_t)(__p0); |
| 40981 | return __ret; | 35624 | return __ret; |
| 40982 | } | 35625 | } |
| 40983 | #endif | 35626 | __ai int32x4_t vreinterpretq_s32_u64(uint64x2_t __p0) { |
| 40984 | | | |
| 40985 | #ifdef __LITTLE_ENDIAN__ | | |
| 40986 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { | | |
| 40987 | int32x4_t __ret; | 35627 | int32x4_t __ret; |
| 40988 | __ret = (int32x4_t)(__p0); | 35628 | __ret = (int32x4_t)(__p0); |
| 40989 | return __ret; | 35629 | return __ret; |
| 40990 | } | 35630 | } |
| 40991 | #else | | |
| 40992 | __ai int32x4_t vreinterpretq_s32_p16(poly16x8_t __p0) { | | |
| 40993 | int32x4_t __ret; | | |
| 40994 | __ret = (int32x4_t)(__p0); | | |
| 40995 | return __ret; | | |
| 40996 | } | | |
| 40997 | #endif | | |
| 40998 | | | |
| 40999 | #ifdef __LITTLE_ENDIAN__ | | |
| 41000 | __ai int32x4_t vreinterpretq_s32_u8(uint8x16_t __p0) { | | |
| 41001 | int32x4_t __ret; | | |
| 41002 | __ret = (int32x4_t)(__p0); | | |
| 41003 | return __ret; | | |
| 41004 | } | | |
| 41005 | #else | | |
| 41006 | __ai int32x4_t vreinterpretq_s32_u8(uint8x16_t __p0) { | | |
| 41007 | int32x4_t __ret; | | |
| 41008 | __ret = (int32x4_t)(__p0); | | |
| 41009 | return __ret; | | |
| 41010 | } | | |
| 41011 | #endif | | |
| 41012 | | | |
| 41013 | #ifdef __LITTLE_ENDIAN__ | | |
| 41014 | __ai int32x4_t vreinterpretq_s32_u32(uint32x4_t __p0) { | | |
| 41015 | int32x4_t __ret; | | |
| 41016 | __ret = (int32x4_t)(__p0); | | |
| 41017 | return __ret; | | |
| 41018 | } | | |
| 41019 | #else | | |
| 41020 | __ai int32x4_t vreinterpretq_s32_u32(uint32x4_t __p0) { | | |
| 41021 | int32x4_t __ret; | | |
| 41022 | __ret = (int32x4_t)(__p0); | | |
| 41023 | return __ret; | | |
| 41024 | } | | |
| 41025 | #endif | | |
| 41026 | | | |
| 41027 | #ifdef __LITTLE_ENDIAN__ | | |
| 41028 | __ai int32x4_t vreinterpretq_s32_u64(uint64x2_t __p0) { | | |
| 41029 | int32x4_t __ret; | | |
| 41030 | __ret = (int32x4_t)(__p0); | | |
| 41031 | return __ret; | | |
| 41032 | } | | |
| 41033 | #else | | |
| 41034 | __ai int32x4_t vreinterpretq_s32_u64(uint64x2_t __p0) { | | |
| 41035 | int32x4_t __ret; | | |
| 41036 | __ret = (int32x4_t)(__p0); | | |
| 41037 | return __ret; | | |
| 41038 | } | | |
| 41039 | #endif | | |
| 41040 | | | |
| 41041 | #ifdef __LITTLE_ENDIAN__ | | |
| 41042 | __ai int32x4_t vreinterpretq_s32_u16(uint16x8_t __p0) { | | |
| 41043 | int32x4_t __ret; | | |
| 41044 | __ret = (int32x4_t)(__p0); | | |
| 41045 | return __ret; | | |
| 41046 | } | | |
| 41047 | #else | | |
| 41048 | __ai int32x4_t vreinterpretq_s32_u16(uint16x8_t __p0) { | 35631 | __ai int32x4_t vreinterpretq_s32_u16(uint16x8_t __p0) { |
| 41049 | int32x4_t __ret; | 35632 | int32x4_t __ret; |
| 41050 | __ret = (int32x4_t)(__p0); | 35633 | __ret = (int32x4_t)(__p0); |
| 41051 | return __ret; | 35634 | return __ret; |
| 41052 | } | 35635 | } |
| 41053 | #endif | | |
| 41054 | | | |
| 41055 | #ifdef __LITTLE_ENDIAN__ | | |
| 41056 | __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { | | |
| 41057 | int32x4_t __ret; | | |
| 41058 | __ret = (int32x4_t)(__p0); | | |
| 41059 | return __ret; | | |
| 41060 | } | | |
| 41061 | #else | | |
| 41062 | __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { | 35636 | __ai int32x4_t vreinterpretq_s32_s8(int8x16_t __p0) { |
| 41063 | int32x4_t __ret; | 35637 | int32x4_t __ret; |
| 41064 | __ret = (int32x4_t)(__p0); | 35638 | __ret = (int32x4_t)(__p0); |
| 41065 | return __ret; | 35639 | return __ret; |
| 41066 | } | 35640 | } |
| 41067 | #endif | | |
| 41068 | | | |
| 41069 | #ifdef __LITTLE_ENDIAN__ | | |
| 41070 | __ai int32x4_t vreinterpretq_s32_f64(float64x2_t __p0) { | | |
| 41071 | int32x4_t __ret; | | |
| 41072 | __ret = (int32x4_t)(__p0); | | |
| 41073 | return __ret; | | |
| 41074 | } | | |
| 41075 | #else | | |
| 41076 | __ai int32x4_t vreinterpretq_s32_f64(float64x2_t __p0) { | 35641 | __ai int32x4_t vreinterpretq_s32_f64(float64x2_t __p0) { |
| 41077 | int32x4_t __ret; | 35642 | int32x4_t __ret; |
| 41078 | __ret = (int32x4_t)(__p0); | 35643 | __ret = (int32x4_t)(__p0); |
| 41079 | return __ret; | 35644 | return __ret; |
| 41080 | } | 35645 | } |
| 41081 | #endif | | |
| 41082 | | | |
| 41083 | #ifdef __LITTLE_ENDIAN__ | | |
| 41084 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { | | |
| 41085 | int32x4_t __ret; | | |
| 41086 | __ret = (int32x4_t)(__p0); | | |
| 41087 | return __ret; | | |
| 41088 | } | | |
| 41089 | #else | | |
| 41090 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { | 35646 | __ai int32x4_t vreinterpretq_s32_f32(float32x4_t __p0) { |
| 41091 | int32x4_t __ret; | 35647 | int32x4_t __ret; |
| 41092 | __ret = (int32x4_t)(__p0); | 35648 | __ret = (int32x4_t)(__p0); |
| 41093 | return __ret; | 35649 | return __ret; |
| 41094 | } | 35650 | } |
| 41095 | #endif | | |
| 41096 | | | |
| 41097 | #ifdef __LITTLE_ENDIAN__ | | |
| 41098 | __ai int32x4_t vreinterpretq_s32_f16(float16x8_t __p0) { | | |
| 41099 | int32x4_t __ret; | | |
| 41100 | __ret = (int32x4_t)(__p0); | | |
| 41101 | return __ret; | | |
| 41102 | } | | |
| 41103 | #else | | |
| 41104 | __ai int32x4_t vreinterpretq_s32_f16(float16x8_t __p0) { | 35651 | __ai int32x4_t vreinterpretq_s32_f16(float16x8_t __p0) { |
| 41105 | int32x4_t __ret; | 35652 | int32x4_t __ret; |
| 41106 | __ret = (int32x4_t)(__p0); | 35653 | __ret = (int32x4_t)(__p0); |
| 41107 | return __ret; | 35654 | return __ret; |
| 41108 | } | 35655 | } |
| 41109 | #endif | | |
| 41110 | | | |
| 41111 | #ifdef __LITTLE_ENDIAN__ | | |
| 41112 | __ai int32x4_t vreinterpretq_s32_s64(int64x2_t __p0) { | | |
| 41113 | int32x4_t __ret; | | |
| 41114 | __ret = (int32x4_t)(__p0); | | |
| 41115 | return __ret; | | |
| 41116 | } | | |
| 41117 | #else | | |
| 41118 | __ai int32x4_t vreinterpretq_s32_s64(int64x2_t __p0) { | 35656 | __ai int32x4_t vreinterpretq_s32_s64(int64x2_t __p0) { |
| 41119 | int32x4_t __ret; | 35657 | int32x4_t __ret; |
| 41120 | __ret = (int32x4_t)(__p0); | 35658 | __ret = (int32x4_t)(__p0); |
| 41121 | return __ret; | 35659 | return __ret; |
| 41122 | } | 35660 | } |
| 41123 | #endif | | |
| 41124 | | | |
| 41125 | #ifdef __LITTLE_ENDIAN__ | | |
| 41126 | __ai int32x4_t vreinterpretq_s32_s16(int16x8_t __p0) { | | |
| 41127 | int32x4_t __ret; | | |
| 41128 | __ret = (int32x4_t)(__p0); | | |
| 41129 | return __ret; | | |
| 41130 | } | | |
| 41131 | #else | | |
| 41132 | __ai int32x4_t vreinterpretq_s32_s16(int16x8_t __p0) { | 35661 | __ai int32x4_t vreinterpretq_s32_s16(int16x8_t __p0) { |
| 41133 | int32x4_t __ret; | 35662 | int32x4_t __ret; |
| 41134 | __ret = (int32x4_t)(__p0); | 35663 | __ret = (int32x4_t)(__p0); |
| 41135 | return __ret; | 35664 | return __ret; |
| 41136 | } | 35665 | } |
| 41137 | #endif | | |
| 41138 | | | |
| 41139 | #ifdef __LITTLE_ENDIAN__ | | |
| 41140 | __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { | | |
| 41141 | int64x2_t __ret; | | |
| 41142 | __ret = (int64x2_t)(__p0); | | |
| 41143 | return __ret; | | |
| 41144 | } | | |
| 41145 | #else | | |
| 41146 | __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { | 35666 | __ai int64x2_t vreinterpretq_s64_p8(poly8x16_t __p0) { |
| 41147 | int64x2_t __ret; | 35667 | int64x2_t __ret; |
| 41148 | __ret = (int64x2_t)(__p0); | 35668 | __ret = (int64x2_t)(__p0); |
| 41149 | return __ret; | 35669 | return __ret; |
| 41150 | } | 35670 | } |
| 41151 | #endif | | |
| 41152 | | | |
| 41153 | #ifdef __LITTLE_ENDIAN__ | | |
| 41154 | __ai int64x2_t vreinterpretq_s64_p128(poly128_t __p0) { | | |
| 41155 | int64x2_t __ret; | | |
| 41156 | __ret = (int64x2_t)(__p0); | | |
| 41157 | return __ret; | | |
| 41158 | } | | |
| 41159 | #else | | |
| 41160 | __ai int64x2_t vreinterpretq_s64_p128(poly128_t __p0) { | 35671 | __ai int64x2_t vreinterpretq_s64_p128(poly128_t __p0) { |
| 41161 | int64x2_t __ret; | 35672 | int64x2_t __ret; |
| 41162 | __ret = (int64x2_t)(__p0); | 35673 | __ret = (int64x2_t)(__p0); |
| 41163 | return __ret; | 35674 | return __ret; |
| 41164 | } | 35675 | } |
| 41165 | #endif | | |
| 41166 | | | |
| 41167 | #ifdef __LITTLE_ENDIAN__ | | |
| 41168 | __ai int64x2_t vreinterpretq_s64_p64(poly64x2_t __p0) { | | |
| 41169 | int64x2_t __ret; | | |
| 41170 | __ret = (int64x2_t)(__p0); | | |
| 41171 | return __ret; | | |
| 41172 | } | | |
| 41173 | #else | | |
| 41174 | __ai int64x2_t vreinterpretq_s64_p64(poly64x2_t __p0) { | 35676 | __ai int64x2_t vreinterpretq_s64_p64(poly64x2_t __p0) { |
| 41175 | int64x2_t __ret; | 35677 | int64x2_t __ret; |
| 41176 | __ret = (int64x2_t)(__p0); | 35678 | __ret = (int64x2_t)(__p0); |
| 41177 | return __ret; | 35679 | return __ret; |
| 41178 | } | 35680 | } |
| 41179 | #endif | | |
| 41180 | | | |
| 41181 | #ifdef __LITTLE_ENDIAN__ | | |
| 41182 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { | | |
| 41183 | int64x2_t __ret; | | |
| 41184 | __ret = (int64x2_t)(__p0); | | |
| 41185 | return __ret; | | |
| 41186 | } | | |
| 41187 | #else | | |
| 41188 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { | 35681 | __ai int64x2_t vreinterpretq_s64_p16(poly16x8_t __p0) { |
| 41189 | int64x2_t __ret; | 35682 | int64x2_t __ret; |
| 41190 | __ret = (int64x2_t)(__p0); | 35683 | __ret = (int64x2_t)(__p0); |
| 41191 | return __ret; | 35684 | return __ret; |
| 41192 | } | 35685 | } |
| 41193 | #endif | | |
| 41194 | | | |
| 41195 | #ifdef __LITTLE_ENDIAN__ | | |
| 41196 | __ai int64x2_t vreinterpretq_s64_u8(uint8x16_t __p0) { | | |
| 41197 | int64x2_t __ret; | | |
| 41198 | __ret = (int64x2_t)(__p0); | | |
| 41199 | return __ret; | | |
| 41200 | } | | |
| 41201 | #else | | |
| 41202 | __ai int64x2_t vreinterpretq_s64_u8(uint8x16_t __p0) { | 35686 | __ai int64x2_t vreinterpretq_s64_u8(uint8x16_t __p0) { |
| 41203 | int64x2_t __ret; | 35687 | int64x2_t __ret; |
| 41204 | __ret = (int64x2_t)(__p0); | 35688 | __ret = (int64x2_t)(__p0); |
| 41205 | return __ret; | 35689 | return __ret; |
| 41206 | } | 35690 | } |
| 41207 | #endif | | |
| 41208 | | | |
| 41209 | #ifdef __LITTLE_ENDIAN__ | | |
| 41210 | __ai int64x2_t vreinterpretq_s64_u32(uint32x4_t __p0) { | | |
| 41211 | int64x2_t __ret; | | |
| 41212 | __ret = (int64x2_t)(__p0); | | |
| 41213 | return __ret; | | |
| 41214 | } | | |
| 41215 | #else | | |
| 41216 | __ai int64x2_t vreinterpretq_s64_u32(uint32x4_t __p0) { | 35691 | __ai int64x2_t vreinterpretq_s64_u32(uint32x4_t __p0) { |
| 41217 | int64x2_t __ret; | 35692 | int64x2_t __ret; |
| 41218 | __ret = (int64x2_t)(__p0); | 35693 | __ret = (int64x2_t)(__p0); |
| 41219 | return __ret; | 35694 | return __ret; |
| 41220 | } | 35695 | } |
| 41221 | #endif | | |
| 41222 | | | |
| 41223 | #ifdef __LITTLE_ENDIAN__ | | |
| 41224 | __ai int64x2_t vreinterpretq_s64_u64(uint64x2_t __p0) { | | |
| 41225 | int64x2_t __ret; | | |
| 41226 | __ret = (int64x2_t)(__p0); | | |
| 41227 | return __ret; | | |
| 41228 | } | | |
| 41229 | #else | | |
| 41230 | __ai int64x2_t vreinterpretq_s64_u64(uint64x2_t __p0) { | 35696 | __ai int64x2_t vreinterpretq_s64_u64(uint64x2_t __p0) { |
| 41231 | int64x2_t __ret; | 35697 | int64x2_t __ret; |
| 41232 | __ret = (int64x2_t)(__p0); | 35698 | __ret = (int64x2_t)(__p0); |
| 41233 | return __ret; | 35699 | return __ret; |
| 41234 | } | 35700 | } |
| 41235 | #endif | | |
| 41236 | | | |
| 41237 | #ifdef __LITTLE_ENDIAN__ | | |
| 41238 | __ai int64x2_t vreinterpretq_s64_u16(uint16x8_t __p0) { | | |
| 41239 | int64x2_t __ret; | | |
| 41240 | __ret = (int64x2_t)(__p0); | | |
| 41241 | return __ret; | | |
| 41242 | } | | |
| 41243 | #else | | |
| 41244 | __ai int64x2_t vreinterpretq_s64_u16(uint16x8_t __p0) { | 35701 | __ai int64x2_t vreinterpretq_s64_u16(uint16x8_t __p0) { |
| 41245 | int64x2_t __ret; | 35702 | int64x2_t __ret; |
| 41246 | __ret = (int64x2_t)(__p0); | 35703 | __ret = (int64x2_t)(__p0); |
| 41247 | return __ret; | 35704 | return __ret; |
| 41248 | } | 35705 | } |
| 41249 | #endif | | |
| 41250 | | | |
| 41251 | #ifdef __LITTLE_ENDIAN__ | | |
| 41252 | __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { | | |
| 41253 | int64x2_t __ret; | | |
| 41254 | __ret = (int64x2_t)(__p0); | | |
| 41255 | return __ret; | | |
| 41256 | } | | |
| 41257 | #else | | |
| 41258 | __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { | 35706 | __ai int64x2_t vreinterpretq_s64_s8(int8x16_t __p0) { |
| 41259 | int64x2_t __ret; | 35707 | int64x2_t __ret; |
| 41260 | __ret = (int64x2_t)(__p0); | 35708 | __ret = (int64x2_t)(__p0); |
| 41261 | return __ret; | 35709 | return __ret; |
| 41262 | } | 35710 | } |
| 41263 | #endif | | |
| 41264 | | | |
| 41265 | #ifdef __LITTLE_ENDIAN__ | | |
| 41266 | __ai int64x2_t vreinterpretq_s64_f64(float64x2_t __p0) { | | |
| 41267 | int64x2_t __ret; | | |
| 41268 | __ret = (int64x2_t)(__p0); | | |
| 41269 | return __ret; | | |
| 41270 | } | | |
| 41271 | #else | | |
| 41272 | __ai int64x2_t vreinterpretq_s64_f64(float64x2_t __p0) { | 35711 | __ai int64x2_t vreinterpretq_s64_f64(float64x2_t __p0) { |
| 41273 | int64x2_t __ret; | 35712 | int64x2_t __ret; |
| 41274 | __ret = (int64x2_t)(__p0); | 35713 | __ret = (int64x2_t)(__p0); |
| 41275 | return __ret; | 35714 | return __ret; |
| 41276 | } | 35715 | } |
| 41277 | #endif | | |
| 41278 | | | |
| 41279 | #ifdef __LITTLE_ENDIAN__ | | |
| 41280 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { | | |
| 41281 | int64x2_t __ret; | | |
| 41282 | __ret = (int64x2_t)(__p0); | | |
| 41283 | return __ret; | | |
| 41284 | } | | |
| 41285 | #else | | |
| 41286 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { | 35716 | __ai int64x2_t vreinterpretq_s64_f32(float32x4_t __p0) { |
| 41287 | int64x2_t __ret; | 35717 | int64x2_t __ret; |
| 41288 | __ret = (int64x2_t)(__p0); | 35718 | __ret = (int64x2_t)(__p0); |
| 41289 | return __ret; | 35719 | return __ret; |
| 41290 | } | 35720 | } |
| 41291 | #endif | | |
| 41292 | | | |
| 41293 | #ifdef __LITTLE_ENDIAN__ | | |
| 41294 | __ai int64x2_t vreinterpretq_s64_f16(float16x8_t __p0) { | | |
| 41295 | int64x2_t __ret; | | |
| 41296 | __ret = (int64x2_t)(__p0); | | |
| 41297 | return __ret; | | |
| 41298 | } | | |
| 41299 | #else | | |
| 41300 | __ai int64x2_t vreinterpretq_s64_f16(float16x8_t __p0) { | 35721 | __ai int64x2_t vreinterpretq_s64_f16(float16x8_t __p0) { |
| 41301 | int64x2_t __ret; | 35722 | int64x2_t __ret; |
| 41302 | __ret = (int64x2_t)(__p0); | 35723 | __ret = (int64x2_t)(__p0); |
| 41303 | return __ret; | 35724 | return __ret; |
| 41304 | } | 35725 | } |
| 41305 | #endif | | |
| 41306 | | | |
| 41307 | #ifdef __LITTLE_ENDIAN__ | | |
| 41308 | __ai int64x2_t vreinterpretq_s64_s32(int32x4_t __p0) { | | |
| 41309 | int64x2_t __ret; | | |
| 41310 | __ret = (int64x2_t)(__p0); | | |
| 41311 | return __ret; | | |
| 41312 | } | | |
| 41313 | #else | | |
| 41314 | __ai int64x2_t vreinterpretq_s64_s32(int32x4_t __p0) { | 35726 | __ai int64x2_t vreinterpretq_s64_s32(int32x4_t __p0) { |
| 41315 | int64x2_t __ret; | 35727 | int64x2_t __ret; |
| 41316 | __ret = (int64x2_t)(__p0); | 35728 | __ret = (int64x2_t)(__p0); |
| 41317 | return __ret; | 35729 | return __ret; |
| 41318 | } | 35730 | } |
| 41319 | #endif | | |
| 41320 | | | |
| 41321 | #ifdef __LITTLE_ENDIAN__ | | |
| 41322 | __ai int64x2_t vreinterpretq_s64_s16(int16x8_t __p0) { | | |
| 41323 | int64x2_t __ret; | | |
| 41324 | __ret = (int64x2_t)(__p0); | | |
| 41325 | return __ret; | | |
| 41326 | } | | |
| 41327 | #else | | |
| 41328 | __ai int64x2_t vreinterpretq_s64_s16(int16x8_t __p0) { | 35731 | __ai int64x2_t vreinterpretq_s64_s16(int16x8_t __p0) { |
| 41329 | int64x2_t __ret; | 35732 | int64x2_t __ret; |
| 41330 | __ret = (int64x2_t)(__p0); | 35733 | __ret = (int64x2_t)(__p0); |
| 41331 | return __ret; | 35734 | return __ret; |
| 41332 | } | 35735 | } |
| 41333 | #endif | | |
| 41334 | | | |
| 41335 | #ifdef __LITTLE_ENDIAN__ | | |
| 41336 | __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { | | |
| 41337 | int16x8_t __ret; | | |
| 41338 | __ret = (int16x8_t)(__p0); | | |
| 41339 | return __ret; | | |
| 41340 | } | | |
| 41341 | #else | | |
| 41342 | __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { | 35736 | __ai int16x8_t vreinterpretq_s16_p8(poly8x16_t __p0) { |
| 41343 | int16x8_t __ret; | 35737 | int16x8_t __ret; |
| 41344 | __ret = (int16x8_t)(__p0); | 35738 | __ret = (int16x8_t)(__p0); |
| 41345 | return __ret; | 35739 | return __ret; |
| 41346 | } | 35740 | } |
| 41347 | #endif | | |
| 41348 | | | |
| 41349 | #ifdef __LITTLE_ENDIAN__ | | |
| 41350 | __ai int16x8_t vreinterpretq_s16_p128(poly128_t __p0) { | | |
| 41351 | int16x8_t __ret; | | |
| 41352 | __ret = (int16x8_t)(__p0); | | |
| 41353 | return __ret; | | |
| 41354 | } | | |
| 41355 | #else | | |
| 41356 | __ai int16x8_t vreinterpretq_s16_p128(poly128_t __p0) { | 35741 | __ai int16x8_t vreinterpretq_s16_p128(poly128_t __p0) { |
| 41357 | int16x8_t __ret; | 35742 | int16x8_t __ret; |
| 41358 | __ret = (int16x8_t)(__p0); | 35743 | __ret = (int16x8_t)(__p0); |
| 41359 | return __ret; | 35744 | return __ret; |
| 41360 | } | 35745 | } |
| 41361 | #endif | | |
| 41362 | | | |
| 41363 | #ifdef __LITTLE_ENDIAN__ | | |
| 41364 | __ai int16x8_t vreinterpretq_s16_p64(poly64x2_t __p0) { | | |
| 41365 | int16x8_t __ret; | | |
| 41366 | __ret = (int16x8_t)(__p0); | | |
| 41367 | return __ret; | | |
| 41368 | } | | |
| 41369 | #else | | |
| 41370 | __ai int16x8_t vreinterpretq_s16_p64(poly64x2_t __p0) { | 35746 | __ai int16x8_t vreinterpretq_s16_p64(poly64x2_t __p0) { |
| 41371 | int16x8_t __ret; | 35747 | int16x8_t __ret; |
| 41372 | __ret = (int16x8_t)(__p0); | 35748 | __ret = (int16x8_t)(__p0); |
| 41373 | return __ret; | 35749 | return __ret; |
| 41374 | } | 35750 | } |
| 41375 | #endif | | |
| 41376 | | | |
| 41377 | #ifdef __LITTLE_ENDIAN__ | | |
| 41378 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { | | |
| 41379 | int16x8_t __ret; | | |
| 41380 | __ret = (int16x8_t)(__p0); | | |
| 41381 | return __ret; | | |
| 41382 | } | | |
| 41383 | #else | | |
| 41384 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { | 35751 | __ai int16x8_t vreinterpretq_s16_p16(poly16x8_t __p0) { |
| 41385 | int16x8_t __ret; | 35752 | int16x8_t __ret; |
| 41386 | __ret = (int16x8_t)(__p0); | 35753 | __ret = (int16x8_t)(__p0); |
| 41387 | return __ret; | 35754 | return __ret; |
| 41388 | } | 35755 | } |
| 41389 | #endif | | |
| 41390 | | | |
| 41391 | #ifdef __LITTLE_ENDIAN__ | | |
| 41392 | __ai int16x8_t vreinterpretq_s16_u8(uint8x16_t __p0) { | | |
| 41393 | int16x8_t __ret; | | |
| 41394 | __ret = (int16x8_t)(__p0); | | |
| 41395 | return __ret; | | |
| 41396 | } | | |
| 41397 | #else | | |
| 41398 | __ai int16x8_t vreinterpretq_s16_u8(uint8x16_t __p0) { | 35756 | __ai int16x8_t vreinterpretq_s16_u8(uint8x16_t __p0) { |
| 41399 | int16x8_t __ret; | 35757 | int16x8_t __ret; |
| 41400 | __ret = (int16x8_t)(__p0); | 35758 | __ret = (int16x8_t)(__p0); |
| 41401 | return __ret; | 35759 | return __ret; |
| 41402 | } | 35760 | } |
| 41403 | #endif | | |
| 41404 | | | |
| 41405 | #ifdef __LITTLE_ENDIAN__ | | |
| 41406 | __ai int16x8_t vreinterpretq_s16_u32(uint32x4_t __p0) { | | |
| 41407 | int16x8_t __ret; | | |
| 41408 | __ret = (int16x8_t)(__p0); | | |
| 41409 | return __ret; | | |
| 41410 | } | | |
| 41411 | #else | | |
| 41412 | __ai int16x8_t vreinterpretq_s16_u32(uint32x4_t __p0) { | 35761 | __ai int16x8_t vreinterpretq_s16_u32(uint32x4_t __p0) { |
| 41413 | int16x8_t __ret; | 35762 | int16x8_t __ret; |
| 41414 | __ret = (int16x8_t)(__p0); | 35763 | __ret = (int16x8_t)(__p0); |
| 41415 | return __ret; | 35764 | return __ret; |
| 41416 | } | 35765 | } |
| 41417 | #endif | | |
| 41418 | | | |
| 41419 | #ifdef __LITTLE_ENDIAN__ | | |
| 41420 | __ai int16x8_t vreinterpretq_s16_u64(uint64x2_t __p0) { | | |
| 41421 | int16x8_t __ret; | | |
| 41422 | __ret = (int16x8_t)(__p0); | | |
| 41423 | return __ret; | | |
| 41424 | } | | |
| 41425 | #else | | |
| 41426 | __ai int16x8_t vreinterpretq_s16_u64(uint64x2_t __p0) { | 35766 | __ai int16x8_t vreinterpretq_s16_u64(uint64x2_t __p0) { |
| 41427 | int16x8_t __ret; | 35767 | int16x8_t __ret; |
| 41428 | __ret = (int16x8_t)(__p0); | 35768 | __ret = (int16x8_t)(__p0); |
| 41429 | return __ret; | 35769 | return __ret; |
| 41430 | } | 35770 | } |
| 41431 | #endif | | |
| 41432 | | | |
| 41433 | #ifdef __LITTLE_ENDIAN__ | | |
| 41434 | __ai int16x8_t vreinterpretq_s16_u16(uint16x8_t __p0) { | | |
| 41435 | int16x8_t __ret; | | |
| 41436 | __ret = (int16x8_t)(__p0); | | |
| 41437 | return __ret; | | |
| 41438 | } | | |
| 41439 | #else | | |
| 41440 | __ai int16x8_t vreinterpretq_s16_u16(uint16x8_t __p0) { | 35771 | __ai int16x8_t vreinterpretq_s16_u16(uint16x8_t __p0) { |
| 41441 | int16x8_t __ret; | 35772 | int16x8_t __ret; |
| 41442 | __ret = (int16x8_t)(__p0); | 35773 | __ret = (int16x8_t)(__p0); |
| 41443 | return __ret; | 35774 | return __ret; |
| 41444 | } | 35775 | } |
| 41445 | #endif | | |
| 41446 | | | |
| 41447 | #ifdef __LITTLE_ENDIAN__ | | |
| 41448 | __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { | | |
| 41449 | int16x8_t __ret; | | |
| 41450 | __ret = (int16x8_t)(__p0); | | |
| 41451 | return __ret; | | |
| 41452 | } | | |
| 41453 | #else | | |
| 41454 | __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { | 35776 | __ai int16x8_t vreinterpretq_s16_s8(int8x16_t __p0) { |
| 41455 | int16x8_t __ret; | 35777 | int16x8_t __ret; |
| 41456 | __ret = (int16x8_t)(__p0); | 35778 | __ret = (int16x8_t)(__p0); |
| 41457 | return __ret; | 35779 | return __ret; |
| 41458 | } | 35780 | } |
| 41459 | #endif | | |
| 41460 | | | |
| 41461 | #ifdef __LITTLE_ENDIAN__ | | |
| 41462 | __ai int16x8_t vreinterpretq_s16_f64(float64x2_t __p0) { | | |
| 41463 | int16x8_t __ret; | | |
| 41464 | __ret = (int16x8_t)(__p0); | | |
| 41465 | return __ret; | | |
| 41466 | } | | |
| 41467 | #else | | |
| 41468 | __ai int16x8_t vreinterpretq_s16_f64(float64x2_t __p0) { | 35781 | __ai int16x8_t vreinterpretq_s16_f64(float64x2_t __p0) { |
| 41469 | int16x8_t __ret; | 35782 | int16x8_t __ret; |
| 41470 | __ret = (int16x8_t)(__p0); | 35783 | __ret = (int16x8_t)(__p0); |
| 41471 | return __ret; | 35784 | return __ret; |
| 41472 | } | 35785 | } |
| 41473 | #endif | | |
| 41474 | | | |
| 41475 | #ifdef __LITTLE_ENDIAN__ | | |
| 41476 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { | | |
| 41477 | int16x8_t __ret; | | |
| 41478 | __ret = (int16x8_t)(__p0); | | |
| 41479 | return __ret; | | |
| 41480 | } | | |
| 41481 | #else | | |
| 41482 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { | 35786 | __ai int16x8_t vreinterpretq_s16_f32(float32x4_t __p0) { |
| 41483 | int16x8_t __ret; | 35787 | int16x8_t __ret; |
| 41484 | __ret = (int16x8_t)(__p0); | 35788 | __ret = (int16x8_t)(__p0); |
| 41485 | return __ret; | 35789 | return __ret; |
| 41486 | } | 35790 | } |
| 41487 | #endif | | |
| 41488 | | | |
| 41489 | #ifdef __LITTLE_ENDIAN__ | | |
| 41490 | __ai int16x8_t vreinterpretq_s16_f16(float16x8_t __p0) { | | |
| 41491 | int16x8_t __ret; | | |
| 41492 | __ret = (int16x8_t)(__p0); | | |
| 41493 | return __ret; | | |
| 41494 | } | | |
| 41495 | #else | | |
| 41496 | __ai int16x8_t vreinterpretq_s16_f16(float16x8_t __p0) { | 35791 | __ai int16x8_t vreinterpretq_s16_f16(float16x8_t __p0) { |
| 41497 | int16x8_t __ret; | 35792 | int16x8_t __ret; |
| 41498 | __ret = (int16x8_t)(__p0); | 35793 | __ret = (int16x8_t)(__p0); |
| 41499 | return __ret; | 35794 | return __ret; |
| 41500 | } | 35795 | } |
| 41501 | #endif | | |
| 41502 | | | |
| 41503 | #ifdef __LITTLE_ENDIAN__ | | |
| 41504 | __ai int16x8_t vreinterpretq_s16_s32(int32x4_t __p0) { | | |
| 41505 | int16x8_t __ret; | | |
| 41506 | __ret = (int16x8_t)(__p0); | | |
| 41507 | return __ret; | | |
| 41508 | } | | |
| 41509 | #else | | |
| 41510 | __ai int16x8_t vreinterpretq_s16_s32(int32x4_t __p0) { | 35796 | __ai int16x8_t vreinterpretq_s16_s32(int32x4_t __p0) { |
| 41511 | int16x8_t __ret; | 35797 | int16x8_t __ret; |
| 41512 | __ret = (int16x8_t)(__p0); | 35798 | __ret = (int16x8_t)(__p0); |
| 41513 | return __ret; | 35799 | return __ret; |
| 41514 | } | 35800 | } |
| 41515 | #endif | | |
| 41516 | | | |
| 41517 | #ifdef __LITTLE_ENDIAN__ | | |
| 41518 | __ai int16x8_t vreinterpretq_s16_s64(int64x2_t __p0) { | | |
| 41519 | int16x8_t __ret; | | |
| 41520 | __ret = (int16x8_t)(__p0); | | |
| 41521 | return __ret; | | |
| 41522 | } | | |
| 41523 | #else | | |
| 41524 | __ai int16x8_t vreinterpretq_s16_s64(int64x2_t __p0) { | 35801 | __ai int16x8_t vreinterpretq_s16_s64(int64x2_t __p0) { |
| 41525 | int16x8_t __ret; | 35802 | int16x8_t __ret; |
| 41526 | __ret = (int16x8_t)(__p0); | 35803 | __ret = (int16x8_t)(__p0); |
| 41527 | return __ret; | 35804 | return __ret; |
| 41528 | } | 35805 | } |
| 41529 | #endif | | |
| 41530 | | | |
| 41531 | #ifdef __LITTLE_ENDIAN__ | | |
| 41532 | __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { | | |
| 41533 | uint8x8_t __ret; | | |
| 41534 | __ret = (uint8x8_t)(__p0); | | |
| 41535 | return __ret; | | |
| 41536 | } | | |
| 41537 | #else | | |
| 41538 | __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { | 35806 | __ai uint8x8_t vreinterpret_u8_p8(poly8x8_t __p0) { |
| 41539 | uint8x8_t __ret; | 35807 | uint8x8_t __ret; |
| 41540 | __ret = (uint8x8_t)(__p0); | 35808 | __ret = (uint8x8_t)(__p0); |
| 41541 | return __ret; | 35809 | return __ret; |
| 41542 | } | 35810 | } |
| 41543 | #endif | | |
| 41544 | | | |
| 41545 | #ifdef __LITTLE_ENDIAN__ | | |
| 41546 | __ai uint8x8_t vreinterpret_u8_p64(poly64x1_t __p0) { | | |
| 41547 | uint8x8_t __ret; | | |
| 41548 | __ret = (uint8x8_t)(__p0); | | |
| 41549 | return __ret; | | |
| 41550 | } | | |
| 41551 | #else | | |
| 41552 | __ai uint8x8_t vreinterpret_u8_p64(poly64x1_t __p0) { | 35811 | __ai uint8x8_t vreinterpret_u8_p64(poly64x1_t __p0) { |
| 41553 | uint8x8_t __ret; | 35812 | uint8x8_t __ret; |
| 41554 | __ret = (uint8x8_t)(__p0); | 35813 | __ret = (uint8x8_t)(__p0); |
| 41555 | return __ret; | 35814 | return __ret; |
| 41556 | } | 35815 | } |
| 41557 | #endif | | |
| 41558 | | | |
| 41559 | #ifdef __LITTLE_ENDIAN__ | | |
| 41560 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { | | |
| 41561 | uint8x8_t __ret; | | |
| 41562 | __ret = (uint8x8_t)(__p0); | | |
| 41563 | return __ret; | | |
| 41564 | } | | |
| 41565 | #else | | |
| 41566 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { | 35816 | __ai uint8x8_t vreinterpret_u8_p16(poly16x4_t __p0) { |
| 41567 | uint8x8_t __ret; | 35817 | uint8x8_t __ret; |
| 41568 | __ret = (uint8x8_t)(__p0); | 35818 | __ret = (uint8x8_t)(__p0); |
| 41569 | return __ret; | 35819 | return __ret; |
| 41570 | } | 35820 | } |
| 41571 | #endif | | |
| 41572 | | | |
| 41573 | #ifdef __LITTLE_ENDIAN__ | | |
| 41574 | __ai uint8x8_t vreinterpret_u8_u32(uint32x2_t __p0) { | | |
| 41575 | uint8x8_t __ret; | | |
| 41576 | __ret = (uint8x8_t)(__p0); | | |
| 41577 | return __ret; | | |
| 41578 | } | | |
| 41579 | #else | | |
| 41580 | __ai uint8x8_t vreinterpret_u8_u32(uint32x2_t __p0) { | 35821 | __ai uint8x8_t vreinterpret_u8_u32(uint32x2_t __p0) { |
| 41581 | uint8x8_t __ret; | 35822 | uint8x8_t __ret; |
| 41582 | __ret = (uint8x8_t)(__p0); | 35823 | __ret = (uint8x8_t)(__p0); |
| 41583 | return __ret; | 35824 | return __ret; |
| 41584 | } | 35825 | } |
| 41585 | #endif | | |
| 41586 | | | |
| 41587 | #ifdef __LITTLE_ENDIAN__ | | |
| 41588 | __ai uint8x8_t vreinterpret_u8_u64(uint64x1_t __p0) { | | |
| 41589 | uint8x8_t __ret; | | |
| 41590 | __ret = (uint8x8_t)(__p0); | | |
| 41591 | return __ret; | | |
| 41592 | } | | |
| 41593 | #else | | |
| 41594 | __ai uint8x8_t vreinterpret_u8_u64(uint64x1_t __p0) { | 35826 | __ai uint8x8_t vreinterpret_u8_u64(uint64x1_t __p0) { |
| 41595 | uint8x8_t __ret; | 35827 | uint8x8_t __ret; |
| 41596 | __ret = (uint8x8_t)(__p0); | 35828 | __ret = (uint8x8_t)(__p0); |
| 41597 | return __ret; | 35829 | return __ret; |
| 41598 | } | 35830 | } |
| 41599 | #endif | | |
| 41600 | | | |
| 41601 | #ifdef __LITTLE_ENDIAN__ | | |
| 41602 | __ai uint8x8_t vreinterpret_u8_u16(uint16x4_t __p0) { | | |
| 41603 | uint8x8_t __ret; | | |
| 41604 | __ret = (uint8x8_t)(__p0); | | |
| 41605 | return __ret; | | |
| 41606 | } | | |
| 41607 | #else | | |
| 41608 | __ai uint8x8_t vreinterpret_u8_u16(uint16x4_t __p0) { | 35831 | __ai uint8x8_t vreinterpret_u8_u16(uint16x4_t __p0) { |
| 41609 | uint8x8_t __ret; | 35832 | uint8x8_t __ret; |
| 41610 | __ret = (uint8x8_t)(__p0); | 35833 | __ret = (uint8x8_t)(__p0); |
| 41611 | return __ret; | 35834 | return __ret; |
| 41612 | } | 35835 | } |
| 41613 | #endif | | |
| 41614 | | | |
| 41615 | #ifdef __LITTLE_ENDIAN__ | | |
| 41616 | __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { | | |
| 41617 | uint8x8_t __ret; | | |
| 41618 | __ret = (uint8x8_t)(__p0); | | |
| 41619 | return __ret; | | |
| 41620 | } | | |
| 41621 | #else | | |
| 41622 | __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { | 35836 | __ai uint8x8_t vreinterpret_u8_s8(int8x8_t __p0) { |
| 41623 | uint8x8_t __ret; | 35837 | uint8x8_t __ret; |
| 41624 | __ret = (uint8x8_t)(__p0); | 35838 | __ret = (uint8x8_t)(__p0); |
| 41625 | return __ret; | 35839 | return __ret; |
| 41626 | } | 35840 | } |
| 41627 | #endif | | |
| 41628 | | | |
| 41629 | #ifdef __LITTLE_ENDIAN__ | | |
| 41630 | __ai uint8x8_t vreinterpret_u8_f64(float64x1_t __p0) { | | |
| 41631 | uint8x8_t __ret; | | |
| 41632 | __ret = (uint8x8_t)(__p0); | | |
| 41633 | return __ret; | | |
| 41634 | } | | |
| 41635 | #else | | |
| 41636 | __ai uint8x8_t vreinterpret_u8_f64(float64x1_t __p0) { | 35841 | __ai uint8x8_t vreinterpret_u8_f64(float64x1_t __p0) { |
| 41637 | uint8x8_t __ret; | 35842 | uint8x8_t __ret; |
| 41638 | __ret = (uint8x8_t)(__p0); | 35843 | __ret = (uint8x8_t)(__p0); |
| 41639 | return __ret; | 35844 | return __ret; |
| 41640 | } | 35845 | } |
| 41641 | #endif | | |
| 41642 | | | |
| 41643 | #ifdef __LITTLE_ENDIAN__ | | |
| 41644 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { | | |
| 41645 | uint8x8_t __ret; | | |
| 41646 | __ret = (uint8x8_t)(__p0); | | |
| 41647 | return __ret; | | |
| 41648 | } | | |
| 41649 | #else | | |
| 41650 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { | 35846 | __ai uint8x8_t vreinterpret_u8_f32(float32x2_t __p0) { |
| 41651 | uint8x8_t __ret; | 35847 | uint8x8_t __ret; |
| 41652 | __ret = (uint8x8_t)(__p0); | 35848 | __ret = (uint8x8_t)(__p0); |
| 41653 | return __ret; | 35849 | return __ret; |
| 41654 | } | 35850 | } |
| 41655 | #endif | | |
| 41656 | | | |
| 41657 | #ifdef __LITTLE_ENDIAN__ | | |
| 41658 | __ai uint8x8_t vreinterpret_u8_f16(float16x4_t __p0) { | | |
| 41659 | uint8x8_t __ret; | | |
| 41660 | __ret = (uint8x8_t)(__p0); | | |
| 41661 | return __ret; | | |
| 41662 | } | | |
| 41663 | #else | | |
| 41664 | __ai uint8x8_t vreinterpret_u8_f16(float16x4_t __p0) { | 35851 | __ai uint8x8_t vreinterpret_u8_f16(float16x4_t __p0) { |
| 41665 | uint8x8_t __ret; | 35852 | uint8x8_t __ret; |
| 41666 | __ret = (uint8x8_t)(__p0); | 35853 | __ret = (uint8x8_t)(__p0); |
| 41667 | return __ret; | 35854 | return __ret; |
| 41668 | } | 35855 | } |
| 41669 | #endif | | |
| 41670 | | | |
| 41671 | #ifdef __LITTLE_ENDIAN__ | | |
| 41672 | __ai uint8x8_t vreinterpret_u8_s32(int32x2_t __p0) { | | |
| 41673 | uint8x8_t __ret; | | |
| 41674 | __ret = (uint8x8_t)(__p0); | | |
| 41675 | return __ret; | | |
| 41676 | } | | |
| 41677 | #else | | |
| 41678 | __ai uint8x8_t vreinterpret_u8_s32(int32x2_t __p0) { | 35856 | __ai uint8x8_t vreinterpret_u8_s32(int32x2_t __p0) { |
| 41679 | uint8x8_t __ret; | 35857 | uint8x8_t __ret; |
| 41680 | __ret = (uint8x8_t)(__p0); | 35858 | __ret = (uint8x8_t)(__p0); |
| 41681 | return __ret; | 35859 | return __ret; |
| 41682 | } | 35860 | } |
| 41683 | #endif | | |
| 41684 | | | |
| 41685 | #ifdef __LITTLE_ENDIAN__ | | |
| 41686 | __ai uint8x8_t vreinterpret_u8_s64(int64x1_t __p0) { | | |
| 41687 | uint8x8_t __ret; | | |
| 41688 | __ret = (uint8x8_t)(__p0); | | |
| 41689 | return __ret; | | |
| 41690 | } | | |
| 41691 | #else | | |
| 41692 | __ai uint8x8_t vreinterpret_u8_s64(int64x1_t __p0) { | 35861 | __ai uint8x8_t vreinterpret_u8_s64(int64x1_t __p0) { |
| 41693 | uint8x8_t __ret; | 35862 | uint8x8_t __ret; |
| 41694 | __ret = (uint8x8_t)(__p0); | 35863 | __ret = (uint8x8_t)(__p0); |
| 41695 | return __ret; | 35864 | return __ret; |
| 41696 | } | 35865 | } |
| 41697 | #endif | | |
| 41698 | | | |
| 41699 | #ifdef __LITTLE_ENDIAN__ | | |
| 41700 | __ai uint8x8_t vreinterpret_u8_s16(int16x4_t __p0) { | 35866 | __ai uint8x8_t vreinterpret_u8_s16(int16x4_t __p0) { |
| 41701 | uint8x8_t __ret; | 35867 | uint8x8_t __ret; |
| 41702 | __ret = (uint8x8_t)(__p0); | 35868 | __ret = (uint8x8_t)(__p0); |
| 41703 | return __ret; | 35869 | return __ret; |
| 41704 | } | 35870 | } |
| 41705 | #else | 35871 | __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { |
| 41706 | __ai uint8x8_t vreinterpret_u8_s16(int16x4_t __p0) { | 35872 | uint32x2_t __ret; |
| 41707 | uint8x8_t __ret; | 35873 | __ret = (uint32x2_t)(__p0); |
| 41708 | __ret = (uint8x8_t)(__p0); | | |
| 41709 | return __ret; | 35874 | return __ret; |
| 41710 | } | 35875 | } |
| 41711 | #endif | 35876 | __ai uint32x2_t vreinterpret_u32_p64(poly64x1_t __p0) { |
| 41712 | | | |
| 41713 | #ifdef __LITTLE_ENDIAN__ | | |
| 41714 | __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { | | |
| 41715 | uint32x2_t __ret; | 35877 | uint32x2_t __ret; |
| 41716 | __ret = (uint32x2_t)(__p0); | 35878 | __ret = (uint32x2_t)(__p0); |
| 41717 | return __ret; | 35879 | return __ret; |
| 41718 | } | 35880 | } |
| 41719 | #else | 35881 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { |
| 41720 | __ai uint32x2_t vreinterpret_u32_p8(poly8x8_t __p0) { | | |
| 41721 | uint32x2_t __ret; | 35882 | uint32x2_t __ret; |
| 41722 | __ret = (uint32x2_t)(__p0); | 35883 | __ret = (uint32x2_t)(__p0); |
| 41723 | return __ret; | 35884 | return __ret; |
| 41724 | } | 35885 | } |
| 41725 | #endif | 35886 | __ai uint32x2_t vreinterpret_u32_u8(uint8x8_t __p0) { |
| 41726 | | | |
| 41727 | #ifdef __LITTLE_ENDIAN__ | | |
| 41728 | __ai uint32x2_t vreinterpret_u32_p64(poly64x1_t __p0) { | | |
| 41729 | uint32x2_t __ret; | 35887 | uint32x2_t __ret; |
| 41730 | __ret = (uint32x2_t)(__p0); | 35888 | __ret = (uint32x2_t)(__p0); |
| 41731 | return __ret; | 35889 | return __ret; |
| 41732 | } | 35890 | } |
| 41733 | #else | 35891 | __ai uint32x2_t vreinterpret_u32_u64(uint64x1_t __p0) { |
| 41734 | __ai uint32x2_t vreinterpret_u32_p64(poly64x1_t __p0) { | | |
| 41735 | uint32x2_t __ret; | 35892 | uint32x2_t __ret; |
| 41736 | __ret = (uint32x2_t)(__p0); | 35893 | __ret = (uint32x2_t)(__p0); |
| 41737 | return __ret; | 35894 | return __ret; |
| 41738 | } | 35895 | } |
| 41739 | #endif | 35896 | __ai uint32x2_t vreinterpret_u32_u16(uint16x4_t __p0) { |
| 41740 | | | |
| 41741 | #ifdef __LITTLE_ENDIAN__ | | |
| 41742 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { | | |
| 41743 | uint32x2_t __ret; | 35897 | uint32x2_t __ret; |
| 41744 | __ret = (uint32x2_t)(__p0); | 35898 | __ret = (uint32x2_t)(__p0); |
| 41745 | return __ret; | 35899 | return __ret; |
| 41746 | } | 35900 | } |
| 41747 | #else | 35901 | __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { |
| 41748 | __ai uint32x2_t vreinterpret_u32_p16(poly16x4_t __p0) { | | |
| 41749 | uint32x2_t __ret; | 35902 | uint32x2_t __ret; |
| 41750 | __ret = (uint32x2_t)(__p0); | 35903 | __ret = (uint32x2_t)(__p0); |
| 41751 | return __ret; | 35904 | return __ret; |
| 41752 | } | 35905 | } |
| 41753 | #endif | 35906 | __ai uint32x2_t vreinterpret_u32_f64(float64x1_t __p0) { |
| 41754 | | | |
| 41755 | #ifdef __LITTLE_ENDIAN__ | | |
| 41756 | __ai uint32x2_t vreinterpret_u32_u8(uint8x8_t __p0) { | | |
| 41757 | uint32x2_t __ret; | 35907 | uint32x2_t __ret; |
| 41758 | __ret = (uint32x2_t)(__p0); | 35908 | __ret = (uint32x2_t)(__p0); |
| 41759 | return __ret; | 35909 | return __ret; |
| 41760 | } | 35910 | } |
| 41761 | #else | 35911 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { |
| 41762 | __ai uint32x2_t vreinterpret_u32_u8(uint8x8_t __p0) { | | |
| 41763 | uint32x2_t __ret; | 35912 | uint32x2_t __ret; |
| 41764 | __ret = (uint32x2_t)(__p0); | 35913 | __ret = (uint32x2_t)(__p0); |
| 41765 | return __ret; | 35914 | return __ret; |
| 41766 | } | 35915 | } |
| 41767 | #endif | | |
| 41768 | | | |
| 41769 | #ifdef __LITTLE_ENDIAN__ | | |
| 41770 | __ai uint32x2_t vreinterpret_u32_u64(uint64x1_t __p0) { | | |
| 41771 | uint32x2_t __ret; | | |
| 41772 | __ret = (uint32x2_t)(__p0); | | |
| 41773 | return __ret; | | |
| 41774 | } | | |
| 41775 | #else | | |
| 41776 | __ai uint32x2_t vreinterpret_u32_u64(uint64x1_t __p0) { | | |
| 41777 | uint32x2_t __ret; | | |
| 41778 | __ret = (uint32x2_t)(__p0); | | |
| 41779 | return __ret; | | |
| 41780 | } | | |
| 41781 | #endif | | |
| 41782 | | | |
| 41783 | #ifdef __LITTLE_ENDIAN__ | | |
| 41784 | __ai uint32x2_t vreinterpret_u32_u16(uint16x4_t __p0) { | | |
| 41785 | uint32x2_t __ret; | | |
| 41786 | __ret = (uint32x2_t)(__p0); | | |
| 41787 | return __ret; | | |
| 41788 | } | | |
| 41789 | #else | | |
| 41790 | __ai uint32x2_t vreinterpret_u32_u16(uint16x4_t __p0) { | | |
| 41791 | uint32x2_t __ret; | | |
| 41792 | __ret = (uint32x2_t)(__p0); | | |
| 41793 | return __ret; | | |
| 41794 | } | | |
| 41795 | #endif | | |
| 41796 | | | |
| 41797 | #ifdef __LITTLE_ENDIAN__ | | |
| 41798 | __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { | | |
| 41799 | uint32x2_t __ret; | | |
| 41800 | __ret = (uint32x2_t)(__p0); | | |
| 41801 | return __ret; | | |
| 41802 | } | | |
| 41803 | #else | | |
| 41804 | __ai uint32x2_t vreinterpret_u32_s8(int8x8_t __p0) { | | |
| 41805 | uint32x2_t __ret; | | |
| 41806 | __ret = (uint32x2_t)(__p0); | | |
| 41807 | return __ret; | | |
| 41808 | } | | |
| 41809 | #endif | | |
| 41810 | | | |
| 41811 | #ifdef __LITTLE_ENDIAN__ | | |
| 41812 | __ai uint32x2_t vreinterpret_u32_f64(float64x1_t __p0) { | | |
| 41813 | uint32x2_t __ret; | | |
| 41814 | __ret = (uint32x2_t)(__p0); | | |
| 41815 | return __ret; | | |
| 41816 | } | | |
| 41817 | #else | | |
| 41818 | __ai uint32x2_t vreinterpret_u32_f64(float64x1_t __p0) { | | |
| 41819 | uint32x2_t __ret; | | |
| 41820 | __ret = (uint32x2_t)(__p0); | | |
| 41821 | return __ret; | | |
| 41822 | } | | |
| 41823 | #endif | | |
| 41824 | | | |
| 41825 | #ifdef __LITTLE_ENDIAN__ | | |
| 41826 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { | | |
| 41827 | uint32x2_t __ret; | | |
| 41828 | __ret = (uint32x2_t)(__p0); | | |
| 41829 | return __ret; | | |
| 41830 | } | | |
| 41831 | #else | | |
| 41832 | __ai uint32x2_t vreinterpret_u32_f32(float32x2_t __p0) { | | |
| 41833 | uint32x2_t __ret; | | |
| 41834 | __ret = (uint32x2_t)(__p0); | | |
| 41835 | return __ret; | | |
| 41836 | } | | |
| 41837 | #endif | | |
| 41838 | | | |
| 41839 | #ifdef __LITTLE_ENDIAN__ | | |
| 41840 | __ai uint32x2_t vreinterpret_u32_f16(float16x4_t __p0) { | | |
| 41841 | uint32x2_t __ret; | | |
| 41842 | __ret = (uint32x2_t)(__p0); | | |
| 41843 | return __ret; | | |
| 41844 | } | | |
| 41845 | #else | | |
| 41846 | __ai uint32x2_t vreinterpret_u32_f16(float16x4_t __p0) { | 35916 | __ai uint32x2_t vreinterpret_u32_f16(float16x4_t __p0) { |
| 41847 | uint32x2_t __ret; | 35917 | uint32x2_t __ret; |
| 41848 | __ret = (uint32x2_t)(__p0); | 35918 | __ret = (uint32x2_t)(__p0); |
| 41849 | return __ret; | 35919 | return __ret; |
| 41850 | } | 35920 | } |
| 41851 | #endif | | |
| 41852 | | | |
| 41853 | #ifdef __LITTLE_ENDIAN__ | | |
| 41854 | __ai uint32x2_t vreinterpret_u32_s32(int32x2_t __p0) { | | |
| 41855 | uint32x2_t __ret; | | |
| 41856 | __ret = (uint32x2_t)(__p0); | | |
| 41857 | return __ret; | | |
| 41858 | } | | |
| 41859 | #else | | |
| 41860 | __ai uint32x2_t vreinterpret_u32_s32(int32x2_t __p0) { | 35921 | __ai uint32x2_t vreinterpret_u32_s32(int32x2_t __p0) { |
| 41861 | uint32x2_t __ret; | 35922 | uint32x2_t __ret; |
| 41862 | __ret = (uint32x2_t)(__p0); | 35923 | __ret = (uint32x2_t)(__p0); |
| 41863 | return __ret; | 35924 | return __ret; |
| 41864 | } | 35925 | } |
| 41865 | #endif | | |
| 41866 | | | |
| 41867 | #ifdef __LITTLE_ENDIAN__ | | |
| 41868 | __ai uint32x2_t vreinterpret_u32_s64(int64x1_t __p0) { | 35926 | __ai uint32x2_t vreinterpret_u32_s64(int64x1_t __p0) { |
| 41869 | uint32x2_t __ret; | 35927 | uint32x2_t __ret; |
| 41870 | __ret = (uint32x2_t)(__p0); | 35928 | __ret = (uint32x2_t)(__p0); |
| 41871 | return __ret; | 35929 | return __ret; |
| 41872 | } | 35930 | } |
| 41873 | #else | | |
| 41874 | __ai uint32x2_t vreinterpret_u32_s64(int64x1_t __p0) { | | |
| 41875 | uint32x2_t __ret; | | |
| 41876 | __ret = (uint32x2_t)(__p0); | | |
| 41877 | return __ret; | | |
| 41878 | } | | |
| 41879 | #endif | | |
| 41880 | | | |
| 41881 | #ifdef __LITTLE_ENDIAN__ | | |
| 41882 | __ai uint32x2_t vreinterpret_u32_s16(int16x4_t __p0) { | | |
| 41883 | uint32x2_t __ret; | | |
| 41884 | __ret = (uint32x2_t)(__p0); | | |
| 41885 | return __ret; | | |
| 41886 | } | | |
| 41887 | #else | | |
| 41888 | __ai uint32x2_t vreinterpret_u32_s16(int16x4_t __p0) { | 35931 | __ai uint32x2_t vreinterpret_u32_s16(int16x4_t __p0) { |
| 41889 | uint32x2_t __ret; | 35932 | uint32x2_t __ret; |
| 41890 | __ret = (uint32x2_t)(__p0); | 35933 | __ret = (uint32x2_t)(__p0); |
| 41891 | return __ret; | 35934 | return __ret; |
| 41892 | } | 35935 | } |
| 41893 | #endif | | |
| 41894 | | | |
| 41895 | #ifdef __LITTLE_ENDIAN__ | | |
| 41896 | __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { | 35936 | __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { |
| 41897 | uint64x1_t __ret; | 35937 | uint64x1_t __ret; |
| 41898 | __ret = (uint64x1_t)(__p0); | 35938 | __ret = (uint64x1_t)(__p0); |
| 41899 | return __ret; | 35939 | return __ret; |
| 41900 | } | 35940 | } |
| 41901 | #else | | |
| 41902 | __ai uint64x1_t vreinterpret_u64_p8(poly8x8_t __p0) { | | |
| 41903 | uint64x1_t __ret; | | |
| 41904 | __ret = (uint64x1_t)(__p0); | | |
| 41905 | return __ret; | | |
| 41906 | } | | |
| 41907 | #endif | | |
| 41908 | | | |
| 41909 | #ifdef __LITTLE_ENDIAN__ | | |
| 41910 | __ai uint64x1_t vreinterpret_u64_p64(poly64x1_t __p0) { | 35941 | __ai uint64x1_t vreinterpret_u64_p64(poly64x1_t __p0) { |
| 41911 | uint64x1_t __ret; | 35942 | uint64x1_t __ret; |
| 41912 | __ret = (uint64x1_t)(__p0); | 35943 | __ret = (uint64x1_t)(__p0); |
| 41913 | return __ret; | 35944 | return __ret; |
| 41914 | } | 35945 | } |
| 41915 | #else | | |
| 41916 | __ai uint64x1_t vreinterpret_u64_p64(poly64x1_t __p0) { | | |
| 41917 | uint64x1_t __ret; | | |
| 41918 | __ret = (uint64x1_t)(__p0); | | |
| 41919 | return __ret; | | |
| 41920 | } | | |
| 41921 | #endif | | |
| 41922 | | | |
| 41923 | #ifdef __LITTLE_ENDIAN__ | | |
| 41924 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { | | |
| 41925 | uint64x1_t __ret; | | |
| 41926 | __ret = (uint64x1_t)(__p0); | | |
| 41927 | return __ret; | | |
| 41928 | } | | |
| 41929 | #else | | |
| 41930 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { | 35946 | __ai uint64x1_t vreinterpret_u64_p16(poly16x4_t __p0) { |
| 41931 | uint64x1_t __ret; | 35947 | uint64x1_t __ret; |
| 41932 | __ret = (uint64x1_t)(__p0); | 35948 | __ret = (uint64x1_t)(__p0); |
| 41933 | return __ret; | 35949 | return __ret; |
| 41934 | } | 35950 | } |
| 41935 | #endif | | |
| 41936 | | | |
| 41937 | #ifdef __LITTLE_ENDIAN__ | | |
| 41938 | __ai uint64x1_t vreinterpret_u64_u8(uint8x8_t __p0) { | | |
| 41939 | uint64x1_t __ret; | | |
| 41940 | __ret = (uint64x1_t)(__p0); | | |
| 41941 | return __ret; | | |
| 41942 | } | | |
| 41943 | #else | | |
| 41944 | __ai uint64x1_t vreinterpret_u64_u8(uint8x8_t __p0) { | 35951 | __ai uint64x1_t vreinterpret_u64_u8(uint8x8_t __p0) { |
| 41945 | uint64x1_t __ret; | 35952 | uint64x1_t __ret; |
| 41946 | __ret = (uint64x1_t)(__p0); | 35953 | __ret = (uint64x1_t)(__p0); |
| 41947 | return __ret; | 35954 | return __ret; |
| 41948 | } | 35955 | } |
| 41949 | #endif | | |
| 41950 | | | |
| 41951 | #ifdef __LITTLE_ENDIAN__ | | |
| 41952 | __ai uint64x1_t vreinterpret_u64_u32(uint32x2_t __p0) { | | |
| 41953 | uint64x1_t __ret; | | |
| 41954 | __ret = (uint64x1_t)(__p0); | | |
| 41955 | return __ret; | | |
| 41956 | } | | |
| 41957 | #else | | |
| 41958 | __ai uint64x1_t vreinterpret_u64_u32(uint32x2_t __p0) { | 35956 | __ai uint64x1_t vreinterpret_u64_u32(uint32x2_t __p0) { |
| 41959 | uint64x1_t __ret; | 35957 | uint64x1_t __ret; |
| 41960 | __ret = (uint64x1_t)(__p0); | 35958 | __ret = (uint64x1_t)(__p0); |
| 41961 | return __ret; | 35959 | return __ret; |
| 41962 | } | 35960 | } |
| 41963 | #endif | | |
| 41964 | | | |
| 41965 | #ifdef __LITTLE_ENDIAN__ | | |
| 41966 | __ai uint64x1_t vreinterpret_u64_u16(uint16x4_t __p0) { | 35961 | __ai uint64x1_t vreinterpret_u64_u16(uint16x4_t __p0) { |
| 41967 | uint64x1_t __ret; | 35962 | uint64x1_t __ret; |
| 41968 | __ret = (uint64x1_t)(__p0); | 35963 | __ret = (uint64x1_t)(__p0); |
| 41969 | return __ret; | 35964 | return __ret; |
| 41970 | } | 35965 | } |
| 41971 | #else | | |
| 41972 | __ai uint64x1_t vreinterpret_u64_u16(uint16x4_t __p0) { | | |
| 41973 | uint64x1_t __ret; | | |
| 41974 | __ret = (uint64x1_t)(__p0); | | |
| 41975 | return __ret; | | |
| 41976 | } | | |
| 41977 | #endif | | |
| 41978 | | | |
| 41979 | #ifdef __LITTLE_ENDIAN__ | | |
| 41980 | __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { | | |
| 41981 | uint64x1_t __ret; | | |
| 41982 | __ret = (uint64x1_t)(__p0); | | |
| 41983 | return __ret; | | |
| 41984 | } | | |
| 41985 | #else | | |
| 41986 | __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { | 35966 | __ai uint64x1_t vreinterpret_u64_s8(int8x8_t __p0) { |
| 41987 | uint64x1_t __ret; | 35967 | uint64x1_t __ret; |
| 41988 | __ret = (uint64x1_t)(__p0); | 35968 | __ret = (uint64x1_t)(__p0); |
| 41989 | return __ret; | 35969 | return __ret; |
| 41990 | } | 35970 | } |
| 41991 | #endif | | |
| 41992 | | | |
| 41993 | #ifdef __LITTLE_ENDIAN__ | | |
| 41994 | __ai uint64x1_t vreinterpret_u64_f64(float64x1_t __p0) { | 35971 | __ai uint64x1_t vreinterpret_u64_f64(float64x1_t __p0) { |
| 41995 | uint64x1_t __ret; | 35972 | uint64x1_t __ret; |
| 41996 | __ret = (uint64x1_t)(__p0); | 35973 | __ret = (uint64x1_t)(__p0); |
| 41997 | return __ret; | 35974 | return __ret; |
| 41998 | } | 35975 | } |
| 41999 | #else | | |
| 42000 | __ai uint64x1_t vreinterpret_u64_f64(float64x1_t __p0) { | | |
| 42001 | uint64x1_t __ret; | | |
| 42002 | __ret = (uint64x1_t)(__p0); | | |
| 42003 | return __ret; | | |
| 42004 | } | | |
| 42005 | #endif | | |
| 42006 | | | |
| 42007 | #ifdef __LITTLE_ENDIAN__ | | |
| 42008 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { | 35976 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { |
| 42009 | uint64x1_t __ret; | 35977 | uint64x1_t __ret; |
| 42010 | __ret = (uint64x1_t)(__p0); | 35978 | __ret = (uint64x1_t)(__p0); |
| 42011 | return __ret; | 35979 | return __ret; |
| 42012 | } | 35980 | } |
| 42013 | #else | | |
| 42014 | __ai uint64x1_t vreinterpret_u64_f32(float32x2_t __p0) { | | |
| 42015 | uint64x1_t __ret; | | |
| 42016 | __ret = (uint64x1_t)(__p0); | | |
| 42017 | return __ret; | | |
| 42018 | } | | |
| 42019 | #endif | | |
| 42020 | | | |
| 42021 | #ifdef __LITTLE_ENDIAN__ | | |
| 42022 | __ai uint64x1_t vreinterpret_u64_f16(float16x4_t __p0) { | | |
| 42023 | uint64x1_t __ret; | | |
| 42024 | __ret = (uint64x1_t)(__p0); | | |
| 42025 | return __ret; | | |
| 42026 | } | | |
| 42027 | #else | | |
| 42028 | __ai uint64x1_t vreinterpret_u64_f16(float16x4_t __p0) { | 35981 | __ai uint64x1_t vreinterpret_u64_f16(float16x4_t __p0) { |
| 42029 | uint64x1_t __ret; | 35982 | uint64x1_t __ret; |
| 42030 | __ret = (uint64x1_t)(__p0); | 35983 | __ret = (uint64x1_t)(__p0); |
| 42031 | return __ret; | 35984 | return __ret; |
| 42032 | } | 35985 | } |
| 42033 | #endif | | |
| 42034 | | | |
| 42035 | #ifdef __LITTLE_ENDIAN__ | | |
| 42036 | __ai uint64x1_t vreinterpret_u64_s32(int32x2_t __p0) { | | |
| 42037 | uint64x1_t __ret; | | |
| 42038 | __ret = (uint64x1_t)(__p0); | | |
| 42039 | return __ret; | | |
| 42040 | } | | |
| 42041 | #else | | |
| 42042 | __ai uint64x1_t vreinterpret_u64_s32(int32x2_t __p0) { | 35986 | __ai uint64x1_t vreinterpret_u64_s32(int32x2_t __p0) { |
| 42043 | uint64x1_t __ret; | 35987 | uint64x1_t __ret; |
| 42044 | __ret = (uint64x1_t)(__p0); | 35988 | __ret = (uint64x1_t)(__p0); |
| 42045 | return __ret; | 35989 | return __ret; |
| 42046 | } | 35990 | } |
| 42047 | #endif | | |
| 42048 | | | |
| 42049 | #ifdef __LITTLE_ENDIAN__ | | |
| 42050 | __ai uint64x1_t vreinterpret_u64_s64(int64x1_t __p0) { | | |
| 42051 | uint64x1_t __ret; | | |
| 42052 | __ret = (uint64x1_t)(__p0); | | |
| 42053 | return __ret; | | |
| 42054 | } | | |
| 42055 | #else | | |
| 42056 | __ai uint64x1_t vreinterpret_u64_s64(int64x1_t __p0) { | 35991 | __ai uint64x1_t vreinterpret_u64_s64(int64x1_t __p0) { |
| 42057 | uint64x1_t __ret; | 35992 | uint64x1_t __ret; |
| 42058 | __ret = (uint64x1_t)(__p0); | 35993 | __ret = (uint64x1_t)(__p0); |
| 42059 | return __ret; | 35994 | return __ret; |
| 42060 | } | 35995 | } |
| 42061 | #endif | | |
| 42062 | | | |
| 42063 | #ifdef __LITTLE_ENDIAN__ | | |
| 42064 | __ai uint64x1_t vreinterpret_u64_s16(int16x4_t __p0) { | 35996 | __ai uint64x1_t vreinterpret_u64_s16(int16x4_t __p0) { |
| 42065 | uint64x1_t __ret; | 35997 | uint64x1_t __ret; |
| 42066 | __ret = (uint64x1_t)(__p0); | 35998 | __ret = (uint64x1_t)(__p0); |
| 42067 | return __ret; | 35999 | return __ret; |
| 42068 | } | 36000 | } |
| 42069 | #else | | |
| 42070 | __ai uint64x1_t vreinterpret_u64_s16(int16x4_t __p0) { | | |
| 42071 | uint64x1_t __ret; | | |
| 42072 | __ret = (uint64x1_t)(__p0); | | |
| 42073 | return __ret; | | |
| 42074 | } | | |
| 42075 | #endif | | |
| 42076 | | | |
| 42077 | #ifdef __LITTLE_ENDIAN__ | | |
| 42078 | __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { | | |
| 42079 | uint16x4_t __ret; | | |
| 42080 | __ret = (uint16x4_t)(__p0); | | |
| 42081 | return __ret; | | |
| 42082 | } | | |
| 42083 | #else | | |
| 42084 | __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { | 36001 | __ai uint16x4_t vreinterpret_u16_p8(poly8x8_t __p0) { |
| 42085 | uint16x4_t __ret; | 36002 | uint16x4_t __ret; |
| 42086 | __ret = (uint16x4_t)(__p0); | 36003 | __ret = (uint16x4_t)(__p0); |
| 42087 | return __ret; | 36004 | return __ret; |
| 42088 | } | 36005 | } |
| 42089 | #endif | | |
| 42090 | | | |
| 42091 | #ifdef __LITTLE_ENDIAN__ | | |
| 42092 | __ai uint16x4_t vreinterpret_u16_p64(poly64x1_t __p0) { | 36006 | __ai uint16x4_t vreinterpret_u16_p64(poly64x1_t __p0) { |
| 42093 | uint16x4_t __ret; | 36007 | uint16x4_t __ret; |
| 42094 | __ret = (uint16x4_t)(__p0); | 36008 | __ret = (uint16x4_t)(__p0); |
| 42095 | return __ret; | 36009 | return __ret; |
| 42096 | } | 36010 | } |
| 42097 | #else | | |
| 42098 | __ai uint16x4_t vreinterpret_u16_p64(poly64x1_t __p0) { | | |
| 42099 | uint16x4_t __ret; | | |
| 42100 | __ret = (uint16x4_t)(__p0); | | |
| 42101 | return __ret; | | |
| 42102 | } | | |
| 42103 | #endif | | |
| 42104 | | | |
| 42105 | #ifdef __LITTLE_ENDIAN__ | | |
| 42106 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { | 36011 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { |
| 42107 | uint16x4_t __ret; | 36012 | uint16x4_t __ret; |
| 42108 | __ret = (uint16x4_t)(__p0); | 36013 | __ret = (uint16x4_t)(__p0); |
| 42109 | return __ret; | 36014 | return __ret; |
| 42110 | } | 36015 | } |
| 42111 | #else | | |
| 42112 | __ai uint16x4_t vreinterpret_u16_p16(poly16x4_t __p0) { | | |
| 42113 | uint16x4_t __ret; | | |
| 42114 | __ret = (uint16x4_t)(__p0); | | |
| 42115 | return __ret; | | |
| 42116 | } | | |
| 42117 | #endif | | |
| 42118 | | | |
| 42119 | #ifdef __LITTLE_ENDIAN__ | | |
| 42120 | __ai uint16x4_t vreinterpret_u16_u8(uint8x8_t __p0) { | 36016 | __ai uint16x4_t vreinterpret_u16_u8(uint8x8_t __p0) { |
| 42121 | uint16x4_t __ret; | 36017 | uint16x4_t __ret; |
| 42122 | __ret = (uint16x4_t)(__p0); | 36018 | __ret = (uint16x4_t)(__p0); |
| 42123 | return __ret; | 36019 | return __ret; |
| 42124 | } | 36020 | } |
| 42125 | #else | | |
| 42126 | __ai uint16x4_t vreinterpret_u16_u8(uint8x8_t __p0) { | | |
| 42127 | uint16x4_t __ret; | | |
| 42128 | __ret = (uint16x4_t)(__p0); | | |
| 42129 | return __ret; | | |
| 42130 | } | | |
| 42131 | #endif | | |
| 42132 | | | |
| 42133 | #ifdef __LITTLE_ENDIAN__ | | |
| 42134 | __ai uint16x4_t vreinterpret_u16_u32(uint32x2_t __p0) { | | |
| 42135 | uint16x4_t __ret; | | |
| 42136 | __ret = (uint16x4_t)(__p0); | | |
| 42137 | return __ret; | | |
| 42138 | } | | |
| 42139 | #else | | |
| 42140 | __ai uint16x4_t vreinterpret_u16_u32(uint32x2_t __p0) { | 36021 | __ai uint16x4_t vreinterpret_u16_u32(uint32x2_t __p0) { |
| 42141 | uint16x4_t __ret; | 36022 | uint16x4_t __ret; |
| 42142 | __ret = (uint16x4_t)(__p0); | 36023 | __ret = (uint16x4_t)(__p0); |
| 42143 | return __ret; | 36024 | return __ret; |
| 42144 | } | 36025 | } |
| 42145 | #endif | | |
| 42146 | | | |
| 42147 | #ifdef __LITTLE_ENDIAN__ | | |
| 42148 | __ai uint16x4_t vreinterpret_u16_u64(uint64x1_t __p0) { | | |
| 42149 | uint16x4_t __ret; | | |
| 42150 | __ret = (uint16x4_t)(__p0); | | |
| 42151 | return __ret; | | |
| 42152 | } | | |
| 42153 | #else | | |
| 42154 | __ai uint16x4_t vreinterpret_u16_u64(uint64x1_t __p0) { | 36026 | __ai uint16x4_t vreinterpret_u16_u64(uint64x1_t __p0) { |
| 42155 | uint16x4_t __ret; | 36027 | uint16x4_t __ret; |
| 42156 | __ret = (uint16x4_t)(__p0); | 36028 | __ret = (uint16x4_t)(__p0); |
| 42157 | return __ret; | 36029 | return __ret; |
| 42158 | } | 36030 | } |
| 42159 | #endif | | |
| 42160 | | | |
| 42161 | #ifdef __LITTLE_ENDIAN__ | | |
| 42162 | __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { | 36031 | __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { |
| 42163 | uint16x4_t __ret; | 36032 | uint16x4_t __ret; |
| 42164 | __ret = (uint16x4_t)(__p0); | 36033 | __ret = (uint16x4_t)(__p0); |
| 42165 | return __ret; | 36034 | return __ret; |
| 42166 | } | 36035 | } |
| 42167 | #else | | |
| 42168 | __ai uint16x4_t vreinterpret_u16_s8(int8x8_t __p0) { | | |
| 42169 | uint16x4_t __ret; | | |
| 42170 | __ret = (uint16x4_t)(__p0); | | |
| 42171 | return __ret; | | |
| 42172 | } | | |
| 42173 | #endif | | |
| 42174 | | | |
| 42175 | #ifdef __LITTLE_ENDIAN__ | | |
| 42176 | __ai uint16x4_t vreinterpret_u16_f64(float64x1_t __p0) { | | |
| 42177 | uint16x4_t __ret; | | |
| 42178 | __ret = (uint16x4_t)(__p0); | | |
| 42179 | return __ret; | | |
| 42180 | } | | |
| 42181 | #else | | |
| 42182 | __ai uint16x4_t vreinterpret_u16_f64(float64x1_t __p0) { | 36036 | __ai uint16x4_t vreinterpret_u16_f64(float64x1_t __p0) { |
| 42183 | uint16x4_t __ret; | 36037 | uint16x4_t __ret; |
| 42184 | __ret = (uint16x4_t)(__p0); | 36038 | __ret = (uint16x4_t)(__p0); |
| 42185 | return __ret; | 36039 | return __ret; |
| 42186 | } | 36040 | } |
| 42187 | #endif | | |
| 42188 | | | |
| 42189 | #ifdef __LITTLE_ENDIAN__ | | |
| 42190 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { | 36041 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { |
| 42191 | uint16x4_t __ret; | 36042 | uint16x4_t __ret; |
| 42192 | __ret = (uint16x4_t)(__p0); | 36043 | __ret = (uint16x4_t)(__p0); |
| 42193 | return __ret; | 36044 | return __ret; |
| 42194 | } | 36045 | } |
| 42195 | #else | | |
| 42196 | __ai uint16x4_t vreinterpret_u16_f32(float32x2_t __p0) { | | |
| 42197 | uint16x4_t __ret; | | |
| 42198 | __ret = (uint16x4_t)(__p0); | | |
| 42199 | return __ret; | | |
| 42200 | } | | |
| 42201 | #endif | | |
| 42202 | | | |
| 42203 | #ifdef __LITTLE_ENDIAN__ | | |
| 42204 | __ai uint16x4_t vreinterpret_u16_f16(float16x4_t __p0) { | 36046 | __ai uint16x4_t vreinterpret_u16_f16(float16x4_t __p0) { |
| 42205 | uint16x4_t __ret; | 36047 | uint16x4_t __ret; |
| 42206 | __ret = (uint16x4_t)(__p0); | 36048 | __ret = (uint16x4_t)(__p0); |
| 42207 | return __ret; | 36049 | return __ret; |
| 42208 | } | 36050 | } |
| 42209 | #else | | |
| 42210 | __ai uint16x4_t vreinterpret_u16_f16(float16x4_t __p0) { | | |
| 42211 | uint16x4_t __ret; | | |
| 42212 | __ret = (uint16x4_t)(__p0); | | |
| 42213 | return __ret; | | |
| 42214 | } | | |
| 42215 | #endif | | |
| 42216 | | | |
| 42217 | #ifdef __LITTLE_ENDIAN__ | | |
| 42218 | __ai uint16x4_t vreinterpret_u16_s32(int32x2_t __p0) { | | |
| 42219 | uint16x4_t __ret; | | |
| 42220 | __ret = (uint16x4_t)(__p0); | | |
| 42221 | return __ret; | | |
| 42222 | } | | |
| 42223 | #else | | |
| 42224 | __ai uint16x4_t vreinterpret_u16_s32(int32x2_t __p0) { | 36051 | __ai uint16x4_t vreinterpret_u16_s32(int32x2_t __p0) { |
| 42225 | uint16x4_t __ret; | 36052 | uint16x4_t __ret; |
| 42226 | __ret = (uint16x4_t)(__p0); | 36053 | __ret = (uint16x4_t)(__p0); |
| 42227 | return __ret; | 36054 | return __ret; |
| 42228 | } | 36055 | } |
| 42229 | #endif | | |
| 42230 | | | |
| 42231 | #ifdef __LITTLE_ENDIAN__ | | |
| 42232 | __ai uint16x4_t vreinterpret_u16_s64(int64x1_t __p0) { | | |
| 42233 | uint16x4_t __ret; | | |
| 42234 | __ret = (uint16x4_t)(__p0); | | |
| 42235 | return __ret; | | |
| 42236 | } | | |
| 42237 | #else | | |
| 42238 | __ai uint16x4_t vreinterpret_u16_s64(int64x1_t __p0) { | 36056 | __ai uint16x4_t vreinterpret_u16_s64(int64x1_t __p0) { |
| 42239 | uint16x4_t __ret; | 36057 | uint16x4_t __ret; |
| 42240 | __ret = (uint16x4_t)(__p0); | 36058 | __ret = (uint16x4_t)(__p0); |
| 42241 | return __ret; | 36059 | return __ret; |
| 42242 | } | 36060 | } |
| 42243 | #endif | | |
| 42244 | | | |
| 42245 | #ifdef __LITTLE_ENDIAN__ | | |
| 42246 | __ai uint16x4_t vreinterpret_u16_s16(int16x4_t __p0) { | | |
| 42247 | uint16x4_t __ret; | | |
| 42248 | __ret = (uint16x4_t)(__p0); | | |
| 42249 | return __ret; | | |
| 42250 | } | | |
| 42251 | #else | | |
| 42252 | __ai uint16x4_t vreinterpret_u16_s16(int16x4_t __p0) { | 36061 | __ai uint16x4_t vreinterpret_u16_s16(int16x4_t __p0) { |
| 42253 | uint16x4_t __ret; | 36062 | uint16x4_t __ret; |
| 42254 | __ret = (uint16x4_t)(__p0); | 36063 | __ret = (uint16x4_t)(__p0); |
| 42255 | return __ret; | 36064 | return __ret; |
| 42256 | } | 36065 | } |
| 42257 | #endif | | |
| 42258 | | | |
| 42259 | #ifdef __LITTLE_ENDIAN__ | | |
| 42260 | __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { | 36066 | __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { |
| 42261 | int8x8_t __ret; | 36067 | int8x8_t __ret; |
| 42262 | __ret = (int8x8_t)(__p0); | 36068 | __ret = (int8x8_t)(__p0); |
| 42263 | return __ret; | 36069 | return __ret; |
| 42264 | } | 36070 | } |
| 42265 | #else | | |
| 42266 | __ai int8x8_t vreinterpret_s8_p8(poly8x8_t __p0) { | | |
| 42267 | int8x8_t __ret; | | |
| 42268 | __ret = (int8x8_t)(__p0); | | |
| 42269 | return __ret; | | |
| 42270 | } | | |
| 42271 | #endif | | |
| 42272 | | | |
| 42273 | #ifdef __LITTLE_ENDIAN__ | | |
| 42274 | __ai int8x8_t vreinterpret_s8_p64(poly64x1_t __p0) { | | |
| 42275 | int8x8_t __ret; | | |
| 42276 | __ret = (int8x8_t)(__p0); | | |
| 42277 | return __ret; | | |
| 42278 | } | | |
| 42279 | #else | | |
| 42280 | __ai int8x8_t vreinterpret_s8_p64(poly64x1_t __p0) { | 36071 | __ai int8x8_t vreinterpret_s8_p64(poly64x1_t __p0) { |
| 42281 | int8x8_t __ret; | 36072 | int8x8_t __ret; |
| 42282 | __ret = (int8x8_t)(__p0); | 36073 | __ret = (int8x8_t)(__p0); |
| 42283 | return __ret; | 36074 | return __ret; |
| 42284 | } | 36075 | } |
| 42285 | #endif | | |
| 42286 | | | |
| 42287 | #ifdef __LITTLE_ENDIAN__ | | |
| 42288 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { | 36076 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { |
| 42289 | int8x8_t __ret; | 36077 | int8x8_t __ret; |
| 42290 | __ret = (int8x8_t)(__p0); | 36078 | __ret = (int8x8_t)(__p0); |
| 42291 | return __ret; | 36079 | return __ret; |
| 42292 | } | 36080 | } |
| 42293 | #else | | |
| 42294 | __ai int8x8_t vreinterpret_s8_p16(poly16x4_t __p0) { | | |
| 42295 | int8x8_t __ret; | | |
| 42296 | __ret = (int8x8_t)(__p0); | | |
| 42297 | return __ret; | | |
| 42298 | } | | |
| 42299 | #endif | | |
| 42300 | | | |
| 42301 | #ifdef __LITTLE_ENDIAN__ | | |
| 42302 | __ai int8x8_t vreinterpret_s8_u8(uint8x8_t __p0) { | 36081 | __ai int8x8_t vreinterpret_s8_u8(uint8x8_t __p0) { |
| 42303 | int8x8_t __ret; | 36082 | int8x8_t __ret; |
| 42304 | __ret = (int8x8_t)(__p0); | 36083 | __ret = (int8x8_t)(__p0); |
| 42305 | return __ret; | 36084 | return __ret; |
| 42306 | } | 36085 | } |
| 42307 | #else | | |
| 42308 | __ai int8x8_t vreinterpret_s8_u8(uint8x8_t __p0) { | | |
| 42309 | int8x8_t __ret; | | |
| 42310 | __ret = (int8x8_t)(__p0); | | |
| 42311 | return __ret; | | |
| 42312 | } | | |
| 42313 | #endif | | |
| 42314 | | | |
| 42315 | #ifdef __LITTLE_ENDIAN__ | | |
| 42316 | __ai int8x8_t vreinterpret_s8_u32(uint32x2_t __p0) { | 36086 | __ai int8x8_t vreinterpret_s8_u32(uint32x2_t __p0) { |
| 42317 | int8x8_t __ret; | 36087 | int8x8_t __ret; |
| 42318 | __ret = (int8x8_t)(__p0); | 36088 | __ret = (int8x8_t)(__p0); |
| 42319 | return __ret; | 36089 | return __ret; |
| 42320 | } | 36090 | } |
| 42321 | #else | | |
| 42322 | __ai int8x8_t vreinterpret_s8_u32(uint32x2_t __p0) { | | |
| 42323 | int8x8_t __ret; | | |
| 42324 | __ret = (int8x8_t)(__p0); | | |
| 42325 | return __ret; | | |
| 42326 | } | | |
| 42327 | #endif | | |
| 42328 | | | |
| 42329 | #ifdef __LITTLE_ENDIAN__ | | |
| 42330 | __ai int8x8_t vreinterpret_s8_u64(uint64x1_t __p0) { | | |
| 42331 | int8x8_t __ret; | | |
| 42332 | __ret = (int8x8_t)(__p0); | | |
| 42333 | return __ret; | | |
| 42334 | } | | |
| 42335 | #else | | |
| 42336 | __ai int8x8_t vreinterpret_s8_u64(uint64x1_t __p0) { | 36091 | __ai int8x8_t vreinterpret_s8_u64(uint64x1_t __p0) { |
| 42337 | int8x8_t __ret; | 36092 | int8x8_t __ret; |
| 42338 | __ret = (int8x8_t)(__p0); | 36093 | __ret = (int8x8_t)(__p0); |
| 42339 | return __ret; | 36094 | return __ret; |
| 42340 | } | 36095 | } |
| 42341 | #endif | | |
| 42342 | | | |
| 42343 | #ifdef __LITTLE_ENDIAN__ | | |
| 42344 | __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { | | |
| 42345 | int8x8_t __ret; | | |
| 42346 | __ret = (int8x8_t)(__p0); | | |
| 42347 | return __ret; | | |
| 42348 | } | | |
| 42349 | #else | | |
| 42350 | __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { | 36096 | __ai int8x8_t vreinterpret_s8_u16(uint16x4_t __p0) { |
| 42351 | int8x8_t __ret; | 36097 | int8x8_t __ret; |
| 42352 | __ret = (int8x8_t)(__p0); | 36098 | __ret = (int8x8_t)(__p0); |
| 42353 | return __ret; | 36099 | return __ret; |
| 42354 | } | 36100 | } |
| 42355 | #endif | | |
| 42356 | | | |
| 42357 | #ifdef __LITTLE_ENDIAN__ | | |
| 42358 | __ai int8x8_t vreinterpret_s8_f64(float64x1_t __p0) { | 36101 | __ai int8x8_t vreinterpret_s8_f64(float64x1_t __p0) { |
| 42359 | int8x8_t __ret; | 36102 | int8x8_t __ret; |
| 42360 | __ret = (int8x8_t)(__p0); | 36103 | __ret = (int8x8_t)(__p0); |
| 42361 | return __ret; | 36104 | return __ret; |
| 42362 | } | 36105 | } |
| 42363 | #else | | |
| 42364 | __ai int8x8_t vreinterpret_s8_f64(float64x1_t __p0) { | | |
| 42365 | int8x8_t __ret; | | |
| 42366 | __ret = (int8x8_t)(__p0); | | |
| 42367 | return __ret; | | |
| 42368 | } | | |
| 42369 | #endif | | |
| 42370 | | | |
| 42371 | #ifdef __LITTLE_ENDIAN__ | | |
| 42372 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { | | |
| 42373 | int8x8_t __ret; | | |
| 42374 | __ret = (int8x8_t)(__p0); | | |
| 42375 | return __ret; | | |
| 42376 | } | | |
| 42377 | #else | | |
| 42378 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { | 36106 | __ai int8x8_t vreinterpret_s8_f32(float32x2_t __p0) { |
| 42379 | int8x8_t __ret; | 36107 | int8x8_t __ret; |
| 42380 | __ret = (int8x8_t)(__p0); | 36108 | __ret = (int8x8_t)(__p0); |
| 42381 | return __ret; | 36109 | return __ret; |
| 42382 | } | 36110 | } |
| 42383 | #endif | | |
| 42384 | | | |
| 42385 | #ifdef __LITTLE_ENDIAN__ | | |
| 42386 | __ai int8x8_t vreinterpret_s8_f16(float16x4_t __p0) { | 36111 | __ai int8x8_t vreinterpret_s8_f16(float16x4_t __p0) { |
| 42387 | int8x8_t __ret; | 36112 | int8x8_t __ret; |
| 42388 | __ret = (int8x8_t)(__p0); | 36113 | __ret = (int8x8_t)(__p0); |
| 42389 | return __ret; | 36114 | return __ret; |
| 42390 | } | 36115 | } |
| 42391 | #else | | |
| 42392 | __ai int8x8_t vreinterpret_s8_f16(float16x4_t __p0) { | | |
| 42393 | int8x8_t __ret; | | |
| 42394 | __ret = (int8x8_t)(__p0); | | |
| 42395 | return __ret; | | |
| 42396 | } | | |
| 42397 | #endif | | |
| 42398 | | | |
| 42399 | #ifdef __LITTLE_ENDIAN__ | | |
| 42400 | __ai int8x8_t vreinterpret_s8_s32(int32x2_t __p0) { | 36116 | __ai int8x8_t vreinterpret_s8_s32(int32x2_t __p0) { |
| 42401 | int8x8_t __ret; | 36117 | int8x8_t __ret; |
| 42402 | __ret = (int8x8_t)(__p0); | 36118 | __ret = (int8x8_t)(__p0); |
| 42403 | return __ret; | 36119 | return __ret; |
| 42404 | } | 36120 | } |
| 42405 | #else | | |
| 42406 | __ai int8x8_t vreinterpret_s8_s32(int32x2_t __p0) { | | |
| 42407 | int8x8_t __ret; | | |
| 42408 | __ret = (int8x8_t)(__p0); | | |
| 42409 | return __ret; | | |
| 42410 | } | | |
| 42411 | #endif | | |
| 42412 | | | |
| 42413 | #ifdef __LITTLE_ENDIAN__ | | |
| 42414 | __ai int8x8_t vreinterpret_s8_s64(int64x1_t __p0) { | 36121 | __ai int8x8_t vreinterpret_s8_s64(int64x1_t __p0) { |
| 42415 | int8x8_t __ret; | 36122 | int8x8_t __ret; |
| 42416 | __ret = (int8x8_t)(__p0); | 36123 | __ret = (int8x8_t)(__p0); |
| 42417 | return __ret; | 36124 | return __ret; |
| 42418 | } | 36125 | } |
| 42419 | #else | | |
| 42420 | __ai int8x8_t vreinterpret_s8_s64(int64x1_t __p0) { | | |
| 42421 | int8x8_t __ret; | | |
| 42422 | __ret = (int8x8_t)(__p0); | | |
| 42423 | return __ret; | | |
| 42424 | } | | |
| 42425 | #endif | | |
| 42426 | | | |
| 42427 | #ifdef __LITTLE_ENDIAN__ | | |
| 42428 | __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { | | |
| 42429 | int8x8_t __ret; | | |
| 42430 | __ret = (int8x8_t)(__p0); | | |
| 42431 | return __ret; | | |
| 42432 | } | | |
| 42433 | #else | | |
| 42434 | __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { | 36126 | __ai int8x8_t vreinterpret_s8_s16(int16x4_t __p0) { |
| 42435 | int8x8_t __ret; | 36127 | int8x8_t __ret; |
| 42436 | __ret = (int8x8_t)(__p0); | 36128 | __ret = (int8x8_t)(__p0); |
| 42437 | return __ret; | 36129 | return __ret; |
| 42438 | } | 36130 | } |
| 42439 | #endif | | |
| 42440 | | | |
| 42441 | #ifdef __LITTLE_ENDIAN__ | | |
| 42442 | __ai float64x1_t vreinterpret_f64_p8(poly8x8_t __p0) { | | |
| 42443 | float64x1_t __ret; | | |
| 42444 | __ret = (float64x1_t)(__p0); | | |
| 42445 | return __ret; | | |
| 42446 | } | | |
| 42447 | #else | | |
| 42448 | __ai float64x1_t vreinterpret_f64_p8(poly8x8_t __p0) { | 36131 | __ai float64x1_t vreinterpret_f64_p8(poly8x8_t __p0) { |
| 42449 | float64x1_t __ret; | 36132 | float64x1_t __ret; |
| 42450 | __ret = (float64x1_t)(__p0); | 36133 | __ret = (float64x1_t)(__p0); |
| 42451 | return __ret; | 36134 | return __ret; |
| 42452 | } | 36135 | } |
| 42453 | #endif | | |
| 42454 | | | |
| 42455 | #ifdef __LITTLE_ENDIAN__ | | |
| 42456 | __ai float64x1_t vreinterpret_f64_p64(poly64x1_t __p0) { | | |
| 42457 | float64x1_t __ret; | | |
| 42458 | __ret = (float64x1_t)(__p0); | | |
| 42459 | return __ret; | | |
| 42460 | } | | |
| 42461 | #else | | |
| 42462 | __ai float64x1_t vreinterpret_f64_p64(poly64x1_t __p0) { | 36136 | __ai float64x1_t vreinterpret_f64_p64(poly64x1_t __p0) { |
| 42463 | float64x1_t __ret; | 36137 | float64x1_t __ret; |
| 42464 | __ret = (float64x1_t)(__p0); | 36138 | __ret = (float64x1_t)(__p0); |
| 42465 | return __ret; | 36139 | return __ret; |
| 42466 | } | 36140 | } |
| 42467 | #endif | | |
| 42468 | | | |
| 42469 | #ifdef __LITTLE_ENDIAN__ | | |
| 42470 | __ai float64x1_t vreinterpret_f64_p16(poly16x4_t __p0) { | | |
| 42471 | float64x1_t __ret; | | |
| 42472 | __ret = (float64x1_t)(__p0); | | |
| 42473 | return __ret; | | |
| 42474 | } | | |
| 42475 | #else | | |
| 42476 | __ai float64x1_t vreinterpret_f64_p16(poly16x4_t __p0) { | 36141 | __ai float64x1_t vreinterpret_f64_p16(poly16x4_t __p0) { |
| 42477 | float64x1_t __ret; | 36142 | float64x1_t __ret; |
| 42478 | __ret = (float64x1_t)(__p0); | 36143 | __ret = (float64x1_t)(__p0); |
| 42479 | return __ret; | 36144 | return __ret; |
| 42480 | } | 36145 | } |
| 42481 | #endif | | |
| 42482 | | | |
| 42483 | #ifdef __LITTLE_ENDIAN__ | | |
| 42484 | __ai float64x1_t vreinterpret_f64_u8(uint8x8_t __p0) { | 36146 | __ai float64x1_t vreinterpret_f64_u8(uint8x8_t __p0) { |
| 42485 | float64x1_t __ret; | 36147 | float64x1_t __ret; |
| 42486 | __ret = (float64x1_t)(__p0); | 36148 | __ret = (float64x1_t)(__p0); |
| 42487 | return __ret; | 36149 | return __ret; |
| 42488 | } | 36150 | } |
| 42489 | #else | | |
| 42490 | __ai float64x1_t vreinterpret_f64_u8(uint8x8_t __p0) { | | |
| 42491 | float64x1_t __ret; | | |
| 42492 | __ret = (float64x1_t)(__p0); | | |
| 42493 | return __ret; | | |
| 42494 | } | | |
| 42495 | #endif | | |
| 42496 | | | |
| 42497 | #ifdef __LITTLE_ENDIAN__ | | |
| 42498 | __ai float64x1_t vreinterpret_f64_u32(uint32x2_t __p0) { | 36151 | __ai float64x1_t vreinterpret_f64_u32(uint32x2_t __p0) { |
| 42499 | float64x1_t __ret; | 36152 | float64x1_t __ret; |
| 42500 | __ret = (float64x1_t)(__p0); | 36153 | __ret = (float64x1_t)(__p0); |
| 42501 | return __ret; | 36154 | return __ret; |
| 42502 | } | 36155 | } |
| 42503 | #else | | |
| 42504 | __ai float64x1_t vreinterpret_f64_u32(uint32x2_t __p0) { | | |
| 42505 | float64x1_t __ret; | | |
| 42506 | __ret = (float64x1_t)(__p0); | | |
| 42507 | return __ret; | | |
| 42508 | } | | |
| 42509 | #endif | | |
| 42510 | | | |
| 42511 | #ifdef __LITTLE_ENDIAN__ | | |
| 42512 | __ai float64x1_t vreinterpret_f64_u64(uint64x1_t __p0) { | | |
| 42513 | float64x1_t __ret; | | |
| 42514 | __ret = (float64x1_t)(__p0); | | |
| 42515 | return __ret; | | |
| 42516 | } | | |
| 42517 | #else | | |
| 42518 | __ai float64x1_t vreinterpret_f64_u64(uint64x1_t __p0) { | 36156 | __ai float64x1_t vreinterpret_f64_u64(uint64x1_t __p0) { |
| 42519 | float64x1_t __ret; | 36157 | float64x1_t __ret; |
| 42520 | __ret = (float64x1_t)(__p0); | 36158 | __ret = (float64x1_t)(__p0); |
| 42521 | return __ret; | 36159 | return __ret; |
| 42522 | } | 36160 | } |
| 42523 | #endif | | |
| 42524 | | | |
| 42525 | #ifdef __LITTLE_ENDIAN__ | | |
| 42526 | __ai float64x1_t vreinterpret_f64_u16(uint16x4_t __p0) { | | |
| 42527 | float64x1_t __ret; | | |
| 42528 | __ret = (float64x1_t)(__p0); | | |
| 42529 | return __ret; | | |
| 42530 | } | | |
| 42531 | #else | | |
| 42532 | __ai float64x1_t vreinterpret_f64_u16(uint16x4_t __p0) { | 36161 | __ai float64x1_t vreinterpret_f64_u16(uint16x4_t __p0) { |
| 42533 | float64x1_t __ret; | 36162 | float64x1_t __ret; |
| 42534 | __ret = (float64x1_t)(__p0); | 36163 | __ret = (float64x1_t)(__p0); |
| 42535 | return __ret; | 36164 | return __ret; |
| 42536 | } | 36165 | } |
| 42537 | #endif | | |
| 42538 | | | |
| 42539 | #ifdef __LITTLE_ENDIAN__ | | |
| 42540 | __ai float64x1_t vreinterpret_f64_s8(int8x8_t __p0) { | | |
| 42541 | float64x1_t __ret; | | |
| 42542 | __ret = (float64x1_t)(__p0); | | |
| 42543 | return __ret; | | |
| 42544 | } | | |
| 42545 | #else | | |
| 42546 | __ai float64x1_t vreinterpret_f64_s8(int8x8_t __p0) { | 36166 | __ai float64x1_t vreinterpret_f64_s8(int8x8_t __p0) { |
| 42547 | float64x1_t __ret; | 36167 | float64x1_t __ret; |
| 42548 | __ret = (float64x1_t)(__p0); | 36168 | __ret = (float64x1_t)(__p0); |
| 42549 | return __ret; | 36169 | return __ret; |
| 42550 | } | 36170 | } |
| 42551 | #endif | | |
| 42552 | | | |
| 42553 | #ifdef __LITTLE_ENDIAN__ | | |
| 42554 | __ai float64x1_t vreinterpret_f64_f32(float32x2_t __p0) { | 36171 | __ai float64x1_t vreinterpret_f64_f32(float32x2_t __p0) { |
| 42555 | float64x1_t __ret; | 36172 | float64x1_t __ret; |
| 42556 | __ret = (float64x1_t)(__p0); | 36173 | __ret = (float64x1_t)(__p0); |
| 42557 | return __ret; | 36174 | return __ret; |
| 42558 | } | 36175 | } |
| 42559 | #else | | |
| 42560 | __ai float64x1_t vreinterpret_f64_f32(float32x2_t __p0) { | | |
| 42561 | float64x1_t __ret; | | |
| 42562 | __ret = (float64x1_t)(__p0); | | |
| 42563 | return __ret; | | |
| 42564 | } | | |
| 42565 | #endif | | |
| 42566 | | | |
| 42567 | #ifdef __LITTLE_ENDIAN__ | | |
| 42568 | __ai float64x1_t vreinterpret_f64_f16(float16x4_t __p0) { | | |
| 42569 | float64x1_t __ret; | | |
| 42570 | __ret = (float64x1_t)(__p0); | | |
| 42571 | return __ret; | | |
| 42572 | } | | |
| 42573 | #else | | |
| 42574 | __ai float64x1_t vreinterpret_f64_f16(float16x4_t __p0) { | 36176 | __ai float64x1_t vreinterpret_f64_f16(float16x4_t __p0) { |
| 42575 | float64x1_t __ret; | 36177 | float64x1_t __ret; |
| 42576 | __ret = (float64x1_t)(__p0); | 36178 | __ret = (float64x1_t)(__p0); |
| 42577 | return __ret; | 36179 | return __ret; |
| 42578 | } | 36180 | } |
| 42579 | #endif | | |
| 42580 | | | |
| 42581 | #ifdef __LITTLE_ENDIAN__ | | |
| 42582 | __ai float64x1_t vreinterpret_f64_s32(int32x2_t __p0) { | 36181 | __ai float64x1_t vreinterpret_f64_s32(int32x2_t __p0) { |
| 42583 | float64x1_t __ret; | 36182 | float64x1_t __ret; |
| 42584 | __ret = (float64x1_t)(__p0); | 36183 | __ret = (float64x1_t)(__p0); |
| 42585 | return __ret; | 36184 | return __ret; |
| 42586 | } | 36185 | } |
| 42587 | #else | | |
| 42588 | __ai float64x1_t vreinterpret_f64_s32(int32x2_t __p0) { | | |
| 42589 | float64x1_t __ret; | | |
| 42590 | __ret = (float64x1_t)(__p0); | | |
| 42591 | return __ret; | | |
| 42592 | } | | |
| 42593 | #endif | | |
| 42594 | | | |
| 42595 | #ifdef __LITTLE_ENDIAN__ | | |
| 42596 | __ai float64x1_t vreinterpret_f64_s64(int64x1_t __p0) { | 36186 | __ai float64x1_t vreinterpret_f64_s64(int64x1_t __p0) { |
| 42597 | float64x1_t __ret; | 36187 | float64x1_t __ret; |
| 42598 | __ret = (float64x1_t)(__p0); | 36188 | __ret = (float64x1_t)(__p0); |
| 42599 | return __ret; | 36189 | return __ret; |
| 42600 | } | 36190 | } |
| 42601 | #else | | |
| 42602 | __ai float64x1_t vreinterpret_f64_s64(int64x1_t __p0) { | | |
| 42603 | float64x1_t __ret; | | |
| 42604 | __ret = (float64x1_t)(__p0); | | |
| 42605 | return __ret; | | |
| 42606 | } | | |
| 42607 | #endif | | |
| 42608 | | | |
| 42609 | #ifdef __LITTLE_ENDIAN__ | | |
| 42610 | __ai float64x1_t vreinterpret_f64_s16(int16x4_t __p0) { | | |
| 42611 | float64x1_t __ret; | | |
| 42612 | __ret = (float64x1_t)(__p0); | | |
| 42613 | return __ret; | | |
| 42614 | } | | |
| 42615 | #else | | |
| 42616 | __ai float64x1_t vreinterpret_f64_s16(int16x4_t __p0) { | 36191 | __ai float64x1_t vreinterpret_f64_s16(int16x4_t __p0) { |
| 42617 | float64x1_t __ret; | 36192 | float64x1_t __ret; |
| 42618 | __ret = (float64x1_t)(__p0); | 36193 | __ret = (float64x1_t)(__p0); |
| 42619 | return __ret; | 36194 | return __ret; |
| 42620 | } | 36195 | } |
| 42621 | #endif | | |
| 42622 | | | |
| 42623 | #ifdef __LITTLE_ENDIAN__ | | |
| 42624 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { | | |
| 42625 | float32x2_t __ret; | | |
| 42626 | __ret = (float32x2_t)(__p0); | | |
| 42627 | return __ret; | | |
| 42628 | } | | |
| 42629 | #else | | |
| 42630 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { | 36196 | __ai float32x2_t vreinterpret_f32_p8(poly8x8_t __p0) { |
| 42631 | float32x2_t __ret; | 36197 | float32x2_t __ret; |
| 42632 | __ret = (float32x2_t)(__p0); | 36198 | __ret = (float32x2_t)(__p0); |
| 42633 | return __ret; | 36199 | return __ret; |
| 42634 | } | 36200 | } |
| 42635 | #endif | | |
| 42636 | | | |
| 42637 | #ifdef __LITTLE_ENDIAN__ | | |
| 42638 | __ai float32x2_t vreinterpret_f32_p64(poly64x1_t __p0) { | | |
| 42639 | float32x2_t __ret; | | |
| 42640 | __ret = (float32x2_t)(__p0); | | |
| 42641 | return __ret; | | |
| 42642 | } | | |
| 42643 | #else | | |
| 42644 | __ai float32x2_t vreinterpret_f32_p64(poly64x1_t __p0) { | 36201 | __ai float32x2_t vreinterpret_f32_p64(poly64x1_t __p0) { |
| 42645 | float32x2_t __ret; | 36202 | float32x2_t __ret; |
| 42646 | __ret = (float32x2_t)(__p0); | 36203 | __ret = (float32x2_t)(__p0); |
| 42647 | return __ret; | 36204 | return __ret; |
| 42648 | } | 36205 | } |
| 42649 | #endif | | |
| 42650 | | | |
| 42651 | #ifdef __LITTLE_ENDIAN__ | | |
| 42652 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { | 36206 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { |
| 42653 | float32x2_t __ret; | 36207 | float32x2_t __ret; |
| 42654 | __ret = (float32x2_t)(__p0); | 36208 | __ret = (float32x2_t)(__p0); |
| 42655 | return __ret; | 36209 | return __ret; |
| 42656 | } | 36210 | } |
| 42657 | #else | | |
| 42658 | __ai float32x2_t vreinterpret_f32_p16(poly16x4_t __p0) { | | |
| 42659 | float32x2_t __ret; | | |
| 42660 | __ret = (float32x2_t)(__p0); | | |
| 42661 | return __ret; | | |
| 42662 | } | | |
| 42663 | #endif | | |
| 42664 | | | |
| 42665 | #ifdef __LITTLE_ENDIAN__ | | |
| 42666 | __ai float32x2_t vreinterpret_f32_u8(uint8x8_t __p0) { | | |
| 42667 | float32x2_t __ret; | | |
| 42668 | __ret = (float32x2_t)(__p0); | | |
| 42669 | return __ret; | | |
| 42670 | } | | |
| 42671 | #else | | |
| 42672 | __ai float32x2_t vreinterpret_f32_u8(uint8x8_t __p0) { | 36211 | __ai float32x2_t vreinterpret_f32_u8(uint8x8_t __p0) { |
| 42673 | float32x2_t __ret; | 36212 | float32x2_t __ret; |
| 42674 | __ret = (float32x2_t)(__p0); | 36213 | __ret = (float32x2_t)(__p0); |
| 42675 | return __ret; | 36214 | return __ret; |
| 42676 | } | 36215 | } |
| 42677 | #endif | | |
| 42678 | | | |
| 42679 | #ifdef __LITTLE_ENDIAN__ | | |
| 42680 | __ai float32x2_t vreinterpret_f32_u32(uint32x2_t __p0) { | 36216 | __ai float32x2_t vreinterpret_f32_u32(uint32x2_t __p0) { |
| 42681 | float32x2_t __ret; | 36217 | float32x2_t __ret; |
| 42682 | __ret = (float32x2_t)(__p0); | 36218 | __ret = (float32x2_t)(__p0); |
| 42683 | return __ret; | 36219 | return __ret; |
| 42684 | } | 36220 | } |
| 42685 | #else | | |
| 42686 | __ai float32x2_t vreinterpret_f32_u32(uint32x2_t __p0) { | | |
| 42687 | float32x2_t __ret; | | |
| 42688 | __ret = (float32x2_t)(__p0); | | |
| 42689 | return __ret; | | |
| 42690 | } | | |
| 42691 | #endif | | |
| 42692 | | | |
| 42693 | #ifdef __LITTLE_ENDIAN__ | | |
| 42694 | __ai float32x2_t vreinterpret_f32_u64(uint64x1_t __p0) { | 36221 | __ai float32x2_t vreinterpret_f32_u64(uint64x1_t __p0) { |
| 42695 | float32x2_t __ret; | 36222 | float32x2_t __ret; |
| 42696 | __ret = (float32x2_t)(__p0); | 36223 | __ret = (float32x2_t)(__p0); |
| 42697 | return __ret; | 36224 | return __ret; |
| 42698 | } | 36225 | } |
| 42699 | #else | | |
| 42700 | __ai float32x2_t vreinterpret_f32_u64(uint64x1_t __p0) { | | |
| 42701 | float32x2_t __ret; | | |
| 42702 | __ret = (float32x2_t)(__p0); | | |
| 42703 | return __ret; | | |
| 42704 | } | | |
| 42705 | #endif | | |
| 42706 | | | |
| 42707 | #ifdef __LITTLE_ENDIAN__ | | |
| 42708 | __ai float32x2_t vreinterpret_f32_u16(uint16x4_t __p0) { | | |
| 42709 | float32x2_t __ret; | | |
| 42710 | __ret = (float32x2_t)(__p0); | | |
| 42711 | return __ret; | | |
| 42712 | } | | |
| 42713 | #else | | |
| 42714 | __ai float32x2_t vreinterpret_f32_u16(uint16x4_t __p0) { | 36226 | __ai float32x2_t vreinterpret_f32_u16(uint16x4_t __p0) { |
| 42715 | float32x2_t __ret; | 36227 | float32x2_t __ret; |
| 42716 | __ret = (float32x2_t)(__p0); | 36228 | __ret = (float32x2_t)(__p0); |
| 42717 | return __ret; | 36229 | return __ret; |
| 42718 | } | 36230 | } |
| 42719 | #endif | | |
| 42720 | | | |
| 42721 | #ifdef __LITTLE_ENDIAN__ | | |
| 42722 | __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { | | |
| 42723 | float32x2_t __ret; | | |
| 42724 | __ret = (float32x2_t)(__p0); | | |
| 42725 | return __ret; | | |
| 42726 | } | | |
| 42727 | #else | | |
| 42728 | __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { | 36231 | __ai float32x2_t vreinterpret_f32_s8(int8x8_t __p0) { |
| 42729 | float32x2_t __ret; | 36232 | float32x2_t __ret; |
| 42730 | __ret = (float32x2_t)(__p0); | 36233 | __ret = (float32x2_t)(__p0); |
| 42731 | return __ret; | 36234 | return __ret; |
| 42732 | } | 36235 | } |
| 42733 | #endif | | |
| 42734 | | | |
| 42735 | #ifdef __LITTLE_ENDIAN__ | | |
| 42736 | __ai float32x2_t vreinterpret_f32_f64(float64x1_t __p0) { | | |
| 42737 | float32x2_t __ret; | | |
| 42738 | __ret = (float32x2_t)(__p0); | | |
| 42739 | return __ret; | | |
| 42740 | } | | |
| 42741 | #else | | |
| 42742 | __ai float32x2_t vreinterpret_f32_f64(float64x1_t __p0) { | 36236 | __ai float32x2_t vreinterpret_f32_f64(float64x1_t __p0) { |
| 42743 | float32x2_t __ret; | 36237 | float32x2_t __ret; |
| 42744 | __ret = (float32x2_t)(__p0); | 36238 | __ret = (float32x2_t)(__p0); |
| 42745 | return __ret; | 36239 | return __ret; |
| 42746 | } | 36240 | } |
| 42747 | #endif | | |
| 42748 | | | |
| 42749 | #ifdef __LITTLE_ENDIAN__ | | |
| 42750 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { | 36241 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { |
| 42751 | float32x2_t __ret; | 36242 | float32x2_t __ret; |
| 42752 | __ret = (float32x2_t)(__p0); | 36243 | __ret = (float32x2_t)(__p0); |
| 42753 | return __ret; | 36244 | return __ret; |
| 42754 | } | 36245 | } |
| 42755 | #else | | |
| 42756 | __ai float32x2_t vreinterpret_f32_f16(float16x4_t __p0) { | | |
| 42757 | float32x2_t __ret; | | |
| 42758 | __ret = (float32x2_t)(__p0); | | |
| 42759 | return __ret; | | |
| 42760 | } | | |
| 42761 | #endif | | |
| 42762 | | | |
| 42763 | #ifdef __LITTLE_ENDIAN__ | | |
| 42764 | __ai float32x2_t vreinterpret_f32_s32(int32x2_t __p0) { | | |
| 42765 | float32x2_t __ret; | | |
| 42766 | __ret = (float32x2_t)(__p0); | | |
| 42767 | return __ret; | | |
| 42768 | } | | |
| 42769 | #else | | |
| 42770 | __ai float32x2_t vreinterpret_f32_s32(int32x2_t __p0) { | 36246 | __ai float32x2_t vreinterpret_f32_s32(int32x2_t __p0) { |
| 42771 | float32x2_t __ret; | 36247 | float32x2_t __ret; |
| 42772 | __ret = (float32x2_t)(__p0); | 36248 | __ret = (float32x2_t)(__p0); |
| 42773 | return __ret; | 36249 | return __ret; |
| 42774 | } | 36250 | } |
| 42775 | #endif | | |
| 42776 | | | |
| 42777 | #ifdef __LITTLE_ENDIAN__ | | |
| 42778 | __ai float32x2_t vreinterpret_f32_s64(int64x1_t __p0) { | 36251 | __ai float32x2_t vreinterpret_f32_s64(int64x1_t __p0) { |
| 42779 | float32x2_t __ret; | 36252 | float32x2_t __ret; |
| 42780 | __ret = (float32x2_t)(__p0); | 36253 | __ret = (float32x2_t)(__p0); |
| 42781 | return __ret; | 36254 | return __ret; |
| 42782 | } | 36255 | } |
| 42783 | #else | | |
| 42784 | __ai float32x2_t vreinterpret_f32_s64(int64x1_t __p0) { | | |
| 42785 | float32x2_t __ret; | | |
| 42786 | __ret = (float32x2_t)(__p0); | | |
| 42787 | return __ret; | | |
| 42788 | } | | |
| 42789 | #endif | | |
| 42790 | | | |
| 42791 | #ifdef __LITTLE_ENDIAN__ | | |
| 42792 | __ai float32x2_t vreinterpret_f32_s16(int16x4_t __p0) { | 36256 | __ai float32x2_t vreinterpret_f32_s16(int16x4_t __p0) { |
| 42793 | float32x2_t __ret; | 36257 | float32x2_t __ret; |
| 42794 | __ret = (float32x2_t)(__p0); | 36258 | __ret = (float32x2_t)(__p0); |
| 42795 | return __ret; | 36259 | return __ret; |
| 42796 | } | 36260 | } |
| 42797 | #else | | |
| 42798 | __ai float32x2_t vreinterpret_f32_s16(int16x4_t __p0) { | | |
| 42799 | float32x2_t __ret; | | |
| 42800 | __ret = (float32x2_t)(__p0); | | |
| 42801 | return __ret; | | |
| 42802 | } | | |
| 42803 | #endif | | |
| 42804 | | | |
| 42805 | #ifdef __LITTLE_ENDIAN__ | | |
| 42806 | __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { | | |
| 42807 | float16x4_t __ret; | | |
| 42808 | __ret = (float16x4_t)(__p0); | | |
| 42809 | return __ret; | | |
| 42810 | } | | |
| 42811 | #else | | |
| 42812 | __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { | 36261 | __ai float16x4_t vreinterpret_f16_p8(poly8x8_t __p0) { |
| 42813 | float16x4_t __ret; | 36262 | float16x4_t __ret; |
| 42814 | __ret = (float16x4_t)(__p0); | 36263 | __ret = (float16x4_t)(__p0); |
| 42815 | return __ret; | 36264 | return __ret; |
| 42816 | } | 36265 | } |
| 42817 | #endif | | |
| 42818 | | | |
| 42819 | #ifdef __LITTLE_ENDIAN__ | | |
| 42820 | __ai float16x4_t vreinterpret_f16_p64(poly64x1_t __p0) { | | |
| 42821 | float16x4_t __ret; | | |
| 42822 | __ret = (float16x4_t)(__p0); | | |
| 42823 | return __ret; | | |
| 42824 | } | | |
| 42825 | #else | | |
| 42826 | __ai float16x4_t vreinterpret_f16_p64(poly64x1_t __p0) { | 36266 | __ai float16x4_t vreinterpret_f16_p64(poly64x1_t __p0) { |
| 42827 | float16x4_t __ret; | 36267 | float16x4_t __ret; |
| 42828 | __ret = (float16x4_t)(__p0); | 36268 | __ret = (float16x4_t)(__p0); |
| 42829 | return __ret; | 36269 | return __ret; |
| 42830 | } | 36270 | } |
| 42831 | #endif | | |
| 42832 | | | |
| 42833 | #ifdef __LITTLE_ENDIAN__ | | |
| 42834 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { | | |
| 42835 | float16x4_t __ret; | | |
| 42836 | __ret = (float16x4_t)(__p0); | | |
| 42837 | return __ret; | | |
| 42838 | } | | |
| 42839 | #else | | |
| 42840 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { | 36271 | __ai float16x4_t vreinterpret_f16_p16(poly16x4_t __p0) { |
| 42841 | float16x4_t __ret; | 36272 | float16x4_t __ret; |
| 42842 | __ret = (float16x4_t)(__p0); | 36273 | __ret = (float16x4_t)(__p0); |
| 42843 | return __ret; | 36274 | return __ret; |
| 42844 | } | 36275 | } |
| 42845 | #endif | | |
| 42846 | | | |
| 42847 | #ifdef __LITTLE_ENDIAN__ | | |
| 42848 | __ai float16x4_t vreinterpret_f16_u8(uint8x8_t __p0) { | 36276 | __ai float16x4_t vreinterpret_f16_u8(uint8x8_t __p0) { |
| 42849 | float16x4_t __ret; | 36277 | float16x4_t __ret; |
| 42850 | __ret = (float16x4_t)(__p0); | 36278 | __ret = (float16x4_t)(__p0); |
| 42851 | return __ret; | 36279 | return __ret; |
| 42852 | } | 36280 | } |
| 42853 | #else | | |
| 42854 | __ai float16x4_t vreinterpret_f16_u8(uint8x8_t __p0) { | | |
| 42855 | float16x4_t __ret; | | |
| 42856 | __ret = (float16x4_t)(__p0); | | |
| 42857 | return __ret; | | |
| 42858 | } | | |
| 42859 | #endif | | |
| 42860 | | | |
| 42861 | #ifdef __LITTLE_ENDIAN__ | | |
| 42862 | __ai float16x4_t vreinterpret_f16_u32(uint32x2_t __p0) { | | |
| 42863 | float16x4_t __ret; | | |
| 42864 | __ret = (float16x4_t)(__p0); | | |
| 42865 | return __ret; | | |
| 42866 | } | | |
| 42867 | #else | | |
| 42868 | __ai float16x4_t vreinterpret_f16_u32(uint32x2_t __p0) { | 36281 | __ai float16x4_t vreinterpret_f16_u32(uint32x2_t __p0) { |
| 42869 | float16x4_t __ret; | 36282 | float16x4_t __ret; |
| 42870 | __ret = (float16x4_t)(__p0); | 36283 | __ret = (float16x4_t)(__p0); |
| 42871 | return __ret; | 36284 | return __ret; |
| 42872 | } | 36285 | } |
| 42873 | #endif | | |
| 42874 | | | |
| 42875 | #ifdef __LITTLE_ENDIAN__ | | |
| 42876 | __ai float16x4_t vreinterpret_f16_u64(uint64x1_t __p0) { | 36286 | __ai float16x4_t vreinterpret_f16_u64(uint64x1_t __p0) { |
| 42877 | float16x4_t __ret; | 36287 | float16x4_t __ret; |
| 42878 | __ret = (float16x4_t)(__p0); | 36288 | __ret = (float16x4_t)(__p0); |
| 42879 | return __ret; | 36289 | return __ret; |
| 42880 | } | 36290 | } |
| 42881 | #else | | |
| 42882 | __ai float16x4_t vreinterpret_f16_u64(uint64x1_t __p0) { | | |
| 42883 | float16x4_t __ret; | | |
| 42884 | __ret = (float16x4_t)(__p0); | | |
| 42885 | return __ret; | | |
| 42886 | } | | |
| 42887 | #endif | | |
| 42888 | | | |
| 42889 | #ifdef __LITTLE_ENDIAN__ | | |
| 42890 | __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { | 36291 | __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { |
| 42891 | float16x4_t __ret; | 36292 | float16x4_t __ret; |
| 42892 | __ret = (float16x4_t)(__p0); | 36293 | __ret = (float16x4_t)(__p0); |
| 42893 | return __ret; | 36294 | return __ret; |
| 42894 | } | 36295 | } |
| 42895 | #else | | |
| 42896 | __ai float16x4_t vreinterpret_f16_u16(uint16x4_t __p0) { | | |
| 42897 | float16x4_t __ret; | | |
| 42898 | __ret = (float16x4_t)(__p0); | | |
| 42899 | return __ret; | | |
| 42900 | } | | |
| 42901 | #endif | | |
| 42902 | | | |
| 42903 | #ifdef __LITTLE_ENDIAN__ | | |
| 42904 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { | | |
| 42905 | float16x4_t __ret; | | |
| 42906 | __ret = (float16x4_t)(__p0); | | |
| 42907 | return __ret; | | |
| 42908 | } | | |
| 42909 | #else | | |
| 42910 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { | 36296 | __ai float16x4_t vreinterpret_f16_s8(int8x8_t __p0) { |
| 42911 | float16x4_t __ret; | 36297 | float16x4_t __ret; |
| 42912 | __ret = (float16x4_t)(__p0); | 36298 | __ret = (float16x4_t)(__p0); |
| 42913 | return __ret; | 36299 | return __ret; |
| 42914 | } | 36300 | } |
| 42915 | #endif | | |
| 42916 | | | |
| 42917 | #ifdef __LITTLE_ENDIAN__ | | |
| 42918 | __ai float16x4_t vreinterpret_f16_f64(float64x1_t __p0) { | | |
| 42919 | float16x4_t __ret; | | |
| 42920 | __ret = (float16x4_t)(__p0); | | |
| 42921 | return __ret; | | |
| 42922 | } | | |
| 42923 | #else | | |
| 42924 | __ai float16x4_t vreinterpret_f16_f64(float64x1_t __p0) { | 36301 | __ai float16x4_t vreinterpret_f16_f64(float64x1_t __p0) { |
| 42925 | float16x4_t __ret; | 36302 | float16x4_t __ret; |
| 42926 | __ret = (float16x4_t)(__p0); | 36303 | __ret = (float16x4_t)(__p0); |
| 42927 | return __ret; | 36304 | return __ret; |
| 42928 | } | 36305 | } |
| 42929 | #endif | | |
| 42930 | | | |
| 42931 | #ifdef __LITTLE_ENDIAN__ | | |
| 42932 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { | | |
| 42933 | float16x4_t __ret; | | |
| 42934 | __ret = (float16x4_t)(__p0); | | |
| 42935 | return __ret; | | |
| 42936 | } | | |
| 42937 | #else | | |
| 42938 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { | 36306 | __ai float16x4_t vreinterpret_f16_f32(float32x2_t __p0) { |
| 42939 | float16x4_t __ret; | 36307 | float16x4_t __ret; |
| 42940 | __ret = (float16x4_t)(__p0); | 36308 | __ret = (float16x4_t)(__p0); |
| 42941 | return __ret; | 36309 | return __ret; |
| 42942 | } | 36310 | } |
| 42943 | #endif | | |
| 42944 | | | |
| 42945 | #ifdef __LITTLE_ENDIAN__ | | |
| 42946 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { | 36311 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { |
| 42947 | float16x4_t __ret; | 36312 | float16x4_t __ret; |
| 42948 | __ret = (float16x4_t)(__p0); | 36313 | __ret = (float16x4_t)(__p0); |
| 42949 | return __ret; | 36314 | return __ret; |
| 42950 | } | 36315 | } |
| 42951 | #else | | |
| 42952 | __ai float16x4_t vreinterpret_f16_s32(int32x2_t __p0) { | | |
| 42953 | float16x4_t __ret; | | |
| 42954 | __ret = (float16x4_t)(__p0); | | |
| 42955 | return __ret; | | |
| 42956 | } | | |
| 42957 | #endif | | |
| 42958 | | | |
| 42959 | #ifdef __LITTLE_ENDIAN__ | | |
| 42960 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { | | |
| 42961 | float16x4_t __ret; | | |
| 42962 | __ret = (float16x4_t)(__p0); | | |
| 42963 | return __ret; | | |
| 42964 | } | | |
| 42965 | #else | | |
| 42966 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { | 36316 | __ai float16x4_t vreinterpret_f16_s64(int64x1_t __p0) { |
| 42967 | float16x4_t __ret; | 36317 | float16x4_t __ret; |
| 42968 | __ret = (float16x4_t)(__p0); | 36318 | __ret = (float16x4_t)(__p0); |
| 42969 | return __ret; | 36319 | return __ret; |
| 42970 | } | 36320 | } |
| 42971 | #endif | | |
| 42972 | | | |
| 42973 | #ifdef __LITTLE_ENDIAN__ | | |
| 42974 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { | 36321 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { |
| 42975 | float16x4_t __ret; | 36322 | float16x4_t __ret; |
| 42976 | __ret = (float16x4_t)(__p0); | 36323 | __ret = (float16x4_t)(__p0); |
| 42977 | return __ret; | 36324 | return __ret; |
| 42978 | } | 36325 | } |
| 42979 | #else | | |
| 42980 | __ai float16x4_t vreinterpret_f16_s16(int16x4_t __p0) { | | |
| 42981 | float16x4_t __ret; | | |
| 42982 | __ret = (float16x4_t)(__p0); | | |
| 42983 | return __ret; | | |
| 42984 | } | | |
| 42985 | #endif | | |
| 42986 | | | |
| 42987 | #ifdef __LITTLE_ENDIAN__ | | |
| 42988 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { | 36326 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { |
| 42989 | int32x2_t __ret; | 36327 | int32x2_t __ret; |
| 42990 | __ret = (int32x2_t)(__p0); | 36328 | __ret = (int32x2_t)(__p0); |
| 42991 | return __ret; | 36329 | return __ret; |
| 42992 | } | 36330 | } |
| 42993 | #else | | |
| 42994 | __ai int32x2_t vreinterpret_s32_p8(poly8x8_t __p0) { | | |
| 42995 | int32x2_t __ret; | | |
| 42996 | __ret = (int32x2_t)(__p0); | | |
| 42997 | return __ret; | | |
| 42998 | } | | |
| 42999 | #endif | | |
| 43000 | | | |
| 43001 | #ifdef __LITTLE_ENDIAN__ | | |
| 43002 | __ai int32x2_t vreinterpret_s32_p64(poly64x1_t __p0) { | | |
| 43003 | int32x2_t __ret; | | |
| 43004 | __ret = (int32x2_t)(__p0); | | |
| 43005 | return __ret; | | |
| 43006 | } | | |
| 43007 | #else | | |
| 43008 | __ai int32x2_t vreinterpret_s32_p64(poly64x1_t __p0) { | 36331 | __ai int32x2_t vreinterpret_s32_p64(poly64x1_t __p0) { |
| 43009 | int32x2_t __ret; | 36332 | int32x2_t __ret; |
| 43010 | __ret = (int32x2_t)(__p0); | 36333 | __ret = (int32x2_t)(__p0); |
| 43011 | return __ret; | 36334 | return __ret; |
| 43012 | } | 36335 | } |
| 43013 | #endif | | |
| 43014 | | | |
| 43015 | #ifdef __LITTLE_ENDIAN__ | | |
| 43016 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { | | |
| 43017 | int32x2_t __ret; | | |
| 43018 | __ret = (int32x2_t)(__p0); | | |
| 43019 | return __ret; | | |
| 43020 | } | | |
| 43021 | #else | | |
| 43022 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { | 36336 | __ai int32x2_t vreinterpret_s32_p16(poly16x4_t __p0) { |
| 43023 | int32x2_t __ret; | 36337 | int32x2_t __ret; |
| 43024 | __ret = (int32x2_t)(__p0); | 36338 | __ret = (int32x2_t)(__p0); |
| 43025 | return __ret; | 36339 | return __ret; |
| 43026 | } | 36340 | } |
| 43027 | #endif | | |
| 43028 | | | |
| 43029 | #ifdef __LITTLE_ENDIAN__ | | |
| 43030 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { | | |
| 43031 | int32x2_t __ret; | | |
| 43032 | __ret = (int32x2_t)(__p0); | | |
| 43033 | return __ret; | | |
| 43034 | } | | |
| 43035 | #else | | |
| 43036 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { | 36341 | __ai int32x2_t vreinterpret_s32_u8(uint8x8_t __p0) { |
| 43037 | int32x2_t __ret; | 36342 | int32x2_t __ret; |
| 43038 | __ret = (int32x2_t)(__p0); | 36343 | __ret = (int32x2_t)(__p0); |
| 43039 | return __ret; | 36344 | return __ret; |
| 43040 | } | 36345 | } |
| 43041 | #endif | | |
| 43042 | | | |
| 43043 | #ifdef __LITTLE_ENDIAN__ | | |
| 43044 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { | 36346 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { |
| 43045 | int32x2_t __ret; | 36347 | int32x2_t __ret; |
| 43046 | __ret = (int32x2_t)(__p0); | 36348 | __ret = (int32x2_t)(__p0); |
| 43047 | return __ret; | 36349 | return __ret; |
| 43048 | } | 36350 | } |
| 43049 | #else | | |
| 43050 | __ai int32x2_t vreinterpret_s32_u32(uint32x2_t __p0) { | | |
| 43051 | int32x2_t __ret; | | |
| 43052 | __ret = (int32x2_t)(__p0); | | |
| 43053 | return __ret; | | |
| 43054 | } | | |
| 43055 | #endif | | |
| 43056 | | | |
| 43057 | #ifdef __LITTLE_ENDIAN__ | | |
| 43058 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { | | |
| 43059 | int32x2_t __ret; | | |
| 43060 | __ret = (int32x2_t)(__p0); | | |
| 43061 | return __ret; | | |
| 43062 | } | | |
| 43063 | #else | | |
| 43064 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { | 36351 | __ai int32x2_t vreinterpret_s32_u64(uint64x1_t __p0) { |
| 43065 | int32x2_t __ret; | 36352 | int32x2_t __ret; |
| 43066 | __ret = (int32x2_t)(__p0); | 36353 | __ret = (int32x2_t)(__p0); |
| 43067 | return __ret; | 36354 | return __ret; |
| 43068 | } | 36355 | } |
| 43069 | #endif | | |
| 43070 | | | |
| 43071 | #ifdef __LITTLE_ENDIAN__ | | |
| 43072 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { | 36356 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { |
| 43073 | int32x2_t __ret; | 36357 | int32x2_t __ret; |
| 43074 | __ret = (int32x2_t)(__p0); | 36358 | __ret = (int32x2_t)(__p0); |
| 43075 | return __ret; | | |
| 43076 | } | | |
| 43077 | #else | | |
| 43078 | __ai int32x2_t vreinterpret_s32_u16(uint16x4_t __p0) { | | |
| 43079 | int32x2_t __ret; | | |
| 43080 | __ret = (int32x2_t)(__p0); | | |
| 43081 | return __ret; | | |
| 43082 | } | | |
| 43083 | #endif | | |
| 43084 | | | |
| 43085 | #ifdef __LITTLE_ENDIAN__ | | |
| 43086 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { | | |
| 43087 | int32x2_t __ret; | | |
| 43088 | __ret = (int32x2_t)(__p0); | | |
| 43089 | return __ret; | | |
| 43090 | } | | |
| 43091 | #else | | |
| 43092 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { | | |
| 43093 | int32x2_t __ret; | | |
| 43094 | __ret = (int32x2_t)(__p0); | | |
| 43095 | return __ret; | | |
| 43096 | } | | |
| 43097 | #endif | | |
| 43098 | | | |
| 43099 | #ifdef __LITTLE_ENDIAN__ | | |
| 43100 | __ai int32x2_t vreinterpret_s32_f64(float64x1_t __p0) { | | |
| 43101 | int32x2_t __ret; | | |
| 43102 | __ret = (int32x2_t)(__p0); | | |
| 43103 | return __ret; | | |
| 43104 | } | | |
| 43105 | #else | | |
| 43106 | __ai int32x2_t vreinterpret_s32_f64(float64x1_t __p0) { | | |
| 43107 | int32x2_t __ret; | | |
| 43108 | __ret = (int32x2_t)(__p0); | | |
| 43109 | return __ret; | | |
| 43110 | } | | |
| 43111 | #endif | | |
| 43112 | | | |
| 43113 | #ifdef __LITTLE_ENDIAN__ | | |
| 43114 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { | | |
| 43115 | int32x2_t __ret; | | |
| 43116 | __ret = (int32x2_t)(__p0); | | |
| 43117 | return __ret; | | |
| 43118 | } | | |
| 43119 | #else | | |
| 43120 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { | | |
| 43121 | int32x2_t __ret; | | |
| 43122 | __ret = (int32x2_t)(__p0); | | |
| 43123 | return __ret; | | |
| 43124 | } | | |
| 43125 | #endif | | |
| 43126 | | | |
| 43127 | #ifdef __LITTLE_ENDIAN__ | | |
| 43128 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { | | |
| 43129 | int32x2_t __ret; | | |
| 43130 | __ret = (int32x2_t)(__p0); | | |
| 43131 | return __ret; | | |
| 43132 | } | | |
| 43133 | #else | | |
| 43134 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { | | |
| 43135 | int32x2_t __ret; | | |
| 43136 | __ret = (int32x2_t)(__p0); | | |
| 43137 | return __ret; | | |
| 43138 | } | | |
| 43139 | #endif | | |
| 43140 | | | |
| 43141 | #ifdef __LITTLE_ENDIAN__ | | |
| 43142 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { | | |
| 43143 | int32x2_t __ret; | | |
| 43144 | __ret = (int32x2_t)(__p0); | | |
| 43145 | return __ret; | | |
| 43146 | } | | |
| 43147 | #else | | |
| 43148 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { | | |
| 43149 | int32x2_t __ret; | | |
| 43150 | __ret = (int32x2_t)(__p0); | | |
| 43151 | return __ret; | | |
| 43152 | } | | |
| 43153 | #endif | | |
| 43154 | | | |
| 43155 | #ifdef __LITTLE_ENDIAN__ | | |
| 43156 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { | | |
| 43157 | int32x2_t __ret; | | |
| 43158 | __ret = (int32x2_t)(__p0); | | |
| 43159 | return __ret; | | |
| 43160 | } | | |
| 43161 | #else | | |
| 43162 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { | | |
| 43163 | int32x2_t __ret; | | |
| 43164 | __ret = (int32x2_t)(__p0); | | |
| 43165 | return __ret; | | |
| 43166 | } | | |
| 43167 | #endif | | |
| 43168 | | | |
| 43169 | #ifdef __LITTLE_ENDIAN__ | | |
| 43170 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { | | |
| 43171 | int64x1_t __ret; | | |
| 43172 | __ret = (int64x1_t)(__p0); | | |
| 43173 | return __ret; | | |
| 43174 | } | | |
| 43175 | #else | | |
| 43176 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { | | |
| 43177 | int64x1_t __ret; | | |
| 43178 | __ret = (int64x1_t)(__p0); | | |
| 43179 | return __ret; | | |
| 43180 | } | | |
| 43181 | #endif | | |
| 43182 | | | |
| 43183 | #ifdef __LITTLE_ENDIAN__ | | |
| 43184 | __ai int64x1_t vreinterpret_s64_p64(poly64x1_t __p0) { | | |
| 43185 | int64x1_t __ret; | | |
| 43186 | __ret = (int64x1_t)(__p0); | | |
| 43187 | return __ret; | | |
| 43188 | } | | |
| 43189 | #else | | |
| 43190 | __ai int64x1_t vreinterpret_s64_p64(poly64x1_t __p0) { | | |
| 43191 | int64x1_t __ret; | | |
| 43192 | __ret = (int64x1_t)(__p0); | | |
| 43193 | return __ret; | | |
| 43194 | } | | |
| 43195 | #endif | | |
| 43196 | | | |
| 43197 | #ifdef __LITTLE_ENDIAN__ | | |
| 43198 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { | | |
| 43199 | int64x1_t __ret; | | |
| 43200 | __ret = (int64x1_t)(__p0); | | |
| 43201 | return __ret; | | |
| 43202 | } | | |
| 43203 | #else | | |
| 43204 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { | | |
| 43205 | int64x1_t __ret; | | |
| 43206 | __ret = (int64x1_t)(__p0); | | |
| 43207 | return __ret; | | |
| 43208 | } | | |
| 43209 | #endif | | |
| 43210 | | | |
| 43211 | #ifdef __LITTLE_ENDIAN__ | | |
| 43212 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { | | |
| 43213 | int64x1_t __ret; | | |
| 43214 | __ret = (int64x1_t)(__p0); | | |
| 43215 | return __ret; | 36359 | return __ret; |
| 43216 | } | 36360 | } |
| 43217 | #else | 36361 | __ai int32x2_t vreinterpret_s32_s8(int8x8_t __p0) { |
| 43218 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { | 36362 | int32x2_t __ret; |
| 43219 | int64x1_t __ret; | 36363 | __ret = (int32x2_t)(__p0); |
| 43220 | __ret = (int64x1_t)(__p0); | | |
| 43221 | return __ret; | 36364 | return __ret; |
| 43222 | } | 36365 | } |
| 43223 | #endif | 36366 | __ai int32x2_t vreinterpret_s32_f64(float64x1_t __p0) { |
| 43224 | | 36367 | int32x2_t __ret; |
| 43225 | #ifdef __LITTLE_ENDIAN__ | 36368 | __ret = (int32x2_t)(__p0); |
| 43226 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { | | |
| 43227 | int64x1_t __ret; | | |
| 43228 | __ret = (int64x1_t)(__p0); | | |
| 43229 | return __ret; | 36369 | return __ret; |
| 43230 | } | 36370 | } |
| 43231 | #else | 36371 | __ai int32x2_t vreinterpret_s32_f32(float32x2_t __p0) { |
| 43232 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { | 36372 | int32x2_t __ret; |
| 43233 | int64x1_t __ret; | 36373 | __ret = (int32x2_t)(__p0); |
| 43234 | __ret = (int64x1_t)(__p0); | | |
| 43235 | return __ret; | 36374 | return __ret; |
| 43236 | } | 36375 | } |
| 43237 | #endif | 36376 | __ai int32x2_t vreinterpret_s32_f16(float16x4_t __p0) { |
| 43238 | | 36377 | int32x2_t __ret; |
| 43239 | #ifdef __LITTLE_ENDIAN__ | 36378 | __ret = (int32x2_t)(__p0); |
| 43240 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { | | |
| 43241 | int64x1_t __ret; | | |
| 43242 | __ret = (int64x1_t)(__p0); | | |
| 43243 | return __ret; | 36379 | return __ret; |
| 43244 | } | 36380 | } |
| 43245 | #else | 36381 | __ai int32x2_t vreinterpret_s32_s64(int64x1_t __p0) { |
| 43246 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { | 36382 | int32x2_t __ret; |
| 43247 | int64x1_t __ret; | 36383 | __ret = (int32x2_t)(__p0); |
| 43248 | __ret = (int64x1_t)(__p0); | | |
| 43249 | return __ret; | 36384 | return __ret; |
| 43250 | } | 36385 | } |
| 43251 | #endif | 36386 | __ai int32x2_t vreinterpret_s32_s16(int16x4_t __p0) { |
| 43252 | | 36387 | int32x2_t __ret; |
| 43253 | #ifdef __LITTLE_ENDIAN__ | 36388 | __ret = (int32x2_t)(__p0); |
| 43254 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { | | |
| 43255 | int64x1_t __ret; | | |
| 43256 | __ret = (int64x1_t)(__p0); | | |
| 43257 | return __ret; | 36389 | return __ret; |
| 43258 | } | 36390 | } |
| 43259 | #else | 36391 | __ai int64x1_t vreinterpret_s64_p8(poly8x8_t __p0) { |
| 43260 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { | | |
| 43261 | int64x1_t __ret; | 36392 | int64x1_t __ret; |
| 43262 | __ret = (int64x1_t)(__p0); | 36393 | __ret = (int64x1_t)(__p0); |
| 43263 | return __ret; | 36394 | return __ret; |
| 43264 | } | 36395 | } |
| 43265 | #endif | 36396 | __ai int64x1_t vreinterpret_s64_p64(poly64x1_t __p0) { |
| 43266 | | | |
| 43267 | #ifdef __LITTLE_ENDIAN__ | | |
| 43268 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { | | |
| 43269 | int64x1_t __ret; | 36397 | int64x1_t __ret; |
| 43270 | __ret = (int64x1_t)(__p0); | 36398 | __ret = (int64x1_t)(__p0); |
| 43271 | return __ret; | 36399 | return __ret; |
| 43272 | } | 36400 | } |
| 43273 | #else | 36401 | __ai int64x1_t vreinterpret_s64_p16(poly16x4_t __p0) { |
| 43274 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { | | |
| 43275 | int64x1_t __ret; | 36402 | int64x1_t __ret; |
| 43276 | __ret = (int64x1_t)(__p0); | 36403 | __ret = (int64x1_t)(__p0); |
| 43277 | return __ret; | 36404 | return __ret; |
| 43278 | } | 36405 | } |
| 43279 | #endif | 36406 | __ai int64x1_t vreinterpret_s64_u8(uint8x8_t __p0) { |
| 43280 | | | |
| 43281 | #ifdef __LITTLE_ENDIAN__ | | |
| 43282 | __ai int64x1_t vreinterpret_s64_f64(float64x1_t __p0) { | | |
| 43283 | int64x1_t __ret; | 36407 | int64x1_t __ret; |
| 43284 | __ret = (int64x1_t)(__p0); | 36408 | __ret = (int64x1_t)(__p0); |
| 43285 | return __ret; | 36409 | return __ret; |
| 43286 | } | 36410 | } |
| 43287 | #else | 36411 | __ai int64x1_t vreinterpret_s64_u32(uint32x2_t __p0) { |
| 43288 | __ai int64x1_t vreinterpret_s64_f64(float64x1_t __p0) { | | |
| 43289 | int64x1_t __ret; | 36412 | int64x1_t __ret; |
| 43290 | __ret = (int64x1_t)(__p0); | 36413 | __ret = (int64x1_t)(__p0); |
| 43291 | return __ret; | 36414 | return __ret; |
| 43292 | } | 36415 | } |
| 43293 | #endif | 36416 | __ai int64x1_t vreinterpret_s64_u64(uint64x1_t __p0) { |
| 43294 | | | |
| 43295 | #ifdef __LITTLE_ENDIAN__ | | |
| 43296 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { | | |
| 43297 | int64x1_t __ret; | 36417 | int64x1_t __ret; |
| 43298 | __ret = (int64x1_t)(__p0); | 36418 | __ret = (int64x1_t)(__p0); |
| 43299 | return __ret; | 36419 | return __ret; |
| 43300 | } | 36420 | } |
| 43301 | #else | 36421 | __ai int64x1_t vreinterpret_s64_u16(uint16x4_t __p0) { |
| 43302 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { | | |
| 43303 | int64x1_t __ret; | 36422 | int64x1_t __ret; |
| 43304 | __ret = (int64x1_t)(__p0); | 36423 | __ret = (int64x1_t)(__p0); |
| 43305 | return __ret; | 36424 | return __ret; |
| 43306 | } | 36425 | } |
| 43307 | #endif | 36426 | __ai int64x1_t vreinterpret_s64_s8(int8x8_t __p0) { |
| 43308 | | | |
| 43309 | #ifdef __LITTLE_ENDIAN__ | | |
| 43310 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { | | |
| 43311 | int64x1_t __ret; | 36427 | int64x1_t __ret; |
| 43312 | __ret = (int64x1_t)(__p0); | 36428 | __ret = (int64x1_t)(__p0); |
| 43313 | return __ret; | 36429 | return __ret; |
| 43314 | } | 36430 | } |
| 43315 | #else | 36431 | __ai int64x1_t vreinterpret_s64_f64(float64x1_t __p0) { |
| 43316 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { | | |
| 43317 | int64x1_t __ret; | 36432 | int64x1_t __ret; |
| 43318 | __ret = (int64x1_t)(__p0); | 36433 | __ret = (int64x1_t)(__p0); |
| 43319 | return __ret; | 36434 | return __ret; |
| 43320 | } | 36435 | } |
| 43321 | #endif | 36436 | __ai int64x1_t vreinterpret_s64_f32(float32x2_t __p0) { |
| 43322 | | | |
| 43323 | #ifdef __LITTLE_ENDIAN__ | | |
| 43324 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { | | |
| 43325 | int64x1_t __ret; | 36437 | int64x1_t __ret; |
| 43326 | __ret = (int64x1_t)(__p0); | 36438 | __ret = (int64x1_t)(__p0); |
| 43327 | return __ret; | 36439 | return __ret; |
| 43328 | } | 36440 | } |
| 43329 | #else | 36441 | __ai int64x1_t vreinterpret_s64_f16(float16x4_t __p0) { |
| 43330 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { | | |
| 43331 | int64x1_t __ret; | 36442 | int64x1_t __ret; |
| 43332 | __ret = (int64x1_t)(__p0); | 36443 | __ret = (int64x1_t)(__p0); |
| 43333 | return __ret; | 36444 | return __ret; |
| 43334 | } | 36445 | } |
| 43335 | #endif | 36446 | __ai int64x1_t vreinterpret_s64_s32(int32x2_t __p0) { |
| 43336 | | | |
| 43337 | #ifdef __LITTLE_ENDIAN__ | | |
| 43338 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { | | |
| 43339 | int64x1_t __ret; | 36447 | int64x1_t __ret; |
| 43340 | __ret = (int64x1_t)(__p0); | 36448 | __ret = (int64x1_t)(__p0); |
| 43341 | return __ret; | 36449 | return __ret; |
| 43342 | } | 36450 | } |
| 43343 | #else | | |
| 43344 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { | 36451 | __ai int64x1_t vreinterpret_s64_s16(int16x4_t __p0) { |
| 43345 | int64x1_t __ret; | 36452 | int64x1_t __ret; |
| 43346 | __ret = (int64x1_t)(__p0); | 36453 | __ret = (int64x1_t)(__p0); |
| 43347 | return __ret; | 36454 | return __ret; |
| 43348 | } | 36455 | } |
| 43349 | #endif | | |
| 43350 | | | |
| 43351 | #ifdef __LITTLE_ENDIAN__ | | |
| 43352 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { | | |
| 43353 | int16x4_t __ret; | | |
| 43354 | __ret = (int16x4_t)(__p0); | | |
| 43355 | return __ret; | | |
| 43356 | } | | |
| 43357 | #else | | |
| 43358 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { | 36456 | __ai int16x4_t vreinterpret_s16_p8(poly8x8_t __p0) { |
| 43359 | int16x4_t __ret; | 36457 | int16x4_t __ret; |
| 43360 | __ret = (int16x4_t)(__p0); | 36458 | __ret = (int16x4_t)(__p0); |
| 43361 | return __ret; | 36459 | return __ret; |
| 43362 | } | 36460 | } |
| 43363 | #endif | | |
| 43364 | | | |
| 43365 | #ifdef __LITTLE_ENDIAN__ | | |
| 43366 | __ai int16x4_t vreinterpret_s16_p64(poly64x1_t __p0) { | | |
| 43367 | int16x4_t __ret; | | |
| 43368 | __ret = (int16x4_t)(__p0); | | |
| 43369 | return __ret; | | |
| 43370 | } | | |
| 43371 | #else | | |
| 43372 | __ai int16x4_t vreinterpret_s16_p64(poly64x1_t __p0) { | 36461 | __ai int16x4_t vreinterpret_s16_p64(poly64x1_t __p0) { |
| 43373 | int16x4_t __ret; | 36462 | int16x4_t __ret; |
| 43374 | __ret = (int16x4_t)(__p0); | 36463 | __ret = (int16x4_t)(__p0); |
| 43375 | return __ret; | 36464 | return __ret; |
| 43376 | } | 36465 | } |
| 43377 | #endif | | |
| 43378 | | | |
| 43379 | #ifdef __LITTLE_ENDIAN__ | | |
| 43380 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { | | |
| 43381 | int16x4_t __ret; | | |
| 43382 | __ret = (int16x4_t)(__p0); | | |
| 43383 | return __ret; | | |
| 43384 | } | | |
| 43385 | #else | | |
| 43386 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { | 36466 | __ai int16x4_t vreinterpret_s16_p16(poly16x4_t __p0) { |
| 43387 | int16x4_t __ret; | 36467 | int16x4_t __ret; |
| 43388 | __ret = (int16x4_t)(__p0); | 36468 | __ret = (int16x4_t)(__p0); |
| 43389 | return __ret; | 36469 | return __ret; |
| 43390 | } | 36470 | } |
| 43391 | #endif | | |
| 43392 | | | |
| 43393 | #ifdef __LITTLE_ENDIAN__ | | |
| 43394 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { | | |
| 43395 | int16x4_t __ret; | | |
| 43396 | __ret = (int16x4_t)(__p0); | | |
| 43397 | return __ret; | | |
| 43398 | } | | |
| 43399 | #else | | |
| 43400 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { | 36471 | __ai int16x4_t vreinterpret_s16_u8(uint8x8_t __p0) { |
| 43401 | int16x4_t __ret; | 36472 | int16x4_t __ret; |
| 43402 | __ret = (int16x4_t)(__p0); | 36473 | __ret = (int16x4_t)(__p0); |
| 43403 | return __ret; | 36474 | return __ret; |
| 43404 | } | 36475 | } |
| 43405 | #endif | | |
| 43406 | | | |
| 43407 | #ifdef __LITTLE_ENDIAN__ | | |
| 43408 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { | | |
| 43409 | int16x4_t __ret; | | |
| 43410 | __ret = (int16x4_t)(__p0); | | |
| 43411 | return __ret; | | |
| 43412 | } | | |
| 43413 | #else | | |
| 43414 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { | 36476 | __ai int16x4_t vreinterpret_s16_u32(uint32x2_t __p0) { |
| 43415 | int16x4_t __ret; | 36477 | int16x4_t __ret; |
| 43416 | __ret = (int16x4_t)(__p0); | 36478 | __ret = (int16x4_t)(__p0); |
| 43417 | return __ret; | 36479 | return __ret; |
| 43418 | } | 36480 | } |
| 43419 | #endif | | |
| 43420 | | | |
| 43421 | #ifdef __LITTLE_ENDIAN__ | | |
| 43422 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { | | |
| 43423 | int16x4_t __ret; | | |
| 43424 | __ret = (int16x4_t)(__p0); | | |
| 43425 | return __ret; | | |
| 43426 | } | | |
| 43427 | #else | | |
| 43428 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { | 36481 | __ai int16x4_t vreinterpret_s16_u64(uint64x1_t __p0) { |
| 43429 | int16x4_t __ret; | 36482 | int16x4_t __ret; |
| 43430 | __ret = (int16x4_t)(__p0); | 36483 | __ret = (int16x4_t)(__p0); |
| 43431 | return __ret; | 36484 | return __ret; |
| 43432 | } | 36485 | } |
| 43433 | #endif | | |
| 43434 | | | |
| 43435 | #ifdef __LITTLE_ENDIAN__ | | |
| 43436 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { | | |
| 43437 | int16x4_t __ret; | | |
| 43438 | __ret = (int16x4_t)(__p0); | | |
| 43439 | return __ret; | | |
| 43440 | } | | |
| 43441 | #else | | |
| 43442 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { | 36486 | __ai int16x4_t vreinterpret_s16_u16(uint16x4_t __p0) { |
| 43443 | int16x4_t __ret; | 36487 | int16x4_t __ret; |
| 43444 | __ret = (int16x4_t)(__p0); | 36488 | __ret = (int16x4_t)(__p0); |
| 43445 | return __ret; | 36489 | return __ret; |
| 43446 | } | 36490 | } |
| 43447 | #endif | | |
| 43448 | | | |
| 43449 | #ifdef __LITTLE_ENDIAN__ | | |
| 43450 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { | | |
| 43451 | int16x4_t __ret; | | |
| 43452 | __ret = (int16x4_t)(__p0); | | |
| 43453 | return __ret; | | |
| 43454 | } | | |
| 43455 | #else | | |
| 43456 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { | 36491 | __ai int16x4_t vreinterpret_s16_s8(int8x8_t __p0) { |
| 43457 | int16x4_t __ret; | 36492 | int16x4_t __ret; |
| 43458 | __ret = (int16x4_t)(__p0); | 36493 | __ret = (int16x4_t)(__p0); |
| 43459 | return __ret; | 36494 | return __ret; |
| 43460 | } | 36495 | } |
| 43461 | #endif | | |
| 43462 | | | |
| 43463 | #ifdef __LITTLE_ENDIAN__ | | |
| 43464 | __ai int16x4_t vreinterpret_s16_f64(float64x1_t __p0) { | | |
| 43465 | int16x4_t __ret; | | |
| 43466 | __ret = (int16x4_t)(__p0); | | |
| 43467 | return __ret; | | |
| 43468 | } | | |
| 43469 | #else | | |
| 43470 | __ai int16x4_t vreinterpret_s16_f64(float64x1_t __p0) { | 36496 | __ai int16x4_t vreinterpret_s16_f64(float64x1_t __p0) { |
| 43471 | int16x4_t __ret; | 36497 | int16x4_t __ret; |
| 43472 | __ret = (int16x4_t)(__p0); | 36498 | __ret = (int16x4_t)(__p0); |
| 43473 | return __ret; | 36499 | return __ret; |
| 43474 | } | 36500 | } |
| 43475 | #endif | | |
| 43476 | | | |
| 43477 | #ifdef __LITTLE_ENDIAN__ | | |
| 43478 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { | | |
| 43479 | int16x4_t __ret; | | |
| 43480 | __ret = (int16x4_t)(__p0); | | |
| 43481 | return __ret; | | |
| 43482 | } | | |
| 43483 | #else | | |
| 43484 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { | 36501 | __ai int16x4_t vreinterpret_s16_f32(float32x2_t __p0) { |
| 43485 | int16x4_t __ret; | 36502 | int16x4_t __ret; |
| 43486 | __ret = (int16x4_t)(__p0); | 36503 | __ret = (int16x4_t)(__p0); |
| 43487 | return __ret; | 36504 | return __ret; |
| 43488 | } | 36505 | } |
| 43489 | #endif | | |
| 43490 | | | |
| 43491 | #ifdef __LITTLE_ENDIAN__ | | |
| 43492 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { | | |
| 43493 | int16x4_t __ret; | | |
| 43494 | __ret = (int16x4_t)(__p0); | | |
| 43495 | return __ret; | | |
| 43496 | } | | |
| 43497 | #else | | |
| 43498 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { | 36506 | __ai int16x4_t vreinterpret_s16_f16(float16x4_t __p0) { |
| 43499 | int16x4_t __ret; | 36507 | int16x4_t __ret; |
| 43500 | __ret = (int16x4_t)(__p0); | 36508 | __ret = (int16x4_t)(__p0); |
| 43501 | return __ret; | 36509 | return __ret; |
| 43502 | } | 36510 | } |
| 43503 | #endif | | |
| 43504 | | | |
| 43505 | #ifdef __LITTLE_ENDIAN__ | | |
| 43506 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { | | |
| 43507 | int16x4_t __ret; | | |
| 43508 | __ret = (int16x4_t)(__p0); | | |
| 43509 | return __ret; | | |
| 43510 | } | | |
| 43511 | #else | | |
| 43512 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { | 36511 | __ai int16x4_t vreinterpret_s16_s32(int32x2_t __p0) { |
| 43513 | int16x4_t __ret; | 36512 | int16x4_t __ret; |
| 43514 | __ret = (int16x4_t)(__p0); | 36513 | __ret = (int16x4_t)(__p0); |
| 43515 | return __ret; | 36514 | return __ret; |
| 43516 | } | 36515 | } |
| 43517 | #endif | | |
| 43518 | | | |
| 43519 | #ifdef __LITTLE_ENDIAN__ | | |
| 43520 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { | | |
| 43521 | int16x4_t __ret; | | |
| 43522 | __ret = (int16x4_t)(__p0); | | |
| 43523 | return __ret; | | |
| 43524 | } | | |
| 43525 | #else | | |
| 43526 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { | 36516 | __ai int16x4_t vreinterpret_s16_s64(int64x1_t __p0) { |
| 43527 | int16x4_t __ret; | 36517 | int16x4_t __ret; |
| 43528 | __ret = (int16x4_t)(__p0); | 36518 | __ret = (int16x4_t)(__p0); |
| 43529 | return __ret; | 36519 | return __ret; |
| 43530 | } | 36520 | } |
| 43531 | #endif | | |
| 43532 | | | |
| 43533 | #endif | 36521 | #endif |
| 43534 | #if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_DIRECTED_ROUNDING) | 36522 | #if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_DIRECTED_ROUNDING) |
| 43535 | #ifdef __LITTLE_ENDIAN__ | 36523 | #ifdef __LITTLE_ENDIAN__ |
| ... | @@ -43548,20 +36536,11 @@ __ai float64x2_t vrndq_f64(float64x2_t __p0) { | ... | @@ -43548,20 +36536,11 @@ __ai float64x2_t vrndq_f64(float64x2_t __p0) { |
| 43548 | } | 36536 | } |
| 43549 | #endif | 36537 | #endif |
| 43550 | | 36538 | |
| 43551 | #ifdef __LITTLE_ENDIAN__ | | |
| 43552 | __ai float64x1_t vrnd_f64(float64x1_t __p0) { | | |
| 43553 | float64x1_t __ret; | | |
| 43554 | __ret = (float64x1_t) __builtin_neon_vrnd_v((int8x8_t)__p0, 10); | | |
| 43555 | return __ret; | | |
| 43556 | } | | |
| 43557 | #else | | |
| 43558 | __ai float64x1_t vrnd_f64(float64x1_t __p0) { | 36539 | __ai float64x1_t vrnd_f64(float64x1_t __p0) { |
| 43559 | float64x1_t __ret; | 36540 | float64x1_t __ret; |
| 43560 | __ret = (float64x1_t) __builtin_neon_vrnd_v((int8x8_t)__p0, 10); | 36541 | __ret = (float64x1_t) __builtin_neon_vrnd_v((int8x8_t)__p0, 10); |
| 43561 | return __ret; | 36542 | return __ret; |
| 43562 | } | 36543 | } |
| 43563 | #endif | | |
| 43564 | | | |
| 43565 | #ifdef __LITTLE_ENDIAN__ | 36544 | #ifdef __LITTLE_ENDIAN__ |
| 43566 | __ai float64x2_t vrndaq_f64(float64x2_t __p0) { | 36545 | __ai float64x2_t vrndaq_f64(float64x2_t __p0) { |
| 43567 | float64x2_t __ret; | 36546 | float64x2_t __ret; |
| ... | @@ -43578,20 +36557,11 @@ __ai float64x2_t vrndaq_f64(float64x2_t __p0) { | ... | @@ -43578,20 +36557,11 @@ __ai float64x2_t vrndaq_f64(float64x2_t __p0) { |
| 43578 | } | 36557 | } |
| 43579 | #endif | 36558 | #endif |
| 43580 | | 36559 | |
| 43581 | #ifdef __LITTLE_ENDIAN__ | | |
| 43582 | __ai float64x1_t vrnda_f64(float64x1_t __p0) { | | |
| 43583 | float64x1_t __ret; | | |
| 43584 | __ret = (float64x1_t) __builtin_neon_vrnda_v((int8x8_t)__p0, 10); | | |
| 43585 | return __ret; | | |
| 43586 | } | | |
| 43587 | #else | | |
| 43588 | __ai float64x1_t vrnda_f64(float64x1_t __p0) { | 36560 | __ai float64x1_t vrnda_f64(float64x1_t __p0) { |
| 43589 | float64x1_t __ret; | 36561 | float64x1_t __ret; |
| 43590 | __ret = (float64x1_t) __builtin_neon_vrnda_v((int8x8_t)__p0, 10); | 36562 | __ret = (float64x1_t) __builtin_neon_vrnda_v((int8x8_t)__p0, 10); |
| 43591 | return __ret; | 36563 | return __ret; |
| 43592 | } | 36564 | } |
| 43593 | #endif | | |
| 43594 | | | |
| 43595 | #ifdef __LITTLE_ENDIAN__ | 36565 | #ifdef __LITTLE_ENDIAN__ |
| 43596 | __ai float64x2_t vrndiq_f64(float64x2_t __p0) { | 36566 | __ai float64x2_t vrndiq_f64(float64x2_t __p0) { |
| 43597 | float64x2_t __ret; | 36567 | float64x2_t __ret; |
| ... | @@ -43608,20 +36578,11 @@ __ai float64x2_t vrndiq_f64(float64x2_t __p0) { | ... | @@ -43608,20 +36578,11 @@ __ai float64x2_t vrndiq_f64(float64x2_t __p0) { |
| 43608 | } | 36578 | } |
| 43609 | #endif | 36579 | #endif |
| 43610 | | 36580 | |
| 43611 | #ifdef __LITTLE_ENDIAN__ | | |
| 43612 | __ai float64x1_t vrndi_f64(float64x1_t __p0) { | | |
| 43613 | float64x1_t __ret; | | |
| 43614 | __ret = (float64x1_t) __builtin_neon_vrndi_v((int8x8_t)__p0, 10); | | |
| 43615 | return __ret; | | |
| 43616 | } | | |
| 43617 | #else | | |
| 43618 | __ai float64x1_t vrndi_f64(float64x1_t __p0) { | 36581 | __ai float64x1_t vrndi_f64(float64x1_t __p0) { |
| 43619 | float64x1_t __ret; | 36582 | float64x1_t __ret; |
| 43620 | __ret = (float64x1_t) __builtin_neon_vrndi_v((int8x8_t)__p0, 10); | 36583 | __ret = (float64x1_t) __builtin_neon_vrndi_v((int8x8_t)__p0, 10); |
| 43621 | return __ret; | 36584 | return __ret; |
| 43622 | } | 36585 | } |
| 43623 | #endif | | |
| 43624 | | | |
| 43625 | #ifdef __LITTLE_ENDIAN__ | 36586 | #ifdef __LITTLE_ENDIAN__ |
| 43626 | __ai float64x2_t vrndmq_f64(float64x2_t __p0) { | 36587 | __ai float64x2_t vrndmq_f64(float64x2_t __p0) { |
| 43627 | float64x2_t __ret; | 36588 | float64x2_t __ret; |
| ... | @@ -43638,20 +36599,11 @@ __ai float64x2_t vrndmq_f64(float64x2_t __p0) { | ... | @@ -43638,20 +36599,11 @@ __ai float64x2_t vrndmq_f64(float64x2_t __p0) { |
| 43638 | } | 36599 | } |
| 43639 | #endif | 36600 | #endif |
| 43640 | | 36601 | |
| 43641 | #ifdef __LITTLE_ENDIAN__ | | |
| 43642 | __ai float64x1_t vrndm_f64(float64x1_t __p0) { | | |
| 43643 | float64x1_t __ret; | | |
| 43644 | __ret = (float64x1_t) __builtin_neon_vrndm_v((int8x8_t)__p0, 10); | | |
| 43645 | return __ret; | | |
| 43646 | } | | |
| 43647 | #else | | |
| 43648 | __ai float64x1_t vrndm_f64(float64x1_t __p0) { | 36602 | __ai float64x1_t vrndm_f64(float64x1_t __p0) { |
| 43649 | float64x1_t __ret; | 36603 | float64x1_t __ret; |
| 43650 | __ret = (float64x1_t) __builtin_neon_vrndm_v((int8x8_t)__p0, 10); | 36604 | __ret = (float64x1_t) __builtin_neon_vrndm_v((int8x8_t)__p0, 10); |
| 43651 | return __ret; | 36605 | return __ret; |
| 43652 | } | 36606 | } |
| 43653 | #endif | | |
| 43654 | | | |
| 43655 | #ifdef __LITTLE_ENDIAN__ | 36607 | #ifdef __LITTLE_ENDIAN__ |
| 43656 | __ai float64x2_t vrndnq_f64(float64x2_t __p0) { | 36608 | __ai float64x2_t vrndnq_f64(float64x2_t __p0) { |
| 43657 | float64x2_t __ret; | 36609 | float64x2_t __ret; |
| ... | @@ -43668,20 +36620,11 @@ __ai float64x2_t vrndnq_f64(float64x2_t __p0) { | ... | @@ -43668,20 +36620,11 @@ __ai float64x2_t vrndnq_f64(float64x2_t __p0) { |
| 43668 | } | 36620 | } |
| 43669 | #endif | 36621 | #endif |
| 43670 | | 36622 | |
| 43671 | #ifdef __LITTLE_ENDIAN__ | | |
| 43672 | __ai float64x1_t vrndn_f64(float64x1_t __p0) { | | |
| 43673 | float64x1_t __ret; | | |
| 43674 | __ret = (float64x1_t) __builtin_neon_vrndn_v((int8x8_t)__p0, 10); | | |
| 43675 | return __ret; | | |
| 43676 | } | | |
| 43677 | #else | | |
| 43678 | __ai float64x1_t vrndn_f64(float64x1_t __p0) { | 36623 | __ai float64x1_t vrndn_f64(float64x1_t __p0) { |
| 43679 | float64x1_t __ret; | 36624 | float64x1_t __ret; |
| 43680 | __ret = (float64x1_t) __builtin_neon_vrndn_v((int8x8_t)__p0, 10); | 36625 | __ret = (float64x1_t) __builtin_neon_vrndn_v((int8x8_t)__p0, 10); |
| 43681 | return __ret; | 36626 | return __ret; |
| 43682 | } | 36627 | } |
| 43683 | #endif | | |
| 43684 | | | |
| 43685 | #ifdef __LITTLE_ENDIAN__ | 36628 | #ifdef __LITTLE_ENDIAN__ |
| 43686 | __ai float64x2_t vrndpq_f64(float64x2_t __p0) { | 36629 | __ai float64x2_t vrndpq_f64(float64x2_t __p0) { |
| 43687 | float64x2_t __ret; | 36630 | float64x2_t __ret; |
| ... | @@ -43698,20 +36641,11 @@ __ai float64x2_t vrndpq_f64(float64x2_t __p0) { | ... | @@ -43698,20 +36641,11 @@ __ai float64x2_t vrndpq_f64(float64x2_t __p0) { |
| 43698 | } | 36641 | } |
| 43699 | #endif | 36642 | #endif |
| 43700 | | 36643 | |
| 43701 | #ifdef __LITTLE_ENDIAN__ | | |
| 43702 | __ai float64x1_t vrndp_f64(float64x1_t __p0) { | 36644 | __ai float64x1_t vrndp_f64(float64x1_t __p0) { |
| 43703 | float64x1_t __ret; | 36645 | float64x1_t __ret; |
| 43704 | __ret = (float64x1_t) __builtin_neon_vrndp_v((int8x8_t)__p0, 10); | 36646 | __ret = (float64x1_t) __builtin_neon_vrndp_v((int8x8_t)__p0, 10); |
| 43705 | return __ret; | 36647 | return __ret; |
| 43706 | } | 36648 | } |
| 43707 | #else | | |
| 43708 | __ai float64x1_t vrndp_f64(float64x1_t __p0) { | | |
| 43709 | float64x1_t __ret; | | |
| 43710 | __ret = (float64x1_t) __builtin_neon_vrndp_v((int8x8_t)__p0, 10); | | |
| 43711 | return __ret; | | |
| 43712 | } | | |
| 43713 | #endif | | |
| 43714 | | | |
| 43715 | #ifdef __LITTLE_ENDIAN__ | 36649 | #ifdef __LITTLE_ENDIAN__ |
| 43716 | __ai float64x2_t vrndxq_f64(float64x2_t __p0) { | 36650 | __ai float64x2_t vrndxq_f64(float64x2_t __p0) { |
| 43717 | float64x2_t __ret; | 36651 | float64x2_t __ret; |
| ... | @@ -43728,20 +36662,11 @@ __ai float64x2_t vrndxq_f64(float64x2_t __p0) { | ... | @@ -43728,20 +36662,11 @@ __ai float64x2_t vrndxq_f64(float64x2_t __p0) { |
| 43728 | } | 36662 | } |
| 43729 | #endif | 36663 | #endif |
| 43730 | | 36664 | |
| 43731 | #ifdef __LITTLE_ENDIAN__ | | |
| 43732 | __ai float64x1_t vrndx_f64(float64x1_t __p0) { | | |
| 43733 | float64x1_t __ret; | | |
| 43734 | __ret = (float64x1_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 10); | | |
| 43735 | return __ret; | | |
| 43736 | } | | |
| 43737 | #else | | |
| 43738 | __ai float64x1_t vrndx_f64(float64x1_t __p0) { | 36665 | __ai float64x1_t vrndx_f64(float64x1_t __p0) { |
| 43739 | float64x1_t __ret; | 36666 | float64x1_t __ret; |
| 43740 | __ret = (float64x1_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 10); | 36667 | __ret = (float64x1_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 10); |
| 43741 | return __ret; | 36668 | return __ret; |
| 43742 | } | 36669 | } |
| 43743 | #endif | | |
| 43744 | | | |
| 43745 | #endif | 36670 | #endif |
| 43746 | #if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_NUMERIC_MAXMIN) | 36671 | #if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_NUMERIC_MAXMIN) |
| 43747 | #ifdef __LITTLE_ENDIAN__ | 36672 | #ifdef __LITTLE_ENDIAN__ |
| ... | @@ -43761,20 +36686,11 @@ __ai float64x2_t vmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -43761,20 +36686,11 @@ __ai float64x2_t vmaxnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 43761 | } | 36686 | } |
| 43762 | #endif | 36687 | #endif |
| 43763 | | 36688 | |
| 43764 | #ifdef __LITTLE_ENDIAN__ | | |
| 43765 | __ai float64x1_t vmaxnm_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 43766 | float64x1_t __ret; | | |
| 43767 | __ret = (float64x1_t) __builtin_neon_vmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 43768 | return __ret; | | |
| 43769 | } | | |
| 43770 | #else | | |
| 43771 | __ai float64x1_t vmaxnm_f64(float64x1_t __p0, float64x1_t __p1) { | 36689 | __ai float64x1_t vmaxnm_f64(float64x1_t __p0, float64x1_t __p1) { |
| 43772 | float64x1_t __ret; | 36690 | float64x1_t __ret; |
| 43773 | __ret = (float64x1_t) __builtin_neon_vmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 36691 | __ret = (float64x1_t) __builtin_neon_vmaxnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 43774 | return __ret; | 36692 | return __ret; |
| 43775 | } | 36693 | } |
| 43776 | #endif | | |
| 43777 | | | |
| 43778 | #ifdef __LITTLE_ENDIAN__ | 36694 | #ifdef __LITTLE_ENDIAN__ |
| 43779 | __ai float64x2_t vminnmq_f64(float64x2_t __p0, float64x2_t __p1) { | 36695 | __ai float64x2_t vminnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 43780 | float64x2_t __ret; | 36696 | float64x2_t __ret; |
| ... | @@ -43792,16 +36708,183 @@ __ai float64x2_t vminnmq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -43792,16 +36708,183 @@ __ai float64x2_t vminnmq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 43792 | } | 36708 | } |
| 43793 | #endif | 36709 | #endif |
| 43794 | | 36710 | |
| 43795 | #ifdef __LITTLE_ENDIAN__ | | |
| 43796 | __ai float64x1_t vminnm_f64(float64x1_t __p0, float64x1_t __p1) { | 36711 | __ai float64x1_t vminnm_f64(float64x1_t __p0, float64x1_t __p1) { |
| 43797 | float64x1_t __ret; | 36712 | float64x1_t __ret; |
| 43798 | __ret = (float64x1_t) __builtin_neon_vminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 36713 | __ret = (float64x1_t) __builtin_neon_vminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 43799 | return __ret; | 36714 | return __ret; |
| 43800 | } | 36715 | } |
| | 36716 | #endif |
| | 36717 | #if defined(__ARM_FEATURE_COMPLEX) |
| | 36718 | #ifdef __LITTLE_ENDIAN__ |
| | 36719 | __ai float32x2_t vcadd_rot270_f32(float32x2_t __p0, float32x2_t __p1) { |
| | 36720 | float32x2_t __ret; |
| | 36721 | __ret = (float32x2_t) __builtin_neon_vcadd_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| | 36722 | return __ret; |
| | 36723 | } |
| 43801 | #else | 36724 | #else |
| 43802 | __ai float64x1_t vminnm_f64(float64x1_t __p0, float64x1_t __p1) { | 36725 | __ai float32x2_t vcadd_rot270_f32(float32x2_t __p0, float32x2_t __p1) { |
| 43803 | float64x1_t __ret; | 36726 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 43804 | __ret = (float64x1_t) __builtin_neon_vminnm_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 36727 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36728 | float32x2_t __ret; |
| | 36729 | __ret = (float32x2_t) __builtin_neon_vcadd_rot270_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| | 36730 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 36731 | return __ret; |
| | 36732 | } |
| | 36733 | #endif |
| | 36734 | |
| | 36735 | #ifdef __LITTLE_ENDIAN__ |
| | 36736 | __ai float32x2_t vcadd_rot90_f32(float32x2_t __p0, float32x2_t __p1) { |
| | 36737 | float32x2_t __ret; |
| | 36738 | __ret = (float32x2_t) __builtin_neon_vcadd_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, 9); |
| | 36739 | return __ret; |
| | 36740 | } |
| | 36741 | #else |
| | 36742 | __ai float32x2_t vcadd_rot90_f32(float32x2_t __p0, float32x2_t __p1) { |
| | 36743 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 36744 | float32x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36745 | float32x2_t __ret; |
| | 36746 | __ret = (float32x2_t) __builtin_neon_vcadd_rot90_v((int8x8_t)__rev0, (int8x8_t)__rev1, 9); |
| | 36747 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 36748 | return __ret; |
| | 36749 | } |
| | 36750 | #endif |
| | 36751 | |
| | 36752 | #ifdef __LITTLE_ENDIAN__ |
| | 36753 | __ai float32x4_t vcaddq_rot270_f32(float32x4_t __p0, float32x4_t __p1) { |
| | 36754 | float32x4_t __ret; |
| | 36755 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| | 36756 | return __ret; |
| | 36757 | } |
| | 36758 | #else |
| | 36759 | __ai float32x4_t vcaddq_rot270_f32(float32x4_t __p0, float32x4_t __p1) { |
| | 36760 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 36761 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36762 | float32x4_t __ret; |
| | 36763 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| | 36764 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 36765 | return __ret; |
| | 36766 | } |
| | 36767 | #endif |
| | 36768 | |
| | 36769 | #ifdef __LITTLE_ENDIAN__ |
| | 36770 | __ai float32x4_t vcaddq_rot90_f32(float32x4_t __p0, float32x4_t __p1) { |
| | 36771 | float32x4_t __ret; |
| | 36772 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, 41); |
| | 36773 | return __ret; |
| | 36774 | } |
| | 36775 | #else |
| | 36776 | __ai float32x4_t vcaddq_rot90_f32(float32x4_t __p0, float32x4_t __p1) { |
| | 36777 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 36778 | float32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36779 | float32x4_t __ret; |
| | 36780 | __ret = (float32x4_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, 41); |
| | 36781 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 36782 | return __ret; |
| | 36783 | } |
| | 36784 | #endif |
| | 36785 | |
| | 36786 | #endif |
| | 36787 | #if defined(__ARM_FEATURE_COMPLEX) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) |
| | 36788 | #ifdef __LITTLE_ENDIAN__ |
| | 36789 | __ai float16x4_t vcadd_rot270_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 36790 | float16x4_t __ret; |
| | 36791 | __ret = (float16x4_t) __builtin_neon_vcadd_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| | 36792 | return __ret; |
| | 36793 | } |
| | 36794 | #else |
| | 36795 | __ai float16x4_t vcadd_rot270_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 36796 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 36797 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36798 | float16x4_t __ret; |
| | 36799 | __ret = (float16x4_t) __builtin_neon_vcadd_rot270_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| | 36800 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 36801 | return __ret; |
| | 36802 | } |
| | 36803 | #endif |
| | 36804 | |
| | 36805 | #ifdef __LITTLE_ENDIAN__ |
| | 36806 | __ai float16x4_t vcadd_rot90_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 36807 | float16x4_t __ret; |
| | 36808 | __ret = (float16x4_t) __builtin_neon_vcadd_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, 8); |
| | 36809 | return __ret; |
| | 36810 | } |
| | 36811 | #else |
| | 36812 | __ai float16x4_t vcadd_rot90_f16(float16x4_t __p0, float16x4_t __p1) { |
| | 36813 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| | 36814 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| | 36815 | float16x4_t __ret; |
| | 36816 | __ret = (float16x4_t) __builtin_neon_vcadd_rot90_v((int8x8_t)__rev0, (int8x8_t)__rev1, 8); |
| | 36817 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| | 36818 | return __ret; |
| | 36819 | } |
| | 36820 | #endif |
| | 36821 | |
| | 36822 | #ifdef __LITTLE_ENDIAN__ |
| | 36823 | __ai float16x8_t vcaddq_rot270_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 36824 | float16x8_t __ret; |
| | 36825 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| | 36826 | return __ret; |
| | 36827 | } |
| | 36828 | #else |
| | 36829 | __ai float16x8_t vcaddq_rot270_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 36830 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36831 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36832 | float16x8_t __ret; |
| | 36833 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| | 36834 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36835 | return __ret; |
| | 36836 | } |
| | 36837 | #endif |
| | 36838 | |
| | 36839 | #ifdef __LITTLE_ENDIAN__ |
| | 36840 | __ai float16x8_t vcaddq_rot90_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 36841 | float16x8_t __ret; |
| | 36842 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, 40); |
| | 36843 | return __ret; |
| | 36844 | } |
| | 36845 | #else |
| | 36846 | __ai float16x8_t vcaddq_rot90_f16(float16x8_t __p0, float16x8_t __p1) { |
| | 36847 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36848 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36849 | float16x8_t __ret; |
| | 36850 | __ret = (float16x8_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, 40); |
| | 36851 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| | 36852 | return __ret; |
| | 36853 | } |
| | 36854 | #endif |
| | 36855 | |
| | 36856 | #endif |
| | 36857 | #if defined(__ARM_FEATURE_COMPLEX) && defined(__aarch64__) |
| | 36858 | #ifdef __LITTLE_ENDIAN__ |
| | 36859 | __ai float64x2_t vcaddq_rot270_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 36860 | float64x2_t __ret; |
| | 36861 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| | 36862 | return __ret; |
| | 36863 | } |
| | 36864 | #else |
| | 36865 | __ai float64x2_t vcaddq_rot270_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 36866 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 36867 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36868 | float64x2_t __ret; |
| | 36869 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot270_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| | 36870 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| | 36871 | return __ret; |
| | 36872 | } |
| | 36873 | #endif |
| | 36874 | |
| | 36875 | #ifdef __LITTLE_ENDIAN__ |
| | 36876 | __ai float64x2_t vcaddq_rot90_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 36877 | float64x2_t __ret; |
| | 36878 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, 42); |
| | 36879 | return __ret; |
| | 36880 | } |
| | 36881 | #else |
| | 36882 | __ai float64x2_t vcaddq_rot90_f64(float64x2_t __p0, float64x2_t __p1) { |
| | 36883 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| | 36884 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| | 36885 | float64x2_t __ret; |
| | 36886 | __ret = (float64x2_t) __builtin_neon_vcaddq_rot90_v((int8x16_t)__rev0, (int8x16_t)__rev1, 42); |
| | 36887 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 43805 | return __ret; | 36888 | return __ret; |
| 43806 | } | 36889 | } |
| 43807 | #endif | 36890 | #endif |
| ... | @@ -46305,7 +39388,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46305,7 +39388,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46305 | #define vduph_lane_f16(__p0, __p1) __extension__ ({ \ | 39388 | #define vduph_lane_f16(__p0, __p1) __extension__ ({ \ |
| 46306 | float16x4_t __s0 = __p0; \ | 39389 | float16x4_t __s0 = __p0; \ |
| 46307 | float16_t __ret; \ | 39390 | float16_t __ret; \ |
| 46308 | __ret = (float16_t) __builtin_neon_vduph_lane_f16((int8x8_t)__s0, __p1); \ | 39391 | __ret = (float16_t) __builtin_neon_vduph_lane_f16((float16x4_t)__s0, __p1); \ |
| 46309 | __ret; \ | 39392 | __ret; \ |
| 46310 | }) | 39393 | }) |
| 46311 | #else | 39394 | #else |
| ... | @@ -46313,7 +39396,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46313,7 +39396,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46313 | float16x4_t __s0 = __p0; \ | 39396 | float16x4_t __s0 = __p0; \ |
| 46314 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 39397 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 46315 | float16_t __ret; \ | 39398 | float16_t __ret; \ |
| 46316 | __ret = (float16_t) __builtin_neon_vduph_lane_f16((int8x8_t)__rev0, __p1); \ | 39399 | __ret = (float16_t) __builtin_neon_vduph_lane_f16((float16x4_t)__rev0, __p1); \ |
| 46317 | __ret; \ | 39400 | __ret; \ |
| 46318 | }) | 39401 | }) |
| 46319 | #endif | 39402 | #endif |
| ... | @@ -46322,7 +39405,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46322,7 +39405,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46322 | #define vduph_laneq_f16(__p0, __p1) __extension__ ({ \ | 39405 | #define vduph_laneq_f16(__p0, __p1) __extension__ ({ \ |
| 46323 | float16x8_t __s0 = __p0; \ | 39406 | float16x8_t __s0 = __p0; \ |
| 46324 | float16_t __ret; \ | 39407 | float16_t __ret; \ |
| 46325 | __ret = (float16_t) __builtin_neon_vduph_laneq_f16((int8x16_t)__s0, __p1); \ | 39408 | __ret = (float16_t) __builtin_neon_vduph_laneq_f16((float16x8_t)__s0, __p1); \ |
| 46326 | __ret; \ | 39409 | __ret; \ |
| 46327 | }) | 39410 | }) |
| 46328 | #else | 39411 | #else |
| ... | @@ -46330,7 +39413,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46330,7 +39413,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46330 | float16x8_t __s0 = __p0; \ | 39413 | float16x8_t __s0 = __p0; \ |
| 46331 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 39414 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46332 | float16_t __ret; \ | 39415 | float16_t __ret; \ |
| 46333 | __ret = (float16_t) __builtin_neon_vduph_laneq_f16((int8x16_t)__rev0, __p1); \ | 39416 | __ret = (float16_t) __builtin_neon_vduph_laneq_f16((float16x8_t)__rev0, __p1); \ |
| 46334 | __ret; \ | 39417 | __ret; \ |
| 46335 | }) | 39418 | }) |
| 46336 | #endif | 39419 | #endif |
| ... | @@ -46341,7 +39424,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46341,7 +39424,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46341 | float16_t __s1 = __p1; \ | 39424 | float16_t __s1 = __p1; \ |
| 46342 | float16x4_t __s2 = __p2; \ | 39425 | float16x4_t __s2 = __p2; \ |
| 46343 | float16_t __ret; \ | 39426 | float16_t __ret; \ |
| 46344 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (int8x8_t)__s2, __p3); \ | 39427 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__s2, __p3); \ |
| 46345 | __ret; \ | 39428 | __ret; \ |
| 46346 | }) | 39429 | }) |
| 46347 | #else | 39430 | #else |
| ... | @@ -46351,7 +39434,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46351,7 +39434,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46351 | float16x4_t __s2 = __p2; \ | 39434 | float16x4_t __s2 = __p2; \ |
| 46352 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 39435 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 46353 | float16_t __ret; \ | 39436 | float16_t __ret; \ |
| 46354 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (int8x8_t)__rev2, __p3); \ | 39437 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__rev2, __p3); \ |
| 46355 | __ret; \ | 39438 | __ret; \ |
| 46356 | }) | 39439 | }) |
| 46357 | #define __noswap_vfmah_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 39440 | #define __noswap_vfmah_lane_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| ... | @@ -46359,7 +39442,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46359,7 +39442,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46359 | float16_t __s1 = __p1; \ | 39442 | float16_t __s1 = __p1; \ |
| 46360 | float16x4_t __s2 = __p2; \ | 39443 | float16x4_t __s2 = __p2; \ |
| 46361 | float16_t __ret; \ | 39444 | float16_t __ret; \ |
| 46362 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (int8x8_t)__s2, __p3); \ | 39445 | __ret = (float16_t) __builtin_neon_vfmah_lane_f16(__s0, __s1, (float16x4_t)__s2, __p3); \ |
| 46363 | __ret; \ | 39446 | __ret; \ |
| 46364 | }) | 39447 | }) |
| 46365 | #endif | 39448 | #endif |
| ... | @@ -46434,7 +39517,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46434,7 +39517,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46434 | float16_t __s1 = __p1; \ | 39517 | float16_t __s1 = __p1; \ |
| 46435 | float16x8_t __s2 = __p2; \ | 39518 | float16x8_t __s2 = __p2; \ |
| 46436 | float16_t __ret; \ | 39519 | float16_t __ret; \ |
| 46437 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (int8x16_t)__s2, __p3); \ | 39520 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__s2, __p3); \ |
| 46438 | __ret; \ | 39521 | __ret; \ |
| 46439 | }) | 39522 | }) |
| 46440 | #else | 39523 | #else |
| ... | @@ -46444,7 +39527,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46444,7 +39527,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46444 | float16x8_t __s2 = __p2; \ | 39527 | float16x8_t __s2 = __p2; \ |
| 46445 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ | 39528 | float16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46446 | float16_t __ret; \ | 39529 | float16_t __ret; \ |
| 46447 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (int8x16_t)__rev2, __p3); \ | 39530 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__rev2, __p3); \ |
| 46448 | __ret; \ | 39531 | __ret; \ |
| 46449 | }) | 39532 | }) |
| 46450 | #define __noswap_vfmah_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ | 39533 | #define __noswap_vfmah_laneq_f16(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| ... | @@ -46452,7 +39535,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46452,7 +39535,7 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46452 | float16_t __s1 = __p1; \ | 39535 | float16_t __s1 = __p1; \ |
| 46453 | float16x8_t __s2 = __p2; \ | 39536 | float16x8_t __s2 = __p2; \ |
| 46454 | float16_t __ret; \ | 39537 | float16_t __ret; \ |
| 46455 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (int8x16_t)__s2, __p3); \ | 39538 | __ret = (float16_t) __builtin_neon_vfmah_laneq_f16(__s0, __s1, (float16x8_t)__s2, __p3); \ |
| 46456 | __ret; \ | 39539 | __ret; \ |
| 46457 | }) | 39540 | }) |
| 46458 | #endif | 39541 | #endif |
| ... | @@ -46978,7 +40061,7 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46978,7 +40061,7 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46978 | float16_t __s0 = __p0; \ | 40061 | float16_t __s0 = __p0; \ |
| 46979 | float16x4_t __s1 = __p1; \ | 40062 | float16x4_t __s1 = __p1; \ |
| 46980 | float16_t __ret; \ | 40063 | float16_t __ret; \ |
| 46981 | __ret = (float16_t) __builtin_neon_vmulxh_lane_f16(__s0, (int8x8_t)__s1, __p2); \ | 40064 | __ret = (float16_t) __builtin_neon_vmulxh_lane_f16(__s0, (float16x4_t)__s1, __p2); \ |
| 46982 | __ret; \ | 40065 | __ret; \ |
| 46983 | }) | 40066 | }) |
| 46984 | #else | 40067 | #else |
| ... | @@ -46987,7 +40070,7 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -46987,7 +40070,7 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 46987 | float16x4_t __s1 = __p1; \ | 40070 | float16x4_t __s1 = __p1; \ |
| 46988 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ | 40071 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \ |
| 46989 | float16_t __ret; \ | 40072 | float16_t __ret; \ |
| 46990 | __ret = (float16_t) __builtin_neon_vmulxh_lane_f16(__s0, (int8x8_t)__rev1, __p2); \ | 40073 | __ret = (float16_t) __builtin_neon_vmulxh_lane_f16(__s0, (float16x4_t)__rev1, __p2); \ |
| 46991 | __ret; \ | 40074 | __ret; \ |
| 46992 | }) | 40075 | }) |
| 46993 | #endif | 40076 | #endif |
| ... | @@ -47039,7 +40122,7 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -47039,7 +40122,7 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 47039 | float16_t __s0 = __p0; \ | 40122 | float16_t __s0 = __p0; \ |
| 47040 | float16x8_t __s1 = __p1; \ | 40123 | float16x8_t __s1 = __p1; \ |
| 47041 | float16_t __ret; \ | 40124 | float16_t __ret; \ |
| 47042 | __ret = (float16_t) __builtin_neon_vmulxh_laneq_f16(__s0, (int8x16_t)__s1, __p2); \ | 40125 | __ret = (float16_t) __builtin_neon_vmulxh_laneq_f16(__s0, (float16x8_t)__s1, __p2); \ |
| 47043 | __ret; \ | 40126 | __ret; \ |
| 47044 | }) | 40127 | }) |
| 47045 | #else | 40128 | #else |
| ... | @@ -47048,7 +40131,7 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { | ... | @@ -47048,7 +40131,7 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 47048 | float16x8_t __s1 = __p1; \ | 40131 | float16x8_t __s1 = __p1; \ |
| 47049 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ | 40132 | float16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47050 | float16_t __ret; \ | 40133 | float16_t __ret; \ |
| 47051 | __ret = (float16_t) __builtin_neon_vmulxh_laneq_f16(__s0, (int8x16_t)__rev1, __p2); \ | 40134 | __ret = (float16_t) __builtin_neon_vmulxh_laneq_f16(__s0, (float16x8_t)__rev1, __p2); \ |
| 47052 | __ret; \ | 40135 | __ret; \ |
| 47053 | }) | 40136 | }) |
| 47054 | #endif | 40137 | #endif |
| ... | @@ -48073,48 +41156,21 @@ __ai float64x2_t vabdq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -48073,48 +41156,21 @@ __ai float64x2_t vabdq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48073 | } | 41156 | } |
| 48074 | #endif | 41157 | #endif |
| 48075 | | 41158 | |
| 48076 | #ifdef __LITTLE_ENDIAN__ | | |
| 48077 | __ai float64x1_t vabd_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48078 | float64x1_t __ret; | | |
| 48079 | __ret = (float64x1_t) __builtin_neon_vabd_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 48080 | return __ret; | | |
| 48081 | } | | |
| 48082 | #else | | |
| 48083 | __ai float64x1_t vabd_f64(float64x1_t __p0, float64x1_t __p1) { | 41159 | __ai float64x1_t vabd_f64(float64x1_t __p0, float64x1_t __p1) { |
| 48084 | float64x1_t __ret; | 41160 | float64x1_t __ret; |
| 48085 | __ret = (float64x1_t) __builtin_neon_vabd_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 41161 | __ret = (float64x1_t) __builtin_neon_vabd_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 48086 | return __ret; | 41162 | return __ret; |
| 48087 | } | 41163 | } |
| 48088 | #endif | | |
| 48089 | | | |
| 48090 | #ifdef __LITTLE_ENDIAN__ | | |
| 48091 | __ai float64_t vabdd_f64(float64_t __p0, float64_t __p1) { | | |
| 48092 | float64_t __ret; | | |
| 48093 | __ret = (float64_t) __builtin_neon_vabdd_f64(__p0, __p1); | | |
| 48094 | return __ret; | | |
| 48095 | } | | |
| 48096 | #else | | |
| 48097 | __ai float64_t vabdd_f64(float64_t __p0, float64_t __p1) { | 41164 | __ai float64_t vabdd_f64(float64_t __p0, float64_t __p1) { |
| 48098 | float64_t __ret; | 41165 | float64_t __ret; |
| 48099 | __ret = (float64_t) __builtin_neon_vabdd_f64(__p0, __p1); | 41166 | __ret = (float64_t) __builtin_neon_vabdd_f64(__p0, __p1); |
| 48100 | return __ret; | 41167 | return __ret; |
| 48101 | } | 41168 | } |
| 48102 | #endif | | |
| 48103 | | | |
| 48104 | #ifdef __LITTLE_ENDIAN__ | | |
| 48105 | __ai float32_t vabds_f32(float32_t __p0, float32_t __p1) { | | |
| 48106 | float32_t __ret; | | |
| 48107 | __ret = (float32_t) __builtin_neon_vabds_f32(__p0, __p1); | | |
| 48108 | return __ret; | | |
| 48109 | } | | |
| 48110 | #else | | |
| 48111 | __ai float32_t vabds_f32(float32_t __p0, float32_t __p1) { | 41169 | __ai float32_t vabds_f32(float32_t __p0, float32_t __p1) { |
| 48112 | float32_t __ret; | 41170 | float32_t __ret; |
| 48113 | __ret = (float32_t) __builtin_neon_vabds_f32(__p0, __p1); | 41171 | __ret = (float32_t) __builtin_neon_vabds_f32(__p0, __p1); |
| 48114 | return __ret; | 41172 | return __ret; |
| 48115 | } | 41173 | } |
| 48116 | #endif | | |
| 48117 | | | |
| 48118 | #ifdef __LITTLE_ENDIAN__ | 41174 | #ifdef __LITTLE_ENDIAN__ |
| 48119 | __ai float64x2_t vabsq_f64(float64x2_t __p0) { | 41175 | __ai float64x2_t vabsq_f64(float64x2_t __p0) { |
| 48120 | float64x2_t __ret; | 41176 | float64x2_t __ret; |
| ... | @@ -48147,48 +41203,21 @@ __ai int64x2_t vabsq_s64(int64x2_t __p0) { | ... | @@ -48147,48 +41203,21 @@ __ai int64x2_t vabsq_s64(int64x2_t __p0) { |
| 48147 | } | 41203 | } |
| 48148 | #endif | 41204 | #endif |
| 48149 | | 41205 | |
| 48150 | #ifdef __LITTLE_ENDIAN__ | | |
| 48151 | __ai float64x1_t vabs_f64(float64x1_t __p0) { | | |
| 48152 | float64x1_t __ret; | | |
| 48153 | __ret = (float64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 10); | | |
| 48154 | return __ret; | | |
| 48155 | } | | |
| 48156 | #else | | |
| 48157 | __ai float64x1_t vabs_f64(float64x1_t __p0) { | 41206 | __ai float64x1_t vabs_f64(float64x1_t __p0) { |
| 48158 | float64x1_t __ret; | 41207 | float64x1_t __ret; |
| 48159 | __ret = (float64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 10); | 41208 | __ret = (float64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 10); |
| 48160 | return __ret; | 41209 | return __ret; |
| 48161 | } | 41210 | } |
| 48162 | #endif | | |
| 48163 | | | |
| 48164 | #ifdef __LITTLE_ENDIAN__ | | |
| 48165 | __ai int64x1_t vabs_s64(int64x1_t __p0) { | | |
| 48166 | int64x1_t __ret; | | |
| 48167 | __ret = (int64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 3); | | |
| 48168 | return __ret; | | |
| 48169 | } | | |
| 48170 | #else | | |
| 48171 | __ai int64x1_t vabs_s64(int64x1_t __p0) { | 41211 | __ai int64x1_t vabs_s64(int64x1_t __p0) { |
| 48172 | int64x1_t __ret; | 41212 | int64x1_t __ret; |
| 48173 | __ret = (int64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 3); | 41213 | __ret = (int64x1_t) __builtin_neon_vabs_v((int8x8_t)__p0, 3); |
| 48174 | return __ret; | 41214 | return __ret; |
| 48175 | } | 41215 | } |
| 48176 | #endif | | |
| 48177 | | | |
| 48178 | #ifdef __LITTLE_ENDIAN__ | | |
| 48179 | __ai int64_t vabsd_s64(int64_t __p0) { | | |
| 48180 | int64_t __ret; | | |
| 48181 | __ret = (int64_t) __builtin_neon_vabsd_s64(__p0); | | |
| 48182 | return __ret; | | |
| 48183 | } | | |
| 48184 | #else | | |
| 48185 | __ai int64_t vabsd_s64(int64_t __p0) { | 41216 | __ai int64_t vabsd_s64(int64_t __p0) { |
| 48186 | int64_t __ret; | 41217 | int64_t __ret; |
| 48187 | __ret = (int64_t) __builtin_neon_vabsd_s64(__p0); | 41218 | __ret = (int64_t) __builtin_neon_vabsd_s64(__p0); |
| 48188 | return __ret; | 41219 | return __ret; |
| 48189 | } | 41220 | } |
| 48190 | #endif | | |
| 48191 | | | |
| 48192 | #ifdef __LITTLE_ENDIAN__ | 41221 | #ifdef __LITTLE_ENDIAN__ |
| 48193 | __ai float64x2_t vaddq_f64(float64x2_t __p0, float64x2_t __p1) { | 41222 | __ai float64x2_t vaddq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48194 | float64x2_t __ret; | 41223 | float64x2_t __ret; |
| ... | @@ -48206,48 +41235,21 @@ __ai float64x2_t vaddq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -48206,48 +41235,21 @@ __ai float64x2_t vaddq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48206 | } | 41235 | } |
| 48207 | #endif | 41236 | #endif |
| 48208 | | 41237 | |
| 48209 | #ifdef __LITTLE_ENDIAN__ | | |
| 48210 | __ai float64x1_t vadd_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48211 | float64x1_t __ret; | | |
| 48212 | __ret = __p0 + __p1; | | |
| 48213 | return __ret; | | |
| 48214 | } | | |
| 48215 | #else | | |
| 48216 | __ai float64x1_t vadd_f64(float64x1_t __p0, float64x1_t __p1) { | 41238 | __ai float64x1_t vadd_f64(float64x1_t __p0, float64x1_t __p1) { |
| 48217 | float64x1_t __ret; | 41239 | float64x1_t __ret; |
| 48218 | __ret = __p0 + __p1; | 41240 | __ret = __p0 + __p1; |
| 48219 | return __ret; | 41241 | return __ret; |
| 48220 | } | 41242 | } |
| 48221 | #endif | | |
| 48222 | | | |
| 48223 | #ifdef __LITTLE_ENDIAN__ | | |
| 48224 | __ai uint64_t vaddd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 48225 | uint64_t __ret; | | |
| 48226 | __ret = (uint64_t) __builtin_neon_vaddd_u64(__p0, __p1); | | |
| 48227 | return __ret; | | |
| 48228 | } | | |
| 48229 | #else | | |
| 48230 | __ai uint64_t vaddd_u64(uint64_t __p0, uint64_t __p1) { | 41243 | __ai uint64_t vaddd_u64(uint64_t __p0, uint64_t __p1) { |
| 48231 | uint64_t __ret; | 41244 | uint64_t __ret; |
| 48232 | __ret = (uint64_t) __builtin_neon_vaddd_u64(__p0, __p1); | 41245 | __ret = (uint64_t) __builtin_neon_vaddd_u64(__p0, __p1); |
| 48233 | return __ret; | 41246 | return __ret; |
| 48234 | } | 41247 | } |
| 48235 | #endif | | |
| 48236 | | | |
| 48237 | #ifdef __LITTLE_ENDIAN__ | | |
| 48238 | __ai int64_t vaddd_s64(int64_t __p0, int64_t __p1) { | | |
| 48239 | int64_t __ret; | | |
| 48240 | __ret = (int64_t) __builtin_neon_vaddd_s64(__p0, __p1); | | |
| 48241 | return __ret; | | |
| 48242 | } | | |
| 48243 | #else | | |
| 48244 | __ai int64_t vaddd_s64(int64_t __p0, int64_t __p1) { | 41248 | __ai int64_t vaddd_s64(int64_t __p0, int64_t __p1) { |
| 48245 | int64_t __ret; | 41249 | int64_t __ret; |
| 48246 | __ret = (int64_t) __builtin_neon_vaddd_s64(__p0, __p1); | 41250 | __ret = (int64_t) __builtin_neon_vaddd_s64(__p0, __p1); |
| 48247 | return __ret; | 41251 | return __ret; |
| 48248 | } | 41252 | } |
| 48249 | #endif | | |
| 48250 | | | |
| 48251 | #ifdef __LITTLE_ENDIAN__ | 41253 | #ifdef __LITTLE_ENDIAN__ |
| 48252 | __ai uint16x8_t vaddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 41254 | __ai uint16x8_t vaddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 48253 | uint16x8_t __ret; | 41255 | uint16x8_t __ret; |
| ... | @@ -48359,14 +41361,14 @@ __ai int8x16_t vaddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | ... | @@ -48359,14 +41361,14 @@ __ai int8x16_t vaddhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 48359 | #ifdef __LITTLE_ENDIAN__ | 41361 | #ifdef __LITTLE_ENDIAN__ |
| 48360 | __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { | 41362 | __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { |
| 48361 | uint16_t __ret; | 41363 | uint16_t __ret; |
| 48362 | __ret = (uint16_t) __builtin_neon_vaddlvq_u8((int8x16_t)__p0); | 41364 | __ret = (uint16_t) __builtin_neon_vaddlvq_u8(__p0); |
| 48363 | return __ret; | 41365 | return __ret; |
| 48364 | } | 41366 | } |
| 48365 | #else | 41367 | #else |
| 48366 | __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { | 41368 | __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { |
| 48367 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 41369 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48368 | uint16_t __ret; | 41370 | uint16_t __ret; |
| 48369 | __ret = (uint16_t) __builtin_neon_vaddlvq_u8((int8x16_t)__rev0); | 41371 | __ret = (uint16_t) __builtin_neon_vaddlvq_u8(__rev0); |
| 48370 | return __ret; | 41372 | return __ret; |
| 48371 | } | 41373 | } |
| 48372 | #endif | 41374 | #endif |
| ... | @@ -48374,14 +41376,14 @@ __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { | ... | @@ -48374,14 +41376,14 @@ __ai uint16_t vaddlvq_u8(uint8x16_t __p0) { |
| 48374 | #ifdef __LITTLE_ENDIAN__ | 41376 | #ifdef __LITTLE_ENDIAN__ |
| 48375 | __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { | 41377 | __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { |
| 48376 | uint64_t __ret; | 41378 | uint64_t __ret; |
| 48377 | __ret = (uint64_t) __builtin_neon_vaddlvq_u32((int8x16_t)__p0); | 41379 | __ret = (uint64_t) __builtin_neon_vaddlvq_u32(__p0); |
| 48378 | return __ret; | 41380 | return __ret; |
| 48379 | } | 41381 | } |
| 48380 | #else | 41382 | #else |
| 48381 | __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { | 41383 | __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { |
| 48382 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41384 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48383 | uint64_t __ret; | 41385 | uint64_t __ret; |
| 48384 | __ret = (uint64_t) __builtin_neon_vaddlvq_u32((int8x16_t)__rev0); | 41386 | __ret = (uint64_t) __builtin_neon_vaddlvq_u32(__rev0); |
| 48385 | return __ret; | 41387 | return __ret; |
| 48386 | } | 41388 | } |
| 48387 | #endif | 41389 | #endif |
| ... | @@ -48389,14 +41391,14 @@ __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { | ... | @@ -48389,14 +41391,14 @@ __ai uint64_t vaddlvq_u32(uint32x4_t __p0) { |
| 48389 | #ifdef __LITTLE_ENDIAN__ | 41391 | #ifdef __LITTLE_ENDIAN__ |
| 48390 | __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { | 41392 | __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { |
| 48391 | uint32_t __ret; | 41393 | uint32_t __ret; |
| 48392 | __ret = (uint32_t) __builtin_neon_vaddlvq_u16((int8x16_t)__p0); | 41394 | __ret = (uint32_t) __builtin_neon_vaddlvq_u16(__p0); |
| 48393 | return __ret; | 41395 | return __ret; |
| 48394 | } | 41396 | } |
| 48395 | #else | 41397 | #else |
| 48396 | __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { | 41398 | __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { |
| 48397 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41399 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48398 | uint32_t __ret; | 41400 | uint32_t __ret; |
| 48399 | __ret = (uint32_t) __builtin_neon_vaddlvq_u16((int8x16_t)__rev0); | 41401 | __ret = (uint32_t) __builtin_neon_vaddlvq_u16(__rev0); |
| 48400 | return __ret; | 41402 | return __ret; |
| 48401 | } | 41403 | } |
| 48402 | #endif | 41404 | #endif |
| ... | @@ -48404,14 +41406,14 @@ __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { | ... | @@ -48404,14 +41406,14 @@ __ai uint32_t vaddlvq_u16(uint16x8_t __p0) { |
| 48404 | #ifdef __LITTLE_ENDIAN__ | 41406 | #ifdef __LITTLE_ENDIAN__ |
| 48405 | __ai int16_t vaddlvq_s8(int8x16_t __p0) { | 41407 | __ai int16_t vaddlvq_s8(int8x16_t __p0) { |
| 48406 | int16_t __ret; | 41408 | int16_t __ret; |
| 48407 | __ret = (int16_t) __builtin_neon_vaddlvq_s8((int8x16_t)__p0); | 41409 | __ret = (int16_t) __builtin_neon_vaddlvq_s8(__p0); |
| 48408 | return __ret; | 41410 | return __ret; |
| 48409 | } | 41411 | } |
| 48410 | #else | 41412 | #else |
| 48411 | __ai int16_t vaddlvq_s8(int8x16_t __p0) { | 41413 | __ai int16_t vaddlvq_s8(int8x16_t __p0) { |
| 48412 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 41414 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48413 | int16_t __ret; | 41415 | int16_t __ret; |
| 48414 | __ret = (int16_t) __builtin_neon_vaddlvq_s8((int8x16_t)__rev0); | 41416 | __ret = (int16_t) __builtin_neon_vaddlvq_s8(__rev0); |
| 48415 | return __ret; | 41417 | return __ret; |
| 48416 | } | 41418 | } |
| 48417 | #endif | 41419 | #endif |
| ... | @@ -48419,14 +41421,14 @@ __ai int16_t vaddlvq_s8(int8x16_t __p0) { | ... | @@ -48419,14 +41421,14 @@ __ai int16_t vaddlvq_s8(int8x16_t __p0) { |
| 48419 | #ifdef __LITTLE_ENDIAN__ | 41421 | #ifdef __LITTLE_ENDIAN__ |
| 48420 | __ai int64_t vaddlvq_s32(int32x4_t __p0) { | 41422 | __ai int64_t vaddlvq_s32(int32x4_t __p0) { |
| 48421 | int64_t __ret; | 41423 | int64_t __ret; |
| 48422 | __ret = (int64_t) __builtin_neon_vaddlvq_s32((int8x16_t)__p0); | 41424 | __ret = (int64_t) __builtin_neon_vaddlvq_s32(__p0); |
| 48423 | return __ret; | 41425 | return __ret; |
| 48424 | } | 41426 | } |
| 48425 | #else | 41427 | #else |
| 48426 | __ai int64_t vaddlvq_s32(int32x4_t __p0) { | 41428 | __ai int64_t vaddlvq_s32(int32x4_t __p0) { |
| 48427 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41429 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48428 | int64_t __ret; | 41430 | int64_t __ret; |
| 48429 | __ret = (int64_t) __builtin_neon_vaddlvq_s32((int8x16_t)__rev0); | 41431 | __ret = (int64_t) __builtin_neon_vaddlvq_s32(__rev0); |
| 48430 | return __ret; | 41432 | return __ret; |
| 48431 | } | 41433 | } |
| 48432 | #endif | 41434 | #endif |
| ... | @@ -48434,14 +41436,14 @@ __ai int64_t vaddlvq_s32(int32x4_t __p0) { | ... | @@ -48434,14 +41436,14 @@ __ai int64_t vaddlvq_s32(int32x4_t __p0) { |
| 48434 | #ifdef __LITTLE_ENDIAN__ | 41436 | #ifdef __LITTLE_ENDIAN__ |
| 48435 | __ai int32_t vaddlvq_s16(int16x8_t __p0) { | 41437 | __ai int32_t vaddlvq_s16(int16x8_t __p0) { |
| 48436 | int32_t __ret; | 41438 | int32_t __ret; |
| 48437 | __ret = (int32_t) __builtin_neon_vaddlvq_s16((int8x16_t)__p0); | 41439 | __ret = (int32_t) __builtin_neon_vaddlvq_s16(__p0); |
| 48438 | return __ret; | 41440 | return __ret; |
| 48439 | } | 41441 | } |
| 48440 | #else | 41442 | #else |
| 48441 | __ai int32_t vaddlvq_s16(int16x8_t __p0) { | 41443 | __ai int32_t vaddlvq_s16(int16x8_t __p0) { |
| 48442 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41444 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48443 | int32_t __ret; | 41445 | int32_t __ret; |
| 48444 | __ret = (int32_t) __builtin_neon_vaddlvq_s16((int8x16_t)__rev0); | 41446 | __ret = (int32_t) __builtin_neon_vaddlvq_s16(__rev0); |
| 48445 | return __ret; | 41447 | return __ret; |
| 48446 | } | 41448 | } |
| 48447 | #endif | 41449 | #endif |
| ... | @@ -48449,14 +41451,14 @@ __ai int32_t vaddlvq_s16(int16x8_t __p0) { | ... | @@ -48449,14 +41451,14 @@ __ai int32_t vaddlvq_s16(int16x8_t __p0) { |
| 48449 | #ifdef __LITTLE_ENDIAN__ | 41451 | #ifdef __LITTLE_ENDIAN__ |
| 48450 | __ai uint16_t vaddlv_u8(uint8x8_t __p0) { | 41452 | __ai uint16_t vaddlv_u8(uint8x8_t __p0) { |
| 48451 | uint16_t __ret; | 41453 | uint16_t __ret; |
| 48452 | __ret = (uint16_t) __builtin_neon_vaddlv_u8((int8x8_t)__p0); | 41454 | __ret = (uint16_t) __builtin_neon_vaddlv_u8(__p0); |
| 48453 | return __ret; | 41455 | return __ret; |
| 48454 | } | 41456 | } |
| 48455 | #else | 41457 | #else |
| 48456 | __ai uint16_t vaddlv_u8(uint8x8_t __p0) { | 41458 | __ai uint16_t vaddlv_u8(uint8x8_t __p0) { |
| 48457 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41459 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48458 | uint16_t __ret; | 41460 | uint16_t __ret; |
| 48459 | __ret = (uint16_t) __builtin_neon_vaddlv_u8((int8x8_t)__rev0); | 41461 | __ret = (uint16_t) __builtin_neon_vaddlv_u8(__rev0); |
| 48460 | return __ret; | 41462 | return __ret; |
| 48461 | } | 41463 | } |
| 48462 | #endif | 41464 | #endif |
| ... | @@ -48464,14 +41466,14 @@ __ai uint16_t vaddlv_u8(uint8x8_t __p0) { | ... | @@ -48464,14 +41466,14 @@ __ai uint16_t vaddlv_u8(uint8x8_t __p0) { |
| 48464 | #ifdef __LITTLE_ENDIAN__ | 41466 | #ifdef __LITTLE_ENDIAN__ |
| 48465 | __ai uint64_t vaddlv_u32(uint32x2_t __p0) { | 41467 | __ai uint64_t vaddlv_u32(uint32x2_t __p0) { |
| 48466 | uint64_t __ret; | 41468 | uint64_t __ret; |
| 48467 | __ret = (uint64_t) __builtin_neon_vaddlv_u32((int8x8_t)__p0); | 41469 | __ret = (uint64_t) __builtin_neon_vaddlv_u32(__p0); |
| 48468 | return __ret; | 41470 | return __ret; |
| 48469 | } | 41471 | } |
| 48470 | #else | 41472 | #else |
| 48471 | __ai uint64_t vaddlv_u32(uint32x2_t __p0) { | 41473 | __ai uint64_t vaddlv_u32(uint32x2_t __p0) { |
| 48472 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41474 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48473 | uint64_t __ret; | 41475 | uint64_t __ret; |
| 48474 | __ret = (uint64_t) __builtin_neon_vaddlv_u32((int8x8_t)__rev0); | 41476 | __ret = (uint64_t) __builtin_neon_vaddlv_u32(__rev0); |
| 48475 | return __ret; | 41477 | return __ret; |
| 48476 | } | 41478 | } |
| 48477 | #endif | 41479 | #endif |
| ... | @@ -48479,14 +41481,14 @@ __ai uint64_t vaddlv_u32(uint32x2_t __p0) { | ... | @@ -48479,14 +41481,14 @@ __ai uint64_t vaddlv_u32(uint32x2_t __p0) { |
| 48479 | #ifdef __LITTLE_ENDIAN__ | 41481 | #ifdef __LITTLE_ENDIAN__ |
| 48480 | __ai uint32_t vaddlv_u16(uint16x4_t __p0) { | 41482 | __ai uint32_t vaddlv_u16(uint16x4_t __p0) { |
| 48481 | uint32_t __ret; | 41483 | uint32_t __ret; |
| 48482 | __ret = (uint32_t) __builtin_neon_vaddlv_u16((int8x8_t)__p0); | 41484 | __ret = (uint32_t) __builtin_neon_vaddlv_u16(__p0); |
| 48483 | return __ret; | 41485 | return __ret; |
| 48484 | } | 41486 | } |
| 48485 | #else | 41487 | #else |
| 48486 | __ai uint32_t vaddlv_u16(uint16x4_t __p0) { | 41488 | __ai uint32_t vaddlv_u16(uint16x4_t __p0) { |
| 48487 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41489 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48488 | uint32_t __ret; | 41490 | uint32_t __ret; |
| 48489 | __ret = (uint32_t) __builtin_neon_vaddlv_u16((int8x8_t)__rev0); | 41491 | __ret = (uint32_t) __builtin_neon_vaddlv_u16(__rev0); |
| 48490 | return __ret; | 41492 | return __ret; |
| 48491 | } | 41493 | } |
| 48492 | #endif | 41494 | #endif |
| ... | @@ -48494,14 +41496,14 @@ __ai uint32_t vaddlv_u16(uint16x4_t __p0) { | ... | @@ -48494,14 +41496,14 @@ __ai uint32_t vaddlv_u16(uint16x4_t __p0) { |
| 48494 | #ifdef __LITTLE_ENDIAN__ | 41496 | #ifdef __LITTLE_ENDIAN__ |
| 48495 | __ai int16_t vaddlv_s8(int8x8_t __p0) { | 41497 | __ai int16_t vaddlv_s8(int8x8_t __p0) { |
| 48496 | int16_t __ret; | 41498 | int16_t __ret; |
| 48497 | __ret = (int16_t) __builtin_neon_vaddlv_s8((int8x8_t)__p0); | 41499 | __ret = (int16_t) __builtin_neon_vaddlv_s8(__p0); |
| 48498 | return __ret; | 41500 | return __ret; |
| 48499 | } | 41501 | } |
| 48500 | #else | 41502 | #else |
| 48501 | __ai int16_t vaddlv_s8(int8x8_t __p0) { | 41503 | __ai int16_t vaddlv_s8(int8x8_t __p0) { |
| 48502 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41504 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48503 | int16_t __ret; | 41505 | int16_t __ret; |
| 48504 | __ret = (int16_t) __builtin_neon_vaddlv_s8((int8x8_t)__rev0); | 41506 | __ret = (int16_t) __builtin_neon_vaddlv_s8(__rev0); |
| 48505 | return __ret; | 41507 | return __ret; |
| 48506 | } | 41508 | } |
| 48507 | #endif | 41509 | #endif |
| ... | @@ -48509,14 +41511,14 @@ __ai int16_t vaddlv_s8(int8x8_t __p0) { | ... | @@ -48509,14 +41511,14 @@ __ai int16_t vaddlv_s8(int8x8_t __p0) { |
| 48509 | #ifdef __LITTLE_ENDIAN__ | 41511 | #ifdef __LITTLE_ENDIAN__ |
| 48510 | __ai int64_t vaddlv_s32(int32x2_t __p0) { | 41512 | __ai int64_t vaddlv_s32(int32x2_t __p0) { |
| 48511 | int64_t __ret; | 41513 | int64_t __ret; |
| 48512 | __ret = (int64_t) __builtin_neon_vaddlv_s32((int8x8_t)__p0); | 41514 | __ret = (int64_t) __builtin_neon_vaddlv_s32(__p0); |
| 48513 | return __ret; | 41515 | return __ret; |
| 48514 | } | 41516 | } |
| 48515 | #else | 41517 | #else |
| 48516 | __ai int64_t vaddlv_s32(int32x2_t __p0) { | 41518 | __ai int64_t vaddlv_s32(int32x2_t __p0) { |
| 48517 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41519 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48518 | int64_t __ret; | 41520 | int64_t __ret; |
| 48519 | __ret = (int64_t) __builtin_neon_vaddlv_s32((int8x8_t)__rev0); | 41521 | __ret = (int64_t) __builtin_neon_vaddlv_s32(__rev0); |
| 48520 | return __ret; | 41522 | return __ret; |
| 48521 | } | 41523 | } |
| 48522 | #endif | 41524 | #endif |
| ... | @@ -48524,14 +41526,14 @@ __ai int64_t vaddlv_s32(int32x2_t __p0) { | ... | @@ -48524,14 +41526,14 @@ __ai int64_t vaddlv_s32(int32x2_t __p0) { |
| 48524 | #ifdef __LITTLE_ENDIAN__ | 41526 | #ifdef __LITTLE_ENDIAN__ |
| 48525 | __ai int32_t vaddlv_s16(int16x4_t __p0) { | 41527 | __ai int32_t vaddlv_s16(int16x4_t __p0) { |
| 48526 | int32_t __ret; | 41528 | int32_t __ret; |
| 48527 | __ret = (int32_t) __builtin_neon_vaddlv_s16((int8x8_t)__p0); | 41529 | __ret = (int32_t) __builtin_neon_vaddlv_s16(__p0); |
| 48528 | return __ret; | 41530 | return __ret; |
| 48529 | } | 41531 | } |
| 48530 | #else | 41532 | #else |
| 48531 | __ai int32_t vaddlv_s16(int16x4_t __p0) { | 41533 | __ai int32_t vaddlv_s16(int16x4_t __p0) { |
| 48532 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41534 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48533 | int32_t __ret; | 41535 | int32_t __ret; |
| 48534 | __ret = (int32_t) __builtin_neon_vaddlv_s16((int8x8_t)__rev0); | 41536 | __ret = (int32_t) __builtin_neon_vaddlv_s16(__rev0); |
| 48535 | return __ret; | 41537 | return __ret; |
| 48536 | } | 41538 | } |
| 48537 | #endif | 41539 | #endif |
| ... | @@ -48539,14 +41541,14 @@ __ai int32_t vaddlv_s16(int16x4_t __p0) { | ... | @@ -48539,14 +41541,14 @@ __ai int32_t vaddlv_s16(int16x4_t __p0) { |
| 48539 | #ifdef __LITTLE_ENDIAN__ | 41541 | #ifdef __LITTLE_ENDIAN__ |
| 48540 | __ai uint8_t vaddvq_u8(uint8x16_t __p0) { | 41542 | __ai uint8_t vaddvq_u8(uint8x16_t __p0) { |
| 48541 | uint8_t __ret; | 41543 | uint8_t __ret; |
| 48542 | __ret = (uint8_t) __builtin_neon_vaddvq_u8((int8x16_t)__p0); | 41544 | __ret = (uint8_t) __builtin_neon_vaddvq_u8(__p0); |
| 48543 | return __ret; | 41545 | return __ret; |
| 48544 | } | 41546 | } |
| 48545 | #else | 41547 | #else |
| 48546 | __ai uint8_t vaddvq_u8(uint8x16_t __p0) { | 41548 | __ai uint8_t vaddvq_u8(uint8x16_t __p0) { |
| 48547 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 41549 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48548 | uint8_t __ret; | 41550 | uint8_t __ret; |
| 48549 | __ret = (uint8_t) __builtin_neon_vaddvq_u8((int8x16_t)__rev0); | 41551 | __ret = (uint8_t) __builtin_neon_vaddvq_u8(__rev0); |
| 48550 | return __ret; | 41552 | return __ret; |
| 48551 | } | 41553 | } |
| 48552 | #endif | 41554 | #endif |
| ... | @@ -48554,14 +41556,14 @@ __ai uint8_t vaddvq_u8(uint8x16_t __p0) { | ... | @@ -48554,14 +41556,14 @@ __ai uint8_t vaddvq_u8(uint8x16_t __p0) { |
| 48554 | #ifdef __LITTLE_ENDIAN__ | 41556 | #ifdef __LITTLE_ENDIAN__ |
| 48555 | __ai uint32_t vaddvq_u32(uint32x4_t __p0) { | 41557 | __ai uint32_t vaddvq_u32(uint32x4_t __p0) { |
| 48556 | uint32_t __ret; | 41558 | uint32_t __ret; |
| 48557 | __ret = (uint32_t) __builtin_neon_vaddvq_u32((int8x16_t)__p0); | 41559 | __ret = (uint32_t) __builtin_neon_vaddvq_u32(__p0); |
| 48558 | return __ret; | 41560 | return __ret; |
| 48559 | } | 41561 | } |
| 48560 | #else | 41562 | #else |
| 48561 | __ai uint32_t vaddvq_u32(uint32x4_t __p0) { | 41563 | __ai uint32_t vaddvq_u32(uint32x4_t __p0) { |
| 48562 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41564 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48563 | uint32_t __ret; | 41565 | uint32_t __ret; |
| 48564 | __ret = (uint32_t) __builtin_neon_vaddvq_u32((int8x16_t)__rev0); | 41566 | __ret = (uint32_t) __builtin_neon_vaddvq_u32(__rev0); |
| 48565 | return __ret; | 41567 | return __ret; |
| 48566 | } | 41568 | } |
| 48567 | #endif | 41569 | #endif |
| ... | @@ -48569,14 +41571,14 @@ __ai uint32_t vaddvq_u32(uint32x4_t __p0) { | ... | @@ -48569,14 +41571,14 @@ __ai uint32_t vaddvq_u32(uint32x4_t __p0) { |
| 48569 | #ifdef __LITTLE_ENDIAN__ | 41571 | #ifdef __LITTLE_ENDIAN__ |
| 48570 | __ai uint64_t vaddvq_u64(uint64x2_t __p0) { | 41572 | __ai uint64_t vaddvq_u64(uint64x2_t __p0) { |
| 48571 | uint64_t __ret; | 41573 | uint64_t __ret; |
| 48572 | __ret = (uint64_t) __builtin_neon_vaddvq_u64((int8x16_t)__p0); | 41574 | __ret = (uint64_t) __builtin_neon_vaddvq_u64(__p0); |
| 48573 | return __ret; | 41575 | return __ret; |
| 48574 | } | 41576 | } |
| 48575 | #else | 41577 | #else |
| 48576 | __ai uint64_t vaddvq_u64(uint64x2_t __p0) { | 41578 | __ai uint64_t vaddvq_u64(uint64x2_t __p0) { |
| 48577 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41579 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48578 | uint64_t __ret; | 41580 | uint64_t __ret; |
| 48579 | __ret = (uint64_t) __builtin_neon_vaddvq_u64((int8x16_t)__rev0); | 41581 | __ret = (uint64_t) __builtin_neon_vaddvq_u64(__rev0); |
| 48580 | return __ret; | 41582 | return __ret; |
| 48581 | } | 41583 | } |
| 48582 | #endif | 41584 | #endif |
| ... | @@ -48584,14 +41586,14 @@ __ai uint64_t vaddvq_u64(uint64x2_t __p0) { | ... | @@ -48584,14 +41586,14 @@ __ai uint64_t vaddvq_u64(uint64x2_t __p0) { |
| 48584 | #ifdef __LITTLE_ENDIAN__ | 41586 | #ifdef __LITTLE_ENDIAN__ |
| 48585 | __ai uint16_t vaddvq_u16(uint16x8_t __p0) { | 41587 | __ai uint16_t vaddvq_u16(uint16x8_t __p0) { |
| 48586 | uint16_t __ret; | 41588 | uint16_t __ret; |
| 48587 | __ret = (uint16_t) __builtin_neon_vaddvq_u16((int8x16_t)__p0); | 41589 | __ret = (uint16_t) __builtin_neon_vaddvq_u16(__p0); |
| 48588 | return __ret; | 41590 | return __ret; |
| 48589 | } | 41591 | } |
| 48590 | #else | 41592 | #else |
| 48591 | __ai uint16_t vaddvq_u16(uint16x8_t __p0) { | 41593 | __ai uint16_t vaddvq_u16(uint16x8_t __p0) { |
| 48592 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41594 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48593 | uint16_t __ret; | 41595 | uint16_t __ret; |
| 48594 | __ret = (uint16_t) __builtin_neon_vaddvq_u16((int8x16_t)__rev0); | 41596 | __ret = (uint16_t) __builtin_neon_vaddvq_u16(__rev0); |
| 48595 | return __ret; | 41597 | return __ret; |
| 48596 | } | 41598 | } |
| 48597 | #endif | 41599 | #endif |
| ... | @@ -48599,14 +41601,14 @@ __ai uint16_t vaddvq_u16(uint16x8_t __p0) { | ... | @@ -48599,14 +41601,14 @@ __ai uint16_t vaddvq_u16(uint16x8_t __p0) { |
| 48599 | #ifdef __LITTLE_ENDIAN__ | 41601 | #ifdef __LITTLE_ENDIAN__ |
| 48600 | __ai int8_t vaddvq_s8(int8x16_t __p0) { | 41602 | __ai int8_t vaddvq_s8(int8x16_t __p0) { |
| 48601 | int8_t __ret; | 41603 | int8_t __ret; |
| 48602 | __ret = (int8_t) __builtin_neon_vaddvq_s8((int8x16_t)__p0); | 41604 | __ret = (int8_t) __builtin_neon_vaddvq_s8(__p0); |
| 48603 | return __ret; | 41605 | return __ret; |
| 48604 | } | 41606 | } |
| 48605 | #else | 41607 | #else |
| 48606 | __ai int8_t vaddvq_s8(int8x16_t __p0) { | 41608 | __ai int8_t vaddvq_s8(int8x16_t __p0) { |
| 48607 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 41609 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48608 | int8_t __ret; | 41610 | int8_t __ret; |
| 48609 | __ret = (int8_t) __builtin_neon_vaddvq_s8((int8x16_t)__rev0); | 41611 | __ret = (int8_t) __builtin_neon_vaddvq_s8(__rev0); |
| 48610 | return __ret; | 41612 | return __ret; |
| 48611 | } | 41613 | } |
| 48612 | #endif | 41614 | #endif |
| ... | @@ -48614,14 +41616,14 @@ __ai int8_t vaddvq_s8(int8x16_t __p0) { | ... | @@ -48614,14 +41616,14 @@ __ai int8_t vaddvq_s8(int8x16_t __p0) { |
| 48614 | #ifdef __LITTLE_ENDIAN__ | 41616 | #ifdef __LITTLE_ENDIAN__ |
| 48615 | __ai float64_t vaddvq_f64(float64x2_t __p0) { | 41617 | __ai float64_t vaddvq_f64(float64x2_t __p0) { |
| 48616 | float64_t __ret; | 41618 | float64_t __ret; |
| 48617 | __ret = (float64_t) __builtin_neon_vaddvq_f64((int8x16_t)__p0); | 41619 | __ret = (float64_t) __builtin_neon_vaddvq_f64(__p0); |
| 48618 | return __ret; | 41620 | return __ret; |
| 48619 | } | 41621 | } |
| 48620 | #else | 41622 | #else |
| 48621 | __ai float64_t vaddvq_f64(float64x2_t __p0) { | 41623 | __ai float64_t vaddvq_f64(float64x2_t __p0) { |
| 48622 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41624 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48623 | float64_t __ret; | 41625 | float64_t __ret; |
| 48624 | __ret = (float64_t) __builtin_neon_vaddvq_f64((int8x16_t)__rev0); | 41626 | __ret = (float64_t) __builtin_neon_vaddvq_f64(__rev0); |
| 48625 | return __ret; | 41627 | return __ret; |
| 48626 | } | 41628 | } |
| 48627 | #endif | 41629 | #endif |
| ... | @@ -48629,14 +41631,14 @@ __ai float64_t vaddvq_f64(float64x2_t __p0) { | ... | @@ -48629,14 +41631,14 @@ __ai float64_t vaddvq_f64(float64x2_t __p0) { |
| 48629 | #ifdef __LITTLE_ENDIAN__ | 41631 | #ifdef __LITTLE_ENDIAN__ |
| 48630 | __ai float32_t vaddvq_f32(float32x4_t __p0) { | 41632 | __ai float32_t vaddvq_f32(float32x4_t __p0) { |
| 48631 | float32_t __ret; | 41633 | float32_t __ret; |
| 48632 | __ret = (float32_t) __builtin_neon_vaddvq_f32((int8x16_t)__p0); | 41634 | __ret = (float32_t) __builtin_neon_vaddvq_f32(__p0); |
| 48633 | return __ret; | 41635 | return __ret; |
| 48634 | } | 41636 | } |
| 48635 | #else | 41637 | #else |
| 48636 | __ai float32_t vaddvq_f32(float32x4_t __p0) { | 41638 | __ai float32_t vaddvq_f32(float32x4_t __p0) { |
| 48637 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41639 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48638 | float32_t __ret; | 41640 | float32_t __ret; |
| 48639 | __ret = (float32_t) __builtin_neon_vaddvq_f32((int8x16_t)__rev0); | 41641 | __ret = (float32_t) __builtin_neon_vaddvq_f32(__rev0); |
| 48640 | return __ret; | 41642 | return __ret; |
| 48641 | } | 41643 | } |
| 48642 | #endif | 41644 | #endif |
| ... | @@ -48644,14 +41646,14 @@ __ai float32_t vaddvq_f32(float32x4_t __p0) { | ... | @@ -48644,14 +41646,14 @@ __ai float32_t vaddvq_f32(float32x4_t __p0) { |
| 48644 | #ifdef __LITTLE_ENDIAN__ | 41646 | #ifdef __LITTLE_ENDIAN__ |
| 48645 | __ai int32_t vaddvq_s32(int32x4_t __p0) { | 41647 | __ai int32_t vaddvq_s32(int32x4_t __p0) { |
| 48646 | int32_t __ret; | 41648 | int32_t __ret; |
| 48647 | __ret = (int32_t) __builtin_neon_vaddvq_s32((int8x16_t)__p0); | 41649 | __ret = (int32_t) __builtin_neon_vaddvq_s32(__p0); |
| 48648 | return __ret; | 41650 | return __ret; |
| 48649 | } | 41651 | } |
| 48650 | #else | 41652 | #else |
| 48651 | __ai int32_t vaddvq_s32(int32x4_t __p0) { | 41653 | __ai int32_t vaddvq_s32(int32x4_t __p0) { |
| 48652 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41654 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48653 | int32_t __ret; | 41655 | int32_t __ret; |
| 48654 | __ret = (int32_t) __builtin_neon_vaddvq_s32((int8x16_t)__rev0); | 41656 | __ret = (int32_t) __builtin_neon_vaddvq_s32(__rev0); |
| 48655 | return __ret; | 41657 | return __ret; |
| 48656 | } | 41658 | } |
| 48657 | #endif | 41659 | #endif |
| ... | @@ -48659,14 +41661,14 @@ __ai int32_t vaddvq_s32(int32x4_t __p0) { | ... | @@ -48659,14 +41661,14 @@ __ai int32_t vaddvq_s32(int32x4_t __p0) { |
| 48659 | #ifdef __LITTLE_ENDIAN__ | 41661 | #ifdef __LITTLE_ENDIAN__ |
| 48660 | __ai int64_t vaddvq_s64(int64x2_t __p0) { | 41662 | __ai int64_t vaddvq_s64(int64x2_t __p0) { |
| 48661 | int64_t __ret; | 41663 | int64_t __ret; |
| 48662 | __ret = (int64_t) __builtin_neon_vaddvq_s64((int8x16_t)__p0); | 41664 | __ret = (int64_t) __builtin_neon_vaddvq_s64(__p0); |
| 48663 | return __ret; | 41665 | return __ret; |
| 48664 | } | 41666 | } |
| 48665 | #else | 41667 | #else |
| 48666 | __ai int64_t vaddvq_s64(int64x2_t __p0) { | 41668 | __ai int64_t vaddvq_s64(int64x2_t __p0) { |
| 48667 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41669 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48668 | int64_t __ret; | 41670 | int64_t __ret; |
| 48669 | __ret = (int64_t) __builtin_neon_vaddvq_s64((int8x16_t)__rev0); | 41671 | __ret = (int64_t) __builtin_neon_vaddvq_s64(__rev0); |
| 48670 | return __ret; | 41672 | return __ret; |
| 48671 | } | 41673 | } |
| 48672 | #endif | 41674 | #endif |
| ... | @@ -48674,14 +41676,14 @@ __ai int64_t vaddvq_s64(int64x2_t __p0) { | ... | @@ -48674,14 +41676,14 @@ __ai int64_t vaddvq_s64(int64x2_t __p0) { |
| 48674 | #ifdef __LITTLE_ENDIAN__ | 41676 | #ifdef __LITTLE_ENDIAN__ |
| 48675 | __ai int16_t vaddvq_s16(int16x8_t __p0) { | 41677 | __ai int16_t vaddvq_s16(int16x8_t __p0) { |
| 48676 | int16_t __ret; | 41678 | int16_t __ret; |
| 48677 | __ret = (int16_t) __builtin_neon_vaddvq_s16((int8x16_t)__p0); | 41679 | __ret = (int16_t) __builtin_neon_vaddvq_s16(__p0); |
| 48678 | return __ret; | 41680 | return __ret; |
| 48679 | } | 41681 | } |
| 48680 | #else | 41682 | #else |
| 48681 | __ai int16_t vaddvq_s16(int16x8_t __p0) { | 41683 | __ai int16_t vaddvq_s16(int16x8_t __p0) { |
| 48682 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41684 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48683 | int16_t __ret; | 41685 | int16_t __ret; |
| 48684 | __ret = (int16_t) __builtin_neon_vaddvq_s16((int8x16_t)__rev0); | 41686 | __ret = (int16_t) __builtin_neon_vaddvq_s16(__rev0); |
| 48685 | return __ret; | 41687 | return __ret; |
| 48686 | } | 41688 | } |
| 48687 | #endif | 41689 | #endif |
| ... | @@ -48689,14 +41691,14 @@ __ai int16_t vaddvq_s16(int16x8_t __p0) { | ... | @@ -48689,14 +41691,14 @@ __ai int16_t vaddvq_s16(int16x8_t __p0) { |
| 48689 | #ifdef __LITTLE_ENDIAN__ | 41691 | #ifdef __LITTLE_ENDIAN__ |
| 48690 | __ai uint8_t vaddv_u8(uint8x8_t __p0) { | 41692 | __ai uint8_t vaddv_u8(uint8x8_t __p0) { |
| 48691 | uint8_t __ret; | 41693 | uint8_t __ret; |
| 48692 | __ret = (uint8_t) __builtin_neon_vaddv_u8((int8x8_t)__p0); | 41694 | __ret = (uint8_t) __builtin_neon_vaddv_u8(__p0); |
| 48693 | return __ret; | 41695 | return __ret; |
| 48694 | } | 41696 | } |
| 48695 | #else | 41697 | #else |
| 48696 | __ai uint8_t vaddv_u8(uint8x8_t __p0) { | 41698 | __ai uint8_t vaddv_u8(uint8x8_t __p0) { |
| 48697 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41699 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48698 | uint8_t __ret; | 41700 | uint8_t __ret; |
| 48699 | __ret = (uint8_t) __builtin_neon_vaddv_u8((int8x8_t)__rev0); | 41701 | __ret = (uint8_t) __builtin_neon_vaddv_u8(__rev0); |
| 48700 | return __ret; | 41702 | return __ret; |
| 48701 | } | 41703 | } |
| 48702 | #endif | 41704 | #endif |
| ... | @@ -48704,14 +41706,14 @@ __ai uint8_t vaddv_u8(uint8x8_t __p0) { | ... | @@ -48704,14 +41706,14 @@ __ai uint8_t vaddv_u8(uint8x8_t __p0) { |
| 48704 | #ifdef __LITTLE_ENDIAN__ | 41706 | #ifdef __LITTLE_ENDIAN__ |
| 48705 | __ai uint32_t vaddv_u32(uint32x2_t __p0) { | 41707 | __ai uint32_t vaddv_u32(uint32x2_t __p0) { |
| 48706 | uint32_t __ret; | 41708 | uint32_t __ret; |
| 48707 | __ret = (uint32_t) __builtin_neon_vaddv_u32((int8x8_t)__p0); | 41709 | __ret = (uint32_t) __builtin_neon_vaddv_u32(__p0); |
| 48708 | return __ret; | 41710 | return __ret; |
| 48709 | } | 41711 | } |
| 48710 | #else | 41712 | #else |
| 48711 | __ai uint32_t vaddv_u32(uint32x2_t __p0) { | 41713 | __ai uint32_t vaddv_u32(uint32x2_t __p0) { |
| 48712 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41714 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48713 | uint32_t __ret; | 41715 | uint32_t __ret; |
| 48714 | __ret = (uint32_t) __builtin_neon_vaddv_u32((int8x8_t)__rev0); | 41716 | __ret = (uint32_t) __builtin_neon_vaddv_u32(__rev0); |
| 48715 | return __ret; | 41717 | return __ret; |
| 48716 | } | 41718 | } |
| 48717 | #endif | 41719 | #endif |
| ... | @@ -48719,14 +41721,14 @@ __ai uint32_t vaddv_u32(uint32x2_t __p0) { | ... | @@ -48719,14 +41721,14 @@ __ai uint32_t vaddv_u32(uint32x2_t __p0) { |
| 48719 | #ifdef __LITTLE_ENDIAN__ | 41721 | #ifdef __LITTLE_ENDIAN__ |
| 48720 | __ai uint16_t vaddv_u16(uint16x4_t __p0) { | 41722 | __ai uint16_t vaddv_u16(uint16x4_t __p0) { |
| 48721 | uint16_t __ret; | 41723 | uint16_t __ret; |
| 48722 | __ret = (uint16_t) __builtin_neon_vaddv_u16((int8x8_t)__p0); | 41724 | __ret = (uint16_t) __builtin_neon_vaddv_u16(__p0); |
| 48723 | return __ret; | 41725 | return __ret; |
| 48724 | } | 41726 | } |
| 48725 | #else | 41727 | #else |
| 48726 | __ai uint16_t vaddv_u16(uint16x4_t __p0) { | 41728 | __ai uint16_t vaddv_u16(uint16x4_t __p0) { |
| 48727 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41729 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48728 | uint16_t __ret; | 41730 | uint16_t __ret; |
| 48729 | __ret = (uint16_t) __builtin_neon_vaddv_u16((int8x8_t)__rev0); | 41731 | __ret = (uint16_t) __builtin_neon_vaddv_u16(__rev0); |
| 48730 | return __ret; | 41732 | return __ret; |
| 48731 | } | 41733 | } |
| 48732 | #endif | 41734 | #endif |
| ... | @@ -48734,14 +41736,14 @@ __ai uint16_t vaddv_u16(uint16x4_t __p0) { | ... | @@ -48734,14 +41736,14 @@ __ai uint16_t vaddv_u16(uint16x4_t __p0) { |
| 48734 | #ifdef __LITTLE_ENDIAN__ | 41736 | #ifdef __LITTLE_ENDIAN__ |
| 48735 | __ai int8_t vaddv_s8(int8x8_t __p0) { | 41737 | __ai int8_t vaddv_s8(int8x8_t __p0) { |
| 48736 | int8_t __ret; | 41738 | int8_t __ret; |
| 48737 | __ret = (int8_t) __builtin_neon_vaddv_s8((int8x8_t)__p0); | 41739 | __ret = (int8_t) __builtin_neon_vaddv_s8(__p0); |
| 48738 | return __ret; | 41740 | return __ret; |
| 48739 | } | 41741 | } |
| 48740 | #else | 41742 | #else |
| 48741 | __ai int8_t vaddv_s8(int8x8_t __p0) { | 41743 | __ai int8_t vaddv_s8(int8x8_t __p0) { |
| 48742 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 41744 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 48743 | int8_t __ret; | 41745 | int8_t __ret; |
| 48744 | __ret = (int8_t) __builtin_neon_vaddv_s8((int8x8_t)__rev0); | 41746 | __ret = (int8_t) __builtin_neon_vaddv_s8(__rev0); |
| 48745 | return __ret; | 41747 | return __ret; |
| 48746 | } | 41748 | } |
| 48747 | #endif | 41749 | #endif |
| ... | @@ -48749,14 +41751,14 @@ __ai int8_t vaddv_s8(int8x8_t __p0) { | ... | @@ -48749,14 +41751,14 @@ __ai int8_t vaddv_s8(int8x8_t __p0) { |
| 48749 | #ifdef __LITTLE_ENDIAN__ | 41751 | #ifdef __LITTLE_ENDIAN__ |
| 48750 | __ai float32_t vaddv_f32(float32x2_t __p0) { | 41752 | __ai float32_t vaddv_f32(float32x2_t __p0) { |
| 48751 | float32_t __ret; | 41753 | float32_t __ret; |
| 48752 | __ret = (float32_t) __builtin_neon_vaddv_f32((int8x8_t)__p0); | 41754 | __ret = (float32_t) __builtin_neon_vaddv_f32(__p0); |
| 48753 | return __ret; | 41755 | return __ret; |
| 48754 | } | 41756 | } |
| 48755 | #else | 41757 | #else |
| 48756 | __ai float32_t vaddv_f32(float32x2_t __p0) { | 41758 | __ai float32_t vaddv_f32(float32x2_t __p0) { |
| 48757 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41759 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48758 | float32_t __ret; | 41760 | float32_t __ret; |
| 48759 | __ret = (float32_t) __builtin_neon_vaddv_f32((int8x8_t)__rev0); | 41761 | __ret = (float32_t) __builtin_neon_vaddv_f32(__rev0); |
| 48760 | return __ret; | 41762 | return __ret; |
| 48761 | } | 41763 | } |
| 48762 | #endif | 41764 | #endif |
| ... | @@ -48764,14 +41766,14 @@ __ai float32_t vaddv_f32(float32x2_t __p0) { | ... | @@ -48764,14 +41766,14 @@ __ai float32_t vaddv_f32(float32x2_t __p0) { |
| 48764 | #ifdef __LITTLE_ENDIAN__ | 41766 | #ifdef __LITTLE_ENDIAN__ |
| 48765 | __ai int32_t vaddv_s32(int32x2_t __p0) { | 41767 | __ai int32_t vaddv_s32(int32x2_t __p0) { |
| 48766 | int32_t __ret; | 41768 | int32_t __ret; |
| 48767 | __ret = (int32_t) __builtin_neon_vaddv_s32((int8x8_t)__p0); | 41769 | __ret = (int32_t) __builtin_neon_vaddv_s32(__p0); |
| 48768 | return __ret; | 41770 | return __ret; |
| 48769 | } | 41771 | } |
| 48770 | #else | 41772 | #else |
| 48771 | __ai int32_t vaddv_s32(int32x2_t __p0) { | 41773 | __ai int32_t vaddv_s32(int32x2_t __p0) { |
| 48772 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 41774 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 48773 | int32_t __ret; | 41775 | int32_t __ret; |
| 48774 | __ret = (int32_t) __builtin_neon_vaddv_s32((int8x8_t)__rev0); | 41776 | __ret = (int32_t) __builtin_neon_vaddv_s32(__rev0); |
| 48775 | return __ret; | 41777 | return __ret; |
| 48776 | } | 41778 | } |
| 48777 | #endif | 41779 | #endif |
| ... | @@ -48779,32 +41781,23 @@ __ai int32_t vaddv_s32(int32x2_t __p0) { | ... | @@ -48779,32 +41781,23 @@ __ai int32_t vaddv_s32(int32x2_t __p0) { |
| 48779 | #ifdef __LITTLE_ENDIAN__ | 41781 | #ifdef __LITTLE_ENDIAN__ |
| 48780 | __ai int16_t vaddv_s16(int16x4_t __p0) { | 41782 | __ai int16_t vaddv_s16(int16x4_t __p0) { |
| 48781 | int16_t __ret; | 41783 | int16_t __ret; |
| 48782 | __ret = (int16_t) __builtin_neon_vaddv_s16((int8x8_t)__p0); | 41784 | __ret = (int16_t) __builtin_neon_vaddv_s16(__p0); |
| 48783 | return __ret; | 41785 | return __ret; |
| 48784 | } | 41786 | } |
| 48785 | #else | 41787 | #else |
| 48786 | __ai int16_t vaddv_s16(int16x4_t __p0) { | 41788 | __ai int16_t vaddv_s16(int16x4_t __p0) { |
| 48787 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 41789 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 48788 | int16_t __ret; | 41790 | int16_t __ret; |
| 48789 | __ret = (int16_t) __builtin_neon_vaddv_s16((int8x8_t)__rev0); | 41791 | __ret = (int16_t) __builtin_neon_vaddv_s16(__rev0); |
| 48790 | return __ret; | 41792 | return __ret; |
| 48791 | } | 41793 | } |
| 48792 | #endif | 41794 | #endif |
| 48793 | | 41795 | |
| 48794 | #ifdef __LITTLE_ENDIAN__ | | |
| 48795 | __ai poly64x1_t vbsl_p64(uint64x1_t __p0, poly64x1_t __p1, poly64x1_t __p2) { | 41796 | __ai poly64x1_t vbsl_p64(uint64x1_t __p0, poly64x1_t __p1, poly64x1_t __p2) { |
| 48796 | poly64x1_t __ret; | 41797 | poly64x1_t __ret; |
| 48797 | __ret = (poly64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 6); | 41798 | __ret = (poly64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 6); |
| 48798 | return __ret; | 41799 | return __ret; |
| 48799 | } | 41800 | } |
| 48800 | #else | | |
| 48801 | __ai poly64x1_t vbsl_p64(uint64x1_t __p0, poly64x1_t __p1, poly64x1_t __p2) { | | |
| 48802 | poly64x1_t __ret; | | |
| 48803 | __ret = (poly64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 6); | | |
| 48804 | return __ret; | | |
| 48805 | } | | |
| 48806 | #endif | | |
| 48807 | | | |
| 48808 | #ifdef __LITTLE_ENDIAN__ | 41801 | #ifdef __LITTLE_ENDIAN__ |
| 48809 | __ai poly64x2_t vbslq_p64(uint64x2_t __p0, poly64x2_t __p1, poly64x2_t __p2) { | 41802 | __ai poly64x2_t vbslq_p64(uint64x2_t __p0, poly64x2_t __p1, poly64x2_t __p2) { |
| 48810 | poly64x2_t __ret; | 41803 | poly64x2_t __ret; |
| ... | @@ -48841,20 +41834,11 @@ __ai float64x2_t vbslq_f64(uint64x2_t __p0, float64x2_t __p1, float64x2_t __p2) | ... | @@ -48841,20 +41834,11 @@ __ai float64x2_t vbslq_f64(uint64x2_t __p0, float64x2_t __p1, float64x2_t __p2) |
| 48841 | } | 41834 | } |
| 48842 | #endif | 41835 | #endif |
| 48843 | | 41836 | |
| 48844 | #ifdef __LITTLE_ENDIAN__ | | |
| 48845 | __ai float64x1_t vbsl_f64(uint64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 41837 | __ai float64x1_t vbsl_f64(uint64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 48846 | float64x1_t __ret; | 41838 | float64x1_t __ret; |
| 48847 | __ret = (float64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | 41839 | __ret = (float64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 48848 | return __ret; | 41840 | return __ret; |
| 48849 | } | 41841 | } |
| 48850 | #else | | |
| 48851 | __ai float64x1_t vbsl_f64(uint64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | | |
| 48852 | float64x1_t __ret; | | |
| 48853 | __ret = (float64x1_t) __builtin_neon_vbsl_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | | |
| 48854 | return __ret; | | |
| 48855 | } | | |
| 48856 | #endif | | |
| 48857 | | | |
| 48858 | #ifdef __LITTLE_ENDIAN__ | 41842 | #ifdef __LITTLE_ENDIAN__ |
| 48859 | __ai uint64x2_t vcageq_f64(float64x2_t __p0, float64x2_t __p1) { | 41843 | __ai uint64x2_t vcageq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48860 | uint64x2_t __ret; | 41844 | uint64x2_t __ret; |
| ... | @@ -48872,48 +41856,21 @@ __ai uint64x2_t vcageq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -48872,48 +41856,21 @@ __ai uint64x2_t vcageq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48872 | } | 41856 | } |
| 48873 | #endif | 41857 | #endif |
| 48874 | | 41858 | |
| 48875 | #ifdef __LITTLE_ENDIAN__ | | |
| 48876 | __ai uint64x1_t vcage_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48877 | uint64x1_t __ret; | | |
| 48878 | __ret = (uint64x1_t) __builtin_neon_vcage_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 48879 | return __ret; | | |
| 48880 | } | | |
| 48881 | #else | | |
| 48882 | __ai uint64x1_t vcage_f64(float64x1_t __p0, float64x1_t __p1) { | 41859 | __ai uint64x1_t vcage_f64(float64x1_t __p0, float64x1_t __p1) { |
| 48883 | uint64x1_t __ret; | 41860 | uint64x1_t __ret; |
| 48884 | __ret = (uint64x1_t) __builtin_neon_vcage_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 41861 | __ret = (uint64x1_t) __builtin_neon_vcage_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 48885 | return __ret; | 41862 | return __ret; |
| 48886 | } | 41863 | } |
| 48887 | #endif | | |
| 48888 | | | |
| 48889 | #ifdef __LITTLE_ENDIAN__ | | |
| 48890 | __ai uint64_t vcaged_f64(float64_t __p0, float64_t __p1) { | | |
| 48891 | uint64_t __ret; | | |
| 48892 | __ret = (uint64_t) __builtin_neon_vcaged_f64(__p0, __p1); | | |
| 48893 | return __ret; | | |
| 48894 | } | | |
| 48895 | #else | | |
| 48896 | __ai uint64_t vcaged_f64(float64_t __p0, float64_t __p1) { | 41864 | __ai uint64_t vcaged_f64(float64_t __p0, float64_t __p1) { |
| 48897 | uint64_t __ret; | 41865 | uint64_t __ret; |
| 48898 | __ret = (uint64_t) __builtin_neon_vcaged_f64(__p0, __p1); | 41866 | __ret = (uint64_t) __builtin_neon_vcaged_f64(__p0, __p1); |
| 48899 | return __ret; | 41867 | return __ret; |
| 48900 | } | 41868 | } |
| 48901 | #endif | | |
| 48902 | | | |
| 48903 | #ifdef __LITTLE_ENDIAN__ | | |
| 48904 | __ai uint32_t vcages_f32(float32_t __p0, float32_t __p1) { | | |
| 48905 | uint32_t __ret; | | |
| 48906 | __ret = (uint32_t) __builtin_neon_vcages_f32(__p0, __p1); | | |
| 48907 | return __ret; | | |
| 48908 | } | | |
| 48909 | #else | | |
| 48910 | __ai uint32_t vcages_f32(float32_t __p0, float32_t __p1) { | 41869 | __ai uint32_t vcages_f32(float32_t __p0, float32_t __p1) { |
| 48911 | uint32_t __ret; | 41870 | uint32_t __ret; |
| 48912 | __ret = (uint32_t) __builtin_neon_vcages_f32(__p0, __p1); | 41871 | __ret = (uint32_t) __builtin_neon_vcages_f32(__p0, __p1); |
| 48913 | return __ret; | 41872 | return __ret; |
| 48914 | } | 41873 | } |
| 48915 | #endif | | |
| 48916 | | | |
| 48917 | #ifdef __LITTLE_ENDIAN__ | 41874 | #ifdef __LITTLE_ENDIAN__ |
| 48918 | __ai uint64x2_t vcagtq_f64(float64x2_t __p0, float64x2_t __p1) { | 41875 | __ai uint64x2_t vcagtq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48919 | uint64x2_t __ret; | 41876 | uint64x2_t __ret; |
| ... | @@ -48931,48 +41888,21 @@ __ai uint64x2_t vcagtq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -48931,48 +41888,21 @@ __ai uint64x2_t vcagtq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48931 | } | 41888 | } |
| 48932 | #endif | 41889 | #endif |
| 48933 | | 41890 | |
| 48934 | #ifdef __LITTLE_ENDIAN__ | | |
| 48935 | __ai uint64x1_t vcagt_f64(float64x1_t __p0, float64x1_t __p1) { | 41891 | __ai uint64x1_t vcagt_f64(float64x1_t __p0, float64x1_t __p1) { |
| 48936 | uint64x1_t __ret; | 41892 | uint64x1_t __ret; |
| 48937 | __ret = (uint64x1_t) __builtin_neon_vcagt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 41893 | __ret = (uint64x1_t) __builtin_neon_vcagt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 48938 | return __ret; | 41894 | return __ret; |
| 48939 | } | 41895 | } |
| 48940 | #else | | |
| 48941 | __ai uint64x1_t vcagt_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 48942 | uint64x1_t __ret; | | |
| 48943 | __ret = (uint64x1_t) __builtin_neon_vcagt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 48944 | return __ret; | | |
| 48945 | } | | |
| 48946 | #endif | | |
| 48947 | | | |
| 48948 | #ifdef __LITTLE_ENDIAN__ | | |
| 48949 | __ai uint64_t vcagtd_f64(float64_t __p0, float64_t __p1) { | 41896 | __ai uint64_t vcagtd_f64(float64_t __p0, float64_t __p1) { |
| 48950 | uint64_t __ret; | 41897 | uint64_t __ret; |
| 48951 | __ret = (uint64_t) __builtin_neon_vcagtd_f64(__p0, __p1); | 41898 | __ret = (uint64_t) __builtin_neon_vcagtd_f64(__p0, __p1); |
| 48952 | return __ret; | 41899 | return __ret; |
| 48953 | } | 41900 | } |
| 48954 | #else | | |
| 48955 | __ai uint64_t vcagtd_f64(float64_t __p0, float64_t __p1) { | | |
| 48956 | uint64_t __ret; | | |
| 48957 | __ret = (uint64_t) __builtin_neon_vcagtd_f64(__p0, __p1); | | |
| 48958 | return __ret; | | |
| 48959 | } | | |
| 48960 | #endif | | |
| 48961 | | | |
| 48962 | #ifdef __LITTLE_ENDIAN__ | | |
| 48963 | __ai uint32_t vcagts_f32(float32_t __p0, float32_t __p1) { | | |
| 48964 | uint32_t __ret; | | |
| 48965 | __ret = (uint32_t) __builtin_neon_vcagts_f32(__p0, __p1); | | |
| 48966 | return __ret; | | |
| 48967 | } | | |
| 48968 | #else | | |
| 48969 | __ai uint32_t vcagts_f32(float32_t __p0, float32_t __p1) { | 41901 | __ai uint32_t vcagts_f32(float32_t __p0, float32_t __p1) { |
| 48970 | uint32_t __ret; | 41902 | uint32_t __ret; |
| 48971 | __ret = (uint32_t) __builtin_neon_vcagts_f32(__p0, __p1); | 41903 | __ret = (uint32_t) __builtin_neon_vcagts_f32(__p0, __p1); |
| 48972 | return __ret; | 41904 | return __ret; |
| 48973 | } | 41905 | } |
| 48974 | #endif | | |
| 48975 | | | |
| 48976 | #ifdef __LITTLE_ENDIAN__ | 41906 | #ifdef __LITTLE_ENDIAN__ |
| 48977 | __ai uint64x2_t vcaleq_f64(float64x2_t __p0, float64x2_t __p1) { | 41907 | __ai uint64x2_t vcaleq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48978 | uint64x2_t __ret; | 41908 | uint64x2_t __ret; |
| ... | @@ -48990,48 +41920,21 @@ __ai uint64x2_t vcaleq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -48990,48 +41920,21 @@ __ai uint64x2_t vcaleq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 48990 | } | 41920 | } |
| 48991 | #endif | 41921 | #endif |
| 48992 | | 41922 | |
| 48993 | #ifdef __LITTLE_ENDIAN__ | | |
| 48994 | __ai uint64x1_t vcale_f64(float64x1_t __p0, float64x1_t __p1) { | 41923 | __ai uint64x1_t vcale_f64(float64x1_t __p0, float64x1_t __p1) { |
| 48995 | uint64x1_t __ret; | 41924 | uint64x1_t __ret; |
| 48996 | __ret = (uint64x1_t) __builtin_neon_vcale_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 41925 | __ret = (uint64x1_t) __builtin_neon_vcale_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 48997 | return __ret; | 41926 | return __ret; |
| 48998 | } | 41927 | } |
| 48999 | #else | | |
| 49000 | __ai uint64x1_t vcale_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 49001 | uint64x1_t __ret; | | |
| 49002 | __ret = (uint64x1_t) __builtin_neon_vcale_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 49003 | return __ret; | | |
| 49004 | } | | |
| 49005 | #endif | | |
| 49006 | | | |
| 49007 | #ifdef __LITTLE_ENDIAN__ | | |
| 49008 | __ai uint64_t vcaled_f64(float64_t __p0, float64_t __p1) { | 41928 | __ai uint64_t vcaled_f64(float64_t __p0, float64_t __p1) { |
| 49009 | uint64_t __ret; | 41929 | uint64_t __ret; |
| 49010 | __ret = (uint64_t) __builtin_neon_vcaled_f64(__p0, __p1); | 41930 | __ret = (uint64_t) __builtin_neon_vcaled_f64(__p0, __p1); |
| 49011 | return __ret; | 41931 | return __ret; |
| 49012 | } | 41932 | } |
| 49013 | #else | | |
| 49014 | __ai uint64_t vcaled_f64(float64_t __p0, float64_t __p1) { | | |
| 49015 | uint64_t __ret; | | |
| 49016 | __ret = (uint64_t) __builtin_neon_vcaled_f64(__p0, __p1); | | |
| 49017 | return __ret; | | |
| 49018 | } | | |
| 49019 | #endif | | |
| 49020 | | | |
| 49021 | #ifdef __LITTLE_ENDIAN__ | | |
| 49022 | __ai uint32_t vcales_f32(float32_t __p0, float32_t __p1) { | 41933 | __ai uint32_t vcales_f32(float32_t __p0, float32_t __p1) { |
| 49023 | uint32_t __ret; | 41934 | uint32_t __ret; |
| 49024 | __ret = (uint32_t) __builtin_neon_vcales_f32(__p0, __p1); | 41935 | __ret = (uint32_t) __builtin_neon_vcales_f32(__p0, __p1); |
| 49025 | return __ret; | 41936 | return __ret; |
| 49026 | } | 41937 | } |
| 49027 | #else | | |
| 49028 | __ai uint32_t vcales_f32(float32_t __p0, float32_t __p1) { | | |
| 49029 | uint32_t __ret; | | |
| 49030 | __ret = (uint32_t) __builtin_neon_vcales_f32(__p0, __p1); | | |
| 49031 | return __ret; | | |
| 49032 | } | | |
| 49033 | #endif | | |
| 49034 | | | |
| 49035 | #ifdef __LITTLE_ENDIAN__ | 41938 | #ifdef __LITTLE_ENDIAN__ |
| 49036 | __ai uint64x2_t vcaltq_f64(float64x2_t __p0, float64x2_t __p1) { | 41939 | __ai uint64x2_t vcaltq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 49037 | uint64x2_t __ret; | 41940 | uint64x2_t __ret; |
| ... | @@ -49049,62 +41952,26 @@ __ai uint64x2_t vcaltq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -49049,62 +41952,26 @@ __ai uint64x2_t vcaltq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 49049 | } | 41952 | } |
| 49050 | #endif | 41953 | #endif |
| 49051 | | 41954 | |
| 49052 | #ifdef __LITTLE_ENDIAN__ | | |
| 49053 | __ai uint64x1_t vcalt_f64(float64x1_t __p0, float64x1_t __p1) { | 41955 | __ai uint64x1_t vcalt_f64(float64x1_t __p0, float64x1_t __p1) { |
| 49054 | uint64x1_t __ret; | 41956 | uint64x1_t __ret; |
| 49055 | __ret = (uint64x1_t) __builtin_neon_vcalt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 41957 | __ret = (uint64x1_t) __builtin_neon_vcalt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 49056 | return __ret; | 41958 | return __ret; |
| 49057 | } | 41959 | } |
| 49058 | #else | | |
| 49059 | __ai uint64x1_t vcalt_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 49060 | uint64x1_t __ret; | | |
| 49061 | __ret = (uint64x1_t) __builtin_neon_vcalt_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 49062 | return __ret; | | |
| 49063 | } | | |
| 49064 | #endif | | |
| 49065 | | | |
| 49066 | #ifdef __LITTLE_ENDIAN__ | | |
| 49067 | __ai uint64_t vcaltd_f64(float64_t __p0, float64_t __p1) { | | |
| 49068 | uint64_t __ret; | | |
| 49069 | __ret = (uint64_t) __builtin_neon_vcaltd_f64(__p0, __p1); | | |
| 49070 | return __ret; | | |
| 49071 | } | | |
| 49072 | #else | | |
| 49073 | __ai uint64_t vcaltd_f64(float64_t __p0, float64_t __p1) { | 41960 | __ai uint64_t vcaltd_f64(float64_t __p0, float64_t __p1) { |
| 49074 | uint64_t __ret; | 41961 | uint64_t __ret; |
| 49075 | __ret = (uint64_t) __builtin_neon_vcaltd_f64(__p0, __p1); | 41962 | __ret = (uint64_t) __builtin_neon_vcaltd_f64(__p0, __p1); |
| 49076 | return __ret; | 41963 | return __ret; |
| 49077 | } | 41964 | } |
| 49078 | #endif | | |
| 49079 | | | |
| 49080 | #ifdef __LITTLE_ENDIAN__ | | |
| 49081 | __ai uint32_t vcalts_f32(float32_t __p0, float32_t __p1) { | | |
| 49082 | uint32_t __ret; | | |
| 49083 | __ret = (uint32_t) __builtin_neon_vcalts_f32(__p0, __p1); | | |
| 49084 | return __ret; | | |
| 49085 | } | | |
| 49086 | #else | | |
| 49087 | __ai uint32_t vcalts_f32(float32_t __p0, float32_t __p1) { | 41965 | __ai uint32_t vcalts_f32(float32_t __p0, float32_t __p1) { |
| 49088 | uint32_t __ret; | 41966 | uint32_t __ret; |
| 49089 | __ret = (uint32_t) __builtin_neon_vcalts_f32(__p0, __p1); | 41967 | __ret = (uint32_t) __builtin_neon_vcalts_f32(__p0, __p1); |
| 49090 | return __ret; | 41968 | return __ret; |
| 49091 | } | 41969 | } |
| 49092 | #endif | | |
| 49093 | | | |
| 49094 | #ifdef __LITTLE_ENDIAN__ | | |
| 49095 | __ai uint64x1_t vceq_p64(poly64x1_t __p0, poly64x1_t __p1) { | | |
| 49096 | uint64x1_t __ret; | | |
| 49097 | __ret = (uint64x1_t)(__p0 == __p1); | | |
| 49098 | return __ret; | | |
| 49099 | } | | |
| 49100 | #else | | |
| 49101 | __ai uint64x1_t vceq_p64(poly64x1_t __p0, poly64x1_t __p1) { | 41970 | __ai uint64x1_t vceq_p64(poly64x1_t __p0, poly64x1_t __p1) { |
| 49102 | uint64x1_t __ret; | 41971 | uint64x1_t __ret; |
| 49103 | __ret = (uint64x1_t)(__p0 == __p1); | 41972 | __ret = (uint64x1_t)(__p0 == __p1); |
| 49104 | return __ret; | 41973 | return __ret; |
| 49105 | } | 41974 | } |
| 49106 | #endif | | |
| 49107 | | | |
| 49108 | #ifdef __LITTLE_ENDIAN__ | 41975 | #ifdef __LITTLE_ENDIAN__ |
| 49109 | __ai uint64x2_t vceqq_p64(poly64x2_t __p0, poly64x2_t __p1) { | 41976 | __ai uint64x2_t vceqq_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 49110 | uint64x2_t __ret; | 41977 | uint64x2_t __ret; |
| ... | @@ -49173,104 +42040,41 @@ __ai uint64x2_t vceqq_s64(int64x2_t __p0, int64x2_t __p1) { | ... | @@ -49173,104 +42040,41 @@ __ai uint64x2_t vceqq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 49173 | } | 42040 | } |
| 49174 | #endif | 42041 | #endif |
| 49175 | | 42042 | |
| 49176 | #ifdef __LITTLE_ENDIAN__ | | |
| 49177 | __ai uint64x1_t vceq_u64(uint64x1_t __p0, uint64x1_t __p1) { | 42043 | __ai uint64x1_t vceq_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 49178 | uint64x1_t __ret; | 42044 | uint64x1_t __ret; |
| 49179 | __ret = (uint64x1_t)(__p0 == __p1); | 42045 | __ret = (uint64x1_t)(__p0 == __p1); |
| 49180 | return __ret; | 42046 | return __ret; |
| 49181 | } | 42047 | } |
| 49182 | #else | | |
| 49183 | __ai uint64x1_t vceq_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 49184 | uint64x1_t __ret; | | |
| 49185 | __ret = (uint64x1_t)(__p0 == __p1); | | |
| 49186 | return __ret; | | |
| 49187 | } | | |
| 49188 | #endif | | |
| 49189 | | | |
| 49190 | #ifdef __LITTLE_ENDIAN__ | | |
| 49191 | __ai uint64x1_t vceq_f64(float64x1_t __p0, float64x1_t __p1) { | 42048 | __ai uint64x1_t vceq_f64(float64x1_t __p0, float64x1_t __p1) { |
| 49192 | uint64x1_t __ret; | 42049 | uint64x1_t __ret; |
| 49193 | __ret = (uint64x1_t)(__p0 == __p1); | 42050 | __ret = (uint64x1_t)(__p0 == __p1); |
| 49194 | return __ret; | 42051 | return __ret; |
| 49195 | } | 42052 | } |
| 49196 | #else | | |
| 49197 | __ai uint64x1_t vceq_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 49198 | uint64x1_t __ret; | | |
| 49199 | __ret = (uint64x1_t)(__p0 == __p1); | | |
| 49200 | return __ret; | | |
| 49201 | } | | |
| 49202 | #endif | | |
| 49203 | | | |
| 49204 | #ifdef __LITTLE_ENDIAN__ | | |
| 49205 | __ai uint64x1_t vceq_s64(int64x1_t __p0, int64x1_t __p1) { | 42053 | __ai uint64x1_t vceq_s64(int64x1_t __p0, int64x1_t __p1) { |
| 49206 | uint64x1_t __ret; | 42054 | uint64x1_t __ret; |
| 49207 | __ret = (uint64x1_t)(__p0 == __p1); | 42055 | __ret = (uint64x1_t)(__p0 == __p1); |
| 49208 | return __ret; | 42056 | return __ret; |
| 49209 | } | 42057 | } |
| 49210 | #else | | |
| 49211 | __ai uint64x1_t vceq_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 49212 | uint64x1_t __ret; | | |
| 49213 | __ret = (uint64x1_t)(__p0 == __p1); | | |
| 49214 | return __ret; | | |
| 49215 | } | | |
| 49216 | #endif | | |
| 49217 | | | |
| 49218 | #ifdef __LITTLE_ENDIAN__ | | |
| 49219 | __ai uint64_t vceqd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 49220 | uint64_t __ret; | | |
| 49221 | __ret = (uint64_t) __builtin_neon_vceqd_u64(__p0, __p1); | | |
| 49222 | return __ret; | | |
| 49223 | } | | |
| 49224 | #else | | |
| 49225 | __ai uint64_t vceqd_u64(uint64_t __p0, uint64_t __p1) { | 42058 | __ai uint64_t vceqd_u64(uint64_t __p0, uint64_t __p1) { |
| 49226 | uint64_t __ret; | 42059 | uint64_t __ret; |
| 49227 | __ret = (uint64_t) __builtin_neon_vceqd_u64(__p0, __p1); | 42060 | __ret = (uint64_t) __builtin_neon_vceqd_u64(__p0, __p1); |
| 49228 | return __ret; | 42061 | return __ret; |
| 49229 | } | 42062 | } |
| 49230 | #endif | | |
| 49231 | | | |
| 49232 | #ifdef __LITTLE_ENDIAN__ | | |
| 49233 | __ai int64_t vceqd_s64(int64_t __p0, int64_t __p1) { | 42063 | __ai int64_t vceqd_s64(int64_t __p0, int64_t __p1) { |
| 49234 | int64_t __ret; | 42064 | int64_t __ret; |
| 49235 | __ret = (int64_t) __builtin_neon_vceqd_s64(__p0, __p1); | 42065 | __ret = (int64_t) __builtin_neon_vceqd_s64(__p0, __p1); |
| 49236 | return __ret; | 42066 | return __ret; |
| 49237 | } | 42067 | } |
| 49238 | #else | | |
| 49239 | __ai int64_t vceqd_s64(int64_t __p0, int64_t __p1) { | | |
| 49240 | int64_t __ret; | | |
| 49241 | __ret = (int64_t) __builtin_neon_vceqd_s64(__p0, __p1); | | |
| 49242 | return __ret; | | |
| 49243 | } | | |
| 49244 | #endif | | |
| 49245 | | | |
| 49246 | #ifdef __LITTLE_ENDIAN__ | | |
| 49247 | __ai uint64_t vceqd_f64(float64_t __p0, float64_t __p1) { | 42068 | __ai uint64_t vceqd_f64(float64_t __p0, float64_t __p1) { |
| 49248 | uint64_t __ret; | 42069 | uint64_t __ret; |
| 49249 | __ret = (uint64_t) __builtin_neon_vceqd_f64(__p0, __p1); | 42070 | __ret = (uint64_t) __builtin_neon_vceqd_f64(__p0, __p1); |
| 49250 | return __ret; | 42071 | return __ret; |
| 49251 | } | 42072 | } |
| 49252 | #else | | |
| 49253 | __ai uint64_t vceqd_f64(float64_t __p0, float64_t __p1) { | | |
| 49254 | uint64_t __ret; | | |
| 49255 | __ret = (uint64_t) __builtin_neon_vceqd_f64(__p0, __p1); | | |
| 49256 | return __ret; | | |
| 49257 | } | | |
| 49258 | #endif | | |
| 49259 | | | |
| 49260 | #ifdef __LITTLE_ENDIAN__ | | |
| 49261 | __ai uint32_t vceqs_f32(float32_t __p0, float32_t __p1) { | | |
| 49262 | uint32_t __ret; | | |
| 49263 | __ret = (uint32_t) __builtin_neon_vceqs_f32(__p0, __p1); | | |
| 49264 | return __ret; | | |
| 49265 | } | | |
| 49266 | #else | | |
| 49267 | __ai uint32_t vceqs_f32(float32_t __p0, float32_t __p1) { | 42073 | __ai uint32_t vceqs_f32(float32_t __p0, float32_t __p1) { |
| 49268 | uint32_t __ret; | 42074 | uint32_t __ret; |
| 49269 | __ret = (uint32_t) __builtin_neon_vceqs_f32(__p0, __p1); | 42075 | __ret = (uint32_t) __builtin_neon_vceqs_f32(__p0, __p1); |
| 49270 | return __ret; | 42076 | return __ret; |
| 49271 | } | 42077 | } |
| 49272 | #endif | | |
| 49273 | | | |
| 49274 | #ifdef __LITTLE_ENDIAN__ | 42078 | #ifdef __LITTLE_ENDIAN__ |
| 49275 | __ai uint8x8_t vceqz_p8(poly8x8_t __p0) { | 42079 | __ai uint8x8_t vceqz_p8(poly8x8_t __p0) { |
| 49276 | uint8x8_t __ret; | 42080 | uint8x8_t __ret; |
| ... | @@ -49287,20 +42091,11 @@ __ai uint8x8_t vceqz_p8(poly8x8_t __p0) { | ... | @@ -49287,20 +42091,11 @@ __ai uint8x8_t vceqz_p8(poly8x8_t __p0) { |
| 49287 | } | 42091 | } |
| 49288 | #endif | 42092 | #endif |
| 49289 | | 42093 | |
| 49290 | #ifdef __LITTLE_ENDIAN__ | | |
| 49291 | __ai uint64x1_t vceqz_p64(poly64x1_t __p0) { | | |
| 49292 | uint64x1_t __ret; | | |
| 49293 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | | |
| 49294 | return __ret; | | |
| 49295 | } | | |
| 49296 | #else | | |
| 49297 | __ai uint64x1_t vceqz_p64(poly64x1_t __p0) { | 42094 | __ai uint64x1_t vceqz_p64(poly64x1_t __p0) { |
| 49298 | uint64x1_t __ret; | 42095 | uint64x1_t __ret; |
| 49299 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | 42096 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); |
| 49300 | return __ret; | 42097 | return __ret; |
| 49301 | } | 42098 | } |
| 49302 | #endif | | |
| 49303 | | | |
| 49304 | #ifdef __LITTLE_ENDIAN__ | 42099 | #ifdef __LITTLE_ENDIAN__ |
| 49305 | __ai uint16x4_t vceqz_p16(poly16x4_t __p0) { | 42100 | __ai uint16x4_t vceqz_p16(poly16x4_t __p0) { |
| 49306 | uint16x4_t __ret; | 42101 | uint16x4_t __ret; |
| ... | @@ -49557,20 +42352,11 @@ __ai uint32x2_t vceqz_u32(uint32x2_t __p0) { | ... | @@ -49557,20 +42352,11 @@ __ai uint32x2_t vceqz_u32(uint32x2_t __p0) { |
| 49557 | } | 42352 | } |
| 49558 | #endif | 42353 | #endif |
| 49559 | | 42354 | |
| 49560 | #ifdef __LITTLE_ENDIAN__ | | |
| 49561 | __ai uint64x1_t vceqz_u64(uint64x1_t __p0) { | | |
| 49562 | uint64x1_t __ret; | | |
| 49563 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | | |
| 49564 | return __ret; | | |
| 49565 | } | | |
| 49566 | #else | | |
| 49567 | __ai uint64x1_t vceqz_u64(uint64x1_t __p0) { | 42355 | __ai uint64x1_t vceqz_u64(uint64x1_t __p0) { |
| 49568 | uint64x1_t __ret; | 42356 | uint64x1_t __ret; |
| 49569 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | 42357 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); |
| 49570 | return __ret; | 42358 | return __ret; |
| 49571 | } | 42359 | } |
| 49572 | #endif | | |
| 49573 | | | |
| 49574 | #ifdef __LITTLE_ENDIAN__ | 42360 | #ifdef __LITTLE_ENDIAN__ |
| 49575 | __ai uint16x4_t vceqz_u16(uint16x4_t __p0) { | 42361 | __ai uint16x4_t vceqz_u16(uint16x4_t __p0) { |
| 49576 | uint16x4_t __ret; | 42362 | uint16x4_t __ret; |
| ... | @@ -49603,20 +42389,11 @@ __ai uint8x8_t vceqz_s8(int8x8_t __p0) { | ... | @@ -49603,20 +42389,11 @@ __ai uint8x8_t vceqz_s8(int8x8_t __p0) { |
| 49603 | } | 42389 | } |
| 49604 | #endif | 42390 | #endif |
| 49605 | | 42391 | |
| 49606 | #ifdef __LITTLE_ENDIAN__ | | |
| 49607 | __ai uint64x1_t vceqz_f64(float64x1_t __p0) { | 42392 | __ai uint64x1_t vceqz_f64(float64x1_t __p0) { |
| 49608 | uint64x1_t __ret; | 42393 | uint64x1_t __ret; |
| 49609 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | 42394 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); |
| 49610 | return __ret; | 42395 | return __ret; |
| 49611 | } | 42396 | } |
| 49612 | #else | | |
| 49613 | __ai uint64x1_t vceqz_f64(float64x1_t __p0) { | | |
| 49614 | uint64x1_t __ret; | | |
| 49615 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | | |
| 49616 | return __ret; | | |
| 49617 | } | | |
| 49618 | #endif | | |
| 49619 | | | |
| 49620 | #ifdef __LITTLE_ENDIAN__ | 42397 | #ifdef __LITTLE_ENDIAN__ |
| 49621 | __ai uint32x2_t vceqz_f32(float32x2_t __p0) { | 42398 | __ai uint32x2_t vceqz_f32(float32x2_t __p0) { |
| 49622 | uint32x2_t __ret; | 42399 | uint32x2_t __ret; |
| ... | @@ -49649,20 +42426,11 @@ __ai uint32x2_t vceqz_s32(int32x2_t __p0) { | ... | @@ -49649,20 +42426,11 @@ __ai uint32x2_t vceqz_s32(int32x2_t __p0) { |
| 49649 | } | 42426 | } |
| 49650 | #endif | 42427 | #endif |
| 49651 | | 42428 | |
| 49652 | #ifdef __LITTLE_ENDIAN__ | | |
| 49653 | __ai uint64x1_t vceqz_s64(int64x1_t __p0) { | | |
| 49654 | uint64x1_t __ret; | | |
| 49655 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | | |
| 49656 | return __ret; | | |
| 49657 | } | | |
| 49658 | #else | | |
| 49659 | __ai uint64x1_t vceqz_s64(int64x1_t __p0) { | 42429 | __ai uint64x1_t vceqz_s64(int64x1_t __p0) { |
| 49660 | uint64x1_t __ret; | 42430 | uint64x1_t __ret; |
| 49661 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); | 42431 | __ret = (uint64x1_t) __builtin_neon_vceqz_v((int8x8_t)__p0, 19); |
| 49662 | return __ret; | 42432 | return __ret; |
| 49663 | } | 42433 | } |
| 49664 | #endif | | |
| 49665 | | | |
| 49666 | #ifdef __LITTLE_ENDIAN__ | 42434 | #ifdef __LITTLE_ENDIAN__ |
| 49667 | __ai uint16x4_t vceqz_s16(int16x4_t __p0) { | 42435 | __ai uint16x4_t vceqz_s16(int16x4_t __p0) { |
| 49668 | uint16x4_t __ret; | 42436 | uint16x4_t __ret; |
| ... | @@ -49679,62 +42447,26 @@ __ai uint16x4_t vceqz_s16(int16x4_t __p0) { | ... | @@ -49679,62 +42447,26 @@ __ai uint16x4_t vceqz_s16(int16x4_t __p0) { |
| 49679 | } | 42447 | } |
| 49680 | #endif | 42448 | #endif |
| 49681 | | 42449 | |
| 49682 | #ifdef __LITTLE_ENDIAN__ | | |
| 49683 | __ai uint64_t vceqzd_u64(uint64_t __p0) { | 42450 | __ai uint64_t vceqzd_u64(uint64_t __p0) { |
| 49684 | uint64_t __ret; | 42451 | uint64_t __ret; |
| 49685 | __ret = (uint64_t) __builtin_neon_vceqzd_u64(__p0); | 42452 | __ret = (uint64_t) __builtin_neon_vceqzd_u64(__p0); |
| 49686 | return __ret; | 42453 | return __ret; |
| 49687 | } | 42454 | } |
| 49688 | #else | | |
| 49689 | __ai uint64_t vceqzd_u64(uint64_t __p0) { | | |
| 49690 | uint64_t __ret; | | |
| 49691 | __ret = (uint64_t) __builtin_neon_vceqzd_u64(__p0); | | |
| 49692 | return __ret; | | |
| 49693 | } | | |
| 49694 | #endif | | |
| 49695 | | | |
| 49696 | #ifdef __LITTLE_ENDIAN__ | | |
| 49697 | __ai int64_t vceqzd_s64(int64_t __p0) { | | |
| 49698 | int64_t __ret; | | |
| 49699 | __ret = (int64_t) __builtin_neon_vceqzd_s64(__p0); | | |
| 49700 | return __ret; | | |
| 49701 | } | | |
| 49702 | #else | | |
| 49703 | __ai int64_t vceqzd_s64(int64_t __p0) { | 42455 | __ai int64_t vceqzd_s64(int64_t __p0) { |
| 49704 | int64_t __ret; | 42456 | int64_t __ret; |
| 49705 | __ret = (int64_t) __builtin_neon_vceqzd_s64(__p0); | 42457 | __ret = (int64_t) __builtin_neon_vceqzd_s64(__p0); |
| 49706 | return __ret; | 42458 | return __ret; |
| 49707 | } | 42459 | } |
| 49708 | #endif | | |
| 49709 | | | |
| 49710 | #ifdef __LITTLE_ENDIAN__ | | |
| 49711 | __ai uint64_t vceqzd_f64(float64_t __p0) { | | |
| 49712 | uint64_t __ret; | | |
| 49713 | __ret = (uint64_t) __builtin_neon_vceqzd_f64(__p0); | | |
| 49714 | return __ret; | | |
| 49715 | } | | |
| 49716 | #else | | |
| 49717 | __ai uint64_t vceqzd_f64(float64_t __p0) { | 42460 | __ai uint64_t vceqzd_f64(float64_t __p0) { |
| 49718 | uint64_t __ret; | 42461 | uint64_t __ret; |
| 49719 | __ret = (uint64_t) __builtin_neon_vceqzd_f64(__p0); | 42462 | __ret = (uint64_t) __builtin_neon_vceqzd_f64(__p0); |
| 49720 | return __ret; | 42463 | return __ret; |
| 49721 | } | 42464 | } |
| 49722 | #endif | | |
| 49723 | | | |
| 49724 | #ifdef __LITTLE_ENDIAN__ | | |
| 49725 | __ai uint32_t vceqzs_f32(float32_t __p0) { | | |
| 49726 | uint32_t __ret; | | |
| 49727 | __ret = (uint32_t) __builtin_neon_vceqzs_f32(__p0); | | |
| 49728 | return __ret; | | |
| 49729 | } | | |
| 49730 | #else | | |
| 49731 | __ai uint32_t vceqzs_f32(float32_t __p0) { | 42465 | __ai uint32_t vceqzs_f32(float32_t __p0) { |
| 49732 | uint32_t __ret; | 42466 | uint32_t __ret; |
| 49733 | __ret = (uint32_t) __builtin_neon_vceqzs_f32(__p0); | 42467 | __ret = (uint32_t) __builtin_neon_vceqzs_f32(__p0); |
| 49734 | return __ret; | 42468 | return __ret; |
| 49735 | } | 42469 | } |
| 49736 | #endif | | |
| 49737 | | | |
| 49738 | #ifdef __LITTLE_ENDIAN__ | 42470 | #ifdef __LITTLE_ENDIAN__ |
| 49739 | __ai uint64x2_t vcgeq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 42471 | __ai uint64x2_t vcgeq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 49740 | uint64x2_t __ret; | 42472 | uint64x2_t __ret; |
| ... | @@ -49786,104 +42518,41 @@ __ai uint64x2_t vcgeq_s64(int64x2_t __p0, int64x2_t __p1) { | ... | @@ -49786,104 +42518,41 @@ __ai uint64x2_t vcgeq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 49786 | } | 42518 | } |
| 49787 | #endif | 42519 | #endif |
| 49788 | | 42520 | |
| 49789 | #ifdef __LITTLE_ENDIAN__ | | |
| 49790 | __ai uint64x1_t vcge_u64(uint64x1_t __p0, uint64x1_t __p1) { | 42521 | __ai uint64x1_t vcge_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 49791 | uint64x1_t __ret; | 42522 | uint64x1_t __ret; |
| 49792 | __ret = (uint64x1_t)(__p0 >= __p1); | 42523 | __ret = (uint64x1_t)(__p0 >= __p1); |
| 49793 | return __ret; | 42524 | return __ret; |
| 49794 | } | 42525 | } |
| 49795 | #else | | |
| 49796 | __ai uint64x1_t vcge_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 49797 | uint64x1_t __ret; | | |
| 49798 | __ret = (uint64x1_t)(__p0 >= __p1); | | |
| 49799 | return __ret; | | |
| 49800 | } | | |
| 49801 | #endif | | |
| 49802 | | | |
| 49803 | #ifdef __LITTLE_ENDIAN__ | | |
| 49804 | __ai uint64x1_t vcge_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 49805 | uint64x1_t __ret; | | |
| 49806 | __ret = (uint64x1_t)(__p0 >= __p1); | | |
| 49807 | return __ret; | | |
| 49808 | } | | |
| 49809 | #else | | |
| 49810 | __ai uint64x1_t vcge_f64(float64x1_t __p0, float64x1_t __p1) { | 42526 | __ai uint64x1_t vcge_f64(float64x1_t __p0, float64x1_t __p1) { |
| 49811 | uint64x1_t __ret; | 42527 | uint64x1_t __ret; |
| 49812 | __ret = (uint64x1_t)(__p0 >= __p1); | 42528 | __ret = (uint64x1_t)(__p0 >= __p1); |
| 49813 | return __ret; | 42529 | return __ret; |
| 49814 | } | 42530 | } |
| 49815 | #endif | | |
| 49816 | | | |
| 49817 | #ifdef __LITTLE_ENDIAN__ | | |
| 49818 | __ai uint64x1_t vcge_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 49819 | uint64x1_t __ret; | | |
| 49820 | __ret = (uint64x1_t)(__p0 >= __p1); | | |
| 49821 | return __ret; | | |
| 49822 | } | | |
| 49823 | #else | | |
| 49824 | __ai uint64x1_t vcge_s64(int64x1_t __p0, int64x1_t __p1) { | 42531 | __ai uint64x1_t vcge_s64(int64x1_t __p0, int64x1_t __p1) { |
| 49825 | uint64x1_t __ret; | 42532 | uint64x1_t __ret; |
| 49826 | __ret = (uint64x1_t)(__p0 >= __p1); | 42533 | __ret = (uint64x1_t)(__p0 >= __p1); |
| 49827 | return __ret; | 42534 | return __ret; |
| 49828 | } | 42535 | } |
| 49829 | #endif | | |
| 49830 | | | |
| 49831 | #ifdef __LITTLE_ENDIAN__ | | |
| 49832 | __ai int64_t vcged_s64(int64_t __p0, int64_t __p1) { | | |
| 49833 | int64_t __ret; | | |
| 49834 | __ret = (int64_t) __builtin_neon_vcged_s64(__p0, __p1); | | |
| 49835 | return __ret; | | |
| 49836 | } | | |
| 49837 | #else | | |
| 49838 | __ai int64_t vcged_s64(int64_t __p0, int64_t __p1) { | 42536 | __ai int64_t vcged_s64(int64_t __p0, int64_t __p1) { |
| 49839 | int64_t __ret; | 42537 | int64_t __ret; |
| 49840 | __ret = (int64_t) __builtin_neon_vcged_s64(__p0, __p1); | 42538 | __ret = (int64_t) __builtin_neon_vcged_s64(__p0, __p1); |
| 49841 | return __ret; | 42539 | return __ret; |
| 49842 | } | 42540 | } |
| 49843 | #endif | | |
| 49844 | | | |
| 49845 | #ifdef __LITTLE_ENDIAN__ | | |
| 49846 | __ai uint64_t vcged_u64(uint64_t __p0, uint64_t __p1) { | | |
| 49847 | uint64_t __ret; | | |
| 49848 | __ret = (uint64_t) __builtin_neon_vcged_u64(__p0, __p1); | | |
| 49849 | return __ret; | | |
| 49850 | } | | |
| 49851 | #else | | |
| 49852 | __ai uint64_t vcged_u64(uint64_t __p0, uint64_t __p1) { | 42541 | __ai uint64_t vcged_u64(uint64_t __p0, uint64_t __p1) { |
| 49853 | uint64_t __ret; | 42542 | uint64_t __ret; |
| 49854 | __ret = (uint64_t) __builtin_neon_vcged_u64(__p0, __p1); | 42543 | __ret = (uint64_t) __builtin_neon_vcged_u64(__p0, __p1); |
| 49855 | return __ret; | 42544 | return __ret; |
| 49856 | } | 42545 | } |
| 49857 | #endif | | |
| 49858 | | | |
| 49859 | #ifdef __LITTLE_ENDIAN__ | | |
| 49860 | __ai uint64_t vcged_f64(float64_t __p0, float64_t __p1) { | | |
| 49861 | uint64_t __ret; | | |
| 49862 | __ret = (uint64_t) __builtin_neon_vcged_f64(__p0, __p1); | | |
| 49863 | return __ret; | | |
| 49864 | } | | |
| 49865 | #else | | |
| 49866 | __ai uint64_t vcged_f64(float64_t __p0, float64_t __p1) { | 42546 | __ai uint64_t vcged_f64(float64_t __p0, float64_t __p1) { |
| 49867 | uint64_t __ret; | 42547 | uint64_t __ret; |
| 49868 | __ret = (uint64_t) __builtin_neon_vcged_f64(__p0, __p1); | 42548 | __ret = (uint64_t) __builtin_neon_vcged_f64(__p0, __p1); |
| 49869 | return __ret; | 42549 | return __ret; |
| 49870 | } | 42550 | } |
| 49871 | #endif | | |
| 49872 | | | |
| 49873 | #ifdef __LITTLE_ENDIAN__ | | |
| 49874 | __ai uint32_t vcges_f32(float32_t __p0, float32_t __p1) { | | |
| 49875 | uint32_t __ret; | | |
| 49876 | __ret = (uint32_t) __builtin_neon_vcges_f32(__p0, __p1); | | |
| 49877 | return __ret; | | |
| 49878 | } | | |
| 49879 | #else | | |
| 49880 | __ai uint32_t vcges_f32(float32_t __p0, float32_t __p1) { | 42551 | __ai uint32_t vcges_f32(float32_t __p0, float32_t __p1) { |
| 49881 | uint32_t __ret; | 42552 | uint32_t __ret; |
| 49882 | __ret = (uint32_t) __builtin_neon_vcges_f32(__p0, __p1); | 42553 | __ret = (uint32_t) __builtin_neon_vcges_f32(__p0, __p1); |
| 49883 | return __ret; | 42554 | return __ret; |
| 49884 | } | 42555 | } |
| 49885 | #endif | | |
| 49886 | | | |
| 49887 | #ifdef __LITTLE_ENDIAN__ | 42556 | #ifdef __LITTLE_ENDIAN__ |
| 49888 | __ai uint8x16_t vcgezq_s8(int8x16_t __p0) { | 42557 | __ai uint8x16_t vcgezq_s8(int8x16_t __p0) { |
| 49889 | uint8x16_t __ret; | 42558 | uint8x16_t __ret; |
| ... | @@ -49996,20 +42665,11 @@ __ai uint8x8_t vcgez_s8(int8x8_t __p0) { | ... | @@ -49996,20 +42665,11 @@ __ai uint8x8_t vcgez_s8(int8x8_t __p0) { |
| 49996 | } | 42665 | } |
| 49997 | #endif | 42666 | #endif |
| 49998 | | 42667 | |
| 49999 | #ifdef __LITTLE_ENDIAN__ | | |
| 50000 | __ai uint64x1_t vcgez_f64(float64x1_t __p0) { | 42668 | __ai uint64x1_t vcgez_f64(float64x1_t __p0) { |
| 50001 | uint64x1_t __ret; | 42669 | uint64x1_t __ret; |
| 50002 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); | 42670 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); |
| 50003 | return __ret; | 42671 | return __ret; |
| 50004 | } | 42672 | } |
| 50005 | #else | | |
| 50006 | __ai uint64x1_t vcgez_f64(float64x1_t __p0) { | | |
| 50007 | uint64x1_t __ret; | | |
| 50008 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); | | |
| 50009 | return __ret; | | |
| 50010 | } | | |
| 50011 | #endif | | |
| 50012 | | | |
| 50013 | #ifdef __LITTLE_ENDIAN__ | 42673 | #ifdef __LITTLE_ENDIAN__ |
| 50014 | __ai uint32x2_t vcgez_f32(float32x2_t __p0) { | 42674 | __ai uint32x2_t vcgez_f32(float32x2_t __p0) { |
| 50015 | uint32x2_t __ret; | 42675 | uint32x2_t __ret; |
| ... | @@ -50042,20 +42702,11 @@ __ai uint32x2_t vcgez_s32(int32x2_t __p0) { | ... | @@ -50042,20 +42702,11 @@ __ai uint32x2_t vcgez_s32(int32x2_t __p0) { |
| 50042 | } | 42702 | } |
| 50043 | #endif | 42703 | #endif |
| 50044 | | 42704 | |
| 50045 | #ifdef __LITTLE_ENDIAN__ | | |
| 50046 | __ai uint64x1_t vcgez_s64(int64x1_t __p0) { | 42705 | __ai uint64x1_t vcgez_s64(int64x1_t __p0) { |
| 50047 | uint64x1_t __ret; | 42706 | uint64x1_t __ret; |
| 50048 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); | 42707 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); |
| 50049 | return __ret; | 42708 | return __ret; |
| 50050 | } | 42709 | } |
| 50051 | #else | | |
| 50052 | __ai uint64x1_t vcgez_s64(int64x1_t __p0) { | | |
| 50053 | uint64x1_t __ret; | | |
| 50054 | __ret = (uint64x1_t) __builtin_neon_vcgez_v((int8x8_t)__p0, 19); | | |
| 50055 | return __ret; | | |
| 50056 | } | | |
| 50057 | #endif | | |
| 50058 | | | |
| 50059 | #ifdef __LITTLE_ENDIAN__ | 42710 | #ifdef __LITTLE_ENDIAN__ |
| 50060 | __ai uint16x4_t vcgez_s16(int16x4_t __p0) { | 42711 | __ai uint16x4_t vcgez_s16(int16x4_t __p0) { |
| 50061 | uint16x4_t __ret; | 42712 | uint16x4_t __ret; |
| ... | @@ -50072,48 +42723,21 @@ __ai uint16x4_t vcgez_s16(int16x4_t __p0) { | ... | @@ -50072,48 +42723,21 @@ __ai uint16x4_t vcgez_s16(int16x4_t __p0) { |
| 50072 | } | 42723 | } |
| 50073 | #endif | 42724 | #endif |
| 50074 | | 42725 | |
| 50075 | #ifdef __LITTLE_ENDIAN__ | | |
| 50076 | __ai int64_t vcgezd_s64(int64_t __p0) { | 42726 | __ai int64_t vcgezd_s64(int64_t __p0) { |
| 50077 | int64_t __ret; | 42727 | int64_t __ret; |
| 50078 | __ret = (int64_t) __builtin_neon_vcgezd_s64(__p0); | 42728 | __ret = (int64_t) __builtin_neon_vcgezd_s64(__p0); |
| 50079 | return __ret; | 42729 | return __ret; |
| 50080 | } | 42730 | } |
| 50081 | #else | | |
| 50082 | __ai int64_t vcgezd_s64(int64_t __p0) { | | |
| 50083 | int64_t __ret; | | |
| 50084 | __ret = (int64_t) __builtin_neon_vcgezd_s64(__p0); | | |
| 50085 | return __ret; | | |
| 50086 | } | | |
| 50087 | #endif | | |
| 50088 | | | |
| 50089 | #ifdef __LITTLE_ENDIAN__ | | |
| 50090 | __ai uint64_t vcgezd_f64(float64_t __p0) { | | |
| 50091 | uint64_t __ret; | | |
| 50092 | __ret = (uint64_t) __builtin_neon_vcgezd_f64(__p0); | | |
| 50093 | return __ret; | | |
| 50094 | } | | |
| 50095 | #else | | |
| 50096 | __ai uint64_t vcgezd_f64(float64_t __p0) { | 42731 | __ai uint64_t vcgezd_f64(float64_t __p0) { |
| 50097 | uint64_t __ret; | 42732 | uint64_t __ret; |
| 50098 | __ret = (uint64_t) __builtin_neon_vcgezd_f64(__p0); | 42733 | __ret = (uint64_t) __builtin_neon_vcgezd_f64(__p0); |
| 50099 | return __ret; | 42734 | return __ret; |
| 50100 | } | 42735 | } |
| 50101 | #endif | | |
| 50102 | | | |
| 50103 | #ifdef __LITTLE_ENDIAN__ | | |
| 50104 | __ai uint32_t vcgezs_f32(float32_t __p0) { | | |
| 50105 | uint32_t __ret; | | |
| 50106 | __ret = (uint32_t) __builtin_neon_vcgezs_f32(__p0); | | |
| 50107 | return __ret; | | |
| 50108 | } | | |
| 50109 | #else | | |
| 50110 | __ai uint32_t vcgezs_f32(float32_t __p0) { | 42736 | __ai uint32_t vcgezs_f32(float32_t __p0) { |
| 50111 | uint32_t __ret; | 42737 | uint32_t __ret; |
| 50112 | __ret = (uint32_t) __builtin_neon_vcgezs_f32(__p0); | 42738 | __ret = (uint32_t) __builtin_neon_vcgezs_f32(__p0); |
| 50113 | return __ret; | 42739 | return __ret; |
| 50114 | } | 42740 | } |
| 50115 | #endif | | |
| 50116 | | | |
| 50117 | #ifdef __LITTLE_ENDIAN__ | 42741 | #ifdef __LITTLE_ENDIAN__ |
| 50118 | __ai uint64x2_t vcgtq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 42742 | __ai uint64x2_t vcgtq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 50119 | uint64x2_t __ret; | 42743 | uint64x2_t __ret; |
| ... | @@ -50165,104 +42789,41 @@ __ai uint64x2_t vcgtq_s64(int64x2_t __p0, int64x2_t __p1) { | ... | @@ -50165,104 +42789,41 @@ __ai uint64x2_t vcgtq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 50165 | } | 42789 | } |
| 50166 | #endif | 42790 | #endif |
| 50167 | | 42791 | |
| 50168 | #ifdef __LITTLE_ENDIAN__ | | |
| 50169 | __ai uint64x1_t vcgt_u64(uint64x1_t __p0, uint64x1_t __p1) { | 42792 | __ai uint64x1_t vcgt_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 50170 | uint64x1_t __ret; | 42793 | uint64x1_t __ret; |
| 50171 | __ret = (uint64x1_t)(__p0 > __p1); | 42794 | __ret = (uint64x1_t)(__p0 > __p1); |
| 50172 | return __ret; | 42795 | return __ret; |
| 50173 | } | 42796 | } |
| 50174 | #else | | |
| 50175 | __ai uint64x1_t vcgt_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 50176 | uint64x1_t __ret; | | |
| 50177 | __ret = (uint64x1_t)(__p0 > __p1); | | |
| 50178 | return __ret; | | |
| 50179 | } | | |
| 50180 | #endif | | |
| 50181 | | | |
| 50182 | #ifdef __LITTLE_ENDIAN__ | | |
| 50183 | __ai uint64x1_t vcgt_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 50184 | uint64x1_t __ret; | | |
| 50185 | __ret = (uint64x1_t)(__p0 > __p1); | | |
| 50186 | return __ret; | | |
| 50187 | } | | |
| 50188 | #else | | |
| 50189 | __ai uint64x1_t vcgt_f64(float64x1_t __p0, float64x1_t __p1) { | 42797 | __ai uint64x1_t vcgt_f64(float64x1_t __p0, float64x1_t __p1) { |
| 50190 | uint64x1_t __ret; | 42798 | uint64x1_t __ret; |
| 50191 | __ret = (uint64x1_t)(__p0 > __p1); | 42799 | __ret = (uint64x1_t)(__p0 > __p1); |
| 50192 | return __ret; | 42800 | return __ret; |
| 50193 | } | 42801 | } |
| 50194 | #endif | | |
| 50195 | | | |
| 50196 | #ifdef __LITTLE_ENDIAN__ | | |
| 50197 | __ai uint64x1_t vcgt_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 50198 | uint64x1_t __ret; | | |
| 50199 | __ret = (uint64x1_t)(__p0 > __p1); | | |
| 50200 | return __ret; | | |
| 50201 | } | | |
| 50202 | #else | | |
| 50203 | __ai uint64x1_t vcgt_s64(int64x1_t __p0, int64x1_t __p1) { | 42802 | __ai uint64x1_t vcgt_s64(int64x1_t __p0, int64x1_t __p1) { |
| 50204 | uint64x1_t __ret; | 42803 | uint64x1_t __ret; |
| 50205 | __ret = (uint64x1_t)(__p0 > __p1); | 42804 | __ret = (uint64x1_t)(__p0 > __p1); |
| 50206 | return __ret; | 42805 | return __ret; |
| 50207 | } | 42806 | } |
| 50208 | #endif | | |
| 50209 | | | |
| 50210 | #ifdef __LITTLE_ENDIAN__ | | |
| 50211 | __ai int64_t vcgtd_s64(int64_t __p0, int64_t __p1) { | | |
| 50212 | int64_t __ret; | | |
| 50213 | __ret = (int64_t) __builtin_neon_vcgtd_s64(__p0, __p1); | | |
| 50214 | return __ret; | | |
| 50215 | } | | |
| 50216 | #else | | |
| 50217 | __ai int64_t vcgtd_s64(int64_t __p0, int64_t __p1) { | 42807 | __ai int64_t vcgtd_s64(int64_t __p0, int64_t __p1) { |
| 50218 | int64_t __ret; | 42808 | int64_t __ret; |
| 50219 | __ret = (int64_t) __builtin_neon_vcgtd_s64(__p0, __p1); | 42809 | __ret = (int64_t) __builtin_neon_vcgtd_s64(__p0, __p1); |
| 50220 | return __ret; | 42810 | return __ret; |
| 50221 | } | 42811 | } |
| 50222 | #endif | | |
| 50223 | | | |
| 50224 | #ifdef __LITTLE_ENDIAN__ | | |
| 50225 | __ai uint64_t vcgtd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 50226 | uint64_t __ret; | | |
| 50227 | __ret = (uint64_t) __builtin_neon_vcgtd_u64(__p0, __p1); | | |
| 50228 | return __ret; | | |
| 50229 | } | | |
| 50230 | #else | | |
| 50231 | __ai uint64_t vcgtd_u64(uint64_t __p0, uint64_t __p1) { | 42812 | __ai uint64_t vcgtd_u64(uint64_t __p0, uint64_t __p1) { |
| 50232 | uint64_t __ret; | 42813 | uint64_t __ret; |
| 50233 | __ret = (uint64_t) __builtin_neon_vcgtd_u64(__p0, __p1); | 42814 | __ret = (uint64_t) __builtin_neon_vcgtd_u64(__p0, __p1); |
| 50234 | return __ret; | 42815 | return __ret; |
| 50235 | } | 42816 | } |
| 50236 | #endif | | |
| 50237 | | | |
| 50238 | #ifdef __LITTLE_ENDIAN__ | | |
| 50239 | __ai uint64_t vcgtd_f64(float64_t __p0, float64_t __p1) { | | |
| 50240 | uint64_t __ret; | | |
| 50241 | __ret = (uint64_t) __builtin_neon_vcgtd_f64(__p0, __p1); | | |
| 50242 | return __ret; | | |
| 50243 | } | | |
| 50244 | #else | | |
| 50245 | __ai uint64_t vcgtd_f64(float64_t __p0, float64_t __p1) { | 42817 | __ai uint64_t vcgtd_f64(float64_t __p0, float64_t __p1) { |
| 50246 | uint64_t __ret; | 42818 | uint64_t __ret; |
| 50247 | __ret = (uint64_t) __builtin_neon_vcgtd_f64(__p0, __p1); | 42819 | __ret = (uint64_t) __builtin_neon_vcgtd_f64(__p0, __p1); |
| 50248 | return __ret; | 42820 | return __ret; |
| 50249 | } | 42821 | } |
| 50250 | #endif | | |
| 50251 | | | |
| 50252 | #ifdef __LITTLE_ENDIAN__ | | |
| 50253 | __ai uint32_t vcgts_f32(float32_t __p0, float32_t __p1) { | | |
| 50254 | uint32_t __ret; | | |
| 50255 | __ret = (uint32_t) __builtin_neon_vcgts_f32(__p0, __p1); | | |
| 50256 | return __ret; | | |
| 50257 | } | | |
| 50258 | #else | | |
| 50259 | __ai uint32_t vcgts_f32(float32_t __p0, float32_t __p1) { | 42822 | __ai uint32_t vcgts_f32(float32_t __p0, float32_t __p1) { |
| 50260 | uint32_t __ret; | 42823 | uint32_t __ret; |
| 50261 | __ret = (uint32_t) __builtin_neon_vcgts_f32(__p0, __p1); | 42824 | __ret = (uint32_t) __builtin_neon_vcgts_f32(__p0, __p1); |
| 50262 | return __ret; | 42825 | return __ret; |
| 50263 | } | 42826 | } |
| 50264 | #endif | | |
| 50265 | | | |
| 50266 | #ifdef __LITTLE_ENDIAN__ | 42827 | #ifdef __LITTLE_ENDIAN__ |
| 50267 | __ai uint8x16_t vcgtzq_s8(int8x16_t __p0) { | 42828 | __ai uint8x16_t vcgtzq_s8(int8x16_t __p0) { |
| 50268 | uint8x16_t __ret; | 42829 | uint8x16_t __ret; |
| ... | @@ -50375,20 +42936,11 @@ __ai uint8x8_t vcgtz_s8(int8x8_t __p0) { | ... | @@ -50375,20 +42936,11 @@ __ai uint8x8_t vcgtz_s8(int8x8_t __p0) { |
| 50375 | } | 42936 | } |
| 50376 | #endif | 42937 | #endif |
| 50377 | | 42938 | |
| 50378 | #ifdef __LITTLE_ENDIAN__ | | |
| 50379 | __ai uint64x1_t vcgtz_f64(float64x1_t __p0) { | 42939 | __ai uint64x1_t vcgtz_f64(float64x1_t __p0) { |
| 50380 | uint64x1_t __ret; | 42940 | uint64x1_t __ret; |
| 50381 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); | 42941 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); |
| 50382 | return __ret; | 42942 | return __ret; |
| 50383 | } | 42943 | } |
| 50384 | #else | | |
| 50385 | __ai uint64x1_t vcgtz_f64(float64x1_t __p0) { | | |
| 50386 | uint64x1_t __ret; | | |
| 50387 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); | | |
| 50388 | return __ret; | | |
| 50389 | } | | |
| 50390 | #endif | | |
| 50391 | | | |
| 50392 | #ifdef __LITTLE_ENDIAN__ | 42944 | #ifdef __LITTLE_ENDIAN__ |
| 50393 | __ai uint32x2_t vcgtz_f32(float32x2_t __p0) { | 42945 | __ai uint32x2_t vcgtz_f32(float32x2_t __p0) { |
| 50394 | uint32x2_t __ret; | 42946 | uint32x2_t __ret; |
| ... | @@ -50421,20 +42973,11 @@ __ai uint32x2_t vcgtz_s32(int32x2_t __p0) { | ... | @@ -50421,20 +42973,11 @@ __ai uint32x2_t vcgtz_s32(int32x2_t __p0) { |
| 50421 | } | 42973 | } |
| 50422 | #endif | 42974 | #endif |
| 50423 | | 42975 | |
| 50424 | #ifdef __LITTLE_ENDIAN__ | | |
| 50425 | __ai uint64x1_t vcgtz_s64(int64x1_t __p0) { | 42976 | __ai uint64x1_t vcgtz_s64(int64x1_t __p0) { |
| 50426 | uint64x1_t __ret; | 42977 | uint64x1_t __ret; |
| 50427 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); | 42978 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); |
| 50428 | return __ret; | 42979 | return __ret; |
| 50429 | } | 42980 | } |
| 50430 | #else | | |
| 50431 | __ai uint64x1_t vcgtz_s64(int64x1_t __p0) { | | |
| 50432 | uint64x1_t __ret; | | |
| 50433 | __ret = (uint64x1_t) __builtin_neon_vcgtz_v((int8x8_t)__p0, 19); | | |
| 50434 | return __ret; | | |
| 50435 | } | | |
| 50436 | #endif | | |
| 50437 | | | |
| 50438 | #ifdef __LITTLE_ENDIAN__ | 42981 | #ifdef __LITTLE_ENDIAN__ |
| 50439 | __ai uint16x4_t vcgtz_s16(int16x4_t __p0) { | 42982 | __ai uint16x4_t vcgtz_s16(int16x4_t __p0) { |
| 50440 | uint16x4_t __ret; | 42983 | uint16x4_t __ret; |
| ... | @@ -50451,48 +42994,21 @@ __ai uint16x4_t vcgtz_s16(int16x4_t __p0) { | ... | @@ -50451,48 +42994,21 @@ __ai uint16x4_t vcgtz_s16(int16x4_t __p0) { |
| 50451 | } | 42994 | } |
| 50452 | #endif | 42995 | #endif |
| 50453 | | 42996 | |
| 50454 | #ifdef __LITTLE_ENDIAN__ | | |
| 50455 | __ai int64_t vcgtzd_s64(int64_t __p0) { | 42997 | __ai int64_t vcgtzd_s64(int64_t __p0) { |
| 50456 | int64_t __ret; | 42998 | int64_t __ret; |
| 50457 | __ret = (int64_t) __builtin_neon_vcgtzd_s64(__p0); | 42999 | __ret = (int64_t) __builtin_neon_vcgtzd_s64(__p0); |
| 50458 | return __ret; | 43000 | return __ret; |
| 50459 | } | 43001 | } |
| 50460 | #else | | |
| 50461 | __ai int64_t vcgtzd_s64(int64_t __p0) { | | |
| 50462 | int64_t __ret; | | |
| 50463 | __ret = (int64_t) __builtin_neon_vcgtzd_s64(__p0); | | |
| 50464 | return __ret; | | |
| 50465 | } | | |
| 50466 | #endif | | |
| 50467 | | | |
| 50468 | #ifdef __LITTLE_ENDIAN__ | | |
| 50469 | __ai uint64_t vcgtzd_f64(float64_t __p0) { | | |
| 50470 | uint64_t __ret; | | |
| 50471 | __ret = (uint64_t) __builtin_neon_vcgtzd_f64(__p0); | | |
| 50472 | return __ret; | | |
| 50473 | } | | |
| 50474 | #else | | |
| 50475 | __ai uint64_t vcgtzd_f64(float64_t __p0) { | 43002 | __ai uint64_t vcgtzd_f64(float64_t __p0) { |
| 50476 | uint64_t __ret; | 43003 | uint64_t __ret; |
| 50477 | __ret = (uint64_t) __builtin_neon_vcgtzd_f64(__p0); | 43004 | __ret = (uint64_t) __builtin_neon_vcgtzd_f64(__p0); |
| 50478 | return __ret; | 43005 | return __ret; |
| 50479 | } | 43006 | } |
| 50480 | #endif | | |
| 50481 | | | |
| 50482 | #ifdef __LITTLE_ENDIAN__ | | |
| 50483 | __ai uint32_t vcgtzs_f32(float32_t __p0) { | | |
| 50484 | uint32_t __ret; | | |
| 50485 | __ret = (uint32_t) __builtin_neon_vcgtzs_f32(__p0); | | |
| 50486 | return __ret; | | |
| 50487 | } | | |
| 50488 | #else | | |
| 50489 | __ai uint32_t vcgtzs_f32(float32_t __p0) { | 43007 | __ai uint32_t vcgtzs_f32(float32_t __p0) { |
| 50490 | uint32_t __ret; | 43008 | uint32_t __ret; |
| 50491 | __ret = (uint32_t) __builtin_neon_vcgtzs_f32(__p0); | 43009 | __ret = (uint32_t) __builtin_neon_vcgtzs_f32(__p0); |
| 50492 | return __ret; | 43010 | return __ret; |
| 50493 | } | 43011 | } |
| 50494 | #endif | | |
| 50495 | | | |
| 50496 | #ifdef __LITTLE_ENDIAN__ | 43012 | #ifdef __LITTLE_ENDIAN__ |
| 50497 | __ai uint64x2_t vcleq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 43013 | __ai uint64x2_t vcleq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 50498 | uint64x2_t __ret; | 43014 | uint64x2_t __ret; |
| ... | @@ -50544,104 +43060,41 @@ __ai uint64x2_t vcleq_s64(int64x2_t __p0, int64x2_t __p1) { | ... | @@ -50544,104 +43060,41 @@ __ai uint64x2_t vcleq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 50544 | } | 43060 | } |
| 50545 | #endif | 43061 | #endif |
| 50546 | | 43062 | |
| 50547 | #ifdef __LITTLE_ENDIAN__ | | |
| 50548 | __ai uint64x1_t vcle_u64(uint64x1_t __p0, uint64x1_t __p1) { | 43063 | __ai uint64x1_t vcle_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 50549 | uint64x1_t __ret; | 43064 | uint64x1_t __ret; |
| 50550 | __ret = (uint64x1_t)(__p0 <= __p1); | 43065 | __ret = (uint64x1_t)(__p0 <= __p1); |
| 50551 | return __ret; | 43066 | return __ret; |
| 50552 | } | 43067 | } |
| 50553 | #else | | |
| 50554 | __ai uint64x1_t vcle_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 50555 | uint64x1_t __ret; | | |
| 50556 | __ret = (uint64x1_t)(__p0 <= __p1); | | |
| 50557 | return __ret; | | |
| 50558 | } | | |
| 50559 | #endif | | |
| 50560 | | | |
| 50561 | #ifdef __LITTLE_ENDIAN__ | | |
| 50562 | __ai uint64x1_t vcle_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 50563 | uint64x1_t __ret; | | |
| 50564 | __ret = (uint64x1_t)(__p0 <= __p1); | | |
| 50565 | return __ret; | | |
| 50566 | } | | |
| 50567 | #else | | |
| 50568 | __ai uint64x1_t vcle_f64(float64x1_t __p0, float64x1_t __p1) { | 43068 | __ai uint64x1_t vcle_f64(float64x1_t __p0, float64x1_t __p1) { |
| 50569 | uint64x1_t __ret; | 43069 | uint64x1_t __ret; |
| 50570 | __ret = (uint64x1_t)(__p0 <= __p1); | 43070 | __ret = (uint64x1_t)(__p0 <= __p1); |
| 50571 | return __ret; | 43071 | return __ret; |
| 50572 | } | 43072 | } |
| 50573 | #endif | | |
| 50574 | | | |
| 50575 | #ifdef __LITTLE_ENDIAN__ | | |
| 50576 | __ai uint64x1_t vcle_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 50577 | uint64x1_t __ret; | | |
| 50578 | __ret = (uint64x1_t)(__p0 <= __p1); | | |
| 50579 | return __ret; | | |
| 50580 | } | | |
| 50581 | #else | | |
| 50582 | __ai uint64x1_t vcle_s64(int64x1_t __p0, int64x1_t __p1) { | 43073 | __ai uint64x1_t vcle_s64(int64x1_t __p0, int64x1_t __p1) { |
| 50583 | uint64x1_t __ret; | 43074 | uint64x1_t __ret; |
| 50584 | __ret = (uint64x1_t)(__p0 <= __p1); | 43075 | __ret = (uint64x1_t)(__p0 <= __p1); |
| 50585 | return __ret; | 43076 | return __ret; |
| 50586 | } | 43077 | } |
| 50587 | #endif | | |
| 50588 | | | |
| 50589 | #ifdef __LITTLE_ENDIAN__ | | |
| 50590 | __ai uint64_t vcled_u64(uint64_t __p0, uint64_t __p1) { | | |
| 50591 | uint64_t __ret; | | |
| 50592 | __ret = (uint64_t) __builtin_neon_vcled_u64(__p0, __p1); | | |
| 50593 | return __ret; | | |
| 50594 | } | | |
| 50595 | #else | | |
| 50596 | __ai uint64_t vcled_u64(uint64_t __p0, uint64_t __p1) { | 43078 | __ai uint64_t vcled_u64(uint64_t __p0, uint64_t __p1) { |
| 50597 | uint64_t __ret; | 43079 | uint64_t __ret; |
| 50598 | __ret = (uint64_t) __builtin_neon_vcled_u64(__p0, __p1); | 43080 | __ret = (uint64_t) __builtin_neon_vcled_u64(__p0, __p1); |
| 50599 | return __ret; | 43081 | return __ret; |
| 50600 | } | 43082 | } |
| 50601 | #endif | | |
| 50602 | | | |
| 50603 | #ifdef __LITTLE_ENDIAN__ | | |
| 50604 | __ai int64_t vcled_s64(int64_t __p0, int64_t __p1) { | | |
| 50605 | int64_t __ret; | | |
| 50606 | __ret = (int64_t) __builtin_neon_vcled_s64(__p0, __p1); | | |
| 50607 | return __ret; | | |
| 50608 | } | | |
| 50609 | #else | | |
| 50610 | __ai int64_t vcled_s64(int64_t __p0, int64_t __p1) { | 43083 | __ai int64_t vcled_s64(int64_t __p0, int64_t __p1) { |
| 50611 | int64_t __ret; | 43084 | int64_t __ret; |
| 50612 | __ret = (int64_t) __builtin_neon_vcled_s64(__p0, __p1); | 43085 | __ret = (int64_t) __builtin_neon_vcled_s64(__p0, __p1); |
| 50613 | return __ret; | 43086 | return __ret; |
| 50614 | } | 43087 | } |
| 50615 | #endif | | |
| 50616 | | | |
| 50617 | #ifdef __LITTLE_ENDIAN__ | | |
| 50618 | __ai uint64_t vcled_f64(float64_t __p0, float64_t __p1) { | | |
| 50619 | uint64_t __ret; | | |
| 50620 | __ret = (uint64_t) __builtin_neon_vcled_f64(__p0, __p1); | | |
| 50621 | return __ret; | | |
| 50622 | } | | |
| 50623 | #else | | |
| 50624 | __ai uint64_t vcled_f64(float64_t __p0, float64_t __p1) { | 43088 | __ai uint64_t vcled_f64(float64_t __p0, float64_t __p1) { |
| 50625 | uint64_t __ret; | 43089 | uint64_t __ret; |
| 50626 | __ret = (uint64_t) __builtin_neon_vcled_f64(__p0, __p1); | 43090 | __ret = (uint64_t) __builtin_neon_vcled_f64(__p0, __p1); |
| 50627 | return __ret; | 43091 | return __ret; |
| 50628 | } | 43092 | } |
| 50629 | #endif | | |
| 50630 | | | |
| 50631 | #ifdef __LITTLE_ENDIAN__ | | |
| 50632 | __ai uint32_t vcles_f32(float32_t __p0, float32_t __p1) { | | |
| 50633 | uint32_t __ret; | | |
| 50634 | __ret = (uint32_t) __builtin_neon_vcles_f32(__p0, __p1); | | |
| 50635 | return __ret; | | |
| 50636 | } | | |
| 50637 | #else | | |
| 50638 | __ai uint32_t vcles_f32(float32_t __p0, float32_t __p1) { | 43093 | __ai uint32_t vcles_f32(float32_t __p0, float32_t __p1) { |
| 50639 | uint32_t __ret; | 43094 | uint32_t __ret; |
| 50640 | __ret = (uint32_t) __builtin_neon_vcles_f32(__p0, __p1); | 43095 | __ret = (uint32_t) __builtin_neon_vcles_f32(__p0, __p1); |
| 50641 | return __ret; | 43096 | return __ret; |
| 50642 | } | 43097 | } |
| 50643 | #endif | | |
| 50644 | | | |
| 50645 | #ifdef __LITTLE_ENDIAN__ | 43098 | #ifdef __LITTLE_ENDIAN__ |
| 50646 | __ai uint8x16_t vclezq_s8(int8x16_t __p0) { | 43099 | __ai uint8x16_t vclezq_s8(int8x16_t __p0) { |
| 50647 | uint8x16_t __ret; | 43100 | uint8x16_t __ret; |
| ... | @@ -50754,20 +43207,11 @@ __ai uint8x8_t vclez_s8(int8x8_t __p0) { | ... | @@ -50754,20 +43207,11 @@ __ai uint8x8_t vclez_s8(int8x8_t __p0) { |
| 50754 | } | 43207 | } |
| 50755 | #endif | 43208 | #endif |
| 50756 | | 43209 | |
| 50757 | #ifdef __LITTLE_ENDIAN__ | | |
| 50758 | __ai uint64x1_t vclez_f64(float64x1_t __p0) { | 43210 | __ai uint64x1_t vclez_f64(float64x1_t __p0) { |
| 50759 | uint64x1_t __ret; | 43211 | uint64x1_t __ret; |
| 50760 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); | 43212 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); |
| 50761 | return __ret; | 43213 | return __ret; |
| 50762 | } | 43214 | } |
| 50763 | #else | | |
| 50764 | __ai uint64x1_t vclez_f64(float64x1_t __p0) { | | |
| 50765 | uint64x1_t __ret; | | |
| 50766 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); | | |
| 50767 | return __ret; | | |
| 50768 | } | | |
| 50769 | #endif | | |
| 50770 | | | |
| 50771 | #ifdef __LITTLE_ENDIAN__ | 43215 | #ifdef __LITTLE_ENDIAN__ |
| 50772 | __ai uint32x2_t vclez_f32(float32x2_t __p0) { | 43216 | __ai uint32x2_t vclez_f32(float32x2_t __p0) { |
| 50773 | uint32x2_t __ret; | 43217 | uint32x2_t __ret; |
| ... | @@ -50800,20 +43244,11 @@ __ai uint32x2_t vclez_s32(int32x2_t __p0) { | ... | @@ -50800,20 +43244,11 @@ __ai uint32x2_t vclez_s32(int32x2_t __p0) { |
| 50800 | } | 43244 | } |
| 50801 | #endif | 43245 | #endif |
| 50802 | | 43246 | |
| 50803 | #ifdef __LITTLE_ENDIAN__ | | |
| 50804 | __ai uint64x1_t vclez_s64(int64x1_t __p0) { | 43247 | __ai uint64x1_t vclez_s64(int64x1_t __p0) { |
| 50805 | uint64x1_t __ret; | 43248 | uint64x1_t __ret; |
| 50806 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); | 43249 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); |
| 50807 | return __ret; | 43250 | return __ret; |
| 50808 | } | 43251 | } |
| 50809 | #else | | |
| 50810 | __ai uint64x1_t vclez_s64(int64x1_t __p0) { | | |
| 50811 | uint64x1_t __ret; | | |
| 50812 | __ret = (uint64x1_t) __builtin_neon_vclez_v((int8x8_t)__p0, 19); | | |
| 50813 | return __ret; | | |
| 50814 | } | | |
| 50815 | #endif | | |
| 50816 | | | |
| 50817 | #ifdef __LITTLE_ENDIAN__ | 43252 | #ifdef __LITTLE_ENDIAN__ |
| 50818 | __ai uint16x4_t vclez_s16(int16x4_t __p0) { | 43253 | __ai uint16x4_t vclez_s16(int16x4_t __p0) { |
| 50819 | uint16x4_t __ret; | 43254 | uint16x4_t __ret; |
| ... | @@ -50830,48 +43265,21 @@ __ai uint16x4_t vclez_s16(int16x4_t __p0) { | ... | @@ -50830,48 +43265,21 @@ __ai uint16x4_t vclez_s16(int16x4_t __p0) { |
| 50830 | } | 43265 | } |
| 50831 | #endif | 43266 | #endif |
| 50832 | | 43267 | |
| 50833 | #ifdef __LITTLE_ENDIAN__ | | |
| 50834 | __ai int64_t vclezd_s64(int64_t __p0) { | 43268 | __ai int64_t vclezd_s64(int64_t __p0) { |
| 50835 | int64_t __ret; | 43269 | int64_t __ret; |
| 50836 | __ret = (int64_t) __builtin_neon_vclezd_s64(__p0); | 43270 | __ret = (int64_t) __builtin_neon_vclezd_s64(__p0); |
| 50837 | return __ret; | 43271 | return __ret; |
| 50838 | } | 43272 | } |
| 50839 | #else | | |
| 50840 | __ai int64_t vclezd_s64(int64_t __p0) { | | |
| 50841 | int64_t __ret; | | |
| 50842 | __ret = (int64_t) __builtin_neon_vclezd_s64(__p0); | | |
| 50843 | return __ret; | | |
| 50844 | } | | |
| 50845 | #endif | | |
| 50846 | | | |
| 50847 | #ifdef __LITTLE_ENDIAN__ | | |
| 50848 | __ai uint64_t vclezd_f64(float64_t __p0) { | | |
| 50849 | uint64_t __ret; | | |
| 50850 | __ret = (uint64_t) __builtin_neon_vclezd_f64(__p0); | | |
| 50851 | return __ret; | | |
| 50852 | } | | |
| 50853 | #else | | |
| 50854 | __ai uint64_t vclezd_f64(float64_t __p0) { | 43273 | __ai uint64_t vclezd_f64(float64_t __p0) { |
| 50855 | uint64_t __ret; | 43274 | uint64_t __ret; |
| 50856 | __ret = (uint64_t) __builtin_neon_vclezd_f64(__p0); | 43275 | __ret = (uint64_t) __builtin_neon_vclezd_f64(__p0); |
| 50857 | return __ret; | 43276 | return __ret; |
| 50858 | } | 43277 | } |
| 50859 | #endif | | |
| 50860 | | | |
| 50861 | #ifdef __LITTLE_ENDIAN__ | | |
| 50862 | __ai uint32_t vclezs_f32(float32_t __p0) { | | |
| 50863 | uint32_t __ret; | | |
| 50864 | __ret = (uint32_t) __builtin_neon_vclezs_f32(__p0); | | |
| 50865 | return __ret; | | |
| 50866 | } | | |
| 50867 | #else | | |
| 50868 | __ai uint32_t vclezs_f32(float32_t __p0) { | 43278 | __ai uint32_t vclezs_f32(float32_t __p0) { |
| 50869 | uint32_t __ret; | 43279 | uint32_t __ret; |
| 50870 | __ret = (uint32_t) __builtin_neon_vclezs_f32(__p0); | 43280 | __ret = (uint32_t) __builtin_neon_vclezs_f32(__p0); |
| 50871 | return __ret; | 43281 | return __ret; |
| 50872 | } | 43282 | } |
| 50873 | #endif | | |
| 50874 | | | |
| 50875 | #ifdef __LITTLE_ENDIAN__ | 43283 | #ifdef __LITTLE_ENDIAN__ |
| 50876 | __ai uint64x2_t vcltq_u64(uint64x2_t __p0, uint64x2_t __p1) { | 43284 | __ai uint64x2_t vcltq_u64(uint64x2_t __p0, uint64x2_t __p1) { |
| 50877 | uint64x2_t __ret; | 43285 | uint64x2_t __ret; |
| ... | @@ -50923,104 +43331,41 @@ __ai uint64x2_t vcltq_s64(int64x2_t __p0, int64x2_t __p1) { | ... | @@ -50923,104 +43331,41 @@ __ai uint64x2_t vcltq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 50923 | } | 43331 | } |
| 50924 | #endif | 43332 | #endif |
| 50925 | | 43333 | |
| 50926 | #ifdef __LITTLE_ENDIAN__ | | |
| 50927 | __ai uint64x1_t vclt_u64(uint64x1_t __p0, uint64x1_t __p1) { | 43334 | __ai uint64x1_t vclt_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 50928 | uint64x1_t __ret; | 43335 | uint64x1_t __ret; |
| 50929 | __ret = (uint64x1_t)(__p0 < __p1); | 43336 | __ret = (uint64x1_t)(__p0 < __p1); |
| 50930 | return __ret; | 43337 | return __ret; |
| 50931 | } | 43338 | } |
| 50932 | #else | | |
| 50933 | __ai uint64x1_t vclt_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 50934 | uint64x1_t __ret; | | |
| 50935 | __ret = (uint64x1_t)(__p0 < __p1); | | |
| 50936 | return __ret; | | |
| 50937 | } | | |
| 50938 | #endif | | |
| 50939 | | | |
| 50940 | #ifdef __LITTLE_ENDIAN__ | | |
| 50941 | __ai uint64x1_t vclt_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 50942 | uint64x1_t __ret; | | |
| 50943 | __ret = (uint64x1_t)(__p0 < __p1); | | |
| 50944 | return __ret; | | |
| 50945 | } | | |
| 50946 | #else | | |
| 50947 | __ai uint64x1_t vclt_f64(float64x1_t __p0, float64x1_t __p1) { | 43339 | __ai uint64x1_t vclt_f64(float64x1_t __p0, float64x1_t __p1) { |
| 50948 | uint64x1_t __ret; | 43340 | uint64x1_t __ret; |
| 50949 | __ret = (uint64x1_t)(__p0 < __p1); | 43341 | __ret = (uint64x1_t)(__p0 < __p1); |
| 50950 | return __ret; | 43342 | return __ret; |
| 50951 | } | 43343 | } |
| 50952 | #endif | | |
| 50953 | | | |
| 50954 | #ifdef __LITTLE_ENDIAN__ | | |
| 50955 | __ai uint64x1_t vclt_s64(int64x1_t __p0, int64x1_t __p1) { | 43344 | __ai uint64x1_t vclt_s64(int64x1_t __p0, int64x1_t __p1) { |
| 50956 | uint64x1_t __ret; | 43345 | uint64x1_t __ret; |
| 50957 | __ret = (uint64x1_t)(__p0 < __p1); | 43346 | __ret = (uint64x1_t)(__p0 < __p1); |
| 50958 | return __ret; | 43347 | return __ret; |
| 50959 | } | 43348 | } |
| 50960 | #else | | |
| 50961 | __ai uint64x1_t vclt_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 50962 | uint64x1_t __ret; | | |
| 50963 | __ret = (uint64x1_t)(__p0 < __p1); | | |
| 50964 | return __ret; | | |
| 50965 | } | | |
| 50966 | #endif | | |
| 50967 | | | |
| 50968 | #ifdef __LITTLE_ENDIAN__ | | |
| 50969 | __ai uint64_t vcltd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 50970 | uint64_t __ret; | | |
| 50971 | __ret = (uint64_t) __builtin_neon_vcltd_u64(__p0, __p1); | | |
| 50972 | return __ret; | | |
| 50973 | } | | |
| 50974 | #else | | |
| 50975 | __ai uint64_t vcltd_u64(uint64_t __p0, uint64_t __p1) { | 43349 | __ai uint64_t vcltd_u64(uint64_t __p0, uint64_t __p1) { |
| 50976 | uint64_t __ret; | 43350 | uint64_t __ret; |
| 50977 | __ret = (uint64_t) __builtin_neon_vcltd_u64(__p0, __p1); | 43351 | __ret = (uint64_t) __builtin_neon_vcltd_u64(__p0, __p1); |
| 50978 | return __ret; | 43352 | return __ret; |
| 50979 | } | 43353 | } |
| 50980 | #endif | | |
| 50981 | | | |
| 50982 | #ifdef __LITTLE_ENDIAN__ | | |
| 50983 | __ai int64_t vcltd_s64(int64_t __p0, int64_t __p1) { | 43354 | __ai int64_t vcltd_s64(int64_t __p0, int64_t __p1) { |
| 50984 | int64_t __ret; | 43355 | int64_t __ret; |
| 50985 | __ret = (int64_t) __builtin_neon_vcltd_s64(__p0, __p1); | 43356 | __ret = (int64_t) __builtin_neon_vcltd_s64(__p0, __p1); |
| 50986 | return __ret; | 43357 | return __ret; |
| 50987 | } | 43358 | } |
| 50988 | #else | | |
| 50989 | __ai int64_t vcltd_s64(int64_t __p0, int64_t __p1) { | | |
| 50990 | int64_t __ret; | | |
| 50991 | __ret = (int64_t) __builtin_neon_vcltd_s64(__p0, __p1); | | |
| 50992 | return __ret; | | |
| 50993 | } | | |
| 50994 | #endif | | |
| 50995 | | | |
| 50996 | #ifdef __LITTLE_ENDIAN__ | | |
| 50997 | __ai uint64_t vcltd_f64(float64_t __p0, float64_t __p1) { | | |
| 50998 | uint64_t __ret; | | |
| 50999 | __ret = (uint64_t) __builtin_neon_vcltd_f64(__p0, __p1); | | |
| 51000 | return __ret; | | |
| 51001 | } | | |
| 51002 | #else | | |
| 51003 | __ai uint64_t vcltd_f64(float64_t __p0, float64_t __p1) { | 43359 | __ai uint64_t vcltd_f64(float64_t __p0, float64_t __p1) { |
| 51004 | uint64_t __ret; | 43360 | uint64_t __ret; |
| 51005 | __ret = (uint64_t) __builtin_neon_vcltd_f64(__p0, __p1); | 43361 | __ret = (uint64_t) __builtin_neon_vcltd_f64(__p0, __p1); |
| 51006 | return __ret; | 43362 | return __ret; |
| 51007 | } | 43363 | } |
| 51008 | #endif | | |
| 51009 | | | |
| 51010 | #ifdef __LITTLE_ENDIAN__ | | |
| 51011 | __ai uint32_t vclts_f32(float32_t __p0, float32_t __p1) { | 43364 | __ai uint32_t vclts_f32(float32_t __p0, float32_t __p1) { |
| 51012 | uint32_t __ret; | 43365 | uint32_t __ret; |
| 51013 | __ret = (uint32_t) __builtin_neon_vclts_f32(__p0, __p1); | 43366 | __ret = (uint32_t) __builtin_neon_vclts_f32(__p0, __p1); |
| 51014 | return __ret; | 43367 | return __ret; |
| 51015 | } | 43368 | } |
| 51016 | #else | | |
| 51017 | __ai uint32_t vclts_f32(float32_t __p0, float32_t __p1) { | | |
| 51018 | uint32_t __ret; | | |
| 51019 | __ret = (uint32_t) __builtin_neon_vclts_f32(__p0, __p1); | | |
| 51020 | return __ret; | | |
| 51021 | } | | |
| 51022 | #endif | | |
| 51023 | | | |
| 51024 | #ifdef __LITTLE_ENDIAN__ | 43369 | #ifdef __LITTLE_ENDIAN__ |
| 51025 | __ai uint8x16_t vcltzq_s8(int8x16_t __p0) { | 43370 | __ai uint8x16_t vcltzq_s8(int8x16_t __p0) { |
| 51026 | uint8x16_t __ret; | 43371 | uint8x16_t __ret; |
| ... | @@ -51133,20 +43478,11 @@ __ai uint8x8_t vcltz_s8(int8x8_t __p0) { | ... | @@ -51133,20 +43478,11 @@ __ai uint8x8_t vcltz_s8(int8x8_t __p0) { |
| 51133 | } | 43478 | } |
| 51134 | #endif | 43479 | #endif |
| 51135 | | 43480 | |
| 51136 | #ifdef __LITTLE_ENDIAN__ | | |
| 51137 | __ai uint64x1_t vcltz_f64(float64x1_t __p0) { | | |
| 51138 | uint64x1_t __ret; | | |
| 51139 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); | | |
| 51140 | return __ret; | | |
| 51141 | } | | |
| 51142 | #else | | |
| 51143 | __ai uint64x1_t vcltz_f64(float64x1_t __p0) { | 43481 | __ai uint64x1_t vcltz_f64(float64x1_t __p0) { |
| 51144 | uint64x1_t __ret; | 43482 | uint64x1_t __ret; |
| 51145 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); | 43483 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); |
| 51146 | return __ret; | 43484 | return __ret; |
| 51147 | } | 43485 | } |
| 51148 | #endif | | |
| 51149 | | | |
| 51150 | #ifdef __LITTLE_ENDIAN__ | 43486 | #ifdef __LITTLE_ENDIAN__ |
| 51151 | __ai uint32x2_t vcltz_f32(float32x2_t __p0) { | 43487 | __ai uint32x2_t vcltz_f32(float32x2_t __p0) { |
| 51152 | uint32x2_t __ret; | 43488 | uint32x2_t __ret; |
| ... | @@ -51179,20 +43515,11 @@ __ai uint32x2_t vcltz_s32(int32x2_t __p0) { | ... | @@ -51179,20 +43515,11 @@ __ai uint32x2_t vcltz_s32(int32x2_t __p0) { |
| 51179 | } | 43515 | } |
| 51180 | #endif | 43516 | #endif |
| 51181 | | 43517 | |
| 51182 | #ifdef __LITTLE_ENDIAN__ | | |
| 51183 | __ai uint64x1_t vcltz_s64(int64x1_t __p0) { | | |
| 51184 | uint64x1_t __ret; | | |
| 51185 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); | | |
| 51186 | return __ret; | | |
| 51187 | } | | |
| 51188 | #else | | |
| 51189 | __ai uint64x1_t vcltz_s64(int64x1_t __p0) { | 43518 | __ai uint64x1_t vcltz_s64(int64x1_t __p0) { |
| 51190 | uint64x1_t __ret; | 43519 | uint64x1_t __ret; |
| 51191 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); | 43520 | __ret = (uint64x1_t) __builtin_neon_vcltz_v((int8x8_t)__p0, 19); |
| 51192 | return __ret; | 43521 | return __ret; |
| 51193 | } | 43522 | } |
| 51194 | #endif | | |
| 51195 | | | |
| 51196 | #ifdef __LITTLE_ENDIAN__ | 43523 | #ifdef __LITTLE_ENDIAN__ |
| 51197 | __ai uint16x4_t vcltz_s16(int16x4_t __p0) { | 43524 | __ai uint16x4_t vcltz_s16(int16x4_t __p0) { |
| 51198 | uint16x4_t __ret; | 43525 | uint16x4_t __ret; |
| ... | @@ -51209,48 +43536,21 @@ __ai uint16x4_t vcltz_s16(int16x4_t __p0) { | ... | @@ -51209,48 +43536,21 @@ __ai uint16x4_t vcltz_s16(int16x4_t __p0) { |
| 51209 | } | 43536 | } |
| 51210 | #endif | 43537 | #endif |
| 51211 | | 43538 | |
| 51212 | #ifdef __LITTLE_ENDIAN__ | | |
| 51213 | __ai int64_t vcltzd_s64(int64_t __p0) { | | |
| 51214 | int64_t __ret; | | |
| 51215 | __ret = (int64_t) __builtin_neon_vcltzd_s64(__p0); | | |
| 51216 | return __ret; | | |
| 51217 | } | | |
| 51218 | #else | | |
| 51219 | __ai int64_t vcltzd_s64(int64_t __p0) { | 43539 | __ai int64_t vcltzd_s64(int64_t __p0) { |
| 51220 | int64_t __ret; | 43540 | int64_t __ret; |
| 51221 | __ret = (int64_t) __builtin_neon_vcltzd_s64(__p0); | 43541 | __ret = (int64_t) __builtin_neon_vcltzd_s64(__p0); |
| 51222 | return __ret; | 43542 | return __ret; |
| 51223 | } | 43543 | } |
| 51224 | #endif | | |
| 51225 | | | |
| 51226 | #ifdef __LITTLE_ENDIAN__ | | |
| 51227 | __ai uint64_t vcltzd_f64(float64_t __p0) { | | |
| 51228 | uint64_t __ret; | | |
| 51229 | __ret = (uint64_t) __builtin_neon_vcltzd_f64(__p0); | | |
| 51230 | return __ret; | | |
| 51231 | } | | |
| 51232 | #else | | |
| 51233 | __ai uint64_t vcltzd_f64(float64_t __p0) { | 43544 | __ai uint64_t vcltzd_f64(float64_t __p0) { |
| 51234 | uint64_t __ret; | 43545 | uint64_t __ret; |
| 51235 | __ret = (uint64_t) __builtin_neon_vcltzd_f64(__p0); | 43546 | __ret = (uint64_t) __builtin_neon_vcltzd_f64(__p0); |
| 51236 | return __ret; | 43547 | return __ret; |
| 51237 | } | 43548 | } |
| 51238 | #endif | | |
| 51239 | | | |
| 51240 | #ifdef __LITTLE_ENDIAN__ | | |
| 51241 | __ai uint32_t vcltzs_f32(float32_t __p0) { | | |
| 51242 | uint32_t __ret; | | |
| 51243 | __ret = (uint32_t) __builtin_neon_vcltzs_f32(__p0); | | |
| 51244 | return __ret; | | |
| 51245 | } | | |
| 51246 | #else | | |
| 51247 | __ai uint32_t vcltzs_f32(float32_t __p0) { | 43549 | __ai uint32_t vcltzs_f32(float32_t __p0) { |
| 51248 | uint32_t __ret; | 43550 | uint32_t __ret; |
| 51249 | __ret = (uint32_t) __builtin_neon_vcltzs_f32(__p0); | 43551 | __ret = (uint32_t) __builtin_neon_vcltzs_f32(__p0); |
| 51250 | return __ret; | 43552 | return __ret; |
| 51251 | } | 43553 | } |
| 51252 | #endif | | |
| 51253 | | | |
| 51254 | #ifdef __LITTLE_ENDIAN__ | 43554 | #ifdef __LITTLE_ENDIAN__ |
| 51255 | __ai poly64x2_t vcombine_p64(poly64x1_t __p0, poly64x1_t __p1) { | 43555 | __ai poly64x2_t vcombine_p64(poly64x1_t __p0, poly64x1_t __p1) { |
| 51256 | poly64x2_t __ret; | 43556 | poly64x2_t __ret; |
| ... | @@ -51379,7 +43679,7 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { | ... | @@ -51379,7 +43679,7 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { |
| 51379 | uint64x1_t __s2_21 = __p2_21; \ | 43679 | uint64x1_t __s2_21 = __p2_21; \ |
| 51380 | uint64x2_t __rev0_21; __rev0_21 = __builtin_shufflevector(__s0_21, __s0_21, 1, 0); \ | 43680 | uint64x2_t __rev0_21; __rev0_21 = __builtin_shufflevector(__s0_21, __s0_21, 1, 0); \ |
| 51381 | uint64x2_t __ret_21; \ | 43681 | uint64x2_t __ret_21; \ |
| 51382 | __ret_21 = __noswap_vsetq_lane_u64(__noswap_vget_lane_u64(__s2_21, __p3_21), __rev0_21, __p1_21); \ | 43682 | __ret_21 = __noswap_vsetq_lane_u64(vget_lane_u64(__s2_21, __p3_21), __rev0_21, __p1_21); \ |
| 51383 | __ret_21 = __builtin_shufflevector(__ret_21, __ret_21, 1, 0); \ | 43683 | __ret_21 = __builtin_shufflevector(__ret_21, __ret_21, 1, 0); \ |
| 51384 | __ret_21; \ | 43684 | __ret_21; \ |
| 51385 | }) | 43685 | }) |
| ... | @@ -51483,7 +43783,7 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { | ... | @@ -51483,7 +43783,7 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { |
| 51483 | int64x1_t __s2_31 = __p2_31; \ | 43783 | int64x1_t __s2_31 = __p2_31; \ |
| 51484 | int64x2_t __rev0_31; __rev0_31 = __builtin_shufflevector(__s0_31, __s0_31, 1, 0); \ | 43784 | int64x2_t __rev0_31; __rev0_31 = __builtin_shufflevector(__s0_31, __s0_31, 1, 0); \ |
| 51485 | int64x2_t __ret_31; \ | 43785 | int64x2_t __ret_31; \ |
| 51486 | __ret_31 = __noswap_vsetq_lane_s64(__noswap_vget_lane_s64(__s2_31, __p3_31), __rev0_31, __p1_31); \ | 43786 | __ret_31 = __noswap_vsetq_lane_s64(vget_lane_s64(__s2_31, __p3_31), __rev0_31, __p1_31); \ |
| 51487 | __ret_31 = __builtin_shufflevector(__ret_31, __ret_31, 1, 0); \ | 43787 | __ret_31 = __builtin_shufflevector(__ret_31, __ret_31, 1, 0); \ |
| 51488 | __ret_31; \ | 43788 | __ret_31; \ |
| 51489 | }) | 43789 | }) |
| ... | @@ -51594,7 +43894,6 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { | ... | @@ -51594,7 +43894,6 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { |
| 51594 | }) | 43894 | }) |
| 51595 | #endif | 43895 | #endif |
| 51596 | | 43896 | |
| 51597 | #ifdef __LITTLE_ENDIAN__ | | |
| 51598 | #define vcopy_lane_u64(__p0_42, __p1_42, __p2_42, __p3_42) __extension__ ({ \ | 43897 | #define vcopy_lane_u64(__p0_42, __p1_42, __p2_42, __p3_42) __extension__ ({ \ |
| 51599 | uint64x1_t __s0_42 = __p0_42; \ | 43898 | uint64x1_t __s0_42 = __p0_42; \ |
| 51600 | uint64x1_t __s2_42 = __p2_42; \ | 43899 | uint64x1_t __s2_42 = __p2_42; \ |
| ... | @@ -51602,653 +43901,598 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { | ... | @@ -51602,653 +43901,598 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { |
| 51602 | __ret_42 = vset_lane_u64(vget_lane_u64(__s2_42, __p3_42), __s0_42, __p1_42); \ | 43901 | __ret_42 = vset_lane_u64(vget_lane_u64(__s2_42, __p3_42), __s0_42, __p1_42); \ |
| 51603 | __ret_42; \ | 43902 | __ret_42; \ |
| 51604 | }) | 43903 | }) |
| 51605 | #else | 43904 | #ifdef __LITTLE_ENDIAN__ |
| 51606 | #define vcopy_lane_u64(__p0_43, __p1_43, __p2_43, __p3_43) __extension__ ({ \ | 43905 | #define vcopy_lane_u16(__p0_43, __p1_43, __p2_43, __p3_43) __extension__ ({ \ |
| 51607 | uint64x1_t __s0_43 = __p0_43; \ | 43906 | uint16x4_t __s0_43 = __p0_43; \ |
| 51608 | uint64x1_t __s2_43 = __p2_43; \ | 43907 | uint16x4_t __s2_43 = __p2_43; \ |
| 51609 | uint64x1_t __ret_43; \ | 43908 | uint16x4_t __ret_43; \ |
| 51610 | __ret_43 = __noswap_vset_lane_u64(__noswap_vget_lane_u64(__s2_43, __p3_43), __s0_43, __p1_43); \ | 43909 | __ret_43 = vset_lane_u16(vget_lane_u16(__s2_43, __p3_43), __s0_43, __p1_43); \ |
| 51611 | __ret_43; \ | 43910 | __ret_43; \ |
| 51612 | }) | 43911 | }) |
| 51613 | #endif | 43912 | #else |
| 51614 | | | |
| 51615 | #ifdef __LITTLE_ENDIAN__ | | |
| 51616 | #define vcopy_lane_u16(__p0_44, __p1_44, __p2_44, __p3_44) __extension__ ({ \ | 43913 | #define vcopy_lane_u16(__p0_44, __p1_44, __p2_44, __p3_44) __extension__ ({ \ |
| 51617 | uint16x4_t __s0_44 = __p0_44; \ | 43914 | uint16x4_t __s0_44 = __p0_44; \ |
| 51618 | uint16x4_t __s2_44 = __p2_44; \ | 43915 | uint16x4_t __s2_44 = __p2_44; \ |
| | 43916 | uint16x4_t __rev0_44; __rev0_44 = __builtin_shufflevector(__s0_44, __s0_44, 3, 2, 1, 0); \ |
| | 43917 | uint16x4_t __rev2_44; __rev2_44 = __builtin_shufflevector(__s2_44, __s2_44, 3, 2, 1, 0); \ |
| 51619 | uint16x4_t __ret_44; \ | 43918 | uint16x4_t __ret_44; \ |
| 51620 | __ret_44 = vset_lane_u16(vget_lane_u16(__s2_44, __p3_44), __s0_44, __p1_44); \ | 43919 | __ret_44 = __noswap_vset_lane_u16(__noswap_vget_lane_u16(__rev2_44, __p3_44), __rev0_44, __p1_44); \ |
| | 43920 | __ret_44 = __builtin_shufflevector(__ret_44, __ret_44, 3, 2, 1, 0); \ |
| 51621 | __ret_44; \ | 43921 | __ret_44; \ |
| 51622 | }) | 43922 | }) |
| 51623 | #else | | |
| 51624 | #define vcopy_lane_u16(__p0_45, __p1_45, __p2_45, __p3_45) __extension__ ({ \ | | |
| 51625 | uint16x4_t __s0_45 = __p0_45; \ | | |
| 51626 | uint16x4_t __s2_45 = __p2_45; \ | | |
| 51627 | uint16x4_t __rev0_45; __rev0_45 = __builtin_shufflevector(__s0_45, __s0_45, 3, 2, 1, 0); \ | | |
| 51628 | uint16x4_t __rev2_45; __rev2_45 = __builtin_shufflevector(__s2_45, __s2_45, 3, 2, 1, 0); \ | | |
| 51629 | uint16x4_t __ret_45; \ | | |
| 51630 | __ret_45 = __noswap_vset_lane_u16(__noswap_vget_lane_u16(__rev2_45, __p3_45), __rev0_45, __p1_45); \ | | |
| 51631 | __ret_45 = __builtin_shufflevector(__ret_45, __ret_45, 3, 2, 1, 0); \ | | |
| 51632 | __ret_45; \ | | |
| 51633 | }) | | |
| 51634 | #endif | 43923 | #endif |
| 51635 | | 43924 | |
| 51636 | #ifdef __LITTLE_ENDIAN__ | 43925 | #ifdef __LITTLE_ENDIAN__ |
| | 43926 | #define vcopy_lane_s8(__p0_45, __p1_45, __p2_45, __p3_45) __extension__ ({ \ |
| | 43927 | int8x8_t __s0_45 = __p0_45; \ |
| | 43928 | int8x8_t __s2_45 = __p2_45; \ |
| | 43929 | int8x8_t __ret_45; \ |
| | 43930 | __ret_45 = vset_lane_s8(vget_lane_s8(__s2_45, __p3_45), __s0_45, __p1_45); \ |
| | 43931 | __ret_45; \ |
| | 43932 | }) |
| | 43933 | #else |
| 51637 | #define vcopy_lane_s8(__p0_46, __p1_46, __p2_46, __p3_46) __extension__ ({ \ | 43934 | #define vcopy_lane_s8(__p0_46, __p1_46, __p2_46, __p3_46) __extension__ ({ \ |
| 51638 | int8x8_t __s0_46 = __p0_46; \ | 43935 | int8x8_t __s0_46 = __p0_46; \ |
| 51639 | int8x8_t __s2_46 = __p2_46; \ | 43936 | int8x8_t __s2_46 = __p2_46; \ |
| | 43937 | int8x8_t __rev0_46; __rev0_46 = __builtin_shufflevector(__s0_46, __s0_46, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 43938 | int8x8_t __rev2_46; __rev2_46 = __builtin_shufflevector(__s2_46, __s2_46, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51640 | int8x8_t __ret_46; \ | 43939 | int8x8_t __ret_46; \ |
| 51641 | __ret_46 = vset_lane_s8(vget_lane_s8(__s2_46, __p3_46), __s0_46, __p1_46); \ | 43940 | __ret_46 = __noswap_vset_lane_s8(__noswap_vget_lane_s8(__rev2_46, __p3_46), __rev0_46, __p1_46); \ |
| | 43941 | __ret_46 = __builtin_shufflevector(__ret_46, __ret_46, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51642 | __ret_46; \ | 43942 | __ret_46; \ |
| 51643 | }) | 43943 | }) |
| 51644 | #else | | |
| 51645 | #define vcopy_lane_s8(__p0_47, __p1_47, __p2_47, __p3_47) __extension__ ({ \ | | |
| 51646 | int8x8_t __s0_47 = __p0_47; \ | | |
| 51647 | int8x8_t __s2_47 = __p2_47; \ | | |
| 51648 | int8x8_t __rev0_47; __rev0_47 = __builtin_shufflevector(__s0_47, __s0_47, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 51649 | int8x8_t __rev2_47; __rev2_47 = __builtin_shufflevector(__s2_47, __s2_47, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 51650 | int8x8_t __ret_47; \ | | |
| 51651 | __ret_47 = __noswap_vset_lane_s8(__noswap_vget_lane_s8(__rev2_47, __p3_47), __rev0_47, __p1_47); \ | | |
| 51652 | __ret_47 = __builtin_shufflevector(__ret_47, __ret_47, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 51653 | __ret_47; \ | | |
| 51654 | }) | | |
| 51655 | #endif | 43944 | #endif |
| 51656 | | 43945 | |
| 51657 | #ifdef __LITTLE_ENDIAN__ | 43946 | #ifdef __LITTLE_ENDIAN__ |
| | 43947 | #define vcopy_lane_f32(__p0_47, __p1_47, __p2_47, __p3_47) __extension__ ({ \ |
| | 43948 | float32x2_t __s0_47 = __p0_47; \ |
| | 43949 | float32x2_t __s2_47 = __p2_47; \ |
| | 43950 | float32x2_t __ret_47; \ |
| | 43951 | __ret_47 = vset_lane_f32(vget_lane_f32(__s2_47, __p3_47), __s0_47, __p1_47); \ |
| | 43952 | __ret_47; \ |
| | 43953 | }) |
| | 43954 | #else |
| 51658 | #define vcopy_lane_f32(__p0_48, __p1_48, __p2_48, __p3_48) __extension__ ({ \ | 43955 | #define vcopy_lane_f32(__p0_48, __p1_48, __p2_48, __p3_48) __extension__ ({ \ |
| 51659 | float32x2_t __s0_48 = __p0_48; \ | 43956 | float32x2_t __s0_48 = __p0_48; \ |
| 51660 | float32x2_t __s2_48 = __p2_48; \ | 43957 | float32x2_t __s2_48 = __p2_48; \ |
| | 43958 | float32x2_t __rev0_48; __rev0_48 = __builtin_shufflevector(__s0_48, __s0_48, 1, 0); \ |
| | 43959 | float32x2_t __rev2_48; __rev2_48 = __builtin_shufflevector(__s2_48, __s2_48, 1, 0); \ |
| 51661 | float32x2_t __ret_48; \ | 43960 | float32x2_t __ret_48; \ |
| 51662 | __ret_48 = vset_lane_f32(vget_lane_f32(__s2_48, __p3_48), __s0_48, __p1_48); \ | 43961 | __ret_48 = __noswap_vset_lane_f32(__noswap_vget_lane_f32(__rev2_48, __p3_48), __rev0_48, __p1_48); \ |
| | 43962 | __ret_48 = __builtin_shufflevector(__ret_48, __ret_48, 1, 0); \ |
| 51663 | __ret_48; \ | 43963 | __ret_48; \ |
| 51664 | }) | 43964 | }) |
| 51665 | #else | | |
| 51666 | #define vcopy_lane_f32(__p0_49, __p1_49, __p2_49, __p3_49) __extension__ ({ \ | | |
| 51667 | float32x2_t __s0_49 = __p0_49; \ | | |
| 51668 | float32x2_t __s2_49 = __p2_49; \ | | |
| 51669 | float32x2_t __rev0_49; __rev0_49 = __builtin_shufflevector(__s0_49, __s0_49, 1, 0); \ | | |
| 51670 | float32x2_t __rev2_49; __rev2_49 = __builtin_shufflevector(__s2_49, __s2_49, 1, 0); \ | | |
| 51671 | float32x2_t __ret_49; \ | | |
| 51672 | __ret_49 = __noswap_vset_lane_f32(__noswap_vget_lane_f32(__rev2_49, __p3_49), __rev0_49, __p1_49); \ | | |
| 51673 | __ret_49 = __builtin_shufflevector(__ret_49, __ret_49, 1, 0); \ | | |
| 51674 | __ret_49; \ | | |
| 51675 | }) | | |
| 51676 | #endif | 43965 | #endif |
| 51677 | | 43966 | |
| 51678 | #ifdef __LITTLE_ENDIAN__ | 43967 | #ifdef __LITTLE_ENDIAN__ |
| | 43968 | #define vcopy_lane_s32(__p0_49, __p1_49, __p2_49, __p3_49) __extension__ ({ \ |
| | 43969 | int32x2_t __s0_49 = __p0_49; \ |
| | 43970 | int32x2_t __s2_49 = __p2_49; \ |
| | 43971 | int32x2_t __ret_49; \ |
| | 43972 | __ret_49 = vset_lane_s32(vget_lane_s32(__s2_49, __p3_49), __s0_49, __p1_49); \ |
| | 43973 | __ret_49; \ |
| | 43974 | }) |
| | 43975 | #else |
| 51679 | #define vcopy_lane_s32(__p0_50, __p1_50, __p2_50, __p3_50) __extension__ ({ \ | 43976 | #define vcopy_lane_s32(__p0_50, __p1_50, __p2_50, __p3_50) __extension__ ({ \ |
| 51680 | int32x2_t __s0_50 = __p0_50; \ | 43977 | int32x2_t __s0_50 = __p0_50; \ |
| 51681 | int32x2_t __s2_50 = __p2_50; \ | 43978 | int32x2_t __s2_50 = __p2_50; \ |
| | 43979 | int32x2_t __rev0_50; __rev0_50 = __builtin_shufflevector(__s0_50, __s0_50, 1, 0); \ |
| | 43980 | int32x2_t __rev2_50; __rev2_50 = __builtin_shufflevector(__s2_50, __s2_50, 1, 0); \ |
| 51682 | int32x2_t __ret_50; \ | 43981 | int32x2_t __ret_50; \ |
| 51683 | __ret_50 = vset_lane_s32(vget_lane_s32(__s2_50, __p3_50), __s0_50, __p1_50); \ | 43982 | __ret_50 = __noswap_vset_lane_s32(__noswap_vget_lane_s32(__rev2_50, __p3_50), __rev0_50, __p1_50); \ |
| | 43983 | __ret_50 = __builtin_shufflevector(__ret_50, __ret_50, 1, 0); \ |
| 51684 | __ret_50; \ | 43984 | __ret_50; \ |
| 51685 | }) | 43985 | }) |
| 51686 | #else | | |
| 51687 | #define vcopy_lane_s32(__p0_51, __p1_51, __p2_51, __p3_51) __extension__ ({ \ | | |
| 51688 | int32x2_t __s0_51 = __p0_51; \ | | |
| 51689 | int32x2_t __s2_51 = __p2_51; \ | | |
| 51690 | int32x2_t __rev0_51; __rev0_51 = __builtin_shufflevector(__s0_51, __s0_51, 1, 0); \ | | |
| 51691 | int32x2_t __rev2_51; __rev2_51 = __builtin_shufflevector(__s2_51, __s2_51, 1, 0); \ | | |
| 51692 | int32x2_t __ret_51; \ | | |
| 51693 | __ret_51 = __noswap_vset_lane_s32(__noswap_vget_lane_s32(__rev2_51, __p3_51), __rev0_51, __p1_51); \ | | |
| 51694 | __ret_51 = __builtin_shufflevector(__ret_51, __ret_51, 1, 0); \ | | |
| 51695 | __ret_51; \ | | |
| 51696 | }) | | |
| 51697 | #endif | 43986 | #endif |
| 51698 | | 43987 | |
| | 43988 | #define vcopy_lane_s64(__p0_51, __p1_51, __p2_51, __p3_51) __extension__ ({ \ |
| | 43989 | int64x1_t __s0_51 = __p0_51; \ |
| | 43990 | int64x1_t __s2_51 = __p2_51; \ |
| | 43991 | int64x1_t __ret_51; \ |
| | 43992 | __ret_51 = vset_lane_s64(vget_lane_s64(__s2_51, __p3_51), __s0_51, __p1_51); \ |
| | 43993 | __ret_51; \ |
| | 43994 | }) |
| 51699 | #ifdef __LITTLE_ENDIAN__ | 43995 | #ifdef __LITTLE_ENDIAN__ |
| 51700 | #define vcopy_lane_s64(__p0_52, __p1_52, __p2_52, __p3_52) __extension__ ({ \ | 43996 | #define vcopy_lane_s16(__p0_52, __p1_52, __p2_52, __p3_52) __extension__ ({ \ |
| 51701 | int64x1_t __s0_52 = __p0_52; \ | 43997 | int16x4_t __s0_52 = __p0_52; \ |
| 51702 | int64x1_t __s2_52 = __p2_52; \ | 43998 | int16x4_t __s2_52 = __p2_52; \ |
| 51703 | int64x1_t __ret_52; \ | 43999 | int16x4_t __ret_52; \ |
| 51704 | __ret_52 = vset_lane_s64(vget_lane_s64(__s2_52, __p3_52), __s0_52, __p1_52); \ | 44000 | __ret_52 = vset_lane_s16(vget_lane_s16(__s2_52, __p3_52), __s0_52, __p1_52); \ |
| 51705 | __ret_52; \ | 44001 | __ret_52; \ |
| 51706 | }) | 44002 | }) |
| 51707 | #else | 44003 | #else |
| 51708 | #define vcopy_lane_s64(__p0_53, __p1_53, __p2_53, __p3_53) __extension__ ({ \ | 44004 | #define vcopy_lane_s16(__p0_53, __p1_53, __p2_53, __p3_53) __extension__ ({ \ |
| 51709 | int64x1_t __s0_53 = __p0_53; \ | 44005 | int16x4_t __s0_53 = __p0_53; \ |
| 51710 | int64x1_t __s2_53 = __p2_53; \ | 44006 | int16x4_t __s2_53 = __p2_53; \ |
| 51711 | int64x1_t __ret_53; \ | 44007 | int16x4_t __rev0_53; __rev0_53 = __builtin_shufflevector(__s0_53, __s0_53, 3, 2, 1, 0); \ |
| 51712 | __ret_53 = __noswap_vset_lane_s64(__noswap_vget_lane_s64(__s2_53, __p3_53), __s0_53, __p1_53); \ | 44008 | int16x4_t __rev2_53; __rev2_53 = __builtin_shufflevector(__s2_53, __s2_53, 3, 2, 1, 0); \ |
| | 44009 | int16x4_t __ret_53; \ |
| | 44010 | __ret_53 = __noswap_vset_lane_s16(__noswap_vget_lane_s16(__rev2_53, __p3_53), __rev0_53, __p1_53); \ |
| | 44011 | __ret_53 = __builtin_shufflevector(__ret_53, __ret_53, 3, 2, 1, 0); \ |
| 51713 | __ret_53; \ | 44012 | __ret_53; \ |
| 51714 | }) | 44013 | }) |
| 51715 | #endif | 44014 | #endif |
| 51716 | | 44015 | |
| 51717 | #ifdef __LITTLE_ENDIAN__ | 44016 | #ifdef __LITTLE_ENDIAN__ |
| 51718 | #define vcopy_lane_s16(__p0_54, __p1_54, __p2_54, __p3_54) __extension__ ({ \ | 44017 | #define vcopyq_laneq_p8(__p0_54, __p1_54, __p2_54, __p3_54) __extension__ ({ \ |
| 51719 | int16x4_t __s0_54 = __p0_54; \ | 44018 | poly8x16_t __s0_54 = __p0_54; \ |
| 51720 | int16x4_t __s2_54 = __p2_54; \ | 44019 | poly8x16_t __s2_54 = __p2_54; \ |
| 51721 | int16x4_t __ret_54; \ | 44020 | poly8x16_t __ret_54; \ |
| 51722 | __ret_54 = vset_lane_s16(vget_lane_s16(__s2_54, __p3_54), __s0_54, __p1_54); \ | 44021 | __ret_54 = vsetq_lane_p8(vgetq_lane_p8(__s2_54, __p3_54), __s0_54, __p1_54); \ |
| 51723 | __ret_54; \ | 44022 | __ret_54; \ |
| 51724 | }) | 44023 | }) |
| 51725 | #else | 44024 | #else |
| 51726 | #define vcopy_lane_s16(__p0_55, __p1_55, __p2_55, __p3_55) __extension__ ({ \ | 44025 | #define vcopyq_laneq_p8(__p0_55, __p1_55, __p2_55, __p3_55) __extension__ ({ \ |
| 51727 | int16x4_t __s0_55 = __p0_55; \ | 44026 | poly8x16_t __s0_55 = __p0_55; \ |
| 51728 | int16x4_t __s2_55 = __p2_55; \ | 44027 | poly8x16_t __s2_55 = __p2_55; \ |
| 51729 | int16x4_t __rev0_55; __rev0_55 = __builtin_shufflevector(__s0_55, __s0_55, 3, 2, 1, 0); \ | 44028 | poly8x16_t __rev0_55; __rev0_55 = __builtin_shufflevector(__s0_55, __s0_55, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51730 | int16x4_t __rev2_55; __rev2_55 = __builtin_shufflevector(__s2_55, __s2_55, 3, 2, 1, 0); \ | 44029 | poly8x16_t __rev2_55; __rev2_55 = __builtin_shufflevector(__s2_55, __s2_55, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51731 | int16x4_t __ret_55; \ | 44030 | poly8x16_t __ret_55; \ |
| 51732 | __ret_55 = __noswap_vset_lane_s16(__noswap_vget_lane_s16(__rev2_55, __p3_55), __rev0_55, __p1_55); \ | 44031 | __ret_55 = __noswap_vsetq_lane_p8(__noswap_vgetq_lane_p8(__rev2_55, __p3_55), __rev0_55, __p1_55); \ |
| 51733 | __ret_55 = __builtin_shufflevector(__ret_55, __ret_55, 3, 2, 1, 0); \ | 44032 | __ret_55 = __builtin_shufflevector(__ret_55, __ret_55, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51734 | __ret_55; \ | 44033 | __ret_55; \ |
| 51735 | }) | 44034 | }) |
| 51736 | #endif | 44035 | #endif |
| 51737 | | 44036 | |
| 51738 | #ifdef __LITTLE_ENDIAN__ | 44037 | #ifdef __LITTLE_ENDIAN__ |
| 51739 | #define vcopyq_laneq_p8(__p0_56, __p1_56, __p2_56, __p3_56) __extension__ ({ \ | 44038 | #define vcopyq_laneq_p16(__p0_56, __p1_56, __p2_56, __p3_56) __extension__ ({ \ |
| 51740 | poly8x16_t __s0_56 = __p0_56; \ | 44039 | poly16x8_t __s0_56 = __p0_56; \ |
| 51741 | poly8x16_t __s2_56 = __p2_56; \ | 44040 | poly16x8_t __s2_56 = __p2_56; \ |
| 51742 | poly8x16_t __ret_56; \ | 44041 | poly16x8_t __ret_56; \ |
| 51743 | __ret_56 = vsetq_lane_p8(vgetq_lane_p8(__s2_56, __p3_56), __s0_56, __p1_56); \ | 44042 | __ret_56 = vsetq_lane_p16(vgetq_lane_p16(__s2_56, __p3_56), __s0_56, __p1_56); \ |
| 51744 | __ret_56; \ | 44043 | __ret_56; \ |
| 51745 | }) | 44044 | }) |
| 51746 | #else | 44045 | #else |
| 51747 | #define vcopyq_laneq_p8(__p0_57, __p1_57, __p2_57, __p3_57) __extension__ ({ \ | 44046 | #define vcopyq_laneq_p16(__p0_57, __p1_57, __p2_57, __p3_57) __extension__ ({ \ |
| 51748 | poly8x16_t __s0_57 = __p0_57; \ | 44047 | poly16x8_t __s0_57 = __p0_57; \ |
| 51749 | poly8x16_t __s2_57 = __p2_57; \ | 44048 | poly16x8_t __s2_57 = __p2_57; \ |
| 51750 | poly8x16_t __rev0_57; __rev0_57 = __builtin_shufflevector(__s0_57, __s0_57, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44049 | poly16x8_t __rev0_57; __rev0_57 = __builtin_shufflevector(__s0_57, __s0_57, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51751 | poly8x16_t __rev2_57; __rev2_57 = __builtin_shufflevector(__s2_57, __s2_57, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44050 | poly16x8_t __rev2_57; __rev2_57 = __builtin_shufflevector(__s2_57, __s2_57, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51752 | poly8x16_t __ret_57; \ | 44051 | poly16x8_t __ret_57; \ |
| 51753 | __ret_57 = __noswap_vsetq_lane_p8(__noswap_vgetq_lane_p8(__rev2_57, __p3_57), __rev0_57, __p1_57); \ | 44052 | __ret_57 = __noswap_vsetq_lane_p16(__noswap_vgetq_lane_p16(__rev2_57, __p3_57), __rev0_57, __p1_57); \ |
| 51754 | __ret_57 = __builtin_shufflevector(__ret_57, __ret_57, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44053 | __ret_57 = __builtin_shufflevector(__ret_57, __ret_57, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51755 | __ret_57; \ | 44054 | __ret_57; \ |
| 51756 | }) | 44055 | }) |
| 51757 | #endif | 44056 | #endif |
| 51758 | | 44057 | |
| 51759 | #ifdef __LITTLE_ENDIAN__ | 44058 | #ifdef __LITTLE_ENDIAN__ |
| 51760 | #define vcopyq_laneq_p16(__p0_58, __p1_58, __p2_58, __p3_58) __extension__ ({ \ | 44059 | #define vcopyq_laneq_u8(__p0_58, __p1_58, __p2_58, __p3_58) __extension__ ({ \ |
| 51761 | poly16x8_t __s0_58 = __p0_58; \ | 44060 | uint8x16_t __s0_58 = __p0_58; \ |
| 51762 | poly16x8_t __s2_58 = __p2_58; \ | 44061 | uint8x16_t __s2_58 = __p2_58; \ |
| 51763 | poly16x8_t __ret_58; \ | 44062 | uint8x16_t __ret_58; \ |
| 51764 | __ret_58 = vsetq_lane_p16(vgetq_lane_p16(__s2_58, __p3_58), __s0_58, __p1_58); \ | 44063 | __ret_58 = vsetq_lane_u8(vgetq_lane_u8(__s2_58, __p3_58), __s0_58, __p1_58); \ |
| 51765 | __ret_58; \ | 44064 | __ret_58; \ |
| 51766 | }) | 44065 | }) |
| 51767 | #else | 44066 | #else |
| 51768 | #define vcopyq_laneq_p16(__p0_59, __p1_59, __p2_59, __p3_59) __extension__ ({ \ | 44067 | #define vcopyq_laneq_u8(__p0_59, __p1_59, __p2_59, __p3_59) __extension__ ({ \ |
| 51769 | poly16x8_t __s0_59 = __p0_59; \ | 44068 | uint8x16_t __s0_59 = __p0_59; \ |
| 51770 | poly16x8_t __s2_59 = __p2_59; \ | 44069 | uint8x16_t __s2_59 = __p2_59; \ |
| 51771 | poly16x8_t __rev0_59; __rev0_59 = __builtin_shufflevector(__s0_59, __s0_59, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44070 | uint8x16_t __rev0_59; __rev0_59 = __builtin_shufflevector(__s0_59, __s0_59, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51772 | poly16x8_t __rev2_59; __rev2_59 = __builtin_shufflevector(__s2_59, __s2_59, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44071 | uint8x16_t __rev2_59; __rev2_59 = __builtin_shufflevector(__s2_59, __s2_59, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51773 | poly16x8_t __ret_59; \ | 44072 | uint8x16_t __ret_59; \ |
| 51774 | __ret_59 = __noswap_vsetq_lane_p16(__noswap_vgetq_lane_p16(__rev2_59, __p3_59), __rev0_59, __p1_59); \ | 44073 | __ret_59 = __noswap_vsetq_lane_u8(__noswap_vgetq_lane_u8(__rev2_59, __p3_59), __rev0_59, __p1_59); \ |
| 51775 | __ret_59 = __builtin_shufflevector(__ret_59, __ret_59, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44074 | __ret_59 = __builtin_shufflevector(__ret_59, __ret_59, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51776 | __ret_59; \ | 44075 | __ret_59; \ |
| 51777 | }) | 44076 | }) |
| 51778 | #endif | 44077 | #endif |
| 51779 | | 44078 | |
| 51780 | #ifdef __LITTLE_ENDIAN__ | 44079 | #ifdef __LITTLE_ENDIAN__ |
| 51781 | #define vcopyq_laneq_u8(__p0_60, __p1_60, __p2_60, __p3_60) __extension__ ({ \ | 44080 | #define vcopyq_laneq_u32(__p0_60, __p1_60, __p2_60, __p3_60) __extension__ ({ \ |
| 51782 | uint8x16_t __s0_60 = __p0_60; \ | 44081 | uint32x4_t __s0_60 = __p0_60; \ |
| 51783 | uint8x16_t __s2_60 = __p2_60; \ | 44082 | uint32x4_t __s2_60 = __p2_60; \ |
| 51784 | uint8x16_t __ret_60; \ | 44083 | uint32x4_t __ret_60; \ |
| 51785 | __ret_60 = vsetq_lane_u8(vgetq_lane_u8(__s2_60, __p3_60), __s0_60, __p1_60); \ | 44084 | __ret_60 = vsetq_lane_u32(vgetq_lane_u32(__s2_60, __p3_60), __s0_60, __p1_60); \ |
| 51786 | __ret_60; \ | 44085 | __ret_60; \ |
| 51787 | }) | 44086 | }) |
| 51788 | #else | 44087 | #else |
| 51789 | #define vcopyq_laneq_u8(__p0_61, __p1_61, __p2_61, __p3_61) __extension__ ({ \ | 44088 | #define vcopyq_laneq_u32(__p0_61, __p1_61, __p2_61, __p3_61) __extension__ ({ \ |
| 51790 | uint8x16_t __s0_61 = __p0_61; \ | 44089 | uint32x4_t __s0_61 = __p0_61; \ |
| 51791 | uint8x16_t __s2_61 = __p2_61; \ | 44090 | uint32x4_t __s2_61 = __p2_61; \ |
| 51792 | uint8x16_t __rev0_61; __rev0_61 = __builtin_shufflevector(__s0_61, __s0_61, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44091 | uint32x4_t __rev0_61; __rev0_61 = __builtin_shufflevector(__s0_61, __s0_61, 3, 2, 1, 0); \ |
| 51793 | uint8x16_t __rev2_61; __rev2_61 = __builtin_shufflevector(__s2_61, __s2_61, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44092 | uint32x4_t __rev2_61; __rev2_61 = __builtin_shufflevector(__s2_61, __s2_61, 3, 2, 1, 0); \ |
| 51794 | uint8x16_t __ret_61; \ | 44093 | uint32x4_t __ret_61; \ |
| 51795 | __ret_61 = __noswap_vsetq_lane_u8(__noswap_vgetq_lane_u8(__rev2_61, __p3_61), __rev0_61, __p1_61); \ | 44094 | __ret_61 = __noswap_vsetq_lane_u32(__noswap_vgetq_lane_u32(__rev2_61, __p3_61), __rev0_61, __p1_61); \ |
| 51796 | __ret_61 = __builtin_shufflevector(__ret_61, __ret_61, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44095 | __ret_61 = __builtin_shufflevector(__ret_61, __ret_61, 3, 2, 1, 0); \ |
| 51797 | __ret_61; \ | 44096 | __ret_61; \ |
| 51798 | }) | 44097 | }) |
| 51799 | #endif | 44098 | #endif |
| 51800 | | 44099 | |
| 51801 | #ifdef __LITTLE_ENDIAN__ | 44100 | #ifdef __LITTLE_ENDIAN__ |
| 51802 | #define vcopyq_laneq_u32(__p0_62, __p1_62, __p2_62, __p3_62) __extension__ ({ \ | 44101 | #define vcopyq_laneq_u64(__p0_62, __p1_62, __p2_62, __p3_62) __extension__ ({ \ |
| 51803 | uint32x4_t __s0_62 = __p0_62; \ | 44102 | uint64x2_t __s0_62 = __p0_62; \ |
| 51804 | uint32x4_t __s2_62 = __p2_62; \ | 44103 | uint64x2_t __s2_62 = __p2_62; \ |
| 51805 | uint32x4_t __ret_62; \ | 44104 | uint64x2_t __ret_62; \ |
| 51806 | __ret_62 = vsetq_lane_u32(vgetq_lane_u32(__s2_62, __p3_62), __s0_62, __p1_62); \ | 44105 | __ret_62 = vsetq_lane_u64(vgetq_lane_u64(__s2_62, __p3_62), __s0_62, __p1_62); \ |
| 51807 | __ret_62; \ | 44106 | __ret_62; \ |
| 51808 | }) | 44107 | }) |
| 51809 | #else | 44108 | #else |
| 51810 | #define vcopyq_laneq_u32(__p0_63, __p1_63, __p2_63, __p3_63) __extension__ ({ \ | 44109 | #define vcopyq_laneq_u64(__p0_63, __p1_63, __p2_63, __p3_63) __extension__ ({ \ |
| 51811 | uint32x4_t __s0_63 = __p0_63; \ | 44110 | uint64x2_t __s0_63 = __p0_63; \ |
| 51812 | uint32x4_t __s2_63 = __p2_63; \ | 44111 | uint64x2_t __s2_63 = __p2_63; \ |
| 51813 | uint32x4_t __rev0_63; __rev0_63 = __builtin_shufflevector(__s0_63, __s0_63, 3, 2, 1, 0); \ | 44112 | uint64x2_t __rev0_63; __rev0_63 = __builtin_shufflevector(__s0_63, __s0_63, 1, 0); \ |
| 51814 | uint32x4_t __rev2_63; __rev2_63 = __builtin_shufflevector(__s2_63, __s2_63, 3, 2, 1, 0); \ | 44113 | uint64x2_t __rev2_63; __rev2_63 = __builtin_shufflevector(__s2_63, __s2_63, 1, 0); \ |
| 51815 | uint32x4_t __ret_63; \ | 44114 | uint64x2_t __ret_63; \ |
| 51816 | __ret_63 = __noswap_vsetq_lane_u32(__noswap_vgetq_lane_u32(__rev2_63, __p3_63), __rev0_63, __p1_63); \ | 44115 | __ret_63 = __noswap_vsetq_lane_u64(__noswap_vgetq_lane_u64(__rev2_63, __p3_63), __rev0_63, __p1_63); \ |
| 51817 | __ret_63 = __builtin_shufflevector(__ret_63, __ret_63, 3, 2, 1, 0); \ | 44116 | __ret_63 = __builtin_shufflevector(__ret_63, __ret_63, 1, 0); \ |
| 51818 | __ret_63; \ | 44117 | __ret_63; \ |
| 51819 | }) | 44118 | }) |
| 51820 | #endif | 44119 | #endif |
| 51821 | | 44120 | |
| 51822 | #ifdef __LITTLE_ENDIAN__ | 44121 | #ifdef __LITTLE_ENDIAN__ |
| 51823 | #define vcopyq_laneq_u64(__p0_64, __p1_64, __p2_64, __p3_64) __extension__ ({ \ | 44122 | #define vcopyq_laneq_u16(__p0_64, __p1_64, __p2_64, __p3_64) __extension__ ({ \ |
| 51824 | uint64x2_t __s0_64 = __p0_64; \ | 44123 | uint16x8_t __s0_64 = __p0_64; \ |
| 51825 | uint64x2_t __s2_64 = __p2_64; \ | 44124 | uint16x8_t __s2_64 = __p2_64; \ |
| 51826 | uint64x2_t __ret_64; \ | 44125 | uint16x8_t __ret_64; \ |
| 51827 | __ret_64 = vsetq_lane_u64(vgetq_lane_u64(__s2_64, __p3_64), __s0_64, __p1_64); \ | 44126 | __ret_64 = vsetq_lane_u16(vgetq_lane_u16(__s2_64, __p3_64), __s0_64, __p1_64); \ |
| 51828 | __ret_64; \ | 44127 | __ret_64; \ |
| 51829 | }) | 44128 | }) |
| 51830 | #else | 44129 | #else |
| 51831 | #define vcopyq_laneq_u64(__p0_65, __p1_65, __p2_65, __p3_65) __extension__ ({ \ | 44130 | #define vcopyq_laneq_u16(__p0_65, __p1_65, __p2_65, __p3_65) __extension__ ({ \ |
| 51832 | uint64x2_t __s0_65 = __p0_65; \ | 44131 | uint16x8_t __s0_65 = __p0_65; \ |
| 51833 | uint64x2_t __s2_65 = __p2_65; \ | 44132 | uint16x8_t __s2_65 = __p2_65; \ |
| 51834 | uint64x2_t __rev0_65; __rev0_65 = __builtin_shufflevector(__s0_65, __s0_65, 1, 0); \ | 44133 | uint16x8_t __rev0_65; __rev0_65 = __builtin_shufflevector(__s0_65, __s0_65, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51835 | uint64x2_t __rev2_65; __rev2_65 = __builtin_shufflevector(__s2_65, __s2_65, 1, 0); \ | 44134 | uint16x8_t __rev2_65; __rev2_65 = __builtin_shufflevector(__s2_65, __s2_65, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51836 | uint64x2_t __ret_65; \ | 44135 | uint16x8_t __ret_65; \ |
| 51837 | __ret_65 = __noswap_vsetq_lane_u64(__noswap_vgetq_lane_u64(__rev2_65, __p3_65), __rev0_65, __p1_65); \ | 44136 | __ret_65 = __noswap_vsetq_lane_u16(__noswap_vgetq_lane_u16(__rev2_65, __p3_65), __rev0_65, __p1_65); \ |
| 51838 | __ret_65 = __builtin_shufflevector(__ret_65, __ret_65, 1, 0); \ | 44137 | __ret_65 = __builtin_shufflevector(__ret_65, __ret_65, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51839 | __ret_65; \ | 44138 | __ret_65; \ |
| 51840 | }) | 44139 | }) |
| 51841 | #endif | 44140 | #endif |
| 51842 | | 44141 | |
| 51843 | #ifdef __LITTLE_ENDIAN__ | 44142 | #ifdef __LITTLE_ENDIAN__ |
| 51844 | #define vcopyq_laneq_u16(__p0_66, __p1_66, __p2_66, __p3_66) __extension__ ({ \ | 44143 | #define vcopyq_laneq_s8(__p0_66, __p1_66, __p2_66, __p3_66) __extension__ ({ \ |
| 51845 | uint16x8_t __s0_66 = __p0_66; \ | 44144 | int8x16_t __s0_66 = __p0_66; \ |
| 51846 | uint16x8_t __s2_66 = __p2_66; \ | 44145 | int8x16_t __s2_66 = __p2_66; \ |
| 51847 | uint16x8_t __ret_66; \ | 44146 | int8x16_t __ret_66; \ |
| 51848 | __ret_66 = vsetq_lane_u16(vgetq_lane_u16(__s2_66, __p3_66), __s0_66, __p1_66); \ | 44147 | __ret_66 = vsetq_lane_s8(vgetq_lane_s8(__s2_66, __p3_66), __s0_66, __p1_66); \ |
| 51849 | __ret_66; \ | 44148 | __ret_66; \ |
| 51850 | }) | 44149 | }) |
| 51851 | #else | 44150 | #else |
| 51852 | #define vcopyq_laneq_u16(__p0_67, __p1_67, __p2_67, __p3_67) __extension__ ({ \ | 44151 | #define vcopyq_laneq_s8(__p0_67, __p1_67, __p2_67, __p3_67) __extension__ ({ \ |
| 51853 | uint16x8_t __s0_67 = __p0_67; \ | 44152 | int8x16_t __s0_67 = __p0_67; \ |
| 51854 | uint16x8_t __s2_67 = __p2_67; \ | 44153 | int8x16_t __s2_67 = __p2_67; \ |
| 51855 | uint16x8_t __rev0_67; __rev0_67 = __builtin_shufflevector(__s0_67, __s0_67, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44154 | int8x16_t __rev0_67; __rev0_67 = __builtin_shufflevector(__s0_67, __s0_67, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51856 | uint16x8_t __rev2_67; __rev2_67 = __builtin_shufflevector(__s2_67, __s2_67, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44155 | int8x16_t __rev2_67; __rev2_67 = __builtin_shufflevector(__s2_67, __s2_67, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51857 | uint16x8_t __ret_67; \ | 44156 | int8x16_t __ret_67; \ |
| 51858 | __ret_67 = __noswap_vsetq_lane_u16(__noswap_vgetq_lane_u16(__rev2_67, __p3_67), __rev0_67, __p1_67); \ | 44157 | __ret_67 = __noswap_vsetq_lane_s8(__noswap_vgetq_lane_s8(__rev2_67, __p3_67), __rev0_67, __p1_67); \ |
| 51859 | __ret_67 = __builtin_shufflevector(__ret_67, __ret_67, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44158 | __ret_67 = __builtin_shufflevector(__ret_67, __ret_67, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51860 | __ret_67; \ | 44159 | __ret_67; \ |
| 51861 | }) | 44160 | }) |
| 51862 | #endif | 44161 | #endif |
| 51863 | | 44162 | |
| 51864 | #ifdef __LITTLE_ENDIAN__ | 44163 | #ifdef __LITTLE_ENDIAN__ |
| 51865 | #define vcopyq_laneq_s8(__p0_68, __p1_68, __p2_68, __p3_68) __extension__ ({ \ | 44164 | #define vcopyq_laneq_f32(__p0_68, __p1_68, __p2_68, __p3_68) __extension__ ({ \ |
| 51866 | int8x16_t __s0_68 = __p0_68; \ | 44165 | float32x4_t __s0_68 = __p0_68; \ |
| 51867 | int8x16_t __s2_68 = __p2_68; \ | 44166 | float32x4_t __s2_68 = __p2_68; \ |
| 51868 | int8x16_t __ret_68; \ | 44167 | float32x4_t __ret_68; \ |
| 51869 | __ret_68 = vsetq_lane_s8(vgetq_lane_s8(__s2_68, __p3_68), __s0_68, __p1_68); \ | 44168 | __ret_68 = vsetq_lane_f32(vgetq_lane_f32(__s2_68, __p3_68), __s0_68, __p1_68); \ |
| 51870 | __ret_68; \ | 44169 | __ret_68; \ |
| 51871 | }) | 44170 | }) |
| 51872 | #else | 44171 | #else |
| 51873 | #define vcopyq_laneq_s8(__p0_69, __p1_69, __p2_69, __p3_69) __extension__ ({ \ | 44172 | #define vcopyq_laneq_f32(__p0_69, __p1_69, __p2_69, __p3_69) __extension__ ({ \ |
| 51874 | int8x16_t __s0_69 = __p0_69; \ | 44173 | float32x4_t __s0_69 = __p0_69; \ |
| 51875 | int8x16_t __s2_69 = __p2_69; \ | 44174 | float32x4_t __s2_69 = __p2_69; \ |
| 51876 | int8x16_t __rev0_69; __rev0_69 = __builtin_shufflevector(__s0_69, __s0_69, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44175 | float32x4_t __rev0_69; __rev0_69 = __builtin_shufflevector(__s0_69, __s0_69, 3, 2, 1, 0); \ |
| 51877 | int8x16_t __rev2_69; __rev2_69 = __builtin_shufflevector(__s2_69, __s2_69, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44176 | float32x4_t __rev2_69; __rev2_69 = __builtin_shufflevector(__s2_69, __s2_69, 3, 2, 1, 0); \ |
| 51878 | int8x16_t __ret_69; \ | 44177 | float32x4_t __ret_69; \ |
| 51879 | __ret_69 = __noswap_vsetq_lane_s8(__noswap_vgetq_lane_s8(__rev2_69, __p3_69), __rev0_69, __p1_69); \ | 44178 | __ret_69 = __noswap_vsetq_lane_f32(__noswap_vgetq_lane_f32(__rev2_69, __p3_69), __rev0_69, __p1_69); \ |
| 51880 | __ret_69 = __builtin_shufflevector(__ret_69, __ret_69, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44179 | __ret_69 = __builtin_shufflevector(__ret_69, __ret_69, 3, 2, 1, 0); \ |
| 51881 | __ret_69; \ | 44180 | __ret_69; \ |
| 51882 | }) | 44181 | }) |
| 51883 | #endif | 44182 | #endif |
| 51884 | | 44183 | |
| 51885 | #ifdef __LITTLE_ENDIAN__ | 44184 | #ifdef __LITTLE_ENDIAN__ |
| 51886 | #define vcopyq_laneq_f32(__p0_70, __p1_70, __p2_70, __p3_70) __extension__ ({ \ | 44185 | #define vcopyq_laneq_s32(__p0_70, __p1_70, __p2_70, __p3_70) __extension__ ({ \ |
| 51887 | float32x4_t __s0_70 = __p0_70; \ | 44186 | int32x4_t __s0_70 = __p0_70; \ |
| 51888 | float32x4_t __s2_70 = __p2_70; \ | 44187 | int32x4_t __s2_70 = __p2_70; \ |
| 51889 | float32x4_t __ret_70; \ | 44188 | int32x4_t __ret_70; \ |
| 51890 | __ret_70 = vsetq_lane_f32(vgetq_lane_f32(__s2_70, __p3_70), __s0_70, __p1_70); \ | 44189 | __ret_70 = vsetq_lane_s32(vgetq_lane_s32(__s2_70, __p3_70), __s0_70, __p1_70); \ |
| 51891 | __ret_70; \ | 44190 | __ret_70; \ |
| 51892 | }) | 44191 | }) |
| 51893 | #else | 44192 | #else |
| 51894 | #define vcopyq_laneq_f32(__p0_71, __p1_71, __p2_71, __p3_71) __extension__ ({ \ | 44193 | #define vcopyq_laneq_s32(__p0_71, __p1_71, __p2_71, __p3_71) __extension__ ({ \ |
| 51895 | float32x4_t __s0_71 = __p0_71; \ | 44194 | int32x4_t __s0_71 = __p0_71; \ |
| 51896 | float32x4_t __s2_71 = __p2_71; \ | 44195 | int32x4_t __s2_71 = __p2_71; \ |
| 51897 | float32x4_t __rev0_71; __rev0_71 = __builtin_shufflevector(__s0_71, __s0_71, 3, 2, 1, 0); \ | 44196 | int32x4_t __rev0_71; __rev0_71 = __builtin_shufflevector(__s0_71, __s0_71, 3, 2, 1, 0); \ |
| 51898 | float32x4_t __rev2_71; __rev2_71 = __builtin_shufflevector(__s2_71, __s2_71, 3, 2, 1, 0); \ | 44197 | int32x4_t __rev2_71; __rev2_71 = __builtin_shufflevector(__s2_71, __s2_71, 3, 2, 1, 0); \ |
| 51899 | float32x4_t __ret_71; \ | 44198 | int32x4_t __ret_71; \ |
| 51900 | __ret_71 = __noswap_vsetq_lane_f32(__noswap_vgetq_lane_f32(__rev2_71, __p3_71), __rev0_71, __p1_71); \ | 44199 | __ret_71 = __noswap_vsetq_lane_s32(__noswap_vgetq_lane_s32(__rev2_71, __p3_71), __rev0_71, __p1_71); \ |
| 51901 | __ret_71 = __builtin_shufflevector(__ret_71, __ret_71, 3, 2, 1, 0); \ | 44200 | __ret_71 = __builtin_shufflevector(__ret_71, __ret_71, 3, 2, 1, 0); \ |
| 51902 | __ret_71; \ | 44201 | __ret_71; \ |
| 51903 | }) | 44202 | }) |
| 51904 | #endif | 44203 | #endif |
| 51905 | | 44204 | |
| 51906 | #ifdef __LITTLE_ENDIAN__ | 44205 | #ifdef __LITTLE_ENDIAN__ |
| 51907 | #define vcopyq_laneq_s32(__p0_72, __p1_72, __p2_72, __p3_72) __extension__ ({ \ | 44206 | #define vcopyq_laneq_s64(__p0_72, __p1_72, __p2_72, __p3_72) __extension__ ({ \ |
| 51908 | int32x4_t __s0_72 = __p0_72; \ | 44207 | int64x2_t __s0_72 = __p0_72; \ |
| 51909 | int32x4_t __s2_72 = __p2_72; \ | 44208 | int64x2_t __s2_72 = __p2_72; \ |
| 51910 | int32x4_t __ret_72; \ | 44209 | int64x2_t __ret_72; \ |
| 51911 | __ret_72 = vsetq_lane_s32(vgetq_lane_s32(__s2_72, __p3_72), __s0_72, __p1_72); \ | 44210 | __ret_72 = vsetq_lane_s64(vgetq_lane_s64(__s2_72, __p3_72), __s0_72, __p1_72); \ |
| 51912 | __ret_72; \ | 44211 | __ret_72; \ |
| 51913 | }) | 44212 | }) |
| 51914 | #else | 44213 | #else |
| 51915 | #define vcopyq_laneq_s32(__p0_73, __p1_73, __p2_73, __p3_73) __extension__ ({ \ | 44214 | #define vcopyq_laneq_s64(__p0_73, __p1_73, __p2_73, __p3_73) __extension__ ({ \ |
| 51916 | int32x4_t __s0_73 = __p0_73; \ | 44215 | int64x2_t __s0_73 = __p0_73; \ |
| 51917 | int32x4_t __s2_73 = __p2_73; \ | 44216 | int64x2_t __s2_73 = __p2_73; \ |
| 51918 | int32x4_t __rev0_73; __rev0_73 = __builtin_shufflevector(__s0_73, __s0_73, 3, 2, 1, 0); \ | 44217 | int64x2_t __rev0_73; __rev0_73 = __builtin_shufflevector(__s0_73, __s0_73, 1, 0); \ |
| 51919 | int32x4_t __rev2_73; __rev2_73 = __builtin_shufflevector(__s2_73, __s2_73, 3, 2, 1, 0); \ | 44218 | int64x2_t __rev2_73; __rev2_73 = __builtin_shufflevector(__s2_73, __s2_73, 1, 0); \ |
| 51920 | int32x4_t __ret_73; \ | 44219 | int64x2_t __ret_73; \ |
| 51921 | __ret_73 = __noswap_vsetq_lane_s32(__noswap_vgetq_lane_s32(__rev2_73, __p3_73), __rev0_73, __p1_73); \ | 44220 | __ret_73 = __noswap_vsetq_lane_s64(__noswap_vgetq_lane_s64(__rev2_73, __p3_73), __rev0_73, __p1_73); \ |
| 51922 | __ret_73 = __builtin_shufflevector(__ret_73, __ret_73, 3, 2, 1, 0); \ | 44221 | __ret_73 = __builtin_shufflevector(__ret_73, __ret_73, 1, 0); \ |
| 51923 | __ret_73; \ | 44222 | __ret_73; \ |
| 51924 | }) | 44223 | }) |
| 51925 | #endif | 44224 | #endif |
| 51926 | | 44225 | |
| 51927 | #ifdef __LITTLE_ENDIAN__ | 44226 | #ifdef __LITTLE_ENDIAN__ |
| 51928 | #define vcopyq_laneq_s64(__p0_74, __p1_74, __p2_74, __p3_74) __extension__ ({ \ | 44227 | #define vcopyq_laneq_s16(__p0_74, __p1_74, __p2_74, __p3_74) __extension__ ({ \ |
| 51929 | int64x2_t __s0_74 = __p0_74; \ | 44228 | int16x8_t __s0_74 = __p0_74; \ |
| 51930 | int64x2_t __s2_74 = __p2_74; \ | 44229 | int16x8_t __s2_74 = __p2_74; \ |
| 51931 | int64x2_t __ret_74; \ | 44230 | int16x8_t __ret_74; \ |
| 51932 | __ret_74 = vsetq_lane_s64(vgetq_lane_s64(__s2_74, __p3_74), __s0_74, __p1_74); \ | 44231 | __ret_74 = vsetq_lane_s16(vgetq_lane_s16(__s2_74, __p3_74), __s0_74, __p1_74); \ |
| 51933 | __ret_74; \ | 44232 | __ret_74; \ |
| 51934 | }) | 44233 | }) |
| 51935 | #else | 44234 | #else |
| 51936 | #define vcopyq_laneq_s64(__p0_75, __p1_75, __p2_75, __p3_75) __extension__ ({ \ | 44235 | #define vcopyq_laneq_s16(__p0_75, __p1_75, __p2_75, __p3_75) __extension__ ({ \ |
| 51937 | int64x2_t __s0_75 = __p0_75; \ | 44236 | int16x8_t __s0_75 = __p0_75; \ |
| 51938 | int64x2_t __s2_75 = __p2_75; \ | 44237 | int16x8_t __s2_75 = __p2_75; \ |
| 51939 | int64x2_t __rev0_75; __rev0_75 = __builtin_shufflevector(__s0_75, __s0_75, 1, 0); \ | 44238 | int16x8_t __rev0_75; __rev0_75 = __builtin_shufflevector(__s0_75, __s0_75, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51940 | int64x2_t __rev2_75; __rev2_75 = __builtin_shufflevector(__s2_75, __s2_75, 1, 0); \ | 44239 | int16x8_t __rev2_75; __rev2_75 = __builtin_shufflevector(__s2_75, __s2_75, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51941 | int64x2_t __ret_75; \ | 44240 | int16x8_t __ret_75; \ |
| 51942 | __ret_75 = __noswap_vsetq_lane_s64(__noswap_vgetq_lane_s64(__rev2_75, __p3_75), __rev0_75, __p1_75); \ | 44241 | __ret_75 = __noswap_vsetq_lane_s16(__noswap_vgetq_lane_s16(__rev2_75, __p3_75), __rev0_75, __p1_75); \ |
| 51943 | __ret_75 = __builtin_shufflevector(__ret_75, __ret_75, 1, 0); \ | 44242 | __ret_75 = __builtin_shufflevector(__ret_75, __ret_75, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51944 | __ret_75; \ | 44243 | __ret_75; \ |
| 51945 | }) | 44244 | }) |
| 51946 | #endif | 44245 | #endif |
| 51947 | | 44246 | |
| 51948 | #ifdef __LITTLE_ENDIAN__ | 44247 | #ifdef __LITTLE_ENDIAN__ |
| 51949 | #define vcopyq_laneq_s16(__p0_76, __p1_76, __p2_76, __p3_76) __extension__ ({ \ | 44248 | #define vcopy_laneq_p8(__p0_76, __p1_76, __p2_76, __p3_76) __extension__ ({ \ |
| 51950 | int16x8_t __s0_76 = __p0_76; \ | 44249 | poly8x8_t __s0_76 = __p0_76; \ |
| 51951 | int16x8_t __s2_76 = __p2_76; \ | 44250 | poly8x16_t __s2_76 = __p2_76; \ |
| 51952 | int16x8_t __ret_76; \ | 44251 | poly8x8_t __ret_76; \ |
| 51953 | __ret_76 = vsetq_lane_s16(vgetq_lane_s16(__s2_76, __p3_76), __s0_76, __p1_76); \ | 44252 | __ret_76 = vset_lane_p8(vgetq_lane_p8(__s2_76, __p3_76), __s0_76, __p1_76); \ |
| 51954 | __ret_76; \ | 44253 | __ret_76; \ |
| 51955 | }) | 44254 | }) |
| 51956 | #else | 44255 | #else |
| 51957 | #define vcopyq_laneq_s16(__p0_77, __p1_77, __p2_77, __p3_77) __extension__ ({ \ | 44256 | #define vcopy_laneq_p8(__p0_77, __p1_77, __p2_77, __p3_77) __extension__ ({ \ |
| 51958 | int16x8_t __s0_77 = __p0_77; \ | 44257 | poly8x8_t __s0_77 = __p0_77; \ |
| 51959 | int16x8_t __s2_77 = __p2_77; \ | 44258 | poly8x16_t __s2_77 = __p2_77; \ |
| 51960 | int16x8_t __rev0_77; __rev0_77 = __builtin_shufflevector(__s0_77, __s0_77, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44259 | poly8x8_t __rev0_77; __rev0_77 = __builtin_shufflevector(__s0_77, __s0_77, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51961 | int16x8_t __rev2_77; __rev2_77 = __builtin_shufflevector(__s2_77, __s2_77, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44260 | poly8x16_t __rev2_77; __rev2_77 = __builtin_shufflevector(__s2_77, __s2_77, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51962 | int16x8_t __ret_77; \ | 44261 | poly8x8_t __ret_77; \ |
| 51963 | __ret_77 = __noswap_vsetq_lane_s16(__noswap_vgetq_lane_s16(__rev2_77, __p3_77), __rev0_77, __p1_77); \ | 44262 | __ret_77 = __noswap_vset_lane_p8(__noswap_vgetq_lane_p8(__rev2_77, __p3_77), __rev0_77, __p1_77); \ |
| 51964 | __ret_77 = __builtin_shufflevector(__ret_77, __ret_77, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44263 | __ret_77 = __builtin_shufflevector(__ret_77, __ret_77, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51965 | __ret_77; \ | 44264 | __ret_77; \ |
| 51966 | }) | 44265 | }) |
| 51967 | #endif | 44266 | #endif |
| 51968 | | 44267 | |
| 51969 | #ifdef __LITTLE_ENDIAN__ | 44268 | #ifdef __LITTLE_ENDIAN__ |
| 51970 | #define vcopy_laneq_p8(__p0_78, __p1_78, __p2_78, __p3_78) __extension__ ({ \ | 44269 | #define vcopy_laneq_p16(__p0_78, __p1_78, __p2_78, __p3_78) __extension__ ({ \ |
| 51971 | poly8x8_t __s0_78 = __p0_78; \ | 44270 | poly16x4_t __s0_78 = __p0_78; \ |
| 51972 | poly8x16_t __s2_78 = __p2_78; \ | 44271 | poly16x8_t __s2_78 = __p2_78; \ |
| 51973 | poly8x8_t __ret_78; \ | 44272 | poly16x4_t __ret_78; \ |
| 51974 | __ret_78 = vset_lane_p8(vgetq_lane_p8(__s2_78, __p3_78), __s0_78, __p1_78); \ | 44273 | __ret_78 = vset_lane_p16(vgetq_lane_p16(__s2_78, __p3_78), __s0_78, __p1_78); \ |
| 51975 | __ret_78; \ | 44274 | __ret_78; \ |
| 51976 | }) | 44275 | }) |
| 51977 | #else | 44276 | #else |
| 51978 | #define vcopy_laneq_p8(__p0_79, __p1_79, __p2_79, __p3_79) __extension__ ({ \ | 44277 | #define vcopy_laneq_p16(__p0_79, __p1_79, __p2_79, __p3_79) __extension__ ({ \ |
| 51979 | poly8x8_t __s0_79 = __p0_79; \ | 44278 | poly16x4_t __s0_79 = __p0_79; \ |
| 51980 | poly8x16_t __s2_79 = __p2_79; \ | 44279 | poly16x8_t __s2_79 = __p2_79; \ |
| 51981 | poly8x8_t __rev0_79; __rev0_79 = __builtin_shufflevector(__s0_79, __s0_79, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44280 | poly16x4_t __rev0_79; __rev0_79 = __builtin_shufflevector(__s0_79, __s0_79, 3, 2, 1, 0); \ |
| 51982 | poly8x16_t __rev2_79; __rev2_79 = __builtin_shufflevector(__s2_79, __s2_79, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44281 | poly16x8_t __rev2_79; __rev2_79 = __builtin_shufflevector(__s2_79, __s2_79, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51983 | poly8x8_t __ret_79; \ | 44282 | poly16x4_t __ret_79; \ |
| 51984 | __ret_79 = __noswap_vset_lane_p8(__noswap_vgetq_lane_p8(__rev2_79, __p3_79), __rev0_79, __p1_79); \ | 44283 | __ret_79 = __noswap_vset_lane_p16(__noswap_vgetq_lane_p16(__rev2_79, __p3_79), __rev0_79, __p1_79); \ |
| 51985 | __ret_79 = __builtin_shufflevector(__ret_79, __ret_79, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44284 | __ret_79 = __builtin_shufflevector(__ret_79, __ret_79, 3, 2, 1, 0); \ |
| 51986 | __ret_79; \ | 44285 | __ret_79; \ |
| 51987 | }) | 44286 | }) |
| 51988 | #endif | 44287 | #endif |
| 51989 | | 44288 | |
| 51990 | #ifdef __LITTLE_ENDIAN__ | 44289 | #ifdef __LITTLE_ENDIAN__ |
| 51991 | #define vcopy_laneq_p16(__p0_80, __p1_80, __p2_80, __p3_80) __extension__ ({ \ | 44290 | #define vcopy_laneq_u8(__p0_80, __p1_80, __p2_80, __p3_80) __extension__ ({ \ |
| 51992 | poly16x4_t __s0_80 = __p0_80; \ | 44291 | uint8x8_t __s0_80 = __p0_80; \ |
| 51993 | poly16x8_t __s2_80 = __p2_80; \ | 44292 | uint8x16_t __s2_80 = __p2_80; \ |
| 51994 | poly16x4_t __ret_80; \ | 44293 | uint8x8_t __ret_80; \ |
| 51995 | __ret_80 = vset_lane_p16(vgetq_lane_p16(__s2_80, __p3_80), __s0_80, __p1_80); \ | 44294 | __ret_80 = vset_lane_u8(vgetq_lane_u8(__s2_80, __p3_80), __s0_80, __p1_80); \ |
| 51996 | __ret_80; \ | 44295 | __ret_80; \ |
| 51997 | }) | 44296 | }) |
| 51998 | #else | 44297 | #else |
| 51999 | #define vcopy_laneq_p16(__p0_81, __p1_81, __p2_81, __p3_81) __extension__ ({ \ | 44298 | #define vcopy_laneq_u8(__p0_81, __p1_81, __p2_81, __p3_81) __extension__ ({ \ |
| 52000 | poly16x4_t __s0_81 = __p0_81; \ | 44299 | uint8x8_t __s0_81 = __p0_81; \ |
| 52001 | poly16x8_t __s2_81 = __p2_81; \ | 44300 | uint8x16_t __s2_81 = __p2_81; \ |
| 52002 | poly16x4_t __rev0_81; __rev0_81 = __builtin_shufflevector(__s0_81, __s0_81, 3, 2, 1, 0); \ | 44301 | uint8x8_t __rev0_81; __rev0_81 = __builtin_shufflevector(__s0_81, __s0_81, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52003 | poly16x8_t __rev2_81; __rev2_81 = __builtin_shufflevector(__s2_81, __s2_81, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44302 | uint8x16_t __rev2_81; __rev2_81 = __builtin_shufflevector(__s2_81, __s2_81, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52004 | poly16x4_t __ret_81; \ | 44303 | uint8x8_t __ret_81; \ |
| 52005 | __ret_81 = __noswap_vset_lane_p16(__noswap_vgetq_lane_p16(__rev2_81, __p3_81), __rev0_81, __p1_81); \ | 44304 | __ret_81 = __noswap_vset_lane_u8(__noswap_vgetq_lane_u8(__rev2_81, __p3_81), __rev0_81, __p1_81); \ |
| 52006 | __ret_81 = __builtin_shufflevector(__ret_81, __ret_81, 3, 2, 1, 0); \ | 44305 | __ret_81 = __builtin_shufflevector(__ret_81, __ret_81, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52007 | __ret_81; \ | 44306 | __ret_81; \ |
| 52008 | }) | 44307 | }) |
| 52009 | #endif | 44308 | #endif |
| 52010 | | 44309 | |
| 52011 | #ifdef __LITTLE_ENDIAN__ | 44310 | #ifdef __LITTLE_ENDIAN__ |
| 52012 | #define vcopy_laneq_u8(__p0_82, __p1_82, __p2_82, __p3_82) __extension__ ({ \ | 44311 | #define vcopy_laneq_u32(__p0_82, __p1_82, __p2_82, __p3_82) __extension__ ({ \ |
| 52013 | uint8x8_t __s0_82 = __p0_82; \ | 44312 | uint32x2_t __s0_82 = __p0_82; \ |
| 52014 | uint8x16_t __s2_82 = __p2_82; \ | 44313 | uint32x4_t __s2_82 = __p2_82; \ |
| 52015 | uint8x8_t __ret_82; \ | 44314 | uint32x2_t __ret_82; \ |
| 52016 | __ret_82 = vset_lane_u8(vgetq_lane_u8(__s2_82, __p3_82), __s0_82, __p1_82); \ | 44315 | __ret_82 = vset_lane_u32(vgetq_lane_u32(__s2_82, __p3_82), __s0_82, __p1_82); \ |
| 52017 | __ret_82; \ | 44316 | __ret_82; \ |
| 52018 | }) | 44317 | }) |
| 52019 | #else | 44318 | #else |
| 52020 | #define vcopy_laneq_u8(__p0_83, __p1_83, __p2_83, __p3_83) __extension__ ({ \ | 44319 | #define vcopy_laneq_u32(__p0_83, __p1_83, __p2_83, __p3_83) __extension__ ({ \ |
| 52021 | uint8x8_t __s0_83 = __p0_83; \ | 44320 | uint32x2_t __s0_83 = __p0_83; \ |
| 52022 | uint8x16_t __s2_83 = __p2_83; \ | 44321 | uint32x4_t __s2_83 = __p2_83; \ |
| 52023 | uint8x8_t __rev0_83; __rev0_83 = __builtin_shufflevector(__s0_83, __s0_83, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44322 | uint32x2_t __rev0_83; __rev0_83 = __builtin_shufflevector(__s0_83, __s0_83, 1, 0); \ |
| 52024 | uint8x16_t __rev2_83; __rev2_83 = __builtin_shufflevector(__s2_83, __s2_83, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44323 | uint32x4_t __rev2_83; __rev2_83 = __builtin_shufflevector(__s2_83, __s2_83, 3, 2, 1, 0); \ |
| 52025 | uint8x8_t __ret_83; \ | 44324 | uint32x2_t __ret_83; \ |
| 52026 | __ret_83 = __noswap_vset_lane_u8(__noswap_vgetq_lane_u8(__rev2_83, __p3_83), __rev0_83, __p1_83); \ | 44325 | __ret_83 = __noswap_vset_lane_u32(__noswap_vgetq_lane_u32(__rev2_83, __p3_83), __rev0_83, __p1_83); \ |
| 52027 | __ret_83 = __builtin_shufflevector(__ret_83, __ret_83, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44326 | __ret_83 = __builtin_shufflevector(__ret_83, __ret_83, 1, 0); \ |
| 52028 | __ret_83; \ | 44327 | __ret_83; \ |
| 52029 | }) | 44328 | }) |
| 52030 | #endif | 44329 | #endif |
| 52031 | | 44330 | |
| 52032 | #ifdef __LITTLE_ENDIAN__ | 44331 | #ifdef __LITTLE_ENDIAN__ |
| 52033 | #define vcopy_laneq_u32(__p0_84, __p1_84, __p2_84, __p3_84) __extension__ ({ \ | 44332 | #define vcopy_laneq_u64(__p0_84, __p1_84, __p2_84, __p3_84) __extension__ ({ \ |
| 52034 | uint32x2_t __s0_84 = __p0_84; \ | 44333 | uint64x1_t __s0_84 = __p0_84; \ |
| 52035 | uint32x4_t __s2_84 = __p2_84; \ | 44334 | uint64x2_t __s2_84 = __p2_84; \ |
| 52036 | uint32x2_t __ret_84; \ | 44335 | uint64x1_t __ret_84; \ |
| 52037 | __ret_84 = vset_lane_u32(vgetq_lane_u32(__s2_84, __p3_84), __s0_84, __p1_84); \ | 44336 | __ret_84 = vset_lane_u64(vgetq_lane_u64(__s2_84, __p3_84), __s0_84, __p1_84); \ |
| 52038 | __ret_84; \ | 44337 | __ret_84; \ |
| 52039 | }) | 44338 | }) |
| 52040 | #else | 44339 | #else |
| 52041 | #define vcopy_laneq_u32(__p0_85, __p1_85, __p2_85, __p3_85) __extension__ ({ \ | 44340 | #define vcopy_laneq_u64(__p0_85, __p1_85, __p2_85, __p3_85) __extension__ ({ \ |
| 52042 | uint32x2_t __s0_85 = __p0_85; \ | 44341 | uint64x1_t __s0_85 = __p0_85; \ |
| 52043 | uint32x4_t __s2_85 = __p2_85; \ | 44342 | uint64x2_t __s2_85 = __p2_85; \ |
| 52044 | uint32x2_t __rev0_85; __rev0_85 = __builtin_shufflevector(__s0_85, __s0_85, 1, 0); \ | 44343 | uint64x2_t __rev2_85; __rev2_85 = __builtin_shufflevector(__s2_85, __s2_85, 1, 0); \ |
| 52045 | uint32x4_t __rev2_85; __rev2_85 = __builtin_shufflevector(__s2_85, __s2_85, 3, 2, 1, 0); \ | 44344 | uint64x1_t __ret_85; \ |
| 52046 | uint32x2_t __ret_85; \ | 44345 | __ret_85 = vset_lane_u64(__noswap_vgetq_lane_u64(__rev2_85, __p3_85), __s0_85, __p1_85); \ |
| 52047 | __ret_85 = __noswap_vset_lane_u32(__noswap_vgetq_lane_u32(__rev2_85, __p3_85), __rev0_85, __p1_85); \ | | |
| 52048 | __ret_85 = __builtin_shufflevector(__ret_85, __ret_85, 1, 0); \ | | |
| 52049 | __ret_85; \ | 44346 | __ret_85; \ |
| 52050 | }) | 44347 | }) |
| 52051 | #endif | 44348 | #endif |
| 52052 | | 44349 | |
| 52053 | #ifdef __LITTLE_ENDIAN__ | 44350 | #ifdef __LITTLE_ENDIAN__ |
| 52054 | #define vcopy_laneq_u64(__p0_86, __p1_86, __p2_86, __p3_86) __extension__ ({ \ | 44351 | #define vcopy_laneq_u16(__p0_86, __p1_86, __p2_86, __p3_86) __extension__ ({ \ |
| 52055 | uint64x1_t __s0_86 = __p0_86; \ | 44352 | uint16x4_t __s0_86 = __p0_86; \ |
| 52056 | uint64x2_t __s2_86 = __p2_86; \ | 44353 | uint16x8_t __s2_86 = __p2_86; \ |
| 52057 | uint64x1_t __ret_86; \ | 44354 | uint16x4_t __ret_86; \ |
| 52058 | __ret_86 = vset_lane_u64(vgetq_lane_u64(__s2_86, __p3_86), __s0_86, __p1_86); \ | 44355 | __ret_86 = vset_lane_u16(vgetq_lane_u16(__s2_86, __p3_86), __s0_86, __p1_86); \ |
| 52059 | __ret_86; \ | 44356 | __ret_86; \ |
| 52060 | }) | 44357 | }) |
| 52061 | #else | 44358 | #else |
| 52062 | #define vcopy_laneq_u64(__p0_87, __p1_87, __p2_87, __p3_87) __extension__ ({ \ | 44359 | #define vcopy_laneq_u16(__p0_87, __p1_87, __p2_87, __p3_87) __extension__ ({ \ |
| 52063 | uint64x1_t __s0_87 = __p0_87; \ | 44360 | uint16x4_t __s0_87 = __p0_87; \ |
| 52064 | uint64x2_t __s2_87 = __p2_87; \ | 44361 | uint16x8_t __s2_87 = __p2_87; \ |
| 52065 | uint64x2_t __rev2_87; __rev2_87 = __builtin_shufflevector(__s2_87, __s2_87, 1, 0); \ | 44362 | uint16x4_t __rev0_87; __rev0_87 = __builtin_shufflevector(__s0_87, __s0_87, 3, 2, 1, 0); \ |
| 52066 | uint64x1_t __ret_87; \ | 44363 | uint16x8_t __rev2_87; __rev2_87 = __builtin_shufflevector(__s2_87, __s2_87, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52067 | __ret_87 = __noswap_vset_lane_u64(__noswap_vgetq_lane_u64(__rev2_87, __p3_87), __s0_87, __p1_87); \ | 44364 | uint16x4_t __ret_87; \ |
| | 44365 | __ret_87 = __noswap_vset_lane_u16(__noswap_vgetq_lane_u16(__rev2_87, __p3_87), __rev0_87, __p1_87); \ |
| | 44366 | __ret_87 = __builtin_shufflevector(__ret_87, __ret_87, 3, 2, 1, 0); \ |
| 52068 | __ret_87; \ | 44367 | __ret_87; \ |
| 52069 | }) | 44368 | }) |
| 52070 | #endif | 44369 | #endif |
| 52071 | | 44370 | |
| 52072 | #ifdef __LITTLE_ENDIAN__ | 44371 | #ifdef __LITTLE_ENDIAN__ |
| 52073 | #define vcopy_laneq_u16(__p0_88, __p1_88, __p2_88, __p3_88) __extension__ ({ \ | 44372 | #define vcopy_laneq_s8(__p0_88, __p1_88, __p2_88, __p3_88) __extension__ ({ \ |
| 52074 | uint16x4_t __s0_88 = __p0_88; \ | 44373 | int8x8_t __s0_88 = __p0_88; \ |
| 52075 | uint16x8_t __s2_88 = __p2_88; \ | 44374 | int8x16_t __s2_88 = __p2_88; \ |
| 52076 | uint16x4_t __ret_88; \ | 44375 | int8x8_t __ret_88; \ |
| 52077 | __ret_88 = vset_lane_u16(vgetq_lane_u16(__s2_88, __p3_88), __s0_88, __p1_88); \ | 44376 | __ret_88 = vset_lane_s8(vgetq_lane_s8(__s2_88, __p3_88), __s0_88, __p1_88); \ |
| 52078 | __ret_88; \ | 44377 | __ret_88; \ |
| 52079 | }) | 44378 | }) |
| 52080 | #else | 44379 | #else |
| 52081 | #define vcopy_laneq_u16(__p0_89, __p1_89, __p2_89, __p3_89) __extension__ ({ \ | 44380 | #define vcopy_laneq_s8(__p0_89, __p1_89, __p2_89, __p3_89) __extension__ ({ \ |
| 52082 | uint16x4_t __s0_89 = __p0_89; \ | 44381 | int8x8_t __s0_89 = __p0_89; \ |
| 52083 | uint16x8_t __s2_89 = __p2_89; \ | 44382 | int8x16_t __s2_89 = __p2_89; \ |
| 52084 | uint16x4_t __rev0_89; __rev0_89 = __builtin_shufflevector(__s0_89, __s0_89, 3, 2, 1, 0); \ | 44383 | int8x8_t __rev0_89; __rev0_89 = __builtin_shufflevector(__s0_89, __s0_89, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52085 | uint16x8_t __rev2_89; __rev2_89 = __builtin_shufflevector(__s2_89, __s2_89, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44384 | int8x16_t __rev2_89; __rev2_89 = __builtin_shufflevector(__s2_89, __s2_89, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52086 | uint16x4_t __ret_89; \ | 44385 | int8x8_t __ret_89; \ |
| 52087 | __ret_89 = __noswap_vset_lane_u16(__noswap_vgetq_lane_u16(__rev2_89, __p3_89), __rev0_89, __p1_89); \ | 44386 | __ret_89 = __noswap_vset_lane_s8(__noswap_vgetq_lane_s8(__rev2_89, __p3_89), __rev0_89, __p1_89); \ |
| 52088 | __ret_89 = __builtin_shufflevector(__ret_89, __ret_89, 3, 2, 1, 0); \ | 44387 | __ret_89 = __builtin_shufflevector(__ret_89, __ret_89, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52089 | __ret_89; \ | 44388 | __ret_89; \ |
| 52090 | }) | 44389 | }) |
| 52091 | #endif | 44390 | #endif |
| 52092 | | 44391 | |
| 52093 | #ifdef __LITTLE_ENDIAN__ | 44392 | #ifdef __LITTLE_ENDIAN__ |
| 52094 | #define vcopy_laneq_s8(__p0_90, __p1_90, __p2_90, __p3_90) __extension__ ({ \ | 44393 | #define vcopy_laneq_f32(__p0_90, __p1_90, __p2_90, __p3_90) __extension__ ({ \ |
| 52095 | int8x8_t __s0_90 = __p0_90; \ | 44394 | float32x2_t __s0_90 = __p0_90; \ |
| 52096 | int8x16_t __s2_90 = __p2_90; \ | 44395 | float32x4_t __s2_90 = __p2_90; \ |
| 52097 | int8x8_t __ret_90; \ | 44396 | float32x2_t __ret_90; \ |
| 52098 | __ret_90 = vset_lane_s8(vgetq_lane_s8(__s2_90, __p3_90), __s0_90, __p1_90); \ | 44397 | __ret_90 = vset_lane_f32(vgetq_lane_f32(__s2_90, __p3_90), __s0_90, __p1_90); \ |
| 52099 | __ret_90; \ | 44398 | __ret_90; \ |
| 52100 | }) | 44399 | }) |
| 52101 | #else | 44400 | #else |
| 52102 | #define vcopy_laneq_s8(__p0_91, __p1_91, __p2_91, __p3_91) __extension__ ({ \ | 44401 | #define vcopy_laneq_f32(__p0_91, __p1_91, __p2_91, __p3_91) __extension__ ({ \ |
| 52103 | int8x8_t __s0_91 = __p0_91; \ | 44402 | float32x2_t __s0_91 = __p0_91; \ |
| 52104 | int8x16_t __s2_91 = __p2_91; \ | 44403 | float32x4_t __s2_91 = __p2_91; \ |
| 52105 | int8x8_t __rev0_91; __rev0_91 = __builtin_shufflevector(__s0_91, __s0_91, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44404 | float32x2_t __rev0_91; __rev0_91 = __builtin_shufflevector(__s0_91, __s0_91, 1, 0); \ |
| 52106 | int8x16_t __rev2_91; __rev2_91 = __builtin_shufflevector(__s2_91, __s2_91, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44405 | float32x4_t __rev2_91; __rev2_91 = __builtin_shufflevector(__s2_91, __s2_91, 3, 2, 1, 0); \ |
| 52107 | int8x8_t __ret_91; \ | 44406 | float32x2_t __ret_91; \ |
| 52108 | __ret_91 = __noswap_vset_lane_s8(__noswap_vgetq_lane_s8(__rev2_91, __p3_91), __rev0_91, __p1_91); \ | 44407 | __ret_91 = __noswap_vset_lane_f32(__noswap_vgetq_lane_f32(__rev2_91, __p3_91), __rev0_91, __p1_91); \ |
| 52109 | __ret_91 = __builtin_shufflevector(__ret_91, __ret_91, 7, 6, 5, 4, 3, 2, 1, 0); \ | 44408 | __ret_91 = __builtin_shufflevector(__ret_91, __ret_91, 1, 0); \ |
| 52110 | __ret_91; \ | 44409 | __ret_91; \ |
| 52111 | }) | 44410 | }) |
| 52112 | #endif | 44411 | #endif |
| 52113 | | 44412 | |
| 52114 | #ifdef __LITTLE_ENDIAN__ | 44413 | #ifdef __LITTLE_ENDIAN__ |
| 52115 | #define vcopy_laneq_f32(__p0_92, __p1_92, __p2_92, __p3_92) __extension__ ({ \ | 44414 | #define vcopy_laneq_s32(__p0_92, __p1_92, __p2_92, __p3_92) __extension__ ({ \ |
| 52116 | float32x2_t __s0_92 = __p0_92; \ | 44415 | int32x2_t __s0_92 = __p0_92; \ |
| 52117 | float32x4_t __s2_92 = __p2_92; \ | 44416 | int32x4_t __s2_92 = __p2_92; \ |
| 52118 | float32x2_t __ret_92; \ | 44417 | int32x2_t __ret_92; \ |
| 52119 | __ret_92 = vset_lane_f32(vgetq_lane_f32(__s2_92, __p3_92), __s0_92, __p1_92); \ | 44418 | __ret_92 = vset_lane_s32(vgetq_lane_s32(__s2_92, __p3_92), __s0_92, __p1_92); \ |
| 52120 | __ret_92; \ | 44419 | __ret_92; \ |
| 52121 | }) | 44420 | }) |
| 52122 | #else | 44421 | #else |
| 52123 | #define vcopy_laneq_f32(__p0_93, __p1_93, __p2_93, __p3_93) __extension__ ({ \ | 44422 | #define vcopy_laneq_s32(__p0_93, __p1_93, __p2_93, __p3_93) __extension__ ({ \ |
| 52124 | float32x2_t __s0_93 = __p0_93; \ | 44423 | int32x2_t __s0_93 = __p0_93; \ |
| 52125 | float32x4_t __s2_93 = __p2_93; \ | 44424 | int32x4_t __s2_93 = __p2_93; \ |
| 52126 | float32x2_t __rev0_93; __rev0_93 = __builtin_shufflevector(__s0_93, __s0_93, 1, 0); \ | 44425 | int32x2_t __rev0_93; __rev0_93 = __builtin_shufflevector(__s0_93, __s0_93, 1, 0); \ |
| 52127 | float32x4_t __rev2_93; __rev2_93 = __builtin_shufflevector(__s2_93, __s2_93, 3, 2, 1, 0); \ | 44426 | int32x4_t __rev2_93; __rev2_93 = __builtin_shufflevector(__s2_93, __s2_93, 3, 2, 1, 0); \ |
| 52128 | float32x2_t __ret_93; \ | 44427 | int32x2_t __ret_93; \ |
| 52129 | __ret_93 = __noswap_vset_lane_f32(__noswap_vgetq_lane_f32(__rev2_93, __p3_93), __rev0_93, __p1_93); \ | 44428 | __ret_93 = __noswap_vset_lane_s32(__noswap_vgetq_lane_s32(__rev2_93, __p3_93), __rev0_93, __p1_93); \ |
| 52130 | __ret_93 = __builtin_shufflevector(__ret_93, __ret_93, 1, 0); \ | 44429 | __ret_93 = __builtin_shufflevector(__ret_93, __ret_93, 1, 0); \ |
| 52131 | __ret_93; \ | 44430 | __ret_93; \ |
| 52132 | }) | 44431 | }) |
| 52133 | #endif | 44432 | #endif |
| 52134 | | 44433 | |
| 52135 | #ifdef __LITTLE_ENDIAN__ | 44434 | #ifdef __LITTLE_ENDIAN__ |
| 52136 | #define vcopy_laneq_s32(__p0_94, __p1_94, __p2_94, __p3_94) __extension__ ({ \ | 44435 | #define vcopy_laneq_s64(__p0_94, __p1_94, __p2_94, __p3_94) __extension__ ({ \ |
| 52137 | int32x2_t __s0_94 = __p0_94; \ | 44436 | int64x1_t __s0_94 = __p0_94; \ |
| 52138 | int32x4_t __s2_94 = __p2_94; \ | 44437 | int64x2_t __s2_94 = __p2_94; \ |
| 52139 | int32x2_t __ret_94; \ | 44438 | int64x1_t __ret_94; \ |
| 52140 | __ret_94 = vset_lane_s32(vgetq_lane_s32(__s2_94, __p3_94), __s0_94, __p1_94); \ | 44439 | __ret_94 = vset_lane_s64(vgetq_lane_s64(__s2_94, __p3_94), __s0_94, __p1_94); \ |
| 52141 | __ret_94; \ | 44440 | __ret_94; \ |
| 52142 | }) | 44441 | }) |
| 52143 | #else | 44442 | #else |
| 52144 | #define vcopy_laneq_s32(__p0_95, __p1_95, __p2_95, __p3_95) __extension__ ({ \ | 44443 | #define vcopy_laneq_s64(__p0_95, __p1_95, __p2_95, __p3_95) __extension__ ({ \ |
| 52145 | int32x2_t __s0_95 = __p0_95; \ | 44444 | int64x1_t __s0_95 = __p0_95; \ |
| 52146 | int32x4_t __s2_95 = __p2_95; \ | 44445 | int64x2_t __s2_95 = __p2_95; \ |
| 52147 | int32x2_t __rev0_95; __rev0_95 = __builtin_shufflevector(__s0_95, __s0_95, 1, 0); \ | 44446 | int64x2_t __rev2_95; __rev2_95 = __builtin_shufflevector(__s2_95, __s2_95, 1, 0); \ |
| 52148 | int32x4_t __rev2_95; __rev2_95 = __builtin_shufflevector(__s2_95, __s2_95, 3, 2, 1, 0); \ | 44447 | int64x1_t __ret_95; \ |
| 52149 | int32x2_t __ret_95; \ | 44448 | __ret_95 = vset_lane_s64(__noswap_vgetq_lane_s64(__rev2_95, __p3_95), __s0_95, __p1_95); \ |
| 52150 | __ret_95 = __noswap_vset_lane_s32(__noswap_vgetq_lane_s32(__rev2_95, __p3_95), __rev0_95, __p1_95); \ | | |
| 52151 | __ret_95 = __builtin_shufflevector(__ret_95, __ret_95, 1, 0); \ | | |
| 52152 | __ret_95; \ | 44449 | __ret_95; \ |
| 52153 | }) | 44450 | }) |
| 52154 | #endif | 44451 | #endif |
| 52155 | | 44452 | |
| 52156 | #ifdef __LITTLE_ENDIAN__ | 44453 | #ifdef __LITTLE_ENDIAN__ |
| 52157 | #define vcopy_laneq_s64(__p0_96, __p1_96, __p2_96, __p3_96) __extension__ ({ \ | 44454 | #define vcopy_laneq_s16(__p0_96, __p1_96, __p2_96, __p3_96) __extension__ ({ \ |
| 52158 | int64x1_t __s0_96 = __p0_96; \ | 44455 | int16x4_t __s0_96 = __p0_96; \ |
| 52159 | int64x2_t __s2_96 = __p2_96; \ | 44456 | int16x8_t __s2_96 = __p2_96; \ |
| 52160 | int64x1_t __ret_96; \ | 44457 | int16x4_t __ret_96; \ |
| 52161 | __ret_96 = vset_lane_s64(vgetq_lane_s64(__s2_96, __p3_96), __s0_96, __p1_96); \ | 44458 | __ret_96 = vset_lane_s16(vgetq_lane_s16(__s2_96, __p3_96), __s0_96, __p1_96); \ |
| 52162 | __ret_96; \ | 44459 | __ret_96; \ |
| 52163 | }) | 44460 | }) |
| 52164 | #else | 44461 | #else |
| 52165 | #define vcopy_laneq_s64(__p0_97, __p1_97, __p2_97, __p3_97) __extension__ ({ \ | 44462 | #define vcopy_laneq_s16(__p0_97, __p1_97, __p2_97, __p3_97) __extension__ ({ \ |
| 52166 | int64x1_t __s0_97 = __p0_97; \ | 44463 | int16x4_t __s0_97 = __p0_97; \ |
| 52167 | int64x2_t __s2_97 = __p2_97; \ | 44464 | int16x8_t __s2_97 = __p2_97; \ |
| 52168 | int64x2_t __rev2_97; __rev2_97 = __builtin_shufflevector(__s2_97, __s2_97, 1, 0); \ | 44465 | int16x4_t __rev0_97; __rev0_97 = __builtin_shufflevector(__s0_97, __s0_97, 3, 2, 1, 0); \ |
| 52169 | int64x1_t __ret_97; \ | 44466 | int16x8_t __rev2_97; __rev2_97 = __builtin_shufflevector(__s2_97, __s2_97, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52170 | __ret_97 = __noswap_vset_lane_s64(__noswap_vgetq_lane_s64(__rev2_97, __p3_97), __s0_97, __p1_97); \ | 44467 | int16x4_t __ret_97; \ |
| | 44468 | __ret_97 = __noswap_vset_lane_s16(__noswap_vgetq_lane_s16(__rev2_97, __p3_97), __rev0_97, __p1_97); \ |
| | 44469 | __ret_97 = __builtin_shufflevector(__ret_97, __ret_97, 3, 2, 1, 0); \ |
| 52171 | __ret_97; \ | 44470 | __ret_97; \ |
| 52172 | }) | 44471 | }) |
| 52173 | #endif | 44472 | #endif |
| 52174 | | 44473 | |
| 52175 | #ifdef __LITTLE_ENDIAN__ | 44474 | #define vcreate_p64(__p0) __extension__ ({ \ |
| 52176 | #define vcopy_laneq_s16(__p0_98, __p1_98, __p2_98, __p3_98) __extension__ ({ \ | 44475 | poly64x1_t __ret; \ |
| 52177 | int16x4_t __s0_98 = __p0_98; \ | 44476 | uint64_t __promote = __p0; \ |
| 52178 | int16x8_t __s2_98 = __p2_98; \ | 44477 | __ret = (poly64x1_t)(__promote); \ |
| 52179 | int16x4_t __ret_98; \ | 44478 | __ret; \ |
| 52180 | __ret_98 = vset_lane_s16(vgetq_lane_s16(__s2_98, __p3_98), __s0_98, __p1_98); \ | | |
| 52181 | __ret_98; \ | | |
| 52182 | }) | 44479 | }) |
| 52183 | #else | 44480 | #define vcreate_f64(__p0) __extension__ ({ \ |
| 52184 | #define vcopy_laneq_s16(__p0_99, __p1_99, __p2_99, __p3_99) __extension__ ({ \ | 44481 | float64x1_t __ret; \ |
| 52185 | int16x4_t __s0_99 = __p0_99; \ | 44482 | uint64_t __promote = __p0; \ |
| 52186 | int16x8_t __s2_99 = __p2_99; \ | 44483 | __ret = (float64x1_t)(__promote); \ |
| 52187 | int16x4_t __rev0_99; __rev0_99 = __builtin_shufflevector(__s0_99, __s0_99, 3, 2, 1, 0); \ | 44484 | __ret; \ |
| 52188 | int16x8_t __rev2_99; __rev2_99 = __builtin_shufflevector(__s2_99, __s2_99, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 52189 | int16x4_t __ret_99; \ | | |
| 52190 | __ret_99 = __noswap_vset_lane_s16(__noswap_vgetq_lane_s16(__rev2_99, __p3_99), __rev0_99, __p1_99); \ | | |
| 52191 | __ret_99 = __builtin_shufflevector(__ret_99, __ret_99, 3, 2, 1, 0); \ | | |
| 52192 | __ret_99; \ | | |
| 52193 | }) | 44485 | }) |
| 52194 | #endif | | |
| 52195 | | | |
| 52196 | #ifdef __LITTLE_ENDIAN__ | | |
| 52197 | __ai poly64x1_t vcreate_p64(uint64_t __p0) { | | |
| 52198 | poly64x1_t __ret; | | |
| 52199 | __ret = (poly64x1_t)(__p0); | | |
| 52200 | return __ret; | | |
| 52201 | } | | |
| 52202 | #else | | |
| 52203 | __ai poly64x1_t vcreate_p64(uint64_t __p0) { | | |
| 52204 | poly64x1_t __ret; | | |
| 52205 | __ret = (poly64x1_t)(__p0); | | |
| 52206 | return __ret; | | |
| 52207 | } | | |
| 52208 | #endif | | |
| 52209 | | | |
| 52210 | #ifdef __LITTLE_ENDIAN__ | | |
| 52211 | __ai float64x1_t vcreate_f64(uint64_t __p0) { | | |
| 52212 | float64x1_t __ret; | | |
| 52213 | __ret = (float64x1_t)(__p0); | | |
| 52214 | return __ret; | | |
| 52215 | } | | |
| 52216 | #else | | |
| 52217 | __ai float64x1_t vcreate_f64(uint64_t __p0) { | | |
| 52218 | float64x1_t __ret; | | |
| 52219 | __ret = (float64x1_t)(__p0); | | |
| 52220 | return __ret; | | |
| 52221 | } | | |
| 52222 | #endif | | |
| 52223 | | | |
| 52224 | #ifdef __LITTLE_ENDIAN__ | | |
| 52225 | __ai float32_t vcvts_f32_s32(int32_t __p0) { | 44486 | __ai float32_t vcvts_f32_s32(int32_t __p0) { |
| 52226 | float32_t __ret; | 44487 | float32_t __ret; |
| 52227 | __ret = (float32_t) __builtin_neon_vcvts_f32_s32(__p0); | 44488 | __ret = (float32_t) __builtin_neon_vcvts_f32_s32(__p0); |
| 52228 | return __ret; | 44489 | return __ret; |
| 52229 | } | 44490 | } |
| 52230 | #else | | |
| 52231 | __ai float32_t vcvts_f32_s32(int32_t __p0) { | | |
| 52232 | float32_t __ret; | | |
| 52233 | __ret = (float32_t) __builtin_neon_vcvts_f32_s32(__p0); | | |
| 52234 | return __ret; | | |
| 52235 | } | | |
| 52236 | #endif | | |
| 52237 | | | |
| 52238 | #ifdef __LITTLE_ENDIAN__ | | |
| 52239 | __ai float32_t vcvts_f32_u32(uint32_t __p0) { | | |
| 52240 | float32_t __ret; | | |
| 52241 | __ret = (float32_t) __builtin_neon_vcvts_f32_u32(__p0); | | |
| 52242 | return __ret; | | |
| 52243 | } | | |
| 52244 | #else | | |
| 52245 | __ai float32_t vcvts_f32_u32(uint32_t __p0) { | 44491 | __ai float32_t vcvts_f32_u32(uint32_t __p0) { |
| 52246 | float32_t __ret; | 44492 | float32_t __ret; |
| 52247 | __ret = (float32_t) __builtin_neon_vcvts_f32_u32(__p0); | 44493 | __ret = (float32_t) __builtin_neon_vcvts_f32_u32(__p0); |
| 52248 | return __ret; | 44494 | return __ret; |
| 52249 | } | 44495 | } |
| 52250 | #endif | | |
| 52251 | | | |
| 52252 | #ifdef __LITTLE_ENDIAN__ | 44496 | #ifdef __LITTLE_ENDIAN__ |
| 52253 | __ai float32x2_t vcvt_f32_f64(float64x2_t __p0) { | 44497 | __ai float32x2_t vcvt_f32_f64(float64x2_t __p0) { |
| 52254 | float32x2_t __ret; | 44498 | float32x2_t __ret; |
| ... | @@ -52270,34 +44514,16 @@ __ai float32x2_t __noswap_vcvt_f32_f64(float64x2_t __p0) { | ... | @@ -52270,34 +44514,16 @@ __ai float32x2_t __noswap_vcvt_f32_f64(float64x2_t __p0) { |
| 52270 | } | 44514 | } |
| 52271 | #endif | 44515 | #endif |
| 52272 | | 44516 | |
| 52273 | #ifdef __LITTLE_ENDIAN__ | | |
| 52274 | __ai float64_t vcvtd_f64_s64(int64_t __p0) { | 44517 | __ai float64_t vcvtd_f64_s64(int64_t __p0) { |
| 52275 | float64_t __ret; | 44518 | float64_t __ret; |
| 52276 | __ret = (float64_t) __builtin_neon_vcvtd_f64_s64(__p0); | 44519 | __ret = (float64_t) __builtin_neon_vcvtd_f64_s64(__p0); |
| 52277 | return __ret; | 44520 | return __ret; |
| 52278 | } | 44521 | } |
| 52279 | #else | | |
| 52280 | __ai float64_t vcvtd_f64_s64(int64_t __p0) { | | |
| 52281 | float64_t __ret; | | |
| 52282 | __ret = (float64_t) __builtin_neon_vcvtd_f64_s64(__p0); | | |
| 52283 | return __ret; | | |
| 52284 | } | | |
| 52285 | #endif | | |
| 52286 | | | |
| 52287 | #ifdef __LITTLE_ENDIAN__ | | |
| 52288 | __ai float64_t vcvtd_f64_u64(uint64_t __p0) { | 44522 | __ai float64_t vcvtd_f64_u64(uint64_t __p0) { |
| 52289 | float64_t __ret; | 44523 | float64_t __ret; |
| 52290 | __ret = (float64_t) __builtin_neon_vcvtd_f64_u64(__p0); | 44524 | __ret = (float64_t) __builtin_neon_vcvtd_f64_u64(__p0); |
| 52291 | return __ret; | 44525 | return __ret; |
| 52292 | } | 44526 | } |
| 52293 | #else | | |
| 52294 | __ai float64_t vcvtd_f64_u64(uint64_t __p0) { | | |
| 52295 | float64_t __ret; | | |
| 52296 | __ret = (float64_t) __builtin_neon_vcvtd_f64_u64(__p0); | | |
| 52297 | return __ret; | | |
| 52298 | } | | |
| 52299 | #endif | | |
| 52300 | | | |
| 52301 | #ifdef __LITTLE_ENDIAN__ | 44527 | #ifdef __LITTLE_ENDIAN__ |
| 52302 | __ai float64x2_t vcvtq_f64_u64(uint64x2_t __p0) { | 44528 | __ai float64x2_t vcvtq_f64_u64(uint64x2_t __p0) { |
| 52303 | float64x2_t __ret; | 44529 | float64x2_t __ret; |
| ... | @@ -52330,34 +44556,16 @@ __ai float64x2_t vcvtq_f64_s64(int64x2_t __p0) { | ... | @@ -52330,34 +44556,16 @@ __ai float64x2_t vcvtq_f64_s64(int64x2_t __p0) { |
| 52330 | } | 44556 | } |
| 52331 | #endif | 44557 | #endif |
| 52332 | | 44558 | |
| 52333 | #ifdef __LITTLE_ENDIAN__ | | |
| 52334 | __ai float64x1_t vcvt_f64_u64(uint64x1_t __p0) { | | |
| 52335 | float64x1_t __ret; | | |
| 52336 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 19); | | |
| 52337 | return __ret; | | |
| 52338 | } | | |
| 52339 | #else | | |
| 52340 | __ai float64x1_t vcvt_f64_u64(uint64x1_t __p0) { | 44559 | __ai float64x1_t vcvt_f64_u64(uint64x1_t __p0) { |
| 52341 | float64x1_t __ret; | 44560 | float64x1_t __ret; |
| 52342 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 19); | 44561 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 19); |
| 52343 | return __ret; | 44562 | return __ret; |
| 52344 | } | 44563 | } |
| 52345 | #endif | | |
| 52346 | | | |
| 52347 | #ifdef __LITTLE_ENDIAN__ | | |
| 52348 | __ai float64x1_t vcvt_f64_s64(int64x1_t __p0) { | | |
| 52349 | float64x1_t __ret; | | |
| 52350 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 3); | | |
| 52351 | return __ret; | | |
| 52352 | } | | |
| 52353 | #else | | |
| 52354 | __ai float64x1_t vcvt_f64_s64(int64x1_t __p0) { | 44564 | __ai float64x1_t vcvt_f64_s64(int64x1_t __p0) { |
| 52355 | float64x1_t __ret; | 44565 | float64x1_t __ret; |
| 52356 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 3); | 44566 | __ret = (float64x1_t) __builtin_neon_vcvt_f64_v((int8x8_t)__p0, 3); |
| 52357 | return __ret; | 44567 | return __ret; |
| 52358 | } | 44568 | } |
| 52359 | #endif | | |
| 52360 | | | |
| 52361 | #ifdef __LITTLE_ENDIAN__ | 44569 | #ifdef __LITTLE_ENDIAN__ |
| 52362 | __ai float64x2_t vcvt_f64_f32(float32x2_t __p0) { | 44570 | __ai float64x2_t vcvt_f64_f32(float32x2_t __p0) { |
| 52363 | float64x2_t __ret; | 44571 | float64x2_t __ret; |
| ... | @@ -52445,38 +44653,18 @@ __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { | ... | @@ -52445,38 +44653,18 @@ __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { |
| 52445 | } | 44653 | } |
| 52446 | #endif | 44654 | #endif |
| 52447 | | 44655 | |
| 52448 | #ifdef __LITTLE_ENDIAN__ | | |
| 52449 | #define vcvts_n_f32_u32(__p0, __p1) __extension__ ({ \ | 44656 | #define vcvts_n_f32_u32(__p0, __p1) __extension__ ({ \ |
| 52450 | uint32_t __s0 = __p0; \ | 44657 | uint32_t __s0 = __p0; \ |
| 52451 | float32_t __ret; \ | 44658 | float32_t __ret; \ |
| 52452 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_u32(__s0, __p1); \ | 44659 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_u32(__s0, __p1); \ |
| 52453 | __ret; \ | 44660 | __ret; \ |
| 52454 | }) | 44661 | }) |
| 52455 | #else | | |
| 52456 | #define vcvts_n_f32_u32(__p0, __p1) __extension__ ({ \ | | |
| 52457 | uint32_t __s0 = __p0; \ | | |
| 52458 | float32_t __ret; \ | | |
| 52459 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_u32(__s0, __p1); \ | | |
| 52460 | __ret; \ | | |
| 52461 | }) | | |
| 52462 | #endif | | |
| 52463 | | | |
| 52464 | #ifdef __LITTLE_ENDIAN__ | | |
| 52465 | #define vcvts_n_f32_s32(__p0, __p1) __extension__ ({ \ | 44662 | #define vcvts_n_f32_s32(__p0, __p1) __extension__ ({ \ |
| 52466 | int32_t __s0 = __p0; \ | 44663 | int32_t __s0 = __p0; \ |
| 52467 | float32_t __ret; \ | 44664 | float32_t __ret; \ |
| 52468 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_s32(__s0, __p1); \ | 44665 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_s32(__s0, __p1); \ |
| 52469 | __ret; \ | 44666 | __ret; \ |
| 52470 | }) | 44667 | }) |
| 52471 | #else | | |
| 52472 | #define vcvts_n_f32_s32(__p0, __p1) __extension__ ({ \ | | |
| 52473 | int32_t __s0 = __p0; \ | | |
| 52474 | float32_t __ret; \ | | |
| 52475 | __ret = (float32_t) __builtin_neon_vcvts_n_f32_s32(__s0, __p1); \ | | |
| 52476 | __ret; \ | | |
| 52477 | }) | | |
| 52478 | #endif | | |
| 52479 | | | |
| 52480 | #ifdef __LITTLE_ENDIAN__ | 44668 | #ifdef __LITTLE_ENDIAN__ |
| 52481 | #define vcvtq_n_f64_u64(__p0, __p1) __extension__ ({ \ | 44669 | #define vcvtq_n_f64_u64(__p0, __p1) __extension__ ({ \ |
| 52482 | uint64x2_t __s0 = __p0; \ | 44670 | uint64x2_t __s0 = __p0; \ |
| ... | @@ -52513,86 +44701,36 @@ __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { | ... | @@ -52513,86 +44701,36 @@ __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { |
| 52513 | }) | 44701 | }) |
| 52514 | #endif | 44702 | #endif |
| 52515 | | 44703 | |
| 52516 | #ifdef __LITTLE_ENDIAN__ | | |
| 52517 | #define vcvt_n_f64_u64(__p0, __p1) __extension__ ({ \ | | |
| 52518 | uint64x1_t __s0 = __p0; \ | | |
| 52519 | float64x1_t __ret; \ | | |
| 52520 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 19); \ | | |
| 52521 | __ret; \ | | |
| 52522 | }) | | |
| 52523 | #else | | |
| 52524 | #define vcvt_n_f64_u64(__p0, __p1) __extension__ ({ \ | 44704 | #define vcvt_n_f64_u64(__p0, __p1) __extension__ ({ \ |
| 52525 | uint64x1_t __s0 = __p0; \ | 44705 | uint64x1_t __s0 = __p0; \ |
| 52526 | float64x1_t __ret; \ | 44706 | float64x1_t __ret; \ |
| 52527 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 19); \ | 44707 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 19); \ |
| 52528 | __ret; \ | 44708 | __ret; \ |
| 52529 | }) | 44709 | }) |
| 52530 | #endif | | |
| 52531 | | | |
| 52532 | #ifdef __LITTLE_ENDIAN__ | | |
| 52533 | #define vcvt_n_f64_s64(__p0, __p1) __extension__ ({ \ | 44710 | #define vcvt_n_f64_s64(__p0, __p1) __extension__ ({ \ |
| 52534 | int64x1_t __s0 = __p0; \ | 44711 | int64x1_t __s0 = __p0; \ |
| 52535 | float64x1_t __ret; \ | 44712 | float64x1_t __ret; \ |
| 52536 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 3); \ | 44713 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 3); \ |
| 52537 | __ret; \ | 44714 | __ret; \ |
| 52538 | }) | 44715 | }) |
| 52539 | #else | | |
| 52540 | #define vcvt_n_f64_s64(__p0, __p1) __extension__ ({ \ | | |
| 52541 | int64x1_t __s0 = __p0; \ | | |
| 52542 | float64x1_t __ret; \ | | |
| 52543 | __ret = (float64x1_t) __builtin_neon_vcvt_n_f64_v((int8x8_t)__s0, __p1, 3); \ | | |
| 52544 | __ret; \ | | |
| 52545 | }) | | |
| 52546 | #endif | | |
| 52547 | | | |
| 52548 | #ifdef __LITTLE_ENDIAN__ | | |
| 52549 | #define vcvtd_n_f64_u64(__p0, __p1) __extension__ ({ \ | | |
| 52550 | uint64_t __s0 = __p0; \ | | |
| 52551 | float64_t __ret; \ | | |
| 52552 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_u64(__s0, __p1); \ | | |
| 52553 | __ret; \ | | |
| 52554 | }) | | |
| 52555 | #else | | |
| 52556 | #define vcvtd_n_f64_u64(__p0, __p1) __extension__ ({ \ | 44716 | #define vcvtd_n_f64_u64(__p0, __p1) __extension__ ({ \ |
| 52557 | uint64_t __s0 = __p0; \ | 44717 | uint64_t __s0 = __p0; \ |
| 52558 | float64_t __ret; \ | 44718 | float64_t __ret; \ |
| 52559 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_u64(__s0, __p1); \ | 44719 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_u64(__s0, __p1); \ |
| 52560 | __ret; \ | 44720 | __ret; \ |
| 52561 | }) | 44721 | }) |
| 52562 | #endif | | |
| 52563 | | | |
| 52564 | #ifdef __LITTLE_ENDIAN__ | | |
| 52565 | #define vcvtd_n_f64_s64(__p0, __p1) __extension__ ({ \ | | |
| 52566 | int64_t __s0 = __p0; \ | | |
| 52567 | float64_t __ret; \ | | |
| 52568 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_s64(__s0, __p1); \ | | |
| 52569 | __ret; \ | | |
| 52570 | }) | | |
| 52571 | #else | | |
| 52572 | #define vcvtd_n_f64_s64(__p0, __p1) __extension__ ({ \ | 44722 | #define vcvtd_n_f64_s64(__p0, __p1) __extension__ ({ \ |
| 52573 | int64_t __s0 = __p0; \ | 44723 | int64_t __s0 = __p0; \ |
| 52574 | float64_t __ret; \ | 44724 | float64_t __ret; \ |
| 52575 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_s64(__s0, __p1); \ | 44725 | __ret = (float64_t) __builtin_neon_vcvtd_n_f64_s64(__s0, __p1); \ |
| 52576 | __ret; \ | 44726 | __ret; \ |
| 52577 | }) | 44727 | }) |
| 52578 | #endif | | |
| 52579 | | | |
| 52580 | #ifdef __LITTLE_ENDIAN__ | | |
| 52581 | #define vcvts_n_s32_f32(__p0, __p1) __extension__ ({ \ | | |
| 52582 | float32_t __s0 = __p0; \ | | |
| 52583 | int32_t __ret; \ | | |
| 52584 | __ret = (int32_t) __builtin_neon_vcvts_n_s32_f32(__s0, __p1); \ | | |
| 52585 | __ret; \ | | |
| 52586 | }) | | |
| 52587 | #else | | |
| 52588 | #define vcvts_n_s32_f32(__p0, __p1) __extension__ ({ \ | 44728 | #define vcvts_n_s32_f32(__p0, __p1) __extension__ ({ \ |
| 52589 | float32_t __s0 = __p0; \ | 44729 | float32_t __s0 = __p0; \ |
| 52590 | int32_t __ret; \ | 44730 | int32_t __ret; \ |
| 52591 | __ret = (int32_t) __builtin_neon_vcvts_n_s32_f32(__s0, __p1); \ | 44731 | __ret = (int32_t) __builtin_neon_vcvts_n_s32_f32(__s0, __p1); \ |
| 52592 | __ret; \ | 44732 | __ret; \ |
| 52593 | }) | 44733 | }) |
| 52594 | #endif | | |
| 52595 | | | |
| 52596 | #ifdef __LITTLE_ENDIAN__ | 44734 | #ifdef __LITTLE_ENDIAN__ |
| 52597 | #define vcvtq_n_s64_f64(__p0, __p1) __extension__ ({ \ | 44735 | #define vcvtq_n_s64_f64(__p0, __p1) __extension__ ({ \ |
| 52598 | float64x2_t __s0 = __p0; \ | 44736 | float64x2_t __s0 = __p0; \ |
| ... | @@ -52611,54 +44749,24 @@ __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { | ... | @@ -52611,54 +44749,24 @@ __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { |
| 52611 | }) | 44749 | }) |
| 52612 | #endif | 44750 | #endif |
| 52613 | | 44751 | |
| 52614 | #ifdef __LITTLE_ENDIAN__ | | |
| 52615 | #define vcvt_n_s64_f64(__p0, __p1) __extension__ ({ \ | 44752 | #define vcvt_n_s64_f64(__p0, __p1) __extension__ ({ \ |
| 52616 | float64x1_t __s0 = __p0; \ | 44753 | float64x1_t __s0 = __p0; \ |
| 52617 | int64x1_t __ret; \ | 44754 | int64x1_t __ret; \ |
| 52618 | __ret = (int64x1_t) __builtin_neon_vcvt_n_s64_v((int8x8_t)__s0, __p1, 3); \ | 44755 | __ret = (int64x1_t) __builtin_neon_vcvt_n_s64_v((int8x8_t)__s0, __p1, 3); \ |
| 52619 | __ret; \ | 44756 | __ret; \ |
| 52620 | }) | 44757 | }) |
| 52621 | #else | | |
| 52622 | #define vcvt_n_s64_f64(__p0, __p1) __extension__ ({ \ | | |
| 52623 | float64x1_t __s0 = __p0; \ | | |
| 52624 | int64x1_t __ret; \ | | |
| 52625 | __ret = (int64x1_t) __builtin_neon_vcvt_n_s64_v((int8x8_t)__s0, __p1, 3); \ | | |
| 52626 | __ret; \ | | |
| 52627 | }) | | |
| 52628 | #endif | | |
| 52629 | | | |
| 52630 | #ifdef __LITTLE_ENDIAN__ | | |
| 52631 | #define vcvtd_n_s64_f64(__p0, __p1) __extension__ ({ \ | | |
| 52632 | float64_t __s0 = __p0; \ | | |
| 52633 | int64_t __ret; \ | | |
| 52634 | __ret = (int64_t) __builtin_neon_vcvtd_n_s64_f64(__s0, __p1); \ | | |
| 52635 | __ret; \ | | |
| 52636 | }) | | |
| 52637 | #else | | |
| 52638 | #define vcvtd_n_s64_f64(__p0, __p1) __extension__ ({ \ | 44758 | #define vcvtd_n_s64_f64(__p0, __p1) __extension__ ({ \ |
| 52639 | float64_t __s0 = __p0; \ | 44759 | float64_t __s0 = __p0; \ |
| 52640 | int64_t __ret; \ | 44760 | int64_t __ret; \ |
| 52641 | __ret = (int64_t) __builtin_neon_vcvtd_n_s64_f64(__s0, __p1); \ | 44761 | __ret = (int64_t) __builtin_neon_vcvtd_n_s64_f64(__s0, __p1); \ |
| 52642 | __ret; \ | 44762 | __ret; \ |
| 52643 | }) | 44763 | }) |
| 52644 | #endif | | |
| 52645 | | | |
| 52646 | #ifdef __LITTLE_ENDIAN__ | | |
| 52647 | #define vcvts_n_u32_f32(__p0, __p1) __extension__ ({ \ | | |
| 52648 | float32_t __s0 = __p0; \ | | |
| 52649 | uint32_t __ret; \ | | |
| 52650 | __ret = (uint32_t) __builtin_neon_vcvts_n_u32_f32(__s0, __p1); \ | | |
| 52651 | __ret; \ | | |
| 52652 | }) | | |
| 52653 | #else | | |
| 52654 | #define vcvts_n_u32_f32(__p0, __p1) __extension__ ({ \ | 44764 | #define vcvts_n_u32_f32(__p0, __p1) __extension__ ({ \ |
| 52655 | float32_t __s0 = __p0; \ | 44765 | float32_t __s0 = __p0; \ |
| 52656 | uint32_t __ret; \ | 44766 | uint32_t __ret; \ |
| 52657 | __ret = (uint32_t) __builtin_neon_vcvts_n_u32_f32(__s0, __p1); \ | 44767 | __ret = (uint32_t) __builtin_neon_vcvts_n_u32_f32(__s0, __p1); \ |
| 52658 | __ret; \ | 44768 | __ret; \ |
| 52659 | }) | 44769 | }) |
| 52660 | #endif | | |
| 52661 | | | |
| 52662 | #ifdef __LITTLE_ENDIAN__ | 44770 | #ifdef __LITTLE_ENDIAN__ |
| 52663 | #define vcvtq_n_u64_f64(__p0, __p1) __extension__ ({ \ | 44771 | #define vcvtq_n_u64_f64(__p0, __p1) __extension__ ({ \ |
| 52664 | float64x2_t __s0 = __p0; \ | 44772 | float64x2_t __s0 = __p0; \ |
| ... | @@ -52677,66 +44785,28 @@ __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { | ... | @@ -52677,66 +44785,28 @@ __ai float64x2_t vcvt_high_f64_f32(float32x4_t __p0) { |
| 52677 | }) | 44785 | }) |
| 52678 | #endif | 44786 | #endif |
| 52679 | | 44787 | |
| 52680 | #ifdef __LITTLE_ENDIAN__ | | |
| 52681 | #define vcvt_n_u64_f64(__p0, __p1) __extension__ ({ \ | | |
| 52682 | float64x1_t __s0 = __p0; \ | | |
| 52683 | uint64x1_t __ret; \ | | |
| 52684 | __ret = (uint64x1_t) __builtin_neon_vcvt_n_u64_v((int8x8_t)__s0, __p1, 19); \ | | |
| 52685 | __ret; \ | | |
| 52686 | }) | | |
| 52687 | #else | | |
| 52688 | #define vcvt_n_u64_f64(__p0, __p1) __extension__ ({ \ | 44788 | #define vcvt_n_u64_f64(__p0, __p1) __extension__ ({ \ |
| 52689 | float64x1_t __s0 = __p0; \ | 44789 | float64x1_t __s0 = __p0; \ |
| 52690 | uint64x1_t __ret; \ | 44790 | uint64x1_t __ret; \ |
| 52691 | __ret = (uint64x1_t) __builtin_neon_vcvt_n_u64_v((int8x8_t)__s0, __p1, 19); \ | 44791 | __ret = (uint64x1_t) __builtin_neon_vcvt_n_u64_v((int8x8_t)__s0, __p1, 19); \ |
| 52692 | __ret; \ | 44792 | __ret; \ |
| 52693 | }) | 44793 | }) |
| 52694 | #endif | | |
| 52695 | | | |
| 52696 | #ifdef __LITTLE_ENDIAN__ | | |
| 52697 | #define vcvtd_n_u64_f64(__p0, __p1) __extension__ ({ \ | | |
| 52698 | float64_t __s0 = __p0; \ | | |
| 52699 | uint64_t __ret; \ | | |
| 52700 | __ret = (uint64_t) __builtin_neon_vcvtd_n_u64_f64(__s0, __p1); \ | | |
| 52701 | __ret; \ | | |
| 52702 | }) | | |
| 52703 | #else | | |
| 52704 | #define vcvtd_n_u64_f64(__p0, __p1) __extension__ ({ \ | 44794 | #define vcvtd_n_u64_f64(__p0, __p1) __extension__ ({ \ |
| 52705 | float64_t __s0 = __p0; \ | 44795 | float64_t __s0 = __p0; \ |
| 52706 | uint64_t __ret; \ | 44796 | uint64_t __ret; \ |
| 52707 | __ret = (uint64_t) __builtin_neon_vcvtd_n_u64_f64(__s0, __p1); \ | 44797 | __ret = (uint64_t) __builtin_neon_vcvtd_n_u64_f64(__s0, __p1); \ |
| 52708 | __ret; \ | 44798 | __ret; \ |
| 52709 | }) | 44799 | }) |
| 52710 | #endif | | |
| 52711 | | | |
| 52712 | #ifdef __LITTLE_ENDIAN__ | | |
| 52713 | __ai int32_t vcvts_s32_f32(float32_t __p0) { | | |
| 52714 | int32_t __ret; | | |
| 52715 | __ret = (int32_t) __builtin_neon_vcvts_s32_f32(__p0); | | |
| 52716 | return __ret; | | |
| 52717 | } | | |
| 52718 | #else | | |
| 52719 | __ai int32_t vcvts_s32_f32(float32_t __p0) { | 44800 | __ai int32_t vcvts_s32_f32(float32_t __p0) { |
| 52720 | int32_t __ret; | 44801 | int32_t __ret; |
| 52721 | __ret = (int32_t) __builtin_neon_vcvts_s32_f32(__p0); | 44802 | __ret = (int32_t) __builtin_neon_vcvts_s32_f32(__p0); |
| 52722 | return __ret; | 44803 | return __ret; |
| 52723 | } | 44804 | } |
| 52724 | #endif | | |
| 52725 | | | |
| 52726 | #ifdef __LITTLE_ENDIAN__ | | |
| 52727 | __ai int64_t vcvtd_s64_f64(float64_t __p0) { | | |
| 52728 | int64_t __ret; | | |
| 52729 | __ret = (int64_t) __builtin_neon_vcvtd_s64_f64(__p0); | | |
| 52730 | return __ret; | | |
| 52731 | } | | |
| 52732 | #else | | |
| 52733 | __ai int64_t vcvtd_s64_f64(float64_t __p0) { | 44805 | __ai int64_t vcvtd_s64_f64(float64_t __p0) { |
| 52734 | int64_t __ret; | 44806 | int64_t __ret; |
| 52735 | __ret = (int64_t) __builtin_neon_vcvtd_s64_f64(__p0); | 44807 | __ret = (int64_t) __builtin_neon_vcvtd_s64_f64(__p0); |
| 52736 | return __ret; | 44808 | return __ret; |
| 52737 | } | 44809 | } |
| 52738 | #endif | | |
| 52739 | | | |
| 52740 | #ifdef __LITTLE_ENDIAN__ | 44810 | #ifdef __LITTLE_ENDIAN__ |
| 52741 | __ai int64x2_t vcvtq_s64_f64(float64x2_t __p0) { | 44811 | __ai int64x2_t vcvtq_s64_f64(float64x2_t __p0) { |
| 52742 | int64x2_t __ret; | 44812 | int64x2_t __ret; |
| ... | @@ -52753,48 +44823,21 @@ __ai int64x2_t vcvtq_s64_f64(float64x2_t __p0) { | ... | @@ -52753,48 +44823,21 @@ __ai int64x2_t vcvtq_s64_f64(float64x2_t __p0) { |
| 52753 | } | 44823 | } |
| 52754 | #endif | 44824 | #endif |
| 52755 | | 44825 | |
| 52756 | #ifdef __LITTLE_ENDIAN__ | | |
| 52757 | __ai int64x1_t vcvt_s64_f64(float64x1_t __p0) { | 44826 | __ai int64x1_t vcvt_s64_f64(float64x1_t __p0) { |
| 52758 | int64x1_t __ret; | 44827 | int64x1_t __ret; |
| 52759 | __ret = (int64x1_t) __builtin_neon_vcvt_s64_v((int8x8_t)__p0, 3); | 44828 | __ret = (int64x1_t) __builtin_neon_vcvt_s64_v((int8x8_t)__p0, 3); |
| 52760 | return __ret; | 44829 | return __ret; |
| 52761 | } | 44830 | } |
| 52762 | #else | | |
| 52763 | __ai int64x1_t vcvt_s64_f64(float64x1_t __p0) { | | |
| 52764 | int64x1_t __ret; | | |
| 52765 | __ret = (int64x1_t) __builtin_neon_vcvt_s64_v((int8x8_t)__p0, 3); | | |
| 52766 | return __ret; | | |
| 52767 | } | | |
| 52768 | #endif | | |
| 52769 | | | |
| 52770 | #ifdef __LITTLE_ENDIAN__ | | |
| 52771 | __ai uint32_t vcvts_u32_f32(float32_t __p0) { | 44831 | __ai uint32_t vcvts_u32_f32(float32_t __p0) { |
| 52772 | uint32_t __ret; | 44832 | uint32_t __ret; |
| 52773 | __ret = (uint32_t) __builtin_neon_vcvts_u32_f32(__p0); | 44833 | __ret = (uint32_t) __builtin_neon_vcvts_u32_f32(__p0); |
| 52774 | return __ret; | 44834 | return __ret; |
| 52775 | } | 44835 | } |
| 52776 | #else | | |
| 52777 | __ai uint32_t vcvts_u32_f32(float32_t __p0) { | | |
| 52778 | uint32_t __ret; | | |
| 52779 | __ret = (uint32_t) __builtin_neon_vcvts_u32_f32(__p0); | | |
| 52780 | return __ret; | | |
| 52781 | } | | |
| 52782 | #endif | | |
| 52783 | | | |
| 52784 | #ifdef __LITTLE_ENDIAN__ | | |
| 52785 | __ai uint64_t vcvtd_u64_f64(float64_t __p0) { | 44836 | __ai uint64_t vcvtd_u64_f64(float64_t __p0) { |
| 52786 | uint64_t __ret; | 44837 | uint64_t __ret; |
| 52787 | __ret = (uint64_t) __builtin_neon_vcvtd_u64_f64(__p0); | 44838 | __ret = (uint64_t) __builtin_neon_vcvtd_u64_f64(__p0); |
| 52788 | return __ret; | 44839 | return __ret; |
| 52789 | } | 44840 | } |
| 52790 | #else | | |
| 52791 | __ai uint64_t vcvtd_u64_f64(float64_t __p0) { | | |
| 52792 | uint64_t __ret; | | |
| 52793 | __ret = (uint64_t) __builtin_neon_vcvtd_u64_f64(__p0); | | |
| 52794 | return __ret; | | |
| 52795 | } | | |
| 52796 | #endif | | |
| 52797 | | | |
| 52798 | #ifdef __LITTLE_ENDIAN__ | 44841 | #ifdef __LITTLE_ENDIAN__ |
| 52799 | __ai uint64x2_t vcvtq_u64_f64(float64x2_t __p0) { | 44842 | __ai uint64x2_t vcvtq_u64_f64(float64x2_t __p0) { |
| 52800 | uint64x2_t __ret; | 44843 | uint64x2_t __ret; |
| ... | @@ -52811,258 +44854,96 @@ __ai uint64x2_t vcvtq_u64_f64(float64x2_t __p0) { | ... | @@ -52811,258 +44854,96 @@ __ai uint64x2_t vcvtq_u64_f64(float64x2_t __p0) { |
| 52811 | } | 44854 | } |
| 52812 | #endif | 44855 | #endif |
| 52813 | | 44856 | |
| 52814 | #ifdef __LITTLE_ENDIAN__ | | |
| 52815 | __ai uint64x1_t vcvt_u64_f64(float64x1_t __p0) { | | |
| 52816 | uint64x1_t __ret; | | |
| 52817 | __ret = (uint64x1_t) __builtin_neon_vcvt_u64_v((int8x8_t)__p0, 19); | | |
| 52818 | return __ret; | | |
| 52819 | } | | |
| 52820 | #else | | |
| 52821 | __ai uint64x1_t vcvt_u64_f64(float64x1_t __p0) { | 44857 | __ai uint64x1_t vcvt_u64_f64(float64x1_t __p0) { |
| 52822 | uint64x1_t __ret; | 44858 | uint64x1_t __ret; |
| 52823 | __ret = (uint64x1_t) __builtin_neon_vcvt_u64_v((int8x8_t)__p0, 19); | 44859 | __ret = (uint64x1_t) __builtin_neon_vcvt_u64_v((int8x8_t)__p0, 19); |
| 52824 | return __ret; | 44860 | return __ret; |
| 52825 | } | 44861 | } |
| 52826 | #endif | | |
| 52827 | | | |
| 52828 | #ifdef __LITTLE_ENDIAN__ | | |
| 52829 | __ai int32_t vcvtas_s32_f32(float32_t __p0) { | | |
| 52830 | int32_t __ret; | | |
| 52831 | __ret = (int32_t) __builtin_neon_vcvtas_s32_f32(__p0); | | |
| 52832 | return __ret; | | |
| 52833 | } | | |
| 52834 | #else | | |
| 52835 | __ai int32_t vcvtas_s32_f32(float32_t __p0) { | 44862 | __ai int32_t vcvtas_s32_f32(float32_t __p0) { |
| 52836 | int32_t __ret; | 44863 | int32_t __ret; |
| 52837 | __ret = (int32_t) __builtin_neon_vcvtas_s32_f32(__p0); | 44864 | __ret = (int32_t) __builtin_neon_vcvtas_s32_f32(__p0); |
| 52838 | return __ret; | 44865 | return __ret; |
| 52839 | } | 44866 | } |
| 52840 | #endif | | |
| 52841 | | | |
| 52842 | #ifdef __LITTLE_ENDIAN__ | | |
| 52843 | __ai int64_t vcvtad_s64_f64(float64_t __p0) { | | |
| 52844 | int64_t __ret; | | |
| 52845 | __ret = (int64_t) __builtin_neon_vcvtad_s64_f64(__p0); | | |
| 52846 | return __ret; | | |
| 52847 | } | | |
| 52848 | #else | | |
| 52849 | __ai int64_t vcvtad_s64_f64(float64_t __p0) { | 44867 | __ai int64_t vcvtad_s64_f64(float64_t __p0) { |
| 52850 | int64_t __ret; | 44868 | int64_t __ret; |
| 52851 | __ret = (int64_t) __builtin_neon_vcvtad_s64_f64(__p0); | 44869 | __ret = (int64_t) __builtin_neon_vcvtad_s64_f64(__p0); |
| 52852 | return __ret; | 44870 | return __ret; |
| 52853 | } | 44871 | } |
| 52854 | #endif | | |
| 52855 | | | |
| 52856 | #ifdef __LITTLE_ENDIAN__ | | |
| 52857 | __ai uint32_t vcvtas_u32_f32(float32_t __p0) { | | |
| 52858 | uint32_t __ret; | | |
| 52859 | __ret = (uint32_t) __builtin_neon_vcvtas_u32_f32(__p0); | | |
| 52860 | return __ret; | | |
| 52861 | } | | |
| 52862 | #else | | |
| 52863 | __ai uint32_t vcvtas_u32_f32(float32_t __p0) { | 44872 | __ai uint32_t vcvtas_u32_f32(float32_t __p0) { |
| 52864 | uint32_t __ret; | 44873 | uint32_t __ret; |
| 52865 | __ret = (uint32_t) __builtin_neon_vcvtas_u32_f32(__p0); | 44874 | __ret = (uint32_t) __builtin_neon_vcvtas_u32_f32(__p0); |
| 52866 | return __ret; | 44875 | return __ret; |
| 52867 | } | 44876 | } |
| 52868 | #endif | | |
| 52869 | | | |
| 52870 | #ifdef __LITTLE_ENDIAN__ | | |
| 52871 | __ai uint64_t vcvtad_u64_f64(float64_t __p0) { | | |
| 52872 | uint64_t __ret; | | |
| 52873 | __ret = (uint64_t) __builtin_neon_vcvtad_u64_f64(__p0); | | |
| 52874 | return __ret; | | |
| 52875 | } | | |
| 52876 | #else | | |
| 52877 | __ai uint64_t vcvtad_u64_f64(float64_t __p0) { | 44877 | __ai uint64_t vcvtad_u64_f64(float64_t __p0) { |
| 52878 | uint64_t __ret; | 44878 | uint64_t __ret; |
| 52879 | __ret = (uint64_t) __builtin_neon_vcvtad_u64_f64(__p0); | 44879 | __ret = (uint64_t) __builtin_neon_vcvtad_u64_f64(__p0); |
| 52880 | return __ret; | 44880 | return __ret; |
| 52881 | } | 44881 | } |
| 52882 | #endif | | |
| 52883 | | | |
| 52884 | #ifdef __LITTLE_ENDIAN__ | | |
| 52885 | __ai int32_t vcvtms_s32_f32(float32_t __p0) { | | |
| 52886 | int32_t __ret; | | |
| 52887 | __ret = (int32_t) __builtin_neon_vcvtms_s32_f32(__p0); | | |
| 52888 | return __ret; | | |
| 52889 | } | | |
| 52890 | #else | | |
| 52891 | __ai int32_t vcvtms_s32_f32(float32_t __p0) { | 44882 | __ai int32_t vcvtms_s32_f32(float32_t __p0) { |
| 52892 | int32_t __ret; | 44883 | int32_t __ret; |
| 52893 | __ret = (int32_t) __builtin_neon_vcvtms_s32_f32(__p0); | 44884 | __ret = (int32_t) __builtin_neon_vcvtms_s32_f32(__p0); |
| 52894 | return __ret; | 44885 | return __ret; |
| 52895 | } | 44886 | } |
| 52896 | #endif | | |
| 52897 | | | |
| 52898 | #ifdef __LITTLE_ENDIAN__ | | |
| 52899 | __ai int64_t vcvtmd_s64_f64(float64_t __p0) { | | |
| 52900 | int64_t __ret; | | |
| 52901 | __ret = (int64_t) __builtin_neon_vcvtmd_s64_f64(__p0); | | |
| 52902 | return __ret; | | |
| 52903 | } | | |
| 52904 | #else | | |
| 52905 | __ai int64_t vcvtmd_s64_f64(float64_t __p0) { | 44887 | __ai int64_t vcvtmd_s64_f64(float64_t __p0) { |
| 52906 | int64_t __ret; | 44888 | int64_t __ret; |
| 52907 | __ret = (int64_t) __builtin_neon_vcvtmd_s64_f64(__p0); | 44889 | __ret = (int64_t) __builtin_neon_vcvtmd_s64_f64(__p0); |
| 52908 | return __ret; | 44890 | return __ret; |
| 52909 | } | 44891 | } |
| 52910 | #endif | | |
| 52911 | | | |
| 52912 | #ifdef __LITTLE_ENDIAN__ | | |
| 52913 | __ai uint32_t vcvtms_u32_f32(float32_t __p0) { | | |
| 52914 | uint32_t __ret; | | |
| 52915 | __ret = (uint32_t) __builtin_neon_vcvtms_u32_f32(__p0); | | |
| 52916 | return __ret; | | |
| 52917 | } | | |
| 52918 | #else | | |
| 52919 | __ai uint32_t vcvtms_u32_f32(float32_t __p0) { | 44892 | __ai uint32_t vcvtms_u32_f32(float32_t __p0) { |
| 52920 | uint32_t __ret; | 44893 | uint32_t __ret; |
| 52921 | __ret = (uint32_t) __builtin_neon_vcvtms_u32_f32(__p0); | 44894 | __ret = (uint32_t) __builtin_neon_vcvtms_u32_f32(__p0); |
| 52922 | return __ret; | 44895 | return __ret; |
| 52923 | } | 44896 | } |
| 52924 | #endif | | |
| 52925 | | | |
| 52926 | #ifdef __LITTLE_ENDIAN__ | | |
| 52927 | __ai uint64_t vcvtmd_u64_f64(float64_t __p0) { | | |
| 52928 | uint64_t __ret; | | |
| 52929 | __ret = (uint64_t) __builtin_neon_vcvtmd_u64_f64(__p0); | | |
| 52930 | return __ret; | | |
| 52931 | } | | |
| 52932 | #else | | |
| 52933 | __ai uint64_t vcvtmd_u64_f64(float64_t __p0) { | 44897 | __ai uint64_t vcvtmd_u64_f64(float64_t __p0) { |
| 52934 | uint64_t __ret; | 44898 | uint64_t __ret; |
| 52935 | __ret = (uint64_t) __builtin_neon_vcvtmd_u64_f64(__p0); | 44899 | __ret = (uint64_t) __builtin_neon_vcvtmd_u64_f64(__p0); |
| 52936 | return __ret; | 44900 | return __ret; |
| 52937 | } | 44901 | } |
| 52938 | #endif | | |
| 52939 | | | |
| 52940 | #ifdef __LITTLE_ENDIAN__ | | |
| 52941 | __ai int32_t vcvtns_s32_f32(float32_t __p0) { | | |
| 52942 | int32_t __ret; | | |
| 52943 | __ret = (int32_t) __builtin_neon_vcvtns_s32_f32(__p0); | | |
| 52944 | return __ret; | | |
| 52945 | } | | |
| 52946 | #else | | |
| 52947 | __ai int32_t vcvtns_s32_f32(float32_t __p0) { | 44902 | __ai int32_t vcvtns_s32_f32(float32_t __p0) { |
| 52948 | int32_t __ret; | 44903 | int32_t __ret; |
| 52949 | __ret = (int32_t) __builtin_neon_vcvtns_s32_f32(__p0); | 44904 | __ret = (int32_t) __builtin_neon_vcvtns_s32_f32(__p0); |
| 52950 | return __ret; | 44905 | return __ret; |
| 52951 | } | 44906 | } |
| 52952 | #endif | | |
| 52953 | | | |
| 52954 | #ifdef __LITTLE_ENDIAN__ | | |
| 52955 | __ai int64_t vcvtnd_s64_f64(float64_t __p0) { | 44907 | __ai int64_t vcvtnd_s64_f64(float64_t __p0) { |
| 52956 | int64_t __ret; | 44908 | int64_t __ret; |
| 52957 | __ret = (int64_t) __builtin_neon_vcvtnd_s64_f64(__p0); | 44909 | __ret = (int64_t) __builtin_neon_vcvtnd_s64_f64(__p0); |
| 52958 | return __ret; | 44910 | return __ret; |
| 52959 | } | 44911 | } |
| 52960 | #else | | |
| 52961 | __ai int64_t vcvtnd_s64_f64(float64_t __p0) { | | |
| 52962 | int64_t __ret; | | |
| 52963 | __ret = (int64_t) __builtin_neon_vcvtnd_s64_f64(__p0); | | |
| 52964 | return __ret; | | |
| 52965 | } | | |
| 52966 | #endif | | |
| 52967 | | | |
| 52968 | #ifdef __LITTLE_ENDIAN__ | | |
| 52969 | __ai uint32_t vcvtns_u32_f32(float32_t __p0) { | | |
| 52970 | uint32_t __ret; | | |
| 52971 | __ret = (uint32_t) __builtin_neon_vcvtns_u32_f32(__p0); | | |
| 52972 | return __ret; | | |
| 52973 | } | | |
| 52974 | #else | | |
| 52975 | __ai uint32_t vcvtns_u32_f32(float32_t __p0) { | 44912 | __ai uint32_t vcvtns_u32_f32(float32_t __p0) { |
| 52976 | uint32_t __ret; | 44913 | uint32_t __ret; |
| 52977 | __ret = (uint32_t) __builtin_neon_vcvtns_u32_f32(__p0); | 44914 | __ret = (uint32_t) __builtin_neon_vcvtns_u32_f32(__p0); |
| 52978 | return __ret; | 44915 | return __ret; |
| 52979 | } | 44916 | } |
| 52980 | #endif | | |
| 52981 | | | |
| 52982 | #ifdef __LITTLE_ENDIAN__ | | |
| 52983 | __ai uint64_t vcvtnd_u64_f64(float64_t __p0) { | 44917 | __ai uint64_t vcvtnd_u64_f64(float64_t __p0) { |
| 52984 | uint64_t __ret; | 44918 | uint64_t __ret; |
| 52985 | __ret = (uint64_t) __builtin_neon_vcvtnd_u64_f64(__p0); | 44919 | __ret = (uint64_t) __builtin_neon_vcvtnd_u64_f64(__p0); |
| 52986 | return __ret; | 44920 | return __ret; |
| 52987 | } | 44921 | } |
| 52988 | #else | | |
| 52989 | __ai uint64_t vcvtnd_u64_f64(float64_t __p0) { | | |
| 52990 | uint64_t __ret; | | |
| 52991 | __ret = (uint64_t) __builtin_neon_vcvtnd_u64_f64(__p0); | | |
| 52992 | return __ret; | | |
| 52993 | } | | |
| 52994 | #endif | | |
| 52995 | | | |
| 52996 | #ifdef __LITTLE_ENDIAN__ | | |
| 52997 | __ai int32_t vcvtps_s32_f32(float32_t __p0) { | | |
| 52998 | int32_t __ret; | | |
| 52999 | __ret = (int32_t) __builtin_neon_vcvtps_s32_f32(__p0); | | |
| 53000 | return __ret; | | |
| 53001 | } | | |
| 53002 | #else | | |
| 53003 | __ai int32_t vcvtps_s32_f32(float32_t __p0) { | 44922 | __ai int32_t vcvtps_s32_f32(float32_t __p0) { |
| 53004 | int32_t __ret; | 44923 | int32_t __ret; |
| 53005 | __ret = (int32_t) __builtin_neon_vcvtps_s32_f32(__p0); | 44924 | __ret = (int32_t) __builtin_neon_vcvtps_s32_f32(__p0); |
| 53006 | return __ret; | 44925 | return __ret; |
| 53007 | } | 44926 | } |
| 53008 | #endif | | |
| 53009 | | | |
| 53010 | #ifdef __LITTLE_ENDIAN__ | | |
| 53011 | __ai int64_t vcvtpd_s64_f64(float64_t __p0) { | | |
| 53012 | int64_t __ret; | | |
| 53013 | __ret = (int64_t) __builtin_neon_vcvtpd_s64_f64(__p0); | | |
| 53014 | return __ret; | | |
| 53015 | } | | |
| 53016 | #else | | |
| 53017 | __ai int64_t vcvtpd_s64_f64(float64_t __p0) { | 44927 | __ai int64_t vcvtpd_s64_f64(float64_t __p0) { |
| 53018 | int64_t __ret; | 44928 | int64_t __ret; |
| 53019 | __ret = (int64_t) __builtin_neon_vcvtpd_s64_f64(__p0); | 44929 | __ret = (int64_t) __builtin_neon_vcvtpd_s64_f64(__p0); |
| 53020 | return __ret; | 44930 | return __ret; |
| 53021 | } | 44931 | } |
| 53022 | #endif | | |
| 53023 | | | |
| 53024 | #ifdef __LITTLE_ENDIAN__ | | |
| 53025 | __ai uint32_t vcvtps_u32_f32(float32_t __p0) { | 44932 | __ai uint32_t vcvtps_u32_f32(float32_t __p0) { |
| 53026 | uint32_t __ret; | 44933 | uint32_t __ret; |
| 53027 | __ret = (uint32_t) __builtin_neon_vcvtps_u32_f32(__p0); | 44934 | __ret = (uint32_t) __builtin_neon_vcvtps_u32_f32(__p0); |
| 53028 | return __ret; | 44935 | return __ret; |
| 53029 | } | 44936 | } |
| 53030 | #else | | |
| 53031 | __ai uint32_t vcvtps_u32_f32(float32_t __p0) { | | |
| 53032 | uint32_t __ret; | | |
| 53033 | __ret = (uint32_t) __builtin_neon_vcvtps_u32_f32(__p0); | | |
| 53034 | return __ret; | | |
| 53035 | } | | |
| 53036 | #endif | | |
| 53037 | | | |
| 53038 | #ifdef __LITTLE_ENDIAN__ | | |
| 53039 | __ai uint64_t vcvtpd_u64_f64(float64_t __p0) { | 44937 | __ai uint64_t vcvtpd_u64_f64(float64_t __p0) { |
| 53040 | uint64_t __ret; | 44938 | uint64_t __ret; |
| 53041 | __ret = (uint64_t) __builtin_neon_vcvtpd_u64_f64(__p0); | 44939 | __ret = (uint64_t) __builtin_neon_vcvtpd_u64_f64(__p0); |
| 53042 | return __ret; | 44940 | return __ret; |
| 53043 | } | 44941 | } |
| 53044 | #else | | |
| 53045 | __ai uint64_t vcvtpd_u64_f64(float64_t __p0) { | | |
| 53046 | uint64_t __ret; | | |
| 53047 | __ret = (uint64_t) __builtin_neon_vcvtpd_u64_f64(__p0); | | |
| 53048 | return __ret; | | |
| 53049 | } | | |
| 53050 | #endif | | |
| 53051 | | | |
| 53052 | #ifdef __LITTLE_ENDIAN__ | | |
| 53053 | __ai float32_t vcvtxd_f32_f64(float64_t __p0) { | | |
| 53054 | float32_t __ret; | | |
| 53055 | __ret = (float32_t) __builtin_neon_vcvtxd_f32_f64(__p0); | | |
| 53056 | return __ret; | | |
| 53057 | } | | |
| 53058 | #else | | |
| 53059 | __ai float32_t vcvtxd_f32_f64(float64_t __p0) { | 44942 | __ai float32_t vcvtxd_f32_f64(float64_t __p0) { |
| 53060 | float32_t __ret; | 44943 | float32_t __ret; |
| 53061 | __ret = (float32_t) __builtin_neon_vcvtxd_f32_f64(__p0); | 44944 | __ret = (float32_t) __builtin_neon_vcvtxd_f32_f64(__p0); |
| 53062 | return __ret; | 44945 | return __ret; |
| 53063 | } | 44946 | } |
| 53064 | #endif | | |
| 53065 | | | |
| 53066 | #ifdef __LITTLE_ENDIAN__ | 44947 | #ifdef __LITTLE_ENDIAN__ |
| 53067 | __ai float32x2_t vcvtx_f32_f64(float64x2_t __p0) { | 44948 | __ai float32x2_t vcvtx_f32_f64(float64x2_t __p0) { |
| 53068 | float32x2_t __ret; | 44949 | float32x2_t __ret; |
| ... | @@ -53135,20 +45016,11 @@ __ai float32x4_t vdivq_f32(float32x4_t __p0, float32x4_t __p1) { | ... | @@ -53135,20 +45016,11 @@ __ai float32x4_t vdivq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 53135 | } | 45016 | } |
| 53136 | #endif | 45017 | #endif |
| 53137 | | 45018 | |
| 53138 | #ifdef __LITTLE_ENDIAN__ | | |
| 53139 | __ai float64x1_t vdiv_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 53140 | float64x1_t __ret; | | |
| 53141 | __ret = __p0 / __p1; | | |
| 53142 | return __ret; | | |
| 53143 | } | | |
| 53144 | #else | | |
| 53145 | __ai float64x1_t vdiv_f64(float64x1_t __p0, float64x1_t __p1) { | 45019 | __ai float64x1_t vdiv_f64(float64x1_t __p0, float64x1_t __p1) { |
| 53146 | float64x1_t __ret; | 45020 | float64x1_t __ret; |
| 53147 | __ret = __p0 / __p1; | 45021 | __ret = __p0 / __p1; |
| 53148 | return __ret; | 45022 | return __ret; |
| 53149 | } | 45023 | } |
| 53150 | #endif | | |
| 53151 | | | |
| 53152 | #ifdef __LITTLE_ENDIAN__ | 45024 | #ifdef __LITTLE_ENDIAN__ |
| 53153 | __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | 45025 | __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53154 | float32x2_t __ret; | 45026 | float32x2_t __ret; |
| ... | @@ -53170,7 +45042,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53170,7 +45042,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53170 | #define vdupb_lane_p8(__p0, __p1) __extension__ ({ \ | 45042 | #define vdupb_lane_p8(__p0, __p1) __extension__ ({ \ |
| 53171 | poly8x8_t __s0 = __p0; \ | 45043 | poly8x8_t __s0 = __p0; \ |
| 53172 | poly8_t __ret; \ | 45044 | poly8_t __ret; \ |
| 53173 | __ret = (poly8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__s0, __p1); \ | 45045 | __ret = (poly8_t) __builtin_neon_vdupb_lane_i8((poly8x8_t)__s0, __p1); \ |
| 53174 | __ret; \ | 45046 | __ret; \ |
| 53175 | }) | 45047 | }) |
| 53176 | #else | 45048 | #else |
| ... | @@ -53178,7 +45050,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53178,7 +45050,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53178 | poly8x8_t __s0 = __p0; \ | 45050 | poly8x8_t __s0 = __p0; \ |
| 53179 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 45051 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53180 | poly8_t __ret; \ | 45052 | poly8_t __ret; \ |
| 53181 | __ret = (poly8_t) __builtin_neon_vdupb_lane_i8((int8x8_t)__rev0, __p1); \ | 45053 | __ret = (poly8_t) __builtin_neon_vdupb_lane_i8((poly8x8_t)__rev0, __p1); \ |
| 53182 | __ret; \ | 45054 | __ret; \ |
| 53183 | }) | 45055 | }) |
| 53184 | #endif | 45056 | #endif |
| ... | @@ -53187,7 +45059,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53187,7 +45059,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53187 | #define vduph_lane_p16(__p0, __p1) __extension__ ({ \ | 45059 | #define vduph_lane_p16(__p0, __p1) __extension__ ({ \ |
| 53188 | poly16x4_t __s0 = __p0; \ | 45060 | poly16x4_t __s0 = __p0; \ |
| 53189 | poly16_t __ret; \ | 45061 | poly16_t __ret; \ |
| 53190 | __ret = (poly16_t) __builtin_neon_vduph_lane_i16((int8x8_t)__s0, __p1); \ | 45062 | __ret = (poly16_t) __builtin_neon_vduph_lane_i16((poly16x4_t)__s0, __p1); \ |
| 53191 | __ret; \ | 45063 | __ret; \ |
| 53192 | }) | 45064 | }) |
| 53193 | #else | 45065 | #else |
| ... | @@ -53195,7 +45067,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53195,7 +45067,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53195 | poly16x4_t __s0 = __p0; \ | 45067 | poly16x4_t __s0 = __p0; \ |
| 53196 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 45068 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 53197 | poly16_t __ret; \ | 45069 | poly16_t __ret; \ |
| 53198 | __ret = (poly16_t) __builtin_neon_vduph_lane_i16((int8x8_t)__rev0, __p1); \ | 45070 | __ret = (poly16_t) __builtin_neon_vduph_lane_i16((poly16x4_t)__rev0, __p1); \ |
| 53199 | __ret; \ | 45071 | __ret; \ |
| 53200 | }) | 45072 | }) |
| 53201 | #endif | 45073 | #endif |
| ... | @@ -53221,7 +45093,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53221,7 +45093,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53221 | #define vdups_lane_u32(__p0, __p1) __extension__ ({ \ | 45093 | #define vdups_lane_u32(__p0, __p1) __extension__ ({ \ |
| 53222 | uint32x2_t __s0 = __p0; \ | 45094 | uint32x2_t __s0 = __p0; \ |
| 53223 | uint32_t __ret; \ | 45095 | uint32_t __ret; \ |
| 53224 | __ret = (uint32_t) __builtin_neon_vdups_lane_i32((int8x8_t)__s0, __p1); \ | 45096 | __ret = (uint32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__s0, __p1); \ |
| 53225 | __ret; \ | 45097 | __ret; \ |
| 53226 | }) | 45098 | }) |
| 53227 | #else | 45099 | #else |
| ... | @@ -53229,32 +45101,22 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53229,32 +45101,22 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53229 | uint32x2_t __s0 = __p0; \ | 45101 | uint32x2_t __s0 = __p0; \ |
| 53230 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 45102 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 53231 | uint32_t __ret; \ | 45103 | uint32_t __ret; \ |
| 53232 | __ret = (uint32_t) __builtin_neon_vdups_lane_i32((int8x8_t)__rev0, __p1); \ | 45104 | __ret = (uint32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__rev0, __p1); \ |
| 53233 | __ret; \ | 45105 | __ret; \ |
| 53234 | }) | 45106 | }) |
| 53235 | #endif | 45107 | #endif |
| 53236 | | 45108 | |
| 53237 | #ifdef __LITTLE_ENDIAN__ | | |
| 53238 | #define vdupd_lane_u64(__p0, __p1) __extension__ ({ \ | | |
| 53239 | uint64x1_t __s0 = __p0; \ | | |
| 53240 | uint64_t __ret; \ | | |
| 53241 | __ret = (uint64_t) __builtin_neon_vdupd_lane_i64((int8x8_t)__s0, __p1); \ | | |
| 53242 | __ret; \ | | |
| 53243 | }) | | |
| 53244 | #else | | |
| 53245 | #define vdupd_lane_u64(__p0, __p1) __extension__ ({ \ | 45109 | #define vdupd_lane_u64(__p0, __p1) __extension__ ({ \ |
| 53246 | uint64x1_t __s0 = __p0; \ | 45110 | uint64x1_t __s0 = __p0; \ |
| 53247 | uint64_t __ret; \ | 45111 | uint64_t __ret; \ |
| 53248 | __ret = (uint64_t) __builtin_neon_vdupd_lane_i64((int8x8_t)__s0, __p1); \ | 45112 | __ret = (uint64_t) __builtin_neon_vdupd_lane_i64((int64x1_t)__s0, __p1); \ |
| 53249 | __ret; \ | 45113 | __ret; \ |
| 53250 | }) | 45114 | }) |
| 53251 | #endif | | |
| 53252 | | | |
| 53253 | #ifdef __LITTLE_ENDIAN__ | 45115 | #ifdef __LITTLE_ENDIAN__ |
| 53254 | #define vduph_lane_u16(__p0, __p1) __extension__ ({ \ | 45116 | #define vduph_lane_u16(__p0, __p1) __extension__ ({ \ |
| 53255 | uint16x4_t __s0 = __p0; \ | 45117 | uint16x4_t __s0 = __p0; \ |
| 53256 | uint16_t __ret; \ | 45118 | uint16_t __ret; \ |
| 53257 | __ret = (uint16_t) __builtin_neon_vduph_lane_i16((int8x8_t)__s0, __p1); \ | 45119 | __ret = (uint16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__s0, __p1); \ |
| 53258 | __ret; \ | 45120 | __ret; \ |
| 53259 | }) | 45121 | }) |
| 53260 | #else | 45122 | #else |
| ... | @@ -53262,7 +45124,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53262,7 +45124,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53262 | uint16x4_t __s0 = __p0; \ | 45124 | uint16x4_t __s0 = __p0; \ |
| 53263 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 45125 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 53264 | uint16_t __ret; \ | 45126 | uint16_t __ret; \ |
| 53265 | __ret = (uint16_t) __builtin_neon_vduph_lane_i16((int8x8_t)__rev0, __p1); \ | 45127 | __ret = (uint16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__rev0, __p1); \ |
| 53266 | __ret; \ | 45128 | __ret; \ |
| 53267 | }) | 45129 | }) |
| 53268 | #endif | 45130 | #endif |
| ... | @@ -53284,27 +45146,17 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53284,27 +45146,17 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53284 | }) | 45146 | }) |
| 53285 | #endif | 45147 | #endif |
| 53286 | | 45148 | |
| 53287 | #ifdef __LITTLE_ENDIAN__ | | |
| 53288 | #define vdupd_lane_f64(__p0, __p1) __extension__ ({ \ | | |
| 53289 | float64x1_t __s0 = __p0; \ | | |
| 53290 | float64_t __ret; \ | | |
| 53291 | __ret = (float64_t) __builtin_neon_vdupd_lane_f64((int8x8_t)__s0, __p1); \ | | |
| 53292 | __ret; \ | | |
| 53293 | }) | | |
| 53294 | #else | | |
| 53295 | #define vdupd_lane_f64(__p0, __p1) __extension__ ({ \ | 45149 | #define vdupd_lane_f64(__p0, __p1) __extension__ ({ \ |
| 53296 | float64x1_t __s0 = __p0; \ | 45150 | float64x1_t __s0 = __p0; \ |
| 53297 | float64_t __ret; \ | 45151 | float64_t __ret; \ |
| 53298 | __ret = (float64_t) __builtin_neon_vdupd_lane_f64((int8x8_t)__s0, __p1); \ | 45152 | __ret = (float64_t) __builtin_neon_vdupd_lane_f64((float64x1_t)__s0, __p1); \ |
| 53299 | __ret; \ | 45153 | __ret; \ |
| 53300 | }) | 45154 | }) |
| 53301 | #endif | | |
| 53302 | | | |
| 53303 | #ifdef __LITTLE_ENDIAN__ | 45155 | #ifdef __LITTLE_ENDIAN__ |
| 53304 | #define vdups_lane_f32(__p0, __p1) __extension__ ({ \ | 45156 | #define vdups_lane_f32(__p0, __p1) __extension__ ({ \ |
| 53305 | float32x2_t __s0 = __p0; \ | 45157 | float32x2_t __s0 = __p0; \ |
| 53306 | float32_t __ret; \ | 45158 | float32_t __ret; \ |
| 53307 | __ret = (float32_t) __builtin_neon_vdups_lane_f32((int8x8_t)__s0, __p1); \ | 45159 | __ret = (float32_t) __builtin_neon_vdups_lane_f32((float32x2_t)__s0, __p1); \ |
| 53308 | __ret; \ | 45160 | __ret; \ |
| 53309 | }) | 45161 | }) |
| 53310 | #else | 45162 | #else |
| ... | @@ -53312,7 +45164,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53312,7 +45164,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53312 | float32x2_t __s0 = __p0; \ | 45164 | float32x2_t __s0 = __p0; \ |
| 53313 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 45165 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 53314 | float32_t __ret; \ | 45166 | float32_t __ret; \ |
| 53315 | __ret = (float32_t) __builtin_neon_vdups_lane_f32((int8x8_t)__rev0, __p1); \ | 45167 | __ret = (float32_t) __builtin_neon_vdups_lane_f32((float32x2_t)__rev0, __p1); \ |
| 53316 | __ret; \ | 45168 | __ret; \ |
| 53317 | }) | 45169 | }) |
| 53318 | #endif | 45170 | #endif |
| ... | @@ -53321,7 +45173,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53321,7 +45173,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53321 | #define vdups_lane_s32(__p0, __p1) __extension__ ({ \ | 45173 | #define vdups_lane_s32(__p0, __p1) __extension__ ({ \ |
| 53322 | int32x2_t __s0 = __p0; \ | 45174 | int32x2_t __s0 = __p0; \ |
| 53323 | int32_t __ret; \ | 45175 | int32_t __ret; \ |
| 53324 | __ret = (int32_t) __builtin_neon_vdups_lane_i32((int8x8_t)__s0, __p1); \ | 45176 | __ret = (int32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__s0, __p1); \ |
| 53325 | __ret; \ | 45177 | __ret; \ |
| 53326 | }) | 45178 | }) |
| 53327 | #else | 45179 | #else |
| ... | @@ -53329,32 +45181,22 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53329,32 +45181,22 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53329 | int32x2_t __s0 = __p0; \ | 45181 | int32x2_t __s0 = __p0; \ |
| 53330 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 45182 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 53331 | int32_t __ret; \ | 45183 | int32_t __ret; \ |
| 53332 | __ret = (int32_t) __builtin_neon_vdups_lane_i32((int8x8_t)__rev0, __p1); \ | 45184 | __ret = (int32_t) __builtin_neon_vdups_lane_i32((int32x2_t)__rev0, __p1); \ |
| 53333 | __ret; \ | 45185 | __ret; \ |
| 53334 | }) | 45186 | }) |
| 53335 | #endif | 45187 | #endif |
| 53336 | | 45188 | |
| 53337 | #ifdef __LITTLE_ENDIAN__ | | |
| 53338 | #define vdupd_lane_s64(__p0, __p1) __extension__ ({ \ | | |
| 53339 | int64x1_t __s0 = __p0; \ | | |
| 53340 | int64_t __ret; \ | | |
| 53341 | __ret = (int64_t) __builtin_neon_vdupd_lane_i64((int8x8_t)__s0, __p1); \ | | |
| 53342 | __ret; \ | | |
| 53343 | }) | | |
| 53344 | #else | | |
| 53345 | #define vdupd_lane_s64(__p0, __p1) __extension__ ({ \ | 45189 | #define vdupd_lane_s64(__p0, __p1) __extension__ ({ \ |
| 53346 | int64x1_t __s0 = __p0; \ | 45190 | int64x1_t __s0 = __p0; \ |
| 53347 | int64_t __ret; \ | 45191 | int64_t __ret; \ |
| 53348 | __ret = (int64_t) __builtin_neon_vdupd_lane_i64((int8x8_t)__s0, __p1); \ | 45192 | __ret = (int64_t) __builtin_neon_vdupd_lane_i64((int64x1_t)__s0, __p1); \ |
| 53349 | __ret; \ | 45193 | __ret; \ |
| 53350 | }) | 45194 | }) |
| 53351 | #endif | | |
| 53352 | | | |
| 53353 | #ifdef __LITTLE_ENDIAN__ | 45195 | #ifdef __LITTLE_ENDIAN__ |
| 53354 | #define vduph_lane_s16(__p0, __p1) __extension__ ({ \ | 45196 | #define vduph_lane_s16(__p0, __p1) __extension__ ({ \ |
| 53355 | int16x4_t __s0 = __p0; \ | 45197 | int16x4_t __s0 = __p0; \ |
| 53356 | int16_t __ret; \ | 45198 | int16_t __ret; \ |
| 53357 | __ret = (int16_t) __builtin_neon_vduph_lane_i16((int8x8_t)__s0, __p1); \ | 45199 | __ret = (int16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__s0, __p1); \ |
| 53358 | __ret; \ | 45200 | __ret; \ |
| 53359 | }) | 45201 | }) |
| 53360 | #else | 45202 | #else |
| ... | @@ -53362,27 +45204,17 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53362,27 +45204,17 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53362 | int16x4_t __s0 = __p0; \ | 45204 | int16x4_t __s0 = __p0; \ |
| 53363 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 45205 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 53364 | int16_t __ret; \ | 45206 | int16_t __ret; \ |
| 53365 | __ret = (int16_t) __builtin_neon_vduph_lane_i16((int8x8_t)__rev0, __p1); \ | 45207 | __ret = (int16_t) __builtin_neon_vduph_lane_i16((int16x4_t)__rev0, __p1); \ |
| 53366 | __ret; \ | 45208 | __ret; \ |
| 53367 | }) | 45209 | }) |
| 53368 | #endif | 45210 | #endif |
| 53369 | | 45211 | |
| 53370 | #ifdef __LITTLE_ENDIAN__ | | |
| 53371 | #define vdup_lane_p64(__p0, __p1) __extension__ ({ \ | 45212 | #define vdup_lane_p64(__p0, __p1) __extension__ ({ \ |
| 53372 | poly64x1_t __s0 = __p0; \ | 45213 | poly64x1_t __s0 = __p0; \ |
| 53373 | poly64x1_t __ret; \ | 45214 | poly64x1_t __ret; \ |
| 53374 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ | 45215 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ |
| 53375 | __ret; \ | 45216 | __ret; \ |
| 53376 | }) | 45217 | }) |
| 53377 | #else | | |
| 53378 | #define vdup_lane_p64(__p0, __p1) __extension__ ({ \ | | |
| 53379 | poly64x1_t __s0 = __p0; \ | | |
| 53380 | poly64x1_t __ret; \ | | |
| 53381 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ | | |
| 53382 | __ret; \ | | |
| 53383 | }) | | |
| 53384 | #endif | | |
| 53385 | | | |
| 53386 | #ifdef __LITTLE_ENDIAN__ | 45218 | #ifdef __LITTLE_ENDIAN__ |
| 53387 | #define vdupq_lane_p64(__p0, __p1) __extension__ ({ \ | 45219 | #define vdupq_lane_p64(__p0, __p1) __extension__ ({ \ |
| 53388 | poly64x1_t __s0 = __p0; \ | 45220 | poly64x1_t __s0 = __p0; \ |
| ... | @@ -53435,22 +45267,12 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53435,22 +45267,12 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53435 | }) | 45267 | }) |
| 53436 | #endif | 45268 | #endif |
| 53437 | | 45269 | |
| 53438 | #ifdef __LITTLE_ENDIAN__ | | |
| 53439 | #define vdup_lane_f64(__p0, __p1) __extension__ ({ \ | 45270 | #define vdup_lane_f64(__p0, __p1) __extension__ ({ \ |
| 53440 | float64x1_t __s0 = __p0; \ | 45271 | float64x1_t __s0 = __p0; \ |
| 53441 | float64x1_t __ret; \ | 45272 | float64x1_t __ret; \ |
| 53442 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ | 45273 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ |
| 53443 | __ret; \ | 45274 | __ret; \ |
| 53444 | }) | 45275 | }) |
| 53445 | #else | | |
| 53446 | #define vdup_lane_f64(__p0, __p1) __extension__ ({ \ | | |
| 53447 | float64x1_t __s0 = __p0; \ | | |
| 53448 | float64x1_t __ret; \ | | |
| 53449 | __ret = __builtin_shufflevector(__s0, __s0, __p1); \ | | |
| 53450 | __ret; \ | | |
| 53451 | }) | | |
| 53452 | #endif | | |
| 53453 | | | |
| 53454 | #ifdef __LITTLE_ENDIAN__ | 45276 | #ifdef __LITTLE_ENDIAN__ |
| 53455 | #define vdup_lane_f16(__p0, __p1) __extension__ ({ \ | 45277 | #define vdup_lane_f16(__p0, __p1) __extension__ ({ \ |
| 53456 | float16x4_t __s0 = __p0; \ | 45278 | float16x4_t __s0 = __p0; \ |
| ... | @@ -53473,7 +45295,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53473,7 +45295,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53473 | #define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \ | 45295 | #define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \ |
| 53474 | poly8x16_t __s0 = __p0; \ | 45296 | poly8x16_t __s0 = __p0; \ |
| 53475 | poly8_t __ret; \ | 45297 | poly8_t __ret; \ |
| 53476 | __ret = (poly8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__s0, __p1); \ | 45298 | __ret = (poly8_t) __builtin_neon_vdupb_laneq_i8((poly8x16_t)__s0, __p1); \ |
| 53477 | __ret; \ | 45299 | __ret; \ |
| 53478 | }) | 45300 | }) |
| 53479 | #else | 45301 | #else |
| ... | @@ -53481,7 +45303,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53481,7 +45303,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53481 | poly8x16_t __s0 = __p0; \ | 45303 | poly8x16_t __s0 = __p0; \ |
| 53482 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 45304 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53483 | poly8_t __ret; \ | 45305 | poly8_t __ret; \ |
| 53484 | __ret = (poly8_t) __builtin_neon_vdupb_laneq_i8((int8x16_t)__rev0, __p1); \ | 45306 | __ret = (poly8_t) __builtin_neon_vdupb_laneq_i8((poly8x16_t)__rev0, __p1); \ |
| 53485 | __ret; \ | 45307 | __ret; \ |
| 53486 | }) | 45308 | }) |
| 53487 | #endif | 45309 | #endif |
| ... | @@ -53490,7 +45312,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53490,7 +45312,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53490 | #define vduph_laneq_p16(__p0, __p1) __extension__ ({ \ | 45312 | #define vduph_laneq_p16(__p0, __p1) __extension__ ({ \ |
| 53491 | poly16x8_t __s0 = __p0; \ | 45313 | poly16x8_t __s0 = __p0; \ |
| 53492 | poly16_t __ret; \ | 45314 | poly16_t __ret; \ |
| 53493 | __ret = (poly16_t) __builtin_neon_vduph_laneq_i16((int8x16_t)__s0, __p1); \ | 45315 | __ret = (poly16_t) __builtin_neon_vduph_laneq_i16((poly16x8_t)__s0, __p1); \ |
| 53494 | __ret; \ | 45316 | __ret; \ |
| 53495 | }) | 45317 | }) |
| 53496 | #else | 45318 | #else |
| ... | @@ -53498,7 +45320,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53498,7 +45320,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53498 | poly16x8_t __s0 = __p0; \ | 45320 | poly16x8_t __s0 = __p0; \ |
| 53499 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 45321 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53500 | poly16_t __ret; \ | 45322 | poly16_t __ret; \ |
| 53501 | __ret = (poly16_t) __builtin_neon_vduph_laneq_i16((int8x16_t)__rev0, __p1); \ | 45323 | __ret = (poly16_t) __builtin_neon_vduph_laneq_i16((poly16x8_t)__rev0, __p1); \ |
| 53502 | __ret; \ | 45324 | __ret; \ |
| 53503 | }) | 45325 | }) |
| 53504 | #endif | 45326 | #endif |
| ... | @@ -53524,7 +45346,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53524,7 +45346,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53524 | #define vdups_laneq_u32(__p0, __p1) __extension__ ({ \ | 45346 | #define vdups_laneq_u32(__p0, __p1) __extension__ ({ \ |
| 53525 | uint32x4_t __s0 = __p0; \ | 45347 | uint32x4_t __s0 = __p0; \ |
| 53526 | uint32_t __ret; \ | 45348 | uint32_t __ret; \ |
| 53527 | __ret = (uint32_t) __builtin_neon_vdups_laneq_i32((int8x16_t)__s0, __p1); \ | 45349 | __ret = (uint32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__s0, __p1); \ |
| 53528 | __ret; \ | 45350 | __ret; \ |
| 53529 | }) | 45351 | }) |
| 53530 | #else | 45352 | #else |
| ... | @@ -53532,7 +45354,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53532,7 +45354,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53532 | uint32x4_t __s0 = __p0; \ | 45354 | uint32x4_t __s0 = __p0; \ |
| 53533 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 45355 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 53534 | uint32_t __ret; \ | 45356 | uint32_t __ret; \ |
| 53535 | __ret = (uint32_t) __builtin_neon_vdups_laneq_i32((int8x16_t)__rev0, __p1); \ | 45357 | __ret = (uint32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__rev0, __p1); \ |
| 53536 | __ret; \ | 45358 | __ret; \ |
| 53537 | }) | 45359 | }) |
| 53538 | #endif | 45360 | #endif |
| ... | @@ -53541,7 +45363,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53541,7 +45363,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53541 | #define vdupd_laneq_u64(__p0, __p1) __extension__ ({ \ | 45363 | #define vdupd_laneq_u64(__p0, __p1) __extension__ ({ \ |
| 53542 | uint64x2_t __s0 = __p0; \ | 45364 | uint64x2_t __s0 = __p0; \ |
| 53543 | uint64_t __ret; \ | 45365 | uint64_t __ret; \ |
| 53544 | __ret = (uint64_t) __builtin_neon_vdupd_laneq_i64((int8x16_t)__s0, __p1); \ | 45366 | __ret = (uint64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__s0, __p1); \ |
| 53545 | __ret; \ | 45367 | __ret; \ |
| 53546 | }) | 45368 | }) |
| 53547 | #else | 45369 | #else |
| ... | @@ -53549,7 +45371,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53549,7 +45371,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53549 | uint64x2_t __s0 = __p0; \ | 45371 | uint64x2_t __s0 = __p0; \ |
| 53550 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 45372 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 53551 | uint64_t __ret; \ | 45373 | uint64_t __ret; \ |
| 53552 | __ret = (uint64_t) __builtin_neon_vdupd_laneq_i64((int8x16_t)__rev0, __p1); \ | 45374 | __ret = (uint64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__rev0, __p1); \ |
| 53553 | __ret; \ | 45375 | __ret; \ |
| 53554 | }) | 45376 | }) |
| 53555 | #endif | 45377 | #endif |
| ... | @@ -53558,7 +45380,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53558,7 +45380,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53558 | #define vduph_laneq_u16(__p0, __p1) __extension__ ({ \ | 45380 | #define vduph_laneq_u16(__p0, __p1) __extension__ ({ \ |
| 53559 | uint16x8_t __s0 = __p0; \ | 45381 | uint16x8_t __s0 = __p0; \ |
| 53560 | uint16_t __ret; \ | 45382 | uint16_t __ret; \ |
| 53561 | __ret = (uint16_t) __builtin_neon_vduph_laneq_i16((int8x16_t)__s0, __p1); \ | 45383 | __ret = (uint16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__s0, __p1); \ |
| 53562 | __ret; \ | 45384 | __ret; \ |
| 53563 | }) | 45385 | }) |
| 53564 | #else | 45386 | #else |
| ... | @@ -53566,7 +45388,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53566,7 +45388,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53566 | uint16x8_t __s0 = __p0; \ | 45388 | uint16x8_t __s0 = __p0; \ |
| 53567 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 45389 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53568 | uint16_t __ret; \ | 45390 | uint16_t __ret; \ |
| 53569 | __ret = (uint16_t) __builtin_neon_vduph_laneq_i16((int8x16_t)__rev0, __p1); \ | 45391 | __ret = (uint16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__rev0, __p1); \ |
| 53570 | __ret; \ | 45392 | __ret; \ |
| 53571 | }) | 45393 | }) |
| 53572 | #endif | 45394 | #endif |
| ... | @@ -53592,7 +45414,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53592,7 +45414,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53592 | #define vdupd_laneq_f64(__p0, __p1) __extension__ ({ \ | 45414 | #define vdupd_laneq_f64(__p0, __p1) __extension__ ({ \ |
| 53593 | float64x2_t __s0 = __p0; \ | 45415 | float64x2_t __s0 = __p0; \ |
| 53594 | float64_t __ret; \ | 45416 | float64_t __ret; \ |
| 53595 | __ret = (float64_t) __builtin_neon_vdupd_laneq_f64((int8x16_t)__s0, __p1); \ | 45417 | __ret = (float64_t) __builtin_neon_vdupd_laneq_f64((float64x2_t)__s0, __p1); \ |
| 53596 | __ret; \ | 45418 | __ret; \ |
| 53597 | }) | 45419 | }) |
| 53598 | #else | 45420 | #else |
| ... | @@ -53600,7 +45422,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53600,7 +45422,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53600 | float64x2_t __s0 = __p0; \ | 45422 | float64x2_t __s0 = __p0; \ |
| 53601 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 45423 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 53602 | float64_t __ret; \ | 45424 | float64_t __ret; \ |
| 53603 | __ret = (float64_t) __builtin_neon_vdupd_laneq_f64((int8x16_t)__rev0, __p1); \ | 45425 | __ret = (float64_t) __builtin_neon_vdupd_laneq_f64((float64x2_t)__rev0, __p1); \ |
| 53604 | __ret; \ | 45426 | __ret; \ |
| 53605 | }) | 45427 | }) |
| 53606 | #endif | 45428 | #endif |
| ... | @@ -53609,7 +45431,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53609,7 +45431,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53609 | #define vdups_laneq_f32(__p0, __p1) __extension__ ({ \ | 45431 | #define vdups_laneq_f32(__p0, __p1) __extension__ ({ \ |
| 53610 | float32x4_t __s0 = __p0; \ | 45432 | float32x4_t __s0 = __p0; \ |
| 53611 | float32_t __ret; \ | 45433 | float32_t __ret; \ |
| 53612 | __ret = (float32_t) __builtin_neon_vdups_laneq_f32((int8x16_t)__s0, __p1); \ | 45434 | __ret = (float32_t) __builtin_neon_vdups_laneq_f32((float32x4_t)__s0, __p1); \ |
| 53613 | __ret; \ | 45435 | __ret; \ |
| 53614 | }) | 45436 | }) |
| 53615 | #else | 45437 | #else |
| ... | @@ -53617,7 +45439,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53617,7 +45439,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53617 | float32x4_t __s0 = __p0; \ | 45439 | float32x4_t __s0 = __p0; \ |
| 53618 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 45440 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 53619 | float32_t __ret; \ | 45441 | float32_t __ret; \ |
| 53620 | __ret = (float32_t) __builtin_neon_vdups_laneq_f32((int8x16_t)__rev0, __p1); \ | 45442 | __ret = (float32_t) __builtin_neon_vdups_laneq_f32((float32x4_t)__rev0, __p1); \ |
| 53621 | __ret; \ | 45443 | __ret; \ |
| 53622 | }) | 45444 | }) |
| 53623 | #endif | 45445 | #endif |
| ... | @@ -53626,7 +45448,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53626,7 +45448,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53626 | #define vdups_laneq_s32(__p0, __p1) __extension__ ({ \ | 45448 | #define vdups_laneq_s32(__p0, __p1) __extension__ ({ \ |
| 53627 | int32x4_t __s0 = __p0; \ | 45449 | int32x4_t __s0 = __p0; \ |
| 53628 | int32_t __ret; \ | 45450 | int32_t __ret; \ |
| 53629 | __ret = (int32_t) __builtin_neon_vdups_laneq_i32((int8x16_t)__s0, __p1); \ | 45451 | __ret = (int32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__s0, __p1); \ |
| 53630 | __ret; \ | 45452 | __ret; \ |
| 53631 | }) | 45453 | }) |
| 53632 | #else | 45454 | #else |
| ... | @@ -53634,7 +45456,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53634,7 +45456,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53634 | int32x4_t __s0 = __p0; \ | 45456 | int32x4_t __s0 = __p0; \ |
| 53635 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ | 45457 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \ |
| 53636 | int32_t __ret; \ | 45458 | int32_t __ret; \ |
| 53637 | __ret = (int32_t) __builtin_neon_vdups_laneq_i32((int8x16_t)__rev0, __p1); \ | 45459 | __ret = (int32_t) __builtin_neon_vdups_laneq_i32((int32x4_t)__rev0, __p1); \ |
| 53638 | __ret; \ | 45460 | __ret; \ |
| 53639 | }) | 45461 | }) |
| 53640 | #endif | 45462 | #endif |
| ... | @@ -53643,7 +45465,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53643,7 +45465,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53643 | #define vdupd_laneq_s64(__p0, __p1) __extension__ ({ \ | 45465 | #define vdupd_laneq_s64(__p0, __p1) __extension__ ({ \ |
| 53644 | int64x2_t __s0 = __p0; \ | 45466 | int64x2_t __s0 = __p0; \ |
| 53645 | int64_t __ret; \ | 45467 | int64_t __ret; \ |
| 53646 | __ret = (int64_t) __builtin_neon_vdupd_laneq_i64((int8x16_t)__s0, __p1); \ | 45468 | __ret = (int64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__s0, __p1); \ |
| 53647 | __ret; \ | 45469 | __ret; \ |
| 53648 | }) | 45470 | }) |
| 53649 | #else | 45471 | #else |
| ... | @@ -53651,7 +45473,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53651,7 +45473,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53651 | int64x2_t __s0 = __p0; \ | 45473 | int64x2_t __s0 = __p0; \ |
| 53652 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 45474 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 53653 | int64_t __ret; \ | 45475 | int64_t __ret; \ |
| 53654 | __ret = (int64_t) __builtin_neon_vdupd_laneq_i64((int8x16_t)__rev0, __p1); \ | 45476 | __ret = (int64_t) __builtin_neon_vdupd_laneq_i64((int64x2_t)__rev0, __p1); \ |
| 53655 | __ret; \ | 45477 | __ret; \ |
| 53656 | }) | 45478 | }) |
| 53657 | #endif | 45479 | #endif |
| ... | @@ -53660,7 +45482,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53660,7 +45482,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53660 | #define vduph_laneq_s16(__p0, __p1) __extension__ ({ \ | 45482 | #define vduph_laneq_s16(__p0, __p1) __extension__ ({ \ |
| 53661 | int16x8_t __s0 = __p0; \ | 45483 | int16x8_t __s0 = __p0; \ |
| 53662 | int16_t __ret; \ | 45484 | int16_t __ret; \ |
| 53663 | __ret = (int16_t) __builtin_neon_vduph_laneq_i16((int8x16_t)__s0, __p1); \ | 45485 | __ret = (int16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__s0, __p1); \ |
| 53664 | __ret; \ | 45486 | __ret; \ |
| 53665 | }) | 45487 | }) |
| 53666 | #else | 45488 | #else |
| ... | @@ -53668,7 +45490,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -53668,7 +45490,7 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 53668 | int16x8_t __s0 = __p0; \ | 45490 | int16x8_t __s0 = __p0; \ |
| 53669 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ | 45491 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53670 | int16_t __ret; \ | 45492 | int16_t __ret; \ |
| 53671 | __ret = (int16_t) __builtin_neon_vduph_laneq_i16((int8x16_t)__rev0, __p1); \ | 45493 | __ret = (int16_t) __builtin_neon_vduph_laneq_i16((int16x8_t)__rev0, __p1); \ |
| 53672 | __ret; \ | 45494 | __ret; \ |
| 53673 | }) | 45495 | }) |
| 53674 | #endif | 45496 | #endif |
| ... | @@ -54173,20 +45995,11 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -54173,20 +45995,11 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 54173 | }) | 45995 | }) |
| 54174 | #endif | 45996 | #endif |
| 54175 | | 45997 | |
| 54176 | #ifdef __LITTLE_ENDIAN__ | | |
| 54177 | __ai poly64x1_t vdup_n_p64(poly64_t __p0) { | 45998 | __ai poly64x1_t vdup_n_p64(poly64_t __p0) { |
| 54178 | poly64x1_t __ret; | 45999 | poly64x1_t __ret; |
| 54179 | __ret = (poly64x1_t) {__p0}; | 46000 | __ret = (poly64x1_t) {__p0}; |
| 54180 | return __ret; | 46001 | return __ret; |
| 54181 | } | 46002 | } |
| 54182 | #else | | |
| 54183 | __ai poly64x1_t vdup_n_p64(poly64_t __p0) { | | |
| 54184 | poly64x1_t __ret; | | |
| 54185 | __ret = (poly64x1_t) {__p0}; | | |
| 54186 | return __ret; | | |
| 54187 | } | | |
| 54188 | #endif | | |
| 54189 | | | |
| 54190 | #ifdef __LITTLE_ENDIAN__ | 46003 | #ifdef __LITTLE_ENDIAN__ |
| 54191 | __ai poly64x2_t vdupq_n_p64(poly64_t __p0) { | 46004 | __ai poly64x2_t vdupq_n_p64(poly64_t __p0) { |
| 54192 | poly64x2_t __ret; | 46005 | poly64x2_t __ret; |
| ... | @@ -54217,21 +46030,11 @@ __ai float64x2_t vdupq_n_f64(float64_t __p0) { | ... | @@ -54217,21 +46030,11 @@ __ai float64x2_t vdupq_n_f64(float64_t __p0) { |
| 54217 | } | 46030 | } |
| 54218 | #endif | 46031 | #endif |
| 54219 | | 46032 | |
| 54220 | #ifdef __LITTLE_ENDIAN__ | | |
| 54221 | __ai float64x1_t vdup_n_f64(float64_t __p0) { | | |
| 54222 | float64x1_t __ret; | | |
| 54223 | __ret = (float64x1_t) {__p0}; | | |
| 54224 | return __ret; | | |
| 54225 | } | | |
| 54226 | #else | | |
| 54227 | __ai float64x1_t vdup_n_f64(float64_t __p0) { | 46033 | __ai float64x1_t vdup_n_f64(float64_t __p0) { |
| 54228 | float64x1_t __ret; | 46034 | float64x1_t __ret; |
| 54229 | __ret = (float64x1_t) {__p0}; | 46035 | __ret = (float64x1_t) {__p0}; |
| 54230 | return __ret; | 46036 | return __ret; |
| 54231 | } | 46037 | } |
| 54232 | #endif | | |
| 54233 | | | |
| 54234 | #ifdef __LITTLE_ENDIAN__ | | |
| 54235 | #define vext_p64(__p0, __p1, __p2) __extension__ ({ \ | 46038 | #define vext_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 54236 | poly64x1_t __s0 = __p0; \ | 46039 | poly64x1_t __s0 = __p0; \ |
| 54237 | poly64x1_t __s1 = __p1; \ | 46040 | poly64x1_t __s1 = __p1; \ |
| ... | @@ -54239,16 +46042,6 @@ __ai float64x1_t vdup_n_f64(float64_t __p0) { | ... | @@ -54239,16 +46042,6 @@ __ai float64x1_t vdup_n_f64(float64_t __p0) { |
| 54239 | __ret = (poly64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | 46042 | __ret = (poly64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ |
| 54240 | __ret; \ | 46043 | __ret; \ |
| 54241 | }) | 46044 | }) |
| 54242 | #else | | |
| 54243 | #define vext_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54244 | poly64x1_t __s0 = __p0; \ | | |
| 54245 | poly64x1_t __s1 = __p1; \ | | |
| 54246 | poly64x1_t __ret; \ | | |
| 54247 | __ret = (poly64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | | |
| 54248 | __ret; \ | | |
| 54249 | }) | | |
| 54250 | #endif | | |
| 54251 | | | |
| 54252 | #ifdef __LITTLE_ENDIAN__ | 46045 | #ifdef __LITTLE_ENDIAN__ |
| 54253 | #define vextq_p64(__p0, __p1, __p2) __extension__ ({ \ | 46046 | #define vextq_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 54254 | poly64x2_t __s0 = __p0; \ | 46047 | poly64x2_t __s0 = __p0; \ |
| ... | @@ -54291,7 +46084,6 @@ __ai float64x1_t vdup_n_f64(float64_t __p0) { | ... | @@ -54291,7 +46084,6 @@ __ai float64x1_t vdup_n_f64(float64_t __p0) { |
| 54291 | }) | 46084 | }) |
| 54292 | #endif | 46085 | #endif |
| 54293 | | 46086 | |
| 54294 | #ifdef __LITTLE_ENDIAN__ | | |
| 54295 | #define vext_f64(__p0, __p1, __p2) __extension__ ({ \ | 46087 | #define vext_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 54296 | float64x1_t __s0 = __p0; \ | 46088 | float64x1_t __s0 = __p0; \ |
| 54297 | float64x1_t __s1 = __p1; \ | 46089 | float64x1_t __s1 = __p1; \ |
| ... | @@ -54299,16 +46091,6 @@ __ai float64x1_t vdup_n_f64(float64_t __p0) { | ... | @@ -54299,16 +46091,6 @@ __ai float64x1_t vdup_n_f64(float64_t __p0) { |
| 54299 | __ret = (float64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ | 46091 | __ret = (float64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ |
| 54300 | __ret; \ | 46092 | __ret; \ |
| 54301 | }) | 46093 | }) |
| 54302 | #else | | |
| 54303 | #define vext_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 54304 | float64x1_t __s0 = __p0; \ | | |
| 54305 | float64x1_t __s1 = __p1; \ | | |
| 54306 | float64x1_t __ret; \ | | |
| 54307 | __ret = (float64x1_t) __builtin_neon_vext_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ | | |
| 54308 | __ret; \ | | |
| 54309 | }) | | |
| 54310 | #endif | | |
| 54311 | | | |
| 54312 | #ifdef __LITTLE_ENDIAN__ | 46094 | #ifdef __LITTLE_ENDIAN__ |
| 54313 | __ai float64x2_t vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 46095 | __ai float64x2_t vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 54314 | float64x2_t __ret; | 46096 | float64x2_t __ret; |
| ... | @@ -54332,60 +46114,26 @@ __ai float64x2_t __noswap_vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x | ... | @@ -54332,60 +46114,26 @@ __ai float64x2_t __noswap_vfmaq_f64(float64x2_t __p0, float64x2_t __p1, float64x |
| 54332 | } | 46114 | } |
| 54333 | #endif | 46115 | #endif |
| 54334 | | 46116 | |
| 54335 | #ifdef __LITTLE_ENDIAN__ | | |
| 54336 | __ai float64x1_t vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | | |
| 54337 | float64x1_t __ret; | | |
| 54338 | __ret = (float64x1_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | | |
| 54339 | return __ret; | | |
| 54340 | } | | |
| 54341 | #else | | |
| 54342 | __ai float64x1_t vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 46117 | __ai float64x1_t vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 54343 | float64x1_t __ret; | 46118 | float64x1_t __ret; |
| 54344 | __ret = (float64x1_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | 46119 | __ret = (float64x1_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 54345 | return __ret; | 46120 | return __ret; |
| 54346 | } | 46121 | } |
| 54347 | __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | | |
| 54348 | float64x1_t __ret; | | |
| 54349 | __ret = (float64x1_t) __builtin_neon_vfma_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); | | |
| 54350 | return __ret; | | |
| 54351 | } | | |
| 54352 | #endif | | |
| 54353 | | | |
| 54354 | #ifdef __LITTLE_ENDIAN__ | | |
| 54355 | #define vfmad_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 54356 | float64_t __s0 = __p0; \ | | |
| 54357 | float64_t __s1 = __p1; \ | | |
| 54358 | float64x1_t __s2 = __p2; \ | | |
| 54359 | float64_t __ret; \ | | |
| 54360 | __ret = (float64_t) __builtin_neon_vfmad_lane_f64(__s0, __s1, (int8x8_t)__s2, __p3); \ | | |
| 54361 | __ret; \ | | |
| 54362 | }) | | |
| 54363 | #else | | |
| 54364 | #define vfmad_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46122 | #define vfmad_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 54365 | float64_t __s0 = __p0; \ | 46123 | float64_t __s0 = __p0; \ |
| 54366 | float64_t __s1 = __p1; \ | 46124 | float64_t __s1 = __p1; \ |
| 54367 | float64x1_t __s2 = __p2; \ | 46125 | float64x1_t __s2 = __p2; \ |
| 54368 | float64_t __ret; \ | 46126 | float64_t __ret; \ |
| 54369 | __ret = (float64_t) __builtin_neon_vfmad_lane_f64(__s0, __s1, (int8x8_t)__s2, __p3); \ | 46127 | __ret = (float64_t) __builtin_neon_vfmad_lane_f64(__s0, __s1, (float64x1_t)__s2, __p3); \ |
| 54370 | __ret; \ | | |
| 54371 | }) | | |
| 54372 | #define __noswap_vfmad_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 54373 | float64_t __s0 = __p0; \ | | |
| 54374 | float64_t __s1 = __p1; \ | | |
| 54375 | float64x1_t __s2 = __p2; \ | | |
| 54376 | float64_t __ret; \ | | |
| 54377 | __ret = (float64_t) __builtin_neon_vfmad_lane_f64(__s0, __s1, (int8x8_t)__s2, __p3); \ | | |
| 54378 | __ret; \ | 46128 | __ret; \ |
| 54379 | }) | 46129 | }) |
| 54380 | #endif | | |
| 54381 | | | |
| 54382 | #ifdef __LITTLE_ENDIAN__ | 46130 | #ifdef __LITTLE_ENDIAN__ |
| 54383 | #define vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46131 | #define vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 54384 | float32_t __s0 = __p0; \ | 46132 | float32_t __s0 = __p0; \ |
| 54385 | float32_t __s1 = __p1; \ | 46133 | float32_t __s1 = __p1; \ |
| 54386 | float32x2_t __s2 = __p2; \ | 46134 | float32x2_t __s2 = __p2; \ |
| 54387 | float32_t __ret; \ | 46135 | float32_t __ret; \ |
| 54388 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (int8x8_t)__s2, __p3); \ | 46136 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__s2, __p3); \ |
| 54389 | __ret; \ | 46137 | __ret; \ |
| 54390 | }) | 46138 | }) |
| 54391 | #else | 46139 | #else |
| ... | @@ -54395,7 +46143,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54395,7 +46143,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54395 | float32x2_t __s2 = __p2; \ | 46143 | float32x2_t __s2 = __p2; \ |
| 54396 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 46144 | float32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| 54397 | float32_t __ret; \ | 46145 | float32_t __ret; \ |
| 54398 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (int8x8_t)__rev2, __p3); \ | 46146 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__rev2, __p3); \ |
| 54399 | __ret; \ | 46147 | __ret; \ |
| 54400 | }) | 46148 | }) |
| 54401 | #define __noswap_vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46149 | #define __noswap_vfmas_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| ... | @@ -54403,7 +46151,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54403,7 +46151,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54403 | float32_t __s1 = __p1; \ | 46151 | float32_t __s1 = __p1; \ |
| 54404 | float32x2_t __s2 = __p2; \ | 46152 | float32x2_t __s2 = __p2; \ |
| 54405 | float32_t __ret; \ | 46153 | float32_t __ret; \ |
| 54406 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (int8x8_t)__s2, __p3); \ | 46154 | __ret = (float32_t) __builtin_neon_vfmas_lane_f32(__s0, __s1, (float32x2_t)__s2, __p3); \ |
| 54407 | __ret; \ | 46155 | __ret; \ |
| 54408 | }) | 46156 | }) |
| 54409 | #endif | 46157 | #endif |
| ... | @@ -54471,16 +46219,6 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54471,16 +46219,6 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54471 | }) | 46219 | }) |
| 54472 | #endif | 46220 | #endif |
| 54473 | | 46221 | |
| 54474 | #ifdef __LITTLE_ENDIAN__ | | |
| 54475 | #define vfma_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 54476 | float64x1_t __s0 = __p0; \ | | |
| 54477 | float64x1_t __s1 = __p1; \ | | |
| 54478 | float64x1_t __s2 = __p2; \ | | |
| 54479 | float64x1_t __ret; \ | | |
| 54480 | __ret = (float64x1_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 10); \ | | |
| 54481 | __ret; \ | | |
| 54482 | }) | | |
| 54483 | #else | | |
| 54484 | #define vfma_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46222 | #define vfma_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 54485 | float64x1_t __s0 = __p0; \ | 46223 | float64x1_t __s0 = __p0; \ |
| 54486 | float64x1_t __s1 = __p1; \ | 46224 | float64x1_t __s1 = __p1; \ |
| ... | @@ -54489,16 +46227,6 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54489,16 +46227,6 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54489 | __ret = (float64x1_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 10); \ | 46227 | __ret = (float64x1_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 10); \ |
| 54490 | __ret; \ | 46228 | __ret; \ |
| 54491 | }) | 46229 | }) |
| 54492 | #define __noswap_vfma_lane_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | | |
| 54493 | float64x1_t __s0 = __p0; \ | | |
| 54494 | float64x1_t __s1 = __p1; \ | | |
| 54495 | float64x1_t __s2 = __p2; \ | | |
| 54496 | float64x1_t __ret; \ | | |
| 54497 | __ret = (float64x1_t) __builtin_neon_vfma_lane_v((int8x8_t)__s0, (int8x8_t)__s1, (int8x8_t)__s2, __p3, 10); \ | | |
| 54498 | __ret; \ | | |
| 54499 | }) | | |
| 54500 | #endif | | |
| 54501 | | | |
| 54502 | #ifdef __LITTLE_ENDIAN__ | 46230 | #ifdef __LITTLE_ENDIAN__ |
| 54503 | #define vfma_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46231 | #define vfma_lane_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 54504 | float32x2_t __s0 = __p0; \ | 46232 | float32x2_t __s0 = __p0; \ |
| ... | @@ -54537,7 +46265,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54537,7 +46265,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54537 | float64_t __s1 = __p1; \ | 46265 | float64_t __s1 = __p1; \ |
| 54538 | float64x2_t __s2 = __p2; \ | 46266 | float64x2_t __s2 = __p2; \ |
| 54539 | float64_t __ret; \ | 46267 | float64_t __ret; \ |
| 54540 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (int8x16_t)__s2, __p3); \ | 46268 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__s2, __p3); \ |
| 54541 | __ret; \ | 46269 | __ret; \ |
| 54542 | }) | 46270 | }) |
| 54543 | #else | 46271 | #else |
| ... | @@ -54547,7 +46275,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54547,7 +46275,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54547 | float64x2_t __s2 = __p2; \ | 46275 | float64x2_t __s2 = __p2; \ |
| 54548 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 46276 | float64x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| 54549 | float64_t __ret; \ | 46277 | float64_t __ret; \ |
| 54550 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (int8x16_t)__rev2, __p3); \ | 46278 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__rev2, __p3); \ |
| 54551 | __ret; \ | 46279 | __ret; \ |
| 54552 | }) | 46280 | }) |
| 54553 | #define __noswap_vfmad_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46281 | #define __noswap_vfmad_laneq_f64(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| ... | @@ -54555,7 +46283,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54555,7 +46283,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54555 | float64_t __s1 = __p1; \ | 46283 | float64_t __s1 = __p1; \ |
| 54556 | float64x2_t __s2 = __p2; \ | 46284 | float64x2_t __s2 = __p2; \ |
| 54557 | float64_t __ret; \ | 46285 | float64_t __ret; \ |
| 54558 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (int8x16_t)__s2, __p3); \ | 46286 | __ret = (float64_t) __builtin_neon_vfmad_laneq_f64(__s0, __s1, (float64x2_t)__s2, __p3); \ |
| 54559 | __ret; \ | 46287 | __ret; \ |
| 54560 | }) | 46288 | }) |
| 54561 | #endif | 46289 | #endif |
| ... | @@ -54566,7 +46294,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54566,7 +46294,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54566 | float32_t __s1 = __p1; \ | 46294 | float32_t __s1 = __p1; \ |
| 54567 | float32x4_t __s2 = __p2; \ | 46295 | float32x4_t __s2 = __p2; \ |
| 54568 | float32_t __ret; \ | 46296 | float32_t __ret; \ |
| 54569 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (int8x16_t)__s2, __p3); \ | 46297 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__s2, __p3); \ |
| 54570 | __ret; \ | 46298 | __ret; \ |
| 54571 | }) | 46299 | }) |
| 54572 | #else | 46300 | #else |
| ... | @@ -54576,7 +46304,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54576,7 +46304,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54576 | float32x4_t __s2 = __p2; \ | 46304 | float32x4_t __s2 = __p2; \ |
| 54577 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 46305 | float32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 54578 | float32_t __ret; \ | 46306 | float32_t __ret; \ |
| 54579 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (int8x16_t)__rev2, __p3); \ | 46307 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__rev2, __p3); \ |
| 54580 | __ret; \ | 46308 | __ret; \ |
| 54581 | }) | 46309 | }) |
| 54582 | #define __noswap_vfmas_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 46310 | #define __noswap_vfmas_laneq_f32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| ... | @@ -54584,7 +46312,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 | ... | @@ -54584,7 +46312,7 @@ __ai float64x1_t __noswap_vfma_f64(float64x1_t __p0, float64x1_t __p1, float64x1 |
| 54584 | float32_t __s1 = __p1; \ | 46312 | float32_t __s1 = __p1; \ |
| 54585 | float32x4_t __s2 = __p2; \ | 46313 | float32x4_t __s2 = __p2; \ |
| 54586 | float32_t __ret; \ | 46314 | float32_t __ret; \ |
| 54587 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (int8x16_t)__s2, __p3); \ | 46315 | __ret = (float32_t) __builtin_neon_vfmas_laneq_f32(__s0, __s1, (float32x4_t)__s2, __p3); \ |
| 54588 | __ret; \ | 46316 | __ret; \ |
| 54589 | }) | 46317 | }) |
| 54590 | #endif | 46318 | #endif |
| ... | @@ -54731,20 +46459,11 @@ __ai float64x2_t vfmaq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) | ... | @@ -54731,20 +46459,11 @@ __ai float64x2_t vfmaq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) |
| 54731 | } | 46459 | } |
| 54732 | #endif | 46460 | #endif |
| 54733 | | 46461 | |
| 54734 | #ifdef __LITTLE_ENDIAN__ | | |
| 54735 | __ai float64x1_t vfma_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { | 46462 | __ai float64x1_t vfma_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { |
| 54736 | float64x1_t __ret; | 46463 | float64x1_t __ret; |
| 54737 | __ret = vfma_f64(__p0, __p1, (float64x1_t) {__p2}); | 46464 | __ret = vfma_f64(__p0, __p1, (float64x1_t) {__p2}); |
| 54738 | return __ret; | 46465 | return __ret; |
| 54739 | } | 46466 | } |
| 54740 | #else | | |
| 54741 | __ai float64x1_t vfma_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { | | |
| 54742 | float64x1_t __ret; | | |
| 54743 | __ret = __noswap_vfma_f64(__p0, __p1, (float64x1_t) {__p2}); | | |
| 54744 | return __ret; | | |
| 54745 | } | | |
| 54746 | #endif | | |
| 54747 | | | |
| 54748 | #ifdef __LITTLE_ENDIAN__ | 46467 | #ifdef __LITTLE_ENDIAN__ |
| 54749 | __ai float64x2_t vfmsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { | 46468 | __ai float64x2_t vfmsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 54750 | float64x2_t __ret; | 46469 | float64x2_t __ret; |
| ... | @@ -54763,287 +46482,254 @@ __ai float64x2_t vfmsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) | ... | @@ -54763,287 +46482,254 @@ __ai float64x2_t vfmsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) |
| 54763 | } | 46482 | } |
| 54764 | #endif | 46483 | #endif |
| 54765 | | 46484 | |
| 54766 | #ifdef __LITTLE_ENDIAN__ | | |
| 54767 | __ai float64x1_t vfms_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 46485 | __ai float64x1_t vfms_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 54768 | float64x1_t __ret; | 46486 | float64x1_t __ret; |
| 54769 | __ret = vfma_f64(__p0, -__p1, __p2); | 46487 | __ret = vfma_f64(__p0, -__p1, __p2); |
| 54770 | return __ret; | 46488 | return __ret; |
| 54771 | } | 46489 | } |
| 54772 | #else | 46490 | #define vfmsd_lane_f64(__p0_98, __p1_98, __p2_98, __p3_98) __extension__ ({ \ |
| 54773 | __ai float64x1_t vfms_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 46491 | float64_t __s0_98 = __p0_98; \ |
| 54774 | float64x1_t __ret; | 46492 | float64_t __s1_98 = __p1_98; \ |
| 54775 | __ret = __noswap_vfma_f64(__p0, -__p1, __p2); | 46493 | float64x1_t __s2_98 = __p2_98; \ |
| 54776 | return __ret; | 46494 | float64_t __ret_98; \ |
| 54777 | } | 46495 | __ret_98 = vfmad_lane_f64(__s0_98, -__s1_98, __s2_98, __p3_98); \ |
| 54778 | #endif | 46496 | __ret_98; \ |
| 54779 | | 46497 | }) |
| 54780 | #ifdef __LITTLE_ENDIAN__ | 46498 | #ifdef __LITTLE_ENDIAN__ |
| 54781 | #define vfmsd_lane_f64(__p0_100, __p1_100, __p2_100, __p3_100) __extension__ ({ \ | 46499 | #define vfmss_lane_f32(__p0_99, __p1_99, __p2_99, __p3_99) __extension__ ({ \ |
| 54782 | float64_t __s0_100 = __p0_100; \ | 46500 | float32_t __s0_99 = __p0_99; \ |
| 54783 | float64_t __s1_100 = __p1_100; \ | 46501 | float32_t __s1_99 = __p1_99; \ |
| 54784 | float64x1_t __s2_100 = __p2_100; \ | 46502 | float32x2_t __s2_99 = __p2_99; \ |
| 54785 | float64_t __ret_100; \ | 46503 | float32_t __ret_99; \ |
| 54786 | __ret_100 = vfmad_lane_f64(__s0_100, -__s1_100, __s2_100, __p3_100); \ | 46504 | __ret_99 = vfmas_lane_f32(__s0_99, -__s1_99, __s2_99, __p3_99); \ |
| 54787 | __ret_100; \ | 46505 | __ret_99; \ |
| 54788 | }) | 46506 | }) |
| 54789 | #else | 46507 | #else |
| 54790 | #define vfmsd_lane_f64(__p0_101, __p1_101, __p2_101, __p3_101) __extension__ ({ \ | 46508 | #define vfmss_lane_f32(__p0_100, __p1_100, __p2_100, __p3_100) __extension__ ({ \ |
| 54791 | float64_t __s0_101 = __p0_101; \ | 46509 | float32_t __s0_100 = __p0_100; \ |
| 54792 | float64_t __s1_101 = __p1_101; \ | 46510 | float32_t __s1_100 = __p1_100; \ |
| 54793 | float64x1_t __s2_101 = __p2_101; \ | 46511 | float32x2_t __s2_100 = __p2_100; \ |
| 54794 | float64_t __ret_101; \ | 46512 | float32x2_t __rev2_100; __rev2_100 = __builtin_shufflevector(__s2_100, __s2_100, 1, 0); \ |
| 54795 | __ret_101 = __noswap_vfmad_lane_f64(__s0_101, -__s1_101, __s2_101, __p3_101); \ | 46513 | float32_t __ret_100; \ |
| 54796 | __ret_101; \ | 46514 | __ret_100 = __noswap_vfmas_lane_f32(__s0_100, -__s1_100, __rev2_100, __p3_100); \ |
| | 46515 | __ret_100; \ |
| 54797 | }) | 46516 | }) |
| 54798 | #endif | 46517 | #endif |
| 54799 | | 46518 | |
| 54800 | #ifdef __LITTLE_ENDIAN__ | 46519 | #ifdef __LITTLE_ENDIAN__ |
| 54801 | #define vfmss_lane_f32(__p0_102, __p1_102, __p2_102, __p3_102) __extension__ ({ \ | 46520 | #define vfmsq_lane_f64(__p0_101, __p1_101, __p2_101, __p3_101) __extension__ ({ \ |
| 54802 | float32_t __s0_102 = __p0_102; \ | 46521 | float64x2_t __s0_101 = __p0_101; \ |
| 54803 | float32_t __s1_102 = __p1_102; \ | 46522 | float64x2_t __s1_101 = __p1_101; \ |
| 54804 | float32x2_t __s2_102 = __p2_102; \ | 46523 | float64x1_t __s2_101 = __p2_101; \ |
| 54805 | float32_t __ret_102; \ | 46524 | float64x2_t __ret_101; \ |
| 54806 | __ret_102 = vfmas_lane_f32(__s0_102, -__s1_102, __s2_102, __p3_102); \ | 46525 | __ret_101 = vfmaq_lane_f64(__s0_101, -__s1_101, __s2_101, __p3_101); \ |
| 54807 | __ret_102; \ | 46526 | __ret_101; \ |
| 54808 | }) | 46527 | }) |
| 54809 | #else | 46528 | #else |
| 54810 | #define vfmss_lane_f32(__p0_103, __p1_103, __p2_103, __p3_103) __extension__ ({ \ | 46529 | #define vfmsq_lane_f64(__p0_102, __p1_102, __p2_102, __p3_102) __extension__ ({ \ |
| 54811 | float32_t __s0_103 = __p0_103; \ | 46530 | float64x2_t __s0_102 = __p0_102; \ |
| 54812 | float32_t __s1_103 = __p1_103; \ | 46531 | float64x2_t __s1_102 = __p1_102; \ |
| 54813 | float32x2_t __s2_103 = __p2_103; \ | 46532 | float64x1_t __s2_102 = __p2_102; \ |
| 54814 | float32x2_t __rev2_103; __rev2_103 = __builtin_shufflevector(__s2_103, __s2_103, 1, 0); \ | 46533 | float64x2_t __rev0_102; __rev0_102 = __builtin_shufflevector(__s0_102, __s0_102, 1, 0); \ |
| 54815 | float32_t __ret_103; \ | 46534 | float64x2_t __rev1_102; __rev1_102 = __builtin_shufflevector(__s1_102, __s1_102, 1, 0); \ |
| 54816 | __ret_103 = __noswap_vfmas_lane_f32(__s0_103, -__s1_103, __rev2_103, __p3_103); \ | 46535 | float64x2_t __ret_102; \ |
| 54817 | __ret_103; \ | 46536 | __ret_102 = __noswap_vfmaq_lane_f64(__rev0_102, -__rev1_102, __s2_102, __p3_102); \ |
| | 46537 | __ret_102 = __builtin_shufflevector(__ret_102, __ret_102, 1, 0); \ |
| | 46538 | __ret_102; \ |
| 54818 | }) | 46539 | }) |
| 54819 | #endif | 46540 | #endif |
| 54820 | | 46541 | |
| 54821 | #ifdef __LITTLE_ENDIAN__ | 46542 | #ifdef __LITTLE_ENDIAN__ |
| 54822 | #define vfmsq_lane_f64(__p0_104, __p1_104, __p2_104, __p3_104) __extension__ ({ \ | 46543 | #define vfmsq_lane_f32(__p0_103, __p1_103, __p2_103, __p3_103) __extension__ ({ \ |
| 54823 | float64x2_t __s0_104 = __p0_104; \ | 46544 | float32x4_t __s0_103 = __p0_103; \ |
| 54824 | float64x2_t __s1_104 = __p1_104; \ | 46545 | float32x4_t __s1_103 = __p1_103; \ |
| 54825 | float64x1_t __s2_104 = __p2_104; \ | 46546 | float32x2_t __s2_103 = __p2_103; \ |
| 54826 | float64x2_t __ret_104; \ | 46547 | float32x4_t __ret_103; \ |
| 54827 | __ret_104 = vfmaq_lane_f64(__s0_104, -__s1_104, __s2_104, __p3_104); \ | 46548 | __ret_103 = vfmaq_lane_f32(__s0_103, -__s1_103, __s2_103, __p3_103); \ |
| 54828 | __ret_104; \ | 46549 | __ret_103; \ |
| 54829 | }) | 46550 | }) |
| 54830 | #else | 46551 | #else |
| 54831 | #define vfmsq_lane_f64(__p0_105, __p1_105, __p2_105, __p3_105) __extension__ ({ \ | 46552 | #define vfmsq_lane_f32(__p0_104, __p1_104, __p2_104, __p3_104) __extension__ ({ \ |
| 54832 | float64x2_t __s0_105 = __p0_105; \ | 46553 | float32x4_t __s0_104 = __p0_104; \ |
| 54833 | float64x2_t __s1_105 = __p1_105; \ | 46554 | float32x4_t __s1_104 = __p1_104; \ |
| 54834 | float64x1_t __s2_105 = __p2_105; \ | 46555 | float32x2_t __s2_104 = __p2_104; \ |
| 54835 | float64x2_t __rev0_105; __rev0_105 = __builtin_shufflevector(__s0_105, __s0_105, 1, 0); \ | 46556 | float32x4_t __rev0_104; __rev0_104 = __builtin_shufflevector(__s0_104, __s0_104, 3, 2, 1, 0); \ |
| 54836 | float64x2_t __rev1_105; __rev1_105 = __builtin_shufflevector(__s1_105, __s1_105, 1, 0); \ | 46557 | float32x4_t __rev1_104; __rev1_104 = __builtin_shufflevector(__s1_104, __s1_104, 3, 2, 1, 0); \ |
| 54837 | float64x2_t __ret_105; \ | 46558 | float32x2_t __rev2_104; __rev2_104 = __builtin_shufflevector(__s2_104, __s2_104, 1, 0); \ |
| 54838 | __ret_105 = __noswap_vfmaq_lane_f64(__rev0_105, -__rev1_105, __s2_105, __p3_105); \ | 46559 | float32x4_t __ret_104; \ |
| 54839 | __ret_105 = __builtin_shufflevector(__ret_105, __ret_105, 1, 0); \ | 46560 | __ret_104 = __noswap_vfmaq_lane_f32(__rev0_104, -__rev1_104, __rev2_104, __p3_104); \ |
| 54840 | __ret_105; \ | 46561 | __ret_104 = __builtin_shufflevector(__ret_104, __ret_104, 3, 2, 1, 0); \ |
| | 46562 | __ret_104; \ |
| 54841 | }) | 46563 | }) |
| 54842 | #endif | 46564 | #endif |
| 54843 | | 46565 | |
| | 46566 | #define vfms_lane_f64(__p0_105, __p1_105, __p2_105, __p3_105) __extension__ ({ \ |
| | 46567 | float64x1_t __s0_105 = __p0_105; \ |
| | 46568 | float64x1_t __s1_105 = __p1_105; \ |
| | 46569 | float64x1_t __s2_105 = __p2_105; \ |
| | 46570 | float64x1_t __ret_105; \ |
| | 46571 | __ret_105 = vfma_lane_f64(__s0_105, -__s1_105, __s2_105, __p3_105); \ |
| | 46572 | __ret_105; \ |
| | 46573 | }) |
| 54844 | #ifdef __LITTLE_ENDIAN__ | 46574 | #ifdef __LITTLE_ENDIAN__ |
| 54845 | #define vfmsq_lane_f32(__p0_106, __p1_106, __p2_106, __p3_106) __extension__ ({ \ | 46575 | #define vfms_lane_f32(__p0_106, __p1_106, __p2_106, __p3_106) __extension__ ({ \ |
| 54846 | float32x4_t __s0_106 = __p0_106; \ | 46576 | float32x2_t __s0_106 = __p0_106; \ |
| 54847 | float32x4_t __s1_106 = __p1_106; \ | 46577 | float32x2_t __s1_106 = __p1_106; \ |
| 54848 | float32x2_t __s2_106 = __p2_106; \ | 46578 | float32x2_t __s2_106 = __p2_106; \ |
| 54849 | float32x4_t __ret_106; \ | 46579 | float32x2_t __ret_106; \ |
| 54850 | __ret_106 = vfmaq_lane_f32(__s0_106, -__s1_106, __s2_106, __p3_106); \ | 46580 | __ret_106 = vfma_lane_f32(__s0_106, -__s1_106, __s2_106, __p3_106); \ |
| 54851 | __ret_106; \ | 46581 | __ret_106; \ |
| 54852 | }) | 46582 | }) |
| 54853 | #else | 46583 | #else |
| 54854 | #define vfmsq_lane_f32(__p0_107, __p1_107, __p2_107, __p3_107) __extension__ ({ \ | 46584 | #define vfms_lane_f32(__p0_107, __p1_107, __p2_107, __p3_107) __extension__ ({ \ |
| 54855 | float32x4_t __s0_107 = __p0_107; \ | 46585 | float32x2_t __s0_107 = __p0_107; \ |
| 54856 | float32x4_t __s1_107 = __p1_107; \ | 46586 | float32x2_t __s1_107 = __p1_107; \ |
| 54857 | float32x2_t __s2_107 = __p2_107; \ | 46587 | float32x2_t __s2_107 = __p2_107; \ |
| 54858 | float32x4_t __rev0_107; __rev0_107 = __builtin_shufflevector(__s0_107, __s0_107, 3, 2, 1, 0); \ | 46588 | float32x2_t __rev0_107; __rev0_107 = __builtin_shufflevector(__s0_107, __s0_107, 1, 0); \ |
| 54859 | float32x4_t __rev1_107; __rev1_107 = __builtin_shufflevector(__s1_107, __s1_107, 3, 2, 1, 0); \ | 46589 | float32x2_t __rev1_107; __rev1_107 = __builtin_shufflevector(__s1_107, __s1_107, 1, 0); \ |
| 54860 | float32x2_t __rev2_107; __rev2_107 = __builtin_shufflevector(__s2_107, __s2_107, 1, 0); \ | 46590 | float32x2_t __rev2_107; __rev2_107 = __builtin_shufflevector(__s2_107, __s2_107, 1, 0); \ |
| 54861 | float32x4_t __ret_107; \ | 46591 | float32x2_t __ret_107; \ |
| 54862 | __ret_107 = __noswap_vfmaq_lane_f32(__rev0_107, -__rev1_107, __rev2_107, __p3_107); \ | 46592 | __ret_107 = __noswap_vfma_lane_f32(__rev0_107, -__rev1_107, __rev2_107, __p3_107); \ |
| 54863 | __ret_107 = __builtin_shufflevector(__ret_107, __ret_107, 3, 2, 1, 0); \ | 46593 | __ret_107 = __builtin_shufflevector(__ret_107, __ret_107, 1, 0); \ |
| 54864 | __ret_107; \ | 46594 | __ret_107; \ |
| 54865 | }) | 46595 | }) |
| 54866 | #endif | 46596 | #endif |
| 54867 | | 46597 | |
| 54868 | #ifdef __LITTLE_ENDIAN__ | 46598 | #ifdef __LITTLE_ENDIAN__ |
| 54869 | #define vfms_lane_f64(__p0_108, __p1_108, __p2_108, __p3_108) __extension__ ({ \ | 46599 | #define vfmsd_laneq_f64(__p0_108, __p1_108, __p2_108, __p3_108) __extension__ ({ \ |
| 54870 | float64x1_t __s0_108 = __p0_108; \ | 46600 | float64_t __s0_108 = __p0_108; \ |
| 54871 | float64x1_t __s1_108 = __p1_108; \ | 46601 | float64_t __s1_108 = __p1_108; \ |
| 54872 | float64x1_t __s2_108 = __p2_108; \ | 46602 | float64x2_t __s2_108 = __p2_108; \ |
| 54873 | float64x1_t __ret_108; \ | 46603 | float64_t __ret_108; \ |
| 54874 | __ret_108 = vfma_lane_f64(__s0_108, -__s1_108, __s2_108, __p3_108); \ | 46604 | __ret_108 = vfmad_laneq_f64(__s0_108, -__s1_108, __s2_108, __p3_108); \ |
| 54875 | __ret_108; \ | 46605 | __ret_108; \ |
| 54876 | }) | 46606 | }) |
| 54877 | #else | 46607 | #else |
| 54878 | #define vfms_lane_f64(__p0_109, __p1_109, __p2_109, __p3_109) __extension__ ({ \ | 46608 | #define vfmsd_laneq_f64(__p0_109, __p1_109, __p2_109, __p3_109) __extension__ ({ \ |
| 54879 | float64x1_t __s0_109 = __p0_109; \ | 46609 | float64_t __s0_109 = __p0_109; \ |
| 54880 | float64x1_t __s1_109 = __p1_109; \ | 46610 | float64_t __s1_109 = __p1_109; \ |
| 54881 | float64x1_t __s2_109 = __p2_109; \ | 46611 | float64x2_t __s2_109 = __p2_109; \ |
| 54882 | float64x1_t __ret_109; \ | 46612 | float64x2_t __rev2_109; __rev2_109 = __builtin_shufflevector(__s2_109, __s2_109, 1, 0); \ |
| 54883 | __ret_109 = __noswap_vfma_lane_f64(__s0_109, -__s1_109, __s2_109, __p3_109); \ | 46613 | float64_t __ret_109; \ |
| | 46614 | __ret_109 = __noswap_vfmad_laneq_f64(__s0_109, -__s1_109, __rev2_109, __p3_109); \ |
| 54884 | __ret_109; \ | 46615 | __ret_109; \ |
| 54885 | }) | 46616 | }) |
| 54886 | #endif | 46617 | #endif |
| 54887 | | 46618 | |
| 54888 | #ifdef __LITTLE_ENDIAN__ | 46619 | #ifdef __LITTLE_ENDIAN__ |
| 54889 | #define vfms_lane_f32(__p0_110, __p1_110, __p2_110, __p3_110) __extension__ ({ \ | 46620 | #define vfmss_laneq_f32(__p0_110, __p1_110, __p2_110, __p3_110) __extension__ ({ \ |
| 54890 | float32x2_t __s0_110 = __p0_110; \ | 46621 | float32_t __s0_110 = __p0_110; \ |
| 54891 | float32x2_t __s1_110 = __p1_110; \ | 46622 | float32_t __s1_110 = __p1_110; \ |
| 54892 | float32x2_t __s2_110 = __p2_110; \ | 46623 | float32x4_t __s2_110 = __p2_110; \ |
| 54893 | float32x2_t __ret_110; \ | 46624 | float32_t __ret_110; \ |
| 54894 | __ret_110 = vfma_lane_f32(__s0_110, -__s1_110, __s2_110, __p3_110); \ | 46625 | __ret_110 = vfmas_laneq_f32(__s0_110, -__s1_110, __s2_110, __p3_110); \ |
| 54895 | __ret_110; \ | 46626 | __ret_110; \ |
| 54896 | }) | 46627 | }) |
| 54897 | #else | 46628 | #else |
| 54898 | #define vfms_lane_f32(__p0_111, __p1_111, __p2_111, __p3_111) __extension__ ({ \ | 46629 | #define vfmss_laneq_f32(__p0_111, __p1_111, __p2_111, __p3_111) __extension__ ({ \ |
| 54899 | float32x2_t __s0_111 = __p0_111; \ | 46630 | float32_t __s0_111 = __p0_111; \ |
| 54900 | float32x2_t __s1_111 = __p1_111; \ | 46631 | float32_t __s1_111 = __p1_111; \ |
| 54901 | float32x2_t __s2_111 = __p2_111; \ | 46632 | float32x4_t __s2_111 = __p2_111; \ |
| 54902 | float32x2_t __rev0_111; __rev0_111 = __builtin_shufflevector(__s0_111, __s0_111, 1, 0); \ | 46633 | float32x4_t __rev2_111; __rev2_111 = __builtin_shufflevector(__s2_111, __s2_111, 3, 2, 1, 0); \ |
| 54903 | float32x2_t __rev1_111; __rev1_111 = __builtin_shufflevector(__s1_111, __s1_111, 1, 0); \ | 46634 | float32_t __ret_111; \ |
| 54904 | float32x2_t __rev2_111; __rev2_111 = __builtin_shufflevector(__s2_111, __s2_111, 1, 0); \ | 46635 | __ret_111 = __noswap_vfmas_laneq_f32(__s0_111, -__s1_111, __rev2_111, __p3_111); \ |
| 54905 | float32x2_t __ret_111; \ | | |
| 54906 | __ret_111 = __noswap_vfma_lane_f32(__rev0_111, -__rev1_111, __rev2_111, __p3_111); \ | | |
| 54907 | __ret_111 = __builtin_shufflevector(__ret_111, __ret_111, 1, 0); \ | | |
| 54908 | __ret_111; \ | 46636 | __ret_111; \ |
| 54909 | }) | 46637 | }) |
| 54910 | #endif | 46638 | #endif |
| 54911 | | 46639 | |
| 54912 | #ifdef __LITTLE_ENDIAN__ | 46640 | #ifdef __LITTLE_ENDIAN__ |
| 54913 | #define vfmsd_laneq_f64(__p0_112, __p1_112, __p2_112, __p3_112) __extension__ ({ \ | 46641 | #define vfmsq_laneq_f64(__p0_112, __p1_112, __p2_112, __p3_112) __extension__ ({ \ |
| 54914 | float64_t __s0_112 = __p0_112; \ | 46642 | float64x2_t __s0_112 = __p0_112; \ |
| 54915 | float64_t __s1_112 = __p1_112; \ | 46643 | float64x2_t __s1_112 = __p1_112; \ |
| 54916 | float64x2_t __s2_112 = __p2_112; \ | 46644 | float64x2_t __s2_112 = __p2_112; \ |
| 54917 | float64_t __ret_112; \ | 46645 | float64x2_t __ret_112; \ |
| 54918 | __ret_112 = vfmad_laneq_f64(__s0_112, -__s1_112, __s2_112, __p3_112); \ | 46646 | __ret_112 = vfmaq_laneq_f64(__s0_112, -__s1_112, __s2_112, __p3_112); \ |
| 54919 | __ret_112; \ | 46647 | __ret_112; \ |
| 54920 | }) | 46648 | }) |
| 54921 | #else | 46649 | #else |
| 54922 | #define vfmsd_laneq_f64(__p0_113, __p1_113, __p2_113, __p3_113) __extension__ ({ \ | 46650 | #define vfmsq_laneq_f64(__p0_113, __p1_113, __p2_113, __p3_113) __extension__ ({ \ |
| 54923 | float64_t __s0_113 = __p0_113; \ | 46651 | float64x2_t __s0_113 = __p0_113; \ |
| 54924 | float64_t __s1_113 = __p1_113; \ | 46652 | float64x2_t __s1_113 = __p1_113; \ |
| 54925 | float64x2_t __s2_113 = __p2_113; \ | 46653 | float64x2_t __s2_113 = __p2_113; \ |
| | 46654 | float64x2_t __rev0_113; __rev0_113 = __builtin_shufflevector(__s0_113, __s0_113, 1, 0); \ |
| | 46655 | float64x2_t __rev1_113; __rev1_113 = __builtin_shufflevector(__s1_113, __s1_113, 1, 0); \ |
| 54926 | float64x2_t __rev2_113; __rev2_113 = __builtin_shufflevector(__s2_113, __s2_113, 1, 0); \ | 46656 | float64x2_t __rev2_113; __rev2_113 = __builtin_shufflevector(__s2_113, __s2_113, 1, 0); \ |
| 54927 | float64_t __ret_113; \ | 46657 | float64x2_t __ret_113; \ |
| 54928 | __ret_113 = __noswap_vfmad_laneq_f64(__s0_113, -__s1_113, __rev2_113, __p3_113); \ | 46658 | __ret_113 = __noswap_vfmaq_laneq_f64(__rev0_113, -__rev1_113, __rev2_113, __p3_113); \ |
| | 46659 | __ret_113 = __builtin_shufflevector(__ret_113, __ret_113, 1, 0); \ |
| 54929 | __ret_113; \ | 46660 | __ret_113; \ |
| 54930 | }) | 46661 | }) |
| 54931 | #endif | 46662 | #endif |
| 54932 | | 46663 | |
| 54933 | #ifdef __LITTLE_ENDIAN__ | 46664 | #ifdef __LITTLE_ENDIAN__ |
| 54934 | #define vfmss_laneq_f32(__p0_114, __p1_114, __p2_114, __p3_114) __extension__ ({ \ | 46665 | #define vfmsq_laneq_f32(__p0_114, __p1_114, __p2_114, __p3_114) __extension__ ({ \ |
| 54935 | float32_t __s0_114 = __p0_114; \ | 46666 | float32x4_t __s0_114 = __p0_114; \ |
| 54936 | float32_t __s1_114 = __p1_114; \ | 46667 | float32x4_t __s1_114 = __p1_114; \ |
| 54937 | float32x4_t __s2_114 = __p2_114; \ | 46668 | float32x4_t __s2_114 = __p2_114; \ |
| 54938 | float32_t __ret_114; \ | 46669 | float32x4_t __ret_114; \ |
| 54939 | __ret_114 = vfmas_laneq_f32(__s0_114, -__s1_114, __s2_114, __p3_114); \ | 46670 | __ret_114 = vfmaq_laneq_f32(__s0_114, -__s1_114, __s2_114, __p3_114); \ |
| 54940 | __ret_114; \ | 46671 | __ret_114; \ |
| 54941 | }) | 46672 | }) |
| 54942 | #else | 46673 | #else |
| 54943 | #define vfmss_laneq_f32(__p0_115, __p1_115, __p2_115, __p3_115) __extension__ ({ \ | 46674 | #define vfmsq_laneq_f32(__p0_115, __p1_115, __p2_115, __p3_115) __extension__ ({ \ |
| 54944 | float32_t __s0_115 = __p0_115; \ | 46675 | float32x4_t __s0_115 = __p0_115; \ |
| 54945 | float32_t __s1_115 = __p1_115; \ | 46676 | float32x4_t __s1_115 = __p1_115; \ |
| 54946 | float32x4_t __s2_115 = __p2_115; \ | 46677 | float32x4_t __s2_115 = __p2_115; \ |
| | 46678 | float32x4_t __rev0_115; __rev0_115 = __builtin_shufflevector(__s0_115, __s0_115, 3, 2, 1, 0); \ |
| | 46679 | float32x4_t __rev1_115; __rev1_115 = __builtin_shufflevector(__s1_115, __s1_115, 3, 2, 1, 0); \ |
| 54947 | float32x4_t __rev2_115; __rev2_115 = __builtin_shufflevector(__s2_115, __s2_115, 3, 2, 1, 0); \ | 46680 | float32x4_t __rev2_115; __rev2_115 = __builtin_shufflevector(__s2_115, __s2_115, 3, 2, 1, 0); \ |
| 54948 | float32_t __ret_115; \ | 46681 | float32x4_t __ret_115; \ |
| 54949 | __ret_115 = __noswap_vfmas_laneq_f32(__s0_115, -__s1_115, __rev2_115, __p3_115); \ | 46682 | __ret_115 = __noswap_vfmaq_laneq_f32(__rev0_115, -__rev1_115, __rev2_115, __p3_115); \ |
| | 46683 | __ret_115 = __builtin_shufflevector(__ret_115, __ret_115, 3, 2, 1, 0); \ |
| 54950 | __ret_115; \ | 46684 | __ret_115; \ |
| 54951 | }) | 46685 | }) |
| 54952 | #endif | 46686 | #endif |
| 54953 | | 46687 | |
| 54954 | #ifdef __LITTLE_ENDIAN__ | 46688 | #ifdef __LITTLE_ENDIAN__ |
| 54955 | #define vfmsq_laneq_f64(__p0_116, __p1_116, __p2_116, __p3_116) __extension__ ({ \ | 46689 | #define vfms_laneq_f64(__p0_116, __p1_116, __p2_116, __p3_116) __extension__ ({ \ |
| 54956 | float64x2_t __s0_116 = __p0_116; \ | 46690 | float64x1_t __s0_116 = __p0_116; \ |
| 54957 | float64x2_t __s1_116 = __p1_116; \ | 46691 | float64x1_t __s1_116 = __p1_116; \ |
| 54958 | float64x2_t __s2_116 = __p2_116; \ | 46692 | float64x2_t __s2_116 = __p2_116; \ |
| 54959 | float64x2_t __ret_116; \ | 46693 | float64x1_t __ret_116; \ |
| 54960 | __ret_116 = vfmaq_laneq_f64(__s0_116, -__s1_116, __s2_116, __p3_116); \ | 46694 | __ret_116 = vfma_laneq_f64(__s0_116, -__s1_116, __s2_116, __p3_116); \ |
| 54961 | __ret_116; \ | 46695 | __ret_116; \ |
| 54962 | }) | 46696 | }) |
| 54963 | #else | 46697 | #else |
| 54964 | #define vfmsq_laneq_f64(__p0_117, __p1_117, __p2_117, __p3_117) __extension__ ({ \ | 46698 | #define vfms_laneq_f64(__p0_117, __p1_117, __p2_117, __p3_117) __extension__ ({ \ |
| 54965 | float64x2_t __s0_117 = __p0_117; \ | 46699 | float64x1_t __s0_117 = __p0_117; \ |
| 54966 | float64x2_t __s1_117 = __p1_117; \ | 46700 | float64x1_t __s1_117 = __p1_117; \ |
| 54967 | float64x2_t __s2_117 = __p2_117; \ | 46701 | float64x2_t __s2_117 = __p2_117; \ |
| 54968 | float64x2_t __rev0_117; __rev0_117 = __builtin_shufflevector(__s0_117, __s0_117, 1, 0); \ | | |
| 54969 | float64x2_t __rev1_117; __rev1_117 = __builtin_shufflevector(__s1_117, __s1_117, 1, 0); \ | | |
| 54970 | float64x2_t __rev2_117; __rev2_117 = __builtin_shufflevector(__s2_117, __s2_117, 1, 0); \ | 46702 | float64x2_t __rev2_117; __rev2_117 = __builtin_shufflevector(__s2_117, __s2_117, 1, 0); \ |
| 54971 | float64x2_t __ret_117; \ | 46703 | float64x1_t __ret_117; \ |
| 54972 | __ret_117 = __noswap_vfmaq_laneq_f64(__rev0_117, -__rev1_117, __rev2_117, __p3_117); \ | 46704 | __ret_117 = __noswap_vfma_laneq_f64(__s0_117, -__s1_117, __rev2_117, __p3_117); \ |
| 54973 | __ret_117 = __builtin_shufflevector(__ret_117, __ret_117, 1, 0); \ | | |
| 54974 | __ret_117; \ | 46705 | __ret_117; \ |
| 54975 | }) | 46706 | }) |
| 54976 | #endif | 46707 | #endif |
| 54977 | | 46708 | |
| 54978 | #ifdef __LITTLE_ENDIAN__ | 46709 | #ifdef __LITTLE_ENDIAN__ |
| 54979 | #define vfmsq_laneq_f32(__p0_118, __p1_118, __p2_118, __p3_118) __extension__ ({ \ | 46710 | #define vfms_laneq_f32(__p0_118, __p1_118, __p2_118, __p3_118) __extension__ ({ \ |
| 54980 | float32x4_t __s0_118 = __p0_118; \ | 46711 | float32x2_t __s0_118 = __p0_118; \ |
| 54981 | float32x4_t __s1_118 = __p1_118; \ | 46712 | float32x2_t __s1_118 = __p1_118; \ |
| 54982 | float32x4_t __s2_118 = __p2_118; \ | 46713 | float32x4_t __s2_118 = __p2_118; \ |
| 54983 | float32x4_t __ret_118; \ | 46714 | float32x2_t __ret_118; \ |
| 54984 | __ret_118 = vfmaq_laneq_f32(__s0_118, -__s1_118, __s2_118, __p3_118); \ | 46715 | __ret_118 = vfma_laneq_f32(__s0_118, -__s1_118, __s2_118, __p3_118); \ |
| 54985 | __ret_118; \ | 46716 | __ret_118; \ |
| 54986 | }) | 46717 | }) |
| 54987 | #else | 46718 | #else |
| 54988 | #define vfmsq_laneq_f32(__p0_119, __p1_119, __p2_119, __p3_119) __extension__ ({ \ | 46719 | #define vfms_laneq_f32(__p0_119, __p1_119, __p2_119, __p3_119) __extension__ ({ \ |
| 54989 | float32x4_t __s0_119 = __p0_119; \ | 46720 | float32x2_t __s0_119 = __p0_119; \ |
| 54990 | float32x4_t __s1_119 = __p1_119; \ | 46721 | float32x2_t __s1_119 = __p1_119; \ |
| 54991 | float32x4_t __s2_119 = __p2_119; \ | 46722 | float32x4_t __s2_119 = __p2_119; \ |
| 54992 | float32x4_t __rev0_119; __rev0_119 = __builtin_shufflevector(__s0_119, __s0_119, 3, 2, 1, 0); \ | 46723 | float32x2_t __rev0_119; __rev0_119 = __builtin_shufflevector(__s0_119, __s0_119, 1, 0); \ |
| 54993 | float32x4_t __rev1_119; __rev1_119 = __builtin_shufflevector(__s1_119, __s1_119, 3, 2, 1, 0); \ | 46724 | float32x2_t __rev1_119; __rev1_119 = __builtin_shufflevector(__s1_119, __s1_119, 1, 0); \ |
| 54994 | float32x4_t __rev2_119; __rev2_119 = __builtin_shufflevector(__s2_119, __s2_119, 3, 2, 1, 0); \ | 46725 | float32x4_t __rev2_119; __rev2_119 = __builtin_shufflevector(__s2_119, __s2_119, 3, 2, 1, 0); \ |
| 54995 | float32x4_t __ret_119; \ | 46726 | float32x2_t __ret_119; \ |
| 54996 | __ret_119 = __noswap_vfmaq_laneq_f32(__rev0_119, -__rev1_119, __rev2_119, __p3_119); \ | 46727 | __ret_119 = __noswap_vfma_laneq_f32(__rev0_119, -__rev1_119, __rev2_119, __p3_119); \ |
| 54997 | __ret_119 = __builtin_shufflevector(__ret_119, __ret_119, 3, 2, 1, 0); \ | 46728 | __ret_119 = __builtin_shufflevector(__ret_119, __ret_119, 1, 0); \ |
| 54998 | __ret_119; \ | 46729 | __ret_119; \ |
| 54999 | }) | 46730 | }) |
| 55000 | #endif | 46731 | #endif |
| 55001 | | 46732 | |
| 55002 | #ifdef __LITTLE_ENDIAN__ | | |
| 55003 | #define vfms_laneq_f64(__p0_120, __p1_120, __p2_120, __p3_120) __extension__ ({ \ | | |
| 55004 | float64x1_t __s0_120 = __p0_120; \ | | |
| 55005 | float64x1_t __s1_120 = __p1_120; \ | | |
| 55006 | float64x2_t __s2_120 = __p2_120; \ | | |
| 55007 | float64x1_t __ret_120; \ | | |
| 55008 | __ret_120 = vfma_laneq_f64(__s0_120, -__s1_120, __s2_120, __p3_120); \ | | |
| 55009 | __ret_120; \ | | |
| 55010 | }) | | |
| 55011 | #else | | |
| 55012 | #define vfms_laneq_f64(__p0_121, __p1_121, __p2_121, __p3_121) __extension__ ({ \ | | |
| 55013 | float64x1_t __s0_121 = __p0_121; \ | | |
| 55014 | float64x1_t __s1_121 = __p1_121; \ | | |
| 55015 | float64x2_t __s2_121 = __p2_121; \ | | |
| 55016 | float64x2_t __rev2_121; __rev2_121 = __builtin_shufflevector(__s2_121, __s2_121, 1, 0); \ | | |
| 55017 | float64x1_t __ret_121; \ | | |
| 55018 | __ret_121 = __noswap_vfma_laneq_f64(__s0_121, -__s1_121, __rev2_121, __p3_121); \ | | |
| 55019 | __ret_121; \ | | |
| 55020 | }) | | |
| 55021 | #endif | | |
| 55022 | | | |
| 55023 | #ifdef __LITTLE_ENDIAN__ | | |
| 55024 | #define vfms_laneq_f32(__p0_122, __p1_122, __p2_122, __p3_122) __extension__ ({ \ | | |
| 55025 | float32x2_t __s0_122 = __p0_122; \ | | |
| 55026 | float32x2_t __s1_122 = __p1_122; \ | | |
| 55027 | float32x4_t __s2_122 = __p2_122; \ | | |
| 55028 | float32x2_t __ret_122; \ | | |
| 55029 | __ret_122 = vfma_laneq_f32(__s0_122, -__s1_122, __s2_122, __p3_122); \ | | |
| 55030 | __ret_122; \ | | |
| 55031 | }) | | |
| 55032 | #else | | |
| 55033 | #define vfms_laneq_f32(__p0_123, __p1_123, __p2_123, __p3_123) __extension__ ({ \ | | |
| 55034 | float32x2_t __s0_123 = __p0_123; \ | | |
| 55035 | float32x2_t __s1_123 = __p1_123; \ | | |
| 55036 | float32x4_t __s2_123 = __p2_123; \ | | |
| 55037 | float32x2_t __rev0_123; __rev0_123 = __builtin_shufflevector(__s0_123, __s0_123, 1, 0); \ | | |
| 55038 | float32x2_t __rev1_123; __rev1_123 = __builtin_shufflevector(__s1_123, __s1_123, 1, 0); \ | | |
| 55039 | float32x4_t __rev2_123; __rev2_123 = __builtin_shufflevector(__s2_123, __s2_123, 3, 2, 1, 0); \ | | |
| 55040 | float32x2_t __ret_123; \ | | |
| 55041 | __ret_123 = __noswap_vfma_laneq_f32(__rev0_123, -__rev1_123, __rev2_123, __p3_123); \ | | |
| 55042 | __ret_123 = __builtin_shufflevector(__ret_123, __ret_123, 1, 0); \ | | |
| 55043 | __ret_123; \ | | |
| 55044 | }) | | |
| 55045 | #endif | | |
| 55046 | | | |
| 55047 | #ifdef __LITTLE_ENDIAN__ | 46733 | #ifdef __LITTLE_ENDIAN__ |
| 55048 | __ai float64x2_t vfmsq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { | 46734 | __ai float64x2_t vfmsq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) { |
| 55049 | float64x2_t __ret; | 46735 | float64x2_t __ret; |
| ... | @@ -55078,20 +46764,11 @@ __ai float32x4_t vfmsq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) | ... | @@ -55078,20 +46764,11 @@ __ai float32x4_t vfmsq_n_f32(float32x4_t __p0, float32x4_t __p1, float32_t __p2) |
| 55078 | } | 46764 | } |
| 55079 | #endif | 46765 | #endif |
| 55080 | | 46766 | |
| 55081 | #ifdef __LITTLE_ENDIAN__ | | |
| 55082 | __ai float64x1_t vfms_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { | 46767 | __ai float64x1_t vfms_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { |
| 55083 | float64x1_t __ret; | 46768 | float64x1_t __ret; |
| 55084 | __ret = vfma_f64(__p0, -__p1, (float64x1_t) {__p2}); | 46769 | __ret = vfma_f64(__p0, -__p1, (float64x1_t) {__p2}); |
| 55085 | return __ret; | 46770 | return __ret; |
| 55086 | } | 46771 | } |
| 55087 | #else | | |
| 55088 | __ai float64x1_t vfms_n_f64(float64x1_t __p0, float64x1_t __p1, float64_t __p2) { | | |
| 55089 | float64x1_t __ret; | | |
| 55090 | __ret = __noswap_vfma_f64(__p0, -__p1, (float64x1_t) {__p2}); | | |
| 55091 | return __ret; | | |
| 55092 | } | | |
| 55093 | #endif | | |
| 55094 | | | |
| 55095 | #ifdef __LITTLE_ENDIAN__ | 46772 | #ifdef __LITTLE_ENDIAN__ |
| 55096 | __ai float32x2_t vfms_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { | 46773 | __ai float32x2_t vfms_n_f32(float32x2_t __p0, float32x2_t __p1, float32_t __p2) { |
| 55097 | float32x2_t __ret; | 46774 | float32x2_t __ret; |
| ... | @@ -55144,33 +46821,17 @@ __ai float64x1_t vget_high_f64(float64x2_t __p0) { | ... | @@ -55144,33 +46821,17 @@ __ai float64x1_t vget_high_f64(float64x2_t __p0) { |
| 55144 | } | 46821 | } |
| 55145 | #endif | 46822 | #endif |
| 55146 | | 46823 | |
| 55147 | #ifdef __LITTLE_ENDIAN__ | | |
| 55148 | #define vget_lane_p64(__p0, __p1) __extension__ ({ \ | 46824 | #define vget_lane_p64(__p0, __p1) __extension__ ({ \ |
| 55149 | poly64x1_t __s0 = __p0; \ | 46825 | poly64x1_t __s0 = __p0; \ |
| 55150 | poly64_t __ret; \ | 46826 | poly64_t __ret; \ |
| 55151 | __ret = (poly64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | 46827 | __ret = (poly64_t) __builtin_neon_vget_lane_i64((poly64x1_t)__s0, __p1); \ |
| 55152 | __ret; \ | 46828 | __ret; \ |
| 55153 | }) | 46829 | }) |
| 55154 | #else | | |
| 55155 | #define vget_lane_p64(__p0, __p1) __extension__ ({ \ | | |
| 55156 | poly64x1_t __s0 = __p0; \ | | |
| 55157 | poly64_t __ret; \ | | |
| 55158 | __ret = (poly64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | | |
| 55159 | __ret; \ | | |
| 55160 | }) | | |
| 55161 | #define __noswap_vget_lane_p64(__p0, __p1) __extension__ ({ \ | | |
| 55162 | poly64x1_t __s0 = __p0; \ | | |
| 55163 | poly64_t __ret; \ | | |
| 55164 | __ret = (poly64_t) __builtin_neon_vget_lane_i64((int8x8_t)__s0, __p1); \ | | |
| 55165 | __ret; \ | | |
| 55166 | }) | | |
| 55167 | #endif | | |
| 55168 | | | |
| 55169 | #ifdef __LITTLE_ENDIAN__ | 46830 | #ifdef __LITTLE_ENDIAN__ |
| 55170 | #define vgetq_lane_p64(__p0, __p1) __extension__ ({ \ | 46831 | #define vgetq_lane_p64(__p0, __p1) __extension__ ({ \ |
| 55171 | poly64x2_t __s0 = __p0; \ | 46832 | poly64x2_t __s0 = __p0; \ |
| 55172 | poly64_t __ret; \ | 46833 | poly64_t __ret; \ |
| 55173 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__s0, __p1); \ | 46834 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__s0, __p1); \ |
| 55174 | __ret; \ | 46835 | __ret; \ |
| 55175 | }) | 46836 | }) |
| 55176 | #else | 46837 | #else |
| ... | @@ -55178,13 +46839,13 @@ __ai float64x1_t vget_high_f64(float64x2_t __p0) { | ... | @@ -55178,13 +46839,13 @@ __ai float64x1_t vget_high_f64(float64x2_t __p0) { |
| 55178 | poly64x2_t __s0 = __p0; \ | 46839 | poly64x2_t __s0 = __p0; \ |
| 55179 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 46840 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 55180 | poly64_t __ret; \ | 46841 | poly64_t __ret; \ |
| 55181 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__rev0, __p1); \ | 46842 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__rev0, __p1); \ |
| 55182 | __ret; \ | 46843 | __ret; \ |
| 55183 | }) | 46844 | }) |
| 55184 | #define __noswap_vgetq_lane_p64(__p0, __p1) __extension__ ({ \ | 46845 | #define __noswap_vgetq_lane_p64(__p0, __p1) __extension__ ({ \ |
| 55185 | poly64x2_t __s0 = __p0; \ | 46846 | poly64x2_t __s0 = __p0; \ |
| 55186 | poly64_t __ret; \ | 46847 | poly64_t __ret; \ |
| 55187 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((int8x16_t)__s0, __p1); \ | 46848 | __ret = (poly64_t) __builtin_neon_vgetq_lane_i64((poly64x2_t)__s0, __p1); \ |
| 55188 | __ret; \ | 46849 | __ret; \ |
| 55189 | }) | 46850 | }) |
| 55190 | #endif | 46851 | #endif |
| ... | @@ -55193,7 +46854,7 @@ __ai float64x1_t vget_high_f64(float64x2_t __p0) { | ... | @@ -55193,7 +46854,7 @@ __ai float64x1_t vget_high_f64(float64x2_t __p0) { |
| 55193 | #define vgetq_lane_f64(__p0, __p1) __extension__ ({ \ | 46854 | #define vgetq_lane_f64(__p0, __p1) __extension__ ({ \ |
| 55194 | float64x2_t __s0 = __p0; \ | 46855 | float64x2_t __s0 = __p0; \ |
| 55195 | float64_t __ret; \ | 46856 | float64_t __ret; \ |
| 55196 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((int8x16_t)__s0, __p1); \ | 46857 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__s0, __p1); \ |
| 55197 | __ret; \ | 46858 | __ret; \ |
| 55198 | }) | 46859 | }) |
| 55199 | #else | 46860 | #else |
| ... | @@ -55201,39 +46862,23 @@ __ai float64x1_t vget_high_f64(float64x2_t __p0) { | ... | @@ -55201,39 +46862,23 @@ __ai float64x1_t vget_high_f64(float64x2_t __p0) { |
| 55201 | float64x2_t __s0 = __p0; \ | 46862 | float64x2_t __s0 = __p0; \ |
| 55202 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ | 46863 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \ |
| 55203 | float64_t __ret; \ | 46864 | float64_t __ret; \ |
| 55204 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((int8x16_t)__rev0, __p1); \ | 46865 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__rev0, __p1); \ |
| 55205 | __ret; \ | 46866 | __ret; \ |
| 55206 | }) | 46867 | }) |
| 55207 | #define __noswap_vgetq_lane_f64(__p0, __p1) __extension__ ({ \ | 46868 | #define __noswap_vgetq_lane_f64(__p0, __p1) __extension__ ({ \ |
| 55208 | float64x2_t __s0 = __p0; \ | 46869 | float64x2_t __s0 = __p0; \ |
| 55209 | float64_t __ret; \ | 46870 | float64_t __ret; \ |
| 55210 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((int8x16_t)__s0, __p1); \ | 46871 | __ret = (float64_t) __builtin_neon_vgetq_lane_f64((float64x2_t)__s0, __p1); \ |
| 55211 | __ret; \ | 46872 | __ret; \ |
| 55212 | }) | 46873 | }) |
| 55213 | #endif | 46874 | #endif |
| 55214 | | 46875 | |
| 55215 | #ifdef __LITTLE_ENDIAN__ | | |
| 55216 | #define vget_lane_f64(__p0, __p1) __extension__ ({ \ | 46876 | #define vget_lane_f64(__p0, __p1) __extension__ ({ \ |
| 55217 | float64x1_t __s0 = __p0; \ | 46877 | float64x1_t __s0 = __p0; \ |
| 55218 | float64_t __ret; \ | 46878 | float64_t __ret; \ |
| 55219 | __ret = (float64_t) __builtin_neon_vget_lane_f64((int8x8_t)__s0, __p1); \ | 46879 | __ret = (float64_t) __builtin_neon_vget_lane_f64((float64x1_t)__s0, __p1); \ |
| 55220 | __ret; \ | | |
| 55221 | }) | | |
| 55222 | #else | | |
| 55223 | #define vget_lane_f64(__p0, __p1) __extension__ ({ \ | | |
| 55224 | float64x1_t __s0 = __p0; \ | | |
| 55225 | float64_t __ret; \ | | |
| 55226 | __ret = (float64_t) __builtin_neon_vget_lane_f64((int8x8_t)__s0, __p1); \ | | |
| 55227 | __ret; \ | | |
| 55228 | }) | | |
| 55229 | #define __noswap_vget_lane_f64(__p0, __p1) __extension__ ({ \ | | |
| 55230 | float64x1_t __s0 = __p0; \ | | |
| 55231 | float64_t __ret; \ | | |
| 55232 | __ret = (float64_t) __builtin_neon_vget_lane_f64((int8x8_t)__s0, __p1); \ | | |
| 55233 | __ret; \ | 46880 | __ret; \ |
| 55234 | }) | 46881 | }) |
| 55235 | #endif | | |
| 55236 | | | |
| 55237 | #ifdef __LITTLE_ENDIAN__ | 46882 | #ifdef __LITTLE_ENDIAN__ |
| 55238 | __ai poly64x1_t vget_low_p64(poly64x2_t __p0) { | 46883 | __ai poly64x1_t vget_low_p64(poly64x2_t __p0) { |
| 55239 | poly64x1_t __ret; | 46884 | poly64x1_t __ret; |
| ... | @@ -55264,20 +46909,11 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55264,20 +46909,11 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55264 | } | 46909 | } |
| 55265 | #endif | 46910 | #endif |
| 55266 | | 46911 | |
| 55267 | #ifdef __LITTLE_ENDIAN__ | | |
| 55268 | #define vld1_p64(__p0) __extension__ ({ \ | 46912 | #define vld1_p64(__p0) __extension__ ({ \ |
| 55269 | poly64x1_t __ret; \ | 46913 | poly64x1_t __ret; \ |
| 55270 | __ret = (poly64x1_t) __builtin_neon_vld1_v(__p0, 6); \ | 46914 | __ret = (poly64x1_t) __builtin_neon_vld1_v(__p0, 6); \ |
| 55271 | __ret; \ | 46915 | __ret; \ |
| 55272 | }) | 46916 | }) |
| 55273 | #else | | |
| 55274 | #define vld1_p64(__p0) __extension__ ({ \ | | |
| 55275 | poly64x1_t __ret; \ | | |
| 55276 | __ret = (poly64x1_t) __builtin_neon_vld1_v(__p0, 6); \ | | |
| 55277 | __ret; \ | | |
| 55278 | }) | | |
| 55279 | #endif | | |
| 55280 | | | |
| 55281 | #ifdef __LITTLE_ENDIAN__ | 46917 | #ifdef __LITTLE_ENDIAN__ |
| 55282 | #define vld1q_p64(__p0) __extension__ ({ \ | 46918 | #define vld1q_p64(__p0) __extension__ ({ \ |
| 55283 | poly64x2_t __ret; \ | 46919 | poly64x2_t __ret; \ |
| ... | @@ -55308,34 +46944,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55308,34 +46944,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55308 | }) | 46944 | }) |
| 55309 | #endif | 46945 | #endif |
| 55310 | | 46946 | |
| 55311 | #ifdef __LITTLE_ENDIAN__ | | |
| 55312 | #define vld1_f64(__p0) __extension__ ({ \ | 46947 | #define vld1_f64(__p0) __extension__ ({ \ |
| 55313 | float64x1_t __ret; \ | 46948 | float64x1_t __ret; \ |
| 55314 | __ret = (float64x1_t) __builtin_neon_vld1_v(__p0, 10); \ | 46949 | __ret = (float64x1_t) __builtin_neon_vld1_v(__p0, 10); \ |
| 55315 | __ret; \ | 46950 | __ret; \ |
| 55316 | }) | 46951 | }) |
| 55317 | #else | | |
| 55318 | #define vld1_f64(__p0) __extension__ ({ \ | | |
| 55319 | float64x1_t __ret; \ | | |
| 55320 | __ret = (float64x1_t) __builtin_neon_vld1_v(__p0, 10); \ | | |
| 55321 | __ret; \ | | |
| 55322 | }) | | |
| 55323 | #endif | | |
| 55324 | | | |
| 55325 | #ifdef __LITTLE_ENDIAN__ | | |
| 55326 | #define vld1_dup_p64(__p0) __extension__ ({ \ | 46952 | #define vld1_dup_p64(__p0) __extension__ ({ \ |
| 55327 | poly64x1_t __ret; \ | 46953 | poly64x1_t __ret; \ |
| 55328 | __ret = (poly64x1_t) __builtin_neon_vld1_dup_v(__p0, 6); \ | 46954 | __ret = (poly64x1_t) __builtin_neon_vld1_dup_v(__p0, 6); \ |
| 55329 | __ret; \ | 46955 | __ret; \ |
| 55330 | }) | 46956 | }) |
| 55331 | #else | | |
| 55332 | #define vld1_dup_p64(__p0) __extension__ ({ \ | | |
| 55333 | poly64x1_t __ret; \ | | |
| 55334 | __ret = (poly64x1_t) __builtin_neon_vld1_dup_v(__p0, 6); \ | | |
| 55335 | __ret; \ | | |
| 55336 | }) | | |
| 55337 | #endif | | |
| 55338 | | | |
| 55339 | #ifdef __LITTLE_ENDIAN__ | 46957 | #ifdef __LITTLE_ENDIAN__ |
| 55340 | #define vld1q_dup_p64(__p0) __extension__ ({ \ | 46958 | #define vld1q_dup_p64(__p0) __extension__ ({ \ |
| 55341 | poly64x2_t __ret; \ | 46959 | poly64x2_t __ret; \ |
| ... | @@ -55366,36 +46984,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55366,36 +46984,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55366 | }) | 46984 | }) |
| 55367 | #endif | 46985 | #endif |
| 55368 | | 46986 | |
| 55369 | #ifdef __LITTLE_ENDIAN__ | | |
| 55370 | #define vld1_dup_f64(__p0) __extension__ ({ \ | 46987 | #define vld1_dup_f64(__p0) __extension__ ({ \ |
| 55371 | float64x1_t __ret; \ | 46988 | float64x1_t __ret; \ |
| 55372 | __ret = (float64x1_t) __builtin_neon_vld1_dup_v(__p0, 10); \ | 46989 | __ret = (float64x1_t) __builtin_neon_vld1_dup_v(__p0, 10); \ |
| 55373 | __ret; \ | 46990 | __ret; \ |
| 55374 | }) | 46991 | }) |
| 55375 | #else | | |
| 55376 | #define vld1_dup_f64(__p0) __extension__ ({ \ | | |
| 55377 | float64x1_t __ret; \ | | |
| 55378 | __ret = (float64x1_t) __builtin_neon_vld1_dup_v(__p0, 10); \ | | |
| 55379 | __ret; \ | | |
| 55380 | }) | | |
| 55381 | #endif | | |
| 55382 | | | |
| 55383 | #ifdef __LITTLE_ENDIAN__ | | |
| 55384 | #define vld1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 55385 | poly64x1_t __s1 = __p1; \ | | |
| 55386 | poly64x1_t __ret; \ | | |
| 55387 | __ret = (poly64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ | | |
| 55388 | __ret; \ | | |
| 55389 | }) | | |
| 55390 | #else | | |
| 55391 | #define vld1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 46992 | #define vld1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 55392 | poly64x1_t __s1 = __p1; \ | 46993 | poly64x1_t __s1 = __p1; \ |
| 55393 | poly64x1_t __ret; \ | 46994 | poly64x1_t __ret; \ |
| 55394 | __ret = (poly64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ | 46995 | __ret = (poly64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ |
| 55395 | __ret; \ | 46996 | __ret; \ |
| 55396 | }) | 46997 | }) |
| 55397 | #endif | | |
| 55398 | | | |
| 55399 | #ifdef __LITTLE_ENDIAN__ | 46998 | #ifdef __LITTLE_ENDIAN__ |
| 55400 | #define vld1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 46999 | #define vld1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 55401 | poly64x2_t __s1 = __p1; \ | 47000 | poly64x2_t __s1 = __p1; \ |
| ... | @@ -55432,36 +47031,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55432,36 +47031,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55432 | }) | 47031 | }) |
| 55433 | #endif | 47032 | #endif |
| 55434 | | 47033 | |
| 55435 | #ifdef __LITTLE_ENDIAN__ | | |
| 55436 | #define vld1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 47034 | #define vld1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 55437 | float64x1_t __s1 = __p1; \ | 47035 | float64x1_t __s1 = __p1; \ |
| 55438 | float64x1_t __ret; \ | 47036 | float64x1_t __ret; \ |
| 55439 | __ret = (float64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ | 47037 | __ret = (float64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ |
| 55440 | __ret; \ | 47038 | __ret; \ |
| 55441 | }) | 47039 | }) |
| 55442 | #else | | |
| 55443 | #define vld1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 55444 | float64x1_t __s1 = __p1; \ | | |
| 55445 | float64x1_t __ret; \ | | |
| 55446 | __ret = (float64x1_t) __builtin_neon_vld1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ | | |
| 55447 | __ret; \ | | |
| 55448 | }) | | |
| 55449 | #endif | | |
| 55450 | | | |
| 55451 | #ifdef __LITTLE_ENDIAN__ | | |
| 55452 | #define vld1_p64_x2(__p0) __extension__ ({ \ | 47040 | #define vld1_p64_x2(__p0) __extension__ ({ \ |
| 55453 | poly64x1x2_t __ret; \ | 47041 | poly64x1x2_t __ret; \ |
| 55454 | __builtin_neon_vld1_x2_v(&__ret, __p0, 6); \ | 47042 | __builtin_neon_vld1_x2_v(&__ret, __p0, 6); \ |
| 55455 | __ret; \ | 47043 | __ret; \ |
| 55456 | }) | 47044 | }) |
| 55457 | #else | | |
| 55458 | #define vld1_p64_x2(__p0) __extension__ ({ \ | | |
| 55459 | poly64x1x2_t __ret; \ | | |
| 55460 | __builtin_neon_vld1_x2_v(&__ret, __p0, 6); \ | | |
| 55461 | __ret; \ | | |
| 55462 | }) | | |
| 55463 | #endif | | |
| 55464 | | | |
| 55465 | #ifdef __LITTLE_ENDIAN__ | 47045 | #ifdef __LITTLE_ENDIAN__ |
| 55466 | #define vld1q_p64_x2(__p0) __extension__ ({ \ | 47046 | #define vld1q_p64_x2(__p0) __extension__ ({ \ |
| 55467 | poly64x2x2_t __ret; \ | 47047 | poly64x2x2_t __ret; \ |
| ... | @@ -55496,34 +47076,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55496,34 +47076,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55496 | }) | 47076 | }) |
| 55497 | #endif | 47077 | #endif |
| 55498 | | 47078 | |
| 55499 | #ifdef __LITTLE_ENDIAN__ | | |
| 55500 | #define vld1_f64_x2(__p0) __extension__ ({ \ | 47079 | #define vld1_f64_x2(__p0) __extension__ ({ \ |
| 55501 | float64x1x2_t __ret; \ | 47080 | float64x1x2_t __ret; \ |
| 55502 | __builtin_neon_vld1_x2_v(&__ret, __p0, 10); \ | 47081 | __builtin_neon_vld1_x2_v(&__ret, __p0, 10); \ |
| 55503 | __ret; \ | 47082 | __ret; \ |
| 55504 | }) | 47083 | }) |
| 55505 | #else | | |
| 55506 | #define vld1_f64_x2(__p0) __extension__ ({ \ | | |
| 55507 | float64x1x2_t __ret; \ | | |
| 55508 | __builtin_neon_vld1_x2_v(&__ret, __p0, 10); \ | | |
| 55509 | __ret; \ | | |
| 55510 | }) | | |
| 55511 | #endif | | |
| 55512 | | | |
| 55513 | #ifdef __LITTLE_ENDIAN__ | | |
| 55514 | #define vld1_p64_x3(__p0) __extension__ ({ \ | 47084 | #define vld1_p64_x3(__p0) __extension__ ({ \ |
| 55515 | poly64x1x3_t __ret; \ | 47085 | poly64x1x3_t __ret; \ |
| 55516 | __builtin_neon_vld1_x3_v(&__ret, __p0, 6); \ | 47086 | __builtin_neon_vld1_x3_v(&__ret, __p0, 6); \ |
| 55517 | __ret; \ | 47087 | __ret; \ |
| 55518 | }) | 47088 | }) |
| 55519 | #else | | |
| 55520 | #define vld1_p64_x3(__p0) __extension__ ({ \ | | |
| 55521 | poly64x1x3_t __ret; \ | | |
| 55522 | __builtin_neon_vld1_x3_v(&__ret, __p0, 6); \ | | |
| 55523 | __ret; \ | | |
| 55524 | }) | | |
| 55525 | #endif | | |
| 55526 | | | |
| 55527 | #ifdef __LITTLE_ENDIAN__ | 47089 | #ifdef __LITTLE_ENDIAN__ |
| 55528 | #define vld1q_p64_x3(__p0) __extension__ ({ \ | 47090 | #define vld1q_p64_x3(__p0) __extension__ ({ \ |
| 55529 | poly64x2x3_t __ret; \ | 47091 | poly64x2x3_t __ret; \ |
| ... | @@ -55560,34 +47122,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55560,34 +47122,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55560 | }) | 47122 | }) |
| 55561 | #endif | 47123 | #endif |
| 55562 | | 47124 | |
| 55563 | #ifdef __LITTLE_ENDIAN__ | | |
| 55564 | #define vld1_f64_x3(__p0) __extension__ ({ \ | | |
| 55565 | float64x1x3_t __ret; \ | | |
| 55566 | __builtin_neon_vld1_x3_v(&__ret, __p0, 10); \ | | |
| 55567 | __ret; \ | | |
| 55568 | }) | | |
| 55569 | #else | | |
| 55570 | #define vld1_f64_x3(__p0) __extension__ ({ \ | 47125 | #define vld1_f64_x3(__p0) __extension__ ({ \ |
| 55571 | float64x1x3_t __ret; \ | 47126 | float64x1x3_t __ret; \ |
| 55572 | __builtin_neon_vld1_x3_v(&__ret, __p0, 10); \ | 47127 | __builtin_neon_vld1_x3_v(&__ret, __p0, 10); \ |
| 55573 | __ret; \ | 47128 | __ret; \ |
| 55574 | }) | 47129 | }) |
| 55575 | #endif | | |
| 55576 | | | |
| 55577 | #ifdef __LITTLE_ENDIAN__ | | |
| 55578 | #define vld1_p64_x4(__p0) __extension__ ({ \ | | |
| 55579 | poly64x1x4_t __ret; \ | | |
| 55580 | __builtin_neon_vld1_x4_v(&__ret, __p0, 6); \ | | |
| 55581 | __ret; \ | | |
| 55582 | }) | | |
| 55583 | #else | | |
| 55584 | #define vld1_p64_x4(__p0) __extension__ ({ \ | 47130 | #define vld1_p64_x4(__p0) __extension__ ({ \ |
| 55585 | poly64x1x4_t __ret; \ | 47131 | poly64x1x4_t __ret; \ |
| 55586 | __builtin_neon_vld1_x4_v(&__ret, __p0, 6); \ | 47132 | __builtin_neon_vld1_x4_v(&__ret, __p0, 6); \ |
| 55587 | __ret; \ | 47133 | __ret; \ |
| 55588 | }) | 47134 | }) |
| 55589 | #endif | | |
| 55590 | | | |
| 55591 | #ifdef __LITTLE_ENDIAN__ | 47135 | #ifdef __LITTLE_ENDIAN__ |
| 55592 | #define vld1q_p64_x4(__p0) __extension__ ({ \ | 47136 | #define vld1q_p64_x4(__p0) __extension__ ({ \ |
| 55593 | poly64x2x4_t __ret; \ | 47137 | poly64x2x4_t __ret; \ |
| ... | @@ -55626,34 +47170,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55626,34 +47170,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55626 | }) | 47170 | }) |
| 55627 | #endif | 47171 | #endif |
| 55628 | | 47172 | |
| 55629 | #ifdef __LITTLE_ENDIAN__ | | |
| 55630 | #define vld1_f64_x4(__p0) __extension__ ({ \ | | |
| 55631 | float64x1x4_t __ret; \ | | |
| 55632 | __builtin_neon_vld1_x4_v(&__ret, __p0, 10); \ | | |
| 55633 | __ret; \ | | |
| 55634 | }) | | |
| 55635 | #else | | |
| 55636 | #define vld1_f64_x4(__p0) __extension__ ({ \ | 47173 | #define vld1_f64_x4(__p0) __extension__ ({ \ |
| 55637 | float64x1x4_t __ret; \ | 47174 | float64x1x4_t __ret; \ |
| 55638 | __builtin_neon_vld1_x4_v(&__ret, __p0, 10); \ | 47175 | __builtin_neon_vld1_x4_v(&__ret, __p0, 10); \ |
| 55639 | __ret; \ | 47176 | __ret; \ |
| 55640 | }) | 47177 | }) |
| 55641 | #endif | | |
| 55642 | | | |
| 55643 | #ifdef __LITTLE_ENDIAN__ | | |
| 55644 | #define vld2_p64(__p0) __extension__ ({ \ | 47178 | #define vld2_p64(__p0) __extension__ ({ \ |
| 55645 | poly64x1x2_t __ret; \ | 47179 | poly64x1x2_t __ret; \ |
| 55646 | __builtin_neon_vld2_v(&__ret, __p0, 6); \ | 47180 | __builtin_neon_vld2_v(&__ret, __p0, 6); \ |
| 55647 | __ret; \ | 47181 | __ret; \ |
| 55648 | }) | 47182 | }) |
| 55649 | #else | | |
| 55650 | #define vld2_p64(__p0) __extension__ ({ \ | | |
| 55651 | poly64x1x2_t __ret; \ | | |
| 55652 | __builtin_neon_vld2_v(&__ret, __p0, 6); \ | | |
| 55653 | __ret; \ | | |
| 55654 | }) | | |
| 55655 | #endif | | |
| 55656 | | | |
| 55657 | #ifdef __LITTLE_ENDIAN__ | 47183 | #ifdef __LITTLE_ENDIAN__ |
| 55658 | #define vld2q_p64(__p0) __extension__ ({ \ | 47184 | #define vld2q_p64(__p0) __extension__ ({ \ |
| 55659 | poly64x2x2_t __ret; \ | 47185 | poly64x2x2_t __ret; \ |
| ... | @@ -55722,34 +47248,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55722,34 +47248,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55722 | }) | 47248 | }) |
| 55723 | #endif | 47249 | #endif |
| 55724 | | 47250 | |
| 55725 | #ifdef __LITTLE_ENDIAN__ | | |
| 55726 | #define vld2_f64(__p0) __extension__ ({ \ | | |
| 55727 | float64x1x2_t __ret; \ | | |
| 55728 | __builtin_neon_vld2_v(&__ret, __p0, 10); \ | | |
| 55729 | __ret; \ | | |
| 55730 | }) | | |
| 55731 | #else | | |
| 55732 | #define vld2_f64(__p0) __extension__ ({ \ | 47251 | #define vld2_f64(__p0) __extension__ ({ \ |
| 55733 | float64x1x2_t __ret; \ | 47252 | float64x1x2_t __ret; \ |
| 55734 | __builtin_neon_vld2_v(&__ret, __p0, 10); \ | 47253 | __builtin_neon_vld2_v(&__ret, __p0, 10); \ |
| 55735 | __ret; \ | 47254 | __ret; \ |
| 55736 | }) | 47255 | }) |
| 55737 | #endif | | |
| 55738 | | | |
| 55739 | #ifdef __LITTLE_ENDIAN__ | | |
| 55740 | #define vld2_dup_p64(__p0) __extension__ ({ \ | | |
| 55741 | poly64x1x2_t __ret; \ | | |
| 55742 | __builtin_neon_vld2_dup_v(&__ret, __p0, 6); \ | | |
| 55743 | __ret; \ | | |
| 55744 | }) | | |
| 55745 | #else | | |
| 55746 | #define vld2_dup_p64(__p0) __extension__ ({ \ | 47256 | #define vld2_dup_p64(__p0) __extension__ ({ \ |
| 55747 | poly64x1x2_t __ret; \ | 47257 | poly64x1x2_t __ret; \ |
| 55748 | __builtin_neon_vld2_dup_v(&__ret, __p0, 6); \ | 47258 | __builtin_neon_vld2_dup_v(&__ret, __p0, 6); \ |
| 55749 | __ret; \ | 47259 | __ret; \ |
| 55750 | }) | 47260 | }) |
| 55751 | #endif | | |
| 55752 | | | |
| 55753 | #ifdef __LITTLE_ENDIAN__ | 47261 | #ifdef __LITTLE_ENDIAN__ |
| 55754 | #define vld2q_dup_p64(__p0) __extension__ ({ \ | 47262 | #define vld2q_dup_p64(__p0) __extension__ ({ \ |
| 55755 | poly64x2x2_t __ret; \ | 47263 | poly64x2x2_t __ret; \ |
| ... | @@ -55784,36 +47292,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55784,36 +47292,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55784 | }) | 47292 | }) |
| 55785 | #endif | 47293 | #endif |
| 55786 | | 47294 | |
| 55787 | #ifdef __LITTLE_ENDIAN__ | | |
| 55788 | #define vld2_dup_f64(__p0) __extension__ ({ \ | 47295 | #define vld2_dup_f64(__p0) __extension__ ({ \ |
| 55789 | float64x1x2_t __ret; \ | 47296 | float64x1x2_t __ret; \ |
| 55790 | __builtin_neon_vld2_dup_v(&__ret, __p0, 10); \ | 47297 | __builtin_neon_vld2_dup_v(&__ret, __p0, 10); \ |
| 55791 | __ret; \ | 47298 | __ret; \ |
| 55792 | }) | 47299 | }) |
| 55793 | #else | | |
| 55794 | #define vld2_dup_f64(__p0) __extension__ ({ \ | | |
| 55795 | float64x1x2_t __ret; \ | | |
| 55796 | __builtin_neon_vld2_dup_v(&__ret, __p0, 10); \ | | |
| 55797 | __ret; \ | | |
| 55798 | }) | | |
| 55799 | #endif | | |
| 55800 | | | |
| 55801 | #ifdef __LITTLE_ENDIAN__ | | |
| 55802 | #define vld2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 47300 | #define vld2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 55803 | poly64x1x2_t __s1 = __p1; \ | 47301 | poly64x1x2_t __s1 = __p1; \ |
| 55804 | poly64x1x2_t __ret; \ | 47302 | poly64x1x2_t __ret; \ |
| 55805 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ | 47303 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ |
| 55806 | __ret; \ | 47304 | __ret; \ |
| 55807 | }) | 47305 | }) |
| 55808 | #else | | |
| 55809 | #define vld2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 55810 | poly64x1x2_t __s1 = __p1; \ | | |
| 55811 | poly64x1x2_t __ret; \ | | |
| 55812 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ | | |
| 55813 | __ret; \ | | |
| 55814 | }) | | |
| 55815 | #endif | | |
| 55816 | | | |
| 55817 | #ifdef __LITTLE_ENDIAN__ | 47306 | #ifdef __LITTLE_ENDIAN__ |
| 55818 | #define vld2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 47307 | #define vld2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 55819 | poly8x16x2_t __s1 = __p1; \ | 47308 | poly8x16x2_t __s1 = __p1; \ |
| ... | @@ -55928,7 +47417,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55928,7 +47417,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55928 | #define vld2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 47417 | #define vld2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 55929 | float64x2x2_t __s1 = __p1; \ | 47418 | float64x2x2_t __s1 = __p1; \ |
| 55930 | float64x2x2_t __ret; \ | 47419 | float64x2x2_t __ret; \ |
| 55931 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 42); \ | 47420 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 42); \ |
| 55932 | __ret; \ | 47421 | __ret; \ |
| 55933 | }) | 47422 | }) |
| 55934 | #else | 47423 | #else |
| ... | @@ -55938,7 +47427,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55938,7 +47427,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55938 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 47427 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 55939 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 47428 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 55940 | float64x2x2_t __ret; \ | 47429 | float64x2x2_t __ret; \ |
| 55941 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 42); \ | 47430 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 42); \ |
| 55942 | \ | 47431 | \ |
| 55943 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 47432 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 55944 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 47433 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -55950,7 +47439,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55950,7 +47439,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55950 | #define vld2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 47439 | #define vld2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 55951 | int64x2x2_t __s1 = __p1; \ | 47440 | int64x2x2_t __s1 = __p1; \ |
| 55952 | int64x2x2_t __ret; \ | 47441 | int64x2x2_t __ret; \ |
| 55953 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 35); \ | 47442 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 35); \ |
| 55954 | __ret; \ | 47443 | __ret; \ |
| 55955 | }) | 47444 | }) |
| 55956 | #else | 47445 | #else |
| ... | @@ -55960,7 +47449,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55960,7 +47449,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55960 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 47449 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 55961 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 47450 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 55962 | int64x2x2_t __ret; \ | 47451 | int64x2x2_t __ret; \ |
| 55963 | __builtin_neon_vld2q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __p2, 35); \ | 47452 | __builtin_neon_vld2q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 35); \ |
| 55964 | \ | 47453 | \ |
| 55965 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 47454 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 55966 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 47455 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -55968,68 +47457,29 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -55968,68 +47457,29 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 55968 | }) | 47457 | }) |
| 55969 | #endif | 47458 | #endif |
| 55970 | | 47459 | |
| 55971 | #ifdef __LITTLE_ENDIAN__ | | |
| 55972 | #define vld2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 47460 | #define vld2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 55973 | uint64x1x2_t __s1 = __p1; \ | 47461 | uint64x1x2_t __s1 = __p1; \ |
| 55974 | uint64x1x2_t __ret; \ | 47462 | uint64x1x2_t __ret; \ |
| 55975 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ | 47463 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ |
| 55976 | __ret; \ | 47464 | __ret; \ |
| 55977 | }) | 47465 | }) |
| 55978 | #else | | |
| 55979 | #define vld2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 55980 | uint64x1x2_t __s1 = __p1; \ | | |
| 55981 | uint64x1x2_t __ret; \ | | |
| 55982 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ | | |
| 55983 | __ret; \ | | |
| 55984 | }) | | |
| 55985 | #endif | | |
| 55986 | | | |
| 55987 | #ifdef __LITTLE_ENDIAN__ | | |
| 55988 | #define vld2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 47466 | #define vld2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 55989 | float64x1x2_t __s1 = __p1; \ | 47467 | float64x1x2_t __s1 = __p1; \ |
| 55990 | float64x1x2_t __ret; \ | 47468 | float64x1x2_t __ret; \ |
| 55991 | __builtin_neon_vld2_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 10); \ | 47469 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 10); \ |
| 55992 | __ret; \ | | |
| 55993 | }) | | |
| 55994 | #else | | |
| 55995 | #define vld2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 55996 | float64x1x2_t __s1 = __p1; \ | | |
| 55997 | float64x1x2_t __ret; \ | | |
| 55998 | __builtin_neon_vld2_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 10); \ | | |
| 55999 | __ret; \ | | |
| 56000 | }) | | |
| 56001 | #endif | | |
| 56002 | | | |
| 56003 | #ifdef __LITTLE_ENDIAN__ | | |
| 56004 | #define vld2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56005 | int64x1x2_t __s1 = __p1; \ | | |
| 56006 | int64x1x2_t __ret; \ | | |
| 56007 | __builtin_neon_vld2_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 3); \ | | |
| 56008 | __ret; \ | 47470 | __ret; \ |
| 56009 | }) | 47471 | }) |
| 56010 | #else | | |
| 56011 | #define vld2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 47472 | #define vld2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 56012 | int64x1x2_t __s1 = __p1; \ | 47473 | int64x1x2_t __s1 = __p1; \ |
| 56013 | int64x1x2_t __ret; \ | 47474 | int64x1x2_t __ret; \ |
| 56014 | __builtin_neon_vld2_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __p2, 3); \ | 47475 | __builtin_neon_vld2_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 3); \ |
| 56015 | __ret; \ | 47476 | __ret; \ |
| 56016 | }) | 47477 | }) |
| 56017 | #endif | | |
| 56018 | | | |
| 56019 | #ifdef __LITTLE_ENDIAN__ | | |
| 56020 | #define vld3_p64(__p0) __extension__ ({ \ | 47478 | #define vld3_p64(__p0) __extension__ ({ \ |
| 56021 | poly64x1x3_t __ret; \ | 47479 | poly64x1x3_t __ret; \ |
| 56022 | __builtin_neon_vld3_v(&__ret, __p0, 6); \ | 47480 | __builtin_neon_vld3_v(&__ret, __p0, 6); \ |
| 56023 | __ret; \ | 47481 | __ret; \ |
| 56024 | }) | 47482 | }) |
| 56025 | #else | | |
| 56026 | #define vld3_p64(__p0) __extension__ ({ \ | | |
| 56027 | poly64x1x3_t __ret; \ | | |
| 56028 | __builtin_neon_vld3_v(&__ret, __p0, 6); \ | | |
| 56029 | __ret; \ | | |
| 56030 | }) | | |
| 56031 | #endif | | |
| 56032 | | | |
| 56033 | #ifdef __LITTLE_ENDIAN__ | 47483 | #ifdef __LITTLE_ENDIAN__ |
| 56034 | #define vld3q_p64(__p0) __extension__ ({ \ | 47484 | #define vld3q_p64(__p0) __extension__ ({ \ |
| 56035 | poly64x2x3_t __ret; \ | 47485 | poly64x2x3_t __ret; \ |
| ... | @@ -56102,34 +47552,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56102,34 +47552,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56102 | }) | 47552 | }) |
| 56103 | #endif | 47553 | #endif |
| 56104 | | 47554 | |
| 56105 | #ifdef __LITTLE_ENDIAN__ | | |
| 56106 | #define vld3_f64(__p0) __extension__ ({ \ | 47555 | #define vld3_f64(__p0) __extension__ ({ \ |
| 56107 | float64x1x3_t __ret; \ | 47556 | float64x1x3_t __ret; \ |
| 56108 | __builtin_neon_vld3_v(&__ret, __p0, 10); \ | 47557 | __builtin_neon_vld3_v(&__ret, __p0, 10); \ |
| 56109 | __ret; \ | 47558 | __ret; \ |
| 56110 | }) | 47559 | }) |
| 56111 | #else | | |
| 56112 | #define vld3_f64(__p0) __extension__ ({ \ | | |
| 56113 | float64x1x3_t __ret; \ | | |
| 56114 | __builtin_neon_vld3_v(&__ret, __p0, 10); \ | | |
| 56115 | __ret; \ | | |
| 56116 | }) | | |
| 56117 | #endif | | |
| 56118 | | | |
| 56119 | #ifdef __LITTLE_ENDIAN__ | | |
| 56120 | #define vld3_dup_p64(__p0) __extension__ ({ \ | | |
| 56121 | poly64x1x3_t __ret; \ | | |
| 56122 | __builtin_neon_vld3_dup_v(&__ret, __p0, 6); \ | | |
| 56123 | __ret; \ | | |
| 56124 | }) | | |
| 56125 | #else | | |
| 56126 | #define vld3_dup_p64(__p0) __extension__ ({ \ | 47560 | #define vld3_dup_p64(__p0) __extension__ ({ \ |
| 56127 | poly64x1x3_t __ret; \ | 47561 | poly64x1x3_t __ret; \ |
| 56128 | __builtin_neon_vld3_dup_v(&__ret, __p0, 6); \ | 47562 | __builtin_neon_vld3_dup_v(&__ret, __p0, 6); \ |
| 56129 | __ret; \ | 47563 | __ret; \ |
| 56130 | }) | 47564 | }) |
| 56131 | #endif | | |
| 56132 | | | |
| 56133 | #ifdef __LITTLE_ENDIAN__ | 47565 | #ifdef __LITTLE_ENDIAN__ |
| 56134 | #define vld3q_dup_p64(__p0) __extension__ ({ \ | 47566 | #define vld3q_dup_p64(__p0) __extension__ ({ \ |
| 56135 | poly64x2x3_t __ret; \ | 47567 | poly64x2x3_t __ret; \ |
| ... | @@ -56166,36 +47598,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56166,36 +47598,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56166 | }) | 47598 | }) |
| 56167 | #endif | 47599 | #endif |
| 56168 | | 47600 | |
| 56169 | #ifdef __LITTLE_ENDIAN__ | | |
| 56170 | #define vld3_dup_f64(__p0) __extension__ ({ \ | 47601 | #define vld3_dup_f64(__p0) __extension__ ({ \ |
| 56171 | float64x1x3_t __ret; \ | 47602 | float64x1x3_t __ret; \ |
| 56172 | __builtin_neon_vld3_dup_v(&__ret, __p0, 10); \ | 47603 | __builtin_neon_vld3_dup_v(&__ret, __p0, 10); \ |
| 56173 | __ret; \ | 47604 | __ret; \ |
| 56174 | }) | 47605 | }) |
| 56175 | #else | | |
| 56176 | #define vld3_dup_f64(__p0) __extension__ ({ \ | | |
| 56177 | float64x1x3_t __ret; \ | | |
| 56178 | __builtin_neon_vld3_dup_v(&__ret, __p0, 10); \ | | |
| 56179 | __ret; \ | | |
| 56180 | }) | | |
| 56181 | #endif | | |
| 56182 | | | |
| 56183 | #ifdef __LITTLE_ENDIAN__ | | |
| 56184 | #define vld3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56185 | poly64x1x3_t __s1 = __p1; \ | | |
| 56186 | poly64x1x3_t __ret; \ | | |
| 56187 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ | | |
| 56188 | __ret; \ | | |
| 56189 | }) | | |
| 56190 | #else | | |
| 56191 | #define vld3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 47606 | #define vld3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 56192 | poly64x1x3_t __s1 = __p1; \ | 47607 | poly64x1x3_t __s1 = __p1; \ |
| 56193 | poly64x1x3_t __ret; \ | 47608 | poly64x1x3_t __ret; \ |
| 56194 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ | 47609 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ |
| 56195 | __ret; \ | 47610 | __ret; \ |
| 56196 | }) | 47611 | }) |
| 56197 | #endif | | |
| 56198 | | | |
| 56199 | #ifdef __LITTLE_ENDIAN__ | 47612 | #ifdef __LITTLE_ENDIAN__ |
| 56200 | #define vld3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 47613 | #define vld3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 56201 | poly8x16x3_t __s1 = __p1; \ | 47614 | poly8x16x3_t __s1 = __p1; \ |
| ... | @@ -56320,7 +47733,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56320,7 +47733,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56320 | #define vld3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 47733 | #define vld3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 56321 | float64x2x3_t __s1 = __p1; \ | 47734 | float64x2x3_t __s1 = __p1; \ |
| 56322 | float64x2x3_t __ret; \ | 47735 | float64x2x3_t __ret; \ |
| 56323 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 42); \ | 47736 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 42); \ |
| 56324 | __ret; \ | 47737 | __ret; \ |
| 56325 | }) | 47738 | }) |
| 56326 | #else | 47739 | #else |
| ... | @@ -56331,7 +47744,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56331,7 +47744,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56331 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 47744 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 56332 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 47745 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 56333 | float64x2x3_t __ret; \ | 47746 | float64x2x3_t __ret; \ |
| 56334 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 42); \ | 47747 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 42); \ |
| 56335 | \ | 47748 | \ |
| 56336 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 47749 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 56337 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 47750 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -56344,7 +47757,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56344,7 +47757,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56344 | #define vld3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 47757 | #define vld3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 56345 | int64x2x3_t __s1 = __p1; \ | 47758 | int64x2x3_t __s1 = __p1; \ |
| 56346 | int64x2x3_t __ret; \ | 47759 | int64x2x3_t __ret; \ |
| 56347 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 35); \ | 47760 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 35); \ |
| 56348 | __ret; \ | 47761 | __ret; \ |
| 56349 | }) | 47762 | }) |
| 56350 | #else | 47763 | #else |
| ... | @@ -56355,7 +47768,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56355,7 +47768,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56355 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 47768 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 56356 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 47769 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 56357 | int64x2x3_t __ret; \ | 47770 | int64x2x3_t __ret; \ |
| 56358 | __builtin_neon_vld3q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 35); \ | 47771 | __builtin_neon_vld3q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 35); \ |
| 56359 | \ | 47772 | \ |
| 56360 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 47773 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 56361 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 47774 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -56364,68 +47777,29 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56364,68 +47777,29 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56364 | }) | 47777 | }) |
| 56365 | #endif | 47778 | #endif |
| 56366 | | 47779 | |
| 56367 | #ifdef __LITTLE_ENDIAN__ | | |
| 56368 | #define vld3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 47780 | #define vld3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 56369 | uint64x1x3_t __s1 = __p1; \ | 47781 | uint64x1x3_t __s1 = __p1; \ |
| 56370 | uint64x1x3_t __ret; \ | 47782 | uint64x1x3_t __ret; \ |
| 56371 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ | 47783 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ |
| 56372 | __ret; \ | 47784 | __ret; \ |
| 56373 | }) | 47785 | }) |
| 56374 | #else | | |
| 56375 | #define vld3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56376 | uint64x1x3_t __s1 = __p1; \ | | |
| 56377 | uint64x1x3_t __ret; \ | | |
| 56378 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ | | |
| 56379 | __ret; \ | | |
| 56380 | }) | | |
| 56381 | #endif | | |
| 56382 | | | |
| 56383 | #ifdef __LITTLE_ENDIAN__ | | |
| 56384 | #define vld3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56385 | float64x1x3_t __s1 = __p1; \ | | |
| 56386 | float64x1x3_t __ret; \ | | |
| 56387 | __builtin_neon_vld3_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 10); \ | | |
| 56388 | __ret; \ | | |
| 56389 | }) | | |
| 56390 | #else | | |
| 56391 | #define vld3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 47786 | #define vld3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 56392 | float64x1x3_t __s1 = __p1; \ | 47787 | float64x1x3_t __s1 = __p1; \ |
| 56393 | float64x1x3_t __ret; \ | 47788 | float64x1x3_t __ret; \ |
| 56394 | __builtin_neon_vld3_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 10); \ | 47789 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 10); \ |
| 56395 | __ret; \ | 47790 | __ret; \ |
| 56396 | }) | 47791 | }) |
| 56397 | #endif | | |
| 56398 | | | |
| 56399 | #ifdef __LITTLE_ENDIAN__ | | |
| 56400 | #define vld3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 47792 | #define vld3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 56401 | int64x1x3_t __s1 = __p1; \ | 47793 | int64x1x3_t __s1 = __p1; \ |
| 56402 | int64x1x3_t __ret; \ | 47794 | int64x1x3_t __ret; \ |
| 56403 | __builtin_neon_vld3_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 3); \ | 47795 | __builtin_neon_vld3_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 3); \ |
| 56404 | __ret; \ | 47796 | __ret; \ |
| 56405 | }) | 47797 | }) |
| 56406 | #else | | |
| 56407 | #define vld3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56408 | int64x1x3_t __s1 = __p1; \ | | |
| 56409 | int64x1x3_t __ret; \ | | |
| 56410 | __builtin_neon_vld3_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 3); \ | | |
| 56411 | __ret; \ | | |
| 56412 | }) | | |
| 56413 | #endif | | |
| 56414 | | | |
| 56415 | #ifdef __LITTLE_ENDIAN__ | | |
| 56416 | #define vld4_p64(__p0) __extension__ ({ \ | 47798 | #define vld4_p64(__p0) __extension__ ({ \ |
| 56417 | poly64x1x4_t __ret; \ | 47799 | poly64x1x4_t __ret; \ |
| 56418 | __builtin_neon_vld4_v(&__ret, __p0, 6); \ | 47800 | __builtin_neon_vld4_v(&__ret, __p0, 6); \ |
| 56419 | __ret; \ | 47801 | __ret; \ |
| 56420 | }) | 47802 | }) |
| 56421 | #else | | |
| 56422 | #define vld4_p64(__p0) __extension__ ({ \ | | |
| 56423 | poly64x1x4_t __ret; \ | | |
| 56424 | __builtin_neon_vld4_v(&__ret, __p0, 6); \ | | |
| 56425 | __ret; \ | | |
| 56426 | }) | | |
| 56427 | #endif | | |
| 56428 | | | |
| 56429 | #ifdef __LITTLE_ENDIAN__ | 47803 | #ifdef __LITTLE_ENDIAN__ |
| 56430 | #define vld4q_p64(__p0) __extension__ ({ \ | 47804 | #define vld4q_p64(__p0) __extension__ ({ \ |
| 56431 | poly64x2x4_t __ret; \ | 47805 | poly64x2x4_t __ret; \ |
| ... | @@ -56502,34 +47876,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56502,34 +47876,16 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56502 | }) | 47876 | }) |
| 56503 | #endif | 47877 | #endif |
| 56504 | | 47878 | |
| 56505 | #ifdef __LITTLE_ENDIAN__ | | |
| 56506 | #define vld4_f64(__p0) __extension__ ({ \ | 47879 | #define vld4_f64(__p0) __extension__ ({ \ |
| 56507 | float64x1x4_t __ret; \ | 47880 | float64x1x4_t __ret; \ |
| 56508 | __builtin_neon_vld4_v(&__ret, __p0, 10); \ | 47881 | __builtin_neon_vld4_v(&__ret, __p0, 10); \ |
| 56509 | __ret; \ | 47882 | __ret; \ |
| 56510 | }) | 47883 | }) |
| 56511 | #else | | |
| 56512 | #define vld4_f64(__p0) __extension__ ({ \ | | |
| 56513 | float64x1x4_t __ret; \ | | |
| 56514 | __builtin_neon_vld4_v(&__ret, __p0, 10); \ | | |
| 56515 | __ret; \ | | |
| 56516 | }) | | |
| 56517 | #endif | | |
| 56518 | | | |
| 56519 | #ifdef __LITTLE_ENDIAN__ | | |
| 56520 | #define vld4_dup_p64(__p0) __extension__ ({ \ | | |
| 56521 | poly64x1x4_t __ret; \ | | |
| 56522 | __builtin_neon_vld4_dup_v(&__ret, __p0, 6); \ | | |
| 56523 | __ret; \ | | |
| 56524 | }) | | |
| 56525 | #else | | |
| 56526 | #define vld4_dup_p64(__p0) __extension__ ({ \ | 47884 | #define vld4_dup_p64(__p0) __extension__ ({ \ |
| 56527 | poly64x1x4_t __ret; \ | 47885 | poly64x1x4_t __ret; \ |
| 56528 | __builtin_neon_vld4_dup_v(&__ret, __p0, 6); \ | 47886 | __builtin_neon_vld4_dup_v(&__ret, __p0, 6); \ |
| 56529 | __ret; \ | 47887 | __ret; \ |
| 56530 | }) | 47888 | }) |
| 56531 | #endif | | |
| 56532 | | | |
| 56533 | #ifdef __LITTLE_ENDIAN__ | 47889 | #ifdef __LITTLE_ENDIAN__ |
| 56534 | #define vld4q_dup_p64(__p0) __extension__ ({ \ | 47890 | #define vld4q_dup_p64(__p0) __extension__ ({ \ |
| 56535 | poly64x2x4_t __ret; \ | 47891 | poly64x2x4_t __ret; \ |
| ... | @@ -56568,36 +47924,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56568,36 +47924,17 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56568 | }) | 47924 | }) |
| 56569 | #endif | 47925 | #endif |
| 56570 | | 47926 | |
| 56571 | #ifdef __LITTLE_ENDIAN__ | | |
| 56572 | #define vld4_dup_f64(__p0) __extension__ ({ \ | 47927 | #define vld4_dup_f64(__p0) __extension__ ({ \ |
| 56573 | float64x1x4_t __ret; \ | 47928 | float64x1x4_t __ret; \ |
| 56574 | __builtin_neon_vld4_dup_v(&__ret, __p0, 10); \ | 47929 | __builtin_neon_vld4_dup_v(&__ret, __p0, 10); \ |
| 56575 | __ret; \ | 47930 | __ret; \ |
| 56576 | }) | 47931 | }) |
| 56577 | #else | | |
| 56578 | #define vld4_dup_f64(__p0) __extension__ ({ \ | | |
| 56579 | float64x1x4_t __ret; \ | | |
| 56580 | __builtin_neon_vld4_dup_v(&__ret, __p0, 10); \ | | |
| 56581 | __ret; \ | | |
| 56582 | }) | | |
| 56583 | #endif | | |
| 56584 | | | |
| 56585 | #ifdef __LITTLE_ENDIAN__ | | |
| 56586 | #define vld4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56587 | poly64x1x4_t __s1 = __p1; \ | | |
| 56588 | poly64x1x4_t __ret; \ | | |
| 56589 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ | | |
| 56590 | __ret; \ | | |
| 56591 | }) | | |
| 56592 | #else | | |
| 56593 | #define vld4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 47932 | #define vld4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 56594 | poly64x1x4_t __s1 = __p1; \ | 47933 | poly64x1x4_t __s1 = __p1; \ |
| 56595 | poly64x1x4_t __ret; \ | 47934 | poly64x1x4_t __ret; \ |
| 56596 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ | 47935 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ |
| 56597 | __ret; \ | 47936 | __ret; \ |
| 56598 | }) | 47937 | }) |
| 56599 | #endif | | |
| 56600 | | | |
| 56601 | #ifdef __LITTLE_ENDIAN__ | 47938 | #ifdef __LITTLE_ENDIAN__ |
| 56602 | #define vld4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 47939 | #define vld4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 56603 | poly8x16x4_t __s1 = __p1; \ | 47940 | poly8x16x4_t __s1 = __p1; \ |
| ... | @@ -56732,7 +48069,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56732,7 +48069,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56732 | #define vld4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 48069 | #define vld4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 56733 | float64x2x4_t __s1 = __p1; \ | 48070 | float64x2x4_t __s1 = __p1; \ |
| 56734 | float64x2x4_t __ret; \ | 48071 | float64x2x4_t __ret; \ |
| 56735 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 42); \ | 48072 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 42); \ |
| 56736 | __ret; \ | 48073 | __ret; \ |
| 56737 | }) | 48074 | }) |
| 56738 | #else | 48075 | #else |
| ... | @@ -56744,7 +48081,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56744,7 +48081,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56744 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 48081 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 56745 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 48082 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 56746 | float64x2x4_t __ret; \ | 48083 | float64x2x4_t __ret; \ |
| 56747 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 42); \ | 48084 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 42); \ |
| 56748 | \ | 48085 | \ |
| 56749 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 48086 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 56750 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 48087 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -56758,7 +48095,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56758,7 +48095,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56758 | #define vld4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 48095 | #define vld4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 56759 | int64x2x4_t __s1 = __p1; \ | 48096 | int64x2x4_t __s1 = __p1; \ |
| 56760 | int64x2x4_t __ret; \ | 48097 | int64x2x4_t __ret; \ |
| 56761 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 35); \ | 48098 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 35); \ |
| 56762 | __ret; \ | 48099 | __ret; \ |
| 56763 | }) | 48100 | }) |
| 56764 | #else | 48101 | #else |
| ... | @@ -56770,7 +48107,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56770,7 +48107,7 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56770 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 48107 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 56771 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 48108 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 56772 | int64x2x4_t __ret; \ | 48109 | int64x2x4_t __ret; \ |
| 56773 | __builtin_neon_vld4q_lane_v(&__ret, __p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 35); \ | 48110 | __builtin_neon_vld4q_lane_v(&__ret, __p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 35); \ |
| 56774 | \ | 48111 | \ |
| 56775 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ | 48112 | __ret.val[0] = __builtin_shufflevector(__ret.val[0], __ret.val[0], 1, 0); \ |
| 56776 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ | 48113 | __ret.val[1] = __builtin_shufflevector(__ret.val[1], __ret.val[1], 1, 0); \ |
| ... | @@ -56780,68 +48117,29 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { | ... | @@ -56780,68 +48117,29 @@ __ai float64x1_t vget_low_f64(float64x2_t __p0) { |
| 56780 | }) | 48117 | }) |
| 56781 | #endif | 48118 | #endif |
| 56782 | | 48119 | |
| 56783 | #ifdef __LITTLE_ENDIAN__ | | |
| 56784 | #define vld4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 48120 | #define vld4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 56785 | uint64x1x4_t __s1 = __p1; \ | 48121 | uint64x1x4_t __s1 = __p1; \ |
| 56786 | uint64x1x4_t __ret; \ | 48122 | uint64x1x4_t __ret; \ |
| 56787 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ | 48123 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ |
| 56788 | __ret; \ | 48124 | __ret; \ |
| 56789 | }) | 48125 | }) |
| 56790 | #else | | |
| 56791 | #define vld4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56792 | uint64x1x4_t __s1 = __p1; \ | | |
| 56793 | uint64x1x4_t __ret; \ | | |
| 56794 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ | | |
| 56795 | __ret; \ | | |
| 56796 | }) | | |
| 56797 | #endif | | |
| 56798 | | | |
| 56799 | #ifdef __LITTLE_ENDIAN__ | | |
| 56800 | #define vld4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56801 | float64x1x4_t __s1 = __p1; \ | | |
| 56802 | float64x1x4_t __ret; \ | | |
| 56803 | __builtin_neon_vld4_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 10); \ | | |
| 56804 | __ret; \ | | |
| 56805 | }) | | |
| 56806 | #else | | |
| 56807 | #define vld4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 48126 | #define vld4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 56808 | float64x1x4_t __s1 = __p1; \ | 48127 | float64x1x4_t __s1 = __p1; \ |
| 56809 | float64x1x4_t __ret; \ | 48128 | float64x1x4_t __ret; \ |
| 56810 | __builtin_neon_vld4_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 10); \ | 48129 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 10); \ |
| 56811 | __ret; \ | 48130 | __ret; \ |
| 56812 | }) | 48131 | }) |
| 56813 | #endif | | |
| 56814 | | | |
| 56815 | #ifdef __LITTLE_ENDIAN__ | | |
| 56816 | #define vld4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 56817 | int64x1x4_t __s1 = __p1; \ | | |
| 56818 | int64x1x4_t __ret; \ | | |
| 56819 | __builtin_neon_vld4_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 3); \ | | |
| 56820 | __ret; \ | | |
| 56821 | }) | | |
| 56822 | #else | | |
| 56823 | #define vld4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 48132 | #define vld4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 56824 | int64x1x4_t __s1 = __p1; \ | 48133 | int64x1x4_t __s1 = __p1; \ |
| 56825 | int64x1x4_t __ret; \ | 48134 | int64x1x4_t __ret; \ |
| 56826 | __builtin_neon_vld4_lane_v(&__ret, __p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 3); \ | 48135 | __builtin_neon_vld4_lane_v(&__ret, __p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 3); \ |
| 56827 | __ret; \ | 48136 | __ret; \ |
| 56828 | }) | 48137 | }) |
| 56829 | #endif | | |
| 56830 | | | |
| 56831 | #ifdef __LITTLE_ENDIAN__ | | |
| 56832 | #define vldrq_p128(__p0) __extension__ ({ \ | | |
| 56833 | poly128_t __ret; \ | | |
| 56834 | __ret = (poly128_t) __builtin_neon_vldrq_p128(__p0); \ | | |
| 56835 | __ret; \ | | |
| 56836 | }) | | |
| 56837 | #else | | |
| 56838 | #define vldrq_p128(__p0) __extension__ ({ \ | 48138 | #define vldrq_p128(__p0) __extension__ ({ \ |
| 56839 | poly128_t __ret; \ | 48139 | poly128_t __ret; \ |
| 56840 | __ret = (poly128_t) __builtin_neon_vldrq_p128(__p0); \ | 48140 | __ret = (poly128_t) __builtin_neon_vldrq_p128(__p0); \ |
| 56841 | __ret; \ | 48141 | __ret; \ |
| 56842 | }) | 48142 | }) |
| 56843 | #endif | | |
| 56844 | | | |
| 56845 | #ifdef __LITTLE_ENDIAN__ | 48143 | #ifdef __LITTLE_ENDIAN__ |
| 56846 | __ai float64x2_t vmaxq_f64(float64x2_t __p0, float64x2_t __p1) { | 48144 | __ai float64x2_t vmaxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 56847 | float64x2_t __ret; | 48145 | float64x2_t __ret; |
| ... | @@ -56859,31 +48157,22 @@ __ai float64x2_t vmaxq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -56859,31 +48157,22 @@ __ai float64x2_t vmaxq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 56859 | } | 48157 | } |
| 56860 | #endif | 48158 | #endif |
| 56861 | | 48159 | |
| 56862 | #ifdef __LITTLE_ENDIAN__ | | |
| 56863 | __ai float64x1_t vmax_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 56864 | float64x1_t __ret; | | |
| 56865 | __ret = (float64x1_t) __builtin_neon_vmax_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 56866 | return __ret; | | |
| 56867 | } | | |
| 56868 | #else | | |
| 56869 | __ai float64x1_t vmax_f64(float64x1_t __p0, float64x1_t __p1) { | 48160 | __ai float64x1_t vmax_f64(float64x1_t __p0, float64x1_t __p1) { |
| 56870 | float64x1_t __ret; | 48161 | float64x1_t __ret; |
| 56871 | __ret = (float64x1_t) __builtin_neon_vmax_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 48162 | __ret = (float64x1_t) __builtin_neon_vmax_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 56872 | return __ret; | 48163 | return __ret; |
| 56873 | } | 48164 | } |
| 56874 | #endif | | |
| 56875 | | | |
| 56876 | #ifdef __LITTLE_ENDIAN__ | 48165 | #ifdef __LITTLE_ENDIAN__ |
| 56877 | __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { | 48166 | __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { |
| 56878 | float64_t __ret; | 48167 | float64_t __ret; |
| 56879 | __ret = (float64_t) __builtin_neon_vmaxnmvq_f64((int8x16_t)__p0); | 48168 | __ret = (float64_t) __builtin_neon_vmaxnmvq_f64(__p0); |
| 56880 | return __ret; | 48169 | return __ret; |
| 56881 | } | 48170 | } |
| 56882 | #else | 48171 | #else |
| 56883 | __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { | 48172 | __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { |
| 56884 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48173 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 56885 | float64_t __ret; | 48174 | float64_t __ret; |
| 56886 | __ret = (float64_t) __builtin_neon_vmaxnmvq_f64((int8x16_t)__rev0); | 48175 | __ret = (float64_t) __builtin_neon_vmaxnmvq_f64(__rev0); |
| 56887 | return __ret; | 48176 | return __ret; |
| 56888 | } | 48177 | } |
| 56889 | #endif | 48178 | #endif |
| ... | @@ -56891,14 +48180,14 @@ __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { | ... | @@ -56891,14 +48180,14 @@ __ai float64_t vmaxnmvq_f64(float64x2_t __p0) { |
| 56891 | #ifdef __LITTLE_ENDIAN__ | 48180 | #ifdef __LITTLE_ENDIAN__ |
| 56892 | __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { | 48181 | __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { |
| 56893 | float32_t __ret; | 48182 | float32_t __ret; |
| 56894 | __ret = (float32_t) __builtin_neon_vmaxnmvq_f32((int8x16_t)__p0); | 48183 | __ret = (float32_t) __builtin_neon_vmaxnmvq_f32(__p0); |
| 56895 | return __ret; | 48184 | return __ret; |
| 56896 | } | 48185 | } |
| 56897 | #else | 48186 | #else |
| 56898 | __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { | 48187 | __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { |
| 56899 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48188 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 56900 | float32_t __ret; | 48189 | float32_t __ret; |
| 56901 | __ret = (float32_t) __builtin_neon_vmaxnmvq_f32((int8x16_t)__rev0); | 48190 | __ret = (float32_t) __builtin_neon_vmaxnmvq_f32(__rev0); |
| 56902 | return __ret; | 48191 | return __ret; |
| 56903 | } | 48192 | } |
| 56904 | #endif | 48193 | #endif |
| ... | @@ -56906,14 +48195,14 @@ __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { | ... | @@ -56906,14 +48195,14 @@ __ai float32_t vmaxnmvq_f32(float32x4_t __p0) { |
| 56906 | #ifdef __LITTLE_ENDIAN__ | 48195 | #ifdef __LITTLE_ENDIAN__ |
| 56907 | __ai float32_t vmaxnmv_f32(float32x2_t __p0) { | 48196 | __ai float32_t vmaxnmv_f32(float32x2_t __p0) { |
| 56908 | float32_t __ret; | 48197 | float32_t __ret; |
| 56909 | __ret = (float32_t) __builtin_neon_vmaxnmv_f32((int8x8_t)__p0); | 48198 | __ret = (float32_t) __builtin_neon_vmaxnmv_f32(__p0); |
| 56910 | return __ret; | 48199 | return __ret; |
| 56911 | } | 48200 | } |
| 56912 | #else | 48201 | #else |
| 56913 | __ai float32_t vmaxnmv_f32(float32x2_t __p0) { | 48202 | __ai float32_t vmaxnmv_f32(float32x2_t __p0) { |
| 56914 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48203 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 56915 | float32_t __ret; | 48204 | float32_t __ret; |
| 56916 | __ret = (float32_t) __builtin_neon_vmaxnmv_f32((int8x8_t)__rev0); | 48205 | __ret = (float32_t) __builtin_neon_vmaxnmv_f32(__rev0); |
| 56917 | return __ret; | 48206 | return __ret; |
| 56918 | } | 48207 | } |
| 56919 | #endif | 48208 | #endif |
| ... | @@ -56921,14 +48210,14 @@ __ai float32_t vmaxnmv_f32(float32x2_t __p0) { | ... | @@ -56921,14 +48210,14 @@ __ai float32_t vmaxnmv_f32(float32x2_t __p0) { |
| 56921 | #ifdef __LITTLE_ENDIAN__ | 48210 | #ifdef __LITTLE_ENDIAN__ |
| 56922 | __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { | 48211 | __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { |
| 56923 | uint8_t __ret; | 48212 | uint8_t __ret; |
| 56924 | __ret = (uint8_t) __builtin_neon_vmaxvq_u8((int8x16_t)__p0); | 48213 | __ret = (uint8_t) __builtin_neon_vmaxvq_u8(__p0); |
| 56925 | return __ret; | 48214 | return __ret; |
| 56926 | } | 48215 | } |
| 56927 | #else | 48216 | #else |
| 56928 | __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { | 48217 | __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { |
| 56929 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48218 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 56930 | uint8_t __ret; | 48219 | uint8_t __ret; |
| 56931 | __ret = (uint8_t) __builtin_neon_vmaxvq_u8((int8x16_t)__rev0); | 48220 | __ret = (uint8_t) __builtin_neon_vmaxvq_u8(__rev0); |
| 56932 | return __ret; | 48221 | return __ret; |
| 56933 | } | 48222 | } |
| 56934 | #endif | 48223 | #endif |
| ... | @@ -56936,14 +48225,14 @@ __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { | ... | @@ -56936,14 +48225,14 @@ __ai uint8_t vmaxvq_u8(uint8x16_t __p0) { |
| 56936 | #ifdef __LITTLE_ENDIAN__ | 48225 | #ifdef __LITTLE_ENDIAN__ |
| 56937 | __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { | 48226 | __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { |
| 56938 | uint32_t __ret; | 48227 | uint32_t __ret; |
| 56939 | __ret = (uint32_t) __builtin_neon_vmaxvq_u32((int8x16_t)__p0); | 48228 | __ret = (uint32_t) __builtin_neon_vmaxvq_u32(__p0); |
| 56940 | return __ret; | 48229 | return __ret; |
| 56941 | } | 48230 | } |
| 56942 | #else | 48231 | #else |
| 56943 | __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { | 48232 | __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { |
| 56944 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48233 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 56945 | uint32_t __ret; | 48234 | uint32_t __ret; |
| 56946 | __ret = (uint32_t) __builtin_neon_vmaxvq_u32((int8x16_t)__rev0); | 48235 | __ret = (uint32_t) __builtin_neon_vmaxvq_u32(__rev0); |
| 56947 | return __ret; | 48236 | return __ret; |
| 56948 | } | 48237 | } |
| 56949 | #endif | 48238 | #endif |
| ... | @@ -56951,14 +48240,14 @@ __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { | ... | @@ -56951,14 +48240,14 @@ __ai uint32_t vmaxvq_u32(uint32x4_t __p0) { |
| 56951 | #ifdef __LITTLE_ENDIAN__ | 48240 | #ifdef __LITTLE_ENDIAN__ |
| 56952 | __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { | 48241 | __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { |
| 56953 | uint16_t __ret; | 48242 | uint16_t __ret; |
| 56954 | __ret = (uint16_t) __builtin_neon_vmaxvq_u16((int8x16_t)__p0); | 48243 | __ret = (uint16_t) __builtin_neon_vmaxvq_u16(__p0); |
| 56955 | return __ret; | 48244 | return __ret; |
| 56956 | } | 48245 | } |
| 56957 | #else | 48246 | #else |
| 56958 | __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { | 48247 | __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { |
| 56959 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48248 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 56960 | uint16_t __ret; | 48249 | uint16_t __ret; |
| 56961 | __ret = (uint16_t) __builtin_neon_vmaxvq_u16((int8x16_t)__rev0); | 48250 | __ret = (uint16_t) __builtin_neon_vmaxvq_u16(__rev0); |
| 56962 | return __ret; | 48251 | return __ret; |
| 56963 | } | 48252 | } |
| 56964 | #endif | 48253 | #endif |
| ... | @@ -56966,14 +48255,14 @@ __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { | ... | @@ -56966,14 +48255,14 @@ __ai uint16_t vmaxvq_u16(uint16x8_t __p0) { |
| 56966 | #ifdef __LITTLE_ENDIAN__ | 48255 | #ifdef __LITTLE_ENDIAN__ |
| 56967 | __ai int8_t vmaxvq_s8(int8x16_t __p0) { | 48256 | __ai int8_t vmaxvq_s8(int8x16_t __p0) { |
| 56968 | int8_t __ret; | 48257 | int8_t __ret; |
| 56969 | __ret = (int8_t) __builtin_neon_vmaxvq_s8((int8x16_t)__p0); | 48258 | __ret = (int8_t) __builtin_neon_vmaxvq_s8(__p0); |
| 56970 | return __ret; | 48259 | return __ret; |
| 56971 | } | 48260 | } |
| 56972 | #else | 48261 | #else |
| 56973 | __ai int8_t vmaxvq_s8(int8x16_t __p0) { | 48262 | __ai int8_t vmaxvq_s8(int8x16_t __p0) { |
| 56974 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48263 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 56975 | int8_t __ret; | 48264 | int8_t __ret; |
| 56976 | __ret = (int8_t) __builtin_neon_vmaxvq_s8((int8x16_t)__rev0); | 48265 | __ret = (int8_t) __builtin_neon_vmaxvq_s8(__rev0); |
| 56977 | return __ret; | 48266 | return __ret; |
| 56978 | } | 48267 | } |
| 56979 | #endif | 48268 | #endif |
| ... | @@ -56981,14 +48270,14 @@ __ai int8_t vmaxvq_s8(int8x16_t __p0) { | ... | @@ -56981,14 +48270,14 @@ __ai int8_t vmaxvq_s8(int8x16_t __p0) { |
| 56981 | #ifdef __LITTLE_ENDIAN__ | 48270 | #ifdef __LITTLE_ENDIAN__ |
| 56982 | __ai float64_t vmaxvq_f64(float64x2_t __p0) { | 48271 | __ai float64_t vmaxvq_f64(float64x2_t __p0) { |
| 56983 | float64_t __ret; | 48272 | float64_t __ret; |
| 56984 | __ret = (float64_t) __builtin_neon_vmaxvq_f64((int8x16_t)__p0); | 48273 | __ret = (float64_t) __builtin_neon_vmaxvq_f64(__p0); |
| 56985 | return __ret; | 48274 | return __ret; |
| 56986 | } | 48275 | } |
| 56987 | #else | 48276 | #else |
| 56988 | __ai float64_t vmaxvq_f64(float64x2_t __p0) { | 48277 | __ai float64_t vmaxvq_f64(float64x2_t __p0) { |
| 56989 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48278 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 56990 | float64_t __ret; | 48279 | float64_t __ret; |
| 56991 | __ret = (float64_t) __builtin_neon_vmaxvq_f64((int8x16_t)__rev0); | 48280 | __ret = (float64_t) __builtin_neon_vmaxvq_f64(__rev0); |
| 56992 | return __ret; | 48281 | return __ret; |
| 56993 | } | 48282 | } |
| 56994 | #endif | 48283 | #endif |
| ... | @@ -56996,14 +48285,14 @@ __ai float64_t vmaxvq_f64(float64x2_t __p0) { | ... | @@ -56996,14 +48285,14 @@ __ai float64_t vmaxvq_f64(float64x2_t __p0) { |
| 56996 | #ifdef __LITTLE_ENDIAN__ | 48285 | #ifdef __LITTLE_ENDIAN__ |
| 56997 | __ai float32_t vmaxvq_f32(float32x4_t __p0) { | 48286 | __ai float32_t vmaxvq_f32(float32x4_t __p0) { |
| 56998 | float32_t __ret; | 48287 | float32_t __ret; |
| 56999 | __ret = (float32_t) __builtin_neon_vmaxvq_f32((int8x16_t)__p0); | 48288 | __ret = (float32_t) __builtin_neon_vmaxvq_f32(__p0); |
| 57000 | return __ret; | 48289 | return __ret; |
| 57001 | } | 48290 | } |
| 57002 | #else | 48291 | #else |
| 57003 | __ai float32_t vmaxvq_f32(float32x4_t __p0) { | 48292 | __ai float32_t vmaxvq_f32(float32x4_t __p0) { |
| 57004 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48293 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57005 | float32_t __ret; | 48294 | float32_t __ret; |
| 57006 | __ret = (float32_t) __builtin_neon_vmaxvq_f32((int8x16_t)__rev0); | 48295 | __ret = (float32_t) __builtin_neon_vmaxvq_f32(__rev0); |
| 57007 | return __ret; | 48296 | return __ret; |
| 57008 | } | 48297 | } |
| 57009 | #endif | 48298 | #endif |
| ... | @@ -57011,14 +48300,14 @@ __ai float32_t vmaxvq_f32(float32x4_t __p0) { | ... | @@ -57011,14 +48300,14 @@ __ai float32_t vmaxvq_f32(float32x4_t __p0) { |
| 57011 | #ifdef __LITTLE_ENDIAN__ | 48300 | #ifdef __LITTLE_ENDIAN__ |
| 57012 | __ai int32_t vmaxvq_s32(int32x4_t __p0) { | 48301 | __ai int32_t vmaxvq_s32(int32x4_t __p0) { |
| 57013 | int32_t __ret; | 48302 | int32_t __ret; |
| 57014 | __ret = (int32_t) __builtin_neon_vmaxvq_s32((int8x16_t)__p0); | 48303 | __ret = (int32_t) __builtin_neon_vmaxvq_s32(__p0); |
| 57015 | return __ret; | 48304 | return __ret; |
| 57016 | } | 48305 | } |
| 57017 | #else | 48306 | #else |
| 57018 | __ai int32_t vmaxvq_s32(int32x4_t __p0) { | 48307 | __ai int32_t vmaxvq_s32(int32x4_t __p0) { |
| 57019 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48308 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57020 | int32_t __ret; | 48309 | int32_t __ret; |
| 57021 | __ret = (int32_t) __builtin_neon_vmaxvq_s32((int8x16_t)__rev0); | 48310 | __ret = (int32_t) __builtin_neon_vmaxvq_s32(__rev0); |
| 57022 | return __ret; | 48311 | return __ret; |
| 57023 | } | 48312 | } |
| 57024 | #endif | 48313 | #endif |
| ... | @@ -57026,14 +48315,14 @@ __ai int32_t vmaxvq_s32(int32x4_t __p0) { | ... | @@ -57026,14 +48315,14 @@ __ai int32_t vmaxvq_s32(int32x4_t __p0) { |
| 57026 | #ifdef __LITTLE_ENDIAN__ | 48315 | #ifdef __LITTLE_ENDIAN__ |
| 57027 | __ai int16_t vmaxvq_s16(int16x8_t __p0) { | 48316 | __ai int16_t vmaxvq_s16(int16x8_t __p0) { |
| 57028 | int16_t __ret; | 48317 | int16_t __ret; |
| 57029 | __ret = (int16_t) __builtin_neon_vmaxvq_s16((int8x16_t)__p0); | 48318 | __ret = (int16_t) __builtin_neon_vmaxvq_s16(__p0); |
| 57030 | return __ret; | 48319 | return __ret; |
| 57031 | } | 48320 | } |
| 57032 | #else | 48321 | #else |
| 57033 | __ai int16_t vmaxvq_s16(int16x8_t __p0) { | 48322 | __ai int16_t vmaxvq_s16(int16x8_t __p0) { |
| 57034 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48323 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57035 | int16_t __ret; | 48324 | int16_t __ret; |
| 57036 | __ret = (int16_t) __builtin_neon_vmaxvq_s16((int8x16_t)__rev0); | 48325 | __ret = (int16_t) __builtin_neon_vmaxvq_s16(__rev0); |
| 57037 | return __ret; | 48326 | return __ret; |
| 57038 | } | 48327 | } |
| 57039 | #endif | 48328 | #endif |
| ... | @@ -57041,14 +48330,14 @@ __ai int16_t vmaxvq_s16(int16x8_t __p0) { | ... | @@ -57041,14 +48330,14 @@ __ai int16_t vmaxvq_s16(int16x8_t __p0) { |
| 57041 | #ifdef __LITTLE_ENDIAN__ | 48330 | #ifdef __LITTLE_ENDIAN__ |
| 57042 | __ai uint8_t vmaxv_u8(uint8x8_t __p0) { | 48331 | __ai uint8_t vmaxv_u8(uint8x8_t __p0) { |
| 57043 | uint8_t __ret; | 48332 | uint8_t __ret; |
| 57044 | __ret = (uint8_t) __builtin_neon_vmaxv_u8((int8x8_t)__p0); | 48333 | __ret = (uint8_t) __builtin_neon_vmaxv_u8(__p0); |
| 57045 | return __ret; | 48334 | return __ret; |
| 57046 | } | 48335 | } |
| 57047 | #else | 48336 | #else |
| 57048 | __ai uint8_t vmaxv_u8(uint8x8_t __p0) { | 48337 | __ai uint8_t vmaxv_u8(uint8x8_t __p0) { |
| 57049 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48338 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57050 | uint8_t __ret; | 48339 | uint8_t __ret; |
| 57051 | __ret = (uint8_t) __builtin_neon_vmaxv_u8((int8x8_t)__rev0); | 48340 | __ret = (uint8_t) __builtin_neon_vmaxv_u8(__rev0); |
| 57052 | return __ret; | 48341 | return __ret; |
| 57053 | } | 48342 | } |
| 57054 | #endif | 48343 | #endif |
| ... | @@ -57056,14 +48345,14 @@ __ai uint8_t vmaxv_u8(uint8x8_t __p0) { | ... | @@ -57056,14 +48345,14 @@ __ai uint8_t vmaxv_u8(uint8x8_t __p0) { |
| 57056 | #ifdef __LITTLE_ENDIAN__ | 48345 | #ifdef __LITTLE_ENDIAN__ |
| 57057 | __ai uint32_t vmaxv_u32(uint32x2_t __p0) { | 48346 | __ai uint32_t vmaxv_u32(uint32x2_t __p0) { |
| 57058 | uint32_t __ret; | 48347 | uint32_t __ret; |
| 57059 | __ret = (uint32_t) __builtin_neon_vmaxv_u32((int8x8_t)__p0); | 48348 | __ret = (uint32_t) __builtin_neon_vmaxv_u32(__p0); |
| 57060 | return __ret; | 48349 | return __ret; |
| 57061 | } | 48350 | } |
| 57062 | #else | 48351 | #else |
| 57063 | __ai uint32_t vmaxv_u32(uint32x2_t __p0) { | 48352 | __ai uint32_t vmaxv_u32(uint32x2_t __p0) { |
| 57064 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48353 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57065 | uint32_t __ret; | 48354 | uint32_t __ret; |
| 57066 | __ret = (uint32_t) __builtin_neon_vmaxv_u32((int8x8_t)__rev0); | 48355 | __ret = (uint32_t) __builtin_neon_vmaxv_u32(__rev0); |
| 57067 | return __ret; | 48356 | return __ret; |
| 57068 | } | 48357 | } |
| 57069 | #endif | 48358 | #endif |
| ... | @@ -57071,14 +48360,14 @@ __ai uint32_t vmaxv_u32(uint32x2_t __p0) { | ... | @@ -57071,14 +48360,14 @@ __ai uint32_t vmaxv_u32(uint32x2_t __p0) { |
| 57071 | #ifdef __LITTLE_ENDIAN__ | 48360 | #ifdef __LITTLE_ENDIAN__ |
| 57072 | __ai uint16_t vmaxv_u16(uint16x4_t __p0) { | 48361 | __ai uint16_t vmaxv_u16(uint16x4_t __p0) { |
| 57073 | uint16_t __ret; | 48362 | uint16_t __ret; |
| 57074 | __ret = (uint16_t) __builtin_neon_vmaxv_u16((int8x8_t)__p0); | 48363 | __ret = (uint16_t) __builtin_neon_vmaxv_u16(__p0); |
| 57075 | return __ret; | 48364 | return __ret; |
| 57076 | } | 48365 | } |
| 57077 | #else | 48366 | #else |
| 57078 | __ai uint16_t vmaxv_u16(uint16x4_t __p0) { | 48367 | __ai uint16_t vmaxv_u16(uint16x4_t __p0) { |
| 57079 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48368 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57080 | uint16_t __ret; | 48369 | uint16_t __ret; |
| 57081 | __ret = (uint16_t) __builtin_neon_vmaxv_u16((int8x8_t)__rev0); | 48370 | __ret = (uint16_t) __builtin_neon_vmaxv_u16(__rev0); |
| 57082 | return __ret; | 48371 | return __ret; |
| 57083 | } | 48372 | } |
| 57084 | #endif | 48373 | #endif |
| ... | @@ -57086,14 +48375,14 @@ __ai uint16_t vmaxv_u16(uint16x4_t __p0) { | ... | @@ -57086,14 +48375,14 @@ __ai uint16_t vmaxv_u16(uint16x4_t __p0) { |
| 57086 | #ifdef __LITTLE_ENDIAN__ | 48375 | #ifdef __LITTLE_ENDIAN__ |
| 57087 | __ai int8_t vmaxv_s8(int8x8_t __p0) { | 48376 | __ai int8_t vmaxv_s8(int8x8_t __p0) { |
| 57088 | int8_t __ret; | 48377 | int8_t __ret; |
| 57089 | __ret = (int8_t) __builtin_neon_vmaxv_s8((int8x8_t)__p0); | 48378 | __ret = (int8_t) __builtin_neon_vmaxv_s8(__p0); |
| 57090 | return __ret; | 48379 | return __ret; |
| 57091 | } | 48380 | } |
| 57092 | #else | 48381 | #else |
| 57093 | __ai int8_t vmaxv_s8(int8x8_t __p0) { | 48382 | __ai int8_t vmaxv_s8(int8x8_t __p0) { |
| 57094 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48383 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57095 | int8_t __ret; | 48384 | int8_t __ret; |
| 57096 | __ret = (int8_t) __builtin_neon_vmaxv_s8((int8x8_t)__rev0); | 48385 | __ret = (int8_t) __builtin_neon_vmaxv_s8(__rev0); |
| 57097 | return __ret; | 48386 | return __ret; |
| 57098 | } | 48387 | } |
| 57099 | #endif | 48388 | #endif |
| ... | @@ -57101,14 +48390,14 @@ __ai int8_t vmaxv_s8(int8x8_t __p0) { | ... | @@ -57101,14 +48390,14 @@ __ai int8_t vmaxv_s8(int8x8_t __p0) { |
| 57101 | #ifdef __LITTLE_ENDIAN__ | 48390 | #ifdef __LITTLE_ENDIAN__ |
| 57102 | __ai float32_t vmaxv_f32(float32x2_t __p0) { | 48391 | __ai float32_t vmaxv_f32(float32x2_t __p0) { |
| 57103 | float32_t __ret; | 48392 | float32_t __ret; |
| 57104 | __ret = (float32_t) __builtin_neon_vmaxv_f32((int8x8_t)__p0); | 48393 | __ret = (float32_t) __builtin_neon_vmaxv_f32(__p0); |
| 57105 | return __ret; | 48394 | return __ret; |
| 57106 | } | 48395 | } |
| 57107 | #else | 48396 | #else |
| 57108 | __ai float32_t vmaxv_f32(float32x2_t __p0) { | 48397 | __ai float32_t vmaxv_f32(float32x2_t __p0) { |
| 57109 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48398 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57110 | float32_t __ret; | 48399 | float32_t __ret; |
| 57111 | __ret = (float32_t) __builtin_neon_vmaxv_f32((int8x8_t)__rev0); | 48400 | __ret = (float32_t) __builtin_neon_vmaxv_f32(__rev0); |
| 57112 | return __ret; | 48401 | return __ret; |
| 57113 | } | 48402 | } |
| 57114 | #endif | 48403 | #endif |
| ... | @@ -57116,14 +48405,14 @@ __ai float32_t vmaxv_f32(float32x2_t __p0) { | ... | @@ -57116,14 +48405,14 @@ __ai float32_t vmaxv_f32(float32x2_t __p0) { |
| 57116 | #ifdef __LITTLE_ENDIAN__ | 48405 | #ifdef __LITTLE_ENDIAN__ |
| 57117 | __ai int32_t vmaxv_s32(int32x2_t __p0) { | 48406 | __ai int32_t vmaxv_s32(int32x2_t __p0) { |
| 57118 | int32_t __ret; | 48407 | int32_t __ret; |
| 57119 | __ret = (int32_t) __builtin_neon_vmaxv_s32((int8x8_t)__p0); | 48408 | __ret = (int32_t) __builtin_neon_vmaxv_s32(__p0); |
| 57120 | return __ret; | 48409 | return __ret; |
| 57121 | } | 48410 | } |
| 57122 | #else | 48411 | #else |
| 57123 | __ai int32_t vmaxv_s32(int32x2_t __p0) { | 48412 | __ai int32_t vmaxv_s32(int32x2_t __p0) { |
| 57124 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48413 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57125 | int32_t __ret; | 48414 | int32_t __ret; |
| 57126 | __ret = (int32_t) __builtin_neon_vmaxv_s32((int8x8_t)__rev0); | 48415 | __ret = (int32_t) __builtin_neon_vmaxv_s32(__rev0); |
| 57127 | return __ret; | 48416 | return __ret; |
| 57128 | } | 48417 | } |
| 57129 | #endif | 48418 | #endif |
| ... | @@ -57131,14 +48420,14 @@ __ai int32_t vmaxv_s32(int32x2_t __p0) { | ... | @@ -57131,14 +48420,14 @@ __ai int32_t vmaxv_s32(int32x2_t __p0) { |
| 57131 | #ifdef __LITTLE_ENDIAN__ | 48420 | #ifdef __LITTLE_ENDIAN__ |
| 57132 | __ai int16_t vmaxv_s16(int16x4_t __p0) { | 48421 | __ai int16_t vmaxv_s16(int16x4_t __p0) { |
| 57133 | int16_t __ret; | 48422 | int16_t __ret; |
| 57134 | __ret = (int16_t) __builtin_neon_vmaxv_s16((int8x8_t)__p0); | 48423 | __ret = (int16_t) __builtin_neon_vmaxv_s16(__p0); |
| 57135 | return __ret; | 48424 | return __ret; |
| 57136 | } | 48425 | } |
| 57137 | #else | 48426 | #else |
| 57138 | __ai int16_t vmaxv_s16(int16x4_t __p0) { | 48427 | __ai int16_t vmaxv_s16(int16x4_t __p0) { |
| 57139 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48428 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57140 | int16_t __ret; | 48429 | int16_t __ret; |
| 57141 | __ret = (int16_t) __builtin_neon_vmaxv_s16((int8x8_t)__rev0); | 48430 | __ret = (int16_t) __builtin_neon_vmaxv_s16(__rev0); |
| 57142 | return __ret; | 48431 | return __ret; |
| 57143 | } | 48432 | } |
| 57144 | #endif | 48433 | #endif |
| ... | @@ -57160,31 +48449,22 @@ __ai float64x2_t vminq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -57160,31 +48449,22 @@ __ai float64x2_t vminq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 57160 | } | 48449 | } |
| 57161 | #endif | 48450 | #endif |
| 57162 | | 48451 | |
| 57163 | #ifdef __LITTLE_ENDIAN__ | | |
| 57164 | __ai float64x1_t vmin_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 57165 | float64x1_t __ret; | | |
| 57166 | __ret = (float64x1_t) __builtin_neon_vmin_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 57167 | return __ret; | | |
| 57168 | } | | |
| 57169 | #else | | |
| 57170 | __ai float64x1_t vmin_f64(float64x1_t __p0, float64x1_t __p1) { | 48452 | __ai float64x1_t vmin_f64(float64x1_t __p0, float64x1_t __p1) { |
| 57171 | float64x1_t __ret; | 48453 | float64x1_t __ret; |
| 57172 | __ret = (float64x1_t) __builtin_neon_vmin_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 48454 | __ret = (float64x1_t) __builtin_neon_vmin_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 57173 | return __ret; | 48455 | return __ret; |
| 57174 | } | 48456 | } |
| 57175 | #endif | | |
| 57176 | | | |
| 57177 | #ifdef __LITTLE_ENDIAN__ | 48457 | #ifdef __LITTLE_ENDIAN__ |
| 57178 | __ai float64_t vminnmvq_f64(float64x2_t __p0) { | 48458 | __ai float64_t vminnmvq_f64(float64x2_t __p0) { |
| 57179 | float64_t __ret; | 48459 | float64_t __ret; |
| 57180 | __ret = (float64_t) __builtin_neon_vminnmvq_f64((int8x16_t)__p0); | 48460 | __ret = (float64_t) __builtin_neon_vminnmvq_f64(__p0); |
| 57181 | return __ret; | 48461 | return __ret; |
| 57182 | } | 48462 | } |
| 57183 | #else | 48463 | #else |
| 57184 | __ai float64_t vminnmvq_f64(float64x2_t __p0) { | 48464 | __ai float64_t vminnmvq_f64(float64x2_t __p0) { |
| 57185 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48465 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57186 | float64_t __ret; | 48466 | float64_t __ret; |
| 57187 | __ret = (float64_t) __builtin_neon_vminnmvq_f64((int8x16_t)__rev0); | 48467 | __ret = (float64_t) __builtin_neon_vminnmvq_f64(__rev0); |
| 57188 | return __ret; | 48468 | return __ret; |
| 57189 | } | 48469 | } |
| 57190 | #endif | 48470 | #endif |
| ... | @@ -57192,14 +48472,14 @@ __ai float64_t vminnmvq_f64(float64x2_t __p0) { | ... | @@ -57192,14 +48472,14 @@ __ai float64_t vminnmvq_f64(float64x2_t __p0) { |
| 57192 | #ifdef __LITTLE_ENDIAN__ | 48472 | #ifdef __LITTLE_ENDIAN__ |
| 57193 | __ai float32_t vminnmvq_f32(float32x4_t __p0) { | 48473 | __ai float32_t vminnmvq_f32(float32x4_t __p0) { |
| 57194 | float32_t __ret; | 48474 | float32_t __ret; |
| 57195 | __ret = (float32_t) __builtin_neon_vminnmvq_f32((int8x16_t)__p0); | 48475 | __ret = (float32_t) __builtin_neon_vminnmvq_f32(__p0); |
| 57196 | return __ret; | 48476 | return __ret; |
| 57197 | } | 48477 | } |
| 57198 | #else | 48478 | #else |
| 57199 | __ai float32_t vminnmvq_f32(float32x4_t __p0) { | 48479 | __ai float32_t vminnmvq_f32(float32x4_t __p0) { |
| 57200 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48480 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57201 | float32_t __ret; | 48481 | float32_t __ret; |
| 57202 | __ret = (float32_t) __builtin_neon_vminnmvq_f32((int8x16_t)__rev0); | 48482 | __ret = (float32_t) __builtin_neon_vminnmvq_f32(__rev0); |
| 57203 | return __ret; | 48483 | return __ret; |
| 57204 | } | 48484 | } |
| 57205 | #endif | 48485 | #endif |
| ... | @@ -57207,14 +48487,14 @@ __ai float32_t vminnmvq_f32(float32x4_t __p0) { | ... | @@ -57207,14 +48487,14 @@ __ai float32_t vminnmvq_f32(float32x4_t __p0) { |
| 57207 | #ifdef __LITTLE_ENDIAN__ | 48487 | #ifdef __LITTLE_ENDIAN__ |
| 57208 | __ai float32_t vminnmv_f32(float32x2_t __p0) { | 48488 | __ai float32_t vminnmv_f32(float32x2_t __p0) { |
| 57209 | float32_t __ret; | 48489 | float32_t __ret; |
| 57210 | __ret = (float32_t) __builtin_neon_vminnmv_f32((int8x8_t)__p0); | 48490 | __ret = (float32_t) __builtin_neon_vminnmv_f32(__p0); |
| 57211 | return __ret; | 48491 | return __ret; |
| 57212 | } | 48492 | } |
| 57213 | #else | 48493 | #else |
| 57214 | __ai float32_t vminnmv_f32(float32x2_t __p0) { | 48494 | __ai float32_t vminnmv_f32(float32x2_t __p0) { |
| 57215 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48495 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57216 | float32_t __ret; | 48496 | float32_t __ret; |
| 57217 | __ret = (float32_t) __builtin_neon_vminnmv_f32((int8x8_t)__rev0); | 48497 | __ret = (float32_t) __builtin_neon_vminnmv_f32(__rev0); |
| 57218 | return __ret; | 48498 | return __ret; |
| 57219 | } | 48499 | } |
| 57220 | #endif | 48500 | #endif |
| ... | @@ -57222,14 +48502,14 @@ __ai float32_t vminnmv_f32(float32x2_t __p0) { | ... | @@ -57222,14 +48502,14 @@ __ai float32_t vminnmv_f32(float32x2_t __p0) { |
| 57222 | #ifdef __LITTLE_ENDIAN__ | 48502 | #ifdef __LITTLE_ENDIAN__ |
| 57223 | __ai uint8_t vminvq_u8(uint8x16_t __p0) { | 48503 | __ai uint8_t vminvq_u8(uint8x16_t __p0) { |
| 57224 | uint8_t __ret; | 48504 | uint8_t __ret; |
| 57225 | __ret = (uint8_t) __builtin_neon_vminvq_u8((int8x16_t)__p0); | 48505 | __ret = (uint8_t) __builtin_neon_vminvq_u8(__p0); |
| 57226 | return __ret; | 48506 | return __ret; |
| 57227 | } | 48507 | } |
| 57228 | #else | 48508 | #else |
| 57229 | __ai uint8_t vminvq_u8(uint8x16_t __p0) { | 48509 | __ai uint8_t vminvq_u8(uint8x16_t __p0) { |
| 57230 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48510 | uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57231 | uint8_t __ret; | 48511 | uint8_t __ret; |
| 57232 | __ret = (uint8_t) __builtin_neon_vminvq_u8((int8x16_t)__rev0); | 48512 | __ret = (uint8_t) __builtin_neon_vminvq_u8(__rev0); |
| 57233 | return __ret; | 48513 | return __ret; |
| 57234 | } | 48514 | } |
| 57235 | #endif | 48515 | #endif |
| ... | @@ -57237,14 +48517,14 @@ __ai uint8_t vminvq_u8(uint8x16_t __p0) { | ... | @@ -57237,14 +48517,14 @@ __ai uint8_t vminvq_u8(uint8x16_t __p0) { |
| 57237 | #ifdef __LITTLE_ENDIAN__ | 48517 | #ifdef __LITTLE_ENDIAN__ |
| 57238 | __ai uint32_t vminvq_u32(uint32x4_t __p0) { | 48518 | __ai uint32_t vminvq_u32(uint32x4_t __p0) { |
| 57239 | uint32_t __ret; | 48519 | uint32_t __ret; |
| 57240 | __ret = (uint32_t) __builtin_neon_vminvq_u32((int8x16_t)__p0); | 48520 | __ret = (uint32_t) __builtin_neon_vminvq_u32(__p0); |
| 57241 | return __ret; | 48521 | return __ret; |
| 57242 | } | 48522 | } |
| 57243 | #else | 48523 | #else |
| 57244 | __ai uint32_t vminvq_u32(uint32x4_t __p0) { | 48524 | __ai uint32_t vminvq_u32(uint32x4_t __p0) { |
| 57245 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48525 | uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57246 | uint32_t __ret; | 48526 | uint32_t __ret; |
| 57247 | __ret = (uint32_t) __builtin_neon_vminvq_u32((int8x16_t)__rev0); | 48527 | __ret = (uint32_t) __builtin_neon_vminvq_u32(__rev0); |
| 57248 | return __ret; | 48528 | return __ret; |
| 57249 | } | 48529 | } |
| 57250 | #endif | 48530 | #endif |
| ... | @@ -57252,14 +48532,14 @@ __ai uint32_t vminvq_u32(uint32x4_t __p0) { | ... | @@ -57252,14 +48532,14 @@ __ai uint32_t vminvq_u32(uint32x4_t __p0) { |
| 57252 | #ifdef __LITTLE_ENDIAN__ | 48532 | #ifdef __LITTLE_ENDIAN__ |
| 57253 | __ai uint16_t vminvq_u16(uint16x8_t __p0) { | 48533 | __ai uint16_t vminvq_u16(uint16x8_t __p0) { |
| 57254 | uint16_t __ret; | 48534 | uint16_t __ret; |
| 57255 | __ret = (uint16_t) __builtin_neon_vminvq_u16((int8x16_t)__p0); | 48535 | __ret = (uint16_t) __builtin_neon_vminvq_u16(__p0); |
| 57256 | return __ret; | 48536 | return __ret; |
| 57257 | } | 48537 | } |
| 57258 | #else | 48538 | #else |
| 57259 | __ai uint16_t vminvq_u16(uint16x8_t __p0) { | 48539 | __ai uint16_t vminvq_u16(uint16x8_t __p0) { |
| 57260 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48540 | uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57261 | uint16_t __ret; | 48541 | uint16_t __ret; |
| 57262 | __ret = (uint16_t) __builtin_neon_vminvq_u16((int8x16_t)__rev0); | 48542 | __ret = (uint16_t) __builtin_neon_vminvq_u16(__rev0); |
| 57263 | return __ret; | 48543 | return __ret; |
| 57264 | } | 48544 | } |
| 57265 | #endif | 48545 | #endif |
| ... | @@ -57267,14 +48547,14 @@ __ai uint16_t vminvq_u16(uint16x8_t __p0) { | ... | @@ -57267,14 +48547,14 @@ __ai uint16_t vminvq_u16(uint16x8_t __p0) { |
| 57267 | #ifdef __LITTLE_ENDIAN__ | 48547 | #ifdef __LITTLE_ENDIAN__ |
| 57268 | __ai int8_t vminvq_s8(int8x16_t __p0) { | 48548 | __ai int8_t vminvq_s8(int8x16_t __p0) { |
| 57269 | int8_t __ret; | 48549 | int8_t __ret; |
| 57270 | __ret = (int8_t) __builtin_neon_vminvq_s8((int8x16_t)__p0); | 48550 | __ret = (int8_t) __builtin_neon_vminvq_s8(__p0); |
| 57271 | return __ret; | 48551 | return __ret; |
| 57272 | } | 48552 | } |
| 57273 | #else | 48553 | #else |
| 57274 | __ai int8_t vminvq_s8(int8x16_t __p0) { | 48554 | __ai int8_t vminvq_s8(int8x16_t __p0) { |
| 57275 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 48555 | int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57276 | int8_t __ret; | 48556 | int8_t __ret; |
| 57277 | __ret = (int8_t) __builtin_neon_vminvq_s8((int8x16_t)__rev0); | 48557 | __ret = (int8_t) __builtin_neon_vminvq_s8(__rev0); |
| 57278 | return __ret; | 48558 | return __ret; |
| 57279 | } | 48559 | } |
| 57280 | #endif | 48560 | #endif |
| ... | @@ -57282,14 +48562,14 @@ __ai int8_t vminvq_s8(int8x16_t __p0) { | ... | @@ -57282,14 +48562,14 @@ __ai int8_t vminvq_s8(int8x16_t __p0) { |
| 57282 | #ifdef __LITTLE_ENDIAN__ | 48562 | #ifdef __LITTLE_ENDIAN__ |
| 57283 | __ai float64_t vminvq_f64(float64x2_t __p0) { | 48563 | __ai float64_t vminvq_f64(float64x2_t __p0) { |
| 57284 | float64_t __ret; | 48564 | float64_t __ret; |
| 57285 | __ret = (float64_t) __builtin_neon_vminvq_f64((int8x16_t)__p0); | 48565 | __ret = (float64_t) __builtin_neon_vminvq_f64(__p0); |
| 57286 | return __ret; | 48566 | return __ret; |
| 57287 | } | 48567 | } |
| 57288 | #else | 48568 | #else |
| 57289 | __ai float64_t vminvq_f64(float64x2_t __p0) { | 48569 | __ai float64_t vminvq_f64(float64x2_t __p0) { |
| 57290 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48570 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57291 | float64_t __ret; | 48571 | float64_t __ret; |
| 57292 | __ret = (float64_t) __builtin_neon_vminvq_f64((int8x16_t)__rev0); | 48572 | __ret = (float64_t) __builtin_neon_vminvq_f64(__rev0); |
| 57293 | return __ret; | 48573 | return __ret; |
| 57294 | } | 48574 | } |
| 57295 | #endif | 48575 | #endif |
| ... | @@ -57297,14 +48577,14 @@ __ai float64_t vminvq_f64(float64x2_t __p0) { | ... | @@ -57297,14 +48577,14 @@ __ai float64_t vminvq_f64(float64x2_t __p0) { |
| 57297 | #ifdef __LITTLE_ENDIAN__ | 48577 | #ifdef __LITTLE_ENDIAN__ |
| 57298 | __ai float32_t vminvq_f32(float32x4_t __p0) { | 48578 | __ai float32_t vminvq_f32(float32x4_t __p0) { |
| 57299 | float32_t __ret; | 48579 | float32_t __ret; |
| 57300 | __ret = (float32_t) __builtin_neon_vminvq_f32((int8x16_t)__p0); | 48580 | __ret = (float32_t) __builtin_neon_vminvq_f32(__p0); |
| 57301 | return __ret; | 48581 | return __ret; |
| 57302 | } | 48582 | } |
| 57303 | #else | 48583 | #else |
| 57304 | __ai float32_t vminvq_f32(float32x4_t __p0) { | 48584 | __ai float32_t vminvq_f32(float32x4_t __p0) { |
| 57305 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48585 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57306 | float32_t __ret; | 48586 | float32_t __ret; |
| 57307 | __ret = (float32_t) __builtin_neon_vminvq_f32((int8x16_t)__rev0); | 48587 | __ret = (float32_t) __builtin_neon_vminvq_f32(__rev0); |
| 57308 | return __ret; | 48588 | return __ret; |
| 57309 | } | 48589 | } |
| 57310 | #endif | 48590 | #endif |
| ... | @@ -57312,14 +48592,14 @@ __ai float32_t vminvq_f32(float32x4_t __p0) { | ... | @@ -57312,14 +48592,14 @@ __ai float32_t vminvq_f32(float32x4_t __p0) { |
| 57312 | #ifdef __LITTLE_ENDIAN__ | 48592 | #ifdef __LITTLE_ENDIAN__ |
| 57313 | __ai int32_t vminvq_s32(int32x4_t __p0) { | 48593 | __ai int32_t vminvq_s32(int32x4_t __p0) { |
| 57314 | int32_t __ret; | 48594 | int32_t __ret; |
| 57315 | __ret = (int32_t) __builtin_neon_vminvq_s32((int8x16_t)__p0); | 48595 | __ret = (int32_t) __builtin_neon_vminvq_s32(__p0); |
| 57316 | return __ret; | 48596 | return __ret; |
| 57317 | } | 48597 | } |
| 57318 | #else | 48598 | #else |
| 57319 | __ai int32_t vminvq_s32(int32x4_t __p0) { | 48599 | __ai int32_t vminvq_s32(int32x4_t __p0) { |
| 57320 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48600 | int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57321 | int32_t __ret; | 48601 | int32_t __ret; |
| 57322 | __ret = (int32_t) __builtin_neon_vminvq_s32((int8x16_t)__rev0); | 48602 | __ret = (int32_t) __builtin_neon_vminvq_s32(__rev0); |
| 57323 | return __ret; | 48603 | return __ret; |
| 57324 | } | 48604 | } |
| 57325 | #endif | 48605 | #endif |
| ... | @@ -57327,14 +48607,14 @@ __ai int32_t vminvq_s32(int32x4_t __p0) { | ... | @@ -57327,14 +48607,14 @@ __ai int32_t vminvq_s32(int32x4_t __p0) { |
| 57327 | #ifdef __LITTLE_ENDIAN__ | 48607 | #ifdef __LITTLE_ENDIAN__ |
| 57328 | __ai int16_t vminvq_s16(int16x8_t __p0) { | 48608 | __ai int16_t vminvq_s16(int16x8_t __p0) { |
| 57329 | int16_t __ret; | 48609 | int16_t __ret; |
| 57330 | __ret = (int16_t) __builtin_neon_vminvq_s16((int8x16_t)__p0); | 48610 | __ret = (int16_t) __builtin_neon_vminvq_s16(__p0); |
| 57331 | return __ret; | 48611 | return __ret; |
| 57332 | } | 48612 | } |
| 57333 | #else | 48613 | #else |
| 57334 | __ai int16_t vminvq_s16(int16x8_t __p0) { | 48614 | __ai int16_t vminvq_s16(int16x8_t __p0) { |
| 57335 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48615 | int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57336 | int16_t __ret; | 48616 | int16_t __ret; |
| 57337 | __ret = (int16_t) __builtin_neon_vminvq_s16((int8x16_t)__rev0); | 48617 | __ret = (int16_t) __builtin_neon_vminvq_s16(__rev0); |
| 57338 | return __ret; | 48618 | return __ret; |
| 57339 | } | 48619 | } |
| 57340 | #endif | 48620 | #endif |
| ... | @@ -57342,14 +48622,14 @@ __ai int16_t vminvq_s16(int16x8_t __p0) { | ... | @@ -57342,14 +48622,14 @@ __ai int16_t vminvq_s16(int16x8_t __p0) { |
| 57342 | #ifdef __LITTLE_ENDIAN__ | 48622 | #ifdef __LITTLE_ENDIAN__ |
| 57343 | __ai uint8_t vminv_u8(uint8x8_t __p0) { | 48623 | __ai uint8_t vminv_u8(uint8x8_t __p0) { |
| 57344 | uint8_t __ret; | 48624 | uint8_t __ret; |
| 57345 | __ret = (uint8_t) __builtin_neon_vminv_u8((int8x8_t)__p0); | 48625 | __ret = (uint8_t) __builtin_neon_vminv_u8(__p0); |
| 57346 | return __ret; | 48626 | return __ret; |
| 57347 | } | 48627 | } |
| 57348 | #else | 48628 | #else |
| 57349 | __ai uint8_t vminv_u8(uint8x8_t __p0) { | 48629 | __ai uint8_t vminv_u8(uint8x8_t __p0) { |
| 57350 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48630 | uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57351 | uint8_t __ret; | 48631 | uint8_t __ret; |
| 57352 | __ret = (uint8_t) __builtin_neon_vminv_u8((int8x8_t)__rev0); | 48632 | __ret = (uint8_t) __builtin_neon_vminv_u8(__rev0); |
| 57353 | return __ret; | 48633 | return __ret; |
| 57354 | } | 48634 | } |
| 57355 | #endif | 48635 | #endif |
| ... | @@ -57357,14 +48637,14 @@ __ai uint8_t vminv_u8(uint8x8_t __p0) { | ... | @@ -57357,14 +48637,14 @@ __ai uint8_t vminv_u8(uint8x8_t __p0) { |
| 57357 | #ifdef __LITTLE_ENDIAN__ | 48637 | #ifdef __LITTLE_ENDIAN__ |
| 57358 | __ai uint32_t vminv_u32(uint32x2_t __p0) { | 48638 | __ai uint32_t vminv_u32(uint32x2_t __p0) { |
| 57359 | uint32_t __ret; | 48639 | uint32_t __ret; |
| 57360 | __ret = (uint32_t) __builtin_neon_vminv_u32((int8x8_t)__p0); | 48640 | __ret = (uint32_t) __builtin_neon_vminv_u32(__p0); |
| 57361 | return __ret; | 48641 | return __ret; |
| 57362 | } | 48642 | } |
| 57363 | #else | 48643 | #else |
| 57364 | __ai uint32_t vminv_u32(uint32x2_t __p0) { | 48644 | __ai uint32_t vminv_u32(uint32x2_t __p0) { |
| 57365 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48645 | uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57366 | uint32_t __ret; | 48646 | uint32_t __ret; |
| 57367 | __ret = (uint32_t) __builtin_neon_vminv_u32((int8x8_t)__rev0); | 48647 | __ret = (uint32_t) __builtin_neon_vminv_u32(__rev0); |
| 57368 | return __ret; | 48648 | return __ret; |
| 57369 | } | 48649 | } |
| 57370 | #endif | 48650 | #endif |
| ... | @@ -57372,14 +48652,14 @@ __ai uint32_t vminv_u32(uint32x2_t __p0) { | ... | @@ -57372,14 +48652,14 @@ __ai uint32_t vminv_u32(uint32x2_t __p0) { |
| 57372 | #ifdef __LITTLE_ENDIAN__ | 48652 | #ifdef __LITTLE_ENDIAN__ |
| 57373 | __ai uint16_t vminv_u16(uint16x4_t __p0) { | 48653 | __ai uint16_t vminv_u16(uint16x4_t __p0) { |
| 57374 | uint16_t __ret; | 48654 | uint16_t __ret; |
| 57375 | __ret = (uint16_t) __builtin_neon_vminv_u16((int8x8_t)__p0); | 48655 | __ret = (uint16_t) __builtin_neon_vminv_u16(__p0); |
| 57376 | return __ret; | 48656 | return __ret; |
| 57377 | } | 48657 | } |
| 57378 | #else | 48658 | #else |
| 57379 | __ai uint16_t vminv_u16(uint16x4_t __p0) { | 48659 | __ai uint16_t vminv_u16(uint16x4_t __p0) { |
| 57380 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48660 | uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57381 | uint16_t __ret; | 48661 | uint16_t __ret; |
| 57382 | __ret = (uint16_t) __builtin_neon_vminv_u16((int8x8_t)__rev0); | 48662 | __ret = (uint16_t) __builtin_neon_vminv_u16(__rev0); |
| 57383 | return __ret; | 48663 | return __ret; |
| 57384 | } | 48664 | } |
| 57385 | #endif | 48665 | #endif |
| ... | @@ -57387,14 +48667,14 @@ __ai uint16_t vminv_u16(uint16x4_t __p0) { | ... | @@ -57387,14 +48667,14 @@ __ai uint16_t vminv_u16(uint16x4_t __p0) { |
| 57387 | #ifdef __LITTLE_ENDIAN__ | 48667 | #ifdef __LITTLE_ENDIAN__ |
| 57388 | __ai int8_t vminv_s8(int8x8_t __p0) { | 48668 | __ai int8_t vminv_s8(int8x8_t __p0) { |
| 57389 | int8_t __ret; | 48669 | int8_t __ret; |
| 57390 | __ret = (int8_t) __builtin_neon_vminv_s8((int8x8_t)__p0); | 48670 | __ret = (int8_t) __builtin_neon_vminv_s8(__p0); |
| 57391 | return __ret; | 48671 | return __ret; |
| 57392 | } | 48672 | } |
| 57393 | #else | 48673 | #else |
| 57394 | __ai int8_t vminv_s8(int8x8_t __p0) { | 48674 | __ai int8_t vminv_s8(int8x8_t __p0) { |
| 57395 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); | 48675 | int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0); |
| 57396 | int8_t __ret; | 48676 | int8_t __ret; |
| 57397 | __ret = (int8_t) __builtin_neon_vminv_s8((int8x8_t)__rev0); | 48677 | __ret = (int8_t) __builtin_neon_vminv_s8(__rev0); |
| 57398 | return __ret; | 48678 | return __ret; |
| 57399 | } | 48679 | } |
| 57400 | #endif | 48680 | #endif |
| ... | @@ -57402,14 +48682,14 @@ __ai int8_t vminv_s8(int8x8_t __p0) { | ... | @@ -57402,14 +48682,14 @@ __ai int8_t vminv_s8(int8x8_t __p0) { |
| 57402 | #ifdef __LITTLE_ENDIAN__ | 48682 | #ifdef __LITTLE_ENDIAN__ |
| 57403 | __ai float32_t vminv_f32(float32x2_t __p0) { | 48683 | __ai float32_t vminv_f32(float32x2_t __p0) { |
| 57404 | float32_t __ret; | 48684 | float32_t __ret; |
| 57405 | __ret = (float32_t) __builtin_neon_vminv_f32((int8x8_t)__p0); | 48685 | __ret = (float32_t) __builtin_neon_vminv_f32(__p0); |
| 57406 | return __ret; | 48686 | return __ret; |
| 57407 | } | 48687 | } |
| 57408 | #else | 48688 | #else |
| 57409 | __ai float32_t vminv_f32(float32x2_t __p0) { | 48689 | __ai float32_t vminv_f32(float32x2_t __p0) { |
| 57410 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48690 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57411 | float32_t __ret; | 48691 | float32_t __ret; |
| 57412 | __ret = (float32_t) __builtin_neon_vminv_f32((int8x8_t)__rev0); | 48692 | __ret = (float32_t) __builtin_neon_vminv_f32(__rev0); |
| 57413 | return __ret; | 48693 | return __ret; |
| 57414 | } | 48694 | } |
| 57415 | #endif | 48695 | #endif |
| ... | @@ -57417,14 +48697,14 @@ __ai float32_t vminv_f32(float32x2_t __p0) { | ... | @@ -57417,14 +48697,14 @@ __ai float32_t vminv_f32(float32x2_t __p0) { |
| 57417 | #ifdef __LITTLE_ENDIAN__ | 48697 | #ifdef __LITTLE_ENDIAN__ |
| 57418 | __ai int32_t vminv_s32(int32x2_t __p0) { | 48698 | __ai int32_t vminv_s32(int32x2_t __p0) { |
| 57419 | int32_t __ret; | 48699 | int32_t __ret; |
| 57420 | __ret = (int32_t) __builtin_neon_vminv_s32((int8x8_t)__p0); | 48700 | __ret = (int32_t) __builtin_neon_vminv_s32(__p0); |
| 57421 | return __ret; | 48701 | return __ret; |
| 57422 | } | 48702 | } |
| 57423 | #else | 48703 | #else |
| 57424 | __ai int32_t vminv_s32(int32x2_t __p0) { | 48704 | __ai int32_t vminv_s32(int32x2_t __p0) { |
| 57425 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 48705 | int32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 57426 | int32_t __ret; | 48706 | int32_t __ret; |
| 57427 | __ret = (int32_t) __builtin_neon_vminv_s32((int8x8_t)__rev0); | 48707 | __ret = (int32_t) __builtin_neon_vminv_s32(__rev0); |
| 57428 | return __ret; | 48708 | return __ret; |
| 57429 | } | 48709 | } |
| 57430 | #endif | 48710 | #endif |
| ... | @@ -57432,14 +48712,14 @@ __ai int32_t vminv_s32(int32x2_t __p0) { | ... | @@ -57432,14 +48712,14 @@ __ai int32_t vminv_s32(int32x2_t __p0) { |
| 57432 | #ifdef __LITTLE_ENDIAN__ | 48712 | #ifdef __LITTLE_ENDIAN__ |
| 57433 | __ai int16_t vminv_s16(int16x4_t __p0) { | 48713 | __ai int16_t vminv_s16(int16x4_t __p0) { |
| 57434 | int16_t __ret; | 48714 | int16_t __ret; |
| 57435 | __ret = (int16_t) __builtin_neon_vminv_s16((int8x8_t)__p0); | 48715 | __ret = (int16_t) __builtin_neon_vminv_s16(__p0); |
| 57436 | return __ret; | 48716 | return __ret; |
| 57437 | } | 48717 | } |
| 57438 | #else | 48718 | #else |
| 57439 | __ai int16_t vminv_s16(int16x4_t __p0) { | 48719 | __ai int16_t vminv_s16(int16x4_t __p0) { |
| 57440 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); | 48720 | int16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 57441 | int16_t __ret; | 48721 | int16_t __ret; |
| 57442 | __ret = (int16_t) __builtin_neon_vminv_s16((int8x8_t)__rev0); | 48722 | __ret = (int16_t) __builtin_neon_vminv_s16(__rev0); |
| 57443 | return __ret; | 48723 | return __ret; |
| 57444 | } | 48724 | } |
| 57445 | #endif | 48725 | #endif |
| ... | @@ -57462,20 +48742,11 @@ __ai float64x2_t vmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) | ... | @@ -57462,20 +48742,11 @@ __ai float64x2_t vmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) |
| 57462 | } | 48742 | } |
| 57463 | #endif | 48743 | #endif |
| 57464 | | 48744 | |
| 57465 | #ifdef __LITTLE_ENDIAN__ | | |
| 57466 | __ai float64x1_t vmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 48745 | __ai float64x1_t vmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 57467 | float64x1_t __ret; | 48746 | float64x1_t __ret; |
| 57468 | __ret = __p0 + __p1 * __p2; | 48747 | __ret = __p0 + __p1 * __p2; |
| 57469 | return __ret; | 48748 | return __ret; |
| 57470 | } | 48749 | } |
| 57471 | #else | | |
| 57472 | __ai float64x1_t vmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | | |
| 57473 | float64x1_t __ret; | | |
| 57474 | __ret = __p0 + __p1 * __p2; | | |
| 57475 | return __ret; | | |
| 57476 | } | | |
| 57477 | #endif | | |
| 57478 | | | |
| 57479 | #ifdef __LITTLE_ENDIAN__ | 48750 | #ifdef __LITTLE_ENDIAN__ |
| 57480 | #define vmlaq_laneq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 48751 | #define vmlaq_laneq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 57481 | uint32x4_t __s0 = __p0; \ | 48752 | uint32x4_t __s0 = __p0; \ |
| ... | @@ -58039,20 +49310,11 @@ __ai float64x2_t vmlsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) | ... | @@ -58039,20 +49310,11 @@ __ai float64x2_t vmlsq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) |
| 58039 | } | 49310 | } |
| 58040 | #endif | 49311 | #endif |
| 58041 | | 49312 | |
| 58042 | #ifdef __LITTLE_ENDIAN__ | | |
| 58043 | __ai float64x1_t vmls_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | 49313 | __ai float64x1_t vmls_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| 58044 | float64x1_t __ret; | 49314 | float64x1_t __ret; |
| 58045 | __ret = __p0 - __p1 * __p2; | 49315 | __ret = __p0 - __p1 * __p2; |
| 58046 | return __ret; | 49316 | return __ret; |
| 58047 | } | 49317 | } |
| 58048 | #else | | |
| 58049 | __ai float64x1_t vmls_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { | | |
| 58050 | float64x1_t __ret; | | |
| 58051 | __ret = __p0 - __p1 * __p2; | | |
| 58052 | return __ret; | | |
| 58053 | } | | |
| 58054 | #endif | | |
| 58055 | | | |
| 58056 | #ifdef __LITTLE_ENDIAN__ | 49318 | #ifdef __LITTLE_ENDIAN__ |
| 58057 | #define vmlsq_laneq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ | 49319 | #define vmlsq_laneq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \ |
| 58058 | uint32x4_t __s0 = __p0; \ | 49320 | uint32x4_t __s0 = __p0; \ |
| ... | @@ -58598,20 +49860,11 @@ __ai float64x2_t vmlsq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) | ... | @@ -58598,20 +49860,11 @@ __ai float64x2_t vmlsq_n_f64(float64x2_t __p0, float64x2_t __p1, float64_t __p2) |
| 58598 | }) | 49860 | }) |
| 58599 | #endif | 49861 | #endif |
| 58600 | | 49862 | |
| 58601 | #ifdef __LITTLE_ENDIAN__ | | |
| 58602 | __ai poly64x1_t vmov_n_p64(poly64_t __p0) { | | |
| 58603 | poly64x1_t __ret; | | |
| 58604 | __ret = (poly64x1_t) {__p0}; | | |
| 58605 | return __ret; | | |
| 58606 | } | | |
| 58607 | #else | | |
| 58608 | __ai poly64x1_t vmov_n_p64(poly64_t __p0) { | 49863 | __ai poly64x1_t vmov_n_p64(poly64_t __p0) { |
| 58609 | poly64x1_t __ret; | 49864 | poly64x1_t __ret; |
| 58610 | __ret = (poly64x1_t) {__p0}; | 49865 | __ret = (poly64x1_t) {__p0}; |
| 58611 | return __ret; | 49866 | return __ret; |
| 58612 | } | 49867 | } |
| 58613 | #endif | | |
| 58614 | | | |
| 58615 | #ifdef __LITTLE_ENDIAN__ | 49868 | #ifdef __LITTLE_ENDIAN__ |
| 58616 | __ai poly64x2_t vmovq_n_p64(poly64_t __p0) { | 49869 | __ai poly64x2_t vmovq_n_p64(poly64_t __p0) { |
| 58617 | poly64x2_t __ret; | 49870 | poly64x2_t __ret; |
| ... | @@ -58642,161 +49895,152 @@ __ai float64x2_t vmovq_n_f64(float64_t __p0) { | ... | @@ -58642,161 +49895,152 @@ __ai float64x2_t vmovq_n_f64(float64_t __p0) { |
| 58642 | } | 49895 | } |
| 58643 | #endif | 49896 | #endif |
| 58644 | | 49897 | |
| 58645 | #ifdef __LITTLE_ENDIAN__ | | |
| 58646 | __ai float64x1_t vmov_n_f64(float64_t __p0) { | 49898 | __ai float64x1_t vmov_n_f64(float64_t __p0) { |
| 58647 | float64x1_t __ret; | 49899 | float64x1_t __ret; |
| 58648 | __ret = (float64x1_t) {__p0}; | 49900 | __ret = (float64x1_t) {__p0}; |
| 58649 | return __ret; | 49901 | return __ret; |
| 58650 | } | 49902 | } |
| 58651 | #else | | |
| 58652 | __ai float64x1_t vmov_n_f64(float64_t __p0) { | | |
| 58653 | float64x1_t __ret; | | |
| 58654 | __ret = (float64x1_t) {__p0}; | | |
| 58655 | return __ret; | | |
| 58656 | } | | |
| 58657 | #endif | | |
| 58658 | | | |
| 58659 | #ifdef __LITTLE_ENDIAN__ | 49903 | #ifdef __LITTLE_ENDIAN__ |
| 58660 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_124) { | 49904 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_120) { |
| 58661 | uint16x8_t __ret_124; | 49905 | uint16x8_t __ret_120; |
| 58662 | uint8x8_t __a1_124 = vget_high_u8(__p0_124); | 49906 | uint8x8_t __a1_120 = vget_high_u8(__p0_120); |
| 58663 | __ret_124 = (uint16x8_t)(vshll_n_u8(__a1_124, 0)); | 49907 | __ret_120 = (uint16x8_t)(vshll_n_u8(__a1_120, 0)); |
| 58664 | return __ret_124; | 49908 | return __ret_120; |
| 58665 | } | 49909 | } |
| 58666 | #else | 49910 | #else |
| 58667 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_125) { | 49911 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_121) { |
| 58668 | uint8x16_t __rev0_125; __rev0_125 = __builtin_shufflevector(__p0_125, __p0_125, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 49912 | uint8x16_t __rev0_121; __rev0_121 = __builtin_shufflevector(__p0_121, __p0_121, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58669 | uint16x8_t __ret_125; | 49913 | uint16x8_t __ret_121; |
| 58670 | uint8x8_t __a1_125 = __noswap_vget_high_u8(__rev0_125); | 49914 | uint8x8_t __a1_121 = __noswap_vget_high_u8(__rev0_121); |
| 58671 | __ret_125 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_125, 0)); | 49915 | __ret_121 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_121, 0)); |
| 58672 | __ret_125 = __builtin_shufflevector(__ret_125, __ret_125, 7, 6, 5, 4, 3, 2, 1, 0); | 49916 | __ret_121 = __builtin_shufflevector(__ret_121, __ret_121, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58673 | return __ret_125; | 49917 | return __ret_121; |
| 58674 | } | 49918 | } |
| 58675 | __ai uint16x8_t __noswap_vmovl_high_u8(uint8x16_t __p0_126) { | 49919 | __ai uint16x8_t __noswap_vmovl_high_u8(uint8x16_t __p0_122) { |
| 58676 | uint16x8_t __ret_126; | 49920 | uint16x8_t __ret_122; |
| 58677 | uint8x8_t __a1_126 = __noswap_vget_high_u8(__p0_126); | 49921 | uint8x8_t __a1_122 = __noswap_vget_high_u8(__p0_122); |
| 58678 | __ret_126 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_126, 0)); | 49922 | __ret_122 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_122, 0)); |
| 58679 | return __ret_126; | 49923 | return __ret_122; |
| 58680 | } | 49924 | } |
| 58681 | #endif | 49925 | #endif |
| 58682 | | 49926 | |
| 58683 | #ifdef __LITTLE_ENDIAN__ | 49927 | #ifdef __LITTLE_ENDIAN__ |
| 58684 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_127) { | 49928 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_123) { |
| 58685 | uint64x2_t __ret_127; | 49929 | uint64x2_t __ret_123; |
| 58686 | uint32x2_t __a1_127 = vget_high_u32(__p0_127); | 49930 | uint32x2_t __a1_123 = vget_high_u32(__p0_123); |
| 58687 | __ret_127 = (uint64x2_t)(vshll_n_u32(__a1_127, 0)); | 49931 | __ret_123 = (uint64x2_t)(vshll_n_u32(__a1_123, 0)); |
| 58688 | return __ret_127; | 49932 | return __ret_123; |
| 58689 | } | 49933 | } |
| 58690 | #else | 49934 | #else |
| 58691 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_128) { | 49935 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_124) { |
| 58692 | uint32x4_t __rev0_128; __rev0_128 = __builtin_shufflevector(__p0_128, __p0_128, 3, 2, 1, 0); | 49936 | uint32x4_t __rev0_124; __rev0_124 = __builtin_shufflevector(__p0_124, __p0_124, 3, 2, 1, 0); |
| 58693 | uint64x2_t __ret_128; | 49937 | uint64x2_t __ret_124; |
| 58694 | uint32x2_t __a1_128 = __noswap_vget_high_u32(__rev0_128); | 49938 | uint32x2_t __a1_124 = __noswap_vget_high_u32(__rev0_124); |
| 58695 | __ret_128 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_128, 0)); | 49939 | __ret_124 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_124, 0)); |
| 58696 | __ret_128 = __builtin_shufflevector(__ret_128, __ret_128, 1, 0); | 49940 | __ret_124 = __builtin_shufflevector(__ret_124, __ret_124, 1, 0); |
| 58697 | return __ret_128; | 49941 | return __ret_124; |
| 58698 | } | 49942 | } |
| 58699 | __ai uint64x2_t __noswap_vmovl_high_u32(uint32x4_t __p0_129) { | 49943 | __ai uint64x2_t __noswap_vmovl_high_u32(uint32x4_t __p0_125) { |
| 58700 | uint64x2_t __ret_129; | 49944 | uint64x2_t __ret_125; |
| 58701 | uint32x2_t __a1_129 = __noswap_vget_high_u32(__p0_129); | 49945 | uint32x2_t __a1_125 = __noswap_vget_high_u32(__p0_125); |
| 58702 | __ret_129 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_129, 0)); | 49946 | __ret_125 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_125, 0)); |
| 58703 | return __ret_129; | 49947 | return __ret_125; |
| 58704 | } | 49948 | } |
| 58705 | #endif | 49949 | #endif |
| 58706 | | 49950 | |
| 58707 | #ifdef __LITTLE_ENDIAN__ | 49951 | #ifdef __LITTLE_ENDIAN__ |
| 58708 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_130) { | 49952 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_126) { |
| 58709 | uint32x4_t __ret_130; | 49953 | uint32x4_t __ret_126; |
| 58710 | uint16x4_t __a1_130 = vget_high_u16(__p0_130); | 49954 | uint16x4_t __a1_126 = vget_high_u16(__p0_126); |
| 58711 | __ret_130 = (uint32x4_t)(vshll_n_u16(__a1_130, 0)); | 49955 | __ret_126 = (uint32x4_t)(vshll_n_u16(__a1_126, 0)); |
| 58712 | return __ret_130; | 49956 | return __ret_126; |
| 58713 | } | 49957 | } |
| 58714 | #else | 49958 | #else |
| 58715 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_131) { | 49959 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_127) { |
| 58716 | uint16x8_t __rev0_131; __rev0_131 = __builtin_shufflevector(__p0_131, __p0_131, 7, 6, 5, 4, 3, 2, 1, 0); | 49960 | uint16x8_t __rev0_127; __rev0_127 = __builtin_shufflevector(__p0_127, __p0_127, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58717 | uint32x4_t __ret_131; | 49961 | uint32x4_t __ret_127; |
| 58718 | uint16x4_t __a1_131 = __noswap_vget_high_u16(__rev0_131); | 49962 | uint16x4_t __a1_127 = __noswap_vget_high_u16(__rev0_127); |
| 58719 | __ret_131 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_131, 0)); | 49963 | __ret_127 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_127, 0)); |
| 58720 | __ret_131 = __builtin_shufflevector(__ret_131, __ret_131, 3, 2, 1, 0); | 49964 | __ret_127 = __builtin_shufflevector(__ret_127, __ret_127, 3, 2, 1, 0); |
| 58721 | return __ret_131; | 49965 | return __ret_127; |
| 58722 | } | 49966 | } |
| 58723 | __ai uint32x4_t __noswap_vmovl_high_u16(uint16x8_t __p0_132) { | 49967 | __ai uint32x4_t __noswap_vmovl_high_u16(uint16x8_t __p0_128) { |
| 58724 | uint32x4_t __ret_132; | 49968 | uint32x4_t __ret_128; |
| 58725 | uint16x4_t __a1_132 = __noswap_vget_high_u16(__p0_132); | 49969 | uint16x4_t __a1_128 = __noswap_vget_high_u16(__p0_128); |
| 58726 | __ret_132 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_132, 0)); | 49970 | __ret_128 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_128, 0)); |
| 58727 | return __ret_132; | 49971 | return __ret_128; |
| 58728 | } | 49972 | } |
| 58729 | #endif | 49973 | #endif |
| 58730 | | 49974 | |
| 58731 | #ifdef __LITTLE_ENDIAN__ | 49975 | #ifdef __LITTLE_ENDIAN__ |
| 58732 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_133) { | 49976 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_129) { |
| 58733 | int16x8_t __ret_133; | 49977 | int16x8_t __ret_129; |
| 58734 | int8x8_t __a1_133 = vget_high_s8(__p0_133); | 49978 | int8x8_t __a1_129 = vget_high_s8(__p0_129); |
| 58735 | __ret_133 = (int16x8_t)(vshll_n_s8(__a1_133, 0)); | 49979 | __ret_129 = (int16x8_t)(vshll_n_s8(__a1_129, 0)); |
| 58736 | return __ret_133; | 49980 | return __ret_129; |
| 58737 | } | 49981 | } |
| 58738 | #else | 49982 | #else |
| 58739 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_134) { | 49983 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_130) { |
| 58740 | int8x16_t __rev0_134; __rev0_134 = __builtin_shufflevector(__p0_134, __p0_134, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); | 49984 | int8x16_t __rev0_130; __rev0_130 = __builtin_shufflevector(__p0_130, __p0_130, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58741 | int16x8_t __ret_134; | 49985 | int16x8_t __ret_130; |
| 58742 | int8x8_t __a1_134 = __noswap_vget_high_s8(__rev0_134); | 49986 | int8x8_t __a1_130 = __noswap_vget_high_s8(__rev0_130); |
| 58743 | __ret_134 = (int16x8_t)(__noswap_vshll_n_s8(__a1_134, 0)); | 49987 | __ret_130 = (int16x8_t)(__noswap_vshll_n_s8(__a1_130, 0)); |
| 58744 | __ret_134 = __builtin_shufflevector(__ret_134, __ret_134, 7, 6, 5, 4, 3, 2, 1, 0); | 49988 | __ret_130 = __builtin_shufflevector(__ret_130, __ret_130, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58745 | return __ret_134; | 49989 | return __ret_130; |
| 58746 | } | 49990 | } |
| 58747 | __ai int16x8_t __noswap_vmovl_high_s8(int8x16_t __p0_135) { | 49991 | __ai int16x8_t __noswap_vmovl_high_s8(int8x16_t __p0_131) { |
| 58748 | int16x8_t __ret_135; | 49992 | int16x8_t __ret_131; |
| 58749 | int8x8_t __a1_135 = __noswap_vget_high_s8(__p0_135); | 49993 | int8x8_t __a1_131 = __noswap_vget_high_s8(__p0_131); |
| 58750 | __ret_135 = (int16x8_t)(__noswap_vshll_n_s8(__a1_135, 0)); | 49994 | __ret_131 = (int16x8_t)(__noswap_vshll_n_s8(__a1_131, 0)); |
| 58751 | return __ret_135; | 49995 | return __ret_131; |
| 58752 | } | 49996 | } |
| 58753 | #endif | 49997 | #endif |
| 58754 | | 49998 | |
| 58755 | #ifdef __LITTLE_ENDIAN__ | 49999 | #ifdef __LITTLE_ENDIAN__ |
| 58756 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_136) { | 50000 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_132) { |
| 58757 | int64x2_t __ret_136; | 50001 | int64x2_t __ret_132; |
| 58758 | int32x2_t __a1_136 = vget_high_s32(__p0_136); | 50002 | int32x2_t __a1_132 = vget_high_s32(__p0_132); |
| 58759 | __ret_136 = (int64x2_t)(vshll_n_s32(__a1_136, 0)); | 50003 | __ret_132 = (int64x2_t)(vshll_n_s32(__a1_132, 0)); |
| 58760 | return __ret_136; | 50004 | return __ret_132; |
| 58761 | } | 50005 | } |
| 58762 | #else | 50006 | #else |
| 58763 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_137) { | 50007 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_133) { |
| 58764 | int32x4_t __rev0_137; __rev0_137 = __builtin_shufflevector(__p0_137, __p0_137, 3, 2, 1, 0); | 50008 | int32x4_t __rev0_133; __rev0_133 = __builtin_shufflevector(__p0_133, __p0_133, 3, 2, 1, 0); |
| 58765 | int64x2_t __ret_137; | 50009 | int64x2_t __ret_133; |
| 58766 | int32x2_t __a1_137 = __noswap_vget_high_s32(__rev0_137); | 50010 | int32x2_t __a1_133 = __noswap_vget_high_s32(__rev0_133); |
| 58767 | __ret_137 = (int64x2_t)(__noswap_vshll_n_s32(__a1_137, 0)); | 50011 | __ret_133 = (int64x2_t)(__noswap_vshll_n_s32(__a1_133, 0)); |
| 58768 | __ret_137 = __builtin_shufflevector(__ret_137, __ret_137, 1, 0); | 50012 | __ret_133 = __builtin_shufflevector(__ret_133, __ret_133, 1, 0); |
| 58769 | return __ret_137; | 50013 | return __ret_133; |
| 58770 | } | 50014 | } |
| 58771 | __ai int64x2_t __noswap_vmovl_high_s32(int32x4_t __p0_138) { | 50015 | __ai int64x2_t __noswap_vmovl_high_s32(int32x4_t __p0_134) { |
| 58772 | int64x2_t __ret_138; | 50016 | int64x2_t __ret_134; |
| 58773 | int32x2_t __a1_138 = __noswap_vget_high_s32(__p0_138); | 50017 | int32x2_t __a1_134 = __noswap_vget_high_s32(__p0_134); |
| 58774 | __ret_138 = (int64x2_t)(__noswap_vshll_n_s32(__a1_138, 0)); | 50018 | __ret_134 = (int64x2_t)(__noswap_vshll_n_s32(__a1_134, 0)); |
| 58775 | return __ret_138; | 50019 | return __ret_134; |
| 58776 | } | 50020 | } |
| 58777 | #endif | 50021 | #endif |
| 58778 | | 50022 | |
| 58779 | #ifdef __LITTLE_ENDIAN__ | 50023 | #ifdef __LITTLE_ENDIAN__ |
| 58780 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_139) { | 50024 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_135) { |
| 58781 | int32x4_t __ret_139; | 50025 | int32x4_t __ret_135; |
| 58782 | int16x4_t __a1_139 = vget_high_s16(__p0_139); | 50026 | int16x4_t __a1_135 = vget_high_s16(__p0_135); |
| 58783 | __ret_139 = (int32x4_t)(vshll_n_s16(__a1_139, 0)); | 50027 | __ret_135 = (int32x4_t)(vshll_n_s16(__a1_135, 0)); |
| 58784 | return __ret_139; | 50028 | return __ret_135; |
| 58785 | } | 50029 | } |
| 58786 | #else | 50030 | #else |
| 58787 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_140) { | 50031 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_136) { |
| 58788 | int16x8_t __rev0_140; __rev0_140 = __builtin_shufflevector(__p0_140, __p0_140, 7, 6, 5, 4, 3, 2, 1, 0); | 50032 | int16x8_t __rev0_136; __rev0_136 = __builtin_shufflevector(__p0_136, __p0_136, 7, 6, 5, 4, 3, 2, 1, 0); |
| 58789 | int32x4_t __ret_140; | 50033 | int32x4_t __ret_136; |
| 58790 | int16x4_t __a1_140 = __noswap_vget_high_s16(__rev0_140); | 50034 | int16x4_t __a1_136 = __noswap_vget_high_s16(__rev0_136); |
| 58791 | __ret_140 = (int32x4_t)(__noswap_vshll_n_s16(__a1_140, 0)); | 50035 | __ret_136 = (int32x4_t)(__noswap_vshll_n_s16(__a1_136, 0)); |
| 58792 | __ret_140 = __builtin_shufflevector(__ret_140, __ret_140, 3, 2, 1, 0); | 50036 | __ret_136 = __builtin_shufflevector(__ret_136, __ret_136, 3, 2, 1, 0); |
| 58793 | return __ret_140; | 50037 | return __ret_136; |
| 58794 | } | 50038 | } |
| 58795 | __ai int32x4_t __noswap_vmovl_high_s16(int16x8_t __p0_141) { | 50039 | __ai int32x4_t __noswap_vmovl_high_s16(int16x8_t __p0_137) { |
| 58796 | int32x4_t __ret_141; | 50040 | int32x4_t __ret_137; |
| 58797 | int16x4_t __a1_141 = __noswap_vget_high_s16(__p0_141); | 50041 | int16x4_t __a1_137 = __noswap_vget_high_s16(__p0_137); |
| 58798 | __ret_141 = (int32x4_t)(__noswap_vshll_n_s16(__a1_141, 0)); | 50042 | __ret_137 = (int32x4_t)(__noswap_vshll_n_s16(__a1_137, 0)); |
| 58799 | return __ret_141; | 50043 | return __ret_137; |
| 58800 | } | 50044 | } |
| 58801 | #endif | 50045 | #endif |
| 58802 | | 50046 | |
| ... | @@ -58919,66 +50163,37 @@ __ai float64x2_t vmulq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -58919,66 +50163,37 @@ __ai float64x2_t vmulq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 58919 | } | 50163 | } |
| 58920 | #endif | 50164 | #endif |
| 58921 | | 50165 | |
| 58922 | #ifdef __LITTLE_ENDIAN__ | | |
| 58923 | __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { | 50166 | __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { |
| 58924 | float64x1_t __ret; | 50167 | float64x1_t __ret; |
| 58925 | __ret = __p0 * __p1; | 50168 | __ret = __p0 * __p1; |
| 58926 | return __ret; | 50169 | return __ret; |
| 58927 | } | 50170 | } |
| 58928 | #else | 50171 | #define vmuld_lane_f64(__p0_138, __p1_138, __p2_138) __extension__ ({ \ |
| 58929 | __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { | 50172 | float64_t __s0_138 = __p0_138; \ |
| 58930 | float64x1_t __ret; | 50173 | float64x1_t __s1_138 = __p1_138; \ |
| 58931 | __ret = __p0 * __p1; | 50174 | float64_t __ret_138; \ |
| 58932 | return __ret; | 50175 | __ret_138 = __s0_138 * vget_lane_f64(__s1_138, __p2_138); \ |
| 58933 | } | 50176 | __ret_138; \ |
| 58934 | #endif | | |
| 58935 | | | |
| 58936 | #ifdef __LITTLE_ENDIAN__ | | |
| 58937 | #define vmuld_lane_f64(__p0_142, __p1_142, __p2_142) __extension__ ({ \ | | |
| 58938 | float64_t __s0_142 = __p0_142; \ | | |
| 58939 | float64x1_t __s1_142 = __p1_142; \ | | |
| 58940 | float64_t __ret_142; \ | | |
| 58941 | __ret_142 = __s0_142 * vget_lane_f64(__s1_142, __p2_142); \ | | |
| 58942 | __ret_142; \ | | |
| 58943 | }) | 50177 | }) |
| 58944 | #else | | |
| 58945 | #define vmuld_lane_f64(__p0_143, __p1_143, __p2_143) __extension__ ({ \ | | |
| 58946 | float64_t __s0_143 = __p0_143; \ | | |
| 58947 | float64x1_t __s1_143 = __p1_143; \ | | |
| 58948 | float64_t __ret_143; \ | | |
| 58949 | __ret_143 = __s0_143 * __noswap_vget_lane_f64(__s1_143, __p2_143); \ | | |
| 58950 | __ret_143; \ | | |
| 58951 | }) | | |
| 58952 | #endif | | |
| 58953 | | | |
| 58954 | #ifdef __LITTLE_ENDIAN__ | 50178 | #ifdef __LITTLE_ENDIAN__ |
| 58955 | #define vmuls_lane_f32(__p0_144, __p1_144, __p2_144) __extension__ ({ \ | 50179 | #define vmuls_lane_f32(__p0_139, __p1_139, __p2_139) __extension__ ({ \ |
| 58956 | float32_t __s0_144 = __p0_144; \ | 50180 | float32_t __s0_139 = __p0_139; \ |
| 58957 | float32x2_t __s1_144 = __p1_144; \ | 50181 | float32x2_t __s1_139 = __p1_139; \ |
| 58958 | float32_t __ret_144; \ | 50182 | float32_t __ret_139; \ |
| 58959 | __ret_144 = __s0_144 * vget_lane_f32(__s1_144, __p2_144); \ | 50183 | __ret_139 = __s0_139 * vget_lane_f32(__s1_139, __p2_139); \ |
| 58960 | __ret_144; \ | 50184 | __ret_139; \ |
| 58961 | }) | 50185 | }) |
| 58962 | #else | 50186 | #else |
| 58963 | #define vmuls_lane_f32(__p0_145, __p1_145, __p2_145) __extension__ ({ \ | 50187 | #define vmuls_lane_f32(__p0_140, __p1_140, __p2_140) __extension__ ({ \ |
| 58964 | float32_t __s0_145 = __p0_145; \ | 50188 | float32_t __s0_140 = __p0_140; \ |
| 58965 | float32x2_t __s1_145 = __p1_145; \ | 50189 | float32x2_t __s1_140 = __p1_140; \ |
| 58966 | float32x2_t __rev1_145; __rev1_145 = __builtin_shufflevector(__s1_145, __s1_145, 1, 0); \ | 50190 | float32x2_t __rev1_140; __rev1_140 = __builtin_shufflevector(__s1_140, __s1_140, 1, 0); \ |
| 58967 | float32_t __ret_145; \ | 50191 | float32_t __ret_140; \ |
| 58968 | __ret_145 = __s0_145 * __noswap_vget_lane_f32(__rev1_145, __p2_145); \ | 50192 | __ret_140 = __s0_140 * __noswap_vget_lane_f32(__rev1_140, __p2_140); \ |
| 58969 | __ret_145; \ | 50193 | __ret_140; \ |
| 58970 | }) | 50194 | }) |
| 58971 | #endif | 50195 | #endif |
| 58972 | | 50196 | |
| 58973 | #ifdef __LITTLE_ENDIAN__ | | |
| 58974 | #define vmul_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 58975 | float64x1_t __s0 = __p0; \ | | |
| 58976 | float64x1_t __s1 = __p1; \ | | |
| 58977 | float64x1_t __ret; \ | | |
| 58978 | __ret = (float64x1_t) __builtin_neon_vmul_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ | | |
| 58979 | __ret; \ | | |
| 58980 | }) | | |
| 58981 | #else | | |
| 58982 | #define vmul_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 50197 | #define vmul_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 58983 | float64x1_t __s0 = __p0; \ | 50198 | float64x1_t __s0 = __p0; \ |
| 58984 | float64x1_t __s1 = __p1; \ | 50199 | float64x1_t __s1 = __p1; \ |
| ... | @@ -58986,8 +50201,6 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { | ... | @@ -58986,8 +50201,6 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { |
| 58986 | __ret = (float64x1_t) __builtin_neon_vmul_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ | 50201 | __ret = (float64x1_t) __builtin_neon_vmul_lane_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 10); \ |
| 58987 | __ret; \ | 50202 | __ret; \ |
| 58988 | }) | 50203 | }) |
| 58989 | #endif | | |
| 58990 | | | |
| 58991 | #ifdef __LITTLE_ENDIAN__ | 50204 | #ifdef __LITTLE_ENDIAN__ |
| 58992 | #define vmulq_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 50205 | #define vmulq_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 58993 | float64x2_t __s0 = __p0; \ | 50206 | float64x2_t __s0 = __p0; \ |
| ... | @@ -59009,40 +50222,40 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { | ... | @@ -59009,40 +50222,40 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { |
| 59009 | #endif | 50222 | #endif |
| 59010 | | 50223 | |
| 59011 | #ifdef __LITTLE_ENDIAN__ | 50224 | #ifdef __LITTLE_ENDIAN__ |
| 59012 | #define vmuld_laneq_f64(__p0_146, __p1_146, __p2_146) __extension__ ({ \ | 50225 | #define vmuld_laneq_f64(__p0_141, __p1_141, __p2_141) __extension__ ({ \ |
| 59013 | float64_t __s0_146 = __p0_146; \ | 50226 | float64_t __s0_141 = __p0_141; \ |
| 59014 | float64x2_t __s1_146 = __p1_146; \ | 50227 | float64x2_t __s1_141 = __p1_141; \ |
| 59015 | float64_t __ret_146; \ | 50228 | float64_t __ret_141; \ |
| 59016 | __ret_146 = __s0_146 * vgetq_lane_f64(__s1_146, __p2_146); \ | 50229 | __ret_141 = __s0_141 * vgetq_lane_f64(__s1_141, __p2_141); \ |
| 59017 | __ret_146; \ | 50230 | __ret_141; \ |
| 59018 | }) | 50231 | }) |
| 59019 | #else | 50232 | #else |
| 59020 | #define vmuld_laneq_f64(__p0_147, __p1_147, __p2_147) __extension__ ({ \ | 50233 | #define vmuld_laneq_f64(__p0_142, __p1_142, __p2_142) __extension__ ({ \ |
| 59021 | float64_t __s0_147 = __p0_147; \ | 50234 | float64_t __s0_142 = __p0_142; \ |
| 59022 | float64x2_t __s1_147 = __p1_147; \ | 50235 | float64x2_t __s1_142 = __p1_142; \ |
| 59023 | float64x2_t __rev1_147; __rev1_147 = __builtin_shufflevector(__s1_147, __s1_147, 1, 0); \ | 50236 | float64x2_t __rev1_142; __rev1_142 = __builtin_shufflevector(__s1_142, __s1_142, 1, 0); \ |
| 59024 | float64_t __ret_147; \ | 50237 | float64_t __ret_142; \ |
| 59025 | __ret_147 = __s0_147 * __noswap_vgetq_lane_f64(__rev1_147, __p2_147); \ | 50238 | __ret_142 = __s0_142 * __noswap_vgetq_lane_f64(__rev1_142, __p2_142); \ |
| 59026 | __ret_147; \ | 50239 | __ret_142; \ |
| 59027 | }) | 50240 | }) |
| 59028 | #endif | 50241 | #endif |
| 59029 | | 50242 | |
| 59030 | #ifdef __LITTLE_ENDIAN__ | 50243 | #ifdef __LITTLE_ENDIAN__ |
| 59031 | #define vmuls_laneq_f32(__p0_148, __p1_148, __p2_148) __extension__ ({ \ | 50244 | #define vmuls_laneq_f32(__p0_143, __p1_143, __p2_143) __extension__ ({ \ |
| 59032 | float32_t __s0_148 = __p0_148; \ | 50245 | float32_t __s0_143 = __p0_143; \ |
| 59033 | float32x4_t __s1_148 = __p1_148; \ | 50246 | float32x4_t __s1_143 = __p1_143; \ |
| 59034 | float32_t __ret_148; \ | 50247 | float32_t __ret_143; \ |
| 59035 | __ret_148 = __s0_148 * vgetq_lane_f32(__s1_148, __p2_148); \ | 50248 | __ret_143 = __s0_143 * vgetq_lane_f32(__s1_143, __p2_143); \ |
| 59036 | __ret_148; \ | 50249 | __ret_143; \ |
| 59037 | }) | 50250 | }) |
| 59038 | #else | 50251 | #else |
| 59039 | #define vmuls_laneq_f32(__p0_149, __p1_149, __p2_149) __extension__ ({ \ | 50252 | #define vmuls_laneq_f32(__p0_144, __p1_144, __p2_144) __extension__ ({ \ |
| 59040 | float32_t __s0_149 = __p0_149; \ | 50253 | float32_t __s0_144 = __p0_144; \ |
| 59041 | float32x4_t __s1_149 = __p1_149; \ | 50254 | float32x4_t __s1_144 = __p1_144; \ |
| 59042 | float32x4_t __rev1_149; __rev1_149 = __builtin_shufflevector(__s1_149, __s1_149, 3, 2, 1, 0); \ | 50255 | float32x4_t __rev1_144; __rev1_144 = __builtin_shufflevector(__s1_144, __s1_144, 3, 2, 1, 0); \ |
| 59043 | float32_t __ret_149; \ | 50256 | float32_t __ret_144; \ |
| 59044 | __ret_149 = __s0_149 * __noswap_vgetq_lane_f32(__rev1_149, __p2_149); \ | 50257 | __ret_144 = __s0_144 * __noswap_vgetq_lane_f32(__rev1_144, __p2_144); \ |
| 59045 | __ret_149; \ | 50258 | __ret_144; \ |
| 59046 | }) | 50259 | }) |
| 59047 | #endif | 50260 | #endif |
| 59048 | | 50261 | |
| ... | @@ -59296,20 +50509,11 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { | ... | @@ -59296,20 +50509,11 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { |
| 59296 | }) | 50509 | }) |
| 59297 | #endif | 50510 | #endif |
| 59298 | | 50511 | |
| 59299 | #ifdef __LITTLE_ENDIAN__ | | |
| 59300 | __ai float64x1_t vmul_n_f64(float64x1_t __p0, float64_t __p1) { | 50512 | __ai float64x1_t vmul_n_f64(float64x1_t __p0, float64_t __p1) { |
| 59301 | float64x1_t __ret; | 50513 | float64x1_t __ret; |
| 59302 | __ret = (float64x1_t) __builtin_neon_vmul_n_f64((int8x8_t)__p0, __p1); | 50514 | __ret = (float64x1_t) __builtin_neon_vmul_n_f64((float64x1_t)__p0, __p1); |
| 59303 | return __ret; | 50515 | return __ret; |
| 59304 | } | 50516 | } |
| 59305 | #else | | |
| 59306 | __ai float64x1_t vmul_n_f64(float64x1_t __p0, float64_t __p1) { | | |
| 59307 | float64x1_t __ret; | | |
| 59308 | __ret = (float64x1_t) __builtin_neon_vmul_n_f64((int8x8_t)__p0, __p1); | | |
| 59309 | return __ret; | | |
| 59310 | } | | |
| 59311 | #endif | | |
| 59312 | | | |
| 59313 | #ifdef __LITTLE_ENDIAN__ | 50517 | #ifdef __LITTLE_ENDIAN__ |
| 59314 | __ai float64x2_t vmulq_n_f64(float64x2_t __p0, float64_t __p1) { | 50518 | __ai float64x2_t vmulq_n_f64(float64x2_t __p0, float64_t __p1) { |
| 59315 | float64x2_t __ret; | 50519 | float64x2_t __ret; |
| ... | @@ -59326,25 +50530,11 @@ __ai float64x2_t vmulq_n_f64(float64x2_t __p0, float64_t __p1) { | ... | @@ -59326,25 +50530,11 @@ __ai float64x2_t vmulq_n_f64(float64x2_t __p0, float64_t __p1) { |
| 59326 | } | 50530 | } |
| 59327 | #endif | 50531 | #endif |
| 59328 | | 50532 | |
| 59329 | #ifdef __LITTLE_ENDIAN__ | | |
| 59330 | __ai poly128_t vmull_p64(poly64_t __p0, poly64_t __p1) { | 50533 | __ai poly128_t vmull_p64(poly64_t __p0, poly64_t __p1) { |
| 59331 | poly128_t __ret; | 50534 | poly128_t __ret; |
| 59332 | __ret = (poly128_t) __builtin_neon_vmull_p64(__p0, __p1); | 50535 | __ret = (poly128_t) __builtin_neon_vmull_p64(__p0, __p1); |
| 59333 | return __ret; | 50536 | return __ret; |
| 59334 | } | 50537 | } |
| 59335 | #else | | |
| 59336 | __ai poly128_t vmull_p64(poly64_t __p0, poly64_t __p1) { | | |
| 59337 | poly128_t __ret; | | |
| 59338 | __ret = (poly128_t) __builtin_neon_vmull_p64(__p0, __p1); | | |
| 59339 | return __ret; | | |
| 59340 | } | | |
| 59341 | __ai poly128_t __noswap_vmull_p64(poly64_t __p0, poly64_t __p1) { | | |
| 59342 | poly128_t __ret; | | |
| 59343 | __ret = (poly128_t) __builtin_neon_vmull_p64(__p0, __p1); | | |
| 59344 | return __ret; | | |
| 59345 | } | | |
| 59346 | #endif | | |
| 59347 | | | |
| 59348 | #ifdef __LITTLE_ENDIAN__ | 50538 | #ifdef __LITTLE_ENDIAN__ |
| 59349 | __ai poly16x8_t vmull_high_p8(poly8x16_t __p0, poly8x16_t __p1) { | 50539 | __ai poly16x8_t vmull_high_p8(poly8x16_t __p0, poly8x16_t __p1) { |
| 59350 | poly16x8_t __ret; | 50540 | poly16x8_t __ret; |
| ... | @@ -59475,7 +50665,7 @@ __ai poly128_t vmull_high_p64(poly64x2_t __p0, poly64x2_t __p1) { | ... | @@ -59475,7 +50665,7 @@ __ai poly128_t vmull_high_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 59475 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 50665 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 59476 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); | 50666 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0); |
| 59477 | poly128_t __ret; | 50667 | poly128_t __ret; |
| 59478 | __ret = __noswap_vmull_p64((poly64_t)(__noswap_vget_high_p64(__rev0)), (poly64_t)(__noswap_vget_high_p64(__rev1))); | 50668 | __ret = vmull_p64((poly64_t)(__noswap_vget_high_p64(__rev0)), (poly64_t)(__noswap_vget_high_p64(__rev1))); |
| 59479 | return __ret; | 50669 | return __ret; |
| 59480 | } | 50670 | } |
| 59481 | #endif | 50671 | #endif |
| ... | @@ -59840,20 +51030,11 @@ __ai float32x4_t __noswap_vmulxq_f32(float32x4_t __p0, float32x4_t __p1) { | ... | @@ -59840,20 +51030,11 @@ __ai float32x4_t __noswap_vmulxq_f32(float32x4_t __p0, float32x4_t __p1) { |
| 59840 | } | 51030 | } |
| 59841 | #endif | 51031 | #endif |
| 59842 | | 51032 | |
| 59843 | #ifdef __LITTLE_ENDIAN__ | | |
| 59844 | __ai float64x1_t vmulx_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 59845 | float64x1_t __ret; | | |
| 59846 | __ret = (float64x1_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 59847 | return __ret; | | |
| 59848 | } | | |
| 59849 | #else | | |
| 59850 | __ai float64x1_t vmulx_f64(float64x1_t __p0, float64x1_t __p1) { | 51033 | __ai float64x1_t vmulx_f64(float64x1_t __p0, float64x1_t __p1) { |
| 59851 | float64x1_t __ret; | 51034 | float64x1_t __ret; |
| 59852 | __ret = (float64x1_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 51035 | __ret = (float64x1_t) __builtin_neon_vmulx_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 59853 | return __ret; | 51036 | return __ret; |
| 59854 | } | 51037 | } |
| 59855 | #endif | | |
| 59856 | | | |
| 59857 | #ifdef __LITTLE_ENDIAN__ | 51038 | #ifdef __LITTLE_ENDIAN__ |
| 59858 | __ai float32x2_t vmulx_f32(float32x2_t __p0, float32x2_t __p1) { | 51039 | __ai float32x2_t vmulx_f32(float32x2_t __p0, float32x2_t __p1) { |
| 59859 | float32x2_t __ret; | 51040 | float32x2_t __ret; |
| ... | @@ -59876,78 +51057,39 @@ __ai float32x2_t __noswap_vmulx_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -59876,78 +51057,39 @@ __ai float32x2_t __noswap_vmulx_f32(float32x2_t __p0, float32x2_t __p1) { |
| 59876 | } | 51057 | } |
| 59877 | #endif | 51058 | #endif |
| 59878 | | 51059 | |
| 59879 | #ifdef __LITTLE_ENDIAN__ | | |
| 59880 | __ai float64_t vmulxd_f64(float64_t __p0, float64_t __p1) { | | |
| 59881 | float64_t __ret; | | |
| 59882 | __ret = (float64_t) __builtin_neon_vmulxd_f64(__p0, __p1); | | |
| 59883 | return __ret; | | |
| 59884 | } | | |
| 59885 | #else | | |
| 59886 | __ai float64_t vmulxd_f64(float64_t __p0, float64_t __p1) { | 51060 | __ai float64_t vmulxd_f64(float64_t __p0, float64_t __p1) { |
| 59887 | float64_t __ret; | 51061 | float64_t __ret; |
| 59888 | __ret = (float64_t) __builtin_neon_vmulxd_f64(__p0, __p1); | 51062 | __ret = (float64_t) __builtin_neon_vmulxd_f64(__p0, __p1); |
| 59889 | return __ret; | 51063 | return __ret; |
| 59890 | } | 51064 | } |
| 59891 | __ai float64_t __noswap_vmulxd_f64(float64_t __p0, float64_t __p1) { | | |
| 59892 | float64_t __ret; | | |
| 59893 | __ret = (float64_t) __builtin_neon_vmulxd_f64(__p0, __p1); | | |
| 59894 | return __ret; | | |
| 59895 | } | | |
| 59896 | #endif | | |
| 59897 | | | |
| 59898 | #ifdef __LITTLE_ENDIAN__ | | |
| 59899 | __ai float32_t vmulxs_f32(float32_t __p0, float32_t __p1) { | | |
| 59900 | float32_t __ret; | | |
| 59901 | __ret = (float32_t) __builtin_neon_vmulxs_f32(__p0, __p1); | | |
| 59902 | return __ret; | | |
| 59903 | } | | |
| 59904 | #else | | |
| 59905 | __ai float32_t vmulxs_f32(float32_t __p0, float32_t __p1) { | 51065 | __ai float32_t vmulxs_f32(float32_t __p0, float32_t __p1) { |
| 59906 | float32_t __ret; | 51066 | float32_t __ret; |
| 59907 | __ret = (float32_t) __builtin_neon_vmulxs_f32(__p0, __p1); | 51067 | __ret = (float32_t) __builtin_neon_vmulxs_f32(__p0, __p1); |
| 59908 | return __ret; | 51068 | return __ret; |
| 59909 | } | 51069 | } |
| 59910 | __ai float32_t __noswap_vmulxs_f32(float32_t __p0, float32_t __p1) { | 51070 | #define vmulxd_lane_f64(__p0_145, __p1_145, __p2_145) __extension__ ({ \ |
| 59911 | float32_t __ret; | 51071 | float64_t __s0_145 = __p0_145; \ |
| 59912 | __ret = (float32_t) __builtin_neon_vmulxs_f32(__p0, __p1); | 51072 | float64x1_t __s1_145 = __p1_145; \ |
| 59913 | return __ret; | 51073 | float64_t __ret_145; \ |
| 59914 | } | 51074 | __ret_145 = vmulxd_f64(__s0_145, vget_lane_f64(__s1_145, __p2_145)); \ |
| 59915 | #endif | 51075 | __ret_145; \ |
| 59916 | | | |
| 59917 | #ifdef __LITTLE_ENDIAN__ | | |
| 59918 | #define vmulxd_lane_f64(__p0_150, __p1_150, __p2_150) __extension__ ({ \ | | |
| 59919 | float64_t __s0_150 = __p0_150; \ | | |
| 59920 | float64x1_t __s1_150 = __p1_150; \ | | |
| 59921 | float64_t __ret_150; \ | | |
| 59922 | __ret_150 = vmulxd_f64(__s0_150, vget_lane_f64(__s1_150, __p2_150)); \ | | |
| 59923 | __ret_150; \ | | |
| 59924 | }) | | |
| 59925 | #else | | |
| 59926 | #define vmulxd_lane_f64(__p0_151, __p1_151, __p2_151) __extension__ ({ \ | | |
| 59927 | float64_t __s0_151 = __p0_151; \ | | |
| 59928 | float64x1_t __s1_151 = __p1_151; \ | | |
| 59929 | float64_t __ret_151; \ | | |
| 59930 | __ret_151 = __noswap_vmulxd_f64(__s0_151, __noswap_vget_lane_f64(__s1_151, __p2_151)); \ | | |
| 59931 | __ret_151; \ | | |
| 59932 | }) | 51076 | }) |
| 59933 | #endif | | |
| 59934 | | | |
| 59935 | #ifdef __LITTLE_ENDIAN__ | 51077 | #ifdef __LITTLE_ENDIAN__ |
| 59936 | #define vmulxs_lane_f32(__p0_152, __p1_152, __p2_152) __extension__ ({ \ | 51078 | #define vmulxs_lane_f32(__p0_146, __p1_146, __p2_146) __extension__ ({ \ |
| 59937 | float32_t __s0_152 = __p0_152; \ | 51079 | float32_t __s0_146 = __p0_146; \ |
| 59938 | float32x2_t __s1_152 = __p1_152; \ | 51080 | float32x2_t __s1_146 = __p1_146; \ |
| 59939 | float32_t __ret_152; \ | 51081 | float32_t __ret_146; \ |
| 59940 | __ret_152 = vmulxs_f32(__s0_152, vget_lane_f32(__s1_152, __p2_152)); \ | 51082 | __ret_146 = vmulxs_f32(__s0_146, vget_lane_f32(__s1_146, __p2_146)); \ |
| 59941 | __ret_152; \ | 51083 | __ret_146; \ |
| 59942 | }) | 51084 | }) |
| 59943 | #else | 51085 | #else |
| 59944 | #define vmulxs_lane_f32(__p0_153, __p1_153, __p2_153) __extension__ ({ \ | 51086 | #define vmulxs_lane_f32(__p0_147, __p1_147, __p2_147) __extension__ ({ \ |
| 59945 | float32_t __s0_153 = __p0_153; \ | 51087 | float32_t __s0_147 = __p0_147; \ |
| 59946 | float32x2_t __s1_153 = __p1_153; \ | 51088 | float32x2_t __s1_147 = __p1_147; \ |
| 59947 | float32x2_t __rev1_153; __rev1_153 = __builtin_shufflevector(__s1_153, __s1_153, 1, 0); \ | 51089 | float32x2_t __rev1_147; __rev1_147 = __builtin_shufflevector(__s1_147, __s1_147, 1, 0); \ |
| 59948 | float32_t __ret_153; \ | 51090 | float32_t __ret_147; \ |
| 59949 | __ret_153 = __noswap_vmulxs_f32(__s0_153, __noswap_vget_lane_f32(__rev1_153, __p2_153)); \ | 51091 | __ret_147 = vmulxs_f32(__s0_147, __noswap_vget_lane_f32(__rev1_147, __p2_147)); \ |
| 59950 | __ret_153; \ | 51092 | __ret_147; \ |
| 59951 | }) | 51093 | }) |
| 59952 | #endif | 51094 | #endif |
| 59953 | | 51095 | |
| ... | @@ -60014,40 +51156,40 @@ __ai float32_t __noswap_vmulxs_f32(float32_t __p0, float32_t __p1) { | ... | @@ -60014,40 +51156,40 @@ __ai float32_t __noswap_vmulxs_f32(float32_t __p0, float32_t __p1) { |
| 60014 | #endif | 51156 | #endif |
| 60015 | | 51157 | |
| 60016 | #ifdef __LITTLE_ENDIAN__ | 51158 | #ifdef __LITTLE_ENDIAN__ |
| 60017 | #define vmulxd_laneq_f64(__p0_154, __p1_154, __p2_154) __extension__ ({ \ | 51159 | #define vmulxd_laneq_f64(__p0_148, __p1_148, __p2_148) __extension__ ({ \ |
| 60018 | float64_t __s0_154 = __p0_154; \ | 51160 | float64_t __s0_148 = __p0_148; \ |
| 60019 | float64x2_t __s1_154 = __p1_154; \ | 51161 | float64x2_t __s1_148 = __p1_148; \ |
| 60020 | float64_t __ret_154; \ | 51162 | float64_t __ret_148; \ |
| 60021 | __ret_154 = vmulxd_f64(__s0_154, vgetq_lane_f64(__s1_154, __p2_154)); \ | 51163 | __ret_148 = vmulxd_f64(__s0_148, vgetq_lane_f64(__s1_148, __p2_148)); \ |
| 60022 | __ret_154; \ | 51164 | __ret_148; \ |
| 60023 | }) | 51165 | }) |
| 60024 | #else | 51166 | #else |
| 60025 | #define vmulxd_laneq_f64(__p0_155, __p1_155, __p2_155) __extension__ ({ \ | 51167 | #define vmulxd_laneq_f64(__p0_149, __p1_149, __p2_149) __extension__ ({ \ |
| 60026 | float64_t __s0_155 = __p0_155; \ | 51168 | float64_t __s0_149 = __p0_149; \ |
| 60027 | float64x2_t __s1_155 = __p1_155; \ | 51169 | float64x2_t __s1_149 = __p1_149; \ |
| 60028 | float64x2_t __rev1_155; __rev1_155 = __builtin_shufflevector(__s1_155, __s1_155, 1, 0); \ | 51170 | float64x2_t __rev1_149; __rev1_149 = __builtin_shufflevector(__s1_149, __s1_149, 1, 0); \ |
| 60029 | float64_t __ret_155; \ | 51171 | float64_t __ret_149; \ |
| 60030 | __ret_155 = __noswap_vmulxd_f64(__s0_155, __noswap_vgetq_lane_f64(__rev1_155, __p2_155)); \ | 51172 | __ret_149 = vmulxd_f64(__s0_149, __noswap_vgetq_lane_f64(__rev1_149, __p2_149)); \ |
| 60031 | __ret_155; \ | 51173 | __ret_149; \ |
| 60032 | }) | 51174 | }) |
| 60033 | #endif | 51175 | #endif |
| 60034 | | 51176 | |
| 60035 | #ifdef __LITTLE_ENDIAN__ | 51177 | #ifdef __LITTLE_ENDIAN__ |
| 60036 | #define vmulxs_laneq_f32(__p0_156, __p1_156, __p2_156) __extension__ ({ \ | 51178 | #define vmulxs_laneq_f32(__p0_150, __p1_150, __p2_150) __extension__ ({ \ |
| 60037 | float32_t __s0_156 = __p0_156; \ | 51179 | float32_t __s0_150 = __p0_150; \ |
| 60038 | float32x4_t __s1_156 = __p1_156; \ | 51180 | float32x4_t __s1_150 = __p1_150; \ |
| 60039 | float32_t __ret_156; \ | 51181 | float32_t __ret_150; \ |
| 60040 | __ret_156 = vmulxs_f32(__s0_156, vgetq_lane_f32(__s1_156, __p2_156)); \ | 51182 | __ret_150 = vmulxs_f32(__s0_150, vgetq_lane_f32(__s1_150, __p2_150)); \ |
| 60041 | __ret_156; \ | 51183 | __ret_150; \ |
| 60042 | }) | 51184 | }) |
| 60043 | #else | 51185 | #else |
| 60044 | #define vmulxs_laneq_f32(__p0_157, __p1_157, __p2_157) __extension__ ({ \ | 51186 | #define vmulxs_laneq_f32(__p0_151, __p1_151, __p2_151) __extension__ ({ \ |
| 60045 | float32_t __s0_157 = __p0_157; \ | 51187 | float32_t __s0_151 = __p0_151; \ |
| 60046 | float32x4_t __s1_157 = __p1_157; \ | 51188 | float32x4_t __s1_151 = __p1_151; \ |
| 60047 | float32x4_t __rev1_157; __rev1_157 = __builtin_shufflevector(__s1_157, __s1_157, 3, 2, 1, 0); \ | 51189 | float32x4_t __rev1_151; __rev1_151 = __builtin_shufflevector(__s1_151, __s1_151, 3, 2, 1, 0); \ |
| 60048 | float32_t __ret_157; \ | 51190 | float32_t __ret_151; \ |
| 60049 | __ret_157 = __noswap_vmulxs_f32(__s0_157, __noswap_vgetq_lane_f32(__rev1_157, __p2_157)); \ | 51191 | __ret_151 = vmulxs_f32(__s0_151, __noswap_vgetq_lane_f32(__rev1_151, __p2_151)); \ |
| 60050 | __ret_157; \ | 51192 | __ret_151; \ |
| 60051 | }) | 51193 | }) |
| 60052 | #endif | 51194 | #endif |
| 60053 | | 51195 | |
| ... | @@ -60146,48 +51288,21 @@ __ai int64x2_t vnegq_s64(int64x2_t __p0) { | ... | @@ -60146,48 +51288,21 @@ __ai int64x2_t vnegq_s64(int64x2_t __p0) { |
| 60146 | } | 51288 | } |
| 60147 | #endif | 51289 | #endif |
| 60148 | | 51290 | |
| 60149 | #ifdef __LITTLE_ENDIAN__ | | |
| 60150 | __ai float64x1_t vneg_f64(float64x1_t __p0) { | | |
| 60151 | float64x1_t __ret; | | |
| 60152 | __ret = -__p0; | | |
| 60153 | return __ret; | | |
| 60154 | } | | |
| 60155 | #else | | |
| 60156 | __ai float64x1_t vneg_f64(float64x1_t __p0) { | 51291 | __ai float64x1_t vneg_f64(float64x1_t __p0) { |
| 60157 | float64x1_t __ret; | 51292 | float64x1_t __ret; |
| 60158 | __ret = -__p0; | 51293 | __ret = -__p0; |
| 60159 | return __ret; | 51294 | return __ret; |
| 60160 | } | 51295 | } |
| 60161 | #endif | | |
| 60162 | | | |
| 60163 | #ifdef __LITTLE_ENDIAN__ | | |
| 60164 | __ai int64x1_t vneg_s64(int64x1_t __p0) { | | |
| 60165 | int64x1_t __ret; | | |
| 60166 | __ret = -__p0; | | |
| 60167 | return __ret; | | |
| 60168 | } | | |
| 60169 | #else | | |
| 60170 | __ai int64x1_t vneg_s64(int64x1_t __p0) { | 51296 | __ai int64x1_t vneg_s64(int64x1_t __p0) { |
| 60171 | int64x1_t __ret; | 51297 | int64x1_t __ret; |
| 60172 | __ret = -__p0; | 51298 | __ret = -__p0; |
| 60173 | return __ret; | 51299 | return __ret; |
| 60174 | } | 51300 | } |
| 60175 | #endif | | |
| 60176 | | | |
| 60177 | #ifdef __LITTLE_ENDIAN__ | | |
| 60178 | __ai int64_t vnegd_s64(int64_t __p0) { | | |
| 60179 | int64_t __ret; | | |
| 60180 | __ret = (int64_t) __builtin_neon_vnegd_s64(__p0); | | |
| 60181 | return __ret; | | |
| 60182 | } | | |
| 60183 | #else | | |
| 60184 | __ai int64_t vnegd_s64(int64_t __p0) { | 51301 | __ai int64_t vnegd_s64(int64_t __p0) { |
| 60185 | int64_t __ret; | 51302 | int64_t __ret; |
| 60186 | __ret = (int64_t) __builtin_neon_vnegd_s64(__p0); | 51303 | __ret = (int64_t) __builtin_neon_vnegd_s64(__p0); |
| 60187 | return __ret; | 51304 | return __ret; |
| 60188 | } | 51305 | } |
| 60189 | #endif | | |
| 60190 | | | |
| 60191 | #ifdef __LITTLE_ENDIAN__ | 51306 | #ifdef __LITTLE_ENDIAN__ |
| 60192 | __ai uint8x16_t vpaddq_u8(uint8x16_t __p0, uint8x16_t __p1) { | 51307 | __ai uint8x16_t vpaddq_u8(uint8x16_t __p0, uint8x16_t __p1) { |
| 60193 | uint8x16_t __ret; | 51308 | uint8x16_t __ret; |
| ... | @@ -60361,14 +51476,14 @@ __ai int16x8_t vpaddq_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -60361,14 +51476,14 @@ __ai int16x8_t vpaddq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 60361 | #ifdef __LITTLE_ENDIAN__ | 51476 | #ifdef __LITTLE_ENDIAN__ |
| 60362 | __ai uint64_t vpaddd_u64(uint64x2_t __p0) { | 51477 | __ai uint64_t vpaddd_u64(uint64x2_t __p0) { |
| 60363 | uint64_t __ret; | 51478 | uint64_t __ret; |
| 60364 | __ret = (uint64_t) __builtin_neon_vpaddd_u64((int8x16_t)__p0); | 51479 | __ret = (uint64_t) __builtin_neon_vpaddd_u64(__p0); |
| 60365 | return __ret; | 51480 | return __ret; |
| 60366 | } | 51481 | } |
| 60367 | #else | 51482 | #else |
| 60368 | __ai uint64_t vpaddd_u64(uint64x2_t __p0) { | 51483 | __ai uint64_t vpaddd_u64(uint64x2_t __p0) { |
| 60369 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51484 | uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60370 | uint64_t __ret; | 51485 | uint64_t __ret; |
| 60371 | __ret = (uint64_t) __builtin_neon_vpaddd_u64((int8x16_t)__rev0); | 51486 | __ret = (uint64_t) __builtin_neon_vpaddd_u64(__rev0); |
| 60372 | return __ret; | 51487 | return __ret; |
| 60373 | } | 51488 | } |
| 60374 | #endif | 51489 | #endif |
| ... | @@ -60376,14 +51491,14 @@ __ai uint64_t vpaddd_u64(uint64x2_t __p0) { | ... | @@ -60376,14 +51491,14 @@ __ai uint64_t vpaddd_u64(uint64x2_t __p0) { |
| 60376 | #ifdef __LITTLE_ENDIAN__ | 51491 | #ifdef __LITTLE_ENDIAN__ |
| 60377 | __ai float64_t vpaddd_f64(float64x2_t __p0) { | 51492 | __ai float64_t vpaddd_f64(float64x2_t __p0) { |
| 60378 | float64_t __ret; | 51493 | float64_t __ret; |
| 60379 | __ret = (float64_t) __builtin_neon_vpaddd_f64((int8x16_t)__p0); | 51494 | __ret = (float64_t) __builtin_neon_vpaddd_f64(__p0); |
| 60380 | return __ret; | 51495 | return __ret; |
| 60381 | } | 51496 | } |
| 60382 | #else | 51497 | #else |
| 60383 | __ai float64_t vpaddd_f64(float64x2_t __p0) { | 51498 | __ai float64_t vpaddd_f64(float64x2_t __p0) { |
| 60384 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51499 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60385 | float64_t __ret; | 51500 | float64_t __ret; |
| 60386 | __ret = (float64_t) __builtin_neon_vpaddd_f64((int8x16_t)__rev0); | 51501 | __ret = (float64_t) __builtin_neon_vpaddd_f64(__rev0); |
| 60387 | return __ret; | 51502 | return __ret; |
| 60388 | } | 51503 | } |
| 60389 | #endif | 51504 | #endif |
| ... | @@ -60391,14 +51506,14 @@ __ai float64_t vpaddd_f64(float64x2_t __p0) { | ... | @@ -60391,14 +51506,14 @@ __ai float64_t vpaddd_f64(float64x2_t __p0) { |
| 60391 | #ifdef __LITTLE_ENDIAN__ | 51506 | #ifdef __LITTLE_ENDIAN__ |
| 60392 | __ai int64_t vpaddd_s64(int64x2_t __p0) { | 51507 | __ai int64_t vpaddd_s64(int64x2_t __p0) { |
| 60393 | int64_t __ret; | 51508 | int64_t __ret; |
| 60394 | __ret = (int64_t) __builtin_neon_vpaddd_s64((int8x16_t)__p0); | 51509 | __ret = (int64_t) __builtin_neon_vpaddd_s64(__p0); |
| 60395 | return __ret; | 51510 | return __ret; |
| 60396 | } | 51511 | } |
| 60397 | #else | 51512 | #else |
| 60398 | __ai int64_t vpaddd_s64(int64x2_t __p0) { | 51513 | __ai int64_t vpaddd_s64(int64x2_t __p0) { |
| 60399 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51514 | int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60400 | int64_t __ret; | 51515 | int64_t __ret; |
| 60401 | __ret = (int64_t) __builtin_neon_vpaddd_s64((int8x16_t)__rev0); | 51516 | __ret = (int64_t) __builtin_neon_vpaddd_s64(__rev0); |
| 60402 | return __ret; | 51517 | return __ret; |
| 60403 | } | 51518 | } |
| 60404 | #endif | 51519 | #endif |
| ... | @@ -60406,14 +51521,14 @@ __ai int64_t vpaddd_s64(int64x2_t __p0) { | ... | @@ -60406,14 +51521,14 @@ __ai int64_t vpaddd_s64(int64x2_t __p0) { |
| 60406 | #ifdef __LITTLE_ENDIAN__ | 51521 | #ifdef __LITTLE_ENDIAN__ |
| 60407 | __ai float32_t vpadds_f32(float32x2_t __p0) { | 51522 | __ai float32_t vpadds_f32(float32x2_t __p0) { |
| 60408 | float32_t __ret; | 51523 | float32_t __ret; |
| 60409 | __ret = (float32_t) __builtin_neon_vpadds_f32((int8x8_t)__p0); | 51524 | __ret = (float32_t) __builtin_neon_vpadds_f32(__p0); |
| 60410 | return __ret; | 51525 | return __ret; |
| 60411 | } | 51526 | } |
| 60412 | #else | 51527 | #else |
| 60413 | __ai float32_t vpadds_f32(float32x2_t __p0) { | 51528 | __ai float32_t vpadds_f32(float32x2_t __p0) { |
| 60414 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51529 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60415 | float32_t __ret; | 51530 | float32_t __ret; |
| 60416 | __ret = (float32_t) __builtin_neon_vpadds_f32((int8x8_t)__rev0); | 51531 | __ret = (float32_t) __builtin_neon_vpadds_f32(__rev0); |
| 60417 | return __ret; | 51532 | return __ret; |
| 60418 | } | 51533 | } |
| 60419 | #endif | 51534 | #endif |
| ... | @@ -60557,14 +51672,14 @@ __ai int16x8_t vpmaxq_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -60557,14 +51672,14 @@ __ai int16x8_t vpmaxq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 60557 | #ifdef __LITTLE_ENDIAN__ | 51672 | #ifdef __LITTLE_ENDIAN__ |
| 60558 | __ai float64_t vpmaxqd_f64(float64x2_t __p0) { | 51673 | __ai float64_t vpmaxqd_f64(float64x2_t __p0) { |
| 60559 | float64_t __ret; | 51674 | float64_t __ret; |
| 60560 | __ret = (float64_t) __builtin_neon_vpmaxqd_f64((int8x16_t)__p0); | 51675 | __ret = (float64_t) __builtin_neon_vpmaxqd_f64(__p0); |
| 60561 | return __ret; | 51676 | return __ret; |
| 60562 | } | 51677 | } |
| 60563 | #else | 51678 | #else |
| 60564 | __ai float64_t vpmaxqd_f64(float64x2_t __p0) { | 51679 | __ai float64_t vpmaxqd_f64(float64x2_t __p0) { |
| 60565 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51680 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60566 | float64_t __ret; | 51681 | float64_t __ret; |
| 60567 | __ret = (float64_t) __builtin_neon_vpmaxqd_f64((int8x16_t)__rev0); | 51682 | __ret = (float64_t) __builtin_neon_vpmaxqd_f64(__rev0); |
| 60568 | return __ret; | 51683 | return __ret; |
| 60569 | } | 51684 | } |
| 60570 | #endif | 51685 | #endif |
| ... | @@ -60572,14 +51687,14 @@ __ai float64_t vpmaxqd_f64(float64x2_t __p0) { | ... | @@ -60572,14 +51687,14 @@ __ai float64_t vpmaxqd_f64(float64x2_t __p0) { |
| 60572 | #ifdef __LITTLE_ENDIAN__ | 51687 | #ifdef __LITTLE_ENDIAN__ |
| 60573 | __ai float32_t vpmaxs_f32(float32x2_t __p0) { | 51688 | __ai float32_t vpmaxs_f32(float32x2_t __p0) { |
| 60574 | float32_t __ret; | 51689 | float32_t __ret; |
| 60575 | __ret = (float32_t) __builtin_neon_vpmaxs_f32((int8x8_t)__p0); | 51690 | __ret = (float32_t) __builtin_neon_vpmaxs_f32(__p0); |
| 60576 | return __ret; | 51691 | return __ret; |
| 60577 | } | 51692 | } |
| 60578 | #else | 51693 | #else |
| 60579 | __ai float32_t vpmaxs_f32(float32x2_t __p0) { | 51694 | __ai float32_t vpmaxs_f32(float32x2_t __p0) { |
| 60580 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51695 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60581 | float32_t __ret; | 51696 | float32_t __ret; |
| 60582 | __ret = (float32_t) __builtin_neon_vpmaxs_f32((int8x8_t)__rev0); | 51697 | __ret = (float32_t) __builtin_neon_vpmaxs_f32(__rev0); |
| 60583 | return __ret; | 51698 | return __ret; |
| 60584 | } | 51699 | } |
| 60585 | #endif | 51700 | #endif |
| ... | @@ -60638,14 +51753,14 @@ __ai float32x2_t vpmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -60638,14 +51753,14 @@ __ai float32x2_t vpmaxnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 60638 | #ifdef __LITTLE_ENDIAN__ | 51753 | #ifdef __LITTLE_ENDIAN__ |
| 60639 | __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { | 51754 | __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { |
| 60640 | float64_t __ret; | 51755 | float64_t __ret; |
| 60641 | __ret = (float64_t) __builtin_neon_vpmaxnmqd_f64((int8x16_t)__p0); | 51756 | __ret = (float64_t) __builtin_neon_vpmaxnmqd_f64(__p0); |
| 60642 | return __ret; | 51757 | return __ret; |
| 60643 | } | 51758 | } |
| 60644 | #else | 51759 | #else |
| 60645 | __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { | 51760 | __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { |
| 60646 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51761 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60647 | float64_t __ret; | 51762 | float64_t __ret; |
| 60648 | __ret = (float64_t) __builtin_neon_vpmaxnmqd_f64((int8x16_t)__rev0); | 51763 | __ret = (float64_t) __builtin_neon_vpmaxnmqd_f64(__rev0); |
| 60649 | return __ret; | 51764 | return __ret; |
| 60650 | } | 51765 | } |
| 60651 | #endif | 51766 | #endif |
| ... | @@ -60653,14 +51768,14 @@ __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { | ... | @@ -60653,14 +51768,14 @@ __ai float64_t vpmaxnmqd_f64(float64x2_t __p0) { |
| 60653 | #ifdef __LITTLE_ENDIAN__ | 51768 | #ifdef __LITTLE_ENDIAN__ |
| 60654 | __ai float32_t vpmaxnms_f32(float32x2_t __p0) { | 51769 | __ai float32_t vpmaxnms_f32(float32x2_t __p0) { |
| 60655 | float32_t __ret; | 51770 | float32_t __ret; |
| 60656 | __ret = (float32_t) __builtin_neon_vpmaxnms_f32((int8x8_t)__p0); | 51771 | __ret = (float32_t) __builtin_neon_vpmaxnms_f32(__p0); |
| 60657 | return __ret; | 51772 | return __ret; |
| 60658 | } | 51773 | } |
| 60659 | #else | 51774 | #else |
| 60660 | __ai float32_t vpmaxnms_f32(float32x2_t __p0) { | 51775 | __ai float32_t vpmaxnms_f32(float32x2_t __p0) { |
| 60661 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51776 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60662 | float32_t __ret; | 51777 | float32_t __ret; |
| 60663 | __ret = (float32_t) __builtin_neon_vpmaxnms_f32((int8x8_t)__rev0); | 51778 | __ret = (float32_t) __builtin_neon_vpmaxnms_f32(__rev0); |
| 60664 | return __ret; | 51779 | return __ret; |
| 60665 | } | 51780 | } |
| 60666 | #endif | 51781 | #endif |
| ... | @@ -60804,14 +51919,14 @@ __ai int16x8_t vpminq_s16(int16x8_t __p0, int16x8_t __p1) { | ... | @@ -60804,14 +51919,14 @@ __ai int16x8_t vpminq_s16(int16x8_t __p0, int16x8_t __p1) { |
| 60804 | #ifdef __LITTLE_ENDIAN__ | 51919 | #ifdef __LITTLE_ENDIAN__ |
| 60805 | __ai float64_t vpminqd_f64(float64x2_t __p0) { | 51920 | __ai float64_t vpminqd_f64(float64x2_t __p0) { |
| 60806 | float64_t __ret; | 51921 | float64_t __ret; |
| 60807 | __ret = (float64_t) __builtin_neon_vpminqd_f64((int8x16_t)__p0); | 51922 | __ret = (float64_t) __builtin_neon_vpminqd_f64(__p0); |
| 60808 | return __ret; | 51923 | return __ret; |
| 60809 | } | 51924 | } |
| 60810 | #else | 51925 | #else |
| 60811 | __ai float64_t vpminqd_f64(float64x2_t __p0) { | 51926 | __ai float64_t vpminqd_f64(float64x2_t __p0) { |
| 60812 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51927 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60813 | float64_t __ret; | 51928 | float64_t __ret; |
| 60814 | __ret = (float64_t) __builtin_neon_vpminqd_f64((int8x16_t)__rev0); | 51929 | __ret = (float64_t) __builtin_neon_vpminqd_f64(__rev0); |
| 60815 | return __ret; | 51930 | return __ret; |
| 60816 | } | 51931 | } |
| 60817 | #endif | 51932 | #endif |
| ... | @@ -60819,14 +51934,14 @@ __ai float64_t vpminqd_f64(float64x2_t __p0) { | ... | @@ -60819,14 +51934,14 @@ __ai float64_t vpminqd_f64(float64x2_t __p0) { |
| 60819 | #ifdef __LITTLE_ENDIAN__ | 51934 | #ifdef __LITTLE_ENDIAN__ |
| 60820 | __ai float32_t vpmins_f32(float32x2_t __p0) { | 51935 | __ai float32_t vpmins_f32(float32x2_t __p0) { |
| 60821 | float32_t __ret; | 51936 | float32_t __ret; |
| 60822 | __ret = (float32_t) __builtin_neon_vpmins_f32((int8x8_t)__p0); | 51937 | __ret = (float32_t) __builtin_neon_vpmins_f32(__p0); |
| 60823 | return __ret; | 51938 | return __ret; |
| 60824 | } | 51939 | } |
| 60825 | #else | 51940 | #else |
| 60826 | __ai float32_t vpmins_f32(float32x2_t __p0) { | 51941 | __ai float32_t vpmins_f32(float32x2_t __p0) { |
| 60827 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 51942 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60828 | float32_t __ret; | 51943 | float32_t __ret; |
| 60829 | __ret = (float32_t) __builtin_neon_vpmins_f32((int8x8_t)__rev0); | 51944 | __ret = (float32_t) __builtin_neon_vpmins_f32(__rev0); |
| 60830 | return __ret; | 51945 | return __ret; |
| 60831 | } | 51946 | } |
| 60832 | #endif | 51947 | #endif |
| ... | @@ -60885,14 +52000,14 @@ __ai float32x2_t vpminnm_f32(float32x2_t __p0, float32x2_t __p1) { | ... | @@ -60885,14 +52000,14 @@ __ai float32x2_t vpminnm_f32(float32x2_t __p0, float32x2_t __p1) { |
| 60885 | #ifdef __LITTLE_ENDIAN__ | 52000 | #ifdef __LITTLE_ENDIAN__ |
| 60886 | __ai float64_t vpminnmqd_f64(float64x2_t __p0) { | 52001 | __ai float64_t vpminnmqd_f64(float64x2_t __p0) { |
| 60887 | float64_t __ret; | 52002 | float64_t __ret; |
| 60888 | __ret = (float64_t) __builtin_neon_vpminnmqd_f64((int8x16_t)__p0); | 52003 | __ret = (float64_t) __builtin_neon_vpminnmqd_f64(__p0); |
| 60889 | return __ret; | 52004 | return __ret; |
| 60890 | } | 52005 | } |
| 60891 | #else | 52006 | #else |
| 60892 | __ai float64_t vpminnmqd_f64(float64x2_t __p0) { | 52007 | __ai float64_t vpminnmqd_f64(float64x2_t __p0) { |
| 60893 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52008 | float64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60894 | float64_t __ret; | 52009 | float64_t __ret; |
| 60895 | __ret = (float64_t) __builtin_neon_vpminnmqd_f64((int8x16_t)__rev0); | 52010 | __ret = (float64_t) __builtin_neon_vpminnmqd_f64(__rev0); |
| 60896 | return __ret; | 52011 | return __ret; |
| 60897 | } | 52012 | } |
| 60898 | #endif | 52013 | #endif |
| ... | @@ -60900,14 +52015,14 @@ __ai float64_t vpminnmqd_f64(float64x2_t __p0) { | ... | @@ -60900,14 +52015,14 @@ __ai float64_t vpminnmqd_f64(float64x2_t __p0) { |
| 60900 | #ifdef __LITTLE_ENDIAN__ | 52015 | #ifdef __LITTLE_ENDIAN__ |
| 60901 | __ai float32_t vpminnms_f32(float32x2_t __p0) { | 52016 | __ai float32_t vpminnms_f32(float32x2_t __p0) { |
| 60902 | float32_t __ret; | 52017 | float32_t __ret; |
| 60903 | __ret = (float32_t) __builtin_neon_vpminnms_f32((int8x8_t)__p0); | 52018 | __ret = (float32_t) __builtin_neon_vpminnms_f32(__p0); |
| 60904 | return __ret; | 52019 | return __ret; |
| 60905 | } | 52020 | } |
| 60906 | #else | 52021 | #else |
| 60907 | __ai float32_t vpminnms_f32(float32x2_t __p0) { | 52022 | __ai float32_t vpminnms_f32(float32x2_t __p0) { |
| 60908 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); | 52023 | float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0); |
| 60909 | float32_t __ret; | 52024 | float32_t __ret; |
| 60910 | __ret = (float32_t) __builtin_neon_vpminnms_f32((int8x8_t)__rev0); | 52025 | __ret = (float32_t) __builtin_neon_vpminnms_f32(__rev0); |
| 60911 | return __ret; | 52026 | return __ret; |
| 60912 | } | 52027 | } |
| 60913 | #endif | 52028 | #endif |
| ... | @@ -60928,226 +52043,81 @@ __ai int64x2_t vqabsq_s64(int64x2_t __p0) { | ... | @@ -60928,226 +52043,81 @@ __ai int64x2_t vqabsq_s64(int64x2_t __p0) { |
| 60928 | } | 52043 | } |
| 60929 | #endif | 52044 | #endif |
| 60930 | | 52045 | |
| 60931 | #ifdef __LITTLE_ENDIAN__ | | |
| 60932 | __ai int64x1_t vqabs_s64(int64x1_t __p0) { | 52046 | __ai int64x1_t vqabs_s64(int64x1_t __p0) { |
| 60933 | int64x1_t __ret; | 52047 | int64x1_t __ret; |
| 60934 | __ret = (int64x1_t) __builtin_neon_vqabs_v((int8x8_t)__p0, 3); | 52048 | __ret = (int64x1_t) __builtin_neon_vqabs_v((int8x8_t)__p0, 3); |
| 60935 | return __ret; | 52049 | return __ret; |
| 60936 | } | 52050 | } |
| 60937 | #else | | |
| 60938 | __ai int64x1_t vqabs_s64(int64x1_t __p0) { | | |
| 60939 | int64x1_t __ret; | | |
| 60940 | __ret = (int64x1_t) __builtin_neon_vqabs_v((int8x8_t)__p0, 3); | | |
| 60941 | return __ret; | | |
| 60942 | } | | |
| 60943 | #endif | | |
| 60944 | | | |
| 60945 | #ifdef __LITTLE_ENDIAN__ | | |
| 60946 | __ai int8_t vqabsb_s8(int8_t __p0) { | 52051 | __ai int8_t vqabsb_s8(int8_t __p0) { |
| 60947 | int8_t __ret; | 52052 | int8_t __ret; |
| 60948 | __ret = (int8_t) __builtin_neon_vqabsb_s8(__p0); | 52053 | __ret = (int8_t) __builtin_neon_vqabsb_s8(__p0); |
| 60949 | return __ret; | 52054 | return __ret; |
| 60950 | } | 52055 | } |
| 60951 | #else | | |
| 60952 | __ai int8_t vqabsb_s8(int8_t __p0) { | | |
| 60953 | int8_t __ret; | | |
| 60954 | __ret = (int8_t) __builtin_neon_vqabsb_s8(__p0); | | |
| 60955 | return __ret; | | |
| 60956 | } | | |
| 60957 | #endif | | |
| 60958 | | | |
| 60959 | #ifdef __LITTLE_ENDIAN__ | | |
| 60960 | __ai int32_t vqabss_s32(int32_t __p0) { | | |
| 60961 | int32_t __ret; | | |
| 60962 | __ret = (int32_t) __builtin_neon_vqabss_s32(__p0); | | |
| 60963 | return __ret; | | |
| 60964 | } | | |
| 60965 | #else | | |
| 60966 | __ai int32_t vqabss_s32(int32_t __p0) { | 52056 | __ai int32_t vqabss_s32(int32_t __p0) { |
| 60967 | int32_t __ret; | 52057 | int32_t __ret; |
| 60968 | __ret = (int32_t) __builtin_neon_vqabss_s32(__p0); | 52058 | __ret = (int32_t) __builtin_neon_vqabss_s32(__p0); |
| 60969 | return __ret; | 52059 | return __ret; |
| 60970 | } | 52060 | } |
| 60971 | #endif | | |
| 60972 | | | |
| 60973 | #ifdef __LITTLE_ENDIAN__ | | |
| 60974 | __ai int64_t vqabsd_s64(int64_t __p0) { | | |
| 60975 | int64_t __ret; | | |
| 60976 | __ret = (int64_t) __builtin_neon_vqabsd_s64(__p0); | | |
| 60977 | return __ret; | | |
| 60978 | } | | |
| 60979 | #else | | |
| 60980 | __ai int64_t vqabsd_s64(int64_t __p0) { | 52061 | __ai int64_t vqabsd_s64(int64_t __p0) { |
| 60981 | int64_t __ret; | 52062 | int64_t __ret; |
| 60982 | __ret = (int64_t) __builtin_neon_vqabsd_s64(__p0); | 52063 | __ret = (int64_t) __builtin_neon_vqabsd_s64(__p0); |
| 60983 | return __ret; | 52064 | return __ret; |
| 60984 | } | 52065 | } |
| 60985 | #endif | | |
| 60986 | | | |
| 60987 | #ifdef __LITTLE_ENDIAN__ | | |
| 60988 | __ai int16_t vqabsh_s16(int16_t __p0) { | 52066 | __ai int16_t vqabsh_s16(int16_t __p0) { |
| 60989 | int16_t __ret; | 52067 | int16_t __ret; |
| 60990 | __ret = (int16_t) __builtin_neon_vqabsh_s16(__p0); | 52068 | __ret = (int16_t) __builtin_neon_vqabsh_s16(__p0); |
| 60991 | return __ret; | 52069 | return __ret; |
| 60992 | } | 52070 | } |
| 60993 | #else | | |
| 60994 | __ai int16_t vqabsh_s16(int16_t __p0) { | | |
| 60995 | int16_t __ret; | | |
| 60996 | __ret = (int16_t) __builtin_neon_vqabsh_s16(__p0); | | |
| 60997 | return __ret; | | |
| 60998 | } | | |
| 60999 | #endif | | |
| 61000 | | | |
| 61001 | #ifdef __LITTLE_ENDIAN__ | | |
| 61002 | __ai uint8_t vqaddb_u8(uint8_t __p0, uint8_t __p1) { | 52071 | __ai uint8_t vqaddb_u8(uint8_t __p0, uint8_t __p1) { |
| 61003 | uint8_t __ret; | 52072 | uint8_t __ret; |
| 61004 | __ret = (uint8_t) __builtin_neon_vqaddb_u8(__p0, __p1); | 52073 | __ret = (uint8_t) __builtin_neon_vqaddb_u8(__p0, __p1); |
| 61005 | return __ret; | 52074 | return __ret; |
| 61006 | } | 52075 | } |
| 61007 | #else | | |
| 61008 | __ai uint8_t vqaddb_u8(uint8_t __p0, uint8_t __p1) { | | |
| 61009 | uint8_t __ret; | | |
| 61010 | __ret = (uint8_t) __builtin_neon_vqaddb_u8(__p0, __p1); | | |
| 61011 | return __ret; | | |
| 61012 | } | | |
| 61013 | #endif | | |
| 61014 | | | |
| 61015 | #ifdef __LITTLE_ENDIAN__ | | |
| 61016 | __ai uint32_t vqadds_u32(uint32_t __p0, uint32_t __p1) { | | |
| 61017 | uint32_t __ret; | | |
| 61018 | __ret = (uint32_t) __builtin_neon_vqadds_u32(__p0, __p1); | | |
| 61019 | return __ret; | | |
| 61020 | } | | |
| 61021 | #else | | |
| 61022 | __ai uint32_t vqadds_u32(uint32_t __p0, uint32_t __p1) { | 52076 | __ai uint32_t vqadds_u32(uint32_t __p0, uint32_t __p1) { |
| 61023 | uint32_t __ret; | 52077 | uint32_t __ret; |
| 61024 | __ret = (uint32_t) __builtin_neon_vqadds_u32(__p0, __p1); | 52078 | __ret = (uint32_t) __builtin_neon_vqadds_u32(__p0, __p1); |
| 61025 | return __ret; | 52079 | return __ret; |
| 61026 | } | 52080 | } |
| 61027 | #endif | | |
| 61028 | | | |
| 61029 | #ifdef __LITTLE_ENDIAN__ | | |
| 61030 | __ai uint64_t vqaddd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 61031 | uint64_t __ret; | | |
| 61032 | __ret = (uint64_t) __builtin_neon_vqaddd_u64(__p0, __p1); | | |
| 61033 | return __ret; | | |
| 61034 | } | | |
| 61035 | #else | | |
| 61036 | __ai uint64_t vqaddd_u64(uint64_t __p0, uint64_t __p1) { | 52081 | __ai uint64_t vqaddd_u64(uint64_t __p0, uint64_t __p1) { |
| 61037 | uint64_t __ret; | 52082 | uint64_t __ret; |
| 61038 | __ret = (uint64_t) __builtin_neon_vqaddd_u64(__p0, __p1); | 52083 | __ret = (uint64_t) __builtin_neon_vqaddd_u64(__p0, __p1); |
| 61039 | return __ret; | 52084 | return __ret; |
| 61040 | } | 52085 | } |
| 61041 | #endif | | |
| 61042 | | | |
| 61043 | #ifdef __LITTLE_ENDIAN__ | | |
| 61044 | __ai uint16_t vqaddh_u16(uint16_t __p0, uint16_t __p1) { | | |
| 61045 | uint16_t __ret; | | |
| 61046 | __ret = (uint16_t) __builtin_neon_vqaddh_u16(__p0, __p1); | | |
| 61047 | return __ret; | | |
| 61048 | } | | |
| 61049 | #else | | |
| 61050 | __ai uint16_t vqaddh_u16(uint16_t __p0, uint16_t __p1) { | 52086 | __ai uint16_t vqaddh_u16(uint16_t __p0, uint16_t __p1) { |
| 61051 | uint16_t __ret; | 52087 | uint16_t __ret; |
| 61052 | __ret = (uint16_t) __builtin_neon_vqaddh_u16(__p0, __p1); | 52088 | __ret = (uint16_t) __builtin_neon_vqaddh_u16(__p0, __p1); |
| 61053 | return __ret; | 52089 | return __ret; |
| 61054 | } | 52090 | } |
| 61055 | #endif | | |
| 61056 | | | |
| 61057 | #ifdef __LITTLE_ENDIAN__ | | |
| 61058 | __ai int8_t vqaddb_s8(int8_t __p0, int8_t __p1) { | | |
| 61059 | int8_t __ret; | | |
| 61060 | __ret = (int8_t) __builtin_neon_vqaddb_s8(__p0, __p1); | | |
| 61061 | return __ret; | | |
| 61062 | } | | |
| 61063 | #else | | |
| 61064 | __ai int8_t vqaddb_s8(int8_t __p0, int8_t __p1) { | 52091 | __ai int8_t vqaddb_s8(int8_t __p0, int8_t __p1) { |
| 61065 | int8_t __ret; | 52092 | int8_t __ret; |
| 61066 | __ret = (int8_t) __builtin_neon_vqaddb_s8(__p0, __p1); | 52093 | __ret = (int8_t) __builtin_neon_vqaddb_s8(__p0, __p1); |
| 61067 | return __ret; | 52094 | return __ret; |
| 61068 | } | 52095 | } |
| 61069 | #endif | | |
| 61070 | | | |
| 61071 | #ifdef __LITTLE_ENDIAN__ | | |
| 61072 | __ai int32_t vqadds_s32(int32_t __p0, int32_t __p1) { | | |
| 61073 | int32_t __ret; | | |
| 61074 | __ret = (int32_t) __builtin_neon_vqadds_s32(__p0, __p1); | | |
| 61075 | return __ret; | | |
| 61076 | } | | |
| 61077 | #else | | |
| 61078 | __ai int32_t vqadds_s32(int32_t __p0, int32_t __p1) { | 52096 | __ai int32_t vqadds_s32(int32_t __p0, int32_t __p1) { |
| 61079 | int32_t __ret; | 52097 | int32_t __ret; |
| 61080 | __ret = (int32_t) __builtin_neon_vqadds_s32(__p0, __p1); | 52098 | __ret = (int32_t) __builtin_neon_vqadds_s32(__p0, __p1); |
| 61081 | return __ret; | 52099 | return __ret; |
| 61082 | } | 52100 | } |
| 61083 | __ai int32_t __noswap_vqadds_s32(int32_t __p0, int32_t __p1) { | | |
| 61084 | int32_t __ret; | | |
| 61085 | __ret = (int32_t) __builtin_neon_vqadds_s32(__p0, __p1); | | |
| 61086 | return __ret; | | |
| 61087 | } | | |
| 61088 | #endif | | |
| 61089 | | | |
| 61090 | #ifdef __LITTLE_ENDIAN__ | | |
| 61091 | __ai int64_t vqaddd_s64(int64_t __p0, int64_t __p1) { | 52101 | __ai int64_t vqaddd_s64(int64_t __p0, int64_t __p1) { |
| 61092 | int64_t __ret; | 52102 | int64_t __ret; |
| 61093 | __ret = (int64_t) __builtin_neon_vqaddd_s64(__p0, __p1); | 52103 | __ret = (int64_t) __builtin_neon_vqaddd_s64(__p0, __p1); |
| 61094 | return __ret; | 52104 | return __ret; |
| 61095 | } | 52105 | } |
| 61096 | #else | | |
| 61097 | __ai int64_t vqaddd_s64(int64_t __p0, int64_t __p1) { | | |
| 61098 | int64_t __ret; | | |
| 61099 | __ret = (int64_t) __builtin_neon_vqaddd_s64(__p0, __p1); | | |
| 61100 | return __ret; | | |
| 61101 | } | | |
| 61102 | #endif | | |
| 61103 | | | |
| 61104 | #ifdef __LITTLE_ENDIAN__ | | |
| 61105 | __ai int16_t vqaddh_s16(int16_t __p0, int16_t __p1) { | | |
| 61106 | int16_t __ret; | | |
| 61107 | __ret = (int16_t) __builtin_neon_vqaddh_s16(__p0, __p1); | | |
| 61108 | return __ret; | | |
| 61109 | } | | |
| 61110 | #else | | |
| 61111 | __ai int16_t vqaddh_s16(int16_t __p0, int16_t __p1) { | 52106 | __ai int16_t vqaddh_s16(int16_t __p0, int16_t __p1) { |
| 61112 | int16_t __ret; | 52107 | int16_t __ret; |
| 61113 | __ret = (int16_t) __builtin_neon_vqaddh_s16(__p0, __p1); | 52108 | __ret = (int16_t) __builtin_neon_vqaddh_s16(__p0, __p1); |
| 61114 | return __ret; | 52109 | return __ret; |
| 61115 | } | 52110 | } |
| 61116 | __ai int16_t __noswap_vqaddh_s16(int16_t __p0, int16_t __p1) { | | |
| 61117 | int16_t __ret; | | |
| 61118 | __ret = (int16_t) __builtin_neon_vqaddh_s16(__p0, __p1); | | |
| 61119 | return __ret; | | |
| 61120 | } | | |
| 61121 | #endif | | |
| 61122 | | | |
| 61123 | #ifdef __LITTLE_ENDIAN__ | | |
| 61124 | __ai int64_t vqdmlals_s32(int64_t __p0, int32_t __p1, int32_t __p2) { | | |
| 61125 | int64_t __ret; | | |
| 61126 | __ret = (int64_t) __builtin_neon_vqdmlals_s32(__p0, __p1, __p2); | | |
| 61127 | return __ret; | | |
| 61128 | } | | |
| 61129 | #else | | |
| 61130 | __ai int64_t vqdmlals_s32(int64_t __p0, int32_t __p1, int32_t __p2) { | 52111 | __ai int64_t vqdmlals_s32(int64_t __p0, int32_t __p1, int32_t __p2) { |
| 61131 | int64_t __ret; | 52112 | int64_t __ret; |
| 61132 | __ret = (int64_t) __builtin_neon_vqdmlals_s32(__p0, __p1, __p2); | 52113 | __ret = (int64_t) __builtin_neon_vqdmlals_s32(__p0, __p1, __p2); |
| 61133 | return __ret; | 52114 | return __ret; |
| 61134 | } | 52115 | } |
| 61135 | #endif | | |
| 61136 | | | |
| 61137 | #ifdef __LITTLE_ENDIAN__ | | |
| 61138 | __ai int32_t vqdmlalh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { | 52116 | __ai int32_t vqdmlalh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { |
| 61139 | int32_t __ret; | 52117 | int32_t __ret; |
| 61140 | __ret = (int32_t) __builtin_neon_vqdmlalh_s16(__p0, __p1, __p2); | 52118 | __ret = (int32_t) __builtin_neon_vqdmlalh_s16(__p0, __p1, __p2); |
| 61141 | return __ret; | 52119 | return __ret; |
| 61142 | } | 52120 | } |
| 61143 | #else | | |
| 61144 | __ai int32_t vqdmlalh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { | | |
| 61145 | int32_t __ret; | | |
| 61146 | __ret = (int32_t) __builtin_neon_vqdmlalh_s16(__p0, __p1, __p2); | | |
| 61147 | return __ret; | | |
| 61148 | } | | |
| 61149 | #endif | | |
| 61150 | | | |
| 61151 | #ifdef __LITTLE_ENDIAN__ | 52121 | #ifdef __LITTLE_ENDIAN__ |
| 61152 | __ai int64x2_t vqdmlal_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { | 52122 | __ai int64x2_t vqdmlal_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 61153 | int64x2_t __ret; | 52123 | int64x2_t __ret; |
| ... | @@ -61320,7 +52290,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61320,7 +52290,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61320 | int32_t __s1 = __p1; \ | 52290 | int32_t __s1 = __p1; \ |
| 61321 | int32x2_t __s2 = __p2; \ | 52291 | int32x2_t __s2 = __p2; \ |
| 61322 | int64_t __ret; \ | 52292 | int64_t __ret; \ |
| 61323 | __ret = (int64_t) __builtin_neon_vqdmlals_lane_s32(__s0, __s1, (int8x8_t)__s2, __p3); \ | 52293 | __ret = (int64_t) __builtin_neon_vqdmlals_lane_s32(__s0, __s1, __s2, __p3); \ |
| 61324 | __ret; \ | 52294 | __ret; \ |
| 61325 | }) | 52295 | }) |
| 61326 | #else | 52296 | #else |
| ... | @@ -61330,7 +52300,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61330,7 +52300,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61330 | int32x2_t __s2 = __p2; \ | 52300 | int32x2_t __s2 = __p2; \ |
| 61331 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 52301 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| 61332 | int64_t __ret; \ | 52302 | int64_t __ret; \ |
| 61333 | __ret = (int64_t) __builtin_neon_vqdmlals_lane_s32(__s0, __s1, (int8x8_t)__rev2, __p3); \ | 52303 | __ret = (int64_t) __builtin_neon_vqdmlals_lane_s32(__s0, __s1, __rev2, __p3); \ |
| 61334 | __ret; \ | 52304 | __ret; \ |
| 61335 | }) | 52305 | }) |
| 61336 | #endif | 52306 | #endif |
| ... | @@ -61341,7 +52311,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61341,7 +52311,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61341 | int16_t __s1 = __p1; \ | 52311 | int16_t __s1 = __p1; \ |
| 61342 | int16x4_t __s2 = __p2; \ | 52312 | int16x4_t __s2 = __p2; \ |
| 61343 | int32_t __ret; \ | 52313 | int32_t __ret; \ |
| 61344 | __ret = (int32_t) __builtin_neon_vqdmlalh_lane_s16(__s0, __s1, (int8x8_t)__s2, __p3); \ | 52314 | __ret = (int32_t) __builtin_neon_vqdmlalh_lane_s16(__s0, __s1, __s2, __p3); \ |
| 61345 | __ret; \ | 52315 | __ret; \ |
| 61346 | }) | 52316 | }) |
| 61347 | #else | 52317 | #else |
| ... | @@ -61351,7 +52321,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61351,7 +52321,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61351 | int16x4_t __s2 = __p2; \ | 52321 | int16x4_t __s2 = __p2; \ |
| 61352 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 52322 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 61353 | int32_t __ret; \ | 52323 | int32_t __ret; \ |
| 61354 | __ret = (int32_t) __builtin_neon_vqdmlalh_lane_s16(__s0, __s1, (int8x8_t)__rev2, __p3); \ | 52324 | __ret = (int32_t) __builtin_neon_vqdmlalh_lane_s16(__s0, __s1, __rev2, __p3); \ |
| 61355 | __ret; \ | 52325 | __ret; \ |
| 61356 | }) | 52326 | }) |
| 61357 | #endif | 52327 | #endif |
| ... | @@ -61362,7 +52332,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61362,7 +52332,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61362 | int32_t __s1 = __p1; \ | 52332 | int32_t __s1 = __p1; \ |
| 61363 | int32x4_t __s2 = __p2; \ | 52333 | int32x4_t __s2 = __p2; \ |
| 61364 | int64_t __ret; \ | 52334 | int64_t __ret; \ |
| 61365 | __ret = (int64_t) __builtin_neon_vqdmlals_laneq_s32(__s0, __s1, (int8x16_t)__s2, __p3); \ | 52335 | __ret = (int64_t) __builtin_neon_vqdmlals_laneq_s32(__s0, __s1, __s2, __p3); \ |
| 61366 | __ret; \ | 52336 | __ret; \ |
| 61367 | }) | 52337 | }) |
| 61368 | #else | 52338 | #else |
| ... | @@ -61372,7 +52342,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61372,7 +52342,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61372 | int32x4_t __s2 = __p2; \ | 52342 | int32x4_t __s2 = __p2; \ |
| 61373 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 52343 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 61374 | int64_t __ret; \ | 52344 | int64_t __ret; \ |
| 61375 | __ret = (int64_t) __builtin_neon_vqdmlals_laneq_s32(__s0, __s1, (int8x16_t)__rev2, __p3); \ | 52345 | __ret = (int64_t) __builtin_neon_vqdmlals_laneq_s32(__s0, __s1, __rev2, __p3); \ |
| 61376 | __ret; \ | 52346 | __ret; \ |
| 61377 | }) | 52347 | }) |
| 61378 | #endif | 52348 | #endif |
| ... | @@ -61383,7 +52353,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61383,7 +52353,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61383 | int16_t __s1 = __p1; \ | 52353 | int16_t __s1 = __p1; \ |
| 61384 | int16x8_t __s2 = __p2; \ | 52354 | int16x8_t __s2 = __p2; \ |
| 61385 | int32_t __ret; \ | 52355 | int32_t __ret; \ |
| 61386 | __ret = (int32_t) __builtin_neon_vqdmlalh_laneq_s16(__s0, __s1, (int8x16_t)__s2, __p3); \ | 52356 | __ret = (int32_t) __builtin_neon_vqdmlalh_laneq_s16(__s0, __s1, __s2, __p3); \ |
| 61387 | __ret; \ | 52357 | __ret; \ |
| 61388 | }) | 52358 | }) |
| 61389 | #else | 52359 | #else |
| ... | @@ -61393,7 +52363,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61393,7 +52363,7 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61393 | int16x8_t __s2 = __p2; \ | 52363 | int16x8_t __s2 = __p2; \ |
| 61394 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52364 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61395 | int32_t __ret; \ | 52365 | int32_t __ret; \ |
| 61396 | __ret = (int32_t) __builtin_neon_vqdmlalh_laneq_s16(__s0, __s1, (int8x16_t)__rev2, __p3); \ | 52366 | __ret = (int32_t) __builtin_neon_vqdmlalh_laneq_s16(__s0, __s1, __rev2, __p3); \ |
| 61397 | __ret; \ | 52367 | __ret; \ |
| 61398 | }) | 52368 | }) |
| 61399 | #endif | 52369 | #endif |
| ... | @@ -61446,34 +52416,16 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61446,34 +52416,16 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61446 | }) | 52416 | }) |
| 61447 | #endif | 52417 | #endif |
| 61448 | | 52418 | |
| 61449 | #ifdef __LITTLE_ENDIAN__ | | |
| 61450 | __ai int64_t vqdmlsls_s32(int64_t __p0, int32_t __p1, int32_t __p2) { | 52419 | __ai int64_t vqdmlsls_s32(int64_t __p0, int32_t __p1, int32_t __p2) { |
| 61451 | int64_t __ret; | 52420 | int64_t __ret; |
| 61452 | __ret = (int64_t) __builtin_neon_vqdmlsls_s32(__p0, __p1, __p2); | 52421 | __ret = (int64_t) __builtin_neon_vqdmlsls_s32(__p0, __p1, __p2); |
| 61453 | return __ret; | 52422 | return __ret; |
| 61454 | } | 52423 | } |
| 61455 | #else | | |
| 61456 | __ai int64_t vqdmlsls_s32(int64_t __p0, int32_t __p1, int32_t __p2) { | | |
| 61457 | int64_t __ret; | | |
| 61458 | __ret = (int64_t) __builtin_neon_vqdmlsls_s32(__p0, __p1, __p2); | | |
| 61459 | return __ret; | | |
| 61460 | } | | |
| 61461 | #endif | | |
| 61462 | | | |
| 61463 | #ifdef __LITTLE_ENDIAN__ | | |
| 61464 | __ai int32_t vqdmlslh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { | 52424 | __ai int32_t vqdmlslh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { |
| 61465 | int32_t __ret; | 52425 | int32_t __ret; |
| 61466 | __ret = (int32_t) __builtin_neon_vqdmlslh_s16(__p0, __p1, __p2); | 52426 | __ret = (int32_t) __builtin_neon_vqdmlslh_s16(__p0, __p1, __p2); |
| 61467 | return __ret; | 52427 | return __ret; |
| 61468 | } | 52428 | } |
| 61469 | #else | | |
| 61470 | __ai int32_t vqdmlslh_s16(int32_t __p0, int16_t __p1, int16_t __p2) { | | |
| 61471 | int32_t __ret; | | |
| 61472 | __ret = (int32_t) __builtin_neon_vqdmlslh_s16(__p0, __p1, __p2); | | |
| 61473 | return __ret; | | |
| 61474 | } | | |
| 61475 | #endif | | |
| 61476 | | | |
| 61477 | #ifdef __LITTLE_ENDIAN__ | 52429 | #ifdef __LITTLE_ENDIAN__ |
| 61478 | __ai int64x2_t vqdmlsl_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { | 52430 | __ai int64x2_t vqdmlsl_high_s32(int64x2_t __p0, int32x4_t __p1, int32x4_t __p2) { |
| 61479 | int64x2_t __ret; | 52431 | int64x2_t __ret; |
| ... | @@ -61646,7 +52598,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61646,7 +52598,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61646 | int32_t __s1 = __p1; \ | 52598 | int32_t __s1 = __p1; \ |
| 61647 | int32x2_t __s2 = __p2; \ | 52599 | int32x2_t __s2 = __p2; \ |
| 61648 | int64_t __ret; \ | 52600 | int64_t __ret; \ |
| 61649 | __ret = (int64_t) __builtin_neon_vqdmlsls_lane_s32(__s0, __s1, (int8x8_t)__s2, __p3); \ | 52601 | __ret = (int64_t) __builtin_neon_vqdmlsls_lane_s32(__s0, __s1, __s2, __p3); \ |
| 61650 | __ret; \ | 52602 | __ret; \ |
| 61651 | }) | 52603 | }) |
| 61652 | #else | 52604 | #else |
| ... | @@ -61656,7 +52608,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61656,7 +52608,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61656 | int32x2_t __s2 = __p2; \ | 52608 | int32x2_t __s2 = __p2; \ |
| 61657 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ | 52609 | int32x2_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 1, 0); \ |
| 61658 | int64_t __ret; \ | 52610 | int64_t __ret; \ |
| 61659 | __ret = (int64_t) __builtin_neon_vqdmlsls_lane_s32(__s0, __s1, (int8x8_t)__rev2, __p3); \ | 52611 | __ret = (int64_t) __builtin_neon_vqdmlsls_lane_s32(__s0, __s1, __rev2, __p3); \ |
| 61660 | __ret; \ | 52612 | __ret; \ |
| 61661 | }) | 52613 | }) |
| 61662 | #endif | 52614 | #endif |
| ... | @@ -61667,7 +52619,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61667,7 +52619,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61667 | int16_t __s1 = __p1; \ | 52619 | int16_t __s1 = __p1; \ |
| 61668 | int16x4_t __s2 = __p2; \ | 52620 | int16x4_t __s2 = __p2; \ |
| 61669 | int32_t __ret; \ | 52621 | int32_t __ret; \ |
| 61670 | __ret = (int32_t) __builtin_neon_vqdmlslh_lane_s16(__s0, __s1, (int8x8_t)__s2, __p3); \ | 52622 | __ret = (int32_t) __builtin_neon_vqdmlslh_lane_s16(__s0, __s1, __s2, __p3); \ |
| 61671 | __ret; \ | 52623 | __ret; \ |
| 61672 | }) | 52624 | }) |
| 61673 | #else | 52625 | #else |
| ... | @@ -61677,7 +52629,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61677,7 +52629,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61677 | int16x4_t __s2 = __p2; \ | 52629 | int16x4_t __s2 = __p2; \ |
| 61678 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 52630 | int16x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 61679 | int32_t __ret; \ | 52631 | int32_t __ret; \ |
| 61680 | __ret = (int32_t) __builtin_neon_vqdmlslh_lane_s16(__s0, __s1, (int8x8_t)__rev2, __p3); \ | 52632 | __ret = (int32_t) __builtin_neon_vqdmlslh_lane_s16(__s0, __s1, __rev2, __p3); \ |
| 61681 | __ret; \ | 52633 | __ret; \ |
| 61682 | }) | 52634 | }) |
| 61683 | #endif | 52635 | #endif |
| ... | @@ -61688,7 +52640,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61688,7 +52640,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61688 | int32_t __s1 = __p1; \ | 52640 | int32_t __s1 = __p1; \ |
| 61689 | int32x4_t __s2 = __p2; \ | 52641 | int32x4_t __s2 = __p2; \ |
| 61690 | int64_t __ret; \ | 52642 | int64_t __ret; \ |
| 61691 | __ret = (int64_t) __builtin_neon_vqdmlsls_laneq_s32(__s0, __s1, (int8x16_t)__s2, __p3); \ | 52643 | __ret = (int64_t) __builtin_neon_vqdmlsls_laneq_s32(__s0, __s1, __s2, __p3); \ |
| 61692 | __ret; \ | 52644 | __ret; \ |
| 61693 | }) | 52645 | }) |
| 61694 | #else | 52646 | #else |
| ... | @@ -61698,7 +52650,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61698,7 +52650,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61698 | int32x4_t __s2 = __p2; \ | 52650 | int32x4_t __s2 = __p2; \ |
| 61699 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ | 52651 | int32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \ |
| 61700 | int64_t __ret; \ | 52652 | int64_t __ret; \ |
| 61701 | __ret = (int64_t) __builtin_neon_vqdmlsls_laneq_s32(__s0, __s1, (int8x16_t)__rev2, __p3); \ | 52653 | __ret = (int64_t) __builtin_neon_vqdmlsls_laneq_s32(__s0, __s1, __rev2, __p3); \ |
| 61702 | __ret; \ | 52654 | __ret; \ |
| 61703 | }) | 52655 | }) |
| 61704 | #endif | 52656 | #endif |
| ... | @@ -61709,7 +52661,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61709,7 +52661,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61709 | int16_t __s1 = __p1; \ | 52661 | int16_t __s1 = __p1; \ |
| 61710 | int16x8_t __s2 = __p2; \ | 52662 | int16x8_t __s2 = __p2; \ |
| 61711 | int32_t __ret; \ | 52663 | int32_t __ret; \ |
| 61712 | __ret = (int32_t) __builtin_neon_vqdmlslh_laneq_s16(__s0, __s1, (int8x16_t)__s2, __p3); \ | 52664 | __ret = (int32_t) __builtin_neon_vqdmlslh_laneq_s16(__s0, __s1, __s2, __p3); \ |
| 61713 | __ret; \ | 52665 | __ret; \ |
| 61714 | }) | 52666 | }) |
| 61715 | #else | 52667 | #else |
| ... | @@ -61719,7 +52671,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61719,7 +52671,7 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61719 | int16x8_t __s2 = __p2; \ | 52671 | int16x8_t __s2 = __p2; \ |
| 61720 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52672 | int16x8_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61721 | int32_t __ret; \ | 52673 | int32_t __ret; \ |
| 61722 | __ret = (int32_t) __builtin_neon_vqdmlslh_laneq_s16(__s0, __s1, (int8x16_t)__rev2, __p3); \ | 52674 | __ret = (int32_t) __builtin_neon_vqdmlslh_laneq_s16(__s0, __s1, __rev2, __p3); \ |
| 61723 | __ret; \ | 52675 | __ret; \ |
| 61724 | }) | 52676 | }) |
| 61725 | #endif | 52677 | #endif |
| ... | @@ -61772,117 +52724,89 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) | ... | @@ -61772,117 +52724,89 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 61772 | }) | 52724 | }) |
| 61773 | #endif | 52725 | #endif |
| 61774 | | 52726 | |
| 61775 | #ifdef __LITTLE_ENDIAN__ | | |
| 61776 | __ai int32_t vqdmulhs_s32(int32_t __p0, int32_t __p1) { | | |
| 61777 | int32_t __ret; | | |
| 61778 | __ret = (int32_t) __builtin_neon_vqdmulhs_s32(__p0, __p1); | | |
| 61779 | return __ret; | | |
| 61780 | } | | |
| 61781 | #else | | |
| 61782 | __ai int32_t vqdmulhs_s32(int32_t __p0, int32_t __p1) { | 52727 | __ai int32_t vqdmulhs_s32(int32_t __p0, int32_t __p1) { |
| 61783 | int32_t __ret; | 52728 | int32_t __ret; |
| 61784 | __ret = (int32_t) __builtin_neon_vqdmulhs_s32(__p0, __p1); | 52729 | __ret = (int32_t) __builtin_neon_vqdmulhs_s32(__p0, __p1); |
| 61785 | return __ret; | 52730 | return __ret; |
| 61786 | } | 52731 | } |
| 61787 | __ai int32_t __noswap_vqdmulhs_s32(int32_t __p0, int32_t __p1) { | | |
| 61788 | int32_t __ret; | | |
| 61789 | __ret = (int32_t) __builtin_neon_vqdmulhs_s32(__p0, __p1); | | |
| 61790 | return __ret; | | |
| 61791 | } | | |
| 61792 | #endif | | |
| 61793 | | | |
| 61794 | #ifdef __LITTLE_ENDIAN__ | | |
| 61795 | __ai int16_t vqdmulhh_s16(int16_t __p0, int16_t __p1) { | | |
| 61796 | int16_t __ret; | | |
| 61797 | __ret = (int16_t) __builtin_neon_vqdmulhh_s16(__p0, __p1); | | |
| 61798 | return __ret; | | |
| 61799 | } | | |
| 61800 | #else | | |
| 61801 | __ai int16_t vqdmulhh_s16(int16_t __p0, int16_t __p1) { | 52732 | __ai int16_t vqdmulhh_s16(int16_t __p0, int16_t __p1) { |
| 61802 | int16_t __ret; | 52733 | int16_t __ret; |
| 61803 | __ret = (int16_t) __builtin_neon_vqdmulhh_s16(__p0, __p1); | 52734 | __ret = (int16_t) __builtin_neon_vqdmulhh_s16(__p0, __p1); |
| 61804 | return __ret; | 52735 | return __ret; |
| 61805 | } | 52736 | } |
| 61806 | __ai int16_t __noswap_vqdmulhh_s16(int16_t __p0, int16_t __p1) { | | |
| 61807 | int16_t __ret; | | |
| 61808 | __ret = (int16_t) __builtin_neon_vqdmulhh_s16(__p0, __p1); | | |
| 61809 | return __ret; | | |
| 61810 | } | | |
| 61811 | #endif | | |
| 61812 | | | |
| 61813 | #ifdef __LITTLE_ENDIAN__ | 52737 | #ifdef __LITTLE_ENDIAN__ |
| 61814 | #define vqdmulhs_lane_s32(__p0_158, __p1_158, __p2_158) __extension__ ({ \ | 52738 | #define vqdmulhs_lane_s32(__p0_152, __p1_152, __p2_152) __extension__ ({ \ |
| 61815 | int32_t __s0_158 = __p0_158; \ | 52739 | int32_t __s0_152 = __p0_152; \ |
| 61816 | int32x2_t __s1_158 = __p1_158; \ | 52740 | int32x2_t __s1_152 = __p1_152; \ |
| 61817 | int32_t __ret_158; \ | 52741 | int32_t __ret_152; \ |
| 61818 | __ret_158 = vqdmulhs_s32(__s0_158, vget_lane_s32(__s1_158, __p2_158)); \ | 52742 | __ret_152 = vqdmulhs_s32(__s0_152, vget_lane_s32(__s1_152, __p2_152)); \ |
| 61819 | __ret_158; \ | 52743 | __ret_152; \ |
| 61820 | }) | 52744 | }) |
| 61821 | #else | 52745 | #else |
| 61822 | #define vqdmulhs_lane_s32(__p0_159, __p1_159, __p2_159) __extension__ ({ \ | 52746 | #define vqdmulhs_lane_s32(__p0_153, __p1_153, __p2_153) __extension__ ({ \ |
| 61823 | int32_t __s0_159 = __p0_159; \ | 52747 | int32_t __s0_153 = __p0_153; \ |
| 61824 | int32x2_t __s1_159 = __p1_159; \ | 52748 | int32x2_t __s1_153 = __p1_153; \ |
| 61825 | int32x2_t __rev1_159; __rev1_159 = __builtin_shufflevector(__s1_159, __s1_159, 1, 0); \ | 52749 | int32x2_t __rev1_153; __rev1_153 = __builtin_shufflevector(__s1_153, __s1_153, 1, 0); \ |
| 61826 | int32_t __ret_159; \ | 52750 | int32_t __ret_153; \ |
| 61827 | __ret_159 = __noswap_vqdmulhs_s32(__s0_159, __noswap_vget_lane_s32(__rev1_159, __p2_159)); \ | 52751 | __ret_153 = vqdmulhs_s32(__s0_153, __noswap_vget_lane_s32(__rev1_153, __p2_153)); \ |
| 61828 | __ret_159; \ | 52752 | __ret_153; \ |
| 61829 | }) | 52753 | }) |
| 61830 | #endif | 52754 | #endif |
| 61831 | | 52755 | |
| 61832 | #ifdef __LITTLE_ENDIAN__ | 52756 | #ifdef __LITTLE_ENDIAN__ |
| 61833 | #define vqdmulhh_lane_s16(__p0_160, __p1_160, __p2_160) __extension__ ({ \ | 52757 | #define vqdmulhh_lane_s16(__p0_154, __p1_154, __p2_154) __extension__ ({ \ |
| 61834 | int16_t __s0_160 = __p0_160; \ | 52758 | int16_t __s0_154 = __p0_154; \ |
| 61835 | int16x4_t __s1_160 = __p1_160; \ | 52759 | int16x4_t __s1_154 = __p1_154; \ |
| 61836 | int16_t __ret_160; \ | 52760 | int16_t __ret_154; \ |
| 61837 | __ret_160 = vqdmulhh_s16(__s0_160, vget_lane_s16(__s1_160, __p2_160)); \ | 52761 | __ret_154 = vqdmulhh_s16(__s0_154, vget_lane_s16(__s1_154, __p2_154)); \ |
| 61838 | __ret_160; \ | 52762 | __ret_154; \ |
| 61839 | }) | 52763 | }) |
| 61840 | #else | 52764 | #else |
| 61841 | #define vqdmulhh_lane_s16(__p0_161, __p1_161, __p2_161) __extension__ ({ \ | 52765 | #define vqdmulhh_lane_s16(__p0_155, __p1_155, __p2_155) __extension__ ({ \ |
| 61842 | int16_t __s0_161 = __p0_161; \ | 52766 | int16_t __s0_155 = __p0_155; \ |
| 61843 | int16x4_t __s1_161 = __p1_161; \ | 52767 | int16x4_t __s1_155 = __p1_155; \ |
| 61844 | int16x4_t __rev1_161; __rev1_161 = __builtin_shufflevector(__s1_161, __s1_161, 3, 2, 1, 0); \ | 52768 | int16x4_t __rev1_155; __rev1_155 = __builtin_shufflevector(__s1_155, __s1_155, 3, 2, 1, 0); \ |
| 61845 | int16_t __ret_161; \ | 52769 | int16_t __ret_155; \ |
| 61846 | __ret_161 = __noswap_vqdmulhh_s16(__s0_161, __noswap_vget_lane_s16(__rev1_161, __p2_161)); \ | 52770 | __ret_155 = vqdmulhh_s16(__s0_155, __noswap_vget_lane_s16(__rev1_155, __p2_155)); \ |
| 61847 | __ret_161; \ | 52771 | __ret_155; \ |
| 61848 | }) | 52772 | }) |
| 61849 | #endif | 52773 | #endif |
| 61850 | | 52774 | |
| 61851 | #ifdef __LITTLE_ENDIAN__ | 52775 | #ifdef __LITTLE_ENDIAN__ |
| 61852 | #define vqdmulhs_laneq_s32(__p0_162, __p1_162, __p2_162) __extension__ ({ \ | 52776 | #define vqdmulhs_laneq_s32(__p0_156, __p1_156, __p2_156) __extension__ ({ \ |
| 61853 | int32_t __s0_162 = __p0_162; \ | 52777 | int32_t __s0_156 = __p0_156; \ |
| 61854 | int32x4_t __s1_162 = __p1_162; \ | 52778 | int32x4_t __s1_156 = __p1_156; \ |
| 61855 | int32_t __ret_162; \ | 52779 | int32_t __ret_156; \ |
| 61856 | __ret_162 = vqdmulhs_s32(__s0_162, vgetq_lane_s32(__s1_162, __p2_162)); \ | 52780 | __ret_156 = vqdmulhs_s32(__s0_156, vgetq_lane_s32(__s1_156, __p2_156)); \ |
| 61857 | __ret_162; \ | 52781 | __ret_156; \ |
| 61858 | }) | 52782 | }) |
| 61859 | #else | 52783 | #else |
| 61860 | #define vqdmulhs_laneq_s32(__p0_163, __p1_163, __p2_163) __extension__ ({ \ | 52784 | #define vqdmulhs_laneq_s32(__p0_157, __p1_157, __p2_157) __extension__ ({ \ |
| 61861 | int32_t __s0_163 = __p0_163; \ | 52785 | int32_t __s0_157 = __p0_157; \ |
| 61862 | int32x4_t __s1_163 = __p1_163; \ | 52786 | int32x4_t __s1_157 = __p1_157; \ |
| 61863 | int32x4_t __rev1_163; __rev1_163 = __builtin_shufflevector(__s1_163, __s1_163, 3, 2, 1, 0); \ | 52787 | int32x4_t __rev1_157; __rev1_157 = __builtin_shufflevector(__s1_157, __s1_157, 3, 2, 1, 0); \ |
| 61864 | int32_t __ret_163; \ | 52788 | int32_t __ret_157; \ |
| 61865 | __ret_163 = __noswap_vqdmulhs_s32(__s0_163, __noswap_vgetq_lane_s32(__rev1_163, __p2_163)); \ | 52789 | __ret_157 = vqdmulhs_s32(__s0_157, __noswap_vgetq_lane_s32(__rev1_157, __p2_157)); \ |
| 61866 | __ret_163; \ | 52790 | __ret_157; \ |
| 61867 | }) | 52791 | }) |
| 61868 | #endif | 52792 | #endif |
| 61869 | | 52793 | |
| 61870 | #ifdef __LITTLE_ENDIAN__ | 52794 | #ifdef __LITTLE_ENDIAN__ |
| 61871 | #define vqdmulhh_laneq_s16(__p0_164, __p1_164, __p2_164) __extension__ ({ \ | 52795 | #define vqdmulhh_laneq_s16(__p0_158, __p1_158, __p2_158) __extension__ ({ \ |
| 61872 | int16_t __s0_164 = __p0_164; \ | 52796 | int16_t __s0_158 = __p0_158; \ |
| 61873 | int16x8_t __s1_164 = __p1_164; \ | 52797 | int16x8_t __s1_158 = __p1_158; \ |
| 61874 | int16_t __ret_164; \ | 52798 | int16_t __ret_158; \ |
| 61875 | __ret_164 = vqdmulhh_s16(__s0_164, vgetq_lane_s16(__s1_164, __p2_164)); \ | 52799 | __ret_158 = vqdmulhh_s16(__s0_158, vgetq_lane_s16(__s1_158, __p2_158)); \ |
| 61876 | __ret_164; \ | 52800 | __ret_158; \ |
| 61877 | }) | 52801 | }) |
| 61878 | #else | 52802 | #else |
| 61879 | #define vqdmulhh_laneq_s16(__p0_165, __p1_165, __p2_165) __extension__ ({ \ | 52803 | #define vqdmulhh_laneq_s16(__p0_159, __p1_159, __p2_159) __extension__ ({ \ |
| 61880 | int16_t __s0_165 = __p0_165; \ | 52804 | int16_t __s0_159 = __p0_159; \ |
| 61881 | int16x8_t __s1_165 = __p1_165; \ | 52805 | int16x8_t __s1_159 = __p1_159; \ |
| 61882 | int16x8_t __rev1_165; __rev1_165 = __builtin_shufflevector(__s1_165, __s1_165, 7, 6, 5, 4, 3, 2, 1, 0); \ | 52806 | int16x8_t __rev1_159; __rev1_159 = __builtin_shufflevector(__s1_159, __s1_159, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61883 | int16_t __ret_165; \ | 52807 | int16_t __ret_159; \ |
| 61884 | __ret_165 = __noswap_vqdmulhh_s16(__s0_165, __noswap_vgetq_lane_s16(__rev1_165, __p2_165)); \ | 52808 | __ret_159 = vqdmulhh_s16(__s0_159, __noswap_vgetq_lane_s16(__rev1_159, __p2_159)); \ |
| 61885 | __ret_165; \ | 52809 | __ret_159; \ |
| 61886 | }) | 52810 | }) |
| 61887 | #endif | 52811 | #endif |
| 61888 | | 52812 | |
| ... | @@ -61970,44 +52894,16 @@ __ai int16_t __noswap_vqdmulhh_s16(int16_t __p0, int16_t __p1) { | ... | @@ -61970,44 +52894,16 @@ __ai int16_t __noswap_vqdmulhh_s16(int16_t __p0, int16_t __p1) { |
| 61970 | }) | 52894 | }) |
| 61971 | #endif | 52895 | #endif |
| 61972 | | 52896 | |
| 61973 | #ifdef __LITTLE_ENDIAN__ | | |
| 61974 | __ai int64_t vqdmulls_s32(int32_t __p0, int32_t __p1) { | 52897 | __ai int64_t vqdmulls_s32(int32_t __p0, int32_t __p1) { |
| 61975 | int64_t __ret; | 52898 | int64_t __ret; |
| 61976 | __ret = (int64_t) __builtin_neon_vqdmulls_s32(__p0, __p1); | 52899 | __ret = (int64_t) __builtin_neon_vqdmulls_s32(__p0, __p1); |
| 61977 | return __ret; | 52900 | return __ret; |
| 61978 | } | 52901 | } |
| 61979 | #else | | |
| 61980 | __ai int64_t vqdmulls_s32(int32_t __p0, int32_t __p1) { | | |
| 61981 | int64_t __ret; | | |
| 61982 | __ret = (int64_t) __builtin_neon_vqdmulls_s32(__p0, __p1); | | |
| 61983 | return __ret; | | |
| 61984 | } | | |
| 61985 | __ai int64_t __noswap_vqdmulls_s32(int32_t __p0, int32_t __p1) { | | |
| 61986 | int64_t __ret; | | |
| 61987 | __ret = (int64_t) __builtin_neon_vqdmulls_s32(__p0, __p1); | | |
| 61988 | return __ret; | | |
| 61989 | } | | |
| 61990 | #endif | | |
| 61991 | | | |
| 61992 | #ifdef __LITTLE_ENDIAN__ | | |
| 61993 | __ai int32_t vqdmullh_s16(int16_t __p0, int16_t __p1) { | | |
| 61994 | int32_t __ret; | | |
| 61995 | __ret = (int32_t) __builtin_neon_vqdmullh_s16(__p0, __p1); | | |
| 61996 | return __ret; | | |
| 61997 | } | | |
| 61998 | #else | | |
| 61999 | __ai int32_t vqdmullh_s16(int16_t __p0, int16_t __p1) { | 52902 | __ai int32_t vqdmullh_s16(int16_t __p0, int16_t __p1) { |
| 62000 | int32_t __ret; | 52903 | int32_t __ret; |
| 62001 | __ret = (int32_t) __builtin_neon_vqdmullh_s16(__p0, __p1); | 52904 | __ret = (int32_t) __builtin_neon_vqdmullh_s16(__p0, __p1); |
| 62002 | return __ret; | 52905 | return __ret; |
| 62003 | } | 52906 | } |
| 62004 | __ai int32_t __noswap_vqdmullh_s16(int16_t __p0, int16_t __p1) { | | |
| 62005 | int32_t __ret; | | |
| 62006 | __ret = (int32_t) __builtin_neon_vqdmullh_s16(__p0, __p1); | | |
| 62007 | return __ret; | | |
| 62008 | } | | |
| 62009 | #endif | | |
| 62010 | | | |
| 62011 | #ifdef __LITTLE_ENDIAN__ | 52907 | #ifdef __LITTLE_ENDIAN__ |
| 62012 | __ai int64x2_t vqdmull_high_s32(int32x4_t __p0, int32x4_t __p1) { | 52908 | __ai int64x2_t vqdmull_high_s32(int32x4_t __p0, int32x4_t __p1) { |
| 62013 | int64x2_t __ret; | 52909 | int64x2_t __ret; |
| ... | @@ -62159,78 +53055,78 @@ __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { | ... | @@ -62159,78 +53055,78 @@ __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { |
| 62159 | #endif | 53055 | #endif |
| 62160 | | 53056 | |
| 62161 | #ifdef __LITTLE_ENDIAN__ | 53057 | #ifdef __LITTLE_ENDIAN__ |
| 62162 | #define vqdmulls_lane_s32(__p0_166, __p1_166, __p2_166) __extension__ ({ \ | 53058 | #define vqdmulls_lane_s32(__p0_160, __p1_160, __p2_160) __extension__ ({ \ |
| 62163 | int32_t __s0_166 = __p0_166; \ | 53059 | int32_t __s0_160 = __p0_160; \ |
| 62164 | int32x2_t __s1_166 = __p1_166; \ | 53060 | int32x2_t __s1_160 = __p1_160; \ |
| 62165 | int64_t __ret_166; \ | 53061 | int64_t __ret_160; \ |
| 62166 | __ret_166 = vqdmulls_s32(__s0_166, vget_lane_s32(__s1_166, __p2_166)); \ | 53062 | __ret_160 = vqdmulls_s32(__s0_160, vget_lane_s32(__s1_160, __p2_160)); \ |
| 62167 | __ret_166; \ | 53063 | __ret_160; \ |
| 62168 | }) | 53064 | }) |
| 62169 | #else | 53065 | #else |
| 62170 | #define vqdmulls_lane_s32(__p0_167, __p1_167, __p2_167) __extension__ ({ \ | 53066 | #define vqdmulls_lane_s32(__p0_161, __p1_161, __p2_161) __extension__ ({ \ |
| 62171 | int32_t __s0_167 = __p0_167; \ | 53067 | int32_t __s0_161 = __p0_161; \ |
| 62172 | int32x2_t __s1_167 = __p1_167; \ | 53068 | int32x2_t __s1_161 = __p1_161; \ |
| 62173 | int32x2_t __rev1_167; __rev1_167 = __builtin_shufflevector(__s1_167, __s1_167, 1, 0); \ | 53069 | int32x2_t __rev1_161; __rev1_161 = __builtin_shufflevector(__s1_161, __s1_161, 1, 0); \ |
| 62174 | int64_t __ret_167; \ | 53070 | int64_t __ret_161; \ |
| 62175 | __ret_167 = __noswap_vqdmulls_s32(__s0_167, __noswap_vget_lane_s32(__rev1_167, __p2_167)); \ | 53071 | __ret_161 = vqdmulls_s32(__s0_161, __noswap_vget_lane_s32(__rev1_161, __p2_161)); \ |
| 62176 | __ret_167; \ | 53072 | __ret_161; \ |
| 62177 | }) | 53073 | }) |
| 62178 | #endif | 53074 | #endif |
| 62179 | | 53075 | |
| 62180 | #ifdef __LITTLE_ENDIAN__ | 53076 | #ifdef __LITTLE_ENDIAN__ |
| 62181 | #define vqdmullh_lane_s16(__p0_168, __p1_168, __p2_168) __extension__ ({ \ | 53077 | #define vqdmullh_lane_s16(__p0_162, __p1_162, __p2_162) __extension__ ({ \ |
| 62182 | int16_t __s0_168 = __p0_168; \ | 53078 | int16_t __s0_162 = __p0_162; \ |
| 62183 | int16x4_t __s1_168 = __p1_168; \ | 53079 | int16x4_t __s1_162 = __p1_162; \ |
| 62184 | int32_t __ret_168; \ | 53080 | int32_t __ret_162; \ |
| 62185 | __ret_168 = vqdmullh_s16(__s0_168, vget_lane_s16(__s1_168, __p2_168)); \ | 53081 | __ret_162 = vqdmullh_s16(__s0_162, vget_lane_s16(__s1_162, __p2_162)); \ |
| 62186 | __ret_168; \ | 53082 | __ret_162; \ |
| 62187 | }) | 53083 | }) |
| 62188 | #else | 53084 | #else |
| 62189 | #define vqdmullh_lane_s16(__p0_169, __p1_169, __p2_169) __extension__ ({ \ | 53085 | #define vqdmullh_lane_s16(__p0_163, __p1_163, __p2_163) __extension__ ({ \ |
| 62190 | int16_t __s0_169 = __p0_169; \ | 53086 | int16_t __s0_163 = __p0_163; \ |
| 62191 | int16x4_t __s1_169 = __p1_169; \ | 53087 | int16x4_t __s1_163 = __p1_163; \ |
| 62192 | int16x4_t __rev1_169; __rev1_169 = __builtin_shufflevector(__s1_169, __s1_169, 3, 2, 1, 0); \ | 53088 | int16x4_t __rev1_163; __rev1_163 = __builtin_shufflevector(__s1_163, __s1_163, 3, 2, 1, 0); \ |
| 62193 | int32_t __ret_169; \ | 53089 | int32_t __ret_163; \ |
| 62194 | __ret_169 = __noswap_vqdmullh_s16(__s0_169, __noswap_vget_lane_s16(__rev1_169, __p2_169)); \ | 53090 | __ret_163 = vqdmullh_s16(__s0_163, __noswap_vget_lane_s16(__rev1_163, __p2_163)); \ |
| 62195 | __ret_169; \ | 53091 | __ret_163; \ |
| 62196 | }) | 53092 | }) |
| 62197 | #endif | 53093 | #endif |
| 62198 | | 53094 | |
| 62199 | #ifdef __LITTLE_ENDIAN__ | 53095 | #ifdef __LITTLE_ENDIAN__ |
| 62200 | #define vqdmulls_laneq_s32(__p0_170, __p1_170, __p2_170) __extension__ ({ \ | 53096 | #define vqdmulls_laneq_s32(__p0_164, __p1_164, __p2_164) __extension__ ({ \ |
| 62201 | int32_t __s0_170 = __p0_170; \ | 53097 | int32_t __s0_164 = __p0_164; \ |
| 62202 | int32x4_t __s1_170 = __p1_170; \ | 53098 | int32x4_t __s1_164 = __p1_164; \ |
| 62203 | int64_t __ret_170; \ | 53099 | int64_t __ret_164; \ |
| 62204 | __ret_170 = vqdmulls_s32(__s0_170, vgetq_lane_s32(__s1_170, __p2_170)); \ | 53100 | __ret_164 = vqdmulls_s32(__s0_164, vgetq_lane_s32(__s1_164, __p2_164)); \ |
| 62205 | __ret_170; \ | 53101 | __ret_164; \ |
| 62206 | }) | 53102 | }) |
| 62207 | #else | 53103 | #else |
| 62208 | #define vqdmulls_laneq_s32(__p0_171, __p1_171, __p2_171) __extension__ ({ \ | 53104 | #define vqdmulls_laneq_s32(__p0_165, __p1_165, __p2_165) __extension__ ({ \ |
| 62209 | int32_t __s0_171 = __p0_171; \ | 53105 | int32_t __s0_165 = __p0_165; \ |
| 62210 | int32x4_t __s1_171 = __p1_171; \ | 53106 | int32x4_t __s1_165 = __p1_165; \ |
| 62211 | int32x4_t __rev1_171; __rev1_171 = __builtin_shufflevector(__s1_171, __s1_171, 3, 2, 1, 0); \ | 53107 | int32x4_t __rev1_165; __rev1_165 = __builtin_shufflevector(__s1_165, __s1_165, 3, 2, 1, 0); \ |
| 62212 | int64_t __ret_171; \ | 53108 | int64_t __ret_165; \ |
| 62213 | __ret_171 = __noswap_vqdmulls_s32(__s0_171, __noswap_vgetq_lane_s32(__rev1_171, __p2_171)); \ | 53109 | __ret_165 = vqdmulls_s32(__s0_165, __noswap_vgetq_lane_s32(__rev1_165, __p2_165)); \ |
| 62214 | __ret_171; \ | 53110 | __ret_165; \ |
| 62215 | }) | 53111 | }) |
| 62216 | #endif | 53112 | #endif |
| 62217 | | 53113 | |
| 62218 | #ifdef __LITTLE_ENDIAN__ | 53114 | #ifdef __LITTLE_ENDIAN__ |
| 62219 | #define vqdmullh_laneq_s16(__p0_172, __p1_172, __p2_172) __extension__ ({ \ | 53115 | #define vqdmullh_laneq_s16(__p0_166, __p1_166, __p2_166) __extension__ ({ \ |
| 62220 | int16_t __s0_172 = __p0_172; \ | 53116 | int16_t __s0_166 = __p0_166; \ |
| 62221 | int16x8_t __s1_172 = __p1_172; \ | 53117 | int16x8_t __s1_166 = __p1_166; \ |
| 62222 | int32_t __ret_172; \ | 53118 | int32_t __ret_166; \ |
| 62223 | __ret_172 = vqdmullh_s16(__s0_172, vgetq_lane_s16(__s1_172, __p2_172)); \ | 53119 | __ret_166 = vqdmullh_s16(__s0_166, vgetq_lane_s16(__s1_166, __p2_166)); \ |
| 62224 | __ret_172; \ | 53120 | __ret_166; \ |
| 62225 | }) | 53121 | }) |
| 62226 | #else | 53122 | #else |
| 62227 | #define vqdmullh_laneq_s16(__p0_173, __p1_173, __p2_173) __extension__ ({ \ | 53123 | #define vqdmullh_laneq_s16(__p0_167, __p1_167, __p2_167) __extension__ ({ \ |
| 62228 | int16_t __s0_173 = __p0_173; \ | 53124 | int16_t __s0_167 = __p0_167; \ |
| 62229 | int16x8_t __s1_173 = __p1_173; \ | 53125 | int16x8_t __s1_167 = __p1_167; \ |
| 62230 | int16x8_t __rev1_173; __rev1_173 = __builtin_shufflevector(__s1_173, __s1_173, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53126 | int16x8_t __rev1_167; __rev1_167 = __builtin_shufflevector(__s1_167, __s1_167, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 62231 | int32_t __ret_173; \ | 53127 | int32_t __ret_167; \ |
| 62232 | __ret_173 = __noswap_vqdmullh_s16(__s0_173, __noswap_vgetq_lane_s16(__rev1_173, __p2_173)); \ | 53128 | __ret_167 = vqdmullh_s16(__s0_167, __noswap_vgetq_lane_s16(__rev1_167, __p2_167)); \ |
| 62233 | __ret_173; \ | 53129 | __ret_167; \ |
| 62234 | }) | 53130 | }) |
| 62235 | #endif | 53131 | #endif |
| 62236 | | 53132 | |
| ... | @@ -62276,90 +53172,36 @@ __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { | ... | @@ -62276,90 +53172,36 @@ __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { |
| 62276 | }) | 53172 | }) |
| 62277 | #endif | 53173 | #endif |
| 62278 | | 53174 | |
| 62279 | #ifdef __LITTLE_ENDIAN__ | | |
| 62280 | __ai int16_t vqmovns_s32(int32_t __p0) { | 53175 | __ai int16_t vqmovns_s32(int32_t __p0) { |
| 62281 | int16_t __ret; | 53176 | int16_t __ret; |
| 62282 | __ret = (int16_t) __builtin_neon_vqmovns_s32(__p0); | 53177 | __ret = (int16_t) __builtin_neon_vqmovns_s32(__p0); |
| 62283 | return __ret; | 53178 | return __ret; |
| 62284 | } | 53179 | } |
| 62285 | #else | | |
| 62286 | __ai int16_t vqmovns_s32(int32_t __p0) { | | |
| 62287 | int16_t __ret; | | |
| 62288 | __ret = (int16_t) __builtin_neon_vqmovns_s32(__p0); | | |
| 62289 | return __ret; | | |
| 62290 | } | | |
| 62291 | #endif | | |
| 62292 | | | |
| 62293 | #ifdef __LITTLE_ENDIAN__ | | |
| 62294 | __ai int32_t vqmovnd_s64(int64_t __p0) { | | |
| 62295 | int32_t __ret; | | |
| 62296 | __ret = (int32_t) __builtin_neon_vqmovnd_s64(__p0); | | |
| 62297 | return __ret; | | |
| 62298 | } | | |
| 62299 | #else | | |
| 62300 | __ai int32_t vqmovnd_s64(int64_t __p0) { | 53180 | __ai int32_t vqmovnd_s64(int64_t __p0) { |
| 62301 | int32_t __ret; | 53181 | int32_t __ret; |
| 62302 | __ret = (int32_t) __builtin_neon_vqmovnd_s64(__p0); | 53182 | __ret = (int32_t) __builtin_neon_vqmovnd_s64(__p0); |
| 62303 | return __ret; | 53183 | return __ret; |
| 62304 | } | 53184 | } |
| 62305 | #endif | | |
| 62306 | | | |
| 62307 | #ifdef __LITTLE_ENDIAN__ | | |
| 62308 | __ai int8_t vqmovnh_s16(int16_t __p0) { | 53185 | __ai int8_t vqmovnh_s16(int16_t __p0) { |
| 62309 | int8_t __ret; | 53186 | int8_t __ret; |
| 62310 | __ret = (int8_t) __builtin_neon_vqmovnh_s16(__p0); | 53187 | __ret = (int8_t) __builtin_neon_vqmovnh_s16(__p0); |
| 62311 | return __ret; | 53188 | return __ret; |
| 62312 | } | 53189 | } |
| 62313 | #else | | |
| 62314 | __ai int8_t vqmovnh_s16(int16_t __p0) { | | |
| 62315 | int8_t __ret; | | |
| 62316 | __ret = (int8_t) __builtin_neon_vqmovnh_s16(__p0); | | |
| 62317 | return __ret; | | |
| 62318 | } | | |
| 62319 | #endif | | |
| 62320 | | | |
| 62321 | #ifdef __LITTLE_ENDIAN__ | | |
| 62322 | __ai uint16_t vqmovns_u32(uint32_t __p0) { | 53190 | __ai uint16_t vqmovns_u32(uint32_t __p0) { |
| 62323 | uint16_t __ret; | 53191 | uint16_t __ret; |
| 62324 | __ret = (uint16_t) __builtin_neon_vqmovns_u32(__p0); | 53192 | __ret = (uint16_t) __builtin_neon_vqmovns_u32(__p0); |
| 62325 | return __ret; | 53193 | return __ret; |
| 62326 | } | 53194 | } |
| 62327 | #else | | |
| 62328 | __ai uint16_t vqmovns_u32(uint32_t __p0) { | | |
| 62329 | uint16_t __ret; | | |
| 62330 | __ret = (uint16_t) __builtin_neon_vqmovns_u32(__p0); | | |
| 62331 | return __ret; | | |
| 62332 | } | | |
| 62333 | #endif | | |
| 62334 | | | |
| 62335 | #ifdef __LITTLE_ENDIAN__ | | |
| 62336 | __ai uint32_t vqmovnd_u64(uint64_t __p0) { | | |
| 62337 | uint32_t __ret; | | |
| 62338 | __ret = (uint32_t) __builtin_neon_vqmovnd_u64(__p0); | | |
| 62339 | return __ret; | | |
| 62340 | } | | |
| 62341 | #else | | |
| 62342 | __ai uint32_t vqmovnd_u64(uint64_t __p0) { | 53195 | __ai uint32_t vqmovnd_u64(uint64_t __p0) { |
| 62343 | uint32_t __ret; | 53196 | uint32_t __ret; |
| 62344 | __ret = (uint32_t) __builtin_neon_vqmovnd_u64(__p0); | 53197 | __ret = (uint32_t) __builtin_neon_vqmovnd_u64(__p0); |
| 62345 | return __ret; | 53198 | return __ret; |
| 62346 | } | 53199 | } |
| 62347 | #endif | | |
| 62348 | | | |
| 62349 | #ifdef __LITTLE_ENDIAN__ | | |
| 62350 | __ai uint8_t vqmovnh_u16(uint16_t __p0) { | 53200 | __ai uint8_t vqmovnh_u16(uint16_t __p0) { |
| 62351 | uint8_t __ret; | 53201 | uint8_t __ret; |
| 62352 | __ret = (uint8_t) __builtin_neon_vqmovnh_u16(__p0); | 53202 | __ret = (uint8_t) __builtin_neon_vqmovnh_u16(__p0); |
| 62353 | return __ret; | 53203 | return __ret; |
| 62354 | } | 53204 | } |
| 62355 | #else | | |
| 62356 | __ai uint8_t vqmovnh_u16(uint16_t __p0) { | | |
| 62357 | uint8_t __ret; | | |
| 62358 | __ret = (uint8_t) __builtin_neon_vqmovnh_u16(__p0); | | |
| 62359 | return __ret; | | |
| 62360 | } | | |
| 62361 | #endif | | |
| 62362 | | | |
| 62363 | #ifdef __LITTLE_ENDIAN__ | 53205 | #ifdef __LITTLE_ENDIAN__ |
| 62364 | __ai uint16x8_t vqmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { | 53206 | __ai uint16x8_t vqmovn_high_u32(uint16x4_t __p0, uint32x4_t __p1) { |
| 62365 | uint16x8_t __ret; | 53207 | uint16x8_t __ret; |
| ... | @@ -62462,48 +53304,21 @@ __ai int8x16_t vqmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { | ... | @@ -62462,48 +53304,21 @@ __ai int8x16_t vqmovn_high_s16(int8x8_t __p0, int16x8_t __p1) { |
| 62462 | } | 53304 | } |
| 62463 | #endif | 53305 | #endif |
| 62464 | | 53306 | |
| 62465 | #ifdef __LITTLE_ENDIAN__ | | |
| 62466 | __ai int16_t vqmovuns_s32(int32_t __p0) { | | |
| 62467 | int16_t __ret; | | |
| 62468 | __ret = (int16_t) __builtin_neon_vqmovuns_s32(__p0); | | |
| 62469 | return __ret; | | |
| 62470 | } | | |
| 62471 | #else | | |
| 62472 | __ai int16_t vqmovuns_s32(int32_t __p0) { | 53307 | __ai int16_t vqmovuns_s32(int32_t __p0) { |
| 62473 | int16_t __ret; | 53308 | int16_t __ret; |
| 62474 | __ret = (int16_t) __builtin_neon_vqmovuns_s32(__p0); | 53309 | __ret = (int16_t) __builtin_neon_vqmovuns_s32(__p0); |
| 62475 | return __ret; | 53310 | return __ret; |
| 62476 | } | 53311 | } |
| 62477 | #endif | | |
| 62478 | | | |
| 62479 | #ifdef __LITTLE_ENDIAN__ | | |
| 62480 | __ai int32_t vqmovund_s64(int64_t __p0) { | 53312 | __ai int32_t vqmovund_s64(int64_t __p0) { |
| 62481 | int32_t __ret; | 53313 | int32_t __ret; |
| 62482 | __ret = (int32_t) __builtin_neon_vqmovund_s64(__p0); | 53314 | __ret = (int32_t) __builtin_neon_vqmovund_s64(__p0); |
| 62483 | return __ret; | 53315 | return __ret; |
| 62484 | } | 53316 | } |
| 62485 | #else | | |
| 62486 | __ai int32_t vqmovund_s64(int64_t __p0) { | | |
| 62487 | int32_t __ret; | | |
| 62488 | __ret = (int32_t) __builtin_neon_vqmovund_s64(__p0); | | |
| 62489 | return __ret; | | |
| 62490 | } | | |
| 62491 | #endif | | |
| 62492 | | | |
| 62493 | #ifdef __LITTLE_ENDIAN__ | | |
| 62494 | __ai int8_t vqmovunh_s16(int16_t __p0) { | | |
| 62495 | int8_t __ret; | | |
| 62496 | __ret = (int8_t) __builtin_neon_vqmovunh_s16(__p0); | | |
| 62497 | return __ret; | | |
| 62498 | } | | |
| 62499 | #else | | |
| 62500 | __ai int8_t vqmovunh_s16(int16_t __p0) { | 53317 | __ai int8_t vqmovunh_s16(int16_t __p0) { |
| 62501 | int8_t __ret; | 53318 | int8_t __ret; |
| 62502 | __ret = (int8_t) __builtin_neon_vqmovunh_s16(__p0); | 53319 | __ret = (int8_t) __builtin_neon_vqmovunh_s16(__p0); |
| 62503 | return __ret; | 53320 | return __ret; |
| 62504 | } | 53321 | } |
| 62505 | #endif | | |
| 62506 | | | |
| 62507 | #ifdef __LITTLE_ENDIAN__ | 53322 | #ifdef __LITTLE_ENDIAN__ |
| 62508 | __ai uint16x8_t vqmovun_high_s32(int16x4_t __p0, int32x4_t __p1) { | 53323 | __ai uint16x8_t vqmovun_high_s32(int16x4_t __p0, int32x4_t __p1) { |
| 62509 | uint16x8_t __ret; | 53324 | uint16x8_t __ret; |
| ... | @@ -62571,187 +53386,114 @@ __ai int64x2_t vqnegq_s64(int64x2_t __p0) { | ... | @@ -62571,187 +53386,114 @@ __ai int64x2_t vqnegq_s64(int64x2_t __p0) { |
| 62571 | } | 53386 | } |
| 62572 | #endif | 53387 | #endif |
| 62573 | | 53388 | |
| 62574 | #ifdef __LITTLE_ENDIAN__ | | |
| 62575 | __ai int64x1_t vqneg_s64(int64x1_t __p0) { | | |
| 62576 | int64x1_t __ret; | | |
| 62577 | __ret = (int64x1_t) __builtin_neon_vqneg_v((int8x8_t)__p0, 3); | | |
| 62578 | return __ret; | | |
| 62579 | } | | |
| 62580 | #else | | |
| 62581 | __ai int64x1_t vqneg_s64(int64x1_t __p0) { | 53389 | __ai int64x1_t vqneg_s64(int64x1_t __p0) { |
| 62582 | int64x1_t __ret; | 53390 | int64x1_t __ret; |
| 62583 | __ret = (int64x1_t) __builtin_neon_vqneg_v((int8x8_t)__p0, 3); | 53391 | __ret = (int64x1_t) __builtin_neon_vqneg_v((int8x8_t)__p0, 3); |
| 62584 | return __ret; | 53392 | return __ret; |
| 62585 | } | 53393 | } |
| 62586 | #endif | | |
| 62587 | | | |
| 62588 | #ifdef __LITTLE_ENDIAN__ | | |
| 62589 | __ai int8_t vqnegb_s8(int8_t __p0) { | 53394 | __ai int8_t vqnegb_s8(int8_t __p0) { |
| 62590 | int8_t __ret; | 53395 | int8_t __ret; |
| 62591 | __ret = (int8_t) __builtin_neon_vqnegb_s8(__p0); | 53396 | __ret = (int8_t) __builtin_neon_vqnegb_s8(__p0); |
| 62592 | return __ret; | 53397 | return __ret; |
| 62593 | } | 53398 | } |
| 62594 | #else | | |
| 62595 | __ai int8_t vqnegb_s8(int8_t __p0) { | | |
| 62596 | int8_t __ret; | | |
| 62597 | __ret = (int8_t) __builtin_neon_vqnegb_s8(__p0); | | |
| 62598 | return __ret; | | |
| 62599 | } | | |
| 62600 | #endif | | |
| 62601 | | | |
| 62602 | #ifdef __LITTLE_ENDIAN__ | | |
| 62603 | __ai int32_t vqnegs_s32(int32_t __p0) { | | |
| 62604 | int32_t __ret; | | |
| 62605 | __ret = (int32_t) __builtin_neon_vqnegs_s32(__p0); | | |
| 62606 | return __ret; | | |
| 62607 | } | | |
| 62608 | #else | | |
| 62609 | __ai int32_t vqnegs_s32(int32_t __p0) { | 53399 | __ai int32_t vqnegs_s32(int32_t __p0) { |
| 62610 | int32_t __ret; | 53400 | int32_t __ret; |
| 62611 | __ret = (int32_t) __builtin_neon_vqnegs_s32(__p0); | 53401 | __ret = (int32_t) __builtin_neon_vqnegs_s32(__p0); |
| 62612 | return __ret; | 53402 | return __ret; |
| 62613 | } | 53403 | } |
| 62614 | #endif | | |
| 62615 | | | |
| 62616 | #ifdef __LITTLE_ENDIAN__ | | |
| 62617 | __ai int64_t vqnegd_s64(int64_t __p0) { | 53404 | __ai int64_t vqnegd_s64(int64_t __p0) { |
| 62618 | int64_t __ret; | 53405 | int64_t __ret; |
| 62619 | __ret = (int64_t) __builtin_neon_vqnegd_s64(__p0); | 53406 | __ret = (int64_t) __builtin_neon_vqnegd_s64(__p0); |
| 62620 | return __ret; | 53407 | return __ret; |
| 62621 | } | 53408 | } |
| 62622 | #else | | |
| 62623 | __ai int64_t vqnegd_s64(int64_t __p0) { | | |
| 62624 | int64_t __ret; | | |
| 62625 | __ret = (int64_t) __builtin_neon_vqnegd_s64(__p0); | | |
| 62626 | return __ret; | | |
| 62627 | } | | |
| 62628 | #endif | | |
| 62629 | | | |
| 62630 | #ifdef __LITTLE_ENDIAN__ | | |
| 62631 | __ai int16_t vqnegh_s16(int16_t __p0) { | 53409 | __ai int16_t vqnegh_s16(int16_t __p0) { |
| 62632 | int16_t __ret; | 53410 | int16_t __ret; |
| 62633 | __ret = (int16_t) __builtin_neon_vqnegh_s16(__p0); | 53411 | __ret = (int16_t) __builtin_neon_vqnegh_s16(__p0); |
| 62634 | return __ret; | 53412 | return __ret; |
| 62635 | } | 53413 | } |
| 62636 | #else | | |
| 62637 | __ai int16_t vqnegh_s16(int16_t __p0) { | | |
| 62638 | int16_t __ret; | | |
| 62639 | __ret = (int16_t) __builtin_neon_vqnegh_s16(__p0); | | |
| 62640 | return __ret; | | |
| 62641 | } | | |
| 62642 | #endif | | |
| 62643 | | | |
| 62644 | #ifdef __LITTLE_ENDIAN__ | | |
| 62645 | __ai int32_t vqrdmulhs_s32(int32_t __p0, int32_t __p1) { | | |
| 62646 | int32_t __ret; | | |
| 62647 | __ret = (int32_t) __builtin_neon_vqrdmulhs_s32(__p0, __p1); | | |
| 62648 | return __ret; | | |
| 62649 | } | | |
| 62650 | #else | | |
| 62651 | __ai int32_t vqrdmulhs_s32(int32_t __p0, int32_t __p1) { | 53414 | __ai int32_t vqrdmulhs_s32(int32_t __p0, int32_t __p1) { |
| 62652 | int32_t __ret; | 53415 | int32_t __ret; |
| 62653 | __ret = (int32_t) __builtin_neon_vqrdmulhs_s32(__p0, __p1); | 53416 | __ret = (int32_t) __builtin_neon_vqrdmulhs_s32(__p0, __p1); |
| 62654 | return __ret; | 53417 | return __ret; |
| 62655 | } | 53418 | } |
| 62656 | __ai int32_t __noswap_vqrdmulhs_s32(int32_t __p0, int32_t __p1) { | | |
| 62657 | int32_t __ret; | | |
| 62658 | __ret = (int32_t) __builtin_neon_vqrdmulhs_s32(__p0, __p1); | | |
| 62659 | return __ret; | | |
| 62660 | } | | |
| 62661 | #endif | | |
| 62662 | | | |
| 62663 | #ifdef __LITTLE_ENDIAN__ | | |
| 62664 | __ai int16_t vqrdmulhh_s16(int16_t __p0, int16_t __p1) { | 53419 | __ai int16_t vqrdmulhh_s16(int16_t __p0, int16_t __p1) { |
| 62665 | int16_t __ret; | 53420 | int16_t __ret; |
| 62666 | __ret = (int16_t) __builtin_neon_vqrdmulhh_s16(__p0, __p1); | 53421 | __ret = (int16_t) __builtin_neon_vqrdmulhh_s16(__p0, __p1); |
| 62667 | return __ret; | 53422 | return __ret; |
| 62668 | } | 53423 | } |
| 62669 | #else | | |
| 62670 | __ai int16_t vqrdmulhh_s16(int16_t __p0, int16_t __p1) { | | |
| 62671 | int16_t __ret; | | |
| 62672 | __ret = (int16_t) __builtin_neon_vqrdmulhh_s16(__p0, __p1); | | |
| 62673 | return __ret; | | |
| 62674 | } | | |
| 62675 | __ai int16_t __noswap_vqrdmulhh_s16(int16_t __p0, int16_t __p1) { | | |
| 62676 | int16_t __ret; | | |
| 62677 | __ret = (int16_t) __builtin_neon_vqrdmulhh_s16(__p0, __p1); | | |
| 62678 | return __ret; | | |
| 62679 | } | | |
| 62680 | #endif | | |
| 62681 | | | |
| 62682 | #ifdef __LITTLE_ENDIAN__ | 53424 | #ifdef __LITTLE_ENDIAN__ |
| 62683 | #define vqrdmulhs_lane_s32(__p0_174, __p1_174, __p2_174) __extension__ ({ \ | 53425 | #define vqrdmulhs_lane_s32(__p0_168, __p1_168, __p2_168) __extension__ ({ \ |
| 62684 | int32_t __s0_174 = __p0_174; \ | 53426 | int32_t __s0_168 = __p0_168; \ |
| 62685 | int32x2_t __s1_174 = __p1_174; \ | 53427 | int32x2_t __s1_168 = __p1_168; \ |
| 62686 | int32_t __ret_174; \ | 53428 | int32_t __ret_168; \ |
| 62687 | __ret_174 = vqrdmulhs_s32(__s0_174, vget_lane_s32(__s1_174, __p2_174)); \ | 53429 | __ret_168 = vqrdmulhs_s32(__s0_168, vget_lane_s32(__s1_168, __p2_168)); \ |
| 62688 | __ret_174; \ | 53430 | __ret_168; \ |
| 62689 | }) | 53431 | }) |
| 62690 | #else | 53432 | #else |
| 62691 | #define vqrdmulhs_lane_s32(__p0_175, __p1_175, __p2_175) __extension__ ({ \ | 53433 | #define vqrdmulhs_lane_s32(__p0_169, __p1_169, __p2_169) __extension__ ({ \ |
| 62692 | int32_t __s0_175 = __p0_175; \ | 53434 | int32_t __s0_169 = __p0_169; \ |
| 62693 | int32x2_t __s1_175 = __p1_175; \ | 53435 | int32x2_t __s1_169 = __p1_169; \ |
| 62694 | int32x2_t __rev1_175; __rev1_175 = __builtin_shufflevector(__s1_175, __s1_175, 1, 0); \ | 53436 | int32x2_t __rev1_169; __rev1_169 = __builtin_shufflevector(__s1_169, __s1_169, 1, 0); \ |
| 62695 | int32_t __ret_175; \ | 53437 | int32_t __ret_169; \ |
| 62696 | __ret_175 = __noswap_vqrdmulhs_s32(__s0_175, __noswap_vget_lane_s32(__rev1_175, __p2_175)); \ | 53438 | __ret_169 = vqrdmulhs_s32(__s0_169, __noswap_vget_lane_s32(__rev1_169, __p2_169)); \ |
| 62697 | __ret_175; \ | 53439 | __ret_169; \ |
| 62698 | }) | 53440 | }) |
| 62699 | #endif | 53441 | #endif |
| 62700 | | 53442 | |
| 62701 | #ifdef __LITTLE_ENDIAN__ | 53443 | #ifdef __LITTLE_ENDIAN__ |
| 62702 | #define vqrdmulhh_lane_s16(__p0_176, __p1_176, __p2_176) __extension__ ({ \ | 53444 | #define vqrdmulhh_lane_s16(__p0_170, __p1_170, __p2_170) __extension__ ({ \ |
| 62703 | int16_t __s0_176 = __p0_176; \ | 53445 | int16_t __s0_170 = __p0_170; \ |
| 62704 | int16x4_t __s1_176 = __p1_176; \ | 53446 | int16x4_t __s1_170 = __p1_170; \ |
| 62705 | int16_t __ret_176; \ | 53447 | int16_t __ret_170; \ |
| 62706 | __ret_176 = vqrdmulhh_s16(__s0_176, vget_lane_s16(__s1_176, __p2_176)); \ | 53448 | __ret_170 = vqrdmulhh_s16(__s0_170, vget_lane_s16(__s1_170, __p2_170)); \ |
| 62707 | __ret_176; \ | 53449 | __ret_170; \ |
| 62708 | }) | 53450 | }) |
| 62709 | #else | 53451 | #else |
| 62710 | #define vqrdmulhh_lane_s16(__p0_177, __p1_177, __p2_177) __extension__ ({ \ | 53452 | #define vqrdmulhh_lane_s16(__p0_171, __p1_171, __p2_171) __extension__ ({ \ |
| 62711 | int16_t __s0_177 = __p0_177; \ | 53453 | int16_t __s0_171 = __p0_171; \ |
| 62712 | int16x4_t __s1_177 = __p1_177; \ | 53454 | int16x4_t __s1_171 = __p1_171; \ |
| 62713 | int16x4_t __rev1_177; __rev1_177 = __builtin_shufflevector(__s1_177, __s1_177, 3, 2, 1, 0); \ | 53455 | int16x4_t __rev1_171; __rev1_171 = __builtin_shufflevector(__s1_171, __s1_171, 3, 2, 1, 0); \ |
| 62714 | int16_t __ret_177; \ | 53456 | int16_t __ret_171; \ |
| 62715 | __ret_177 = __noswap_vqrdmulhh_s16(__s0_177, __noswap_vget_lane_s16(__rev1_177, __p2_177)); \ | 53457 | __ret_171 = vqrdmulhh_s16(__s0_171, __noswap_vget_lane_s16(__rev1_171, __p2_171)); \ |
| 62716 | __ret_177; \ | 53458 | __ret_171; \ |
| 62717 | }) | 53459 | }) |
| 62718 | #endif | 53460 | #endif |
| 62719 | | 53461 | |
| 62720 | #ifdef __LITTLE_ENDIAN__ | 53462 | #ifdef __LITTLE_ENDIAN__ |
| 62721 | #define vqrdmulhs_laneq_s32(__p0_178, __p1_178, __p2_178) __extension__ ({ \ | 53463 | #define vqrdmulhs_laneq_s32(__p0_172, __p1_172, __p2_172) __extension__ ({ \ |
| 62722 | int32_t __s0_178 = __p0_178; \ | 53464 | int32_t __s0_172 = __p0_172; \ |
| 62723 | int32x4_t __s1_178 = __p1_178; \ | 53465 | int32x4_t __s1_172 = __p1_172; \ |
| 62724 | int32_t __ret_178; \ | 53466 | int32_t __ret_172; \ |
| 62725 | __ret_178 = vqrdmulhs_s32(__s0_178, vgetq_lane_s32(__s1_178, __p2_178)); \ | 53467 | __ret_172 = vqrdmulhs_s32(__s0_172, vgetq_lane_s32(__s1_172, __p2_172)); \ |
| 62726 | __ret_178; \ | 53468 | __ret_172; \ |
| 62727 | }) | 53469 | }) |
| 62728 | #else | 53470 | #else |
| 62729 | #define vqrdmulhs_laneq_s32(__p0_179, __p1_179, __p2_179) __extension__ ({ \ | 53471 | #define vqrdmulhs_laneq_s32(__p0_173, __p1_173, __p2_173) __extension__ ({ \ |
| 62730 | int32_t __s0_179 = __p0_179; \ | 53472 | int32_t __s0_173 = __p0_173; \ |
| 62731 | int32x4_t __s1_179 = __p1_179; \ | 53473 | int32x4_t __s1_173 = __p1_173; \ |
| 62732 | int32x4_t __rev1_179; __rev1_179 = __builtin_shufflevector(__s1_179, __s1_179, 3, 2, 1, 0); \ | 53474 | int32x4_t __rev1_173; __rev1_173 = __builtin_shufflevector(__s1_173, __s1_173, 3, 2, 1, 0); \ |
| 62733 | int32_t __ret_179; \ | 53475 | int32_t __ret_173; \ |
| 62734 | __ret_179 = __noswap_vqrdmulhs_s32(__s0_179, __noswap_vgetq_lane_s32(__rev1_179, __p2_179)); \ | 53476 | __ret_173 = vqrdmulhs_s32(__s0_173, __noswap_vgetq_lane_s32(__rev1_173, __p2_173)); \ |
| 62735 | __ret_179; \ | 53477 | __ret_173; \ |
| 62736 | }) | 53478 | }) |
| 62737 | #endif | 53479 | #endif |
| 62738 | | 53480 | |
| 62739 | #ifdef __LITTLE_ENDIAN__ | 53481 | #ifdef __LITTLE_ENDIAN__ |
| 62740 | #define vqrdmulhh_laneq_s16(__p0_180, __p1_180, __p2_180) __extension__ ({ \ | 53482 | #define vqrdmulhh_laneq_s16(__p0_174, __p1_174, __p2_174) __extension__ ({ \ |
| 62741 | int16_t __s0_180 = __p0_180; \ | 53483 | int16_t __s0_174 = __p0_174; \ |
| 62742 | int16x8_t __s1_180 = __p1_180; \ | 53484 | int16x8_t __s1_174 = __p1_174; \ |
| 62743 | int16_t __ret_180; \ | 53485 | int16_t __ret_174; \ |
| 62744 | __ret_180 = vqrdmulhh_s16(__s0_180, vgetq_lane_s16(__s1_180, __p2_180)); \ | 53486 | __ret_174 = vqrdmulhh_s16(__s0_174, vgetq_lane_s16(__s1_174, __p2_174)); \ |
| 62745 | __ret_180; \ | 53487 | __ret_174; \ |
| 62746 | }) | 53488 | }) |
| 62747 | #else | 53489 | #else |
| 62748 | #define vqrdmulhh_laneq_s16(__p0_181, __p1_181, __p2_181) __extension__ ({ \ | 53490 | #define vqrdmulhh_laneq_s16(__p0_175, __p1_175, __p2_175) __extension__ ({ \ |
| 62749 | int16_t __s0_181 = __p0_181; \ | 53491 | int16_t __s0_175 = __p0_175; \ |
| 62750 | int16x8_t __s1_181 = __p1_181; \ | 53492 | int16x8_t __s1_175 = __p1_175; \ |
| 62751 | int16x8_t __rev1_181; __rev1_181 = __builtin_shufflevector(__s1_181, __s1_181, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53493 | int16x8_t __rev1_175; __rev1_175 = __builtin_shufflevector(__s1_175, __s1_175, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 62752 | int16_t __ret_181; \ | 53494 | int16_t __ret_175; \ |
| 62753 | __ret_181 = __noswap_vqrdmulhh_s16(__s0_181, __noswap_vgetq_lane_s16(__rev1_181, __p2_181)); \ | 53495 | __ret_175 = vqrdmulhh_s16(__s0_175, __noswap_vgetq_lane_s16(__rev1_175, __p2_175)); \ |
| 62754 | __ret_181; \ | 53496 | __ret_175; \ |
| 62755 | }) | 53497 | }) |
| 62756 | #endif | 53498 | #endif |
| 62757 | | 53499 | |
| ... | @@ -62839,1210 +53581,684 @@ __ai int16_t __noswap_vqrdmulhh_s16(int16_t __p0, int16_t __p1) { | ... | @@ -62839,1210 +53581,684 @@ __ai int16_t __noswap_vqrdmulhh_s16(int16_t __p0, int16_t __p1) { |
| 62839 | }) | 53581 | }) |
| 62840 | #endif | 53582 | #endif |
| 62841 | | 53583 | |
| 62842 | #ifdef __LITTLE_ENDIAN__ | | |
| 62843 | __ai uint8_t vqrshlb_u8(uint8_t __p0, uint8_t __p1) { | | |
| 62844 | uint8_t __ret; | | |
| 62845 | __ret = (uint8_t) __builtin_neon_vqrshlb_u8(__p0, __p1); | | |
| 62846 | return __ret; | | |
| 62847 | } | | |
| 62848 | #else | | |
| 62849 | __ai uint8_t vqrshlb_u8(uint8_t __p0, uint8_t __p1) { | 53584 | __ai uint8_t vqrshlb_u8(uint8_t __p0, uint8_t __p1) { |
| 62850 | uint8_t __ret; | 53585 | uint8_t __ret; |
| 62851 | __ret = (uint8_t) __builtin_neon_vqrshlb_u8(__p0, __p1); | 53586 | __ret = (uint8_t) __builtin_neon_vqrshlb_u8(__p0, __p1); |
| 62852 | return __ret; | 53587 | return __ret; |
| 62853 | } | 53588 | } |
| 62854 | #endif | | |
| 62855 | | | |
| 62856 | #ifdef __LITTLE_ENDIAN__ | | |
| 62857 | __ai uint32_t vqrshls_u32(uint32_t __p0, uint32_t __p1) { | 53589 | __ai uint32_t vqrshls_u32(uint32_t __p0, uint32_t __p1) { |
| 62858 | uint32_t __ret; | 53590 | uint32_t __ret; |
| 62859 | __ret = (uint32_t) __builtin_neon_vqrshls_u32(__p0, __p1); | 53591 | __ret = (uint32_t) __builtin_neon_vqrshls_u32(__p0, __p1); |
| 62860 | return __ret; | 53592 | return __ret; |
| 62861 | } | 53593 | } |
| 62862 | #else | | |
| 62863 | __ai uint32_t vqrshls_u32(uint32_t __p0, uint32_t __p1) { | | |
| 62864 | uint32_t __ret; | | |
| 62865 | __ret = (uint32_t) __builtin_neon_vqrshls_u32(__p0, __p1); | | |
| 62866 | return __ret; | | |
| 62867 | } | | |
| 62868 | #endif | | |
| 62869 | | | |
| 62870 | #ifdef __LITTLE_ENDIAN__ | | |
| 62871 | __ai uint64_t vqrshld_u64(uint64_t __p0, uint64_t __p1) { | | |
| 62872 | uint64_t __ret; | | |
| 62873 | __ret = (uint64_t) __builtin_neon_vqrshld_u64(__p0, __p1); | | |
| 62874 | return __ret; | | |
| 62875 | } | | |
| 62876 | #else | | |
| 62877 | __ai uint64_t vqrshld_u64(uint64_t __p0, uint64_t __p1) { | 53594 | __ai uint64_t vqrshld_u64(uint64_t __p0, uint64_t __p1) { |
| 62878 | uint64_t __ret; | 53595 | uint64_t __ret; |
| 62879 | __ret = (uint64_t) __builtin_neon_vqrshld_u64(__p0, __p1); | 53596 | __ret = (uint64_t) __builtin_neon_vqrshld_u64(__p0, __p1); |
| 62880 | return __ret; | 53597 | return __ret; |
| 62881 | } | 53598 | } |
| 62882 | #endif | | |
| 62883 | | | |
| 62884 | #ifdef __LITTLE_ENDIAN__ | | |
| 62885 | __ai uint16_t vqrshlh_u16(uint16_t __p0, uint16_t __p1) { | 53599 | __ai uint16_t vqrshlh_u16(uint16_t __p0, uint16_t __p1) { |
| 62886 | uint16_t __ret; | 53600 | uint16_t __ret; |
| 62887 | __ret = (uint16_t) __builtin_neon_vqrshlh_u16(__p0, __p1); | 53601 | __ret = (uint16_t) __builtin_neon_vqrshlh_u16(__p0, __p1); |
| 62888 | return __ret; | 53602 | return __ret; |
| 62889 | } | 53603 | } |
| 62890 | #else | | |
| 62891 | __ai uint16_t vqrshlh_u16(uint16_t __p0, uint16_t __p1) { | | |
| 62892 | uint16_t __ret; | | |
| 62893 | __ret = (uint16_t) __builtin_neon_vqrshlh_u16(__p0, __p1); | | |
| 62894 | return __ret; | | |
| 62895 | } | | |
| 62896 | #endif | | |
| 62897 | | | |
| 62898 | #ifdef __LITTLE_ENDIAN__ | | |
| 62899 | __ai int8_t vqrshlb_s8(int8_t __p0, int8_t __p1) { | | |
| 62900 | int8_t __ret; | | |
| 62901 | __ret = (int8_t) __builtin_neon_vqrshlb_s8(__p0, __p1); | | |
| 62902 | return __ret; | | |
| 62903 | } | | |
| 62904 | #else | | |
| 62905 | __ai int8_t vqrshlb_s8(int8_t __p0, int8_t __p1) { | 53604 | __ai int8_t vqrshlb_s8(int8_t __p0, int8_t __p1) { |
| 62906 | int8_t __ret; | 53605 | int8_t __ret; |
| 62907 | __ret = (int8_t) __builtin_neon_vqrshlb_s8(__p0, __p1); | 53606 | __ret = (int8_t) __builtin_neon_vqrshlb_s8(__p0, __p1); |
| 62908 | return __ret; | 53607 | return __ret; |
| 62909 | } | 53608 | } |
| 62910 | #endif | | |
| 62911 | | | |
| 62912 | #ifdef __LITTLE_ENDIAN__ | | |
| 62913 | __ai int32_t vqrshls_s32(int32_t __p0, int32_t __p1) { | | |
| 62914 | int32_t __ret; | | |
| 62915 | __ret = (int32_t) __builtin_neon_vqrshls_s32(__p0, __p1); | | |
| 62916 | return __ret; | | |
| 62917 | } | | |
| 62918 | #else | | |
| 62919 | __ai int32_t vqrshls_s32(int32_t __p0, int32_t __p1) { | 53609 | __ai int32_t vqrshls_s32(int32_t __p0, int32_t __p1) { |
| 62920 | int32_t __ret; | 53610 | int32_t __ret; |
| 62921 | __ret = (int32_t) __builtin_neon_vqrshls_s32(__p0, __p1); | 53611 | __ret = (int32_t) __builtin_neon_vqrshls_s32(__p0, __p1); |
| 62922 | return __ret; | 53612 | return __ret; |
| 62923 | } | 53613 | } |
| 62924 | #endif | | |
| 62925 | | | |
| 62926 | #ifdef __LITTLE_ENDIAN__ | | |
| 62927 | __ai int64_t vqrshld_s64(int64_t __p0, int64_t __p1) { | 53614 | __ai int64_t vqrshld_s64(int64_t __p0, int64_t __p1) { |
| 62928 | int64_t __ret; | 53615 | int64_t __ret; |
| 62929 | __ret = (int64_t) __builtin_neon_vqrshld_s64(__p0, __p1); | 53616 | __ret = (int64_t) __builtin_neon_vqrshld_s64(__p0, __p1); |
| 62930 | return __ret; | 53617 | return __ret; |
| 62931 | } | 53618 | } |
| 62932 | #else | | |
| 62933 | __ai int64_t vqrshld_s64(int64_t __p0, int64_t __p1) { | | |
| 62934 | int64_t __ret; | | |
| 62935 | __ret = (int64_t) __builtin_neon_vqrshld_s64(__p0, __p1); | | |
| 62936 | return __ret; | | |
| 62937 | } | | |
| 62938 | #endif | | |
| 62939 | | | |
| 62940 | #ifdef __LITTLE_ENDIAN__ | | |
| 62941 | __ai int16_t vqrshlh_s16(int16_t __p0, int16_t __p1) { | 53619 | __ai int16_t vqrshlh_s16(int16_t __p0, int16_t __p1) { |
| 62942 | int16_t __ret; | 53620 | int16_t __ret; |
| 62943 | __ret = (int16_t) __builtin_neon_vqrshlh_s16(__p0, __p1); | 53621 | __ret = (int16_t) __builtin_neon_vqrshlh_s16(__p0, __p1); |
| 62944 | return __ret; | 53622 | return __ret; |
| 62945 | } | 53623 | } |
| 62946 | #else | | |
| 62947 | __ai int16_t vqrshlh_s16(int16_t __p0, int16_t __p1) { | | |
| 62948 | int16_t __ret; | | |
| 62949 | __ret = (int16_t) __builtin_neon_vqrshlh_s16(__p0, __p1); | | |
| 62950 | return __ret; | | |
| 62951 | } | | |
| 62952 | #endif | | |
| 62953 | | | |
| 62954 | #ifdef __LITTLE_ENDIAN__ | 53624 | #ifdef __LITTLE_ENDIAN__ |
| 62955 | #define vqrshrn_high_n_u32(__p0_182, __p1_182, __p2_182) __extension__ ({ \ | 53625 | #define vqrshrn_high_n_u32(__p0_176, __p1_176, __p2_176) __extension__ ({ \ |
| 62956 | uint16x4_t __s0_182 = __p0_182; \ | 53626 | uint16x4_t __s0_176 = __p0_176; \ |
| 62957 | uint32x4_t __s1_182 = __p1_182; \ | 53627 | uint32x4_t __s1_176 = __p1_176; \ |
| 62958 | uint16x8_t __ret_182; \ | 53628 | uint16x8_t __ret_176; \ |
| 62959 | __ret_182 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_182), (uint16x4_t)(vqrshrn_n_u32(__s1_182, __p2_182)))); \ | 53629 | __ret_176 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_176), (uint16x4_t)(vqrshrn_n_u32(__s1_176, __p2_176)))); \ |
| 62960 | __ret_182; \ | 53630 | __ret_176; \ |
| 62961 | }) | 53631 | }) |
| 62962 | #else | 53632 | #else |
| 62963 | #define vqrshrn_high_n_u32(__p0_183, __p1_183, __p2_183) __extension__ ({ \ | 53633 | #define vqrshrn_high_n_u32(__p0_177, __p1_177, __p2_177) __extension__ ({ \ |
| 62964 | uint16x4_t __s0_183 = __p0_183; \ | 53634 | uint16x4_t __s0_177 = __p0_177; \ |
| 62965 | uint32x4_t __s1_183 = __p1_183; \ | 53635 | uint32x4_t __s1_177 = __p1_177; \ |
| 62966 | uint16x4_t __rev0_183; __rev0_183 = __builtin_shufflevector(__s0_183, __s0_183, 3, 2, 1, 0); \ | 53636 | uint16x4_t __rev0_177; __rev0_177 = __builtin_shufflevector(__s0_177, __s0_177, 3, 2, 1, 0); \ |
| 62967 | uint32x4_t __rev1_183; __rev1_183 = __builtin_shufflevector(__s1_183, __s1_183, 3, 2, 1, 0); \ | 53637 | uint32x4_t __rev1_177; __rev1_177 = __builtin_shufflevector(__s1_177, __s1_177, 3, 2, 1, 0); \ |
| 62968 | uint16x8_t __ret_183; \ | 53638 | uint16x8_t __ret_177; \ |
| 62969 | __ret_183 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_183), (uint16x4_t)(__noswap_vqrshrn_n_u32(__rev1_183, __p2_183)))); \ | 53639 | __ret_177 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_177), (uint16x4_t)(__noswap_vqrshrn_n_u32(__rev1_177, __p2_177)))); \ |
| 62970 | __ret_183 = __builtin_shufflevector(__ret_183, __ret_183, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53640 | __ret_177 = __builtin_shufflevector(__ret_177, __ret_177, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 62971 | __ret_183; \ | 53641 | __ret_177; \ |
| 62972 | }) | 53642 | }) |
| 62973 | #endif | 53643 | #endif |
| 62974 | | 53644 | |
| 62975 | #ifdef __LITTLE_ENDIAN__ | 53645 | #ifdef __LITTLE_ENDIAN__ |
| 62976 | #define vqrshrn_high_n_u64(__p0_184, __p1_184, __p2_184) __extension__ ({ \ | 53646 | #define vqrshrn_high_n_u64(__p0_178, __p1_178, __p2_178) __extension__ ({ \ |
| 62977 | uint32x2_t __s0_184 = __p0_184; \ | 53647 | uint32x2_t __s0_178 = __p0_178; \ |
| 62978 | uint64x2_t __s1_184 = __p1_184; \ | 53648 | uint64x2_t __s1_178 = __p1_178; \ |
| 62979 | uint32x4_t __ret_184; \ | 53649 | uint32x4_t __ret_178; \ |
| 62980 | __ret_184 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_184), (uint32x2_t)(vqrshrn_n_u64(__s1_184, __p2_184)))); \ | 53650 | __ret_178 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_178), (uint32x2_t)(vqrshrn_n_u64(__s1_178, __p2_178)))); \ |
| 62981 | __ret_184; \ | 53651 | __ret_178; \ |
| 62982 | }) | 53652 | }) |
| 62983 | #else | 53653 | #else |
| 62984 | #define vqrshrn_high_n_u64(__p0_185, __p1_185, __p2_185) __extension__ ({ \ | 53654 | #define vqrshrn_high_n_u64(__p0_179, __p1_179, __p2_179) __extension__ ({ \ |
| 62985 | uint32x2_t __s0_185 = __p0_185; \ | 53655 | uint32x2_t __s0_179 = __p0_179; \ |
| 62986 | uint64x2_t __s1_185 = __p1_185; \ | 53656 | uint64x2_t __s1_179 = __p1_179; \ |
| 62987 | uint32x2_t __rev0_185; __rev0_185 = __builtin_shufflevector(__s0_185, __s0_185, 1, 0); \ | 53657 | uint32x2_t __rev0_179; __rev0_179 = __builtin_shufflevector(__s0_179, __s0_179, 1, 0); \ |
| 62988 | uint64x2_t __rev1_185; __rev1_185 = __builtin_shufflevector(__s1_185, __s1_185, 1, 0); \ | 53658 | uint64x2_t __rev1_179; __rev1_179 = __builtin_shufflevector(__s1_179, __s1_179, 1, 0); \ |
| 62989 | uint32x4_t __ret_185; \ | 53659 | uint32x4_t __ret_179; \ |
| 62990 | __ret_185 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_185), (uint32x2_t)(__noswap_vqrshrn_n_u64(__rev1_185, __p2_185)))); \ | 53660 | __ret_179 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_179), (uint32x2_t)(__noswap_vqrshrn_n_u64(__rev1_179, __p2_179)))); \ |
| 62991 | __ret_185 = __builtin_shufflevector(__ret_185, __ret_185, 3, 2, 1, 0); \ | 53661 | __ret_179 = __builtin_shufflevector(__ret_179, __ret_179, 3, 2, 1, 0); \ |
| 62992 | __ret_185; \ | 53662 | __ret_179; \ |
| 62993 | }) | 53663 | }) |
| 62994 | #endif | 53664 | #endif |
| 62995 | | 53665 | |
| 62996 | #ifdef __LITTLE_ENDIAN__ | 53666 | #ifdef __LITTLE_ENDIAN__ |
| 62997 | #define vqrshrn_high_n_u16(__p0_186, __p1_186, __p2_186) __extension__ ({ \ | 53667 | #define vqrshrn_high_n_u16(__p0_180, __p1_180, __p2_180) __extension__ ({ \ |
| 62998 | uint8x8_t __s0_186 = __p0_186; \ | 53668 | uint8x8_t __s0_180 = __p0_180; \ |
| 62999 | uint16x8_t __s1_186 = __p1_186; \ | 53669 | uint16x8_t __s1_180 = __p1_180; \ |
| 63000 | uint8x16_t __ret_186; \ | 53670 | uint8x16_t __ret_180; \ |
| 63001 | __ret_186 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_186), (uint8x8_t)(vqrshrn_n_u16(__s1_186, __p2_186)))); \ | 53671 | __ret_180 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_180), (uint8x8_t)(vqrshrn_n_u16(__s1_180, __p2_180)))); \ |
| 63002 | __ret_186; \ | 53672 | __ret_180; \ |
| 63003 | }) | 53673 | }) |
| 63004 | #else | 53674 | #else |
| 63005 | #define vqrshrn_high_n_u16(__p0_187, __p1_187, __p2_187) __extension__ ({ \ | 53675 | #define vqrshrn_high_n_u16(__p0_181, __p1_181, __p2_181) __extension__ ({ \ |
| 63006 | uint8x8_t __s0_187 = __p0_187; \ | 53676 | uint8x8_t __s0_181 = __p0_181; \ |
| 63007 | uint16x8_t __s1_187 = __p1_187; \ | 53677 | uint16x8_t __s1_181 = __p1_181; \ |
| 63008 | uint8x8_t __rev0_187; __rev0_187 = __builtin_shufflevector(__s0_187, __s0_187, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53678 | uint8x8_t __rev0_181; __rev0_181 = __builtin_shufflevector(__s0_181, __s0_181, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63009 | uint16x8_t __rev1_187; __rev1_187 = __builtin_shufflevector(__s1_187, __s1_187, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53679 | uint16x8_t __rev1_181; __rev1_181 = __builtin_shufflevector(__s1_181, __s1_181, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63010 | uint8x16_t __ret_187; \ | 53680 | uint8x16_t __ret_181; \ |
| 63011 | __ret_187 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_187), (uint8x8_t)(__noswap_vqrshrn_n_u16(__rev1_187, __p2_187)))); \ | 53681 | __ret_181 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_181), (uint8x8_t)(__noswap_vqrshrn_n_u16(__rev1_181, __p2_181)))); \ |
| 63012 | __ret_187 = __builtin_shufflevector(__ret_187, __ret_187, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53682 | __ret_181 = __builtin_shufflevector(__ret_181, __ret_181, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63013 | __ret_187; \ | 53683 | __ret_181; \ |
| 63014 | }) | 53684 | }) |
| 63015 | #endif | 53685 | #endif |
| 63016 | | 53686 | |
| 63017 | #ifdef __LITTLE_ENDIAN__ | 53687 | #ifdef __LITTLE_ENDIAN__ |
| 63018 | #define vqrshrn_high_n_s32(__p0_188, __p1_188, __p2_188) __extension__ ({ \ | 53688 | #define vqrshrn_high_n_s32(__p0_182, __p1_182, __p2_182) __extension__ ({ \ |
| 63019 | int16x4_t __s0_188 = __p0_188; \ | 53689 | int16x4_t __s0_182 = __p0_182; \ |
| 63020 | int32x4_t __s1_188 = __p1_188; \ | 53690 | int32x4_t __s1_182 = __p1_182; \ |
| 63021 | int16x8_t __ret_188; \ | 53691 | int16x8_t __ret_182; \ |
| 63022 | __ret_188 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_188), (int16x4_t)(vqrshrn_n_s32(__s1_188, __p2_188)))); \ | 53692 | __ret_182 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_182), (int16x4_t)(vqrshrn_n_s32(__s1_182, __p2_182)))); \ |
| 63023 | __ret_188; \ | 53693 | __ret_182; \ |
| 63024 | }) | 53694 | }) |
| 63025 | #else | 53695 | #else |
| 63026 | #define vqrshrn_high_n_s32(__p0_189, __p1_189, __p2_189) __extension__ ({ \ | 53696 | #define vqrshrn_high_n_s32(__p0_183, __p1_183, __p2_183) __extension__ ({ \ |
| 63027 | int16x4_t __s0_189 = __p0_189; \ | 53697 | int16x4_t __s0_183 = __p0_183; \ |
| 63028 | int32x4_t __s1_189 = __p1_189; \ | 53698 | int32x4_t __s1_183 = __p1_183; \ |
| 63029 | int16x4_t __rev0_189; __rev0_189 = __builtin_shufflevector(__s0_189, __s0_189, 3, 2, 1, 0); \ | 53699 | int16x4_t __rev0_183; __rev0_183 = __builtin_shufflevector(__s0_183, __s0_183, 3, 2, 1, 0); \ |
| 63030 | int32x4_t __rev1_189; __rev1_189 = __builtin_shufflevector(__s1_189, __s1_189, 3, 2, 1, 0); \ | 53700 | int32x4_t __rev1_183; __rev1_183 = __builtin_shufflevector(__s1_183, __s1_183, 3, 2, 1, 0); \ |
| 63031 | int16x8_t __ret_189; \ | 53701 | int16x8_t __ret_183; \ |
| 63032 | __ret_189 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_189), (int16x4_t)(__noswap_vqrshrn_n_s32(__rev1_189, __p2_189)))); \ | 53702 | __ret_183 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_183), (int16x4_t)(__noswap_vqrshrn_n_s32(__rev1_183, __p2_183)))); \ |
| 63033 | __ret_189 = __builtin_shufflevector(__ret_189, __ret_189, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53703 | __ret_183 = __builtin_shufflevector(__ret_183, __ret_183, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63034 | __ret_189; \ | 53704 | __ret_183; \ |
| 63035 | }) | 53705 | }) |
| 63036 | #endif | 53706 | #endif |
| 63037 | | 53707 | |
| 63038 | #ifdef __LITTLE_ENDIAN__ | 53708 | #ifdef __LITTLE_ENDIAN__ |
| 63039 | #define vqrshrn_high_n_s64(__p0_190, __p1_190, __p2_190) __extension__ ({ \ | 53709 | #define vqrshrn_high_n_s64(__p0_184, __p1_184, __p2_184) __extension__ ({ \ |
| 63040 | int32x2_t __s0_190 = __p0_190; \ | 53710 | int32x2_t __s0_184 = __p0_184; \ |
| 63041 | int64x2_t __s1_190 = __p1_190; \ | 53711 | int64x2_t __s1_184 = __p1_184; \ |
| 63042 | int32x4_t __ret_190; \ | 53712 | int32x4_t __ret_184; \ |
| 63043 | __ret_190 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_190), (int32x2_t)(vqrshrn_n_s64(__s1_190, __p2_190)))); \ | 53713 | __ret_184 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_184), (int32x2_t)(vqrshrn_n_s64(__s1_184, __p2_184)))); \ |
| 63044 | __ret_190; \ | 53714 | __ret_184; \ |
| 63045 | }) | 53715 | }) |
| 63046 | #else | 53716 | #else |
| 63047 | #define vqrshrn_high_n_s64(__p0_191, __p1_191, __p2_191) __extension__ ({ \ | 53717 | #define vqrshrn_high_n_s64(__p0_185, __p1_185, __p2_185) __extension__ ({ \ |
| 63048 | int32x2_t __s0_191 = __p0_191; \ | 53718 | int32x2_t __s0_185 = __p0_185; \ |
| 63049 | int64x2_t __s1_191 = __p1_191; \ | 53719 | int64x2_t __s1_185 = __p1_185; \ |
| 63050 | int32x2_t __rev0_191; __rev0_191 = __builtin_shufflevector(__s0_191, __s0_191, 1, 0); \ | 53720 | int32x2_t __rev0_185; __rev0_185 = __builtin_shufflevector(__s0_185, __s0_185, 1, 0); \ |
| 63051 | int64x2_t __rev1_191; __rev1_191 = __builtin_shufflevector(__s1_191, __s1_191, 1, 0); \ | 53721 | int64x2_t __rev1_185; __rev1_185 = __builtin_shufflevector(__s1_185, __s1_185, 1, 0); \ |
| 63052 | int32x4_t __ret_191; \ | 53722 | int32x4_t __ret_185; \ |
| 63053 | __ret_191 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_191), (int32x2_t)(__noswap_vqrshrn_n_s64(__rev1_191, __p2_191)))); \ | 53723 | __ret_185 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_185), (int32x2_t)(__noswap_vqrshrn_n_s64(__rev1_185, __p2_185)))); \ |
| 63054 | __ret_191 = __builtin_shufflevector(__ret_191, __ret_191, 3, 2, 1, 0); \ | 53724 | __ret_185 = __builtin_shufflevector(__ret_185, __ret_185, 3, 2, 1, 0); \ |
| 63055 | __ret_191; \ | 53725 | __ret_185; \ |
| 63056 | }) | 53726 | }) |
| 63057 | #endif | 53727 | #endif |
| 63058 | | 53728 | |
| 63059 | #ifdef __LITTLE_ENDIAN__ | 53729 | #ifdef __LITTLE_ENDIAN__ |
| 63060 | #define vqrshrn_high_n_s16(__p0_192, __p1_192, __p2_192) __extension__ ({ \ | 53730 | #define vqrshrn_high_n_s16(__p0_186, __p1_186, __p2_186) __extension__ ({ \ |
| 63061 | int8x8_t __s0_192 = __p0_192; \ | 53731 | int8x8_t __s0_186 = __p0_186; \ |
| 63062 | int16x8_t __s1_192 = __p1_192; \ | 53732 | int16x8_t __s1_186 = __p1_186; \ |
| 63063 | int8x16_t __ret_192; \ | 53733 | int8x16_t __ret_186; \ |
| 63064 | __ret_192 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_192), (int8x8_t)(vqrshrn_n_s16(__s1_192, __p2_192)))); \ | 53734 | __ret_186 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_186), (int8x8_t)(vqrshrn_n_s16(__s1_186, __p2_186)))); \ |
| 63065 | __ret_192; \ | 53735 | __ret_186; \ |
| 63066 | }) | 53736 | }) |
| 63067 | #else | 53737 | #else |
| 63068 | #define vqrshrn_high_n_s16(__p0_193, __p1_193, __p2_193) __extension__ ({ \ | 53738 | #define vqrshrn_high_n_s16(__p0_187, __p1_187, __p2_187) __extension__ ({ \ |
| 63069 | int8x8_t __s0_193 = __p0_193; \ | 53739 | int8x8_t __s0_187 = __p0_187; \ |
| 63070 | int16x8_t __s1_193 = __p1_193; \ | 53740 | int16x8_t __s1_187 = __p1_187; \ |
| 63071 | int8x8_t __rev0_193; __rev0_193 = __builtin_shufflevector(__s0_193, __s0_193, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53741 | int8x8_t __rev0_187; __rev0_187 = __builtin_shufflevector(__s0_187, __s0_187, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63072 | int16x8_t __rev1_193; __rev1_193 = __builtin_shufflevector(__s1_193, __s1_193, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53742 | int16x8_t __rev1_187; __rev1_187 = __builtin_shufflevector(__s1_187, __s1_187, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63073 | int8x16_t __ret_193; \ | 53743 | int8x16_t __ret_187; \ |
| 63074 | __ret_193 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_193), (int8x8_t)(__noswap_vqrshrn_n_s16(__rev1_193, __p2_193)))); \ | 53744 | __ret_187 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_187), (int8x8_t)(__noswap_vqrshrn_n_s16(__rev1_187, __p2_187)))); \ |
| 63075 | __ret_193 = __builtin_shufflevector(__ret_193, __ret_193, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53745 | __ret_187 = __builtin_shufflevector(__ret_187, __ret_187, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63076 | __ret_193; \ | 53746 | __ret_187; \ |
| 63077 | }) | 53747 | }) |
| 63078 | #endif | 53748 | #endif |
| 63079 | | 53749 | |
| 63080 | #ifdef __LITTLE_ENDIAN__ | | |
| 63081 | #define vqrshrns_n_u32(__p0, __p1) __extension__ ({ \ | 53750 | #define vqrshrns_n_u32(__p0, __p1) __extension__ ({ \ |
| 63082 | uint32_t __s0 = __p0; \ | 53751 | uint32_t __s0 = __p0; \ |
| 63083 | uint16_t __ret; \ | 53752 | uint16_t __ret; \ |
| 63084 | __ret = (uint16_t) __builtin_neon_vqrshrns_n_u32(__s0, __p1); \ | 53753 | __ret = (uint16_t) __builtin_neon_vqrshrns_n_u32(__s0, __p1); \ |
| 63085 | __ret; \ | 53754 | __ret; \ |
| 63086 | }) | 53755 | }) |
| 63087 | #else | | |
| 63088 | #define vqrshrns_n_u32(__p0, __p1) __extension__ ({ \ | | |
| 63089 | uint32_t __s0 = __p0; \ | | |
| 63090 | uint16_t __ret; \ | | |
| 63091 | __ret = (uint16_t) __builtin_neon_vqrshrns_n_u32(__s0, __p1); \ | | |
| 63092 | __ret; \ | | |
| 63093 | }) | | |
| 63094 | #endif | | |
| 63095 | | | |
| 63096 | #ifdef __LITTLE_ENDIAN__ | | |
| 63097 | #define vqrshrnd_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 63098 | uint64_t __s0 = __p0; \ | | |
| 63099 | uint32_t __ret; \ | | |
| 63100 | __ret = (uint32_t) __builtin_neon_vqrshrnd_n_u64(__s0, __p1); \ | | |
| 63101 | __ret; \ | | |
| 63102 | }) | | |
| 63103 | #else | | |
| 63104 | #define vqrshrnd_n_u64(__p0, __p1) __extension__ ({ \ | 53756 | #define vqrshrnd_n_u64(__p0, __p1) __extension__ ({ \ |
| 63105 | uint64_t __s0 = __p0; \ | 53757 | uint64_t __s0 = __p0; \ |
| 63106 | uint32_t __ret; \ | 53758 | uint32_t __ret; \ |
| 63107 | __ret = (uint32_t) __builtin_neon_vqrshrnd_n_u64(__s0, __p1); \ | 53759 | __ret = (uint32_t) __builtin_neon_vqrshrnd_n_u64(__s0, __p1); \ |
| 63108 | __ret; \ | 53760 | __ret; \ |
| 63109 | }) | 53761 | }) |
| 63110 | #endif | | |
| 63111 | | | |
| 63112 | #ifdef __LITTLE_ENDIAN__ | | |
| 63113 | #define vqrshrnh_n_u16(__p0, __p1) __extension__ ({ \ | 53762 | #define vqrshrnh_n_u16(__p0, __p1) __extension__ ({ \ |
| 63114 | uint16_t __s0 = __p0; \ | 53763 | uint16_t __s0 = __p0; \ |
| 63115 | uint8_t __ret; \ | 53764 | uint8_t __ret; \ |
| 63116 | __ret = (uint8_t) __builtin_neon_vqrshrnh_n_u16(__s0, __p1); \ | 53765 | __ret = (uint8_t) __builtin_neon_vqrshrnh_n_u16(__s0, __p1); \ |
| 63117 | __ret; \ | 53766 | __ret; \ |
| 63118 | }) | 53767 | }) |
| 63119 | #else | | |
| 63120 | #define vqrshrnh_n_u16(__p0, __p1) __extension__ ({ \ | | |
| 63121 | uint16_t __s0 = __p0; \ | | |
| 63122 | uint8_t __ret; \ | | |
| 63123 | __ret = (uint8_t) __builtin_neon_vqrshrnh_n_u16(__s0, __p1); \ | | |
| 63124 | __ret; \ | | |
| 63125 | }) | | |
| 63126 | #endif | | |
| 63127 | | | |
| 63128 | #ifdef __LITTLE_ENDIAN__ | | |
| 63129 | #define vqrshrns_n_s32(__p0, __p1) __extension__ ({ \ | 53768 | #define vqrshrns_n_s32(__p0, __p1) __extension__ ({ \ |
| 63130 | int32_t __s0 = __p0; \ | 53769 | int32_t __s0 = __p0; \ |
| 63131 | int16_t __ret; \ | 53770 | int16_t __ret; \ |
| 63132 | __ret = (int16_t) __builtin_neon_vqrshrns_n_s32(__s0, __p1); \ | 53771 | __ret = (int16_t) __builtin_neon_vqrshrns_n_s32(__s0, __p1); \ |
| 63133 | __ret; \ | 53772 | __ret; \ |
| 63134 | }) | 53773 | }) |
| 63135 | #else | | |
| 63136 | #define vqrshrns_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 63137 | int32_t __s0 = __p0; \ | | |
| 63138 | int16_t __ret; \ | | |
| 63139 | __ret = (int16_t) __builtin_neon_vqrshrns_n_s32(__s0, __p1); \ | | |
| 63140 | __ret; \ | | |
| 63141 | }) | | |
| 63142 | #endif | | |
| 63143 | | | |
| 63144 | #ifdef __LITTLE_ENDIAN__ | | |
| 63145 | #define vqrshrnd_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 63146 | int64_t __s0 = __p0; \ | | |
| 63147 | int32_t __ret; \ | | |
| 63148 | __ret = (int32_t) __builtin_neon_vqrshrnd_n_s64(__s0, __p1); \ | | |
| 63149 | __ret; \ | | |
| 63150 | }) | | |
| 63151 | #else | | |
| 63152 | #define vqrshrnd_n_s64(__p0, __p1) __extension__ ({ \ | 53774 | #define vqrshrnd_n_s64(__p0, __p1) __extension__ ({ \ |
| 63153 | int64_t __s0 = __p0; \ | 53775 | int64_t __s0 = __p0; \ |
| 63154 | int32_t __ret; \ | 53776 | int32_t __ret; \ |
| 63155 | __ret = (int32_t) __builtin_neon_vqrshrnd_n_s64(__s0, __p1); \ | 53777 | __ret = (int32_t) __builtin_neon_vqrshrnd_n_s64(__s0, __p1); \ |
| 63156 | __ret; \ | 53778 | __ret; \ |
| 63157 | }) | 53779 | }) |
| 63158 | #endif | | |
| 63159 | | | |
| 63160 | #ifdef __LITTLE_ENDIAN__ | | |
| 63161 | #define vqrshrnh_n_s16(__p0, __p1) __extension__ ({ \ | 53780 | #define vqrshrnh_n_s16(__p0, __p1) __extension__ ({ \ |
| 63162 | int16_t __s0 = __p0; \ | 53781 | int16_t __s0 = __p0; \ |
| 63163 | int8_t __ret; \ | 53782 | int8_t __ret; \ |
| 63164 | __ret = (int8_t) __builtin_neon_vqrshrnh_n_s16(__s0, __p1); \ | 53783 | __ret = (int8_t) __builtin_neon_vqrshrnh_n_s16(__s0, __p1); \ |
| 63165 | __ret; \ | 53784 | __ret; \ |
| 63166 | }) | 53785 | }) |
| 63167 | #else | | |
| 63168 | #define vqrshrnh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 63169 | int16_t __s0 = __p0; \ | | |
| 63170 | int8_t __ret; \ | | |
| 63171 | __ret = (int8_t) __builtin_neon_vqrshrnh_n_s16(__s0, __p1); \ | | |
| 63172 | __ret; \ | | |
| 63173 | }) | | |
| 63174 | #endif | | |
| 63175 | | | |
| 63176 | #ifdef __LITTLE_ENDIAN__ | 53786 | #ifdef __LITTLE_ENDIAN__ |
| 63177 | #define vqrshrun_high_n_s32(__p0_194, __p1_194, __p2_194) __extension__ ({ \ | 53787 | #define vqrshrun_high_n_s32(__p0_188, __p1_188, __p2_188) __extension__ ({ \ |
| 63178 | int16x4_t __s0_194 = __p0_194; \ | 53788 | int16x4_t __s0_188 = __p0_188; \ |
| 63179 | int32x4_t __s1_194 = __p1_194; \ | 53789 | int32x4_t __s1_188 = __p1_188; \ |
| 63180 | int16x8_t __ret_194; \ | 53790 | int16x8_t __ret_188; \ |
| 63181 | __ret_194 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_194), (int16x4_t)(vqrshrun_n_s32(__s1_194, __p2_194)))); \ | 53791 | __ret_188 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_188), (int16x4_t)(vqrshrun_n_s32(__s1_188, __p2_188)))); \ |
| 63182 | __ret_194; \ | 53792 | __ret_188; \ |
| 63183 | }) | 53793 | }) |
| 63184 | #else | 53794 | #else |
| 63185 | #define vqrshrun_high_n_s32(__p0_195, __p1_195, __p2_195) __extension__ ({ \ | 53795 | #define vqrshrun_high_n_s32(__p0_189, __p1_189, __p2_189) __extension__ ({ \ |
| 63186 | int16x4_t __s0_195 = __p0_195; \ | 53796 | int16x4_t __s0_189 = __p0_189; \ |
| 63187 | int32x4_t __s1_195 = __p1_195; \ | 53797 | int32x4_t __s1_189 = __p1_189; \ |
| 63188 | int16x4_t __rev0_195; __rev0_195 = __builtin_shufflevector(__s0_195, __s0_195, 3, 2, 1, 0); \ | 53798 | int16x4_t __rev0_189; __rev0_189 = __builtin_shufflevector(__s0_189, __s0_189, 3, 2, 1, 0); \ |
| 63189 | int32x4_t __rev1_195; __rev1_195 = __builtin_shufflevector(__s1_195, __s1_195, 3, 2, 1, 0); \ | 53799 | int32x4_t __rev1_189; __rev1_189 = __builtin_shufflevector(__s1_189, __s1_189, 3, 2, 1, 0); \ |
| 63190 | int16x8_t __ret_195; \ | 53800 | int16x8_t __ret_189; \ |
| 63191 | __ret_195 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_195), (int16x4_t)(__noswap_vqrshrun_n_s32(__rev1_195, __p2_195)))); \ | 53801 | __ret_189 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_189), (int16x4_t)(__noswap_vqrshrun_n_s32(__rev1_189, __p2_189)))); \ |
| 63192 | __ret_195 = __builtin_shufflevector(__ret_195, __ret_195, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53802 | __ret_189 = __builtin_shufflevector(__ret_189, __ret_189, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63193 | __ret_195; \ | 53803 | __ret_189; \ |
| 63194 | }) | 53804 | }) |
| 63195 | #endif | 53805 | #endif |
| 63196 | | 53806 | |
| 63197 | #ifdef __LITTLE_ENDIAN__ | 53807 | #ifdef __LITTLE_ENDIAN__ |
| 63198 | #define vqrshrun_high_n_s64(__p0_196, __p1_196, __p2_196) __extension__ ({ \ | 53808 | #define vqrshrun_high_n_s64(__p0_190, __p1_190, __p2_190) __extension__ ({ \ |
| 63199 | int32x2_t __s0_196 = __p0_196; \ | 53809 | int32x2_t __s0_190 = __p0_190; \ |
| 63200 | int64x2_t __s1_196 = __p1_196; \ | 53810 | int64x2_t __s1_190 = __p1_190; \ |
| 63201 | int32x4_t __ret_196; \ | 53811 | int32x4_t __ret_190; \ |
| 63202 | __ret_196 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_196), (int32x2_t)(vqrshrun_n_s64(__s1_196, __p2_196)))); \ | 53812 | __ret_190 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_190), (int32x2_t)(vqrshrun_n_s64(__s1_190, __p2_190)))); \ |
| 63203 | __ret_196; \ | 53813 | __ret_190; \ |
| 63204 | }) | 53814 | }) |
| 63205 | #else | 53815 | #else |
| 63206 | #define vqrshrun_high_n_s64(__p0_197, __p1_197, __p2_197) __extension__ ({ \ | 53816 | #define vqrshrun_high_n_s64(__p0_191, __p1_191, __p2_191) __extension__ ({ \ |
| 63207 | int32x2_t __s0_197 = __p0_197; \ | 53817 | int32x2_t __s0_191 = __p0_191; \ |
| 63208 | int64x2_t __s1_197 = __p1_197; \ | 53818 | int64x2_t __s1_191 = __p1_191; \ |
| 63209 | int32x2_t __rev0_197; __rev0_197 = __builtin_shufflevector(__s0_197, __s0_197, 1, 0); \ | 53819 | int32x2_t __rev0_191; __rev0_191 = __builtin_shufflevector(__s0_191, __s0_191, 1, 0); \ |
| 63210 | int64x2_t __rev1_197; __rev1_197 = __builtin_shufflevector(__s1_197, __s1_197, 1, 0); \ | 53820 | int64x2_t __rev1_191; __rev1_191 = __builtin_shufflevector(__s1_191, __s1_191, 1, 0); \ |
| 63211 | int32x4_t __ret_197; \ | 53821 | int32x4_t __ret_191; \ |
| 63212 | __ret_197 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_197), (int32x2_t)(__noswap_vqrshrun_n_s64(__rev1_197, __p2_197)))); \ | 53822 | __ret_191 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_191), (int32x2_t)(__noswap_vqrshrun_n_s64(__rev1_191, __p2_191)))); \ |
| 63213 | __ret_197 = __builtin_shufflevector(__ret_197, __ret_197, 3, 2, 1, 0); \ | 53823 | __ret_191 = __builtin_shufflevector(__ret_191, __ret_191, 3, 2, 1, 0); \ |
| 63214 | __ret_197; \ | 53824 | __ret_191; \ |
| 63215 | }) | 53825 | }) |
| 63216 | #endif | 53826 | #endif |
| 63217 | | 53827 | |
| 63218 | #ifdef __LITTLE_ENDIAN__ | 53828 | #ifdef __LITTLE_ENDIAN__ |
| 63219 | #define vqrshrun_high_n_s16(__p0_198, __p1_198, __p2_198) __extension__ ({ \ | 53829 | #define vqrshrun_high_n_s16(__p0_192, __p1_192, __p2_192) __extension__ ({ \ |
| 63220 | int8x8_t __s0_198 = __p0_198; \ | 53830 | int8x8_t __s0_192 = __p0_192; \ |
| 63221 | int16x8_t __s1_198 = __p1_198; \ | 53831 | int16x8_t __s1_192 = __p1_192; \ |
| 63222 | int8x16_t __ret_198; \ | 53832 | int8x16_t __ret_192; \ |
| 63223 | __ret_198 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_198), (int8x8_t)(vqrshrun_n_s16(__s1_198, __p2_198)))); \ | 53833 | __ret_192 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_192), (int8x8_t)(vqrshrun_n_s16(__s1_192, __p2_192)))); \ |
| 63224 | __ret_198; \ | 53834 | __ret_192; \ |
| 63225 | }) | 53835 | }) |
| 63226 | #else | 53836 | #else |
| 63227 | #define vqrshrun_high_n_s16(__p0_199, __p1_199, __p2_199) __extension__ ({ \ | 53837 | #define vqrshrun_high_n_s16(__p0_193, __p1_193, __p2_193) __extension__ ({ \ |
| 63228 | int8x8_t __s0_199 = __p0_199; \ | 53838 | int8x8_t __s0_193 = __p0_193; \ |
| 63229 | int16x8_t __s1_199 = __p1_199; \ | 53839 | int16x8_t __s1_193 = __p1_193; \ |
| 63230 | int8x8_t __rev0_199; __rev0_199 = __builtin_shufflevector(__s0_199, __s0_199, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53840 | int8x8_t __rev0_193; __rev0_193 = __builtin_shufflevector(__s0_193, __s0_193, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63231 | int16x8_t __rev1_199; __rev1_199 = __builtin_shufflevector(__s1_199, __s1_199, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53841 | int16x8_t __rev1_193; __rev1_193 = __builtin_shufflevector(__s1_193, __s1_193, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63232 | int8x16_t __ret_199; \ | 53842 | int8x16_t __ret_193; \ |
| 63233 | __ret_199 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_199), (int8x8_t)(__noswap_vqrshrun_n_s16(__rev1_199, __p2_199)))); \ | 53843 | __ret_193 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_193), (int8x8_t)(__noswap_vqrshrun_n_s16(__rev1_193, __p2_193)))); \ |
| 63234 | __ret_199 = __builtin_shufflevector(__ret_199, __ret_199, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53844 | __ret_193 = __builtin_shufflevector(__ret_193, __ret_193, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63235 | __ret_199; \ | 53845 | __ret_193; \ |
| 63236 | }) | 53846 | }) |
| 63237 | #endif | 53847 | #endif |
| 63238 | | 53848 | |
| 63239 | #ifdef __LITTLE_ENDIAN__ | | |
| 63240 | #define vqrshruns_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 63241 | int32_t __s0 = __p0; \ | | |
| 63242 | int16_t __ret; \ | | |
| 63243 | __ret = (int16_t) __builtin_neon_vqrshruns_n_s32(__s0, __p1); \ | | |
| 63244 | __ret; \ | | |
| 63245 | }) | | |
| 63246 | #else | | |
| 63247 | #define vqrshruns_n_s32(__p0, __p1) __extension__ ({ \ | 53849 | #define vqrshruns_n_s32(__p0, __p1) __extension__ ({ \ |
| 63248 | int32_t __s0 = __p0; \ | 53850 | int32_t __s0 = __p0; \ |
| 63249 | int16_t __ret; \ | 53851 | int16_t __ret; \ |
| 63250 | __ret = (int16_t) __builtin_neon_vqrshruns_n_s32(__s0, __p1); \ | 53852 | __ret = (int16_t) __builtin_neon_vqrshruns_n_s32(__s0, __p1); \ |
| 63251 | __ret; \ | 53853 | __ret; \ |
| 63252 | }) | 53854 | }) |
| 63253 | #endif | | |
| 63254 | | | |
| 63255 | #ifdef __LITTLE_ENDIAN__ | | |
| 63256 | #define vqrshrund_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 63257 | int64_t __s0 = __p0; \ | | |
| 63258 | int32_t __ret; \ | | |
| 63259 | __ret = (int32_t) __builtin_neon_vqrshrund_n_s64(__s0, __p1); \ | | |
| 63260 | __ret; \ | | |
| 63261 | }) | | |
| 63262 | #else | | |
| 63263 | #define vqrshrund_n_s64(__p0, __p1) __extension__ ({ \ | 53855 | #define vqrshrund_n_s64(__p0, __p1) __extension__ ({ \ |
| 63264 | int64_t __s0 = __p0; \ | 53856 | int64_t __s0 = __p0; \ |
| 63265 | int32_t __ret; \ | 53857 | int32_t __ret; \ |
| 63266 | __ret = (int32_t) __builtin_neon_vqrshrund_n_s64(__s0, __p1); \ | 53858 | __ret = (int32_t) __builtin_neon_vqrshrund_n_s64(__s0, __p1); \ |
| 63267 | __ret; \ | 53859 | __ret; \ |
| 63268 | }) | 53860 | }) |
| 63269 | #endif | | |
| 63270 | | | |
| 63271 | #ifdef __LITTLE_ENDIAN__ | | |
| 63272 | #define vqrshrunh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 63273 | int16_t __s0 = __p0; \ | | |
| 63274 | int8_t __ret; \ | | |
| 63275 | __ret = (int8_t) __builtin_neon_vqrshrunh_n_s16(__s0, __p1); \ | | |
| 63276 | __ret; \ | | |
| 63277 | }) | | |
| 63278 | #else | | |
| 63279 | #define vqrshrunh_n_s16(__p0, __p1) __extension__ ({ \ | 53861 | #define vqrshrunh_n_s16(__p0, __p1) __extension__ ({ \ |
| 63280 | int16_t __s0 = __p0; \ | 53862 | int16_t __s0 = __p0; \ |
| 63281 | int8_t __ret; \ | 53863 | int8_t __ret; \ |
| 63282 | __ret = (int8_t) __builtin_neon_vqrshrunh_n_s16(__s0, __p1); \ | 53864 | __ret = (int8_t) __builtin_neon_vqrshrunh_n_s16(__s0, __p1); \ |
| 63283 | __ret; \ | 53865 | __ret; \ |
| 63284 | }) | 53866 | }) |
| 63285 | #endif | | |
| 63286 | | | |
| 63287 | #ifdef __LITTLE_ENDIAN__ | | |
| 63288 | __ai uint8_t vqshlb_u8(uint8_t __p0, uint8_t __p1) { | | |
| 63289 | uint8_t __ret; | | |
| 63290 | __ret = (uint8_t) __builtin_neon_vqshlb_u8(__p0, __p1); | | |
| 63291 | return __ret; | | |
| 63292 | } | | |
| 63293 | #else | | |
| 63294 | __ai uint8_t vqshlb_u8(uint8_t __p0, uint8_t __p1) { | 53867 | __ai uint8_t vqshlb_u8(uint8_t __p0, uint8_t __p1) { |
| 63295 | uint8_t __ret; | 53868 | uint8_t __ret; |
| 63296 | __ret = (uint8_t) __builtin_neon_vqshlb_u8(__p0, __p1); | 53869 | __ret = (uint8_t) __builtin_neon_vqshlb_u8(__p0, __p1); |
| 63297 | return __ret; | 53870 | return __ret; |
| 63298 | } | 53871 | } |
| 63299 | #endif | | |
| 63300 | | | |
| 63301 | #ifdef __LITTLE_ENDIAN__ | | |
| 63302 | __ai uint32_t vqshls_u32(uint32_t __p0, uint32_t __p1) { | | |
| 63303 | uint32_t __ret; | | |
| 63304 | __ret = (uint32_t) __builtin_neon_vqshls_u32(__p0, __p1); | | |
| 63305 | return __ret; | | |
| 63306 | } | | |
| 63307 | #else | | |
| 63308 | __ai uint32_t vqshls_u32(uint32_t __p0, uint32_t __p1) { | 53872 | __ai uint32_t vqshls_u32(uint32_t __p0, uint32_t __p1) { |
| 63309 | uint32_t __ret; | 53873 | uint32_t __ret; |
| 63310 | __ret = (uint32_t) __builtin_neon_vqshls_u32(__p0, __p1); | 53874 | __ret = (uint32_t) __builtin_neon_vqshls_u32(__p0, __p1); |
| 63311 | return __ret; | 53875 | return __ret; |
| 63312 | } | 53876 | } |
| 63313 | #endif | | |
| 63314 | | | |
| 63315 | #ifdef __LITTLE_ENDIAN__ | | |
| 63316 | __ai uint64_t vqshld_u64(uint64_t __p0, uint64_t __p1) { | | |
| 63317 | uint64_t __ret; | | |
| 63318 | __ret = (uint64_t) __builtin_neon_vqshld_u64(__p0, __p1); | | |
| 63319 | return __ret; | | |
| 63320 | } | | |
| 63321 | #else | | |
| 63322 | __ai uint64_t vqshld_u64(uint64_t __p0, uint64_t __p1) { | 53877 | __ai uint64_t vqshld_u64(uint64_t __p0, uint64_t __p1) { |
| 63323 | uint64_t __ret; | 53878 | uint64_t __ret; |
| 63324 | __ret = (uint64_t) __builtin_neon_vqshld_u64(__p0, __p1); | 53879 | __ret = (uint64_t) __builtin_neon_vqshld_u64(__p0, __p1); |
| 63325 | return __ret; | 53880 | return __ret; |
| 63326 | } | 53881 | } |
| 63327 | #endif | | |
| 63328 | | | |
| 63329 | #ifdef __LITTLE_ENDIAN__ | | |
| 63330 | __ai uint16_t vqshlh_u16(uint16_t __p0, uint16_t __p1) { | | |
| 63331 | uint16_t __ret; | | |
| 63332 | __ret = (uint16_t) __builtin_neon_vqshlh_u16(__p0, __p1); | | |
| 63333 | return __ret; | | |
| 63334 | } | | |
| 63335 | #else | | |
| 63336 | __ai uint16_t vqshlh_u16(uint16_t __p0, uint16_t __p1) { | 53882 | __ai uint16_t vqshlh_u16(uint16_t __p0, uint16_t __p1) { |
| 63337 | uint16_t __ret; | 53883 | uint16_t __ret; |
| 63338 | __ret = (uint16_t) __builtin_neon_vqshlh_u16(__p0, __p1); | 53884 | __ret = (uint16_t) __builtin_neon_vqshlh_u16(__p0, __p1); |
| 63339 | return __ret; | 53885 | return __ret; |
| 63340 | } | 53886 | } |
| 63341 | #endif | | |
| 63342 | | | |
| 63343 | #ifdef __LITTLE_ENDIAN__ | | |
| 63344 | __ai int8_t vqshlb_s8(int8_t __p0, int8_t __p1) { | | |
| 63345 | int8_t __ret; | | |
| 63346 | __ret = (int8_t) __builtin_neon_vqshlb_s8(__p0, __p1); | | |
| 63347 | return __ret; | | |
| 63348 | } | | |
| 63349 | #else | | |
| 63350 | __ai int8_t vqshlb_s8(int8_t __p0, int8_t __p1) { | 53887 | __ai int8_t vqshlb_s8(int8_t __p0, int8_t __p1) { |
| 63351 | int8_t __ret; | 53888 | int8_t __ret; |
| 63352 | __ret = (int8_t) __builtin_neon_vqshlb_s8(__p0, __p1); | 53889 | __ret = (int8_t) __builtin_neon_vqshlb_s8(__p0, __p1); |
| 63353 | return __ret; | 53890 | return __ret; |
| 63354 | } | 53891 | } |
| 63355 | #endif | | |
| 63356 | | | |
| 63357 | #ifdef __LITTLE_ENDIAN__ | | |
| 63358 | __ai int32_t vqshls_s32(int32_t __p0, int32_t __p1) { | | |
| 63359 | int32_t __ret; | | |
| 63360 | __ret = (int32_t) __builtin_neon_vqshls_s32(__p0, __p1); | | |
| 63361 | return __ret; | | |
| 63362 | } | | |
| 63363 | #else | | |
| 63364 | __ai int32_t vqshls_s32(int32_t __p0, int32_t __p1) { | 53892 | __ai int32_t vqshls_s32(int32_t __p0, int32_t __p1) { |
| 63365 | int32_t __ret; | 53893 | int32_t __ret; |
| 63366 | __ret = (int32_t) __builtin_neon_vqshls_s32(__p0, __p1); | 53894 | __ret = (int32_t) __builtin_neon_vqshls_s32(__p0, __p1); |
| 63367 | return __ret; | 53895 | return __ret; |
| 63368 | } | 53896 | } |
| 63369 | #endif | | |
| 63370 | | | |
| 63371 | #ifdef __LITTLE_ENDIAN__ | | |
| 63372 | __ai int64_t vqshld_s64(int64_t __p0, int64_t __p1) { | | |
| 63373 | int64_t __ret; | | |
| 63374 | __ret = (int64_t) __builtin_neon_vqshld_s64(__p0, __p1); | | |
| 63375 | return __ret; | | |
| 63376 | } | | |
| 63377 | #else | | |
| 63378 | __ai int64_t vqshld_s64(int64_t __p0, int64_t __p1) { | 53897 | __ai int64_t vqshld_s64(int64_t __p0, int64_t __p1) { |
| 63379 | int64_t __ret; | 53898 | int64_t __ret; |
| 63380 | __ret = (int64_t) __builtin_neon_vqshld_s64(__p0, __p1); | 53899 | __ret = (int64_t) __builtin_neon_vqshld_s64(__p0, __p1); |
| 63381 | return __ret; | 53900 | return __ret; |
| 63382 | } | 53901 | } |
| 63383 | #endif | | |
| 63384 | | | |
| 63385 | #ifdef __LITTLE_ENDIAN__ | | |
| 63386 | __ai int16_t vqshlh_s16(int16_t __p0, int16_t __p1) { | | |
| 63387 | int16_t __ret; | | |
| 63388 | __ret = (int16_t) __builtin_neon_vqshlh_s16(__p0, __p1); | | |
| 63389 | return __ret; | | |
| 63390 | } | | |
| 63391 | #else | | |
| 63392 | __ai int16_t vqshlh_s16(int16_t __p0, int16_t __p1) { | 53902 | __ai int16_t vqshlh_s16(int16_t __p0, int16_t __p1) { |
| 63393 | int16_t __ret; | 53903 | int16_t __ret; |
| 63394 | __ret = (int16_t) __builtin_neon_vqshlh_s16(__p0, __p1); | 53904 | __ret = (int16_t) __builtin_neon_vqshlh_s16(__p0, __p1); |
| 63395 | return __ret; | 53905 | return __ret; |
| 63396 | } | 53906 | } |
| 63397 | #endif | | |
| 63398 | | | |
| 63399 | #ifdef __LITTLE_ENDIAN__ | | |
| 63400 | #define vqshlb_n_u8(__p0, __p1) __extension__ ({ \ | | |
| 63401 | uint8_t __s0 = __p0; \ | | |
| 63402 | uint8_t __ret; \ | | |
| 63403 | __ret = (uint8_t) __builtin_neon_vqshlb_n_u8(__s0, __p1); \ | | |
| 63404 | __ret; \ | | |
| 63405 | }) | | |
| 63406 | #else | | |
| 63407 | #define vqshlb_n_u8(__p0, __p1) __extension__ ({ \ | 53907 | #define vqshlb_n_u8(__p0, __p1) __extension__ ({ \ |
| 63408 | uint8_t __s0 = __p0; \ | 53908 | uint8_t __s0 = __p0; \ |
| 63409 | uint8_t __ret; \ | 53909 | uint8_t __ret; \ |
| 63410 | __ret = (uint8_t) __builtin_neon_vqshlb_n_u8(__s0, __p1); \ | 53910 | __ret = (uint8_t) __builtin_neon_vqshlb_n_u8(__s0, __p1); \ |
| 63411 | __ret; \ | 53911 | __ret; \ |
| 63412 | }) | 53912 | }) |
| 63413 | #endif | | |
| 63414 | | | |
| 63415 | #ifdef __LITTLE_ENDIAN__ | | |
| 63416 | #define vqshls_n_u32(__p0, __p1) __extension__ ({ \ | | |
| 63417 | uint32_t __s0 = __p0; \ | | |
| 63418 | uint32_t __ret; \ | | |
| 63419 | __ret = (uint32_t) __builtin_neon_vqshls_n_u32(__s0, __p1); \ | | |
| 63420 | __ret; \ | | |
| 63421 | }) | | |
| 63422 | #else | | |
| 63423 | #define vqshls_n_u32(__p0, __p1) __extension__ ({ \ | 53913 | #define vqshls_n_u32(__p0, __p1) __extension__ ({ \ |
| 63424 | uint32_t __s0 = __p0; \ | 53914 | uint32_t __s0 = __p0; \ |
| 63425 | uint32_t __ret; \ | 53915 | uint32_t __ret; \ |
| 63426 | __ret = (uint32_t) __builtin_neon_vqshls_n_u32(__s0, __p1); \ | 53916 | __ret = (uint32_t) __builtin_neon_vqshls_n_u32(__s0, __p1); \ |
| 63427 | __ret; \ | 53917 | __ret; \ |
| 63428 | }) | 53918 | }) |
| 63429 | #endif | | |
| 63430 | | | |
| 63431 | #ifdef __LITTLE_ENDIAN__ | | |
| 63432 | #define vqshld_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 63433 | uint64_t __s0 = __p0; \ | | |
| 63434 | uint64_t __ret; \ | | |
| 63435 | __ret = (uint64_t) __builtin_neon_vqshld_n_u64(__s0, __p1); \ | | |
| 63436 | __ret; \ | | |
| 63437 | }) | | |
| 63438 | #else | | |
| 63439 | #define vqshld_n_u64(__p0, __p1) __extension__ ({ \ | 53919 | #define vqshld_n_u64(__p0, __p1) __extension__ ({ \ |
| 63440 | uint64_t __s0 = __p0; \ | 53920 | uint64_t __s0 = __p0; \ |
| 63441 | uint64_t __ret; \ | 53921 | uint64_t __ret; \ |
| 63442 | __ret = (uint64_t) __builtin_neon_vqshld_n_u64(__s0, __p1); \ | 53922 | __ret = (uint64_t) __builtin_neon_vqshld_n_u64(__s0, __p1); \ |
| 63443 | __ret; \ | 53923 | __ret; \ |
| 63444 | }) | 53924 | }) |
| 63445 | #endif | | |
| 63446 | | | |
| 63447 | #ifdef __LITTLE_ENDIAN__ | | |
| 63448 | #define vqshlh_n_u16(__p0, __p1) __extension__ ({ \ | | |
| 63449 | uint16_t __s0 = __p0; \ | | |
| 63450 | uint16_t __ret; \ | | |
| 63451 | __ret = (uint16_t) __builtin_neon_vqshlh_n_u16(__s0, __p1); \ | | |
| 63452 | __ret; \ | | |
| 63453 | }) | | |
| 63454 | #else | | |
| 63455 | #define vqshlh_n_u16(__p0, __p1) __extension__ ({ \ | 53925 | #define vqshlh_n_u16(__p0, __p1) __extension__ ({ \ |
| 63456 | uint16_t __s0 = __p0; \ | 53926 | uint16_t __s0 = __p0; \ |
| 63457 | uint16_t __ret; \ | 53927 | uint16_t __ret; \ |
| 63458 | __ret = (uint16_t) __builtin_neon_vqshlh_n_u16(__s0, __p1); \ | 53928 | __ret = (uint16_t) __builtin_neon_vqshlh_n_u16(__s0, __p1); \ |
| 63459 | __ret; \ | 53929 | __ret; \ |
| 63460 | }) | 53930 | }) |
| 63461 | #endif | | |
| 63462 | | | |
| 63463 | #ifdef __LITTLE_ENDIAN__ | | |
| 63464 | #define vqshlb_n_s8(__p0, __p1) __extension__ ({ \ | | |
| 63465 | int8_t __s0 = __p0; \ | | |
| 63466 | int8_t __ret; \ | | |
| 63467 | __ret = (int8_t) __builtin_neon_vqshlb_n_s8(__s0, __p1); \ | | |
| 63468 | __ret; \ | | |
| 63469 | }) | | |
| 63470 | #else | | |
| 63471 | #define vqshlb_n_s8(__p0, __p1) __extension__ ({ \ | 53931 | #define vqshlb_n_s8(__p0, __p1) __extension__ ({ \ |
| 63472 | int8_t __s0 = __p0; \ | 53932 | int8_t __s0 = __p0; \ |
| 63473 | int8_t __ret; \ | 53933 | int8_t __ret; \ |
| 63474 | __ret = (int8_t) __builtin_neon_vqshlb_n_s8(__s0, __p1); \ | 53934 | __ret = (int8_t) __builtin_neon_vqshlb_n_s8(__s0, __p1); \ |
| 63475 | __ret; \ | 53935 | __ret; \ |
| 63476 | }) | 53936 | }) |
| 63477 | #endif | | |
| 63478 | | | |
| 63479 | #ifdef __LITTLE_ENDIAN__ | | |
| 63480 | #define vqshls_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 63481 | int32_t __s0 = __p0; \ | | |
| 63482 | int32_t __ret; \ | | |
| 63483 | __ret = (int32_t) __builtin_neon_vqshls_n_s32(__s0, __p1); \ | | |
| 63484 | __ret; \ | | |
| 63485 | }) | | |
| 63486 | #else | | |
| 63487 | #define vqshls_n_s32(__p0, __p1) __extension__ ({ \ | 53937 | #define vqshls_n_s32(__p0, __p1) __extension__ ({ \ |
| 63488 | int32_t __s0 = __p0; \ | 53938 | int32_t __s0 = __p0; \ |
| 63489 | int32_t __ret; \ | 53939 | int32_t __ret; \ |
| 63490 | __ret = (int32_t) __builtin_neon_vqshls_n_s32(__s0, __p1); \ | 53940 | __ret = (int32_t) __builtin_neon_vqshls_n_s32(__s0, __p1); \ |
| 63491 | __ret; \ | 53941 | __ret; \ |
| 63492 | }) | 53942 | }) |
| 63493 | #endif | | |
| 63494 | | | |
| 63495 | #ifdef __LITTLE_ENDIAN__ | | |
| 63496 | #define vqshld_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 63497 | int64_t __s0 = __p0; \ | | |
| 63498 | int64_t __ret; \ | | |
| 63499 | __ret = (int64_t) __builtin_neon_vqshld_n_s64(__s0, __p1); \ | | |
| 63500 | __ret; \ | | |
| 63501 | }) | | |
| 63502 | #else | | |
| 63503 | #define vqshld_n_s64(__p0, __p1) __extension__ ({ \ | 53943 | #define vqshld_n_s64(__p0, __p1) __extension__ ({ \ |
| 63504 | int64_t __s0 = __p0; \ | 53944 | int64_t __s0 = __p0; \ |
| 63505 | int64_t __ret; \ | 53945 | int64_t __ret; \ |
| 63506 | __ret = (int64_t) __builtin_neon_vqshld_n_s64(__s0, __p1); \ | 53946 | __ret = (int64_t) __builtin_neon_vqshld_n_s64(__s0, __p1); \ |
| 63507 | __ret; \ | 53947 | __ret; \ |
| 63508 | }) | 53948 | }) |
| 63509 | #endif | | |
| 63510 | | | |
| 63511 | #ifdef __LITTLE_ENDIAN__ | | |
| 63512 | #define vqshlh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 63513 | int16_t __s0 = __p0; \ | | |
| 63514 | int16_t __ret; \ | | |
| 63515 | __ret = (int16_t) __builtin_neon_vqshlh_n_s16(__s0, __p1); \ | | |
| 63516 | __ret; \ | | |
| 63517 | }) | | |
| 63518 | #else | | |
| 63519 | #define vqshlh_n_s16(__p0, __p1) __extension__ ({ \ | 53949 | #define vqshlh_n_s16(__p0, __p1) __extension__ ({ \ |
| 63520 | int16_t __s0 = __p0; \ | 53950 | int16_t __s0 = __p0; \ |
| 63521 | int16_t __ret; \ | 53951 | int16_t __ret; \ |
| 63522 | __ret = (int16_t) __builtin_neon_vqshlh_n_s16(__s0, __p1); \ | 53952 | __ret = (int16_t) __builtin_neon_vqshlh_n_s16(__s0, __p1); \ |
| 63523 | __ret; \ | 53953 | __ret; \ |
| 63524 | }) | 53954 | }) |
| 63525 | #endif | | |
| 63526 | | | |
| 63527 | #ifdef __LITTLE_ENDIAN__ | | |
| 63528 | #define vqshlub_n_s8(__p0, __p1) __extension__ ({ \ | | |
| 63529 | int8_t __s0 = __p0; \ | | |
| 63530 | int8_t __ret; \ | | |
| 63531 | __ret = (int8_t) __builtin_neon_vqshlub_n_s8(__s0, __p1); \ | | |
| 63532 | __ret; \ | | |
| 63533 | }) | | |
| 63534 | #else | | |
| 63535 | #define vqshlub_n_s8(__p0, __p1) __extension__ ({ \ | 53955 | #define vqshlub_n_s8(__p0, __p1) __extension__ ({ \ |
| 63536 | int8_t __s0 = __p0; \ | 53956 | int8_t __s0 = __p0; \ |
| 63537 | int8_t __ret; \ | 53957 | int8_t __ret; \ |
| 63538 | __ret = (int8_t) __builtin_neon_vqshlub_n_s8(__s0, __p1); \ | 53958 | __ret = (int8_t) __builtin_neon_vqshlub_n_s8(__s0, __p1); \ |
| 63539 | __ret; \ | 53959 | __ret; \ |
| 63540 | }) | 53960 | }) |
| 63541 | #endif | | |
| 63542 | | | |
| 63543 | #ifdef __LITTLE_ENDIAN__ | | |
| 63544 | #define vqshlus_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 63545 | int32_t __s0 = __p0; \ | | |
| 63546 | int32_t __ret; \ | | |
| 63547 | __ret = (int32_t) __builtin_neon_vqshlus_n_s32(__s0, __p1); \ | | |
| 63548 | __ret; \ | | |
| 63549 | }) | | |
| 63550 | #else | | |
| 63551 | #define vqshlus_n_s32(__p0, __p1) __extension__ ({ \ | 53961 | #define vqshlus_n_s32(__p0, __p1) __extension__ ({ \ |
| 63552 | int32_t __s0 = __p0; \ | 53962 | int32_t __s0 = __p0; \ |
| 63553 | int32_t __ret; \ | 53963 | int32_t __ret; \ |
| 63554 | __ret = (int32_t) __builtin_neon_vqshlus_n_s32(__s0, __p1); \ | 53964 | __ret = (int32_t) __builtin_neon_vqshlus_n_s32(__s0, __p1); \ |
| 63555 | __ret; \ | 53965 | __ret; \ |
| 63556 | }) | 53966 | }) |
| 63557 | #endif | | |
| 63558 | | | |
| 63559 | #ifdef __LITTLE_ENDIAN__ | | |
| 63560 | #define vqshlud_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 63561 | int64_t __s0 = __p0; \ | | |
| 63562 | int64_t __ret; \ | | |
| 63563 | __ret = (int64_t) __builtin_neon_vqshlud_n_s64(__s0, __p1); \ | | |
| 63564 | __ret; \ | | |
| 63565 | }) | | |
| 63566 | #else | | |
| 63567 | #define vqshlud_n_s64(__p0, __p1) __extension__ ({ \ | 53967 | #define vqshlud_n_s64(__p0, __p1) __extension__ ({ \ |
| 63568 | int64_t __s0 = __p0; \ | 53968 | int64_t __s0 = __p0; \ |
| 63569 | int64_t __ret; \ | 53969 | int64_t __ret; \ |
| 63570 | __ret = (int64_t) __builtin_neon_vqshlud_n_s64(__s0, __p1); \ | 53970 | __ret = (int64_t) __builtin_neon_vqshlud_n_s64(__s0, __p1); \ |
| 63571 | __ret; \ | 53971 | __ret; \ |
| 63572 | }) | 53972 | }) |
| 63573 | #endif | | |
| 63574 | | | |
| 63575 | #ifdef __LITTLE_ENDIAN__ | | |
| 63576 | #define vqshluh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 63577 | int16_t __s0 = __p0; \ | | |
| 63578 | int16_t __ret; \ | | |
| 63579 | __ret = (int16_t) __builtin_neon_vqshluh_n_s16(__s0, __p1); \ | | |
| 63580 | __ret; \ | | |
| 63581 | }) | | |
| 63582 | #else | | |
| 63583 | #define vqshluh_n_s16(__p0, __p1) __extension__ ({ \ | 53973 | #define vqshluh_n_s16(__p0, __p1) __extension__ ({ \ |
| 63584 | int16_t __s0 = __p0; \ | 53974 | int16_t __s0 = __p0; \ |
| 63585 | int16_t __ret; \ | 53975 | int16_t __ret; \ |
| 63586 | __ret = (int16_t) __builtin_neon_vqshluh_n_s16(__s0, __p1); \ | 53976 | __ret = (int16_t) __builtin_neon_vqshluh_n_s16(__s0, __p1); \ |
| 63587 | __ret; \ | 53977 | __ret; \ |
| 63588 | }) | 53978 | }) |
| 63589 | #endif | | |
| 63590 | | | |
| 63591 | #ifdef __LITTLE_ENDIAN__ | 53979 | #ifdef __LITTLE_ENDIAN__ |
| 63592 | #define vqshrn_high_n_u32(__p0_200, __p1_200, __p2_200) __extension__ ({ \ | 53980 | #define vqshrn_high_n_u32(__p0_194, __p1_194, __p2_194) __extension__ ({ \ |
| 63593 | uint16x4_t __s0_200 = __p0_200; \ | 53981 | uint16x4_t __s0_194 = __p0_194; \ |
| 63594 | uint32x4_t __s1_200 = __p1_200; \ | 53982 | uint32x4_t __s1_194 = __p1_194; \ |
| 63595 | uint16x8_t __ret_200; \ | 53983 | uint16x8_t __ret_194; \ |
| 63596 | __ret_200 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_200), (uint16x4_t)(vqshrn_n_u32(__s1_200, __p2_200)))); \ | 53984 | __ret_194 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_194), (uint16x4_t)(vqshrn_n_u32(__s1_194, __p2_194)))); \ |
| 63597 | __ret_200; \ | 53985 | __ret_194; \ |
| 63598 | }) | 53986 | }) |
| 63599 | #else | 53987 | #else |
| 63600 | #define vqshrn_high_n_u32(__p0_201, __p1_201, __p2_201) __extension__ ({ \ | 53988 | #define vqshrn_high_n_u32(__p0_195, __p1_195, __p2_195) __extension__ ({ \ |
| 63601 | uint16x4_t __s0_201 = __p0_201; \ | 53989 | uint16x4_t __s0_195 = __p0_195; \ |
| 63602 | uint32x4_t __s1_201 = __p1_201; \ | 53990 | uint32x4_t __s1_195 = __p1_195; \ |
| 63603 | uint16x4_t __rev0_201; __rev0_201 = __builtin_shufflevector(__s0_201, __s0_201, 3, 2, 1, 0); \ | 53991 | uint16x4_t __rev0_195; __rev0_195 = __builtin_shufflevector(__s0_195, __s0_195, 3, 2, 1, 0); \ |
| 63604 | uint32x4_t __rev1_201; __rev1_201 = __builtin_shufflevector(__s1_201, __s1_201, 3, 2, 1, 0); \ | 53992 | uint32x4_t __rev1_195; __rev1_195 = __builtin_shufflevector(__s1_195, __s1_195, 3, 2, 1, 0); \ |
| 63605 | uint16x8_t __ret_201; \ | 53993 | uint16x8_t __ret_195; \ |
| 63606 | __ret_201 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_201), (uint16x4_t)(__noswap_vqshrn_n_u32(__rev1_201, __p2_201)))); \ | 53994 | __ret_195 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_195), (uint16x4_t)(__noswap_vqshrn_n_u32(__rev1_195, __p2_195)))); \ |
| 63607 | __ret_201 = __builtin_shufflevector(__ret_201, __ret_201, 7, 6, 5, 4, 3, 2, 1, 0); \ | 53995 | __ret_195 = __builtin_shufflevector(__ret_195, __ret_195, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63608 | __ret_201; \ | 53996 | __ret_195; \ |
| 63609 | }) | 53997 | }) |
| 63610 | #endif | 53998 | #endif |
| 63611 | | 53999 | |
| 63612 | #ifdef __LITTLE_ENDIAN__ | 54000 | #ifdef __LITTLE_ENDIAN__ |
| 63613 | #define vqshrn_high_n_u64(__p0_202, __p1_202, __p2_202) __extension__ ({ \ | 54001 | #define vqshrn_high_n_u64(__p0_196, __p1_196, __p2_196) __extension__ ({ \ |
| 63614 | uint32x2_t __s0_202 = __p0_202; \ | 54002 | uint32x2_t __s0_196 = __p0_196; \ |
| 63615 | uint64x2_t __s1_202 = __p1_202; \ | 54003 | uint64x2_t __s1_196 = __p1_196; \ |
| 63616 | uint32x4_t __ret_202; \ | 54004 | uint32x4_t __ret_196; \ |
| 63617 | __ret_202 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_202), (uint32x2_t)(vqshrn_n_u64(__s1_202, __p2_202)))); \ | 54005 | __ret_196 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_196), (uint32x2_t)(vqshrn_n_u64(__s1_196, __p2_196)))); \ |
| 63618 | __ret_202; \ | 54006 | __ret_196; \ |
| 63619 | }) | 54007 | }) |
| 63620 | #else | 54008 | #else |
| 63621 | #define vqshrn_high_n_u64(__p0_203, __p1_203, __p2_203) __extension__ ({ \ | 54009 | #define vqshrn_high_n_u64(__p0_197, __p1_197, __p2_197) __extension__ ({ \ |
| 63622 | uint32x2_t __s0_203 = __p0_203; \ | 54010 | uint32x2_t __s0_197 = __p0_197; \ |
| 63623 | uint64x2_t __s1_203 = __p1_203; \ | 54011 | uint64x2_t __s1_197 = __p1_197; \ |
| 63624 | uint32x2_t __rev0_203; __rev0_203 = __builtin_shufflevector(__s0_203, __s0_203, 1, 0); \ | 54012 | uint32x2_t __rev0_197; __rev0_197 = __builtin_shufflevector(__s0_197, __s0_197, 1, 0); \ |
| 63625 | uint64x2_t __rev1_203; __rev1_203 = __builtin_shufflevector(__s1_203, __s1_203, 1, 0); \ | 54013 | uint64x2_t __rev1_197; __rev1_197 = __builtin_shufflevector(__s1_197, __s1_197, 1, 0); \ |
| 63626 | uint32x4_t __ret_203; \ | 54014 | uint32x4_t __ret_197; \ |
| 63627 | __ret_203 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_203), (uint32x2_t)(__noswap_vqshrn_n_u64(__rev1_203, __p2_203)))); \ | 54015 | __ret_197 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_197), (uint32x2_t)(__noswap_vqshrn_n_u64(__rev1_197, __p2_197)))); \ |
| 63628 | __ret_203 = __builtin_shufflevector(__ret_203, __ret_203, 3, 2, 1, 0); \ | 54016 | __ret_197 = __builtin_shufflevector(__ret_197, __ret_197, 3, 2, 1, 0); \ |
| 63629 | __ret_203; \ | 54017 | __ret_197; \ |
| 63630 | }) | 54018 | }) |
| 63631 | #endif | 54019 | #endif |
| 63632 | | 54020 | |
| 63633 | #ifdef __LITTLE_ENDIAN__ | 54021 | #ifdef __LITTLE_ENDIAN__ |
| 63634 | #define vqshrn_high_n_u16(__p0_204, __p1_204, __p2_204) __extension__ ({ \ | 54022 | #define vqshrn_high_n_u16(__p0_198, __p1_198, __p2_198) __extension__ ({ \ |
| 63635 | uint8x8_t __s0_204 = __p0_204; \ | 54023 | uint8x8_t __s0_198 = __p0_198; \ |
| 63636 | uint16x8_t __s1_204 = __p1_204; \ | 54024 | uint16x8_t __s1_198 = __p1_198; \ |
| 63637 | uint8x16_t __ret_204; \ | 54025 | uint8x16_t __ret_198; \ |
| 63638 | __ret_204 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_204), (uint8x8_t)(vqshrn_n_u16(__s1_204, __p2_204)))); \ | 54026 | __ret_198 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_198), (uint8x8_t)(vqshrn_n_u16(__s1_198, __p2_198)))); \ |
| 63639 | __ret_204; \ | 54027 | __ret_198; \ |
| 63640 | }) | 54028 | }) |
| 63641 | #else | 54029 | #else |
| 63642 | #define vqshrn_high_n_u16(__p0_205, __p1_205, __p2_205) __extension__ ({ \ | 54030 | #define vqshrn_high_n_u16(__p0_199, __p1_199, __p2_199) __extension__ ({ \ |
| 63643 | uint8x8_t __s0_205 = __p0_205; \ | 54031 | uint8x8_t __s0_199 = __p0_199; \ |
| 63644 | uint16x8_t __s1_205 = __p1_205; \ | 54032 | uint16x8_t __s1_199 = __p1_199; \ |
| 63645 | uint8x8_t __rev0_205; __rev0_205 = __builtin_shufflevector(__s0_205, __s0_205, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54033 | uint8x8_t __rev0_199; __rev0_199 = __builtin_shufflevector(__s0_199, __s0_199, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63646 | uint16x8_t __rev1_205; __rev1_205 = __builtin_shufflevector(__s1_205, __s1_205, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54034 | uint16x8_t __rev1_199; __rev1_199 = __builtin_shufflevector(__s1_199, __s1_199, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63647 | uint8x16_t __ret_205; \ | 54035 | uint8x16_t __ret_199; \ |
| 63648 | __ret_205 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_205), (uint8x8_t)(__noswap_vqshrn_n_u16(__rev1_205, __p2_205)))); \ | 54036 | __ret_199 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_199), (uint8x8_t)(__noswap_vqshrn_n_u16(__rev1_199, __p2_199)))); \ |
| 63649 | __ret_205 = __builtin_shufflevector(__ret_205, __ret_205, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54037 | __ret_199 = __builtin_shufflevector(__ret_199, __ret_199, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63650 | __ret_205; \ | 54038 | __ret_199; \ |
| 63651 | }) | 54039 | }) |
| 63652 | #endif | 54040 | #endif |
| 63653 | | 54041 | |
| 63654 | #ifdef __LITTLE_ENDIAN__ | 54042 | #ifdef __LITTLE_ENDIAN__ |
| 63655 | #define vqshrn_high_n_s32(__p0_206, __p1_206, __p2_206) __extension__ ({ \ | 54043 | #define vqshrn_high_n_s32(__p0_200, __p1_200, __p2_200) __extension__ ({ \ |
| 63656 | int16x4_t __s0_206 = __p0_206; \ | 54044 | int16x4_t __s0_200 = __p0_200; \ |
| 63657 | int32x4_t __s1_206 = __p1_206; \ | 54045 | int32x4_t __s1_200 = __p1_200; \ |
| 63658 | int16x8_t __ret_206; \ | 54046 | int16x8_t __ret_200; \ |
| 63659 | __ret_206 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_206), (int16x4_t)(vqshrn_n_s32(__s1_206, __p2_206)))); \ | 54047 | __ret_200 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_200), (int16x4_t)(vqshrn_n_s32(__s1_200, __p2_200)))); \ |
| 63660 | __ret_206; \ | 54048 | __ret_200; \ |
| 63661 | }) | 54049 | }) |
| 63662 | #else | 54050 | #else |
| 63663 | #define vqshrn_high_n_s32(__p0_207, __p1_207, __p2_207) __extension__ ({ \ | 54051 | #define vqshrn_high_n_s32(__p0_201, __p1_201, __p2_201) __extension__ ({ \ |
| 63664 | int16x4_t __s0_207 = __p0_207; \ | 54052 | int16x4_t __s0_201 = __p0_201; \ |
| 63665 | int32x4_t __s1_207 = __p1_207; \ | 54053 | int32x4_t __s1_201 = __p1_201; \ |
| 63666 | int16x4_t __rev0_207; __rev0_207 = __builtin_shufflevector(__s0_207, __s0_207, 3, 2, 1, 0); \ | 54054 | int16x4_t __rev0_201; __rev0_201 = __builtin_shufflevector(__s0_201, __s0_201, 3, 2, 1, 0); \ |
| 63667 | int32x4_t __rev1_207; __rev1_207 = __builtin_shufflevector(__s1_207, __s1_207, 3, 2, 1, 0); \ | 54055 | int32x4_t __rev1_201; __rev1_201 = __builtin_shufflevector(__s1_201, __s1_201, 3, 2, 1, 0); \ |
| 63668 | int16x8_t __ret_207; \ | 54056 | int16x8_t __ret_201; \ |
| 63669 | __ret_207 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_207), (int16x4_t)(__noswap_vqshrn_n_s32(__rev1_207, __p2_207)))); \ | 54057 | __ret_201 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_201), (int16x4_t)(__noswap_vqshrn_n_s32(__rev1_201, __p2_201)))); \ |
| 63670 | __ret_207 = __builtin_shufflevector(__ret_207, __ret_207, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54058 | __ret_201 = __builtin_shufflevector(__ret_201, __ret_201, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63671 | __ret_207; \ | 54059 | __ret_201; \ |
| 63672 | }) | 54060 | }) |
| 63673 | #endif | 54061 | #endif |
| 63674 | | 54062 | |
| 63675 | #ifdef __LITTLE_ENDIAN__ | 54063 | #ifdef __LITTLE_ENDIAN__ |
| 63676 | #define vqshrn_high_n_s64(__p0_208, __p1_208, __p2_208) __extension__ ({ \ | 54064 | #define vqshrn_high_n_s64(__p0_202, __p1_202, __p2_202) __extension__ ({ \ |
| 63677 | int32x2_t __s0_208 = __p0_208; \ | 54065 | int32x2_t __s0_202 = __p0_202; \ |
| 63678 | int64x2_t __s1_208 = __p1_208; \ | 54066 | int64x2_t __s1_202 = __p1_202; \ |
| 63679 | int32x4_t __ret_208; \ | 54067 | int32x4_t __ret_202; \ |
| 63680 | __ret_208 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_208), (int32x2_t)(vqshrn_n_s64(__s1_208, __p2_208)))); \ | 54068 | __ret_202 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_202), (int32x2_t)(vqshrn_n_s64(__s1_202, __p2_202)))); \ |
| 63681 | __ret_208; \ | 54069 | __ret_202; \ |
| 63682 | }) | 54070 | }) |
| 63683 | #else | 54071 | #else |
| 63684 | #define vqshrn_high_n_s64(__p0_209, __p1_209, __p2_209) __extension__ ({ \ | 54072 | #define vqshrn_high_n_s64(__p0_203, __p1_203, __p2_203) __extension__ ({ \ |
| 63685 | int32x2_t __s0_209 = __p0_209; \ | 54073 | int32x2_t __s0_203 = __p0_203; \ |
| 63686 | int64x2_t __s1_209 = __p1_209; \ | 54074 | int64x2_t __s1_203 = __p1_203; \ |
| 63687 | int32x2_t __rev0_209; __rev0_209 = __builtin_shufflevector(__s0_209, __s0_209, 1, 0); \ | 54075 | int32x2_t __rev0_203; __rev0_203 = __builtin_shufflevector(__s0_203, __s0_203, 1, 0); \ |
| 63688 | int64x2_t __rev1_209; __rev1_209 = __builtin_shufflevector(__s1_209, __s1_209, 1, 0); \ | 54076 | int64x2_t __rev1_203; __rev1_203 = __builtin_shufflevector(__s1_203, __s1_203, 1, 0); \ |
| 63689 | int32x4_t __ret_209; \ | 54077 | int32x4_t __ret_203; \ |
| 63690 | __ret_209 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_209), (int32x2_t)(__noswap_vqshrn_n_s64(__rev1_209, __p2_209)))); \ | 54078 | __ret_203 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_203), (int32x2_t)(__noswap_vqshrn_n_s64(__rev1_203, __p2_203)))); \ |
| 63691 | __ret_209 = __builtin_shufflevector(__ret_209, __ret_209, 3, 2, 1, 0); \ | 54079 | __ret_203 = __builtin_shufflevector(__ret_203, __ret_203, 3, 2, 1, 0); \ |
| 63692 | __ret_209; \ | 54080 | __ret_203; \ |
| 63693 | }) | 54081 | }) |
| 63694 | #endif | 54082 | #endif |
| 63695 | | 54083 | |
| 63696 | #ifdef __LITTLE_ENDIAN__ | 54084 | #ifdef __LITTLE_ENDIAN__ |
| 63697 | #define vqshrn_high_n_s16(__p0_210, __p1_210, __p2_210) __extension__ ({ \ | 54085 | #define vqshrn_high_n_s16(__p0_204, __p1_204, __p2_204) __extension__ ({ \ |
| 63698 | int8x8_t __s0_210 = __p0_210; \ | 54086 | int8x8_t __s0_204 = __p0_204; \ |
| 63699 | int16x8_t __s1_210 = __p1_210; \ | 54087 | int16x8_t __s1_204 = __p1_204; \ |
| 63700 | int8x16_t __ret_210; \ | 54088 | int8x16_t __ret_204; \ |
| 63701 | __ret_210 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_210), (int8x8_t)(vqshrn_n_s16(__s1_210, __p2_210)))); \ | 54089 | __ret_204 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_204), (int8x8_t)(vqshrn_n_s16(__s1_204, __p2_204)))); \ |
| 63702 | __ret_210; \ | 54090 | __ret_204; \ |
| 63703 | }) | 54091 | }) |
| 63704 | #else | 54092 | #else |
| 63705 | #define vqshrn_high_n_s16(__p0_211, __p1_211, __p2_211) __extension__ ({ \ | 54093 | #define vqshrn_high_n_s16(__p0_205, __p1_205, __p2_205) __extension__ ({ \ |
| 63706 | int8x8_t __s0_211 = __p0_211; \ | 54094 | int8x8_t __s0_205 = __p0_205; \ |
| 63707 | int16x8_t __s1_211 = __p1_211; \ | 54095 | int16x8_t __s1_205 = __p1_205; \ |
| 63708 | int8x8_t __rev0_211; __rev0_211 = __builtin_shufflevector(__s0_211, __s0_211, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54096 | int8x8_t __rev0_205; __rev0_205 = __builtin_shufflevector(__s0_205, __s0_205, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63709 | int16x8_t __rev1_211; __rev1_211 = __builtin_shufflevector(__s1_211, __s1_211, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54097 | int16x8_t __rev1_205; __rev1_205 = __builtin_shufflevector(__s1_205, __s1_205, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63710 | int8x16_t __ret_211; \ | 54098 | int8x16_t __ret_205; \ |
| 63711 | __ret_211 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_211), (int8x8_t)(__noswap_vqshrn_n_s16(__rev1_211, __p2_211)))); \ | 54099 | __ret_205 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_205), (int8x8_t)(__noswap_vqshrn_n_s16(__rev1_205, __p2_205)))); \ |
| 63712 | __ret_211 = __builtin_shufflevector(__ret_211, __ret_211, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54100 | __ret_205 = __builtin_shufflevector(__ret_205, __ret_205, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63713 | __ret_211; \ | 54101 | __ret_205; \ |
| 63714 | }) | 54102 | }) |
| 63715 | #endif | 54103 | #endif |
| 63716 | | 54104 | |
| 63717 | #ifdef __LITTLE_ENDIAN__ | | |
| 63718 | #define vqshrns_n_u32(__p0, __p1) __extension__ ({ \ | | |
| 63719 | uint32_t __s0 = __p0; \ | | |
| 63720 | uint16_t __ret; \ | | |
| 63721 | __ret = (uint16_t) __builtin_neon_vqshrns_n_u32(__s0, __p1); \ | | |
| 63722 | __ret; \ | | |
| 63723 | }) | | |
| 63724 | #else | | |
| 63725 | #define vqshrns_n_u32(__p0, __p1) __extension__ ({ \ | 54105 | #define vqshrns_n_u32(__p0, __p1) __extension__ ({ \ |
| 63726 | uint32_t __s0 = __p0; \ | 54106 | uint32_t __s0 = __p0; \ |
| 63727 | uint16_t __ret; \ | 54107 | uint16_t __ret; \ |
| 63728 | __ret = (uint16_t) __builtin_neon_vqshrns_n_u32(__s0, __p1); \ | 54108 | __ret = (uint16_t) __builtin_neon_vqshrns_n_u32(__s0, __p1); \ |
| 63729 | __ret; \ | 54109 | __ret; \ |
| 63730 | }) | 54110 | }) |
| 63731 | #endif | | |
| 63732 | | | |
| 63733 | #ifdef __LITTLE_ENDIAN__ | | |
| 63734 | #define vqshrnd_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 63735 | uint64_t __s0 = __p0; \ | | |
| 63736 | uint32_t __ret; \ | | |
| 63737 | __ret = (uint32_t) __builtin_neon_vqshrnd_n_u64(__s0, __p1); \ | | |
| 63738 | __ret; \ | | |
| 63739 | }) | | |
| 63740 | #else | | |
| 63741 | #define vqshrnd_n_u64(__p0, __p1) __extension__ ({ \ | 54111 | #define vqshrnd_n_u64(__p0, __p1) __extension__ ({ \ |
| 63742 | uint64_t __s0 = __p0; \ | 54112 | uint64_t __s0 = __p0; \ |
| 63743 | uint32_t __ret; \ | 54113 | uint32_t __ret; \ |
| 63744 | __ret = (uint32_t) __builtin_neon_vqshrnd_n_u64(__s0, __p1); \ | 54114 | __ret = (uint32_t) __builtin_neon_vqshrnd_n_u64(__s0, __p1); \ |
| 63745 | __ret; \ | 54115 | __ret; \ |
| 63746 | }) | 54116 | }) |
| 63747 | #endif | | |
| 63748 | | | |
| 63749 | #ifdef __LITTLE_ENDIAN__ | | |
| 63750 | #define vqshrnh_n_u16(__p0, __p1) __extension__ ({ \ | | |
| 63751 | uint16_t __s0 = __p0; \ | | |
| 63752 | uint8_t __ret; \ | | |
| 63753 | __ret = (uint8_t) __builtin_neon_vqshrnh_n_u16(__s0, __p1); \ | | |
| 63754 | __ret; \ | | |
| 63755 | }) | | |
| 63756 | #else | | |
| 63757 | #define vqshrnh_n_u16(__p0, __p1) __extension__ ({ \ | 54117 | #define vqshrnh_n_u16(__p0, __p1) __extension__ ({ \ |
| 63758 | uint16_t __s0 = __p0; \ | 54118 | uint16_t __s0 = __p0; \ |
| 63759 | uint8_t __ret; \ | 54119 | uint8_t __ret; \ |
| 63760 | __ret = (uint8_t) __builtin_neon_vqshrnh_n_u16(__s0, __p1); \ | 54120 | __ret = (uint8_t) __builtin_neon_vqshrnh_n_u16(__s0, __p1); \ |
| 63761 | __ret; \ | 54121 | __ret; \ |
| 63762 | }) | 54122 | }) |
| 63763 | #endif | | |
| 63764 | | | |
| 63765 | #ifdef __LITTLE_ENDIAN__ | | |
| 63766 | #define vqshrns_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 63767 | int32_t __s0 = __p0; \ | | |
| 63768 | int16_t __ret; \ | | |
| 63769 | __ret = (int16_t) __builtin_neon_vqshrns_n_s32(__s0, __p1); \ | | |
| 63770 | __ret; \ | | |
| 63771 | }) | | |
| 63772 | #else | | |
| 63773 | #define vqshrns_n_s32(__p0, __p1) __extension__ ({ \ | 54123 | #define vqshrns_n_s32(__p0, __p1) __extension__ ({ \ |
| 63774 | int32_t __s0 = __p0; \ | 54124 | int32_t __s0 = __p0; \ |
| 63775 | int16_t __ret; \ | 54125 | int16_t __ret; \ |
| 63776 | __ret = (int16_t) __builtin_neon_vqshrns_n_s32(__s0, __p1); \ | 54126 | __ret = (int16_t) __builtin_neon_vqshrns_n_s32(__s0, __p1); \ |
| 63777 | __ret; \ | 54127 | __ret; \ |
| 63778 | }) | 54128 | }) |
| 63779 | #endif | | |
| 63780 | | | |
| 63781 | #ifdef __LITTLE_ENDIAN__ | | |
| 63782 | #define vqshrnd_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 63783 | int64_t __s0 = __p0; \ | | |
| 63784 | int32_t __ret; \ | | |
| 63785 | __ret = (int32_t) __builtin_neon_vqshrnd_n_s64(__s0, __p1); \ | | |
| 63786 | __ret; \ | | |
| 63787 | }) | | |
| 63788 | #else | | |
| 63789 | #define vqshrnd_n_s64(__p0, __p1) __extension__ ({ \ | 54129 | #define vqshrnd_n_s64(__p0, __p1) __extension__ ({ \ |
| 63790 | int64_t __s0 = __p0; \ | 54130 | int64_t __s0 = __p0; \ |
| 63791 | int32_t __ret; \ | 54131 | int32_t __ret; \ |
| 63792 | __ret = (int32_t) __builtin_neon_vqshrnd_n_s64(__s0, __p1); \ | 54132 | __ret = (int32_t) __builtin_neon_vqshrnd_n_s64(__s0, __p1); \ |
| 63793 | __ret; \ | 54133 | __ret; \ |
| 63794 | }) | 54134 | }) |
| 63795 | #endif | | |
| 63796 | | | |
| 63797 | #ifdef __LITTLE_ENDIAN__ | | |
| 63798 | #define vqshrnh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 63799 | int16_t __s0 = __p0; \ | | |
| 63800 | int8_t __ret; \ | | |
| 63801 | __ret = (int8_t) __builtin_neon_vqshrnh_n_s16(__s0, __p1); \ | | |
| 63802 | __ret; \ | | |
| 63803 | }) | | |
| 63804 | #else | | |
| 63805 | #define vqshrnh_n_s16(__p0, __p1) __extension__ ({ \ | 54135 | #define vqshrnh_n_s16(__p0, __p1) __extension__ ({ \ |
| 63806 | int16_t __s0 = __p0; \ | 54136 | int16_t __s0 = __p0; \ |
| 63807 | int8_t __ret; \ | 54137 | int8_t __ret; \ |
| 63808 | __ret = (int8_t) __builtin_neon_vqshrnh_n_s16(__s0, __p1); \ | 54138 | __ret = (int8_t) __builtin_neon_vqshrnh_n_s16(__s0, __p1); \ |
| 63809 | __ret; \ | 54139 | __ret; \ |
| 63810 | }) | 54140 | }) |
| 63811 | #endif | | |
| 63812 | | | |
| 63813 | #ifdef __LITTLE_ENDIAN__ | 54141 | #ifdef __LITTLE_ENDIAN__ |
| 63814 | #define vqshrun_high_n_s32(__p0_212, __p1_212, __p2_212) __extension__ ({ \ | 54142 | #define vqshrun_high_n_s32(__p0_206, __p1_206, __p2_206) __extension__ ({ \ |
| 63815 | int16x4_t __s0_212 = __p0_212; \ | 54143 | int16x4_t __s0_206 = __p0_206; \ |
| 63816 | int32x4_t __s1_212 = __p1_212; \ | 54144 | int32x4_t __s1_206 = __p1_206; \ |
| 63817 | int16x8_t __ret_212; \ | 54145 | int16x8_t __ret_206; \ |
| 63818 | __ret_212 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_212), (int16x4_t)(vqshrun_n_s32(__s1_212, __p2_212)))); \ | 54146 | __ret_206 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_206), (int16x4_t)(vqshrun_n_s32(__s1_206, __p2_206)))); \ |
| 63819 | __ret_212; \ | 54147 | __ret_206; \ |
| 63820 | }) | 54148 | }) |
| 63821 | #else | 54149 | #else |
| 63822 | #define vqshrun_high_n_s32(__p0_213, __p1_213, __p2_213) __extension__ ({ \ | 54150 | #define vqshrun_high_n_s32(__p0_207, __p1_207, __p2_207) __extension__ ({ \ |
| 63823 | int16x4_t __s0_213 = __p0_213; \ | 54151 | int16x4_t __s0_207 = __p0_207; \ |
| 63824 | int32x4_t __s1_213 = __p1_213; \ | 54152 | int32x4_t __s1_207 = __p1_207; \ |
| 63825 | int16x4_t __rev0_213; __rev0_213 = __builtin_shufflevector(__s0_213, __s0_213, 3, 2, 1, 0); \ | 54153 | int16x4_t __rev0_207; __rev0_207 = __builtin_shufflevector(__s0_207, __s0_207, 3, 2, 1, 0); \ |
| 63826 | int32x4_t __rev1_213; __rev1_213 = __builtin_shufflevector(__s1_213, __s1_213, 3, 2, 1, 0); \ | 54154 | int32x4_t __rev1_207; __rev1_207 = __builtin_shufflevector(__s1_207, __s1_207, 3, 2, 1, 0); \ |
| 63827 | int16x8_t __ret_213; \ | 54155 | int16x8_t __ret_207; \ |
| 63828 | __ret_213 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_213), (int16x4_t)(__noswap_vqshrun_n_s32(__rev1_213, __p2_213)))); \ | 54156 | __ret_207 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_207), (int16x4_t)(__noswap_vqshrun_n_s32(__rev1_207, __p2_207)))); \ |
| 63829 | __ret_213 = __builtin_shufflevector(__ret_213, __ret_213, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54157 | __ret_207 = __builtin_shufflevector(__ret_207, __ret_207, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63830 | __ret_213; \ | 54158 | __ret_207; \ |
| 63831 | }) | 54159 | }) |
| 63832 | #endif | 54160 | #endif |
| 63833 | | 54161 | |
| 63834 | #ifdef __LITTLE_ENDIAN__ | 54162 | #ifdef __LITTLE_ENDIAN__ |
| 63835 | #define vqshrun_high_n_s64(__p0_214, __p1_214, __p2_214) __extension__ ({ \ | 54163 | #define vqshrun_high_n_s64(__p0_208, __p1_208, __p2_208) __extension__ ({ \ |
| 63836 | int32x2_t __s0_214 = __p0_214; \ | 54164 | int32x2_t __s0_208 = __p0_208; \ |
| 63837 | int64x2_t __s1_214 = __p1_214; \ | 54165 | int64x2_t __s1_208 = __p1_208; \ |
| 63838 | int32x4_t __ret_214; \ | 54166 | int32x4_t __ret_208; \ |
| 63839 | __ret_214 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_214), (int32x2_t)(vqshrun_n_s64(__s1_214, __p2_214)))); \ | 54167 | __ret_208 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_208), (int32x2_t)(vqshrun_n_s64(__s1_208, __p2_208)))); \ |
| 63840 | __ret_214; \ | 54168 | __ret_208; \ |
| 63841 | }) | 54169 | }) |
| 63842 | #else | 54170 | #else |
| 63843 | #define vqshrun_high_n_s64(__p0_215, __p1_215, __p2_215) __extension__ ({ \ | 54171 | #define vqshrun_high_n_s64(__p0_209, __p1_209, __p2_209) __extension__ ({ \ |
| 63844 | int32x2_t __s0_215 = __p0_215; \ | 54172 | int32x2_t __s0_209 = __p0_209; \ |
| 63845 | int64x2_t __s1_215 = __p1_215; \ | 54173 | int64x2_t __s1_209 = __p1_209; \ |
| 63846 | int32x2_t __rev0_215; __rev0_215 = __builtin_shufflevector(__s0_215, __s0_215, 1, 0); \ | 54174 | int32x2_t __rev0_209; __rev0_209 = __builtin_shufflevector(__s0_209, __s0_209, 1, 0); \ |
| 63847 | int64x2_t __rev1_215; __rev1_215 = __builtin_shufflevector(__s1_215, __s1_215, 1, 0); \ | 54175 | int64x2_t __rev1_209; __rev1_209 = __builtin_shufflevector(__s1_209, __s1_209, 1, 0); \ |
| 63848 | int32x4_t __ret_215; \ | 54176 | int32x4_t __ret_209; \ |
| 63849 | __ret_215 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_215), (int32x2_t)(__noswap_vqshrun_n_s64(__rev1_215, __p2_215)))); \ | 54177 | __ret_209 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_209), (int32x2_t)(__noswap_vqshrun_n_s64(__rev1_209, __p2_209)))); \ |
| 63850 | __ret_215 = __builtin_shufflevector(__ret_215, __ret_215, 3, 2, 1, 0); \ | 54178 | __ret_209 = __builtin_shufflevector(__ret_209, __ret_209, 3, 2, 1, 0); \ |
| 63851 | __ret_215; \ | 54179 | __ret_209; \ |
| 63852 | }) | 54180 | }) |
| 63853 | #endif | 54181 | #endif |
| 63854 | | 54182 | |
| 63855 | #ifdef __LITTLE_ENDIAN__ | 54183 | #ifdef __LITTLE_ENDIAN__ |
| 63856 | #define vqshrun_high_n_s16(__p0_216, __p1_216, __p2_216) __extension__ ({ \ | 54184 | #define vqshrun_high_n_s16(__p0_210, __p1_210, __p2_210) __extension__ ({ \ |
| 63857 | int8x8_t __s0_216 = __p0_216; \ | 54185 | int8x8_t __s0_210 = __p0_210; \ |
| 63858 | int16x8_t __s1_216 = __p1_216; \ | 54186 | int16x8_t __s1_210 = __p1_210; \ |
| 63859 | int8x16_t __ret_216; \ | 54187 | int8x16_t __ret_210; \ |
| 63860 | __ret_216 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_216), (int8x8_t)(vqshrun_n_s16(__s1_216, __p2_216)))); \ | 54188 | __ret_210 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_210), (int8x8_t)(vqshrun_n_s16(__s1_210, __p2_210)))); \ |
| 63861 | __ret_216; \ | 54189 | __ret_210; \ |
| 63862 | }) | 54190 | }) |
| 63863 | #else | 54191 | #else |
| 63864 | #define vqshrun_high_n_s16(__p0_217, __p1_217, __p2_217) __extension__ ({ \ | 54192 | #define vqshrun_high_n_s16(__p0_211, __p1_211, __p2_211) __extension__ ({ \ |
| 63865 | int8x8_t __s0_217 = __p0_217; \ | 54193 | int8x8_t __s0_211 = __p0_211; \ |
| 63866 | int16x8_t __s1_217 = __p1_217; \ | 54194 | int16x8_t __s1_211 = __p1_211; \ |
| 63867 | int8x8_t __rev0_217; __rev0_217 = __builtin_shufflevector(__s0_217, __s0_217, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54195 | int8x8_t __rev0_211; __rev0_211 = __builtin_shufflevector(__s0_211, __s0_211, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63868 | int16x8_t __rev1_217; __rev1_217 = __builtin_shufflevector(__s1_217, __s1_217, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54196 | int16x8_t __rev1_211; __rev1_211 = __builtin_shufflevector(__s1_211, __s1_211, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63869 | int8x16_t __ret_217; \ | 54197 | int8x16_t __ret_211; \ |
| 63870 | __ret_217 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_217), (int8x8_t)(__noswap_vqshrun_n_s16(__rev1_217, __p2_217)))); \ | 54198 | __ret_211 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_211), (int8x8_t)(__noswap_vqshrun_n_s16(__rev1_211, __p2_211)))); \ |
| 63871 | __ret_217 = __builtin_shufflevector(__ret_217, __ret_217, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 54199 | __ret_211 = __builtin_shufflevector(__ret_211, __ret_211, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63872 | __ret_217; \ | 54200 | __ret_211; \ |
| 63873 | }) | 54201 | }) |
| 63874 | #endif | 54202 | #endif |
| 63875 | | 54203 | |
| 63876 | #ifdef __LITTLE_ENDIAN__ | | |
| 63877 | #define vqshruns_n_s32(__p0, __p1) __extension__ ({ \ | | |
| 63878 | int32_t __s0 = __p0; \ | | |
| 63879 | int16_t __ret; \ | | |
| 63880 | __ret = (int16_t) __builtin_neon_vqshruns_n_s32(__s0, __p1); \ | | |
| 63881 | __ret; \ | | |
| 63882 | }) | | |
| 63883 | #else | | |
| 63884 | #define vqshruns_n_s32(__p0, __p1) __extension__ ({ \ | 54204 | #define vqshruns_n_s32(__p0, __p1) __extension__ ({ \ |
| 63885 | int32_t __s0 = __p0; \ | 54205 | int32_t __s0 = __p0; \ |
| 63886 | int16_t __ret; \ | 54206 | int16_t __ret; \ |
| 63887 | __ret = (int16_t) __builtin_neon_vqshruns_n_s32(__s0, __p1); \ | 54207 | __ret = (int16_t) __builtin_neon_vqshruns_n_s32(__s0, __p1); \ |
| 63888 | __ret; \ | 54208 | __ret; \ |
| 63889 | }) | 54209 | }) |
| 63890 | #endif | | |
| 63891 | | | |
| 63892 | #ifdef __LITTLE_ENDIAN__ | | |
| 63893 | #define vqshrund_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 63894 | int64_t __s0 = __p0; \ | | |
| 63895 | int32_t __ret; \ | | |
| 63896 | __ret = (int32_t) __builtin_neon_vqshrund_n_s64(__s0, __p1); \ | | |
| 63897 | __ret; \ | | |
| 63898 | }) | | |
| 63899 | #else | | |
| 63900 | #define vqshrund_n_s64(__p0, __p1) __extension__ ({ \ | 54210 | #define vqshrund_n_s64(__p0, __p1) __extension__ ({ \ |
| 63901 | int64_t __s0 = __p0; \ | 54211 | int64_t __s0 = __p0; \ |
| 63902 | int32_t __ret; \ | 54212 | int32_t __ret; \ |
| 63903 | __ret = (int32_t) __builtin_neon_vqshrund_n_s64(__s0, __p1); \ | 54213 | __ret = (int32_t) __builtin_neon_vqshrund_n_s64(__s0, __p1); \ |
| 63904 | __ret; \ | 54214 | __ret; \ |
| 63905 | }) | 54215 | }) |
| 63906 | #endif | | |
| 63907 | | | |
| 63908 | #ifdef __LITTLE_ENDIAN__ | | |
| 63909 | #define vqshrunh_n_s16(__p0, __p1) __extension__ ({ \ | | |
| 63910 | int16_t __s0 = __p0; \ | | |
| 63911 | int8_t __ret; \ | | |
| 63912 | __ret = (int8_t) __builtin_neon_vqshrunh_n_s16(__s0, __p1); \ | | |
| 63913 | __ret; \ | | |
| 63914 | }) | | |
| 63915 | #else | | |
| 63916 | #define vqshrunh_n_s16(__p0, __p1) __extension__ ({ \ | 54216 | #define vqshrunh_n_s16(__p0, __p1) __extension__ ({ \ |
| 63917 | int16_t __s0 = __p0; \ | 54217 | int16_t __s0 = __p0; \ |
| 63918 | int8_t __ret; \ | 54218 | int8_t __ret; \ |
| 63919 | __ret = (int8_t) __builtin_neon_vqshrunh_n_s16(__s0, __p1); \ | 54219 | __ret = (int8_t) __builtin_neon_vqshrunh_n_s16(__s0, __p1); \ |
| 63920 | __ret; \ | 54220 | __ret; \ |
| 63921 | }) | 54221 | }) |
| 63922 | #endif | | |
| 63923 | | | |
| 63924 | #ifdef __LITTLE_ENDIAN__ | | |
| 63925 | __ai uint8_t vqsubb_u8(uint8_t __p0, uint8_t __p1) { | | |
| 63926 | uint8_t __ret; | | |
| 63927 | __ret = (uint8_t) __builtin_neon_vqsubb_u8(__p0, __p1); | | |
| 63928 | return __ret; | | |
| 63929 | } | | |
| 63930 | #else | | |
| 63931 | __ai uint8_t vqsubb_u8(uint8_t __p0, uint8_t __p1) { | 54222 | __ai uint8_t vqsubb_u8(uint8_t __p0, uint8_t __p1) { |
| 63932 | uint8_t __ret; | 54223 | uint8_t __ret; |
| 63933 | __ret = (uint8_t) __builtin_neon_vqsubb_u8(__p0, __p1); | 54224 | __ret = (uint8_t) __builtin_neon_vqsubb_u8(__p0, __p1); |
| 63934 | return __ret; | 54225 | return __ret; |
| 63935 | } | 54226 | } |
| 63936 | #endif | | |
| 63937 | | | |
| 63938 | #ifdef __LITTLE_ENDIAN__ | | |
| 63939 | __ai uint32_t vqsubs_u32(uint32_t __p0, uint32_t __p1) { | | |
| 63940 | uint32_t __ret; | | |
| 63941 | __ret = (uint32_t) __builtin_neon_vqsubs_u32(__p0, __p1); | | |
| 63942 | return __ret; | | |
| 63943 | } | | |
| 63944 | #else | | |
| 63945 | __ai uint32_t vqsubs_u32(uint32_t __p0, uint32_t __p1) { | 54227 | __ai uint32_t vqsubs_u32(uint32_t __p0, uint32_t __p1) { |
| 63946 | uint32_t __ret; | 54228 | uint32_t __ret; |
| 63947 | __ret = (uint32_t) __builtin_neon_vqsubs_u32(__p0, __p1); | 54229 | __ret = (uint32_t) __builtin_neon_vqsubs_u32(__p0, __p1); |
| 63948 | return __ret; | 54230 | return __ret; |
| 63949 | } | 54231 | } |
| 63950 | #endif | | |
| 63951 | | | |
| 63952 | #ifdef __LITTLE_ENDIAN__ | | |
| 63953 | __ai uint64_t vqsubd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 63954 | uint64_t __ret; | | |
| 63955 | __ret = (uint64_t) __builtin_neon_vqsubd_u64(__p0, __p1); | | |
| 63956 | return __ret; | | |
| 63957 | } | | |
| 63958 | #else | | |
| 63959 | __ai uint64_t vqsubd_u64(uint64_t __p0, uint64_t __p1) { | 54232 | __ai uint64_t vqsubd_u64(uint64_t __p0, uint64_t __p1) { |
| 63960 | uint64_t __ret; | 54233 | uint64_t __ret; |
| 63961 | __ret = (uint64_t) __builtin_neon_vqsubd_u64(__p0, __p1); | 54234 | __ret = (uint64_t) __builtin_neon_vqsubd_u64(__p0, __p1); |
| 63962 | return __ret; | 54235 | return __ret; |
| 63963 | } | 54236 | } |
| 63964 | #endif | | |
| 63965 | | | |
| 63966 | #ifdef __LITTLE_ENDIAN__ | | |
| 63967 | __ai uint16_t vqsubh_u16(uint16_t __p0, uint16_t __p1) { | | |
| 63968 | uint16_t __ret; | | |
| 63969 | __ret = (uint16_t) __builtin_neon_vqsubh_u16(__p0, __p1); | | |
| 63970 | return __ret; | | |
| 63971 | } | | |
| 63972 | #else | | |
| 63973 | __ai uint16_t vqsubh_u16(uint16_t __p0, uint16_t __p1) { | 54237 | __ai uint16_t vqsubh_u16(uint16_t __p0, uint16_t __p1) { |
| 63974 | uint16_t __ret; | 54238 | uint16_t __ret; |
| 63975 | __ret = (uint16_t) __builtin_neon_vqsubh_u16(__p0, __p1); | 54239 | __ret = (uint16_t) __builtin_neon_vqsubh_u16(__p0, __p1); |
| 63976 | return __ret; | 54240 | return __ret; |
| 63977 | } | 54241 | } |
| 63978 | #endif | | |
| 63979 | | | |
| 63980 | #ifdef __LITTLE_ENDIAN__ | | |
| 63981 | __ai int8_t vqsubb_s8(int8_t __p0, int8_t __p1) { | | |
| 63982 | int8_t __ret; | | |
| 63983 | __ret = (int8_t) __builtin_neon_vqsubb_s8(__p0, __p1); | | |
| 63984 | return __ret; | | |
| 63985 | } | | |
| 63986 | #else | | |
| 63987 | __ai int8_t vqsubb_s8(int8_t __p0, int8_t __p1) { | 54242 | __ai int8_t vqsubb_s8(int8_t __p0, int8_t __p1) { |
| 63988 | int8_t __ret; | 54243 | int8_t __ret; |
| 63989 | __ret = (int8_t) __builtin_neon_vqsubb_s8(__p0, __p1); | 54244 | __ret = (int8_t) __builtin_neon_vqsubb_s8(__p0, __p1); |
| 63990 | return __ret; | 54245 | return __ret; |
| 63991 | } | 54246 | } |
| 63992 | #endif | | |
| 63993 | | | |
| 63994 | #ifdef __LITTLE_ENDIAN__ | | |
| 63995 | __ai int32_t vqsubs_s32(int32_t __p0, int32_t __p1) { | | |
| 63996 | int32_t __ret; | | |
| 63997 | __ret = (int32_t) __builtin_neon_vqsubs_s32(__p0, __p1); | | |
| 63998 | return __ret; | | |
| 63999 | } | | |
| 64000 | #else | | |
| 64001 | __ai int32_t vqsubs_s32(int32_t __p0, int32_t __p1) { | 54247 | __ai int32_t vqsubs_s32(int32_t __p0, int32_t __p1) { |
| 64002 | int32_t __ret; | 54248 | int32_t __ret; |
| 64003 | __ret = (int32_t) __builtin_neon_vqsubs_s32(__p0, __p1); | 54249 | __ret = (int32_t) __builtin_neon_vqsubs_s32(__p0, __p1); |
| 64004 | return __ret; | 54250 | return __ret; |
| 64005 | } | 54251 | } |
| 64006 | __ai int32_t __noswap_vqsubs_s32(int32_t __p0, int32_t __p1) { | | |
| 64007 | int32_t __ret; | | |
| 64008 | __ret = (int32_t) __builtin_neon_vqsubs_s32(__p0, __p1); | | |
| 64009 | return __ret; | | |
| 64010 | } | | |
| 64011 | #endif | | |
| 64012 | | | |
| 64013 | #ifdef __LITTLE_ENDIAN__ | | |
| 64014 | __ai int64_t vqsubd_s64(int64_t __p0, int64_t __p1) { | | |
| 64015 | int64_t __ret; | | |
| 64016 | __ret = (int64_t) __builtin_neon_vqsubd_s64(__p0, __p1); | | |
| 64017 | return __ret; | | |
| 64018 | } | | |
| 64019 | #else | | |
| 64020 | __ai int64_t vqsubd_s64(int64_t __p0, int64_t __p1) { | 54252 | __ai int64_t vqsubd_s64(int64_t __p0, int64_t __p1) { |
| 64021 | int64_t __ret; | 54253 | int64_t __ret; |
| 64022 | __ret = (int64_t) __builtin_neon_vqsubd_s64(__p0, __p1); | 54254 | __ret = (int64_t) __builtin_neon_vqsubd_s64(__p0, __p1); |
| 64023 | return __ret; | 54255 | return __ret; |
| 64024 | } | 54256 | } |
| 64025 | #endif | | |
| 64026 | | | |
| 64027 | #ifdef __LITTLE_ENDIAN__ | | |
| 64028 | __ai int16_t vqsubh_s16(int16_t __p0, int16_t __p1) { | | |
| 64029 | int16_t __ret; | | |
| 64030 | __ret = (int16_t) __builtin_neon_vqsubh_s16(__p0, __p1); | | |
| 64031 | return __ret; | | |
| 64032 | } | | |
| 64033 | #else | | |
| 64034 | __ai int16_t vqsubh_s16(int16_t __p0, int16_t __p1) { | 54257 | __ai int16_t vqsubh_s16(int16_t __p0, int16_t __p1) { |
| 64035 | int16_t __ret; | 54258 | int16_t __ret; |
| 64036 | __ret = (int16_t) __builtin_neon_vqsubh_s16(__p0, __p1); | 54259 | __ret = (int16_t) __builtin_neon_vqsubh_s16(__p0, __p1); |
| 64037 | return __ret; | 54260 | return __ret; |
| 64038 | } | 54261 | } |
| 64039 | __ai int16_t __noswap_vqsubh_s16(int16_t __p0, int16_t __p1) { | | |
| 64040 | int16_t __ret; | | |
| 64041 | __ret = (int16_t) __builtin_neon_vqsubh_s16(__p0, __p1); | | |
| 64042 | return __ret; | | |
| 64043 | } | | |
| 64044 | #endif | | |
| 64045 | | | |
| 64046 | #ifdef __LITTLE_ENDIAN__ | 54262 | #ifdef __LITTLE_ENDIAN__ |
| 64047 | __ai poly8x8_t vqtbl1_p8(poly8x16_t __p0, uint8x8_t __p1) { | 54263 | __ai poly8x8_t vqtbl1_p8(poly8x16_t __p0, uint8x8_t __p1) { |
| 64048 | poly8x8_t __ret; | 54264 | poly8x8_t __ret; |
| ... | @@ -65211,48 +55427,21 @@ __ai float64x2_t vrecpeq_f64(float64x2_t __p0) { | ... | @@ -65211,48 +55427,21 @@ __ai float64x2_t vrecpeq_f64(float64x2_t __p0) { |
| 65211 | } | 55427 | } |
| 65212 | #endif | 55428 | #endif |
| 65213 | | 55429 | |
| 65214 | #ifdef __LITTLE_ENDIAN__ | | |
| 65215 | __ai float64x1_t vrecpe_f64(float64x1_t __p0) { | | |
| 65216 | float64x1_t __ret; | | |
| 65217 | __ret = (float64x1_t) __builtin_neon_vrecpe_v((int8x8_t)__p0, 10); | | |
| 65218 | return __ret; | | |
| 65219 | } | | |
| 65220 | #else | | |
| 65221 | __ai float64x1_t vrecpe_f64(float64x1_t __p0) { | 55430 | __ai float64x1_t vrecpe_f64(float64x1_t __p0) { |
| 65222 | float64x1_t __ret; | 55431 | float64x1_t __ret; |
| 65223 | __ret = (float64x1_t) __builtin_neon_vrecpe_v((int8x8_t)__p0, 10); | 55432 | __ret = (float64x1_t) __builtin_neon_vrecpe_v((int8x8_t)__p0, 10); |
| 65224 | return __ret; | 55433 | return __ret; |
| 65225 | } | 55434 | } |
| 65226 | #endif | | |
| 65227 | | | |
| 65228 | #ifdef __LITTLE_ENDIAN__ | | |
| 65229 | __ai float64_t vrecped_f64(float64_t __p0) { | 55435 | __ai float64_t vrecped_f64(float64_t __p0) { |
| 65230 | float64_t __ret; | 55436 | float64_t __ret; |
| 65231 | __ret = (float64_t) __builtin_neon_vrecped_f64(__p0); | 55437 | __ret = (float64_t) __builtin_neon_vrecped_f64(__p0); |
| 65232 | return __ret; | 55438 | return __ret; |
| 65233 | } | 55439 | } |
| 65234 | #else | | |
| 65235 | __ai float64_t vrecped_f64(float64_t __p0) { | | |
| 65236 | float64_t __ret; | | |
| 65237 | __ret = (float64_t) __builtin_neon_vrecped_f64(__p0); | | |
| 65238 | return __ret; | | |
| 65239 | } | | |
| 65240 | #endif | | |
| 65241 | | | |
| 65242 | #ifdef __LITTLE_ENDIAN__ | | |
| 65243 | __ai float32_t vrecpes_f32(float32_t __p0) { | | |
| 65244 | float32_t __ret; | | |
| 65245 | __ret = (float32_t) __builtin_neon_vrecpes_f32(__p0); | | |
| 65246 | return __ret; | | |
| 65247 | } | | |
| 65248 | #else | | |
| 65249 | __ai float32_t vrecpes_f32(float32_t __p0) { | 55440 | __ai float32_t vrecpes_f32(float32_t __p0) { |
| 65250 | float32_t __ret; | 55441 | float32_t __ret; |
| 65251 | __ret = (float32_t) __builtin_neon_vrecpes_f32(__p0); | 55442 | __ret = (float32_t) __builtin_neon_vrecpes_f32(__p0); |
| 65252 | return __ret; | 55443 | return __ret; |
| 65253 | } | 55444 | } |
| 65254 | #endif | | |
| 65255 | | | |
| 65256 | #ifdef __LITTLE_ENDIAN__ | 55445 | #ifdef __LITTLE_ENDIAN__ |
| 65257 | __ai float64x2_t vrecpsq_f64(float64x2_t __p0, float64x2_t __p1) { | 55446 | __ai float64x2_t vrecpsq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 65258 | float64x2_t __ret; | 55447 | float64x2_t __ret; |
| ... | @@ -65270,259 +55459,176 @@ __ai float64x2_t vrecpsq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -65270,259 +55459,176 @@ __ai float64x2_t vrecpsq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 65270 | } | 55459 | } |
| 65271 | #endif | 55460 | #endif |
| 65272 | | 55461 | |
| 65273 | #ifdef __LITTLE_ENDIAN__ | | |
| 65274 | __ai float64x1_t vrecps_f64(float64x1_t __p0, float64x1_t __p1) { | 55462 | __ai float64x1_t vrecps_f64(float64x1_t __p0, float64x1_t __p1) { |
| 65275 | float64x1_t __ret; | 55463 | float64x1_t __ret; |
| 65276 | __ret = (float64x1_t) __builtin_neon_vrecps_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 55464 | __ret = (float64x1_t) __builtin_neon_vrecps_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 65277 | return __ret; | 55465 | return __ret; |
| 65278 | } | 55466 | } |
| 65279 | #else | | |
| 65280 | __ai float64x1_t vrecps_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 65281 | float64x1_t __ret; | | |
| 65282 | __ret = (float64x1_t) __builtin_neon_vrecps_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 65283 | return __ret; | | |
| 65284 | } | | |
| 65285 | #endif | | |
| 65286 | | | |
| 65287 | #ifdef __LITTLE_ENDIAN__ | | |
| 65288 | __ai float64_t vrecpsd_f64(float64_t __p0, float64_t __p1) { | | |
| 65289 | float64_t __ret; | | |
| 65290 | __ret = (float64_t) __builtin_neon_vrecpsd_f64(__p0, __p1); | | |
| 65291 | return __ret; | | |
| 65292 | } | | |
| 65293 | #else | | |
| 65294 | __ai float64_t vrecpsd_f64(float64_t __p0, float64_t __p1) { | 55467 | __ai float64_t vrecpsd_f64(float64_t __p0, float64_t __p1) { |
| 65295 | float64_t __ret; | 55468 | float64_t __ret; |
| 65296 | __ret = (float64_t) __builtin_neon_vrecpsd_f64(__p0, __p1); | 55469 | __ret = (float64_t) __builtin_neon_vrecpsd_f64(__p0, __p1); |
| 65297 | return __ret; | 55470 | return __ret; |
| 65298 | } | 55471 | } |
| 65299 | #endif | | |
| 65300 | | | |
| 65301 | #ifdef __LITTLE_ENDIAN__ | | |
| 65302 | __ai float32_t vrecpss_f32(float32_t __p0, float32_t __p1) { | | |
| 65303 | float32_t __ret; | | |
| 65304 | __ret = (float32_t) __builtin_neon_vrecpss_f32(__p0, __p1); | | |
| 65305 | return __ret; | | |
| 65306 | } | | |
| 65307 | #else | | |
| 65308 | __ai float32_t vrecpss_f32(float32_t __p0, float32_t __p1) { | 55472 | __ai float32_t vrecpss_f32(float32_t __p0, float32_t __p1) { |
| 65309 | float32_t __ret; | 55473 | float32_t __ret; |
| 65310 | __ret = (float32_t) __builtin_neon_vrecpss_f32(__p0, __p1); | 55474 | __ret = (float32_t) __builtin_neon_vrecpss_f32(__p0, __p1); |
| 65311 | return __ret; | 55475 | return __ret; |
| 65312 | } | 55476 | } |
| 65313 | #endif | | |
| 65314 | | | |
| 65315 | #ifdef __LITTLE_ENDIAN__ | | |
| 65316 | __ai float64_t vrecpxd_f64(float64_t __p0) { | 55477 | __ai float64_t vrecpxd_f64(float64_t __p0) { |
| 65317 | float64_t __ret; | 55478 | float64_t __ret; |
| 65318 | __ret = (float64_t) __builtin_neon_vrecpxd_f64(__p0); | 55479 | __ret = (float64_t) __builtin_neon_vrecpxd_f64(__p0); |
| 65319 | return __ret; | 55480 | return __ret; |
| 65320 | } | 55481 | } |
| 65321 | #else | | |
| 65322 | __ai float64_t vrecpxd_f64(float64_t __p0) { | | |
| 65323 | float64_t __ret; | | |
| 65324 | __ret = (float64_t) __builtin_neon_vrecpxd_f64(__p0); | | |
| 65325 | return __ret; | | |
| 65326 | } | | |
| 65327 | #endif | | |
| 65328 | | | |
| 65329 | #ifdef __LITTLE_ENDIAN__ | | |
| 65330 | __ai float32_t vrecpxs_f32(float32_t __p0) { | 55482 | __ai float32_t vrecpxs_f32(float32_t __p0) { |
| 65331 | float32_t __ret; | 55483 | float32_t __ret; |
| 65332 | __ret = (float32_t) __builtin_neon_vrecpxs_f32(__p0); | 55484 | __ret = (float32_t) __builtin_neon_vrecpxs_f32(__p0); |
| 65333 | return __ret; | 55485 | return __ret; |
| 65334 | } | 55486 | } |
| 65335 | #else | | |
| 65336 | __ai float32_t vrecpxs_f32(float32_t __p0) { | | |
| 65337 | float32_t __ret; | | |
| 65338 | __ret = (float32_t) __builtin_neon_vrecpxs_f32(__p0); | | |
| 65339 | return __ret; | | |
| 65340 | } | | |
| 65341 | #endif | | |
| 65342 | | | |
| 65343 | #ifdef __LITTLE_ENDIAN__ | | |
| 65344 | __ai uint64_t vrshld_u64(uint64_t __p0, uint64_t __p1) { | | |
| 65345 | uint64_t __ret; | | |
| 65346 | __ret = (uint64_t) __builtin_neon_vrshld_u64(__p0, __p1); | | |
| 65347 | return __ret; | | |
| 65348 | } | | |
| 65349 | #else | | |
| 65350 | __ai uint64_t vrshld_u64(uint64_t __p0, uint64_t __p1) { | 55487 | __ai uint64_t vrshld_u64(uint64_t __p0, uint64_t __p1) { |
| 65351 | uint64_t __ret; | 55488 | uint64_t __ret; |
| 65352 | __ret = (uint64_t) __builtin_neon_vrshld_u64(__p0, __p1); | 55489 | __ret = (uint64_t) __builtin_neon_vrshld_u64(__p0, __p1); |
| 65353 | return __ret; | 55490 | return __ret; |
| 65354 | } | 55491 | } |
| 65355 | #endif | | |
| 65356 | | | |
| 65357 | #ifdef __LITTLE_ENDIAN__ | | |
| 65358 | __ai int64_t vrshld_s64(int64_t __p0, int64_t __p1) { | | |
| 65359 | int64_t __ret; | | |
| 65360 | __ret = (int64_t) __builtin_neon_vrshld_s64(__p0, __p1); | | |
| 65361 | return __ret; | | |
| 65362 | } | | |
| 65363 | #else | | |
| 65364 | __ai int64_t vrshld_s64(int64_t __p0, int64_t __p1) { | 55492 | __ai int64_t vrshld_s64(int64_t __p0, int64_t __p1) { |
| 65365 | int64_t __ret; | 55493 | int64_t __ret; |
| 65366 | __ret = (int64_t) __builtin_neon_vrshld_s64(__p0, __p1); | 55494 | __ret = (int64_t) __builtin_neon_vrshld_s64(__p0, __p1); |
| 65367 | return __ret; | 55495 | return __ret; |
| 65368 | } | 55496 | } |
| 65369 | #endif | | |
| 65370 | | | |
| 65371 | #ifdef __LITTLE_ENDIAN__ | | |
| 65372 | #define vrshrd_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 65373 | uint64_t __s0 = __p0; \ | | |
| 65374 | uint64_t __ret; \ | | |
| 65375 | __ret = (uint64_t) __builtin_neon_vrshrd_n_u64(__s0, __p1); \ | | |
| 65376 | __ret; \ | | |
| 65377 | }) | | |
| 65378 | #else | | |
| 65379 | #define vrshrd_n_u64(__p0, __p1) __extension__ ({ \ | 55497 | #define vrshrd_n_u64(__p0, __p1) __extension__ ({ \ |
| 65380 | uint64_t __s0 = __p0; \ | 55498 | uint64_t __s0 = __p0; \ |
| 65381 | uint64_t __ret; \ | 55499 | uint64_t __ret; \ |
| 65382 | __ret = (uint64_t) __builtin_neon_vrshrd_n_u64(__s0, __p1); \ | 55500 | __ret = (uint64_t) __builtin_neon_vrshrd_n_u64(__s0, __p1); \ |
| 65383 | __ret; \ | 55501 | __ret; \ |
| 65384 | }) | 55502 | }) |
| 65385 | #endif | | |
| 65386 | | | |
| 65387 | #ifdef __LITTLE_ENDIAN__ | | |
| 65388 | #define vrshrd_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 65389 | int64_t __s0 = __p0; \ | | |
| 65390 | int64_t __ret; \ | | |
| 65391 | __ret = (int64_t) __builtin_neon_vrshrd_n_s64(__s0, __p1); \ | | |
| 65392 | __ret; \ | | |
| 65393 | }) | | |
| 65394 | #else | | |
| 65395 | #define vrshrd_n_s64(__p0, __p1) __extension__ ({ \ | 55503 | #define vrshrd_n_s64(__p0, __p1) __extension__ ({ \ |
| 65396 | int64_t __s0 = __p0; \ | 55504 | int64_t __s0 = __p0; \ |
| 65397 | int64_t __ret; \ | 55505 | int64_t __ret; \ |
| 65398 | __ret = (int64_t) __builtin_neon_vrshrd_n_s64(__s0, __p1); \ | 55506 | __ret = (int64_t) __builtin_neon_vrshrd_n_s64(__s0, __p1); \ |
| 65399 | __ret; \ | 55507 | __ret; \ |
| 65400 | }) | 55508 | }) |
| 65401 | #endif | | |
| 65402 | | | |
| 65403 | #ifdef __LITTLE_ENDIAN__ | 55509 | #ifdef __LITTLE_ENDIAN__ |
| 65404 | #define vrshrn_high_n_u32(__p0_218, __p1_218, __p2_218) __extension__ ({ \ | 55510 | #define vrshrn_high_n_u32(__p0_212, __p1_212, __p2_212) __extension__ ({ \ |
| 65405 | uint16x4_t __s0_218 = __p0_218; \ | 55511 | uint16x4_t __s0_212 = __p0_212; \ |
| 65406 | uint32x4_t __s1_218 = __p1_218; \ | 55512 | uint32x4_t __s1_212 = __p1_212; \ |
| 65407 | uint16x8_t __ret_218; \ | 55513 | uint16x8_t __ret_212; \ |
| 65408 | __ret_218 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_218), (uint16x4_t)(vrshrn_n_u32(__s1_218, __p2_218)))); \ | 55514 | __ret_212 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_212), (uint16x4_t)(vrshrn_n_u32(__s1_212, __p2_212)))); \ |
| 65409 | __ret_218; \ | 55515 | __ret_212; \ |
| 65410 | }) | 55516 | }) |
| 65411 | #else | 55517 | #else |
| 65412 | #define vrshrn_high_n_u32(__p0_219, __p1_219, __p2_219) __extension__ ({ \ | 55518 | #define vrshrn_high_n_u32(__p0_213, __p1_213, __p2_213) __extension__ ({ \ |
| 65413 | uint16x4_t __s0_219 = __p0_219; \ | 55519 | uint16x4_t __s0_213 = __p0_213; \ |
| 65414 | uint32x4_t __s1_219 = __p1_219; \ | 55520 | uint32x4_t __s1_213 = __p1_213; \ |
| 65415 | uint16x4_t __rev0_219; __rev0_219 = __builtin_shufflevector(__s0_219, __s0_219, 3, 2, 1, 0); \ | 55521 | uint16x4_t __rev0_213; __rev0_213 = __builtin_shufflevector(__s0_213, __s0_213, 3, 2, 1, 0); \ |
| 65416 | uint32x4_t __rev1_219; __rev1_219 = __builtin_shufflevector(__s1_219, __s1_219, 3, 2, 1, 0); \ | 55522 | uint32x4_t __rev1_213; __rev1_213 = __builtin_shufflevector(__s1_213, __s1_213, 3, 2, 1, 0); \ |
| 65417 | uint16x8_t __ret_219; \ | 55523 | uint16x8_t __ret_213; \ |
| 65418 | __ret_219 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_219), (uint16x4_t)(__noswap_vrshrn_n_u32(__rev1_219, __p2_219)))); \ | 55524 | __ret_213 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_213), (uint16x4_t)(__noswap_vrshrn_n_u32(__rev1_213, __p2_213)))); \ |
| 65419 | __ret_219 = __builtin_shufflevector(__ret_219, __ret_219, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55525 | __ret_213 = __builtin_shufflevector(__ret_213, __ret_213, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65420 | __ret_219; \ | 55526 | __ret_213; \ |
| 65421 | }) | 55527 | }) |
| 65422 | #endif | 55528 | #endif |
| 65423 | | 55529 | |
| 65424 | #ifdef __LITTLE_ENDIAN__ | 55530 | #ifdef __LITTLE_ENDIAN__ |
| 65425 | #define vrshrn_high_n_u64(__p0_220, __p1_220, __p2_220) __extension__ ({ \ | 55531 | #define vrshrn_high_n_u64(__p0_214, __p1_214, __p2_214) __extension__ ({ \ |
| 65426 | uint32x2_t __s0_220 = __p0_220; \ | 55532 | uint32x2_t __s0_214 = __p0_214; \ |
| 65427 | uint64x2_t __s1_220 = __p1_220; \ | 55533 | uint64x2_t __s1_214 = __p1_214; \ |
| 65428 | uint32x4_t __ret_220; \ | 55534 | uint32x4_t __ret_214; \ |
| 65429 | __ret_220 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_220), (uint32x2_t)(vrshrn_n_u64(__s1_220, __p2_220)))); \ | 55535 | __ret_214 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_214), (uint32x2_t)(vrshrn_n_u64(__s1_214, __p2_214)))); \ |
| 65430 | __ret_220; \ | 55536 | __ret_214; \ |
| 65431 | }) | 55537 | }) |
| 65432 | #else | 55538 | #else |
| 65433 | #define vrshrn_high_n_u64(__p0_221, __p1_221, __p2_221) __extension__ ({ \ | 55539 | #define vrshrn_high_n_u64(__p0_215, __p1_215, __p2_215) __extension__ ({ \ |
| 65434 | uint32x2_t __s0_221 = __p0_221; \ | 55540 | uint32x2_t __s0_215 = __p0_215; \ |
| 65435 | uint64x2_t __s1_221 = __p1_221; \ | 55541 | uint64x2_t __s1_215 = __p1_215; \ |
| 65436 | uint32x2_t __rev0_221; __rev0_221 = __builtin_shufflevector(__s0_221, __s0_221, 1, 0); \ | 55542 | uint32x2_t __rev0_215; __rev0_215 = __builtin_shufflevector(__s0_215, __s0_215, 1, 0); \ |
| 65437 | uint64x2_t __rev1_221; __rev1_221 = __builtin_shufflevector(__s1_221, __s1_221, 1, 0); \ | 55543 | uint64x2_t __rev1_215; __rev1_215 = __builtin_shufflevector(__s1_215, __s1_215, 1, 0); \ |
| 65438 | uint32x4_t __ret_221; \ | 55544 | uint32x4_t __ret_215; \ |
| 65439 | __ret_221 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_221), (uint32x2_t)(__noswap_vrshrn_n_u64(__rev1_221, __p2_221)))); \ | 55545 | __ret_215 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_215), (uint32x2_t)(__noswap_vrshrn_n_u64(__rev1_215, __p2_215)))); \ |
| 65440 | __ret_221 = __builtin_shufflevector(__ret_221, __ret_221, 3, 2, 1, 0); \ | 55546 | __ret_215 = __builtin_shufflevector(__ret_215, __ret_215, 3, 2, 1, 0); \ |
| 65441 | __ret_221; \ | 55547 | __ret_215; \ |
| 65442 | }) | 55548 | }) |
| 65443 | #endif | 55549 | #endif |
| 65444 | | 55550 | |
| 65445 | #ifdef __LITTLE_ENDIAN__ | 55551 | #ifdef __LITTLE_ENDIAN__ |
| 65446 | #define vrshrn_high_n_u16(__p0_222, __p1_222, __p2_222) __extension__ ({ \ | 55552 | #define vrshrn_high_n_u16(__p0_216, __p1_216, __p2_216) __extension__ ({ \ |
| 65447 | uint8x8_t __s0_222 = __p0_222; \ | 55553 | uint8x8_t __s0_216 = __p0_216; \ |
| 65448 | uint16x8_t __s1_222 = __p1_222; \ | 55554 | uint16x8_t __s1_216 = __p1_216; \ |
| 65449 | uint8x16_t __ret_222; \ | 55555 | uint8x16_t __ret_216; \ |
| 65450 | __ret_222 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_222), (uint8x8_t)(vrshrn_n_u16(__s1_222, __p2_222)))); \ | 55556 | __ret_216 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_216), (uint8x8_t)(vrshrn_n_u16(__s1_216, __p2_216)))); \ |
| 65451 | __ret_222; \ | 55557 | __ret_216; \ |
| 65452 | }) | 55558 | }) |
| 65453 | #else | 55559 | #else |
| 65454 | #define vrshrn_high_n_u16(__p0_223, __p1_223, __p2_223) __extension__ ({ \ | 55560 | #define vrshrn_high_n_u16(__p0_217, __p1_217, __p2_217) __extension__ ({ \ |
| 65455 | uint8x8_t __s0_223 = __p0_223; \ | 55561 | uint8x8_t __s0_217 = __p0_217; \ |
| 65456 | uint16x8_t __s1_223 = __p1_223; \ | 55562 | uint16x8_t __s1_217 = __p1_217; \ |
| 65457 | uint8x8_t __rev0_223; __rev0_223 = __builtin_shufflevector(__s0_223, __s0_223, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55563 | uint8x8_t __rev0_217; __rev0_217 = __builtin_shufflevector(__s0_217, __s0_217, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65458 | uint16x8_t __rev1_223; __rev1_223 = __builtin_shufflevector(__s1_223, __s1_223, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55564 | uint16x8_t __rev1_217; __rev1_217 = __builtin_shufflevector(__s1_217, __s1_217, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65459 | uint8x16_t __ret_223; \ | 55565 | uint8x16_t __ret_217; \ |
| 65460 | __ret_223 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_223), (uint8x8_t)(__noswap_vrshrn_n_u16(__rev1_223, __p2_223)))); \ | 55566 | __ret_217 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_217), (uint8x8_t)(__noswap_vrshrn_n_u16(__rev1_217, __p2_217)))); \ |
| 65461 | __ret_223 = __builtin_shufflevector(__ret_223, __ret_223, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55567 | __ret_217 = __builtin_shufflevector(__ret_217, __ret_217, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65462 | __ret_223; \ | 55568 | __ret_217; \ |
| 65463 | }) | 55569 | }) |
| 65464 | #endif | 55570 | #endif |
| 65465 | | 55571 | |
| 65466 | #ifdef __LITTLE_ENDIAN__ | 55572 | #ifdef __LITTLE_ENDIAN__ |
| 65467 | #define vrshrn_high_n_s32(__p0_224, __p1_224, __p2_224) __extension__ ({ \ | 55573 | #define vrshrn_high_n_s32(__p0_218, __p1_218, __p2_218) __extension__ ({ \ |
| 65468 | int16x4_t __s0_224 = __p0_224; \ | 55574 | int16x4_t __s0_218 = __p0_218; \ |
| 65469 | int32x4_t __s1_224 = __p1_224; \ | 55575 | int32x4_t __s1_218 = __p1_218; \ |
| 65470 | int16x8_t __ret_224; \ | 55576 | int16x8_t __ret_218; \ |
| 65471 | __ret_224 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_224), (int16x4_t)(vrshrn_n_s32(__s1_224, __p2_224)))); \ | 55577 | __ret_218 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_218), (int16x4_t)(vrshrn_n_s32(__s1_218, __p2_218)))); \ |
| 65472 | __ret_224; \ | 55578 | __ret_218; \ |
| 65473 | }) | 55579 | }) |
| 65474 | #else | 55580 | #else |
| 65475 | #define vrshrn_high_n_s32(__p0_225, __p1_225, __p2_225) __extension__ ({ \ | 55581 | #define vrshrn_high_n_s32(__p0_219, __p1_219, __p2_219) __extension__ ({ \ |
| 65476 | int16x4_t __s0_225 = __p0_225; \ | 55582 | int16x4_t __s0_219 = __p0_219; \ |
| 65477 | int32x4_t __s1_225 = __p1_225; \ | 55583 | int32x4_t __s1_219 = __p1_219; \ |
| 65478 | int16x4_t __rev0_225; __rev0_225 = __builtin_shufflevector(__s0_225, __s0_225, 3, 2, 1, 0); \ | 55584 | int16x4_t __rev0_219; __rev0_219 = __builtin_shufflevector(__s0_219, __s0_219, 3, 2, 1, 0); \ |
| 65479 | int32x4_t __rev1_225; __rev1_225 = __builtin_shufflevector(__s1_225, __s1_225, 3, 2, 1, 0); \ | 55585 | int32x4_t __rev1_219; __rev1_219 = __builtin_shufflevector(__s1_219, __s1_219, 3, 2, 1, 0); \ |
| 65480 | int16x8_t __ret_225; \ | 55586 | int16x8_t __ret_219; \ |
| 65481 | __ret_225 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_225), (int16x4_t)(__noswap_vrshrn_n_s32(__rev1_225, __p2_225)))); \ | 55587 | __ret_219 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_219), (int16x4_t)(__noswap_vrshrn_n_s32(__rev1_219, __p2_219)))); \ |
| 65482 | __ret_225 = __builtin_shufflevector(__ret_225, __ret_225, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55588 | __ret_219 = __builtin_shufflevector(__ret_219, __ret_219, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65483 | __ret_225; \ | 55589 | __ret_219; \ |
| 65484 | }) | 55590 | }) |
| 65485 | #endif | 55591 | #endif |
| 65486 | | 55592 | |
| 65487 | #ifdef __LITTLE_ENDIAN__ | 55593 | #ifdef __LITTLE_ENDIAN__ |
| 65488 | #define vrshrn_high_n_s64(__p0_226, __p1_226, __p2_226) __extension__ ({ \ | 55594 | #define vrshrn_high_n_s64(__p0_220, __p1_220, __p2_220) __extension__ ({ \ |
| 65489 | int32x2_t __s0_226 = __p0_226; \ | 55595 | int32x2_t __s0_220 = __p0_220; \ |
| 65490 | int64x2_t __s1_226 = __p1_226; \ | 55596 | int64x2_t __s1_220 = __p1_220; \ |
| 65491 | int32x4_t __ret_226; \ | 55597 | int32x4_t __ret_220; \ |
| 65492 | __ret_226 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_226), (int32x2_t)(vrshrn_n_s64(__s1_226, __p2_226)))); \ | 55598 | __ret_220 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_220), (int32x2_t)(vrshrn_n_s64(__s1_220, __p2_220)))); \ |
| 65493 | __ret_226; \ | 55599 | __ret_220; \ |
| 65494 | }) | 55600 | }) |
| 65495 | #else | 55601 | #else |
| 65496 | #define vrshrn_high_n_s64(__p0_227, __p1_227, __p2_227) __extension__ ({ \ | 55602 | #define vrshrn_high_n_s64(__p0_221, __p1_221, __p2_221) __extension__ ({ \ |
| 65497 | int32x2_t __s0_227 = __p0_227; \ | 55603 | int32x2_t __s0_221 = __p0_221; \ |
| 65498 | int64x2_t __s1_227 = __p1_227; \ | 55604 | int64x2_t __s1_221 = __p1_221; \ |
| 65499 | int32x2_t __rev0_227; __rev0_227 = __builtin_shufflevector(__s0_227, __s0_227, 1, 0); \ | 55605 | int32x2_t __rev0_221; __rev0_221 = __builtin_shufflevector(__s0_221, __s0_221, 1, 0); \ |
| 65500 | int64x2_t __rev1_227; __rev1_227 = __builtin_shufflevector(__s1_227, __s1_227, 1, 0); \ | 55606 | int64x2_t __rev1_221; __rev1_221 = __builtin_shufflevector(__s1_221, __s1_221, 1, 0); \ |
| 65501 | int32x4_t __ret_227; \ | 55607 | int32x4_t __ret_221; \ |
| 65502 | __ret_227 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_227), (int32x2_t)(__noswap_vrshrn_n_s64(__rev1_227, __p2_227)))); \ | 55608 | __ret_221 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_221), (int32x2_t)(__noswap_vrshrn_n_s64(__rev1_221, __p2_221)))); \ |
| 65503 | __ret_227 = __builtin_shufflevector(__ret_227, __ret_227, 3, 2, 1, 0); \ | 55609 | __ret_221 = __builtin_shufflevector(__ret_221, __ret_221, 3, 2, 1, 0); \ |
| 65504 | __ret_227; \ | 55610 | __ret_221; \ |
| 65505 | }) | 55611 | }) |
| 65506 | #endif | 55612 | #endif |
| 65507 | | 55613 | |
| 65508 | #ifdef __LITTLE_ENDIAN__ | 55614 | #ifdef __LITTLE_ENDIAN__ |
| 65509 | #define vrshrn_high_n_s16(__p0_228, __p1_228, __p2_228) __extension__ ({ \ | 55615 | #define vrshrn_high_n_s16(__p0_222, __p1_222, __p2_222) __extension__ ({ \ |
| 65510 | int8x8_t __s0_228 = __p0_228; \ | 55616 | int8x8_t __s0_222 = __p0_222; \ |
| 65511 | int16x8_t __s1_228 = __p1_228; \ | 55617 | int16x8_t __s1_222 = __p1_222; \ |
| 65512 | int8x16_t __ret_228; \ | 55618 | int8x16_t __ret_222; \ |
| 65513 | __ret_228 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_228), (int8x8_t)(vrshrn_n_s16(__s1_228, __p2_228)))); \ | 55619 | __ret_222 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_222), (int8x8_t)(vrshrn_n_s16(__s1_222, __p2_222)))); \ |
| 65514 | __ret_228; \ | 55620 | __ret_222; \ |
| 65515 | }) | 55621 | }) |
| 65516 | #else | 55622 | #else |
| 65517 | #define vrshrn_high_n_s16(__p0_229, __p1_229, __p2_229) __extension__ ({ \ | 55623 | #define vrshrn_high_n_s16(__p0_223, __p1_223, __p2_223) __extension__ ({ \ |
| 65518 | int8x8_t __s0_229 = __p0_229; \ | 55624 | int8x8_t __s0_223 = __p0_223; \ |
| 65519 | int16x8_t __s1_229 = __p1_229; \ | 55625 | int16x8_t __s1_223 = __p1_223; \ |
| 65520 | int8x8_t __rev0_229; __rev0_229 = __builtin_shufflevector(__s0_229, __s0_229, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55626 | int8x8_t __rev0_223; __rev0_223 = __builtin_shufflevector(__s0_223, __s0_223, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65521 | int16x8_t __rev1_229; __rev1_229 = __builtin_shufflevector(__s1_229, __s1_229, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55627 | int16x8_t __rev1_223; __rev1_223 = __builtin_shufflevector(__s1_223, __s1_223, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65522 | int8x16_t __ret_229; \ | 55628 | int8x16_t __ret_223; \ |
| 65523 | __ret_229 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_229), (int8x8_t)(__noswap_vrshrn_n_s16(__rev1_229, __p2_229)))); \ | 55629 | __ret_223 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_223), (int8x8_t)(__noswap_vrshrn_n_s16(__rev1_223, __p2_223)))); \ |
| 65524 | __ret_229 = __builtin_shufflevector(__ret_229, __ret_229, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55630 | __ret_223 = __builtin_shufflevector(__ret_223, __ret_223, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65525 | __ret_229; \ | 55631 | __ret_223; \ |
| 65526 | }) | 55632 | }) |
| 65527 | #endif | 55633 | #endif |
| 65528 | | 55634 | |
| ... | @@ -65542,48 +55648,21 @@ __ai float64x2_t vrsqrteq_f64(float64x2_t __p0) { | ... | @@ -65542,48 +55648,21 @@ __ai float64x2_t vrsqrteq_f64(float64x2_t __p0) { |
| 65542 | } | 55648 | } |
| 65543 | #endif | 55649 | #endif |
| 65544 | | 55650 | |
| 65545 | #ifdef __LITTLE_ENDIAN__ | | |
| 65546 | __ai float64x1_t vrsqrte_f64(float64x1_t __p0) { | | |
| 65547 | float64x1_t __ret; | | |
| 65548 | __ret = (float64x1_t) __builtin_neon_vrsqrte_v((int8x8_t)__p0, 10); | | |
| 65549 | return __ret; | | |
| 65550 | } | | |
| 65551 | #else | | |
| 65552 | __ai float64x1_t vrsqrte_f64(float64x1_t __p0) { | 55651 | __ai float64x1_t vrsqrte_f64(float64x1_t __p0) { |
| 65553 | float64x1_t __ret; | 55652 | float64x1_t __ret; |
| 65554 | __ret = (float64x1_t) __builtin_neon_vrsqrte_v((int8x8_t)__p0, 10); | 55653 | __ret = (float64x1_t) __builtin_neon_vrsqrte_v((int8x8_t)__p0, 10); |
| 65555 | return __ret; | 55654 | return __ret; |
| 65556 | } | 55655 | } |
| 65557 | #endif | | |
| 65558 | | | |
| 65559 | #ifdef __LITTLE_ENDIAN__ | | |
| 65560 | __ai float64_t vrsqrted_f64(float64_t __p0) { | | |
| 65561 | float64_t __ret; | | |
| 65562 | __ret = (float64_t) __builtin_neon_vrsqrted_f64(__p0); | | |
| 65563 | return __ret; | | |
| 65564 | } | | |
| 65565 | #else | | |
| 65566 | __ai float64_t vrsqrted_f64(float64_t __p0) { | 55656 | __ai float64_t vrsqrted_f64(float64_t __p0) { |
| 65567 | float64_t __ret; | 55657 | float64_t __ret; |
| 65568 | __ret = (float64_t) __builtin_neon_vrsqrted_f64(__p0); | 55658 | __ret = (float64_t) __builtin_neon_vrsqrted_f64(__p0); |
| 65569 | return __ret; | 55659 | return __ret; |
| 65570 | } | 55660 | } |
| 65571 | #endif | | |
| 65572 | | | |
| 65573 | #ifdef __LITTLE_ENDIAN__ | | |
| 65574 | __ai float32_t vrsqrtes_f32(float32_t __p0) { | | |
| 65575 | float32_t __ret; | | |
| 65576 | __ret = (float32_t) __builtin_neon_vrsqrtes_f32(__p0); | | |
| 65577 | return __ret; | | |
| 65578 | } | | |
| 65579 | #else | | |
| 65580 | __ai float32_t vrsqrtes_f32(float32_t __p0) { | 55661 | __ai float32_t vrsqrtes_f32(float32_t __p0) { |
| 65581 | float32_t __ret; | 55662 | float32_t __ret; |
| 65582 | __ret = (float32_t) __builtin_neon_vrsqrtes_f32(__p0); | 55663 | __ret = (float32_t) __builtin_neon_vrsqrtes_f32(__p0); |
| 65583 | return __ret; | 55664 | return __ret; |
| 65584 | } | 55665 | } |
| 65585 | #endif | | |
| 65586 | | | |
| 65587 | #ifdef __LITTLE_ENDIAN__ | 55666 | #ifdef __LITTLE_ENDIAN__ |
| 65588 | __ai float64x2_t vrsqrtsq_f64(float64x2_t __p0, float64x2_t __p1) { | 55667 | __ai float64x2_t vrsqrtsq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 65589 | float64x2_t __ret; | 55668 | float64x2_t __ret; |
| ... | @@ -65601,57 +55680,21 @@ __ai float64x2_t vrsqrtsq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -65601,57 +55680,21 @@ __ai float64x2_t vrsqrtsq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 65601 | } | 55680 | } |
| 65602 | #endif | 55681 | #endif |
| 65603 | | 55682 | |
| 65604 | #ifdef __LITTLE_ENDIAN__ | | |
| 65605 | __ai float64x1_t vrsqrts_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 65606 | float64x1_t __ret; | | |
| 65607 | __ret = (float64x1_t) __builtin_neon_vrsqrts_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | | |
| 65608 | return __ret; | | |
| 65609 | } | | |
| 65610 | #else | | |
| 65611 | __ai float64x1_t vrsqrts_f64(float64x1_t __p0, float64x1_t __p1) { | 55683 | __ai float64x1_t vrsqrts_f64(float64x1_t __p0, float64x1_t __p1) { |
| 65612 | float64x1_t __ret; | 55684 | float64x1_t __ret; |
| 65613 | __ret = (float64x1_t) __builtin_neon_vrsqrts_v((int8x8_t)__p0, (int8x8_t)__p1, 10); | 55685 | __ret = (float64x1_t) __builtin_neon_vrsqrts_v((int8x8_t)__p0, (int8x8_t)__p1, 10); |
| 65614 | return __ret; | 55686 | return __ret; |
| 65615 | } | 55687 | } |
| 65616 | #endif | | |
| 65617 | | | |
| 65618 | #ifdef __LITTLE_ENDIAN__ | | |
| 65619 | __ai float64_t vrsqrtsd_f64(float64_t __p0, float64_t __p1) { | | |
| 65620 | float64_t __ret; | | |
| 65621 | __ret = (float64_t) __builtin_neon_vrsqrtsd_f64(__p0, __p1); | | |
| 65622 | return __ret; | | |
| 65623 | } | | |
| 65624 | #else | | |
| 65625 | __ai float64_t vrsqrtsd_f64(float64_t __p0, float64_t __p1) { | 55688 | __ai float64_t vrsqrtsd_f64(float64_t __p0, float64_t __p1) { |
| 65626 | float64_t __ret; | 55689 | float64_t __ret; |
| 65627 | __ret = (float64_t) __builtin_neon_vrsqrtsd_f64(__p0, __p1); | 55690 | __ret = (float64_t) __builtin_neon_vrsqrtsd_f64(__p0, __p1); |
| 65628 | return __ret; | 55691 | return __ret; |
| 65629 | } | 55692 | } |
| 65630 | #endif | | |
| 65631 | | | |
| 65632 | #ifdef __LITTLE_ENDIAN__ | | |
| 65633 | __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { | | |
| 65634 | float32_t __ret; | | |
| 65635 | __ret = (float32_t) __builtin_neon_vrsqrtss_f32(__p0, __p1); | | |
| 65636 | return __ret; | | |
| 65637 | } | | |
| 65638 | #else | | |
| 65639 | __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { | 55693 | __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { |
| 65640 | float32_t __ret; | 55694 | float32_t __ret; |
| 65641 | __ret = (float32_t) __builtin_neon_vrsqrtss_f32(__p0, __p1); | 55695 | __ret = (float32_t) __builtin_neon_vrsqrtss_f32(__p0, __p1); |
| 65642 | return __ret; | 55696 | return __ret; |
| 65643 | } | 55697 | } |
| 65644 | #endif | | |
| 65645 | | | |
| 65646 | #ifdef __LITTLE_ENDIAN__ | | |
| 65647 | #define vrsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 65648 | uint64_t __s0 = __p0; \ | | |
| 65649 | uint64_t __s1 = __p1; \ | | |
| 65650 | uint64_t __ret; \ | | |
| 65651 | __ret = (uint64_t) __builtin_neon_vrsrad_n_u64(__s0, __s1, __p2); \ | | |
| 65652 | __ret; \ | | |
| 65653 | }) | | |
| 65654 | #else | | |
| 65655 | #define vrsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ | 55698 | #define vrsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 65656 | uint64_t __s0 = __p0; \ | 55699 | uint64_t __s0 = __p0; \ |
| 65657 | uint64_t __s1 = __p1; \ | 55700 | uint64_t __s1 = __p1; \ |
| ... | @@ -65659,17 +55702,6 @@ __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { | ... | @@ -65659,17 +55702,6 @@ __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { |
| 65659 | __ret = (uint64_t) __builtin_neon_vrsrad_n_u64(__s0, __s1, __p2); \ | 55702 | __ret = (uint64_t) __builtin_neon_vrsrad_n_u64(__s0, __s1, __p2); \ |
| 65660 | __ret; \ | 55703 | __ret; \ |
| 65661 | }) | 55704 | }) |
| 65662 | #endif | | |
| 65663 | | | |
| 65664 | #ifdef __LITTLE_ENDIAN__ | | |
| 65665 | #define vrsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 65666 | int64_t __s0 = __p0; \ | | |
| 65667 | int64_t __s1 = __p1; \ | | |
| 65668 | int64_t __ret; \ | | |
| 65669 | __ret = (int64_t) __builtin_neon_vrsrad_n_s64(__s0, __s1, __p2); \ | | |
| 65670 | __ret; \ | | |
| 65671 | }) | | |
| 65672 | #else | | |
| 65673 | #define vrsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ | 55705 | #define vrsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 65674 | int64_t __s0 = __p0; \ | 55706 | int64_t __s0 = __p0; \ |
| 65675 | int64_t __s1 = __p1; \ | 55707 | int64_t __s1 = __p1; \ |
| ... | @@ -65677,8 +55709,6 @@ __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { | ... | @@ -65677,8 +55709,6 @@ __ai float32_t vrsqrtss_f32(float32_t __p0, float32_t __p1) { |
| 65677 | __ret = (int64_t) __builtin_neon_vrsrad_n_s64(__s0, __s1, __p2); \ | 55709 | __ret = (int64_t) __builtin_neon_vrsrad_n_s64(__s0, __s1, __p2); \ |
| 65678 | __ret; \ | 55710 | __ret; \ |
| 65679 | }) | 55711 | }) |
| 65680 | #endif | | |
| 65681 | | | |
| 65682 | #ifdef __LITTLE_ENDIAN__ | 55712 | #ifdef __LITTLE_ENDIAN__ |
| 65683 | __ai uint16x8_t vrsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 55713 | __ai uint16x8_t vrsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 65684 | uint16x8_t __ret; | 55714 | uint16x8_t __ret; |
| ... | @@ -65787,37 +55817,19 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | ... | @@ -65787,37 +55817,19 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65787 | } | 55817 | } |
| 65788 | #endif | 55818 | #endif |
| 65789 | | 55819 | |
| 65790 | #ifdef __LITTLE_ENDIAN__ | | |
| 65791 | #define vset_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 55820 | #define vset_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 65792 | poly64_t __s0 = __p0; \ | 55821 | poly64_t __s0 = __p0; \ |
| 65793 | poly64x1_t __s1 = __p1; \ | 55822 | poly64x1_t __s1 = __p1; \ |
| 65794 | poly64x1_t __ret; \ | 55823 | poly64x1_t __ret; \ |
| 65795 | __ret = (poly64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | 55824 | __ret = (poly64x1_t) __builtin_neon_vset_lane_i64(__s0, (poly64x1_t)__s1, __p2); \ |
| 65796 | __ret; \ | 55825 | __ret; \ |
| 65797 | }) | 55826 | }) |
| 65798 | #else | | |
| 65799 | #define vset_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 65800 | poly64_t __s0 = __p0; \ | | |
| 65801 | poly64x1_t __s1 = __p1; \ | | |
| 65802 | poly64x1_t __ret; \ | | |
| 65803 | __ret = (poly64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | | |
| 65804 | __ret; \ | | |
| 65805 | }) | | |
| 65806 | #define __noswap_vset_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 65807 | poly64_t __s0 = __p0; \ | | |
| 65808 | poly64x1_t __s1 = __p1; \ | | |
| 65809 | poly64x1_t __ret; \ | | |
| 65810 | __ret = (poly64x1_t) __builtin_neon_vset_lane_i64(__s0, (int8x8_t)__s1, __p2); \ | | |
| 65811 | __ret; \ | | |
| 65812 | }) | | |
| 65813 | #endif | | |
| 65814 | | | |
| 65815 | #ifdef __LITTLE_ENDIAN__ | 55827 | #ifdef __LITTLE_ENDIAN__ |
| 65816 | #define vsetq_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 55828 | #define vsetq_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 65817 | poly64_t __s0 = __p0; \ | 55829 | poly64_t __s0 = __p0; \ |
| 65818 | poly64x2_t __s1 = __p1; \ | 55830 | poly64x2_t __s1 = __p1; \ |
| 65819 | poly64x2_t __ret; \ | 55831 | poly64x2_t __ret; \ |
| 65820 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__s1, __p2); \ | 55832 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__s1, __p2); \ |
| 65821 | __ret; \ | 55833 | __ret; \ |
| 65822 | }) | 55834 | }) |
| 65823 | #else | 55835 | #else |
| ... | @@ -65826,7 +55838,7 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | ... | @@ -65826,7 +55838,7 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65826 | poly64x2_t __s1 = __p1; \ | 55838 | poly64x2_t __s1 = __p1; \ |
| 65827 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 55839 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 65828 | poly64x2_t __ret; \ | 55840 | poly64x2_t __ret; \ |
| 65829 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__rev1, __p2); \ | 55841 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__rev1, __p2); \ |
| 65830 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 55842 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 65831 | __ret; \ | 55843 | __ret; \ |
| 65832 | }) | 55844 | }) |
| ... | @@ -65834,7 +55846,7 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | ... | @@ -65834,7 +55846,7 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65834 | poly64_t __s0 = __p0; \ | 55846 | poly64_t __s0 = __p0; \ |
| 65835 | poly64x2_t __s1 = __p1; \ | 55847 | poly64x2_t __s1 = __p1; \ |
| 65836 | poly64x2_t __ret; \ | 55848 | poly64x2_t __ret; \ |
| 65837 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (int8x16_t)__s1, __p2); \ | 55849 | __ret = (poly64x2_t) __builtin_neon_vsetq_lane_i64(__s0, (poly64x2_t)__s1, __p2); \ |
| 65838 | __ret; \ | 55850 | __ret; \ |
| 65839 | }) | 55851 | }) |
| 65840 | #endif | 55852 | #endif |
| ... | @@ -65844,7 +55856,7 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | ... | @@ -65844,7 +55856,7 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65844 | float64_t __s0 = __p0; \ | 55856 | float64_t __s0 = __p0; \ |
| 65845 | float64x2_t __s1 = __p1; \ | 55857 | float64x2_t __s1 = __p1; \ |
| 65846 | float64x2_t __ret; \ | 55858 | float64x2_t __ret; \ |
| 65847 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (int8x16_t)__s1, __p2); \ | 55859 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__s1, __p2); \ |
| 65848 | __ret; \ | 55860 | __ret; \ |
| 65849 | }) | 55861 | }) |
| 65850 | #else | 55862 | #else |
| ... | @@ -65853,7 +55865,7 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | ... | @@ -65853,7 +55865,7 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65853 | float64x2_t __s1 = __p1; \ | 55865 | float64x2_t __s1 = __p1; \ |
| 65854 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ | 55866 | float64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \ |
| 65855 | float64x2_t __ret; \ | 55867 | float64x2_t __ret; \ |
| 65856 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (int8x16_t)__rev1, __p2); \ | 55868 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__rev1, __p2); \ |
| 65857 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ | 55869 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); \ |
| 65858 | __ret; \ | 55870 | __ret; \ |
| 65859 | }) | 55871 | }) |
| ... | @@ -65861,371 +55873,286 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { | ... | @@ -65861,371 +55873,286 @@ __ai int8x16_t vrsubhn_high_s16(int8x8_t __p0, int16x8_t __p1, int16x8_t __p2) { |
| 65861 | float64_t __s0 = __p0; \ | 55873 | float64_t __s0 = __p0; \ |
| 65862 | float64x2_t __s1 = __p1; \ | 55874 | float64x2_t __s1 = __p1; \ |
| 65863 | float64x2_t __ret; \ | 55875 | float64x2_t __ret; \ |
| 65864 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (int8x16_t)__s1, __p2); \ | 55876 | __ret = (float64x2_t) __builtin_neon_vsetq_lane_f64(__s0, (float64x2_t)__s1, __p2); \ |
| 65865 | __ret; \ | 55877 | __ret; \ |
| 65866 | }) | 55878 | }) |
| 65867 | #endif | 55879 | #endif |
| 65868 | | 55880 | |
| 65869 | #ifdef __LITTLE_ENDIAN__ | | |
| 65870 | #define vset_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 65871 | float64_t __s0 = __p0; \ | | |
| 65872 | float64x1_t __s1 = __p1; \ | | |
| 65873 | float64x1_t __ret; \ | | |
| 65874 | __ret = (float64x1_t) __builtin_neon_vset_lane_f64(__s0, (int8x8_t)__s1, __p2); \ | | |
| 65875 | __ret; \ | | |
| 65876 | }) | | |
| 65877 | #else | | |
| 65878 | #define vset_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 55881 | #define vset_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 65879 | float64_t __s0 = __p0; \ | 55882 | float64_t __s0 = __p0; \ |
| 65880 | float64x1_t __s1 = __p1; \ | 55883 | float64x1_t __s1 = __p1; \ |
| 65881 | float64x1_t __ret; \ | 55884 | float64x1_t __ret; \ |
| 65882 | __ret = (float64x1_t) __builtin_neon_vset_lane_f64(__s0, (int8x8_t)__s1, __p2); \ | 55885 | __ret = (float64x1_t) __builtin_neon_vset_lane_f64(__s0, (float64x1_t)__s1, __p2); \ |
| 65883 | __ret; \ | | |
| 65884 | }) | | |
| 65885 | #define __noswap_vset_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 65886 | float64_t __s0 = __p0; \ | | |
| 65887 | float64x1_t __s1 = __p1; \ | | |
| 65888 | float64x1_t __ret; \ | | |
| 65889 | __ret = (float64x1_t) __builtin_neon_vset_lane_f64(__s0, (int8x8_t)__s1, __p2); \ | | |
| 65890 | __ret; \ | 55886 | __ret; \ |
| 65891 | }) | 55887 | }) |
| 65892 | #endif | | |
| 65893 | | | |
| 65894 | #ifdef __LITTLE_ENDIAN__ | | |
| 65895 | __ai uint64_t vshld_u64(uint64_t __p0, uint64_t __p1) { | | |
| 65896 | uint64_t __ret; | | |
| 65897 | __ret = (uint64_t) __builtin_neon_vshld_u64(__p0, __p1); | | |
| 65898 | return __ret; | | |
| 65899 | } | | |
| 65900 | #else | | |
| 65901 | __ai uint64_t vshld_u64(uint64_t __p0, uint64_t __p1) { | 55888 | __ai uint64_t vshld_u64(uint64_t __p0, uint64_t __p1) { |
| 65902 | uint64_t __ret; | 55889 | uint64_t __ret; |
| 65903 | __ret = (uint64_t) __builtin_neon_vshld_u64(__p0, __p1); | 55890 | __ret = (uint64_t) __builtin_neon_vshld_u64(__p0, __p1); |
| 65904 | return __ret; | 55891 | return __ret; |
| 65905 | } | 55892 | } |
| 65906 | #endif | | |
| 65907 | | | |
| 65908 | #ifdef __LITTLE_ENDIAN__ | | |
| 65909 | __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { | | |
| 65910 | int64_t __ret; | | |
| 65911 | __ret = (int64_t) __builtin_neon_vshld_s64(__p0, __p1); | | |
| 65912 | return __ret; | | |
| 65913 | } | | |
| 65914 | #else | | |
| 65915 | __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { | 55893 | __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { |
| 65916 | int64_t __ret; | 55894 | int64_t __ret; |
| 65917 | __ret = (int64_t) __builtin_neon_vshld_s64(__p0, __p1); | 55895 | __ret = (int64_t) __builtin_neon_vshld_s64(__p0, __p1); |
| 65918 | return __ret; | 55896 | return __ret; |
| 65919 | } | 55897 | } |
| 65920 | #endif | | |
| 65921 | | | |
| 65922 | #ifdef __LITTLE_ENDIAN__ | | |
| 65923 | #define vshld_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 65924 | uint64_t __s0 = __p0; \ | | |
| 65925 | uint64_t __ret; \ | | |
| 65926 | __ret = (uint64_t) __builtin_neon_vshld_n_u64(__s0, __p1); \ | | |
| 65927 | __ret; \ | | |
| 65928 | }) | | |
| 65929 | #else | | |
| 65930 | #define vshld_n_u64(__p0, __p1) __extension__ ({ \ | 55898 | #define vshld_n_u64(__p0, __p1) __extension__ ({ \ |
| 65931 | uint64_t __s0 = __p0; \ | 55899 | uint64_t __s0 = __p0; \ |
| 65932 | uint64_t __ret; \ | 55900 | uint64_t __ret; \ |
| 65933 | __ret = (uint64_t) __builtin_neon_vshld_n_u64(__s0, __p1); \ | 55901 | __ret = (uint64_t) __builtin_neon_vshld_n_u64(__s0, __p1); \ |
| 65934 | __ret; \ | 55902 | __ret; \ |
| 65935 | }) | 55903 | }) |
| 65936 | #endif | | |
| 65937 | | | |
| 65938 | #ifdef __LITTLE_ENDIAN__ | | |
| 65939 | #define vshld_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 65940 | int64_t __s0 = __p0; \ | | |
| 65941 | int64_t __ret; \ | | |
| 65942 | __ret = (int64_t) __builtin_neon_vshld_n_s64(__s0, __p1); \ | | |
| 65943 | __ret; \ | | |
| 65944 | }) | | |
| 65945 | #else | | |
| 65946 | #define vshld_n_s64(__p0, __p1) __extension__ ({ \ | 55904 | #define vshld_n_s64(__p0, __p1) __extension__ ({ \ |
| 65947 | int64_t __s0 = __p0; \ | 55905 | int64_t __s0 = __p0; \ |
| 65948 | int64_t __ret; \ | 55906 | int64_t __ret; \ |
| 65949 | __ret = (int64_t) __builtin_neon_vshld_n_s64(__s0, __p1); \ | 55907 | __ret = (int64_t) __builtin_neon_vshld_n_s64(__s0, __p1); \ |
| 65950 | __ret; \ | 55908 | __ret; \ |
| 65951 | }) | 55909 | }) |
| 65952 | #endif | | |
| 65953 | | | |
| 65954 | #ifdef __LITTLE_ENDIAN__ | 55910 | #ifdef __LITTLE_ENDIAN__ |
| 65955 | #define vshll_high_n_u8(__p0_230, __p1_230) __extension__ ({ \ | 55911 | #define vshll_high_n_u8(__p0_224, __p1_224) __extension__ ({ \ |
| 65956 | uint8x16_t __s0_230 = __p0_230; \ | 55912 | uint8x16_t __s0_224 = __p0_224; \ |
| 65957 | uint16x8_t __ret_230; \ | 55913 | uint16x8_t __ret_224; \ |
| 65958 | __ret_230 = (uint16x8_t)(vshll_n_u8(vget_high_u8(__s0_230), __p1_230)); \ | 55914 | __ret_224 = (uint16x8_t)(vshll_n_u8(vget_high_u8(__s0_224), __p1_224)); \ |
| 65959 | __ret_230; \ | 55915 | __ret_224; \ |
| 65960 | }) | 55916 | }) |
| 65961 | #else | 55917 | #else |
| 65962 | #define vshll_high_n_u8(__p0_231, __p1_231) __extension__ ({ \ | 55918 | #define vshll_high_n_u8(__p0_225, __p1_225) __extension__ ({ \ |
| 65963 | uint8x16_t __s0_231 = __p0_231; \ | 55919 | uint8x16_t __s0_225 = __p0_225; \ |
| 65964 | uint8x16_t __rev0_231; __rev0_231 = __builtin_shufflevector(__s0_231, __s0_231, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55920 | uint8x16_t __rev0_225; __rev0_225 = __builtin_shufflevector(__s0_225, __s0_225, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65965 | uint16x8_t __ret_231; \ | 55921 | uint16x8_t __ret_225; \ |
| 65966 | __ret_231 = (uint16x8_t)(__noswap_vshll_n_u8(__noswap_vget_high_u8(__rev0_231), __p1_231)); \ | 55922 | __ret_225 = (uint16x8_t)(__noswap_vshll_n_u8(__noswap_vget_high_u8(__rev0_225), __p1_225)); \ |
| 65967 | __ret_231 = __builtin_shufflevector(__ret_231, __ret_231, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55923 | __ret_225 = __builtin_shufflevector(__ret_225, __ret_225, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65968 | __ret_231; \ | 55924 | __ret_225; \ |
| 65969 | }) | 55925 | }) |
| 65970 | #endif | 55926 | #endif |
| 65971 | | 55927 | |
| 65972 | #ifdef __LITTLE_ENDIAN__ | 55928 | #ifdef __LITTLE_ENDIAN__ |
| 65973 | #define vshll_high_n_u32(__p0_232, __p1_232) __extension__ ({ \ | 55929 | #define vshll_high_n_u32(__p0_226, __p1_226) __extension__ ({ \ |
| 65974 | uint32x4_t __s0_232 = __p0_232; \ | 55930 | uint32x4_t __s0_226 = __p0_226; \ |
| 65975 | uint64x2_t __ret_232; \ | 55931 | uint64x2_t __ret_226; \ |
| 65976 | __ret_232 = (uint64x2_t)(vshll_n_u32(vget_high_u32(__s0_232), __p1_232)); \ | 55932 | __ret_226 = (uint64x2_t)(vshll_n_u32(vget_high_u32(__s0_226), __p1_226)); \ |
| 65977 | __ret_232; \ | 55933 | __ret_226; \ |
| 65978 | }) | 55934 | }) |
| 65979 | #else | 55935 | #else |
| 65980 | #define vshll_high_n_u32(__p0_233, __p1_233) __extension__ ({ \ | 55936 | #define vshll_high_n_u32(__p0_227, __p1_227) __extension__ ({ \ |
| 65981 | uint32x4_t __s0_233 = __p0_233; \ | 55937 | uint32x4_t __s0_227 = __p0_227; \ |
| 65982 | uint32x4_t __rev0_233; __rev0_233 = __builtin_shufflevector(__s0_233, __s0_233, 3, 2, 1, 0); \ | 55938 | uint32x4_t __rev0_227; __rev0_227 = __builtin_shufflevector(__s0_227, __s0_227, 3, 2, 1, 0); \ |
| 65983 | uint64x2_t __ret_233; \ | 55939 | uint64x2_t __ret_227; \ |
| 65984 | __ret_233 = (uint64x2_t)(__noswap_vshll_n_u32(__noswap_vget_high_u32(__rev0_233), __p1_233)); \ | 55940 | __ret_227 = (uint64x2_t)(__noswap_vshll_n_u32(__noswap_vget_high_u32(__rev0_227), __p1_227)); \ |
| 65985 | __ret_233 = __builtin_shufflevector(__ret_233, __ret_233, 1, 0); \ | 55941 | __ret_227 = __builtin_shufflevector(__ret_227, __ret_227, 1, 0); \ |
| 65986 | __ret_233; \ | 55942 | __ret_227; \ |
| 65987 | }) | 55943 | }) |
| 65988 | #endif | 55944 | #endif |
| 65989 | | 55945 | |
| 65990 | #ifdef __LITTLE_ENDIAN__ | 55946 | #ifdef __LITTLE_ENDIAN__ |
| 65991 | #define vshll_high_n_u16(__p0_234, __p1_234) __extension__ ({ \ | 55947 | #define vshll_high_n_u16(__p0_228, __p1_228) __extension__ ({ \ |
| 65992 | uint16x8_t __s0_234 = __p0_234; \ | 55948 | uint16x8_t __s0_228 = __p0_228; \ |
| 65993 | uint32x4_t __ret_234; \ | 55949 | uint32x4_t __ret_228; \ |
| 65994 | __ret_234 = (uint32x4_t)(vshll_n_u16(vget_high_u16(__s0_234), __p1_234)); \ | 55950 | __ret_228 = (uint32x4_t)(vshll_n_u16(vget_high_u16(__s0_228), __p1_228)); \ |
| 65995 | __ret_234; \ | 55951 | __ret_228; \ |
| 65996 | }) | 55952 | }) |
| 65997 | #else | 55953 | #else |
| 65998 | #define vshll_high_n_u16(__p0_235, __p1_235) __extension__ ({ \ | 55954 | #define vshll_high_n_u16(__p0_229, __p1_229) __extension__ ({ \ |
| 65999 | uint16x8_t __s0_235 = __p0_235; \ | 55955 | uint16x8_t __s0_229 = __p0_229; \ |
| 66000 | uint16x8_t __rev0_235; __rev0_235 = __builtin_shufflevector(__s0_235, __s0_235, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55956 | uint16x8_t __rev0_229; __rev0_229 = __builtin_shufflevector(__s0_229, __s0_229, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66001 | uint32x4_t __ret_235; \ | 55957 | uint32x4_t __ret_229; \ |
| 66002 | __ret_235 = (uint32x4_t)(__noswap_vshll_n_u16(__noswap_vget_high_u16(__rev0_235), __p1_235)); \ | 55958 | __ret_229 = (uint32x4_t)(__noswap_vshll_n_u16(__noswap_vget_high_u16(__rev0_229), __p1_229)); \ |
| 66003 | __ret_235 = __builtin_shufflevector(__ret_235, __ret_235, 3, 2, 1, 0); \ | 55959 | __ret_229 = __builtin_shufflevector(__ret_229, __ret_229, 3, 2, 1, 0); \ |
| 66004 | __ret_235; \ | 55960 | __ret_229; \ |
| 66005 | }) | 55961 | }) |
| 66006 | #endif | 55962 | #endif |
| 66007 | | 55963 | |
| 66008 | #ifdef __LITTLE_ENDIAN__ | 55964 | #ifdef __LITTLE_ENDIAN__ |
| 66009 | #define vshll_high_n_s8(__p0_236, __p1_236) __extension__ ({ \ | 55965 | #define vshll_high_n_s8(__p0_230, __p1_230) __extension__ ({ \ |
| 66010 | int8x16_t __s0_236 = __p0_236; \ | 55966 | int8x16_t __s0_230 = __p0_230; \ |
| 66011 | int16x8_t __ret_236; \ | 55967 | int16x8_t __ret_230; \ |
| 66012 | __ret_236 = (int16x8_t)(vshll_n_s8(vget_high_s8(__s0_236), __p1_236)); \ | 55968 | __ret_230 = (int16x8_t)(vshll_n_s8(vget_high_s8(__s0_230), __p1_230)); \ |
| 66013 | __ret_236; \ | 55969 | __ret_230; \ |
| 66014 | }) | 55970 | }) |
| 66015 | #else | 55971 | #else |
| 66016 | #define vshll_high_n_s8(__p0_237, __p1_237) __extension__ ({ \ | 55972 | #define vshll_high_n_s8(__p0_231, __p1_231) __extension__ ({ \ |
| 66017 | int8x16_t __s0_237 = __p0_237; \ | 55973 | int8x16_t __s0_231 = __p0_231; \ |
| 66018 | int8x16_t __rev0_237; __rev0_237 = __builtin_shufflevector(__s0_237, __s0_237, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55974 | int8x16_t __rev0_231; __rev0_231 = __builtin_shufflevector(__s0_231, __s0_231, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66019 | int16x8_t __ret_237; \ | 55975 | int16x8_t __ret_231; \ |
| 66020 | __ret_237 = (int16x8_t)(__noswap_vshll_n_s8(__noswap_vget_high_s8(__rev0_237), __p1_237)); \ | 55976 | __ret_231 = (int16x8_t)(__noswap_vshll_n_s8(__noswap_vget_high_s8(__rev0_231), __p1_231)); \ |
| 66021 | __ret_237 = __builtin_shufflevector(__ret_237, __ret_237, 7, 6, 5, 4, 3, 2, 1, 0); \ | 55977 | __ret_231 = __builtin_shufflevector(__ret_231, __ret_231, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66022 | __ret_237; \ | 55978 | __ret_231; \ |
| 66023 | }) | 55979 | }) |
| 66024 | #endif | 55980 | #endif |
| 66025 | | 55981 | |
| 66026 | #ifdef __LITTLE_ENDIAN__ | 55982 | #ifdef __LITTLE_ENDIAN__ |
| 66027 | #define vshll_high_n_s32(__p0_238, __p1_238) __extension__ ({ \ | 55983 | #define vshll_high_n_s32(__p0_232, __p1_232) __extension__ ({ \ |
| 66028 | int32x4_t __s0_238 = __p0_238; \ | 55984 | int32x4_t __s0_232 = __p0_232; \ |
| 66029 | int64x2_t __ret_238; \ | 55985 | int64x2_t __ret_232; \ |
| 66030 | __ret_238 = (int64x2_t)(vshll_n_s32(vget_high_s32(__s0_238), __p1_238)); \ | 55986 | __ret_232 = (int64x2_t)(vshll_n_s32(vget_high_s32(__s0_232), __p1_232)); \ |
| 66031 | __ret_238; \ | 55987 | __ret_232; \ |
| 66032 | }) | 55988 | }) |
| 66033 | #else | 55989 | #else |
| 66034 | #define vshll_high_n_s32(__p0_239, __p1_239) __extension__ ({ \ | 55990 | #define vshll_high_n_s32(__p0_233, __p1_233) __extension__ ({ \ |
| 66035 | int32x4_t __s0_239 = __p0_239; \ | 55991 | int32x4_t __s0_233 = __p0_233; \ |
| 66036 | int32x4_t __rev0_239; __rev0_239 = __builtin_shufflevector(__s0_239, __s0_239, 3, 2, 1, 0); \ | 55992 | int32x4_t __rev0_233; __rev0_233 = __builtin_shufflevector(__s0_233, __s0_233, 3, 2, 1, 0); \ |
| 66037 | int64x2_t __ret_239; \ | 55993 | int64x2_t __ret_233; \ |
| 66038 | __ret_239 = (int64x2_t)(__noswap_vshll_n_s32(__noswap_vget_high_s32(__rev0_239), __p1_239)); \ | 55994 | __ret_233 = (int64x2_t)(__noswap_vshll_n_s32(__noswap_vget_high_s32(__rev0_233), __p1_233)); \ |
| 66039 | __ret_239 = __builtin_shufflevector(__ret_239, __ret_239, 1, 0); \ | 55995 | __ret_233 = __builtin_shufflevector(__ret_233, __ret_233, 1, 0); \ |
| 66040 | __ret_239; \ | 55996 | __ret_233; \ |
| 66041 | }) | 55997 | }) |
| 66042 | #endif | 55998 | #endif |
| 66043 | | 55999 | |
| 66044 | #ifdef __LITTLE_ENDIAN__ | 56000 | #ifdef __LITTLE_ENDIAN__ |
| 66045 | #define vshll_high_n_s16(__p0_240, __p1_240) __extension__ ({ \ | 56001 | #define vshll_high_n_s16(__p0_234, __p1_234) __extension__ ({ \ |
| 66046 | int16x8_t __s0_240 = __p0_240; \ | 56002 | int16x8_t __s0_234 = __p0_234; \ |
| 66047 | int32x4_t __ret_240; \ | 56003 | int32x4_t __ret_234; \ |
| 66048 | __ret_240 = (int32x4_t)(vshll_n_s16(vget_high_s16(__s0_240), __p1_240)); \ | 56004 | __ret_234 = (int32x4_t)(vshll_n_s16(vget_high_s16(__s0_234), __p1_234)); \ |
| 66049 | __ret_240; \ | 56005 | __ret_234; \ |
| 66050 | }) | 56006 | }) |
| 66051 | #else | 56007 | #else |
| 66052 | #define vshll_high_n_s16(__p0_241, __p1_241) __extension__ ({ \ | 56008 | #define vshll_high_n_s16(__p0_235, __p1_235) __extension__ ({ \ |
| 66053 | int16x8_t __s0_241 = __p0_241; \ | 56009 | int16x8_t __s0_235 = __p0_235; \ |
| 66054 | int16x8_t __rev0_241; __rev0_241 = __builtin_shufflevector(__s0_241, __s0_241, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56010 | int16x8_t __rev0_235; __rev0_235 = __builtin_shufflevector(__s0_235, __s0_235, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66055 | int32x4_t __ret_241; \ | 56011 | int32x4_t __ret_235; \ |
| 66056 | __ret_241 = (int32x4_t)(__noswap_vshll_n_s16(__noswap_vget_high_s16(__rev0_241), __p1_241)); \ | 56012 | __ret_235 = (int32x4_t)(__noswap_vshll_n_s16(__noswap_vget_high_s16(__rev0_235), __p1_235)); \ |
| 66057 | __ret_241 = __builtin_shufflevector(__ret_241, __ret_241, 3, 2, 1, 0); \ | 56013 | __ret_235 = __builtin_shufflevector(__ret_235, __ret_235, 3, 2, 1, 0); \ |
| 66058 | __ret_241; \ | 56014 | __ret_235; \ |
| 66059 | }) | 56015 | }) |
| 66060 | #endif | 56016 | #endif |
| 66061 | | 56017 | |
| 66062 | #ifdef __LITTLE_ENDIAN__ | | |
| 66063 | #define vshrd_n_u64(__p0, __p1) __extension__ ({ \ | | |
| 66064 | uint64_t __s0 = __p0; \ | | |
| 66065 | uint64_t __ret; \ | | |
| 66066 | __ret = (uint64_t) __builtin_neon_vshrd_n_u64(__s0, __p1); \ | | |
| 66067 | __ret; \ | | |
| 66068 | }) | | |
| 66069 | #else | | |
| 66070 | #define vshrd_n_u64(__p0, __p1) __extension__ ({ \ | 56018 | #define vshrd_n_u64(__p0, __p1) __extension__ ({ \ |
| 66071 | uint64_t __s0 = __p0; \ | 56019 | uint64_t __s0 = __p0; \ |
| 66072 | uint64_t __ret; \ | 56020 | uint64_t __ret; \ |
| 66073 | __ret = (uint64_t) __builtin_neon_vshrd_n_u64(__s0, __p1); \ | 56021 | __ret = (uint64_t) __builtin_neon_vshrd_n_u64(__s0, __p1); \ |
| 66074 | __ret; \ | 56022 | __ret; \ |
| 66075 | }) | 56023 | }) |
| 66076 | #endif | | |
| 66077 | | | |
| 66078 | #ifdef __LITTLE_ENDIAN__ | | |
| 66079 | #define vshrd_n_s64(__p0, __p1) __extension__ ({ \ | | |
| 66080 | int64_t __s0 = __p0; \ | | |
| 66081 | int64_t __ret; \ | | |
| 66082 | __ret = (int64_t) __builtin_neon_vshrd_n_s64(__s0, __p1); \ | | |
| 66083 | __ret; \ | | |
| 66084 | }) | | |
| 66085 | #else | | |
| 66086 | #define vshrd_n_s64(__p0, __p1) __extension__ ({ \ | 56024 | #define vshrd_n_s64(__p0, __p1) __extension__ ({ \ |
| 66087 | int64_t __s0 = __p0; \ | 56025 | int64_t __s0 = __p0; \ |
| 66088 | int64_t __ret; \ | 56026 | int64_t __ret; \ |
| 66089 | __ret = (int64_t) __builtin_neon_vshrd_n_s64(__s0, __p1); \ | 56027 | __ret = (int64_t) __builtin_neon_vshrd_n_s64(__s0, __p1); \ |
| 66090 | __ret; \ | 56028 | __ret; \ |
| 66091 | }) | 56029 | }) |
| 66092 | #endif | | |
| 66093 | | | |
| 66094 | #ifdef __LITTLE_ENDIAN__ | 56030 | #ifdef __LITTLE_ENDIAN__ |
| 66095 | #define vshrn_high_n_u32(__p0_242, __p1_242, __p2_242) __extension__ ({ \ | 56031 | #define vshrn_high_n_u32(__p0_236, __p1_236, __p2_236) __extension__ ({ \ |
| 66096 | uint16x4_t __s0_242 = __p0_242; \ | 56032 | uint16x4_t __s0_236 = __p0_236; \ |
| 66097 | uint32x4_t __s1_242 = __p1_242; \ | 56033 | uint32x4_t __s1_236 = __p1_236; \ |
| 66098 | uint16x8_t __ret_242; \ | 56034 | uint16x8_t __ret_236; \ |
| 66099 | __ret_242 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_242), (uint16x4_t)(vshrn_n_u32(__s1_242, __p2_242)))); \ | 56035 | __ret_236 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_236), (uint16x4_t)(vshrn_n_u32(__s1_236, __p2_236)))); \ |
| 66100 | __ret_242; \ | 56036 | __ret_236; \ |
| 66101 | }) | 56037 | }) |
| 66102 | #else | 56038 | #else |
| 66103 | #define vshrn_high_n_u32(__p0_243, __p1_243, __p2_243) __extension__ ({ \ | 56039 | #define vshrn_high_n_u32(__p0_237, __p1_237, __p2_237) __extension__ ({ \ |
| 66104 | uint16x4_t __s0_243 = __p0_243; \ | 56040 | uint16x4_t __s0_237 = __p0_237; \ |
| 66105 | uint32x4_t __s1_243 = __p1_243; \ | 56041 | uint32x4_t __s1_237 = __p1_237; \ |
| 66106 | uint16x4_t __rev0_243; __rev0_243 = __builtin_shufflevector(__s0_243, __s0_243, 3, 2, 1, 0); \ | 56042 | uint16x4_t __rev0_237; __rev0_237 = __builtin_shufflevector(__s0_237, __s0_237, 3, 2, 1, 0); \ |
| 66107 | uint32x4_t __rev1_243; __rev1_243 = __builtin_shufflevector(__s1_243, __s1_243, 3, 2, 1, 0); \ | 56043 | uint32x4_t __rev1_237; __rev1_237 = __builtin_shufflevector(__s1_237, __s1_237, 3, 2, 1, 0); \ |
| 66108 | uint16x8_t __ret_243; \ | 56044 | uint16x8_t __ret_237; \ |
| 66109 | __ret_243 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_243), (uint16x4_t)(__noswap_vshrn_n_u32(__rev1_243, __p2_243)))); \ | 56045 | __ret_237 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_237), (uint16x4_t)(__noswap_vshrn_n_u32(__rev1_237, __p2_237)))); \ |
| 66110 | __ret_243 = __builtin_shufflevector(__ret_243, __ret_243, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56046 | __ret_237 = __builtin_shufflevector(__ret_237, __ret_237, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66111 | __ret_243; \ | 56047 | __ret_237; \ |
| 66112 | }) | 56048 | }) |
| 66113 | #endif | 56049 | #endif |
| 66114 | | 56050 | |
| 66115 | #ifdef __LITTLE_ENDIAN__ | 56051 | #ifdef __LITTLE_ENDIAN__ |
| 66116 | #define vshrn_high_n_u64(__p0_244, __p1_244, __p2_244) __extension__ ({ \ | 56052 | #define vshrn_high_n_u64(__p0_238, __p1_238, __p2_238) __extension__ ({ \ |
| 66117 | uint32x2_t __s0_244 = __p0_244; \ | 56053 | uint32x2_t __s0_238 = __p0_238; \ |
| 66118 | uint64x2_t __s1_244 = __p1_244; \ | 56054 | uint64x2_t __s1_238 = __p1_238; \ |
| 66119 | uint32x4_t __ret_244; \ | 56055 | uint32x4_t __ret_238; \ |
| 66120 | __ret_244 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_244), (uint32x2_t)(vshrn_n_u64(__s1_244, __p2_244)))); \ | 56056 | __ret_238 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_238), (uint32x2_t)(vshrn_n_u64(__s1_238, __p2_238)))); \ |
| 66121 | __ret_244; \ | 56057 | __ret_238; \ |
| 66122 | }) | 56058 | }) |
| 66123 | #else | 56059 | #else |
| 66124 | #define vshrn_high_n_u64(__p0_245, __p1_245, __p2_245) __extension__ ({ \ | 56060 | #define vshrn_high_n_u64(__p0_239, __p1_239, __p2_239) __extension__ ({ \ |
| 66125 | uint32x2_t __s0_245 = __p0_245; \ | 56061 | uint32x2_t __s0_239 = __p0_239; \ |
| 66126 | uint64x2_t __s1_245 = __p1_245; \ | 56062 | uint64x2_t __s1_239 = __p1_239; \ |
| 66127 | uint32x2_t __rev0_245; __rev0_245 = __builtin_shufflevector(__s0_245, __s0_245, 1, 0); \ | 56063 | uint32x2_t __rev0_239; __rev0_239 = __builtin_shufflevector(__s0_239, __s0_239, 1, 0); \ |
| 66128 | uint64x2_t __rev1_245; __rev1_245 = __builtin_shufflevector(__s1_245, __s1_245, 1, 0); \ | 56064 | uint64x2_t __rev1_239; __rev1_239 = __builtin_shufflevector(__s1_239, __s1_239, 1, 0); \ |
| 66129 | uint32x4_t __ret_245; \ | 56065 | uint32x4_t __ret_239; \ |
| 66130 | __ret_245 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_245), (uint32x2_t)(__noswap_vshrn_n_u64(__rev1_245, __p2_245)))); \ | 56066 | __ret_239 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_239), (uint32x2_t)(__noswap_vshrn_n_u64(__rev1_239, __p2_239)))); \ |
| 66131 | __ret_245 = __builtin_shufflevector(__ret_245, __ret_245, 3, 2, 1, 0); \ | 56067 | __ret_239 = __builtin_shufflevector(__ret_239, __ret_239, 3, 2, 1, 0); \ |
| 66132 | __ret_245; \ | 56068 | __ret_239; \ |
| 66133 | }) | 56069 | }) |
| 66134 | #endif | 56070 | #endif |
| 66135 | | 56071 | |
| 66136 | #ifdef __LITTLE_ENDIAN__ | 56072 | #ifdef __LITTLE_ENDIAN__ |
| 66137 | #define vshrn_high_n_u16(__p0_246, __p1_246, __p2_246) __extension__ ({ \ | 56073 | #define vshrn_high_n_u16(__p0_240, __p1_240, __p2_240) __extension__ ({ \ |
| 66138 | uint8x8_t __s0_246 = __p0_246; \ | 56074 | uint8x8_t __s0_240 = __p0_240; \ |
| 66139 | uint16x8_t __s1_246 = __p1_246; \ | 56075 | uint16x8_t __s1_240 = __p1_240; \ |
| 66140 | uint8x16_t __ret_246; \ | 56076 | uint8x16_t __ret_240; \ |
| 66141 | __ret_246 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_246), (uint8x8_t)(vshrn_n_u16(__s1_246, __p2_246)))); \ | 56077 | __ret_240 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_240), (uint8x8_t)(vshrn_n_u16(__s1_240, __p2_240)))); \ |
| 66142 | __ret_246; \ | 56078 | __ret_240; \ |
| 66143 | }) | 56079 | }) |
| 66144 | #else | 56080 | #else |
| 66145 | #define vshrn_high_n_u16(__p0_247, __p1_247, __p2_247) __extension__ ({ \ | 56081 | #define vshrn_high_n_u16(__p0_241, __p1_241, __p2_241) __extension__ ({ \ |
| 66146 | uint8x8_t __s0_247 = __p0_247; \ | 56082 | uint8x8_t __s0_241 = __p0_241; \ |
| 66147 | uint16x8_t __s1_247 = __p1_247; \ | 56083 | uint16x8_t __s1_241 = __p1_241; \ |
| 66148 | uint8x8_t __rev0_247; __rev0_247 = __builtin_shufflevector(__s0_247, __s0_247, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56084 | uint8x8_t __rev0_241; __rev0_241 = __builtin_shufflevector(__s0_241, __s0_241, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66149 | uint16x8_t __rev1_247; __rev1_247 = __builtin_shufflevector(__s1_247, __s1_247, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56085 | uint16x8_t __rev1_241; __rev1_241 = __builtin_shufflevector(__s1_241, __s1_241, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66150 | uint8x16_t __ret_247; \ | 56086 | uint8x16_t __ret_241; \ |
| 66151 | __ret_247 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_247), (uint8x8_t)(__noswap_vshrn_n_u16(__rev1_247, __p2_247)))); \ | 56087 | __ret_241 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_241), (uint8x8_t)(__noswap_vshrn_n_u16(__rev1_241, __p2_241)))); \ |
| 66152 | __ret_247 = __builtin_shufflevector(__ret_247, __ret_247, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56088 | __ret_241 = __builtin_shufflevector(__ret_241, __ret_241, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66153 | __ret_247; \ | 56089 | __ret_241; \ |
| 66154 | }) | 56090 | }) |
| 66155 | #endif | 56091 | #endif |
| 66156 | | 56092 | |
| 66157 | #ifdef __LITTLE_ENDIAN__ | 56093 | #ifdef __LITTLE_ENDIAN__ |
| 66158 | #define vshrn_high_n_s32(__p0_248, __p1_248, __p2_248) __extension__ ({ \ | 56094 | #define vshrn_high_n_s32(__p0_242, __p1_242, __p2_242) __extension__ ({ \ |
| 66159 | int16x4_t __s0_248 = __p0_248; \ | 56095 | int16x4_t __s0_242 = __p0_242; \ |
| 66160 | int32x4_t __s1_248 = __p1_248; \ | 56096 | int32x4_t __s1_242 = __p1_242; \ |
| 66161 | int16x8_t __ret_248; \ | 56097 | int16x8_t __ret_242; \ |
| 66162 | __ret_248 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_248), (int16x4_t)(vshrn_n_s32(__s1_248, __p2_248)))); \ | 56098 | __ret_242 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_242), (int16x4_t)(vshrn_n_s32(__s1_242, __p2_242)))); \ |
| 66163 | __ret_248; \ | 56099 | __ret_242; \ |
| 66164 | }) | 56100 | }) |
| 66165 | #else | 56101 | #else |
| 66166 | #define vshrn_high_n_s32(__p0_249, __p1_249, __p2_249) __extension__ ({ \ | 56102 | #define vshrn_high_n_s32(__p0_243, __p1_243, __p2_243) __extension__ ({ \ |
| 66167 | int16x4_t __s0_249 = __p0_249; \ | 56103 | int16x4_t __s0_243 = __p0_243; \ |
| 66168 | int32x4_t __s1_249 = __p1_249; \ | 56104 | int32x4_t __s1_243 = __p1_243; \ |
| 66169 | int16x4_t __rev0_249; __rev0_249 = __builtin_shufflevector(__s0_249, __s0_249, 3, 2, 1, 0); \ | 56105 | int16x4_t __rev0_243; __rev0_243 = __builtin_shufflevector(__s0_243, __s0_243, 3, 2, 1, 0); \ |
| 66170 | int32x4_t __rev1_249; __rev1_249 = __builtin_shufflevector(__s1_249, __s1_249, 3, 2, 1, 0); \ | 56106 | int32x4_t __rev1_243; __rev1_243 = __builtin_shufflevector(__s1_243, __s1_243, 3, 2, 1, 0); \ |
| 66171 | int16x8_t __ret_249; \ | 56107 | int16x8_t __ret_243; \ |
| 66172 | __ret_249 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_249), (int16x4_t)(__noswap_vshrn_n_s32(__rev1_249, __p2_249)))); \ | 56108 | __ret_243 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_243), (int16x4_t)(__noswap_vshrn_n_s32(__rev1_243, __p2_243)))); \ |
| 66173 | __ret_249 = __builtin_shufflevector(__ret_249, __ret_249, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56109 | __ret_243 = __builtin_shufflevector(__ret_243, __ret_243, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66174 | __ret_249; \ | 56110 | __ret_243; \ |
| 66175 | }) | 56111 | }) |
| 66176 | #endif | 56112 | #endif |
| 66177 | | 56113 | |
| 66178 | #ifdef __LITTLE_ENDIAN__ | 56114 | #ifdef __LITTLE_ENDIAN__ |
| 66179 | #define vshrn_high_n_s64(__p0_250, __p1_250, __p2_250) __extension__ ({ \ | 56115 | #define vshrn_high_n_s64(__p0_244, __p1_244, __p2_244) __extension__ ({ \ |
| 66180 | int32x2_t __s0_250 = __p0_250; \ | 56116 | int32x2_t __s0_244 = __p0_244; \ |
| 66181 | int64x2_t __s1_250 = __p1_250; \ | 56117 | int64x2_t __s1_244 = __p1_244; \ |
| 66182 | int32x4_t __ret_250; \ | 56118 | int32x4_t __ret_244; \ |
| 66183 | __ret_250 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_250), (int32x2_t)(vshrn_n_s64(__s1_250, __p2_250)))); \ | 56119 | __ret_244 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_244), (int32x2_t)(vshrn_n_s64(__s1_244, __p2_244)))); \ |
| 66184 | __ret_250; \ | 56120 | __ret_244; \ |
| 66185 | }) | 56121 | }) |
| 66186 | #else | 56122 | #else |
| 66187 | #define vshrn_high_n_s64(__p0_251, __p1_251, __p2_251) __extension__ ({ \ | 56123 | #define vshrn_high_n_s64(__p0_245, __p1_245, __p2_245) __extension__ ({ \ |
| 66188 | int32x2_t __s0_251 = __p0_251; \ | 56124 | int32x2_t __s0_245 = __p0_245; \ |
| 66189 | int64x2_t __s1_251 = __p1_251; \ | 56125 | int64x2_t __s1_245 = __p1_245; \ |
| 66190 | int32x2_t __rev0_251; __rev0_251 = __builtin_shufflevector(__s0_251, __s0_251, 1, 0); \ | 56126 | int32x2_t __rev0_245; __rev0_245 = __builtin_shufflevector(__s0_245, __s0_245, 1, 0); \ |
| 66191 | int64x2_t __rev1_251; __rev1_251 = __builtin_shufflevector(__s1_251, __s1_251, 1, 0); \ | 56127 | int64x2_t __rev1_245; __rev1_245 = __builtin_shufflevector(__s1_245, __s1_245, 1, 0); \ |
| 66192 | int32x4_t __ret_251; \ | 56128 | int32x4_t __ret_245; \ |
| 66193 | __ret_251 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_251), (int32x2_t)(__noswap_vshrn_n_s64(__rev1_251, __p2_251)))); \ | 56129 | __ret_245 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_245), (int32x2_t)(__noswap_vshrn_n_s64(__rev1_245, __p2_245)))); \ |
| 66194 | __ret_251 = __builtin_shufflevector(__ret_251, __ret_251, 3, 2, 1, 0); \ | 56130 | __ret_245 = __builtin_shufflevector(__ret_245, __ret_245, 3, 2, 1, 0); \ |
| 66195 | __ret_251; \ | 56131 | __ret_245; \ |
| 66196 | }) | 56132 | }) |
| 66197 | #endif | 56133 | #endif |
| 66198 | | 56134 | |
| 66199 | #ifdef __LITTLE_ENDIAN__ | 56135 | #ifdef __LITTLE_ENDIAN__ |
| 66200 | #define vshrn_high_n_s16(__p0_252, __p1_252, __p2_252) __extension__ ({ \ | 56136 | #define vshrn_high_n_s16(__p0_246, __p1_246, __p2_246) __extension__ ({ \ |
| 66201 | int8x8_t __s0_252 = __p0_252; \ | 56137 | int8x8_t __s0_246 = __p0_246; \ |
| 66202 | int16x8_t __s1_252 = __p1_252; \ | 56138 | int16x8_t __s1_246 = __p1_246; \ |
| 66203 | int8x16_t __ret_252; \ | 56139 | int8x16_t __ret_246; \ |
| 66204 | __ret_252 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_252), (int8x8_t)(vshrn_n_s16(__s1_252, __p2_252)))); \ | 56140 | __ret_246 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_246), (int8x8_t)(vshrn_n_s16(__s1_246, __p2_246)))); \ |
| 66205 | __ret_252; \ | 56141 | __ret_246; \ |
| 66206 | }) | 56142 | }) |
| 66207 | #else | 56143 | #else |
| 66208 | #define vshrn_high_n_s16(__p0_253, __p1_253, __p2_253) __extension__ ({ \ | 56144 | #define vshrn_high_n_s16(__p0_247, __p1_247, __p2_247) __extension__ ({ \ |
| 66209 | int8x8_t __s0_253 = __p0_253; \ | 56145 | int8x8_t __s0_247 = __p0_247; \ |
| 66210 | int16x8_t __s1_253 = __p1_253; \ | 56146 | int16x8_t __s1_247 = __p1_247; \ |
| 66211 | int8x8_t __rev0_253; __rev0_253 = __builtin_shufflevector(__s0_253, __s0_253, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56147 | int8x8_t __rev0_247; __rev0_247 = __builtin_shufflevector(__s0_247, __s0_247, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66212 | int16x8_t __rev1_253; __rev1_253 = __builtin_shufflevector(__s1_253, __s1_253, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56148 | int16x8_t __rev1_247; __rev1_247 = __builtin_shufflevector(__s1_247, __s1_247, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66213 | int8x16_t __ret_253; \ | 56149 | int8x16_t __ret_247; \ |
| 66214 | __ret_253 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_253), (int8x8_t)(__noswap_vshrn_n_s16(__rev1_253, __p2_253)))); \ | 56150 | __ret_247 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_247), (int8x8_t)(__noswap_vshrn_n_s16(__rev1_247, __p2_247)))); \ |
| 66215 | __ret_253 = __builtin_shufflevector(__ret_253, __ret_253, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ | 56151 | __ret_247 = __builtin_shufflevector(__ret_247, __ret_247, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66216 | __ret_253; \ | 56152 | __ret_247; \ |
| 66217 | }) | 56153 | }) |
| 66218 | #endif | 56154 | #endif |
| 66219 | | 56155 | |
| 66220 | #ifdef __LITTLE_ENDIAN__ | | |
| 66221 | #define vslid_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66222 | uint64_t __s0 = __p0; \ | | |
| 66223 | uint64_t __s1 = __p1; \ | | |
| 66224 | uint64_t __ret; \ | | |
| 66225 | __ret = (uint64_t) __builtin_neon_vslid_n_u64(__s0, __s1, __p2); \ | | |
| 66226 | __ret; \ | | |
| 66227 | }) | | |
| 66228 | #else | | |
| 66229 | #define vslid_n_u64(__p0, __p1, __p2) __extension__ ({ \ | 56156 | #define vslid_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 66230 | uint64_t __s0 = __p0; \ | 56157 | uint64_t __s0 = __p0; \ |
| 66231 | uint64_t __s1 = __p1; \ | 56158 | uint64_t __s1 = __p1; \ |
| ... | @@ -66233,17 +56160,6 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { | ... | @@ -66233,17 +56160,6 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { |
| 66233 | __ret = (uint64_t) __builtin_neon_vslid_n_u64(__s0, __s1, __p2); \ | 56160 | __ret = (uint64_t) __builtin_neon_vslid_n_u64(__s0, __s1, __p2); \ |
| 66234 | __ret; \ | 56161 | __ret; \ |
| 66235 | }) | 56162 | }) |
| 66236 | #endif | | |
| 66237 | | | |
| 66238 | #ifdef __LITTLE_ENDIAN__ | | |
| 66239 | #define vslid_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66240 | int64_t __s0 = __p0; \ | | |
| 66241 | int64_t __s1 = __p1; \ | | |
| 66242 | int64_t __ret; \ | | |
| 66243 | __ret = (int64_t) __builtin_neon_vslid_n_s64(__s0, __s1, __p2); \ | | |
| 66244 | __ret; \ | | |
| 66245 | }) | | |
| 66246 | #else | | |
| 66247 | #define vslid_n_s64(__p0, __p1, __p2) __extension__ ({ \ | 56163 | #define vslid_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 66248 | int64_t __s0 = __p0; \ | 56164 | int64_t __s0 = __p0; \ |
| 66249 | int64_t __s1 = __p1; \ | 56165 | int64_t __s1 = __p1; \ |
| ... | @@ -66251,17 +56167,6 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { | ... | @@ -66251,17 +56167,6 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { |
| 66251 | __ret = (int64_t) __builtin_neon_vslid_n_s64(__s0, __s1, __p2); \ | 56167 | __ret = (int64_t) __builtin_neon_vslid_n_s64(__s0, __s1, __p2); \ |
| 66252 | __ret; \ | 56168 | __ret; \ |
| 66253 | }) | 56169 | }) |
| 66254 | #endif | | |
| 66255 | | | |
| 66256 | #ifdef __LITTLE_ENDIAN__ | | |
| 66257 | #define vsli_n_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66258 | poly64x1_t __s0 = __p0; \ | | |
| 66259 | poly64x1_t __s1 = __p1; \ | | |
| 66260 | poly64x1_t __ret; \ | | |
| 66261 | __ret = (poly64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | | |
| 66262 | __ret; \ | | |
| 66263 | }) | | |
| 66264 | #else | | |
| 66265 | #define vsli_n_p64(__p0, __p1, __p2) __extension__ ({ \ | 56170 | #define vsli_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 66266 | poly64x1_t __s0 = __p0; \ | 56171 | poly64x1_t __s0 = __p0; \ |
| 66267 | poly64x1_t __s1 = __p1; \ | 56172 | poly64x1_t __s1 = __p1; \ |
| ... | @@ -66269,8 +56174,6 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { | ... | @@ -66269,8 +56174,6 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { |
| 66269 | __ret = (poly64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | 56174 | __ret = (poly64x1_t) __builtin_neon_vsli_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ |
| 66270 | __ret; \ | 56175 | __ret; \ |
| 66271 | }) | 56176 | }) |
| 66272 | #endif | | |
| 66273 | | | |
| 66274 | #ifdef __LITTLE_ENDIAN__ | 56177 | #ifdef __LITTLE_ENDIAN__ |
| 66275 | #define vsliq_n_p64(__p0, __p1, __p2) __extension__ ({ \ | 56178 | #define vsliq_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 66276 | poly64x2_t __s0 = __p0; \ | 56179 | poly64x2_t __s0 = __p0; \ |
| ... | @@ -66292,62 +56195,26 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { | ... | @@ -66292,62 +56195,26 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { |
| 66292 | }) | 56195 | }) |
| 66293 | #endif | 56196 | #endif |
| 66294 | | 56197 | |
| 66295 | #ifdef __LITTLE_ENDIAN__ | | |
| 66296 | __ai uint8_t vsqaddb_u8(uint8_t __p0, int8_t __p1) { | | |
| 66297 | uint8_t __ret; | | |
| 66298 | __ret = (uint8_t) __builtin_neon_vsqaddb_u8(__p0, __p1); | | |
| 66299 | return __ret; | | |
| 66300 | } | | |
| 66301 | #else | | |
| 66302 | __ai uint8_t vsqaddb_u8(uint8_t __p0, int8_t __p1) { | 56198 | __ai uint8_t vsqaddb_u8(uint8_t __p0, int8_t __p1) { |
| 66303 | uint8_t __ret; | 56199 | uint8_t __ret; |
| 66304 | __ret = (uint8_t) __builtin_neon_vsqaddb_u8(__p0, __p1); | 56200 | __ret = (uint8_t) __builtin_neon_vsqaddb_u8(__p0, __p1); |
| 66305 | return __ret; | 56201 | return __ret; |
| 66306 | } | 56202 | } |
| 66307 | #endif | | |
| 66308 | | | |
| 66309 | #ifdef __LITTLE_ENDIAN__ | | |
| 66310 | __ai uint32_t vsqadds_u32(uint32_t __p0, int32_t __p1) { | | |
| 66311 | uint32_t __ret; | | |
| 66312 | __ret = (uint32_t) __builtin_neon_vsqadds_u32(__p0, __p1); | | |
| 66313 | return __ret; | | |
| 66314 | } | | |
| 66315 | #else | | |
| 66316 | __ai uint32_t vsqadds_u32(uint32_t __p0, int32_t __p1) { | 56203 | __ai uint32_t vsqadds_u32(uint32_t __p0, int32_t __p1) { |
| 66317 | uint32_t __ret; | 56204 | uint32_t __ret; |
| 66318 | __ret = (uint32_t) __builtin_neon_vsqadds_u32(__p0, __p1); | 56205 | __ret = (uint32_t) __builtin_neon_vsqadds_u32(__p0, __p1); |
| 66319 | return __ret; | 56206 | return __ret; |
| 66320 | } | 56207 | } |
| 66321 | #endif | | |
| 66322 | | | |
| 66323 | #ifdef __LITTLE_ENDIAN__ | | |
| 66324 | __ai uint64_t vsqaddd_u64(uint64_t __p0, int64_t __p1) { | | |
| 66325 | uint64_t __ret; | | |
| 66326 | __ret = (uint64_t) __builtin_neon_vsqaddd_u64(__p0, __p1); | | |
| 66327 | return __ret; | | |
| 66328 | } | | |
| 66329 | #else | | |
| 66330 | __ai uint64_t vsqaddd_u64(uint64_t __p0, int64_t __p1) { | 56208 | __ai uint64_t vsqaddd_u64(uint64_t __p0, int64_t __p1) { |
| 66331 | uint64_t __ret; | 56209 | uint64_t __ret; |
| 66332 | __ret = (uint64_t) __builtin_neon_vsqaddd_u64(__p0, __p1); | 56210 | __ret = (uint64_t) __builtin_neon_vsqaddd_u64(__p0, __p1); |
| 66333 | return __ret; | 56211 | return __ret; |
| 66334 | } | 56212 | } |
| 66335 | #endif | | |
| 66336 | | | |
| 66337 | #ifdef __LITTLE_ENDIAN__ | | |
| 66338 | __ai uint16_t vsqaddh_u16(uint16_t __p0, int16_t __p1) { | | |
| 66339 | uint16_t __ret; | | |
| 66340 | __ret = (uint16_t) __builtin_neon_vsqaddh_u16(__p0, __p1); | | |
| 66341 | return __ret; | | |
| 66342 | } | | |
| 66343 | #else | | |
| 66344 | __ai uint16_t vsqaddh_u16(uint16_t __p0, int16_t __p1) { | 56213 | __ai uint16_t vsqaddh_u16(uint16_t __p0, int16_t __p1) { |
| 66345 | uint16_t __ret; | 56214 | uint16_t __ret; |
| 66346 | __ret = (uint16_t) __builtin_neon_vsqaddh_u16(__p0, __p1); | 56215 | __ret = (uint16_t) __builtin_neon_vsqaddh_u16(__p0, __p1); |
| 66347 | return __ret; | 56216 | return __ret; |
| 66348 | } | 56217 | } |
| 66349 | #endif | | |
| 66350 | | | |
| 66351 | #ifdef __LITTLE_ENDIAN__ | 56218 | #ifdef __LITTLE_ENDIAN__ |
| 66352 | __ai uint8x16_t vsqaddq_u8(uint8x16_t __p0, int8x16_t __p1) { | 56219 | __ai uint8x16_t vsqaddq_u8(uint8x16_t __p0, int8x16_t __p1) { |
| 66353 | uint8x16_t __ret; | 56220 | uint8x16_t __ret; |
| ... | @@ -66450,20 +56317,11 @@ __ai uint32x2_t vsqadd_u32(uint32x2_t __p0, int32x2_t __p1) { | ... | @@ -66450,20 +56317,11 @@ __ai uint32x2_t vsqadd_u32(uint32x2_t __p0, int32x2_t __p1) { |
| 66450 | } | 56317 | } |
| 66451 | #endif | 56318 | #endif |
| 66452 | | 56319 | |
| 66453 | #ifdef __LITTLE_ENDIAN__ | | |
| 66454 | __ai uint64x1_t vsqadd_u64(uint64x1_t __p0, int64x1_t __p1) { | | |
| 66455 | uint64x1_t __ret; | | |
| 66456 | __ret = (uint64x1_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 66457 | return __ret; | | |
| 66458 | } | | |
| 66459 | #else | | |
| 66460 | __ai uint64x1_t vsqadd_u64(uint64x1_t __p0, int64x1_t __p1) { | 56320 | __ai uint64x1_t vsqadd_u64(uint64x1_t __p0, int64x1_t __p1) { |
| 66461 | uint64x1_t __ret; | 56321 | uint64x1_t __ret; |
| 66462 | __ret = (uint64x1_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 56322 | __ret = (uint64x1_t) __builtin_neon_vsqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 66463 | return __ret; | 56323 | return __ret; |
| 66464 | } | 56324 | } |
| 66465 | #endif | | |
| 66466 | | | |
| 66467 | #ifdef __LITTLE_ENDIAN__ | 56325 | #ifdef __LITTLE_ENDIAN__ |
| 66468 | __ai uint16x4_t vsqadd_u16(uint16x4_t __p0, int16x4_t __p1) { | 56326 | __ai uint16x4_t vsqadd_u16(uint16x4_t __p0, int16x4_t __p1) { |
| 66469 | uint16x4_t __ret; | 56327 | uint16x4_t __ret; |
| ... | @@ -66513,20 +56371,11 @@ __ai float32x4_t vsqrtq_f32(float32x4_t __p0) { | ... | @@ -66513,20 +56371,11 @@ __ai float32x4_t vsqrtq_f32(float32x4_t __p0) { |
| 66513 | } | 56371 | } |
| 66514 | #endif | 56372 | #endif |
| 66515 | | 56373 | |
| 66516 | #ifdef __LITTLE_ENDIAN__ | | |
| 66517 | __ai float64x1_t vsqrt_f64(float64x1_t __p0) { | | |
| 66518 | float64x1_t __ret; | | |
| 66519 | __ret = (float64x1_t) __builtin_neon_vsqrt_v((int8x8_t)__p0, 10); | | |
| 66520 | return __ret; | | |
| 66521 | } | | |
| 66522 | #else | | |
| 66523 | __ai float64x1_t vsqrt_f64(float64x1_t __p0) { | 56374 | __ai float64x1_t vsqrt_f64(float64x1_t __p0) { |
| 66524 | float64x1_t __ret; | 56375 | float64x1_t __ret; |
| 66525 | __ret = (float64x1_t) __builtin_neon_vsqrt_v((int8x8_t)__p0, 10); | 56376 | __ret = (float64x1_t) __builtin_neon_vsqrt_v((int8x8_t)__p0, 10); |
| 66526 | return __ret; | 56377 | return __ret; |
| 66527 | } | 56378 | } |
| 66528 | #endif | | |
| 66529 | | | |
| 66530 | #ifdef __LITTLE_ENDIAN__ | 56379 | #ifdef __LITTLE_ENDIAN__ |
| 66531 | __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | 56380 | __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66532 | float32x2_t __ret; | 56381 | float32x2_t __ret; |
| ... | @@ -66543,7 +56392,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66543,7 +56392,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66543 | } | 56392 | } |
| 66544 | #endif | 56393 | #endif |
| 66545 | | 56394 | |
| 66546 | #ifdef __LITTLE_ENDIAN__ | | |
| 66547 | #define vsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ | 56395 | #define vsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 66548 | uint64_t __s0 = __p0; \ | 56396 | uint64_t __s0 = __p0; \ |
| 66549 | uint64_t __s1 = __p1; \ | 56397 | uint64_t __s1 = __p1; \ |
| ... | @@ -66551,25 +56399,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66551,25 +56399,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66551 | __ret = (uint64_t) __builtin_neon_vsrad_n_u64(__s0, __s1, __p2); \ | 56399 | __ret = (uint64_t) __builtin_neon_vsrad_n_u64(__s0, __s1, __p2); \ |
| 66552 | __ret; \ | 56400 | __ret; \ |
| 66553 | }) | 56401 | }) |
| 66554 | #else | | |
| 66555 | #define vsrad_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66556 | uint64_t __s0 = __p0; \ | | |
| 66557 | uint64_t __s1 = __p1; \ | | |
| 66558 | uint64_t __ret; \ | | |
| 66559 | __ret = (uint64_t) __builtin_neon_vsrad_n_u64(__s0, __s1, __p2); \ | | |
| 66560 | __ret; \ | | |
| 66561 | }) | | |
| 66562 | #endif | | |
| 66563 | | | |
| 66564 | #ifdef __LITTLE_ENDIAN__ | | |
| 66565 | #define vsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66566 | int64_t __s0 = __p0; \ | | |
| 66567 | int64_t __s1 = __p1; \ | | |
| 66568 | int64_t __ret; \ | | |
| 66569 | __ret = (int64_t) __builtin_neon_vsrad_n_s64(__s0, __s1, __p2); \ | | |
| 66570 | __ret; \ | | |
| 66571 | }) | | |
| 66572 | #else | | |
| 66573 | #define vsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ | 56402 | #define vsrad_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 66574 | int64_t __s0 = __p0; \ | 56403 | int64_t __s0 = __p0; \ |
| 66575 | int64_t __s1 = __p1; \ | 56404 | int64_t __s1 = __p1; \ |
| ... | @@ -66577,17 +56406,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66577,17 +56406,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66577 | __ret = (int64_t) __builtin_neon_vsrad_n_s64(__s0, __s1, __p2); \ | 56406 | __ret = (int64_t) __builtin_neon_vsrad_n_s64(__s0, __s1, __p2); \ |
| 66578 | __ret; \ | 56407 | __ret; \ |
| 66579 | }) | 56408 | }) |
| 66580 | #endif | | |
| 66581 | | | |
| 66582 | #ifdef __LITTLE_ENDIAN__ | | |
| 66583 | #define vsrid_n_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66584 | uint64_t __s0 = __p0; \ | | |
| 66585 | uint64_t __s1 = __p1; \ | | |
| 66586 | uint64_t __ret; \ | | |
| 66587 | __ret = (uint64_t) __builtin_neon_vsrid_n_u64(__s0, __s1, __p2); \ | | |
| 66588 | __ret; \ | | |
| 66589 | }) | | |
| 66590 | #else | | |
| 66591 | #define vsrid_n_u64(__p0, __p1, __p2) __extension__ ({ \ | 56409 | #define vsrid_n_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 66592 | uint64_t __s0 = __p0; \ | 56410 | uint64_t __s0 = __p0; \ |
| 66593 | uint64_t __s1 = __p1; \ | 56411 | uint64_t __s1 = __p1; \ |
| ... | @@ -66595,17 +56413,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66595,17 +56413,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66595 | __ret = (uint64_t) __builtin_neon_vsrid_n_u64(__s0, __s1, __p2); \ | 56413 | __ret = (uint64_t) __builtin_neon_vsrid_n_u64(__s0, __s1, __p2); \ |
| 66596 | __ret; \ | 56414 | __ret; \ |
| 66597 | }) | 56415 | }) |
| 66598 | #endif | | |
| 66599 | | | |
| 66600 | #ifdef __LITTLE_ENDIAN__ | | |
| 66601 | #define vsrid_n_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66602 | int64_t __s0 = __p0; \ | | |
| 66603 | int64_t __s1 = __p1; \ | | |
| 66604 | int64_t __ret; \ | | |
| 66605 | __ret = (int64_t) __builtin_neon_vsrid_n_s64(__s0, __s1, __p2); \ | | |
| 66606 | __ret; \ | | |
| 66607 | }) | | |
| 66608 | #else | | |
| 66609 | #define vsrid_n_s64(__p0, __p1, __p2) __extension__ ({ \ | 56416 | #define vsrid_n_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 66610 | int64_t __s0 = __p0; \ | 56417 | int64_t __s0 = __p0; \ |
| 66611 | int64_t __s1 = __p1; \ | 56418 | int64_t __s1 = __p1; \ |
| ... | @@ -66613,17 +56420,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66613,17 +56420,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66613 | __ret = (int64_t) __builtin_neon_vsrid_n_s64(__s0, __s1, __p2); \ | 56420 | __ret = (int64_t) __builtin_neon_vsrid_n_s64(__s0, __s1, __p2); \ |
| 66614 | __ret; \ | 56421 | __ret; \ |
| 66615 | }) | 56422 | }) |
| 66616 | #endif | | |
| 66617 | | | |
| 66618 | #ifdef __LITTLE_ENDIAN__ | | |
| 66619 | #define vsri_n_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66620 | poly64x1_t __s0 = __p0; \ | | |
| 66621 | poly64x1_t __s1 = __p1; \ | | |
| 66622 | poly64x1_t __ret; \ | | |
| 66623 | __ret = (poly64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | | |
| 66624 | __ret; \ | | |
| 66625 | }) | | |
| 66626 | #else | | |
| 66627 | #define vsri_n_p64(__p0, __p1, __p2) __extension__ ({ \ | 56423 | #define vsri_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 66628 | poly64x1_t __s0 = __p0; \ | 56424 | poly64x1_t __s0 = __p0; \ |
| 66629 | poly64x1_t __s1 = __p1; \ | 56425 | poly64x1_t __s1 = __p1; \ |
| ... | @@ -66631,8 +56427,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66631,8 +56427,6 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66631 | __ret = (poly64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ | 56427 | __ret = (poly64x1_t) __builtin_neon_vsri_n_v((int8x8_t)__s0, (int8x8_t)__s1, __p2, 6); \ |
| 66632 | __ret; \ | 56428 | __ret; \ |
| 66633 | }) | 56429 | }) |
| 66634 | #endif | | |
| 66635 | | | |
| 66636 | #ifdef __LITTLE_ENDIAN__ | 56430 | #ifdef __LITTLE_ENDIAN__ |
| 66637 | #define vsriq_n_p64(__p0, __p1, __p2) __extension__ ({ \ | 56431 | #define vsriq_n_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 66638 | poly64x2_t __s0 = __p0; \ | 56432 | poly64x2_t __s0 = __p0; \ |
| ... | @@ -66654,18 +56448,10 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66654,18 +56448,10 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66654 | }) | 56448 | }) |
| 66655 | #endif | 56449 | #endif |
| 66656 | | 56450 | |
| 66657 | #ifdef __LITTLE_ENDIAN__ | | |
| 66658 | #define vst1_p64(__p0, __p1) __extension__ ({ \ | | |
| 66659 | poly64x1_t __s1 = __p1; \ | | |
| 66660 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 6); \ | | |
| 66661 | }) | | |
| 66662 | #else | | |
| 66663 | #define vst1_p64(__p0, __p1) __extension__ ({ \ | 56451 | #define vst1_p64(__p0, __p1) __extension__ ({ \ |
| 66664 | poly64x1_t __s1 = __p1; \ | 56452 | poly64x1_t __s1 = __p1; \ |
| 66665 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 6); \ | 56453 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 6); \ |
| 66666 | }) | 56454 | }) |
| 66667 | #endif | | |
| 66668 | | | |
| 66669 | #ifdef __LITTLE_ENDIAN__ | 56455 | #ifdef __LITTLE_ENDIAN__ |
| 66670 | #define vst1q_p64(__p0, __p1) __extension__ ({ \ | 56456 | #define vst1q_p64(__p0, __p1) __extension__ ({ \ |
| 66671 | poly64x2_t __s1 = __p1; \ | 56457 | poly64x2_t __s1 = __p1; \ |
| ... | @@ -66692,30 +56478,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66692,30 +56478,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66692 | }) | 56478 | }) |
| 66693 | #endif | 56479 | #endif |
| 66694 | | 56480 | |
| 66695 | #ifdef __LITTLE_ENDIAN__ | | |
| 66696 | #define vst1_f64(__p0, __p1) __extension__ ({ \ | | |
| 66697 | float64x1_t __s1 = __p1; \ | | |
| 66698 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 10); \ | | |
| 66699 | }) | | |
| 66700 | #else | | |
| 66701 | #define vst1_f64(__p0, __p1) __extension__ ({ \ | 56481 | #define vst1_f64(__p0, __p1) __extension__ ({ \ |
| 66702 | float64x1_t __s1 = __p1; \ | 56482 | float64x1_t __s1 = __p1; \ |
| 66703 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 10); \ | 56483 | __builtin_neon_vst1_v(__p0, (int8x8_t)__s1, 10); \ |
| 66704 | }) | 56484 | }) |
| 66705 | #endif | | |
| 66706 | | | |
| 66707 | #ifdef __LITTLE_ENDIAN__ | | |
| 66708 | #define vst1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66709 | poly64x1_t __s1 = __p1; \ | | |
| 66710 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ | | |
| 66711 | }) | | |
| 66712 | #else | | |
| 66713 | #define vst1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 56485 | #define vst1_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 66714 | poly64x1_t __s1 = __p1; \ | 56486 | poly64x1_t __s1 = __p1; \ |
| 66715 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ | 56487 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 6); \ |
| 66716 | }) | 56488 | }) |
| 66717 | #endif | | |
| 66718 | | | |
| 66719 | #ifdef __LITTLE_ENDIAN__ | 56489 | #ifdef __LITTLE_ENDIAN__ |
| 66720 | #define vst1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 56490 | #define vst1q_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 66721 | poly64x2_t __s1 = __p1; \ | 56491 | poly64x2_t __s1 = __p1; \ |
| ... | @@ -66742,30 +56512,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66742,30 +56512,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66742 | }) | 56512 | }) |
| 66743 | #endif | 56513 | #endif |
| 66744 | | 56514 | |
| 66745 | #ifdef __LITTLE_ENDIAN__ | | |
| 66746 | #define vst1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 66747 | float64x1_t __s1 = __p1; \ | | |
| 66748 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ | | |
| 66749 | }) | | |
| 66750 | #else | | |
| 66751 | #define vst1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56515 | #define vst1_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 66752 | float64x1_t __s1 = __p1; \ | 56516 | float64x1_t __s1 = __p1; \ |
| 66753 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ | 56517 | __builtin_neon_vst1_lane_v(__p0, (int8x8_t)__s1, __p2, 10); \ |
| 66754 | }) | 56518 | }) |
| 66755 | #endif | | |
| 66756 | | | |
| 66757 | #ifdef __LITTLE_ENDIAN__ | | |
| 66758 | #define vst1_p64_x2(__p0, __p1) __extension__ ({ \ | | |
| 66759 | poly64x1x2_t __s1 = __p1; \ | | |
| 66760 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ | | |
| 66761 | }) | | |
| 66762 | #else | | |
| 66763 | #define vst1_p64_x2(__p0, __p1) __extension__ ({ \ | 56519 | #define vst1_p64_x2(__p0, __p1) __extension__ ({ \ |
| 66764 | poly64x1x2_t __s1 = __p1; \ | 56520 | poly64x1x2_t __s1 = __p1; \ |
| 66765 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ | 56521 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ |
| 66766 | }) | 56522 | }) |
| 66767 | #endif | | |
| 66768 | | | |
| 66769 | #ifdef __LITTLE_ENDIAN__ | 56523 | #ifdef __LITTLE_ENDIAN__ |
| 66770 | #define vst1q_p64_x2(__p0, __p1) __extension__ ({ \ | 56524 | #define vst1q_p64_x2(__p0, __p1) __extension__ ({ \ |
| 66771 | poly64x2x2_t __s1 = __p1; \ | 56525 | poly64x2x2_t __s1 = __p1; \ |
| ... | @@ -66784,7 +56538,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66784,7 +56538,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66784 | #ifdef __LITTLE_ENDIAN__ | 56538 | #ifdef __LITTLE_ENDIAN__ |
| 66785 | #define vst1q_f64_x2(__p0, __p1) __extension__ ({ \ | 56539 | #define vst1q_f64_x2(__p0, __p1) __extension__ ({ \ |
| 66786 | float64x2x2_t __s1 = __p1; \ | 56540 | float64x2x2_t __s1 = __p1; \ |
| 66787 | __builtin_neon_vst1q_x2_v(__p0, __s1.val[0], __s1.val[1], 42); \ | 56541 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 42); \ |
| 66788 | }) | 56542 | }) |
| 66789 | #else | 56543 | #else |
| 66790 | #define vst1q_f64_x2(__p0, __p1) __extension__ ({ \ | 56544 | #define vst1q_f64_x2(__p0, __p1) __extension__ ({ \ |
| ... | @@ -66792,34 +56546,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66792,34 +56546,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66792 | float64x2x2_t __rev1; \ | 56546 | float64x2x2_t __rev1; \ |
| 66793 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56547 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 66794 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56548 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 66795 | __builtin_neon_vst1q_x2_v(__p0, __rev1.val[0], __rev1.val[1], 42); \ | 56549 | __builtin_neon_vst1q_x2_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 42); \ |
| 66796 | }) | 56550 | }) |
| 66797 | #endif | 56551 | #endif |
| 66798 | | 56552 | |
| 66799 | #ifdef __LITTLE_ENDIAN__ | | |
| 66800 | #define vst1_f64_x2(__p0, __p1) __extension__ ({ \ | 56553 | #define vst1_f64_x2(__p0, __p1) __extension__ ({ \ |
| 66801 | float64x1x2_t __s1 = __p1; \ | 56554 | float64x1x2_t __s1 = __p1; \ |
| 66802 | __builtin_neon_vst1_x2_v(__p0, __s1.val[0], __s1.val[1], 10); \ | 56555 | __builtin_neon_vst1_x2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 10); \ |
| 66803 | }) | | |
| 66804 | #else | | |
| 66805 | #define vst1_f64_x2(__p0, __p1) __extension__ ({ \ | | |
| 66806 | float64x1x2_t __s1 = __p1; \ | | |
| 66807 | __builtin_neon_vst1_x2_v(__p0, __s1.val[0], __s1.val[1], 10); \ | | |
| 66808 | }) | | |
| 66809 | #endif | | |
| 66810 | | | |
| 66811 | #ifdef __LITTLE_ENDIAN__ | | |
| 66812 | #define vst1_p64_x3(__p0, __p1) __extension__ ({ \ | | |
| 66813 | poly64x1x3_t __s1 = __p1; \ | | |
| 66814 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ | | |
| 66815 | }) | 56556 | }) |
| 66816 | #else | | |
| 66817 | #define vst1_p64_x3(__p0, __p1) __extension__ ({ \ | 56557 | #define vst1_p64_x3(__p0, __p1) __extension__ ({ \ |
| 66818 | poly64x1x3_t __s1 = __p1; \ | 56558 | poly64x1x3_t __s1 = __p1; \ |
| 66819 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ | 56559 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ |
| 66820 | }) | 56560 | }) |
| 66821 | #endif | | |
| 66822 | | | |
| 66823 | #ifdef __LITTLE_ENDIAN__ | 56561 | #ifdef __LITTLE_ENDIAN__ |
| 66824 | #define vst1q_p64_x3(__p0, __p1) __extension__ ({ \ | 56562 | #define vst1q_p64_x3(__p0, __p1) __extension__ ({ \ |
| 66825 | poly64x2x3_t __s1 = __p1; \ | 56563 | poly64x2x3_t __s1 = __p1; \ |
| ... | @@ -66839,7 +56577,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66839,7 +56577,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66839 | #ifdef __LITTLE_ENDIAN__ | 56577 | #ifdef __LITTLE_ENDIAN__ |
| 66840 | #define vst1q_f64_x3(__p0, __p1) __extension__ ({ \ | 56578 | #define vst1q_f64_x3(__p0, __p1) __extension__ ({ \ |
| 66841 | float64x2x3_t __s1 = __p1; \ | 56579 | float64x2x3_t __s1 = __p1; \ |
| 66842 | __builtin_neon_vst1q_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 42); \ | 56580 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 42); \ |
| 66843 | }) | 56581 | }) |
| 66844 | #else | 56582 | #else |
| 66845 | #define vst1q_f64_x3(__p0, __p1) __extension__ ({ \ | 56583 | #define vst1q_f64_x3(__p0, __p1) __extension__ ({ \ |
| ... | @@ -66848,34 +56586,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66848,34 +56586,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66848 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56586 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 66849 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56587 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 66850 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56588 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 66851 | __builtin_neon_vst1q_x3_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 42); \ | 56589 | __builtin_neon_vst1q_x3_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 42); \ |
| 66852 | }) | 56590 | }) |
| 66853 | #endif | 56591 | #endif |
| 66854 | | 56592 | |
| 66855 | #ifdef __LITTLE_ENDIAN__ | | |
| 66856 | #define vst1_f64_x3(__p0, __p1) __extension__ ({ \ | 56593 | #define vst1_f64_x3(__p0, __p1) __extension__ ({ \ |
| 66857 | float64x1x3_t __s1 = __p1; \ | 56594 | float64x1x3_t __s1 = __p1; \ |
| 66858 | __builtin_neon_vst1_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 10); \ | 56595 | __builtin_neon_vst1_x3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 10); \ |
| 66859 | }) | 56596 | }) |
| 66860 | #else | | |
| 66861 | #define vst1_f64_x3(__p0, __p1) __extension__ ({ \ | | |
| 66862 | float64x1x3_t __s1 = __p1; \ | | |
| 66863 | __builtin_neon_vst1_x3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 10); \ | | |
| 66864 | }) | | |
| 66865 | #endif | | |
| 66866 | | | |
| 66867 | #ifdef __LITTLE_ENDIAN__ | | |
| 66868 | #define vst1_p64_x4(__p0, __p1) __extension__ ({ \ | | |
| 66869 | poly64x1x4_t __s1 = __p1; \ | | |
| 66870 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ | | |
| 66871 | }) | | |
| 66872 | #else | | |
| 66873 | #define vst1_p64_x4(__p0, __p1) __extension__ ({ \ | 56597 | #define vst1_p64_x4(__p0, __p1) __extension__ ({ \ |
| 66874 | poly64x1x4_t __s1 = __p1; \ | 56598 | poly64x1x4_t __s1 = __p1; \ |
| 66875 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ | 56599 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ |
| 66876 | }) | 56600 | }) |
| 66877 | #endif | | |
| 66878 | | | |
| 66879 | #ifdef __LITTLE_ENDIAN__ | 56601 | #ifdef __LITTLE_ENDIAN__ |
| 66880 | #define vst1q_p64_x4(__p0, __p1) __extension__ ({ \ | 56602 | #define vst1q_p64_x4(__p0, __p1) __extension__ ({ \ |
| 66881 | poly64x2x4_t __s1 = __p1; \ | 56603 | poly64x2x4_t __s1 = __p1; \ |
| ... | @@ -66896,7 +56618,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66896,7 +56618,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66896 | #ifdef __LITTLE_ENDIAN__ | 56618 | #ifdef __LITTLE_ENDIAN__ |
| 66897 | #define vst1q_f64_x4(__p0, __p1) __extension__ ({ \ | 56619 | #define vst1q_f64_x4(__p0, __p1) __extension__ ({ \ |
| 66898 | float64x2x4_t __s1 = __p1; \ | 56620 | float64x2x4_t __s1 = __p1; \ |
| 66899 | __builtin_neon_vst1q_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 42); \ | 56621 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 42); \ |
| 66900 | }) | 56622 | }) |
| 66901 | #else | 56623 | #else |
| 66902 | #define vst1q_f64_x4(__p0, __p1) __extension__ ({ \ | 56624 | #define vst1q_f64_x4(__p0, __p1) __extension__ ({ \ |
| ... | @@ -66906,34 +56628,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66906,34 +56628,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66906 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56628 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 66907 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56629 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 66908 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 56630 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 66909 | __builtin_neon_vst1q_x4_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 42); \ | 56631 | __builtin_neon_vst1q_x4_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 42); \ |
| 66910 | }) | 56632 | }) |
| 66911 | #endif | 56633 | #endif |
| 66912 | | 56634 | |
| 66913 | #ifdef __LITTLE_ENDIAN__ | | |
| 66914 | #define vst1_f64_x4(__p0, __p1) __extension__ ({ \ | 56635 | #define vst1_f64_x4(__p0, __p1) __extension__ ({ \ |
| 66915 | float64x1x4_t __s1 = __p1; \ | 56636 | float64x1x4_t __s1 = __p1; \ |
| 66916 | __builtin_neon_vst1_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 10); \ | 56637 | __builtin_neon_vst1_x4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 10); \ |
| 66917 | }) | | |
| 66918 | #else | | |
| 66919 | #define vst1_f64_x4(__p0, __p1) __extension__ ({ \ | | |
| 66920 | float64x1x4_t __s1 = __p1; \ | | |
| 66921 | __builtin_neon_vst1_x4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 10); \ | | |
| 66922 | }) | | |
| 66923 | #endif | | |
| 66924 | | | |
| 66925 | #ifdef __LITTLE_ENDIAN__ | | |
| 66926 | #define vst2_p64(__p0, __p1) __extension__ ({ \ | | |
| 66927 | poly64x1x2_t __s1 = __p1; \ | | |
| 66928 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ | | |
| 66929 | }) | 56638 | }) |
| 66930 | #else | | |
| 66931 | #define vst2_p64(__p0, __p1) __extension__ ({ \ | 56639 | #define vst2_p64(__p0, __p1) __extension__ ({ \ |
| 66932 | poly64x1x2_t __s1 = __p1; \ | 56640 | poly64x1x2_t __s1 = __p1; \ |
| 66933 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ | 56641 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 6); \ |
| 66934 | }) | 56642 | }) |
| 66935 | #endif | | |
| 66936 | | | |
| 66937 | #ifdef __LITTLE_ENDIAN__ | 56643 | #ifdef __LITTLE_ENDIAN__ |
| 66938 | #define vst2q_p64(__p0, __p1) __extension__ ({ \ | 56644 | #define vst2q_p64(__p0, __p1) __extension__ ({ \ |
| 66939 | poly64x2x2_t __s1 = __p1; \ | 56645 | poly64x2x2_t __s1 = __p1; \ |
| ... | @@ -66967,7 +56673,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66967,7 +56673,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66967 | #ifdef __LITTLE_ENDIAN__ | 56673 | #ifdef __LITTLE_ENDIAN__ |
| 66968 | #define vst2q_f64(__p0, __p1) __extension__ ({ \ | 56674 | #define vst2q_f64(__p0, __p1) __extension__ ({ \ |
| 66969 | float64x2x2_t __s1 = __p1; \ | 56675 | float64x2x2_t __s1 = __p1; \ |
| 66970 | __builtin_neon_vst2q_v(__p0, __s1.val[0], __s1.val[1], 42); \ | 56676 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 42); \ |
| 66971 | }) | 56677 | }) |
| 66972 | #else | 56678 | #else |
| 66973 | #define vst2q_f64(__p0, __p1) __extension__ ({ \ | 56679 | #define vst2q_f64(__p0, __p1) __extension__ ({ \ |
| ... | @@ -66975,14 +56681,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66975,14 +56681,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66975 | float64x2x2_t __rev1; \ | 56681 | float64x2x2_t __rev1; \ |
| 66976 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56682 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 66977 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56683 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 66978 | __builtin_neon_vst2q_v(__p0, __rev1.val[0], __rev1.val[1], 42); \ | 56684 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 42); \ |
| 66979 | }) | 56685 | }) |
| 66980 | #endif | 56686 | #endif |
| 66981 | | 56687 | |
| 66982 | #ifdef __LITTLE_ENDIAN__ | 56688 | #ifdef __LITTLE_ENDIAN__ |
| 66983 | #define vst2q_s64(__p0, __p1) __extension__ ({ \ | 56689 | #define vst2q_s64(__p0, __p1) __extension__ ({ \ |
| 66984 | int64x2x2_t __s1 = __p1; \ | 56690 | int64x2x2_t __s1 = __p1; \ |
| 66985 | __builtin_neon_vst2q_v(__p0, __s1.val[0], __s1.val[1], 35); \ | 56691 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], 35); \ |
| 66986 | }) | 56692 | }) |
| 66987 | #else | 56693 | #else |
| 66988 | #define vst2q_s64(__p0, __p1) __extension__ ({ \ | 56694 | #define vst2q_s64(__p0, __p1) __extension__ ({ \ |
| ... | @@ -66990,34 +56696,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -66990,34 +56696,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 66990 | int64x2x2_t __rev1; \ | 56696 | int64x2x2_t __rev1; \ |
| 66991 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56697 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 66992 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56698 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 66993 | __builtin_neon_vst2q_v(__p0, __rev1.val[0], __rev1.val[1], 35); \ | 56699 | __builtin_neon_vst2q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], 35); \ |
| 66994 | }) | 56700 | }) |
| 66995 | #endif | 56701 | #endif |
| 66996 | | 56702 | |
| 66997 | #ifdef __LITTLE_ENDIAN__ | | |
| 66998 | #define vst2_f64(__p0, __p1) __extension__ ({ \ | 56703 | #define vst2_f64(__p0, __p1) __extension__ ({ \ |
| 66999 | float64x1x2_t __s1 = __p1; \ | 56704 | float64x1x2_t __s1 = __p1; \ |
| 67000 | __builtin_neon_vst2_v(__p0, __s1.val[0], __s1.val[1], 10); \ | 56705 | __builtin_neon_vst2_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], 10); \ |
| 67001 | }) | | |
| 67002 | #else | | |
| 67003 | #define vst2_f64(__p0, __p1) __extension__ ({ \ | | |
| 67004 | float64x1x2_t __s1 = __p1; \ | | |
| 67005 | __builtin_neon_vst2_v(__p0, __s1.val[0], __s1.val[1], 10); \ | | |
| 67006 | }) | | |
| 67007 | #endif | | |
| 67008 | | | |
| 67009 | #ifdef __LITTLE_ENDIAN__ | | |
| 67010 | #define vst2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67011 | poly64x1x2_t __s1 = __p1; \ | | |
| 67012 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ | | |
| 67013 | }) | 56706 | }) |
| 67014 | #else | | |
| 67015 | #define vst2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 56707 | #define vst2_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 67016 | poly64x1x2_t __s1 = __p1; \ | 56708 | poly64x1x2_t __s1 = __p1; \ |
| 67017 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ | 56709 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 6); \ |
| 67018 | }) | 56710 | }) |
| 67019 | #endif | | |
| 67020 | | | |
| 67021 | #ifdef __LITTLE_ENDIAN__ | 56711 | #ifdef __LITTLE_ENDIAN__ |
| 67022 | #define vst2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 56712 | #define vst2q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 67023 | poly8x16x2_t __s1 = __p1; \ | 56713 | poly8x16x2_t __s1 = __p1; \ |
| ... | @@ -67096,7 +56786,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67096,7 +56786,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67096 | #ifdef __LITTLE_ENDIAN__ | 56786 | #ifdef __LITTLE_ENDIAN__ |
| 67097 | #define vst2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56787 | #define vst2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 67098 | float64x2x2_t __s1 = __p1; \ | 56788 | float64x2x2_t __s1 = __p1; \ |
| 67099 | __builtin_neon_vst2q_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 42); \ | 56789 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 42); \ |
| 67100 | }) | 56790 | }) |
| 67101 | #else | 56791 | #else |
| 67102 | #define vst2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56792 | #define vst2q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -67104,14 +56794,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67104,14 +56794,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67104 | float64x2x2_t __rev1; \ | 56794 | float64x2x2_t __rev1; \ |
| 67105 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56795 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 67106 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56796 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67107 | __builtin_neon_vst2q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 42); \ | 56797 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 42); \ |
| 67108 | }) | 56798 | }) |
| 67109 | #endif | 56799 | #endif |
| 67110 | | 56800 | |
| 67111 | #ifdef __LITTLE_ENDIAN__ | 56801 | #ifdef __LITTLE_ENDIAN__ |
| 67112 | #define vst2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 56802 | #define vst2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 67113 | int64x2x2_t __s1 = __p1; \ | 56803 | int64x2x2_t __s1 = __p1; \ |
| 67114 | __builtin_neon_vst2q_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 35); \ | 56804 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], __p2, 35); \ |
| 67115 | }) | 56805 | }) |
| 67116 | #else | 56806 | #else |
| 67117 | #define vst2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 56807 | #define vst2q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -67119,58 +56809,26 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67119,58 +56809,26 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67119 | int64x2x2_t __rev1; \ | 56809 | int64x2x2_t __rev1; \ |
| 67120 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56810 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 67121 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56811 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67122 | __builtin_neon_vst2q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __p2, 35); \ | 56812 | __builtin_neon_vst2q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], __p2, 35); \ |
| 67123 | }) | 56813 | }) |
| 67124 | #endif | 56814 | #endif |
| 67125 | | 56815 | |
| 67126 | #ifdef __LITTLE_ENDIAN__ | | |
| 67127 | #define vst2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67128 | uint64x1x2_t __s1 = __p1; \ | | |
| 67129 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ | | |
| 67130 | }) | | |
| 67131 | #else | | |
| 67132 | #define vst2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 56816 | #define vst2_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 67133 | uint64x1x2_t __s1 = __p1; \ | 56817 | uint64x1x2_t __s1 = __p1; \ |
| 67134 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ | 56818 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 19); \ |
| 67135 | }) | 56819 | }) |
| 67136 | #endif | | |
| 67137 | | | |
| 67138 | #ifdef __LITTLE_ENDIAN__ | | |
| 67139 | #define vst2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67140 | float64x1x2_t __s1 = __p1; \ | | |
| 67141 | __builtin_neon_vst2_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 10); \ | | |
| 67142 | }) | | |
| 67143 | #else | | |
| 67144 | #define vst2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56820 | #define vst2_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 67145 | float64x1x2_t __s1 = __p1; \ | 56821 | float64x1x2_t __s1 = __p1; \ |
| 67146 | __builtin_neon_vst2_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 10); \ | 56822 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 10); \ |
| 67147 | }) | | |
| 67148 | #endif | | |
| 67149 | | | |
| 67150 | #ifdef __LITTLE_ENDIAN__ | | |
| 67151 | #define vst2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67152 | int64x1x2_t __s1 = __p1; \ | | |
| 67153 | __builtin_neon_vst2_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 3); \ | | |
| 67154 | }) | 56823 | }) |
| 67155 | #else | | |
| 67156 | #define vst2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 56824 | #define vst2_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 67157 | int64x1x2_t __s1 = __p1; \ | 56825 | int64x1x2_t __s1 = __p1; \ |
| 67158 | __builtin_neon_vst2_lane_v(__p0, __s1.val[0], __s1.val[1], __p2, 3); \ | 56826 | __builtin_neon_vst2_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], __p2, 3); \ |
| 67159 | }) | | |
| 67160 | #endif | | |
| 67161 | | | |
| 67162 | #ifdef __LITTLE_ENDIAN__ | | |
| 67163 | #define vst3_p64(__p0, __p1) __extension__ ({ \ | | |
| 67164 | poly64x1x3_t __s1 = __p1; \ | | |
| 67165 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ | | |
| 67166 | }) | 56827 | }) |
| 67167 | #else | | |
| 67168 | #define vst3_p64(__p0, __p1) __extension__ ({ \ | 56828 | #define vst3_p64(__p0, __p1) __extension__ ({ \ |
| 67169 | poly64x1x3_t __s1 = __p1; \ | 56829 | poly64x1x3_t __s1 = __p1; \ |
| 67170 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ | 56830 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 6); \ |
| 67171 | }) | 56831 | }) |
| 67172 | #endif | | |
| 67173 | | | |
| 67174 | #ifdef __LITTLE_ENDIAN__ | 56832 | #ifdef __LITTLE_ENDIAN__ |
| 67175 | #define vst3q_p64(__p0, __p1) __extension__ ({ \ | 56833 | #define vst3q_p64(__p0, __p1) __extension__ ({ \ |
| 67176 | poly64x2x3_t __s1 = __p1; \ | 56834 | poly64x2x3_t __s1 = __p1; \ |
| ... | @@ -67206,7 +56864,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67206,7 +56864,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67206 | #ifdef __LITTLE_ENDIAN__ | 56864 | #ifdef __LITTLE_ENDIAN__ |
| 67207 | #define vst3q_f64(__p0, __p1) __extension__ ({ \ | 56865 | #define vst3q_f64(__p0, __p1) __extension__ ({ \ |
| 67208 | float64x2x3_t __s1 = __p1; \ | 56866 | float64x2x3_t __s1 = __p1; \ |
| 67209 | __builtin_neon_vst3q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 42); \ | 56867 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 42); \ |
| 67210 | }) | 56868 | }) |
| 67211 | #else | 56869 | #else |
| 67212 | #define vst3q_f64(__p0, __p1) __extension__ ({ \ | 56870 | #define vst3q_f64(__p0, __p1) __extension__ ({ \ |
| ... | @@ -67215,14 +56873,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67215,14 +56873,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67215 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56873 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 67216 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56874 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67217 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56875 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 67218 | __builtin_neon_vst3q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 42); \ | 56876 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 42); \ |
| 67219 | }) | 56877 | }) |
| 67220 | #endif | 56878 | #endif |
| 67221 | | 56879 | |
| 67222 | #ifdef __LITTLE_ENDIAN__ | 56880 | #ifdef __LITTLE_ENDIAN__ |
| 67223 | #define vst3q_s64(__p0, __p1) __extension__ ({ \ | 56881 | #define vst3q_s64(__p0, __p1) __extension__ ({ \ |
| 67224 | int64x2x3_t __s1 = __p1; \ | 56882 | int64x2x3_t __s1 = __p1; \ |
| 67225 | __builtin_neon_vst3q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 35); \ | 56883 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], 35); \ |
| 67226 | }) | 56884 | }) |
| 67227 | #else | 56885 | #else |
| 67228 | #define vst3q_s64(__p0, __p1) __extension__ ({ \ | 56886 | #define vst3q_s64(__p0, __p1) __extension__ ({ \ |
| ... | @@ -67231,34 +56889,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67231,34 +56889,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67231 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56889 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 67232 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56890 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67233 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56891 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 67234 | __builtin_neon_vst3q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], 35); \ | 56892 | __builtin_neon_vst3q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], 35); \ |
| 67235 | }) | 56893 | }) |
| 67236 | #endif | 56894 | #endif |
| 67237 | | 56895 | |
| 67238 | #ifdef __LITTLE_ENDIAN__ | | |
| 67239 | #define vst3_f64(__p0, __p1) __extension__ ({ \ | 56896 | #define vst3_f64(__p0, __p1) __extension__ ({ \ |
| 67240 | float64x1x3_t __s1 = __p1; \ | 56897 | float64x1x3_t __s1 = __p1; \ |
| 67241 | __builtin_neon_vst3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 10); \ | 56898 | __builtin_neon_vst3_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], 10); \ |
| 67242 | }) | | |
| 67243 | #else | | |
| 67244 | #define vst3_f64(__p0, __p1) __extension__ ({ \ | | |
| 67245 | float64x1x3_t __s1 = __p1; \ | | |
| 67246 | __builtin_neon_vst3_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], 10); \ | | |
| 67247 | }) | | |
| 67248 | #endif | | |
| 67249 | | | |
| 67250 | #ifdef __LITTLE_ENDIAN__ | | |
| 67251 | #define vst3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67252 | poly64x1x3_t __s1 = __p1; \ | | |
| 67253 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ | | |
| 67254 | }) | 56899 | }) |
| 67255 | #else | | |
| 67256 | #define vst3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 56900 | #define vst3_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 67257 | poly64x1x3_t __s1 = __p1; \ | 56901 | poly64x1x3_t __s1 = __p1; \ |
| 67258 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ | 56902 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 6); \ |
| 67259 | }) | 56903 | }) |
| 67260 | #endif | | |
| 67261 | | | |
| 67262 | #ifdef __LITTLE_ENDIAN__ | 56904 | #ifdef __LITTLE_ENDIAN__ |
| 67263 | #define vst3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 56905 | #define vst3q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 67264 | poly8x16x3_t __s1 = __p1; \ | 56906 | poly8x16x3_t __s1 = __p1; \ |
| ... | @@ -67342,7 +56984,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67342,7 +56984,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67342 | #ifdef __LITTLE_ENDIAN__ | 56984 | #ifdef __LITTLE_ENDIAN__ |
| 67343 | #define vst3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56985 | #define vst3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 67344 | float64x2x3_t __s1 = __p1; \ | 56986 | float64x2x3_t __s1 = __p1; \ |
| 67345 | __builtin_neon_vst3q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 42); \ | 56987 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 42); \ |
| 67346 | }) | 56988 | }) |
| 67347 | #else | 56989 | #else |
| 67348 | #define vst3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 56990 | #define vst3q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -67351,14 +56993,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67351,14 +56993,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67351 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 56993 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 67352 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 56994 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67353 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 56995 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 67354 | __builtin_neon_vst3q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 42); \ | 56996 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 42); \ |
| 67355 | }) | 56997 | }) |
| 67356 | #endif | 56998 | #endif |
| 67357 | | 56999 | |
| 67358 | #ifdef __LITTLE_ENDIAN__ | 57000 | #ifdef __LITTLE_ENDIAN__ |
| 67359 | #define vst3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 57001 | #define vst3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 67360 | int64x2x3_t __s1 = __p1; \ | 57002 | int64x2x3_t __s1 = __p1; \ |
| 67361 | __builtin_neon_vst3q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 35); \ | 57003 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], __p2, 35); \ |
| 67362 | }) | 57004 | }) |
| 67363 | #else | 57005 | #else |
| 67364 | #define vst3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 57006 | #define vst3q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -67367,58 +57009,26 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67367,58 +57009,26 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67367 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ | 57009 | __rev1.val[0] = __builtin_shufflevector(__s1.val[0], __s1.val[0], 1, 0); \ |
| 67368 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 57010 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67369 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 57011 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 67370 | __builtin_neon_vst3q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __p2, 35); \ | 57012 | __builtin_neon_vst3q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], __p2, 35); \ |
| 67371 | }) | 57013 | }) |
| 67372 | #endif | 57014 | #endif |
| 67373 | | 57015 | |
| 67374 | #ifdef __LITTLE_ENDIAN__ | | |
| 67375 | #define vst3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 57016 | #define vst3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 67376 | uint64x1x3_t __s1 = __p1; \ | 57017 | uint64x1x3_t __s1 = __p1; \ |
| 67377 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ | 57018 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ |
| 67378 | }) | 57019 | }) |
| 67379 | #else | | |
| 67380 | #define vst3_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67381 | uint64x1x3_t __s1 = __p1; \ | | |
| 67382 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 19); \ | | |
| 67383 | }) | | |
| 67384 | #endif | | |
| 67385 | | | |
| 67386 | #ifdef __LITTLE_ENDIAN__ | | |
| 67387 | #define vst3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67388 | float64x1x3_t __s1 = __p1; \ | | |
| 67389 | __builtin_neon_vst3_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 10); \ | | |
| 67390 | }) | | |
| 67391 | #else | | |
| 67392 | #define vst3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 57020 | #define vst3_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 67393 | float64x1x3_t __s1 = __p1; \ | 57021 | float64x1x3_t __s1 = __p1; \ |
| 67394 | __builtin_neon_vst3_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 10); \ | 57022 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 10); \ |
| 67395 | }) | | |
| 67396 | #endif | | |
| 67397 | | | |
| 67398 | #ifdef __LITTLE_ENDIAN__ | | |
| 67399 | #define vst3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67400 | int64x1x3_t __s1 = __p1; \ | | |
| 67401 | __builtin_neon_vst3_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 3); \ | | |
| 67402 | }) | 57023 | }) |
| 67403 | #else | | |
| 67404 | #define vst3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 57024 | #define vst3_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 67405 | int64x1x3_t __s1 = __p1; \ | 57025 | int64x1x3_t __s1 = __p1; \ |
| 67406 | __builtin_neon_vst3_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __p2, 3); \ | 57026 | __builtin_neon_vst3_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], __p2, 3); \ |
| 67407 | }) | | |
| 67408 | #endif | | |
| 67409 | | | |
| 67410 | #ifdef __LITTLE_ENDIAN__ | | |
| 67411 | #define vst4_p64(__p0, __p1) __extension__ ({ \ | | |
| 67412 | poly64x1x4_t __s1 = __p1; \ | | |
| 67413 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ | | |
| 67414 | }) | 57027 | }) |
| 67415 | #else | | |
| 67416 | #define vst4_p64(__p0, __p1) __extension__ ({ \ | 57028 | #define vst4_p64(__p0, __p1) __extension__ ({ \ |
| 67417 | poly64x1x4_t __s1 = __p1; \ | 57029 | poly64x1x4_t __s1 = __p1; \ |
| 67418 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ | 57030 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 6); \ |
| 67419 | }) | 57031 | }) |
| 67420 | #endif | | |
| 67421 | | | |
| 67422 | #ifdef __LITTLE_ENDIAN__ | 57032 | #ifdef __LITTLE_ENDIAN__ |
| 67423 | #define vst4q_p64(__p0, __p1) __extension__ ({ \ | 57033 | #define vst4q_p64(__p0, __p1) __extension__ ({ \ |
| 67424 | poly64x2x4_t __s1 = __p1; \ | 57034 | poly64x2x4_t __s1 = __p1; \ |
| ... | @@ -67456,7 +57066,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67456,7 +57066,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67456 | #ifdef __LITTLE_ENDIAN__ | 57066 | #ifdef __LITTLE_ENDIAN__ |
| 67457 | #define vst4q_f64(__p0, __p1) __extension__ ({ \ | 57067 | #define vst4q_f64(__p0, __p1) __extension__ ({ \ |
| 67458 | float64x2x4_t __s1 = __p1; \ | 57068 | float64x2x4_t __s1 = __p1; \ |
| 67459 | __builtin_neon_vst4q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 42); \ | 57069 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 42); \ |
| 67460 | }) | 57070 | }) |
| 67461 | #else | 57071 | #else |
| 67462 | #define vst4q_f64(__p0, __p1) __extension__ ({ \ | 57072 | #define vst4q_f64(__p0, __p1) __extension__ ({ \ |
| ... | @@ -67466,14 +57076,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67466,14 +57076,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67466 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 57076 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67467 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 57077 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 67468 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 57078 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 67469 | __builtin_neon_vst4q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 42); \ | 57079 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 42); \ |
| 67470 | }) | 57080 | }) |
| 67471 | #endif | 57081 | #endif |
| 67472 | | 57082 | |
| 67473 | #ifdef __LITTLE_ENDIAN__ | 57083 | #ifdef __LITTLE_ENDIAN__ |
| 67474 | #define vst4q_s64(__p0, __p1) __extension__ ({ \ | 57084 | #define vst4q_s64(__p0, __p1) __extension__ ({ \ |
| 67475 | int64x2x4_t __s1 = __p1; \ | 57085 | int64x2x4_t __s1 = __p1; \ |
| 67476 | __builtin_neon_vst4q_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 35); \ | 57086 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], 35); \ |
| 67477 | }) | 57087 | }) |
| 67478 | #else | 57088 | #else |
| 67479 | #define vst4q_s64(__p0, __p1) __extension__ ({ \ | 57089 | #define vst4q_s64(__p0, __p1) __extension__ ({ \ |
| ... | @@ -67483,34 +57093,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67483,34 +57093,18 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67483 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 57093 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67484 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 57094 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 67485 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 57095 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 67486 | __builtin_neon_vst4q_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], 35); \ | 57096 | __builtin_neon_vst4q_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], 35); \ |
| 67487 | }) | 57097 | }) |
| 67488 | #endif | 57098 | #endif |
| 67489 | | 57099 | |
| 67490 | #ifdef __LITTLE_ENDIAN__ | | |
| 67491 | #define vst4_f64(__p0, __p1) __extension__ ({ \ | 57100 | #define vst4_f64(__p0, __p1) __extension__ ({ \ |
| 67492 | float64x1x4_t __s1 = __p1; \ | 57101 | float64x1x4_t __s1 = __p1; \ |
| 67493 | __builtin_neon_vst4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 10); \ | 57102 | __builtin_neon_vst4_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], 10); \ |
| 67494 | }) | 57103 | }) |
| 67495 | #else | | |
| 67496 | #define vst4_f64(__p0, __p1) __extension__ ({ \ | | |
| 67497 | float64x1x4_t __s1 = __p1; \ | | |
| 67498 | __builtin_neon_vst4_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], 10); \ | | |
| 67499 | }) | | |
| 67500 | #endif | | |
| 67501 | | | |
| 67502 | #ifdef __LITTLE_ENDIAN__ | | |
| 67503 | #define vst4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67504 | poly64x1x4_t __s1 = __p1; \ | | |
| 67505 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ | | |
| 67506 | }) | | |
| 67507 | #else | | |
| 67508 | #define vst4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ | 57104 | #define vst4_lane_p64(__p0, __p1, __p2) __extension__ ({ \ |
| 67509 | poly64x1x4_t __s1 = __p1; \ | 57105 | poly64x1x4_t __s1 = __p1; \ |
| 67510 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ | 57106 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 6); \ |
| 67511 | }) | 57107 | }) |
| 67512 | #endif | | |
| 67513 | | | |
| 67514 | #ifdef __LITTLE_ENDIAN__ | 57108 | #ifdef __LITTLE_ENDIAN__ |
| 67515 | #define vst4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ | 57109 | #define vst4q_lane_p8(__p0, __p1, __p2) __extension__ ({ \ |
| 67516 | poly8x16x4_t __s1 = __p1; \ | 57110 | poly8x16x4_t __s1 = __p1; \ |
| ... | @@ -67599,7 +57193,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67599,7 +57193,7 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67599 | #ifdef __LITTLE_ENDIAN__ | 57193 | #ifdef __LITTLE_ENDIAN__ |
| 67600 | #define vst4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 57194 | #define vst4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 67601 | float64x2x4_t __s1 = __p1; \ | 57195 | float64x2x4_t __s1 = __p1; \ |
| 67602 | __builtin_neon_vst4q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 42); \ | 57196 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 42); \ |
| 67603 | }) | 57197 | }) |
| 67604 | #else | 57198 | #else |
| 67605 | #define vst4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 57199 | #define vst4q_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -67609,14 +57203,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67609,14 +57203,14 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67609 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 57203 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67610 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 57204 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 67611 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 57205 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 67612 | __builtin_neon_vst4q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 42); \ | 57206 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 42); \ |
| 67613 | }) | 57207 | }) |
| 67614 | #endif | 57208 | #endif |
| 67615 | | 57209 | |
| 67616 | #ifdef __LITTLE_ENDIAN__ | 57210 | #ifdef __LITTLE_ENDIAN__ |
| 67617 | #define vst4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 57211 | #define vst4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 67618 | int64x2x4_t __s1 = __p1; \ | 57212 | int64x2x4_t __s1 = __p1; \ |
| 67619 | __builtin_neon_vst4q_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 35); \ | 57213 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__s1.val[0], (int8x16_t)__s1.val[1], (int8x16_t)__s1.val[2], (int8x16_t)__s1.val[3], __p2, 35); \ |
| 67620 | }) | 57214 | }) |
| 67621 | #else | 57215 | #else |
| 67622 | #define vst4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 57216 | #define vst4q_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| ... | @@ -67626,86 +57220,36 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { | ... | @@ -67626,86 +57220,36 @@ __ai float32x2_t vsqrt_f32(float32x2_t __p0) { |
| 67626 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ | 57220 | __rev1.val[1] = __builtin_shufflevector(__s1.val[1], __s1.val[1], 1, 0); \ |
| 67627 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ | 57221 | __rev1.val[2] = __builtin_shufflevector(__s1.val[2], __s1.val[2], 1, 0); \ |
| 67628 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ | 57222 | __rev1.val[3] = __builtin_shufflevector(__s1.val[3], __s1.val[3], 1, 0); \ |
| 67629 | __builtin_neon_vst4q_lane_v(__p0, __rev1.val[0], __rev1.val[1], __rev1.val[2], __rev1.val[3], __p2, 35); \ | 57223 | __builtin_neon_vst4q_lane_v(__p0, (int8x16_t)__rev1.val[0], (int8x16_t)__rev1.val[1], (int8x16_t)__rev1.val[2], (int8x16_t)__rev1.val[3], __p2, 35); \ |
| 67630 | }) | 57224 | }) |
| 67631 | #endif | 57225 | #endif |
| 67632 | | 57226 | |
| 67633 | #ifdef __LITTLE_ENDIAN__ | | |
| 67634 | #define vst4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67635 | uint64x1x4_t __s1 = __p1; \ | | |
| 67636 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ | | |
| 67637 | }) | | |
| 67638 | #else | | |
| 67639 | #define vst4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ | 57227 | #define vst4_lane_u64(__p0, __p1, __p2) __extension__ ({ \ |
| 67640 | uint64x1x4_t __s1 = __p1; \ | 57228 | uint64x1x4_t __s1 = __p1; \ |
| 67641 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ | 57229 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 19); \ |
| 67642 | }) | 57230 | }) |
| 67643 | #endif | | |
| 67644 | | | |
| 67645 | #ifdef __LITTLE_ENDIAN__ | | |
| 67646 | #define vst4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67647 | float64x1x4_t __s1 = __p1; \ | | |
| 67648 | __builtin_neon_vst4_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 10); \ | | |
| 67649 | }) | | |
| 67650 | #else | | |
| 67651 | #define vst4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ | 57231 | #define vst4_lane_f64(__p0, __p1, __p2) __extension__ ({ \ |
| 67652 | float64x1x4_t __s1 = __p1; \ | 57232 | float64x1x4_t __s1 = __p1; \ |
| 67653 | __builtin_neon_vst4_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 10); \ | 57233 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 10); \ |
| 67654 | }) | | |
| 67655 | #endif | | |
| 67656 | | | |
| 67657 | #ifdef __LITTLE_ENDIAN__ | | |
| 67658 | #define vst4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | | |
| 67659 | int64x1x4_t __s1 = __p1; \ | | |
| 67660 | __builtin_neon_vst4_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 3); \ | | |
| 67661 | }) | 57234 | }) |
| 67662 | #else | | |
| 67663 | #define vst4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ | 57235 | #define vst4_lane_s64(__p0, __p1, __p2) __extension__ ({ \ |
| 67664 | int64x1x4_t __s1 = __p1; \ | 57236 | int64x1x4_t __s1 = __p1; \ |
| 67665 | __builtin_neon_vst4_lane_v(__p0, __s1.val[0], __s1.val[1], __s1.val[2], __s1.val[3], __p2, 3); \ | 57237 | __builtin_neon_vst4_lane_v(__p0, (int8x8_t)__s1.val[0], (int8x8_t)__s1.val[1], (int8x8_t)__s1.val[2], (int8x8_t)__s1.val[3], __p2, 3); \ |
| 67666 | }) | | |
| 67667 | #endif | | |
| 67668 | | | |
| 67669 | #ifdef __LITTLE_ENDIAN__ | | |
| 67670 | #define vstrq_p128(__p0, __p1) __extension__ ({ \ | | |
| 67671 | poly128_t __s1 = __p1; \ | | |
| 67672 | __builtin_neon_vstrq_p128(__p0, __s1); \ | | |
| 67673 | }) | 57238 | }) |
| 67674 | #else | | |
| 67675 | #define vstrq_p128(__p0, __p1) __extension__ ({ \ | 57239 | #define vstrq_p128(__p0, __p1) __extension__ ({ \ |
| 67676 | poly128_t __s1 = __p1; \ | 57240 | poly128_t __s1 = __p1; \ |
| 67677 | __builtin_neon_vstrq_p128(__p0, __s1); \ | 57241 | __builtin_neon_vstrq_p128(__p0, __s1); \ |
| 67678 | }) | 57242 | }) |
| 67679 | #endif | | |
| 67680 | | | |
| 67681 | #ifdef __LITTLE_ENDIAN__ | | |
| 67682 | __ai uint64_t vsubd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 67683 | uint64_t __ret; | | |
| 67684 | __ret = (uint64_t) __builtin_neon_vsubd_u64(__p0, __p1); | | |
| 67685 | return __ret; | | |
| 67686 | } | | |
| 67687 | #else | | |
| 67688 | __ai uint64_t vsubd_u64(uint64_t __p0, uint64_t __p1) { | 57243 | __ai uint64_t vsubd_u64(uint64_t __p0, uint64_t __p1) { |
| 67689 | uint64_t __ret; | 57244 | uint64_t __ret; |
| 67690 | __ret = (uint64_t) __builtin_neon_vsubd_u64(__p0, __p1); | 57245 | __ret = (uint64_t) __builtin_neon_vsubd_u64(__p0, __p1); |
| 67691 | return __ret; | 57246 | return __ret; |
| 67692 | } | 57247 | } |
| 67693 | #endif | | |
| 67694 | | | |
| 67695 | #ifdef __LITTLE_ENDIAN__ | | |
| 67696 | __ai int64_t vsubd_s64(int64_t __p0, int64_t __p1) { | | |
| 67697 | int64_t __ret; | | |
| 67698 | __ret = (int64_t) __builtin_neon_vsubd_s64(__p0, __p1); | | |
| 67699 | return __ret; | | |
| 67700 | } | | |
| 67701 | #else | | |
| 67702 | __ai int64_t vsubd_s64(int64_t __p0, int64_t __p1) { | 57248 | __ai int64_t vsubd_s64(int64_t __p0, int64_t __p1) { |
| 67703 | int64_t __ret; | 57249 | int64_t __ret; |
| 67704 | __ret = (int64_t) __builtin_neon_vsubd_s64(__p0, __p1); | 57250 | __ret = (int64_t) __builtin_neon_vsubd_s64(__p0, __p1); |
| 67705 | return __ret; | 57251 | return __ret; |
| 67706 | } | 57252 | } |
| 67707 | #endif | | |
| 67708 | | | |
| 67709 | #ifdef __LITTLE_ENDIAN__ | 57253 | #ifdef __LITTLE_ENDIAN__ |
| 67710 | __ai float64x2_t vsubq_f64(float64x2_t __p0, float64x2_t __p1) { | 57254 | __ai float64x2_t vsubq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 67711 | float64x2_t __ret; | 57255 | float64x2_t __ret; |
| ... | @@ -67723,20 +57267,11 @@ __ai float64x2_t vsubq_f64(float64x2_t __p0, float64x2_t __p1) { | ... | @@ -67723,20 +57267,11 @@ __ai float64x2_t vsubq_f64(float64x2_t __p0, float64x2_t __p1) { |
| 67723 | } | 57267 | } |
| 67724 | #endif | 57268 | #endif |
| 67725 | | 57269 | |
| 67726 | #ifdef __LITTLE_ENDIAN__ | | |
| 67727 | __ai float64x1_t vsub_f64(float64x1_t __p0, float64x1_t __p1) { | | |
| 67728 | float64x1_t __ret; | | |
| 67729 | __ret = __p0 - __p1; | | |
| 67730 | return __ret; | | |
| 67731 | } | | |
| 67732 | #else | | |
| 67733 | __ai float64x1_t vsub_f64(float64x1_t __p0, float64x1_t __p1) { | 57270 | __ai float64x1_t vsub_f64(float64x1_t __p0, float64x1_t __p1) { |
| 67734 | float64x1_t __ret; | 57271 | float64x1_t __ret; |
| 67735 | __ret = __p0 - __p1; | 57272 | __ret = __p0 - __p1; |
| 67736 | return __ret; | 57273 | return __ret; |
| 67737 | } | 57274 | } |
| 67738 | #endif | | |
| 67739 | | | |
| 67740 | #ifdef __LITTLE_ENDIAN__ | 57275 | #ifdef __LITTLE_ENDIAN__ |
| 67741 | __ai uint16x8_t vsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { | 57276 | __ai uint16x8_t vsubhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) { |
| 67742 | uint16x8_t __ret; | 57277 | uint16x8_t __ret; |
| ... | @@ -68797,20 +58332,11 @@ __ai int16x4_t vtrn2_s16(int16x4_t __p0, int16x4_t __p1) { | ... | @@ -68797,20 +58332,11 @@ __ai int16x4_t vtrn2_s16(int16x4_t __p0, int16x4_t __p1) { |
| 68797 | } | 58332 | } |
| 68798 | #endif | 58333 | #endif |
| 68799 | | 58334 | |
| 68800 | #ifdef __LITTLE_ENDIAN__ | | |
| 68801 | __ai uint64x1_t vtst_p64(poly64x1_t __p0, poly64x1_t __p1) { | | |
| 68802 | uint64x1_t __ret; | | |
| 68803 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 68804 | return __ret; | | |
| 68805 | } | | |
| 68806 | #else | | |
| 68807 | __ai uint64x1_t vtst_p64(poly64x1_t __p0, poly64x1_t __p1) { | 58335 | __ai uint64x1_t vtst_p64(poly64x1_t __p0, poly64x1_t __p1) { |
| 68808 | uint64x1_t __ret; | 58336 | uint64x1_t __ret; |
| 68809 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 58337 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 68810 | return __ret; | 58338 | return __ret; |
| 68811 | } | 58339 | } |
| 68812 | #endif | | |
| 68813 | | | |
| 68814 | #ifdef __LITTLE_ENDIAN__ | 58340 | #ifdef __LITTLE_ENDIAN__ |
| 68815 | __ai uint64x2_t vtstq_p64(poly64x2_t __p0, poly64x2_t __p1) { | 58341 | __ai uint64x2_t vtstq_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 68816 | uint64x2_t __ret; | 58342 | uint64x2_t __ret; |
| ... | @@ -68862,118 +58388,46 @@ __ai uint64x2_t vtstq_s64(int64x2_t __p0, int64x2_t __p1) { | ... | @@ -68862,118 +58388,46 @@ __ai uint64x2_t vtstq_s64(int64x2_t __p0, int64x2_t __p1) { |
| 68862 | } | 58388 | } |
| 68863 | #endif | 58389 | #endif |
| 68864 | | 58390 | |
| 68865 | #ifdef __LITTLE_ENDIAN__ | | |
| 68866 | __ai uint64x1_t vtst_u64(uint64x1_t __p0, uint64x1_t __p1) { | 58391 | __ai uint64x1_t vtst_u64(uint64x1_t __p0, uint64x1_t __p1) { |
| 68867 | uint64x1_t __ret; | 58392 | uint64x1_t __ret; |
| 68868 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 58393 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 68869 | return __ret; | 58394 | return __ret; |
| 68870 | } | 58395 | } |
| 68871 | #else | | |
| 68872 | __ai uint64x1_t vtst_u64(uint64x1_t __p0, uint64x1_t __p1) { | | |
| 68873 | uint64x1_t __ret; | | |
| 68874 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 68875 | return __ret; | | |
| 68876 | } | | |
| 68877 | #endif | | |
| 68878 | | | |
| 68879 | #ifdef __LITTLE_ENDIAN__ | | |
| 68880 | __ai uint64x1_t vtst_s64(int64x1_t __p0, int64x1_t __p1) { | | |
| 68881 | uint64x1_t __ret; | | |
| 68882 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | | |
| 68883 | return __ret; | | |
| 68884 | } | | |
| 68885 | #else | | |
| 68886 | __ai uint64x1_t vtst_s64(int64x1_t __p0, int64x1_t __p1) { | 58396 | __ai uint64x1_t vtst_s64(int64x1_t __p0, int64x1_t __p1) { |
| 68887 | uint64x1_t __ret; | 58397 | uint64x1_t __ret; |
| 68888 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); | 58398 | __ret = (uint64x1_t) __builtin_neon_vtst_v((int8x8_t)__p0, (int8x8_t)__p1, 19); |
| 68889 | return __ret; | 58399 | return __ret; |
| 68890 | } | 58400 | } |
| 68891 | #endif | | |
| 68892 | | | |
| 68893 | #ifdef __LITTLE_ENDIAN__ | | |
| 68894 | __ai uint64_t vtstd_u64(uint64_t __p0, uint64_t __p1) { | | |
| 68895 | uint64_t __ret; | | |
| 68896 | __ret = (uint64_t) __builtin_neon_vtstd_u64(__p0, __p1); | | |
| 68897 | return __ret; | | |
| 68898 | } | | |
| 68899 | #else | | |
| 68900 | __ai uint64_t vtstd_u64(uint64_t __p0, uint64_t __p1) { | 58401 | __ai uint64_t vtstd_u64(uint64_t __p0, uint64_t __p1) { |
| 68901 | uint64_t __ret; | 58402 | uint64_t __ret; |
| 68902 | __ret = (uint64_t) __builtin_neon_vtstd_u64(__p0, __p1); | 58403 | __ret = (uint64_t) __builtin_neon_vtstd_u64(__p0, __p1); |
| 68903 | return __ret; | 58404 | return __ret; |
| 68904 | } | 58405 | } |
| 68905 | #endif | | |
| 68906 | | | |
| 68907 | #ifdef __LITTLE_ENDIAN__ | | |
| 68908 | __ai int64_t vtstd_s64(int64_t __p0, int64_t __p1) { | | |
| 68909 | int64_t __ret; | | |
| 68910 | __ret = (int64_t) __builtin_neon_vtstd_s64(__p0, __p1); | | |
| 68911 | return __ret; | | |
| 68912 | } | | |
| 68913 | #else | | |
| 68914 | __ai int64_t vtstd_s64(int64_t __p0, int64_t __p1) { | 58406 | __ai int64_t vtstd_s64(int64_t __p0, int64_t __p1) { |
| 68915 | int64_t __ret; | 58407 | int64_t __ret; |
| 68916 | __ret = (int64_t) __builtin_neon_vtstd_s64(__p0, __p1); | 58408 | __ret = (int64_t) __builtin_neon_vtstd_s64(__p0, __p1); |
| 68917 | return __ret; | 58409 | return __ret; |
| 68918 | } | 58410 | } |
| 68919 | #endif | | |
| 68920 | | | |
| 68921 | #ifdef __LITTLE_ENDIAN__ | | |
| 68922 | __ai int8_t vuqaddb_s8(int8_t __p0, uint8_t __p1) { | | |
| 68923 | int8_t __ret; | | |
| 68924 | __ret = (int8_t) __builtin_neon_vuqaddb_s8(__p0, __p1); | | |
| 68925 | return __ret; | | |
| 68926 | } | | |
| 68927 | #else | | |
| 68928 | __ai int8_t vuqaddb_s8(int8_t __p0, uint8_t __p1) { | 58411 | __ai int8_t vuqaddb_s8(int8_t __p0, uint8_t __p1) { |
| 68929 | int8_t __ret; | 58412 | int8_t __ret; |
| 68930 | __ret = (int8_t) __builtin_neon_vuqaddb_s8(__p0, __p1); | 58413 | __ret = (int8_t) __builtin_neon_vuqaddb_s8(__p0, __p1); |
| 68931 | return __ret; | 58414 | return __ret; |
| 68932 | } | 58415 | } |
| 68933 | #endif | | |
| 68934 | | | |
| 68935 | #ifdef __LITTLE_ENDIAN__ | | |
| 68936 | __ai int32_t vuqadds_s32(int32_t __p0, uint32_t __p1) { | 58416 | __ai int32_t vuqadds_s32(int32_t __p0, uint32_t __p1) { |
| 68937 | int32_t __ret; | 58417 | int32_t __ret; |
| 68938 | __ret = (int32_t) __builtin_neon_vuqadds_s32(__p0, __p1); | 58418 | __ret = (int32_t) __builtin_neon_vuqadds_s32(__p0, __p1); |
| 68939 | return __ret; | 58419 | return __ret; |
| 68940 | } | 58420 | } |
| 68941 | #else | | |
| 68942 | __ai int32_t vuqadds_s32(int32_t __p0, uint32_t __p1) { | | |
| 68943 | int32_t __ret; | | |
| 68944 | __ret = (int32_t) __builtin_neon_vuqadds_s32(__p0, __p1); | | |
| 68945 | return __ret; | | |
| 68946 | } | | |
| 68947 | #endif | | |
| 68948 | | | |
| 68949 | #ifdef __LITTLE_ENDIAN__ | | |
| 68950 | __ai int64_t vuqaddd_s64(int64_t __p0, uint64_t __p1) { | | |
| 68951 | int64_t __ret; | | |
| 68952 | __ret = (int64_t) __builtin_neon_vuqaddd_s64(__p0, __p1); | | |
| 68953 | return __ret; | | |
| 68954 | } | | |
| 68955 | #else | | |
| 68956 | __ai int64_t vuqaddd_s64(int64_t __p0, uint64_t __p1) { | 58421 | __ai int64_t vuqaddd_s64(int64_t __p0, uint64_t __p1) { |
| 68957 | int64_t __ret; | 58422 | int64_t __ret; |
| 68958 | __ret = (int64_t) __builtin_neon_vuqaddd_s64(__p0, __p1); | 58423 | __ret = (int64_t) __builtin_neon_vuqaddd_s64(__p0, __p1); |
| 68959 | return __ret; | 58424 | return __ret; |
| 68960 | } | 58425 | } |
| 68961 | #endif | | |
| 68962 | | | |
| 68963 | #ifdef __LITTLE_ENDIAN__ | | |
| 68964 | __ai int16_t vuqaddh_s16(int16_t __p0, uint16_t __p1) { | 58426 | __ai int16_t vuqaddh_s16(int16_t __p0, uint16_t __p1) { |
| 68965 | int16_t __ret; | 58427 | int16_t __ret; |
| 68966 | __ret = (int16_t) __builtin_neon_vuqaddh_s16(__p0, __p1); | 58428 | __ret = (int16_t) __builtin_neon_vuqaddh_s16(__p0, __p1); |
| 68967 | return __ret; | 58429 | return __ret; |
| 68968 | } | 58430 | } |
| 68969 | #else | | |
| 68970 | __ai int16_t vuqaddh_s16(int16_t __p0, uint16_t __p1) { | | |
| 68971 | int16_t __ret; | | |
| 68972 | __ret = (int16_t) __builtin_neon_vuqaddh_s16(__p0, __p1); | | |
| 68973 | return __ret; | | |
| 68974 | } | | |
| 68975 | #endif | | |
| 68976 | | | |
| 68977 | #ifdef __LITTLE_ENDIAN__ | 58431 | #ifdef __LITTLE_ENDIAN__ |
| 68978 | __ai int8x16_t vuqaddq_s8(int8x16_t __p0, uint8x16_t __p1) { | 58432 | __ai int8x16_t vuqaddq_s8(int8x16_t __p0, uint8x16_t __p1) { |
| 68979 | int8x16_t __ret; | 58433 | int8x16_t __ret; |
| ... | @@ -69076,20 +58530,11 @@ __ai int32x2_t vuqadd_s32(int32x2_t __p0, uint32x2_t __p1) { | ... | @@ -69076,20 +58530,11 @@ __ai int32x2_t vuqadd_s32(int32x2_t __p0, uint32x2_t __p1) { |
| 69076 | } | 58530 | } |
| 69077 | #endif | 58531 | #endif |
| 69078 | | 58532 | |
| 69079 | #ifdef __LITTLE_ENDIAN__ | | |
| 69080 | __ai int64x1_t vuqadd_s64(int64x1_t __p0, uint64x1_t __p1) { | 58533 | __ai int64x1_t vuqadd_s64(int64x1_t __p0, uint64x1_t __p1) { |
| 69081 | int64x1_t __ret; | 58534 | int64x1_t __ret; |
| 69082 | __ret = (int64x1_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | 58535 | __ret = (int64x1_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 3); |
| 69083 | return __ret; | 58536 | return __ret; |
| 69084 | } | 58537 | } |
| 69085 | #else | | |
| 69086 | __ai int64x1_t vuqadd_s64(int64x1_t __p0, uint64x1_t __p1) { | | |
| 69087 | int64x1_t __ret; | | |
| 69088 | __ret = (int64x1_t) __builtin_neon_vuqadd_v((int8x8_t)__p0, (int8x8_t)__p1, 3); | | |
| 69089 | return __ret; | | |
| 69090 | } | | |
| 69091 | #endif | | |
| 69092 | | | |
| 69093 | #ifdef __LITTLE_ENDIAN__ | 58538 | #ifdef __LITTLE_ENDIAN__ |
| 69094 | __ai int16x4_t vuqadd_s16(int16x4_t __p0, uint16x4_t __p1) { | 58539 | __ai int16x4_t vuqadd_s16(int16x4_t __p0, uint16x4_t __p1) { |
| 69095 | int16x4_t __ret; | 58540 | int16x4_t __ret; |
| ... | @@ -71157,60 +60602,60 @@ __ai int32x4_t vaddw_s16(int32x4_t __p0, int16x4_t __p1) { | ... | @@ -71157,60 +60602,60 @@ __ai int32x4_t vaddw_s16(int32x4_t __p0, int16x4_t __p1) { |
| 71157 | #endif | 60602 | #endif |
| 71158 | | 60603 | |
| 71159 | #ifdef __LITTLE_ENDIAN__ | 60604 | #ifdef __LITTLE_ENDIAN__ |
| 71160 | #define vget_lane_f16(__p0_254, __p1_254) __extension__ ({ \ | 60605 | #define vget_lane_f16(__p0_248, __p1_248) __extension__ ({ \ |
| 71161 | float16x4_t __s0_254 = __p0_254; \ | 60606 | float16x4_t __s0_248 = __p0_248; \ |
| 71162 | float16_t __ret_254; \ | 60607 | float16_t __ret_248; \ |
| 71163 | float16x4_t __reint_254 = __s0_254; \ | 60608 | float16x4_t __reint_248 = __s0_248; \ |
| 71164 | int16_t __reint1_254 = vget_lane_s16(*(int16x4_t *) &__reint_254, __p1_254); \ | 60609 | int16_t __reint1_248 = vget_lane_s16(*(int16x4_t *) &__reint_248, __p1_248); \ |
| 71165 | __ret_254 = *(float16_t *) &__reint1_254; \ | 60610 | __ret_248 = *(float16_t *) &__reint1_248; \ |
| 71166 | __ret_254; \ | 60611 | __ret_248; \ |
| 71167 | }) | 60612 | }) |
| 71168 | #else | 60613 | #else |
| 71169 | #define vget_lane_f16(__p0_255, __p1_255) __extension__ ({ \ | 60614 | #define vget_lane_f16(__p0_249, __p1_249) __extension__ ({ \ |
| 71170 | float16x4_t __s0_255 = __p0_255; \ | 60615 | float16x4_t __s0_249 = __p0_249; \ |
| 71171 | float16x4_t __rev0_255; __rev0_255 = __builtin_shufflevector(__s0_255, __s0_255, 3, 2, 1, 0); \ | 60616 | float16x4_t __rev0_249; __rev0_249 = __builtin_shufflevector(__s0_249, __s0_249, 3, 2, 1, 0); \ |
| 71172 | float16_t __ret_255; \ | 60617 | float16_t __ret_249; \ |
| 71173 | float16x4_t __reint_255 = __rev0_255; \ | 60618 | float16x4_t __reint_249 = __rev0_249; \ |
| 71174 | int16_t __reint1_255 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_255, __p1_255); \ | 60619 | int16_t __reint1_249 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_249, __p1_249); \ |
| 71175 | __ret_255 = *(float16_t *) &__reint1_255; \ | 60620 | __ret_249 = *(float16_t *) &__reint1_249; \ |
| 71176 | __ret_255; \ | 60621 | __ret_249; \ |
| 71177 | }) | 60622 | }) |
| 71178 | #define __noswap_vget_lane_f16(__p0_256, __p1_256) __extension__ ({ \ | 60623 | #define __noswap_vget_lane_f16(__p0_250, __p1_250) __extension__ ({ \ |
| 71179 | float16x4_t __s0_256 = __p0_256; \ | 60624 | float16x4_t __s0_250 = __p0_250; \ |
| 71180 | float16_t __ret_256; \ | 60625 | float16_t __ret_250; \ |
| 71181 | float16x4_t __reint_256 = __s0_256; \ | 60626 | float16x4_t __reint_250 = __s0_250; \ |
| 71182 | int16_t __reint1_256 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_256, __p1_256); \ | 60627 | int16_t __reint1_250 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_250, __p1_250); \ |
| 71183 | __ret_256 = *(float16_t *) &__reint1_256; \ | 60628 | __ret_250 = *(float16_t *) &__reint1_250; \ |
| 71184 | __ret_256; \ | 60629 | __ret_250; \ |
| 71185 | }) | 60630 | }) |
| 71186 | #endif | 60631 | #endif |
| 71187 | | 60632 | |
| 71188 | #ifdef __LITTLE_ENDIAN__ | 60633 | #ifdef __LITTLE_ENDIAN__ |
| 71189 | #define vgetq_lane_f16(__p0_257, __p1_257) __extension__ ({ \ | 60634 | #define vgetq_lane_f16(__p0_251, __p1_251) __extension__ ({ \ |
| 71190 | float16x8_t __s0_257 = __p0_257; \ | 60635 | float16x8_t __s0_251 = __p0_251; \ |
| 71191 | float16_t __ret_257; \ | 60636 | float16_t __ret_251; \ |
| 71192 | float16x8_t __reint_257 = __s0_257; \ | 60637 | float16x8_t __reint_251 = __s0_251; \ |
| 71193 | int16_t __reint1_257 = vgetq_lane_s16(*(int16x8_t *) &__reint_257, __p1_257); \ | 60638 | int16_t __reint1_251 = vgetq_lane_s16(*(int16x8_t *) &__reint_251, __p1_251); \ |
| 71194 | __ret_257 = *(float16_t *) &__reint1_257; \ | 60639 | __ret_251 = *(float16_t *) &__reint1_251; \ |
| 71195 | __ret_257; \ | 60640 | __ret_251; \ |
| 71196 | }) | 60641 | }) |
| 71197 | #else | 60642 | #else |
| 71198 | #define vgetq_lane_f16(__p0_258, __p1_258) __extension__ ({ \ | 60643 | #define vgetq_lane_f16(__p0_252, __p1_252) __extension__ ({ \ |
| 71199 | float16x8_t __s0_258 = __p0_258; \ | 60644 | float16x8_t __s0_252 = __p0_252; \ |
| 71200 | float16x8_t __rev0_258; __rev0_258 = __builtin_shufflevector(__s0_258, __s0_258, 7, 6, 5, 4, 3, 2, 1, 0); \ | 60645 | float16x8_t __rev0_252; __rev0_252 = __builtin_shufflevector(__s0_252, __s0_252, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 71201 | float16_t __ret_258; \ | 60646 | float16_t __ret_252; \ |
| 71202 | float16x8_t __reint_258 = __rev0_258; \ | 60647 | float16x8_t __reint_252 = __rev0_252; \ |
| 71203 | int16_t __reint1_258 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_258, __p1_258); \ | 60648 | int16_t __reint1_252 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_252, __p1_252); \ |
| 71204 | __ret_258 = *(float16_t *) &__reint1_258; \ | 60649 | __ret_252 = *(float16_t *) &__reint1_252; \ |
| 71205 | __ret_258; \ | 60650 | __ret_252; \ |
| 71206 | }) | 60651 | }) |
| 71207 | #define __noswap_vgetq_lane_f16(__p0_259, __p1_259) __extension__ ({ \ | 60652 | #define __noswap_vgetq_lane_f16(__p0_253, __p1_253) __extension__ ({ \ |
| 71208 | float16x8_t __s0_259 = __p0_259; \ | 60653 | float16x8_t __s0_253 = __p0_253; \ |
| 71209 | float16_t __ret_259; \ | 60654 | float16_t __ret_253; \ |
| 71210 | float16x8_t __reint_259 = __s0_259; \ | 60655 | float16x8_t __reint_253 = __s0_253; \ |
| 71211 | int16_t __reint1_259 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_259, __p1_259); \ | 60656 | int16_t __reint1_253 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_253, __p1_253); \ |
| 71212 | __ret_259 = *(float16_t *) &__reint1_259; \ | 60657 | __ret_253 = *(float16_t *) &__reint1_253; \ |
| 71213 | __ret_259; \ | 60658 | __ret_253; \ |
| 71214 | }) | 60659 | }) |
| 71215 | #endif | 60660 | #endif |
| 71216 | | 60661 | |
| ... | @@ -71859,705 +61304,669 @@ __ai int32x4_t __noswap_vmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2 | ... | @@ -71859,705 +61304,669 @@ __ai int32x4_t __noswap_vmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2 |
| 71859 | #endif | 61304 | #endif |
| 71860 | | 61305 | |
| 71861 | #ifdef __LITTLE_ENDIAN__ | 61306 | #ifdef __LITTLE_ENDIAN__ |
| 71862 | #define vset_lane_f16(__p0_260, __p1_260, __p2_260) __extension__ ({ \ | 61307 | #define vset_lane_f16(__p0_254, __p1_254, __p2_254) __extension__ ({ \ |
| 71863 | float16_t __s0_260 = __p0_260; \ | 61308 | float16_t __s0_254 = __p0_254; \ |
| | 61309 | float16x4_t __s1_254 = __p1_254; \ |
| | 61310 | float16x4_t __ret_254; \ |
| | 61311 | float16_t __reint_254 = __s0_254; \ |
| | 61312 | float16x4_t __reint1_254 = __s1_254; \ |
| | 61313 | int16x4_t __reint2_254 = vset_lane_s16(*(int16_t *) &__reint_254, *(int16x4_t *) &__reint1_254, __p2_254); \ |
| | 61314 | __ret_254 = *(float16x4_t *) &__reint2_254; \ |
| | 61315 | __ret_254; \ |
| | 61316 | }) |
| | 61317 | #else |
| | 61318 | #define vset_lane_f16(__p0_255, __p1_255, __p2_255) __extension__ ({ \ |
| | 61319 | float16_t __s0_255 = __p0_255; \ |
| | 61320 | float16x4_t __s1_255 = __p1_255; \ |
| | 61321 | float16x4_t __rev1_255; __rev1_255 = __builtin_shufflevector(__s1_255, __s1_255, 3, 2, 1, 0); \ |
| | 61322 | float16x4_t __ret_255; \ |
| | 61323 | float16_t __reint_255 = __s0_255; \ |
| | 61324 | float16x4_t __reint1_255 = __rev1_255; \ |
| | 61325 | int16x4_t __reint2_255 = __noswap_vset_lane_s16(*(int16_t *) &__reint_255, *(int16x4_t *) &__reint1_255, __p2_255); \ |
| | 61326 | __ret_255 = *(float16x4_t *) &__reint2_255; \ |
| | 61327 | __ret_255 = __builtin_shufflevector(__ret_255, __ret_255, 3, 2, 1, 0); \ |
| | 61328 | __ret_255; \ |
| | 61329 | }) |
| | 61330 | #endif |
| | 61331 | |
| | 61332 | #ifdef __LITTLE_ENDIAN__ |
| | 61333 | #define vsetq_lane_f16(__p0_256, __p1_256, __p2_256) __extension__ ({ \ |
| | 61334 | float16_t __s0_256 = __p0_256; \ |
| | 61335 | float16x8_t __s1_256 = __p1_256; \ |
| | 61336 | float16x8_t __ret_256; \ |
| | 61337 | float16_t __reint_256 = __s0_256; \ |
| | 61338 | float16x8_t __reint1_256 = __s1_256; \ |
| | 61339 | int16x8_t __reint2_256 = vsetq_lane_s16(*(int16_t *) &__reint_256, *(int16x8_t *) &__reint1_256, __p2_256); \ |
| | 61340 | __ret_256 = *(float16x8_t *) &__reint2_256; \ |
| | 61341 | __ret_256; \ |
| | 61342 | }) |
| | 61343 | #else |
| | 61344 | #define vsetq_lane_f16(__p0_257, __p1_257, __p2_257) __extension__ ({ \ |
| | 61345 | float16_t __s0_257 = __p0_257; \ |
| | 61346 | float16x8_t __s1_257 = __p1_257; \ |
| | 61347 | float16x8_t __rev1_257; __rev1_257 = __builtin_shufflevector(__s1_257, __s1_257, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 61348 | float16x8_t __ret_257; \ |
| | 61349 | float16_t __reint_257 = __s0_257; \ |
| | 61350 | float16x8_t __reint1_257 = __rev1_257; \ |
| | 61351 | int16x8_t __reint2_257 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_257, *(int16x8_t *) &__reint1_257, __p2_257); \ |
| | 61352 | __ret_257 = *(float16x8_t *) &__reint2_257; \ |
| | 61353 | __ret_257 = __builtin_shufflevector(__ret_257, __ret_257, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 61354 | __ret_257; \ |
| | 61355 | }) |
| | 61356 | #endif |
| | 61357 | |
| | 61358 | #if defined(__ARM_FEATURE_FP16FML) && defined(__aarch64__) |
| | 61359 | #ifdef __LITTLE_ENDIAN__ |
| | 61360 | #define vfmlalq_lane_high_f16(__p0_258, __p1_258, __p2_258, __p3_258) __extension__ ({ \ |
| | 61361 | float32x4_t __s0_258 = __p0_258; \ |
| | 61362 | float16x8_t __s1_258 = __p1_258; \ |
| | 61363 | float16x4_t __s2_258 = __p2_258; \ |
| | 61364 | float32x4_t __ret_258; \ |
| | 61365 | __ret_258 = vfmlalq_high_f16(__s0_258, __s1_258, (float16x8_t) {vget_lane_f16(__s2_258, __p3_258), vget_lane_f16(__s2_258, __p3_258), vget_lane_f16(__s2_258, __p3_258), vget_lane_f16(__s2_258, __p3_258), vget_lane_f16(__s2_258, __p3_258), vget_lane_f16(__s2_258, __p3_258), vget_lane_f16(__s2_258, __p3_258), vget_lane_f16(__s2_258, __p3_258)}); \ |
| | 61366 | __ret_258; \ |
| | 61367 | }) |
| | 61368 | #else |
| | 61369 | #define vfmlalq_lane_high_f16(__p0_259, __p1_259, __p2_259, __p3_259) __extension__ ({ \ |
| | 61370 | float32x4_t __s0_259 = __p0_259; \ |
| | 61371 | float16x8_t __s1_259 = __p1_259; \ |
| | 61372 | float16x4_t __s2_259 = __p2_259; \ |
| | 61373 | float32x4_t __rev0_259; __rev0_259 = __builtin_shufflevector(__s0_259, __s0_259, 3, 2, 1, 0); \ |
| | 61374 | float16x8_t __rev1_259; __rev1_259 = __builtin_shufflevector(__s1_259, __s1_259, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| | 61375 | float16x4_t __rev2_259; __rev2_259 = __builtin_shufflevector(__s2_259, __s2_259, 3, 2, 1, 0); \ |
| | 61376 | float32x4_t __ret_259; \ |
| | 61377 | __ret_259 = __noswap_vfmlalq_high_f16(__rev0_259, __rev1_259, (float16x8_t) {__noswap_vget_lane_f16(__rev2_259, __p3_259), __noswap_vget_lane_f16(__rev2_259, __p3_259), __noswap_vget_lane_f16(__rev2_259, __p3_259), __noswap_vget_lane_f16(__rev2_259, __p3_259), __noswap_vget_lane_f16(__rev2_259, __p3_259), __noswap_vget_lane_f16(__rev2_259, __p3_259), __noswap_vget_lane_f16(__rev2_259, __p3_259), __noswap_vget_lane_f16(__rev2_259, __p3_259)}); \ |
| | 61378 | __ret_259 = __builtin_shufflevector(__ret_259, __ret_259, 3, 2, 1, 0); \ |
| | 61379 | __ret_259; \ |
| | 61380 | }) |
| | 61381 | #endif |
| | 61382 | |
| | 61383 | #ifdef __LITTLE_ENDIAN__ |
| | 61384 | #define vfmlal_lane_high_f16(__p0_260, __p1_260, __p2_260, __p3_260) __extension__ ({ \ |
| | 61385 | float32x2_t __s0_260 = __p0_260; \ |
| 71864 | float16x4_t __s1_260 = __p1_260; \ | 61386 | float16x4_t __s1_260 = __p1_260; \ |
| 71865 | float16x4_t __ret_260; \ | 61387 | float16x4_t __s2_260 = __p2_260; \ |
| 71866 | float16_t __reint_260 = __s0_260; \ | 61388 | float32x2_t __ret_260; \ |
| 71867 | float16x4_t __reint1_260 = __s1_260; \ | 61389 | __ret_260 = vfmlal_high_f16(__s0_260, __s1_260, (float16x4_t) {vget_lane_f16(__s2_260, __p3_260), vget_lane_f16(__s2_260, __p3_260), vget_lane_f16(__s2_260, __p3_260), vget_lane_f16(__s2_260, __p3_260)}); \ |
| 71868 | int16x4_t __reint2_260 = vset_lane_s16(*(int16_t *) &__reint_260, *(int16x4_t *) &__reint1_260, __p2_260); \ | | |
| 71869 | __ret_260 = *(float16x4_t *) &__reint2_260; \ | | |
| 71870 | __ret_260; \ | 61390 | __ret_260; \ |
| 71871 | }) | 61391 | }) |
| 71872 | #else | 61392 | #else |
| 71873 | #define vset_lane_f16(__p0_261, __p1_261, __p2_261) __extension__ ({ \ | 61393 | #define vfmlal_lane_high_f16(__p0_261, __p1_261, __p2_261, __p3_261) __extension__ ({ \ |
| 71874 | float16_t __s0_261 = __p0_261; \ | 61394 | float32x2_t __s0_261 = __p0_261; \ |
| 71875 | float16x4_t __s1_261 = __p1_261; \ | 61395 | float16x4_t __s1_261 = __p1_261; \ |
| | 61396 | float16x4_t __s2_261 = __p2_261; \ |
| | 61397 | float32x2_t __rev0_261; __rev0_261 = __builtin_shufflevector(__s0_261, __s0_261, 1, 0); \ |
| 71876 | float16x4_t __rev1_261; __rev1_261 = __builtin_shufflevector(__s1_261, __s1_261, 3, 2, 1, 0); \ | 61398 | float16x4_t __rev1_261; __rev1_261 = __builtin_shufflevector(__s1_261, __s1_261, 3, 2, 1, 0); \ |
| 71877 | float16x4_t __ret_261; \ | 61399 | float16x4_t __rev2_261; __rev2_261 = __builtin_shufflevector(__s2_261, __s2_261, 3, 2, 1, 0); \ |
| 71878 | float16_t __reint_261 = __s0_261; \ | 61400 | float32x2_t __ret_261; \ |
| 71879 | float16x4_t __reint1_261 = __rev1_261; \ | 61401 | __ret_261 = __noswap_vfmlal_high_f16(__rev0_261, __rev1_261, (float16x4_t) {__noswap_vget_lane_f16(__rev2_261, __p3_261), __noswap_vget_lane_f16(__rev2_261, __p3_261), __noswap_vget_lane_f16(__rev2_261, __p3_261), __noswap_vget_lane_f16(__rev2_261, __p3_261)}); \ |
| 71880 | int16x4_t __reint2_261 = __noswap_vset_lane_s16(*(int16_t *) &__reint_261, *(int16x4_t *) &__reint1_261, __p2_261); \ | 61402 | __ret_261 = __builtin_shufflevector(__ret_261, __ret_261, 1, 0); \ |
| 71881 | __ret_261 = *(float16x4_t *) &__reint2_261; \ | | |
| 71882 | __ret_261 = __builtin_shufflevector(__ret_261, __ret_261, 3, 2, 1, 0); \ | | |
| 71883 | __ret_261; \ | 61403 | __ret_261; \ |
| 71884 | }) | 61404 | }) |
| 71885 | #endif | 61405 | #endif |
| 71886 | | 61406 | |
| 71887 | #ifdef __LITTLE_ENDIAN__ | 61407 | #ifdef __LITTLE_ENDIAN__ |
| 71888 | #define vsetq_lane_f16(__p0_262, __p1_262, __p2_262) __extension__ ({ \ | 61408 | #define vfmlalq_lane_low_f16(__p0_262, __p1_262, __p2_262, __p3_262) __extension__ ({ \ |
| 71889 | float16_t __s0_262 = __p0_262; \ | 61409 | float32x4_t __s0_262 = __p0_262; \ |
| 71890 | float16x8_t __s1_262 = __p1_262; \ | 61410 | float16x8_t __s1_262 = __p1_262; \ |
| 71891 | float16x8_t __ret_262; \ | 61411 | float16x4_t __s2_262 = __p2_262; \ |
| 71892 | float16_t __reint_262 = __s0_262; \ | 61412 | float32x4_t __ret_262; \ |
| 71893 | float16x8_t __reint1_262 = __s1_262; \ | 61413 | __ret_262 = vfmlalq_low_f16(__s0_262, __s1_262, (float16x8_t) {vget_lane_f16(__s2_262, __p3_262), vget_lane_f16(__s2_262, __p3_262), vget_lane_f16(__s2_262, __p3_262), vget_lane_f16(__s2_262, __p3_262), vget_lane_f16(__s2_262, __p3_262), vget_lane_f16(__s2_262, __p3_262), vget_lane_f16(__s2_262, __p3_262), vget_lane_f16(__s2_262, __p3_262)}); \ |
| 71894 | int16x8_t __reint2_262 = vsetq_lane_s16(*(int16_t *) &__reint_262, *(int16x8_t *) &__reint1_262, __p2_262); \ | | |
| 71895 | __ret_262 = *(float16x8_t *) &__reint2_262; \ | | |
| 71896 | __ret_262; \ | 61414 | __ret_262; \ |
| 71897 | }) | 61415 | }) |
| 71898 | #else | 61416 | #else |
| 71899 | #define vsetq_lane_f16(__p0_263, __p1_263, __p2_263) __extension__ ({ \ | 61417 | #define vfmlalq_lane_low_f16(__p0_263, __p1_263, __p2_263, __p3_263) __extension__ ({ \ |
| 71900 | float16_t __s0_263 = __p0_263; \ | 61418 | float32x4_t __s0_263 = __p0_263; \ |
| 71901 | float16x8_t __s1_263 = __p1_263; \ | 61419 | float16x8_t __s1_263 = __p1_263; \ |
| | 61420 | float16x4_t __s2_263 = __p2_263; \ |
| | 61421 | float32x4_t __rev0_263; __rev0_263 = __builtin_shufflevector(__s0_263, __s0_263, 3, 2, 1, 0); \ |
| 71902 | float16x8_t __rev1_263; __rev1_263 = __builtin_shufflevector(__s1_263, __s1_263, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61422 | float16x8_t __rev1_263; __rev1_263 = __builtin_shufflevector(__s1_263, __s1_263, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 71903 | float16x8_t __ret_263; \ | 61423 | float16x4_t __rev2_263; __rev2_263 = __builtin_shufflevector(__s2_263, __s2_263, 3, 2, 1, 0); \ |
| 71904 | float16_t __reint_263 = __s0_263; \ | 61424 | float32x4_t __ret_263; \ |
| 71905 | float16x8_t __reint1_263 = __rev1_263; \ | 61425 | __ret_263 = __noswap_vfmlalq_low_f16(__rev0_263, __rev1_263, (float16x8_t) {__noswap_vget_lane_f16(__rev2_263, __p3_263), __noswap_vget_lane_f16(__rev2_263, __p3_263), __noswap_vget_lane_f16(__rev2_263, __p3_263), __noswap_vget_lane_f16(__rev2_263, __p3_263), __noswap_vget_lane_f16(__rev2_263, __p3_263), __noswap_vget_lane_f16(__rev2_263, __p3_263), __noswap_vget_lane_f16(__rev2_263, __p3_263), __noswap_vget_lane_f16(__rev2_263, __p3_263)}); \ |
| 71906 | int16x8_t __reint2_263 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_263, *(int16x8_t *) &__reint1_263, __p2_263); \ | 61426 | __ret_263 = __builtin_shufflevector(__ret_263, __ret_263, 3, 2, 1, 0); \ |
| 71907 | __ret_263 = *(float16x8_t *) &__reint2_263; \ | | |
| 71908 | __ret_263 = __builtin_shufflevector(__ret_263, __ret_263, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 71909 | __ret_263; \ | 61427 | __ret_263; \ |
| 71910 | }) | 61428 | }) |
| 71911 | #endif | 61429 | #endif |
| 71912 | | 61430 | |
| 71913 | #if defined(__ARM_FEATURE_FP16FML) && defined(__aarch64__) | | |
| 71914 | #ifdef __LITTLE_ENDIAN__ | 61431 | #ifdef __LITTLE_ENDIAN__ |
| 71915 | #define vfmlalq_lane_high_f16(__p0_264, __p1_264, __p2_264, __p3_264) __extension__ ({ \ | 61432 | #define vfmlal_lane_low_f16(__p0_264, __p1_264, __p2_264, __p3_264) __extension__ ({ \ |
| 71916 | float32x4_t __s0_264 = __p0_264; \ | 61433 | float32x2_t __s0_264 = __p0_264; \ |
| 71917 | float16x8_t __s1_264 = __p1_264; \ | 61434 | float16x4_t __s1_264 = __p1_264; \ |
| 71918 | float16x4_t __s2_264 = __p2_264; \ | 61435 | float16x4_t __s2_264 = __p2_264; \ |
| 71919 | float32x4_t __ret_264; \ | 61436 | float32x2_t __ret_264; \ |
| 71920 | __ret_264 = vfmlalq_high_f16(__s0_264, __s1_264, (float16x8_t) {vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264)}); \ | 61437 | __ret_264 = vfmlal_low_f16(__s0_264, __s1_264, (float16x4_t) {vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264), vget_lane_f16(__s2_264, __p3_264)}); \ |
| 71921 | __ret_264; \ | 61438 | __ret_264; \ |
| 71922 | }) | 61439 | }) |
| 71923 | #else | 61440 | #else |
| 71924 | #define vfmlalq_lane_high_f16(__p0_265, __p1_265, __p2_265, __p3_265) __extension__ ({ \ | 61441 | #define vfmlal_lane_low_f16(__p0_265, __p1_265, __p2_265, __p3_265) __extension__ ({ \ |
| 71925 | float32x4_t __s0_265 = __p0_265; \ | 61442 | float32x2_t __s0_265 = __p0_265; \ |
| 71926 | float16x8_t __s1_265 = __p1_265; \ | 61443 | float16x4_t __s1_265 = __p1_265; \ |
| 71927 | float16x4_t __s2_265 = __p2_265; \ | 61444 | float16x4_t __s2_265 = __p2_265; \ |
| 71928 | float32x4_t __rev0_265; __rev0_265 = __builtin_shufflevector(__s0_265, __s0_265, 3, 2, 1, 0); \ | 61445 | float32x2_t __rev0_265; __rev0_265 = __builtin_shufflevector(__s0_265, __s0_265, 1, 0); \ |
| 71929 | float16x8_t __rev1_265; __rev1_265 = __builtin_shufflevector(__s1_265, __s1_265, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61446 | float16x4_t __rev1_265; __rev1_265 = __builtin_shufflevector(__s1_265, __s1_265, 3, 2, 1, 0); \ |
| 71930 | float16x4_t __rev2_265; __rev2_265 = __builtin_shufflevector(__s2_265, __s2_265, 3, 2, 1, 0); \ | 61447 | float16x4_t __rev2_265; __rev2_265 = __builtin_shufflevector(__s2_265, __s2_265, 3, 2, 1, 0); \ |
| 71931 | float32x4_t __ret_265; \ | 61448 | float32x2_t __ret_265; \ |
| 71932 | __ret_265 = __noswap_vfmlalq_high_f16(__rev0_265, __rev1_265, (float16x8_t) {__noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265)}); \ | 61449 | __ret_265 = __noswap_vfmlal_low_f16(__rev0_265, __rev1_265, (float16x4_t) {__noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265), __noswap_vget_lane_f16(__rev2_265, __p3_265)}); \ |
| 71933 | __ret_265 = __builtin_shufflevector(__ret_265, __ret_265, 3, 2, 1, 0); \ | 61450 | __ret_265 = __builtin_shufflevector(__ret_265, __ret_265, 1, 0); \ |
| 71934 | __ret_265; \ | 61451 | __ret_265; \ |
| 71935 | }) | 61452 | }) |
| 71936 | #endif | 61453 | #endif |
| 71937 | | 61454 | |
| 71938 | #ifdef __LITTLE_ENDIAN__ | 61455 | #ifdef __LITTLE_ENDIAN__ |
| 71939 | #define vfmlal_lane_high_f16(__p0_266, __p1_266, __p2_266, __p3_266) __extension__ ({ \ | 61456 | #define vfmlalq_laneq_high_f16(__p0_266, __p1_266, __p2_266, __p3_266) __extension__ ({ \ |
| 71940 | float32x2_t __s0_266 = __p0_266; \ | 61457 | float32x4_t __s0_266 = __p0_266; \ |
| 71941 | float16x4_t __s1_266 = __p1_266; \ | 61458 | float16x8_t __s1_266 = __p1_266; \ |
| 71942 | float16x4_t __s2_266 = __p2_266; \ | 61459 | float16x8_t __s2_266 = __p2_266; \ |
| 71943 | float32x2_t __ret_266; \ | 61460 | float32x4_t __ret_266; \ |
| 71944 | __ret_266 = vfmlal_high_f16(__s0_266, __s1_266, (float16x4_t) {vget_lane_f16(__s2_266, __p3_266), vget_lane_f16(__s2_266, __p3_266), vget_lane_f16(__s2_266, __p3_266), vget_lane_f16(__s2_266, __p3_266)}); \ | 61461 | __ret_266 = vfmlalq_high_f16(__s0_266, __s1_266, (float16x8_t) {vgetq_lane_f16(__s2_266, __p3_266), vgetq_lane_f16(__s2_266, __p3_266), vgetq_lane_f16(__s2_266, __p3_266), vgetq_lane_f16(__s2_266, __p3_266), vgetq_lane_f16(__s2_266, __p3_266), vgetq_lane_f16(__s2_266, __p3_266), vgetq_lane_f16(__s2_266, __p3_266), vgetq_lane_f16(__s2_266, __p3_266)}); \ |
| 71945 | __ret_266; \ | 61462 | __ret_266; \ |
| 71946 | }) | 61463 | }) |
| 71947 | #else | 61464 | #else |
| 71948 | #define vfmlal_lane_high_f16(__p0_267, __p1_267, __p2_267, __p3_267) __extension__ ({ \ | 61465 | #define vfmlalq_laneq_high_f16(__p0_267, __p1_267, __p2_267, __p3_267) __extension__ ({ \ |
| 71949 | float32x2_t __s0_267 = __p0_267; \ | 61466 | float32x4_t __s0_267 = __p0_267; \ |
| 71950 | float16x4_t __s1_267 = __p1_267; \ | 61467 | float16x8_t __s1_267 = __p1_267; \ |
| 71951 | float16x4_t __s2_267 = __p2_267; \ | 61468 | float16x8_t __s2_267 = __p2_267; \ |
| 71952 | float32x2_t __rev0_267; __rev0_267 = __builtin_shufflevector(__s0_267, __s0_267, 1, 0); \ | 61469 | float32x4_t __rev0_267; __rev0_267 = __builtin_shufflevector(__s0_267, __s0_267, 3, 2, 1, 0); \ |
| 71953 | float16x4_t __rev1_267; __rev1_267 = __builtin_shufflevector(__s1_267, __s1_267, 3, 2, 1, 0); \ | 61470 | float16x8_t __rev1_267; __rev1_267 = __builtin_shufflevector(__s1_267, __s1_267, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 71954 | float16x4_t __rev2_267; __rev2_267 = __builtin_shufflevector(__s2_267, __s2_267, 3, 2, 1, 0); \ | 61471 | float16x8_t __rev2_267; __rev2_267 = __builtin_shufflevector(__s2_267, __s2_267, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 71955 | float32x2_t __ret_267; \ | 61472 | float32x4_t __ret_267; \ |
| 71956 | __ret_267 = __noswap_vfmlal_high_f16(__rev0_267, __rev1_267, (float16x4_t) {__noswap_vget_lane_f16(__rev2_267, __p3_267), __noswap_vget_lane_f16(__rev2_267, __p3_267), __noswap_vget_lane_f16(__rev2_267, __p3_267), __noswap_vget_lane_f16(__rev2_267, __p3_267)}); \ | 61473 | __ret_267 = __noswap_vfmlalq_high_f16(__rev0_267, __rev1_267, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_267, __p3_267), __noswap_vgetq_lane_f16(__rev2_267, __p3_267), __noswap_vgetq_lane_f16(__rev2_267, __p3_267), __noswap_vgetq_lane_f16(__rev2_267, __p3_267), __noswap_vgetq_lane_f16(__rev2_267, __p3_267), __noswap_vgetq_lane_f16(__rev2_267, __p3_267), __noswap_vgetq_lane_f16(__rev2_267, __p3_267), __noswap_vgetq_lane_f16(__rev2_267, __p3_267)}); \ |
| 71957 | __ret_267 = __builtin_shufflevector(__ret_267, __ret_267, 1, 0); \ | 61474 | __ret_267 = __builtin_shufflevector(__ret_267, __ret_267, 3, 2, 1, 0); \ |
| 71958 | __ret_267; \ | 61475 | __ret_267; \ |
| 71959 | }) | 61476 | }) |
| 71960 | #endif | 61477 | #endif |
| 71961 | | 61478 | |
| 71962 | #ifdef __LITTLE_ENDIAN__ | 61479 | #ifdef __LITTLE_ENDIAN__ |
| 71963 | #define vfmlalq_lane_low_f16(__p0_268, __p1_268, __p2_268, __p3_268) __extension__ ({ \ | 61480 | #define vfmlal_laneq_high_f16(__p0_268, __p1_268, __p2_268, __p3_268) __extension__ ({ \ |
| 71964 | float32x4_t __s0_268 = __p0_268; \ | 61481 | float32x2_t __s0_268 = __p0_268; \ |
| 71965 | float16x8_t __s1_268 = __p1_268; \ | 61482 | float16x4_t __s1_268 = __p1_268; \ |
| 71966 | float16x4_t __s2_268 = __p2_268; \ | 61483 | float16x8_t __s2_268 = __p2_268; \ |
| 71967 | float32x4_t __ret_268; \ | 61484 | float32x2_t __ret_268; \ |
| 71968 | __ret_268 = vfmlalq_low_f16(__s0_268, __s1_268, (float16x8_t) {vget_lane_f16(__s2_268, __p3_268), vget_lane_f16(__s2_268, __p3_268), vget_lane_f16(__s2_268, __p3_268), vget_lane_f16(__s2_268, __p3_268), vget_lane_f16(__s2_268, __p3_268), vget_lane_f16(__s2_268, __p3_268), vget_lane_f16(__s2_268, __p3_268), vget_lane_f16(__s2_268, __p3_268)}); \ | 61485 | __ret_268 = vfmlal_high_f16(__s0_268, __s1_268, (float16x4_t) {vgetq_lane_f16(__s2_268, __p3_268), vgetq_lane_f16(__s2_268, __p3_268), vgetq_lane_f16(__s2_268, __p3_268), vgetq_lane_f16(__s2_268, __p3_268)}); \ |
| 71969 | __ret_268; \ | 61486 | __ret_268; \ |
| 71970 | }) | 61487 | }) |
| 71971 | #else | 61488 | #else |
| 71972 | #define vfmlalq_lane_low_f16(__p0_269, __p1_269, __p2_269, __p3_269) __extension__ ({ \ | 61489 | #define vfmlal_laneq_high_f16(__p0_269, __p1_269, __p2_269, __p3_269) __extension__ ({ \ |
| 71973 | float32x4_t __s0_269 = __p0_269; \ | 61490 | float32x2_t __s0_269 = __p0_269; \ |
| 71974 | float16x8_t __s1_269 = __p1_269; \ | 61491 | float16x4_t __s1_269 = __p1_269; \ |
| 71975 | float16x4_t __s2_269 = __p2_269; \ | 61492 | float16x8_t __s2_269 = __p2_269; \ |
| 71976 | float32x4_t __rev0_269; __rev0_269 = __builtin_shufflevector(__s0_269, __s0_269, 3, 2, 1, 0); \ | 61493 | float32x2_t __rev0_269; __rev0_269 = __builtin_shufflevector(__s0_269, __s0_269, 1, 0); \ |
| 71977 | float16x8_t __rev1_269; __rev1_269 = __builtin_shufflevector(__s1_269, __s1_269, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61494 | float16x4_t __rev1_269; __rev1_269 = __builtin_shufflevector(__s1_269, __s1_269, 3, 2, 1, 0); \ |
| 71978 | float16x4_t __rev2_269; __rev2_269 = __builtin_shufflevector(__s2_269, __s2_269, 3, 2, 1, 0); \ | 61495 | float16x8_t __rev2_269; __rev2_269 = __builtin_shufflevector(__s2_269, __s2_269, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 71979 | float32x4_t __ret_269; \ | 61496 | float32x2_t __ret_269; \ |
| 71980 | __ret_269 = __noswap_vfmlalq_low_f16(__rev0_269, __rev1_269, (float16x8_t) {__noswap_vget_lane_f16(__rev2_269, __p3_269), __noswap_vget_lane_f16(__rev2_269, __p3_269), __noswap_vget_lane_f16(__rev2_269, __p3_269), __noswap_vget_lane_f16(__rev2_269, __p3_269), __noswap_vget_lane_f16(__rev2_269, __p3_269), __noswap_vget_lane_f16(__rev2_269, __p3_269), __noswap_vget_lane_f16(__rev2_269, __p3_269), __noswap_vget_lane_f16(__rev2_269, __p3_269)}); \ | 61497 | __ret_269 = __noswap_vfmlal_high_f16(__rev0_269, __rev1_269, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_269, __p3_269), __noswap_vgetq_lane_f16(__rev2_269, __p3_269), __noswap_vgetq_lane_f16(__rev2_269, __p3_269), __noswap_vgetq_lane_f16(__rev2_269, __p3_269)}); \ |
| 71981 | __ret_269 = __builtin_shufflevector(__ret_269, __ret_269, 3, 2, 1, 0); \ | 61498 | __ret_269 = __builtin_shufflevector(__ret_269, __ret_269, 1, 0); \ |
| 71982 | __ret_269; \ | 61499 | __ret_269; \ |
| 71983 | }) | 61500 | }) |
| 71984 | #endif | 61501 | #endif |
| 71985 | | 61502 | |
| 71986 | #ifdef __LITTLE_ENDIAN__ | 61503 | #ifdef __LITTLE_ENDIAN__ |
| 71987 | #define vfmlal_lane_low_f16(__p0_270, __p1_270, __p2_270, __p3_270) __extension__ ({ \ | 61504 | #define vfmlalq_laneq_low_f16(__p0_270, __p1_270, __p2_270, __p3_270) __extension__ ({ \ |
| 71988 | float32x2_t __s0_270 = __p0_270; \ | 61505 | float32x4_t __s0_270 = __p0_270; \ |
| 71989 | float16x4_t __s1_270 = __p1_270; \ | 61506 | float16x8_t __s1_270 = __p1_270; \ |
| 71990 | float16x4_t __s2_270 = __p2_270; \ | 61507 | float16x8_t __s2_270 = __p2_270; \ |
| 71991 | float32x2_t __ret_270; \ | 61508 | float32x4_t __ret_270; \ |
| 71992 | __ret_270 = vfmlal_low_f16(__s0_270, __s1_270, (float16x4_t) {vget_lane_f16(__s2_270, __p3_270), vget_lane_f16(__s2_270, __p3_270), vget_lane_f16(__s2_270, __p3_270), vget_lane_f16(__s2_270, __p3_270)}); \ | 61509 | __ret_270 = vfmlalq_low_f16(__s0_270, __s1_270, (float16x8_t) {vgetq_lane_f16(__s2_270, __p3_270), vgetq_lane_f16(__s2_270, __p3_270), vgetq_lane_f16(__s2_270, __p3_270), vgetq_lane_f16(__s2_270, __p3_270), vgetq_lane_f16(__s2_270, __p3_270), vgetq_lane_f16(__s2_270, __p3_270), vgetq_lane_f16(__s2_270, __p3_270), vgetq_lane_f16(__s2_270, __p3_270)}); \ |
| 71993 | __ret_270; \ | 61510 | __ret_270; \ |
| 71994 | }) | 61511 | }) |
| 71995 | #else | 61512 | #else |
| 71996 | #define vfmlal_lane_low_f16(__p0_271, __p1_271, __p2_271, __p3_271) __extension__ ({ \ | 61513 | #define vfmlalq_laneq_low_f16(__p0_271, __p1_271, __p2_271, __p3_271) __extension__ ({ \ |
| 71997 | float32x2_t __s0_271 = __p0_271; \ | 61514 | float32x4_t __s0_271 = __p0_271; \ |
| 71998 | float16x4_t __s1_271 = __p1_271; \ | 61515 | float16x8_t __s1_271 = __p1_271; \ |
| 71999 | float16x4_t __s2_271 = __p2_271; \ | 61516 | float16x8_t __s2_271 = __p2_271; \ |
| 72000 | float32x2_t __rev0_271; __rev0_271 = __builtin_shufflevector(__s0_271, __s0_271, 1, 0); \ | 61517 | float32x4_t __rev0_271; __rev0_271 = __builtin_shufflevector(__s0_271, __s0_271, 3, 2, 1, 0); \ |
| 72001 | float16x4_t __rev1_271; __rev1_271 = __builtin_shufflevector(__s1_271, __s1_271, 3, 2, 1, 0); \ | 61518 | float16x8_t __rev1_271; __rev1_271 = __builtin_shufflevector(__s1_271, __s1_271, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72002 | float16x4_t __rev2_271; __rev2_271 = __builtin_shufflevector(__s2_271, __s2_271, 3, 2, 1, 0); \ | 61519 | float16x8_t __rev2_271; __rev2_271 = __builtin_shufflevector(__s2_271, __s2_271, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72003 | float32x2_t __ret_271; \ | 61520 | float32x4_t __ret_271; \ |
| 72004 | __ret_271 = __noswap_vfmlal_low_f16(__rev0_271, __rev1_271, (float16x4_t) {__noswap_vget_lane_f16(__rev2_271, __p3_271), __noswap_vget_lane_f16(__rev2_271, __p3_271), __noswap_vget_lane_f16(__rev2_271, __p3_271), __noswap_vget_lane_f16(__rev2_271, __p3_271)}); \ | 61521 | __ret_271 = __noswap_vfmlalq_low_f16(__rev0_271, __rev1_271, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_271, __p3_271), __noswap_vgetq_lane_f16(__rev2_271, __p3_271), __noswap_vgetq_lane_f16(__rev2_271, __p3_271), __noswap_vgetq_lane_f16(__rev2_271, __p3_271), __noswap_vgetq_lane_f16(__rev2_271, __p3_271), __noswap_vgetq_lane_f16(__rev2_271, __p3_271), __noswap_vgetq_lane_f16(__rev2_271, __p3_271), __noswap_vgetq_lane_f16(__rev2_271, __p3_271)}); \ |
| 72005 | __ret_271 = __builtin_shufflevector(__ret_271, __ret_271, 1, 0); \ | 61522 | __ret_271 = __builtin_shufflevector(__ret_271, __ret_271, 3, 2, 1, 0); \ |
| 72006 | __ret_271; \ | 61523 | __ret_271; \ |
| 72007 | }) | 61524 | }) |
| 72008 | #endif | 61525 | #endif |
| 72009 | | 61526 | |
| 72010 | #ifdef __LITTLE_ENDIAN__ | 61527 | #ifdef __LITTLE_ENDIAN__ |
| 72011 | #define vfmlalq_laneq_high_f16(__p0_272, __p1_272, __p2_272, __p3_272) __extension__ ({ \ | 61528 | #define vfmlal_laneq_low_f16(__p0_272, __p1_272, __p2_272, __p3_272) __extension__ ({ \ |
| 72012 | float32x4_t __s0_272 = __p0_272; \ | 61529 | float32x2_t __s0_272 = __p0_272; \ |
| 72013 | float16x8_t __s1_272 = __p1_272; \ | 61530 | float16x4_t __s1_272 = __p1_272; \ |
| 72014 | float16x8_t __s2_272 = __p2_272; \ | 61531 | float16x8_t __s2_272 = __p2_272; \ |
| 72015 | float32x4_t __ret_272; \ | 61532 | float32x2_t __ret_272; \ |
| 72016 | __ret_272 = vfmlalq_high_f16(__s0_272, __s1_272, (float16x8_t) {vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272)}); \ | 61533 | __ret_272 = vfmlal_low_f16(__s0_272, __s1_272, (float16x4_t) {vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272), vgetq_lane_f16(__s2_272, __p3_272)}); \ |
| 72017 | __ret_272; \ | 61534 | __ret_272; \ |
| 72018 | }) | 61535 | }) |
| 72019 | #else | 61536 | #else |
| 72020 | #define vfmlalq_laneq_high_f16(__p0_273, __p1_273, __p2_273, __p3_273) __extension__ ({ \ | 61537 | #define vfmlal_laneq_low_f16(__p0_273, __p1_273, __p2_273, __p3_273) __extension__ ({ \ |
| 72021 | float32x4_t __s0_273 = __p0_273; \ | 61538 | float32x2_t __s0_273 = __p0_273; \ |
| 72022 | float16x8_t __s1_273 = __p1_273; \ | 61539 | float16x4_t __s1_273 = __p1_273; \ |
| 72023 | float16x8_t __s2_273 = __p2_273; \ | 61540 | float16x8_t __s2_273 = __p2_273; \ |
| 72024 | float32x4_t __rev0_273; __rev0_273 = __builtin_shufflevector(__s0_273, __s0_273, 3, 2, 1, 0); \ | 61541 | float32x2_t __rev0_273; __rev0_273 = __builtin_shufflevector(__s0_273, __s0_273, 1, 0); \ |
| 72025 | float16x8_t __rev1_273; __rev1_273 = __builtin_shufflevector(__s1_273, __s1_273, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61542 | float16x4_t __rev1_273; __rev1_273 = __builtin_shufflevector(__s1_273, __s1_273, 3, 2, 1, 0); \ |
| 72026 | float16x8_t __rev2_273; __rev2_273 = __builtin_shufflevector(__s2_273, __s2_273, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61543 | float16x8_t __rev2_273; __rev2_273 = __builtin_shufflevector(__s2_273, __s2_273, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72027 | float32x4_t __ret_273; \ | 61544 | float32x2_t __ret_273; \ |
| 72028 | __ret_273 = __noswap_vfmlalq_high_f16(__rev0_273, __rev1_273, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273)}); \ | 61545 | __ret_273 = __noswap_vfmlal_low_f16(__rev0_273, __rev1_273, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273), __noswap_vgetq_lane_f16(__rev2_273, __p3_273)}); \ |
| 72029 | __ret_273 = __builtin_shufflevector(__ret_273, __ret_273, 3, 2, 1, 0); \ | 61546 | __ret_273 = __builtin_shufflevector(__ret_273, __ret_273, 1, 0); \ |
| 72030 | __ret_273; \ | 61547 | __ret_273; \ |
| 72031 | }) | 61548 | }) |
| 72032 | #endif | 61549 | #endif |
| 72033 | | 61550 | |
| 72034 | #ifdef __LITTLE_ENDIAN__ | 61551 | #ifdef __LITTLE_ENDIAN__ |
| 72035 | #define vfmlal_laneq_high_f16(__p0_274, __p1_274, __p2_274, __p3_274) __extension__ ({ \ | 61552 | #define vfmlslq_lane_high_f16(__p0_274, __p1_274, __p2_274, __p3_274) __extension__ ({ \ |
| 72036 | float32x2_t __s0_274 = __p0_274; \ | 61553 | float32x4_t __s0_274 = __p0_274; \ |
| 72037 | float16x4_t __s1_274 = __p1_274; \ | 61554 | float16x8_t __s1_274 = __p1_274; \ |
| 72038 | float16x8_t __s2_274 = __p2_274; \ | 61555 | float16x4_t __s2_274 = __p2_274; \ |
| 72039 | float32x2_t __ret_274; \ | 61556 | float32x4_t __ret_274; \ |
| 72040 | __ret_274 = vfmlal_high_f16(__s0_274, __s1_274, (float16x4_t) {vgetq_lane_f16(__s2_274, __p3_274), vgetq_lane_f16(__s2_274, __p3_274), vgetq_lane_f16(__s2_274, __p3_274), vgetq_lane_f16(__s2_274, __p3_274)}); \ | 61557 | __ret_274 = vfmlslq_high_f16(__s0_274, __s1_274, (float16x8_t) {vget_lane_f16(__s2_274, __p3_274), vget_lane_f16(__s2_274, __p3_274), vget_lane_f16(__s2_274, __p3_274), vget_lane_f16(__s2_274, __p3_274), vget_lane_f16(__s2_274, __p3_274), vget_lane_f16(__s2_274, __p3_274), vget_lane_f16(__s2_274, __p3_274), vget_lane_f16(__s2_274, __p3_274)}); \ |
| 72041 | __ret_274; \ | 61558 | __ret_274; \ |
| 72042 | }) | 61559 | }) |
| 72043 | #else | 61560 | #else |
| 72044 | #define vfmlal_laneq_high_f16(__p0_275, __p1_275, __p2_275, __p3_275) __extension__ ({ \ | 61561 | #define vfmlslq_lane_high_f16(__p0_275, __p1_275, __p2_275, __p3_275) __extension__ ({ \ |
| 72045 | float32x2_t __s0_275 = __p0_275; \ | 61562 | float32x4_t __s0_275 = __p0_275; \ |
| 72046 | float16x4_t __s1_275 = __p1_275; \ | 61563 | float16x8_t __s1_275 = __p1_275; \ |
| 72047 | float16x8_t __s2_275 = __p2_275; \ | 61564 | float16x4_t __s2_275 = __p2_275; \ |
| 72048 | float32x2_t __rev0_275; __rev0_275 = __builtin_shufflevector(__s0_275, __s0_275, 1, 0); \ | 61565 | float32x4_t __rev0_275; __rev0_275 = __builtin_shufflevector(__s0_275, __s0_275, 3, 2, 1, 0); \ |
| 72049 | float16x4_t __rev1_275; __rev1_275 = __builtin_shufflevector(__s1_275, __s1_275, 3, 2, 1, 0); \ | 61566 | float16x8_t __rev1_275; __rev1_275 = __builtin_shufflevector(__s1_275, __s1_275, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72050 | float16x8_t __rev2_275; __rev2_275 = __builtin_shufflevector(__s2_275, __s2_275, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61567 | float16x4_t __rev2_275; __rev2_275 = __builtin_shufflevector(__s2_275, __s2_275, 3, 2, 1, 0); \ |
| 72051 | float32x2_t __ret_275; \ | 61568 | float32x4_t __ret_275; \ |
| 72052 | __ret_275 = __noswap_vfmlal_high_f16(__rev0_275, __rev1_275, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_275, __p3_275), __noswap_vgetq_lane_f16(__rev2_275, __p3_275), __noswap_vgetq_lane_f16(__rev2_275, __p3_275), __noswap_vgetq_lane_f16(__rev2_275, __p3_275)}); \ | 61569 | __ret_275 = __noswap_vfmlslq_high_f16(__rev0_275, __rev1_275, (float16x8_t) {__noswap_vget_lane_f16(__rev2_275, __p3_275), __noswap_vget_lane_f16(__rev2_275, __p3_275), __noswap_vget_lane_f16(__rev2_275, __p3_275), __noswap_vget_lane_f16(__rev2_275, __p3_275), __noswap_vget_lane_f16(__rev2_275, __p3_275), __noswap_vget_lane_f16(__rev2_275, __p3_275), __noswap_vget_lane_f16(__rev2_275, __p3_275), __noswap_vget_lane_f16(__rev2_275, __p3_275)}); \ |
| 72053 | __ret_275 = __builtin_shufflevector(__ret_275, __ret_275, 1, 0); \ | 61570 | __ret_275 = __builtin_shufflevector(__ret_275, __ret_275, 3, 2, 1, 0); \ |
| 72054 | __ret_275; \ | 61571 | __ret_275; \ |
| 72055 | }) | 61572 | }) |
| 72056 | #endif | 61573 | #endif |
| 72057 | | 61574 | |
| 72058 | #ifdef __LITTLE_ENDIAN__ | 61575 | #ifdef __LITTLE_ENDIAN__ |
| 72059 | #define vfmlalq_laneq_low_f16(__p0_276, __p1_276, __p2_276, __p3_276) __extension__ ({ \ | 61576 | #define vfmlsl_lane_high_f16(__p0_276, __p1_276, __p2_276, __p3_276) __extension__ ({ \ |
| 72060 | float32x4_t __s0_276 = __p0_276; \ | 61577 | float32x2_t __s0_276 = __p0_276; \ |
| 72061 | float16x8_t __s1_276 = __p1_276; \ | 61578 | float16x4_t __s1_276 = __p1_276; \ |
| 72062 | float16x8_t __s2_276 = __p2_276; \ | 61579 | float16x4_t __s2_276 = __p2_276; \ |
| 72063 | float32x4_t __ret_276; \ | 61580 | float32x2_t __ret_276; \ |
| 72064 | __ret_276 = vfmlalq_low_f16(__s0_276, __s1_276, (float16x8_t) {vgetq_lane_f16(__s2_276, __p3_276), vgetq_lane_f16(__s2_276, __p3_276), vgetq_lane_f16(__s2_276, __p3_276), vgetq_lane_f16(__s2_276, __p3_276), vgetq_lane_f16(__s2_276, __p3_276), vgetq_lane_f16(__s2_276, __p3_276), vgetq_lane_f16(__s2_276, __p3_276), vgetq_lane_f16(__s2_276, __p3_276)}); \ | 61581 | __ret_276 = vfmlsl_high_f16(__s0_276, __s1_276, (float16x4_t) {vget_lane_f16(__s2_276, __p3_276), vget_lane_f16(__s2_276, __p3_276), vget_lane_f16(__s2_276, __p3_276), vget_lane_f16(__s2_276, __p3_276)}); \ |
| 72065 | __ret_276; \ | 61582 | __ret_276; \ |
| 72066 | }) | 61583 | }) |
| 72067 | #else | 61584 | #else |
| 72068 | #define vfmlalq_laneq_low_f16(__p0_277, __p1_277, __p2_277, __p3_277) __extension__ ({ \ | 61585 | #define vfmlsl_lane_high_f16(__p0_277, __p1_277, __p2_277, __p3_277) __extension__ ({ \ |
| 72069 | float32x4_t __s0_277 = __p0_277; \ | 61586 | float32x2_t __s0_277 = __p0_277; \ |
| 72070 | float16x8_t __s1_277 = __p1_277; \ | 61587 | float16x4_t __s1_277 = __p1_277; \ |
| 72071 | float16x8_t __s2_277 = __p2_277; \ | 61588 | float16x4_t __s2_277 = __p2_277; \ |
| 72072 | float32x4_t __rev0_277; __rev0_277 = __builtin_shufflevector(__s0_277, __s0_277, 3, 2, 1, 0); \ | 61589 | float32x2_t __rev0_277; __rev0_277 = __builtin_shufflevector(__s0_277, __s0_277, 1, 0); \ |
| 72073 | float16x8_t __rev1_277; __rev1_277 = __builtin_shufflevector(__s1_277, __s1_277, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61590 | float16x4_t __rev1_277; __rev1_277 = __builtin_shufflevector(__s1_277, __s1_277, 3, 2, 1, 0); \ |
| 72074 | float16x8_t __rev2_277; __rev2_277 = __builtin_shufflevector(__s2_277, __s2_277, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61591 | float16x4_t __rev2_277; __rev2_277 = __builtin_shufflevector(__s2_277, __s2_277, 3, 2, 1, 0); \ |
| 72075 | float32x4_t __ret_277; \ | 61592 | float32x2_t __ret_277; \ |
| 72076 | __ret_277 = __noswap_vfmlalq_low_f16(__rev0_277, __rev1_277, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_277, __p3_277), __noswap_vgetq_lane_f16(__rev2_277, __p3_277), __noswap_vgetq_lane_f16(__rev2_277, __p3_277), __noswap_vgetq_lane_f16(__rev2_277, __p3_277), __noswap_vgetq_lane_f16(__rev2_277, __p3_277), __noswap_vgetq_lane_f16(__rev2_277, __p3_277), __noswap_vgetq_lane_f16(__rev2_277, __p3_277), __noswap_vgetq_lane_f16(__rev2_277, __p3_277)}); \ | 61593 | __ret_277 = __noswap_vfmlsl_high_f16(__rev0_277, __rev1_277, (float16x4_t) {__noswap_vget_lane_f16(__rev2_277, __p3_277), __noswap_vget_lane_f16(__rev2_277, __p3_277), __noswap_vget_lane_f16(__rev2_277, __p3_277), __noswap_vget_lane_f16(__rev2_277, __p3_277)}); \ |
| 72077 | __ret_277 = __builtin_shufflevector(__ret_277, __ret_277, 3, 2, 1, 0); \ | 61594 | __ret_277 = __builtin_shufflevector(__ret_277, __ret_277, 1, 0); \ |
| 72078 | __ret_277; \ | 61595 | __ret_277; \ |
| 72079 | }) | 61596 | }) |
| 72080 | #endif | 61597 | #endif |
| 72081 | | 61598 | |
| 72082 | #ifdef __LITTLE_ENDIAN__ | 61599 | #ifdef __LITTLE_ENDIAN__ |
| 72083 | #define vfmlal_laneq_low_f16(__p0_278, __p1_278, __p2_278, __p3_278) __extension__ ({ \ | 61600 | #define vfmlslq_lane_low_f16(__p0_278, __p1_278, __p2_278, __p3_278) __extension__ ({ \ |
| 72084 | float32x2_t __s0_278 = __p0_278; \ | 61601 | float32x4_t __s0_278 = __p0_278; \ |
| 72085 | float16x4_t __s1_278 = __p1_278; \ | 61602 | float16x8_t __s1_278 = __p1_278; \ |
| 72086 | float16x8_t __s2_278 = __p2_278; \ | 61603 | float16x4_t __s2_278 = __p2_278; \ |
| 72087 | float32x2_t __ret_278; \ | 61604 | float32x4_t __ret_278; \ |
| 72088 | __ret_278 = vfmlal_low_f16(__s0_278, __s1_278, (float16x4_t) {vgetq_lane_f16(__s2_278, __p3_278), vgetq_lane_f16(__s2_278, __p3_278), vgetq_lane_f16(__s2_278, __p3_278), vgetq_lane_f16(__s2_278, __p3_278)}); \ | 61605 | __ret_278 = vfmlslq_low_f16(__s0_278, __s1_278, (float16x8_t) {vget_lane_f16(__s2_278, __p3_278), vget_lane_f16(__s2_278, __p3_278), vget_lane_f16(__s2_278, __p3_278), vget_lane_f16(__s2_278, __p3_278), vget_lane_f16(__s2_278, __p3_278), vget_lane_f16(__s2_278, __p3_278), vget_lane_f16(__s2_278, __p3_278), vget_lane_f16(__s2_278, __p3_278)}); \ |
| 72089 | __ret_278; \ | 61606 | __ret_278; \ |
| 72090 | }) | 61607 | }) |
| 72091 | #else | 61608 | #else |
| 72092 | #define vfmlal_laneq_low_f16(__p0_279, __p1_279, __p2_279, __p3_279) __extension__ ({ \ | 61609 | #define vfmlslq_lane_low_f16(__p0_279, __p1_279, __p2_279, __p3_279) __extension__ ({ \ |
| 72093 | float32x2_t __s0_279 = __p0_279; \ | 61610 | float32x4_t __s0_279 = __p0_279; \ |
| 72094 | float16x4_t __s1_279 = __p1_279; \ | 61611 | float16x8_t __s1_279 = __p1_279; \ |
| 72095 | float16x8_t __s2_279 = __p2_279; \ | 61612 | float16x4_t __s2_279 = __p2_279; \ |
| 72096 | float32x2_t __rev0_279; __rev0_279 = __builtin_shufflevector(__s0_279, __s0_279, 1, 0); \ | 61613 | float32x4_t __rev0_279; __rev0_279 = __builtin_shufflevector(__s0_279, __s0_279, 3, 2, 1, 0); \ |
| 72097 | float16x4_t __rev1_279; __rev1_279 = __builtin_shufflevector(__s1_279, __s1_279, 3, 2, 1, 0); \ | 61614 | float16x8_t __rev1_279; __rev1_279 = __builtin_shufflevector(__s1_279, __s1_279, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72098 | float16x8_t __rev2_279; __rev2_279 = __builtin_shufflevector(__s2_279, __s2_279, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61615 | float16x4_t __rev2_279; __rev2_279 = __builtin_shufflevector(__s2_279, __s2_279, 3, 2, 1, 0); \ |
| 72099 | float32x2_t __ret_279; \ | 61616 | float32x4_t __ret_279; \ |
| 72100 | __ret_279 = __noswap_vfmlal_low_f16(__rev0_279, __rev1_279, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_279, __p3_279), __noswap_vgetq_lane_f16(__rev2_279, __p3_279), __noswap_vgetq_lane_f16(__rev2_279, __p3_279), __noswap_vgetq_lane_f16(__rev2_279, __p3_279)}); \ | 61617 | __ret_279 = __noswap_vfmlslq_low_f16(__rev0_279, __rev1_279, (float16x8_t) {__noswap_vget_lane_f16(__rev2_279, __p3_279), __noswap_vget_lane_f16(__rev2_279, __p3_279), __noswap_vget_lane_f16(__rev2_279, __p3_279), __noswap_vget_lane_f16(__rev2_279, __p3_279), __noswap_vget_lane_f16(__rev2_279, __p3_279), __noswap_vget_lane_f16(__rev2_279, __p3_279), __noswap_vget_lane_f16(__rev2_279, __p3_279), __noswap_vget_lane_f16(__rev2_279, __p3_279)}); \ |
| 72101 | __ret_279 = __builtin_shufflevector(__ret_279, __ret_279, 1, 0); \ | 61618 | __ret_279 = __builtin_shufflevector(__ret_279, __ret_279, 3, 2, 1, 0); \ |
| 72102 | __ret_279; \ | 61619 | __ret_279; \ |
| 72103 | }) | 61620 | }) |
| 72104 | #endif | 61621 | #endif |
| 72105 | | 61622 | |
| 72106 | #ifdef __LITTLE_ENDIAN__ | 61623 | #ifdef __LITTLE_ENDIAN__ |
| 72107 | #define vfmlslq_lane_high_f16(__p0_280, __p1_280, __p2_280, __p3_280) __extension__ ({ \ | 61624 | #define vfmlsl_lane_low_f16(__p0_280, __p1_280, __p2_280, __p3_280) __extension__ ({ \ |
| 72108 | float32x4_t __s0_280 = __p0_280; \ | 61625 | float32x2_t __s0_280 = __p0_280; \ |
| 72109 | float16x8_t __s1_280 = __p1_280; \ | 61626 | float16x4_t __s1_280 = __p1_280; \ |
| 72110 | float16x4_t __s2_280 = __p2_280; \ | 61627 | float16x4_t __s2_280 = __p2_280; \ |
| 72111 | float32x4_t __ret_280; \ | 61628 | float32x2_t __ret_280; \ |
| 72112 | __ret_280 = vfmlslq_high_f16(__s0_280, __s1_280, (float16x8_t) {vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280)}); \ | 61629 | __ret_280 = vfmlsl_low_f16(__s0_280, __s1_280, (float16x4_t) {vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280), vget_lane_f16(__s2_280, __p3_280)}); \ |
| 72113 | __ret_280; \ | 61630 | __ret_280; \ |
| 72114 | }) | 61631 | }) |
| 72115 | #else | 61632 | #else |
| 72116 | #define vfmlslq_lane_high_f16(__p0_281, __p1_281, __p2_281, __p3_281) __extension__ ({ \ | 61633 | #define vfmlsl_lane_low_f16(__p0_281, __p1_281, __p2_281, __p3_281) __extension__ ({ \ |
| 72117 | float32x4_t __s0_281 = __p0_281; \ | 61634 | float32x2_t __s0_281 = __p0_281; \ |
| 72118 | float16x8_t __s1_281 = __p1_281; \ | 61635 | float16x4_t __s1_281 = __p1_281; \ |
| 72119 | float16x4_t __s2_281 = __p2_281; \ | 61636 | float16x4_t __s2_281 = __p2_281; \ |
| 72120 | float32x4_t __rev0_281; __rev0_281 = __builtin_shufflevector(__s0_281, __s0_281, 3, 2, 1, 0); \ | 61637 | float32x2_t __rev0_281; __rev0_281 = __builtin_shufflevector(__s0_281, __s0_281, 1, 0); \ |
| 72121 | float16x8_t __rev1_281; __rev1_281 = __builtin_shufflevector(__s1_281, __s1_281, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61638 | float16x4_t __rev1_281; __rev1_281 = __builtin_shufflevector(__s1_281, __s1_281, 3, 2, 1, 0); \ |
| 72122 | float16x4_t __rev2_281; __rev2_281 = __builtin_shufflevector(__s2_281, __s2_281, 3, 2, 1, 0); \ | 61639 | float16x4_t __rev2_281; __rev2_281 = __builtin_shufflevector(__s2_281, __s2_281, 3, 2, 1, 0); \ |
| 72123 | float32x4_t __ret_281; \ | 61640 | float32x2_t __ret_281; \ |
| 72124 | __ret_281 = __noswap_vfmlslq_high_f16(__rev0_281, __rev1_281, (float16x8_t) {__noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281)}); \ | 61641 | __ret_281 = __noswap_vfmlsl_low_f16(__rev0_281, __rev1_281, (float16x4_t) {__noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281), __noswap_vget_lane_f16(__rev2_281, __p3_281)}); \ |
| 72125 | __ret_281 = __builtin_shufflevector(__ret_281, __ret_281, 3, 2, 1, 0); \ | 61642 | __ret_281 = __builtin_shufflevector(__ret_281, __ret_281, 1, 0); \ |
| 72126 | __ret_281; \ | 61643 | __ret_281; \ |
| 72127 | }) | 61644 | }) |
| 72128 | #endif | 61645 | #endif |
| 72129 | | 61646 | |
| 72130 | #ifdef __LITTLE_ENDIAN__ | 61647 | #ifdef __LITTLE_ENDIAN__ |
| 72131 | #define vfmlsl_lane_high_f16(__p0_282, __p1_282, __p2_282, __p3_282) __extension__ ({ \ | 61648 | #define vfmlslq_laneq_high_f16(__p0_282, __p1_282, __p2_282, __p3_282) __extension__ ({ \ |
| 72132 | float32x2_t __s0_282 = __p0_282; \ | 61649 | float32x4_t __s0_282 = __p0_282; \ |
| 72133 | float16x4_t __s1_282 = __p1_282; \ | 61650 | float16x8_t __s1_282 = __p1_282; \ |
| 72134 | float16x4_t __s2_282 = __p2_282; \ | 61651 | float16x8_t __s2_282 = __p2_282; \ |
| 72135 | float32x2_t __ret_282; \ | 61652 | float32x4_t __ret_282; \ |
| 72136 | __ret_282 = vfmlsl_high_f16(__s0_282, __s1_282, (float16x4_t) {vget_lane_f16(__s2_282, __p3_282), vget_lane_f16(__s2_282, __p3_282), vget_lane_f16(__s2_282, __p3_282), vget_lane_f16(__s2_282, __p3_282)}); \ | 61653 | __ret_282 = vfmlslq_high_f16(__s0_282, __s1_282, (float16x8_t) {vgetq_lane_f16(__s2_282, __p3_282), vgetq_lane_f16(__s2_282, __p3_282), vgetq_lane_f16(__s2_282, __p3_282), vgetq_lane_f16(__s2_282, __p3_282), vgetq_lane_f16(__s2_282, __p3_282), vgetq_lane_f16(__s2_282, __p3_282), vgetq_lane_f16(__s2_282, __p3_282), vgetq_lane_f16(__s2_282, __p3_282)}); \ |
| 72137 | __ret_282; \ | 61654 | __ret_282; \ |
| 72138 | }) | 61655 | }) |
| 72139 | #else | 61656 | #else |
| 72140 | #define vfmlsl_lane_high_f16(__p0_283, __p1_283, __p2_283, __p3_283) __extension__ ({ \ | 61657 | #define vfmlslq_laneq_high_f16(__p0_283, __p1_283, __p2_283, __p3_283) __extension__ ({ \ |
| 72141 | float32x2_t __s0_283 = __p0_283; \ | 61658 | float32x4_t __s0_283 = __p0_283; \ |
| 72142 | float16x4_t __s1_283 = __p1_283; \ | 61659 | float16x8_t __s1_283 = __p1_283; \ |
| 72143 | float16x4_t __s2_283 = __p2_283; \ | 61660 | float16x8_t __s2_283 = __p2_283; \ |
| 72144 | float32x2_t __rev0_283; __rev0_283 = __builtin_shufflevector(__s0_283, __s0_283, 1, 0); \ | 61661 | float32x4_t __rev0_283; __rev0_283 = __builtin_shufflevector(__s0_283, __s0_283, 3, 2, 1, 0); \ |
| 72145 | float16x4_t __rev1_283; __rev1_283 = __builtin_shufflevector(__s1_283, __s1_283, 3, 2, 1, 0); \ | 61662 | float16x8_t __rev1_283; __rev1_283 = __builtin_shufflevector(__s1_283, __s1_283, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72146 | float16x4_t __rev2_283; __rev2_283 = __builtin_shufflevector(__s2_283, __s2_283, 3, 2, 1, 0); \ | 61663 | float16x8_t __rev2_283; __rev2_283 = __builtin_shufflevector(__s2_283, __s2_283, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72147 | float32x2_t __ret_283; \ | 61664 | float32x4_t __ret_283; \ |
| 72148 | __ret_283 = __noswap_vfmlsl_high_f16(__rev0_283, __rev1_283, (float16x4_t) {__noswap_vget_lane_f16(__rev2_283, __p3_283), __noswap_vget_lane_f16(__rev2_283, __p3_283), __noswap_vget_lane_f16(__rev2_283, __p3_283), __noswap_vget_lane_f16(__rev2_283, __p3_283)}); \ | 61665 | __ret_283 = __noswap_vfmlslq_high_f16(__rev0_283, __rev1_283, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_283, __p3_283), __noswap_vgetq_lane_f16(__rev2_283, __p3_283), __noswap_vgetq_lane_f16(__rev2_283, __p3_283), __noswap_vgetq_lane_f16(__rev2_283, __p3_283), __noswap_vgetq_lane_f16(__rev2_283, __p3_283), __noswap_vgetq_lane_f16(__rev2_283, __p3_283), __noswap_vgetq_lane_f16(__rev2_283, __p3_283), __noswap_vgetq_lane_f16(__rev2_283, __p3_283)}); \ |
| 72149 | __ret_283 = __builtin_shufflevector(__ret_283, __ret_283, 1, 0); \ | 61666 | __ret_283 = __builtin_shufflevector(__ret_283, __ret_283, 3, 2, 1, 0); \ |
| 72150 | __ret_283; \ | 61667 | __ret_283; \ |
| 72151 | }) | 61668 | }) |
| 72152 | #endif | 61669 | #endif |
| 72153 | | 61670 | |
| 72154 | #ifdef __LITTLE_ENDIAN__ | 61671 | #ifdef __LITTLE_ENDIAN__ |
| 72155 | #define vfmlslq_lane_low_f16(__p0_284, __p1_284, __p2_284, __p3_284) __extension__ ({ \ | 61672 | #define vfmlsl_laneq_high_f16(__p0_284, __p1_284, __p2_284, __p3_284) __extension__ ({ \ |
| 72156 | float32x4_t __s0_284 = __p0_284; \ | 61673 | float32x2_t __s0_284 = __p0_284; \ |
| 72157 | float16x8_t __s1_284 = __p1_284; \ | 61674 | float16x4_t __s1_284 = __p1_284; \ |
| 72158 | float16x4_t __s2_284 = __p2_284; \ | 61675 | float16x8_t __s2_284 = __p2_284; \ |
| 72159 | float32x4_t __ret_284; \ | 61676 | float32x2_t __ret_284; \ |
| 72160 | __ret_284 = vfmlslq_low_f16(__s0_284, __s1_284, (float16x8_t) {vget_lane_f16(__s2_284, __p3_284), vget_lane_f16(__s2_284, __p3_284), vget_lane_f16(__s2_284, __p3_284), vget_lane_f16(__s2_284, __p3_284), vget_lane_f16(__s2_284, __p3_284), vget_lane_f16(__s2_284, __p3_284), vget_lane_f16(__s2_284, __p3_284), vget_lane_f16(__s2_284, __p3_284)}); \ | 61677 | __ret_284 = vfmlsl_high_f16(__s0_284, __s1_284, (float16x4_t) {vgetq_lane_f16(__s2_284, __p3_284), vgetq_lane_f16(__s2_284, __p3_284), vgetq_lane_f16(__s2_284, __p3_284), vgetq_lane_f16(__s2_284, __p3_284)}); \ |
| 72161 | __ret_284; \ | 61678 | __ret_284; \ |
| 72162 | }) | 61679 | }) |
| 72163 | #else | 61680 | #else |
| 72164 | #define vfmlslq_lane_low_f16(__p0_285, __p1_285, __p2_285, __p3_285) __extension__ ({ \ | 61681 | #define vfmlsl_laneq_high_f16(__p0_285, __p1_285, __p2_285, __p3_285) __extension__ ({ \ |
| 72165 | float32x4_t __s0_285 = __p0_285; \ | 61682 | float32x2_t __s0_285 = __p0_285; \ |
| 72166 | float16x8_t __s1_285 = __p1_285; \ | 61683 | float16x4_t __s1_285 = __p1_285; \ |
| 72167 | float16x4_t __s2_285 = __p2_285; \ | 61684 | float16x8_t __s2_285 = __p2_285; \ |
| 72168 | float32x4_t __rev0_285; __rev0_285 = __builtin_shufflevector(__s0_285, __s0_285, 3, 2, 1, 0); \ | 61685 | float32x2_t __rev0_285; __rev0_285 = __builtin_shufflevector(__s0_285, __s0_285, 1, 0); \ |
| 72169 | float16x8_t __rev1_285; __rev1_285 = __builtin_shufflevector(__s1_285, __s1_285, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61686 | float16x4_t __rev1_285; __rev1_285 = __builtin_shufflevector(__s1_285, __s1_285, 3, 2, 1, 0); \ |
| 72170 | float16x4_t __rev2_285; __rev2_285 = __builtin_shufflevector(__s2_285, __s2_285, 3, 2, 1, 0); \ | 61687 | float16x8_t __rev2_285; __rev2_285 = __builtin_shufflevector(__s2_285, __s2_285, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72171 | float32x4_t __ret_285; \ | 61688 | float32x2_t __ret_285; \ |
| 72172 | __ret_285 = __noswap_vfmlslq_low_f16(__rev0_285, __rev1_285, (float16x8_t) {__noswap_vget_lane_f16(__rev2_285, __p3_285), __noswap_vget_lane_f16(__rev2_285, __p3_285), __noswap_vget_lane_f16(__rev2_285, __p3_285), __noswap_vget_lane_f16(__rev2_285, __p3_285), __noswap_vget_lane_f16(__rev2_285, __p3_285), __noswap_vget_lane_f16(__rev2_285, __p3_285), __noswap_vget_lane_f16(__rev2_285, __p3_285), __noswap_vget_lane_f16(__rev2_285, __p3_285)}); \ | 61689 | __ret_285 = __noswap_vfmlsl_high_f16(__rev0_285, __rev1_285, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_285, __p3_285), __noswap_vgetq_lane_f16(__rev2_285, __p3_285), __noswap_vgetq_lane_f16(__rev2_285, __p3_285), __noswap_vgetq_lane_f16(__rev2_285, __p3_285)}); \ |
| 72173 | __ret_285 = __builtin_shufflevector(__ret_285, __ret_285, 3, 2, 1, 0); \ | 61690 | __ret_285 = __builtin_shufflevector(__ret_285, __ret_285, 1, 0); \ |
| 72174 | __ret_285; \ | 61691 | __ret_285; \ |
| 72175 | }) | 61692 | }) |
| 72176 | #endif | 61693 | #endif |
| 72177 | | 61694 | |
| 72178 | #ifdef __LITTLE_ENDIAN__ | 61695 | #ifdef __LITTLE_ENDIAN__ |
| 72179 | #define vfmlsl_lane_low_f16(__p0_286, __p1_286, __p2_286, __p3_286) __extension__ ({ \ | 61696 | #define vfmlslq_laneq_low_f16(__p0_286, __p1_286, __p2_286, __p3_286) __extension__ ({ \ |
| 72180 | float32x2_t __s0_286 = __p0_286; \ | 61697 | float32x4_t __s0_286 = __p0_286; \ |
| 72181 | float16x4_t __s1_286 = __p1_286; \ | 61698 | float16x8_t __s1_286 = __p1_286; \ |
| 72182 | float16x4_t __s2_286 = __p2_286; \ | 61699 | float16x8_t __s2_286 = __p2_286; \ |
| 72183 | float32x2_t __ret_286; \ | 61700 | float32x4_t __ret_286; \ |
| 72184 | __ret_286 = vfmlsl_low_f16(__s0_286, __s1_286, (float16x4_t) {vget_lane_f16(__s2_286, __p3_286), vget_lane_f16(__s2_286, __p3_286), vget_lane_f16(__s2_286, __p3_286), vget_lane_f16(__s2_286, __p3_286)}); \ | 61701 | __ret_286 = vfmlslq_low_f16(__s0_286, __s1_286, (float16x8_t) {vgetq_lane_f16(__s2_286, __p3_286), vgetq_lane_f16(__s2_286, __p3_286), vgetq_lane_f16(__s2_286, __p3_286), vgetq_lane_f16(__s2_286, __p3_286), vgetq_lane_f16(__s2_286, __p3_286), vgetq_lane_f16(__s2_286, __p3_286), vgetq_lane_f16(__s2_286, __p3_286), vgetq_lane_f16(__s2_286, __p3_286)}); \ |
| 72185 | __ret_286; \ | 61702 | __ret_286; \ |
| 72186 | }) | 61703 | }) |
| 72187 | #else | 61704 | #else |
| 72188 | #define vfmlsl_lane_low_f16(__p0_287, __p1_287, __p2_287, __p3_287) __extension__ ({ \ | 61705 | #define vfmlslq_laneq_low_f16(__p0_287, __p1_287, __p2_287, __p3_287) __extension__ ({ \ |
| 72189 | float32x2_t __s0_287 = __p0_287; \ | 61706 | float32x4_t __s0_287 = __p0_287; \ |
| 72190 | float16x4_t __s1_287 = __p1_287; \ | 61707 | float16x8_t __s1_287 = __p1_287; \ |
| 72191 | float16x4_t __s2_287 = __p2_287; \ | 61708 | float16x8_t __s2_287 = __p2_287; \ |
| 72192 | float32x2_t __rev0_287; __rev0_287 = __builtin_shufflevector(__s0_287, __s0_287, 1, 0); \ | 61709 | float32x4_t __rev0_287; __rev0_287 = __builtin_shufflevector(__s0_287, __s0_287, 3, 2, 1, 0); \ |
| 72193 | float16x4_t __rev1_287; __rev1_287 = __builtin_shufflevector(__s1_287, __s1_287, 3, 2, 1, 0); \ | 61710 | float16x8_t __rev1_287; __rev1_287 = __builtin_shufflevector(__s1_287, __s1_287, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72194 | float16x4_t __rev2_287; __rev2_287 = __builtin_shufflevector(__s2_287, __s2_287, 3, 2, 1, 0); \ | 61711 | float16x8_t __rev2_287; __rev2_287 = __builtin_shufflevector(__s2_287, __s2_287, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72195 | float32x2_t __ret_287; \ | 61712 | float32x4_t __ret_287; \ |
| 72196 | __ret_287 = __noswap_vfmlsl_low_f16(__rev0_287, __rev1_287, (float16x4_t) {__noswap_vget_lane_f16(__rev2_287, __p3_287), __noswap_vget_lane_f16(__rev2_287, __p3_287), __noswap_vget_lane_f16(__rev2_287, __p3_287), __noswap_vget_lane_f16(__rev2_287, __p3_287)}); \ | 61713 | __ret_287 = __noswap_vfmlslq_low_f16(__rev0_287, __rev1_287, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_287, __p3_287), __noswap_vgetq_lane_f16(__rev2_287, __p3_287), __noswap_vgetq_lane_f16(__rev2_287, __p3_287), __noswap_vgetq_lane_f16(__rev2_287, __p3_287), __noswap_vgetq_lane_f16(__rev2_287, __p3_287), __noswap_vgetq_lane_f16(__rev2_287, __p3_287), __noswap_vgetq_lane_f16(__rev2_287, __p3_287), __noswap_vgetq_lane_f16(__rev2_287, __p3_287)}); \ |
| 72197 | __ret_287 = __builtin_shufflevector(__ret_287, __ret_287, 1, 0); \ | 61714 | __ret_287 = __builtin_shufflevector(__ret_287, __ret_287, 3, 2, 1, 0); \ |
| 72198 | __ret_287; \ | 61715 | __ret_287; \ |
| 72199 | }) | 61716 | }) |
| 72200 | #endif | 61717 | #endif |
| 72201 | | 61718 | |
| 72202 | #ifdef __LITTLE_ENDIAN__ | 61719 | #ifdef __LITTLE_ENDIAN__ |
| 72203 | #define vfmlslq_laneq_high_f16(__p0_288, __p1_288, __p2_288, __p3_288) __extension__ ({ \ | 61720 | #define vfmlsl_laneq_low_f16(__p0_288, __p1_288, __p2_288, __p3_288) __extension__ ({ \ |
| 72204 | float32x4_t __s0_288 = __p0_288; \ | 61721 | float32x2_t __s0_288 = __p0_288; \ |
| 72205 | float16x8_t __s1_288 = __p1_288; \ | 61722 | float16x4_t __s1_288 = __p1_288; \ |
| 72206 | float16x8_t __s2_288 = __p2_288; \ | 61723 | float16x8_t __s2_288 = __p2_288; \ |
| 72207 | float32x4_t __ret_288; \ | 61724 | float32x2_t __ret_288; \ |
| 72208 | __ret_288 = vfmlslq_high_f16(__s0_288, __s1_288, (float16x8_t) {vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288)}); \ | 61725 | __ret_288 = vfmlsl_low_f16(__s0_288, __s1_288, (float16x4_t) {vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288), vgetq_lane_f16(__s2_288, __p3_288)}); \ |
| 72209 | __ret_288; \ | 61726 | __ret_288; \ |
| 72210 | }) | 61727 | }) |
| 72211 | #else | 61728 | #else |
| 72212 | #define vfmlslq_laneq_high_f16(__p0_289, __p1_289, __p2_289, __p3_289) __extension__ ({ \ | 61729 | #define vfmlsl_laneq_low_f16(__p0_289, __p1_289, __p2_289, __p3_289) __extension__ ({ \ |
| 72213 | float32x4_t __s0_289 = __p0_289; \ | 61730 | float32x2_t __s0_289 = __p0_289; \ |
| 72214 | float16x8_t __s1_289 = __p1_289; \ | 61731 | float16x4_t __s1_289 = __p1_289; \ |
| 72215 | float16x8_t __s2_289 = __p2_289; \ | 61732 | float16x8_t __s2_289 = __p2_289; \ |
| 72216 | float32x4_t __rev0_289; __rev0_289 = __builtin_shufflevector(__s0_289, __s0_289, 3, 2, 1, 0); \ | 61733 | float32x2_t __rev0_289; __rev0_289 = __builtin_shufflevector(__s0_289, __s0_289, 1, 0); \ |
| 72217 | float16x8_t __rev1_289; __rev1_289 = __builtin_shufflevector(__s1_289, __s1_289, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61734 | float16x4_t __rev1_289; __rev1_289 = __builtin_shufflevector(__s1_289, __s1_289, 3, 2, 1, 0); \ |
| 72218 | float16x8_t __rev2_289; __rev2_289 = __builtin_shufflevector(__s2_289, __s2_289, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61735 | float16x8_t __rev2_289; __rev2_289 = __builtin_shufflevector(__s2_289, __s2_289, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72219 | float32x4_t __ret_289; \ | 61736 | float32x2_t __ret_289; \ |
| 72220 | __ret_289 = __noswap_vfmlslq_high_f16(__rev0_289, __rev1_289, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289)}); \ | 61737 | __ret_289 = __noswap_vfmlsl_low_f16(__rev0_289, __rev1_289, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289), __noswap_vgetq_lane_f16(__rev2_289, __p3_289)}); \ |
| 72221 | __ret_289 = __builtin_shufflevector(__ret_289, __ret_289, 3, 2, 1, 0); \ | 61738 | __ret_289 = __builtin_shufflevector(__ret_289, __ret_289, 1, 0); \ |
| 72222 | __ret_289; \ | 61739 | __ret_289; \ |
| 72223 | }) | 61740 | }) |
| 72224 | #endif | 61741 | #endif |
| 72225 | | 61742 | |
| | 61743 | #endif |
| | 61744 | #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(__aarch64__) |
| 72226 | #ifdef __LITTLE_ENDIAN__ | 61745 | #ifdef __LITTLE_ENDIAN__ |
| 72227 | #define vfmlsl_laneq_high_f16(__p0_290, __p1_290, __p2_290, __p3_290) __extension__ ({ \ | 61746 | #define vmulh_lane_f16(__p0_290, __p1_290, __p2_290) __extension__ ({ \ |
| 72228 | float32x2_t __s0_290 = __p0_290; \ | 61747 | float16_t __s0_290 = __p0_290; \ |
| 72229 | float16x4_t __s1_290 = __p1_290; \ | 61748 | float16x4_t __s1_290 = __p1_290; \ |
| 72230 | float16x8_t __s2_290 = __p2_290; \ | 61749 | float16_t __ret_290; \ |
| 72231 | float32x2_t __ret_290; \ | 61750 | __ret_290 = __s0_290 * vget_lane_f16(__s1_290, __p2_290); \ |
| 72232 | __ret_290 = vfmlsl_high_f16(__s0_290, __s1_290, (float16x4_t) {vgetq_lane_f16(__s2_290, __p3_290), vgetq_lane_f16(__s2_290, __p3_290), vgetq_lane_f16(__s2_290, __p3_290), vgetq_lane_f16(__s2_290, __p3_290)}); \ | | |
| 72233 | __ret_290; \ | 61751 | __ret_290; \ |
| 72234 | }) | 61752 | }) |
| 72235 | #else | 61753 | #else |
| 72236 | #define vfmlsl_laneq_high_f16(__p0_291, __p1_291, __p2_291, __p3_291) __extension__ ({ \ | 61754 | #define vmulh_lane_f16(__p0_291, __p1_291, __p2_291) __extension__ ({ \ |
| 72237 | float32x2_t __s0_291 = __p0_291; \ | 61755 | float16_t __s0_291 = __p0_291; \ |
| 72238 | float16x4_t __s1_291 = __p1_291; \ | 61756 | float16x4_t __s1_291 = __p1_291; \ |
| 72239 | float16x8_t __s2_291 = __p2_291; \ | | |
| 72240 | float32x2_t __rev0_291; __rev0_291 = __builtin_shufflevector(__s0_291, __s0_291, 1, 0); \ | | |
| 72241 | float16x4_t __rev1_291; __rev1_291 = __builtin_shufflevector(__s1_291, __s1_291, 3, 2, 1, 0); \ | 61757 | float16x4_t __rev1_291; __rev1_291 = __builtin_shufflevector(__s1_291, __s1_291, 3, 2, 1, 0); \ |
| 72242 | float16x8_t __rev2_291; __rev2_291 = __builtin_shufflevector(__s2_291, __s2_291, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61758 | float16_t __ret_291; \ |
| 72243 | float32x2_t __ret_291; \ | 61759 | __ret_291 = __s0_291 * __noswap_vget_lane_f16(__rev1_291, __p2_291); \ |
| 72244 | __ret_291 = __noswap_vfmlsl_high_f16(__rev0_291, __rev1_291, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_291, __p3_291), __noswap_vgetq_lane_f16(__rev2_291, __p3_291), __noswap_vgetq_lane_f16(__rev2_291, __p3_291), __noswap_vgetq_lane_f16(__rev2_291, __p3_291)}); \ | | |
| 72245 | __ret_291 = __builtin_shufflevector(__ret_291, __ret_291, 1, 0); \ | | |
| 72246 | __ret_291; \ | 61760 | __ret_291; \ |
| 72247 | }) | 61761 | }) |
| 72248 | #endif | 61762 | #endif |
| 72249 | | 61763 | |
| 72250 | #ifdef __LITTLE_ENDIAN__ | 61764 | #ifdef __LITTLE_ENDIAN__ |
| 72251 | #define vfmlslq_laneq_low_f16(__p0_292, __p1_292, __p2_292, __p3_292) __extension__ ({ \ | 61765 | #define vmulh_laneq_f16(__p0_292, __p1_292, __p2_292) __extension__ ({ \ |
| 72252 | float32x4_t __s0_292 = __p0_292; \ | 61766 | float16_t __s0_292 = __p0_292; \ |
| 72253 | float16x8_t __s1_292 = __p1_292; \ | 61767 | float16x8_t __s1_292 = __p1_292; \ |
| 72254 | float16x8_t __s2_292 = __p2_292; \ | 61768 | float16_t __ret_292; \ |
| 72255 | float32x4_t __ret_292; \ | 61769 | __ret_292 = __s0_292 * vgetq_lane_f16(__s1_292, __p2_292); \ |
| 72256 | __ret_292 = vfmlslq_low_f16(__s0_292, __s1_292, (float16x8_t) {vgetq_lane_f16(__s2_292, __p3_292), vgetq_lane_f16(__s2_292, __p3_292), vgetq_lane_f16(__s2_292, __p3_292), vgetq_lane_f16(__s2_292, __p3_292), vgetq_lane_f16(__s2_292, __p3_292), vgetq_lane_f16(__s2_292, __p3_292), vgetq_lane_f16(__s2_292, __p3_292), vgetq_lane_f16(__s2_292, __p3_292)}); \ | | |
| 72257 | __ret_292; \ | 61770 | __ret_292; \ |
| 72258 | }) | 61771 | }) |
| 72259 | #else | 61772 | #else |
| 72260 | #define vfmlslq_laneq_low_f16(__p0_293, __p1_293, __p2_293, __p3_293) __extension__ ({ \ | 61773 | #define vmulh_laneq_f16(__p0_293, __p1_293, __p2_293) __extension__ ({ \ |
| 72261 | float32x4_t __s0_293 = __p0_293; \ | 61774 | float16_t __s0_293 = __p0_293; \ |
| 72262 | float16x8_t __s1_293 = __p1_293; \ | 61775 | float16x8_t __s1_293 = __p1_293; \ |
| 72263 | float16x8_t __s2_293 = __p2_293; \ | | |
| 72264 | float32x4_t __rev0_293; __rev0_293 = __builtin_shufflevector(__s0_293, __s0_293, 3, 2, 1, 0); \ | | |
| 72265 | float16x8_t __rev1_293; __rev1_293 = __builtin_shufflevector(__s1_293, __s1_293, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61776 | float16x8_t __rev1_293; __rev1_293 = __builtin_shufflevector(__s1_293, __s1_293, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72266 | float16x8_t __rev2_293; __rev2_293 = __builtin_shufflevector(__s2_293, __s2_293, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61777 | float16_t __ret_293; \ |
| 72267 | float32x4_t __ret_293; \ | 61778 | __ret_293 = __s0_293 * __noswap_vgetq_lane_f16(__rev1_293, __p2_293); \ |
| 72268 | __ret_293 = __noswap_vfmlslq_low_f16(__rev0_293, __rev1_293, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_293, __p3_293), __noswap_vgetq_lane_f16(__rev2_293, __p3_293), __noswap_vgetq_lane_f16(__rev2_293, __p3_293), __noswap_vgetq_lane_f16(__rev2_293, __p3_293), __noswap_vgetq_lane_f16(__rev2_293, __p3_293), __noswap_vgetq_lane_f16(__rev2_293, __p3_293), __noswap_vgetq_lane_f16(__rev2_293, __p3_293), __noswap_vgetq_lane_f16(__rev2_293, __p3_293)}); \ | | |
| 72269 | __ret_293 = __builtin_shufflevector(__ret_293, __ret_293, 3, 2, 1, 0); \ | | |
| 72270 | __ret_293; \ | 61779 | __ret_293; \ |
| 72271 | }) | 61780 | }) |
| 72272 | #endif | 61781 | #endif |
| 72273 | | 61782 | |
| 72274 | #ifdef __LITTLE_ENDIAN__ | | |
| 72275 | #define vfmlsl_laneq_low_f16(__p0_294, __p1_294, __p2_294, __p3_294) __extension__ ({ \ | | |
| 72276 | float32x2_t __s0_294 = __p0_294; \ | | |
| 72277 | float16x4_t __s1_294 = __p1_294; \ | | |
| 72278 | float16x8_t __s2_294 = __p2_294; \ | | |
| 72279 | float32x2_t __ret_294; \ | | |
| 72280 | __ret_294 = vfmlsl_low_f16(__s0_294, __s1_294, (float16x4_t) {vgetq_lane_f16(__s2_294, __p3_294), vgetq_lane_f16(__s2_294, __p3_294), vgetq_lane_f16(__s2_294, __p3_294), vgetq_lane_f16(__s2_294, __p3_294)}); \ | | |
| 72281 | __ret_294; \ | | |
| 72282 | }) | | |
| 72283 | #else | | |
| 72284 | #define vfmlsl_laneq_low_f16(__p0_295, __p1_295, __p2_295, __p3_295) __extension__ ({ \ | | |
| 72285 | float32x2_t __s0_295 = __p0_295; \ | | |
| 72286 | float16x4_t __s1_295 = __p1_295; \ | | |
| 72287 | float16x8_t __s2_295 = __p2_295; \ | | |
| 72288 | float32x2_t __rev0_295; __rev0_295 = __builtin_shufflevector(__s0_295, __s0_295, 1, 0); \ | | |
| 72289 | float16x4_t __rev1_295; __rev1_295 = __builtin_shufflevector(__s1_295, __s1_295, 3, 2, 1, 0); \ | | |
| 72290 | float16x8_t __rev2_295; __rev2_295 = __builtin_shufflevector(__s2_295, __s2_295, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 72291 | float32x2_t __ret_295; \ | | |
| 72292 | __ret_295 = __noswap_vfmlsl_low_f16(__rev0_295, __rev1_295, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_295, __p3_295), __noswap_vgetq_lane_f16(__rev2_295, __p3_295), __noswap_vgetq_lane_f16(__rev2_295, __p3_295), __noswap_vgetq_lane_f16(__rev2_295, __p3_295)}); \ | | |
| 72293 | __ret_295 = __builtin_shufflevector(__ret_295, __ret_295, 1, 0); \ | | |
| 72294 | __ret_295; \ | | |
| 72295 | }) | | |
| 72296 | #endif | | |
| 72297 | | | |
| 72298 | #endif | | |
| 72299 | #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(__aarch64__) | | |
| 72300 | #ifdef __LITTLE_ENDIAN__ | | |
| 72301 | #define vmulh_lane_f16(__p0_296, __p1_296, __p2_296) __extension__ ({ \ | | |
| 72302 | float16_t __s0_296 = __p0_296; \ | | |
| 72303 | float16x4_t __s1_296 = __p1_296; \ | | |
| 72304 | float16_t __ret_296; \ | | |
| 72305 | __ret_296 = __s0_296 * vget_lane_f16(__s1_296, __p2_296); \ | | |
| 72306 | __ret_296; \ | | |
| 72307 | }) | | |
| 72308 | #else | | |
| 72309 | #define vmulh_lane_f16(__p0_297, __p1_297, __p2_297) __extension__ ({ \ | | |
| 72310 | float16_t __s0_297 = __p0_297; \ | | |
| 72311 | float16x4_t __s1_297 = __p1_297; \ | | |
| 72312 | float16x4_t __rev1_297; __rev1_297 = __builtin_shufflevector(__s1_297, __s1_297, 3, 2, 1, 0); \ | | |
| 72313 | float16_t __ret_297; \ | | |
| 72314 | __ret_297 = __s0_297 * __noswap_vget_lane_f16(__rev1_297, __p2_297); \ | | |
| 72315 | __ret_297; \ | | |
| 72316 | }) | | |
| 72317 | #endif | | |
| 72318 | | | |
| 72319 | #ifdef __LITTLE_ENDIAN__ | | |
| 72320 | #define vmulh_laneq_f16(__p0_298, __p1_298, __p2_298) __extension__ ({ \ | | |
| 72321 | float16_t __s0_298 = __p0_298; \ | | |
| 72322 | float16x8_t __s1_298 = __p1_298; \ | | |
| 72323 | float16_t __ret_298; \ | | |
| 72324 | __ret_298 = __s0_298 * vgetq_lane_f16(__s1_298, __p2_298); \ | | |
| 72325 | __ret_298; \ | | |
| 72326 | }) | | |
| 72327 | #else | | |
| 72328 | #define vmulh_laneq_f16(__p0_299, __p1_299, __p2_299) __extension__ ({ \ | | |
| 72329 | float16_t __s0_299 = __p0_299; \ | | |
| 72330 | float16x8_t __s1_299 = __p1_299; \ | | |
| 72331 | float16x8_t __rev1_299; __rev1_299 = __builtin_shufflevector(__s1_299, __s1_299, 7, 6, 5, 4, 3, 2, 1, 0); \ | | |
| 72332 | float16_t __ret_299; \ | | |
| 72333 | __ret_299 = __s0_299 * __noswap_vgetq_lane_f16(__rev1_299, __p2_299); \ | | |
| 72334 | __ret_299; \ | | |
| 72335 | }) | | |
| 72336 | #endif | | |
| 72337 | | | |
| 72338 | #endif | 61783 | #endif |
| 72339 | #if defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__) | 61784 | #if defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__) |
| 72340 | #ifdef __LITTLE_ENDIAN__ | | |
| 72341 | __ai int32_t vqrdmlahs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { | 61785 | __ai int32_t vqrdmlahs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { |
| 72342 | int32_t __ret; | 61786 | int32_t __ret; |
| 72343 | __ret = vqadds_s32(__p0, vqrdmulhs_s32(__p1, __p2)); | 61787 | __ret = vqadds_s32(__p0, vqrdmulhs_s32(__p1, __p2)); |
| 72344 | return __ret; | 61788 | return __ret; |
| 72345 | } | 61789 | } |
| 72346 | #else | | |
| 72347 | __ai int32_t vqrdmlahs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { | | |
| 72348 | int32_t __ret; | | |
| 72349 | __ret = __noswap_vqadds_s32(__p0, __noswap_vqrdmulhs_s32(__p1, __p2)); | | |
| 72350 | return __ret; | | |
| 72351 | } | | |
| 72352 | #endif | | |
| 72353 | | | |
| 72354 | #ifdef __LITTLE_ENDIAN__ | | |
| 72355 | __ai int16_t vqrdmlahh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { | 61790 | __ai int16_t vqrdmlahh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { |
| 72356 | int16_t __ret; | 61791 | int16_t __ret; |
| 72357 | __ret = vqaddh_s16(__p0, vqrdmulhh_s16(__p1, __p2)); | 61792 | __ret = vqaddh_s16(__p0, vqrdmulhh_s16(__p1, __p2)); |
| 72358 | return __ret; | 61793 | return __ret; |
| 72359 | } | 61794 | } |
| 72360 | #else | | |
| 72361 | __ai int16_t vqrdmlahh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { | | |
| 72362 | int16_t __ret; | | |
| 72363 | __ret = __noswap_vqaddh_s16(__p0, __noswap_vqrdmulhh_s16(__p1, __p2)); | | |
| 72364 | return __ret; | | |
| 72365 | } | | |
| 72366 | #endif | | |
| 72367 | | | |
| 72368 | #ifdef __LITTLE_ENDIAN__ | 61795 | #ifdef __LITTLE_ENDIAN__ |
| 72369 | #define vqrdmlahs_lane_s32(__p0_300, __p1_300, __p2_300, __p3_300) __extension__ ({ \ | 61796 | #define vqrdmlahs_lane_s32(__p0_294, __p1_294, __p2_294, __p3_294) __extension__ ({ \ |
| 72370 | int32_t __s0_300 = __p0_300; \ | 61797 | int32_t __s0_294 = __p0_294; \ |
| 72371 | int32_t __s1_300 = __p1_300; \ | 61798 | int32_t __s1_294 = __p1_294; \ |
| 72372 | int32x2_t __s2_300 = __p2_300; \ | 61799 | int32x2_t __s2_294 = __p2_294; \ |
| 72373 | int32_t __ret_300; \ | 61800 | int32_t __ret_294; \ |
| 72374 | __ret_300 = vqadds_s32(__s0_300, vqrdmulhs_s32(__s1_300, vget_lane_s32(__s2_300, __p3_300))); \ | 61801 | __ret_294 = vqadds_s32(__s0_294, vqrdmulhs_s32(__s1_294, vget_lane_s32(__s2_294, __p3_294))); \ |
| 72375 | __ret_300; \ | 61802 | __ret_294; \ |
| 72376 | }) | 61803 | }) |
| 72377 | #else | 61804 | #else |
| 72378 | #define vqrdmlahs_lane_s32(__p0_301, __p1_301, __p2_301, __p3_301) __extension__ ({ \ | 61805 | #define vqrdmlahs_lane_s32(__p0_295, __p1_295, __p2_295, __p3_295) __extension__ ({ \ |
| 72379 | int32_t __s0_301 = __p0_301; \ | 61806 | int32_t __s0_295 = __p0_295; \ |
| 72380 | int32_t __s1_301 = __p1_301; \ | 61807 | int32_t __s1_295 = __p1_295; \ |
| 72381 | int32x2_t __s2_301 = __p2_301; \ | 61808 | int32x2_t __s2_295 = __p2_295; \ |
| 72382 | int32x2_t __rev2_301; __rev2_301 = __builtin_shufflevector(__s2_301, __s2_301, 1, 0); \ | 61809 | int32x2_t __rev2_295; __rev2_295 = __builtin_shufflevector(__s2_295, __s2_295, 1, 0); \ |
| 72383 | int32_t __ret_301; \ | 61810 | int32_t __ret_295; \ |
| 72384 | __ret_301 = __noswap_vqadds_s32(__s0_301, __noswap_vqrdmulhs_s32(__s1_301, __noswap_vget_lane_s32(__rev2_301, __p3_301))); \ | 61811 | __ret_295 = vqadds_s32(__s0_295, vqrdmulhs_s32(__s1_295, __noswap_vget_lane_s32(__rev2_295, __p3_295))); \ |
| 72385 | __ret_301; \ | 61812 | __ret_295; \ |
| 72386 | }) | 61813 | }) |
| 72387 | #endif | 61814 | #endif |
| 72388 | | 61815 | |
| 72389 | #ifdef __LITTLE_ENDIAN__ | 61816 | #ifdef __LITTLE_ENDIAN__ |
| 72390 | #define vqrdmlahh_lane_s16(__p0_302, __p1_302, __p2_302, __p3_302) __extension__ ({ \ | 61817 | #define vqrdmlahh_lane_s16(__p0_296, __p1_296, __p2_296, __p3_296) __extension__ ({ \ |
| 72391 | int16_t __s0_302 = __p0_302; \ | 61818 | int16_t __s0_296 = __p0_296; \ |
| 72392 | int16_t __s1_302 = __p1_302; \ | 61819 | int16_t __s1_296 = __p1_296; \ |
| 72393 | int16x4_t __s2_302 = __p2_302; \ | 61820 | int16x4_t __s2_296 = __p2_296; \ |
| 72394 | int16_t __ret_302; \ | 61821 | int16_t __ret_296; \ |
| 72395 | __ret_302 = vqaddh_s16(__s0_302, vqrdmulhh_s16(__s1_302, vget_lane_s16(__s2_302, __p3_302))); \ | 61822 | __ret_296 = vqaddh_s16(__s0_296, vqrdmulhh_s16(__s1_296, vget_lane_s16(__s2_296, __p3_296))); \ |
| 72396 | __ret_302; \ | 61823 | __ret_296; \ |
| 72397 | }) | 61824 | }) |
| 72398 | #else | 61825 | #else |
| 72399 | #define vqrdmlahh_lane_s16(__p0_303, __p1_303, __p2_303, __p3_303) __extension__ ({ \ | 61826 | #define vqrdmlahh_lane_s16(__p0_297, __p1_297, __p2_297, __p3_297) __extension__ ({ \ |
| 72400 | int16_t __s0_303 = __p0_303; \ | 61827 | int16_t __s0_297 = __p0_297; \ |
| 72401 | int16_t __s1_303 = __p1_303; \ | 61828 | int16_t __s1_297 = __p1_297; \ |
| 72402 | int16x4_t __s2_303 = __p2_303; \ | 61829 | int16x4_t __s2_297 = __p2_297; \ |
| 72403 | int16x4_t __rev2_303; __rev2_303 = __builtin_shufflevector(__s2_303, __s2_303, 3, 2, 1, 0); \ | 61830 | int16x4_t __rev2_297; __rev2_297 = __builtin_shufflevector(__s2_297, __s2_297, 3, 2, 1, 0); \ |
| 72404 | int16_t __ret_303; \ | 61831 | int16_t __ret_297; \ |
| 72405 | __ret_303 = __noswap_vqaddh_s16(__s0_303, __noswap_vqrdmulhh_s16(__s1_303, __noswap_vget_lane_s16(__rev2_303, __p3_303))); \ | 61832 | __ret_297 = vqaddh_s16(__s0_297, vqrdmulhh_s16(__s1_297, __noswap_vget_lane_s16(__rev2_297, __p3_297))); \ |
| 72406 | __ret_303; \ | 61833 | __ret_297; \ |
| 72407 | }) | 61834 | }) |
| 72408 | #endif | 61835 | #endif |
| 72409 | | 61836 | |
| 72410 | #ifdef __LITTLE_ENDIAN__ | 61837 | #ifdef __LITTLE_ENDIAN__ |
| 72411 | #define vqrdmlahs_laneq_s32(__p0_304, __p1_304, __p2_304, __p3_304) __extension__ ({ \ | 61838 | #define vqrdmlahs_laneq_s32(__p0_298, __p1_298, __p2_298, __p3_298) __extension__ ({ \ |
| 72412 | int32_t __s0_304 = __p0_304; \ | 61839 | int32_t __s0_298 = __p0_298; \ |
| 72413 | int32_t __s1_304 = __p1_304; \ | 61840 | int32_t __s1_298 = __p1_298; \ |
| 72414 | int32x4_t __s2_304 = __p2_304; \ | 61841 | int32x4_t __s2_298 = __p2_298; \ |
| 72415 | int32_t __ret_304; \ | 61842 | int32_t __ret_298; \ |
| 72416 | __ret_304 = vqadds_s32(__s0_304, vqrdmulhs_s32(__s1_304, vgetq_lane_s32(__s2_304, __p3_304))); \ | 61843 | __ret_298 = vqadds_s32(__s0_298, vqrdmulhs_s32(__s1_298, vgetq_lane_s32(__s2_298, __p3_298))); \ |
| 72417 | __ret_304; \ | 61844 | __ret_298; \ |
| 72418 | }) | 61845 | }) |
| 72419 | #else | 61846 | #else |
| 72420 | #define vqrdmlahs_laneq_s32(__p0_305, __p1_305, __p2_305, __p3_305) __extension__ ({ \ | 61847 | #define vqrdmlahs_laneq_s32(__p0_299, __p1_299, __p2_299, __p3_299) __extension__ ({ \ |
| 72421 | int32_t __s0_305 = __p0_305; \ | 61848 | int32_t __s0_299 = __p0_299; \ |
| 72422 | int32_t __s1_305 = __p1_305; \ | 61849 | int32_t __s1_299 = __p1_299; \ |
| 72423 | int32x4_t __s2_305 = __p2_305; \ | 61850 | int32x4_t __s2_299 = __p2_299; \ |
| 72424 | int32x4_t __rev2_305; __rev2_305 = __builtin_shufflevector(__s2_305, __s2_305, 3, 2, 1, 0); \ | 61851 | int32x4_t __rev2_299; __rev2_299 = __builtin_shufflevector(__s2_299, __s2_299, 3, 2, 1, 0); \ |
| 72425 | int32_t __ret_305; \ | 61852 | int32_t __ret_299; \ |
| 72426 | __ret_305 = __noswap_vqadds_s32(__s0_305, __noswap_vqrdmulhs_s32(__s1_305, __noswap_vgetq_lane_s32(__rev2_305, __p3_305))); \ | 61853 | __ret_299 = vqadds_s32(__s0_299, vqrdmulhs_s32(__s1_299, __noswap_vgetq_lane_s32(__rev2_299, __p3_299))); \ |
| 72427 | __ret_305; \ | 61854 | __ret_299; \ |
| 72428 | }) | 61855 | }) |
| 72429 | #endif | 61856 | #endif |
| 72430 | | 61857 | |
| 72431 | #ifdef __LITTLE_ENDIAN__ | 61858 | #ifdef __LITTLE_ENDIAN__ |
| 72432 | #define vqrdmlahh_laneq_s16(__p0_306, __p1_306, __p2_306, __p3_306) __extension__ ({ \ | 61859 | #define vqrdmlahh_laneq_s16(__p0_300, __p1_300, __p2_300, __p3_300) __extension__ ({ \ |
| 72433 | int16_t __s0_306 = __p0_306; \ | 61860 | int16_t __s0_300 = __p0_300; \ |
| 72434 | int16_t __s1_306 = __p1_306; \ | 61861 | int16_t __s1_300 = __p1_300; \ |
| 72435 | int16x8_t __s2_306 = __p2_306; \ | 61862 | int16x8_t __s2_300 = __p2_300; \ |
| 72436 | int16_t __ret_306; \ | 61863 | int16_t __ret_300; \ |
| 72437 | __ret_306 = vqaddh_s16(__s0_306, vqrdmulhh_s16(__s1_306, vgetq_lane_s16(__s2_306, __p3_306))); \ | 61864 | __ret_300 = vqaddh_s16(__s0_300, vqrdmulhh_s16(__s1_300, vgetq_lane_s16(__s2_300, __p3_300))); \ |
| 72438 | __ret_306; \ | 61865 | __ret_300; \ |
| 72439 | }) | 61866 | }) |
| 72440 | #else | 61867 | #else |
| 72441 | #define vqrdmlahh_laneq_s16(__p0_307, __p1_307, __p2_307, __p3_307) __extension__ ({ \ | 61868 | #define vqrdmlahh_laneq_s16(__p0_301, __p1_301, __p2_301, __p3_301) __extension__ ({ \ |
| 72442 | int16_t __s0_307 = __p0_307; \ | 61869 | int16_t __s0_301 = __p0_301; \ |
| 72443 | int16_t __s1_307 = __p1_307; \ | 61870 | int16_t __s1_301 = __p1_301; \ |
| 72444 | int16x8_t __s2_307 = __p2_307; \ | 61871 | int16x8_t __s2_301 = __p2_301; \ |
| 72445 | int16x8_t __rev2_307; __rev2_307 = __builtin_shufflevector(__s2_307, __s2_307, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61872 | int16x8_t __rev2_301; __rev2_301 = __builtin_shufflevector(__s2_301, __s2_301, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72446 | int16_t __ret_307; \ | 61873 | int16_t __ret_301; \ |
| 72447 | __ret_307 = __noswap_vqaddh_s16(__s0_307, __noswap_vqrdmulhh_s16(__s1_307, __noswap_vgetq_lane_s16(__rev2_307, __p3_307))); \ | 61874 | __ret_301 = vqaddh_s16(__s0_301, vqrdmulhh_s16(__s1_301, __noswap_vgetq_lane_s16(__rev2_301, __p3_301))); \ |
| 72448 | __ret_307; \ | 61875 | __ret_301; \ |
| 72449 | }) | 61876 | }) |
| 72450 | #endif | 61877 | #endif |
| 72451 | | 61878 | |
| 72452 | #ifdef __LITTLE_ENDIAN__ | | |
| 72453 | __ai int32_t vqrdmlshs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { | 61879 | __ai int32_t vqrdmlshs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { |
| 72454 | int32_t __ret; | 61880 | int32_t __ret; |
| 72455 | __ret = vqsubs_s32(__p0, vqrdmulhs_s32(__p1, __p2)); | 61881 | __ret = vqsubs_s32(__p0, vqrdmulhs_s32(__p1, __p2)); |
| 72456 | return __ret; | 61882 | return __ret; |
| 72457 | } | 61883 | } |
| 72458 | #else | | |
| 72459 | __ai int32_t vqrdmlshs_s32(int32_t __p0, int32_t __p1, int32_t __p2) { | | |
| 72460 | int32_t __ret; | | |
| 72461 | __ret = __noswap_vqsubs_s32(__p0, __noswap_vqrdmulhs_s32(__p1, __p2)); | | |
| 72462 | return __ret; | | |
| 72463 | } | | |
| 72464 | #endif | | |
| 72465 | | | |
| 72466 | #ifdef __LITTLE_ENDIAN__ | | |
| 72467 | __ai int16_t vqrdmlshh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { | 61884 | __ai int16_t vqrdmlshh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { |
| 72468 | int16_t __ret; | 61885 | int16_t __ret; |
| 72469 | __ret = vqsubh_s16(__p0, vqrdmulhh_s16(__p1, __p2)); | 61886 | __ret = vqsubh_s16(__p0, vqrdmulhh_s16(__p1, __p2)); |
| 72470 | return __ret; | 61887 | return __ret; |
| 72471 | } | 61888 | } |
| 72472 | #else | | |
| 72473 | __ai int16_t vqrdmlshh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { | | |
| 72474 | int16_t __ret; | | |
| 72475 | __ret = __noswap_vqsubh_s16(__p0, __noswap_vqrdmulhh_s16(__p1, __p2)); | | |
| 72476 | return __ret; | | |
| 72477 | } | | |
| 72478 | #endif | | |
| 72479 | | | |
| 72480 | #ifdef __LITTLE_ENDIAN__ | 61889 | #ifdef __LITTLE_ENDIAN__ |
| 72481 | #define vqrdmlshs_lane_s32(__p0_308, __p1_308, __p2_308, __p3_308) __extension__ ({ \ | 61890 | #define vqrdmlshs_lane_s32(__p0_302, __p1_302, __p2_302, __p3_302) __extension__ ({ \ |
| 72482 | int32_t __s0_308 = __p0_308; \ | 61891 | int32_t __s0_302 = __p0_302; \ |
| 72483 | int32_t __s1_308 = __p1_308; \ | 61892 | int32_t __s1_302 = __p1_302; \ |
| 72484 | int32x2_t __s2_308 = __p2_308; \ | 61893 | int32x2_t __s2_302 = __p2_302; \ |
| 72485 | int32_t __ret_308; \ | 61894 | int32_t __ret_302; \ |
| 72486 | __ret_308 = vqsubs_s32(__s0_308, vqrdmulhs_s32(__s1_308, vget_lane_s32(__s2_308, __p3_308))); \ | 61895 | __ret_302 = vqsubs_s32(__s0_302, vqrdmulhs_s32(__s1_302, vget_lane_s32(__s2_302, __p3_302))); \ |
| 72487 | __ret_308; \ | 61896 | __ret_302; \ |
| 72488 | }) | 61897 | }) |
| 72489 | #else | 61898 | #else |
| 72490 | #define vqrdmlshs_lane_s32(__p0_309, __p1_309, __p2_309, __p3_309) __extension__ ({ \ | 61899 | #define vqrdmlshs_lane_s32(__p0_303, __p1_303, __p2_303, __p3_303) __extension__ ({ \ |
| 72491 | int32_t __s0_309 = __p0_309; \ | 61900 | int32_t __s0_303 = __p0_303; \ |
| 72492 | int32_t __s1_309 = __p1_309; \ | 61901 | int32_t __s1_303 = __p1_303; \ |
| 72493 | int32x2_t __s2_309 = __p2_309; \ | 61902 | int32x2_t __s2_303 = __p2_303; \ |
| 72494 | int32x2_t __rev2_309; __rev2_309 = __builtin_shufflevector(__s2_309, __s2_309, 1, 0); \ | 61903 | int32x2_t __rev2_303; __rev2_303 = __builtin_shufflevector(__s2_303, __s2_303, 1, 0); \ |
| 72495 | int32_t __ret_309; \ | 61904 | int32_t __ret_303; \ |
| 72496 | __ret_309 = __noswap_vqsubs_s32(__s0_309, __noswap_vqrdmulhs_s32(__s1_309, __noswap_vget_lane_s32(__rev2_309, __p3_309))); \ | 61905 | __ret_303 = vqsubs_s32(__s0_303, vqrdmulhs_s32(__s1_303, __noswap_vget_lane_s32(__rev2_303, __p3_303))); \ |
| 72497 | __ret_309; \ | 61906 | __ret_303; \ |
| 72498 | }) | 61907 | }) |
| 72499 | #endif | 61908 | #endif |
| 72500 | | 61909 | |
| 72501 | #ifdef __LITTLE_ENDIAN__ | 61910 | #ifdef __LITTLE_ENDIAN__ |
| 72502 | #define vqrdmlshh_lane_s16(__p0_310, __p1_310, __p2_310, __p3_310) __extension__ ({ \ | 61911 | #define vqrdmlshh_lane_s16(__p0_304, __p1_304, __p2_304, __p3_304) __extension__ ({ \ |
| 72503 | int16_t __s0_310 = __p0_310; \ | 61912 | int16_t __s0_304 = __p0_304; \ |
| 72504 | int16_t __s1_310 = __p1_310; \ | 61913 | int16_t __s1_304 = __p1_304; \ |
| 72505 | int16x4_t __s2_310 = __p2_310; \ | 61914 | int16x4_t __s2_304 = __p2_304; \ |
| 72506 | int16_t __ret_310; \ | 61915 | int16_t __ret_304; \ |
| 72507 | __ret_310 = vqsubh_s16(__s0_310, vqrdmulhh_s16(__s1_310, vget_lane_s16(__s2_310, __p3_310))); \ | 61916 | __ret_304 = vqsubh_s16(__s0_304, vqrdmulhh_s16(__s1_304, vget_lane_s16(__s2_304, __p3_304))); \ |
| 72508 | __ret_310; \ | 61917 | __ret_304; \ |
| 72509 | }) | 61918 | }) |
| 72510 | #else | 61919 | #else |
| 72511 | #define vqrdmlshh_lane_s16(__p0_311, __p1_311, __p2_311, __p3_311) __extension__ ({ \ | 61920 | #define vqrdmlshh_lane_s16(__p0_305, __p1_305, __p2_305, __p3_305) __extension__ ({ \ |
| 72512 | int16_t __s0_311 = __p0_311; \ | 61921 | int16_t __s0_305 = __p0_305; \ |
| 72513 | int16_t __s1_311 = __p1_311; \ | 61922 | int16_t __s1_305 = __p1_305; \ |
| 72514 | int16x4_t __s2_311 = __p2_311; \ | 61923 | int16x4_t __s2_305 = __p2_305; \ |
| 72515 | int16x4_t __rev2_311; __rev2_311 = __builtin_shufflevector(__s2_311, __s2_311, 3, 2, 1, 0); \ | 61924 | int16x4_t __rev2_305; __rev2_305 = __builtin_shufflevector(__s2_305, __s2_305, 3, 2, 1, 0); \ |
| 72516 | int16_t __ret_311; \ | 61925 | int16_t __ret_305; \ |
| 72517 | __ret_311 = __noswap_vqsubh_s16(__s0_311, __noswap_vqrdmulhh_s16(__s1_311, __noswap_vget_lane_s16(__rev2_311, __p3_311))); \ | 61926 | __ret_305 = vqsubh_s16(__s0_305, vqrdmulhh_s16(__s1_305, __noswap_vget_lane_s16(__rev2_305, __p3_305))); \ |
| 72518 | __ret_311; \ | 61927 | __ret_305; \ |
| 72519 | }) | 61928 | }) |
| 72520 | #endif | 61929 | #endif |
| 72521 | | 61930 | |
| 72522 | #ifdef __LITTLE_ENDIAN__ | 61931 | #ifdef __LITTLE_ENDIAN__ |
| 72523 | #define vqrdmlshs_laneq_s32(__p0_312, __p1_312, __p2_312, __p3_312) __extension__ ({ \ | 61932 | #define vqrdmlshs_laneq_s32(__p0_306, __p1_306, __p2_306, __p3_306) __extension__ ({ \ |
| 72524 | int32_t __s0_312 = __p0_312; \ | 61933 | int32_t __s0_306 = __p0_306; \ |
| 72525 | int32_t __s1_312 = __p1_312; \ | 61934 | int32_t __s1_306 = __p1_306; \ |
| 72526 | int32x4_t __s2_312 = __p2_312; \ | 61935 | int32x4_t __s2_306 = __p2_306; \ |
| 72527 | int32_t __ret_312; \ | 61936 | int32_t __ret_306; \ |
| 72528 | __ret_312 = vqsubs_s32(__s0_312, vqrdmulhs_s32(__s1_312, vgetq_lane_s32(__s2_312, __p3_312))); \ | 61937 | __ret_306 = vqsubs_s32(__s0_306, vqrdmulhs_s32(__s1_306, vgetq_lane_s32(__s2_306, __p3_306))); \ |
| 72529 | __ret_312; \ | 61938 | __ret_306; \ |
| 72530 | }) | 61939 | }) |
| 72531 | #else | 61940 | #else |
| 72532 | #define vqrdmlshs_laneq_s32(__p0_313, __p1_313, __p2_313, __p3_313) __extension__ ({ \ | 61941 | #define vqrdmlshs_laneq_s32(__p0_307, __p1_307, __p2_307, __p3_307) __extension__ ({ \ |
| 72533 | int32_t __s0_313 = __p0_313; \ | 61942 | int32_t __s0_307 = __p0_307; \ |
| 72534 | int32_t __s1_313 = __p1_313; \ | 61943 | int32_t __s1_307 = __p1_307; \ |
| 72535 | int32x4_t __s2_313 = __p2_313; \ | 61944 | int32x4_t __s2_307 = __p2_307; \ |
| 72536 | int32x4_t __rev2_313; __rev2_313 = __builtin_shufflevector(__s2_313, __s2_313, 3, 2, 1, 0); \ | 61945 | int32x4_t __rev2_307; __rev2_307 = __builtin_shufflevector(__s2_307, __s2_307, 3, 2, 1, 0); \ |
| 72537 | int32_t __ret_313; \ | 61946 | int32_t __ret_307; \ |
| 72538 | __ret_313 = __noswap_vqsubs_s32(__s0_313, __noswap_vqrdmulhs_s32(__s1_313, __noswap_vgetq_lane_s32(__rev2_313, __p3_313))); \ | 61947 | __ret_307 = vqsubs_s32(__s0_307, vqrdmulhs_s32(__s1_307, __noswap_vgetq_lane_s32(__rev2_307, __p3_307))); \ |
| 72539 | __ret_313; \ | 61948 | __ret_307; \ |
| 72540 | }) | 61949 | }) |
| 72541 | #endif | 61950 | #endif |
| 72542 | | 61951 | |
| 72543 | #ifdef __LITTLE_ENDIAN__ | 61952 | #ifdef __LITTLE_ENDIAN__ |
| 72544 | #define vqrdmlshh_laneq_s16(__p0_314, __p1_314, __p2_314, __p3_314) __extension__ ({ \ | 61953 | #define vqrdmlshh_laneq_s16(__p0_308, __p1_308, __p2_308, __p3_308) __extension__ ({ \ |
| 72545 | int16_t __s0_314 = __p0_314; \ | 61954 | int16_t __s0_308 = __p0_308; \ |
| 72546 | int16_t __s1_314 = __p1_314; \ | 61955 | int16_t __s1_308 = __p1_308; \ |
| 72547 | int16x8_t __s2_314 = __p2_314; \ | 61956 | int16x8_t __s2_308 = __p2_308; \ |
| 72548 | int16_t __ret_314; \ | 61957 | int16_t __ret_308; \ |
| 72549 | __ret_314 = vqsubh_s16(__s0_314, vqrdmulhh_s16(__s1_314, vgetq_lane_s16(__s2_314, __p3_314))); \ | 61958 | __ret_308 = vqsubh_s16(__s0_308, vqrdmulhh_s16(__s1_308, vgetq_lane_s16(__s2_308, __p3_308))); \ |
| 72550 | __ret_314; \ | 61959 | __ret_308; \ |
| 72551 | }) | 61960 | }) |
| 72552 | #else | 61961 | #else |
| 72553 | #define vqrdmlshh_laneq_s16(__p0_315, __p1_315, __p2_315, __p3_315) __extension__ ({ \ | 61962 | #define vqrdmlshh_laneq_s16(__p0_309, __p1_309, __p2_309, __p3_309) __extension__ ({ \ |
| 72554 | int16_t __s0_315 = __p0_315; \ | 61963 | int16_t __s0_309 = __p0_309; \ |
| 72555 | int16_t __s1_315 = __p1_315; \ | 61964 | int16_t __s1_309 = __p1_309; \ |
| 72556 | int16x8_t __s2_315 = __p2_315; \ | 61965 | int16x8_t __s2_309 = __p2_309; \ |
| 72557 | int16x8_t __rev2_315; __rev2_315 = __builtin_shufflevector(__s2_315, __s2_315, 7, 6, 5, 4, 3, 2, 1, 0); \ | 61966 | int16x8_t __rev2_309; __rev2_309 = __builtin_shufflevector(__s2_309, __s2_309, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 72558 | int16_t __ret_315; \ | 61967 | int16_t __ret_309; \ |
| 72559 | __ret_315 = __noswap_vqsubh_s16(__s0_315, __noswap_vqrdmulhh_s16(__s1_315, __noswap_vgetq_lane_s16(__rev2_315, __p3_315))); \ | 61968 | __ret_309 = vqsubh_s16(__s0_309, vqrdmulhh_s16(__s1_309, __noswap_vgetq_lane_s16(__rev2_309, __p3_309))); \ |
| 72560 | __ret_315; \ | 61969 | __ret_309; \ |
| 72561 | }) | 61970 | }) |
| 72562 | #endif | 61971 | #endif |
| 72563 | | 61972 | |
| ... | @@ -72870,161 +62279,139 @@ __ai int32x4_t vaddw_high_s16(int32x4_t __p0, int16x8_t __p1) { | ... | @@ -72870,161 +62279,139 @@ __ai int32x4_t vaddw_high_s16(int32x4_t __p0, int16x8_t __p1) { |
| 72870 | #endif | 62279 | #endif |
| 72871 | | 62280 | |
| 72872 | #ifdef __LITTLE_ENDIAN__ | 62281 | #ifdef __LITTLE_ENDIAN__ |
| 72873 | #define vcopyq_lane_p64(__p0_316, __p1_316, __p2_316, __p3_316) __extension__ ({ \ | 62282 | #define vcopyq_lane_p64(__p0_310, __p1_310, __p2_310, __p3_310) __extension__ ({ \ |
| | 62283 | poly64x2_t __s0_310 = __p0_310; \ |
| | 62284 | poly64x1_t __s2_310 = __p2_310; \ |
| | 62285 | poly64x2_t __ret_310; \ |
| | 62286 | __ret_310 = vsetq_lane_p64(vget_lane_p64(__s2_310, __p3_310), __s0_310, __p1_310); \ |
| | 62287 | __ret_310; \ |
| | 62288 | }) |
| | 62289 | #else |
| | 62290 | #define vcopyq_lane_p64(__p0_311, __p1_311, __p2_311, __p3_311) __extension__ ({ \ |
| | 62291 | poly64x2_t __s0_311 = __p0_311; \ |
| | 62292 | poly64x1_t __s2_311 = __p2_311; \ |
| | 62293 | poly64x2_t __rev0_311; __rev0_311 = __builtin_shufflevector(__s0_311, __s0_311, 1, 0); \ |
| | 62294 | poly64x2_t __ret_311; \ |
| | 62295 | __ret_311 = __noswap_vsetq_lane_p64(vget_lane_p64(__s2_311, __p3_311), __rev0_311, __p1_311); \ |
| | 62296 | __ret_311 = __builtin_shufflevector(__ret_311, __ret_311, 1, 0); \ |
| | 62297 | __ret_311; \ |
| | 62298 | }) |
| | 62299 | #endif |
| | 62300 | |
| | 62301 | #ifdef __LITTLE_ENDIAN__ |
| | 62302 | #define vcopyq_lane_f64(__p0_312, __p1_312, __p2_312, __p3_312) __extension__ ({ \ |
| | 62303 | float64x2_t __s0_312 = __p0_312; \ |
| | 62304 | float64x1_t __s2_312 = __p2_312; \ |
| | 62305 | float64x2_t __ret_312; \ |
| | 62306 | __ret_312 = vsetq_lane_f64(vget_lane_f64(__s2_312, __p3_312), __s0_312, __p1_312); \ |
| | 62307 | __ret_312; \ |
| | 62308 | }) |
| | 62309 | #else |
| | 62310 | #define vcopyq_lane_f64(__p0_313, __p1_313, __p2_313, __p3_313) __extension__ ({ \ |
| | 62311 | float64x2_t __s0_313 = __p0_313; \ |
| | 62312 | float64x1_t __s2_313 = __p2_313; \ |
| | 62313 | float64x2_t __rev0_313; __rev0_313 = __builtin_shufflevector(__s0_313, __s0_313, 1, 0); \ |
| | 62314 | float64x2_t __ret_313; \ |
| | 62315 | __ret_313 = __noswap_vsetq_lane_f64(vget_lane_f64(__s2_313, __p3_313), __rev0_313, __p1_313); \ |
| | 62316 | __ret_313 = __builtin_shufflevector(__ret_313, __ret_313, 1, 0); \ |
| | 62317 | __ret_313; \ |
| | 62318 | }) |
| | 62319 | #endif |
| | 62320 | |
| | 62321 | #define vcopy_lane_p64(__p0_314, __p1_314, __p2_314, __p3_314) __extension__ ({ \ |
| | 62322 | poly64x1_t __s0_314 = __p0_314; \ |
| | 62323 | poly64x1_t __s2_314 = __p2_314; \ |
| | 62324 | poly64x1_t __ret_314; \ |
| | 62325 | __ret_314 = vset_lane_p64(vget_lane_p64(__s2_314, __p3_314), __s0_314, __p1_314); \ |
| | 62326 | __ret_314; \ |
| | 62327 | }) |
| | 62328 | #define vcopy_lane_f64(__p0_315, __p1_315, __p2_315, __p3_315) __extension__ ({ \ |
| | 62329 | float64x1_t __s0_315 = __p0_315; \ |
| | 62330 | float64x1_t __s2_315 = __p2_315; \ |
| | 62331 | float64x1_t __ret_315; \ |
| | 62332 | __ret_315 = vset_lane_f64(vget_lane_f64(__s2_315, __p3_315), __s0_315, __p1_315); \ |
| | 62333 | __ret_315; \ |
| | 62334 | }) |
| | 62335 | #ifdef __LITTLE_ENDIAN__ |
| | 62336 | #define vcopyq_laneq_p64(__p0_316, __p1_316, __p2_316, __p3_316) __extension__ ({ \ |
| 72874 | poly64x2_t __s0_316 = __p0_316; \ | 62337 | poly64x2_t __s0_316 = __p0_316; \ |
| 72875 | poly64x1_t __s2_316 = __p2_316; \ | 62338 | poly64x2_t __s2_316 = __p2_316; \ |
| 72876 | poly64x2_t __ret_316; \ | 62339 | poly64x2_t __ret_316; \ |
| 72877 | __ret_316 = vsetq_lane_p64(vget_lane_p64(__s2_316, __p3_316), __s0_316, __p1_316); \ | 62340 | __ret_316 = vsetq_lane_p64(vgetq_lane_p64(__s2_316, __p3_316), __s0_316, __p1_316); \ |
| 72878 | __ret_316; \ | 62341 | __ret_316; \ |
| 72879 | }) | 62342 | }) |
| 72880 | #else | 62343 | #else |
| 72881 | #define vcopyq_lane_p64(__p0_317, __p1_317, __p2_317, __p3_317) __extension__ ({ \ | 62344 | #define vcopyq_laneq_p64(__p0_317, __p1_317, __p2_317, __p3_317) __extension__ ({ \ |
| 72882 | poly64x2_t __s0_317 = __p0_317; \ | 62345 | poly64x2_t __s0_317 = __p0_317; \ |
| 72883 | poly64x1_t __s2_317 = __p2_317; \ | 62346 | poly64x2_t __s2_317 = __p2_317; \ |
| 72884 | poly64x2_t __rev0_317; __rev0_317 = __builtin_shufflevector(__s0_317, __s0_317, 1, 0); \ | 62347 | poly64x2_t __rev0_317; __rev0_317 = __builtin_shufflevector(__s0_317, __s0_317, 1, 0); \ |
| | 62348 | poly64x2_t __rev2_317; __rev2_317 = __builtin_shufflevector(__s2_317, __s2_317, 1, 0); \ |
| 72885 | poly64x2_t __ret_317; \ | 62349 | poly64x2_t __ret_317; \ |
| 72886 | __ret_317 = __noswap_vsetq_lane_p64(__noswap_vget_lane_p64(__s2_317, __p3_317), __rev0_317, __p1_317); \ | 62350 | __ret_317 = __noswap_vsetq_lane_p64(__noswap_vgetq_lane_p64(__rev2_317, __p3_317), __rev0_317, __p1_317); \ |
| 72887 | __ret_317 = __builtin_shufflevector(__ret_317, __ret_317, 1, 0); \ | 62351 | __ret_317 = __builtin_shufflevector(__ret_317, __ret_317, 1, 0); \ |
| 72888 | __ret_317; \ | 62352 | __ret_317; \ |
| 72889 | }) | 62353 | }) |
| 72890 | #endif | 62354 | #endif |
| 72891 | | 62355 | |
| 72892 | #ifdef __LITTLE_ENDIAN__ | 62356 | #ifdef __LITTLE_ENDIAN__ |
| 72893 | #define vcopyq_lane_f64(__p0_318, __p1_318, __p2_318, __p3_318) __extension__ ({ \ | 62357 | #define vcopyq_laneq_f64(__p0_318, __p1_318, __p2_318, __p3_318) __extension__ ({ \ |
| 72894 | float64x2_t __s0_318 = __p0_318; \ | 62358 | float64x2_t __s0_318 = __p0_318; \ |
| 72895 | float64x1_t __s2_318 = __p2_318; \ | 62359 | float64x2_t __s2_318 = __p2_318; \ |
| 72896 | float64x2_t __ret_318; \ | 62360 | float64x2_t __ret_318; \ |
| 72897 | __ret_318 = vsetq_lane_f64(vget_lane_f64(__s2_318, __p3_318), __s0_318, __p1_318); \ | 62361 | __ret_318 = vsetq_lane_f64(vgetq_lane_f64(__s2_318, __p3_318), __s0_318, __p1_318); \ |
| 72898 | __ret_318; \ | 62362 | __ret_318; \ |
| 72899 | }) | 62363 | }) |
| 72900 | #else | 62364 | #else |
| 72901 | #define vcopyq_lane_f64(__p0_319, __p1_319, __p2_319, __p3_319) __extension__ ({ \ | 62365 | #define vcopyq_laneq_f64(__p0_319, __p1_319, __p2_319, __p3_319) __extension__ ({ \ |
| 72902 | float64x2_t __s0_319 = __p0_319; \ | 62366 | float64x2_t __s0_319 = __p0_319; \ |
| 72903 | float64x1_t __s2_319 = __p2_319; \ | 62367 | float64x2_t __s2_319 = __p2_319; \ |
| 72904 | float64x2_t __rev0_319; __rev0_319 = __builtin_shufflevector(__s0_319, __s0_319, 1, 0); \ | 62368 | float64x2_t __rev0_319; __rev0_319 = __builtin_shufflevector(__s0_319, __s0_319, 1, 0); \ |
| | 62369 | float64x2_t __rev2_319; __rev2_319 = __builtin_shufflevector(__s2_319, __s2_319, 1, 0); \ |
| 72905 | float64x2_t __ret_319; \ | 62370 | float64x2_t __ret_319; \ |
| 72906 | __ret_319 = __noswap_vsetq_lane_f64(__noswap_vget_lane_f64(__s2_319, __p3_319), __rev0_319, __p1_319); \ | 62371 | __ret_319 = __noswap_vsetq_lane_f64(__noswap_vgetq_lane_f64(__rev2_319, __p3_319), __rev0_319, __p1_319); \ |
| 72907 | __ret_319 = __builtin_shufflevector(__ret_319, __ret_319, 1, 0); \ | 62372 | __ret_319 = __builtin_shufflevector(__ret_319, __ret_319, 1, 0); \ |
| 72908 | __ret_319; \ | 62373 | __ret_319; \ |
| 72909 | }) | 62374 | }) |
| 72910 | #endif | 62375 | #endif |
| 72911 | | 62376 | |
| 72912 | #ifdef __LITTLE_ENDIAN__ | 62377 | #ifdef __LITTLE_ENDIAN__ |
| 72913 | #define vcopy_lane_p64(__p0_320, __p1_320, __p2_320, __p3_320) __extension__ ({ \ | 62378 | #define vcopy_laneq_p64(__p0_320, __p1_320, __p2_320, __p3_320) __extension__ ({ \ |
| 72914 | poly64x1_t __s0_320 = __p0_320; \ | 62379 | poly64x1_t __s0_320 = __p0_320; \ |
| 72915 | poly64x1_t __s2_320 = __p2_320; \ | 62380 | poly64x2_t __s2_320 = __p2_320; \ |
| 72916 | poly64x1_t __ret_320; \ | 62381 | poly64x1_t __ret_320; \ |
| 72917 | __ret_320 = vset_lane_p64(vget_lane_p64(__s2_320, __p3_320), __s0_320, __p1_320); \ | 62382 | __ret_320 = vset_lane_p64(vgetq_lane_p64(__s2_320, __p3_320), __s0_320, __p1_320); \ |
| 72918 | __ret_320; \ | 62383 | __ret_320; \ |
| 72919 | }) | 62384 | }) |
| 72920 | #else | 62385 | #else |
| 72921 | #define vcopy_lane_p64(__p0_321, __p1_321, __p2_321, __p3_321) __extension__ ({ \ | 62386 | #define vcopy_laneq_p64(__p0_321, __p1_321, __p2_321, __p3_321) __extension__ ({ \ |
| 72922 | poly64x1_t __s0_321 = __p0_321; \ | 62387 | poly64x1_t __s0_321 = __p0_321; \ |
| 72923 | poly64x1_t __s2_321 = __p2_321; \ | 62388 | poly64x2_t __s2_321 = __p2_321; \ |
| | 62389 | poly64x2_t __rev2_321; __rev2_321 = __builtin_shufflevector(__s2_321, __s2_321, 1, 0); \ |
| 72924 | poly64x1_t __ret_321; \ | 62390 | poly64x1_t __ret_321; \ |
| 72925 | __ret_321 = __noswap_vset_lane_p64(__noswap_vget_lane_p64(__s2_321, __p3_321), __s0_321, __p1_321); \ | 62391 | __ret_321 = vset_lane_p64(__noswap_vgetq_lane_p64(__rev2_321, __p3_321), __s0_321, __p1_321); \ |
| 72926 | __ret_321; \ | 62392 | __ret_321; \ |
| 72927 | }) | 62393 | }) |
| 72928 | #endif | 62394 | #endif |
| 72929 | | 62395 | |
| 72930 | #ifdef __LITTLE_ENDIAN__ | 62396 | #ifdef __LITTLE_ENDIAN__ |
| 72931 | #define vcopy_lane_f64(__p0_322, __p1_322, __p2_322, __p3_322) __extension__ ({ \ | 62397 | #define vcopy_laneq_f64(__p0_322, __p1_322, __p2_322, __p3_322) __extension__ ({ \ |
| 72932 | float64x1_t __s0_322 = __p0_322; \ | 62398 | float64x1_t __s0_322 = __p0_322; \ |
| 72933 | float64x1_t __s2_322 = __p2_322; \ | 62399 | float64x2_t __s2_322 = __p2_322; \ |
| 72934 | float64x1_t __ret_322; \ | 62400 | float64x1_t __ret_322; \ |
| 72935 | __ret_322 = vset_lane_f64(vget_lane_f64(__s2_322, __p3_322), __s0_322, __p1_322); \ | 62401 | __ret_322 = vset_lane_f64(vgetq_lane_f64(__s2_322, __p3_322), __s0_322, __p1_322); \ |
| 72936 | __ret_322; \ | 62402 | __ret_322; \ |
| 72937 | }) | 62403 | }) |
| 72938 | #else | 62404 | #else |
| 72939 | #define vcopy_lane_f64(__p0_323, __p1_323, __p2_323, __p3_323) __extension__ ({ \ | 62405 | #define vcopy_laneq_f64(__p0_323, __p1_323, __p2_323, __p3_323) __extension__ ({ \ |
| 72940 | float64x1_t __s0_323 = __p0_323; \ | 62406 | float64x1_t __s0_323 = __p0_323; \ |
| 72941 | float64x1_t __s2_323 = __p2_323; \ | 62407 | float64x2_t __s2_323 = __p2_323; \ |
| | 62408 | float64x2_t __rev2_323; __rev2_323 = __builtin_shufflevector(__s2_323, __s2_323, 1, 0); \ |
| 72942 | float64x1_t __ret_323; \ | 62409 | float64x1_t __ret_323; \ |
| 72943 | __ret_323 = __noswap_vset_lane_f64(__noswap_vget_lane_f64(__s2_323, __p3_323), __s0_323, __p1_323); \ | 62410 | __ret_323 = vset_lane_f64(__noswap_vgetq_lane_f64(__rev2_323, __p3_323), __s0_323, __p1_323); \ |
| 72944 | __ret_323; \ | 62411 | __ret_323; \ |
| 72945 | }) | 62412 | }) |
| 72946 | #endif | 62413 | #endif |
| 72947 | | 62414 | |
| 72948 | #ifdef __LITTLE_ENDIAN__ | | |
| 72949 | #define vcopyq_laneq_p64(__p0_324, __p1_324, __p2_324, __p3_324) __extension__ ({ \ | | |
| 72950 | poly64x2_t __s0_324 = __p0_324; \ | | |
| 72951 | poly64x2_t __s2_324 = __p2_324; \ | | |
| 72952 | poly64x2_t __ret_324; \ | | |
| 72953 | __ret_324 = vsetq_lane_p64(vgetq_lane_p64(__s2_324, __p3_324), __s0_324, __p1_324); \ | | |
| 72954 | __ret_324; \ | | |
| 72955 | }) | | |
| 72956 | #else | | |
| 72957 | #define vcopyq_laneq_p64(__p0_325, __p1_325, __p2_325, __p3_325) __extension__ ({ \ | | |
| 72958 | poly64x2_t __s0_325 = __p0_325; \ | | |
| 72959 | poly64x2_t __s2_325 = __p2_325; \ | | |
| 72960 | poly64x2_t __rev0_325; __rev0_325 = __builtin_shufflevector(__s0_325, __s0_325, 1, 0); \ | | |
| 72961 | poly64x2_t __rev2_325; __rev2_325 = __builtin_shufflevector(__s2_325, __s2_325, 1, 0); \ | | |
| 72962 | poly64x2_t __ret_325; \ | | |
| 72963 | __ret_325 = __noswap_vsetq_lane_p64(__noswap_vgetq_lane_p64(__rev2_325, __p3_325), __rev0_325, __p1_325); \ | | |
| 72964 | __ret_325 = __builtin_shufflevector(__ret_325, __ret_325, 1, 0); \ | | |
| 72965 | __ret_325; \ | | |
| 72966 | }) | | |
| 72967 | #endif | | |
| 72968 | | | |
| 72969 | #ifdef __LITTLE_ENDIAN__ | | |
| 72970 | #define vcopyq_laneq_f64(__p0_326, __p1_326, __p2_326, __p3_326) __extension__ ({ \ | | |
| 72971 | float64x2_t __s0_326 = __p0_326; \ | | |
| 72972 | float64x2_t __s2_326 = __p2_326; \ | | |
| 72973 | float64x2_t __ret_326; \ | | |
| 72974 | __ret_326 = vsetq_lane_f64(vgetq_lane_f64(__s2_326, __p3_326), __s0_326, __p1_326); \ | | |
| 72975 | __ret_326; \ | | |
| 72976 | }) | | |
| 72977 | #else | | |
| 72978 | #define vcopyq_laneq_f64(__p0_327, __p1_327, __p2_327, __p3_327) __extension__ ({ \ | | |
| 72979 | float64x2_t __s0_327 = __p0_327; \ | | |
| 72980 | float64x2_t __s2_327 = __p2_327; \ | | |
| 72981 | float64x2_t __rev0_327; __rev0_327 = __builtin_shufflevector(__s0_327, __s0_327, 1, 0); \ | | |
| 72982 | float64x2_t __rev2_327; __rev2_327 = __builtin_shufflevector(__s2_327, __s2_327, 1, 0); \ | | |
| 72983 | float64x2_t __ret_327; \ | | |
| 72984 | __ret_327 = __noswap_vsetq_lane_f64(__noswap_vgetq_lane_f64(__rev2_327, __p3_327), __rev0_327, __p1_327); \ | | |
| 72985 | __ret_327 = __builtin_shufflevector(__ret_327, __ret_327, 1, 0); \ | | |
| 72986 | __ret_327; \ | | |
| 72987 | }) | | |
| 72988 | #endif | | |
| 72989 | | | |
| 72990 | #ifdef __LITTLE_ENDIAN__ | | |
| 72991 | #define vcopy_laneq_p64(__p0_328, __p1_328, __p2_328, __p3_328) __extension__ ({ \ | | |
| 72992 | poly64x1_t __s0_328 = __p0_328; \ | | |
| 72993 | poly64x2_t __s2_328 = __p2_328; \ | | |
| 72994 | poly64x1_t __ret_328; \ | | |
| 72995 | __ret_328 = vset_lane_p64(vgetq_lane_p64(__s2_328, __p3_328), __s0_328, __p1_328); \ | | |
| 72996 | __ret_328; \ | | |
| 72997 | }) | | |
| 72998 | #else | | |
| 72999 | #define vcopy_laneq_p64(__p0_329, __p1_329, __p2_329, __p3_329) __extension__ ({ \ | | |
| 73000 | poly64x1_t __s0_329 = __p0_329; \ | | |
| 73001 | poly64x2_t __s2_329 = __p2_329; \ | | |
| 73002 | poly64x2_t __rev2_329; __rev2_329 = __builtin_shufflevector(__s2_329, __s2_329, 1, 0); \ | | |
| 73003 | poly64x1_t __ret_329; \ | | |
| 73004 | __ret_329 = __noswap_vset_lane_p64(__noswap_vgetq_lane_p64(__rev2_329, __p3_329), __s0_329, __p1_329); \ | | |
| 73005 | __ret_329; \ | | |
| 73006 | }) | | |
| 73007 | #endif | | |
| 73008 | | | |
| 73009 | #ifdef __LITTLE_ENDIAN__ | | |
| 73010 | #define vcopy_laneq_f64(__p0_330, __p1_330, __p2_330, __p3_330) __extension__ ({ \ | | |
| 73011 | float64x1_t __s0_330 = __p0_330; \ | | |
| 73012 | float64x2_t __s2_330 = __p2_330; \ | | |
| 73013 | float64x1_t __ret_330; \ | | |
| 73014 | __ret_330 = vset_lane_f64(vgetq_lane_f64(__s2_330, __p3_330), __s0_330, __p1_330); \ | | |
| 73015 | __ret_330; \ | | |
| 73016 | }) | | |
| 73017 | #else | | |
| 73018 | #define vcopy_laneq_f64(__p0_331, __p1_331, __p2_331, __p3_331) __extension__ ({ \ | | |
| 73019 | float64x1_t __s0_331 = __p0_331; \ | | |
| 73020 | float64x2_t __s2_331 = __p2_331; \ | | |
| 73021 | float64x2_t __rev2_331; __rev2_331 = __builtin_shufflevector(__s2_331, __s2_331, 1, 0); \ | | |
| 73022 | float64x1_t __ret_331; \ | | |
| 73023 | __ret_331 = __noswap_vset_lane_f64(__noswap_vgetq_lane_f64(__rev2_331, __p3_331), __s0_331, __p1_331); \ | | |
| 73024 | __ret_331; \ | | |
| 73025 | }) | | |
| 73026 | #endif | | |
| 73027 | | | |
| 73028 | #ifdef __LITTLE_ENDIAN__ | 62415 | #ifdef __LITTLE_ENDIAN__ |
| 73029 | __ai uint16x8_t vmlal_high_u8(uint16x8_t __p0, uint8x16_t __p1, uint8x16_t __p2) { | 62416 | __ai uint16x8_t vmlal_high_u8(uint16x8_t __p0, uint8x16_t __p1, uint8x16_t __p2) { |
| 73030 | uint16x8_t __ret; | 62417 | uint16x8_t __ret; |
| ... | @@ -73377,52 +62764,38 @@ __ai int32x4_t vmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { | ... | @@ -73377,52 +62764,38 @@ __ai int32x4_t vmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { |
| 73377 | } | 62764 | } |
| 73378 | #endif | 62765 | #endif |
| 73379 | | 62766 | |
| 73380 | #ifdef __LITTLE_ENDIAN__ | 62767 | #define vmulx_lane_f64(__p0_324, __p1_324, __p2_324) __extension__ ({ \ |
| 73381 | #define vmulx_lane_f64(__p0_332, __p1_332, __p2_332) __extension__ ({ \ | 62768 | float64x1_t __s0_324 = __p0_324; \ |
| 73382 | float64x1_t __s0_332 = __p0_332; \ | 62769 | float64x1_t __s1_324 = __p1_324; \ |
| 73383 | float64x1_t __s1_332 = __p1_332; \ | 62770 | float64x1_t __ret_324; \ |
| 73384 | float64x1_t __ret_332; \ | 62771 | float64_t __x_324 = vget_lane_f64(__s0_324, 0); \ |
| 73385 | float64_t __x_332 = vget_lane_f64(__s0_332, 0); \ | 62772 | float64_t __y_324 = vget_lane_f64(__s1_324, __p2_324); \ |
| 73386 | float64_t __y_332 = vget_lane_f64(__s1_332, __p2_332); \ | 62773 | float64_t __z_324 = vmulxd_f64(__x_324, __y_324); \ |
| 73387 | float64_t __z_332 = vmulxd_f64(__x_332, __y_332); \ | 62774 | __ret_324 = vset_lane_f64(__z_324, __s0_324, __p2_324); \ |
| 73388 | __ret_332 = vset_lane_f64(__z_332, __s0_332, __p2_332); \ | 62775 | __ret_324; \ |
| 73389 | __ret_332; \ | | |
| 73390 | }) | | |
| 73391 | #else | | |
| 73392 | #define vmulx_lane_f64(__p0_333, __p1_333, __p2_333) __extension__ ({ \ | | |
| 73393 | float64x1_t __s0_333 = __p0_333; \ | | |
| 73394 | float64x1_t __s1_333 = __p1_333; \ | | |
| 73395 | float64x1_t __ret_333; \ | | |
| 73396 | float64_t __x_333 = __noswap_vget_lane_f64(__s0_333, 0); \ | | |
| 73397 | float64_t __y_333 = __noswap_vget_lane_f64(__s1_333, __p2_333); \ | | |
| 73398 | float64_t __z_333 = __noswap_vmulxd_f64(__x_333, __y_333); \ | | |
| 73399 | __ret_333 = __noswap_vset_lane_f64(__z_333, __s0_333, __p2_333); \ | | |
| 73400 | __ret_333; \ | | |
| 73401 | }) | 62776 | }) |
| 73402 | #endif | | |
| 73403 | | | |
| 73404 | #ifdef __LITTLE_ENDIAN__ | 62777 | #ifdef __LITTLE_ENDIAN__ |
| 73405 | #define vmulx_laneq_f64(__p0_334, __p1_334, __p2_334) __extension__ ({ \ | 62778 | #define vmulx_laneq_f64(__p0_325, __p1_325, __p2_325) __extension__ ({ \ |
| 73406 | float64x1_t __s0_334 = __p0_334; \ | 62779 | float64x1_t __s0_325 = __p0_325; \ |
| 73407 | float64x2_t __s1_334 = __p1_334; \ | 62780 | float64x2_t __s1_325 = __p1_325; \ |
| 73408 | float64x1_t __ret_334; \ | 62781 | float64x1_t __ret_325; \ |
| 73409 | float64_t __x_334 = vget_lane_f64(__s0_334, 0); \ | 62782 | float64_t __x_325 = vget_lane_f64(__s0_325, 0); \ |
| 73410 | float64_t __y_334 = vgetq_lane_f64(__s1_334, __p2_334); \ | 62783 | float64_t __y_325 = vgetq_lane_f64(__s1_325, __p2_325); \ |
| 73411 | float64_t __z_334 = vmulxd_f64(__x_334, __y_334); \ | 62784 | float64_t __z_325 = vmulxd_f64(__x_325, __y_325); \ |
| 73412 | __ret_334 = vset_lane_f64(__z_334, __s0_334, 0); \ | 62785 | __ret_325 = vset_lane_f64(__z_325, __s0_325, 0); \ |
| 73413 | __ret_334; \ | 62786 | __ret_325; \ |
| 73414 | }) | 62787 | }) |
| 73415 | #else | 62788 | #else |
| 73416 | #define vmulx_laneq_f64(__p0_335, __p1_335, __p2_335) __extension__ ({ \ | 62789 | #define vmulx_laneq_f64(__p0_326, __p1_326, __p2_326) __extension__ ({ \ |
| 73417 | float64x1_t __s0_335 = __p0_335; \ | 62790 | float64x1_t __s0_326 = __p0_326; \ |
| 73418 | float64x2_t __s1_335 = __p1_335; \ | 62791 | float64x2_t __s1_326 = __p1_326; \ |
| 73419 | float64x2_t __rev1_335; __rev1_335 = __builtin_shufflevector(__s1_335, __s1_335, 1, 0); \ | 62792 | float64x2_t __rev1_326; __rev1_326 = __builtin_shufflevector(__s1_326, __s1_326, 1, 0); \ |
| 73420 | float64x1_t __ret_335; \ | 62793 | float64x1_t __ret_326; \ |
| 73421 | float64_t __x_335 = __noswap_vget_lane_f64(__s0_335, 0); \ | 62794 | float64_t __x_326 = vget_lane_f64(__s0_326, 0); \ |
| 73422 | float64_t __y_335 = __noswap_vgetq_lane_f64(__rev1_335, __p2_335); \ | 62795 | float64_t __y_326 = __noswap_vgetq_lane_f64(__rev1_326, __p2_326); \ |
| 73423 | float64_t __z_335 = __noswap_vmulxd_f64(__x_335, __y_335); \ | 62796 | float64_t __z_326 = vmulxd_f64(__x_326, __y_326); \ |
| 73424 | __ret_335 = __noswap_vset_lane_f64(__z_335, __s0_335, 0); \ | 62797 | __ret_326 = vset_lane_f64(__z_326, __s0_326, 0); \ |
| 73425 | __ret_335; \ | 62798 | __ret_326; \ |
| 73426 | }) | 62799 | }) |
| 73427 | #endif | 62800 | #endif |
| 73428 | | 62801 | |