authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2019-11-26 13:12:57-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2019-11-26 14:25:35-05:00
log7de138ad7cef1f9d1743a82f9a0419142484f24a
treed51af7d53faa2504ff9b3928fba09e0ecdf7ea2d
parentaca13675332474bad428166b744ec94f806bd2cc
signaturelock-open Commit is signed but in an unrecognized format.

std.elf: breaking improvements to the API

and also integration with std.Target.Arch

4 files changed, 820 insertions(+), 55 deletions(-)

lib/std/dynamic_library.zig+1-1
...@@ -151,7 +151,7 @@ pub const ElfLib = struct {...@@ -151,7 +151,7 @@ pub const ElfLib = struct {
151 pub fn init(bytes: []align(@alignOf(elf.Ehdr)) u8) !ElfLib {151 pub fn init(bytes: []align(@alignOf(elf.Ehdr)) u8) !ElfLib {
152 const eh = @ptrCast(*elf.Ehdr, bytes.ptr);152 const eh = @ptrCast(*elf.Ehdr, bytes.ptr);
153 if (!mem.eql(u8, eh.e_ident[0..4], "\x7fELF")) return error.NotElfFile;153 if (!mem.eql(u8, eh.e_ident[0..4], "\x7fELF")) return error.NotElfFile;
154 if (eh.e_type != elf.ET_DYN) return error.NotDynamicLibrary;154 if (eh.e_type != elf.ET.DYN) return error.NotDynamicLibrary;
155155
156 const elf_addr = @ptrToInt(bytes.ptr);156 const elf_addr = @ptrToInt(bytes.ptr);
157 var ph_addr: usize = elf_addr + eh.e_phoff;157 var ph_addr: usize = elf_addr + eh.e_phoff;
lib/std/elf.zig+671-54
...@@ -306,41 +306,31 @@ pub const STT_ARM_16BIT = STT_HIPROC;...@@ -306,41 +306,31 @@ pub const STT_ARM_16BIT = STT_HIPROC;
306pub const VER_FLG_BASE = 0x1;306pub const VER_FLG_BASE = 0x1;
307pub const VER_FLG_WEAK = 0x2;307pub const VER_FLG_WEAK = 0x2;
308308
309/// An unknown type.309/// File types
310pub const ET_NONE = 0;310pub const ET = extern enum(u16) {
311 /// No file type
312 NONE = 0,
311313
312/// A relocatable file.314 /// Relocatable file
313pub const ET_REL = 1;315 REL = 1,
314316
315/// An executable file.317 /// Executable file
316pub const ET_EXEC = 2;318 EXEC = 2,
317319
318/// A shared object.320 /// Shared object file
319pub const ET_DYN = 3;321 DYN = 3,
320322
321/// A core file.323 /// Core file
322pub const ET_CORE = 4;324 CORE = 4,
323325
324pub const FileType = enum {326 /// Beginning of processor-specific codes
325 Relocatable,327 pub const LOPROC = 0xff00;
326 Executable,
327 Shared,
328 Core,
329};
330328
331pub const Arch = enum {329 /// Processor-specific
332 Sparc,330 pub const HIPROC = 0xffff;
333 x86,
334 Mips,
335 PowerPc,
336 Arm,
337 SuperH,
338 IA_64,
339 x86_64,
340 AArch64,
341 RiscV,
342};331};
343332
333/// TODO delete this in favor of Elf64_Shdr
344pub const SectionHeader = struct {334pub const SectionHeader = struct {
345 name: u32,335 name: u32,
346 sh_type: u32,336 sh_type: u32,
...@@ -359,8 +349,8 @@ pub const Elf = struct {...@@ -359,8 +349,8 @@ pub const Elf = struct {
359 in_stream: *io.InStream(anyerror),349 in_stream: *io.InStream(anyerror),
360 is_64: bool,350 is_64: bool,
361 endian: builtin.Endian,351 endian: builtin.Endian,
362 file_type: FileType,352 file_type: ET,
363 arch: Arch,353 arch: EM,
364 entry_addr: u64,354 entry_addr: u64,
365 program_header_offset: u64,355 program_header_offset: u64,
366 section_header_offset: u64,356 section_header_offset: u64,
...@@ -411,27 +401,8 @@ pub const Elf = struct {...@@ -411,27 +401,8 @@ pub const Elf = struct {
411 // skip over padding401 // skip over padding
412 try seekable_stream.seekBy(9);402 try seekable_stream.seekBy(9);
413403
414 elf.file_type = switch (try in.readInt(u16, elf.endian)) {404 elf.file_type = try in.readEnum(ET, elf.endian);
415 1 => FileType.Relocatable,405 elf.arch = try in.readEnum(EM, elf.endian);
416 2 => FileType.Executable,
417 3 => FileType.Shared,
418 4 => FileType.Core,
419 else => return error.InvalidFormat,
420 };
421
422 elf.arch = switch (try in.readInt(u16, elf.endian)) {
423 0x02 => Arch.Sparc,
424 0x03 => Arch.x86,
425 0x08 => Arch.Mips,
426 0x14 => Arch.PowerPc,
427 0x28 => Arch.Arm,
428 0x2A => Arch.SuperH,
429 0x32 => Arch.IA_64,
430 0x3E => Arch.x86_64,
431 0xb7 => Arch.AArch64,
432 0xf3 => Arch.RiscV,
433 else => return error.InvalidFormat,
434 };
435406
436 const elf_version = try in.readInt(u32, elf.endian);407 const elf_version = try in.readInt(u32, elf.endian);
437 if (elf_version != 1) return error.InvalidFormat;408 if (elf_version != 1) return error.InvalidFormat;
...@@ -577,8 +548,8 @@ pub const Elf32_Versym = Elf32_Half;...@@ -577,8 +548,8 @@ pub const Elf32_Versym = Elf32_Half;
577pub const Elf64_Versym = Elf64_Half;548pub const Elf64_Versym = Elf64_Half;
578pub const Elf32_Ehdr = extern struct {549pub const Elf32_Ehdr = extern struct {
579 e_ident: [EI_NIDENT]u8,550 e_ident: [EI_NIDENT]u8,
580 e_type: Elf32_Half,551 e_type: ET,
581 e_machine: Elf32_Half,552 e_machine: EM,
582 e_version: Elf32_Word,553 e_version: Elf32_Word,
583 e_entry: Elf32_Addr,554 e_entry: Elf32_Addr,
584 e_phoff: Elf32_Off,555 e_phoff: Elf32_Off,
...@@ -593,8 +564,8 @@ pub const Elf32_Ehdr = extern struct {...@@ -593,8 +564,8 @@ pub const Elf32_Ehdr = extern struct {
593};564};
594pub const Elf64_Ehdr = extern struct {565pub const Elf64_Ehdr = extern struct {
595 e_ident: [EI_NIDENT]u8,566 e_ident: [EI_NIDENT]u8,
596 e_type: Elf64_Half,567 e_type: ET,
597 e_machine: Elf64_Half,568 e_machine: EM,
598 e_version: Elf64_Word,569 e_version: Elf64_Word,
599 e_entry: Elf64_Addr,570 e_entry: Elf64_Addr,
600 e_phoff: Elf64_Off,571 e_phoff: Elf64_Off,
...@@ -902,3 +873,649 @@ pub const Verdaux = switch (@sizeOf(usize)) {...@@ -902,3 +873,649 @@ pub const Verdaux = switch (@sizeOf(usize)) {
902 8 => Elf64_Verdaux,873 8 => Elf64_Verdaux,
903 else => @compileError("expected pointer size of 32 or 64"),874 else => @compileError("expected pointer size of 32 or 64"),
904};875};
876
877/// Machine architectures
878/// See current registered ELF machine architectures at:
879/// http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html
880/// The underscore prefix is because many of these start with numbers.
881pub const EM = extern enum(u16) {
882 /// No machine
883 _NONE = 0,
884
885 /// AT&T WE 32100
886 _M32 = 1,
887
888 /// SPARC
889 _SPARC = 2,
890
891 /// Intel 386
892 _386 = 3,
893
894 /// Motorola 68000
895 _68K = 4,
896
897 /// Motorola 88000
898 _88K = 5,
899
900 /// Intel MCU
901 _IAMCU = 6,
902
903 /// Intel 80860
904 _860 = 7,
905
906 /// MIPS R3000
907 _MIPS = 8,
908
909 /// IBM System/370
910 _S370 = 9,
911
912 /// MIPS RS3000 Little-endian
913 _MIPS_RS3_LE = 10,
914
915 /// Hewlett-Packard PA-RISC
916 _PARISC = 15,
917
918 /// Fujitsu VPP500
919 _VPP500 = 17,
920
921 /// Enhanced instruction set SPARC
922 _SPARC32PLUS = 18,
923
924 /// Intel 80960
925 _960 = 19,
926
927 /// PowerPC
928 _PPC = 20,
929
930 /// PowerPC64
931 _PPC64 = 21,
932
933 /// IBM System/390
934 _S390 = 22,
935
936 /// IBM SPU/SPC
937 _SPU = 23,
938
939 /// NEC V800
940 _V800 = 36,
941
942 /// Fujitsu FR20
943 _FR20 = 37,
944
945 /// TRW RH-32
946 _RH32 = 38,
947
948 /// Motorola RCE
949 _RCE = 39,
950
951 /// ARM
952 _ARM = 40,
953
954 /// DEC Alpha
955 _ALPHA = 41,
956
957 /// Hitachi SH
958 _SH = 42,
959
960 /// SPARC V9
961 _SPARCV9 = 43,
962
963 /// Siemens TriCore
964 _TRICORE = 44,
965
966 /// Argonaut RISC Core
967 _ARC = 45,
968
969 /// Hitachi H8/300
970 _H8_300 = 46,
971
972 /// Hitachi H8/300H
973 _H8_300H = 47,
974
975 /// Hitachi H8S
976 _H8S = 48,
977
978 /// Hitachi H8/500
979 _H8_500 = 49,
980
981 /// Intel IA-64 processor architecture
982 _IA_64 = 50,
983
984 /// Stanford MIPS-X
985 _MIPS_X = 51,
986
987 /// Motorola ColdFire
988 _COLDFIRE = 52,
989
990 /// Motorola M68HC12
991 _68HC12 = 53,
992
993 /// Fujitsu MMA Multimedia Accelerator
994 _MMA = 54,
995
996 /// Siemens PCP
997 _PCP = 55,
998
999 /// Sony nCPU embedded RISC processor
1000 _NCPU = 56,
1001
1002 /// Denso NDR1 microprocessor
1003 _NDR1 = 57,
1004
1005 /// Motorola Star*Core processor
1006 _STARCORE = 58,
1007
1008 /// Toyota ME16 processor
1009 _ME16 = 59,
1010
1011 /// STMicroelectronics ST100 processor
1012 _ST100 = 60,
1013
1014 /// Advanced Logic Corp. TinyJ embedded processor family
1015 _TINYJ = 61,
1016
1017 /// AMD x86-64 architecture
1018 _X86_64 = 62,
1019
1020 /// Sony DSP Processor
1021 _PDSP = 63,
1022
1023 /// Digital Equipment Corp. PDP-10
1024 _PDP10 = 64,
1025
1026 /// Digital Equipment Corp. PDP-11
1027 _PDP11 = 65,
1028
1029 /// Siemens FX66 microcontroller
1030 _FX66 = 66,
1031
1032 /// STMicroelectronics ST9+ 8/16 bit microcontroller
1033 _ST9PLUS = 67,
1034
1035 /// STMicroelectronics ST7 8-bit microcontroller
1036 _ST7 = 68,
1037
1038 /// Motorola MC68HC16 Microcontroller
1039 _68HC16 = 69,
1040
1041 /// Motorola MC68HC11 Microcontroller
1042 _68HC11 = 70,
1043
1044 /// Motorola MC68HC08 Microcontroller
1045 _68HC08 = 71,
1046
1047 /// Motorola MC68HC05 Microcontroller
1048 _68HC05 = 72,
1049
1050 /// Silicon Graphics SVx
1051 _SVX = 73,
1052
1053 /// STMicroelectronics ST19 8-bit microcontroller
1054 _ST19 = 74,
1055
1056 /// Digital VAX
1057 _VAX = 75,
1058
1059 /// Axis Communications 32-bit embedded processor
1060 _CRIS = 76,
1061
1062 /// Infineon Technologies 32-bit embedded processor
1063 _JAVELIN = 77,
1064
1065 /// Element 14 64-bit DSP Processor
1066 _FIREPATH = 78,
1067
1068 /// LSI Logic 16-bit DSP Processor
1069 _ZSP = 79,
1070
1071 /// Donald Knuth's educational 64-bit processor
1072 _MMIX = 80,
1073
1074 /// Harvard University machine-independent object files
1075 _HUANY = 81,
1076
1077 /// SiTera Prism
1078 _PRISM = 82,
1079
1080 /// Atmel AVR 8-bit microcontroller
1081 _AVR = 83,
1082
1083 /// Fujitsu FR30
1084 _FR30 = 84,
1085
1086 /// Mitsubishi D10V
1087 _D10V = 85,
1088
1089 /// Mitsubishi D30V
1090 _D30V = 86,
1091
1092 /// NEC v850
1093 _V850 = 87,
1094
1095 /// Mitsubishi M32R
1096 _M32R = 88,
1097
1098 /// Matsushita MN10300
1099 _MN10300 = 89,
1100
1101 /// Matsushita MN10200
1102 _MN10200 = 90,
1103
1104 /// picoJava
1105 _PJ = 91,
1106
1107 /// OpenRISC 32-bit embedded processor
1108 _OPENRISC = 92,
1109
1110 /// ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5)
1111 _ARC_COMPACT = 93,
1112
1113 /// Tensilica Xtensa Architecture
1114 _XTENSA = 94,
1115
1116 /// Alphamosaic VideoCore processor
1117 _VIDEOCORE = 95,
1118
1119 /// Thompson Multimedia General Purpose Processor
1120 _TMM_GPP = 96,
1121
1122 /// National Semiconductor 32000 series
1123 _NS32K = 97,
1124
1125 /// Tenor Network TPC processor
1126 _TPC = 98,
1127
1128 /// Trebia SNP 1000 processor
1129 _SNP1K = 99,
1130
1131 /// STMicroelectronics (www.st.com) ST200
1132 _ST200 = 100,
1133
1134 /// Ubicom IP2xxx microcontroller family
1135 _IP2K = 101,
1136
1137 /// MAX Processor
1138 _MAX = 102,
1139
1140 /// National Semiconductor CompactRISC microprocessor
1141 _CR = 103,
1142
1143 /// Fujitsu F2MC16
1144 _F2MC16 = 104,
1145
1146 /// Texas Instruments embedded microcontroller msp430
1147 _MSP430 = 105,
1148
1149 /// Analog Devices Blackfin (DSP) processor
1150 _BLACKFIN = 106,
1151
1152 /// S1C33 Family of Seiko Epson processors
1153 _SE_C33 = 107,
1154
1155 /// Sharp embedded microprocessor
1156 _SEP = 108,
1157
1158 /// Arca RISC Microprocessor
1159 _ARCA = 109,
1160
1161 /// Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
1162 _UNICORE = 110,
1163
1164 /// eXcess: 16/32/64-bit configurable embedded CPU
1165 _EXCESS = 111,
1166
1167 /// Icera Semiconductor Inc. Deep Execution Processor
1168 _DXP = 112,
1169
1170 /// Altera Nios II soft-core processor
1171 _ALTERA_NIOS2 = 113,
1172
1173 /// National Semiconductor CompactRISC CRX
1174 _CRX = 114,
1175
1176 /// Motorola XGATE embedded processor
1177 _XGATE = 115,
1178
1179 /// Infineon C16x/XC16x processor
1180 _C166 = 116,
1181
1182 /// Renesas M16C series microprocessors
1183 _M16C = 117,
1184
1185 /// Microchip Technology dsPIC30F Digital Signal Controller
1186 _DSPIC30F = 118,
1187
1188 /// Freescale Communication Engine RISC core
1189 _CE = 119,
1190
1191 /// Renesas M32C series microprocessors
1192 _M32C = 120,
1193
1194 /// Altium TSK3000 core
1195 _TSK3000 = 131,
1196
1197 /// Freescale RS08 embedded processor
1198 _RS08 = 132,
1199
1200 /// Analog Devices SHARC family of 32-bit DSP processors
1201 _SHARC = 133,
1202
1203 /// Cyan Technology eCOG2 microprocessor
1204 _ECOG2 = 134,
1205
1206 /// Sunplus S+core7 RISC processor
1207 _SCORE7 = 135,
1208
1209 /// New Japan Radio (NJR) 24-bit DSP Processor
1210 _DSP24 = 136,
1211
1212 /// Broadcom VideoCore III processor
1213 _VIDEOCORE3 = 137,
1214
1215 /// RISC processor for Lattice FPGA architecture
1216 _LATTICEMICO32 = 138,
1217
1218 /// Seiko Epson C17 family
1219 _SE_C17 = 139,
1220
1221 /// The Texas Instruments TMS320C6000 DSP family
1222 _TI_C6000 = 140,
1223
1224 /// The Texas Instruments TMS320C2000 DSP family
1225 _TI_C2000 = 141,
1226
1227 /// The Texas Instruments TMS320C55x DSP family
1228 _TI_C5500 = 142,
1229
1230 /// STMicroelectronics 64bit VLIW Data Signal Processor
1231 _MMDSP_PLUS = 160,
1232
1233 /// Cypress M8C microprocessor
1234 _CYPRESS_M8C = 161,
1235
1236 /// Renesas R32C series microprocessors
1237 _R32C = 162,
1238
1239 /// NXP Semiconductors TriMedia architecture family
1240 _TRIMEDIA = 163,
1241
1242 /// Qualcomm Hexagon processor
1243 _HEXAGON = 164,
1244
1245 /// Intel 8051 and variants
1246 _8051 = 165,
1247
1248 /// STMicroelectronics STxP7x family of configurable and extensible RISC processors
1249 _STXP7X = 166,
1250
1251 /// Andes Technology compact code size embedded RISC processor family
1252 _NDS32 = 167,
1253
1254 /// Cyan Technology eCOG1X family
1255 _ECOG1X = 168,
1256
1257 /// Dallas Semiconductor MAXQ30 Core Micro-controllers
1258 _MAXQ30 = 169,
1259
1260 /// New Japan Radio (NJR) 16-bit DSP Processor
1261 _XIMO16 = 170,
1262
1263 /// M2000 Reconfigurable RISC Microprocessor
1264 _MANIK = 171,
1265
1266 /// Cray Inc. NV2 vector architecture
1267 _CRAYNV2 = 172,
1268
1269 /// Renesas RX family
1270 _RX = 173,
1271
1272 /// Imagination Technologies META processor architecture
1273 _METAG = 174,
1274
1275 /// MCST Elbrus general purpose hardware architecture
1276 _MCST_ELBRUS = 175,
1277
1278 /// Cyan Technology eCOG16 family
1279 _ECOG16 = 176,
1280
1281 /// National Semiconductor CompactRISC CR16 16-bit microprocessor
1282 _CR16 = 177,
1283
1284 /// Freescale Extended Time Processing Unit
1285 _ETPU = 178,
1286
1287 /// Infineon Technologies SLE9X core
1288 _SLE9X = 179,
1289
1290 /// Intel L10M
1291 _L10M = 180,
1292
1293 /// Intel K10M
1294 _K10M = 181,
1295
1296 /// ARM AArch64
1297 _AARCH64 = 183,
1298
1299 /// Atmel Corporation 32-bit microprocessor family
1300 _AVR32 = 185,
1301
1302 /// STMicroeletronics STM8 8-bit microcontroller
1303 _STM8 = 186,
1304
1305 /// Tilera TILE64 multicore architecture family
1306 _TILE64 = 187,
1307
1308 /// Tilera TILEPro multicore architecture family
1309 _TILEPRO = 188,
1310
1311 /// NVIDIA CUDA architecture
1312 _CUDA = 190,
1313
1314 /// Tilera TILE-Gx multicore architecture family
1315 _TILEGX = 191,
1316
1317 /// CloudShield architecture family
1318 _CLOUDSHIELD = 192,
1319
1320 /// KIPO-KAIST Core-A 1st generation processor family
1321 _COREA_1ST = 193,
1322
1323 /// KIPO-KAIST Core-A 2nd generation processor family
1324 _COREA_2ND = 194,
1325
1326 /// Synopsys ARCompact V2
1327 _ARC_COMPACT2 = 195,
1328
1329 /// Open8 8-bit RISC soft processor core
1330 _OPEN8 = 196,
1331
1332 /// Renesas RL78 family
1333 _RL78 = 197,
1334
1335 /// Broadcom VideoCore V processor
1336 _VIDEOCORE5 = 198,
1337
1338 /// Renesas 78KOR family
1339 _78KOR = 199,
1340
1341 /// Freescale 56800EX Digital Signal Controller (DSC)
1342 _56800EX = 200,
1343
1344 /// Beyond BA1 CPU architecture
1345 _BA1 = 201,
1346
1347 /// Beyond BA2 CPU architecture
1348 _BA2 = 202,
1349
1350 /// XMOS xCORE processor family
1351 _XCORE = 203,
1352
1353 /// Microchip 8-bit PIC(r) family
1354 _MCHP_PIC = 204,
1355
1356 /// Reserved by Intel
1357 _INTEL205 = 205,
1358
1359 /// Reserved by Intel
1360 _INTEL206 = 206,
1361
1362 /// Reserved by Intel
1363 _INTEL207 = 207,
1364
1365 /// Reserved by Intel
1366 _INTEL208 = 208,
1367
1368 /// Reserved by Intel
1369 _INTEL209 = 209,
1370
1371 /// KM211 KM32 32-bit processor
1372 _KM32 = 210,
1373
1374 /// KM211 KMX32 32-bit processor
1375 _KMX32 = 211,
1376
1377 /// KM211 KMX16 16-bit processor
1378 _KMX16 = 212,
1379
1380 /// KM211 KMX8 8-bit processor
1381 _KMX8 = 213,
1382
1383 /// KM211 KVARC processor
1384 _KVARC = 214,
1385
1386 /// Paneve CDP architecture family
1387 _CDP = 215,
1388
1389 /// Cognitive Smart Memory Processor
1390 _COGE = 216,
1391
1392 /// iCelero CoolEngine
1393 _COOL = 217,
1394
1395 /// Nanoradio Optimized RISC
1396 _NORC = 218,
1397
1398 /// CSR Kalimba architecture family
1399 _CSR_KALIMBA = 219,
1400
1401 /// AMD GPU architecture
1402 _AMDGPU = 224,
1403
1404 /// RISC-V
1405 _RISCV = 243,
1406
1407 /// Lanai 32-bit processor
1408 _LANAI = 244,
1409
1410 /// Linux kernel bpf virtual machine
1411 _BPF = 247,
1412};
1413
1414/// Section data should be writable during execution.
1415pub const SHF_WRITE = 0x1;
1416
1417/// Section occupies memory during program execution.
1418pub const SHF_ALLOC = 0x2;
1419
1420/// Section contains executable machine instructions.
1421pub const SHF_EXECINSTR = 0x4;
1422
1423/// The data in this section may be merged.
1424pub const SHF_MERGE = 0x10;
1425
1426/// The data in this section is null-terminated strings.
1427pub const SHF_STRINGS = 0x20;
1428
1429/// A field in this section holds a section header table index.
1430pub const SHF_INFO_LINK = 0x40;
1431
1432/// Adds special ordering requirements for link editors.
1433pub const SHF_LINK_ORDER = 0x80;
1434
1435/// This section requires special OS-specific processing to avoid incorrect
1436/// behavior.
1437pub const SHF_OS_NONCONFORMING = 0x100;
1438
1439/// This section is a member of a section group.
1440pub const SHF_GROUP = 0x200;
1441
1442/// This section holds Thread-Local Storage.
1443pub const SHF_TLS = 0x400;
1444
1445/// Identifies a section containing compressed data.
1446pub const SHF_COMPRESSED = 0x800;
1447
1448/// This section is excluded from the final executable or shared library.
1449pub const SHF_EXCLUDE = 0x80000000;
1450
1451/// Start of target-specific flags.
1452pub const SHF_MASKOS = 0x0ff00000;
1453
1454/// Bits indicating processor-specific flags.
1455pub const SHF_MASKPROC = 0xf0000000;
1456
1457/// All sections with the "d" flag are grouped together by the linker to form
1458/// the data section and the dp register is set to the start of the section by
1459/// the boot code.
1460pub const XCORE_SHF_DP_SECTION = 0x10000000;
1461
1462/// All sections with the "c" flag are grouped together by the linker to form
1463/// the constant pool and the cp register is set to the start of the constant
1464/// pool by the boot code.
1465pub const XCORE_SHF_CP_SECTION = 0x20000000;
1466
1467/// If an object file section does not have this flag set, then it may not hold
1468/// more than 2GB and can be freely referred to in objects using smaller code
1469/// models. Otherwise, only objects using larger code models can refer to them.
1470/// For example, a medium code model object can refer to data in a section that
1471/// sets this flag besides being able to refer to data in a section that does
1472/// not set it; likewise, a small code model object can refer only to code in a
1473/// section that does not set this flag.
1474pub const SHF_X86_64_LARGE = 0x10000000;
1475
1476/// All sections with the GPREL flag are grouped into a global data area
1477/// for faster accesses
1478pub const SHF_HEX_GPREL = 0x10000000;
1479
1480/// Section contains text/data which may be replicated in other sections.
1481/// Linker must retain only one copy.
1482pub const SHF_MIPS_NODUPES = 0x01000000;
1483
1484/// Linker must generate implicit hidden weak names.
1485pub const SHF_MIPS_NAMES = 0x02000000;
1486
1487/// Section data local to process.
1488pub const SHF_MIPS_LOCAL = 0x04000000;
1489
1490/// Do not strip this section.
1491pub const SHF_MIPS_NOSTRIP = 0x08000000;
1492
1493/// Section must be part of global data area.
1494pub const SHF_MIPS_GPREL = 0x10000000;
1495
1496/// This section should be merged.
1497pub const SHF_MIPS_MERGE = 0x20000000;
1498
1499/// Address size to be inferred from section entry size.
1500pub const SHF_MIPS_ADDR = 0x40000000;
1501
1502/// Section data is string data by default.
1503pub const SHF_MIPS_STRING = 0x80000000;
1504
1505/// Make code section unreadable when in execute-only mode
1506pub const SHF_ARM_PURECODE = 0x2000000;
1507
1508/// Execute
1509pub const PF_X = 1;
1510
1511/// Write
1512pub const PF_W = 2;
1513
1514/// Read
1515pub const PF_R = 4;
1516
1517/// Bits for operating system-specific semantics.
1518pub const PF_MASKOS = 0x0ff00000;
1519
1520/// Bits for processor-specific semantics.
1521pub const PF_MASKPROC = 0xf0000000;
lib/std/io/in_stream.zig+35
...@@ -5,6 +5,7 @@ const math = std.math;...@@ -5,6 +5,7 @@ const math = std.math;
5const assert = std.debug.assert;5const assert = std.debug.assert;
6const mem = std.mem;6const mem = std.mem;
7const Buffer = std.Buffer;7const Buffer = std.Buffer;
8const testing = std.testing;
89
9pub const default_stack_size = 1 * 1024 * 1024;10pub const default_stack_size = 1 * 1024 * 1024;
10pub const stack_size: usize = if (@hasDecl(root, "stack_size_std_io_InStream"))11pub const stack_size: usize = if (@hasDecl(root, "stack_size_std_io_InStream"))
...@@ -236,5 +237,39 @@ pub fn InStream(comptime ReadError: type) type {...@@ -236,5 +237,39 @@ pub fn InStream(comptime ReadError: type) type {
236 try self.readNoEof(@sliceToBytes(res[0..]));237 try self.readNoEof(@sliceToBytes(res[0..]));
237 return res[0];238 return res[0];
238 }239 }
240
241 /// Reads an integer with the same size as the given enum's tag type. If the integer matches
242 /// an enum tag, casts the integer to the enum tag and returns it. Otherwise, returns an error.
243 /// TODO optimization taking advantage of most fields being in order
244 pub fn readEnum(self: *Self, comptime Enum: type, endian: builtin.Endian) !Enum {
245 const E = error{
246 /// An integer was read, but it did not match any of the tags in the supplied enum.
247 InvalidValue,
248 };
249 const type_info = @typeInfo(Enum).Enum;
250 const tag = try self.readInt(type_info.tag_type, endian);
251
252 inline for (std.meta.fields(Enum)) |field| {
253 if (tag == field.value) {
254 return @field(Enum, field.name);
255 }
256 }
257
258 return E.InvalidValue;
259 }
239 };260 };
240}261}
262
263test "InStream" {
264 var buf = "a\x02".*;
265 var slice_stream = std.io.SliceInStream.init(&buf);
266 const in_stream = &slice_stream.stream;
267 testing.expect((try in_stream.readByte()) == 'a');
268 testing.expect((try in_stream.readEnum(enum(u8) {
269 a = 0,
270 b = 99,
271 c = 2,
272 d = 3,
273 }, undefined)) == .c);
274 testing.expectError(error.EndOfStream, in_stream.readByte());
275}
lib/std/target.zig+113
...@@ -145,6 +145,119 @@ pub const Target = union(enum) {...@@ -145,6 +145,119 @@ pub const Target = union(enum) {
145 pub const Mips = enum {145 pub const Mips = enum {
146 r6,146 r6,
147 };147 };
148
149 pub fn toElfMachine(arch: Arch) std.elf.EM {
150 return switch (arch) {
151 .avr => ._AVR,
152 .msp430 => ._MSP430,
153 .arc => ._ARC,
154 .arm => ._ARM,
155 .armeb => ._ARM,
156 .hexagon => ._HEXAGON,
157 .le32 => ._NONE,
158 .mips => ._MIPS,
159 .mipsel => ._MIPS_RS3_LE,
160 .powerpc => ._PPC,
161 .r600 => ._NONE,
162 .riscv32 => ._RISCV,
163 .sparc => ._SPARC,
164 .sparcel => ._SPARC,
165 .tce => ._NONE,
166 .tcele => ._NONE,
167 .thumb => ._ARM,
168 .thumbeb => ._ARM,
169 .i386 => ._386,
170 .xcore => ._XCORE,
171 .nvptx => ._NONE,
172 .amdil => ._NONE,
173 .hsail => ._NONE,
174 .spir => ._NONE,
175 .kalimba => ._CSR_KALIMBA,
176 .shave => ._NONE,
177 .lanai => ._LANAI,
178 .wasm32 => ._NONE,
179 .renderscript32 => ._NONE,
180 .aarch64_32 => ._AARCH64,
181 .aarch64 => ._AARCH64,
182 .aarch64_be => ._AARCH64,
183 .mips64 => ._MIPS,
184 .mips64el => ._MIPS_RS3_LE,
185 .powerpc64 => ._PPC64,
186 .powerpc64le => ._PPC64,
187 .riscv64 => ._RISCV,
188 .x86_64 => ._X86_64,
189 .nvptx64 => ._NONE,
190 .le64 => ._NONE,
191 .amdil64 => ._NONE,
192 .hsail64 => ._NONE,
193 .spir64 => ._NONE,
194 .wasm64 => ._NONE,
195 .renderscript64 => ._NONE,
196 .amdgcn => ._NONE,
197 .bpfel => ._BPF,
198 .bpfeb => ._BPF,
199 .sparcv9 => ._SPARCV9,
200 .s390x => ._S390,
201 };
202 }
203
204 pub fn endian(arch: Arch) builtin.Endian {
205 return switch (arch) {
206 .avr,
207 .arm,
208 .aarch64_32,
209 .aarch64,
210 .amdgcn,
211 .amdil,
212 .amdil64,
213 .bpfel,
214 .hexagon,
215 .hsail,
216 .hsail64,
217 .kalimba,
218 .le32,
219 .le64,
220 .mipsel,
221 .mips64el,
222 .msp430,
223 .nvptx,
224 .nvptx64,
225 .sparcel,
226 .tcele,
227 .powerpc64le,
228 .r600,
229 .riscv32,
230 .riscv64,
231 .i386,
232 .x86_64,
233 .wasm32,
234 .wasm64,
235 .xcore,
236 .thumb,
237 .spir,
238 .spir64,
239 .renderscript32,
240 .renderscript64,
241 .shave,
242 => .Little,
243
244 .arc,
245 .armeb,
246 .aarch64_be,
247 .bpfeb,
248 .mips,
249 .mips64,
250 .powerpc,
251 .powerpc64,
252 .thumbeb,
253 .sparc,
254 .sparcv9,
255 .tce,
256 .lanai,
257 .s390x,
258 => .Big,
259 };
260 }
148 };261 };
149262
150 pub const Abi = enum {263 pub const Abi = enum {