| ... | ... | @@ -108,8 +108,8 @@ pub const SYS = switch (@import("builtin").cpu.arch) { |
| 108 | 108 | .riscv32 => syscalls.RiscV32, |
| 109 | 109 | .riscv64 => syscalls.RiscV64, |
| 110 | 110 | .sparc64 => syscalls.Sparc64, |
| 111 | | .mips, .mipsel => syscalls.Mips, |
| 112 | | .mips64, .mips64el => syscalls.Mips64, |
| 111 | .mips, .mipsel => syscalls.MipsO32, |
| 112 | .mips64, .mips64el => syscalls.MipsN64, |
| 113 | 113 | .powerpc, .powerpcle => syscalls.PowerPC, |
| 114 | 114 | .powerpc64, .powerpc64le => syscalls.PowerPC64, |
| 115 | 115 | else => @compileError("The Zig Standard Library is missing syscall definitions for the target CPU architecture"), |