| ... | @@ -411,7 +411,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu { | ... | @@ -411,7 +411,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu { |
| 411 | | 411 | |
| 412 | const current_arch = builtin.cpu.arch; | 412 | const current_arch = builtin.cpu.arch; |
| 413 | switch (current_arch) { | 413 | switch (current_arch) { |
| 414 | .aarch64, .aarch64_be => { | 414 | .aarch64 => { |
| 415 | const model = switch (cpu_family) { | 415 | const model = switch (cpu_family) { |
| 416 | .ARM_CYCLONE => &Target.aarch64.cpu.apple_a7, | 416 | .ARM_CYCLONE => &Target.aarch64.cpu.apple_a7, |
| 417 | .ARM_TYPHOON => &Target.aarch64.cpu.apple_a8, | 417 | .ARM_TYPHOON => &Target.aarch64.cpu.apple_a8, |
| ... | @@ -420,17 +420,21 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu { | ... | @@ -420,17 +420,21 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu { |
| 420 | .ARM_MONSOON_MISTRAL => &Target.aarch64.cpu.apple_a11, | 420 | .ARM_MONSOON_MISTRAL => &Target.aarch64.cpu.apple_a11, |
| 421 | .ARM_VORTEX_TEMPEST => &Target.aarch64.cpu.apple_a12, | 421 | .ARM_VORTEX_TEMPEST => &Target.aarch64.cpu.apple_a12, |
| 422 | .ARM_LIGHTNING_THUNDER => &Target.aarch64.cpu.apple_a13, | 422 | .ARM_LIGHTNING_THUNDER => &Target.aarch64.cpu.apple_a13, |
| 423 | .ARM_FIRESTORM_ICESTORM => &Target.aarch64.cpu.apple_m1, // a14 | 423 | .ARM_FIRESTORM_ICESTORM => &Target.aarch64.cpu.apple_a14, |
| 424 | .ARM_BLIZZARD_AVALANCHE => &Target.aarch64.cpu.apple_m2, // a15 | 424 | .ARM_BLIZZARD_AVALANCHE => &Target.aarch64.cpu.apple_a15, |
| 425 | .ARM_EVEREST_SAWTOOTH => &Target.aarch64.cpu.apple_m3, // a16 | 425 | .ARM_EVEREST_SAWTOOTH => &Target.aarch64.cpu.apple_a16, |
| 426 | .ARM_IBIZA => &Target.aarch64.cpu.apple_m3, // base | 426 | .ARM_IBIZA => &Target.aarch64.cpu.apple_m3, // base |
| 427 | .ARM_PALMA => &Target.aarch64.cpu.apple_m3, // max | 427 | .ARM_PALMA => &Target.aarch64.cpu.apple_m3, // max |
| 428 | .ARM_LOBOS => &Target.aarch64.cpu.apple_m3, // pro | 428 | .ARM_LOBOS => &Target.aarch64.cpu.apple_m3, // pro |
| 429 | .ARM_COLL => &Target.aarch64.cpu.apple_a17, // a17 pro | 429 | .ARM_COLL => &Target.aarch64.cpu.apple_a17, // pro |
| 430 | .ARM_DONAN => &Target.aarch64.cpu.apple_m4, // base | 430 | .ARM_DONAN => &Target.aarch64.cpu.apple_m4, // base |
| 431 | .ARM_BRAVA => &Target.aarch64.cpu.apple_m4, // pro/max | 431 | .ARM_BRAVA => &Target.aarch64.cpu.apple_m4, // pro/max |
| 432 | .ARM_TAHITI => &Target.aarch64.cpu.apple_m4, // a18 pro | 432 | .ARM_TAHITI => &Target.aarch64.cpu.apple_a18, // pro |
| 433 | .ARM_TUPAI => &Target.aarch64.cpu.apple_m4, // a18 | 433 | .ARM_TUPAI => &Target.aarch64.cpu.apple_a18, // base |
| | 434 | .ARM_HIDRA => &Target.aarch64.cpu.apple_m5, // base |
| | 435 | .ARM_SOTRA => &Target.aarch64.cpu.apple_m5, // pro/max |
| | 436 | .ARM_THERA => &Target.aarch64.cpu.apple_a19, // pro |
| | 437 | .ARM_TILOS => &Target.aarch64.cpu.apple_a19, // base |
| 434 | else => return null, | 438 | else => return null, |
| 435 | }; | 439 | }; |
| 436 | | 440 | |