| ... | ... | @@ -59,6 +59,20 @@ const require_aligned_register_pair = |
| 59 | 59 | std.Target.current.cpu.arch.isThumb(); |
| 60 | 60 | |
| 61 | 61 | // Split a 64bit value into a {LSB,MSB} pair. |
| 62 | // The LE/BE variants specify the endianness to assume. |
| 63 | fn splitValueLE64(val: i64) [2]u32 { |
| 64 | const u = @bitCast(u64, val); |
| 65 | return [2]u32{ |
| 66 | @truncate(u32, u), |
| 67 | @truncate(u32, u >> 32), |
| 68 | }; |
| 69 | } |
| 70 | fn splitValueBE64(val: i64) [2]u32 { |
| 71 | return [2]u32{ |
| 72 | @truncate(u32, u >> 32), |
| 73 | @truncate(u32, u), |
| 74 | }; |
| 75 | } |
| 62 | 76 | fn splitValue64(val: i64) [2]u32 { |
| 63 | 77 | const u = @bitCast(u64, val); |
| 64 | 78 | switch (builtin.endian) { |
| ... | ... | @@ -310,7 +324,7 @@ pub fn read(fd: i32, buf: [*]u8, count: usize) usize { |
| 310 | 324 | } |
| 311 | 325 | |
| 312 | 326 | pub fn preadv(fd: i32, iov: [*]const iovec, count: usize, offset: i64) usize { |
| 313 | | const offset_halves = splitValue64(offset); |
| 327 | const offset_halves = splitValueLE64(offset); |
| 314 | 328 | return syscall5( |
| 315 | 329 | .preadv, |
| 316 | 330 | @bitCast(usize, @as(isize, fd)), |
| ... | ... | @@ -343,7 +357,7 @@ pub fn writev(fd: i32, iov: [*]const iovec_const, count: usize) usize { |
| 343 | 357 | } |
| 344 | 358 | |
| 345 | 359 | pub fn pwritev(fd: i32, iov: [*]const iovec_const, count: usize, offset: i64) usize { |
| 346 | | const offset_halves = splitValue64(offset); |
| 360 | const offset_halves = splitValueLE64(offset); |
| 347 | 361 | return syscall5( |
| 348 | 362 | .pwritev, |
| 349 | 363 | @bitCast(usize, @as(isize, fd)), |