Commit 8bf3e1f8d0902abd4133e2729b3625c25011c3ff | zig

3 files changed, 35 insertions(+), 1 deletions(-)

src/AstGen.zig+1-1

...	...	@@ -9915,7 +9915,7 @@ const GenZir = struct {
9915	9915	.inferred_ptr => \|ptr\| {
9916	9916	gz.rl_ty_inst = .none;
9917	9917	gz.rl_ptr = ptr;
9918		gz.break_result_loc = .{ .block_ptr = gz };
	9918	gz.break_result_loc = parent_rl;
9919	9919	},
9920	9920
9921	9921	.block_ptr => \|parent_block_scope\| {

src/Sema.zig+22

...	...	@@ -2881,6 +2881,28 @@ fn zirResolveInferredAlloc(sema: Sema, block: Block, inst: Zir.Inst.Index) Com
2881	2881
2882	2882	if (var_is_mut) {
2883	2883	try sema.validateVarType(block, ty_src, final_elem_ty, false);
	2884
	2885	// The value might have been bitcasted into a comptime only
	2886	// pointer type such as `*@Type(.EnumLiteral)` so we must now
	2887	// update all the stores to not give backends invalid AIR.
	2888
	2889	var air_tags = sema.air_instructions.items(.tag);
	2890	var air_data = sema.air_instructions.items(.data);
	2891	var peer_inst_index: usize = 0;
	2892	var i = ptr_inst;
	2893	while (i < air_tags.len and peer_inst_index < peer_inst_list.len) : (i += 1) {
	2894	if (air_tags[i] != .store) continue;
	2895	if (air_data[i].bin_op.rhs == peer_inst_list[peer_inst_index]) {
	2896	peer_inst_index += 1;
	2897	_ = (try sema.resolveMaybeUndefVal(block, .unneeded, air_data[i].bin_op.rhs)) orelse continue;
	2898	const coerced_val = try sema.coerce(block, final_elem_ty, air_data[i].bin_op.rhs, .unneeded);
	2899	air_tags = sema.air_instructions.items(.tag);
	2900	air_data = sema.air_instructions.items(.data);
	2901
	2902	air_data[i].bin_op.lhs = ptr;
	2903	air_data[i].bin_op.rhs = coerced_val;
	2904	}
	2905	}
2884	2906	} else ct: {
2885	2907	// Detect if the value is comptime known. In such case, the
2886	2908	// last 3 AIR instructions of the block will look like this:

test/behavior/basic.zig+12

...	...	@@ -933,3 +933,15 @@ test "try in labeled block doesn't cast to wrong type" {
933	933	};
934	934	_ = s;
935	935	}
	936
	937	test "comptime int in switch in catch is casted to correct inferred type" {
	938	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
	939	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
	940
	941	var a: error{ A, B }!u64 = 0;
	942	var b = a catch \|err\| switch (err) {
	943	error.A => 0,
	944	else => unreachable,
	945	};
	946	_ = b;
	947	}