authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-03 00:41:48+02:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-10-03 00:41:48+02:00
log8ee52f99ceab6a05b931eeb48825c00fd26ac486
treeca532b35bcc30c2f8098cf317af325d38b6a46be
parent0548a61f5386dcd67c83d49db37b815eef92635e
parent5458c9c71bc933ffb87c99c13ac4e99461764ea3
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #21505 from alexrp/cpu-features-exts

`update_cpu_features`: Add support for parsing `DefaultExts` as used for aarch64.

3 files changed, 33 insertions(+), 77 deletions(-)

lib/std/Target/aarch64.zig+15-71
...@@ -1373,6 +1373,7 @@ pub const all_features = blk: {...@@ -1373,6 +1373,7 @@ pub const all_features = blk: {
1373 .llvm_name = "v8.3a",1373 .llvm_name = "v8.3a",
1374 .description = "Support ARM v8.3a architecture",1374 .description = "Support ARM v8.3a architecture",
1375 .dependencies = featureSet(&[_]Feature{1375 .dependencies = featureSet(&[_]Feature{
1376 .ccidx,
1376 .complxnum,1377 .complxnum,
1377 .jsconv,1378 .jsconv,
1378 .pauth,1379 .pauth,
...@@ -1409,6 +1410,7 @@ pub const all_features = blk: {...@@ -1409,6 +1410,7 @@ pub const all_features = blk: {
1409 .predres,1410 .predres,
1410 .sb,1411 .sb,
1411 .specrestrict,1412 .specrestrict,
1413 .ssbs,
1412 .v8_4a,1414 .v8_4a,
1413 }),1415 }),
1414 };1416 };
...@@ -1470,18 +1472,26 @@ pub const all_features = blk: {...@@ -1470,18 +1472,26 @@ pub const all_features = blk: {
1470 .llvm_name = "v8r",1472 .llvm_name = "v8r",
1471 .description = "Support ARM v8r architecture",1473 .description = "Support ARM v8r architecture",
1472 .dependencies = featureSet(&[_]Feature{1474 .dependencies = featureSet(&[_]Feature{
1475 .ccidx,
1473 .ccpp,1476 .ccpp,
1477 .complxnum,
1474 .contextidr_el2,1478 .contextidr_el2,
1475 .crc,1479 .crc,
1476 .dit,1480 .dit,
1481 .dotprod,
1477 .flagm,1482 .flagm,
1483 .fp16fml,
1484 .jsconv,
1478 .lse,1485 .lse,
1479 .pan_rwv,1486 .pan_rwv,
1480 .pauth,1487 .pauth,
1481 .ras,1488 .ras,
1482 .rcpc_immo,1489 .rcpc_immo,
1490 .rdm,
1491 .sb,
1483 .sel2,1492 .sel2,
1484 .specrestrict,1493 .specrestrict,
1494 .ssbs,
1485 .tlb_rmi,1495 .tlb_rmi,
1486 .tracev8_4,1496 .tracev8_4,
1487 .uaops,1497 .uaops,
...@@ -1491,6 +1501,7 @@ pub const all_features = blk: {...@@ -1491,6 +1501,7 @@ pub const all_features = blk: {
1491 .llvm_name = "v9.1a",1501 .llvm_name = "v9.1a",
1492 .description = "Support ARM v9.1a architecture",1502 .description = "Support ARM v9.1a architecture",
1493 .dependencies = featureSet(&[_]Feature{1503 .dependencies = featureSet(&[_]Feature{
1504 .rme,
1494 .v8_6a,1505 .v8_6a,
1495 .v9a,1506 .v9a,
1496 }),1507 }),
...@@ -1499,6 +1510,7 @@ pub const all_features = blk: {...@@ -1499,6 +1510,7 @@ pub const all_features = blk: {
1499 .llvm_name = "v9.2a",1510 .llvm_name = "v9.2a",
1500 .description = "Support ARM v9.2a architecture",1511 .description = "Support ARM v9.2a architecture",
1501 .dependencies = featureSet(&[_]Feature{1512 .dependencies = featureSet(&[_]Feature{
1513 .mec,
1502 .v8_7a,1514 .v8_7a,
1503 .v9_1a,1515 .v9_1a,
1504 }),1516 }),
...@@ -1524,6 +1536,8 @@ pub const all_features = blk: {...@@ -1524,6 +1536,8 @@ pub const all_features = blk: {
1524 .description = "Support ARM v9.5a architecture",1536 .description = "Support ARM v9.5a architecture",
1525 .dependencies = featureSet(&[_]Feature{1537 .dependencies = featureSet(&[_]Feature{
1526 .cpa,1538 .cpa,
1539 .faminmax,
1540 .lut,
1527 .v9_4a,1541 .v9_4a,
1528 }),1542 }),
1529 };1543 };
...@@ -1531,6 +1545,7 @@ pub const all_features = blk: {...@@ -1531,6 +1545,7 @@ pub const all_features = blk: {
1531 .llvm_name = "v9a",1545 .llvm_name = "v9a",
1532 .description = "Support ARM v9a architecture",1546 .description = "Support ARM v9a architecture",
1533 .dependencies = featureSet(&[_]Feature{1547 .dependencies = featureSet(&[_]Feature{
1548 .sve2,
1534 .v8_5a,1549 .v8_5a,
1535 }),1550 }),
1536 };1551 };
...@@ -1607,7 +1622,6 @@ pub const cpu = struct {...@@ -1607,7 +1622,6 @@ pub const cpu = struct {
1607 .aggressive_fma,1622 .aggressive_fma,
1608 .alu_lsl_fast,1623 .alu_lsl_fast,
1609 .arith_bcc_fusion,1624 .arith_bcc_fusion,
1610 .ccidx,
1611 .cmp_bcc_fusion,1625 .cmp_bcc_fusion,
1612 .fullfp16,1626 .fullfp16,
1613 .fuse_address,1627 .fuse_address,
...@@ -1618,7 +1632,6 @@ pub const cpu = struct {...@@ -1618,7 +1632,6 @@ pub const cpu = struct {
1618 .perfmon,1632 .perfmon,
1619 .rand,1633 .rand,
1620 .sha3,1634 .sha3,
1621 .ssbs,
1622 .store_pair_suppress,1635 .store_pair_suppress,
1623 .stp_aligned_only,1636 .stp_aligned_only,
1624 .use_postra_scheduler,1637 .use_postra_scheduler,
...@@ -1633,7 +1646,6 @@ pub const cpu = struct {...@@ -1633,7 +1646,6 @@ pub const cpu = struct {
1633 .aggressive_fma,1646 .aggressive_fma,
1634 .alu_lsl_fast,1647 .alu_lsl_fast,
1635 .arith_bcc_fusion,1648 .arith_bcc_fusion,
1636 .ccidx,
1637 .cmp_bcc_fusion,1649 .cmp_bcc_fusion,
1638 .fullfp16,1650 .fullfp16,
1639 .fuse_address,1651 .fuse_address,
...@@ -1647,7 +1659,6 @@ pub const cpu = struct {...@@ -1647,7 +1659,6 @@ pub const cpu = struct {
1647 .rand,1659 .rand,
1648 .sha3,1660 .sha3,
1649 .sm4,1661 .sm4,
1650 .ssbs,
1651 .store_pair_suppress,1662 .store_pair_suppress,
1652 .stp_aligned_only,1663 .stp_aligned_only,
1653 .use_postra_scheduler,1664 .use_postra_scheduler,
...@@ -1662,7 +1673,6 @@ pub const cpu = struct {...@@ -1662,7 +1673,6 @@ pub const cpu = struct {
1662 .aggressive_fma,1673 .aggressive_fma,
1663 .alu_lsl_fast,1674 .alu_lsl_fast,
1664 .arith_bcc_fusion,1675 .arith_bcc_fusion,
1665 .ccidx,
1666 .cmp_bcc_fusion,1676 .cmp_bcc_fusion,
1667 .cssc,1677 .cssc,
1668 .enable_select_opt,1678 .enable_select_opt,
...@@ -1678,7 +1688,6 @@ pub const cpu = struct {...@@ -1678,7 +1688,6 @@ pub const cpu = struct {
1678 .rand,1688 .rand,
1679 .sha3,1689 .sha3,
1680 .sm4,1690 .sm4,
1681 .ssbs,
1682 .store_pair_suppress,1691 .store_pair_suppress,
1683 .stp_aligned_only,1692 .stp_aligned_only,
1684 .use_postra_scheduler,1693 .use_postra_scheduler,
...@@ -1819,7 +1828,6 @@ pub const cpu = struct {...@@ -1819,7 +1828,6 @@ pub const cpu = struct {
1819 .fuse_literals,1828 .fuse_literals,
1820 .perfmon,1829 .perfmon,
1821 .sha3,1830 .sha3,
1822 .ssbs,
1823 .store_pair_suppress,1831 .store_pair_suppress,
1824 .v8_6a,1832 .v8_6a,
1825 .zcm,1833 .zcm,
...@@ -1846,7 +1854,6 @@ pub const cpu = struct {...@@ -1846,7 +1854,6 @@ pub const cpu = struct {
1846 .hcx,1854 .hcx,
1847 .perfmon,1855 .perfmon,
1848 .sha3,1856 .sha3,
1849 .ssbs,
1850 .store_pair_suppress,1857 .store_pair_suppress,
1851 .v8_6a,1858 .v8_6a,
1852 .zcm,1859 .zcm,
...@@ -1873,7 +1880,6 @@ pub const cpu = struct {...@@ -1873,7 +1880,6 @@ pub const cpu = struct {
1873 .hcx,1880 .hcx,
1874 .perfmon,1881 .perfmon,
1875 .sha3,1882 .sha3,
1876 .ssbs,
1877 .store_pair_suppress,1883 .store_pair_suppress,
1878 .v8_6a,1884 .v8_6a,
1879 .zcm,1885 .zcm,
...@@ -1990,7 +1996,6 @@ pub const cpu = struct {...@@ -1990,7 +1996,6 @@ pub const cpu = struct {
1990 .fuse_literals,1996 .fuse_literals,
1991 .perfmon,1997 .perfmon,
1992 .sha3,1998 .sha3,
1993 .ssbs,
1994 .store_pair_suppress,1999 .store_pair_suppress,
1995 .v8_6a,2000 .v8_6a,
1996 .zcm,2001 .zcm,
...@@ -2017,7 +2022,6 @@ pub const cpu = struct {...@@ -2017,7 +2022,6 @@ pub const cpu = struct {
2017 .hcx,2022 .hcx,
2018 .perfmon,2023 .perfmon,
2019 .sha3,2024 .sha3,
2020 .ssbs,
2021 .store_pair_suppress,2025 .store_pair_suppress,
2022 .v8_6a,2026 .v8_6a,
2023 .zcm,2027 .zcm,
...@@ -2106,7 +2110,6 @@ pub const cpu = struct {...@@ -2106,7 +2110,6 @@ pub const cpu = struct {
2106 .features = featureSet(&[_]Feature{2110 .features = featureSet(&[_]Feature{
2107 .alu_lsl_fast,2111 .alu_lsl_fast,
2108 .bf16,2112 .bf16,
2109 .ccidx,
2110 .enable_select_opt,2113 .enable_select_opt,
2111 .ete,2114 .ete,
2112 .fp16fml,2115 .fp16fml,
...@@ -2116,7 +2119,6 @@ pub const cpu = struct {...@@ -2116,7 +2119,6 @@ pub const cpu = struct {
2116 .mte,2119 .mte,
2117 .perfmon,2120 .perfmon,
2118 .predictable_select_expensive,2121 .predictable_select_expensive,
2119 .ssbs,
2120 .sve2_bitperm,2122 .sve2_bitperm,
2121 .use_postra_scheduler,2123 .use_postra_scheduler,
2122 .v9a,2124 .v9a,
...@@ -2149,7 +2151,6 @@ pub const cpu = struct {...@@ -2149,7 +2151,6 @@ pub const cpu = struct {
2149 .llvm_name = "cortex-a510",2151 .llvm_name = "cortex-a510",
2150 .features = featureSet(&[_]Feature{2152 .features = featureSet(&[_]Feature{
2151 .bf16,2153 .bf16,
2152 .ccidx,
2153 .ete,2154 .ete,
2154 .fp16fml,2155 .fp16fml,
2155 .fuse_adrp_add,2156 .fuse_adrp_add,
...@@ -2157,7 +2158,6 @@ pub const cpu = struct {...@@ -2157,7 +2158,6 @@ pub const cpu = struct {
2157 .i8mm,2158 .i8mm,
2158 .mte,2159 .mte,
2159 .perfmon,2160 .perfmon,
2160 .ssbs,
2161 .sve2_bitperm,2161 .sve2_bitperm,
2162 .use_postra_scheduler,2162 .use_postra_scheduler,
2163 .v9a,2163 .v9a,
...@@ -2167,14 +2167,12 @@ pub const cpu = struct {...@@ -2167,14 +2167,12 @@ pub const cpu = struct {
2167 .name = "cortex_a520",2167 .name = "cortex_a520",
2168 .llvm_name = "cortex-a520",2168 .llvm_name = "cortex-a520",
2169 .features = featureSet(&[_]Feature{2169 .features = featureSet(&[_]Feature{
2170 .ccidx,
2171 .ete,2170 .ete,
2172 .fp16fml,2171 .fp16fml,
2173 .fuse_adrp_add,2172 .fuse_adrp_add,
2174 .fuse_aes,2173 .fuse_aes,
2175 .mte,2174 .mte,
2176 .perfmon,2175 .perfmon,
2177 .ssbs,
2178 .sve2_bitperm,2176 .sve2_bitperm,
2179 .use_postra_scheduler,2177 .use_postra_scheduler,
2180 .v9_2a,2178 .v9_2a,
...@@ -2184,14 +2182,12 @@ pub const cpu = struct {...@@ -2184,14 +2182,12 @@ pub const cpu = struct {
2184 .name = "cortex_a520ae",2182 .name = "cortex_a520ae",
2185 .llvm_name = "cortex-a520ae",2183 .llvm_name = "cortex-a520ae",
2186 .features = featureSet(&[_]Feature{2184 .features = featureSet(&[_]Feature{
2187 .ccidx,
2188 .ete,2185 .ete,
2189 .fp16fml,2186 .fp16fml,
2190 .fuse_adrp_add,2187 .fuse_adrp_add,
2191 .fuse_aes,2188 .fuse_aes,
2192 .mte,2189 .mte,
2193 .perfmon,2190 .perfmon,
2194 .ssbs,
2195 .sve2_bitperm,2191 .sve2_bitperm,
2196 .use_postra_scheduler,2192 .use_postra_scheduler,
2197 .v9_2a,2193 .v9_2a,
...@@ -2294,7 +2290,6 @@ pub const cpu = struct {...@@ -2294,7 +2290,6 @@ pub const cpu = struct {
2294 .features = featureSet(&[_]Feature{2290 .features = featureSet(&[_]Feature{
2295 .alu_lsl_fast,2291 .alu_lsl_fast,
2296 .bf16,2292 .bf16,
2297 .ccidx,
2298 .cmp_bcc_fusion,2293 .cmp_bcc_fusion,
2299 .enable_select_opt,2294 .enable_select_opt,
2300 .ete,2295 .ete,
...@@ -2305,7 +2300,6 @@ pub const cpu = struct {...@@ -2305,7 +2300,6 @@ pub const cpu = struct {
2305 .mte,2300 .mte,
2306 .perfmon,2301 .perfmon,
2307 .predictable_select_expensive,2302 .predictable_select_expensive,
2308 .ssbs,
2309 .sve2_bitperm,2303 .sve2_bitperm,
2310 .use_postra_scheduler,2304 .use_postra_scheduler,
2311 .v9a,2305 .v9a,
...@@ -2317,7 +2311,6 @@ pub const cpu = struct {...@@ -2317,7 +2311,6 @@ pub const cpu = struct {
2317 .features = featureSet(&[_]Feature{2311 .features = featureSet(&[_]Feature{
2318 .alu_lsl_fast,2312 .alu_lsl_fast,
2319 .bf16,2313 .bf16,
2320 .ccidx,
2321 .cmp_bcc_fusion,2314 .cmp_bcc_fusion,
2322 .enable_select_opt,2315 .enable_select_opt,
2323 .ete,2316 .ete,
...@@ -2329,7 +2322,6 @@ pub const cpu = struct {...@@ -2329,7 +2322,6 @@ pub const cpu = struct {
2329 .perfmon,2322 .perfmon,
2330 .predictable_select_expensive,2323 .predictable_select_expensive,
2331 .spe,2324 .spe,
2332 .ssbs,
2333 .sve2_bitperm,2325 .sve2_bitperm,
2334 .use_postra_scheduler,2326 .use_postra_scheduler,
2335 .v9a,2327 .v9a,
...@@ -2357,7 +2349,6 @@ pub const cpu = struct {...@@ -2357,7 +2349,6 @@ pub const cpu = struct {
2357 .llvm_name = "cortex-a720",2349 .llvm_name = "cortex-a720",
2358 .features = featureSet(&[_]Feature{2350 .features = featureSet(&[_]Feature{
2359 .alu_lsl_fast,2351 .alu_lsl_fast,
2360 .ccidx,
2361 .cmp_bcc_fusion,2352 .cmp_bcc_fusion,
2362 .enable_select_opt,2353 .enable_select_opt,
2363 .ete,2354 .ete,
...@@ -2369,7 +2360,6 @@ pub const cpu = struct {...@@ -2369,7 +2360,6 @@ pub const cpu = struct {
2369 .predictable_select_expensive,2360 .predictable_select_expensive,
2370 .spe,2361 .spe,
2371 .spe_eef,2362 .spe_eef,
2372 .ssbs,
2373 .sve2_bitperm,2363 .sve2_bitperm,
2374 .use_postra_scheduler,2364 .use_postra_scheduler,
2375 .v9_2a,2365 .v9_2a,
...@@ -2380,7 +2370,6 @@ pub const cpu = struct {...@@ -2380,7 +2370,6 @@ pub const cpu = struct {
2380 .llvm_name = "cortex-a720ae",2370 .llvm_name = "cortex-a720ae",
2381 .features = featureSet(&[_]Feature{2371 .features = featureSet(&[_]Feature{
2382 .alu_lsl_fast,2372 .alu_lsl_fast,
2383 .ccidx,
2384 .cmp_bcc_fusion,2373 .cmp_bcc_fusion,
2385 .enable_select_opt,2374 .enable_select_opt,
2386 .ete,2375 .ete,
...@@ -2392,7 +2381,6 @@ pub const cpu = struct {...@@ -2392,7 +2381,6 @@ pub const cpu = struct {
2392 .predictable_select_expensive,2381 .predictable_select_expensive,
2393 .spe,2382 .spe,
2394 .spe_eef,2383 .spe_eef,
2395 .ssbs,
2396 .sve2_bitperm,2384 .sve2_bitperm,
2397 .use_postra_scheduler,2385 .use_postra_scheduler,
2398 .v9_2a,2386 .v9_2a,
...@@ -2403,7 +2391,6 @@ pub const cpu = struct {...@@ -2403,7 +2391,6 @@ pub const cpu = struct {
2403 .llvm_name = "cortex-a725",2391 .llvm_name = "cortex-a725",
2404 .features = featureSet(&[_]Feature{2392 .features = featureSet(&[_]Feature{
2405 .alu_lsl_fast,2393 .alu_lsl_fast,
2406 .ccidx,
2407 .cmp_bcc_fusion,2394 .cmp_bcc_fusion,
2408 .enable_select_opt,2395 .enable_select_opt,
2409 .ete,2396 .ete,
...@@ -2415,7 +2402,6 @@ pub const cpu = struct {...@@ -2415,7 +2402,6 @@ pub const cpu = struct {
2415 .predictable_select_expensive,2402 .predictable_select_expensive,
2416 .spe,2403 .spe,
2417 .spe_eef,2404 .spe_eef,
2418 .ssbs,
2419 .sve2_bitperm,2405 .sve2_bitperm,
2420 .use_postra_scheduler,2406 .use_postra_scheduler,
2421 .v9_2a,2407 .v9_2a,
...@@ -2592,15 +2578,8 @@ pub const cpu = struct {...@@ -2592,15 +2578,8 @@ pub const cpu = struct {
2592 .llvm_name = "cortex-r82",2578 .llvm_name = "cortex-r82",
2593 .features = featureSet(&[_]Feature{2579 .features = featureSet(&[_]Feature{
2594 .ccdp,2580 .ccdp,
2595 .complxnum,
2596 .dotprod,
2597 .fp16fml,
2598 .jsconv,
2599 .perfmon,2581 .perfmon,
2600 .predres,2582 .predres,
2601 .rdm,
2602 .sb,
2603 .ssbs,
2604 .use_postra_scheduler,2583 .use_postra_scheduler,
2605 .v8r,2584 .v8r,
2606 }),2585 }),
...@@ -2610,15 +2589,8 @@ pub const cpu = struct {...@@ -2610,15 +2589,8 @@ pub const cpu = struct {
2610 .llvm_name = "cortex-r82ae",2589 .llvm_name = "cortex-r82ae",
2611 .features = featureSet(&[_]Feature{2590 .features = featureSet(&[_]Feature{
2612 .ccdp,2591 .ccdp,
2613 .complxnum,
2614 .dotprod,
2615 .fp16fml,
2616 .jsconv,
2617 .perfmon,2592 .perfmon,
2618 .predres,2593 .predres,
2619 .rdm,
2620 .sb,
2621 .ssbs,
2622 .use_postra_scheduler,2594 .use_postra_scheduler,
2623 .v8r,2595 .v8r,
2624 }),2596 }),
...@@ -2678,7 +2650,6 @@ pub const cpu = struct {...@@ -2678,7 +2650,6 @@ pub const cpu = struct {
2678 .features = featureSet(&[_]Feature{2650 .features = featureSet(&[_]Feature{
2679 .alu_lsl_fast,2651 .alu_lsl_fast,
2680 .bf16,2652 .bf16,
2681 .ccidx,
2682 .cmp_bcc_fusion,2653 .cmp_bcc_fusion,
2683 .enable_select_opt,2654 .enable_select_opt,
2684 .ete,2655 .ete,
...@@ -2689,7 +2660,6 @@ pub const cpu = struct {...@@ -2689,7 +2660,6 @@ pub const cpu = struct {
2689 .mte,2660 .mte,
2690 .perfmon,2661 .perfmon,
2691 .predictable_select_expensive,2662 .predictable_select_expensive,
2692 .ssbs,
2693 .sve2_bitperm,2663 .sve2_bitperm,
2694 .use_postra_scheduler,2664 .use_postra_scheduler,
2695 .v9a,2665 .v9a,
...@@ -2701,7 +2671,6 @@ pub const cpu = struct {...@@ -2701,7 +2671,6 @@ pub const cpu = struct {
2701 .features = featureSet(&[_]Feature{2671 .features = featureSet(&[_]Feature{
2702 .alu_lsl_fast,2672 .alu_lsl_fast,
2703 .bf16,2673 .bf16,
2704 .ccidx,
2705 .enable_select_opt,2674 .enable_select_opt,
2706 .ete,2675 .ete,
2707 .fp16fml,2676 .fp16fml,
...@@ -2712,7 +2681,6 @@ pub const cpu = struct {...@@ -2712,7 +2681,6 @@ pub const cpu = struct {
2712 .perfmon,2681 .perfmon,
2713 .predictable_select_expensive,2682 .predictable_select_expensive,
2714 .spe,2683 .spe,
2715 .ssbs,
2716 .sve2_bitperm,2684 .sve2_bitperm,
2717 .use_postra_scheduler,2685 .use_postra_scheduler,
2718 .v9a,2686 .v9a,
...@@ -2723,7 +2691,6 @@ pub const cpu = struct {...@@ -2723,7 +2691,6 @@ pub const cpu = struct {
2723 .llvm_name = "cortex-x4",2691 .llvm_name = "cortex-x4",
2724 .features = featureSet(&[_]Feature{2692 .features = featureSet(&[_]Feature{
2725 .alu_lsl_fast,2693 .alu_lsl_fast,
2726 .ccidx,
2727 .enable_select_opt,2694 .enable_select_opt,
2728 .ete,2695 .ete,
2729 .fp16fml,2696 .fp16fml,
...@@ -2734,7 +2701,6 @@ pub const cpu = struct {...@@ -2734,7 +2701,6 @@ pub const cpu = struct {
2734 .predictable_select_expensive,2701 .predictable_select_expensive,
2735 .spe,2702 .spe,
2736 .spe_eef,2703 .spe_eef,
2737 .ssbs,
2738 .sve2_bitperm,2704 .sve2_bitperm,
2739 .use_postra_scheduler,2705 .use_postra_scheduler,
2740 .v9_2a,2706 .v9_2a,
...@@ -2745,7 +2711,6 @@ pub const cpu = struct {...@@ -2745,7 +2711,6 @@ pub const cpu = struct {
2745 .llvm_name = "cortex-x925",2711 .llvm_name = "cortex-x925",
2746 .features = featureSet(&[_]Feature{2712 .features = featureSet(&[_]Feature{
2747 .alu_lsl_fast,2713 .alu_lsl_fast,
2748 .ccidx,
2749 .enable_select_opt,2714 .enable_select_opt,
2750 .ete,2715 .ete,
2751 .fp16fml,2716 .fp16fml,
...@@ -2756,7 +2721,6 @@ pub const cpu = struct {...@@ -2756,7 +2721,6 @@ pub const cpu = struct {
2756 .predictable_select_expensive,2721 .predictable_select_expensive,
2757 .spe,2722 .spe,
2758 .spe_eef,2723 .spe_eef,
2759 .ssbs,
2760 .sve2_bitperm,2724 .sve2_bitperm,
2761 .use_postra_scheduler,2725 .use_postra_scheduler,
2762 .v9_2a,2726 .v9_2a,
...@@ -2935,7 +2899,6 @@ pub const cpu = struct {...@@ -2935,7 +2899,6 @@ pub const cpu = struct {
2935 .features = featureSet(&[_]Feature{2899 .features = featureSet(&[_]Feature{
2936 .alu_lsl_fast,2900 .alu_lsl_fast,
2937 .bf16,2901 .bf16,
2938 .ccidx,
2939 .cmp_bcc_fusion,2902 .cmp_bcc_fusion,
2940 .enable_select_opt,2903 .enable_select_opt,
2941 .ete,2904 .ete,
...@@ -2948,7 +2911,6 @@ pub const cpu = struct {...@@ -2948,7 +2911,6 @@ pub const cpu = struct {
2948 .predictable_select_expensive,2911 .predictable_select_expensive,
2949 .rand,2912 .rand,
2950 .spe,2913 .spe,
2951 .ssbs,
2952 .sve2_bitperm,2914 .sve2_bitperm,
2953 .use_fixed_over_scalable_if_equal_cost,2915 .use_fixed_over_scalable_if_equal_cost,
2954 .use_postra_scheduler,2916 .use_postra_scheduler,
...@@ -2979,7 +2941,6 @@ pub const cpu = struct {...@@ -2979,7 +2941,6 @@ pub const cpu = struct {
2979 .alu_lsl_fast,2941 .alu_lsl_fast,
2980 .bf16,2942 .bf16,
2981 .ccdp,2943 .ccdp,
2982 .ccidx,
2983 .enable_select_opt,2944 .enable_select_opt,
2984 .fp16fml,2945 .fp16fml,
2985 .fuse_adrp_add,2946 .fuse_adrp_add,
...@@ -3042,7 +3003,6 @@ pub const cpu = struct {...@@ -3042,7 +3003,6 @@ pub const cpu = struct {
3042 .features = featureSet(&[_]Feature{3003 .features = featureSet(&[_]Feature{
3043 .alu_lsl_fast,3004 .alu_lsl_fast,
3044 .bf16,3005 .bf16,
3045 .ccidx,
3046 .enable_select_opt,3006 .enable_select_opt,
3047 .ete,3007 .ete,
3048 .fp16fml,3008 .fp16fml,
...@@ -3052,7 +3012,6 @@ pub const cpu = struct {...@@ -3052,7 +3012,6 @@ pub const cpu = struct {
3052 .mte,3012 .mte,
3053 .perfmon,3013 .perfmon,
3054 .predictable_select_expensive,3014 .predictable_select_expensive,
3055 .ssbs,
3056 .sve2_bitperm,3015 .sve2_bitperm,
3057 .use_postra_scheduler,3016 .use_postra_scheduler,
3058 .v9a,3017 .v9a,
...@@ -3063,7 +3022,6 @@ pub const cpu = struct {...@@ -3063,7 +3022,6 @@ pub const cpu = struct {
3063 .llvm_name = "neoverse-n3",3022 .llvm_name = "neoverse-n3",
3064 .features = featureSet(&[_]Feature{3023 .features = featureSet(&[_]Feature{
3065 .alu_lsl_fast,3024 .alu_lsl_fast,
3066 .ccidx,
3067 .enable_select_opt,3025 .enable_select_opt,
3068 .ete,3026 .ete,
3069 .fp16fml,3027 .fp16fml,
...@@ -3075,7 +3033,6 @@ pub const cpu = struct {...@@ -3075,7 +3033,6 @@ pub const cpu = struct {
3075 .rand,3033 .rand,
3076 .spe,3034 .spe,
3077 .spe_eef,3035 .spe_eef,
3078 .ssbs,
3079 .sve2_bitperm,3036 .sve2_bitperm,
3080 .use_postra_scheduler,3037 .use_postra_scheduler,
3081 .v9_2a,3038 .v9_2a,
...@@ -3090,7 +3047,6 @@ pub const cpu = struct {...@@ -3090,7 +3047,6 @@ pub const cpu = struct {
3090 .alu_lsl_fast,3047 .alu_lsl_fast,
3091 .bf16,3048 .bf16,
3092 .ccdp,3049 .ccdp,
3093 .ccidx,
3094 .enable_select_opt,3050 .enable_select_opt,
3095 .fp16fml,3051 .fp16fml,
3096 .fuse_adrp_add,3052 .fuse_adrp_add,
...@@ -3115,7 +3071,6 @@ pub const cpu = struct {...@@ -3115,7 +3071,6 @@ pub const cpu = struct {
3115 .features = featureSet(&[_]Feature{3071 .features = featureSet(&[_]Feature{
3116 .alu_lsl_fast,3072 .alu_lsl_fast,
3117 .bf16,3073 .bf16,
3118 .ccidx,
3119 .cmp_bcc_fusion,3074 .cmp_bcc_fusion,
3120 .enable_select_opt,3075 .enable_select_opt,
3121 .ete,3076 .ete,
...@@ -3128,7 +3083,6 @@ pub const cpu = struct {...@@ -3128,7 +3083,6 @@ pub const cpu = struct {
3128 .predictable_select_expensive,3083 .predictable_select_expensive,
3129 .rand,3084 .rand,
3130 .spe,3085 .spe,
3131 .ssbs,
3132 .sve2_bitperm,3086 .sve2_bitperm,
3133 .use_fixed_over_scalable_if_equal_cost,3087 .use_fixed_over_scalable_if_equal_cost,
3134 .use_postra_scheduler,3088 .use_postra_scheduler,
...@@ -3141,7 +3095,6 @@ pub const cpu = struct {...@@ -3141,7 +3095,6 @@ pub const cpu = struct {
3141 .features = featureSet(&[_]Feature{3095 .features = featureSet(&[_]Feature{
3142 .alu_lsl_fast,3096 .alu_lsl_fast,
3143 .brbe,3097 .brbe,
3144 .ccidx,
3145 .enable_select_opt,3098 .enable_select_opt,
3146 .ete,3099 .ete,
3147 .fp16fml,3100 .fp16fml,
...@@ -3152,10 +3105,8 @@ pub const cpu = struct {...@@ -3152,10 +3105,8 @@ pub const cpu = struct {
3152 .perfmon,3105 .perfmon,
3153 .predictable_select_expensive,3106 .predictable_select_expensive,
3154 .rand,3107 .rand,
3155 .rme,
3156 .spe,3108 .spe,
3157 .spe_eef,3109 .spe_eef,
3158 .ssbs,
3159 .sve2_bitperm,3110 .sve2_bitperm,
3160 .use_postra_scheduler,3111 .use_postra_scheduler,
3161 .v9_2a,3112 .v9_2a,
...@@ -3167,7 +3118,6 @@ pub const cpu = struct {...@@ -3167,7 +3118,6 @@ pub const cpu = struct {
3167 .features = featureSet(&[_]Feature{3118 .features = featureSet(&[_]Feature{
3168 .alu_lsl_fast,3119 .alu_lsl_fast,
3169 .brbe,3120 .brbe,
3170 .ccidx,
3171 .enable_select_opt,3121 .enable_select_opt,
3172 .ete,3122 .ete,
3173 .fp16fml,3123 .fp16fml,
...@@ -3178,10 +3128,8 @@ pub const cpu = struct {...@@ -3178,10 +3128,8 @@ pub const cpu = struct {
3178 .perfmon,3128 .perfmon,
3179 .predictable_select_expensive,3129 .predictable_select_expensive,
3180 .rand,3130 .rand,
3181 .rme,
3182 .spe,3131 .spe,
3183 .spe_eef,3132 .spe_eef,
3184 .ssbs,
3185 .sve2_bitperm,3133 .sve2_bitperm,
3186 .use_postra_scheduler,3134 .use_postra_scheduler,
3187 .v9_2a,3135 .v9_2a,
...@@ -3192,7 +3140,6 @@ pub const cpu = struct {...@@ -3192,7 +3140,6 @@ pub const cpu = struct {
3192 .llvm_name = "oryon-1",3140 .llvm_name = "oryon-1",
3193 .features = featureSet(&[_]Feature{3141 .features = featureSet(&[_]Feature{
3194 .aes,3142 .aes,
3195 .ccidx,
3196 .enable_select_opt,3143 .enable_select_opt,
3197 .fp16fml,3144 .fp16fml,
3198 .fuse_address,3145 .fuse_address,
...@@ -3204,7 +3151,6 @@ pub const cpu = struct {...@@ -3204,7 +3151,6 @@ pub const cpu = struct {
3204 .sha3,3151 .sha3,
3205 .sm4,3152 .sm4,
3206 .spe,3153 .spe,
3207 .ssbs,
3208 .use_postra_scheduler,3154 .use_postra_scheduler,
3209 .v8_6a,3155 .v8_6a,
3210 }),3156 }),
...@@ -3215,7 +3161,6 @@ pub const cpu = struct {...@@ -3215,7 +3161,6 @@ pub const cpu = struct {
3215 .features = featureSet(&[_]Feature{3161 .features = featureSet(&[_]Feature{
3216 .aes,3162 .aes,
3217 .alu_lsl_fast,3163 .alu_lsl_fast,
3218 .ccidx,
3219 .perfmon,3164 .perfmon,
3220 .predictable_select_expensive,3165 .predictable_select_expensive,
3221 .sha2,3166 .sha2,
...@@ -3262,7 +3207,6 @@ pub const cpu = struct {...@@ -3262,7 +3207,6 @@ pub const cpu = struct {
3262 .aggressive_fma,3207 .aggressive_fma,
3263 .arith_bcc_fusion,3208 .arith_bcc_fusion,
3264 .balance_fp_ops,3209 .balance_fp_ops,
3265 .ccidx,
3266 .perfmon,3210 .perfmon,
3267 .predictable_select_expensive,3211 .predictable_select_expensive,
3268 .sha2,3212 .sha2,
lib/std/Target/arm.zig-1
...@@ -2254,7 +2254,6 @@ pub const cpu = struct {...@@ -2254,7 +2254,6 @@ pub const cpu = struct {
2254 .llvm_name = "cortex-m85",2254 .llvm_name = "cortex-m85",
2255 .features = featureSet(&[_]Feature{2255 .features = featureSet(&[_]Feature{
2256 .dsp,2256 .dsp,
2257 .trustzone,
2258 .use_misched,2257 .use_misched,
2259 .v8_1m_main,2258 .v8_1m_main,
2260 }),2259 }),
tools/update_cpu_features.zig+18-5
...@@ -61,10 +61,6 @@ const llvm_targets = [_]LlvmTarget{...@@ -61,10 +61,6 @@ const llvm_targets = [_]LlvmTarget{
61 .zig_name = "contextidr_el2",61 .zig_name = "contextidr_el2",
62 .desc = "Enable RW operand Context ID Register (EL2)",62 .desc = "Enable RW operand Context ID Register (EL2)",
63 },63 },
64 .{
65 .llvm_name = "v8a",
66 .extra_deps = &.{"neon"},
67 },
68 .{64 .{
69 .llvm_name = "neoversee1",65 .llvm_name = "neoversee1",
70 .flatten = true,66 .flatten = true,
...@@ -487,7 +483,6 @@ const llvm_targets = [_]LlvmTarget{...@@ -487,7 +483,6 @@ const llvm_targets = [_]LlvmTarget{
487 .{483 .{
488 .llvm_name = "cortex-m85",484 .llvm_name = "cortex-m85",
489 .omit_deps = &.{ "mve_fp", "pacbti", "fp_armv8d16" },485 .omit_deps = &.{ "mve_fp", "pacbti", "fp_armv8d16" },
490 .extra_deps = &.{"trustzone"},
491 },486 },
492 .{487 .{
493 .llvm_name = "cortex-x1c",488 .llvm_name = "cortex-x1c",
...@@ -1436,6 +1431,24 @@ fn processOneTarget(job: Job) anyerror!void {...@@ -1436,6 +1431,24 @@ fn processOneTarget(job: Job) anyerror!void {
1436 try deps.append(other_zig_name);1431 try deps.append(other_zig_name);
1437 }1432 }
1438 }1433 }
1434 // This is used by AArch64.
1435 if (kv.value_ptr.object.get("DefaultExts")) |exts_val| {
1436 for (exts_val.array.items) |ext| {
1437 const other_key = ext.object.get("def").?.string;
1438 const other_obj = &root_map.getPtr(other_key).?.object;
1439 const other_llvm_name = other_obj.get("Name").?.string;
1440 const other_zig_name = (try llvmFeatureNameToZigNameOmit(
1441 arena,
1442 llvm_target,
1443 other_llvm_name,
1444 )) orelse continue;
1445 for (omit_deps) |omit_dep| {
1446 if (mem.eql(u8, other_zig_name, omit_dep)) break;
1447 } else {
1448 try deps.append(other_zig_name);
1449 }
1450 }
1451 }
1439 for (extra_deps) |extra_dep| {1452 for (extra_deps) |extra_dep| {
1440 try deps.append(extra_dep);1453 try deps.append(extra_dep);
1441 }1454 }