authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-03 00:41:48+02:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-10-03 00:41:48+02:00
log8ee52f99ceab6a05b931eeb48825c00fd26ac486
treeca532b35bcc30c2f8098cf317af325d38b6a46be
parent0548a61f5386dcd67c83d49db37b815eef92635e
parent5458c9c71bc933ffb87c99c13ac4e99461764ea3
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #21505 from alexrp/cpu-features-exts

`update_cpu_features`: Add support for parsing `DefaultExts` as used for aarch64.

3 files changed, 33 insertions(+), 77 deletions(-)

lib/std/Target/aarch64.zig+15-71
......@@ -1373,6 +1373,7 @@ pub const all_features = blk: {
13731373 .llvm_name = "v8.3a",
13741374 .description = "Support ARM v8.3a architecture",
13751375 .dependencies = featureSet(&[_]Feature{
1376 .ccidx,
13761377 .complxnum,
13771378 .jsconv,
13781379 .pauth,
......@@ -1409,6 +1410,7 @@ pub const all_features = blk: {
14091410 .predres,
14101411 .sb,
14111412 .specrestrict,
1413 .ssbs,
14121414 .v8_4a,
14131415 }),
14141416 };
......@@ -1470,18 +1472,26 @@ pub const all_features = blk: {
14701472 .llvm_name = "v8r",
14711473 .description = "Support ARM v8r architecture",
14721474 .dependencies = featureSet(&[_]Feature{
1475 .ccidx,
14731476 .ccpp,
1477 .complxnum,
14741478 .contextidr_el2,
14751479 .crc,
14761480 .dit,
1481 .dotprod,
14771482 .flagm,
1483 .fp16fml,
1484 .jsconv,
14781485 .lse,
14791486 .pan_rwv,
14801487 .pauth,
14811488 .ras,
14821489 .rcpc_immo,
1490 .rdm,
1491 .sb,
14831492 .sel2,
14841493 .specrestrict,
1494 .ssbs,
14851495 .tlb_rmi,
14861496 .tracev8_4,
14871497 .uaops,
......@@ -1491,6 +1501,7 @@ pub const all_features = blk: {
14911501 .llvm_name = "v9.1a",
14921502 .description = "Support ARM v9.1a architecture",
14931503 .dependencies = featureSet(&[_]Feature{
1504 .rme,
14941505 .v8_6a,
14951506 .v9a,
14961507 }),
......@@ -1499,6 +1510,7 @@ pub const all_features = blk: {
14991510 .llvm_name = "v9.2a",
15001511 .description = "Support ARM v9.2a architecture",
15011512 .dependencies = featureSet(&[_]Feature{
1513 .mec,
15021514 .v8_7a,
15031515 .v9_1a,
15041516 }),
......@@ -1524,6 +1536,8 @@ pub const all_features = blk: {
15241536 .description = "Support ARM v9.5a architecture",
15251537 .dependencies = featureSet(&[_]Feature{
15261538 .cpa,
1539 .faminmax,
1540 .lut,
15271541 .v9_4a,
15281542 }),
15291543 };
......@@ -1531,6 +1545,7 @@ pub const all_features = blk: {
15311545 .llvm_name = "v9a",
15321546 .description = "Support ARM v9a architecture",
15331547 .dependencies = featureSet(&[_]Feature{
1548 .sve2,
15341549 .v8_5a,
15351550 }),
15361551 };
......@@ -1607,7 +1622,6 @@ pub const cpu = struct {
16071622 .aggressive_fma,
16081623 .alu_lsl_fast,
16091624 .arith_bcc_fusion,
1610 .ccidx,
16111625 .cmp_bcc_fusion,
16121626 .fullfp16,
16131627 .fuse_address,
......@@ -1618,7 +1632,6 @@ pub const cpu = struct {
16181632 .perfmon,
16191633 .rand,
16201634 .sha3,
1621 .ssbs,
16221635 .store_pair_suppress,
16231636 .stp_aligned_only,
16241637 .use_postra_scheduler,
......@@ -1633,7 +1646,6 @@ pub const cpu = struct {
16331646 .aggressive_fma,
16341647 .alu_lsl_fast,
16351648 .arith_bcc_fusion,
1636 .ccidx,
16371649 .cmp_bcc_fusion,
16381650 .fullfp16,
16391651 .fuse_address,
......@@ -1647,7 +1659,6 @@ pub const cpu = struct {
16471659 .rand,
16481660 .sha3,
16491661 .sm4,
1650 .ssbs,
16511662 .store_pair_suppress,
16521663 .stp_aligned_only,
16531664 .use_postra_scheduler,
......@@ -1662,7 +1673,6 @@ pub const cpu = struct {
16621673 .aggressive_fma,
16631674 .alu_lsl_fast,
16641675 .arith_bcc_fusion,
1665 .ccidx,
16661676 .cmp_bcc_fusion,
16671677 .cssc,
16681678 .enable_select_opt,
......@@ -1678,7 +1688,6 @@ pub const cpu = struct {
16781688 .rand,
16791689 .sha3,
16801690 .sm4,
1681 .ssbs,
16821691 .store_pair_suppress,
16831692 .stp_aligned_only,
16841693 .use_postra_scheduler,
......@@ -1819,7 +1828,6 @@ pub const cpu = struct {
18191828 .fuse_literals,
18201829 .perfmon,
18211830 .sha3,
1822 .ssbs,
18231831 .store_pair_suppress,
18241832 .v8_6a,
18251833 .zcm,
......@@ -1846,7 +1854,6 @@ pub const cpu = struct {
18461854 .hcx,
18471855 .perfmon,
18481856 .sha3,
1849 .ssbs,
18501857 .store_pair_suppress,
18511858 .v8_6a,
18521859 .zcm,
......@@ -1873,7 +1880,6 @@ pub const cpu = struct {
18731880 .hcx,
18741881 .perfmon,
18751882 .sha3,
1876 .ssbs,
18771883 .store_pair_suppress,
18781884 .v8_6a,
18791885 .zcm,
......@@ -1990,7 +1996,6 @@ pub const cpu = struct {
19901996 .fuse_literals,
19911997 .perfmon,
19921998 .sha3,
1993 .ssbs,
19941999 .store_pair_suppress,
19952000 .v8_6a,
19962001 .zcm,
......@@ -2017,7 +2022,6 @@ pub const cpu = struct {
20172022 .hcx,
20182023 .perfmon,
20192024 .sha3,
2020 .ssbs,
20212025 .store_pair_suppress,
20222026 .v8_6a,
20232027 .zcm,
......@@ -2106,7 +2110,6 @@ pub const cpu = struct {
21062110 .features = featureSet(&[_]Feature{
21072111 .alu_lsl_fast,
21082112 .bf16,
2109 .ccidx,
21102113 .enable_select_opt,
21112114 .ete,
21122115 .fp16fml,
......@@ -2116,7 +2119,6 @@ pub const cpu = struct {
21162119 .mte,
21172120 .perfmon,
21182121 .predictable_select_expensive,
2119 .ssbs,
21202122 .sve2_bitperm,
21212123 .use_postra_scheduler,
21222124 .v9a,
......@@ -2149,7 +2151,6 @@ pub const cpu = struct {
21492151 .llvm_name = "cortex-a510",
21502152 .features = featureSet(&[_]Feature{
21512153 .bf16,
2152 .ccidx,
21532154 .ete,
21542155 .fp16fml,
21552156 .fuse_adrp_add,
......@@ -2157,7 +2158,6 @@ pub const cpu = struct {
21572158 .i8mm,
21582159 .mte,
21592160 .perfmon,
2160 .ssbs,
21612161 .sve2_bitperm,
21622162 .use_postra_scheduler,
21632163 .v9a,
......@@ -2167,14 +2167,12 @@ pub const cpu = struct {
21672167 .name = "cortex_a520",
21682168 .llvm_name = "cortex-a520",
21692169 .features = featureSet(&[_]Feature{
2170 .ccidx,
21712170 .ete,
21722171 .fp16fml,
21732172 .fuse_adrp_add,
21742173 .fuse_aes,
21752174 .mte,
21762175 .perfmon,
2177 .ssbs,
21782176 .sve2_bitperm,
21792177 .use_postra_scheduler,
21802178 .v9_2a,
......@@ -2184,14 +2182,12 @@ pub const cpu = struct {
21842182 .name = "cortex_a520ae",
21852183 .llvm_name = "cortex-a520ae",
21862184 .features = featureSet(&[_]Feature{
2187 .ccidx,
21882185 .ete,
21892186 .fp16fml,
21902187 .fuse_adrp_add,
21912188 .fuse_aes,
21922189 .mte,
21932190 .perfmon,
2194 .ssbs,
21952191 .sve2_bitperm,
21962192 .use_postra_scheduler,
21972193 .v9_2a,
......@@ -2294,7 +2290,6 @@ pub const cpu = struct {
22942290 .features = featureSet(&[_]Feature{
22952291 .alu_lsl_fast,
22962292 .bf16,
2297 .ccidx,
22982293 .cmp_bcc_fusion,
22992294 .enable_select_opt,
23002295 .ete,
......@@ -2305,7 +2300,6 @@ pub const cpu = struct {
23052300 .mte,
23062301 .perfmon,
23072302 .predictable_select_expensive,
2308 .ssbs,
23092303 .sve2_bitperm,
23102304 .use_postra_scheduler,
23112305 .v9a,
......@@ -2317,7 +2311,6 @@ pub const cpu = struct {
23172311 .features = featureSet(&[_]Feature{
23182312 .alu_lsl_fast,
23192313 .bf16,
2320 .ccidx,
23212314 .cmp_bcc_fusion,
23222315 .enable_select_opt,
23232316 .ete,
......@@ -2329,7 +2322,6 @@ pub const cpu = struct {
23292322 .perfmon,
23302323 .predictable_select_expensive,
23312324 .spe,
2332 .ssbs,
23332325 .sve2_bitperm,
23342326 .use_postra_scheduler,
23352327 .v9a,
......@@ -2357,7 +2349,6 @@ pub const cpu = struct {
23572349 .llvm_name = "cortex-a720",
23582350 .features = featureSet(&[_]Feature{
23592351 .alu_lsl_fast,
2360 .ccidx,
23612352 .cmp_bcc_fusion,
23622353 .enable_select_opt,
23632354 .ete,
......@@ -2369,7 +2360,6 @@ pub const cpu = struct {
23692360 .predictable_select_expensive,
23702361 .spe,
23712362 .spe_eef,
2372 .ssbs,
23732363 .sve2_bitperm,
23742364 .use_postra_scheduler,
23752365 .v9_2a,
......@@ -2380,7 +2370,6 @@ pub const cpu = struct {
23802370 .llvm_name = "cortex-a720ae",
23812371 .features = featureSet(&[_]Feature{
23822372 .alu_lsl_fast,
2383 .ccidx,
23842373 .cmp_bcc_fusion,
23852374 .enable_select_opt,
23862375 .ete,
......@@ -2392,7 +2381,6 @@ pub const cpu = struct {
23922381 .predictable_select_expensive,
23932382 .spe,
23942383 .spe_eef,
2395 .ssbs,
23962384 .sve2_bitperm,
23972385 .use_postra_scheduler,
23982386 .v9_2a,
......@@ -2403,7 +2391,6 @@ pub const cpu = struct {
24032391 .llvm_name = "cortex-a725",
24042392 .features = featureSet(&[_]Feature{
24052393 .alu_lsl_fast,
2406 .ccidx,
24072394 .cmp_bcc_fusion,
24082395 .enable_select_opt,
24092396 .ete,
......@@ -2415,7 +2402,6 @@ pub const cpu = struct {
24152402 .predictable_select_expensive,
24162403 .spe,
24172404 .spe_eef,
2418 .ssbs,
24192405 .sve2_bitperm,
24202406 .use_postra_scheduler,
24212407 .v9_2a,
......@@ -2592,15 +2578,8 @@ pub const cpu = struct {
25922578 .llvm_name = "cortex-r82",
25932579 .features = featureSet(&[_]Feature{
25942580 .ccdp,
2595 .complxnum,
2596 .dotprod,
2597 .fp16fml,
2598 .jsconv,
25992581 .perfmon,
26002582 .predres,
2601 .rdm,
2602 .sb,
2603 .ssbs,
26042583 .use_postra_scheduler,
26052584 .v8r,
26062585 }),
......@@ -2610,15 +2589,8 @@ pub const cpu = struct {
26102589 .llvm_name = "cortex-r82ae",
26112590 .features = featureSet(&[_]Feature{
26122591 .ccdp,
2613 .complxnum,
2614 .dotprod,
2615 .fp16fml,
2616 .jsconv,
26172592 .perfmon,
26182593 .predres,
2619 .rdm,
2620 .sb,
2621 .ssbs,
26222594 .use_postra_scheduler,
26232595 .v8r,
26242596 }),
......@@ -2678,7 +2650,6 @@ pub const cpu = struct {
26782650 .features = featureSet(&[_]Feature{
26792651 .alu_lsl_fast,
26802652 .bf16,
2681 .ccidx,
26822653 .cmp_bcc_fusion,
26832654 .enable_select_opt,
26842655 .ete,
......@@ -2689,7 +2660,6 @@ pub const cpu = struct {
26892660 .mte,
26902661 .perfmon,
26912662 .predictable_select_expensive,
2692 .ssbs,
26932663 .sve2_bitperm,
26942664 .use_postra_scheduler,
26952665 .v9a,
......@@ -2701,7 +2671,6 @@ pub const cpu = struct {
27012671 .features = featureSet(&[_]Feature{
27022672 .alu_lsl_fast,
27032673 .bf16,
2704 .ccidx,
27052674 .enable_select_opt,
27062675 .ete,
27072676 .fp16fml,
......@@ -2712,7 +2681,6 @@ pub const cpu = struct {
27122681 .perfmon,
27132682 .predictable_select_expensive,
27142683 .spe,
2715 .ssbs,
27162684 .sve2_bitperm,
27172685 .use_postra_scheduler,
27182686 .v9a,
......@@ -2723,7 +2691,6 @@ pub const cpu = struct {
27232691 .llvm_name = "cortex-x4",
27242692 .features = featureSet(&[_]Feature{
27252693 .alu_lsl_fast,
2726 .ccidx,
27272694 .enable_select_opt,
27282695 .ete,
27292696 .fp16fml,
......@@ -2734,7 +2701,6 @@ pub const cpu = struct {
27342701 .predictable_select_expensive,
27352702 .spe,
27362703 .spe_eef,
2737 .ssbs,
27382704 .sve2_bitperm,
27392705 .use_postra_scheduler,
27402706 .v9_2a,
......@@ -2745,7 +2711,6 @@ pub const cpu = struct {
27452711 .llvm_name = "cortex-x925",
27462712 .features = featureSet(&[_]Feature{
27472713 .alu_lsl_fast,
2748 .ccidx,
27492714 .enable_select_opt,
27502715 .ete,
27512716 .fp16fml,
......@@ -2756,7 +2721,6 @@ pub const cpu = struct {
27562721 .predictable_select_expensive,
27572722 .spe,
27582723 .spe_eef,
2759 .ssbs,
27602724 .sve2_bitperm,
27612725 .use_postra_scheduler,
27622726 .v9_2a,
......@@ -2935,7 +2899,6 @@ pub const cpu = struct {
29352899 .features = featureSet(&[_]Feature{
29362900 .alu_lsl_fast,
29372901 .bf16,
2938 .ccidx,
29392902 .cmp_bcc_fusion,
29402903 .enable_select_opt,
29412904 .ete,
......@@ -2948,7 +2911,6 @@ pub const cpu = struct {
29482911 .predictable_select_expensive,
29492912 .rand,
29502913 .spe,
2951 .ssbs,
29522914 .sve2_bitperm,
29532915 .use_fixed_over_scalable_if_equal_cost,
29542916 .use_postra_scheduler,
......@@ -2979,7 +2941,6 @@ pub const cpu = struct {
29792941 .alu_lsl_fast,
29802942 .bf16,
29812943 .ccdp,
2982 .ccidx,
29832944 .enable_select_opt,
29842945 .fp16fml,
29852946 .fuse_adrp_add,
......@@ -3042,7 +3003,6 @@ pub const cpu = struct {
30423003 .features = featureSet(&[_]Feature{
30433004 .alu_lsl_fast,
30443005 .bf16,
3045 .ccidx,
30463006 .enable_select_opt,
30473007 .ete,
30483008 .fp16fml,
......@@ -3052,7 +3012,6 @@ pub const cpu = struct {
30523012 .mte,
30533013 .perfmon,
30543014 .predictable_select_expensive,
3055 .ssbs,
30563015 .sve2_bitperm,
30573016 .use_postra_scheduler,
30583017 .v9a,
......@@ -3063,7 +3022,6 @@ pub const cpu = struct {
30633022 .llvm_name = "neoverse-n3",
30643023 .features = featureSet(&[_]Feature{
30653024 .alu_lsl_fast,
3066 .ccidx,
30673025 .enable_select_opt,
30683026 .ete,
30693027 .fp16fml,
......@@ -3075,7 +3033,6 @@ pub const cpu = struct {
30753033 .rand,
30763034 .spe,
30773035 .spe_eef,
3078 .ssbs,
30793036 .sve2_bitperm,
30803037 .use_postra_scheduler,
30813038 .v9_2a,
......@@ -3090,7 +3047,6 @@ pub const cpu = struct {
30903047 .alu_lsl_fast,
30913048 .bf16,
30923049 .ccdp,
3093 .ccidx,
30943050 .enable_select_opt,
30953051 .fp16fml,
30963052 .fuse_adrp_add,
......@@ -3115,7 +3071,6 @@ pub const cpu = struct {
31153071 .features = featureSet(&[_]Feature{
31163072 .alu_lsl_fast,
31173073 .bf16,
3118 .ccidx,
31193074 .cmp_bcc_fusion,
31203075 .enable_select_opt,
31213076 .ete,
......@@ -3128,7 +3083,6 @@ pub const cpu = struct {
31283083 .predictable_select_expensive,
31293084 .rand,
31303085 .spe,
3131 .ssbs,
31323086 .sve2_bitperm,
31333087 .use_fixed_over_scalable_if_equal_cost,
31343088 .use_postra_scheduler,
......@@ -3141,7 +3095,6 @@ pub const cpu = struct {
31413095 .features = featureSet(&[_]Feature{
31423096 .alu_lsl_fast,
31433097 .brbe,
3144 .ccidx,
31453098 .enable_select_opt,
31463099 .ete,
31473100 .fp16fml,
......@@ -3152,10 +3105,8 @@ pub const cpu = struct {
31523105 .perfmon,
31533106 .predictable_select_expensive,
31543107 .rand,
3155 .rme,
31563108 .spe,
31573109 .spe_eef,
3158 .ssbs,
31593110 .sve2_bitperm,
31603111 .use_postra_scheduler,
31613112 .v9_2a,
......@@ -3167,7 +3118,6 @@ pub const cpu = struct {
31673118 .features = featureSet(&[_]Feature{
31683119 .alu_lsl_fast,
31693120 .brbe,
3170 .ccidx,
31713121 .enable_select_opt,
31723122 .ete,
31733123 .fp16fml,
......@@ -3178,10 +3128,8 @@ pub const cpu = struct {
31783128 .perfmon,
31793129 .predictable_select_expensive,
31803130 .rand,
3181 .rme,
31823131 .spe,
31833132 .spe_eef,
3184 .ssbs,
31853133 .sve2_bitperm,
31863134 .use_postra_scheduler,
31873135 .v9_2a,
......@@ -3192,7 +3140,6 @@ pub const cpu = struct {
31923140 .llvm_name = "oryon-1",
31933141 .features = featureSet(&[_]Feature{
31943142 .aes,
3195 .ccidx,
31963143 .enable_select_opt,
31973144 .fp16fml,
31983145 .fuse_address,
......@@ -3204,7 +3151,6 @@ pub const cpu = struct {
32043151 .sha3,
32053152 .sm4,
32063153 .spe,
3207 .ssbs,
32083154 .use_postra_scheduler,
32093155 .v8_6a,
32103156 }),
......@@ -3215,7 +3161,6 @@ pub const cpu = struct {
32153161 .features = featureSet(&[_]Feature{
32163162 .aes,
32173163 .alu_lsl_fast,
3218 .ccidx,
32193164 .perfmon,
32203165 .predictable_select_expensive,
32213166 .sha2,
......@@ -3262,7 +3207,6 @@ pub const cpu = struct {
32623207 .aggressive_fma,
32633208 .arith_bcc_fusion,
32643209 .balance_fp_ops,
3265 .ccidx,
32663210 .perfmon,
32673211 .predictable_select_expensive,
32683212 .sha2,
lib/std/Target/arm.zig-1
......@@ -2254,7 +2254,6 @@ pub const cpu = struct {
22542254 .llvm_name = "cortex-m85",
22552255 .features = featureSet(&[_]Feature{
22562256 .dsp,
2257 .trustzone,
22582257 .use_misched,
22592258 .v8_1m_main,
22602259 }),
tools/update_cpu_features.zig+18-5
......@@ -61,10 +61,6 @@ const llvm_targets = [_]LlvmTarget{
6161 .zig_name = "contextidr_el2",
6262 .desc = "Enable RW operand Context ID Register (EL2)",
6363 },
64 .{
65 .llvm_name = "v8a",
66 .extra_deps = &.{"neon"},
67 },
6864 .{
6965 .llvm_name = "neoversee1",
7066 .flatten = true,
......@@ -487,7 +483,6 @@ const llvm_targets = [_]LlvmTarget{
487483 .{
488484 .llvm_name = "cortex-m85",
489485 .omit_deps = &.{ "mve_fp", "pacbti", "fp_armv8d16" },
490 .extra_deps = &.{"trustzone"},
491486 },
492487 .{
493488 .llvm_name = "cortex-x1c",
......@@ -1436,6 +1431,24 @@ fn processOneTarget(job: Job) anyerror!void {
14361431 try deps.append(other_zig_name);
14371432 }
14381433 }
1434 // This is used by AArch64.
1435 if (kv.value_ptr.object.get("DefaultExts")) |exts_val| {
1436 for (exts_val.array.items) |ext| {
1437 const other_key = ext.object.get("def").?.string;
1438 const other_obj = &root_map.getPtr(other_key).?.object;
1439 const other_llvm_name = other_obj.get("Name").?.string;
1440 const other_zig_name = (try llvmFeatureNameToZigNameOmit(
1441 arena,
1442 llvm_target,
1443 other_llvm_name,
1444 )) orelse continue;
1445 for (omit_deps) |omit_dep| {
1446 if (mem.eql(u8, other_zig_name, omit_dep)) break;
1447 } else {
1448 try deps.append(other_zig_name);
1449 }
1450 }
1451 }
14391452 for (extra_deps) |extra_dep| {
14401453 try deps.append(extra_dep);
14411454 }