| ... | @@ -7,6 +7,7 @@ const Module = @import("../../Module.zig"); | ... | @@ -7,6 +7,7 @@ const Module = @import("../../Module.zig"); |
| 7 | const ErrorMsg = Module.ErrorMsg; | 7 | const ErrorMsg = Module.ErrorMsg; |
| 8 | const Liveness = @import("../../Liveness.zig"); | 8 | const Liveness = @import("../../Liveness.zig"); |
| 9 | const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput; | 9 | const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput; |
| | 10 | const DW = std.dwarf; |
| 10 | | 11 | |
| 11 | const Emit = @This(); | 12 | const Emit = @This(); |
| 12 | const Mir = @import("Mir.zig"); | 13 | const Mir = @import("Mir.zig"); |
| ... | @@ -33,11 +34,60 @@ const InnerError = error{ | ... | @@ -33,11 +34,60 @@ const InnerError = error{ |
| 33 | pub fn emitMir( | 34 | pub fn emitMir( |
| 34 | emit: *Emit, | 35 | emit: *Emit, |
| 35 | ) InnerError!void { | 36 | ) InnerError!void { |
| 36 | _ = emit; | 37 | const mir_tags = emit.mir.instructions.items(.tag); |
| 37 | | 38 | |
| 38 | @panic("TODO implement emitMir"); | 39 | // Emit machine code |
| | 40 | for (mir_tags) |tag, index| { |
| | 41 | const inst = @intCast(u32, index); |
| | 42 | switch (tag) { |
| | 43 | .dbg_line => try emit.mirDbgLine(inst), |
| | 44 | |
| | 45 | .dbg_prologue_end => try emit.mirDebugPrologueEnd(), |
| | 46 | .dbg_epilogue_begin => try emit.mirDebugEpilogueBegin(), |
| | 47 | } |
| | 48 | } |
| 39 | } | 49 | } |
| 40 | | 50 | |
| 41 | pub fn deinit(emit: *Emit) void { | 51 | pub fn deinit(emit: *Emit) void { |
| 42 | emit.* = undefined; | 52 | emit.* = undefined; |
| 43 | } | 53 | } |
| | 54 | |
| | 55 | fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void { |
| | 56 | _ = self; |
| | 57 | _ = line; |
| | 58 | _ = column; |
| | 59 | |
| | 60 | @panic("TODO implement dbgAdvancePCAndLine"); |
| | 61 | } |
| | 62 | |
| | 63 | fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void { |
| | 64 | const tag = emit.mir.instructions.items(.tag)[inst]; |
| | 65 | const dbg_line_column = emit.mir.instructions.items(.data)[inst].dbg_line_column; |
| | 66 | |
| | 67 | switch (tag) { |
| | 68 | .dbg_line => try emit.dbgAdvancePCAndLine(dbg_line_column.line, dbg_line_column.column), |
| | 69 | else => unreachable, |
| | 70 | } |
| | 71 | } |
| | 72 | |
| | 73 | fn mirDebugPrologueEnd(self: *Emit) !void { |
| | 74 | switch (self.debug_output) { |
| | 75 | .dwarf => |dbg_out| { |
| | 76 | try dbg_out.dbg_line.append(DW.LNS.set_prologue_end); |
| | 77 | try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column); |
| | 78 | }, |
| | 79 | .plan9 => {}, |
| | 80 | .none => {}, |
| | 81 | } |
| | 82 | } |
| | 83 | |
| | 84 | fn mirDebugEpilogueBegin(self: *Emit) !void { |
| | 85 | switch (self.debug_output) { |
| | 86 | .dwarf => |dbg_out| { |
| | 87 | try dbg_out.dbg_line.append(DW.LNS.set_epilogue_begin); |
| | 88 | try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column); |
| | 89 | }, |
| | 90 | .plan9 => {}, |
| | 91 | .none => {}, |
| | 92 | } |
| | 93 | } |
Koakuma <koachan@protonmail.com> 2022-03-29 20:54:23+07:00
src