authorgravatar for thatlemon@gmail.comLemonBoy <thatlemon@gmail.com> 2019-10-06 13:24:05+02:00
committergravatar for thatlemon@gmail.comLemonBoy <thatlemon@gmail.com> 2019-10-06 14:27:36+02:00
log93a49076f725e6e64f05b6be8422312c7dcda6d0
tree6caed116556ed4cd24a36a345fbad65aeac8790e
parenta7c9aa7ddb06fe14c4c67e317586177141c9e37a

Initial support for i386-windows-msvc target

8 files changed, 168 insertions(+), 103 deletions(-)

lib/std/os/test.zig+1
...@@ -116,6 +116,7 @@ test "AtomicFile" {...@@ -116,6 +116,7 @@ test "AtomicFile" {
116116
117test "thread local storage" {117test "thread local storage" {
118 if (builtin.single_threaded) return error.SkipZigTest;118 if (builtin.single_threaded) return error.SkipZigTest;
119 if (builtin.os == .windows) return error.SkipZigTest;
119 const thread1 = try Thread.spawn({}, testTls);120 const thread1 = try Thread.spawn({}, testTls);
120 const thread2 = try Thread.spawn({}, testTls);121 const thread2 = try Thread.spawn({}, testTls);
121 testTls({});122 testTls({});
lib/std/special/compiler_rt.zig+9
...@@ -248,8 +248,17 @@ comptime {...@@ -248,8 +248,17 @@ comptime {
248248
249 switch (builtin.arch) {249 switch (builtin.arch) {
250 .i386 => {250 .i386 => {
251 @export("_alldiv", @import("compiler_rt/aulldiv.zig")._alldiv, strong_linkage);
251 @export("_aulldiv", @import("compiler_rt/aulldiv.zig")._aulldiv, strong_linkage);252 @export("_aulldiv", @import("compiler_rt/aulldiv.zig")._aulldiv, strong_linkage);
253 @export("_allrem", @import("compiler_rt/aullrem.zig")._allrem, strong_linkage);
252 @export("_aullrem", @import("compiler_rt/aullrem.zig")._aullrem, strong_linkage);254 @export("_aullrem", @import("compiler_rt/aullrem.zig")._aullrem, strong_linkage);
255
256 @export("__divti3", @import("compiler_rt/divti3.zig").__divti3, linkage);
257 @export("__modti3", @import("compiler_rt/modti3.zig").__modti3, linkage);
258 @export("__multi3", @import("compiler_rt/multi3.zig").__multi3, linkage);
259 @export("__udivti3", @import("compiler_rt/udivti3.zig").__udivti3, linkage);
260 @export("__udivmodti4", @import("compiler_rt/udivmodti4.zig").__udivmodti4, linkage);
261 @export("__umodti3", @import("compiler_rt/umodti3.zig").__umodti3, linkage);
253 },262 },
254 .x86_64 => {263 .x86_64 => {
255 // The "ti" functions must use @Vector(2, u64) parameter types to adhere to the ABI264 // The "ti" functions must use @Vector(2, u64) parameter types to adhere to the ABI
lib/std/special/compiler_rt/aulldiv.zig+71-50
...@@ -1,55 +1,76 @@...@@ -1,55 +1,76 @@
1const builtin = @import("builtin");
2
3pub extern stdcallcc fn _alldiv(a: i64, b: i64) i64 {
4 @setRuntimeSafety(builtin.is_test);
5 const s_a = a >> (i64.bit_count - 1);
6 const s_b = b >> (i64.bit_count - 1);
7
8 const an = (a ^ s_a) -% s_a;
9 const bn = (b ^ s_b) -% s_b;
10
11 const r = @bitCast(u64, an) / @bitCast(u64, bn);
12 const s = s_a ^ s_b;
13 return (@bitCast(i64, r) ^ s) -% s;
14}
15
1pub nakedcc fn _aulldiv() void {16pub nakedcc fn _aulldiv() void {
2 @setRuntimeSafety(false);17 @setRuntimeSafety(false);
18
19 // The stack layout is:
20 // ESP+16 divisor (hi)
21 // ESP+12 divisor (low)
22 // ESP+8 dividend (hi)
23 // ESP+4 dividend (low)
24 // ESP return address
25
3 asm volatile (26 asm volatile (
4 \\.intel_syntax noprefix27 \\ push %%ebx
5 \\28 \\ push %%esi
6 \\ push ebx29 \\ mov 0x18(%%esp),%%eax
7 \\ push esi30 \\ or %%eax,%%eax
8 \\ mov eax,dword ptr [esp+18h]31 \\ jne 1f
9 \\ or eax,eax32 \\ mov 0x14(%%esp),%%ecx
10 \\ jne L133 \\ mov 0x10(%%esp),%%eax
11 \\ mov ecx,dword ptr [esp+14h]34 \\ xor %%edx,%%edx
12 \\ mov eax,dword ptr [esp+10h]35 \\ div %%ecx
13 \\ xor edx,edx36 \\ mov %%eax,%%ebx
14 \\ div ecx37 \\ mov 0xc(%%esp),%%eax
15 \\ mov ebx,eax38 \\ div %%ecx
16 \\ mov eax,dword ptr [esp+0Ch]39 \\ mov %%ebx,%%edx
17 \\ div ecx40 \\ jmp 5f
18 \\ mov edx,ebx41 \\ 1:
19 \\ jmp L242 \\ mov %%eax,%%ecx
20 \\ L1:43 \\ mov 0x14(%%esp),%%ebx
21 \\ mov ecx,eax44 \\ mov 0x10(%%esp),%%edx
22 \\ mov ebx,dword ptr [esp+14h]45 \\ mov 0xc(%%esp),%%eax
23 \\ mov edx,dword ptr [esp+10h]46 \\ 2:
24 \\ mov eax,dword ptr [esp+0Ch]47 \\ shr %%ecx
25 \\ L3:48 \\ rcr %%ebx
26 \\ shr ecx,149 \\ shr %%edx
27 \\ rcr ebx,150 \\ rcr %%eax
28 \\ shr edx,151 \\ or %%ecx,%%ecx
29 \\ rcr eax,152 \\ jne 2b
30 \\ or ecx,ecx53 \\ div %%ebx
31 \\ jne L354 \\ mov %%eax,%%esi
32 \\ div ebx55 \\ mull 0x18(%%esp)
33 \\ mov esi,eax56 \\ mov %%eax,%%ecx
34 \\ mul dword ptr [esp+18h]57 \\ mov 0x14(%%esp),%%eax
35 \\ mov ecx,eax58 \\ mul %%esi
36 \\ mov eax,dword ptr [esp+14h]59 \\ add %%ecx,%%edx
37 \\ mul esi60 \\ jb 3f
38 \\ add edx,ecx61 \\ cmp 0x10(%%esp),%%edx
39 \\ jb L462 \\ ja 3f
40 \\ cmp edx,dword ptr [esp+10h]63 \\ jb 4f
41 \\ ja L464 \\ cmp 0xc(%%esp),%%eax
42 \\ jb L565 \\ jbe 4f
43 \\ cmp eax,dword ptr [esp+0Ch]66 \\ 3:
44 \\ jbe L567 \\ dec %%esi
45 \\ L4:68 \\ 4:
46 \\ dec esi69 \\ xor %%edx,%%edx
47 \\ L5:70 \\ mov %%esi,%%eax
48 \\ xor edx,edx71 \\ 5:
49 \\ mov eax,esi72 \\ pop %%esi
50 \\ L2:73 \\ pop %%ebx
51 \\ pop esi74 \\ ret $0x10
52 \\ pop ebx
53 \\ ret 10h
54 );75 );
55}76}
lib/std/special/compiler_rt/aullrem.zig+72-51
...@@ -1,56 +1,77 @@...@@ -1,56 +1,77 @@
1const builtin = @import("builtin");
2
3pub extern stdcallcc fn _allrem(a: i64, b: i64) i64 {
4 @setRuntimeSafety(builtin.is_test);
5 const s_a = a >> (i64.bit_count - 1);
6 const s_b = b >> (i64.bit_count - 1);
7
8 const an = (a ^ s_a) -% s_a;
9 const bn = (b ^ s_b) -% s_b;
10
11 const r = @bitCast(u64, an) % @bitCast(u64, bn);
12 const s = s_a ^ s_b;
13 return (@bitCast(i64, r) ^ s) -% s;
14}
15
1pub nakedcc fn _aullrem() void {16pub nakedcc fn _aullrem() void {
2 @setRuntimeSafety(false);17 @setRuntimeSafety(false);
18
19 // The stack layout is:
20 // ESP+16 divisor (hi)
21 // ESP+12 divisor (low)
22 // ESP+8 dividend (hi)
23 // ESP+4 dividend (low)
24 // ESP return address
25
3 asm volatile (26 asm volatile (
4 \\.intel_syntax noprefix27 \\ push %%ebx
5 \\28 \\ mov 0x14(%%esp),%%eax
6 \\ push ebx29 \\ or %%eax,%%eax
7 \\ mov eax,dword ptr [esp+14h]30 \\ jne 1f
8 \\ or eax,eax31 \\ mov 0x10(%%esp),%%ecx
9 \\ jne L1a32 \\ mov 0xc(%%esp),%%eax
10 \\ mov ecx,dword ptr [esp+10h]33 \\ xor %%edx,%%edx
11 \\ mov eax,dword ptr [esp+0Ch]34 \\ div %%ecx
12 \\ xor edx,edx35 \\ mov 0x8(%%esp),%%eax
13 \\ div ecx36 \\ div %%ecx
14 \\ mov eax,dword ptr [esp+8]37 \\ mov %%edx,%%eax
15 \\ div ecx38 \\ xor %%edx,%%edx
16 \\ mov eax,edx39 \\ jmp 6f
17 \\ xor edx,edx40 \\ 1:
18 \\ jmp L2a41 \\ mov %%eax,%%ecx
19 \\ L1a:42 \\ mov 0x10(%%esp),%%ebx
20 \\ mov ecx,eax43 \\ mov 0xc(%%esp),%%edx
21 \\ mov ebx,dword ptr [esp+10h]44 \\ mov 0x8(%%esp),%%eax
22 \\ mov edx,dword ptr [esp+0Ch]45 \\ 2:
23 \\ mov eax,dword ptr [esp+8]46 \\ shr %%ecx
24 \\ L3a:47 \\ rcr %%ebx
25 \\ shr ecx,148 \\ shr %%edx
26 \\ rcr ebx,149 \\ rcr %%eax
27 \\ shr edx,150 \\ or %%ecx,%%ecx
28 \\ rcr eax,151 \\ jne 2b
29 \\ or ecx,ecx52 \\ div %%ebx
30 \\ jne L3a53 \\ mov %%eax,%%ecx
31 \\ div ebx54 \\ mull 0x14(%%esp)
32 \\ mov ecx,eax55 \\ xchg %%eax,%%ecx
33 \\ mul dword ptr [esp+14h]56 \\ mull 0x10(%%esp)
34 \\ xchg eax,ecx57 \\ add %%ecx,%%edx
35 \\ mul dword ptr [esp+10h]58 \\ jb 3f
36 \\ add edx,ecx59 \\ cmp 0xc(%%esp),%%edx
37 \\ jb L4a60 \\ ja 3f
38 \\ cmp edx,dword ptr [esp+0Ch]61 \\ jb 4f
39 \\ ja L4a62 \\ cmp 0x8(%%esp),%%eax
40 \\ jb L5a63 \\ jbe 4f
41 \\ cmp eax,dword ptr [esp+8]64 \\ 3:
42 \\ jbe L5a65 \\ sub 0x10(%%esp),%%eax
43 \\ L4a:66 \\ sbb 0x14(%%esp),%%edx
44 \\ sub eax,dword ptr [esp+10h]67 \\ 4:
45 \\ sbb edx,dword ptr [esp+14h]68 \\ sub 0x8(%%esp),%%eax
46 \\ L5a:69 \\ sbb 0xc(%%esp),%%edx
47 \\ sub eax,dword ptr [esp+8]70 \\ neg %%edx
48 \\ sbb edx,dword ptr [esp+0Ch]71 \\ neg %%eax
49 \\ neg edx72 \\ sbb $0x0,%%edx
50 \\ neg eax73 \\ 6:
51 \\ sbb edx,074 \\ pop %%ebx
52 \\ L2a:75 \\ ret $0x10
53 \\ pop ebx
54 \\ ret 10h
55 );76 );
56}77}
lib/std/special/compiler_rt/extendXfYf2_test.zig+5-1
...@@ -1,3 +1,4 @@...@@ -1,3 +1,4 @@
1const builtin = @import("builtin");
1const __extenddftf2 = @import("extendXfYf2.zig").__extenddftf2;2const __extenddftf2 = @import("extendXfYf2.zig").__extenddftf2;
2const __extendhfsf2 = @import("extendXfYf2.zig").__extendhfsf2;3const __extendhfsf2 = @import("extendXfYf2.zig").__extendhfsf2;
3const __extendsftf2 = @import("extendXfYf2.zig").__extendsftf2;4const __extendsftf2 = @import("extendXfYf2.zig").__extendsftf2;
...@@ -87,7 +88,10 @@ test "extenddftf2" {...@@ -87,7 +88,10 @@ test "extenddftf2" {
87test "extendhfsf2" {88test "extendhfsf2" {
88 test__extendhfsf2(0x7e00, 0x7fc00000); // qNaN89 test__extendhfsf2(0x7e00, 0x7fc00000); // qNaN
89 test__extendhfsf2(0x7f00, 0x7fe00000); // sNaN90 test__extendhfsf2(0x7f00, 0x7fe00000); // sNaN
90 test__extendhfsf2(0x7c01, 0x7f802000); // sNaN91 // On x86 the NaN becomes quiet because the return is pushed on the x87
92 // stack due to ABI requirements
93 if (builtin.arch != .i386 and builtin.os == .windows)
94 test__extendhfsf2(0x7c01, 0x7f802000); // sNaN
9195
92 test__extendhfsf2(0, 0); // 096 test__extendhfsf2(0, 0); // 0
93 test__extendhfsf2(0x8000, 0x80000000); // -097 test__extendhfsf2(0x8000, 0x80000000); // -0
src/analyze.cpp+4-1
...@@ -913,7 +913,10 @@ bool want_first_arg_sret(CodeGen *g, FnTypeId *fn_type_id) {...@@ -913,7 +913,10 @@ bool want_first_arg_sret(CodeGen *g, FnTypeId *fn_type_id) {
913 if (type_is_c_abi_int(g, fn_type_id->return_type)) {913 if (type_is_c_abi_int(g, fn_type_id->return_type)) {
914 return false;914 return false;
915 }915 }
916 if (g->zig_target->arch == ZigLLVM_x86_64) {916 if (g->zig_target->arch == ZigLLVM_x86) {
917 X64CABIClass abi_class = type_c_abi_x86_64_class(g, fn_type_id->return_type);
918 return abi_class == X64CABIClass_MEMORY;
919 } else if (g->zig_target->arch == ZigLLVM_x86_64) {
917 X64CABIClass abi_class = type_c_abi_x86_64_class(g, fn_type_id->return_type);920 X64CABIClass abi_class = type_c_abi_x86_64_class(g, fn_type_id->return_type);
918 return abi_class == X64CABIClass_MEMORY;921 return abi_class == X64CABIClass_MEMORY;
919 } else if (target_is_arm(g->zig_target) || target_is_riscv(g->zig_target)) {922 } else if (target_is_arm(g->zig_target) || target_is_riscv(g->zig_target)) {
src/codegen.cpp+3
...@@ -8727,6 +8727,9 @@ static void init(CodeGen *g) {...@@ -8727,6 +8727,9 @@ static void init(CodeGen *g) {
8727 // Be aware of https://github.com/ziglang/zig/issues/32758727 // Be aware of https://github.com/ziglang/zig/issues/3275
8728 target_specific_cpu_args = "";8728 target_specific_cpu_args = "";
8729 target_specific_features = riscv_default_features;8729 target_specific_features = riscv_default_features;
8730 } else if (g->zig_target->arch == ZigLLVM_x86) {
8731 target_specific_cpu_args = "pentium4";
8732 target_specific_features = "";
8730 } else {8733 } else {
8731 target_specific_cpu_args = "";8734 target_specific_cpu_args = "";
8732 target_specific_features = "";8735 target_specific_features = "";
test/stage1/behavior/misc.zig+3
...@@ -687,6 +687,9 @@ fn getNull() ?*i32 {...@@ -687,6 +687,9 @@ fn getNull() ?*i32 {
687}687}
688688
689test "thread local variable" {689test "thread local variable" {
690 if (builtin.os == .windows and builtin.arch == .i386)
691 return error.SkipZigTest;
692
690 const S = struct {693 const S = struct {
691 threadlocal var t: i32 = 1234;694 threadlocal var t: i32 = 1234;
692 };695 };