authorgravatar for koachan@protonmail.comKoakuma <koachan@protonmail.com> 2022-03-19 06:09:46+07:00
committergravatar for koachan@protonmail.comKoakuma <koachan@protonmail.com> 2022-03-19 06:09:46+07:00
log93b16de4b4dc25a9e2fe076a5a992a85afc51ade
treec6fdc278b5772cf4115250a5e910200948b80dfd
parent7579f14e0fff29e6486aef1f5c34d2fcd61cc108

stage2 sparcv9: Add placeholder files and generate() function

Add placeholder files for Codegen, Emit, and Mir stages, complete with a placeholder implementation of generate() to make it able to be plugged in to the frontend. At the moment the implementation just panics, it'll be worked on incrementally later. Also, this registers the sparcv9 backend files into CMakeLists.txt.

5 files changed, 54 insertions(+), 1 deletions(-)

CMakeLists.txt+5
......@@ -609,6 +609,11 @@ set(ZIG_STAGE2_SOURCES
609609 "${CMAKE_SOURCE_DIR}/src/arch/riscv64/Mir.zig"
610610 "${CMAKE_SOURCE_DIR}/src/arch/riscv64/bits.zig"
611611 "${CMAKE_SOURCE_DIR}/src/arch/riscv64/abi.zig"
612 "${CMAKE_SOURCE_DIR}/src/arch/sparcv9/CodeGen.zig"
613 "${CMAKE_SOURCE_DIR}/src/arch/sparcv9/Emit.zig"
614 "${CMAKE_SOURCE_DIR}/src/arch/sparcv9/Mir.zig"
615 "${CMAKE_SOURCE_DIR}/src/arch/sparcv9/bits.zig"
616 "${CMAKE_SOURCE_DIR}/src/arch/sparcv9/abi.zig"
612617 "${CMAKE_SOURCE_DIR}/src/arch/wasm/CodeGen.zig"
613618 "${CMAKE_SOURCE_DIR}/src/arch/wasm/Emit.zig"
614619 "${CMAKE_SOURCE_DIR}/src/arch/wasm/Mir.zig"
src/arch/sparcv9/CodeGen.zig created+31
......@@ -0,0 +1,31 @@
1//! SPARCv9 codegen.
2//! This lowers AIR into MIR.
3const std = @import("std");
4const builtin = @import("builtin");
5const link = @import("../../link.zig");
6const Module = @import("../../Module.zig");
7const Air = @import("../../Air.zig");
8const Mir = @import("Mir.zig");
9const Emit = @import("Emit.zig");
10const Liveness = @import("../../Liveness.zig");
11
12const GenerateSymbolError = @import("../../codegen.zig").GenerateSymbolError;
13const FnResult = @import("../../codegen.zig").FnResult;
14const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;
15
16const bits = @import("bits.zig");
17const abi = @import("abi.zig");
18
19const Self = @This();
20
21pub fn generate(
22 bin_file: *link.File,
23 src_loc: Module.SrcLoc,
24 module_fn: *Module.Fn,
25 air: Air,
26 liveness: Liveness,
27 code: *std.ArrayList(u8),
28 debug_output: DebugInfoOutput,
29) GenerateSymbolError!FnResult {
30 @panic("TODO implement SPARCv9 codegen");
31}
src/arch/sparcv9/Emit.zig created+6
......@@ -0,0 +1,6 @@
1//! This file contains the functionality for lowering SPARCv9 MIR into
2//! machine code
3
4const Emit = @This();
5const Mir = @import("Mir.zig");
6const bits = @import("bits.zig");
src/arch/sparcv9/Mir.zig created+11
......@@ -0,0 +1,11 @@
1//! Machine Intermediate Representation.
2//! This data is produced by SPARCv9 Codegen or SPARCv9 assembly parsing
3//! These instructions have a 1:1 correspondence with machine code instructions
4//! for the target. MIR can be lowered to source-annotated textual assembly code
5//! instructions, or it can be lowered to machine code.
6//! The main purpose of MIR is to postpone the assignment of offsets until Isel,
7//! so that, for example, the smaller encodings of jump instructions can be used.
8
9const Mir = @This();
10const bits = @import("bits.zig");
11const Register = bits.Register;
src/codegen.zig+1-1
......@@ -108,7 +108,7 @@ pub fn generateFunction(
108108 //.riscv32 => return Function(.riscv32).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
109109 .riscv64 => return @import("arch/riscv64/CodeGen.zig").generate(bin_file, src_loc, func, air, liveness, code, debug_output),
110110 //.sparc => return Function(.sparc).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
111 //.sparcv9 => return Function(.sparcv9).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
111 .sparcv9 => return @import("arch/sparcv9/CodeGen.zig").generate(bin_file, src_loc, func, air, liveness, code, debug_output),
112112 //.sparcel => return Function(.sparcel).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
113113 //.s390x => return Function(.s390x).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
114114 //.tce => return Function(.tce).generate(bin_file, src_loc, func, air, liveness, code, debug_output),