authorgravatar for minyihh@uci.eduMin-Yih Hsu <minyihh@uci.edu> 2021-03-30 13:34:20-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2021-04-02 12:04:49-07:00
log94383d14df77fa638dac14f4b2bda5a2e3f21c5c
treedbc87aa7bf7e0c2ec41d00044512cc52e6b809f2
parent0d53a2bff01750f9220bcc861d662b2c5f304506

llvm new-pm: Add missing pipeline option and Passes

- Enable MergeFunctionsPass in non-debug build. - Verify input and output IR when the assertion is turned on. - Add AlwaysInlinePass in debug build. - Add more comments.

1 files changed, 35 insertions(+), 7 deletions(-)

src/zig_llvm.cpp+35-7
......@@ -195,6 +195,8 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
195195 bool is_small, bool time_report, bool tsan, bool lto,
196196 const char *asm_filename, const char *bin_filename, const char *llvm_ir_filename)
197197{
198 // TODO: Maybe we should collect time trace rather than using timer
199 // to get a more hierarchical timeline view
198200 TimePassesIsEnabled = time_report;
199201
200202 raw_fd_ostream *dest_asm_ptr = nullptr;
......@@ -225,12 +227,15 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
225227
226228 Module &module = *unwrap(module_ref);
227229
230 // Pipeline configurations
228231 PipelineTuningOptions pipeline_opts;
229232 pipeline_opts.LoopUnrolling = !is_debug;
230233 pipeline_opts.SLPVectorization = !is_debug;
231234 pipeline_opts.LoopVectorization = !is_debug;
232235 pipeline_opts.LoopInterleaving = !is_debug;
236 pipeline_opts.MergeFunctions = !is_debug;
233237
238 // Instrumentations
234239 PassInstrumentationCallbacks instr_callbacks;
235240 StandardInstrumentations std_instrumentations(false);
236241 std_instrumentations.registerCallbacks(instr_callbacks);
......@@ -253,6 +258,7 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
253258 auto tlii = std::make_unique<TargetLibraryInfoImpl>(target_triple);
254259 function_am.registerPass([&] { return TargetLibraryAnalysis(*tlii); });
255260
261 // Initialize the AnalysisManagers
256262 pass_builder.registerModuleAnalyses(module_am);
257263 pass_builder.registerCGSCCAnalyses(cgscc_am);
258264 pass_builder.registerFunctionAnalyses(function_am);
......@@ -260,7 +266,29 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
260266 pass_builder.crossRegisterProxies(loop_am, function_am,
261267 cgscc_am, module_am);
262268
263 if (!is_debug) {
269 // IR verification
270 if (assertions_on) {
271 // Verify the input
272 pass_builder.registerPipelineStartEPCallback(
273 [](ModulePassManager &module_pm, OptimizationLevel OL) {
274 module_pm.addPass(VerifierPass());
275 });
276 // Verify the output
277 pass_builder.registerOptimizerLastEPCallback(
278 [](ModulePassManager &module_pm, OptimizationLevel OL) {
279 module_pm.addPass(VerifierPass());
280 });
281 }
282
283 // Passes for either debug or release build
284 if (is_debug) {
285 // NOTE: Always inliner will go away (in debug build)
286 // when the self-hosted compiler becomes mature.
287 pass_builder.registerPipelineStartEPCallback(
288 [](ModulePassManager &module_pm, OptimizationLevel OL) {
289 module_pm.addPass(AlwaysInlinerPass());
290 });
291 } else {
264292 pass_builder.registerPipelineStartEPCallback(
265293 [](ModulePassManager &module_pm, OptimizationLevel OL) {
266294 module_pm.addPass(
......@@ -268,19 +296,17 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
268296 });
269297 }
270298
299 // Thread sanitizer
271300 if (tsan) {
272301 pass_builder.registerOptimizerLastEPCallback(
273302 [](ModulePassManager &module_pm, OptimizationLevel level) {
274 // Will be enabled regardless of optimization level
275303 module_pm.addPass(ThreadSanitizerPass());
276304 });
277305 }
278306
279307 ModulePassManager module_pm;
280 // FIXME: NewPM can not detach speed level from size level
281 // we can't create something like "maximum speed level and optimal size level"
282 // which is what the original code wanted to achieve
283308 OptimizationLevel opt_level;
309 // Setting up the optimization level
284310 if (is_debug)
285311 opt_level = OptimizationLevel::O0;
286312 else if (is_small)
......@@ -288,6 +314,7 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
288314 else
289315 opt_level = OptimizationLevel::O3;
290316
317 // Initialize the PassManager
291318 if (lto) {
292319 module_pm = pass_builder.buildLTOPreLinkDefaultPipeline(opt_level);
293320 module_pm.addPass(CanonicalizeAliasesPass());
......@@ -314,10 +341,10 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
314341 }
315342 }
316343
317 // optimization
344 // Optimization phase
318345 module_pm.run(module, module_am);
319346
320 // code generation
347 // Code generation phase
321348 codegen_pm.run(module);
322349
323350 if (llvm_ir_filename) {
......@@ -325,6 +352,7 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
325352 return true;
326353 }
327354 }
355
328356 if (dest_bin && lto) {
329357 WriteBitcodeToFile(module, *dest_bin);
330358 }