Commit 96e5f476c3f7f44d0b299bc6043f3fd88769bd8b | zig

author	Andrew Kelley <andrew@ziglang.org> 2020-01-26 09:57:25-05:00
committer	GitHub <noreply@github.com> 2020-01-26 09:57:25-05:00
log	96e5f476c3f7f44d0b299bc6043f3fd88769bd8b
tree	5aadd86ef359eb847bf842f9594690737f0e67c4
parent	4e9b1f5479e3b7ce47d059e0e6f3d62cd4ee7254
parent	3839ea89785856bbed0624a6a18eb6e5acfb46c3
signature	Signed by PGP key 4AEE18F83AFDEB23

Merge pull request #4264 from ziglang/layneson-cpus_and_features

Add support for target details (CPUs and their supported features)

56 files changed, 15447 insertions(+), 509 deletions(-)

lib/std/buffer.zig+3-3

...	...	@@ -57,11 +57,11 @@ pub const Buffer = struct {
57	57
58	58	/// The caller owns the returned memory. The Buffer becomes null and
59	59	/// is safe to `deinit`.
60		pub fn toOwnedSlice(self: *Buffer) []u8 {
	60	pub fn toOwnedSlice(self: *Buffer) [:0]u8 {
61	61	const allocator = self.list.allocator;
62		const result = allocator.shrink(self.list.items, self.len());
	62	const result = self.list.toOwnedSlice();
63	63	self.* = initNull(allocator);
64		return result;
	64	return result[0 .. result.len - 1 :0];
65	65	}
66	66
67	67	pub fn allocPrint(allocator: *Allocator, comptime format: []const u8, args: var) !Buffer {

lib/std/build.zig+40-1

...	...	@@ -484,6 +484,7 @@ pub const Builder = struct {
484	484	.arch = builtin.arch,
485	485	.os = builtin.os,
486	486	.abi = builtin.abi,
	487	.cpu_features = builtin.cpu_features,
487	488	},
488	489	}).linuxTriple(self.allocator);
489	490
...	...	@@ -1375,6 +1376,7 @@ pub const LibExeObjStep = struct {
1375	1376	.arch = target_arch,
1376	1377	.os = target_os,
1377	1378	.abi = target_abi,
	1379	.cpu_features = target_arch.getBaselineCpuFeatures(),
1378	1380	},
1379	1381	});
1380	1382	}
...	...	@@ -1970,9 +1972,46 @@ pub const LibExeObjStep = struct {
1970	1972
1971	1973	switch (self.target) {
1972	1974	.Native => {},
1973		.Cross => {
	1975	.Cross => \|cross\| {
1974	1976	try zig_args.append("-target");
1975	1977	try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);
	1978
	1979	const all_features = self.target.getArch().allFeaturesList();
	1980	var populated_cpu_features = cross.cpu_features.cpu.features;
	1981	populated_cpu_features.populateDependencies(all_features);
	1982
	1983	if (populated_cpu_features.eql(cross.cpu_features.features)) {
	1984	// The CPU name alone is sufficient.
	1985	// If it is the baseline CPU, no command line args are required.
	1986	if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) {
	1987	try zig_args.append("-target-cpu");
	1988	try zig_args.append(cross.cpu_features.cpu.name);
	1989	}
	1990	} else {
	1991	try zig_args.append("-target-cpu");
	1992	try zig_args.append(cross.cpu_features.cpu.name);
	1993
	1994	try zig_args.append("-target-feature");
	1995	var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
	1996	for (all_features) \|feature, i_usize\| {
	1997	const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
	1998	const in_cpu_set = populated_cpu_features.isEnabled(i);
	1999	const in_actual_set = cross.cpu_features.features.isEnabled(i);
	2000	if (in_cpu_set and !in_actual_set) {
	2001	try feature_str_buffer.appendByte('-');
	2002	try feature_str_buffer.append(feature.name);
	2003	try feature_str_buffer.appendByte(',');
	2004	} else if (!in_cpu_set and in_actual_set) {
	2005	try feature_str_buffer.appendByte('+');
	2006	try feature_str_buffer.append(feature.name);
	2007	try feature_str_buffer.appendByte(',');
	2008	}
	2009	}
	2010	if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) {
	2011	feature_str_buffer.shrink(feature_str_buffer.len() - 1);
	2012	}
	2013	try zig_args.append(feature_str_buffer.toSliceConst());
	2014	}
1976	2015	},
1977	2016	}
1978	2017

lib/std/builtin.zig+9

...	...	@@ -1,5 +1,8 @@
1	1	pub usingnamespace @import("builtin");
2	2
	3	/// Deprecated: use `std.Target.Os`.
	4	pub const Target = std.Target;
	5
3	6	/// Deprecated: use `std.Target.Os`.
4	7	pub const Os = std.Target.Os;
5	8
...	...	@@ -15,6 +18,12 @@ pub const ObjectFormat = std.Target.ObjectFormat;
15	18	/// Deprecated: use `std.Target.SubSystem`.
16	19	pub const SubSystem = std.Target.SubSystem;
17	20
	21	/// Deprecated: use `std.Target.CpuFeatures`.
	22	pub const CpuFeatures = std.Target.CpuFeatures;
	23
	24	/// Deprecated: use `std.Target.Cpu`.
	25	pub const Cpu = std.Target.Cpu;
	26
18	27	/// `explicit_subsystem` is missing when the subsystem is automatically detected,
19	28	/// so Zig standard library has the subsystem detection logic here. This should generally be
20	29	/// used rather than `explicit_subsystem`.

lib/std/debug.zig+123-107

...	...	@@ -81,10 +81,20 @@ pub fn getSelfDebugInfo() !*DebugInfo {
81	81	}
82	82	}
83	83
84		fn wantTtyColor() bool {
	84	fn detectTTYConfig() TTY.Config {
85	85	var bytes: [128]u8 = undefined;
86	86	const allocator = &std.heap.FixedBufferAllocator.init(bytes[0..]).allocator;
87		return if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) \|_\| true else \|_\| stderr_file.isTty();
	87	if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) \|_\| {
	88	return .escape_codes;
	89	} else \|_\| {
	90	if (stderr_file.supportsAnsiEscapeCodes()) {
	91	return .escape_codes;
	92	} else if (builtin.os == .windows) {
	93	return .windows_api;
	94	} else {
	95	return .no_color;
	96	}
	97	}
88	98	}
89	99
90	100	/// Tries to print the current stack trace to stderr, unbuffered, and ignores any error returned.
...	...	@@ -99,7 +109,7 @@ pub fn dumpCurrentStackTrace(start_addr: ?usize) void {
99	109	stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
100	110	return;
101	111	};
102		writeCurrentStackTrace(stderr, debug_info, wantTtyColor(), start_addr) catch \|err\| {
	112	writeCurrentStackTrace(stderr, debug_info, detectTTYConfig(), start_addr) catch \|err\| {
103	113	stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
104	114	return;
105	115	};
...	...	@@ -118,16 +128,16 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void {
118	128	stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
119	129	return;
120	130	};
121		const tty_color = wantTtyColor();
122		printSourceAtAddress(debug_info, stderr, ip, tty_color) catch return;
	131	const tty_config = detectTTYConfig();
	132	printSourceAtAddress(debug_info, stderr, ip, tty_config) catch return;
123	133	const first_return_address = @intToPtr(const usize, bp + @sizeOf(usize)).;
124		printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_color) catch return;
	134	printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_config) catch return;
125	135	var it = StackIterator{
126	136	.first_addr = null,
127	137	.fp = bp,
128	138	};
129	139	while (it.next()) \|return_address\| {
130		printSourceAtAddress(debug_info, stderr, return_address - 1, tty_color) catch return;
	140	printSourceAtAddress(debug_info, stderr, return_address - 1, tty_config) catch return;
131	141	}
132	142	}
133	143
...	...	@@ -191,7 +201,7 @@ pub fn dumpStackTrace(stack_trace: builtin.StackTrace) void {
191	201	stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
192	202	return;
193	203	};
194		writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, wantTtyColor()) catch \|err\| {
	204	writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, detectTTYConfig()) catch \|err\| {
195	205	stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
196	206	return;
197	207	};
...	...	@@ -264,7 +274,7 @@ pub fn writeStackTrace(
264	274	out_stream: var,
265	275	allocator: *mem.Allocator,
266	276	debug_info: *DebugInfo,
267		tty_color: bool,
	277	tty_config: TTY.Config,
268	278	) !void {
269	279	if (builtin.strip_debug_info) return error.MissingDebugInfo;
270	280	var frame_index: usize = 0;
...	...	@@ -275,7 +285,7 @@ pub fn writeStackTrace(
275	285	frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len;
276	286	}) {
277	287	const return_address = stack_trace.instruction_addresses[frame_index];
278		try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);
	288	try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
279	289	}
280	290	}
281	291
...	...	@@ -319,20 +329,25 @@ pub const StackIterator = struct {
319	329	}
320	330	};
321	331
322		pub fn writeCurrentStackTrace(out_stream: var, debug_info: *DebugInfo, tty_color: bool, start_addr: ?usize) !void {
	332	pub fn writeCurrentStackTrace(
	333	out_stream: var,
	334	debug_info: *DebugInfo,
	335	tty_config: TTY.Config,
	336	start_addr: ?usize,
	337	) !void {
323	338	if (builtin.os == .windows) {
324		return writeCurrentStackTraceWindows(out_stream, debug_info, tty_color, start_addr);
	339	return writeCurrentStackTraceWindows(out_stream, debug_info, tty_config, start_addr);
325	340	}
326	341	var it = StackIterator.init(start_addr);
327	342	while (it.next()) \|return_address\| {
328		try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);
	343	try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
329	344	}
330	345	}
331	346
332	347	pub fn writeCurrentStackTraceWindows(
333	348	out_stream: var,
334	349	debug_info: *DebugInfo,
335		tty_color: bool,
	350	tty_config: TTY.Config,
336	351	start_addr: ?usize,
337	352	) !void {
338	353	var addr_buf: [1024]usize = undefined;
...	...	@@ -345,23 +360,28 @@ pub fn writeCurrentStackTraceWindows(
345	360	return;
346	361	} else 0;
347	362	for (addrs[start_i..]) \|addr\| {
348		try printSourceAtAddress(debug_info, out_stream, addr, tty_color);
	363	try printSourceAtAddress(debug_info, out_stream, addr, tty_config);
349	364	}
350	365	}
351	366
352	367	/// TODO once https://github.com/ziglang/zig/issues/3157 is fully implemented,
353	368	/// make this `noasync fn` and remove the individual noasync calls.
354		pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
	369	pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
355	370	if (builtin.os == .windows) {
356		return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_color);
	371	return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_config);
357	372	}
358	373	if (comptime std.Target.current.isDarwin()) {
359		return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_color);
	374	return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_config);
360	375	}
361		return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_color);
	376	return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_config);
362	377	}
363	378
364		fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_address: usize, tty_color: bool) !void {
	379	fn printSourceAtAddressWindows(
	380	di: *DebugInfo,
	381	out_stream: var,
	382	relocated_address: usize,
	383	tty_config: TTY.Config,
	384	) !void {
365	385	const allocator = getDebugInfoAllocator();
366	386	const base_address = process.getBaseAddress();
367	387	const relative_address = relocated_address - base_address;
...	...	@@ -379,7 +399,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
379	399	}
380	400	} else {
381	401	// we have no information to add to the address
382		return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_color, printLineFromFileAnyOs);
	402	return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_config, printLineFromFileAnyOs);
383	403	};
384	404
385	405	const mod = &di.modules[mod_index];
...	...	@@ -507,84 +527,80 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
507	527	relocated_address,
508	528	symbol_name,
509	529	obj_basename,
510		tty_color,
	530	tty_config,
511	531	printLineFromFileAnyOs,
512	532	);
513	533	}
514	534
515		const TtyColor = enum {
516		Red,
517		Green,
518		Cyan,
519		White,
520		Dim,
521		Bold,
522		Reset,
523		};
524
525		/// TODO this is a special case hack right now. clean it up and maybe make it part of std.fmt
526		fn setTtyColor(tty_color: TtyColor) void {
527		if (stderr_file.supportsAnsiEscapeCodes()) {
528		switch (tty_color) {
529		TtyColor.Red => {
530		stderr_file.write(RED) catch return;
531		},
532		TtyColor.Green => {
533		stderr_file.write(GREEN) catch return;
534		},
535		TtyColor.Cyan => {
536		stderr_file.write(CYAN) catch return;
537		},
538		TtyColor.White, TtyColor.Bold => {
539		stderr_file.write(WHITE) catch return;
540		},
541		TtyColor.Dim => {
542		stderr_file.write(DIM) catch return;
543		},
544		TtyColor.Reset => {
545		stderr_file.write(RESET) catch return;
546		},
547		}
548
549		return;
550		}
	535	pub const TTY = struct {
	536	pub const Color = enum {
	537	Red,
	538	Green,
	539	Cyan,
	540	White,
	541	Dim,
	542	Bold,
	543	Reset,
	544	};
551	545
552		if (builtin.os == .windows) {
553		const S = struct {
554		var attrs: windows.WORD = undefined;
555		var init_attrs = false;
556		};
557		if (!S.init_attrs) {
558		S.init_attrs = true;
559		var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
560		// TODO handle error
561		_ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
562		S.attrs = info.wAttributes;
563		}
	546	pub const Config = enum {
	547	no_color,
	548	escape_codes,
	549	// TODO give this a payload of file handle
	550	windows_api,
	551
	552	fn setColor(conf: Config, out_stream: var, color: Color) void {
	553	switch (conf) {
	554	.no_color => return,
	555	.escape_codes => switch (color) {
	556	.Red => out_stream.write(RED) catch return,
	557	.Green => out_stream.write(GREEN) catch return,
	558	.Cyan => out_stream.write(CYAN) catch return,
	559	.White, .Bold => out_stream.write(WHITE) catch return,
	560	.Dim => out_stream.write(DIM) catch return,
	561	.Reset => out_stream.write(RESET) catch return,
	562	},
	563	.windows_api => if (builtin.os == .windows) {
	564	const S = struct {
	565	var attrs: windows.WORD = undefined;
	566	var init_attrs = false;
	567	};
	568	if (!S.init_attrs) {
	569	S.init_attrs = true;
	570	var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
	571	// TODO handle error
	572	_ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
	573	S.attrs = info.wAttributes;
	574	}
564	575
565		// TODO handle errors
566		switch (tty_color) {
567		TtyColor.Red => {
568		_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED \| windows.FOREGROUND_INTENSITY) catch {};
569		},
570		TtyColor.Green => {
571		_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN \| windows.FOREGROUND_INTENSITY) catch {};
572		},
573		TtyColor.Cyan => {
574		_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN \| windows.FOREGROUND_BLUE \| windows.FOREGROUND_INTENSITY) catch {};
575		},
576		TtyColor.White, TtyColor.Bold => {
577		_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED \| windows.FOREGROUND_GREEN \| windows.FOREGROUND_BLUE \| windows.FOREGROUND_INTENSITY) catch {};
578		},
579		TtyColor.Dim => {
580		_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
581		},
582		TtyColor.Reset => {
583		_ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
584		},
	576	// TODO handle errors
	577	switch (color) {
	578	.Red => {
	579	_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED \| windows.FOREGROUND_INTENSITY) catch {};
	580	},
	581	.Green => {
	582	_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN \| windows.FOREGROUND_INTENSITY) catch {};
	583	},
	584	.Cyan => {
	585	_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN \| windows.FOREGROUND_BLUE \| windows.FOREGROUND_INTENSITY) catch {};
	586	},
	587	.White, .Bold => {
	588	_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED \| windows.FOREGROUND_GREEN \| windows.FOREGROUND_BLUE \| windows.FOREGROUND_INTENSITY) catch {};
	589	},
	590	.Dim => {
	591	_ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
	592	},
	593	.Reset => {
	594	_ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
	595	},
	596	}
	597	} else {
	598	unreachable;
	599	},
	600	}
585	601	}
586		}
587		}
	602	};
	603	};
588	604
589	605	fn populateModule(di: DebugInfo, mod: Module) !void {
590	606	if (mod.populated)
...	...	@@ -650,12 +666,12 @@ fn machoSearchSymbols(symbols: []const MachoSymbol, address: usize) ?*const Mach
650	666	return null;
651	667	}
652	668
653		fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
	669	fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
654	670	const base_addr = process.getBaseAddress();
655	671	const adjusted_addr = 0x100000000 + (address - base_addr);
656	672
657	673	const symbol = machoSearchSymbols(di.symbols, adjusted_addr) orelse {
658		return printLineInfo(out_stream, null, address, "???", "???", tty_color, printLineFromFileAnyOs);
	674	return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFileAnyOs);
659	675	};
660	676
661	677	const symbol_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + symbol.nlist.n_strx));
...	...	@@ -676,13 +692,13 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt
676	692	address,
677	693	symbol_name,
678	694	compile_unit_name,
679		tty_color,
	695	tty_config,
680	696	printLineFromFileAnyOs,
681	697	);
682	698	}
683	699
684		pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
685		return debug_info.printSourceAtAddress(out_stream, address, tty_color, printLineFromFileAnyOs);
	700	pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
	701	return debug_info.printSourceAtAddress(out_stream, address, tty_config, printLineFromFileAnyOs);
686	702	}
687	703
688	704	fn printLineInfo(
...	...	@@ -691,10 +707,10 @@ fn printLineInfo(
691	707	address: usize,
692	708	symbol_name: []const u8,
693	709	compile_unit_name: []const u8,
694		tty_color: bool,
	710	tty_config: TTY.Config,
695	711	comptime printLineFromFile: var,
696	712	) !void {
697		if (tty_color) setTtyColor(.White);
	713	tty_config.setColor(out_stream, .White);
698	714
699	715	if (line_info) \|*li\| {
700	716	try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
...	...	@@ -702,11 +718,11 @@ fn printLineInfo(
702	718	try out_stream.print("???:?:?", .{});
703	719	}
704	720
705		if (tty_color) setTtyColor(.Reset);
	721	tty_config.setColor(out_stream, .Reset);
706	722	try out_stream.write(": ");
707		if (tty_color) setTtyColor(.Dim);
	723	tty_config.setColor(out_stream, .Dim);
708	724	try out_stream.print("0x{x} in {} ({})", .{ address, symbol_name, compile_unit_name });
709		if (tty_color) setTtyColor(.Reset);
	725	tty_config.setColor(out_stream, .Reset);
710	726	try out_stream.write("\n");
711	727
712	728	// Show the matching source code line if possible
...	...	@@ -717,9 +733,9 @@ fn printLineInfo(
717	733	const space_needed = @intCast(usize, li.column - 1);
718	734
719	735	try out_stream.writeByteNTimes(' ', space_needed);
720		if (tty_color) setTtyColor(.Green);
	736	tty_config.setColor(out_stream, .Green);
721	737	try out_stream.write("^");
722		if (tty_color) setTtyColor(.Reset);
	738	tty_config.setColor(out_stream, .Reset);
723	739	}
724	740	try out_stream.write("\n");
725	741	} else \|err\| switch (err) {
...	...	@@ -1167,11 +1183,11 @@ pub const DwarfInfo = struct {
1167	1183	self: *DwarfInfo,
1168	1184	out_stream: var,
1169	1185	address: usize,
1170		tty_color: bool,
	1186	tty_config: TTY.Config,
1171	1187	comptime printLineFromFile: var,
1172	1188	) !void {
1173	1189	const compile_unit = self.findCompileUnit(address) catch {
1174		return printLineInfo(out_stream, null, address, "???", "???", tty_color, printLineFromFile);
	1190	return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFile);
1175	1191	};
1176	1192
1177	1193	const compile_unit_name = try compile_unit.die.getAttrString(self, DW.AT_name);
...	...	@@ -1188,7 +1204,7 @@ pub const DwarfInfo = struct {
1188	1204	address,
1189	1205	symbol_name,
1190	1206	compile_unit_name,
1191		tty_color,
	1207	tty_config,
1192	1208	printLineFromFile,
1193	1209	);
1194	1210	}

lib/std/fmt.zig+5

...	...	@@ -1135,6 +1135,11 @@ fn countSize(size: *usize, bytes: []const u8) (error{}!void) {
1135	1135	size.* += bytes.len;
1136	1136	}
1137	1137
	1138	pub fn allocPrint0(allocator: *mem.Allocator, comptime fmt: []const u8, args: var) AllocPrintError![:0]u8 {
	1139	const result = try allocPrint(allocator, fmt ++ "\x00", args);
	1140	return result[0 .. result.len - 1 :0];
	1141	}
	1142
1138	1143	test "bufPrintInt" {
1139	1144	var buffer: [100]u8 = undefined;
1140	1145	const buf = buffer[0..];

lib/std/fmt/parse_float.zig+4

...	...	@@ -382,6 +382,10 @@ pub fn parseFloat(comptime T: type, s: []const u8) !T {
382	382	}
383	383
384	384	test "fmt.parseFloat" {
	385	if (std.Target.current.isWindows()) {
	386	// TODO https://github.com/ziglang/zig/issues/508
	387	return error.SkipZigTest;
	388	}
385	389	const testing = std.testing;
386	390	const expect = testing.expect;
387	391	const expectEqual = testing.expectEqual;

lib/std/io/test.zig+4

...	...	@@ -547,6 +547,10 @@ fn testSerializerDeserializer(comptime endian: builtin.Endian, comptime packing:
547	547	}
548	548
549	549	test "Serializer/Deserializer generic" {
	550	if (std.Target.current.isWindows()) {
	551	// TODO https://github.com/ziglang/zig/issues/508
	552	return error.SkipZigTest;
	553	}
550	554	try testSerializerDeserializer(builtin.Endian.Big, .Byte);
551	555	try testSerializerDeserializer(builtin.Endian.Little, .Byte);
552	556	try testSerializerDeserializer(builtin.Endian.Big, .Bit);

lib/std/math/fabs.zig+4

...	...	@@ -95,6 +95,10 @@ test "math.fabs64.special" {
95	95	}
96	96
97	97	test "math.fabs128.special" {
	98	if (std.Target.current.isWindows()) {
	99	// TODO https://github.com/ziglang/zig/issues/508
	100	return error.SkipZigTest;
	101	}
98	102	expect(math.isPositiveInf(fabs(math.inf(f128))));
99	103	expect(math.isPositiveInf(fabs(-math.inf(f128))));
100	104	expect(math.isNan(fabs(math.nan(f128))));

lib/std/math/isinf.zig+12

...	...	@@ -74,6 +74,10 @@ pub fn isNegativeInf(x: var) bool {
74	74	}
75	75
76	76	test "math.isInf" {
	77	if (std.Target.current.isWindows()) {
	78	// TODO https://github.com/ziglang/zig/issues/508
	79	return error.SkipZigTest;
	80	}
77	81	expect(!isInf(@as(f16, 0.0)));
78	82	expect(!isInf(@as(f16, -0.0)));
79	83	expect(!isInf(@as(f32, 0.0)));
...	...	@@ -93,6 +97,10 @@ test "math.isInf" {
93	97	}
94	98
95	99	test "math.isPositiveInf" {
	100	if (std.Target.current.isWindows()) {
	101	// TODO https://github.com/ziglang/zig/issues/508
	102	return error.SkipZigTest;
	103	}
96	104	expect(!isPositiveInf(@as(f16, 0.0)));
97	105	expect(!isPositiveInf(@as(f16, -0.0)));
98	106	expect(!isPositiveInf(@as(f32, 0.0)));
...	...	@@ -112,6 +120,10 @@ test "math.isPositiveInf" {
112	120	}
113	121
114	122	test "math.isNegativeInf" {
	123	if (std.Target.current.isWindows()) {
	124	// TODO https://github.com/ziglang/zig/issues/508
	125	return error.SkipZigTest;
	126	}
115	127	expect(!isNegativeInf(@as(f16, 0.0)));
116	128	expect(!isNegativeInf(@as(f16, -0.0)));
117	129	expect(!isNegativeInf(@as(f32, 0.0)));

lib/std/math/isnan.zig+4

...	...	@@ -16,6 +16,10 @@ pub fn isSignalNan(x: var) bool {
16	16	}
17	17
18	18	test "math.isNan" {
	19	if (std.Target.current.isWindows()) {
	20	// TODO https://github.com/ziglang/zig/issues/508
	21	return error.SkipZigTest;
	22	}
19	23	expect(isNan(math.nan(f16)));
20	24	expect(isNan(math.nan(f32)));
21	25	expect(isNan(math.nan(f64)));

lib/std/meta.zig+18

...	...	@@ -556,3 +556,21 @@ pub fn refAllDecls(comptime T: type) void {
556	556	if (!builtin.is_test) return;
557	557	_ = declarations(T);
558	558	}
	559
	560	/// Returns a slice of pointers to public declarations of a namespace.
	561	pub fn declList(comptime Namespace: type, comptime Decl: type) []const *const Decl {
	562	const S = struct {
	563	fn declNameLessThan(lhs: const Decl, rhs: const Decl) bool {
	564	return mem.lessThan(u8, lhs.name, rhs.name);
	565	}
	566	};
	567	comptime {
	568	const decls = declarations(Namespace);
	569	var array: [decls.len]*const Decl = undefined;
	570	for (decls) \|decl, i\| {
	571	array[i] = &@field(Namespace, decl.name);
	572	}
	573	std.sort.sort(*const Decl, &array, S.declNameLessThan);
	574	return &array;
	575	}
	576	}

lib/std/os/linux/tls.zig+1-1

...	...	@@ -211,7 +211,7 @@ pub fn initTLS() ?*elf.Phdr {
211	211
212	212	if (tls_phdr) \|phdr\| {
213	213	// If the cpu is arm-based, check if it supports the TLS register
214		if (builtin.arch == builtin.Arch.arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
	214	if (builtin.arch == .arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
215	215	// If the CPU does not support TLS via a coprocessor register,
216	216	// a kernel helper function can be used instead on certain linux kernels.
217	217	// See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c.

lib/std/special/compiler_rt/addXf3_test.zig+8

...	...	@@ -31,6 +31,10 @@ fn test__addtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
31	31	}
32	32
33	33	test "addtf3" {
	34	if (@import("std").Target.current.isWindows()) {
	35	// TODO https://github.com/ziglang/zig/issues/508
	36	return error.SkipZigTest;
	37	}
34	38	test__addtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
35	39
36	40	// NaN + any = NaN
...	...	@@ -71,6 +75,10 @@ fn test__subtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
71	75	}
72	76
73	77	test "subtf3" {
	78	if (@import("std").Target.current.isWindows()) {
	79	// TODO https://github.com/ziglang/zig/issues/508
	80	return error.SkipZigTest;
	81	}
74	82	// qNaN - any = qNaN
75	83	test__subtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
76	84

lib/std/special/compiler_rt/fixtfdi_test.zig+4

...	...	@@ -11,6 +11,10 @@ fn test__fixtfdi(a: f128, expected: i64) void {
11	11	}
12	12
13	13	test "fixtfdi" {
	14	if (@import("std").Target.current.isWindows()) {
	15	// TODO https://github.com/ziglang/zig/issues/508
	16	return error.SkipZigTest;
	17	}
14	18	//warn("\n", .{});
15	19	test__fixtfdi(-math.f128_max, math.minInt(i64));
16	20

lib/std/special/compiler_rt/fixtfsi_test.zig+4

...	...	@@ -11,6 +11,10 @@ fn test__fixtfsi(a: f128, expected: i32) void {
11	11	}
12	12
13	13	test "fixtfsi" {
	14	if (@import("std").Target.current.isWindows()) {
	15	// TODO https://github.com/ziglang/zig/issues/508
	16	return error.SkipZigTest;
	17	}
14	18	//warn("\n", .{});
15	19	test__fixtfsi(-math.f128_max, math.minInt(i32));
16	20

lib/std/special/compiler_rt/fixtfti_test.zig+4

...	...	@@ -11,6 +11,10 @@ fn test__fixtfti(a: f128, expected: i128) void {
11	11	}
12	12
13	13	test "fixtfti" {
	14	if (@import("std").Target.current.isWindows()) {
	15	// TODO https://github.com/ziglang/zig/issues/508
	16	return error.SkipZigTest;
	17	}
14	18	//warn("\n", .{});
15	19	test__fixtfti(-math.f128_max, math.minInt(i128));
16	20

lib/std/special/compiler_rt/fixunstfdi_test.zig+4

...	...	@@ -7,6 +7,10 @@ fn test__fixunstfdi(a: f128, expected: u64) void {
7	7	}
8	8
9	9	test "fixunstfdi" {
	10	if (@import("std").Target.current.isWindows()) {
	11	// TODO https://github.com/ziglang/zig/issues/508
	12	return error.SkipZigTest;
	13	}
10	14	test__fixunstfdi(0.0, 0);
11	15
12	16	test__fixunstfdi(0.5, 0);

lib/std/special/compiler_rt/fixunstfsi_test.zig+4

...	...	@@ -9,6 +9,10 @@ fn test__fixunstfsi(a: f128, expected: u32) void {
9	9	const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
10	10
11	11	test "fixunstfsi" {
	12	if (@import("std").Target.current.isWindows()) {
	13	// TODO https://github.com/ziglang/zig/issues/508
	14	return error.SkipZigTest;
	15	}
12	16	test__fixunstfsi(inf128, 0xffffffff);
13	17	test__fixunstfsi(0, 0x0);
14	18	test__fixunstfsi(0x1.23456789abcdefp+5, 0x24);

lib/std/special/compiler_rt/fixunstfti_test.zig+4

...	...	@@ -9,6 +9,10 @@ fn test__fixunstfti(a: f128, expected: u128) void {
9	9	const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
10	10
11	11	test "fixunstfti" {
	12	if (@import("std").Target.current.isWindows()) {
	13	// TODO https://github.com/ziglang/zig/issues/508
	14	return error.SkipZigTest;
	15	}
12	16	test__fixunstfti(inf128, 0xffffffffffffffffffffffffffffffff);
13	17
14	18	test__fixunstfti(0.0, 0);

lib/std/special/compiler_rt/floattitf_test.zig+4

...	...	@@ -7,6 +7,10 @@ fn test__floattitf(a: i128, expected: f128) void {
7	7	}
8	8
9	9	test "floattitf" {
	10	if (@import("std").Target.current.isWindows()) {
	11	// TODO https://github.com/ziglang/zig/issues/508
	12	return error.SkipZigTest;
	13	}
10	14	test__floattitf(0, 0.0);
11	15
12	16	test__floattitf(1, 1.0);

lib/std/special/compiler_rt/floatuntitf_test.zig+4

...	...	@@ -7,6 +7,10 @@ fn test__floatuntitf(a: u128, expected: f128) void {
7	7	}
8	8
9	9	test "floatuntitf" {
	10	if (@import("std").Target.current.isWindows()) {
	11	// TODO https://github.com/ziglang/zig/issues/508
	12	return error.SkipZigTest;
	13	}
10	14	test__floatuntitf(0, 0.0);
11	15
12	16	test__floatuntitf(1, 1.0);

lib/std/special/compiler_rt/mulXf3_test.zig+4

...	...	@@ -44,6 +44,10 @@ fn makeNaN128(rand: u64) f128 {
44	44	return float_result;
45	45	}
46	46	test "multf3" {
	47	if (@import("std").Target.current.isWindows()) {
	48	// TODO https://github.com/ziglang/zig/issues/508
	49	return error.SkipZigTest;
	50	}
47	51	// qNaN * any = qNaN
48	52	test__multf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
49	53

lib/std/special/compiler_rt/truncXfYf2_test.zig+8

...	...	@@ -151,6 +151,10 @@ fn test__trunctfsf2(a: f128, expected: u32) void {
151	151	}
152	152
153	153	test "trunctfsf2" {
	154	if (@import("std").Target.current.isWindows()) {
	155	// TODO https://github.com/ziglang/zig/issues/508
	156	return error.SkipZigTest;
	157	}
154	158	// qnan
155	159	test__trunctfsf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7fc00000);
156	160	// nan
...	...	@@ -186,6 +190,10 @@ fn test__trunctfdf2(a: f128, expected: u64) void {
186	190	}
187	191
188	192	test "trunctfdf2" {
	193	if (@import("std").Target.current.isWindows()) {
	194	// TODO https://github.com/ziglang/zig/issues/508
	195	return error.SkipZigTest;
	196	}
189	197	// qnan
190	198	test__trunctfdf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7ff8000000000000);
191	199	// nan

lib/std/target.zig+370-10

...	...	@@ -49,6 +49,22 @@ pub const Target = union(enum) {
49	49	other,
50	50	};
51	51
	52	pub const aarch64 = @import("target/aarch64.zig");
	53	pub const amdgpu = @import("target/amdgpu.zig");
	54	pub const arm = @import("target/arm.zig");
	55	pub const avr = @import("target/avr.zig");
	56	pub const bpf = @import("target/bpf.zig");
	57	pub const hexagon = @import("target/hexagon.zig");
	58	pub const mips = @import("target/mips.zig");
	59	pub const msp430 = @import("target/msp430.zig");
	60	pub const nvptx = @import("target/nvptx.zig");
	61	pub const powerpc = @import("target/powerpc.zig");
	62	pub const riscv = @import("target/riscv.zig");
	63	pub const sparc = @import("target/sparc.zig");
	64	pub const systemz = @import("target/systemz.zig");
	65	pub const wasm = @import("target/wasm.zig");
	66	pub const x86 = @import("target/x86.zig");
	67
52	68	pub const Arch = union(enum) {
53	69	arm: Arm32,
54	70	armeb: Arm32,
...	...	@@ -107,12 +123,12 @@ pub const Target = union(enum) {
107	123	v8_3a,
108	124	v8_2a,
109	125	v8_1a,
110		v8,
	126	v8a,
111	127	v8r,
112	128	v8m_baseline,
113	129	v8m_mainline,
114	130	v8_1m_mainline,
115		v7,
	131	v7a,
116	132	v7em,
117	133	v7m,
118	134	v7s,
...	...	@@ -128,8 +144,8 @@ pub const Target = union(enum) {
128	144
129	145	pub fn version(version: Arm32) comptime_int {
130	146	return switch (version) {
131		.v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
132		.v7, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
	147	.v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8a, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
	148	.v7a, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
133	149	.v6, .v6m, .v6k, .v6t2 => 6,
134	150	.v5, .v5te => 5,
135	151	.v4t => 4,
...	...	@@ -142,10 +158,7 @@ pub const Target = union(enum) {
142	158	v8_3a,
143	159	v8_2a,
144	160	v8_1a,
145		v8,
146		v8r,
147		v8m_baseline,
148		v8m_mainline,
	161	v8a,
149	162	};
150	163	pub const Kalimba = enum {
151	164	v5,
...	...	@@ -156,6 +169,54 @@ pub const Target = union(enum) {
156	169	r6,
157	170	};
158	171
	172	pub fn subArchName(arch: Arch) ?[]const u8 {
	173	return switch (arch) {
	174	.arm, .armeb, .thumb, .thumbeb => \|arm32\| @tagName(arm32),
	175	.aarch64, .aarch64_be, .aarch64_32 => \|arm64\| @tagName(arm64),
	176	.kalimba => \|kalimba\| @tagName(kalimba),
	177	else => return null,
	178	};
	179	}
	180
	181	pub fn subArchFeature(arch: Arch) ?Cpu.Feature.Set.Index {
	182	return switch (arch) {
	183	.arm, .armeb, .thumb, .thumbeb => \|arm32\| switch (arm32) {
	184	.v8_5a => @enumToInt(arm.Feature.armv8_5_a),
	185	.v8_4a => @enumToInt(arm.Feature.armv8_4_a),
	186	.v8_3a => @enumToInt(arm.Feature.armv8_3_a),
	187	.v8_2a => @enumToInt(arm.Feature.armv8_2_a),
	188	.v8_1a => @enumToInt(arm.Feature.armv8_1_a),
	189	.v8a => @enumToInt(arm.Feature.armv8_a),
	190	.v8r => @enumToInt(arm.Feature.armv8_r),
	191	.v8m_baseline => @enumToInt(arm.Feature.armv8_m_base),
	192	.v8m_mainline => @enumToInt(arm.Feature.armv8_m_main),
	193	.v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main),
	194	.v7a => @enumToInt(arm.Feature.armv7_a),
	195	.v7em => @enumToInt(arm.Feature.armv7e_m),
	196	.v7m => @enumToInt(arm.Feature.armv7_m),
	197	.v7s => @enumToInt(arm.Feature.armv7s),
	198	.v7k => @enumToInt(arm.Feature.armv7k),
	199	.v7ve => @enumToInt(arm.Feature.armv7ve),
	200	.v6 => @enumToInt(arm.Feature.armv6),
	201	.v6m => @enumToInt(arm.Feature.armv6_m),
	202	.v6k => @enumToInt(arm.Feature.armv6k),
	203	.v6t2 => @enumToInt(arm.Feature.armv6t2),
	204	.v5 => @enumToInt(arm.Feature.armv5t),
	205	.v5te => @enumToInt(arm.Feature.armv5te),
	206	.v4t => @enumToInt(arm.Feature.armv4t),
	207	},
	208	.aarch64, .aarch64_be, .aarch64_32 => \|arm64\| switch (arm64) {
	209	.v8_5a => @enumToInt(aarch64.Feature.v8_5a),
	210	.v8_4a => @enumToInt(aarch64.Feature.v8_4a),
	211	.v8_3a => @enumToInt(aarch64.Feature.v8_3a),
	212	.v8_2a => @enumToInt(aarch64.Feature.v8_2a),
	213	.v8_1a => @enumToInt(aarch64.Feature.v8_1a),
	214	.v8a => @enumToInt(aarch64.Feature.v8a),
	215	},
	216	else => return null,
	217	};
	218	}
	219
159	220	pub fn isARM(arch: Arch) bool {
160	221	return switch (arch) {
161	222	.arm, .armeb => true,
...	...	@@ -184,6 +245,53 @@ pub const Target = union(enum) {
184	245	};
185	246	}
186	247
	248	pub fn parseCpu(arch: Arch, cpu_name: []const u8) !*const Cpu {
	249	for (arch.allCpus()) \|cpu\| {
	250	if (mem.eql(u8, cpu_name, cpu.name)) {
	251	return cpu;
	252	}
	253	}
	254	return error.UnknownCpu;
	255	}
	256
	257	/// Comma-separated list of features, with + or - in front of each feature. This
	258	/// form represents a deviation from baseline CPU, which is provided as a parameter.
	259	/// Extra commas are ignored.
	260	pub fn parseCpuFeatureSet(arch: Arch, cpu: *const Cpu, features_text: []const u8) !Cpu.Feature.Set {
	261	const all_features = arch.allFeaturesList();
	262	var set = cpu.features;
	263	var it = mem.tokenize(features_text, ",");
	264	while (it.next()) \|item_text\| {
	265	var feature_name: []const u8 = undefined;
	266	var op: enum {
	267	add,
	268	sub,
	269	} = undefined;
	270	if (mem.startsWith(u8, item_text, "+")) {
	271	op = .add;
	272	feature_name = item_text[1..];
	273	} else if (mem.startsWith(u8, item_text, "-")) {
	274	op = .sub;
	275	feature_name = item_text[1..];
	276	} else {
	277	return error.InvalidCpuFeatures;
	278	}
	279	for (all_features) \|feature, index_usize\| {
	280	const index = @intCast(Cpu.Feature.Set.Index, index_usize);
	281	if (mem.eql(u8, feature_name, feature.name)) {
	282	switch (op) {
	283	.add => set.addFeature(index),
	284	.sub => set.removeFeature(index),
	285	}
	286	break;
	287	}
	288	} else {
	289	return error.UnknownCpuFeature;
	290	}
	291	}
	292	return set;
	293	}
	294
187	295	pub fn toElfMachine(arch: Arch) std.elf.EM {
188	296	return switch (arch) {
189	297	.avr => ._AVR,
...	...	@@ -296,6 +404,109 @@ pub const Target = union(enum) {
296	404	=> .Big,
297	405	};
298	406	}
	407
	408	/// Returns a name that matches the lib/std/target/* directory name.
	409	pub fn genericName(arch: Arch) []const u8 {
	410	return switch (arch) {
	411	.arm, .armeb, .thumb, .thumbeb => "arm",
	412	.aarch64, .aarch64_be, .aarch64_32 => "aarch64",
	413	.avr => "avr",
	414	.bpfel, .bpfeb => "bpf",
	415	.hexagon => "hexagon",
	416	.mips, .mipsel, .mips64, .mips64el => "mips",
	417	.msp430 => "msp430",
	418	.powerpc, .powerpc64, .powerpc64le => "powerpc",
	419	.amdgcn => "amdgpu",
	420	.riscv32, .riscv64 => "riscv",
	421	.sparc, .sparcv9, .sparcel => "sparc",
	422	.s390x => "systemz",
	423	.i386, .x86_64 => "x86",
	424	.nvptx, .nvptx64 => "nvptx",
	425	.wasm32, .wasm64 => "wasm",
	426	else => @tagName(arch),
	427	};
	428	}
	429
	430	/// All CPU features Zig is aware of, sorted lexicographically by name.
	431	pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
	432	return switch (arch) {
	433	.arm, .armeb, .thumb, .thumbeb => &arm.all_features,
	434	.aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
	435	.avr => &avr.all_features,
	436	.bpfel, .bpfeb => &bpf.all_features,
	437	.hexagon => &hexagon.all_features,
	438	.mips, .mipsel, .mips64, .mips64el => &mips.all_features,
	439	.msp430 => &msp430.all_features,
	440	.powerpc, .powerpc64, .powerpc64le => &powerpc.all_features,
	441	.amdgcn => &amdgpu.all_features,
	442	.riscv32, .riscv64 => &riscv.all_features,
	443	.sparc, .sparcv9, .sparcel => &sparc.all_features,
	444	.s390x => &systemz.all_features,
	445	.i386, .x86_64 => &x86.all_features,
	446	.nvptx, .nvptx64 => &nvptx.all_features,
	447	.wasm32, .wasm64 => &wasm.all_features,
	448
	449	else => &[0]Cpu.Feature{},
	450	};
	451	}
	452
	453	/// The "default" set of CPU features for cross-compiling. A conservative set
	454	/// of features that is expected to be supported on most available hardware.
	455	pub fn getBaselineCpuFeatures(arch: Arch) CpuFeatures {
	456	const S = struct {
	457	const generic_cpu = Cpu{
	458	.name = "generic",
	459	.llvm_name = null,
	460	.features = Cpu.Feature.Set.empty,
	461	};
	462	};
	463	const cpu = switch (arch) {
	464	.arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
	465	.aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
	466	.avr => &avr.cpu.avr1,
	467	.bpfel, .bpfeb => &bpf.cpu.generic,
	468	.hexagon => &hexagon.cpu.generic,
	469	.mips, .mipsel => &mips.cpu.mips32,
	470	.mips64, .mips64el => &mips.cpu.mips64,
	471	.msp430 => &msp430.cpu.generic,
	472	.powerpc, .powerpc64, .powerpc64le => &powerpc.cpu.generic,
	473	.amdgcn => &amdgpu.cpu.generic,
	474	.riscv32 => &riscv.cpu.baseline_rv32,
	475	.riscv64 => &riscv.cpu.baseline_rv64,
	476	.sparc, .sparcv9, .sparcel => &sparc.cpu.generic,
	477	.s390x => &systemz.cpu.generic,
	478	.i386 => &x86.cpu.pentium4,
	479	.x86_64 => &x86.cpu.x86_64,
	480	.nvptx, .nvptx64 => &nvptx.cpu.sm_20,
	481	.wasm32, .wasm64 => &wasm.cpu.generic,
	482
	483	else => &S.generic_cpu,
	484	};
	485	return CpuFeatures.initFromCpu(arch, cpu);
	486	}
	487
	488	/// All CPUs Zig is aware of, sorted lexicographically by name.
	489	pub fn allCpus(arch: Arch) []const *const Cpu {
	490	return switch (arch) {
	491	.arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
	492	.aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
	493	.avr => avr.all_cpus,
	494	.bpfel, .bpfeb => bpf.all_cpus,
	495	.hexagon => hexagon.all_cpus,
	496	.mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
	497	.msp430 => msp430.all_cpus,
	498	.powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
	499	.amdgcn => amdgpu.all_cpus,
	500	.riscv32, .riscv64 => riscv.all_cpus,
	501	.sparc, .sparcv9, .sparcel => sparc.all_cpus,
	502	.s390x => systemz.all_cpus,
	503	.i386, .x86_64 => x86.all_cpus,
	504	.nvptx, .nvptx64 => nvptx.all_cpus,
	505	.wasm32, .wasm64 => wasm.all_cpus,
	506
	507	else => &[0]*const Cpu{},
	508	};
	509	}
299	510	};
300	511
301	512	pub const Abi = enum {
...	...	@@ -323,6 +534,109 @@ pub const Target = union(enum) {
323	534	macabi,
324	535	};
325	536
	537	pub const Cpu = struct {
	538	name: []const u8,
	539	llvm_name: ?[:0]const u8,
	540	features: Feature.Set,
	541
	542	pub const Feature = struct {
	543	/// The bit index into `Set`. Has a default value of `undefined` because the canonical
	544	/// structures are populated via comptime logic.
	545	index: Set.Index = undefined,
	546
	547	/// Has a default value of `undefined` because the canonical
	548	/// structures are populated via comptime logic.
	549	name: []const u8 = undefined,
	550
	551	/// If this corresponds to an LLVM-recognized feature, this will be populated;
	552	/// otherwise null.
	553	llvm_name: ?[:0]const u8,
	554
	555	/// Human-friendly UTF-8 text.
	556	description: []const u8,
	557
	558	/// Sparse `Set` of features this depends on.
	559	dependencies: Set,
	560
	561	/// A bit set of all the features.
	562	pub const Set = struct {
	563	ints: [usize_count]usize,
	564
	565	pub const needed_bit_count = 174;
	566	pub const byte_count = (needed_bit_count + 7) / 8;
	567	pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
	568	pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize)));
	569	pub const ShiftInt = std.math.Log2Int(usize);
	570
	571	pub const empty = Set{ .ints = [1]usize{0} ** usize_count };
	572	pub fn empty_workaround() Set {
	573	return Set{ .ints = [1]usize{0} ** usize_count };
	574	}
	575
	576	pub fn isEnabled(set: Set, arch_feature_index: Index) bool {
	577	const usize_index = arch_feature_index / @bitSizeOf(usize);
	578	const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
	579	return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0;
	580	}
	581
	582	/// Adds the specified feature but not its dependencies.
	583	pub fn addFeature(set: *Set, arch_feature_index: Index) void {
	584	const usize_index = arch_feature_index / @bitSizeOf(usize);
	585	const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
	586	set.ints[usize_index] \|= @as(usize, 1) << bit_index;
	587	}
	588
	589	/// Removes the specified feature but not its dependents.
	590	pub fn removeFeature(set: *Set, arch_feature_index: Index) void {
	591	const usize_index = arch_feature_index / @bitSizeOf(usize);
	592	const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
	593	set.ints[usize_index] &= ~(@as(usize, 1) << bit_index);
	594	}
	595
	596	pub fn populateDependencies(set: *Set, all_features_list: []const Cpu.Feature) void {
	597	var old = set.ints;
	598	while (true) {
	599	for (all_features_list) \|feature, index_usize\| {
	600	const index = @intCast(Index, index_usize);
	601	if (set.isEnabled(index)) {
	602	set.ints = @as(@Vector(usize_count, usize), set.ints) \|
	603	@as(@Vector(usize_count, usize), feature.dependencies.ints);
	604	}
	605	}
	606	const nothing_changed = mem.eql(usize, &old, &set.ints);
	607	if (nothing_changed) return;
	608	old = set.ints;
	609	}
	610	}
	611
	612	pub fn asBytes(set: const Set) const [byte_count]u8 {
	613	return @ptrCast(*const [byte_count]u8, &set.ints);
	614	}
	615
	616	pub fn eql(set: Set, other: Set) bool {
	617	return mem.eql(usize, &set.ints, &other.ints);
	618	}
	619	};
	620
	621	pub fn feature_set_fns(comptime F: type) type {
	622	return struct {
	623	/// Populates only the feature bits specified.
	624	pub fn featureSet(features: []const F) Set {
	625	var x = Set.empty_workaround(); // TODO remove empty_workaround
	626	for (features) \|feature\| {
	627	x.addFeature(@enumToInt(feature));
	628	}
	629	return x;
	630	}
	631
	632	pub fn featureSetHas(set: Set, feature: F) bool {
	633	return set.isEnabled(@enumToInt(feature));
	634	}
	635	};
	636	}
	637	};
	638	};
	639
326	640	pub const ObjectFormat = enum {
327	641	unknown,
328	642	coff,
...	...	@@ -346,6 +660,28 @@ pub const Target = union(enum) {
346	660	arch: Arch,
347	661	os: Os,
348	662	abi: Abi,
	663	cpu_features: CpuFeatures,
	664	};
	665
	666	pub const CpuFeatures = struct {
	667	/// The CPU to target. It has a set of features
	668	/// which are overridden with the `features` field.
	669	cpu: *const Cpu,
	670
	671	/// Explicitly provide the entire CPU feature set.
	672	features: Cpu.Feature.Set,
	673
	674	pub fn initFromCpu(arch: Arch, cpu: *const Cpu) CpuFeatures {
	675	var features = cpu.features;
	676	if (arch.subArchFeature()) \|sub_arch_index\| {
	677	features.addFeature(sub_arch_index);
	678	}
	679	features.populateDependencies(arch.allFeaturesList());
	680	return CpuFeatures{
	681	.cpu = cpu,
	682	.features = features,
	683	};
	684	}
349	685	};
350	686
351	687	pub const current = Target{
...	...	@@ -353,11 +689,19 @@ pub const Target = union(enum) {
353	689	.arch = builtin.arch,
354	690	.os = builtin.os,
355	691	.abi = builtin.abi,
	692	.cpu_features = builtin.cpu_features,
356	693	},
357	694	};
358	695
359	696	pub const stack_align = 16;
360	697
	698	pub fn getCpuFeatures(self: Target) CpuFeatures {
	699	return switch (self) {
	700	.Native => builtin.cpu_features,
	701	.Cross => \|cross\| cross.cpu_features,
	702	};
	703	}
	704
361	705	pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 {
362	706	return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{
363	707	@tagName(self.getArch()),
...	...	@@ -423,14 +767,18 @@ pub const Target = union(enum) {
423	767	});
424	768	}
425	769
	770	/// TODO: Support CPU features here?
	771	/// https://github.com/ziglang/zig/issues/4261
426	772	pub fn parse(text: []const u8) !Target {
427	773	var it = mem.separate(text, "-");
428	774	const arch_name = it.next() orelse return error.MissingArchitecture;
429	775	const os_name = it.next() orelse return error.MissingOperatingSystem;
430	776	const abi_name = it.next();
	777	const arch = try parseArchSub(arch_name);
431	778
432	779	var cross = Cross{
433		.arch = try parseArchSub(arch_name),
	780	.arch = arch,
	781	.cpu_features = arch.getBaselineCpuFeatures(),
434	782	.os = try parseOs(os_name),
435	783	.abi = undefined,
436	784	};
...	...	@@ -496,7 +844,7 @@ pub const Target = union(enum) {
496	844	pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {
497	845	const info = @typeInfo(Arch);
498	846	inline for (info.Union.fields) \|field\| {
499		if (mem.eql(u8, text, field.name)) {
	847	if (mem.startsWith(u8, text, field.name)) {
500	848	if (field.field_type == void) {
501	849	return @as(Arch, @field(Arch, field.name));
502	850	} else {
...	...	@@ -816,3 +1164,15 @@ pub const Target = union(enum) {
816	1164	return .unavailable;
817	1165	}
818	1166	};
	1167
	1168	test "parseCpuFeatureSet" {
	1169	const arch: Target.Arch = .x86_64;
	1170	const baseline = arch.getBaselineCpuFeatures();
	1171	const set = try arch.parseCpuFeatureSet(baseline.cpu, "-sse,-avx,-cx8");
	1172	std.testing.expect(!Target.x86.featureSetHas(set, .sse));
	1173	std.testing.expect(!Target.x86.featureSetHas(set, .avx));
	1174	std.testing.expect(!Target.x86.featureSetHas(set, .cx8));
	1175	// These are expected because they are part of the baseline
	1176	std.testing.expect(Target.x86.featureSetHas(set, .cmov));
	1177	std.testing.expect(Target.x86.featureSetHas(set, .fxsr));
	1178	}

lib/std/target/aarch64.zig created+1450

...	...	@@ -0,0 +1,1450 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	a35,
	6	a53,
	7	a55,
	8	a57,
	9	a72,
	10	a73,
	11	a75,
	12	a76,
	13	aes,
	14	aggressive_fma,
	15	alternate_sextload_cvt_f32_pattern,
	16	altnzcv,
	17	am,
	18	arith_bcc_fusion,
	19	arith_cbz_fusion,
	20	balance_fp_ops,
	21	bti,
	22	call_saved_x10,
	23	call_saved_x11,
	24	call_saved_x12,
	25	call_saved_x13,
	26	call_saved_x14,
	27	call_saved_x15,
	28	call_saved_x18,
	29	call_saved_x8,
	30	call_saved_x9,
	31	ccdp,
	32	ccidx,
	33	ccpp,
	34	complxnum,
	35	crc,
	36	crypto,
	37	custom_cheap_as_move,
	38	cyclone,
	39	disable_latency_sched_heuristic,
	40	dit,
	41	dotprod,
	42	exynos_cheap_as_move,
	43	exynosm1,
	44	exynosm2,
	45	exynosm3,
	46	exynosm4,
	47	falkor,
	48	fmi,
	49	force_32bit_jump_tables,
	50	fp_armv8,
	51	fp16fml,
	52	fptoint,
	53	fullfp16,
	54	fuse_address,
	55	fuse_aes,
	56	fuse_arith_logic,
	57	fuse_crypto_eor,
	58	fuse_csel,
	59	fuse_literals,
	60	jsconv,
	61	kryo,
	62	lor,
	63	lse,
	64	lsl_fast,
	65	mpam,
	66	mte,
	67	neon,
	68	no_neg_immediates,
	69	nv,
	70	pa,
	71	pan,
	72	pan_rwv,
	73	perfmon,
	74	predictable_select_expensive,
	75	predres,
	76	rand,
	77	ras,
	78	rasv8_4,
	79	rcpc,
	80	rcpc_immo,
	81	rdm,
	82	reserve_x1,
	83	reserve_x10,
	84	reserve_x11,
	85	reserve_x12,
	86	reserve_x13,
	87	reserve_x14,
	88	reserve_x15,
	89	reserve_x18,
	90	reserve_x2,
	91	reserve_x20,
	92	reserve_x21,
	93	reserve_x22,
	94	reserve_x23,
	95	reserve_x24,
	96	reserve_x25,
	97	reserve_x26,
	98	reserve_x27,
	99	reserve_x28,
	100	reserve_x3,
	101	reserve_x4,
	102	reserve_x5,
	103	reserve_x6,
	104	reserve_x7,
	105	reserve_x9,
	106	saphira,
	107	sb,
	108	sel2,
	109	sha2,
	110	sha3,
	111	slow_misaligned_128store,
	112	slow_paired_128,
	113	slow_strqro_store,
	114	sm4,
	115	spe,
	116	specrestrict,
	117	ssbs,
	118	strict_align,
	119	sve,
	120	sve2,
	121	sve2_aes,
	122	sve2_bitperm,
	123	sve2_sha3,
	124	sve2_sm4,
	125	thunderx,
	126	thunderx2t99,
	127	thunderxt81,
	128	thunderxt83,
	129	thunderxt88,
	130	tlb_rmi,
	131	tpidr_el1,
	132	tpidr_el2,
	133	tpidr_el3,
	134	tracev8_4,
	135	tsv110,
	136	uaops,
	137	use_aa,
	138	use_postra_scheduler,
	139	use_reciprocal_square_root,
	140	v8a,
	141	v8_1a,
	142	v8_2a,
	143	v8_3a,
	144	v8_4a,
	145	v8_5a,
	146	vh,
	147	zcm,
	148	zcz,
	149	zcz_fp,
	150	zcz_fp_workaround,
	151	zcz_gp,
	152	};
	153
	154	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	155
	156	pub const all_features = blk: {
	157	@setEvalBranchQuota(2000);
	158	const len = @typeInfo(Feature).Enum.fields.len;
	159	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	160	var result: [len]Cpu.Feature = undefined;
	161	result[@enumToInt(Feature.a35)] = .{
	162	.llvm_name = "a35",
	163	.description = "Cortex-A35 ARM processors",
	164	.dependencies = featureSet(&[_]Feature{
	165	.crc,
	166	.crypto,
	167	.fp_armv8,
	168	.neon,
	169	.perfmon,
	170	}),
	171	};
	172	result[@enumToInt(Feature.a53)] = .{
	173	.llvm_name = "a53",
	174	.description = "Cortex-A53 ARM processors",
	175	.dependencies = featureSet(&[_]Feature{
	176	.balance_fp_ops,
	177	.crc,
	178	.crypto,
	179	.custom_cheap_as_move,
	180	.fp_armv8,
	181	.fuse_aes,
	182	.neon,
	183	.perfmon,
	184	.use_aa,
	185	.use_postra_scheduler,
	186	}),
	187	};
	188	result[@enumToInt(Feature.a55)] = .{
	189	.llvm_name = "a55",
	190	.description = "Cortex-A55 ARM processors",
	191	.dependencies = featureSet(&[_]Feature{
	192	.crypto,
	193	.dotprod,
	194	.fp_armv8,
	195	.fullfp16,
	196	.fuse_aes,
	197	.neon,
	198	.perfmon,
	199	.rcpc,
	200	.v8_2a,
	201	}),
	202	};
	203	result[@enumToInt(Feature.a57)] = .{
	204	.llvm_name = "a57",
	205	.description = "Cortex-A57 ARM processors",
	206	.dependencies = featureSet(&[_]Feature{
	207	.balance_fp_ops,
	208	.crc,
	209	.crypto,
	210	.custom_cheap_as_move,
	211	.fp_armv8,
	212	.fuse_aes,
	213	.fuse_literals,
	214	.neon,
	215	.perfmon,
	216	.predictable_select_expensive,
	217	.use_postra_scheduler,
	218	}),
	219	};
	220	result[@enumToInt(Feature.a72)] = .{
	221	.llvm_name = "a72",
	222	.description = "Cortex-A72 ARM processors",
	223	.dependencies = featureSet(&[_]Feature{
	224	.crc,
	225	.crypto,
	226	.fp_armv8,
	227	.fuse_aes,
	228	.neon,
	229	.perfmon,
	230	}),
	231	};
	232	result[@enumToInt(Feature.a73)] = .{
	233	.llvm_name = "a73",
	234	.description = "Cortex-A73 ARM processors",
	235	.dependencies = featureSet(&[_]Feature{
	236	.crc,
	237	.crypto,
	238	.fp_armv8,
	239	.fuse_aes,
	240	.neon,
	241	.perfmon,
	242	}),
	243	};
	244	result[@enumToInt(Feature.a75)] = .{
	245	.llvm_name = "a75",
	246	.description = "Cortex-A75 ARM processors",
	247	.dependencies = featureSet(&[_]Feature{
	248	.crypto,
	249	.dotprod,
	250	.fp_armv8,
	251	.fullfp16,
	252	.fuse_aes,
	253	.neon,
	254	.perfmon,
	255	.rcpc,
	256	.v8_2a,
	257	}),
	258	};
	259	result[@enumToInt(Feature.a76)] = .{
	260	.llvm_name = "a76",
	261	.description = "Cortex-A76 ARM processors",
	262	.dependencies = featureSet(&[_]Feature{
	263	.crypto,
	264	.dotprod,
	265	.fp_armv8,
	266	.fullfp16,
	267	.neon,
	268	.rcpc,
	269	.ssbs,
	270	.v8_2a,
	271	}),
	272	};
	273	result[@enumToInt(Feature.aes)] = .{
	274	.llvm_name = "aes",
	275	.description = "Enable AES support",
	276	.dependencies = featureSet(&[_]Feature{
	277	.neon,
	278	}),
	279	};
	280	result[@enumToInt(Feature.aggressive_fma)] = .{
	281	.llvm_name = "aggressive-fma",
	282	.description = "Enable Aggressive FMA for floating-point.",
	283	.dependencies = featureSet(&[_]Feature{}),
	284	};
	285	result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
	286	.llvm_name = "alternate-sextload-cvt-f32-pattern",
	287	.description = "Use alternative pattern for sextload convert to f32",
	288	.dependencies = featureSet(&[_]Feature{}),
	289	};
	290	result[@enumToInt(Feature.altnzcv)] = .{
	291	.llvm_name = "altnzcv",
	292	.description = "Enable alternative NZCV format for floating point comparisons",
	293	.dependencies = featureSet(&[_]Feature{}),
	294	};
	295	result[@enumToInt(Feature.am)] = .{
	296	.llvm_name = "am",
	297	.description = "Enable v8.4-A Activity Monitors extension",
	298	.dependencies = featureSet(&[_]Feature{}),
	299	};
	300	result[@enumToInt(Feature.arith_bcc_fusion)] = .{
	301	.llvm_name = "arith-bcc-fusion",
	302	.description = "CPU fuses arithmetic+bcc operations",
	303	.dependencies = featureSet(&[_]Feature{}),
	304	};
	305	result[@enumToInt(Feature.arith_cbz_fusion)] = .{
	306	.llvm_name = "arith-cbz-fusion",
	307	.description = "CPU fuses arithmetic + cbz/cbnz operations",
	308	.dependencies = featureSet(&[_]Feature{}),
	309	};
	310	result[@enumToInt(Feature.balance_fp_ops)] = .{
	311	.llvm_name = "balance-fp-ops",
	312	.description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
	313	.dependencies = featureSet(&[_]Feature{}),
	314	};
	315	result[@enumToInt(Feature.bti)] = .{
	316	.llvm_name = "bti",
	317	.description = "Enable Branch Target Identification",
	318	.dependencies = featureSet(&[_]Feature{}),
	319	};
	320	result[@enumToInt(Feature.call_saved_x10)] = .{
	321	.llvm_name = "call-saved-x10",
	322	.description = "Make X10 callee saved.",
	323	.dependencies = featureSet(&[_]Feature{}),
	324	};
	325	result[@enumToInt(Feature.call_saved_x11)] = .{
	326	.llvm_name = "call-saved-x11",
	327	.description = "Make X11 callee saved.",
	328	.dependencies = featureSet(&[_]Feature{}),
	329	};
	330	result[@enumToInt(Feature.call_saved_x12)] = .{
	331	.llvm_name = "call-saved-x12",
	332	.description = "Make X12 callee saved.",
	333	.dependencies = featureSet(&[_]Feature{}),
	334	};
	335	result[@enumToInt(Feature.call_saved_x13)] = .{
	336	.llvm_name = "call-saved-x13",
	337	.description = "Make X13 callee saved.",
	338	.dependencies = featureSet(&[_]Feature{}),
	339	};
	340	result[@enumToInt(Feature.call_saved_x14)] = .{
	341	.llvm_name = "call-saved-x14",
	342	.description = "Make X14 callee saved.",
	343	.dependencies = featureSet(&[_]Feature{}),
	344	};
	345	result[@enumToInt(Feature.call_saved_x15)] = .{
	346	.llvm_name = "call-saved-x15",
	347	.description = "Make X15 callee saved.",
	348	.dependencies = featureSet(&[_]Feature{}),
	349	};
	350	result[@enumToInt(Feature.call_saved_x18)] = .{
	351	.llvm_name = "call-saved-x18",
	352	.description = "Make X18 callee saved.",
	353	.dependencies = featureSet(&[_]Feature{}),
	354	};
	355	result[@enumToInt(Feature.call_saved_x8)] = .{
	356	.llvm_name = "call-saved-x8",
	357	.description = "Make X8 callee saved.",
	358	.dependencies = featureSet(&[_]Feature{}),
	359	};
	360	result[@enumToInt(Feature.call_saved_x9)] = .{
	361	.llvm_name = "call-saved-x9",
	362	.description = "Make X9 callee saved.",
	363	.dependencies = featureSet(&[_]Feature{}),
	364	};
	365	result[@enumToInt(Feature.ccdp)] = .{
	366	.llvm_name = "ccdp",
	367	.description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
	368	.dependencies = featureSet(&[_]Feature{}),
	369	};
	370	result[@enumToInt(Feature.ccidx)] = .{
	371	.llvm_name = "ccidx",
	372	.description = "Enable v8.3-A Extend of the CCSIDR number of sets",
	373	.dependencies = featureSet(&[_]Feature{}),
	374	};
	375	result[@enumToInt(Feature.ccpp)] = .{
	376	.llvm_name = "ccpp",
	377	.description = "Enable v8.2 data Cache Clean to Point of Persistence",
	378	.dependencies = featureSet(&[_]Feature{}),
	379	};
	380	result[@enumToInt(Feature.complxnum)] = .{
	381	.llvm_name = "complxnum",
	382	.description = "Enable v8.3-A Floating-point complex number support",
	383	.dependencies = featureSet(&[_]Feature{
	384	.neon,
	385	}),
	386	};
	387	result[@enumToInt(Feature.crc)] = .{
	388	.llvm_name = "crc",
	389	.description = "Enable ARMv8 CRC-32 checksum instructions",
	390	.dependencies = featureSet(&[_]Feature{}),
	391	};
	392	result[@enumToInt(Feature.crypto)] = .{
	393	.llvm_name = "crypto",
	394	.description = "Enable cryptographic instructions",
	395	.dependencies = featureSet(&[_]Feature{
	396	.aes,
	397	.neon,
	398	.sha2,
	399	}),
	400	};
	401	result[@enumToInt(Feature.custom_cheap_as_move)] = .{
	402	.llvm_name = "custom-cheap-as-move",
	403	.description = "Use custom handling of cheap instructions",
	404	.dependencies = featureSet(&[_]Feature{}),
	405	};
	406	result[@enumToInt(Feature.cyclone)] = .{
	407	.llvm_name = "cyclone",
	408	.description = "Cyclone",
	409	.dependencies = featureSet(&[_]Feature{
	410	.alternate_sextload_cvt_f32_pattern,
	411	.arith_bcc_fusion,
	412	.arith_cbz_fusion,
	413	.crypto,
	414	.disable_latency_sched_heuristic,
	415	.fp_armv8,
	416	.fuse_aes,
	417	.fuse_crypto_eor,
	418	.neon,
	419	.perfmon,
	420	.zcm,
	421	.zcz,
	422	.zcz_fp_workaround,
	423	}),
	424	};
	425	result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
	426	.llvm_name = "disable-latency-sched-heuristic",
	427	.description = "Disable latency scheduling heuristic",
	428	.dependencies = featureSet(&[_]Feature{}),
	429	};
	430	result[@enumToInt(Feature.dit)] = .{
	431	.llvm_name = "dit",
	432	.description = "Enable v8.4-A Data Independent Timing instructions",
	433	.dependencies = featureSet(&[_]Feature{}),
	434	};
	435	result[@enumToInt(Feature.dotprod)] = .{
	436	.llvm_name = "dotprod",
	437	.description = "Enable dot product support",
	438	.dependencies = featureSet(&[_]Feature{}),
	439	};
	440	result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
	441	.llvm_name = "exynos-cheap-as-move",
	442	.description = "Use Exynos specific handling of cheap instructions",
	443	.dependencies = featureSet(&[_]Feature{
	444	.custom_cheap_as_move,
	445	}),
	446	};
	447	result[@enumToInt(Feature.exynosm1)] = .{
	448	.llvm_name = "exynosm1",
	449	.description = "Samsung Exynos-M1 processors",
	450	.dependencies = featureSet(&[_]Feature{
	451	.crc,
	452	.crypto,
	453	.exynos_cheap_as_move,
	454	.force_32bit_jump_tables,
	455	.fuse_aes,
	456	.perfmon,
	457	.slow_misaligned_128store,
	458	.slow_paired_128,
	459	.use_postra_scheduler,
	460	.use_reciprocal_square_root,
	461	.zcz_fp,
	462	}),
	463	};
	464	result[@enumToInt(Feature.exynosm2)] = .{
	465	.llvm_name = "exynosm2",
	466	.description = "Samsung Exynos-M2 processors",
	467	.dependencies = featureSet(&[_]Feature{
	468	.crc,
	469	.crypto,
	470	.exynos_cheap_as_move,
	471	.force_32bit_jump_tables,
	472	.fuse_aes,
	473	.perfmon,
	474	.slow_misaligned_128store,
	475	.slow_paired_128,
	476	.use_postra_scheduler,
	477	.zcz_fp,
	478	}),
	479	};
	480	result[@enumToInt(Feature.exynosm3)] = .{
	481	.llvm_name = "exynosm3",
	482	.description = "Samsung Exynos-M3 processors",
	483	.dependencies = featureSet(&[_]Feature{
	484	.crc,
	485	.crypto,
	486	.exynos_cheap_as_move,
	487	.force_32bit_jump_tables,
	488	.fuse_address,
	489	.fuse_aes,
	490	.fuse_csel,
	491	.fuse_literals,
	492	.lsl_fast,
	493	.perfmon,
	494	.predictable_select_expensive,
	495	.use_postra_scheduler,
	496	.zcz_fp,
	497	}),
	498	};
	499	result[@enumToInt(Feature.exynosm4)] = .{
	500	.llvm_name = "exynosm4",
	501	.description = "Samsung Exynos-M4 processors",
	502	.dependencies = featureSet(&[_]Feature{
	503	.arith_bcc_fusion,
	504	.arith_cbz_fusion,
	505	.crypto,
	506	.dotprod,
	507	.exynos_cheap_as_move,
	508	.force_32bit_jump_tables,
	509	.fullfp16,
	510	.fuse_address,
	511	.fuse_aes,
	512	.fuse_arith_logic,
	513	.fuse_csel,
	514	.fuse_literals,
	515	.lsl_fast,
	516	.perfmon,
	517	.use_postra_scheduler,
	518	.v8_2a,
	519	.zcz,
	520	}),
	521	};
	522	result[@enumToInt(Feature.falkor)] = .{
	523	.llvm_name = "falkor",
	524	.description = "Qualcomm Falkor processors",
	525	.dependencies = featureSet(&[_]Feature{
	526	.crc,
	527	.crypto,
	528	.custom_cheap_as_move,
	529	.fp_armv8,
	530	.lsl_fast,
	531	.neon,
	532	.perfmon,
	533	.predictable_select_expensive,
	534	.rdm,
	535	.slow_strqro_store,
	536	.use_postra_scheduler,
	537	.zcz,
	538	}),
	539	};
	540	result[@enumToInt(Feature.fmi)] = .{
	541	.llvm_name = "fmi",
	542	.description = "Enable v8.4-A Flag Manipulation Instructions",
	543	.dependencies = featureSet(&[_]Feature{}),
	544	};
	545	result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
	546	.llvm_name = "force-32bit-jump-tables",
	547	.description = "Force jump table entries to be 32-bits wide except at MinSize",
	548	.dependencies = featureSet(&[_]Feature{}),
	549	};
	550	result[@enumToInt(Feature.fp_armv8)] = .{
	551	.llvm_name = "fp-armv8",
	552	.description = "Enable ARMv8 FP",
	553	.dependencies = featureSet(&[_]Feature{}),
	554	};
	555	result[@enumToInt(Feature.fp16fml)] = .{
	556	.llvm_name = "fp16fml",
	557	.description = "Enable FP16 FML instructions",
	558	.dependencies = featureSet(&[_]Feature{
	559	.fullfp16,
	560	}),
	561	};
	562	result[@enumToInt(Feature.fptoint)] = .{
	563	.llvm_name = "fptoint",
	564	.description = "Enable FRInt[32\|64][Z\|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
	565	.dependencies = featureSet(&[_]Feature{}),
	566	};
	567	result[@enumToInt(Feature.fullfp16)] = .{
	568	.llvm_name = "fullfp16",
	569	.description = "Full FP16",
	570	.dependencies = featureSet(&[_]Feature{
	571	.fp_armv8,
	572	}),
	573	};
	574	result[@enumToInt(Feature.fuse_address)] = .{
	575	.llvm_name = "fuse-address",
	576	.description = "CPU fuses address generation and memory operations",
	577	.dependencies = featureSet(&[_]Feature{}),
	578	};
	579	result[@enumToInt(Feature.fuse_aes)] = .{
	580	.llvm_name = "fuse-aes",
	581	.description = "CPU fuses AES crypto operations",
	582	.dependencies = featureSet(&[_]Feature{}),
	583	};
	584	result[@enumToInt(Feature.fuse_arith_logic)] = .{
	585	.llvm_name = "fuse-arith-logic",
	586	.description = "CPU fuses arithmetic and logic operations",
	587	.dependencies = featureSet(&[_]Feature{}),
	588	};
	589	result[@enumToInt(Feature.fuse_crypto_eor)] = .{
	590	.llvm_name = "fuse-crypto-eor",
	591	.description = "CPU fuses AES/PMULL and EOR operations",
	592	.dependencies = featureSet(&[_]Feature{}),
	593	};
	594	result[@enumToInt(Feature.fuse_csel)] = .{
	595	.llvm_name = "fuse-csel",
	596	.description = "CPU fuses conditional select operations",
	597	.dependencies = featureSet(&[_]Feature{}),
	598	};
	599	result[@enumToInt(Feature.fuse_literals)] = .{
	600	.llvm_name = "fuse-literals",
	601	.description = "CPU fuses literal generation operations",
	602	.dependencies = featureSet(&[_]Feature{}),
	603	};
	604	result[@enumToInt(Feature.jsconv)] = .{
	605	.llvm_name = "jsconv",
	606	.description = "Enable v8.3-A JavaScript FP conversion enchancement",
	607	.dependencies = featureSet(&[_]Feature{
	608	.fp_armv8,
	609	}),
	610	};
	611	result[@enumToInt(Feature.kryo)] = .{
	612	.llvm_name = "kryo",
	613	.description = "Qualcomm Kryo processors",
	614	.dependencies = featureSet(&[_]Feature{
	615	.crc,
	616	.crypto,
	617	.custom_cheap_as_move,
	618	.fp_armv8,
	619	.lsl_fast,
	620	.neon,
	621	.perfmon,
	622	.predictable_select_expensive,
	623	.use_postra_scheduler,
	624	.zcz,
	625	}),
	626	};
	627	result[@enumToInt(Feature.lor)] = .{
	628	.llvm_name = "lor",
	629	.description = "Enables ARM v8.1 Limited Ordering Regions extension",
	630	.dependencies = featureSet(&[_]Feature{}),
	631	};
	632	result[@enumToInt(Feature.lse)] = .{
	633	.llvm_name = "lse",
	634	.description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
	635	.dependencies = featureSet(&[_]Feature{}),
	636	};
	637	result[@enumToInt(Feature.lsl_fast)] = .{
	638	.llvm_name = "lsl-fast",
	639	.description = "CPU has a fastpath logical shift of up to 3 places",
	640	.dependencies = featureSet(&[_]Feature{}),
	641	};
	642	result[@enumToInt(Feature.mpam)] = .{
	643	.llvm_name = "mpam",
	644	.description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
	645	.dependencies = featureSet(&[_]Feature{}),
	646	};
	647	result[@enumToInt(Feature.mte)] = .{
	648	.llvm_name = "mte",
	649	.description = "Enable Memory Tagging Extension",
	650	.dependencies = featureSet(&[_]Feature{}),
	651	};
	652	result[@enumToInt(Feature.neon)] = .{
	653	.llvm_name = "neon",
	654	.description = "Enable Advanced SIMD instructions",
	655	.dependencies = featureSet(&[_]Feature{
	656	.fp_armv8,
	657	}),
	658	};
	659	result[@enumToInt(Feature.no_neg_immediates)] = .{
	660	.llvm_name = "no-neg-immediates",
	661	.description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
	662	.dependencies = featureSet(&[_]Feature{}),
	663	};
	664	result[@enumToInt(Feature.nv)] = .{
	665	.llvm_name = "nv",
	666	.description = "Enable v8.4-A Nested Virtualization Enchancement",
	667	.dependencies = featureSet(&[_]Feature{}),
	668	};
	669	result[@enumToInt(Feature.pa)] = .{
	670	.llvm_name = "pa",
	671	.description = "Enable v8.3-A Pointer Authentication enchancement",
	672	.dependencies = featureSet(&[_]Feature{}),
	673	};
	674	result[@enumToInt(Feature.pan)] = .{
	675	.llvm_name = "pan",
	676	.description = "Enables ARM v8.1 Privileged Access-Never extension",
	677	.dependencies = featureSet(&[_]Feature{}),
	678	};
	679	result[@enumToInt(Feature.pan_rwv)] = .{
	680	.llvm_name = "pan-rwv",
	681	.description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
	682	.dependencies = featureSet(&[_]Feature{
	683	.pan,
	684	}),
	685	};
	686	result[@enumToInt(Feature.perfmon)] = .{
	687	.llvm_name = "perfmon",
	688	.description = "Enable ARMv8 PMUv3 Performance Monitors extension",
	689	.dependencies = featureSet(&[_]Feature{}),
	690	};
	691	result[@enumToInt(Feature.predictable_select_expensive)] = .{
	692	.llvm_name = "predictable-select-expensive",
	693	.description = "Prefer likely predicted branches over selects",
	694	.dependencies = featureSet(&[_]Feature{}),
	695	};
	696	result[@enumToInt(Feature.predres)] = .{
	697	.llvm_name = "predres",
	698	.description = "Enable v8.5a execution and data prediction invalidation instructions",
	699	.dependencies = featureSet(&[_]Feature{}),
	700	};
	701	result[@enumToInt(Feature.rand)] = .{
	702	.llvm_name = "rand",
	703	.description = "Enable Random Number generation instructions",
	704	.dependencies = featureSet(&[_]Feature{}),
	705	};
	706	result[@enumToInt(Feature.ras)] = .{
	707	.llvm_name = "ras",
	708	.description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
	709	.dependencies = featureSet(&[_]Feature{}),
	710	};
	711	result[@enumToInt(Feature.rasv8_4)] = .{
	712	.llvm_name = "rasv8_4",
	713	.description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
	714	.dependencies = featureSet(&[_]Feature{
	715	.ras,
	716	}),
	717	};
	718	result[@enumToInt(Feature.rcpc)] = .{
	719	.llvm_name = "rcpc",
	720	.description = "Enable support for RCPC extension",
	721	.dependencies = featureSet(&[_]Feature{}),
	722	};
	723	result[@enumToInt(Feature.rcpc_immo)] = .{
	724	.llvm_name = "rcpc-immo",
	725	.description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
	726	.dependencies = featureSet(&[_]Feature{
	727	.rcpc,
	728	}),
	729	};
	730	result[@enumToInt(Feature.rdm)] = .{
	731	.llvm_name = "rdm",
	732	.description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
	733	.dependencies = featureSet(&[_]Feature{}),
	734	};
	735	result[@enumToInt(Feature.reserve_x1)] = .{
	736	.llvm_name = "reserve-x1",
	737	.description = "Reserve X1, making it unavailable as a GPR",
	738	.dependencies = featureSet(&[_]Feature{}),
	739	};
	740	result[@enumToInt(Feature.reserve_x10)] = .{
	741	.llvm_name = "reserve-x10",
	742	.description = "Reserve X10, making it unavailable as a GPR",
	743	.dependencies = featureSet(&[_]Feature{}),
	744	};
	745	result[@enumToInt(Feature.reserve_x11)] = .{
	746	.llvm_name = "reserve-x11",
	747	.description = "Reserve X11, making it unavailable as a GPR",
	748	.dependencies = featureSet(&[_]Feature{}),
	749	};
	750	result[@enumToInt(Feature.reserve_x12)] = .{
	751	.llvm_name = "reserve-x12",
	752	.description = "Reserve X12, making it unavailable as a GPR",
	753	.dependencies = featureSet(&[_]Feature{}),
	754	};
	755	result[@enumToInt(Feature.reserve_x13)] = .{
	756	.llvm_name = "reserve-x13",
	757	.description = "Reserve X13, making it unavailable as a GPR",
	758	.dependencies = featureSet(&[_]Feature{}),
	759	};
	760	result[@enumToInt(Feature.reserve_x14)] = .{
	761	.llvm_name = "reserve-x14",
	762	.description = "Reserve X14, making it unavailable as a GPR",
	763	.dependencies = featureSet(&[_]Feature{}),
	764	};
	765	result[@enumToInt(Feature.reserve_x15)] = .{
	766	.llvm_name = "reserve-x15",
	767	.description = "Reserve X15, making it unavailable as a GPR",
	768	.dependencies = featureSet(&[_]Feature{}),
	769	};
	770	result[@enumToInt(Feature.reserve_x18)] = .{
	771	.llvm_name = "reserve-x18",
	772	.description = "Reserve X18, making it unavailable as a GPR",
	773	.dependencies = featureSet(&[_]Feature{}),
	774	};
	775	result[@enumToInt(Feature.reserve_x2)] = .{
	776	.llvm_name = "reserve-x2",
	777	.description = "Reserve X2, making it unavailable as a GPR",
	778	.dependencies = featureSet(&[_]Feature{}),
	779	};
	780	result[@enumToInt(Feature.reserve_x20)] = .{
	781	.llvm_name = "reserve-x20",
	782	.description = "Reserve X20, making it unavailable as a GPR",
	783	.dependencies = featureSet(&[_]Feature{}),
	784	};
	785	result[@enumToInt(Feature.reserve_x21)] = .{
	786	.llvm_name = "reserve-x21",
	787	.description = "Reserve X21, making it unavailable as a GPR",
	788	.dependencies = featureSet(&[_]Feature{}),
	789	};
	790	result[@enumToInt(Feature.reserve_x22)] = .{
	791	.llvm_name = "reserve-x22",
	792	.description = "Reserve X22, making it unavailable as a GPR",
	793	.dependencies = featureSet(&[_]Feature{}),
	794	};
	795	result[@enumToInt(Feature.reserve_x23)] = .{
	796	.llvm_name = "reserve-x23",
	797	.description = "Reserve X23, making it unavailable as a GPR",
	798	.dependencies = featureSet(&[_]Feature{}),
	799	};
	800	result[@enumToInt(Feature.reserve_x24)] = .{
	801	.llvm_name = "reserve-x24",
	802	.description = "Reserve X24, making it unavailable as a GPR",
	803	.dependencies = featureSet(&[_]Feature{}),
	804	};
	805	result[@enumToInt(Feature.reserve_x25)] = .{
	806	.llvm_name = "reserve-x25",
	807	.description = "Reserve X25, making it unavailable as a GPR",
	808	.dependencies = featureSet(&[_]Feature{}),
	809	};
	810	result[@enumToInt(Feature.reserve_x26)] = .{
	811	.llvm_name = "reserve-x26",
	812	.description = "Reserve X26, making it unavailable as a GPR",
	813	.dependencies = featureSet(&[_]Feature{}),
	814	};
	815	result[@enumToInt(Feature.reserve_x27)] = .{
	816	.llvm_name = "reserve-x27",
	817	.description = "Reserve X27, making it unavailable as a GPR",
	818	.dependencies = featureSet(&[_]Feature{}),
	819	};
	820	result[@enumToInt(Feature.reserve_x28)] = .{
	821	.llvm_name = "reserve-x28",
	822	.description = "Reserve X28, making it unavailable as a GPR",
	823	.dependencies = featureSet(&[_]Feature{}),
	824	};
	825	result[@enumToInt(Feature.reserve_x3)] = .{
	826	.llvm_name = "reserve-x3",
	827	.description = "Reserve X3, making it unavailable as a GPR",
	828	.dependencies = featureSet(&[_]Feature{}),
	829	};
	830	result[@enumToInt(Feature.reserve_x4)] = .{
	831	.llvm_name = "reserve-x4",
	832	.description = "Reserve X4, making it unavailable as a GPR",
	833	.dependencies = featureSet(&[_]Feature{}),
	834	};
	835	result[@enumToInt(Feature.reserve_x5)] = .{
	836	.llvm_name = "reserve-x5",
	837	.description = "Reserve X5, making it unavailable as a GPR",
	838	.dependencies = featureSet(&[_]Feature{}),
	839	};
	840	result[@enumToInt(Feature.reserve_x6)] = .{
	841	.llvm_name = "reserve-x6",
	842	.description = "Reserve X6, making it unavailable as a GPR",
	843	.dependencies = featureSet(&[_]Feature{}),
	844	};
	845	result[@enumToInt(Feature.reserve_x7)] = .{
	846	.llvm_name = "reserve-x7",
	847	.description = "Reserve X7, making it unavailable as a GPR",
	848	.dependencies = featureSet(&[_]Feature{}),
	849	};
	850	result[@enumToInt(Feature.reserve_x9)] = .{
	851	.llvm_name = "reserve-x9",
	852	.description = "Reserve X9, making it unavailable as a GPR",
	853	.dependencies = featureSet(&[_]Feature{}),
	854	};
	855	result[@enumToInt(Feature.saphira)] = .{
	856	.llvm_name = "saphira",
	857	.description = "Qualcomm Saphira processors",
	858	.dependencies = featureSet(&[_]Feature{
	859	.crypto,
	860	.custom_cheap_as_move,
	861	.fp_armv8,
	862	.lsl_fast,
	863	.neon,
	864	.perfmon,
	865	.predictable_select_expensive,
	866	.spe,
	867	.use_postra_scheduler,
	868	.v8_4a,
	869	.zcz,
	870	}),
	871	};
	872	result[@enumToInt(Feature.sb)] = .{
	873	.llvm_name = "sb",
	874	.description = "Enable v8.5 Speculation Barrier",
	875	.dependencies = featureSet(&[_]Feature{}),
	876	};
	877	result[@enumToInt(Feature.sel2)] = .{
	878	.llvm_name = "sel2",
	879	.description = "Enable v8.4-A Secure Exception Level 2 extension",
	880	.dependencies = featureSet(&[_]Feature{}),
	881	};
	882	result[@enumToInt(Feature.sha2)] = .{
	883	.llvm_name = "sha2",
	884	.description = "Enable SHA1 and SHA256 support",
	885	.dependencies = featureSet(&[_]Feature{
	886	.neon,
	887	}),
	888	};
	889	result[@enumToInt(Feature.sha3)] = .{
	890	.llvm_name = "sha3",
	891	.description = "Enable SHA512 and SHA3 support",
	892	.dependencies = featureSet(&[_]Feature{
	893	.neon,
	894	.sha2,
	895	}),
	896	};
	897	result[@enumToInt(Feature.slow_misaligned_128store)] = .{
	898	.llvm_name = "slow-misaligned-128store",
	899	.description = "Misaligned 128 bit stores are slow",
	900	.dependencies = featureSet(&[_]Feature{}),
	901	};
	902	result[@enumToInt(Feature.slow_paired_128)] = .{
	903	.llvm_name = "slow-paired-128",
	904	.description = "Paired 128 bit loads and stores are slow",
	905	.dependencies = featureSet(&[_]Feature{}),
	906	};
	907	result[@enumToInt(Feature.slow_strqro_store)] = .{
	908	.llvm_name = "slow-strqro-store",
	909	.description = "STR of Q register with register offset is slow",
	910	.dependencies = featureSet(&[_]Feature{}),
	911	};
	912	result[@enumToInt(Feature.sm4)] = .{
	913	.llvm_name = "sm4",
	914	.description = "Enable SM3 and SM4 support",
	915	.dependencies = featureSet(&[_]Feature{
	916	.neon,
	917	}),
	918	};
	919	result[@enumToInt(Feature.spe)] = .{
	920	.llvm_name = "spe",
	921	.description = "Enable Statistical Profiling extension",
	922	.dependencies = featureSet(&[_]Feature{}),
	923	};
	924	result[@enumToInt(Feature.specrestrict)] = .{
	925	.llvm_name = "specrestrict",
	926	.description = "Enable architectural speculation restriction",
	927	.dependencies = featureSet(&[_]Feature{}),
	928	};
	929	result[@enumToInt(Feature.ssbs)] = .{
	930	.llvm_name = "ssbs",
	931	.description = "Enable Speculative Store Bypass Safe bit",
	932	.dependencies = featureSet(&[_]Feature{}),
	933	};
	934	result[@enumToInt(Feature.strict_align)] = .{
	935	.llvm_name = "strict-align",
	936	.description = "Disallow all unaligned memory access",
	937	.dependencies = featureSet(&[_]Feature{}),
	938	};
	939	result[@enumToInt(Feature.sve)] = .{
	940	.llvm_name = "sve",
	941	.description = "Enable Scalable Vector Extension (SVE) instructions",
	942	.dependencies = featureSet(&[_]Feature{}),
	943	};
	944	result[@enumToInt(Feature.sve2)] = .{
	945	.llvm_name = "sve2",
	946	.description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
	947	.dependencies = featureSet(&[_]Feature{
	948	.sve,
	949	}),
	950	};
	951	result[@enumToInt(Feature.sve2_aes)] = .{
	952	.llvm_name = "sve2-aes",
	953	.description = "Enable AES SVE2 instructions",
	954	.dependencies = featureSet(&[_]Feature{
	955	.aes,
	956	.sve2,
	957	}),
	958	};
	959	result[@enumToInt(Feature.sve2_bitperm)] = .{
	960	.llvm_name = "sve2-bitperm",
	961	.description = "Enable bit permutation SVE2 instructions",
	962	.dependencies = featureSet(&[_]Feature{
	963	.sve2,
	964	}),
	965	};
	966	result[@enumToInt(Feature.sve2_sha3)] = .{
	967	.llvm_name = "sve2-sha3",
	968	.description = "Enable SHA3 SVE2 instructions",
	969	.dependencies = featureSet(&[_]Feature{
	970	.sha3,
	971	.sve2,
	972	}),
	973	};
	974	result[@enumToInt(Feature.sve2_sm4)] = .{
	975	.llvm_name = "sve2-sm4",
	976	.description = "Enable SM4 SVE2 instructions",
	977	.dependencies = featureSet(&[_]Feature{
	978	.sm4,
	979	.sve2,
	980	}),
	981	};
	982	result[@enumToInt(Feature.thunderx)] = .{
	983	.llvm_name = "thunderx",
	984	.description = "Cavium ThunderX processors",
	985	.dependencies = featureSet(&[_]Feature{
	986	.crc,
	987	.crypto,
	988	.fp_armv8,
	989	.neon,
	990	.perfmon,
	991	.predictable_select_expensive,
	992	.use_postra_scheduler,
	993	}),
	994	};
	995	result[@enumToInt(Feature.thunderx2t99)] = .{
	996	.llvm_name = "thunderx2t99",
	997	.description = "Cavium ThunderX2 processors",
	998	.dependencies = featureSet(&[_]Feature{
	999	.aggressive_fma,
	1000	.arith_bcc_fusion,
	1001	.crc,
	1002	.crypto,
	1003	.fp_armv8,
	1004	.lse,
	1005	.neon,
	1006	.predictable_select_expensive,
	1007	.use_postra_scheduler,
	1008	.v8_1a,
	1009	}),
	1010	};
	1011	result[@enumToInt(Feature.thunderxt81)] = .{
	1012	.llvm_name = "thunderxt81",
	1013	.description = "Cavium ThunderX processors",
	1014	.dependencies = featureSet(&[_]Feature{
	1015	.crc,
	1016	.crypto,
	1017	.fp_armv8,
	1018	.neon,
	1019	.perfmon,
	1020	.predictable_select_expensive,
	1021	.use_postra_scheduler,
	1022	}),
	1023	};
	1024	result[@enumToInt(Feature.thunderxt83)] = .{
	1025	.llvm_name = "thunderxt83",
	1026	.description = "Cavium ThunderX processors",
	1027	.dependencies = featureSet(&[_]Feature{
	1028	.crc,
	1029	.crypto,
	1030	.fp_armv8,
	1031	.neon,
	1032	.perfmon,
	1033	.predictable_select_expensive,
	1034	.use_postra_scheduler,
	1035	}),
	1036	};
	1037	result[@enumToInt(Feature.thunderxt88)] = .{
	1038	.llvm_name = "thunderxt88",
	1039	.description = "Cavium ThunderX processors",
	1040	.dependencies = featureSet(&[_]Feature{
	1041	.crc,
	1042	.crypto,
	1043	.fp_armv8,
	1044	.neon,
	1045	.perfmon,
	1046	.predictable_select_expensive,
	1047	.use_postra_scheduler,
	1048	}),
	1049	};
	1050	result[@enumToInt(Feature.tlb_rmi)] = .{
	1051	.llvm_name = "tlb-rmi",
	1052	.description = "Enable v8.4-A TLB Range and Maintenance Instructions",
	1053	.dependencies = featureSet(&[_]Feature{}),
	1054	};
	1055	result[@enumToInt(Feature.tpidr_el1)] = .{
	1056	.llvm_name = "tpidr-el1",
	1057	.description = "Permit use of TPIDR_EL1 for the TLS base",
	1058	.dependencies = featureSet(&[_]Feature{}),
	1059	};
	1060	result[@enumToInt(Feature.tpidr_el2)] = .{
	1061	.llvm_name = "tpidr-el2",
	1062	.description = "Permit use of TPIDR_EL2 for the TLS base",
	1063	.dependencies = featureSet(&[_]Feature{}),
	1064	};
	1065	result[@enumToInt(Feature.tpidr_el3)] = .{
	1066	.llvm_name = "tpidr-el3",
	1067	.description = "Permit use of TPIDR_EL3 for the TLS base",
	1068	.dependencies = featureSet(&[_]Feature{}),
	1069	};
	1070	result[@enumToInt(Feature.tracev8_4)] = .{
	1071	.llvm_name = "tracev8.4",
	1072	.description = "Enable v8.4-A Trace extension",
	1073	.dependencies = featureSet(&[_]Feature{}),
	1074	};
	1075	result[@enumToInt(Feature.tsv110)] = .{
	1076	.llvm_name = "tsv110",
	1077	.description = "HiSilicon TS-V110 processors",
	1078	.dependencies = featureSet(&[_]Feature{
	1079	.crypto,
	1080	.custom_cheap_as_move,
	1081	.dotprod,
	1082	.fp_armv8,
	1083	.fp16fml,
	1084	.fullfp16,
	1085	.fuse_aes,
	1086	.neon,
	1087	.perfmon,
	1088	.spe,
	1089	.use_postra_scheduler,
	1090	.v8_2a,
	1091	}),
	1092	};
	1093	result[@enumToInt(Feature.uaops)] = .{
	1094	.llvm_name = "uaops",
	1095	.description = "Enable v8.2 UAO PState",
	1096	.dependencies = featureSet(&[_]Feature{}),
	1097	};
	1098	result[@enumToInt(Feature.use_aa)] = .{
	1099	.llvm_name = "use-aa",
	1100	.description = "Use alias analysis during codegen",
	1101	.dependencies = featureSet(&[_]Feature{}),
	1102	};
	1103	result[@enumToInt(Feature.use_postra_scheduler)] = .{
	1104	.llvm_name = "use-postra-scheduler",
	1105	.description = "Schedule again after register allocation",
	1106	.dependencies = featureSet(&[_]Feature{}),
	1107	};
	1108	result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
	1109	.llvm_name = "use-reciprocal-square-root",
	1110	.description = "Use the reciprocal square root approximation",
	1111	.dependencies = featureSet(&[_]Feature{}),
	1112	};
	1113	result[@enumToInt(Feature.v8a)] = .{
	1114	.llvm_name = null,
	1115	.description = "Support ARM v8a instructions",
	1116	.dependencies = featureSet(&[_]Feature{
	1117	.fp_armv8,
	1118	.neon,
	1119	}),
	1120	};
	1121	result[@enumToInt(Feature.v8_1a)] = .{
	1122	.llvm_name = "v8.1a",
	1123	.description = "Support ARM v8.1a instructions",
	1124	.dependencies = featureSet(&[_]Feature{
	1125	.crc,
	1126	.lor,
	1127	.lse,
	1128	.pan,
	1129	.rdm,
	1130	.vh,
	1131	.v8a,
	1132	}),
	1133	};
	1134	result[@enumToInt(Feature.v8_2a)] = .{
	1135	.llvm_name = "v8.2a",
	1136	.description = "Support ARM v8.2a instructions",
	1137	.dependencies = featureSet(&[_]Feature{
	1138	.ccpp,
	1139	.pan_rwv,
	1140	.ras,
	1141	.uaops,
	1142	.v8_1a,
	1143	}),
	1144	};
	1145	result[@enumToInt(Feature.v8_3a)] = .{
	1146	.llvm_name = "v8.3a",
	1147	.description = "Support ARM v8.3a instructions",
	1148	.dependencies = featureSet(&[_]Feature{
	1149	.ccidx,
	1150	.complxnum,
	1151	.jsconv,
	1152	.pa,
	1153	.rcpc,
	1154	.v8_2a,
	1155	}),
	1156	};
	1157	result[@enumToInt(Feature.v8_4a)] = .{
	1158	.llvm_name = "v8.4a",
	1159	.description = "Support ARM v8.4a instructions",
	1160	.dependencies = featureSet(&[_]Feature{
	1161	.am,
	1162	.dit,
	1163	.dotprod,
	1164	.fmi,
	1165	.mpam,
	1166	.nv,
	1167	.rasv8_4,
	1168	.rcpc_immo,
	1169	.sel2,
	1170	.tlb_rmi,
	1171	.tracev8_4,
	1172	.v8_3a,
	1173	}),
	1174	};
	1175	result[@enumToInt(Feature.v8_5a)] = .{
	1176	.llvm_name = "v8.5a",
	1177	.description = "Support ARM v8.5a instructions",
	1178	.dependencies = featureSet(&[_]Feature{
	1179	.altnzcv,
	1180	.bti,
	1181	.ccdp,
	1182	.fptoint,
	1183	.predres,
	1184	.sb,
	1185	.specrestrict,
	1186	.ssbs,
	1187	.v8_4a,
	1188	}),
	1189	};
	1190	result[@enumToInt(Feature.vh)] = .{
	1191	.llvm_name = "vh",
	1192	.description = "Enables ARM v8.1 Virtual Host extension",
	1193	.dependencies = featureSet(&[_]Feature{}),
	1194	};
	1195	result[@enumToInt(Feature.zcm)] = .{
	1196	.llvm_name = "zcm",
	1197	.description = "Has zero-cycle register moves",
	1198	.dependencies = featureSet(&[_]Feature{}),
	1199	};
	1200	result[@enumToInt(Feature.zcz)] = .{
	1201	.llvm_name = "zcz",
	1202	.description = "Has zero-cycle zeroing instructions",
	1203	.dependencies = featureSet(&[_]Feature{
	1204	.zcz_fp,
	1205	.zcz_gp,
	1206	}),
	1207	};
	1208	result[@enumToInt(Feature.zcz_fp)] = .{
	1209	.llvm_name = "zcz-fp",
	1210	.description = "Has zero-cycle zeroing instructions for FP registers",
	1211	.dependencies = featureSet(&[_]Feature{}),
	1212	};
	1213	result[@enumToInt(Feature.zcz_fp_workaround)] = .{
	1214	.llvm_name = "zcz-fp-workaround",
	1215	.description = "The zero-cycle floating-point zeroing instruction has a bug",
	1216	.dependencies = featureSet(&[_]Feature{}),
	1217	};
	1218	result[@enumToInt(Feature.zcz_gp)] = .{
	1219	.llvm_name = "zcz-gp",
	1220	.description = "Has zero-cycle zeroing instructions for generic registers",
	1221	.dependencies = featureSet(&[_]Feature{}),
	1222	};
	1223	const ti = @typeInfo(Feature);
	1224	for (result) \|*elem, i\| {
	1225	elem.index = i;
	1226	elem.name = ti.Enum.fields[i].name;
	1227	}
	1228	break :blk result;
	1229	};
	1230
	1231	pub const cpu = struct {
	1232	pub const apple_latest = Cpu{
	1233	.name = "apple_latest",
	1234	.llvm_name = "apple-latest",
	1235	.features = featureSet(&[_]Feature{
	1236	.cyclone,
	1237	}),
	1238	};
	1239	pub const cortex_a35 = Cpu{
	1240	.name = "cortex_a35",
	1241	.llvm_name = "cortex-a35",
	1242	.features = featureSet(&[_]Feature{
	1243	.a35,
	1244	}),
	1245	};
	1246	pub const cortex_a53 = Cpu{
	1247	.name = "cortex_a53",
	1248	.llvm_name = "cortex-a53",
	1249	.features = featureSet(&[_]Feature{
	1250	.a53,
	1251	}),
	1252	};
	1253	pub const cortex_a55 = Cpu{
	1254	.name = "cortex_a55",
	1255	.llvm_name = "cortex-a55",
	1256	.features = featureSet(&[_]Feature{
	1257	.a55,
	1258	}),
	1259	};
	1260	pub const cortex_a57 = Cpu{
	1261	.name = "cortex_a57",
	1262	.llvm_name = "cortex-a57",
	1263	.features = featureSet(&[_]Feature{
	1264	.a57,
	1265	}),
	1266	};
	1267	pub const cortex_a72 = Cpu{
	1268	.name = "cortex_a72",
	1269	.llvm_name = "cortex-a72",
	1270	.features = featureSet(&[_]Feature{
	1271	.a72,
	1272	}),
	1273	};
	1274	pub const cortex_a73 = Cpu{
	1275	.name = "cortex_a73",
	1276	.llvm_name = "cortex-a73",
	1277	.features = featureSet(&[_]Feature{
	1278	.a73,
	1279	}),
	1280	};
	1281	pub const cortex_a75 = Cpu{
	1282	.name = "cortex_a75",
	1283	.llvm_name = "cortex-a75",
	1284	.features = featureSet(&[_]Feature{
	1285	.a75,
	1286	}),
	1287	};
	1288	pub const cortex_a76 = Cpu{
	1289	.name = "cortex_a76",
	1290	.llvm_name = "cortex-a76",
	1291	.features = featureSet(&[_]Feature{
	1292	.a76,
	1293	}),
	1294	};
	1295	pub const cortex_a76ae = Cpu{
	1296	.name = "cortex_a76ae",
	1297	.llvm_name = "cortex-a76ae",
	1298	.features = featureSet(&[_]Feature{
	1299	.a76,
	1300	}),
	1301	};
	1302	pub const cyclone = Cpu{
	1303	.name = "cyclone",
	1304	.llvm_name = "cyclone",
	1305	.features = featureSet(&[_]Feature{
	1306	.cyclone,
	1307	}),
	1308	};
	1309	pub const exynos_m1 = Cpu{
	1310	.name = "exynos_m1",
	1311	.llvm_name = "exynos-m1",
	1312	.features = featureSet(&[_]Feature{
	1313	.exynosm1,
	1314	}),
	1315	};
	1316	pub const exynos_m2 = Cpu{
	1317	.name = "exynos_m2",
	1318	.llvm_name = "exynos-m2",
	1319	.features = featureSet(&[_]Feature{
	1320	.exynosm2,
	1321	}),
	1322	};
	1323	pub const exynos_m3 = Cpu{
	1324	.name = "exynos_m3",
	1325	.llvm_name = "exynos-m3",
	1326	.features = featureSet(&[_]Feature{
	1327	.exynosm3,
	1328	}),
	1329	};
	1330	pub const exynos_m4 = Cpu{
	1331	.name = "exynos_m4",
	1332	.llvm_name = "exynos-m4",
	1333	.features = featureSet(&[_]Feature{
	1334	.exynosm4,
	1335	}),
	1336	};
	1337	pub const exynos_m5 = Cpu{
	1338	.name = "exynos_m5",
	1339	.llvm_name = "exynos-m5",
	1340	.features = featureSet(&[_]Feature{
	1341	.exynosm4,
	1342	}),
	1343	};
	1344	pub const falkor = Cpu{
	1345	.name = "falkor",
	1346	.llvm_name = "falkor",
	1347	.features = featureSet(&[_]Feature{
	1348	.falkor,
	1349	}),
	1350	};
	1351	pub const generic = Cpu{
	1352	.name = "generic",
	1353	.llvm_name = "generic",
	1354	.features = featureSet(&[_]Feature{
	1355	.fp_armv8,
	1356	.fuse_aes,
	1357	.neon,
	1358	.perfmon,
	1359	.use_postra_scheduler,
	1360	}),
	1361	};
	1362	pub const kryo = Cpu{
	1363	.name = "kryo",
	1364	.llvm_name = "kryo",
	1365	.features = featureSet(&[_]Feature{
	1366	.kryo,
	1367	}),
	1368	};
	1369	pub const saphira = Cpu{
	1370	.name = "saphira",
	1371	.llvm_name = "saphira",
	1372	.features = featureSet(&[_]Feature{
	1373	.saphira,
	1374	}),
	1375	};
	1376	pub const thunderx = Cpu{
	1377	.name = "thunderx",
	1378	.llvm_name = "thunderx",
	1379	.features = featureSet(&[_]Feature{
	1380	.thunderx,
	1381	}),
	1382	};
	1383	pub const thunderx2t99 = Cpu{
	1384	.name = "thunderx2t99",
	1385	.llvm_name = "thunderx2t99",
	1386	.features = featureSet(&[_]Feature{
	1387	.thunderx2t99,
	1388	}),
	1389	};
	1390	pub const thunderxt81 = Cpu{
	1391	.name = "thunderxt81",
	1392	.llvm_name = "thunderxt81",
	1393	.features = featureSet(&[_]Feature{
	1394	.thunderxt81,
	1395	}),
	1396	};
	1397	pub const thunderxt83 = Cpu{
	1398	.name = "thunderxt83",
	1399	.llvm_name = "thunderxt83",
	1400	.features = featureSet(&[_]Feature{
	1401	.thunderxt83,
	1402	}),
	1403	};
	1404	pub const thunderxt88 = Cpu{
	1405	.name = "thunderxt88",
	1406	.llvm_name = "thunderxt88",
	1407	.features = featureSet(&[_]Feature{
	1408	.thunderxt88,
	1409	}),
	1410	};
	1411	pub const tsv110 = Cpu{
	1412	.name = "tsv110",
	1413	.llvm_name = "tsv110",
	1414	.features = featureSet(&[_]Feature{
	1415	.tsv110,
	1416	}),
	1417	};
	1418	};
	1419
	1420	/// All aarch64 CPUs, sorted alphabetically by name.
	1421	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	1422	/// compiler has inefficient memory and CPU usage, affecting build times.
	1423	pub const all_cpus = &[_]*const Cpu{
	1424	&cpu.apple_latest,
	1425	&cpu.cortex_a35,
	1426	&cpu.cortex_a53,
	1427	&cpu.cortex_a55,
	1428	&cpu.cortex_a57,
	1429	&cpu.cortex_a72,
	1430	&cpu.cortex_a73,
	1431	&cpu.cortex_a75,
	1432	&cpu.cortex_a76,
	1433	&cpu.cortex_a76ae,
	1434	&cpu.cyclone,
	1435	&cpu.exynos_m1,
	1436	&cpu.exynos_m2,
	1437	&cpu.exynos_m3,
	1438	&cpu.exynos_m4,
	1439	&cpu.exynos_m5,
	1440	&cpu.falkor,
	1441	&cpu.generic,
	1442	&cpu.kryo,
	1443	&cpu.saphira,
	1444	&cpu.thunderx,
	1445	&cpu.thunderx2t99,
	1446	&cpu.thunderxt81,
	1447	&cpu.thunderxt83,
	1448	&cpu.thunderxt88,
	1449	&cpu.tsv110,
	1450	};

lib/std/target/amdgpu.zig created+1315

...	...	@@ -0,0 +1,1315 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	@"16_bit_insts",
	6	DumpCode,
	7	add_no_carry_insts,
	8	aperture_regs,
	9	atomic_fadd_insts,
	10	auto_waitcnt_before_barrier,
	11	ci_insts,
	12	code_object_v3,
	13	cumode,
	14	dl_insts,
	15	dot1_insts,
	16	dot2_insts,
	17	dot3_insts,
	18	dot4_insts,
	19	dot5_insts,
	20	dot6_insts,
	21	dpp,
	22	dpp8,
	23	dumpcode,
	24	enable_ds128,
	25	enable_prt_strict_null,
	26	fast_fmaf,
	27	flat_address_space,
	28	flat_for_global,
	29	flat_global_insts,
	30	flat_inst_offsets,
	31	flat_scratch_insts,
	32	flat_segment_offset_bug,
	33	fma_mix_insts,
	34	fmaf,
	35	fp_exceptions,
	36	fp16_denormals,
	37	fp32_denormals,
	38	fp64,
	39	fp64_denormals,
	40	fp64_fp16_denormals,
	41	gcn3_encoding,
	42	gfx10,
	43	gfx10_insts,
	44	gfx7_gfx8_gfx9_insts,
	45	gfx8_insts,
	46	gfx9,
	47	gfx9_insts,
	48	half_rate_64_ops,
	49	inst_fwd_prefetch_bug,
	50	int_clamp_insts,
	51	inv_2pi_inline_imm,
	52	lds_branch_vmem_war_hazard,
	53	lds_misaligned_bug,
	54	ldsbankcount16,
	55	ldsbankcount32,
	56	load_store_opt,
	57	localmemorysize0,
	58	localmemorysize32768,
	59	localmemorysize65536,
	60	mad_mix_insts,
	61	mai_insts,
	62	max_private_element_size_16,
	63	max_private_element_size_4,
	64	max_private_element_size_8,
	65	mimg_r128,
	66	movrel,
	67	no_data_dep_hazard,
	68	no_sdst_cmpx,
	69	no_sram_ecc_support,
	70	no_xnack_support,
	71	nsa_encoding,
	72	nsa_to_vmem_bug,
	73	offset_3f_bug,
	74	pk_fmac_f16_inst,
	75	promote_alloca,
	76	r128_a16,
	77	register_banking,
	78	s_memrealtime,
	79	scalar_atomics,
	80	scalar_flat_scratch_insts,
	81	scalar_stores,
	82	sdwa,
	83	sdwa_mav,
	84	sdwa_omod,
	85	sdwa_out_mods_vopc,
	86	sdwa_scalar,
	87	sdwa_sdst,
	88	sea_islands,
	89	sgpr_init_bug,
	90	si_scheduler,
	91	smem_to_vector_write_hazard,
	92	southern_islands,
	93	sram_ecc,
	94	trap_handler,
	95	trig_reduced_range,
	96	unaligned_buffer_access,
	97	unaligned_scratch_access,
	98	unpacked_d16_vmem,
	99	unsafe_ds_offset_folding,
	100	vcmpx_exec_war_hazard,
	101	vcmpx_permlane_hazard,
	102	vgpr_index_mode,
	103	vmem_to_scalar_write_hazard,
	104	volcanic_islands,
	105	vop3_literal,
	106	vop3p,
	107	vscnt,
	108	wavefrontsize16,
	109	wavefrontsize32,
	110	wavefrontsize64,
	111	xnack,
	112	};
	113
	114	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	115
	116	pub const all_features = blk: {
	117	const len = @typeInfo(Feature).Enum.fields.len;
	118	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	119	var result: [len]Cpu.Feature = undefined;
	120	result[@enumToInt(Feature.@"16_bit_insts")] = .{
	121	.llvm_name = "16-bit-insts",
	122	.description = "Has i16/f16 instructions",
	123	.dependencies = featureSet(&[_]Feature{}),
	124	};
	125	result[@enumToInt(Feature.DumpCode)] = .{
	126	.llvm_name = "DumpCode",
	127	.description = "Dump MachineInstrs in the CodeEmitter",
	128	.dependencies = featureSet(&[_]Feature{}),
	129	};
	130	result[@enumToInt(Feature.add_no_carry_insts)] = .{
	131	.llvm_name = "add-no-carry-insts",
	132	.description = "Have VALU add/sub instructions without carry out",
	133	.dependencies = featureSet(&[_]Feature{}),
	134	};
	135	result[@enumToInt(Feature.aperture_regs)] = .{
	136	.llvm_name = "aperture-regs",
	137	.description = "Has Memory Aperture Base and Size Registers",
	138	.dependencies = featureSet(&[_]Feature{}),
	139	};
	140	result[@enumToInt(Feature.atomic_fadd_insts)] = .{
	141	.llvm_name = "atomic-fadd-insts",
	142	.description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
	143	.dependencies = featureSet(&[_]Feature{}),
	144	};
	145	result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
	146	.llvm_name = "auto-waitcnt-before-barrier",
	147	.description = "Hardware automatically inserts waitcnt before barrier",
	148	.dependencies = featureSet(&[_]Feature{}),
	149	};
	150	result[@enumToInt(Feature.ci_insts)] = .{
	151	.llvm_name = "ci-insts",
	152	.description = "Additional instructions for CI+",
	153	.dependencies = featureSet(&[_]Feature{}),
	154	};
	155	result[@enumToInt(Feature.code_object_v3)] = .{
	156	.llvm_name = "code-object-v3",
	157	.description = "Generate code object version 3",
	158	.dependencies = featureSet(&[_]Feature{}),
	159	};
	160	result[@enumToInt(Feature.cumode)] = .{
	161	.llvm_name = "cumode",
	162	.description = "Enable CU wavefront execution mode",
	163	.dependencies = featureSet(&[_]Feature{}),
	164	};
	165	result[@enumToInt(Feature.dl_insts)] = .{
	166	.llvm_name = "dl-insts",
	167	.description = "Has v_fmac_f32 and v_xnor_b32 instructions",
	168	.dependencies = featureSet(&[_]Feature{}),
	169	};
	170	result[@enumToInt(Feature.dot1_insts)] = .{
	171	.llvm_name = "dot1-insts",
	172	.description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
	173	.dependencies = featureSet(&[_]Feature{}),
	174	};
	175	result[@enumToInt(Feature.dot2_insts)] = .{
	176	.llvm_name = "dot2-insts",
	177	.description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
	178	.dependencies = featureSet(&[_]Feature{}),
	179	};
	180	result[@enumToInt(Feature.dot3_insts)] = .{
	181	.llvm_name = "dot3-insts",
	182	.description = "Has v_dot8c_i32_i4 instruction",
	183	.dependencies = featureSet(&[_]Feature{}),
	184	};
	185	result[@enumToInt(Feature.dot4_insts)] = .{
	186	.llvm_name = "dot4-insts",
	187	.description = "Has v_dot2c_i32_i16 instruction",
	188	.dependencies = featureSet(&[_]Feature{}),
	189	};
	190	result[@enumToInt(Feature.dot5_insts)] = .{
	191	.llvm_name = "dot5-insts",
	192	.description = "Has v_dot2c_f32_f16 instruction",
	193	.dependencies = featureSet(&[_]Feature{}),
	194	};
	195	result[@enumToInt(Feature.dot6_insts)] = .{
	196	.llvm_name = "dot6-insts",
	197	.description = "Has v_dot4c_i32_i8 instruction",
	198	.dependencies = featureSet(&[_]Feature{}),
	199	};
	200	result[@enumToInt(Feature.dpp)] = .{
	201	.llvm_name = "dpp",
	202	.description = "Support DPP (Data Parallel Primitives) extension",
	203	.dependencies = featureSet(&[_]Feature{}),
	204	};
	205	result[@enumToInt(Feature.dpp8)] = .{
	206	.llvm_name = "dpp8",
	207	.description = "Support DPP8 (Data Parallel Primitives) extension",
	208	.dependencies = featureSet(&[_]Feature{}),
	209	};
	210	result[@enumToInt(Feature.dumpcode)] = .{
	211	.llvm_name = "dumpcode",
	212	.description = "Dump MachineInstrs in the CodeEmitter",
	213	.dependencies = featureSet(&[_]Feature{}),
	214	};
	215	result[@enumToInt(Feature.enable_ds128)] = .{
	216	.llvm_name = "enable-ds128",
	217	.description = "Use ds_read\|write_b128",
	218	.dependencies = featureSet(&[_]Feature{}),
	219	};
	220	result[@enumToInt(Feature.enable_prt_strict_null)] = .{
	221	.llvm_name = "enable-prt-strict-null",
	222	.description = "Enable zeroing of result registers for sparse texture fetches",
	223	.dependencies = featureSet(&[_]Feature{}),
	224	};
	225	result[@enumToInt(Feature.fast_fmaf)] = .{
	226	.llvm_name = "fast-fmaf",
	227	.description = "Assuming f32 fma is at least as fast as mul + add",
	228	.dependencies = featureSet(&[_]Feature{}),
	229	};
	230	result[@enumToInt(Feature.flat_address_space)] = .{
	231	.llvm_name = "flat-address-space",
	232	.description = "Support flat address space",
	233	.dependencies = featureSet(&[_]Feature{}),
	234	};
	235	result[@enumToInt(Feature.flat_for_global)] = .{
	236	.llvm_name = "flat-for-global",
	237	.description = "Force to generate flat instruction for global",
	238	.dependencies = featureSet(&[_]Feature{}),
	239	};
	240	result[@enumToInt(Feature.flat_global_insts)] = .{
	241	.llvm_name = "flat-global-insts",
	242	.description = "Have global_* flat memory instructions",
	243	.dependencies = featureSet(&[_]Feature{}),
	244	};
	245	result[@enumToInt(Feature.flat_inst_offsets)] = .{
	246	.llvm_name = "flat-inst-offsets",
	247	.description = "Flat instructions have immediate offset addressing mode",
	248	.dependencies = featureSet(&[_]Feature{}),
	249	};
	250	result[@enumToInt(Feature.flat_scratch_insts)] = .{
	251	.llvm_name = "flat-scratch-insts",
	252	.description = "Have scratch_* flat memory instructions",
	253	.dependencies = featureSet(&[_]Feature{}),
	254	};
	255	result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
	256	.llvm_name = "flat-segment-offset-bug",
	257	.description = "GFX10 bug, inst_offset ignored in flat segment",
	258	.dependencies = featureSet(&[_]Feature{}),
	259	};
	260	result[@enumToInt(Feature.fma_mix_insts)] = .{
	261	.llvm_name = "fma-mix-insts",
	262	.description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
	263	.dependencies = featureSet(&[_]Feature{}),
	264	};
	265	result[@enumToInt(Feature.fmaf)] = .{
	266	.llvm_name = "fmaf",
	267	.description = "Enable single precision FMA (not as fast as mul+add, but fused)",
	268	.dependencies = featureSet(&[_]Feature{}),
	269	};
	270	result[@enumToInt(Feature.fp_exceptions)] = .{
	271	.llvm_name = "fp-exceptions",
	272	.description = "Enable floating point exceptions",
	273	.dependencies = featureSet(&[_]Feature{}),
	274	};
	275	result[@enumToInt(Feature.fp16_denormals)] = .{
	276	.llvm_name = "fp16-denormals",
	277	.description = "Enable half precision denormal handling",
	278	.dependencies = featureSet(&[_]Feature{
	279	.fp64_fp16_denormals,
	280	}),
	281	};
	282	result[@enumToInt(Feature.fp32_denormals)] = .{
	283	.llvm_name = "fp32-denormals",
	284	.description = "Enable single precision denormal handling",
	285	.dependencies = featureSet(&[_]Feature{}),
	286	};
	287	result[@enumToInt(Feature.fp64)] = .{
	288	.llvm_name = "fp64",
	289	.description = "Enable double precision operations",
	290	.dependencies = featureSet(&[_]Feature{}),
	291	};
	292	result[@enumToInt(Feature.fp64_denormals)] = .{
	293	.llvm_name = "fp64-denormals",
	294	.description = "Enable double and half precision denormal handling",
	295	.dependencies = featureSet(&[_]Feature{
	296	.fp64,
	297	.fp64_fp16_denormals,
	298	}),
	299	};
	300	result[@enumToInt(Feature.fp64_fp16_denormals)] = .{
	301	.llvm_name = "fp64-fp16-denormals",
	302	.description = "Enable double and half precision denormal handling",
	303	.dependencies = featureSet(&[_]Feature{
	304	.fp64,
	305	}),
	306	};
	307	result[@enumToInt(Feature.gcn3_encoding)] = .{
	308	.llvm_name = "gcn3-encoding",
	309	.description = "Encoding format for VI",
	310	.dependencies = featureSet(&[_]Feature{}),
	311	};
	312	result[@enumToInt(Feature.gfx10)] = .{
	313	.llvm_name = "gfx10",
	314	.description = "GFX10 GPU generation",
	315	.dependencies = featureSet(&[_]Feature{
	316	.@"16_bit_insts",
	317	.add_no_carry_insts,
	318	.aperture_regs,
	319	.ci_insts,
	320	.dpp,
	321	.dpp8,
	322	.fast_fmaf,
	323	.flat_address_space,
	324	.flat_global_insts,
	325	.flat_inst_offsets,
	326	.flat_scratch_insts,
	327	.fma_mix_insts,
	328	.fp64,
	329	.gfx10_insts,
	330	.gfx8_insts,
	331	.gfx9_insts,
	332	.int_clamp_insts,
	333	.inv_2pi_inline_imm,
	334	.localmemorysize65536,
	335	.mimg_r128,
	336	.movrel,
	337	.no_data_dep_hazard,
	338	.no_sdst_cmpx,
	339	.no_sram_ecc_support,
	340	.pk_fmac_f16_inst,
	341	.register_banking,
	342	.s_memrealtime,
	343	.sdwa,
	344	.sdwa_omod,
	345	.sdwa_scalar,
	346	.sdwa_sdst,
	347	.vop3_literal,
	348	.vop3p,
	349	.vscnt,
	350	}),
	351	};
	352	result[@enumToInt(Feature.gfx10_insts)] = .{
	353	.llvm_name = "gfx10-insts",
	354	.description = "Additional instructions for GFX10+",
	355	.dependencies = featureSet(&[_]Feature{}),
	356	};
	357	result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
	358	.llvm_name = "gfx7-gfx8-gfx9-insts",
	359	.description = "Instructions shared in GFX7, GFX8, GFX9",
	360	.dependencies = featureSet(&[_]Feature{}),
	361	};
	362	result[@enumToInt(Feature.gfx8_insts)] = .{
	363	.llvm_name = "gfx8-insts",
	364	.description = "Additional instructions for GFX8+",
	365	.dependencies = featureSet(&[_]Feature{}),
	366	};
	367	result[@enumToInt(Feature.gfx9)] = .{
	368	.llvm_name = "gfx9",
	369	.description = "GFX9 GPU generation",
	370	.dependencies = featureSet(&[_]Feature{
	371	.@"16_bit_insts",
	372	.add_no_carry_insts,
	373	.aperture_regs,
	374	.ci_insts,
	375	.dpp,
	376	.fast_fmaf,
	377	.flat_address_space,
	378	.flat_global_insts,
	379	.flat_inst_offsets,
	380	.flat_scratch_insts,
	381	.fp64,
	382	.gcn3_encoding,
	383	.gfx7_gfx8_gfx9_insts,
	384	.gfx8_insts,
	385	.gfx9_insts,
	386	.int_clamp_insts,
	387	.inv_2pi_inline_imm,
	388	.localmemorysize65536,
	389	.r128_a16,
	390	.s_memrealtime,
	391	.scalar_atomics,
	392	.scalar_flat_scratch_insts,
	393	.scalar_stores,
	394	.sdwa,
	395	.sdwa_omod,
	396	.sdwa_scalar,
	397	.sdwa_sdst,
	398	.vgpr_index_mode,
	399	.vop3p,
	400	.wavefrontsize64,
	401	}),
	402	};
	403	result[@enumToInt(Feature.gfx9_insts)] = .{
	404	.llvm_name = "gfx9-insts",
	405	.description = "Additional instructions for GFX9+",
	406	.dependencies = featureSet(&[_]Feature{}),
	407	};
	408	result[@enumToInt(Feature.half_rate_64_ops)] = .{
	409	.llvm_name = "half-rate-64-ops",
	410	.description = "Most fp64 instructions are half rate instead of quarter",
	411	.dependencies = featureSet(&[_]Feature{}),
	412	};
	413	result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
	414	.llvm_name = "inst-fwd-prefetch-bug",
	415	.description = "S_INST_PREFETCH instruction causes shader to hang",
	416	.dependencies = featureSet(&[_]Feature{}),
	417	};
	418	result[@enumToInt(Feature.int_clamp_insts)] = .{
	419	.llvm_name = "int-clamp-insts",
	420	.description = "Support clamp for integer destination",
	421	.dependencies = featureSet(&[_]Feature{}),
	422	};
	423	result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{
	424	.llvm_name = "inv-2pi-inline-imm",
	425	.description = "Has 1 / (2 * pi) as inline immediate",
	426	.dependencies = featureSet(&[_]Feature{}),
	427	};
	428	result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{
	429	.llvm_name = "lds-branch-vmem-war-hazard",
	430	.description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
	431	.dependencies = featureSet(&[_]Feature{}),
	432	};
	433	result[@enumToInt(Feature.lds_misaligned_bug)] = .{
	434	.llvm_name = "lds-misaligned-bug",
	435	.description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
	436	.dependencies = featureSet(&[_]Feature{}),
	437	};
	438	result[@enumToInt(Feature.ldsbankcount16)] = .{
	439	.llvm_name = "ldsbankcount16",
	440	.description = "The number of LDS banks per compute unit.",
	441	.dependencies = featureSet(&[_]Feature{}),
	442	};
	443	result[@enumToInt(Feature.ldsbankcount32)] = .{
	444	.llvm_name = "ldsbankcount32",
	445	.description = "The number of LDS banks per compute unit.",
	446	.dependencies = featureSet(&[_]Feature{}),
	447	};
	448	result[@enumToInt(Feature.load_store_opt)] = .{
	449	.llvm_name = "load-store-opt",
	450	.description = "Enable SI load/store optimizer pass",
	451	.dependencies = featureSet(&[_]Feature{}),
	452	};
	453	result[@enumToInt(Feature.localmemorysize0)] = .{
	454	.llvm_name = "localmemorysize0",
	455	.description = "The size of local memory in bytes",
	456	.dependencies = featureSet(&[_]Feature{}),
	457	};
	458	result[@enumToInt(Feature.localmemorysize32768)] = .{
	459	.llvm_name = "localmemorysize32768",
	460	.description = "The size of local memory in bytes",
	461	.dependencies = featureSet(&[_]Feature{}),
	462	};
	463	result[@enumToInt(Feature.localmemorysize65536)] = .{
	464	.llvm_name = "localmemorysize65536",
	465	.description = "The size of local memory in bytes",
	466	.dependencies = featureSet(&[_]Feature{}),
	467	};
	468	result[@enumToInt(Feature.mad_mix_insts)] = .{
	469	.llvm_name = "mad-mix-insts",
	470	.description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
	471	.dependencies = featureSet(&[_]Feature{}),
	472	};
	473	result[@enumToInt(Feature.mai_insts)] = .{
	474	.llvm_name = "mai-insts",
	475	.description = "Has mAI instructions",
	476	.dependencies = featureSet(&[_]Feature{}),
	477	};
	478	result[@enumToInt(Feature.max_private_element_size_16)] = .{
	479	.llvm_name = "max-private-element-size-16",
	480	.description = "Maximum private access size may be 16",
	481	.dependencies = featureSet(&[_]Feature{}),
	482	};
	483	result[@enumToInt(Feature.max_private_element_size_4)] = .{
	484	.llvm_name = "max-private-element-size-4",
	485	.description = "Maximum private access size may be 4",
	486	.dependencies = featureSet(&[_]Feature{}),
	487	};
	488	result[@enumToInt(Feature.max_private_element_size_8)] = .{
	489	.llvm_name = "max-private-element-size-8",
	490	.description = "Maximum private access size may be 8",
	491	.dependencies = featureSet(&[_]Feature{}),
	492	};
	493	result[@enumToInt(Feature.mimg_r128)] = .{
	494	.llvm_name = "mimg-r128",
	495	.description = "Support 128-bit texture resources",
	496	.dependencies = featureSet(&[_]Feature{}),
	497	};
	498	result[@enumToInt(Feature.movrel)] = .{
	499	.llvm_name = "movrel",
	500	.description = "Has v_movrel*_b32 instructions",
	501	.dependencies = featureSet(&[_]Feature{}),
	502	};
	503	result[@enumToInt(Feature.no_data_dep_hazard)] = .{
	504	.llvm_name = "no-data-dep-hazard",
	505	.description = "Does not need SW waitstates",
	506	.dependencies = featureSet(&[_]Feature{}),
	507	};
	508	result[@enumToInt(Feature.no_sdst_cmpx)] = .{
	509	.llvm_name = "no-sdst-cmpx",
	510	.description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
	511	.dependencies = featureSet(&[_]Feature{}),
	512	};
	513	result[@enumToInt(Feature.no_sram_ecc_support)] = .{
	514	.llvm_name = "no-sram-ecc-support",
	515	.description = "Hardware does not support SRAM ECC",
	516	.dependencies = featureSet(&[_]Feature{}),
	517	};
	518	result[@enumToInt(Feature.no_xnack_support)] = .{
	519	.llvm_name = "no-xnack-support",
	520	.description = "Hardware does not support XNACK",
	521	.dependencies = featureSet(&[_]Feature{}),
	522	};
	523	result[@enumToInt(Feature.nsa_encoding)] = .{
	524	.llvm_name = "nsa-encoding",
	525	.description = "Support NSA encoding for image instructions",
	526	.dependencies = featureSet(&[_]Feature{}),
	527	};
	528	result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
	529	.llvm_name = "nsa-to-vmem-bug",
	530	.description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
	531	.dependencies = featureSet(&[_]Feature{}),
	532	};
	533	result[@enumToInt(Feature.offset_3f_bug)] = .{
	534	.llvm_name = "offset-3f-bug",
	535	.description = "Branch offset of 3f hardware bug",
	536	.dependencies = featureSet(&[_]Feature{}),
	537	};
	538	result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
	539	.llvm_name = "pk-fmac-f16-inst",
	540	.description = "Has v_pk_fmac_f16 instruction",
	541	.dependencies = featureSet(&[_]Feature{}),
	542	};
	543	result[@enumToInt(Feature.promote_alloca)] = .{
	544	.llvm_name = "promote-alloca",
	545	.description = "Enable promote alloca pass",
	546	.dependencies = featureSet(&[_]Feature{}),
	547	};
	548	result[@enumToInt(Feature.r128_a16)] = .{
	549	.llvm_name = "r128-a16",
	550	.description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
	551	.dependencies = featureSet(&[_]Feature{}),
	552	};
	553	result[@enumToInt(Feature.register_banking)] = .{
	554	.llvm_name = "register-banking",
	555	.description = "Has register banking",
	556	.dependencies = featureSet(&[_]Feature{}),
	557	};
	558	result[@enumToInt(Feature.s_memrealtime)] = .{
	559	.llvm_name = "s-memrealtime",
	560	.description = "Has s_memrealtime instruction",
	561	.dependencies = featureSet(&[_]Feature{}),
	562	};
	563	result[@enumToInt(Feature.scalar_atomics)] = .{
	564	.llvm_name = "scalar-atomics",
	565	.description = "Has atomic scalar memory instructions",
	566	.dependencies = featureSet(&[_]Feature{}),
	567	};
	568	result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{
	569	.llvm_name = "scalar-flat-scratch-insts",
	570	.description = "Have s_scratch_* flat memory instructions",
	571	.dependencies = featureSet(&[_]Feature{}),
	572	};
	573	result[@enumToInt(Feature.scalar_stores)] = .{
	574	.llvm_name = "scalar-stores",
	575	.description = "Has store scalar memory instructions",
	576	.dependencies = featureSet(&[_]Feature{}),
	577	};
	578	result[@enumToInt(Feature.sdwa)] = .{
	579	.llvm_name = "sdwa",
	580	.description = "Support SDWA (Sub-DWORD Addressing) extension",
	581	.dependencies = featureSet(&[_]Feature{}),
	582	};
	583	result[@enumToInt(Feature.sdwa_mav)] = .{
	584	.llvm_name = "sdwa-mav",
	585	.description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
	586	.dependencies = featureSet(&[_]Feature{}),
	587	};
	588	result[@enumToInt(Feature.sdwa_omod)] = .{
	589	.llvm_name = "sdwa-omod",
	590	.description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
	591	.dependencies = featureSet(&[_]Feature{}),
	592	};
	593	result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{
	594	.llvm_name = "sdwa-out-mods-vopc",
	595	.description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
	596	.dependencies = featureSet(&[_]Feature{}),
	597	};
	598	result[@enumToInt(Feature.sdwa_scalar)] = .{
	599	.llvm_name = "sdwa-scalar",
	600	.description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
	601	.dependencies = featureSet(&[_]Feature{}),
	602	};
	603	result[@enumToInt(Feature.sdwa_sdst)] = .{
	604	.llvm_name = "sdwa-sdst",
	605	.description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
	606	.dependencies = featureSet(&[_]Feature{}),
	607	};
	608	result[@enumToInt(Feature.sea_islands)] = .{
	609	.llvm_name = "sea-islands",
	610	.description = "SEA_ISLANDS GPU generation",
	611	.dependencies = featureSet(&[_]Feature{
	612	.ci_insts,
	613	.flat_address_space,
	614	.fp64,
	615	.gfx7_gfx8_gfx9_insts,
	616	.localmemorysize65536,
	617	.mimg_r128,
	618	.movrel,
	619	.no_sram_ecc_support,
	620	.trig_reduced_range,
	621	.wavefrontsize64,
	622	}),
	623	};
	624	result[@enumToInt(Feature.sgpr_init_bug)] = .{
	625	.llvm_name = "sgpr-init-bug",
	626	.description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
	627	.dependencies = featureSet(&[_]Feature{}),
	628	};
	629	result[@enumToInt(Feature.si_scheduler)] = .{
	630	.llvm_name = "si-scheduler",
	631	.description = "Enable SI Machine Scheduler",
	632	.dependencies = featureSet(&[_]Feature{}),
	633	};
	634	result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{
	635	.llvm_name = "smem-to-vector-write-hazard",
	636	.description = "s_load_dword followed by v_cmp page faults",
	637	.dependencies = featureSet(&[_]Feature{}),
	638	};
	639	result[@enumToInt(Feature.southern_islands)] = .{
	640	.llvm_name = "southern-islands",
	641	.description = "SOUTHERN_ISLANDS GPU generation",
	642	.dependencies = featureSet(&[_]Feature{
	643	.fp64,
	644	.ldsbankcount32,
	645	.localmemorysize32768,
	646	.mimg_r128,
	647	.movrel,
	648	.no_sram_ecc_support,
	649	.no_xnack_support,
	650	.trig_reduced_range,
	651	.wavefrontsize64,
	652	}),
	653	};
	654	result[@enumToInt(Feature.sram_ecc)] = .{
	655	.llvm_name = "sram-ecc",
	656	.description = "Enable SRAM ECC",
	657	.dependencies = featureSet(&[_]Feature{}),
	658	};
	659	result[@enumToInt(Feature.trap_handler)] = .{
	660	.llvm_name = "trap-handler",
	661	.description = "Trap handler support",
	662	.dependencies = featureSet(&[_]Feature{}),
	663	};
	664	result[@enumToInt(Feature.trig_reduced_range)] = .{
	665	.llvm_name = "trig-reduced-range",
	666	.description = "Requires use of fract on arguments to trig instructions",
	667	.dependencies = featureSet(&[_]Feature{}),
	668	};
	669	result[@enumToInt(Feature.unaligned_buffer_access)] = .{
	670	.llvm_name = "unaligned-buffer-access",
	671	.description = "Support unaligned global loads and stores",
	672	.dependencies = featureSet(&[_]Feature{}),
	673	};
	674	result[@enumToInt(Feature.unaligned_scratch_access)] = .{
	675	.llvm_name = "unaligned-scratch-access",
	676	.description = "Support unaligned scratch loads and stores",
	677	.dependencies = featureSet(&[_]Feature{}),
	678	};
	679	result[@enumToInt(Feature.unpacked_d16_vmem)] = .{
	680	.llvm_name = "unpacked-d16-vmem",
	681	.description = "Has unpacked d16 vmem instructions",
	682	.dependencies = featureSet(&[_]Feature{}),
	683	};
	684	result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{
	685	.llvm_name = "unsafe-ds-offset-folding",
	686	.description = "Force using DS instruction immediate offsets on SI",
	687	.dependencies = featureSet(&[_]Feature{}),
	688	};
	689	result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
	690	.llvm_name = "vcmpx-exec-war-hazard",
	691	.description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
	692	.dependencies = featureSet(&[_]Feature{}),
	693	};
	694	result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{
	695	.llvm_name = "vcmpx-permlane-hazard",
	696	.description = "TODO: describe me",
	697	.dependencies = featureSet(&[_]Feature{}),
	698	};
	699	result[@enumToInt(Feature.vgpr_index_mode)] = .{
	700	.llvm_name = "vgpr-index-mode",
	701	.description = "Has VGPR mode register indexing",
	702	.dependencies = featureSet(&[_]Feature{}),
	703	};
	704	result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{
	705	.llvm_name = "vmem-to-scalar-write-hazard",
	706	.description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
	707	.dependencies = featureSet(&[_]Feature{}),
	708	};
	709	result[@enumToInt(Feature.volcanic_islands)] = .{
	710	.llvm_name = "volcanic-islands",
	711	.description = "VOLCANIC_ISLANDS GPU generation",
	712	.dependencies = featureSet(&[_]Feature{
	713	.@"16_bit_insts",
	714	.ci_insts,
	715	.dpp,
	716	.flat_address_space,
	717	.fp64,
	718	.gcn3_encoding,
	719	.gfx7_gfx8_gfx9_insts,
	720	.gfx8_insts,
	721	.int_clamp_insts,
	722	.inv_2pi_inline_imm,
	723	.localmemorysize65536,
	724	.mimg_r128,
	725	.movrel,
	726	.no_sram_ecc_support,
	727	.s_memrealtime,
	728	.scalar_stores,
	729	.sdwa,
	730	.sdwa_mav,
	731	.sdwa_out_mods_vopc,
	732	.trig_reduced_range,
	733	.vgpr_index_mode,
	734	.wavefrontsize64,
	735	}),
	736	};
	737	result[@enumToInt(Feature.vop3_literal)] = .{
	738	.llvm_name = "vop3-literal",
	739	.description = "Can use one literal in VOP3",
	740	.dependencies = featureSet(&[_]Feature{}),
	741	};
	742	result[@enumToInt(Feature.vop3p)] = .{
	743	.llvm_name = "vop3p",
	744	.description = "Has VOP3P packed instructions",
	745	.dependencies = featureSet(&[_]Feature{}),
	746	};
	747	result[@enumToInt(Feature.vscnt)] = .{
	748	.llvm_name = "vscnt",
	749	.description = "Has separate store vscnt counter",
	750	.dependencies = featureSet(&[_]Feature{}),
	751	};
	752	result[@enumToInt(Feature.wavefrontsize16)] = .{
	753	.llvm_name = "wavefrontsize16",
	754	.description = "The number of threads per wavefront",
	755	.dependencies = featureSet(&[_]Feature{}),
	756	};
	757	result[@enumToInt(Feature.wavefrontsize32)] = .{
	758	.llvm_name = "wavefrontsize32",
	759	.description = "The number of threads per wavefront",
	760	.dependencies = featureSet(&[_]Feature{}),
	761	};
	762	result[@enumToInt(Feature.wavefrontsize64)] = .{
	763	.llvm_name = "wavefrontsize64",
	764	.description = "The number of threads per wavefront",
	765	.dependencies = featureSet(&[_]Feature{}),
	766	};
	767	result[@enumToInt(Feature.xnack)] = .{
	768	.llvm_name = "xnack",
	769	.description = "Enable XNACK support",
	770	.dependencies = featureSet(&[_]Feature{}),
	771	};
	772	const ti = @typeInfo(Feature);
	773	for (result) \|*elem, i\| {
	774	elem.index = i;
	775	elem.name = ti.Enum.fields[i].name;
	776	}
	777	break :blk result;
	778	};
	779
	780	pub const cpu = struct {
	781	pub const bonaire = Cpu{
	782	.name = "bonaire",
	783	.llvm_name = "bonaire",
	784	.features = featureSet(&[_]Feature{
	785	.code_object_v3,
	786	.ldsbankcount32,
	787	.no_xnack_support,
	788	.sea_islands,
	789	}),
	790	};
	791	pub const carrizo = Cpu{
	792	.name = "carrizo",
	793	.llvm_name = "carrizo",
	794	.features = featureSet(&[_]Feature{
	795	.code_object_v3,
	796	.fast_fmaf,
	797	.half_rate_64_ops,
	798	.ldsbankcount32,
	799	.unpacked_d16_vmem,
	800	.volcanic_islands,
	801	.xnack,
	802	}),
	803	};
	804	pub const fiji = Cpu{
	805	.name = "fiji",
	806	.llvm_name = "fiji",
	807	.features = featureSet(&[_]Feature{
	808	.code_object_v3,
	809	.ldsbankcount32,
	810	.no_xnack_support,
	811	.unpacked_d16_vmem,
	812	.volcanic_islands,
	813	}),
	814	};
	815	pub const generic = Cpu{
	816	.name = "generic",
	817	.llvm_name = "generic",
	818	.features = featureSet(&[_]Feature{
	819	.wavefrontsize64,
	820	}),
	821	};
	822	pub const generic_hsa = Cpu{
	823	.name = "generic_hsa",
	824	.llvm_name = "generic-hsa",
	825	.features = featureSet(&[_]Feature{
	826	.flat_address_space,
	827	.wavefrontsize64,
	828	}),
	829	};
	830	pub const gfx1010 = Cpu{
	831	.name = "gfx1010",
	832	.llvm_name = "gfx1010",
	833	.features = featureSet(&[_]Feature{
	834	.code_object_v3,
	835	.dl_insts,
	836	.flat_segment_offset_bug,
	837	.gfx10,
	838	.inst_fwd_prefetch_bug,
	839	.lds_branch_vmem_war_hazard,
	840	.lds_misaligned_bug,
	841	.ldsbankcount32,
	842	.no_xnack_support,
	843	.nsa_encoding,
	844	.nsa_to_vmem_bug,
	845	.offset_3f_bug,
	846	.scalar_atomics,
	847	.scalar_flat_scratch_insts,
	848	.scalar_stores,
	849	.smem_to_vector_write_hazard,
	850	.vcmpx_exec_war_hazard,
	851	.vcmpx_permlane_hazard,
	852	.vmem_to_scalar_write_hazard,
	853	.wavefrontsize32,
	854	}),
	855	};
	856	pub const gfx1011 = Cpu{
	857	.name = "gfx1011",
	858	.llvm_name = "gfx1011",
	859	.features = featureSet(&[_]Feature{
	860	.code_object_v3,
	861	.dl_insts,
	862	.dot1_insts,
	863	.dot2_insts,
	864	.dot5_insts,
	865	.dot6_insts,
	866	.flat_segment_offset_bug,
	867	.gfx10,
	868	.inst_fwd_prefetch_bug,
	869	.lds_branch_vmem_war_hazard,
	870	.ldsbankcount32,
	871	.no_xnack_support,
	872	.nsa_encoding,
	873	.nsa_to_vmem_bug,
	874	.offset_3f_bug,
	875	.scalar_atomics,
	876	.scalar_flat_scratch_insts,
	877	.scalar_stores,
	878	.smem_to_vector_write_hazard,
	879	.vcmpx_exec_war_hazard,
	880	.vcmpx_permlane_hazard,
	881	.vmem_to_scalar_write_hazard,
	882	.wavefrontsize32,
	883	}),
	884	};
	885	pub const gfx1012 = Cpu{
	886	.name = "gfx1012",
	887	.llvm_name = "gfx1012",
	888	.features = featureSet(&[_]Feature{
	889	.code_object_v3,
	890	.dl_insts,
	891	.dot1_insts,
	892	.dot2_insts,
	893	.dot5_insts,
	894	.dot6_insts,
	895	.flat_segment_offset_bug,
	896	.gfx10,
	897	.inst_fwd_prefetch_bug,
	898	.lds_branch_vmem_war_hazard,
	899	.lds_misaligned_bug,
	900	.ldsbankcount32,
	901	.no_xnack_support,
	902	.nsa_encoding,
	903	.nsa_to_vmem_bug,
	904	.offset_3f_bug,
	905	.scalar_atomics,
	906	.scalar_flat_scratch_insts,
	907	.scalar_stores,
	908	.smem_to_vector_write_hazard,
	909	.vcmpx_exec_war_hazard,
	910	.vcmpx_permlane_hazard,
	911	.vmem_to_scalar_write_hazard,
	912	.wavefrontsize32,
	913	}),
	914	};
	915	pub const gfx600 = Cpu{
	916	.name = "gfx600",
	917	.llvm_name = "gfx600",
	918	.features = featureSet(&[_]Feature{
	919	.code_object_v3,
	920	.fast_fmaf,
	921	.half_rate_64_ops,
	922	.ldsbankcount32,
	923	.no_xnack_support,
	924	.southern_islands,
	925	}),
	926	};
	927	pub const gfx601 = Cpu{
	928	.name = "gfx601",
	929	.llvm_name = "gfx601",
	930	.features = featureSet(&[_]Feature{
	931	.code_object_v3,
	932	.ldsbankcount32,
	933	.no_xnack_support,
	934	.southern_islands,
	935	}),
	936	};
	937	pub const gfx700 = Cpu{
	938	.name = "gfx700",
	939	.llvm_name = "gfx700",
	940	.features = featureSet(&[_]Feature{
	941	.code_object_v3,
	942	.ldsbankcount32,
	943	.no_xnack_support,
	944	.sea_islands,
	945	}),
	946	};
	947	pub const gfx701 = Cpu{
	948	.name = "gfx701",
	949	.llvm_name = "gfx701",
	950	.features = featureSet(&[_]Feature{
	951	.code_object_v3,
	952	.fast_fmaf,
	953	.half_rate_64_ops,
	954	.ldsbankcount32,
	955	.no_xnack_support,
	956	.sea_islands,
	957	}),
	958	};
	959	pub const gfx702 = Cpu{
	960	.name = "gfx702",
	961	.llvm_name = "gfx702",
	962	.features = featureSet(&[_]Feature{
	963	.code_object_v3,
	964	.fast_fmaf,
	965	.ldsbankcount16,
	966	.no_xnack_support,
	967	.sea_islands,
	968	}),
	969	};
	970	pub const gfx703 = Cpu{
	971	.name = "gfx703",
	972	.llvm_name = "gfx703",
	973	.features = featureSet(&[_]Feature{
	974	.code_object_v3,
	975	.ldsbankcount16,
	976	.no_xnack_support,
	977	.sea_islands,
	978	}),
	979	};
	980	pub const gfx704 = Cpu{
	981	.name = "gfx704",
	982	.llvm_name = "gfx704",
	983	.features = featureSet(&[_]Feature{
	984	.code_object_v3,
	985	.ldsbankcount32,
	986	.no_xnack_support,
	987	.sea_islands,
	988	}),
	989	};
	990	pub const gfx801 = Cpu{
	991	.name = "gfx801",
	992	.llvm_name = "gfx801",
	993	.features = featureSet(&[_]Feature{
	994	.code_object_v3,
	995	.fast_fmaf,
	996	.half_rate_64_ops,
	997	.ldsbankcount32,
	998	.unpacked_d16_vmem,
	999	.volcanic_islands,
	1000	.xnack,
	1001	}),
	1002	};
	1003	pub const gfx802 = Cpu{
	1004	.name = "gfx802",
	1005	.llvm_name = "gfx802",
	1006	.features = featureSet(&[_]Feature{
	1007	.code_object_v3,
	1008	.ldsbankcount32,
	1009	.no_xnack_support,
	1010	.sgpr_init_bug,
	1011	.unpacked_d16_vmem,
	1012	.volcanic_islands,
	1013	}),
	1014	};
	1015	pub const gfx803 = Cpu{
	1016	.name = "gfx803",
	1017	.llvm_name = "gfx803",
	1018	.features = featureSet(&[_]Feature{
	1019	.code_object_v3,
	1020	.ldsbankcount32,
	1021	.no_xnack_support,
	1022	.unpacked_d16_vmem,
	1023	.volcanic_islands,
	1024	}),
	1025	};
	1026	pub const gfx810 = Cpu{
	1027	.name = "gfx810",
	1028	.llvm_name = "gfx810",
	1029	.features = featureSet(&[_]Feature{
	1030	.code_object_v3,
	1031	.ldsbankcount16,
	1032	.volcanic_islands,
	1033	.xnack,
	1034	}),
	1035	};
	1036	pub const gfx900 = Cpu{
	1037	.name = "gfx900",
	1038	.llvm_name = "gfx900",
	1039	.features = featureSet(&[_]Feature{
	1040	.code_object_v3,
	1041	.gfx9,
	1042	.ldsbankcount32,
	1043	.mad_mix_insts,
	1044	.no_sram_ecc_support,
	1045	.no_xnack_support,
	1046	}),
	1047	};
	1048	pub const gfx902 = Cpu{
	1049	.name = "gfx902",
	1050	.llvm_name = "gfx902",
	1051	.features = featureSet(&[_]Feature{
	1052	.code_object_v3,
	1053	.gfx9,
	1054	.ldsbankcount32,
	1055	.mad_mix_insts,
	1056	.no_sram_ecc_support,
	1057	.xnack,
	1058	}),
	1059	};
	1060	pub const gfx904 = Cpu{
	1061	.name = "gfx904",
	1062	.llvm_name = "gfx904",
	1063	.features = featureSet(&[_]Feature{
	1064	.code_object_v3,
	1065	.fma_mix_insts,
	1066	.gfx9,
	1067	.ldsbankcount32,
	1068	.no_sram_ecc_support,
	1069	.no_xnack_support,
	1070	}),
	1071	};
	1072	pub const gfx906 = Cpu{
	1073	.name = "gfx906",
	1074	.llvm_name = "gfx906",
	1075	.features = featureSet(&[_]Feature{
	1076	.code_object_v3,
	1077	.dl_insts,
	1078	.dot1_insts,
	1079	.dot2_insts,
	1080	.fma_mix_insts,
	1081	.gfx9,
	1082	.half_rate_64_ops,
	1083	.ldsbankcount32,
	1084	.no_xnack_support,
	1085	}),
	1086	};
	1087	pub const gfx908 = Cpu{
	1088	.name = "gfx908",
	1089	.llvm_name = "gfx908",
	1090	.features = featureSet(&[_]Feature{
	1091	.atomic_fadd_insts,
	1092	.code_object_v3,
	1093	.dl_insts,
	1094	.dot1_insts,
	1095	.dot2_insts,
	1096	.dot3_insts,
	1097	.dot4_insts,
	1098	.dot5_insts,
	1099	.dot6_insts,
	1100	.fma_mix_insts,
	1101	.gfx9,
	1102	.half_rate_64_ops,
	1103	.ldsbankcount32,
	1104	.mai_insts,
	1105	.pk_fmac_f16_inst,
	1106	.sram_ecc,
	1107	}),
	1108	};
	1109	pub const gfx909 = Cpu{
	1110	.name = "gfx909",
	1111	.llvm_name = "gfx909",
	1112	.features = featureSet(&[_]Feature{
	1113	.code_object_v3,
	1114	.gfx9,
	1115	.ldsbankcount32,
	1116	.mad_mix_insts,
	1117	.xnack,
	1118	}),
	1119	};
	1120	pub const hainan = Cpu{
	1121	.name = "hainan",
	1122	.llvm_name = "hainan",
	1123	.features = featureSet(&[_]Feature{
	1124	.code_object_v3,
	1125	.ldsbankcount32,
	1126	.no_xnack_support,
	1127	.southern_islands,
	1128	}),
	1129	};
	1130	pub const hawaii = Cpu{
	1131	.name = "hawaii",
	1132	.llvm_name = "hawaii",
	1133	.features = featureSet(&[_]Feature{
	1134	.code_object_v3,
	1135	.fast_fmaf,
	1136	.half_rate_64_ops,
	1137	.ldsbankcount32,
	1138	.no_xnack_support,
	1139	.sea_islands,
	1140	}),
	1141	};
	1142	pub const iceland = Cpu{
	1143	.name = "iceland",
	1144	.llvm_name = "iceland",
	1145	.features = featureSet(&[_]Feature{
	1146	.code_object_v3,
	1147	.ldsbankcount32,
	1148	.no_xnack_support,
	1149	.sgpr_init_bug,
	1150	.unpacked_d16_vmem,
	1151	.volcanic_islands,
	1152	}),
	1153	};
	1154	pub const kabini = Cpu{
	1155	.name = "kabini",
	1156	.llvm_name = "kabini",
	1157	.features = featureSet(&[_]Feature{
	1158	.code_object_v3,
	1159	.ldsbankcount16,
	1160	.no_xnack_support,
	1161	.sea_islands,
	1162	}),
	1163	};
	1164	pub const kaveri = Cpu{
	1165	.name = "kaveri",
	1166	.llvm_name = "kaveri",
	1167	.features = featureSet(&[_]Feature{
	1168	.code_object_v3,
	1169	.ldsbankcount32,
	1170	.no_xnack_support,
	1171	.sea_islands,
	1172	}),
	1173	};
	1174	pub const mullins = Cpu{
	1175	.name = "mullins",
	1176	.llvm_name = "mullins",
	1177	.features = featureSet(&[_]Feature{
	1178	.code_object_v3,
	1179	.ldsbankcount16,
	1180	.no_xnack_support,
	1181	.sea_islands,
	1182	}),
	1183	};
	1184	pub const oland = Cpu{
	1185	.name = "oland",
	1186	.llvm_name = "oland",
	1187	.features = featureSet(&[_]Feature{
	1188	.code_object_v3,
	1189	.ldsbankcount32,
	1190	.no_xnack_support,
	1191	.southern_islands,
	1192	}),
	1193	};
	1194	pub const pitcairn = Cpu{
	1195	.name = "pitcairn",
	1196	.llvm_name = "pitcairn",
	1197	.features = featureSet(&[_]Feature{
	1198	.code_object_v3,
	1199	.ldsbankcount32,
	1200	.no_xnack_support,
	1201	.southern_islands,
	1202	}),
	1203	};
	1204	pub const polaris10 = Cpu{
	1205	.name = "polaris10",
	1206	.llvm_name = "polaris10",
	1207	.features = featureSet(&[_]Feature{
	1208	.code_object_v3,
	1209	.ldsbankcount32,
	1210	.no_xnack_support,
	1211	.unpacked_d16_vmem,
	1212	.volcanic_islands,
	1213	}),
	1214	};
	1215	pub const polaris11 = Cpu{
	1216	.name = "polaris11",
	1217	.llvm_name = "polaris11",
	1218	.features = featureSet(&[_]Feature{
	1219	.code_object_v3,
	1220	.ldsbankcount32,
	1221	.no_xnack_support,
	1222	.unpacked_d16_vmem,
	1223	.volcanic_islands,
	1224	}),
	1225	};
	1226	pub const stoney = Cpu{
	1227	.name = "stoney",
	1228	.llvm_name = "stoney",
	1229	.features = featureSet(&[_]Feature{
	1230	.code_object_v3,
	1231	.ldsbankcount16,
	1232	.volcanic_islands,
	1233	.xnack,
	1234	}),
	1235	};
	1236	pub const tahiti = Cpu{
	1237	.name = "tahiti",
	1238	.llvm_name = "tahiti",
	1239	.features = featureSet(&[_]Feature{
	1240	.code_object_v3,
	1241	.fast_fmaf,
	1242	.half_rate_64_ops,
	1243	.ldsbankcount32,
	1244	.no_xnack_support,
	1245	.southern_islands,
	1246	}),
	1247	};
	1248	pub const tonga = Cpu{
	1249	.name = "tonga",
	1250	.llvm_name = "tonga",
	1251	.features = featureSet(&[_]Feature{
	1252	.code_object_v3,
	1253	.ldsbankcount32,
	1254	.no_xnack_support,
	1255	.sgpr_init_bug,
	1256	.unpacked_d16_vmem,
	1257	.volcanic_islands,
	1258	}),
	1259	};
	1260	pub const verde = Cpu{
	1261	.name = "verde",
	1262	.llvm_name = "verde",
	1263	.features = featureSet(&[_]Feature{
	1264	.code_object_v3,
	1265	.ldsbankcount32,
	1266	.no_xnack_support,
	1267	.southern_islands,
	1268	}),
	1269	};
	1270	};
	1271
	1272	/// All amdgpu CPUs, sorted alphabetically by name.
	1273	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	1274	/// compiler has inefficient memory and CPU usage, affecting build times.
	1275	pub const all_cpus = &[_]*const Cpu{
	1276	&cpu.bonaire,
	1277	&cpu.carrizo,
	1278	&cpu.fiji,
	1279	&cpu.generic,
	1280	&cpu.generic_hsa,
	1281	&cpu.gfx1010,
	1282	&cpu.gfx1011,
	1283	&cpu.gfx1012,
	1284	&cpu.gfx600,
	1285	&cpu.gfx601,
	1286	&cpu.gfx700,
	1287	&cpu.gfx701,
	1288	&cpu.gfx702,
	1289	&cpu.gfx703,
	1290	&cpu.gfx704,
	1291	&cpu.gfx801,
	1292	&cpu.gfx802,
	1293	&cpu.gfx803,
	1294	&cpu.gfx810,
	1295	&cpu.gfx900,
	1296	&cpu.gfx902,
	1297	&cpu.gfx904,
	1298	&cpu.gfx906,
	1299	&cpu.gfx908,
	1300	&cpu.gfx909,
	1301	&cpu.hainan,
	1302	&cpu.hawaii,
	1303	&cpu.iceland,
	1304	&cpu.kabini,
	1305	&cpu.kaveri,
	1306	&cpu.mullins,
	1307	&cpu.oland,
	1308	&cpu.pitcairn,
	1309	&cpu.polaris10,
	1310	&cpu.polaris11,
	1311	&cpu.stoney,
	1312	&cpu.tahiti,
	1313	&cpu.tonga,
	1314	&cpu.verde,
	1315	};

lib/std/target/arm.zig created+2333

...	...	@@ -0,0 +1,2333 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	@"32bit",
	6	@"8msecext",
	7	a12,
	8	a15,
	9	a17,
	10	a32,
	11	a35,
	12	a5,
	13	a53,
	14	a55,
	15	a57,
	16	a7,
	17	a72,
	18	a73,
	19	a75,
	20	a76,
	21	a8,
	22	a9,
	23	aclass,
	24	acquire_release,
	25	aes,
	26	armv2,
	27	armv2a,
	28	armv3,
	29	armv3m,
	30	armv4,
	31	armv4t,
	32	armv5t,
	33	armv5te,
	34	armv5tej,
	35	armv6,
	36	armv6_m,
	37	armv6j,
	38	armv6k,
	39	armv6kz,
	40	armv6s_m,
	41	armv6t2,
	42	armv7_a,
	43	armv7_m,
	44	armv7_r,
	45	armv7e_m,
	46	armv7k,
	47	armv7s,
	48	armv7ve,
	49	armv8_a,
	50	armv8_m_base,
	51	armv8_m_main,
	52	armv8_r,
	53	armv8_1_a,
	54	armv8_1_m_main,
	55	armv8_2_a,
	56	armv8_3_a,
	57	armv8_4_a,
	58	armv8_5_a,
	59	avoid_movs_shop,
	60	avoid_partial_cpsr,
	61	cheap_predicable_cpsr,
	62	crc,
	63	crypto,
	64	d32,
	65	db,
	66	dfb,
	67	disable_postra_scheduler,
	68	dont_widen_vmovs,
	69	dotprod,
	70	dsp,
	71	execute_only,
	72	expand_fp_mlx,
	73	exynos,
	74	fp_armv8,
	75	fp_armv8d16,
	76	fp_armv8d16sp,
	77	fp_armv8sp,
	78	fp16,
	79	fp16fml,
	80	fp64,
	81	fpao,
	82	fpregs,
	83	fpregs16,
	84	fpregs64,
	85	fullfp16,
	86	fuse_aes,
	87	fuse_literals,
	88	hwdiv,
	89	hwdiv_arm,
	90	iwmmxt,
	91	iwmmxt2,
	92	krait,
	93	kryo,
	94	lob,
	95	long_calls,
	96	loop_align,
	97	m3,
	98	mclass,
	99	mp,
	100	muxed_units,
	101	mve,
	102	mve_fp,
	103	nacl_trap,
	104	neon,
	105	neon_fpmovs,
	106	neonfp,
	107	no_branch_predictor,
	108	no_movt,
	109	no_neg_immediates,
	110	noarm,
	111	nonpipelined_vfp,
	112	perfmon,
	113	prefer_ishst,
	114	prefer_vmovsr,
	115	prof_unpr,
	116	r4,
	117	r5,
	118	r52,
	119	r7,
	120	ras,
	121	rclass,
	122	read_tp_hard,
	123	reserve_r9,
	124	ret_addr_stack,
	125	sb,
	126	sha2,
	127	slow_fp_brcc,
	128	slow_load_D_subreg,
	129	slow_odd_reg,
	130	slow_vdup32,
	131	slow_vgetlni32,
	132	slowfpvmlx,
	133	soft_float,
	134	splat_vfp_neon,
	135	strict_align,
	136	swift,
	137	thumb_mode,
	138	thumb2,
	139	trustzone,
	140	use_aa,
	141	use_misched,
	142	v4t,
	143	v5t,
	144	v5te,
	145	v6,
	146	v6k,
	147	v6m,
	148	v6t2,
	149	v7,
	150	v7clrex,
	151	v8,
	152	v8_1a,
	153	v8_1m_main,
	154	v8_2a,
	155	v8_3a,
	156	v8_4a,
	157	v8_5a,
	158	v8m,
	159	v8m_main,
	160	vfp2,
	161	vfp2d16,
	162	vfp2d16sp,
	163	vfp2sp,
	164	vfp3,
	165	vfp3d16,
	166	vfp3d16sp,
	167	vfp3sp,
	168	vfp4,
	169	vfp4d16,
	170	vfp4d16sp,
	171	vfp4sp,
	172	virtualization,
	173	vldn_align,
	174	vmlx_forwarding,
	175	vmlx_hazards,
	176	wide_stride_vfp,
	177	xscale,
	178	zcz,
	179	};
	180
	181	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	182
	183	pub const all_features = blk: {
	184	@setEvalBranchQuota(10000);
	185	const len = @typeInfo(Feature).Enum.fields.len;
	186	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	187	var result: [len]Cpu.Feature = undefined;
	188	result[@enumToInt(Feature.@"32bit")] = .{
	189	.llvm_name = "32bit",
	190	.description = "Prefer 32-bit Thumb instrs",
	191	.dependencies = featureSet(&[_]Feature{}),
	192	};
	193	result[@enumToInt(Feature.@"8msecext")] = .{
	194	.llvm_name = "8msecext",
	195	.description = "Enable support for ARMv8-M Security Extensions",
	196	.dependencies = featureSet(&[_]Feature{}),
	197	};
	198	result[@enumToInt(Feature.a12)] = .{
	199	.llvm_name = "a12",
	200	.description = "Cortex-A12 ARM processors",
	201	.dependencies = featureSet(&[_]Feature{}),
	202	};
	203	result[@enumToInt(Feature.a15)] = .{
	204	.llvm_name = "a15",
	205	.description = "Cortex-A15 ARM processors",
	206	.dependencies = featureSet(&[_]Feature{}),
	207	};
	208	result[@enumToInt(Feature.a17)] = .{
	209	.llvm_name = "a17",
	210	.description = "Cortex-A17 ARM processors",
	211	.dependencies = featureSet(&[_]Feature{}),
	212	};
	213	result[@enumToInt(Feature.a32)] = .{
	214	.llvm_name = "a32",
	215	.description = "Cortex-A32 ARM processors",
	216	.dependencies = featureSet(&[_]Feature{}),
	217	};
	218	result[@enumToInt(Feature.a35)] = .{
	219	.llvm_name = "a35",
	220	.description = "Cortex-A35 ARM processors",
	221	.dependencies = featureSet(&[_]Feature{}),
	222	};
	223	result[@enumToInt(Feature.a5)] = .{
	224	.llvm_name = "a5",
	225	.description = "Cortex-A5 ARM processors",
	226	.dependencies = featureSet(&[_]Feature{}),
	227	};
	228	result[@enumToInt(Feature.a53)] = .{
	229	.llvm_name = "a53",
	230	.description = "Cortex-A53 ARM processors",
	231	.dependencies = featureSet(&[_]Feature{}),
	232	};
	233	result[@enumToInt(Feature.a55)] = .{
	234	.llvm_name = "a55",
	235	.description = "Cortex-A55 ARM processors",
	236	.dependencies = featureSet(&[_]Feature{}),
	237	};
	238	result[@enumToInt(Feature.a57)] = .{
	239	.llvm_name = "a57",
	240	.description = "Cortex-A57 ARM processors",
	241	.dependencies = featureSet(&[_]Feature{}),
	242	};
	243	result[@enumToInt(Feature.a7)] = .{
	244	.llvm_name = "a7",
	245	.description = "Cortex-A7 ARM processors",
	246	.dependencies = featureSet(&[_]Feature{}),
	247	};
	248	result[@enumToInt(Feature.a72)] = .{
	249	.llvm_name = "a72",
	250	.description = "Cortex-A72 ARM processors",
	251	.dependencies = featureSet(&[_]Feature{}),
	252	};
	253	result[@enumToInt(Feature.a73)] = .{
	254	.llvm_name = "a73",
	255	.description = "Cortex-A73 ARM processors",
	256	.dependencies = featureSet(&[_]Feature{}),
	257	};
	258	result[@enumToInt(Feature.a75)] = .{
	259	.llvm_name = "a75",
	260	.description = "Cortex-A75 ARM processors",
	261	.dependencies = featureSet(&[_]Feature{}),
	262	};
	263	result[@enumToInt(Feature.a76)] = .{
	264	.llvm_name = "a76",
	265	.description = "Cortex-A76 ARM processors",
	266	.dependencies = featureSet(&[_]Feature{}),
	267	};
	268	result[@enumToInt(Feature.a8)] = .{
	269	.llvm_name = "a8",
	270	.description = "Cortex-A8 ARM processors",
	271	.dependencies = featureSet(&[_]Feature{}),
	272	};
	273	result[@enumToInt(Feature.a9)] = .{
	274	.llvm_name = "a9",
	275	.description = "Cortex-A9 ARM processors",
	276	.dependencies = featureSet(&[_]Feature{}),
	277	};
	278	result[@enumToInt(Feature.aclass)] = .{
	279	.llvm_name = "aclass",
	280	.description = "Is application profile ('A' series)",
	281	.dependencies = featureSet(&[_]Feature{}),
	282	};
	283	result[@enumToInt(Feature.acquire_release)] = .{
	284	.llvm_name = "acquire-release",
	285	.description = "Has v8 acquire/release (lda/ldaex etc) instructions",
	286	.dependencies = featureSet(&[_]Feature{}),
	287	};
	288	result[@enumToInt(Feature.aes)] = .{
	289	.llvm_name = "aes",
	290	.description = "Enable AES support",
	291	.dependencies = featureSet(&[_]Feature{
	292	.neon,
	293	}),
	294	};
	295	result[@enumToInt(Feature.armv2)] = .{
	296	.llvm_name = "armv2",
	297	.description = "ARMv2 architecture",
	298	.dependencies = featureSet(&[_]Feature{}),
	299	};
	300	result[@enumToInt(Feature.armv2a)] = .{
	301	.llvm_name = "armv2a",
	302	.description = "ARMv2a architecture",
	303	.dependencies = featureSet(&[_]Feature{}),
	304	};
	305	result[@enumToInt(Feature.armv3)] = .{
	306	.llvm_name = "armv3",
	307	.description = "ARMv3 architecture",
	308	.dependencies = featureSet(&[_]Feature{}),
	309	};
	310	result[@enumToInt(Feature.armv3m)] = .{
	311	.llvm_name = "armv3m",
	312	.description = "ARMv3m architecture",
	313	.dependencies = featureSet(&[_]Feature{}),
	314	};
	315	result[@enumToInt(Feature.armv4)] = .{
	316	.llvm_name = "armv4",
	317	.description = "ARMv4 architecture",
	318	.dependencies = featureSet(&[_]Feature{}),
	319	};
	320	result[@enumToInt(Feature.armv4t)] = .{
	321	.llvm_name = "armv4t",
	322	.description = "ARMv4t architecture",
	323	.dependencies = featureSet(&[_]Feature{
	324	.v4t,
	325	}),
	326	};
	327	result[@enumToInt(Feature.armv5t)] = .{
	328	.llvm_name = "armv5t",
	329	.description = "ARMv5t architecture",
	330	.dependencies = featureSet(&[_]Feature{
	331	.v5t,
	332	}),
	333	};
	334	result[@enumToInt(Feature.armv5te)] = .{
	335	.llvm_name = "armv5te",
	336	.description = "ARMv5te architecture",
	337	.dependencies = featureSet(&[_]Feature{
	338	.v5te,
	339	}),
	340	};
	341	result[@enumToInt(Feature.armv5tej)] = .{
	342	.llvm_name = "armv5tej",
	343	.description = "ARMv5tej architecture",
	344	.dependencies = featureSet(&[_]Feature{
	345	.v5te,
	346	}),
	347	};
	348	result[@enumToInt(Feature.armv6)] = .{
	349	.llvm_name = "armv6",
	350	.description = "ARMv6 architecture",
	351	.dependencies = featureSet(&[_]Feature{
	352	.dsp,
	353	.v6,
	354	}),
	355	};
	356	result[@enumToInt(Feature.armv6_m)] = .{
	357	.llvm_name = "armv6-m",
	358	.description = "ARMv6m architecture",
	359	.dependencies = featureSet(&[_]Feature{
	360	.db,
	361	.mclass,
	362	.noarm,
	363	.strict_align,
	364	.thumb_mode,
	365	.v6m,
	366	}),
	367	};
	368	result[@enumToInt(Feature.armv6j)] = .{
	369	.llvm_name = "armv6j",
	370	.description = "ARMv7a architecture",
	371	.dependencies = featureSet(&[_]Feature{
	372	.armv6,
	373	}),
	374	};
	375	result[@enumToInt(Feature.armv6k)] = .{
	376	.llvm_name = "armv6k",
	377	.description = "ARMv6k architecture",
	378	.dependencies = featureSet(&[_]Feature{
	379	.v6k,
	380	}),
	381	};
	382	result[@enumToInt(Feature.armv6kz)] = .{
	383	.llvm_name = "armv6kz",
	384	.description = "ARMv6kz architecture",
	385	.dependencies = featureSet(&[_]Feature{
	386	.trustzone,
	387	.v6k,
	388	}),
	389	};
	390	result[@enumToInt(Feature.armv6s_m)] = .{
	391	.llvm_name = "armv6s-m",
	392	.description = "ARMv6sm architecture",
	393	.dependencies = featureSet(&[_]Feature{
	394	.db,
	395	.mclass,
	396	.noarm,
	397	.strict_align,
	398	.thumb_mode,
	399	.v6m,
	400	}),
	401	};
	402	result[@enumToInt(Feature.armv6t2)] = .{
	403	.llvm_name = "armv6t2",
	404	.description = "ARMv6t2 architecture",
	405	.dependencies = featureSet(&[_]Feature{
	406	.dsp,
	407	.v6t2,
	408	}),
	409	};
	410	result[@enumToInt(Feature.armv7_a)] = .{
	411	.llvm_name = "armv7-a",
	412	.description = "ARMv7a architecture",
	413	.dependencies = featureSet(&[_]Feature{
	414	.aclass,
	415	.db,
	416	.dsp,
	417	.neon,
	418	.v7,
	419	}),
	420	};
	421	result[@enumToInt(Feature.armv7_m)] = .{
	422	.llvm_name = "armv7-m",
	423	.description = "ARMv7m architecture",
	424	.dependencies = featureSet(&[_]Feature{
	425	.db,
	426	.hwdiv,
	427	.mclass,
	428	.noarm,
	429	.thumb_mode,
	430	.thumb2,
	431	.v7,
	432	}),
	433	};
	434	result[@enumToInt(Feature.armv7_r)] = .{
	435	.llvm_name = "armv7-r",
	436	.description = "ARMv7r architecture",
	437	.dependencies = featureSet(&[_]Feature{
	438	.db,
	439	.dsp,
	440	.hwdiv,
	441	.rclass,
	442	.v7,
	443	}),
	444	};
	445	result[@enumToInt(Feature.armv7e_m)] = .{
	446	.llvm_name = "armv7e-m",
	447	.description = "ARMv7em architecture",
	448	.dependencies = featureSet(&[_]Feature{
	449	.db,
	450	.dsp,
	451	.hwdiv,
	452	.mclass,
	453	.noarm,
	454	.thumb_mode,
	455	.thumb2,
	456	.v7,
	457	}),
	458	};
	459	result[@enumToInt(Feature.armv7k)] = .{
	460	.llvm_name = "armv7k",
	461	.description = "ARMv7a architecture",
	462	.dependencies = featureSet(&[_]Feature{
	463	.armv7_a,
	464	}),
	465	};
	466	result[@enumToInt(Feature.armv7s)] = .{
	467	.llvm_name = "armv7s",
	468	.description = "ARMv7a architecture",
	469	.dependencies = featureSet(&[_]Feature{
	470	.armv7_a,
	471	}),
	472	};
	473	result[@enumToInt(Feature.armv7ve)] = .{
	474	.llvm_name = "armv7ve",
	475	.description = "ARMv7ve architecture",
	476	.dependencies = featureSet(&[_]Feature{
	477	.aclass,
	478	.db,
	479	.dsp,
	480	.mp,
	481	.neon,
	482	.trustzone,
	483	.v7,
	484	.virtualization,
	485	}),
	486	};
	487	result[@enumToInt(Feature.armv8_a)] = .{
	488	.llvm_name = "armv8-a",
	489	.description = "ARMv8a architecture",
	490	.dependencies = featureSet(&[_]Feature{
	491	.aclass,
	492	.crc,
	493	.crypto,
	494	.db,
	495	.dsp,
	496	.fp_armv8,
	497	.mp,
	498	.neon,
	499	.trustzone,
	500	.v8,
	501	.virtualization,
	502	}),
	503	};
	504	result[@enumToInt(Feature.armv8_m_base)] = .{
	505	.llvm_name = "armv8-m.base",
	506	.description = "ARMv8mBaseline architecture",
	507	.dependencies = featureSet(&[_]Feature{
	508	.@"8msecext",
	509	.acquire_release,
	510	.db,
	511	.hwdiv,
	512	.mclass,
	513	.noarm,
	514	.strict_align,
	515	.thumb_mode,
	516	.v7clrex,
	517	.v8m,
	518	}),
	519	};
	520	result[@enumToInt(Feature.armv8_m_main)] = .{
	521	.llvm_name = "armv8-m.main",
	522	.description = "ARMv8mMainline architecture",
	523	.dependencies = featureSet(&[_]Feature{
	524	.@"8msecext",
	525	.acquire_release,
	526	.db,
	527	.hwdiv,
	528	.mclass,
	529	.noarm,
	530	.thumb_mode,
	531	.v8m_main,
	532	}),
	533	};
	534	result[@enumToInt(Feature.armv8_r)] = .{
	535	.llvm_name = "armv8-r",
	536	.description = "ARMv8r architecture",
	537	.dependencies = featureSet(&[_]Feature{
	538	.crc,
	539	.db,
	540	.dfb,
	541	.dsp,
	542	.fp_armv8,
	543	.mp,
	544	.neon,
	545	.rclass,
	546	.v8,
	547	.virtualization,
	548	}),
	549	};
	550	result[@enumToInt(Feature.armv8_1_a)] = .{
	551	.llvm_name = "armv8.1-a",
	552	.description = "ARMv81a architecture",
	553	.dependencies = featureSet(&[_]Feature{
	554	.aclass,
	555	.crc,
	556	.crypto,
	557	.db,
	558	.dsp,
	559	.fp_armv8,
	560	.mp,
	561	.neon,
	562	.trustzone,
	563	.v8_1a,
	564	.virtualization,
	565	}),
	566	};
	567	result[@enumToInt(Feature.armv8_1_m_main)] = .{
	568	.llvm_name = "armv8.1-m.main",
	569	.description = "ARMv81mMainline architecture",
	570	.dependencies = featureSet(&[_]Feature{
	571	.@"8msecext",
	572	.acquire_release,
	573	.db,
	574	.hwdiv,
	575	.lob,
	576	.mclass,
	577	.noarm,
	578	.ras,
	579	.thumb_mode,
	580	.v8_1m_main,
	581	}),
	582	};
	583	result[@enumToInt(Feature.armv8_2_a)] = .{
	584	.llvm_name = "armv8.2-a",
	585	.description = "ARMv82a architecture",
	586	.dependencies = featureSet(&[_]Feature{
	587	.aclass,
	588	.crc,
	589	.crypto,
	590	.db,
	591	.dsp,
	592	.fp_armv8,
	593	.mp,
	594	.neon,
	595	.ras,
	596	.trustzone,
	597	.v8_2a,
	598	.virtualization,
	599	}),
	600	};
	601	result[@enumToInt(Feature.armv8_3_a)] = .{
	602	.llvm_name = "armv8.3-a",
	603	.description = "ARMv83a architecture",
	604	.dependencies = featureSet(&[_]Feature{
	605	.aclass,
	606	.crc,
	607	.crypto,
	608	.db,
	609	.dsp,
	610	.fp_armv8,
	611	.mp,
	612	.neon,
	613	.ras,
	614	.trustzone,
	615	.v8_3a,
	616	.virtualization,
	617	}),
	618	};
	619	result[@enumToInt(Feature.armv8_4_a)] = .{
	620	.llvm_name = "armv8.4-a",
	621	.description = "ARMv84a architecture",
	622	.dependencies = featureSet(&[_]Feature{
	623	.aclass,
	624	.crc,
	625	.crypto,
	626	.db,
	627	.dotprod,
	628	.dsp,
	629	.fp_armv8,
	630	.mp,
	631	.neon,
	632	.ras,
	633	.trustzone,
	634	.v8_4a,
	635	.virtualization,
	636	}),
	637	};
	638	result[@enumToInt(Feature.armv8_5_a)] = .{
	639	.llvm_name = "armv8.5-a",
	640	.description = "ARMv85a architecture",
	641	.dependencies = featureSet(&[_]Feature{
	642	.aclass,
	643	.crc,
	644	.crypto,
	645	.db,
	646	.dotprod,
	647	.dsp,
	648	.fp_armv8,
	649	.mp,
	650	.neon,
	651	.ras,
	652	.trustzone,
	653	.v8_5a,
	654	.virtualization,
	655	}),
	656	};
	657	result[@enumToInt(Feature.avoid_movs_shop)] = .{
	658	.llvm_name = "avoid-movs-shop",
	659	.description = "Avoid movs instructions with shifter operand",
	660	.dependencies = featureSet(&[_]Feature{}),
	661	};
	662	result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
	663	.llvm_name = "avoid-partial-cpsr",
	664	.description = "Avoid CPSR partial update for OOO execution",
	665	.dependencies = featureSet(&[_]Feature{}),
	666	};
	667	result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
	668	.llvm_name = "cheap-predicable-cpsr",
	669	.description = "Disable +1 predication cost for instructions updating CPSR",
	670	.dependencies = featureSet(&[_]Feature{}),
	671	};
	672	result[@enumToInt(Feature.crc)] = .{
	673	.llvm_name = "crc",
	674	.description = "Enable support for CRC instructions",
	675	.dependencies = featureSet(&[_]Feature{}),
	676	};
	677	result[@enumToInt(Feature.crypto)] = .{
	678	.llvm_name = "crypto",
	679	.description = "Enable support for Cryptography extensions",
	680	.dependencies = featureSet(&[_]Feature{
	681	.aes,
	682	.neon,
	683	.sha2,
	684	}),
	685	};
	686	result[@enumToInt(Feature.d32)] = .{
	687	.llvm_name = "d32",
	688	.description = "Extend FP to 32 double registers",
	689	.dependencies = featureSet(&[_]Feature{}),
	690	};
	691	result[@enumToInt(Feature.db)] = .{
	692	.llvm_name = "db",
	693	.description = "Has data barrier (dmb/dsb) instructions",
	694	.dependencies = featureSet(&[_]Feature{}),
	695	};
	696	result[@enumToInt(Feature.dfb)] = .{
	697	.llvm_name = "dfb",
	698	.description = "Has full data barrier (dfb) instruction",
	699	.dependencies = featureSet(&[_]Feature{}),
	700	};
	701	result[@enumToInt(Feature.disable_postra_scheduler)] = .{
	702	.llvm_name = "disable-postra-scheduler",
	703	.description = "Don't schedule again after register allocation",
	704	.dependencies = featureSet(&[_]Feature{}),
	705	};
	706	result[@enumToInt(Feature.dont_widen_vmovs)] = .{
	707	.llvm_name = "dont-widen-vmovs",
	708	.description = "Don't widen VMOVS to VMOVD",
	709	.dependencies = featureSet(&[_]Feature{}),
	710	};
	711	result[@enumToInt(Feature.dotprod)] = .{
	712	.llvm_name = "dotprod",
	713	.description = "Enable support for dot product instructions",
	714	.dependencies = featureSet(&[_]Feature{
	715	.neon,
	716	}),
	717	};
	718	result[@enumToInt(Feature.dsp)] = .{
	719	.llvm_name = "dsp",
	720	.description = "Supports DSP instructions in ARM and/or Thumb2",
	721	.dependencies = featureSet(&[_]Feature{}),
	722	};
	723	result[@enumToInt(Feature.execute_only)] = .{
	724	.llvm_name = "execute-only",
	725	.description = "Enable the generation of execute only code.",
	726	.dependencies = featureSet(&[_]Feature{}),
	727	};
	728	result[@enumToInt(Feature.expand_fp_mlx)] = .{
	729	.llvm_name = "expand-fp-mlx",
	730	.description = "Expand VFP/NEON MLA/MLS instructions",
	731	.dependencies = featureSet(&[_]Feature{}),
	732	};
	733	result[@enumToInt(Feature.exynos)] = .{
	734	.llvm_name = "exynos",
	735	.description = "Samsung Exynos processors",
	736	.dependencies = featureSet(&[_]Feature{
	737	.crc,
	738	.crypto,
	739	.expand_fp_mlx,
	740	.fuse_aes,
	741	.fuse_literals,
	742	.hwdiv,
	743	.hwdiv_arm,
	744	.prof_unpr,
	745	.ret_addr_stack,
	746	.slow_fp_brcc,
	747	.slow_vdup32,
	748	.slow_vgetlni32,
	749	.slowfpvmlx,
	750	.splat_vfp_neon,
	751	.use_aa,
	752	.wide_stride_vfp,
	753	.zcz,
	754	}),
	755	};
	756	result[@enumToInt(Feature.fp_armv8)] = .{
	757	.llvm_name = "fp-armv8",
	758	.description = "Enable ARMv8 FP",
	759	.dependencies = featureSet(&[_]Feature{
	760	.fp_armv8d16,
	761	.fp_armv8sp,
	762	.vfp4,
	763	}),
	764	};
	765	result[@enumToInt(Feature.fp_armv8d16)] = .{
	766	.llvm_name = "fp-armv8d16",
	767	.description = "Enable ARMv8 FP with only 16 d-registers",
	768	.dependencies = featureSet(&[_]Feature{
	769	.fp_armv8d16sp,
	770	.fp64,
	771	.vfp4d16,
	772	}),
	773	};
	774	result[@enumToInt(Feature.fp_armv8d16sp)] = .{
	775	.llvm_name = "fp-armv8d16sp",
	776	.description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
	777	.dependencies = featureSet(&[_]Feature{
	778	.vfp4d16sp,
	779	}),
	780	};
	781	result[@enumToInt(Feature.fp_armv8sp)] = .{
	782	.llvm_name = "fp-armv8sp",
	783	.description = "Enable ARMv8 FP with no double precision",
	784	.dependencies = featureSet(&[_]Feature{
	785	.d32,
	786	.fp_armv8d16sp,
	787	.vfp4sp,
	788	}),
	789	};
	790	result[@enumToInt(Feature.fp16)] = .{
	791	.llvm_name = "fp16",
	792	.description = "Enable half-precision floating point",
	793	.dependencies = featureSet(&[_]Feature{}),
	794	};
	795	result[@enumToInt(Feature.fp16fml)] = .{
	796	.llvm_name = "fp16fml",
	797	.description = "Enable full half-precision floating point fml instructions",
	798	.dependencies = featureSet(&[_]Feature{
	799	.fullfp16,
	800	}),
	801	};
	802	result[@enumToInt(Feature.fp64)] = .{
	803	.llvm_name = "fp64",
	804	.description = "Floating point unit supports double precision",
	805	.dependencies = featureSet(&[_]Feature{
	806	.fpregs64,
	807	}),
	808	};
	809	result[@enumToInt(Feature.fpao)] = .{
	810	.llvm_name = "fpao",
	811	.description = "Enable fast computation of positive address offsets",
	812	.dependencies = featureSet(&[_]Feature{}),
	813	};
	814	result[@enumToInt(Feature.fpregs)] = .{
	815	.llvm_name = "fpregs",
	816	.description = "Enable FP registers",
	817	.dependencies = featureSet(&[_]Feature{}),
	818	};
	819	result[@enumToInt(Feature.fpregs16)] = .{
	820	.llvm_name = "fpregs16",
	821	.description = "Enable 16-bit FP registers",
	822	.dependencies = featureSet(&[_]Feature{
	823	.fpregs,
	824	}),
	825	};
	826	result[@enumToInt(Feature.fpregs64)] = .{
	827	.llvm_name = "fpregs64",
	828	.description = "Enable 64-bit FP registers",
	829	.dependencies = featureSet(&[_]Feature{
	830	.fpregs,
	831	}),
	832	};
	833	result[@enumToInt(Feature.fullfp16)] = .{
	834	.llvm_name = "fullfp16",
	835	.description = "Enable full half-precision floating point",
	836	.dependencies = featureSet(&[_]Feature{
	837	.fp_armv8d16sp,
	838	.fpregs16,
	839	}),
	840	};
	841	result[@enumToInt(Feature.fuse_aes)] = .{
	842	.llvm_name = "fuse-aes",
	843	.description = "CPU fuses AES crypto operations",
	844	.dependencies = featureSet(&[_]Feature{}),
	845	};
	846	result[@enumToInt(Feature.fuse_literals)] = .{
	847	.llvm_name = "fuse-literals",
	848	.description = "CPU fuses literal generation operations",
	849	.dependencies = featureSet(&[_]Feature{}),
	850	};
	851	result[@enumToInt(Feature.hwdiv)] = .{
	852	.llvm_name = "hwdiv",
	853	.description = "Enable divide instructions in Thumb",
	854	.dependencies = featureSet(&[_]Feature{}),
	855	};
	856	result[@enumToInt(Feature.hwdiv_arm)] = .{
	857	.llvm_name = "hwdiv-arm",
	858	.description = "Enable divide instructions in ARM mode",
	859	.dependencies = featureSet(&[_]Feature{}),
	860	};
	861	result[@enumToInt(Feature.iwmmxt)] = .{
	862	.llvm_name = "iwmmxt",
	863	.description = "ARMv5te architecture",
	864	.dependencies = featureSet(&[_]Feature{
	865	.armv5te,
	866	}),
	867	};
	868	result[@enumToInt(Feature.iwmmxt2)] = .{
	869	.llvm_name = "iwmmxt2",
	870	.description = "ARMv5te architecture",
	871	.dependencies = featureSet(&[_]Feature{
	872	.armv5te,
	873	}),
	874	};
	875	result[@enumToInt(Feature.krait)] = .{
	876	.llvm_name = "krait",
	877	.description = "Qualcomm Krait processors",
	878	.dependencies = featureSet(&[_]Feature{}),
	879	};
	880	result[@enumToInt(Feature.kryo)] = .{
	881	.llvm_name = "kryo",
	882	.description = "Qualcomm Kryo processors",
	883	.dependencies = featureSet(&[_]Feature{}),
	884	};
	885	result[@enumToInt(Feature.lob)] = .{
	886	.llvm_name = "lob",
	887	.description = "Enable Low Overhead Branch extensions",
	888	.dependencies = featureSet(&[_]Feature{}),
	889	};
	890	result[@enumToInt(Feature.long_calls)] = .{
	891	.llvm_name = "long-calls",
	892	.description = "Generate calls via indirect call instructions",
	893	.dependencies = featureSet(&[_]Feature{}),
	894	};
	895	result[@enumToInt(Feature.loop_align)] = .{
	896	.llvm_name = "loop-align",
	897	.description = "Prefer 32-bit alignment for loops",
	898	.dependencies = featureSet(&[_]Feature{}),
	899	};
	900	result[@enumToInt(Feature.m3)] = .{
	901	.llvm_name = "m3",
	902	.description = "Cortex-M3 ARM processors",
	903	.dependencies = featureSet(&[_]Feature{}),
	904	};
	905	result[@enumToInt(Feature.mclass)] = .{
	906	.llvm_name = "mclass",
	907	.description = "Is microcontroller profile ('M' series)",
	908	.dependencies = featureSet(&[_]Feature{}),
	909	};
	910	result[@enumToInt(Feature.mp)] = .{
	911	.llvm_name = "mp",
	912	.description = "Supports Multiprocessing extension",
	913	.dependencies = featureSet(&[_]Feature{}),
	914	};
	915	result[@enumToInt(Feature.muxed_units)] = .{
	916	.llvm_name = "muxed-units",
	917	.description = "Has muxed AGU and NEON/FPU",
	918	.dependencies = featureSet(&[_]Feature{}),
	919	};
	920	result[@enumToInt(Feature.mve)] = .{
	921	.llvm_name = "mve",
	922	.description = "Support M-Class Vector Extension with integer ops",
	923	.dependencies = featureSet(&[_]Feature{
	924	.dsp,
	925	.fpregs16,
	926	.fpregs64,
	927	.v8_1m_main,
	928	}),
	929	};
	930	result[@enumToInt(Feature.mve_fp)] = .{
	931	.llvm_name = "mve.fp",
	932	.description = "Support M-Class Vector Extension with integer and floating ops",
	933	.dependencies = featureSet(&[_]Feature{
	934	.fp_armv8d16sp,
	935	.fullfp16,
	936	.mve,
	937	}),
	938	};
	939	result[@enumToInt(Feature.nacl_trap)] = .{
	940	.llvm_name = "nacl-trap",
	941	.description = "NaCl trap",
	942	.dependencies = featureSet(&[_]Feature{}),
	943	};
	944	result[@enumToInt(Feature.neon)] = .{
	945	.llvm_name = "neon",
	946	.description = "Enable NEON instructions",
	947	.dependencies = featureSet(&[_]Feature{
	948	.vfp3,
	949	}),
	950	};
	951	result[@enumToInt(Feature.neon_fpmovs)] = .{
	952	.llvm_name = "neon-fpmovs",
	953	.description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
	954	.dependencies = featureSet(&[_]Feature{}),
	955	};
	956	result[@enumToInt(Feature.neonfp)] = .{
	957	.llvm_name = "neonfp",
	958	.description = "Use NEON for single precision FP",
	959	.dependencies = featureSet(&[_]Feature{}),
	960	};
	961	result[@enumToInt(Feature.no_branch_predictor)] = .{
	962	.llvm_name = "no-branch-predictor",
	963	.description = "Has no branch predictor",
	964	.dependencies = featureSet(&[_]Feature{}),
	965	};
	966	result[@enumToInt(Feature.no_movt)] = .{
	967	.llvm_name = "no-movt",
	968	.description = "Don't use movt/movw pairs for 32-bit imms",
	969	.dependencies = featureSet(&[_]Feature{}),
	970	};
	971	result[@enumToInt(Feature.no_neg_immediates)] = .{
	972	.llvm_name = "no-neg-immediates",
	973	.description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
	974	.dependencies = featureSet(&[_]Feature{}),
	975	};
	976	result[@enumToInt(Feature.noarm)] = .{
	977	.llvm_name = "noarm",
	978	.description = "Does not support ARM mode execution",
	979	.dependencies = featureSet(&[_]Feature{}),
	980	};
	981	result[@enumToInt(Feature.nonpipelined_vfp)] = .{
	982	.llvm_name = "nonpipelined-vfp",
	983	.description = "VFP instructions are not pipelined",
	984	.dependencies = featureSet(&[_]Feature{}),
	985	};
	986	result[@enumToInt(Feature.perfmon)] = .{
	987	.llvm_name = "perfmon",
	988	.description = "Enable support for Performance Monitor extensions",
	989	.dependencies = featureSet(&[_]Feature{}),
	990	};
	991	result[@enumToInt(Feature.prefer_ishst)] = .{
	992	.llvm_name = "prefer-ishst",
	993	.description = "Prefer ISHST barriers",
	994	.dependencies = featureSet(&[_]Feature{}),
	995	};
	996	result[@enumToInt(Feature.prefer_vmovsr)] = .{
	997	.llvm_name = "prefer-vmovsr",
	998	.description = "Prefer VMOVSR",
	999	.dependencies = featureSet(&[_]Feature{}),
	1000	};
	1001	result[@enumToInt(Feature.prof_unpr)] = .{
	1002	.llvm_name = "prof-unpr",
	1003	.description = "Is profitable to unpredicate",
	1004	.dependencies = featureSet(&[_]Feature{}),
	1005	};
	1006	result[@enumToInt(Feature.r4)] = .{
	1007	.llvm_name = "r4",
	1008	.description = "Cortex-R4 ARM processors",
	1009	.dependencies = featureSet(&[_]Feature{}),
	1010	};
	1011	result[@enumToInt(Feature.r5)] = .{
	1012	.llvm_name = "r5",
	1013	.description = "Cortex-R5 ARM processors",
	1014	.dependencies = featureSet(&[_]Feature{}),
	1015	};
	1016	result[@enumToInt(Feature.r52)] = .{
	1017	.llvm_name = "r52",
	1018	.description = "Cortex-R52 ARM processors",
	1019	.dependencies = featureSet(&[_]Feature{}),
	1020	};
	1021	result[@enumToInt(Feature.r7)] = .{
	1022	.llvm_name = "r7",
	1023	.description = "Cortex-R7 ARM processors",
	1024	.dependencies = featureSet(&[_]Feature{}),
	1025	};
	1026	result[@enumToInt(Feature.ras)] = .{
	1027	.llvm_name = "ras",
	1028	.description = "Enable Reliability, Availability and Serviceability extensions",
	1029	.dependencies = featureSet(&[_]Feature{}),
	1030	};
	1031	result[@enumToInt(Feature.rclass)] = .{
	1032	.llvm_name = "rclass",
	1033	.description = "Is realtime profile ('R' series)",
	1034	.dependencies = featureSet(&[_]Feature{}),
	1035	};
	1036	result[@enumToInt(Feature.read_tp_hard)] = .{
	1037	.llvm_name = "read-tp-hard",
	1038	.description = "Reading thread pointer from register",
	1039	.dependencies = featureSet(&[_]Feature{}),
	1040	};
	1041	result[@enumToInt(Feature.reserve_r9)] = .{
	1042	.llvm_name = "reserve-r9",
	1043	.description = "Reserve R9, making it unavailable as GPR",
	1044	.dependencies = featureSet(&[_]Feature{}),
	1045	};
	1046	result[@enumToInt(Feature.ret_addr_stack)] = .{
	1047	.llvm_name = "ret-addr-stack",
	1048	.description = "Has return address stack",
	1049	.dependencies = featureSet(&[_]Feature{}),
	1050	};
	1051	result[@enumToInt(Feature.sb)] = .{
	1052	.llvm_name = "sb",
	1053	.description = "Enable v8.5a Speculation Barrier",
	1054	.dependencies = featureSet(&[_]Feature{}),
	1055	};
	1056	result[@enumToInt(Feature.sha2)] = .{
	1057	.llvm_name = "sha2",
	1058	.description = "Enable SHA1 and SHA256 support",
	1059	.dependencies = featureSet(&[_]Feature{
	1060	.neon,
	1061	}),
	1062	};
	1063	result[@enumToInt(Feature.slow_fp_brcc)] = .{
	1064	.llvm_name = "slow-fp-brcc",
	1065	.description = "FP compare + branch is slow",
	1066	.dependencies = featureSet(&[_]Feature{}),
	1067	};
	1068	result[@enumToInt(Feature.slow_load_D_subreg)] = .{
	1069	.llvm_name = "slow-load-D-subreg",
	1070	.description = "Loading into D subregs is slow",
	1071	.dependencies = featureSet(&[_]Feature{}),
	1072	};
	1073	result[@enumToInt(Feature.slow_odd_reg)] = .{
	1074	.llvm_name = "slow-odd-reg",
	1075	.description = "VLDM/VSTM starting with an odd register is slow",
	1076	.dependencies = featureSet(&[_]Feature{}),
	1077	};
	1078	result[@enumToInt(Feature.slow_vdup32)] = .{
	1079	.llvm_name = "slow-vdup32",
	1080	.description = "Has slow VDUP32 - prefer VMOV",
	1081	.dependencies = featureSet(&[_]Feature{}),
	1082	};
	1083	result[@enumToInt(Feature.slow_vgetlni32)] = .{
	1084	.llvm_name = "slow-vgetlni32",
	1085	.description = "Has slow VGETLNi32 - prefer VMOV",
	1086	.dependencies = featureSet(&[_]Feature{}),
	1087	};
	1088	result[@enumToInt(Feature.slowfpvmlx)] = .{
	1089	.llvm_name = "slowfpvmlx",
	1090	.description = "Disable VFP / NEON MAC instructions",
	1091	.dependencies = featureSet(&[_]Feature{}),
	1092	};
	1093	result[@enumToInt(Feature.soft_float)] = .{
	1094	.llvm_name = "soft-float",
	1095	.description = "Use software floating point features.",
	1096	.dependencies = featureSet(&[_]Feature{}),
	1097	};
	1098	result[@enumToInt(Feature.splat_vfp_neon)] = .{
	1099	.llvm_name = "splat-vfp-neon",
	1100	.description = "Splat register from VFP to NEON",
	1101	.dependencies = featureSet(&[_]Feature{
	1102	.dont_widen_vmovs,
	1103	}),
	1104	};
	1105	result[@enumToInt(Feature.strict_align)] = .{
	1106	.llvm_name = "strict-align",
	1107	.description = "Disallow all unaligned memory access",
	1108	.dependencies = featureSet(&[_]Feature{}),
	1109	};
	1110	result[@enumToInt(Feature.swift)] = .{
	1111	.llvm_name = "swift",
	1112	.description = "Swift ARM processors",
	1113	.dependencies = featureSet(&[_]Feature{}),
	1114	};
	1115	result[@enumToInt(Feature.thumb_mode)] = .{
	1116	.llvm_name = "thumb-mode",
	1117	.description = "Thumb mode",
	1118	.dependencies = featureSet(&[_]Feature{}),
	1119	};
	1120	result[@enumToInt(Feature.thumb2)] = .{
	1121	.llvm_name = "thumb2",
	1122	.description = "Enable Thumb2 instructions",
	1123	.dependencies = featureSet(&[_]Feature{}),
	1124	};
	1125	result[@enumToInt(Feature.trustzone)] = .{
	1126	.llvm_name = "trustzone",
	1127	.description = "Enable support for TrustZone security extensions",
	1128	.dependencies = featureSet(&[_]Feature{}),
	1129	};
	1130	result[@enumToInt(Feature.use_aa)] = .{
	1131	.llvm_name = "use-aa",
	1132	.description = "Use alias analysis during codegen",
	1133	.dependencies = featureSet(&[_]Feature{}),
	1134	};
	1135	result[@enumToInt(Feature.use_misched)] = .{
	1136	.llvm_name = "use-misched",
	1137	.description = "Use the MachineScheduler",
	1138	.dependencies = featureSet(&[_]Feature{}),
	1139	};
	1140	result[@enumToInt(Feature.v4t)] = .{
	1141	.llvm_name = "v4t",
	1142	.description = "Support ARM v4T instructions",
	1143	.dependencies = featureSet(&[_]Feature{}),
	1144	};
	1145	result[@enumToInt(Feature.v5t)] = .{
	1146	.llvm_name = "v5t",
	1147	.description = "Support ARM v5T instructions",
	1148	.dependencies = featureSet(&[_]Feature{
	1149	.v4t,
	1150	}),
	1151	};
	1152	result[@enumToInt(Feature.v5te)] = .{
	1153	.llvm_name = "v5te",
	1154	.description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
	1155	.dependencies = featureSet(&[_]Feature{
	1156	.v5t,
	1157	}),
	1158	};
	1159	result[@enumToInt(Feature.v6)] = .{
	1160	.llvm_name = "v6",
	1161	.description = "Support ARM v6 instructions",
	1162	.dependencies = featureSet(&[_]Feature{
	1163	.v5te,
	1164	}),
	1165	};
	1166	result[@enumToInt(Feature.v6k)] = .{
	1167	.llvm_name = "v6k",
	1168	.description = "Support ARM v6k instructions",
	1169	.dependencies = featureSet(&[_]Feature{
	1170	.v6,
	1171	}),
	1172	};
	1173	result[@enumToInt(Feature.v6m)] = .{
	1174	.llvm_name = "v6m",
	1175	.description = "Support ARM v6M instructions",
	1176	.dependencies = featureSet(&[_]Feature{
	1177	.v6,
	1178	}),
	1179	};
	1180	result[@enumToInt(Feature.v6t2)] = .{
	1181	.llvm_name = "v6t2",
	1182	.description = "Support ARM v6t2 instructions",
	1183	.dependencies = featureSet(&[_]Feature{
	1184	.thumb2,
	1185	.v6k,
	1186	.v8m,
	1187	}),
	1188	};
	1189	result[@enumToInt(Feature.v7)] = .{
	1190	.llvm_name = "v7",
	1191	.description = "Support ARM v7 instructions",
	1192	.dependencies = featureSet(&[_]Feature{
	1193	.perfmon,
	1194	.v6t2,
	1195	.v7clrex,
	1196	}),
	1197	};
	1198	result[@enumToInt(Feature.v7clrex)] = .{
	1199	.llvm_name = "v7clrex",
	1200	.description = "Has v7 clrex instruction",
	1201	.dependencies = featureSet(&[_]Feature{}),
	1202	};
	1203	result[@enumToInt(Feature.v8)] = .{
	1204	.llvm_name = "v8",
	1205	.description = "Support ARM v8 instructions",
	1206	.dependencies = featureSet(&[_]Feature{
	1207	.acquire_release,
	1208	.v7,
	1209	}),
	1210	};
	1211	result[@enumToInt(Feature.v8_1a)] = .{
	1212	.llvm_name = "v8.1a",
	1213	.description = "Support ARM v8.1a instructions",
	1214	.dependencies = featureSet(&[_]Feature{
	1215	.v8,
	1216	}),
	1217	};
	1218	result[@enumToInt(Feature.v8_1m_main)] = .{
	1219	.llvm_name = "v8.1m.main",
	1220	.description = "Support ARM v8-1M Mainline instructions",
	1221	.dependencies = featureSet(&[_]Feature{
	1222	.v8m_main,
	1223	}),
	1224	};
	1225	result[@enumToInt(Feature.v8_2a)] = .{
	1226	.llvm_name = "v8.2a",
	1227	.description = "Support ARM v8.2a instructions",
	1228	.dependencies = featureSet(&[_]Feature{
	1229	.v8_1a,
	1230	}),
	1231	};
	1232	result[@enumToInt(Feature.v8_3a)] = .{
	1233	.llvm_name = "v8.3a",
	1234	.description = "Support ARM v8.3a instructions",
	1235	.dependencies = featureSet(&[_]Feature{
	1236	.v8_2a,
	1237	}),
	1238	};
	1239	result[@enumToInt(Feature.v8_4a)] = .{
	1240	.llvm_name = "v8.4a",
	1241	.description = "Support ARM v8.4a instructions",
	1242	.dependencies = featureSet(&[_]Feature{
	1243	.dotprod,
	1244	.v8_3a,
	1245	}),
	1246	};
	1247	result[@enumToInt(Feature.v8_5a)] = .{
	1248	.llvm_name = "v8.5a",
	1249	.description = "Support ARM v8.5a instructions",
	1250	.dependencies = featureSet(&[_]Feature{
	1251	.sb,
	1252	.v8_4a,
	1253	}),
	1254	};
	1255	result[@enumToInt(Feature.v8m)] = .{
	1256	.llvm_name = "v8m",
	1257	.description = "Support ARM v8M Baseline instructions",
	1258	.dependencies = featureSet(&[_]Feature{
	1259	.v6m,
	1260	}),
	1261	};
	1262	result[@enumToInt(Feature.v8m_main)] = .{
	1263	.llvm_name = "v8m.main",
	1264	.description = "Support ARM v8M Mainline instructions",
	1265	.dependencies = featureSet(&[_]Feature{
	1266	.v7,
	1267	}),
	1268	};
	1269	result[@enumToInt(Feature.vfp2)] = .{
	1270	.llvm_name = "vfp2",
	1271	.description = "Enable VFP2 instructions",
	1272	.dependencies = featureSet(&[_]Feature{
	1273	.vfp2d16,
	1274	.vfp2sp,
	1275	}),
	1276	};
	1277	result[@enumToInt(Feature.vfp2d16)] = .{
	1278	.llvm_name = "vfp2d16",
	1279	.description = "Enable VFP2 instructions",
	1280	.dependencies = featureSet(&[_]Feature{
	1281	.fp64,
	1282	.vfp2d16sp,
	1283	}),
	1284	};
	1285	result[@enumToInt(Feature.vfp2d16sp)] = .{
	1286	.llvm_name = "vfp2d16sp",
	1287	.description = "Enable VFP2 instructions with no double precision",
	1288	.dependencies = featureSet(&[_]Feature{
	1289	.fpregs,
	1290	}),
	1291	};
	1292	result[@enumToInt(Feature.vfp2sp)] = .{
	1293	.llvm_name = "vfp2sp",
	1294	.description = "Enable VFP2 instructions with no double precision",
	1295	.dependencies = featureSet(&[_]Feature{
	1296	.vfp2d16sp,
	1297	}),
	1298	};
	1299	result[@enumToInt(Feature.vfp3)] = .{
	1300	.llvm_name = "vfp3",
	1301	.description = "Enable VFP3 instructions",
	1302	.dependencies = featureSet(&[_]Feature{
	1303	.vfp3d16,
	1304	.vfp3sp,
	1305	}),
	1306	};
	1307	result[@enumToInt(Feature.vfp3d16)] = .{
	1308	.llvm_name = "vfp3d16",
	1309	.description = "Enable VFP3 instructions with only 16 d-registers",
	1310	.dependencies = featureSet(&[_]Feature{
	1311	.fp64,
	1312	.vfp2,
	1313	.vfp3d16sp,
	1314	}),
	1315	};
	1316	result[@enumToInt(Feature.vfp3d16sp)] = .{
	1317	.llvm_name = "vfp3d16sp",
	1318	.description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
	1319	.dependencies = featureSet(&[_]Feature{
	1320	.vfp2sp,
	1321	}),
	1322	};
	1323	result[@enumToInt(Feature.vfp3sp)] = .{
	1324	.llvm_name = "vfp3sp",
	1325	.description = "Enable VFP3 instructions with no double precision",
	1326	.dependencies = featureSet(&[_]Feature{
	1327	.d32,
	1328	.vfp3d16sp,
	1329	}),
	1330	};
	1331	result[@enumToInt(Feature.vfp4)] = .{
	1332	.llvm_name = "vfp4",
	1333	.description = "Enable VFP4 instructions",
	1334	.dependencies = featureSet(&[_]Feature{
	1335	.fp16,
	1336	.vfp3,
	1337	.vfp4d16,
	1338	.vfp4sp,
	1339	}),
	1340	};
	1341	result[@enumToInt(Feature.vfp4d16)] = .{
	1342	.llvm_name = "vfp4d16",
	1343	.description = "Enable VFP4 instructions with only 16 d-registers",
	1344	.dependencies = featureSet(&[_]Feature{
	1345	.fp16,
	1346	.fp64,
	1347	.vfp3d16,
	1348	.vfp4d16sp,
	1349	}),
	1350	};
	1351	result[@enumToInt(Feature.vfp4d16sp)] = .{
	1352	.llvm_name = "vfp4d16sp",
	1353	.description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
	1354	.dependencies = featureSet(&[_]Feature{
	1355	.fp16,
	1356	.vfp3d16sp,
	1357	}),
	1358	};
	1359	result[@enumToInt(Feature.vfp4sp)] = .{
	1360	.llvm_name = "vfp4sp",
	1361	.description = "Enable VFP4 instructions with no double precision",
	1362	.dependencies = featureSet(&[_]Feature{
	1363	.d32,
	1364	.fp16,
	1365	.vfp3sp,
	1366	.vfp4d16sp,
	1367	}),
	1368	};
	1369	result[@enumToInt(Feature.virtualization)] = .{
	1370	.llvm_name = "virtualization",
	1371	.description = "Supports Virtualization extension",
	1372	.dependencies = featureSet(&[_]Feature{
	1373	.hwdiv,
	1374	.hwdiv_arm,
	1375	}),
	1376	};
	1377	result[@enumToInt(Feature.vldn_align)] = .{
	1378	.llvm_name = "vldn-align",
	1379	.description = "Check for VLDn unaligned access",
	1380	.dependencies = featureSet(&[_]Feature{}),
	1381	};
	1382	result[@enumToInt(Feature.vmlx_forwarding)] = .{
	1383	.llvm_name = "vmlx-forwarding",
	1384	.description = "Has multiplier accumulator forwarding",
	1385	.dependencies = featureSet(&[_]Feature{}),
	1386	};
	1387	result[@enumToInt(Feature.vmlx_hazards)] = .{
	1388	.llvm_name = "vmlx-hazards",
	1389	.description = "Has VMLx hazards",
	1390	.dependencies = featureSet(&[_]Feature{}),
	1391	};
	1392	result[@enumToInt(Feature.wide_stride_vfp)] = .{
	1393	.llvm_name = "wide-stride-vfp",
	1394	.description = "Use a wide stride when allocating VFP registers",
	1395	.dependencies = featureSet(&[_]Feature{}),
	1396	};
	1397	result[@enumToInt(Feature.xscale)] = .{
	1398	.llvm_name = "xscale",
	1399	.description = "ARMv5te architecture",
	1400	.dependencies = featureSet(&[_]Feature{
	1401	.armv5te,
	1402	}),
	1403	};
	1404	result[@enumToInt(Feature.zcz)] = .{
	1405	.llvm_name = "zcz",
	1406	.description = "Has zero-cycle zeroing instructions",
	1407	.dependencies = featureSet(&[_]Feature{}),
	1408	};
	1409	const ti = @typeInfo(Feature);
	1410	for (result) \|*elem, i\| {
	1411	elem.index = i;
	1412	elem.name = ti.Enum.fields[i].name;
	1413	}
	1414	break :blk result;
	1415	};
	1416
	1417	pub const cpu = struct {
	1418	pub const arm1020e = Cpu{
	1419	.name = "arm1020e",
	1420	.llvm_name = "arm1020e",
	1421	.features = featureSet(&[_]Feature{
	1422	.armv5te,
	1423	}),
	1424	};
	1425	pub const arm1020t = Cpu{
	1426	.name = "arm1020t",
	1427	.llvm_name = "arm1020t",
	1428	.features = featureSet(&[_]Feature{
	1429	.armv5t,
	1430	}),
	1431	};
	1432	pub const arm1022e = Cpu{
	1433	.name = "arm1022e",
	1434	.llvm_name = "arm1022e",
	1435	.features = featureSet(&[_]Feature{
	1436	.armv5te,
	1437	}),
	1438	};
	1439	pub const arm10e = Cpu{
	1440	.name = "arm10e",
	1441	.llvm_name = "arm10e",
	1442	.features = featureSet(&[_]Feature{
	1443	.armv5te,
	1444	}),
	1445	};
	1446	pub const arm10tdmi = Cpu{
	1447	.name = "arm10tdmi",
	1448	.llvm_name = "arm10tdmi",
	1449	.features = featureSet(&[_]Feature{
	1450	.armv5t,
	1451	}),
	1452	};
	1453	pub const arm1136j_s = Cpu{
	1454	.name = "arm1136j_s",
	1455	.llvm_name = "arm1136j-s",
	1456	.features = featureSet(&[_]Feature{
	1457	.armv6,
	1458	}),
	1459	};
	1460	pub const arm1136jf_s = Cpu{
	1461	.name = "arm1136jf_s",
	1462	.llvm_name = "arm1136jf-s",
	1463	.features = featureSet(&[_]Feature{
	1464	.armv6,
	1465	.slowfpvmlx,
	1466	.vfp2,
	1467	}),
	1468	};
	1469	pub const arm1156t2_s = Cpu{
	1470	.name = "arm1156t2_s",
	1471	.llvm_name = "arm1156t2-s",
	1472	.features = featureSet(&[_]Feature{
	1473	.armv6t2,
	1474	}),
	1475	};
	1476	pub const arm1156t2f_s = Cpu{
	1477	.name = "arm1156t2f_s",
	1478	.llvm_name = "arm1156t2f-s",
	1479	.features = featureSet(&[_]Feature{
	1480	.armv6t2,
	1481	.slowfpvmlx,
	1482	.vfp2,
	1483	}),
	1484	};
	1485	pub const arm1176j_s = Cpu{
	1486	.name = "arm1176j_s",
	1487	.llvm_name = "arm1176j-s",
	1488	.features = featureSet(&[_]Feature{
	1489	.armv6kz,
	1490	}),
	1491	};
	1492	pub const arm1176jz_s = Cpu{
	1493	.name = "arm1176jz_s",
	1494	.llvm_name = "arm1176jz-s",
	1495	.features = featureSet(&[_]Feature{
	1496	.armv6kz,
	1497	}),
	1498	};
	1499	pub const arm1176jzf_s = Cpu{
	1500	.name = "arm1176jzf_s",
	1501	.llvm_name = "arm1176jzf-s",
	1502	.features = featureSet(&[_]Feature{
	1503	.armv6kz,
	1504	.slowfpvmlx,
	1505	.vfp2,
	1506	}),
	1507	};
	1508	pub const arm710t = Cpu{
	1509	.name = "arm710t",
	1510	.llvm_name = "arm710t",
	1511	.features = featureSet(&[_]Feature{
	1512	.armv4t,
	1513	}),
	1514	};
	1515	pub const arm720t = Cpu{
	1516	.name = "arm720t",
	1517	.llvm_name = "arm720t",
	1518	.features = featureSet(&[_]Feature{
	1519	.armv4t,
	1520	}),
	1521	};
	1522	pub const arm7tdmi = Cpu{
	1523	.name = "arm7tdmi",
	1524	.llvm_name = "arm7tdmi",
	1525	.features = featureSet(&[_]Feature{
	1526	.armv4t,
	1527	}),
	1528	};
	1529	pub const arm7tdmi_s = Cpu{
	1530	.name = "arm7tdmi_s",
	1531	.llvm_name = "arm7tdmi-s",
	1532	.features = featureSet(&[_]Feature{
	1533	.armv4t,
	1534	}),
	1535	};
	1536	pub const arm8 = Cpu{
	1537	.name = "arm8",
	1538	.llvm_name = "arm8",
	1539	.features = featureSet(&[_]Feature{
	1540	.armv4,
	1541	}),
	1542	};
	1543	pub const arm810 = Cpu{
	1544	.name = "arm810",
	1545	.llvm_name = "arm810",
	1546	.features = featureSet(&[_]Feature{
	1547	.armv4,
	1548	}),
	1549	};
	1550	pub const arm9 = Cpu{
	1551	.name = "arm9",
	1552	.llvm_name = "arm9",
	1553	.features = featureSet(&[_]Feature{
	1554	.armv4t,
	1555	}),
	1556	};
	1557	pub const arm920 = Cpu{
	1558	.name = "arm920",
	1559	.llvm_name = "arm920",
	1560	.features = featureSet(&[_]Feature{
	1561	.armv4t,
	1562	}),
	1563	};
	1564	pub const arm920t = Cpu{
	1565	.name = "arm920t",
	1566	.llvm_name = "arm920t",
	1567	.features = featureSet(&[_]Feature{
	1568	.armv4t,
	1569	}),
	1570	};
	1571	pub const arm922t = Cpu{
	1572	.name = "arm922t",
	1573	.llvm_name = "arm922t",
	1574	.features = featureSet(&[_]Feature{
	1575	.armv4t,
	1576	}),
	1577	};
	1578	pub const arm926ej_s = Cpu{
	1579	.name = "arm926ej_s",
	1580	.llvm_name = "arm926ej-s",
	1581	.features = featureSet(&[_]Feature{
	1582	.armv5te,
	1583	}),
	1584	};
	1585	pub const arm940t = Cpu{
	1586	.name = "arm940t",
	1587	.llvm_name = "arm940t",
	1588	.features = featureSet(&[_]Feature{
	1589	.armv4t,
	1590	}),
	1591	};
	1592	pub const arm946e_s = Cpu{
	1593	.name = "arm946e_s",
	1594	.llvm_name = "arm946e-s",
	1595	.features = featureSet(&[_]Feature{
	1596	.armv5te,
	1597	}),
	1598	};
	1599	pub const arm966e_s = Cpu{
	1600	.name = "arm966e_s",
	1601	.llvm_name = "arm966e-s",
	1602	.features = featureSet(&[_]Feature{
	1603	.armv5te,
	1604	}),
	1605	};
	1606	pub const arm968e_s = Cpu{
	1607	.name = "arm968e_s",
	1608	.llvm_name = "arm968e-s",
	1609	.features = featureSet(&[_]Feature{
	1610	.armv5te,
	1611	}),
	1612	};
	1613	pub const arm9e = Cpu{
	1614	.name = "arm9e",
	1615	.llvm_name = "arm9e",
	1616	.features = featureSet(&[_]Feature{
	1617	.armv5te,
	1618	}),
	1619	};
	1620	pub const arm9tdmi = Cpu{
	1621	.name = "arm9tdmi",
	1622	.llvm_name = "arm9tdmi",
	1623	.features = featureSet(&[_]Feature{
	1624	.armv4t,
	1625	}),
	1626	};
	1627	pub const cortex_a12 = Cpu{
	1628	.name = "cortex_a12",
	1629	.llvm_name = "cortex-a12",
	1630	.features = featureSet(&[_]Feature{
	1631	.a12,
	1632	.armv7_a,
	1633	.avoid_partial_cpsr,
	1634	.mp,
	1635	.ret_addr_stack,
	1636	.trustzone,
	1637	.vfp4,
	1638	.virtualization,
	1639	.vmlx_forwarding,
	1640	}),
	1641	};
	1642	pub const cortex_a15 = Cpu{
	1643	.name = "cortex_a15",
	1644	.llvm_name = "cortex-a15",
	1645	.features = featureSet(&[_]Feature{
	1646	.a15,
	1647	.armv7_a,
	1648	.avoid_partial_cpsr,
	1649	.dont_widen_vmovs,
	1650	.mp,
	1651	.muxed_units,
	1652	.ret_addr_stack,
	1653	.splat_vfp_neon,
	1654	.trustzone,
	1655	.vfp4,
	1656	.virtualization,
	1657	.vldn_align,
	1658	}),
	1659	};
	1660	pub const cortex_a17 = Cpu{
	1661	.name = "cortex_a17",
	1662	.llvm_name = "cortex-a17",
	1663	.features = featureSet(&[_]Feature{
	1664	.a17,
	1665	.armv7_a,
	1666	.avoid_partial_cpsr,
	1667	.mp,
	1668	.ret_addr_stack,
	1669	.trustzone,
	1670	.vfp4,
	1671	.virtualization,
	1672	.vmlx_forwarding,
	1673	}),
	1674	};
	1675	pub const cortex_a32 = Cpu{
	1676	.name = "cortex_a32",
	1677	.llvm_name = "cortex-a32",
	1678	.features = featureSet(&[_]Feature{
	1679	.armv8_a,
	1680	.crc,
	1681	.crypto,
	1682	.hwdiv,
	1683	.hwdiv_arm,
	1684	}),
	1685	};
	1686	pub const cortex_a35 = Cpu{
	1687	.name = "cortex_a35",
	1688	.llvm_name = "cortex-a35",
	1689	.features = featureSet(&[_]Feature{
	1690	.a35,
	1691	.armv8_a,
	1692	.crc,
	1693	.crypto,
	1694	.hwdiv,
	1695	.hwdiv_arm,
	1696	}),
	1697	};
	1698	pub const cortex_a5 = Cpu{
	1699	.name = "cortex_a5",
	1700	.llvm_name = "cortex-a5",
	1701	.features = featureSet(&[_]Feature{
	1702	.a5,
	1703	.armv7_a,
	1704	.mp,
	1705	.ret_addr_stack,
	1706	.slow_fp_brcc,
	1707	.slowfpvmlx,
	1708	.trustzone,
	1709	.vfp4,
	1710	.vmlx_forwarding,
	1711	}),
	1712	};
	1713	pub const cortex_a53 = Cpu{
	1714	.name = "cortex_a53",
	1715	.llvm_name = "cortex-a53",
	1716	.features = featureSet(&[_]Feature{
	1717	.a53,
	1718	.armv8_a,
	1719	.crc,
	1720	.crypto,
	1721	.fpao,
	1722	.hwdiv,
	1723	.hwdiv_arm,
	1724	}),
	1725	};
	1726	pub const cortex_a55 = Cpu{
	1727	.name = "cortex_a55",
	1728	.llvm_name = "cortex-a55",
	1729	.features = featureSet(&[_]Feature{
	1730	.a55,
	1731	.armv8_2_a,
	1732	.dotprod,
	1733	.hwdiv,
	1734	.hwdiv_arm,
	1735	}),
	1736	};
	1737	pub const cortex_a57 = Cpu{
	1738	.name = "cortex_a57",
	1739	.llvm_name = "cortex-a57",
	1740	.features = featureSet(&[_]Feature{
	1741	.a57,
	1742	.armv8_a,
	1743	.avoid_partial_cpsr,
	1744	.cheap_predicable_cpsr,
	1745	.crc,
	1746	.crypto,
	1747	.fpao,
	1748	.hwdiv,
	1749	.hwdiv_arm,
	1750	}),
	1751	};
	1752	pub const cortex_a7 = Cpu{
	1753	.name = "cortex_a7",
	1754	.llvm_name = "cortex-a7",
	1755	.features = featureSet(&[_]Feature{
	1756	.a7,
	1757	.armv7_a,
	1758	.mp,
	1759	.ret_addr_stack,
	1760	.slow_fp_brcc,
	1761	.slowfpvmlx,
	1762	.trustzone,
	1763	.vfp4,
	1764	.virtualization,
	1765	.vmlx_forwarding,
	1766	.vmlx_hazards,
	1767	}),
	1768	};
	1769	pub const cortex_a72 = Cpu{
	1770	.name = "cortex_a72",
	1771	.llvm_name = "cortex-a72",
	1772	.features = featureSet(&[_]Feature{
	1773	.a72,
	1774	.armv8_a,
	1775	.crc,
	1776	.crypto,
	1777	.hwdiv,
	1778	.hwdiv_arm,
	1779	}),
	1780	};
	1781	pub const cortex_a73 = Cpu{
	1782	.name = "cortex_a73",
	1783	.llvm_name = "cortex-a73",
	1784	.features = featureSet(&[_]Feature{
	1785	.a73,
	1786	.armv8_a,
	1787	.crc,
	1788	.crypto,
	1789	.hwdiv,
	1790	.hwdiv_arm,
	1791	}),
	1792	};
	1793	pub const cortex_a75 = Cpu{
	1794	.name = "cortex_a75",
	1795	.llvm_name = "cortex-a75",
	1796	.features = featureSet(&[_]Feature{
	1797	.a75,
	1798	.armv8_2_a,
	1799	.dotprod,
	1800	.hwdiv,
	1801	.hwdiv_arm,
	1802	}),
	1803	};
	1804	pub const cortex_a76 = Cpu{
	1805	.name = "cortex_a76",
	1806	.llvm_name = "cortex-a76",
	1807	.features = featureSet(&[_]Feature{
	1808	.a76,
	1809	.armv8_2_a,
	1810	.crc,
	1811	.crypto,
	1812	.dotprod,
	1813	.fullfp16,
	1814	.hwdiv,
	1815	.hwdiv_arm,
	1816	}),
	1817	};
	1818	pub const cortex_a76ae = Cpu{
	1819	.name = "cortex_a76ae",
	1820	.llvm_name = "cortex-a76ae",
	1821	.features = featureSet(&[_]Feature{
	1822	.a76,
	1823	.armv8_2_a,
	1824	.crc,
	1825	.crypto,
	1826	.dotprod,
	1827	.fullfp16,
	1828	.hwdiv,
	1829	.hwdiv_arm,
	1830	}),
	1831	};
	1832	pub const cortex_a8 = Cpu{
	1833	.name = "cortex_a8",
	1834	.llvm_name = "cortex-a8",
	1835	.features = featureSet(&[_]Feature{
	1836	.a8,
	1837	.armv7_a,
	1838	.nonpipelined_vfp,
	1839	.ret_addr_stack,
	1840	.slow_fp_brcc,
	1841	.slowfpvmlx,
	1842	.trustzone,
	1843	.vmlx_forwarding,
	1844	.vmlx_hazards,
	1845	}),
	1846	};
	1847	pub const cortex_a9 = Cpu{
	1848	.name = "cortex_a9",
	1849	.llvm_name = "cortex-a9",
	1850	.features = featureSet(&[_]Feature{
	1851	.a9,
	1852	.armv7_a,
	1853	.avoid_partial_cpsr,
	1854	.expand_fp_mlx,
	1855	.fp16,
	1856	.mp,
	1857	.muxed_units,
	1858	.neon_fpmovs,
	1859	.prefer_vmovsr,
	1860	.ret_addr_stack,
	1861	.trustzone,
	1862	.vldn_align,
	1863	.vmlx_forwarding,
	1864	.vmlx_hazards,
	1865	}),
	1866	};
	1867	pub const cortex_m0 = Cpu{
	1868	.name = "cortex_m0",
	1869	.llvm_name = "cortex-m0",
	1870	.features = featureSet(&[_]Feature{
	1871	.armv6_m,
	1872	}),
	1873	};
	1874	pub const cortex_m0plus = Cpu{
	1875	.name = "cortex_m0plus",
	1876	.llvm_name = "cortex-m0plus",
	1877	.features = featureSet(&[_]Feature{
	1878	.armv6_m,
	1879	}),
	1880	};
	1881	pub const cortex_m1 = Cpu{
	1882	.name = "cortex_m1",
	1883	.llvm_name = "cortex-m1",
	1884	.features = featureSet(&[_]Feature{
	1885	.armv6_m,
	1886	}),
	1887	};
	1888	pub const cortex_m23 = Cpu{
	1889	.name = "cortex_m23",
	1890	.llvm_name = "cortex-m23",
	1891	.features = featureSet(&[_]Feature{
	1892	.armv8_m_base,
	1893	.no_movt,
	1894	}),
	1895	};
	1896	pub const cortex_m3 = Cpu{
	1897	.name = "cortex_m3",
	1898	.llvm_name = "cortex-m3",
	1899	.features = featureSet(&[_]Feature{
	1900	.armv7_m,
	1901	.loop_align,
	1902	.m3,
	1903	.no_branch_predictor,
	1904	.use_aa,
	1905	.use_misched,
	1906	}),
	1907	};
	1908	pub const cortex_m33 = Cpu{
	1909	.name = "cortex_m33",
	1910	.llvm_name = "cortex-m33",
	1911	.features = featureSet(&[_]Feature{
	1912	.armv8_m_main,
	1913	.dsp,
	1914	.fp_armv8d16sp,
	1915	.loop_align,
	1916	.no_branch_predictor,
	1917	.slowfpvmlx,
	1918	.use_aa,
	1919	.use_misched,
	1920	}),
	1921	};
	1922	pub const cortex_m35p = Cpu{
	1923	.name = "cortex_m35p",
	1924	.llvm_name = "cortex-m35p",
	1925	.features = featureSet(&[_]Feature{
	1926	.armv8_m_main,
	1927	.dsp,
	1928	.fp_armv8d16sp,
	1929	.loop_align,
	1930	.no_branch_predictor,
	1931	.slowfpvmlx,
	1932	.use_aa,
	1933	.use_misched,
	1934	}),
	1935	};
	1936	pub const cortex_m4 = Cpu{
	1937	.name = "cortex_m4",
	1938	.llvm_name = "cortex-m4",
	1939	.features = featureSet(&[_]Feature{
	1940	.armv7e_m,
	1941	.loop_align,
	1942	.no_branch_predictor,
	1943	.slowfpvmlx,
	1944	.use_aa,
	1945	.use_misched,
	1946	.vfp4d16sp,
	1947	}),
	1948	};
	1949	pub const cortex_m7 = Cpu{
	1950	.name = "cortex_m7",
	1951	.llvm_name = "cortex-m7",
	1952	.features = featureSet(&[_]Feature{
	1953	.armv7e_m,
	1954	.fp_armv8d16,
	1955	}),
	1956	};
	1957	pub const cortex_r4 = Cpu{
	1958	.name = "cortex_r4",
	1959	.llvm_name = "cortex-r4",
	1960	.features = featureSet(&[_]Feature{
	1961	.armv7_r,
	1962	.avoid_partial_cpsr,
	1963	.r4,
	1964	.ret_addr_stack,
	1965	}),
	1966	};
	1967	pub const cortex_r4f = Cpu{
	1968	.name = "cortex_r4f",
	1969	.llvm_name = "cortex-r4f",
	1970	.features = featureSet(&[_]Feature{
	1971	.armv7_r,
	1972	.avoid_partial_cpsr,
	1973	.r4,
	1974	.ret_addr_stack,
	1975	.slow_fp_brcc,
	1976	.slowfpvmlx,
	1977	.vfp3d16,
	1978	}),
	1979	};
	1980	pub const cortex_r5 = Cpu{
	1981	.name = "cortex_r5",
	1982	.llvm_name = "cortex-r5",
	1983	.features = featureSet(&[_]Feature{
	1984	.armv7_r,
	1985	.avoid_partial_cpsr,
	1986	.hwdiv_arm,
	1987	.r5,
	1988	.ret_addr_stack,
	1989	.slow_fp_brcc,
	1990	.slowfpvmlx,
	1991	.vfp3d16,
	1992	}),
	1993	};
	1994	pub const cortex_r52 = Cpu{
	1995	.name = "cortex_r52",
	1996	.llvm_name = "cortex-r52",
	1997	.features = featureSet(&[_]Feature{
	1998	.armv8_r,
	1999	.fpao,
	2000	.r52,
	2001	.use_aa,
	2002	.use_misched,
	2003	}),
	2004	};
	2005	pub const cortex_r7 = Cpu{
	2006	.name = "cortex_r7",
	2007	.llvm_name = "cortex-r7",
	2008	.features = featureSet(&[_]Feature{
	2009	.armv7_r,
	2010	.avoid_partial_cpsr,
	2011	.fp16,
	2012	.hwdiv_arm,
	2013	.mp,
	2014	.r7,
	2015	.ret_addr_stack,
	2016	.slow_fp_brcc,
	2017	.slowfpvmlx,
	2018	.vfp3d16,
	2019	}),
	2020	};
	2021	pub const cortex_r8 = Cpu{
	2022	.name = "cortex_r8",
	2023	.llvm_name = "cortex-r8",
	2024	.features = featureSet(&[_]Feature{
	2025	.armv7_r,
	2026	.avoid_partial_cpsr,
	2027	.fp16,
	2028	.hwdiv_arm,
	2029	.mp,
	2030	.ret_addr_stack,
	2031	.slow_fp_brcc,
	2032	.slowfpvmlx,
	2033	.vfp3d16,
	2034	}),
	2035	};
	2036	pub const cyclone = Cpu{
	2037	.name = "cyclone",
	2038	.llvm_name = "cyclone",
	2039	.features = featureSet(&[_]Feature{
	2040	.armv8_a,
	2041	.avoid_movs_shop,
	2042	.avoid_partial_cpsr,
	2043	.crypto,
	2044	.disable_postra_scheduler,
	2045	.hwdiv,
	2046	.hwdiv_arm,
	2047	.mp,
	2048	.neonfp,
	2049	.ret_addr_stack,
	2050	.slowfpvmlx,
	2051	.swift,
	2052	.use_misched,
	2053	.vfp4,
	2054	.zcz,
	2055	}),
	2056	};
	2057	pub const ep9312 = Cpu{
	2058	.name = "ep9312",
	2059	.llvm_name = "ep9312",
	2060	.features = featureSet(&[_]Feature{
	2061	.armv4t,
	2062	}),
	2063	};
	2064	pub const exynos_m1 = Cpu{
	2065	.name = "exynos_m1",
	2066	.llvm_name = "exynos-m1",
	2067	.features = featureSet(&[_]Feature{
	2068	.armv8_a,
	2069	.exynos,
	2070	}),
	2071	};
	2072	pub const exynos_m2 = Cpu{
	2073	.name = "exynos_m2",
	2074	.llvm_name = "exynos-m2",
	2075	.features = featureSet(&[_]Feature{
	2076	.armv8_a,
	2077	.exynos,
	2078	}),
	2079	};
	2080	pub const exynos_m3 = Cpu{
	2081	.name = "exynos_m3",
	2082	.llvm_name = "exynos-m3",
	2083	.features = featureSet(&[_]Feature{
	2084	.armv8_a,
	2085	.exynos,
	2086	}),
	2087	};
	2088	pub const exynos_m4 = Cpu{
	2089	.name = "exynos_m4",
	2090	.llvm_name = "exynos-m4",
	2091	.features = featureSet(&[_]Feature{
	2092	.armv8_2_a,
	2093	.dotprod,
	2094	.exynos,
	2095	.fullfp16,
	2096	}),
	2097	};
	2098	pub const exynos_m5 = Cpu{
	2099	.name = "exynos_m5",
	2100	.llvm_name = "exynos-m5",
	2101	.features = featureSet(&[_]Feature{
	2102	.armv8_2_a,
	2103	.dotprod,
	2104	.exynos,
	2105	.fullfp16,
	2106	}),
	2107	};
	2108	pub const generic = Cpu{
	2109	.name = "generic",
	2110	.llvm_name = "generic",
	2111	.features = featureSet(&[_]Feature{}),
	2112	};
	2113	pub const iwmmxt = Cpu{
	2114	.name = "iwmmxt",
	2115	.llvm_name = "iwmmxt",
	2116	.features = featureSet(&[_]Feature{
	2117	.armv5te,
	2118	}),
	2119	};
	2120	pub const krait = Cpu{
	2121	.name = "krait",
	2122	.llvm_name = "krait",
	2123	.features = featureSet(&[_]Feature{
	2124	.armv7_a,
	2125	.avoid_partial_cpsr,
	2126	.fp16,
	2127	.hwdiv,
	2128	.hwdiv_arm,
	2129	.krait,
	2130	.muxed_units,
	2131	.ret_addr_stack,
	2132	.vfp4,
	2133	.vldn_align,
	2134	.vmlx_forwarding,
	2135	}),
	2136	};
	2137	pub const kryo = Cpu{
	2138	.name = "kryo",
	2139	.llvm_name = "kryo",
	2140	.features = featureSet(&[_]Feature{
	2141	.armv8_a,
	2142	.crc,
	2143	.crypto,
	2144	.hwdiv,
	2145	.hwdiv_arm,
	2146	.kryo,
	2147	}),
	2148	};
	2149	pub const mpcore = Cpu{
	2150	.name = "mpcore",
	2151	.llvm_name = "mpcore",
	2152	.features = featureSet(&[_]Feature{
	2153	.armv6k,
	2154	.slowfpvmlx,
	2155	.vfp2,
	2156	}),
	2157	};
	2158	pub const mpcorenovfp = Cpu{
	2159	.name = "mpcorenovfp",
	2160	.llvm_name = "mpcorenovfp",
	2161	.features = featureSet(&[_]Feature{
	2162	.armv6k,
	2163	}),
	2164	};
	2165	pub const sc000 = Cpu{
	2166	.name = "sc000",
	2167	.llvm_name = "sc000",
	2168	.features = featureSet(&[_]Feature{
	2169	.armv6_m,
	2170	}),
	2171	};
	2172	pub const sc300 = Cpu{
	2173	.name = "sc300",
	2174	.llvm_name = "sc300",
	2175	.features = featureSet(&[_]Feature{
	2176	.armv7_m,
	2177	.m3,
	2178	.no_branch_predictor,
	2179	.use_aa,
	2180	.use_misched,
	2181	}),
	2182	};
	2183	pub const strongarm = Cpu{
	2184	.name = "strongarm",
	2185	.llvm_name = "strongarm",
	2186	.features = featureSet(&[_]Feature{
	2187	.armv4,
	2188	}),
	2189	};
	2190	pub const strongarm110 = Cpu{
	2191	.name = "strongarm110",
	2192	.llvm_name = "strongarm110",
	2193	.features = featureSet(&[_]Feature{
	2194	.armv4,
	2195	}),
	2196	};
	2197	pub const strongarm1100 = Cpu{
	2198	.name = "strongarm1100",
	2199	.llvm_name = "strongarm1100",
	2200	.features = featureSet(&[_]Feature{
	2201	.armv4,
	2202	}),
	2203	};
	2204	pub const strongarm1110 = Cpu{
	2205	.name = "strongarm1110",
	2206	.llvm_name = "strongarm1110",
	2207	.features = featureSet(&[_]Feature{
	2208	.armv4,
	2209	}),
	2210	};
	2211	pub const swift = Cpu{
	2212	.name = "swift",
	2213	.llvm_name = "swift",
	2214	.features = featureSet(&[_]Feature{
	2215	.armv7_a,
	2216	.avoid_movs_shop,
	2217	.avoid_partial_cpsr,
	2218	.disable_postra_scheduler,
	2219	.hwdiv,
	2220	.hwdiv_arm,
	2221	.mp,
	2222	.neonfp,
	2223	.prefer_ishst,
	2224	.prof_unpr,
	2225	.ret_addr_stack,
	2226	.slow_load_D_subreg,
	2227	.slow_odd_reg,
	2228	.slow_vdup32,
	2229	.slow_vgetlni32,
	2230	.slowfpvmlx,
	2231	.swift,
	2232	.use_misched,
	2233	.vfp4,
	2234	.vmlx_hazards,
	2235	.wide_stride_vfp,
	2236	}),
	2237	};
	2238	pub const xscale = Cpu{
	2239	.name = "xscale",
	2240	.llvm_name = "xscale",
	2241	.features = featureSet(&[_]Feature{
	2242	.armv5te,
	2243	}),
	2244	};
	2245	};
	2246
	2247	/// All arm CPUs, sorted alphabetically by name.
	2248	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	2249	/// compiler has inefficient memory and CPU usage, affecting build times.
	2250	pub const all_cpus = &[_]*const Cpu{
	2251	&cpu.arm1020e,
	2252	&cpu.arm1020t,
	2253	&cpu.arm1022e,
	2254	&cpu.arm10e,
	2255	&cpu.arm10tdmi,
	2256	&cpu.arm1136j_s,
	2257	&cpu.arm1136jf_s,
	2258	&cpu.arm1156t2_s,
	2259	&cpu.arm1156t2f_s,
	2260	&cpu.arm1176j_s,
	2261	&cpu.arm1176jz_s,
	2262	&cpu.arm1176jzf_s,
	2263	&cpu.arm710t,
	2264	&cpu.arm720t,
	2265	&cpu.arm7tdmi,
	2266	&cpu.arm7tdmi_s,
	2267	&cpu.arm8,
	2268	&cpu.arm810,
	2269	&cpu.arm9,
	2270	&cpu.arm920,
	2271	&cpu.arm920t,
	2272	&cpu.arm922t,
	2273	&cpu.arm926ej_s,
	2274	&cpu.arm940t,
	2275	&cpu.arm946e_s,
	2276	&cpu.arm966e_s,
	2277	&cpu.arm968e_s,
	2278	&cpu.arm9e,
	2279	&cpu.arm9tdmi,
	2280	&cpu.cortex_a12,
	2281	&cpu.cortex_a15,
	2282	&cpu.cortex_a17,
	2283	&cpu.cortex_a32,
	2284	&cpu.cortex_a35,
	2285	&cpu.cortex_a5,
	2286	&cpu.cortex_a53,
	2287	&cpu.cortex_a55,
	2288	&cpu.cortex_a57,
	2289	&cpu.cortex_a7,
	2290	&cpu.cortex_a72,
	2291	&cpu.cortex_a73,
	2292	&cpu.cortex_a75,
	2293	&cpu.cortex_a76,
	2294	&cpu.cortex_a76ae,
	2295	&cpu.cortex_a8,
	2296	&cpu.cortex_a9,
	2297	&cpu.cortex_m0,
	2298	&cpu.cortex_m0plus,
	2299	&cpu.cortex_m1,
	2300	&cpu.cortex_m23,
	2301	&cpu.cortex_m3,
	2302	&cpu.cortex_m33,
	2303	&cpu.cortex_m35p,
	2304	&cpu.cortex_m4,
	2305	&cpu.cortex_m7,
	2306	&cpu.cortex_r4,
	2307	&cpu.cortex_r4f,
	2308	&cpu.cortex_r5,
	2309	&cpu.cortex_r52,
	2310	&cpu.cortex_r7,
	2311	&cpu.cortex_r8,
	2312	&cpu.cyclone,
	2313	&cpu.ep9312,
	2314	&cpu.exynos_m1,
	2315	&cpu.exynos_m2,
	2316	&cpu.exynos_m3,
	2317	&cpu.exynos_m4,
	2318	&cpu.exynos_m5,
	2319	&cpu.generic,
	2320	&cpu.iwmmxt,
	2321	&cpu.krait,
	2322	&cpu.kryo,
	2323	&cpu.mpcore,
	2324	&cpu.mpcorenovfp,
	2325	&cpu.sc000,
	2326	&cpu.sc300,
	2327	&cpu.strongarm,
	2328	&cpu.strongarm110,
	2329	&cpu.strongarm1100,
	2330	&cpu.strongarm1110,
	2331	&cpu.swift,
	2332	&cpu.xscale,
	2333	};

lib/std/target/avr.zig created+2380

...	...	@@ -0,0 +1,2380 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	addsubiw,
	6	avr0,
	7	avr1,
	8	avr2,
	9	avr25,
	10	avr3,
	11	avr31,
	12	avr35,
	13	avr4,
	14	avr5,
	15	avr51,
	16	avr6,
	17	avrtiny,
	18	@"break",
	19	des,
	20	eijmpcall,
	21	elpm,
	22	elpmx,
	23	ijmpcall,
	24	jmpcall,
	25	lpm,
	26	lpmx,
	27	movw,
	28	mul,
	29	rmw,
	30	smallstack,
	31	special,
	32	spm,
	33	spmx,
	34	sram,
	35	tinyencoding,
	36	xmega,
	37	xmegau,
	38	};
	39
	40	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	41
	42	pub const all_features = blk: {
	43	const len = @typeInfo(Feature).Enum.fields.len;
	44	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	45	var result: [len]Cpu.Feature = undefined;
	46	result[@enumToInt(Feature.addsubiw)] = .{
	47	.llvm_name = "addsubiw",
	48	.description = "Enable 16-bit register-immediate addition and subtraction instructions",
	49	.dependencies = featureSet(&[_]Feature{}),
	50	};
	51	result[@enumToInt(Feature.avr0)] = .{
	52	.llvm_name = "avr0",
	53	.description = "The device is a part of the avr0 family",
	54	.dependencies = featureSet(&[_]Feature{}),
	55	};
	56	result[@enumToInt(Feature.avr1)] = .{
	57	.llvm_name = "avr1",
	58	.description = "The device is a part of the avr1 family",
	59	.dependencies = featureSet(&[_]Feature{
	60	.avr0,
	61	.lpm,
	62	}),
	63	};
	64	result[@enumToInt(Feature.avr2)] = .{
	65	.llvm_name = "avr2",
	66	.description = "The device is a part of the avr2 family",
	67	.dependencies = featureSet(&[_]Feature{
	68	.addsubiw,
	69	.avr1,
	70	.ijmpcall,
	71	.sram,
	72	}),
	73	};
	74	result[@enumToInt(Feature.avr25)] = .{
	75	.llvm_name = "avr25",
	76	.description = "The device is a part of the avr25 family",
	77	.dependencies = featureSet(&[_]Feature{
	78	.avr2,
	79	.@"break",
	80	.lpmx,
	81	.movw,
	82	.spm,
	83	}),
	84	};
	85	result[@enumToInt(Feature.avr3)] = .{
	86	.llvm_name = "avr3",
	87	.description = "The device is a part of the avr3 family",
	88	.dependencies = featureSet(&[_]Feature{
	89	.avr2,
	90	.jmpcall,
	91	}),
	92	};
	93	result[@enumToInt(Feature.avr31)] = .{
	94	.llvm_name = "avr31",
	95	.description = "The device is a part of the avr31 family",
	96	.dependencies = featureSet(&[_]Feature{
	97	.avr3,
	98	.elpm,
	99	}),
	100	};
	101	result[@enumToInt(Feature.avr35)] = .{
	102	.llvm_name = "avr35",
	103	.description = "The device is a part of the avr35 family",
	104	.dependencies = featureSet(&[_]Feature{
	105	.avr3,
	106	.@"break",
	107	.lpmx,
	108	.movw,
	109	.spm,
	110	}),
	111	};
	112	result[@enumToInt(Feature.avr4)] = .{
	113	.llvm_name = "avr4",
	114	.description = "The device is a part of the avr4 family",
	115	.dependencies = featureSet(&[_]Feature{
	116	.avr2,
	117	.@"break",
	118	.lpmx,
	119	.movw,
	120	.mul,
	121	.spm,
	122	}),
	123	};
	124	result[@enumToInt(Feature.avr5)] = .{
	125	.llvm_name = "avr5",
	126	.description = "The device is a part of the avr5 family",
	127	.dependencies = featureSet(&[_]Feature{
	128	.avr3,
	129	.@"break",
	130	.lpmx,
	131	.movw,
	132	.mul,
	133	.spm,
	134	}),
	135	};
	136	result[@enumToInt(Feature.avr51)] = .{
	137	.llvm_name = "avr51",
	138	.description = "The device is a part of the avr51 family",
	139	.dependencies = featureSet(&[_]Feature{
	140	.avr5,
	141	.elpm,
	142	.elpmx,
	143	}),
	144	};
	145	result[@enumToInt(Feature.avr6)] = .{
	146	.llvm_name = "avr6",
	147	.description = "The device is a part of the avr6 family",
	148	.dependencies = featureSet(&[_]Feature{
	149	.avr51,
	150	}),
	151	};
	152	result[@enumToInt(Feature.avrtiny)] = .{
	153	.llvm_name = "avrtiny",
	154	.description = "The device is a part of the avrtiny family",
	155	.dependencies = featureSet(&[_]Feature{
	156	.avr0,
	157	.@"break",
	158	.sram,
	159	.tinyencoding,
	160	}),
	161	};
	162	result[@enumToInt(Feature.@"break")] = .{
	163	.llvm_name = "break",
	164	.description = "The device supports the `BREAK` debugging instruction",
	165	.dependencies = featureSet(&[_]Feature{}),
	166	};
	167	result[@enumToInt(Feature.des)] = .{
	168	.llvm_name = "des",
	169	.description = "The device supports the `DES k` encryption instruction",
	170	.dependencies = featureSet(&[_]Feature{}),
	171	};
	172	result[@enumToInt(Feature.eijmpcall)] = .{
	173	.llvm_name = "eijmpcall",
	174	.description = "The device supports the `EIJMP`/`EICALL` instructions",
	175	.dependencies = featureSet(&[_]Feature{}),
	176	};
	177	result[@enumToInt(Feature.elpm)] = .{
	178	.llvm_name = "elpm",
	179	.description = "The device supports the ELPM instruction",
	180	.dependencies = featureSet(&[_]Feature{}),
	181	};
	182	result[@enumToInt(Feature.elpmx)] = .{
	183	.llvm_name = "elpmx",
	184	.description = "The device supports the `ELPM Rd, Z[+]` instructions",
	185	.dependencies = featureSet(&[_]Feature{}),
	186	};
	187	result[@enumToInt(Feature.ijmpcall)] = .{
	188	.llvm_name = "ijmpcall",
	189	.description = "The device supports `IJMP`/`ICALL`instructions",
	190	.dependencies = featureSet(&[_]Feature{}),
	191	};
	192	result[@enumToInt(Feature.jmpcall)] = .{
	193	.llvm_name = "jmpcall",
	194	.description = "The device supports the `JMP` and `CALL` instructions",
	195	.dependencies = featureSet(&[_]Feature{}),
	196	};
	197	result[@enumToInt(Feature.lpm)] = .{
	198	.llvm_name = "lpm",
	199	.description = "The device supports the `LPM` instruction",
	200	.dependencies = featureSet(&[_]Feature{}),
	201	};
	202	result[@enumToInt(Feature.lpmx)] = .{
	203	.llvm_name = "lpmx",
	204	.description = "The device supports the `LPM Rd, Z[+]` instruction",
	205	.dependencies = featureSet(&[_]Feature{}),
	206	};
	207	result[@enumToInt(Feature.movw)] = .{
	208	.llvm_name = "movw",
	209	.description = "The device supports the 16-bit MOVW instruction",
	210	.dependencies = featureSet(&[_]Feature{}),
	211	};
	212	result[@enumToInt(Feature.mul)] = .{
	213	.llvm_name = "mul",
	214	.description = "The device supports the multiplication instructions",
	215	.dependencies = featureSet(&[_]Feature{}),
	216	};
	217	result[@enumToInt(Feature.rmw)] = .{
	218	.llvm_name = "rmw",
	219	.description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
	220	.dependencies = featureSet(&[_]Feature{}),
	221	};
	222	result[@enumToInt(Feature.smallstack)] = .{
	223	.llvm_name = "smallstack",
	224	.description = "The device has an 8-bit stack pointer",
	225	.dependencies = featureSet(&[_]Feature{}),
	226	};
	227	result[@enumToInt(Feature.special)] = .{
	228	.llvm_name = "special",
	229	.description = "Enable use of the entire instruction set - used for debugging",
	230	.dependencies = featureSet(&[_]Feature{
	231	.addsubiw,
	232	.@"break",
	233	.des,
	234	.eijmpcall,
	235	.elpm,
	236	.elpmx,
	237	.ijmpcall,
	238	.jmpcall,
	239	.lpm,
	240	.lpmx,
	241	.movw,
	242	.mul,
	243	.rmw,
	244	.spm,
	245	.spmx,
	246	.sram,
	247	}),
	248	};
	249	result[@enumToInt(Feature.spm)] = .{
	250	.llvm_name = "spm",
	251	.description = "The device supports the `SPM` instruction",
	252	.dependencies = featureSet(&[_]Feature{}),
	253	};
	254	result[@enumToInt(Feature.spmx)] = .{
	255	.llvm_name = "spmx",
	256	.description = "The device supports the `SPM Z+` instruction",
	257	.dependencies = featureSet(&[_]Feature{}),
	258	};
	259	result[@enumToInt(Feature.sram)] = .{
	260	.llvm_name = "sram",
	261	.description = "The device has random access memory",
	262	.dependencies = featureSet(&[_]Feature{}),
	263	};
	264	result[@enumToInt(Feature.tinyencoding)] = .{
	265	.llvm_name = "tinyencoding",
	266	.description = "The device has Tiny core specific instruction encodings",
	267	.dependencies = featureSet(&[_]Feature{}),
	268	};
	269	result[@enumToInt(Feature.xmega)] = .{
	270	.llvm_name = "xmega",
	271	.description = "The device is a part of the xmega family",
	272	.dependencies = featureSet(&[_]Feature{
	273	.avr51,
	274	.des,
	275	.eijmpcall,
	276	.spmx,
	277	}),
	278	};
	279	result[@enumToInt(Feature.xmegau)] = .{
	280	.llvm_name = "xmegau",
	281	.description = "The device is a part of the xmegau family",
	282	.dependencies = featureSet(&[_]Feature{
	283	.rmw,
	284	.xmega,
	285	}),
	286	};
	287	const ti = @typeInfo(Feature);
	288	for (result) \|*elem, i\| {
	289	elem.index = i;
	290	elem.name = ti.Enum.fields[i].name;
	291	}
	292	break :blk result;
	293	};
	294
	295	pub const cpu = struct {
	296	pub const at43usb320 = Cpu{
	297	.name = "at43usb320",
	298	.llvm_name = "at43usb320",
	299	.features = featureSet(&[_]Feature{
	300	.avr31,
	301	}),
	302	};
	303	pub const at43usb355 = Cpu{
	304	.name = "at43usb355",
	305	.llvm_name = "at43usb355",
	306	.features = featureSet(&[_]Feature{
	307	.avr3,
	308	}),
	309	};
	310	pub const at76c711 = Cpu{
	311	.name = "at76c711",
	312	.llvm_name = "at76c711",
	313	.features = featureSet(&[_]Feature{
	314	.avr3,
	315	}),
	316	};
	317	pub const at86rf401 = Cpu{
	318	.name = "at86rf401",
	319	.llvm_name = "at86rf401",
	320	.features = featureSet(&[_]Feature{
	321	.avr2,
	322	.lpmx,
	323	.movw,
	324	}),
	325	};
	326	pub const at90c8534 = Cpu{
	327	.name = "at90c8534",
	328	.llvm_name = "at90c8534",
	329	.features = featureSet(&[_]Feature{
	330	.avr2,
	331	}),
	332	};
	333	pub const at90can128 = Cpu{
	334	.name = "at90can128",
	335	.llvm_name = "at90can128",
	336	.features = featureSet(&[_]Feature{
	337	.avr51,
	338	}),
	339	};
	340	pub const at90can32 = Cpu{
	341	.name = "at90can32",
	342	.llvm_name = "at90can32",
	343	.features = featureSet(&[_]Feature{
	344	.avr5,
	345	}),
	346	};
	347	pub const at90can64 = Cpu{
	348	.name = "at90can64",
	349	.llvm_name = "at90can64",
	350	.features = featureSet(&[_]Feature{
	351	.avr5,
	352	}),
	353	};
	354	pub const at90pwm1 = Cpu{
	355	.name = "at90pwm1",
	356	.llvm_name = "at90pwm1",
	357	.features = featureSet(&[_]Feature{
	358	.avr4,
	359	}),
	360	};
	361	pub const at90pwm161 = Cpu{
	362	.name = "at90pwm161",
	363	.llvm_name = "at90pwm161",
	364	.features = featureSet(&[_]Feature{
	365	.avr5,
	366	}),
	367	};
	368	pub const at90pwm2 = Cpu{
	369	.name = "at90pwm2",
	370	.llvm_name = "at90pwm2",
	371	.features = featureSet(&[_]Feature{
	372	.avr4,
	373	}),
	374	};
	375	pub const at90pwm216 = Cpu{
	376	.name = "at90pwm216",
	377	.llvm_name = "at90pwm216",
	378	.features = featureSet(&[_]Feature{
	379	.avr5,
	380	}),
	381	};
	382	pub const at90pwm2b = Cpu{
	383	.name = "at90pwm2b",
	384	.llvm_name = "at90pwm2b",
	385	.features = featureSet(&[_]Feature{
	386	.avr4,
	387	}),
	388	};
	389	pub const at90pwm3 = Cpu{
	390	.name = "at90pwm3",
	391	.llvm_name = "at90pwm3",
	392	.features = featureSet(&[_]Feature{
	393	.avr4,
	394	}),
	395	};
	396	pub const at90pwm316 = Cpu{
	397	.name = "at90pwm316",
	398	.llvm_name = "at90pwm316",
	399	.features = featureSet(&[_]Feature{
	400	.avr5,
	401	}),
	402	};
	403	pub const at90pwm3b = Cpu{
	404	.name = "at90pwm3b",
	405	.llvm_name = "at90pwm3b",
	406	.features = featureSet(&[_]Feature{
	407	.avr4,
	408	}),
	409	};
	410	pub const at90pwm81 = Cpu{
	411	.name = "at90pwm81",
	412	.llvm_name = "at90pwm81",
	413	.features = featureSet(&[_]Feature{
	414	.avr4,
	415	}),
	416	};
	417	pub const at90s1200 = Cpu{
	418	.name = "at90s1200",
	419	.llvm_name = "at90s1200",
	420	.features = featureSet(&[_]Feature{
	421	.avr0,
	422	}),
	423	};
	424	pub const at90s2313 = Cpu{
	425	.name = "at90s2313",
	426	.llvm_name = "at90s2313",
	427	.features = featureSet(&[_]Feature{
	428	.avr2,
	429	}),
	430	};
	431	pub const at90s2323 = Cpu{
	432	.name = "at90s2323",
	433	.llvm_name = "at90s2323",
	434	.features = featureSet(&[_]Feature{
	435	.avr2,
	436	}),
	437	};
	438	pub const at90s2333 = Cpu{
	439	.name = "at90s2333",
	440	.llvm_name = "at90s2333",
	441	.features = featureSet(&[_]Feature{
	442	.avr2,
	443	}),
	444	};
	445	pub const at90s2343 = Cpu{
	446	.name = "at90s2343",
	447	.llvm_name = "at90s2343",
	448	.features = featureSet(&[_]Feature{
	449	.avr2,
	450	}),
	451	};
	452	pub const at90s4414 = Cpu{
	453	.name = "at90s4414",
	454	.llvm_name = "at90s4414",
	455	.features = featureSet(&[_]Feature{
	456	.avr2,
	457	}),
	458	};
	459	pub const at90s4433 = Cpu{
	460	.name = "at90s4433",
	461	.llvm_name = "at90s4433",
	462	.features = featureSet(&[_]Feature{
	463	.avr2,
	464	}),
	465	};
	466	pub const at90s4434 = Cpu{
	467	.name = "at90s4434",
	468	.llvm_name = "at90s4434",
	469	.features = featureSet(&[_]Feature{
	470	.avr2,
	471	}),
	472	};
	473	pub const at90s8515 = Cpu{
	474	.name = "at90s8515",
	475	.llvm_name = "at90s8515",
	476	.features = featureSet(&[_]Feature{
	477	.avr2,
	478	}),
	479	};
	480	pub const at90s8535 = Cpu{
	481	.name = "at90s8535",
	482	.llvm_name = "at90s8535",
	483	.features = featureSet(&[_]Feature{
	484	.avr2,
	485	}),
	486	};
	487	pub const at90scr100 = Cpu{
	488	.name = "at90scr100",
	489	.llvm_name = "at90scr100",
	490	.features = featureSet(&[_]Feature{
	491	.avr5,
	492	}),
	493	};
	494	pub const at90usb1286 = Cpu{
	495	.name = "at90usb1286",
	496	.llvm_name = "at90usb1286",
	497	.features = featureSet(&[_]Feature{
	498	.avr51,
	499	}),
	500	};
	501	pub const at90usb1287 = Cpu{
	502	.name = "at90usb1287",
	503	.llvm_name = "at90usb1287",
	504	.features = featureSet(&[_]Feature{
	505	.avr51,
	506	}),
	507	};
	508	pub const at90usb162 = Cpu{
	509	.name = "at90usb162",
	510	.llvm_name = "at90usb162",
	511	.features = featureSet(&[_]Feature{
	512	.avr35,
	513	}),
	514	};
	515	pub const at90usb646 = Cpu{
	516	.name = "at90usb646",
	517	.llvm_name = "at90usb646",
	518	.features = featureSet(&[_]Feature{
	519	.avr5,
	520	}),
	521	};
	522	pub const at90usb647 = Cpu{
	523	.name = "at90usb647",
	524	.llvm_name = "at90usb647",
	525	.features = featureSet(&[_]Feature{
	526	.avr5,
	527	}),
	528	};
	529	pub const at90usb82 = Cpu{
	530	.name = "at90usb82",
	531	.llvm_name = "at90usb82",
	532	.features = featureSet(&[_]Feature{
	533	.avr35,
	534	}),
	535	};
	536	pub const at94k = Cpu{
	537	.name = "at94k",
	538	.llvm_name = "at94k",
	539	.features = featureSet(&[_]Feature{
	540	.avr3,
	541	.lpmx,
	542	.movw,
	543	.mul,
	544	}),
	545	};
	546	pub const ata5272 = Cpu{
	547	.name = "ata5272",
	548	.llvm_name = "ata5272",
	549	.features = featureSet(&[_]Feature{
	550	.avr25,
	551	}),
	552	};
	553	pub const ata5505 = Cpu{
	554	.name = "ata5505",
	555	.llvm_name = "ata5505",
	556	.features = featureSet(&[_]Feature{
	557	.avr35,
	558	}),
	559	};
	560	pub const ata5790 = Cpu{
	561	.name = "ata5790",
	562	.llvm_name = "ata5790",
	563	.features = featureSet(&[_]Feature{
	564	.avr5,
	565	}),
	566	};
	567	pub const ata5795 = Cpu{
	568	.name = "ata5795",
	569	.llvm_name = "ata5795",
	570	.features = featureSet(&[_]Feature{
	571	.avr5,
	572	}),
	573	};
	574	pub const ata6285 = Cpu{
	575	.name = "ata6285",
	576	.llvm_name = "ata6285",
	577	.features = featureSet(&[_]Feature{
	578	.avr4,
	579	}),
	580	};
	581	pub const ata6286 = Cpu{
	582	.name = "ata6286",
	583	.llvm_name = "ata6286",
	584	.features = featureSet(&[_]Feature{
	585	.avr4,
	586	}),
	587	};
	588	pub const ata6289 = Cpu{
	589	.name = "ata6289",
	590	.llvm_name = "ata6289",
	591	.features = featureSet(&[_]Feature{
	592	.avr4,
	593	}),
	594	};
	595	pub const atmega103 = Cpu{
	596	.name = "atmega103",
	597	.llvm_name = "atmega103",
	598	.features = featureSet(&[_]Feature{
	599	.avr31,
	600	}),
	601	};
	602	pub const atmega128 = Cpu{
	603	.name = "atmega128",
	604	.llvm_name = "atmega128",
	605	.features = featureSet(&[_]Feature{
	606	.avr51,
	607	}),
	608	};
	609	pub const atmega1280 = Cpu{
	610	.name = "atmega1280",
	611	.llvm_name = "atmega1280",
	612	.features = featureSet(&[_]Feature{
	613	.avr51,
	614	}),
	615	};
	616	pub const atmega1281 = Cpu{
	617	.name = "atmega1281",
	618	.llvm_name = "atmega1281",
	619	.features = featureSet(&[_]Feature{
	620	.avr51,
	621	}),
	622	};
	623	pub const atmega1284 = Cpu{
	624	.name = "atmega1284",
	625	.llvm_name = "atmega1284",
	626	.features = featureSet(&[_]Feature{
	627	.avr51,
	628	}),
	629	};
	630	pub const atmega1284p = Cpu{
	631	.name = "atmega1284p",
	632	.llvm_name = "atmega1284p",
	633	.features = featureSet(&[_]Feature{
	634	.avr51,
	635	}),
	636	};
	637	pub const atmega1284rfr2 = Cpu{
	638	.name = "atmega1284rfr2",
	639	.llvm_name = "atmega1284rfr2",
	640	.features = featureSet(&[_]Feature{
	641	.avr51,
	642	}),
	643	};
	644	pub const atmega128a = Cpu{
	645	.name = "atmega128a",
	646	.llvm_name = "atmega128a",
	647	.features = featureSet(&[_]Feature{
	648	.avr51,
	649	}),
	650	};
	651	pub const atmega128rfa1 = Cpu{
	652	.name = "atmega128rfa1",
	653	.llvm_name = "atmega128rfa1",
	654	.features = featureSet(&[_]Feature{
	655	.avr51,
	656	}),
	657	};
	658	pub const atmega128rfr2 = Cpu{
	659	.name = "atmega128rfr2",
	660	.llvm_name = "atmega128rfr2",
	661	.features = featureSet(&[_]Feature{
	662	.avr51,
	663	}),
	664	};
	665	pub const atmega16 = Cpu{
	666	.name = "atmega16",
	667	.llvm_name = "atmega16",
	668	.features = featureSet(&[_]Feature{
	669	.avr5,
	670	}),
	671	};
	672	pub const atmega161 = Cpu{
	673	.name = "atmega161",
	674	.llvm_name = "atmega161",
	675	.features = featureSet(&[_]Feature{
	676	.avr3,
	677	.lpmx,
	678	.movw,
	679	.mul,
	680	.spm,
	681	}),
	682	};
	683	pub const atmega162 = Cpu{
	684	.name = "atmega162",
	685	.llvm_name = "atmega162",
	686	.features = featureSet(&[_]Feature{
	687	.avr5,
	688	}),
	689	};
	690	pub const atmega163 = Cpu{
	691	.name = "atmega163",
	692	.llvm_name = "atmega163",
	693	.features = featureSet(&[_]Feature{
	694	.avr3,
	695	.lpmx,
	696	.movw,
	697	.mul,
	698	.spm,
	699	}),
	700	};
	701	pub const atmega164a = Cpu{
	702	.name = "atmega164a",
	703	.llvm_name = "atmega164a",
	704	.features = featureSet(&[_]Feature{
	705	.avr5,
	706	}),
	707	};
	708	pub const atmega164p = Cpu{
	709	.name = "atmega164p",
	710	.llvm_name = "atmega164p",
	711	.features = featureSet(&[_]Feature{
	712	.avr5,
	713	}),
	714	};
	715	pub const atmega164pa = Cpu{
	716	.name = "atmega164pa",
	717	.llvm_name = "atmega164pa",
	718	.features = featureSet(&[_]Feature{
	719	.avr5,
	720	}),
	721	};
	722	pub const atmega165 = Cpu{
	723	.name = "atmega165",
	724	.llvm_name = "atmega165",
	725	.features = featureSet(&[_]Feature{
	726	.avr5,
	727	}),
	728	};
	729	pub const atmega165a = Cpu{
	730	.name = "atmega165a",
	731	.llvm_name = "atmega165a",
	732	.features = featureSet(&[_]Feature{
	733	.avr5,
	734	}),
	735	};
	736	pub const atmega165p = Cpu{
	737	.name = "atmega165p",
	738	.llvm_name = "atmega165p",
	739	.features = featureSet(&[_]Feature{
	740	.avr5,
	741	}),
	742	};
	743	pub const atmega165pa = Cpu{
	744	.name = "atmega165pa",
	745	.llvm_name = "atmega165pa",
	746	.features = featureSet(&[_]Feature{
	747	.avr5,
	748	}),
	749	};
	750	pub const atmega168 = Cpu{
	751	.name = "atmega168",
	752	.llvm_name = "atmega168",
	753	.features = featureSet(&[_]Feature{
	754	.avr5,
	755	}),
	756	};
	757	pub const atmega168a = Cpu{
	758	.name = "atmega168a",
	759	.llvm_name = "atmega168a",
	760	.features = featureSet(&[_]Feature{
	761	.avr5,
	762	}),
	763	};
	764	pub const atmega168p = Cpu{
	765	.name = "atmega168p",
	766	.llvm_name = "atmega168p",
	767	.features = featureSet(&[_]Feature{
	768	.avr5,
	769	}),
	770	};
	771	pub const atmega168pa = Cpu{
	772	.name = "atmega168pa",
	773	.llvm_name = "atmega168pa",
	774	.features = featureSet(&[_]Feature{
	775	.avr5,
	776	}),
	777	};
	778	pub const atmega169 = Cpu{
	779	.name = "atmega169",
	780	.llvm_name = "atmega169",
	781	.features = featureSet(&[_]Feature{
	782	.avr5,
	783	}),
	784	};
	785	pub const atmega169a = Cpu{
	786	.name = "atmega169a",
	787	.llvm_name = "atmega169a",
	788	.features = featureSet(&[_]Feature{
	789	.avr5,
	790	}),
	791	};
	792	pub const atmega169p = Cpu{
	793	.name = "atmega169p",
	794	.llvm_name = "atmega169p",
	795	.features = featureSet(&[_]Feature{
	796	.avr5,
	797	}),
	798	};
	799	pub const atmega169pa = Cpu{
	800	.name = "atmega169pa",
	801	.llvm_name = "atmega169pa",
	802	.features = featureSet(&[_]Feature{
	803	.avr5,
	804	}),
	805	};
	806	pub const atmega16a = Cpu{
	807	.name = "atmega16a",
	808	.llvm_name = "atmega16a",
	809	.features = featureSet(&[_]Feature{
	810	.avr5,
	811	}),
	812	};
	813	pub const atmega16hva = Cpu{
	814	.name = "atmega16hva",
	815	.llvm_name = "atmega16hva",
	816	.features = featureSet(&[_]Feature{
	817	.avr5,
	818	}),
	819	};
	820	pub const atmega16hva2 = Cpu{
	821	.name = "atmega16hva2",
	822	.llvm_name = "atmega16hva2",
	823	.features = featureSet(&[_]Feature{
	824	.avr5,
	825	}),
	826	};
	827	pub const atmega16hvb = Cpu{
	828	.name = "atmega16hvb",
	829	.llvm_name = "atmega16hvb",
	830	.features = featureSet(&[_]Feature{
	831	.avr5,
	832	}),
	833	};
	834	pub const atmega16hvbrevb = Cpu{
	835	.name = "atmega16hvbrevb",
	836	.llvm_name = "atmega16hvbrevb",
	837	.features = featureSet(&[_]Feature{
	838	.avr5,
	839	}),
	840	};
	841	pub const atmega16m1 = Cpu{
	842	.name = "atmega16m1",
	843	.llvm_name = "atmega16m1",
	844	.features = featureSet(&[_]Feature{
	845	.avr5,
	846	}),
	847	};
	848	pub const atmega16u2 = Cpu{
	849	.name = "atmega16u2",
	850	.llvm_name = "atmega16u2",
	851	.features = featureSet(&[_]Feature{
	852	.avr35,
	853	}),
	854	};
	855	pub const atmega16u4 = Cpu{
	856	.name = "atmega16u4",
	857	.llvm_name = "atmega16u4",
	858	.features = featureSet(&[_]Feature{
	859	.avr5,
	860	}),
	861	};
	862	pub const atmega2560 = Cpu{
	863	.name = "atmega2560",
	864	.llvm_name = "atmega2560",
	865	.features = featureSet(&[_]Feature{
	866	.avr6,
	867	}),
	868	};
	869	pub const atmega2561 = Cpu{
	870	.name = "atmega2561",
	871	.llvm_name = "atmega2561",
	872	.features = featureSet(&[_]Feature{
	873	.avr6,
	874	}),
	875	};
	876	pub const atmega2564rfr2 = Cpu{
	877	.name = "atmega2564rfr2",
	878	.llvm_name = "atmega2564rfr2",
	879	.features = featureSet(&[_]Feature{
	880	.avr6,
	881	}),
	882	};
	883	pub const atmega256rfr2 = Cpu{
	884	.name = "atmega256rfr2",
	885	.llvm_name = "atmega256rfr2",
	886	.features = featureSet(&[_]Feature{
	887	.avr6,
	888	}),
	889	};
	890	pub const atmega32 = Cpu{
	891	.name = "atmega32",
	892	.llvm_name = "atmega32",
	893	.features = featureSet(&[_]Feature{
	894	.avr5,
	895	}),
	896	};
	897	pub const atmega323 = Cpu{
	898	.name = "atmega323",
	899	.llvm_name = "atmega323",
	900	.features = featureSet(&[_]Feature{
	901	.avr5,
	902	}),
	903	};
	904	pub const atmega324a = Cpu{
	905	.name = "atmega324a",
	906	.llvm_name = "atmega324a",
	907	.features = featureSet(&[_]Feature{
	908	.avr5,
	909	}),
	910	};
	911	pub const atmega324p = Cpu{
	912	.name = "atmega324p",
	913	.llvm_name = "atmega324p",
	914	.features = featureSet(&[_]Feature{
	915	.avr5,
	916	}),
	917	};
	918	pub const atmega324pa = Cpu{
	919	.name = "atmega324pa",
	920	.llvm_name = "atmega324pa",
	921	.features = featureSet(&[_]Feature{
	922	.avr5,
	923	}),
	924	};
	925	pub const atmega325 = Cpu{
	926	.name = "atmega325",
	927	.llvm_name = "atmega325",
	928	.features = featureSet(&[_]Feature{
	929	.avr5,
	930	}),
	931	};
	932	pub const atmega3250 = Cpu{
	933	.name = "atmega3250",
	934	.llvm_name = "atmega3250",
	935	.features = featureSet(&[_]Feature{
	936	.avr5,
	937	}),
	938	};
	939	pub const atmega3250a = Cpu{
	940	.name = "atmega3250a",
	941	.llvm_name = "atmega3250a",
	942	.features = featureSet(&[_]Feature{
	943	.avr5,
	944	}),
	945	};
	946	pub const atmega3250p = Cpu{
	947	.name = "atmega3250p",
	948	.llvm_name = "atmega3250p",
	949	.features = featureSet(&[_]Feature{
	950	.avr5,
	951	}),
	952	};
	953	pub const atmega3250pa = Cpu{
	954	.name = "atmega3250pa",
	955	.llvm_name = "atmega3250pa",
	956	.features = featureSet(&[_]Feature{
	957	.avr5,
	958	}),
	959	};
	960	pub const atmega325a = Cpu{
	961	.name = "atmega325a",
	962	.llvm_name = "atmega325a",
	963	.features = featureSet(&[_]Feature{
	964	.avr5,
	965	}),
	966	};
	967	pub const atmega325p = Cpu{
	968	.name = "atmega325p",
	969	.llvm_name = "atmega325p",
	970	.features = featureSet(&[_]Feature{
	971	.avr5,
	972	}),
	973	};
	974	pub const atmega325pa = Cpu{
	975	.name = "atmega325pa",
	976	.llvm_name = "atmega325pa",
	977	.features = featureSet(&[_]Feature{
	978	.avr5,
	979	}),
	980	};
	981	pub const atmega328 = Cpu{
	982	.name = "atmega328",
	983	.llvm_name = "atmega328",
	984	.features = featureSet(&[_]Feature{
	985	.avr5,
	986	}),
	987	};
	988	pub const atmega328p = Cpu{
	989	.name = "atmega328p",
	990	.llvm_name = "atmega328p",
	991	.features = featureSet(&[_]Feature{
	992	.avr5,
	993	}),
	994	};
	995	pub const atmega329 = Cpu{
	996	.name = "atmega329",
	997	.llvm_name = "atmega329",
	998	.features = featureSet(&[_]Feature{
	999	.avr5,
	1000	}),
	1001	};
	1002	pub const atmega3290 = Cpu{
	1003	.name = "atmega3290",
	1004	.llvm_name = "atmega3290",
	1005	.features = featureSet(&[_]Feature{
	1006	.avr5,
	1007	}),
	1008	};
	1009	pub const atmega3290a = Cpu{
	1010	.name = "atmega3290a",
	1011	.llvm_name = "atmega3290a",
	1012	.features = featureSet(&[_]Feature{
	1013	.avr5,
	1014	}),
	1015	};
	1016	pub const atmega3290p = Cpu{
	1017	.name = "atmega3290p",
	1018	.llvm_name = "atmega3290p",
	1019	.features = featureSet(&[_]Feature{
	1020	.avr5,
	1021	}),
	1022	};
	1023	pub const atmega3290pa = Cpu{
	1024	.name = "atmega3290pa",
	1025	.llvm_name = "atmega3290pa",
	1026	.features = featureSet(&[_]Feature{
	1027	.avr5,
	1028	}),
	1029	};
	1030	pub const atmega329a = Cpu{
	1031	.name = "atmega329a",
	1032	.llvm_name = "atmega329a",
	1033	.features = featureSet(&[_]Feature{
	1034	.avr5,
	1035	}),
	1036	};
	1037	pub const atmega329p = Cpu{
	1038	.name = "atmega329p",
	1039	.llvm_name = "atmega329p",
	1040	.features = featureSet(&[_]Feature{
	1041	.avr5,
	1042	}),
	1043	};
	1044	pub const atmega329pa = Cpu{
	1045	.name = "atmega329pa",
	1046	.llvm_name = "atmega329pa",
	1047	.features = featureSet(&[_]Feature{
	1048	.avr5,
	1049	}),
	1050	};
	1051	pub const atmega32a = Cpu{
	1052	.name = "atmega32a",
	1053	.llvm_name = "atmega32a",
	1054	.features = featureSet(&[_]Feature{
	1055	.avr5,
	1056	}),
	1057	};
	1058	pub const atmega32c1 = Cpu{
	1059	.name = "atmega32c1",
	1060	.llvm_name = "atmega32c1",
	1061	.features = featureSet(&[_]Feature{
	1062	.avr5,
	1063	}),
	1064	};
	1065	pub const atmega32hvb = Cpu{
	1066	.name = "atmega32hvb",
	1067	.llvm_name = "atmega32hvb",
	1068	.features = featureSet(&[_]Feature{
	1069	.avr5,
	1070	}),
	1071	};
	1072	pub const atmega32hvbrevb = Cpu{
	1073	.name = "atmega32hvbrevb",
	1074	.llvm_name = "atmega32hvbrevb",
	1075	.features = featureSet(&[_]Feature{
	1076	.avr5,
	1077	}),
	1078	};
	1079	pub const atmega32m1 = Cpu{
	1080	.name = "atmega32m1",
	1081	.llvm_name = "atmega32m1",
	1082	.features = featureSet(&[_]Feature{
	1083	.avr5,
	1084	}),
	1085	};
	1086	pub const atmega32u2 = Cpu{
	1087	.name = "atmega32u2",
	1088	.llvm_name = "atmega32u2",
	1089	.features = featureSet(&[_]Feature{
	1090	.avr35,
	1091	}),
	1092	};
	1093	pub const atmega32u4 = Cpu{
	1094	.name = "atmega32u4",
	1095	.llvm_name = "atmega32u4",
	1096	.features = featureSet(&[_]Feature{
	1097	.avr5,
	1098	}),
	1099	};
	1100	pub const atmega32u6 = Cpu{
	1101	.name = "atmega32u6",
	1102	.llvm_name = "atmega32u6",
	1103	.features = featureSet(&[_]Feature{
	1104	.avr5,
	1105	}),
	1106	};
	1107	pub const atmega406 = Cpu{
	1108	.name = "atmega406",
	1109	.llvm_name = "atmega406",
	1110	.features = featureSet(&[_]Feature{
	1111	.avr5,
	1112	}),
	1113	};
	1114	pub const atmega48 = Cpu{
	1115	.name = "atmega48",
	1116	.llvm_name = "atmega48",
	1117	.features = featureSet(&[_]Feature{
	1118	.avr4,
	1119	}),
	1120	};
	1121	pub const atmega48a = Cpu{
	1122	.name = "atmega48a",
	1123	.llvm_name = "atmega48a",
	1124	.features = featureSet(&[_]Feature{
	1125	.avr4,
	1126	}),
	1127	};
	1128	pub const atmega48p = Cpu{
	1129	.name = "atmega48p",
	1130	.llvm_name = "atmega48p",
	1131	.features = featureSet(&[_]Feature{
	1132	.avr4,
	1133	}),
	1134	};
	1135	pub const atmega48pa = Cpu{
	1136	.name = "atmega48pa",
	1137	.llvm_name = "atmega48pa",
	1138	.features = featureSet(&[_]Feature{
	1139	.avr4,
	1140	}),
	1141	};
	1142	pub const atmega64 = Cpu{
	1143	.name = "atmega64",
	1144	.llvm_name = "atmega64",
	1145	.features = featureSet(&[_]Feature{
	1146	.avr5,
	1147	}),
	1148	};
	1149	pub const atmega640 = Cpu{
	1150	.name = "atmega640",
	1151	.llvm_name = "atmega640",
	1152	.features = featureSet(&[_]Feature{
	1153	.avr5,
	1154	}),
	1155	};
	1156	pub const atmega644 = Cpu{
	1157	.name = "atmega644",
	1158	.llvm_name = "atmega644",
	1159	.features = featureSet(&[_]Feature{
	1160	.avr5,
	1161	}),
	1162	};
	1163	pub const atmega644a = Cpu{
	1164	.name = "atmega644a",
	1165	.llvm_name = "atmega644a",
	1166	.features = featureSet(&[_]Feature{
	1167	.avr5,
	1168	}),
	1169	};
	1170	pub const atmega644p = Cpu{
	1171	.name = "atmega644p",
	1172	.llvm_name = "atmega644p",
	1173	.features = featureSet(&[_]Feature{
	1174	.avr5,
	1175	}),
	1176	};
	1177	pub const atmega644pa = Cpu{
	1178	.name = "atmega644pa",
	1179	.llvm_name = "atmega644pa",
	1180	.features = featureSet(&[_]Feature{
	1181	.avr5,
	1182	}),
	1183	};
	1184	pub const atmega644rfr2 = Cpu{
	1185	.name = "atmega644rfr2",
	1186	.llvm_name = "atmega644rfr2",
	1187	.features = featureSet(&[_]Feature{
	1188	.avr5,
	1189	}),
	1190	};
	1191	pub const atmega645 = Cpu{
	1192	.name = "atmega645",
	1193	.llvm_name = "atmega645",
	1194	.features = featureSet(&[_]Feature{
	1195	.avr5,
	1196	}),
	1197	};
	1198	pub const atmega6450 = Cpu{
	1199	.name = "atmega6450",
	1200	.llvm_name = "atmega6450",
	1201	.features = featureSet(&[_]Feature{
	1202	.avr5,
	1203	}),
	1204	};
	1205	pub const atmega6450a = Cpu{
	1206	.name = "atmega6450a",
	1207	.llvm_name = "atmega6450a",
	1208	.features = featureSet(&[_]Feature{
	1209	.avr5,
	1210	}),
	1211	};
	1212	pub const atmega6450p = Cpu{
	1213	.name = "atmega6450p",
	1214	.llvm_name = "atmega6450p",
	1215	.features = featureSet(&[_]Feature{
	1216	.avr5,
	1217	}),
	1218	};
	1219	pub const atmega645a = Cpu{
	1220	.name = "atmega645a",
	1221	.llvm_name = "atmega645a",
	1222	.features = featureSet(&[_]Feature{
	1223	.avr5,
	1224	}),
	1225	};
	1226	pub const atmega645p = Cpu{
	1227	.name = "atmega645p",
	1228	.llvm_name = "atmega645p",
	1229	.features = featureSet(&[_]Feature{
	1230	.avr5,
	1231	}),
	1232	};
	1233	pub const atmega649 = Cpu{
	1234	.name = "atmega649",
	1235	.llvm_name = "atmega649",
	1236	.features = featureSet(&[_]Feature{
	1237	.avr5,
	1238	}),
	1239	};
	1240	pub const atmega6490 = Cpu{
	1241	.name = "atmega6490",
	1242	.llvm_name = "atmega6490",
	1243	.features = featureSet(&[_]Feature{
	1244	.avr5,
	1245	}),
	1246	};
	1247	pub const atmega6490a = Cpu{
	1248	.name = "atmega6490a",
	1249	.llvm_name = "atmega6490a",
	1250	.features = featureSet(&[_]Feature{
	1251	.avr5,
	1252	}),
	1253	};
	1254	pub const atmega6490p = Cpu{
	1255	.name = "atmega6490p",
	1256	.llvm_name = "atmega6490p",
	1257	.features = featureSet(&[_]Feature{
	1258	.avr5,
	1259	}),
	1260	};
	1261	pub const atmega649a = Cpu{
	1262	.name = "atmega649a",
	1263	.llvm_name = "atmega649a",
	1264	.features = featureSet(&[_]Feature{
	1265	.avr5,
	1266	}),
	1267	};
	1268	pub const atmega649p = Cpu{
	1269	.name = "atmega649p",
	1270	.llvm_name = "atmega649p",
	1271	.features = featureSet(&[_]Feature{
	1272	.avr5,
	1273	}),
	1274	};
	1275	pub const atmega64a = Cpu{
	1276	.name = "atmega64a",
	1277	.llvm_name = "atmega64a",
	1278	.features = featureSet(&[_]Feature{
	1279	.avr5,
	1280	}),
	1281	};
	1282	pub const atmega64c1 = Cpu{
	1283	.name = "atmega64c1",
	1284	.llvm_name = "atmega64c1",
	1285	.features = featureSet(&[_]Feature{
	1286	.avr5,
	1287	}),
	1288	};
	1289	pub const atmega64hve = Cpu{
	1290	.name = "atmega64hve",
	1291	.llvm_name = "atmega64hve",
	1292	.features = featureSet(&[_]Feature{
	1293	.avr5,
	1294	}),
	1295	};
	1296	pub const atmega64m1 = Cpu{
	1297	.name = "atmega64m1",
	1298	.llvm_name = "atmega64m1",
	1299	.features = featureSet(&[_]Feature{
	1300	.avr5,
	1301	}),
	1302	};
	1303	pub const atmega64rfr2 = Cpu{
	1304	.name = "atmega64rfr2",
	1305	.llvm_name = "atmega64rfr2",
	1306	.features = featureSet(&[_]Feature{
	1307	.avr5,
	1308	}),
	1309	};
	1310	pub const atmega8 = Cpu{
	1311	.name = "atmega8",
	1312	.llvm_name = "atmega8",
	1313	.features = featureSet(&[_]Feature{
	1314	.avr4,
	1315	}),
	1316	};
	1317	pub const atmega8515 = Cpu{
	1318	.name = "atmega8515",
	1319	.llvm_name = "atmega8515",
	1320	.features = featureSet(&[_]Feature{
	1321	.avr2,
	1322	.lpmx,
	1323	.movw,
	1324	.mul,
	1325	.spm,
	1326	}),
	1327	};
	1328	pub const atmega8535 = Cpu{
	1329	.name = "atmega8535",
	1330	.llvm_name = "atmega8535",
	1331	.features = featureSet(&[_]Feature{
	1332	.avr2,
	1333	.lpmx,
	1334	.movw,
	1335	.mul,
	1336	.spm,
	1337	}),
	1338	};
	1339	pub const atmega88 = Cpu{
	1340	.name = "atmega88",
	1341	.llvm_name = "atmega88",
	1342	.features = featureSet(&[_]Feature{
	1343	.avr4,
	1344	}),
	1345	};
	1346	pub const atmega88a = Cpu{
	1347	.name = "atmega88a",
	1348	.llvm_name = "atmega88a",
	1349	.features = featureSet(&[_]Feature{
	1350	.avr4,
	1351	}),
	1352	};
	1353	pub const atmega88p = Cpu{
	1354	.name = "atmega88p",
	1355	.llvm_name = "atmega88p",
	1356	.features = featureSet(&[_]Feature{
	1357	.avr4,
	1358	}),
	1359	};
	1360	pub const atmega88pa = Cpu{
	1361	.name = "atmega88pa",
	1362	.llvm_name = "atmega88pa",
	1363	.features = featureSet(&[_]Feature{
	1364	.avr4,
	1365	}),
	1366	};
	1367	pub const atmega8a = Cpu{
	1368	.name = "atmega8a",
	1369	.llvm_name = "atmega8a",
	1370	.features = featureSet(&[_]Feature{
	1371	.avr4,
	1372	}),
	1373	};
	1374	pub const atmega8hva = Cpu{
	1375	.name = "atmega8hva",
	1376	.llvm_name = "atmega8hva",
	1377	.features = featureSet(&[_]Feature{
	1378	.avr4,
	1379	}),
	1380	};
	1381	pub const atmega8u2 = Cpu{
	1382	.name = "atmega8u2",
	1383	.llvm_name = "atmega8u2",
	1384	.features = featureSet(&[_]Feature{
	1385	.avr35,
	1386	}),
	1387	};
	1388	pub const attiny10 = Cpu{
	1389	.name = "attiny10",
	1390	.llvm_name = "attiny10",
	1391	.features = featureSet(&[_]Feature{
	1392	.avrtiny,
	1393	}),
	1394	};
	1395	pub const attiny102 = Cpu{
	1396	.name = "attiny102",
	1397	.llvm_name = "attiny102",
	1398	.features = featureSet(&[_]Feature{
	1399	.avrtiny,
	1400	}),
	1401	};
	1402	pub const attiny104 = Cpu{
	1403	.name = "attiny104",
	1404	.llvm_name = "attiny104",
	1405	.features = featureSet(&[_]Feature{
	1406	.avrtiny,
	1407	}),
	1408	};
	1409	pub const attiny11 = Cpu{
	1410	.name = "attiny11",
	1411	.llvm_name = "attiny11",
	1412	.features = featureSet(&[_]Feature{
	1413	.avr1,
	1414	}),
	1415	};
	1416	pub const attiny12 = Cpu{
	1417	.name = "attiny12",
	1418	.llvm_name = "attiny12",
	1419	.features = featureSet(&[_]Feature{
	1420	.avr1,
	1421	}),
	1422	};
	1423	pub const attiny13 = Cpu{
	1424	.name = "attiny13",
	1425	.llvm_name = "attiny13",
	1426	.features = featureSet(&[_]Feature{
	1427	.avr25,
	1428	}),
	1429	};
	1430	pub const attiny13a = Cpu{
	1431	.name = "attiny13a",
	1432	.llvm_name = "attiny13a",
	1433	.features = featureSet(&[_]Feature{
	1434	.avr25,
	1435	}),
	1436	};
	1437	pub const attiny15 = Cpu{
	1438	.name = "attiny15",
	1439	.llvm_name = "attiny15",
	1440	.features = featureSet(&[_]Feature{
	1441	.avr1,
	1442	}),
	1443	};
	1444	pub const attiny1634 = Cpu{
	1445	.name = "attiny1634",
	1446	.llvm_name = "attiny1634",
	1447	.features = featureSet(&[_]Feature{
	1448	.avr35,
	1449	}),
	1450	};
	1451	pub const attiny167 = Cpu{
	1452	.name = "attiny167",
	1453	.llvm_name = "attiny167",
	1454	.features = featureSet(&[_]Feature{
	1455	.avr35,
	1456	}),
	1457	};
	1458	pub const attiny20 = Cpu{
	1459	.name = "attiny20",
	1460	.llvm_name = "attiny20",
	1461	.features = featureSet(&[_]Feature{
	1462	.avrtiny,
	1463	}),
	1464	};
	1465	pub const attiny22 = Cpu{
	1466	.name = "attiny22",
	1467	.llvm_name = "attiny22",
	1468	.features = featureSet(&[_]Feature{
	1469	.avr2,
	1470	}),
	1471	};
	1472	pub const attiny2313 = Cpu{
	1473	.name = "attiny2313",
	1474	.llvm_name = "attiny2313",
	1475	.features = featureSet(&[_]Feature{
	1476	.avr25,
	1477	}),
	1478	};
	1479	pub const attiny2313a = Cpu{
	1480	.name = "attiny2313a",
	1481	.llvm_name = "attiny2313a",
	1482	.features = featureSet(&[_]Feature{
	1483	.avr25,
	1484	}),
	1485	};
	1486	pub const attiny24 = Cpu{
	1487	.name = "attiny24",
	1488	.llvm_name = "attiny24",
	1489	.features = featureSet(&[_]Feature{
	1490	.avr25,
	1491	}),
	1492	};
	1493	pub const attiny24a = Cpu{
	1494	.name = "attiny24a",
	1495	.llvm_name = "attiny24a",
	1496	.features = featureSet(&[_]Feature{
	1497	.avr25,
	1498	}),
	1499	};
	1500	pub const attiny25 = Cpu{
	1501	.name = "attiny25",
	1502	.llvm_name = "attiny25",
	1503	.features = featureSet(&[_]Feature{
	1504	.avr25,
	1505	}),
	1506	};
	1507	pub const attiny26 = Cpu{
	1508	.name = "attiny26",
	1509	.llvm_name = "attiny26",
	1510	.features = featureSet(&[_]Feature{
	1511	.avr2,
	1512	.lpmx,
	1513	}),
	1514	};
	1515	pub const attiny261 = Cpu{
	1516	.name = "attiny261",
	1517	.llvm_name = "attiny261",
	1518	.features = featureSet(&[_]Feature{
	1519	.avr25,
	1520	}),
	1521	};
	1522	pub const attiny261a = Cpu{
	1523	.name = "attiny261a",
	1524	.llvm_name = "attiny261a",
	1525	.features = featureSet(&[_]Feature{
	1526	.avr25,
	1527	}),
	1528	};
	1529	pub const attiny28 = Cpu{
	1530	.name = "attiny28",
	1531	.llvm_name = "attiny28",
	1532	.features = featureSet(&[_]Feature{
	1533	.avr1,
	1534	}),
	1535	};
	1536	pub const attiny4 = Cpu{
	1537	.name = "attiny4",
	1538	.llvm_name = "attiny4",
	1539	.features = featureSet(&[_]Feature{
	1540	.avrtiny,
	1541	}),
	1542	};
	1543	pub const attiny40 = Cpu{
	1544	.name = "attiny40",
	1545	.llvm_name = "attiny40",
	1546	.features = featureSet(&[_]Feature{
	1547	.avrtiny,
	1548	}),
	1549	};
	1550	pub const attiny4313 = Cpu{
	1551	.name = "attiny4313",
	1552	.llvm_name = "attiny4313",
	1553	.features = featureSet(&[_]Feature{
	1554	.avr25,
	1555	}),
	1556	};
	1557	pub const attiny43u = Cpu{
	1558	.name = "attiny43u",
	1559	.llvm_name = "attiny43u",
	1560	.features = featureSet(&[_]Feature{
	1561	.avr25,
	1562	}),
	1563	};
	1564	pub const attiny44 = Cpu{
	1565	.name = "attiny44",
	1566	.llvm_name = "attiny44",
	1567	.features = featureSet(&[_]Feature{
	1568	.avr25,
	1569	}),
	1570	};
	1571	pub const attiny44a = Cpu{
	1572	.name = "attiny44a",
	1573	.llvm_name = "attiny44a",
	1574	.features = featureSet(&[_]Feature{
	1575	.avr25,
	1576	}),
	1577	};
	1578	pub const attiny45 = Cpu{
	1579	.name = "attiny45",
	1580	.llvm_name = "attiny45",
	1581	.features = featureSet(&[_]Feature{
	1582	.avr25,
	1583	}),
	1584	};
	1585	pub const attiny461 = Cpu{
	1586	.name = "attiny461",
	1587	.llvm_name = "attiny461",
	1588	.features = featureSet(&[_]Feature{
	1589	.avr25,
	1590	}),
	1591	};
	1592	pub const attiny461a = Cpu{
	1593	.name = "attiny461a",
	1594	.llvm_name = "attiny461a",
	1595	.features = featureSet(&[_]Feature{
	1596	.avr25,
	1597	}),
	1598	};
	1599	pub const attiny48 = Cpu{
	1600	.name = "attiny48",
	1601	.llvm_name = "attiny48",
	1602	.features = featureSet(&[_]Feature{
	1603	.avr25,
	1604	}),
	1605	};
	1606	pub const attiny5 = Cpu{
	1607	.name = "attiny5",
	1608	.llvm_name = "attiny5",
	1609	.features = featureSet(&[_]Feature{
	1610	.avrtiny,
	1611	}),
	1612	};
	1613	pub const attiny828 = Cpu{
	1614	.name = "attiny828",
	1615	.llvm_name = "attiny828",
	1616	.features = featureSet(&[_]Feature{
	1617	.avr25,
	1618	}),
	1619	};
	1620	pub const attiny84 = Cpu{
	1621	.name = "attiny84",
	1622	.llvm_name = "attiny84",
	1623	.features = featureSet(&[_]Feature{
	1624	.avr25,
	1625	}),
	1626	};
	1627	pub const attiny84a = Cpu{
	1628	.name = "attiny84a",
	1629	.llvm_name = "attiny84a",
	1630	.features = featureSet(&[_]Feature{
	1631	.avr25,
	1632	}),
	1633	};
	1634	pub const attiny85 = Cpu{
	1635	.name = "attiny85",
	1636	.llvm_name = "attiny85",
	1637	.features = featureSet(&[_]Feature{
	1638	.avr25,
	1639	}),
	1640	};
	1641	pub const attiny861 = Cpu{
	1642	.name = "attiny861",
	1643	.llvm_name = "attiny861",
	1644	.features = featureSet(&[_]Feature{
	1645	.avr25,
	1646	}),
	1647	};
	1648	pub const attiny861a = Cpu{
	1649	.name = "attiny861a",
	1650	.llvm_name = "attiny861a",
	1651	.features = featureSet(&[_]Feature{
	1652	.avr25,
	1653	}),
	1654	};
	1655	pub const attiny87 = Cpu{
	1656	.name = "attiny87",
	1657	.llvm_name = "attiny87",
	1658	.features = featureSet(&[_]Feature{
	1659	.avr25,
	1660	}),
	1661	};
	1662	pub const attiny88 = Cpu{
	1663	.name = "attiny88",
	1664	.llvm_name = "attiny88",
	1665	.features = featureSet(&[_]Feature{
	1666	.avr25,
	1667	}),
	1668	};
	1669	pub const attiny9 = Cpu{
	1670	.name = "attiny9",
	1671	.llvm_name = "attiny9",
	1672	.features = featureSet(&[_]Feature{
	1673	.avrtiny,
	1674	}),
	1675	};
	1676	pub const atxmega128a1 = Cpu{
	1677	.name = "atxmega128a1",
	1678	.llvm_name = "atxmega128a1",
	1679	.features = featureSet(&[_]Feature{
	1680	.xmega,
	1681	}),
	1682	};
	1683	pub const atxmega128a1u = Cpu{
	1684	.name = "atxmega128a1u",
	1685	.llvm_name = "atxmega128a1u",
	1686	.features = featureSet(&[_]Feature{
	1687	.xmegau,
	1688	}),
	1689	};
	1690	pub const atxmega128a3 = Cpu{
	1691	.name = "atxmega128a3",
	1692	.llvm_name = "atxmega128a3",
	1693	.features = featureSet(&[_]Feature{
	1694	.xmega,
	1695	}),
	1696	};
	1697	pub const atxmega128a3u = Cpu{
	1698	.name = "atxmega128a3u",
	1699	.llvm_name = "atxmega128a3u",
	1700	.features = featureSet(&[_]Feature{
	1701	.xmegau,
	1702	}),
	1703	};
	1704	pub const atxmega128a4u = Cpu{
	1705	.name = "atxmega128a4u",
	1706	.llvm_name = "atxmega128a4u",
	1707	.features = featureSet(&[_]Feature{
	1708	.xmegau,
	1709	}),
	1710	};
	1711	pub const atxmega128b1 = Cpu{
	1712	.name = "atxmega128b1",
	1713	.llvm_name = "atxmega128b1",
	1714	.features = featureSet(&[_]Feature{
	1715	.xmegau,
	1716	}),
	1717	};
	1718	pub const atxmega128b3 = Cpu{
	1719	.name = "atxmega128b3",
	1720	.llvm_name = "atxmega128b3",
	1721	.features = featureSet(&[_]Feature{
	1722	.xmegau,
	1723	}),
	1724	};
	1725	pub const atxmega128c3 = Cpu{
	1726	.name = "atxmega128c3",
	1727	.llvm_name = "atxmega128c3",
	1728	.features = featureSet(&[_]Feature{
	1729	.xmegau,
	1730	}),
	1731	};
	1732	pub const atxmega128d3 = Cpu{
	1733	.name = "atxmega128d3",
	1734	.llvm_name = "atxmega128d3",
	1735	.features = featureSet(&[_]Feature{
	1736	.xmega,
	1737	}),
	1738	};
	1739	pub const atxmega128d4 = Cpu{
	1740	.name = "atxmega128d4",
	1741	.llvm_name = "atxmega128d4",
	1742	.features = featureSet(&[_]Feature{
	1743	.xmega,
	1744	}),
	1745	};
	1746	pub const atxmega16a4 = Cpu{
	1747	.name = "atxmega16a4",
	1748	.llvm_name = "atxmega16a4",
	1749	.features = featureSet(&[_]Feature{
	1750	.xmega,
	1751	}),
	1752	};
	1753	pub const atxmega16a4u = Cpu{
	1754	.name = "atxmega16a4u",
	1755	.llvm_name = "atxmega16a4u",
	1756	.features = featureSet(&[_]Feature{
	1757	.xmegau,
	1758	}),
	1759	};
	1760	pub const atxmega16c4 = Cpu{
	1761	.name = "atxmega16c4",
	1762	.llvm_name = "atxmega16c4",
	1763	.features = featureSet(&[_]Feature{
	1764	.xmegau,
	1765	}),
	1766	};
	1767	pub const atxmega16d4 = Cpu{
	1768	.name = "atxmega16d4",
	1769	.llvm_name = "atxmega16d4",
	1770	.features = featureSet(&[_]Feature{
	1771	.xmega,
	1772	}),
	1773	};
	1774	pub const atxmega16e5 = Cpu{
	1775	.name = "atxmega16e5",
	1776	.llvm_name = "atxmega16e5",
	1777	.features = featureSet(&[_]Feature{
	1778	.xmega,
	1779	}),
	1780	};
	1781	pub const atxmega192a3 = Cpu{
	1782	.name = "atxmega192a3",
	1783	.llvm_name = "atxmega192a3",
	1784	.features = featureSet(&[_]Feature{
	1785	.xmega,
	1786	}),
	1787	};
	1788	pub const atxmega192a3u = Cpu{
	1789	.name = "atxmega192a3u",
	1790	.llvm_name = "atxmega192a3u",
	1791	.features = featureSet(&[_]Feature{
	1792	.xmegau,
	1793	}),
	1794	};
	1795	pub const atxmega192c3 = Cpu{
	1796	.name = "atxmega192c3",
	1797	.llvm_name = "atxmega192c3",
	1798	.features = featureSet(&[_]Feature{
	1799	.xmegau,
	1800	}),
	1801	};
	1802	pub const atxmega192d3 = Cpu{
	1803	.name = "atxmega192d3",
	1804	.llvm_name = "atxmega192d3",
	1805	.features = featureSet(&[_]Feature{
	1806	.xmega,
	1807	}),
	1808	};
	1809	pub const atxmega256a3 = Cpu{
	1810	.name = "atxmega256a3",
	1811	.llvm_name = "atxmega256a3",
	1812	.features = featureSet(&[_]Feature{
	1813	.xmega,
	1814	}),
	1815	};
	1816	pub const atxmega256a3b = Cpu{
	1817	.name = "atxmega256a3b",
	1818	.llvm_name = "atxmega256a3b",
	1819	.features = featureSet(&[_]Feature{
	1820	.xmega,
	1821	}),
	1822	};
	1823	pub const atxmega256a3bu = Cpu{
	1824	.name = "atxmega256a3bu",
	1825	.llvm_name = "atxmega256a3bu",
	1826	.features = featureSet(&[_]Feature{
	1827	.xmegau,
	1828	}),
	1829	};
	1830	pub const atxmega256a3u = Cpu{
	1831	.name = "atxmega256a3u",
	1832	.llvm_name = "atxmega256a3u",
	1833	.features = featureSet(&[_]Feature{
	1834	.xmegau,
	1835	}),
	1836	};
	1837	pub const atxmega256c3 = Cpu{
	1838	.name = "atxmega256c3",
	1839	.llvm_name = "atxmega256c3",
	1840	.features = featureSet(&[_]Feature{
	1841	.xmegau,
	1842	}),
	1843	};
	1844	pub const atxmega256d3 = Cpu{
	1845	.name = "atxmega256d3",
	1846	.llvm_name = "atxmega256d3",
	1847	.features = featureSet(&[_]Feature{
	1848	.xmega,
	1849	}),
	1850	};
	1851	pub const atxmega32a4 = Cpu{
	1852	.name = "atxmega32a4",
	1853	.llvm_name = "atxmega32a4",
	1854	.features = featureSet(&[_]Feature{
	1855	.xmega,
	1856	}),
	1857	};
	1858	pub const atxmega32a4u = Cpu{
	1859	.name = "atxmega32a4u",
	1860	.llvm_name = "atxmega32a4u",
	1861	.features = featureSet(&[_]Feature{
	1862	.xmegau,
	1863	}),
	1864	};
	1865	pub const atxmega32c4 = Cpu{
	1866	.name = "atxmega32c4",
	1867	.llvm_name = "atxmega32c4",
	1868	.features = featureSet(&[_]Feature{
	1869	.xmegau,
	1870	}),
	1871	};
	1872	pub const atxmega32d4 = Cpu{
	1873	.name = "atxmega32d4",
	1874	.llvm_name = "atxmega32d4",
	1875	.features = featureSet(&[_]Feature{
	1876	.xmega,
	1877	}),
	1878	};
	1879	pub const atxmega32e5 = Cpu{
	1880	.name = "atxmega32e5",
	1881	.llvm_name = "atxmega32e5",
	1882	.features = featureSet(&[_]Feature{
	1883	.xmega,
	1884	}),
	1885	};
	1886	pub const atxmega32x1 = Cpu{
	1887	.name = "atxmega32x1",
	1888	.llvm_name = "atxmega32x1",
	1889	.features = featureSet(&[_]Feature{
	1890	.xmega,
	1891	}),
	1892	};
	1893	pub const atxmega384c3 = Cpu{
	1894	.name = "atxmega384c3",
	1895	.llvm_name = "atxmega384c3",
	1896	.features = featureSet(&[_]Feature{
	1897	.xmegau,
	1898	}),
	1899	};
	1900	pub const atxmega384d3 = Cpu{
	1901	.name = "atxmega384d3",
	1902	.llvm_name = "atxmega384d3",
	1903	.features = featureSet(&[_]Feature{
	1904	.xmega,
	1905	}),
	1906	};
	1907	pub const atxmega64a1 = Cpu{
	1908	.name = "atxmega64a1",
	1909	.llvm_name = "atxmega64a1",
	1910	.features = featureSet(&[_]Feature{
	1911	.xmega,
	1912	}),
	1913	};
	1914	pub const atxmega64a1u = Cpu{
	1915	.name = "atxmega64a1u",
	1916	.llvm_name = "atxmega64a1u",
	1917	.features = featureSet(&[_]Feature{
	1918	.xmegau,
	1919	}),
	1920	};
	1921	pub const atxmega64a3 = Cpu{
	1922	.name = "atxmega64a3",
	1923	.llvm_name = "atxmega64a3",
	1924	.features = featureSet(&[_]Feature{
	1925	.xmega,
	1926	}),
	1927	};
	1928	pub const atxmega64a3u = Cpu{
	1929	.name = "atxmega64a3u",
	1930	.llvm_name = "atxmega64a3u",
	1931	.features = featureSet(&[_]Feature{
	1932	.xmegau,
	1933	}),
	1934	};
	1935	pub const atxmega64a4u = Cpu{
	1936	.name = "atxmega64a4u",
	1937	.llvm_name = "atxmega64a4u",
	1938	.features = featureSet(&[_]Feature{
	1939	.xmegau,
	1940	}),
	1941	};
	1942	pub const atxmega64b1 = Cpu{
	1943	.name = "atxmega64b1",
	1944	.llvm_name = "atxmega64b1",
	1945	.features = featureSet(&[_]Feature{
	1946	.xmegau,
	1947	}),
	1948	};
	1949	pub const atxmega64b3 = Cpu{
	1950	.name = "atxmega64b3",
	1951	.llvm_name = "atxmega64b3",
	1952	.features = featureSet(&[_]Feature{
	1953	.xmegau,
	1954	}),
	1955	};
	1956	pub const atxmega64c3 = Cpu{
	1957	.name = "atxmega64c3",
	1958	.llvm_name = "atxmega64c3",
	1959	.features = featureSet(&[_]Feature{
	1960	.xmegau,
	1961	}),
	1962	};
	1963	pub const atxmega64d3 = Cpu{
	1964	.name = "atxmega64d3",
	1965	.llvm_name = "atxmega64d3",
	1966	.features = featureSet(&[_]Feature{
	1967	.xmega,
	1968	}),
	1969	};
	1970	pub const atxmega64d4 = Cpu{
	1971	.name = "atxmega64d4",
	1972	.llvm_name = "atxmega64d4",
	1973	.features = featureSet(&[_]Feature{
	1974	.xmega,
	1975	}),
	1976	};
	1977	pub const atxmega8e5 = Cpu{
	1978	.name = "atxmega8e5",
	1979	.llvm_name = "atxmega8e5",
	1980	.features = featureSet(&[_]Feature{
	1981	.xmega,
	1982	}),
	1983	};
	1984	pub const avr1 = Cpu{
	1985	.name = "avr1",
	1986	.llvm_name = "avr1",
	1987	.features = featureSet(&[_]Feature{
	1988	.avr1,
	1989	}),
	1990	};
	1991	pub const avr2 = Cpu{
	1992	.name = "avr2",
	1993	.llvm_name = "avr2",
	1994	.features = featureSet(&[_]Feature{
	1995	.avr2,
	1996	}),
	1997	};
	1998	pub const avr25 = Cpu{
	1999	.name = "avr25",
	2000	.llvm_name = "avr25",
	2001	.features = featureSet(&[_]Feature{
	2002	.avr25,
	2003	}),
	2004	};
	2005	pub const avr3 = Cpu{
	2006	.name = "avr3",
	2007	.llvm_name = "avr3",
	2008	.features = featureSet(&[_]Feature{
	2009	.avr3,
	2010	}),
	2011	};
	2012	pub const avr31 = Cpu{
	2013	.name = "avr31",
	2014	.llvm_name = "avr31",
	2015	.features = featureSet(&[_]Feature{
	2016	.avr31,
	2017	}),
	2018	};
	2019	pub const avr35 = Cpu{
	2020	.name = "avr35",
	2021	.llvm_name = "avr35",
	2022	.features = featureSet(&[_]Feature{
	2023	.avr35,
	2024	}),
	2025	};
	2026	pub const avr4 = Cpu{
	2027	.name = "avr4",
	2028	.llvm_name = "avr4",
	2029	.features = featureSet(&[_]Feature{
	2030	.avr4,
	2031	}),
	2032	};
	2033	pub const avr5 = Cpu{
	2034	.name = "avr5",
	2035	.llvm_name = "avr5",
	2036	.features = featureSet(&[_]Feature{
	2037	.avr5,
	2038	}),
	2039	};
	2040	pub const avr51 = Cpu{
	2041	.name = "avr51",
	2042	.llvm_name = "avr51",
	2043	.features = featureSet(&[_]Feature{
	2044	.avr51,
	2045	}),
	2046	};
	2047	pub const avr6 = Cpu{
	2048	.name = "avr6",
	2049	.llvm_name = "avr6",
	2050	.features = featureSet(&[_]Feature{
	2051	.avr6,
	2052	}),
	2053	};
	2054	pub const avrtiny = Cpu{
	2055	.name = "avrtiny",
	2056	.llvm_name = "avrtiny",
	2057	.features = featureSet(&[_]Feature{
	2058	.avrtiny,
	2059	}),
	2060	};
	2061	pub const avrxmega1 = Cpu{
	2062	.name = "avrxmega1",
	2063	.llvm_name = "avrxmega1",
	2064	.features = featureSet(&[_]Feature{
	2065	.xmega,
	2066	}),
	2067	};
	2068	pub const avrxmega2 = Cpu{
	2069	.name = "avrxmega2",
	2070	.llvm_name = "avrxmega2",
	2071	.features = featureSet(&[_]Feature{
	2072	.xmega,
	2073	}),
	2074	};
	2075	pub const avrxmega3 = Cpu{
	2076	.name = "avrxmega3",
	2077	.llvm_name = "avrxmega3",
	2078	.features = featureSet(&[_]Feature{
	2079	.xmega,
	2080	}),
	2081	};
	2082	pub const avrxmega4 = Cpu{
	2083	.name = "avrxmega4",
	2084	.llvm_name = "avrxmega4",
	2085	.features = featureSet(&[_]Feature{
	2086	.xmega,
	2087	}),
	2088	};
	2089	pub const avrxmega5 = Cpu{
	2090	.name = "avrxmega5",
	2091	.llvm_name = "avrxmega5",
	2092	.features = featureSet(&[_]Feature{
	2093	.xmega,
	2094	}),
	2095	};
	2096	pub const avrxmega6 = Cpu{
	2097	.name = "avrxmega6",
	2098	.llvm_name = "avrxmega6",
	2099	.features = featureSet(&[_]Feature{
	2100	.xmega,
	2101	}),
	2102	};
	2103	pub const avrxmega7 = Cpu{
	2104	.name = "avrxmega7",
	2105	.llvm_name = "avrxmega7",
	2106	.features = featureSet(&[_]Feature{
	2107	.xmega,
	2108	}),
	2109	};
	2110	pub const m3000 = Cpu{
	2111	.name = "m3000",
	2112	.llvm_name = "m3000",
	2113	.features = featureSet(&[_]Feature{
	2114	.avr5,
	2115	}),
	2116	};
	2117	};
	2118
	2119	/// All avr CPUs, sorted alphabetically by name.
	2120	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	2121	/// compiler has inefficient memory and CPU usage, affecting build times.
	2122	pub const all_cpus = &[_]*const Cpu{
	2123	&cpu.at43usb320,
	2124	&cpu.at43usb355,
	2125	&cpu.at76c711,
	2126	&cpu.at86rf401,
	2127	&cpu.at90c8534,
	2128	&cpu.at90can128,
	2129	&cpu.at90can32,
	2130	&cpu.at90can64,
	2131	&cpu.at90pwm1,
	2132	&cpu.at90pwm161,
	2133	&cpu.at90pwm2,
	2134	&cpu.at90pwm216,
	2135	&cpu.at90pwm2b,
	2136	&cpu.at90pwm3,
	2137	&cpu.at90pwm316,
	2138	&cpu.at90pwm3b,
	2139	&cpu.at90pwm81,
	2140	&cpu.at90s1200,
	2141	&cpu.at90s2313,
	2142	&cpu.at90s2323,
	2143	&cpu.at90s2333,
	2144	&cpu.at90s2343,
	2145	&cpu.at90s4414,
	2146	&cpu.at90s4433,
	2147	&cpu.at90s4434,
	2148	&cpu.at90s8515,
	2149	&cpu.at90s8535,
	2150	&cpu.at90scr100,
	2151	&cpu.at90usb1286,
	2152	&cpu.at90usb1287,
	2153	&cpu.at90usb162,
	2154	&cpu.at90usb646,
	2155	&cpu.at90usb647,
	2156	&cpu.at90usb82,
	2157	&cpu.at94k,
	2158	&cpu.ata5272,
	2159	&cpu.ata5505,
	2160	&cpu.ata5790,
	2161	&cpu.ata5795,
	2162	&cpu.ata6285,
	2163	&cpu.ata6286,
	2164	&cpu.ata6289,
	2165	&cpu.atmega103,
	2166	&cpu.atmega128,
	2167	&cpu.atmega1280,
	2168	&cpu.atmega1281,
	2169	&cpu.atmega1284,
	2170	&cpu.atmega1284p,
	2171	&cpu.atmega1284rfr2,
	2172	&cpu.atmega128a,
	2173	&cpu.atmega128rfa1,
	2174	&cpu.atmega128rfr2,
	2175	&cpu.atmega16,
	2176	&cpu.atmega161,
	2177	&cpu.atmega162,
	2178	&cpu.atmega163,
	2179	&cpu.atmega164a,
	2180	&cpu.atmega164p,
	2181	&cpu.atmega164pa,
	2182	&cpu.atmega165,
	2183	&cpu.atmega165a,
	2184	&cpu.atmega165p,
	2185	&cpu.atmega165pa,
	2186	&cpu.atmega168,
	2187	&cpu.atmega168a,
	2188	&cpu.atmega168p,
	2189	&cpu.atmega168pa,
	2190	&cpu.atmega169,
	2191	&cpu.atmega169a,
	2192	&cpu.atmega169p,
	2193	&cpu.atmega169pa,
	2194	&cpu.atmega16a,
	2195	&cpu.atmega16hva,
	2196	&cpu.atmega16hva2,
	2197	&cpu.atmega16hvb,
	2198	&cpu.atmega16hvbrevb,
	2199	&cpu.atmega16m1,
	2200	&cpu.atmega16u2,
	2201	&cpu.atmega16u4,
	2202	&cpu.atmega2560,
	2203	&cpu.atmega2561,
	2204	&cpu.atmega2564rfr2,
	2205	&cpu.atmega256rfr2,
	2206	&cpu.atmega32,
	2207	&cpu.atmega323,
	2208	&cpu.atmega324a,
	2209	&cpu.atmega324p,
	2210	&cpu.atmega324pa,
	2211	&cpu.atmega325,
	2212	&cpu.atmega3250,
	2213	&cpu.atmega3250a,
	2214	&cpu.atmega3250p,
	2215	&cpu.atmega3250pa,
	2216	&cpu.atmega325a,
	2217	&cpu.atmega325p,
	2218	&cpu.atmega325pa,
	2219	&cpu.atmega328,
	2220	&cpu.atmega328p,
	2221	&cpu.atmega329,
	2222	&cpu.atmega3290,
	2223	&cpu.atmega3290a,
	2224	&cpu.atmega3290p,
	2225	&cpu.atmega3290pa,
	2226	&cpu.atmega329a,
	2227	&cpu.atmega329p,
	2228	&cpu.atmega329pa,
	2229	&cpu.atmega32a,
	2230	&cpu.atmega32c1,
	2231	&cpu.atmega32hvb,
	2232	&cpu.atmega32hvbrevb,
	2233	&cpu.atmega32m1,
	2234	&cpu.atmega32u2,
	2235	&cpu.atmega32u4,
	2236	&cpu.atmega32u6,
	2237	&cpu.atmega406,
	2238	&cpu.atmega48,
	2239	&cpu.atmega48a,
	2240	&cpu.atmega48p,
	2241	&cpu.atmega48pa,
	2242	&cpu.atmega64,
	2243	&cpu.atmega640,
	2244	&cpu.atmega644,
	2245	&cpu.atmega644a,
	2246	&cpu.atmega644p,
	2247	&cpu.atmega644pa,
	2248	&cpu.atmega644rfr2,
	2249	&cpu.atmega645,
	2250	&cpu.atmega6450,
	2251	&cpu.atmega6450a,
	2252	&cpu.atmega6450p,
	2253	&cpu.atmega645a,
	2254	&cpu.atmega645p,
	2255	&cpu.atmega649,
	2256	&cpu.atmega6490,
	2257	&cpu.atmega6490a,
	2258	&cpu.atmega6490p,
	2259	&cpu.atmega649a,
	2260	&cpu.atmega649p,
	2261	&cpu.atmega64a,
	2262	&cpu.atmega64c1,
	2263	&cpu.atmega64hve,
	2264	&cpu.atmega64m1,
	2265	&cpu.atmega64rfr2,
	2266	&cpu.atmega8,
	2267	&cpu.atmega8515,
	2268	&cpu.atmega8535,
	2269	&cpu.atmega88,
	2270	&cpu.atmega88a,
	2271	&cpu.atmega88p,
	2272	&cpu.atmega88pa,
	2273	&cpu.atmega8a,
	2274	&cpu.atmega8hva,
	2275	&cpu.atmega8u2,
	2276	&cpu.attiny10,
	2277	&cpu.attiny102,
	2278	&cpu.attiny104,
	2279	&cpu.attiny11,
	2280	&cpu.attiny12,
	2281	&cpu.attiny13,
	2282	&cpu.attiny13a,
	2283	&cpu.attiny15,
	2284	&cpu.attiny1634,
	2285	&cpu.attiny167,
	2286	&cpu.attiny20,
	2287	&cpu.attiny22,
	2288	&cpu.attiny2313,
	2289	&cpu.attiny2313a,
	2290	&cpu.attiny24,
	2291	&cpu.attiny24a,
	2292	&cpu.attiny25,
	2293	&cpu.attiny26,
	2294	&cpu.attiny261,
	2295	&cpu.attiny261a,
	2296	&cpu.attiny28,
	2297	&cpu.attiny4,
	2298	&cpu.attiny40,
	2299	&cpu.attiny4313,
	2300	&cpu.attiny43u,
	2301	&cpu.attiny44,
	2302	&cpu.attiny44a,
	2303	&cpu.attiny45,
	2304	&cpu.attiny461,
	2305	&cpu.attiny461a,
	2306	&cpu.attiny48,
	2307	&cpu.attiny5,
	2308	&cpu.attiny828,
	2309	&cpu.attiny84,
	2310	&cpu.attiny84a,
	2311	&cpu.attiny85,
	2312	&cpu.attiny861,
	2313	&cpu.attiny861a,
	2314	&cpu.attiny87,
	2315	&cpu.attiny88,
	2316	&cpu.attiny9,
	2317	&cpu.atxmega128a1,
	2318	&cpu.atxmega128a1u,
	2319	&cpu.atxmega128a3,
	2320	&cpu.atxmega128a3u,
	2321	&cpu.atxmega128a4u,
	2322	&cpu.atxmega128b1,
	2323	&cpu.atxmega128b3,
	2324	&cpu.atxmega128c3,
	2325	&cpu.atxmega128d3,
	2326	&cpu.atxmega128d4,
	2327	&cpu.atxmega16a4,
	2328	&cpu.atxmega16a4u,
	2329	&cpu.atxmega16c4,
	2330	&cpu.atxmega16d4,
	2331	&cpu.atxmega16e5,
	2332	&cpu.atxmega192a3,
	2333	&cpu.atxmega192a3u,
	2334	&cpu.atxmega192c3,
	2335	&cpu.atxmega192d3,
	2336	&cpu.atxmega256a3,
	2337	&cpu.atxmega256a3b,
	2338	&cpu.atxmega256a3bu,
	2339	&cpu.atxmega256a3u,
	2340	&cpu.atxmega256c3,
	2341	&cpu.atxmega256d3,
	2342	&cpu.atxmega32a4,
	2343	&cpu.atxmega32a4u,
	2344	&cpu.atxmega32c4,
	2345	&cpu.atxmega32d4,
	2346	&cpu.atxmega32e5,
	2347	&cpu.atxmega32x1,
	2348	&cpu.atxmega384c3,
	2349	&cpu.atxmega384d3,
	2350	&cpu.atxmega64a1,
	2351	&cpu.atxmega64a1u,
	2352	&cpu.atxmega64a3,
	2353	&cpu.atxmega64a3u,
	2354	&cpu.atxmega64a4u,
	2355	&cpu.atxmega64b1,
	2356	&cpu.atxmega64b3,
	2357	&cpu.atxmega64c3,
	2358	&cpu.atxmega64d3,
	2359	&cpu.atxmega64d4,
	2360	&cpu.atxmega8e5,
	2361	&cpu.avr1,
	2362	&cpu.avr2,
	2363	&cpu.avr25,
	2364	&cpu.avr3,
	2365	&cpu.avr31,
	2366	&cpu.avr35,
	2367	&cpu.avr4,
	2368	&cpu.avr5,
	2369	&cpu.avr51,
	2370	&cpu.avr6,
	2371	&cpu.avrtiny,
	2372	&cpu.avrxmega1,
	2373	&cpu.avrxmega2,
	2374	&cpu.avrxmega3,
	2375	&cpu.avrxmega4,
	2376	&cpu.avrxmega5,
	2377	&cpu.avrxmega6,
	2378	&cpu.avrxmega7,
	2379	&cpu.m3000,
	2380	};

lib/std/target/bpf.zig created+76

...	...	@@ -0,0 +1,76 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	alu32,
	6	dummy,
	7	dwarfris,
	8	};
	9
	10	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	11
	12	pub const all_features = blk: {
	13	const len = @typeInfo(Feature).Enum.fields.len;
	14	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	15	var result: [len]Cpu.Feature = undefined;
	16	result[@enumToInt(Feature.alu32)] = .{
	17	.llvm_name = "alu32",
	18	.description = "Enable ALU32 instructions",
	19	.dependencies = featureSet(&[_]Feature{}),
	20	};
	21	result[@enumToInt(Feature.dummy)] = .{
	22	.llvm_name = "dummy",
	23	.description = "unused feature",
	24	.dependencies = featureSet(&[_]Feature{}),
	25	};
	26	result[@enumToInt(Feature.dwarfris)] = .{
	27	.llvm_name = "dwarfris",
	28	.description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
	29	.dependencies = featureSet(&[_]Feature{}),
	30	};
	31	const ti = @typeInfo(Feature);
	32	for (result) \|*elem, i\| {
	33	elem.index = i;
	34	elem.name = ti.Enum.fields[i].name;
	35	}
	36	break :blk result;
	37	};
	38
	39	pub const cpu = struct {
	40	pub const generic = Cpu{
	41	.name = "generic",
	42	.llvm_name = "generic",
	43	.features = featureSet(&[_]Feature{}),
	44	};
	45	pub const probe = Cpu{
	46	.name = "probe",
	47	.llvm_name = "probe",
	48	.features = featureSet(&[_]Feature{}),
	49	};
	50	pub const v1 = Cpu{
	51	.name = "v1",
	52	.llvm_name = "v1",
	53	.features = featureSet(&[_]Feature{}),
	54	};
	55	pub const v2 = Cpu{
	56	.name = "v2",
	57	.llvm_name = "v2",
	58	.features = featureSet(&[_]Feature{}),
	59	};
	60	pub const v3 = Cpu{
	61	.name = "v3",
	62	.llvm_name = "v3",
	63	.features = featureSet(&[_]Feature{}),
	64	};
	65	};
	66
	67	/// All bpf CPUs, sorted alphabetically by name.
	68	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	69	/// compiler has inefficient memory and CPU usage, affecting build times.
	70	pub const all_cpus = &[_]*const Cpu{
	71	&cpu.generic,
	72	&cpu.probe,
	73	&cpu.v1,
	74	&cpu.v2,
	75	&cpu.v3,
	76	};

lib/std/target/hexagon.zig created+312

...	...	@@ -0,0 +1,312 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	duplex,
	6	hvx,
	7	hvx_length128b,
	8	hvx_length64b,
	9	hvxv60,
	10	hvxv62,
	11	hvxv65,
	12	hvxv66,
	13	long_calls,
	14	mem_noshuf,
	15	memops,
	16	noreturn_stack_elim,
	17	nvj,
	18	nvs,
	19	packets,
	20	reserved_r19,
	21	small_data,
	22	v5,
	23	v55,
	24	v60,
	25	v62,
	26	v65,
	27	v66,
	28	zreg,
	29	};
	30
	31	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	32
	33	pub const all_features = blk: {
	34	const len = @typeInfo(Feature).Enum.fields.len;
	35	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	36	var result: [len]Cpu.Feature = undefined;
	37	result[@enumToInt(Feature.duplex)] = .{
	38	.llvm_name = "duplex",
	39	.description = "Enable generation of duplex instruction",
	40	.dependencies = featureSet(&[_]Feature{}),
	41	};
	42	result[@enumToInt(Feature.hvx)] = .{
	43	.llvm_name = "hvx",
	44	.description = "Hexagon HVX instructions",
	45	.dependencies = featureSet(&[_]Feature{}),
	46	};
	47	result[@enumToInt(Feature.hvx_length128b)] = .{
	48	.llvm_name = "hvx-length128b",
	49	.description = "Hexagon HVX 128B instructions",
	50	.dependencies = featureSet(&[_]Feature{
	51	.hvx,
	52	}),
	53	};
	54	result[@enumToInt(Feature.hvx_length64b)] = .{
	55	.llvm_name = "hvx-length64b",
	56	.description = "Hexagon HVX 64B instructions",
	57	.dependencies = featureSet(&[_]Feature{
	58	.hvx,
	59	}),
	60	};
	61	result[@enumToInt(Feature.hvxv60)] = .{
	62	.llvm_name = "hvxv60",
	63	.description = "Hexagon HVX instructions",
	64	.dependencies = featureSet(&[_]Feature{
	65	.hvx,
	66	}),
	67	};
	68	result[@enumToInt(Feature.hvxv62)] = .{
	69	.llvm_name = "hvxv62",
	70	.description = "Hexagon HVX instructions",
	71	.dependencies = featureSet(&[_]Feature{
	72	.hvx,
	73	.hvxv60,
	74	}),
	75	};
	76	result[@enumToInt(Feature.hvxv65)] = .{
	77	.llvm_name = "hvxv65",
	78	.description = "Hexagon HVX instructions",
	79	.dependencies = featureSet(&[_]Feature{
	80	.hvx,
	81	.hvxv60,
	82	.hvxv62,
	83	}),
	84	};
	85	result[@enumToInt(Feature.hvxv66)] = .{
	86	.llvm_name = "hvxv66",
	87	.description = "Hexagon HVX instructions",
	88	.dependencies = featureSet(&[_]Feature{
	89	.hvx,
	90	.hvxv60,
	91	.hvxv62,
	92	.hvxv65,
	93	.zreg,
	94	}),
	95	};
	96	result[@enumToInt(Feature.long_calls)] = .{
	97	.llvm_name = "long-calls",
	98	.description = "Use constant-extended calls",
	99	.dependencies = featureSet(&[_]Feature{}),
	100	};
	101	result[@enumToInt(Feature.mem_noshuf)] = .{
	102	.llvm_name = "mem_noshuf",
	103	.description = "Supports mem_noshuf feature",
	104	.dependencies = featureSet(&[_]Feature{}),
	105	};
	106	result[@enumToInt(Feature.memops)] = .{
	107	.llvm_name = "memops",
	108	.description = "Use memop instructions",
	109	.dependencies = featureSet(&[_]Feature{}),
	110	};
	111	result[@enumToInt(Feature.noreturn_stack_elim)] = .{
	112	.llvm_name = "noreturn-stack-elim",
	113	.description = "Eliminate stack allocation in a noreturn function when possible",
	114	.dependencies = featureSet(&[_]Feature{}),
	115	};
	116	result[@enumToInt(Feature.nvj)] = .{
	117	.llvm_name = "nvj",
	118	.description = "Support for new-value jumps",
	119	.dependencies = featureSet(&[_]Feature{
	120	.packets,
	121	}),
	122	};
	123	result[@enumToInt(Feature.nvs)] = .{
	124	.llvm_name = "nvs",
	125	.description = "Support for new-value stores",
	126	.dependencies = featureSet(&[_]Feature{
	127	.packets,
	128	}),
	129	};
	130	result[@enumToInt(Feature.packets)] = .{
	131	.llvm_name = "packets",
	132	.description = "Support for instruction packets",
	133	.dependencies = featureSet(&[_]Feature{}),
	134	};
	135	result[@enumToInt(Feature.reserved_r19)] = .{
	136	.llvm_name = "reserved-r19",
	137	.description = "Reserve register R19",
	138	.dependencies = featureSet(&[_]Feature{}),
	139	};
	140	result[@enumToInt(Feature.small_data)] = .{
	141	.llvm_name = "small-data",
	142	.description = "Allow GP-relative addressing of global variables",
	143	.dependencies = featureSet(&[_]Feature{}),
	144	};
	145	result[@enumToInt(Feature.v5)] = .{
	146	.llvm_name = "v5",
	147	.description = "Enable Hexagon V5 architecture",
	148	.dependencies = featureSet(&[_]Feature{}),
	149	};
	150	result[@enumToInt(Feature.v55)] = .{
	151	.llvm_name = "v55",
	152	.description = "Enable Hexagon V55 architecture",
	153	.dependencies = featureSet(&[_]Feature{}),
	154	};
	155	result[@enumToInt(Feature.v60)] = .{
	156	.llvm_name = "v60",
	157	.description = "Enable Hexagon V60 architecture",
	158	.dependencies = featureSet(&[_]Feature{}),
	159	};
	160	result[@enumToInt(Feature.v62)] = .{
	161	.llvm_name = "v62",
	162	.description = "Enable Hexagon V62 architecture",
	163	.dependencies = featureSet(&[_]Feature{}),
	164	};
	165	result[@enumToInt(Feature.v65)] = .{
	166	.llvm_name = "v65",
	167	.description = "Enable Hexagon V65 architecture",
	168	.dependencies = featureSet(&[_]Feature{}),
	169	};
	170	result[@enumToInt(Feature.v66)] = .{
	171	.llvm_name = "v66",
	172	.description = "Enable Hexagon V66 architecture",
	173	.dependencies = featureSet(&[_]Feature{}),
	174	};
	175	result[@enumToInt(Feature.zreg)] = .{
	176	.llvm_name = "zreg",
	177	.description = "Hexagon ZReg extension instructions",
	178	.dependencies = featureSet(&[_]Feature{}),
	179	};
	180	const ti = @typeInfo(Feature);
	181	for (result) \|*elem, i\| {
	182	elem.index = i;
	183	elem.name = ti.Enum.fields[i].name;
	184	}
	185	break :blk result;
	186	};
	187
	188	pub const cpu = struct {
	189	pub const generic = Cpu{
	190	.name = "generic",
	191	.llvm_name = "generic",
	192	.features = featureSet(&[_]Feature{
	193	.duplex,
	194	.memops,
	195	.nvj,
	196	.nvs,
	197	.packets,
	198	.small_data,
	199	.v5,
	200	.v55,
	201	.v60,
	202	}),
	203	};
	204	pub const hexagonv5 = Cpu{
	205	.name = "hexagonv5",
	206	.llvm_name = "hexagonv5",
	207	.features = featureSet(&[_]Feature{
	208	.duplex,
	209	.memops,
	210	.nvj,
	211	.nvs,
	212	.packets,
	213	.small_data,
	214	.v5,
	215	}),
	216	};
	217	pub const hexagonv55 = Cpu{
	218	.name = "hexagonv55",
	219	.llvm_name = "hexagonv55",
	220	.features = featureSet(&[_]Feature{
	221	.duplex,
	222	.memops,
	223	.nvj,
	224	.nvs,
	225	.packets,
	226	.small_data,
	227	.v5,
	228	.v55,
	229	}),
	230	};
	231	pub const hexagonv60 = Cpu{
	232	.name = "hexagonv60",
	233	.llvm_name = "hexagonv60",
	234	.features = featureSet(&[_]Feature{
	235	.duplex,
	236	.memops,
	237	.nvj,
	238	.nvs,
	239	.packets,
	240	.small_data,
	241	.v5,
	242	.v55,
	243	.v60,
	244	}),
	245	};
	246	pub const hexagonv62 = Cpu{
	247	.name = "hexagonv62",
	248	.llvm_name = "hexagonv62",
	249	.features = featureSet(&[_]Feature{
	250	.duplex,
	251	.memops,
	252	.nvj,
	253	.nvs,
	254	.packets,
	255	.small_data,
	256	.v5,
	257	.v55,
	258	.v60,
	259	.v62,
	260	}),
	261	};
	262	pub const hexagonv65 = Cpu{
	263	.name = "hexagonv65",
	264	.llvm_name = "hexagonv65",
	265	.features = featureSet(&[_]Feature{
	266	.duplex,
	267	.mem_noshuf,
	268	.memops,
	269	.nvj,
	270	.nvs,
	271	.packets,
	272	.small_data,
	273	.v5,
	274	.v55,
	275	.v60,
	276	.v62,
	277	.v65,
	278	}),
	279	};
	280	pub const hexagonv66 = Cpu{
	281	.name = "hexagonv66",
	282	.llvm_name = "hexagonv66",
	283	.features = featureSet(&[_]Feature{
	284	.duplex,
	285	.mem_noshuf,
	286	.memops,
	287	.nvj,
	288	.nvs,
	289	.packets,
	290	.small_data,
	291	.v5,
	292	.v55,
	293	.v60,
	294	.v62,
	295	.v65,
	296	.v66,
	297	}),
	298	};
	299	};
	300
	301	/// All hexagon CPUs, sorted alphabetically by name.
	302	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	303	/// compiler has inefficient memory and CPU usage, affecting build times.
	304	pub const all_cpus = &[_]*const Cpu{
	305	&cpu.generic,
	306	&cpu.hexagonv5,
	307	&cpu.hexagonv55,
	308	&cpu.hexagonv60,
	309	&cpu.hexagonv62,
	310	&cpu.hexagonv65,
	311	&cpu.hexagonv66,
	312	};

lib/std/target/mips.zig created+518

...	...	@@ -0,0 +1,518 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	abs2008,
	6	cnmips,
	7	crc,
	8	dsp,
	9	dspr2,
	10	dspr3,
	11	eva,
	12	fp64,
	13	fpxx,
	14	ginv,
	15	gp64,
	16	long_calls,
	17	micromips,
	18	mips1,
	19	mips16,
	20	mips2,
	21	mips3,
	22	mips32,
	23	mips32r2,
	24	mips32r3,
	25	mips32r5,
	26	mips32r6,
	27	mips3_32,
	28	mips3_32r2,
	29	mips4,
	30	mips4_32,
	31	mips4_32r2,
	32	mips5,
	33	mips5_32r2,
	34	mips64,
	35	mips64r2,
	36	mips64r3,
	37	mips64r5,
	38	mips64r6,
	39	msa,
	40	mt,
	41	nan2008,
	42	noabicalls,
	43	nomadd4,
	44	nooddspreg,
	45	p5600,
	46	ptr64,
	47	single_float,
	48	soft_float,
	49	sym32,
	50	use_indirect_jump_hazard,
	51	use_tcc_in_div,
	52	vfpu,
	53	virt,
	54	};
	55
	56	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	57
	58	pub const all_features = blk: {
	59	const len = @typeInfo(Feature).Enum.fields.len;
	60	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	61	var result: [len]Cpu.Feature = undefined;
	62	result[@enumToInt(Feature.abs2008)] = .{
	63	.llvm_name = "abs2008",
	64	.description = "Disable IEEE 754-2008 abs.fmt mode",
	65	.dependencies = featureSet(&[_]Feature{}),
	66	};
	67	result[@enumToInt(Feature.cnmips)] = .{
	68	.llvm_name = "cnmips",
	69	.description = "Octeon cnMIPS Support",
	70	.dependencies = featureSet(&[_]Feature{
	71	.mips64r2,
	72	}),
	73	};
	74	result[@enumToInt(Feature.crc)] = .{
	75	.llvm_name = "crc",
	76	.description = "Mips R6 CRC ASE",
	77	.dependencies = featureSet(&[_]Feature{}),
	78	};
	79	result[@enumToInt(Feature.dsp)] = .{
	80	.llvm_name = "dsp",
	81	.description = "Mips DSP ASE",
	82	.dependencies = featureSet(&[_]Feature{}),
	83	};
	84	result[@enumToInt(Feature.dspr2)] = .{
	85	.llvm_name = "dspr2",
	86	.description = "Mips DSP-R2 ASE",
	87	.dependencies = featureSet(&[_]Feature{
	88	.dsp,
	89	}),
	90	};
	91	result[@enumToInt(Feature.dspr3)] = .{
	92	.llvm_name = "dspr3",
	93	.description = "Mips DSP-R3 ASE",
	94	.dependencies = featureSet(&[_]Feature{
	95	.dsp,
	96	.dspr2,
	97	}),
	98	};
	99	result[@enumToInt(Feature.eva)] = .{
	100	.llvm_name = "eva",
	101	.description = "Mips EVA ASE",
	102	.dependencies = featureSet(&[_]Feature{}),
	103	};
	104	result[@enumToInt(Feature.fp64)] = .{
	105	.llvm_name = "fp64",
	106	.description = "Support 64-bit FP registers",
	107	.dependencies = featureSet(&[_]Feature{}),
	108	};
	109	result[@enumToInt(Feature.fpxx)] = .{
	110	.llvm_name = "fpxx",
	111	.description = "Support for FPXX",
	112	.dependencies = featureSet(&[_]Feature{}),
	113	};
	114	result[@enumToInt(Feature.ginv)] = .{
	115	.llvm_name = "ginv",
	116	.description = "Mips Global Invalidate ASE",
	117	.dependencies = featureSet(&[_]Feature{}),
	118	};
	119	result[@enumToInt(Feature.gp64)] = .{
	120	.llvm_name = "gp64",
	121	.description = "General Purpose Registers are 64-bit wide",
	122	.dependencies = featureSet(&[_]Feature{}),
	123	};
	124	result[@enumToInt(Feature.long_calls)] = .{
	125	.llvm_name = "long-calls",
	126	.description = "Disable use of the jal instruction",
	127	.dependencies = featureSet(&[_]Feature{}),
	128	};
	129	result[@enumToInt(Feature.micromips)] = .{
	130	.llvm_name = "micromips",
	131	.description = "microMips mode",
	132	.dependencies = featureSet(&[_]Feature{}),
	133	};
	134	result[@enumToInt(Feature.mips1)] = .{
	135	.llvm_name = "mips1",
	136	.description = "Mips I ISA Support [highly experimental]",
	137	.dependencies = featureSet(&[_]Feature{}),
	138	};
	139	result[@enumToInt(Feature.mips16)] = .{
	140	.llvm_name = "mips16",
	141	.description = "Mips16 mode",
	142	.dependencies = featureSet(&[_]Feature{}),
	143	};
	144	result[@enumToInt(Feature.mips2)] = .{
	145	.llvm_name = "mips2",
	146	.description = "Mips II ISA Support [highly experimental]",
	147	.dependencies = featureSet(&[_]Feature{
	148	.mips1,
	149	}),
	150	};
	151	result[@enumToInt(Feature.mips3)] = .{
	152	.llvm_name = "mips3",
	153	.description = "MIPS III ISA Support [highly experimental]",
	154	.dependencies = featureSet(&[_]Feature{
	155	.fp64,
	156	.gp64,
	157	.mips2,
	158	.mips3_32,
	159	.mips3_32r2,
	160	}),
	161	};
	162	result[@enumToInt(Feature.mips32)] = .{
	163	.llvm_name = "mips32",
	164	.description = "Mips32 ISA Support",
	165	.dependencies = featureSet(&[_]Feature{
	166	.mips2,
	167	.mips3_32,
	168	.mips4_32,
	169	}),
	170	};
	171	result[@enumToInt(Feature.mips32r2)] = .{
	172	.llvm_name = "mips32r2",
	173	.description = "Mips32r2 ISA Support",
	174	.dependencies = featureSet(&[_]Feature{
	175	.mips32,
	176	.mips3_32r2,
	177	.mips4_32r2,
	178	.mips5_32r2,
	179	}),
	180	};
	181	result[@enumToInt(Feature.mips32r3)] = .{
	182	.llvm_name = "mips32r3",
	183	.description = "Mips32r3 ISA Support",
	184	.dependencies = featureSet(&[_]Feature{
	185	.mips32r2,
	186	}),
	187	};
	188	result[@enumToInt(Feature.mips32r5)] = .{
	189	.llvm_name = "mips32r5",
	190	.description = "Mips32r5 ISA Support",
	191	.dependencies = featureSet(&[_]Feature{
	192	.mips32r3,
	193	}),
	194	};
	195	result[@enumToInt(Feature.mips32r6)] = .{
	196	.llvm_name = "mips32r6",
	197	.description = "Mips32r6 ISA Support [experimental]",
	198	.dependencies = featureSet(&[_]Feature{
	199	.abs2008,
	200	.fp64,
	201	.mips32r5,
	202	.nan2008,
	203	}),
	204	};
	205	result[@enumToInt(Feature.mips3_32)] = .{
	206	.llvm_name = "mips3_32",
	207	.description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
	208	.dependencies = featureSet(&[_]Feature{}),
	209	};
	210	result[@enumToInt(Feature.mips3_32r2)] = .{
	211	.llvm_name = "mips3_32r2",
	212	.description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
	213	.dependencies = featureSet(&[_]Feature{}),
	214	};
	215	result[@enumToInt(Feature.mips4)] = .{
	216	.llvm_name = "mips4",
	217	.description = "MIPS IV ISA Support",
	218	.dependencies = featureSet(&[_]Feature{
	219	.mips3,
	220	.mips4_32,
	221	.mips4_32r2,
	222	}),
	223	};
	224	result[@enumToInt(Feature.mips4_32)] = .{
	225	.llvm_name = "mips4_32",
	226	.description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
	227	.dependencies = featureSet(&[_]Feature{}),
	228	};
	229	result[@enumToInt(Feature.mips4_32r2)] = .{
	230	.llvm_name = "mips4_32r2",
	231	.description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
	232	.dependencies = featureSet(&[_]Feature{}),
	233	};
	234	result[@enumToInt(Feature.mips5)] = .{
	235	.llvm_name = "mips5",
	236	.description = "MIPS V ISA Support [highly experimental]",
	237	.dependencies = featureSet(&[_]Feature{
	238	.mips4,
	239	.mips5_32r2,
	240	}),
	241	};
	242	result[@enumToInt(Feature.mips5_32r2)] = .{
	243	.llvm_name = "mips5_32r2",
	244	.description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
	245	.dependencies = featureSet(&[_]Feature{}),
	246	};
	247	result[@enumToInt(Feature.mips64)] = .{
	248	.llvm_name = "mips64",
	249	.description = "Mips64 ISA Support",
	250	.dependencies = featureSet(&[_]Feature{
	251	.mips32,
	252	.mips5,
	253	}),
	254	};
	255	result[@enumToInt(Feature.mips64r2)] = .{
	256	.llvm_name = "mips64r2",
	257	.description = "Mips64r2 ISA Support",
	258	.dependencies = featureSet(&[_]Feature{
	259	.mips32r2,
	260	.mips64,
	261	}),
	262	};
	263	result[@enumToInt(Feature.mips64r3)] = .{
	264	.llvm_name = "mips64r3",
	265	.description = "Mips64r3 ISA Support",
	266	.dependencies = featureSet(&[_]Feature{
	267	.mips32r3,
	268	.mips64r2,
	269	}),
	270	};
	271	result[@enumToInt(Feature.mips64r5)] = .{
	272	.llvm_name = "mips64r5",
	273	.description = "Mips64r5 ISA Support",
	274	.dependencies = featureSet(&[_]Feature{
	275	.mips32r5,
	276	.mips64r3,
	277	}),
	278	};
	279	result[@enumToInt(Feature.mips64r6)] = .{
	280	.llvm_name = "mips64r6",
	281	.description = "Mips64r6 ISA Support [experimental]",
	282	.dependencies = featureSet(&[_]Feature{
	283	.abs2008,
	284	.mips32r6,
	285	.mips64r5,
	286	.nan2008,
	287	}),
	288	};
	289	result[@enumToInt(Feature.msa)] = .{
	290	.llvm_name = "msa",
	291	.description = "Mips MSA ASE",
	292	.dependencies = featureSet(&[_]Feature{}),
	293	};
	294	result[@enumToInt(Feature.mt)] = .{
	295	.llvm_name = "mt",
	296	.description = "Mips MT ASE",
	297	.dependencies = featureSet(&[_]Feature{}),
	298	};
	299	result[@enumToInt(Feature.nan2008)] = .{
	300	.llvm_name = "nan2008",
	301	.description = "IEEE 754-2008 NaN encoding",
	302	.dependencies = featureSet(&[_]Feature{}),
	303	};
	304	result[@enumToInt(Feature.noabicalls)] = .{
	305	.llvm_name = "noabicalls",
	306	.description = "Disable SVR4-style position-independent code",
	307	.dependencies = featureSet(&[_]Feature{}),
	308	};
	309	result[@enumToInt(Feature.nomadd4)] = .{
	310	.llvm_name = "nomadd4",
	311	.description = "Disable 4-operand madd.fmt and related instructions",
	312	.dependencies = featureSet(&[_]Feature{}),
	313	};
	314	result[@enumToInt(Feature.nooddspreg)] = .{
	315	.llvm_name = "nooddspreg",
	316	.description = "Disable odd numbered single-precision registers",
	317	.dependencies = featureSet(&[_]Feature{}),
	318	};
	319	result[@enumToInt(Feature.p5600)] = .{
	320	.llvm_name = "p5600",
	321	.description = "The P5600 Processor",
	322	.dependencies = featureSet(&[_]Feature{
	323	.mips32r5,
	324	}),
	325	};
	326	result[@enumToInt(Feature.ptr64)] = .{
	327	.llvm_name = "ptr64",
	328	.description = "Pointers are 64-bit wide",
	329	.dependencies = featureSet(&[_]Feature{}),
	330	};
	331	result[@enumToInt(Feature.single_float)] = .{
	332	.llvm_name = "single-float",
	333	.description = "Only supports single precision float",
	334	.dependencies = featureSet(&[_]Feature{}),
	335	};
	336	result[@enumToInt(Feature.soft_float)] = .{
	337	.llvm_name = "soft-float",
	338	.description = "Does not support floating point instructions",
	339	.dependencies = featureSet(&[_]Feature{}),
	340	};
	341	result[@enumToInt(Feature.sym32)] = .{
	342	.llvm_name = "sym32",
	343	.description = "Symbols are 32 bit on Mips64",
	344	.dependencies = featureSet(&[_]Feature{}),
	345	};
	346	result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
	347	.llvm_name = "use-indirect-jump-hazard",
	348	.description = "Use indirect jump guards to prevent certain speculation based attacks",
	349	.dependencies = featureSet(&[_]Feature{}),
	350	};
	351	result[@enumToInt(Feature.use_tcc_in_div)] = .{
	352	.llvm_name = "use-tcc-in-div",
	353	.description = "Force the assembler to use trapping",
	354	.dependencies = featureSet(&[_]Feature{}),
	355	};
	356	result[@enumToInt(Feature.vfpu)] = .{
	357	.llvm_name = "vfpu",
	358	.description = "Enable vector FPU instructions",
	359	.dependencies = featureSet(&[_]Feature{}),
	360	};
	361	result[@enumToInt(Feature.virt)] = .{
	362	.llvm_name = "virt",
	363	.description = "Mips Virtualization ASE",
	364	.dependencies = featureSet(&[_]Feature{}),
	365	};
	366	const ti = @typeInfo(Feature);
	367	for (result) \|*elem, i\| {
	368	elem.index = i;
	369	elem.name = ti.Enum.fields[i].name;
	370	}
	371	break :blk result;
	372	};
	373
	374	pub const cpu = struct {
	375	pub const mips1 = Cpu{
	376	.name = "mips1",
	377	.llvm_name = "mips1",
	378	.features = featureSet(&[_]Feature{
	379	.mips1,
	380	}),
	381	};
	382	pub const mips2 = Cpu{
	383	.name = "mips2",
	384	.llvm_name = "mips2",
	385	.features = featureSet(&[_]Feature{
	386	.mips2,
	387	}),
	388	};
	389	pub const mips3 = Cpu{
	390	.name = "mips3",
	391	.llvm_name = "mips3",
	392	.features = featureSet(&[_]Feature{
	393	.mips3,
	394	}),
	395	};
	396	pub const mips32 = Cpu{
	397	.name = "mips32",
	398	.llvm_name = "mips32",
	399	.features = featureSet(&[_]Feature{
	400	.mips32,
	401	}),
	402	};
	403	pub const mips32r2 = Cpu{
	404	.name = "mips32r2",
	405	.llvm_name = "mips32r2",
	406	.features = featureSet(&[_]Feature{
	407	.mips32r2,
	408	}),
	409	};
	410	pub const mips32r3 = Cpu{
	411	.name = "mips32r3",
	412	.llvm_name = "mips32r3",
	413	.features = featureSet(&[_]Feature{
	414	.mips32r3,
	415	}),
	416	};
	417	pub const mips32r5 = Cpu{
	418	.name = "mips32r5",
	419	.llvm_name = "mips32r5",
	420	.features = featureSet(&[_]Feature{
	421	.mips32r5,
	422	}),
	423	};
	424	pub const mips32r6 = Cpu{
	425	.name = "mips32r6",
	426	.llvm_name = "mips32r6",
	427	.features = featureSet(&[_]Feature{
	428	.mips32r6,
	429	}),
	430	};
	431	pub const mips4 = Cpu{
	432	.name = "mips4",
	433	.llvm_name = "mips4",
	434	.features = featureSet(&[_]Feature{
	435	.mips4,
	436	}),
	437	};
	438	pub const mips5 = Cpu{
	439	.name = "mips5",
	440	.llvm_name = "mips5",
	441	.features = featureSet(&[_]Feature{
	442	.mips5,
	443	}),
	444	};
	445	pub const mips64 = Cpu{
	446	.name = "mips64",
	447	.llvm_name = "mips64",
	448	.features = featureSet(&[_]Feature{
	449	.mips64,
	450	}),
	451	};
	452	pub const mips64r2 = Cpu{
	453	.name = "mips64r2",
	454	.llvm_name = "mips64r2",
	455	.features = featureSet(&[_]Feature{
	456	.mips64r2,
	457	}),
	458	};
	459	pub const mips64r3 = Cpu{
	460	.name = "mips64r3",
	461	.llvm_name = "mips64r3",
	462	.features = featureSet(&[_]Feature{
	463	.mips64r3,
	464	}),
	465	};
	466	pub const mips64r5 = Cpu{
	467	.name = "mips64r5",
	468	.llvm_name = "mips64r5",
	469	.features = featureSet(&[_]Feature{
	470	.mips64r5,
	471	}),
	472	};
	473	pub const mips64r6 = Cpu{
	474	.name = "mips64r6",
	475	.llvm_name = "mips64r6",
	476	.features = featureSet(&[_]Feature{
	477	.mips64r6,
	478	}),
	479	};
	480	pub const octeon = Cpu{
	481	.name = "octeon",
	482	.llvm_name = "octeon",
	483	.features = featureSet(&[_]Feature{
	484	.cnmips,
	485	.mips64r2,
	486	}),
	487	};
	488	pub const p5600 = Cpu{
	489	.name = "p5600",
	490	.llvm_name = "p5600",
	491	.features = featureSet(&[_]Feature{
	492	.p5600,
	493	}),
	494	};
	495	};
	496
	497	/// All mips CPUs, sorted alphabetically by name.
	498	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	499	/// compiler has inefficient memory and CPU usage, affecting build times.
	500	pub const all_cpus = &[_]*const Cpu{
	501	&cpu.mips1,
	502	&cpu.mips2,
	503	&cpu.mips3,
	504	&cpu.mips32,
	505	&cpu.mips32r2,
	506	&cpu.mips32r3,
	507	&cpu.mips32r5,
	508	&cpu.mips32r6,
	509	&cpu.mips4,
	510	&cpu.mips5,
	511	&cpu.mips64,
	512	&cpu.mips64r2,
	513	&cpu.mips64r3,
	514	&cpu.mips64r5,
	515	&cpu.mips64r6,
	516	&cpu.octeon,
	517	&cpu.p5600,
	518	};

lib/std/target/msp430.zig created+72

...	...	@@ -0,0 +1,72 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	ext,
	6	hwmult16,
	7	hwmult32,
	8	hwmultf5,
	9	};
	10
	11	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	12
	13	pub const all_features = blk: {
	14	const len = @typeInfo(Feature).Enum.fields.len;
	15	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	16	var result: [len]Cpu.Feature = undefined;
	17	result[@enumToInt(Feature.ext)] = .{
	18	.llvm_name = "ext",
	19	.description = "Enable MSP430-X extensions",
	20	.dependencies = featureSet(&[_]Feature{}),
	21	};
	22	result[@enumToInt(Feature.hwmult16)] = .{
	23	.llvm_name = "hwmult16",
	24	.description = "Enable 16-bit hardware multiplier",
	25	.dependencies = featureSet(&[_]Feature{}),
	26	};
	27	result[@enumToInt(Feature.hwmult32)] = .{
	28	.llvm_name = "hwmult32",
	29	.description = "Enable 32-bit hardware multiplier",
	30	.dependencies = featureSet(&[_]Feature{}),
	31	};
	32	result[@enumToInt(Feature.hwmultf5)] = .{
	33	.llvm_name = "hwmultf5",
	34	.description = "Enable F5 series hardware multiplier",
	35	.dependencies = featureSet(&[_]Feature{}),
	36	};
	37	const ti = @typeInfo(Feature);
	38	for (result) \|*elem, i\| {
	39	elem.index = i;
	40	elem.name = ti.Enum.fields[i].name;
	41	}
	42	break :blk result;
	43	};
	44
	45	pub const cpu = struct {
	46	pub const generic = Cpu{
	47	.name = "generic",
	48	.llvm_name = "generic",
	49	.features = featureSet(&[_]Feature{}),
	50	};
	51	pub const msp430 = Cpu{
	52	.name = "msp430",
	53	.llvm_name = "msp430",
	54	.features = featureSet(&[_]Feature{}),
	55	};
	56	pub const msp430x = Cpu{
	57	.name = "msp430x",
	58	.llvm_name = "msp430x",
	59	.features = featureSet(&[_]Feature{
	60	.ext,
	61	}),
	62	};
	63	};
	64
	65	/// All msp430 CPUs, sorted alphabetically by name.
	66	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	67	/// compiler has inefficient memory and CPU usage, affecting build times.
	68	pub const all_cpus = &[_]*const Cpu{
	69	&cpu.generic,
	70	&cpu.msp430,
	71	&cpu.msp430x,
	72	};

lib/std/target/nvptx.zig created+309

...	...	@@ -0,0 +1,309 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	ptx32,
	6	ptx40,
	7	ptx41,
	8	ptx42,
	9	ptx43,
	10	ptx50,
	11	ptx60,
	12	ptx61,
	13	ptx63,
	14	ptx64,
	15	sm_20,
	16	sm_21,
	17	sm_30,
	18	sm_32,
	19	sm_35,
	20	sm_37,
	21	sm_50,
	22	sm_52,
	23	sm_53,
	24	sm_60,
	25	sm_61,
	26	sm_62,
	27	sm_70,
	28	sm_72,
	29	sm_75,
	30	};
	31
	32	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	33
	34	pub const all_features = blk: {
	35	const len = @typeInfo(Feature).Enum.fields.len;
	36	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	37	var result: [len]Cpu.Feature = undefined;
	38	result[@enumToInt(Feature.ptx32)] = .{
	39	.llvm_name = "ptx32",
	40	.description = "Use PTX version 3.2",
	41	.dependencies = featureSet(&[_]Feature{}),
	42	};
	43	result[@enumToInt(Feature.ptx40)] = .{
	44	.llvm_name = "ptx40",
	45	.description = "Use PTX version 4.0",
	46	.dependencies = featureSet(&[_]Feature{}),
	47	};
	48	result[@enumToInt(Feature.ptx41)] = .{
	49	.llvm_name = "ptx41",
	50	.description = "Use PTX version 4.1",
	51	.dependencies = featureSet(&[_]Feature{}),
	52	};
	53	result[@enumToInt(Feature.ptx42)] = .{
	54	.llvm_name = "ptx42",
	55	.description = "Use PTX version 4.2",
	56	.dependencies = featureSet(&[_]Feature{}),
	57	};
	58	result[@enumToInt(Feature.ptx43)] = .{
	59	.llvm_name = "ptx43",
	60	.description = "Use PTX version 4.3",
	61	.dependencies = featureSet(&[_]Feature{}),
	62	};
	63	result[@enumToInt(Feature.ptx50)] = .{
	64	.llvm_name = "ptx50",
	65	.description = "Use PTX version 5.0",
	66	.dependencies = featureSet(&[_]Feature{}),
	67	};
	68	result[@enumToInt(Feature.ptx60)] = .{
	69	.llvm_name = "ptx60",
	70	.description = "Use PTX version 6.0",
	71	.dependencies = featureSet(&[_]Feature{}),
	72	};
	73	result[@enumToInt(Feature.ptx61)] = .{
	74	.llvm_name = "ptx61",
	75	.description = "Use PTX version 6.1",
	76	.dependencies = featureSet(&[_]Feature{}),
	77	};
	78	result[@enumToInt(Feature.ptx63)] = .{
	79	.llvm_name = "ptx63",
	80	.description = "Use PTX version 6.3",
	81	.dependencies = featureSet(&[_]Feature{}),
	82	};
	83	result[@enumToInt(Feature.ptx64)] = .{
	84	.llvm_name = "ptx64",
	85	.description = "Use PTX version 6.4",
	86	.dependencies = featureSet(&[_]Feature{}),
	87	};
	88	result[@enumToInt(Feature.sm_20)] = .{
	89	.llvm_name = "sm_20",
	90	.description = "Target SM 2.0",
	91	.dependencies = featureSet(&[_]Feature{}),
	92	};
	93	result[@enumToInt(Feature.sm_21)] = .{
	94	.llvm_name = "sm_21",
	95	.description = "Target SM 2.1",
	96	.dependencies = featureSet(&[_]Feature{}),
	97	};
	98	result[@enumToInt(Feature.sm_30)] = .{
	99	.llvm_name = "sm_30",
	100	.description = "Target SM 3.0",
	101	.dependencies = featureSet(&[_]Feature{}),
	102	};
	103	result[@enumToInt(Feature.sm_32)] = .{
	104	.llvm_name = "sm_32",
	105	.description = "Target SM 3.2",
	106	.dependencies = featureSet(&[_]Feature{}),
	107	};
	108	result[@enumToInt(Feature.sm_35)] = .{
	109	.llvm_name = "sm_35",
	110	.description = "Target SM 3.5",
	111	.dependencies = featureSet(&[_]Feature{}),
	112	};
	113	result[@enumToInt(Feature.sm_37)] = .{
	114	.llvm_name = "sm_37",
	115	.description = "Target SM 3.7",
	116	.dependencies = featureSet(&[_]Feature{}),
	117	};
	118	result[@enumToInt(Feature.sm_50)] = .{
	119	.llvm_name = "sm_50",
	120	.description = "Target SM 5.0",
	121	.dependencies = featureSet(&[_]Feature{}),
	122	};
	123	result[@enumToInt(Feature.sm_52)] = .{
	124	.llvm_name = "sm_52",
	125	.description = "Target SM 5.2",
	126	.dependencies = featureSet(&[_]Feature{}),
	127	};
	128	result[@enumToInt(Feature.sm_53)] = .{
	129	.llvm_name = "sm_53",
	130	.description = "Target SM 5.3",
	131	.dependencies = featureSet(&[_]Feature{}),
	132	};
	133	result[@enumToInt(Feature.sm_60)] = .{
	134	.llvm_name = "sm_60",
	135	.description = "Target SM 6.0",
	136	.dependencies = featureSet(&[_]Feature{}),
	137	};
	138	result[@enumToInt(Feature.sm_61)] = .{
	139	.llvm_name = "sm_61",
	140	.description = "Target SM 6.1",
	141	.dependencies = featureSet(&[_]Feature{}),
	142	};
	143	result[@enumToInt(Feature.sm_62)] = .{
	144	.llvm_name = "sm_62",
	145	.description = "Target SM 6.2",
	146	.dependencies = featureSet(&[_]Feature{}),
	147	};
	148	result[@enumToInt(Feature.sm_70)] = .{
	149	.llvm_name = "sm_70",
	150	.description = "Target SM 7.0",
	151	.dependencies = featureSet(&[_]Feature{}),
	152	};
	153	result[@enumToInt(Feature.sm_72)] = .{
	154	.llvm_name = "sm_72",
	155	.description = "Target SM 7.2",
	156	.dependencies = featureSet(&[_]Feature{}),
	157	};
	158	result[@enumToInt(Feature.sm_75)] = .{
	159	.llvm_name = "sm_75",
	160	.description = "Target SM 7.5",
	161	.dependencies = featureSet(&[_]Feature{}),
	162	};
	163	const ti = @typeInfo(Feature);
	164	for (result) \|*elem, i\| {
	165	elem.index = i;
	166	elem.name = ti.Enum.fields[i].name;
	167	}
	168	break :blk result;
	169	};
	170
	171	pub const cpu = struct {
	172	pub const sm_20 = Cpu{
	173	.name = "sm_20",
	174	.llvm_name = "sm_20",
	175	.features = featureSet(&[_]Feature{
	176	.sm_20,
	177	}),
	178	};
	179	pub const sm_21 = Cpu{
	180	.name = "sm_21",
	181	.llvm_name = "sm_21",
	182	.features = featureSet(&[_]Feature{
	183	.sm_21,
	184	}),
	185	};
	186	pub const sm_30 = Cpu{
	187	.name = "sm_30",
	188	.llvm_name = "sm_30",
	189	.features = featureSet(&[_]Feature{
	190	.sm_30,
	191	}),
	192	};
	193	pub const sm_32 = Cpu{
	194	.name = "sm_32",
	195	.llvm_name = "sm_32",
	196	.features = featureSet(&[_]Feature{
	197	.ptx40,
	198	.sm_32,
	199	}),
	200	};
	201	pub const sm_35 = Cpu{
	202	.name = "sm_35",
	203	.llvm_name = "sm_35",
	204	.features = featureSet(&[_]Feature{
	205	.sm_35,
	206	}),
	207	};
	208	pub const sm_37 = Cpu{
	209	.name = "sm_37",
	210	.llvm_name = "sm_37",
	211	.features = featureSet(&[_]Feature{
	212	.ptx41,
	213	.sm_37,
	214	}),
	215	};
	216	pub const sm_50 = Cpu{
	217	.name = "sm_50",
	218	.llvm_name = "sm_50",
	219	.features = featureSet(&[_]Feature{
	220	.ptx40,
	221	.sm_50,
	222	}),
	223	};
	224	pub const sm_52 = Cpu{
	225	.name = "sm_52",
	226	.llvm_name = "sm_52",
	227	.features = featureSet(&[_]Feature{
	228	.ptx41,
	229	.sm_52,
	230	}),
	231	};
	232	pub const sm_53 = Cpu{
	233	.name = "sm_53",
	234	.llvm_name = "sm_53",
	235	.features = featureSet(&[_]Feature{
	236	.ptx42,
	237	.sm_53,
	238	}),
	239	};
	240	pub const sm_60 = Cpu{
	241	.name = "sm_60",
	242	.llvm_name = "sm_60",
	243	.features = featureSet(&[_]Feature{
	244	.ptx50,
	245	.sm_60,
	246	}),
	247	};
	248	pub const sm_61 = Cpu{
	249	.name = "sm_61",
	250	.llvm_name = "sm_61",
	251	.features = featureSet(&[_]Feature{
	252	.ptx50,
	253	.sm_61,
	254	}),
	255	};
	256	pub const sm_62 = Cpu{
	257	.name = "sm_62",
	258	.llvm_name = "sm_62",
	259	.features = featureSet(&[_]Feature{
	260	.ptx50,
	261	.sm_62,
	262	}),
	263	};
	264	pub const sm_70 = Cpu{
	265	.name = "sm_70",
	266	.llvm_name = "sm_70",
	267	.features = featureSet(&[_]Feature{
	268	.ptx60,
	269	.sm_70,
	270	}),
	271	};
	272	pub const sm_72 = Cpu{
	273	.name = "sm_72",
	274	.llvm_name = "sm_72",
	275	.features = featureSet(&[_]Feature{
	276	.ptx61,
	277	.sm_72,
	278	}),
	279	};
	280	pub const sm_75 = Cpu{
	281	.name = "sm_75",
	282	.llvm_name = "sm_75",
	283	.features = featureSet(&[_]Feature{
	284	.ptx63,
	285	.sm_75,
	286	}),
	287	};
	288	};
	289
	290	/// All nvptx CPUs, sorted alphabetically by name.
	291	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	292	/// compiler has inefficient memory and CPU usage, affecting build times.
	293	pub const all_cpus = &[_]*const Cpu{
	294	&cpu.sm_20,
	295	&cpu.sm_21,
	296	&cpu.sm_30,
	297	&cpu.sm_32,
	298	&cpu.sm_35,
	299	&cpu.sm_37,
	300	&cpu.sm_50,
	301	&cpu.sm_52,
	302	&cpu.sm_53,
	303	&cpu.sm_60,
	304	&cpu.sm_61,
	305	&cpu.sm_62,
	306	&cpu.sm_70,
	307	&cpu.sm_72,
	308	&cpu.sm_75,
	309	};

lib/std/target/powerpc.zig created+938

...	...	@@ -0,0 +1,938 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	@"64bit",
	6	@"64bitregs",
	7	altivec,
	8	booke,
	9	bpermd,
	10	cmpb,
	11	crbits,
	12	crypto,
	13	direct_move,
	14	e500,
	15	extdiv,
	16	fcpsgn,
	17	float128,
	18	fpcvt,
	19	fprnd,
	20	fpu,
	21	fre,
	22	fres,
	23	frsqrte,
	24	frsqrtes,
	25	fsqrt,
	26	hard_float,
	27	htm,
	28	icbt,
	29	invariant_function_descriptors,
	30	isa_v30_instructions,
	31	isel,
	32	ldbrx,
	33	lfiwax,
	34	longcall,
	35	mfocrf,
	36	msync,
	37	partword_atomics,
	38	popcntd,
	39	power8_altivec,
	40	power8_vector,
	41	power9_altivec,
	42	power9_vector,
	43	ppc_postra_sched,
	44	ppc_prera_sched,
	45	ppc4xx,
	46	ppc6xx,
	47	qpx,
	48	recipprec,
	49	secure_plt,
	50	slow_popcntd,
	51	spe,
	52	stfiwx,
	53	two_const_nr,
	54	vectors_use_two_units,
	55	vsx,
	56	};
	57
	58	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	59
	60	pub const all_features = blk: {
	61	const len = @typeInfo(Feature).Enum.fields.len;
	62	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	63	var result: [len]Cpu.Feature = undefined;
	64	result[@enumToInt(Feature.@"64bit")] = .{
	65	.llvm_name = "64bit",
	66	.description = "Enable 64-bit instructions",
	67	.dependencies = featureSet(&[_]Feature{}),
	68	};
	69	result[@enumToInt(Feature.@"64bitregs")] = .{
	70	.llvm_name = "64bitregs",
	71	.description = "Enable 64-bit registers usage for ppc32 [beta]",
	72	.dependencies = featureSet(&[_]Feature{}),
	73	};
	74	result[@enumToInt(Feature.altivec)] = .{
	75	.llvm_name = "altivec",
	76	.description = "Enable Altivec instructions",
	77	.dependencies = featureSet(&[_]Feature{
	78	.fpu,
	79	}),
	80	};
	81	result[@enumToInt(Feature.booke)] = .{
	82	.llvm_name = "booke",
	83	.description = "Enable Book E instructions",
	84	.dependencies = featureSet(&[_]Feature{
	85	.icbt,
	86	}),
	87	};
	88	result[@enumToInt(Feature.bpermd)] = .{
	89	.llvm_name = "bpermd",
	90	.description = "Enable the bpermd instruction",
	91	.dependencies = featureSet(&[_]Feature{}),
	92	};
	93	result[@enumToInt(Feature.cmpb)] = .{
	94	.llvm_name = "cmpb",
	95	.description = "Enable the cmpb instruction",
	96	.dependencies = featureSet(&[_]Feature{}),
	97	};
	98	result[@enumToInt(Feature.crbits)] = .{
	99	.llvm_name = "crbits",
	100	.description = "Use condition-register bits individually",
	101	.dependencies = featureSet(&[_]Feature{}),
	102	};
	103	result[@enumToInt(Feature.crypto)] = .{
	104	.llvm_name = "crypto",
	105	.description = "Enable POWER8 Crypto instructions",
	106	.dependencies = featureSet(&[_]Feature{
	107	.power8_altivec,
	108	}),
	109	};
	110	result[@enumToInt(Feature.direct_move)] = .{
	111	.llvm_name = "direct-move",
	112	.description = "Enable Power8 direct move instructions",
	113	.dependencies = featureSet(&[_]Feature{
	114	.vsx,
	115	}),
	116	};
	117	result[@enumToInt(Feature.e500)] = .{
	118	.llvm_name = "e500",
	119	.description = "Enable E500/E500mc instructions",
	120	.dependencies = featureSet(&[_]Feature{}),
	121	};
	122	result[@enumToInt(Feature.extdiv)] = .{
	123	.llvm_name = "extdiv",
	124	.description = "Enable extended divide instructions",
	125	.dependencies = featureSet(&[_]Feature{}),
	126	};
	127	result[@enumToInt(Feature.fcpsgn)] = .{
	128	.llvm_name = "fcpsgn",
	129	.description = "Enable the fcpsgn instruction",
	130	.dependencies = featureSet(&[_]Feature{
	131	.fpu,
	132	}),
	133	};
	134	result[@enumToInt(Feature.float128)] = .{
	135	.llvm_name = "float128",
	136	.description = "Enable the __float128 data type for IEEE-754R Binary128.",
	137	.dependencies = featureSet(&[_]Feature{
	138	.vsx,
	139	}),
	140	};
	141	result[@enumToInt(Feature.fpcvt)] = .{
	142	.llvm_name = "fpcvt",
	143	.description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
	144	.dependencies = featureSet(&[_]Feature{
	145	.fpu,
	146	}),
	147	};
	148	result[@enumToInt(Feature.fprnd)] = .{
	149	.llvm_name = "fprnd",
	150	.description = "Enable the fri[mnpz] instructions",
	151	.dependencies = featureSet(&[_]Feature{
	152	.fpu,
	153	}),
	154	};
	155	result[@enumToInt(Feature.fpu)] = .{
	156	.llvm_name = "fpu",
	157	.description = "Enable classic FPU instructions",
	158	.dependencies = featureSet(&[_]Feature{
	159	.hard_float,
	160	}),
	161	};
	162	result[@enumToInt(Feature.fre)] = .{
	163	.llvm_name = "fre",
	164	.description = "Enable the fre instruction",
	165	.dependencies = featureSet(&[_]Feature{
	166	.fpu,
	167	}),
	168	};
	169	result[@enumToInt(Feature.fres)] = .{
	170	.llvm_name = "fres",
	171	.description = "Enable the fres instruction",
	172	.dependencies = featureSet(&[_]Feature{
	173	.fpu,
	174	}),
	175	};
	176	result[@enumToInt(Feature.frsqrte)] = .{
	177	.llvm_name = "frsqrte",
	178	.description = "Enable the frsqrte instruction",
	179	.dependencies = featureSet(&[_]Feature{
	180	.fpu,
	181	}),
	182	};
	183	result[@enumToInt(Feature.frsqrtes)] = .{
	184	.llvm_name = "frsqrtes",
	185	.description = "Enable the frsqrtes instruction",
	186	.dependencies = featureSet(&[_]Feature{
	187	.fpu,
	188	}),
	189	};
	190	result[@enumToInt(Feature.fsqrt)] = .{
	191	.llvm_name = "fsqrt",
	192	.description = "Enable the fsqrt instruction",
	193	.dependencies = featureSet(&[_]Feature{
	194	.fpu,
	195	}),
	196	};
	197	result[@enumToInt(Feature.hard_float)] = .{
	198	.llvm_name = "hard-float",
	199	.description = "Enable floating-point instructions",
	200	.dependencies = featureSet(&[_]Feature{}),
	201	};
	202	result[@enumToInt(Feature.htm)] = .{
	203	.llvm_name = "htm",
	204	.description = "Enable Hardware Transactional Memory instructions",
	205	.dependencies = featureSet(&[_]Feature{}),
	206	};
	207	result[@enumToInt(Feature.icbt)] = .{
	208	.llvm_name = "icbt",
	209	.description = "Enable icbt instruction",
	210	.dependencies = featureSet(&[_]Feature{}),
	211	};
	212	result[@enumToInt(Feature.invariant_function_descriptors)] = .{
	213	.llvm_name = "invariant-function-descriptors",
	214	.description = "Assume function descriptors are invariant",
	215	.dependencies = featureSet(&[_]Feature{}),
	216	};
	217	result[@enumToInt(Feature.isa_v30_instructions)] = .{
	218	.llvm_name = "isa-v30-instructions",
	219	.description = "Enable instructions added in ISA 3.0.",
	220	.dependencies = featureSet(&[_]Feature{}),
	221	};
	222	result[@enumToInt(Feature.isel)] = .{
	223	.llvm_name = "isel",
	224	.description = "Enable the isel instruction",
	225	.dependencies = featureSet(&[_]Feature{}),
	226	};
	227	result[@enumToInt(Feature.ldbrx)] = .{
	228	.llvm_name = "ldbrx",
	229	.description = "Enable the ldbrx instruction",
	230	.dependencies = featureSet(&[_]Feature{}),
	231	};
	232	result[@enumToInt(Feature.lfiwax)] = .{
	233	.llvm_name = "lfiwax",
	234	.description = "Enable the lfiwax instruction",
	235	.dependencies = featureSet(&[_]Feature{
	236	.fpu,
	237	}),
	238	};
	239	result[@enumToInt(Feature.longcall)] = .{
	240	.llvm_name = "longcall",
	241	.description = "Always use indirect calls",
	242	.dependencies = featureSet(&[_]Feature{}),
	243	};
	244	result[@enumToInt(Feature.mfocrf)] = .{
	245	.llvm_name = "mfocrf",
	246	.description = "Enable the MFOCRF instruction",
	247	.dependencies = featureSet(&[_]Feature{}),
	248	};
	249	result[@enumToInt(Feature.msync)] = .{
	250	.llvm_name = "msync",
	251	.description = "Has only the msync instruction instead of sync",
	252	.dependencies = featureSet(&[_]Feature{
	253	.booke,
	254	}),
	255	};
	256	result[@enumToInt(Feature.partword_atomics)] = .{
	257	.llvm_name = "partword-atomics",
	258	.description = "Enable l[bh]arx and st[bh]cx.",
	259	.dependencies = featureSet(&[_]Feature{}),
	260	};
	261	result[@enumToInt(Feature.popcntd)] = .{
	262	.llvm_name = "popcntd",
	263	.description = "Enable the popcnt[dw] instructions",
	264	.dependencies = featureSet(&[_]Feature{}),
	265	};
	266	result[@enumToInt(Feature.power8_altivec)] = .{
	267	.llvm_name = "power8-altivec",
	268	.description = "Enable POWER8 Altivec instructions",
	269	.dependencies = featureSet(&[_]Feature{
	270	.altivec,
	271	}),
	272	};
	273	result[@enumToInt(Feature.power8_vector)] = .{
	274	.llvm_name = "power8-vector",
	275	.description = "Enable POWER8 vector instructions",
	276	.dependencies = featureSet(&[_]Feature{
	277	.power8_altivec,
	278	.vsx,
	279	}),
	280	};
	281	result[@enumToInt(Feature.power9_altivec)] = .{
	282	.llvm_name = "power9-altivec",
	283	.description = "Enable POWER9 Altivec instructions",
	284	.dependencies = featureSet(&[_]Feature{
	285	.isa_v30_instructions,
	286	.power8_altivec,
	287	}),
	288	};
	289	result[@enumToInt(Feature.power9_vector)] = .{
	290	.llvm_name = "power9-vector",
	291	.description = "Enable POWER9 vector instructions",
	292	.dependencies = featureSet(&[_]Feature{
	293	.isa_v30_instructions,
	294	.power8_vector,
	295	.power9_altivec,
	296	}),
	297	};
	298	result[@enumToInt(Feature.ppc_postra_sched)] = .{
	299	.llvm_name = "ppc-postra-sched",
	300	.description = "Use PowerPC post-RA scheduling strategy",
	301	.dependencies = featureSet(&[_]Feature{}),
	302	};
	303	result[@enumToInt(Feature.ppc_prera_sched)] = .{
	304	.llvm_name = "ppc-prera-sched",
	305	.description = "Use PowerPC pre-RA scheduling strategy",
	306	.dependencies = featureSet(&[_]Feature{}),
	307	};
	308	result[@enumToInt(Feature.ppc4xx)] = .{
	309	.llvm_name = "ppc4xx",
	310	.description = "Enable PPC 4xx instructions",
	311	.dependencies = featureSet(&[_]Feature{}),
	312	};
	313	result[@enumToInt(Feature.ppc6xx)] = .{
	314	.llvm_name = "ppc6xx",
	315	.description = "Enable PPC 6xx instructions",
	316	.dependencies = featureSet(&[_]Feature{}),
	317	};
	318	result[@enumToInt(Feature.qpx)] = .{
	319	.llvm_name = "qpx",
	320	.description = "Enable QPX instructions",
	321	.dependencies = featureSet(&[_]Feature{
	322	.fpu,
	323	}),
	324	};
	325	result[@enumToInt(Feature.recipprec)] = .{
	326	.llvm_name = "recipprec",
	327	.description = "Assume higher precision reciprocal estimates",
	328	.dependencies = featureSet(&[_]Feature{}),
	329	};
	330	result[@enumToInt(Feature.secure_plt)] = .{
	331	.llvm_name = "secure-plt",
	332	.description = "Enable secure plt mode",
	333	.dependencies = featureSet(&[_]Feature{}),
	334	};
	335	result[@enumToInt(Feature.slow_popcntd)] = .{
	336	.llvm_name = "slow-popcntd",
	337	.description = "Has slow popcnt[dw] instructions",
	338	.dependencies = featureSet(&[_]Feature{}),
	339	};
	340	result[@enumToInt(Feature.spe)] = .{
	341	.llvm_name = "spe",
	342	.description = "Enable SPE instructions",
	343	.dependencies = featureSet(&[_]Feature{
	344	.hard_float,
	345	}),
	346	};
	347	result[@enumToInt(Feature.stfiwx)] = .{
	348	.llvm_name = "stfiwx",
	349	.description = "Enable the stfiwx instruction",
	350	.dependencies = featureSet(&[_]Feature{
	351	.fpu,
	352	}),
	353	};
	354	result[@enumToInt(Feature.two_const_nr)] = .{
	355	.llvm_name = "two-const-nr",
	356	.description = "Requires two constant Newton-Raphson computation",
	357	.dependencies = featureSet(&[_]Feature{}),
	358	};
	359	result[@enumToInt(Feature.vectors_use_two_units)] = .{
	360	.llvm_name = "vectors-use-two-units",
	361	.description = "Vectors use two units",
	362	.dependencies = featureSet(&[_]Feature{}),
	363	};
	364	result[@enumToInt(Feature.vsx)] = .{
	365	.llvm_name = "vsx",
	366	.description = "Enable VSX instructions",
	367	.dependencies = featureSet(&[_]Feature{
	368	.altivec,
	369	}),
	370	};
	371	const ti = @typeInfo(Feature);
	372	for (result) \|*elem, i\| {
	373	elem.index = i;
	374	elem.name = ti.Enum.fields[i].name;
	375	}
	376	break :blk result;
	377	};
	378
	379	pub const cpu = struct {
	380	pub const @"440" = Cpu{
	381	.name = "440",
	382	.llvm_name = "440",
	383	.features = featureSet(&[_]Feature{
	384	.booke,
	385	.fres,
	386	.frsqrte,
	387	.icbt,
	388	.isel,
	389	.msync,
	390	}),
	391	};
	392	pub const @"450" = Cpu{
	393	.name = "450",
	394	.llvm_name = "450",
	395	.features = featureSet(&[_]Feature{
	396	.booke,
	397	.fres,
	398	.frsqrte,
	399	.icbt,
	400	.isel,
	401	.msync,
	402	}),
	403	};
	404	pub const @"601" = Cpu{
	405	.name = "601",
	406	.llvm_name = "601",
	407	.features = featureSet(&[_]Feature{
	408	.fpu,
	409	}),
	410	};
	411	pub const @"602" = Cpu{
	412	.name = "602",
	413	.llvm_name = "602",
	414	.features = featureSet(&[_]Feature{
	415	.fpu,
	416	}),
	417	};
	418	pub const @"603" = Cpu{
	419	.name = "603",
	420	.llvm_name = "603",
	421	.features = featureSet(&[_]Feature{
	422	.fres,
	423	.frsqrte,
	424	}),
	425	};
	426	pub const @"603e" = Cpu{
	427	.name = "603e",
	428	.llvm_name = "603e",
	429	.features = featureSet(&[_]Feature{
	430	.fres,
	431	.frsqrte,
	432	}),
	433	};
	434	pub const @"603ev" = Cpu{
	435	.name = "603ev",
	436	.llvm_name = "603ev",
	437	.features = featureSet(&[_]Feature{
	438	.fres,
	439	.frsqrte,
	440	}),
	441	};
	442	pub const @"604" = Cpu{
	443	.name = "604",
	444	.llvm_name = "604",
	445	.features = featureSet(&[_]Feature{
	446	.fres,
	447	.frsqrte,
	448	}),
	449	};
	450	pub const @"604e" = Cpu{
	451	.name = "604e",
	452	.llvm_name = "604e",
	453	.features = featureSet(&[_]Feature{
	454	.fres,
	455	.frsqrte,
	456	}),
	457	};
	458	pub const @"620" = Cpu{
	459	.name = "620",
	460	.llvm_name = "620",
	461	.features = featureSet(&[_]Feature{
	462	.fres,
	463	.frsqrte,
	464	}),
	465	};
	466	pub const @"7400" = Cpu{
	467	.name = "7400",
	468	.llvm_name = "7400",
	469	.features = featureSet(&[_]Feature{
	470	.altivec,
	471	.fres,
	472	.frsqrte,
	473	}),
	474	};
	475	pub const @"7450" = Cpu{
	476	.name = "7450",
	477	.llvm_name = "7450",
	478	.features = featureSet(&[_]Feature{
	479	.altivec,
	480	.fres,
	481	.frsqrte,
	482	}),
	483	};
	484	pub const @"750" = Cpu{
	485	.name = "750",
	486	.llvm_name = "750",
	487	.features = featureSet(&[_]Feature{
	488	.fres,
	489	.frsqrte,
	490	}),
	491	};
	492	pub const @"970" = Cpu{
	493	.name = "970",
	494	.llvm_name = "970",
	495	.features = featureSet(&[_]Feature{
	496	.@"64bit",
	497	.altivec,
	498	.fres,
	499	.frsqrte,
	500	.fsqrt,
	501	.mfocrf,
	502	.stfiwx,
	503	}),
	504	};
	505	pub const a2 = Cpu{
	506	.name = "a2",
	507	.llvm_name = "a2",
	508	.features = featureSet(&[_]Feature{
	509	.@"64bit",
	510	.booke,
	511	.cmpb,
	512	.fcpsgn,
	513	.fpcvt,
	514	.fprnd,
	515	.fre,
	516	.fres,
	517	.frsqrte,
	518	.frsqrtes,
	519	.fsqrt,
	520	.icbt,
	521	.isel,
	522	.ldbrx,
	523	.lfiwax,
	524	.mfocrf,
	525	.recipprec,
	526	.slow_popcntd,
	527	.stfiwx,
	528	}),
	529	};
	530	pub const a2q = Cpu{
	531	.name = "a2q",
	532	.llvm_name = "a2q",
	533	.features = featureSet(&[_]Feature{
	534	.@"64bit",
	535	.booke,
	536	.cmpb,
	537	.fcpsgn,
	538	.fpcvt,
	539	.fprnd,
	540	.fre,
	541	.fres,
	542	.frsqrte,
	543	.frsqrtes,
	544	.fsqrt,
	545	.icbt,
	546	.isel,
	547	.ldbrx,
	548	.lfiwax,
	549	.mfocrf,
	550	.qpx,
	551	.recipprec,
	552	.slow_popcntd,
	553	.stfiwx,
	554	}),
	555	};
	556	pub const e500 = Cpu{
	557	.name = "e500",
	558	.llvm_name = "e500",
	559	.features = featureSet(&[_]Feature{
	560	.booke,
	561	.icbt,
	562	.isel,
	563	}),
	564	};
	565	pub const e500mc = Cpu{
	566	.name = "e500mc",
	567	.llvm_name = "e500mc",
	568	.features = featureSet(&[_]Feature{
	569	.booke,
	570	.icbt,
	571	.isel,
	572	.stfiwx,
	573	}),
	574	};
	575	pub const e5500 = Cpu{
	576	.name = "e5500",
	577	.llvm_name = "e5500",
	578	.features = featureSet(&[_]Feature{
	579	.@"64bit",
	580	.booke,
	581	.icbt,
	582	.isel,
	583	.mfocrf,
	584	.stfiwx,
	585	}),
	586	};
	587	pub const g3 = Cpu{
	588	.name = "g3",
	589	.llvm_name = "g3",
	590	.features = featureSet(&[_]Feature{
	591	.fres,
	592	.frsqrte,
	593	}),
	594	};
	595	pub const g4 = Cpu{
	596	.name = "g4",
	597	.llvm_name = "g4",
	598	.features = featureSet(&[_]Feature{
	599	.altivec,
	600	.fres,
	601	.frsqrte,
	602	}),
	603	};
	604	pub const @"g4+" = Cpu{
	605	.name = "g4+",
	606	.llvm_name = "g4+",
	607	.features = featureSet(&[_]Feature{
	608	.altivec,
	609	.fres,
	610	.frsqrte,
	611	}),
	612	};
	613	pub const g5 = Cpu{
	614	.name = "g5",
	615	.llvm_name = "g5",
	616	.features = featureSet(&[_]Feature{
	617	.@"64bit",
	618	.altivec,
	619	.fres,
	620	.frsqrte,
	621	.fsqrt,
	622	.mfocrf,
	623	.stfiwx,
	624	}),
	625	};
	626	pub const generic = Cpu{
	627	.name = "generic",
	628	.llvm_name = "generic",
	629	.features = featureSet(&[_]Feature{
	630	.hard_float,
	631	}),
	632	};
	633	pub const ppc = Cpu{
	634	.name = "ppc",
	635	.llvm_name = "ppc",
	636	.features = featureSet(&[_]Feature{
	637	.hard_float,
	638	}),
	639	};
	640	pub const ppc32 = Cpu{
	641	.name = "ppc32",
	642	.llvm_name = "ppc32",
	643	.features = featureSet(&[_]Feature{
	644	.hard_float,
	645	}),
	646	};
	647	pub const ppc64 = Cpu{
	648	.name = "ppc64",
	649	.llvm_name = "ppc64",
	650	.features = featureSet(&[_]Feature{
	651	.@"64bit",
	652	.altivec,
	653	.fres,
	654	.frsqrte,
	655	.fsqrt,
	656	.mfocrf,
	657	.stfiwx,
	658	}),
	659	};
	660	pub const ppc64le = Cpu{
	661	.name = "ppc64le",
	662	.llvm_name = "ppc64le",
	663	.features = featureSet(&[_]Feature{
	664	.@"64bit",
	665	.altivec,
	666	.bpermd,
	667	.cmpb,
	668	.crypto,
	669	.direct_move,
	670	.extdiv,
	671	.fcpsgn,
	672	.fpcvt,
	673	.fprnd,
	674	.fre,
	675	.fres,
	676	.frsqrte,
	677	.frsqrtes,
	678	.fsqrt,
	679	.htm,
	680	.icbt,
	681	.isel,
	682	.ldbrx,
	683	.lfiwax,
	684	.mfocrf,
	685	.partword_atomics,
	686	.popcntd,
	687	.power8_altivec,
	688	.power8_vector,
	689	.recipprec,
	690	.stfiwx,
	691	.two_const_nr,
	692	.vsx,
	693	}),
	694	};
	695	pub const pwr3 = Cpu{
	696	.name = "pwr3",
	697	.llvm_name = "pwr3",
	698	.features = featureSet(&[_]Feature{
	699	.@"64bit",
	700	.altivec,
	701	.fres,
	702	.frsqrte,
	703	.mfocrf,
	704	.stfiwx,
	705	}),
	706	};
	707	pub const pwr4 = Cpu{
	708	.name = "pwr4",
	709	.llvm_name = "pwr4",
	710	.features = featureSet(&[_]Feature{
	711	.@"64bit",
	712	.altivec,
	713	.fres,
	714	.frsqrte,
	715	.fsqrt,
	716	.mfocrf,
	717	.stfiwx,
	718	}),
	719	};
	720	pub const pwr5 = Cpu{
	721	.name = "pwr5",
	722	.llvm_name = "pwr5",
	723	.features = featureSet(&[_]Feature{
	724	.@"64bit",
	725	.altivec,
	726	.fre,
	727	.fres,
	728	.frsqrte,
	729	.frsqrtes,
	730	.fsqrt,
	731	.mfocrf,
	732	.stfiwx,
	733	}),
	734	};
	735	pub const pwr5x = Cpu{
	736	.name = "pwr5x",
	737	.llvm_name = "pwr5x",
	738	.features = featureSet(&[_]Feature{
	739	.@"64bit",
	740	.altivec,
	741	.fprnd,
	742	.fre,
	743	.fres,
	744	.frsqrte,
	745	.frsqrtes,
	746	.fsqrt,
	747	.mfocrf,
	748	.stfiwx,
	749	}),
	750	};
	751	pub const pwr6 = Cpu{
	752	.name = "pwr6",
	753	.llvm_name = "pwr6",
	754	.features = featureSet(&[_]Feature{
	755	.@"64bit",
	756	.altivec,
	757	.cmpb,
	758	.fcpsgn,
	759	.fprnd,
	760	.fre,
	761	.fres,
	762	.frsqrte,
	763	.frsqrtes,
	764	.fsqrt,
	765	.lfiwax,
	766	.mfocrf,
	767	.recipprec,
	768	.stfiwx,
	769	}),
	770	};
	771	pub const pwr6x = Cpu{
	772	.name = "pwr6x",
	773	.llvm_name = "pwr6x",
	774	.features = featureSet(&[_]Feature{
	775	.@"64bit",
	776	.altivec,
	777	.cmpb,
	778	.fcpsgn,
	779	.fprnd,
	780	.fre,
	781	.fres,
	782	.frsqrte,
	783	.frsqrtes,
	784	.fsqrt,
	785	.lfiwax,
	786	.mfocrf,
	787	.recipprec,
	788	.stfiwx,
	789	}),
	790	};
	791	pub const pwr7 = Cpu{
	792	.name = "pwr7",
	793	.llvm_name = "pwr7",
	794	.features = featureSet(&[_]Feature{
	795	.@"64bit",
	796	.altivec,
	797	.bpermd,
	798	.cmpb,
	799	.extdiv,
	800	.fcpsgn,
	801	.fpcvt,
	802	.fprnd,
	803	.fre,
	804	.fres,
	805	.frsqrte,
	806	.frsqrtes,
	807	.fsqrt,
	808	.isel,
	809	.ldbrx,
	810	.lfiwax,
	811	.mfocrf,
	812	.popcntd,
	813	.recipprec,
	814	.stfiwx,
	815	.two_const_nr,
	816	.vsx,
	817	}),
	818	};
	819	pub const pwr8 = Cpu{
	820	.name = "pwr8",
	821	.llvm_name = "pwr8",
	822	.features = featureSet(&[_]Feature{
	823	.@"64bit",
	824	.altivec,
	825	.bpermd,
	826	.cmpb,
	827	.crypto,
	828	.direct_move,
	829	.extdiv,
	830	.fcpsgn,
	831	.fpcvt,
	832	.fprnd,
	833	.fre,
	834	.fres,
	835	.frsqrte,
	836	.frsqrtes,
	837	.fsqrt,
	838	.htm,
	839	.icbt,
	840	.isel,
	841	.ldbrx,
	842	.lfiwax,
	843	.mfocrf,
	844	.partword_atomics,
	845	.popcntd,
	846	.power8_altivec,
	847	.power8_vector,
	848	.recipprec,
	849	.stfiwx,
	850	.two_const_nr,
	851	.vsx,
	852	}),
	853	};
	854	pub const pwr9 = Cpu{
	855	.name = "pwr9",
	856	.llvm_name = "pwr9",
	857	.features = featureSet(&[_]Feature{
	858	.@"64bit",
	859	.altivec,
	860	.bpermd,
	861	.cmpb,
	862	.crypto,
	863	.direct_move,
	864	.extdiv,
	865	.fcpsgn,
	866	.fpcvt,
	867	.fprnd,
	868	.fre,
	869	.fres,
	870	.frsqrte,
	871	.frsqrtes,
	872	.fsqrt,
	873	.htm,
	874	.icbt,
	875	.isa_v30_instructions,
	876	.isel,
	877	.ldbrx,
	878	.lfiwax,
	879	.mfocrf,
	880	.partword_atomics,
	881	.popcntd,
	882	.power8_altivec,
	883	.power8_vector,
	884	.power9_altivec,
	885	.power9_vector,
	886	.ppc_postra_sched,
	887	.ppc_prera_sched,
	888	.recipprec,
	889	.stfiwx,
	890	.two_const_nr,
	891	.vectors_use_two_units,
	892	.vsx,
	893	}),
	894	};
	895	};
	896
	897	/// All powerpc CPUs, sorted alphabetically by name.
	898	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	899	/// compiler has inefficient memory and CPU usage, affecting build times.
	900	pub const all_cpus = &[_]*const Cpu{
	901	&cpu.@"440",
	902	&cpu.@"450",
	903	&cpu.@"601",
	904	&cpu.@"602",
	905	&cpu.@"603",
	906	&cpu.@"603e",
	907	&cpu.@"603ev",
	908	&cpu.@"604",
	909	&cpu.@"604e",
	910	&cpu.@"620",
	911	&cpu.@"7400",
	912	&cpu.@"7450",
	913	&cpu.@"750",
	914	&cpu.@"970",
	915	&cpu.a2,
	916	&cpu.a2q,
	917	&cpu.e500,
	918	&cpu.e500mc,
	919	&cpu.e5500,
	920	&cpu.g3,
	921	&cpu.g4,
	922	&cpu.@"g4+",
	923	&cpu.g5,
	924	&cpu.generic,
	925	&cpu.ppc,
	926	&cpu.ppc32,
	927	&cpu.ppc64,
	928	&cpu.ppc64le,
	929	&cpu.pwr3,
	930	&cpu.pwr4,
	931	&cpu.pwr5,
	932	&cpu.pwr5x,
	933	&cpu.pwr6,
	934	&cpu.pwr6x,
	935	&cpu.pwr7,
	936	&cpu.pwr8,
	937	&cpu.pwr9,
	938	};

lib/std/target/riscv.zig created+122

...	...	@@ -0,0 +1,122 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	@"64bit",
	6	a,
	7	c,
	8	d,
	9	e,
	10	f,
	11	m,
	12	relax,
	13	};
	14
	15	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	16
	17	pub const all_features = blk: {
	18	const len = @typeInfo(Feature).Enum.fields.len;
	19	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	20	var result: [len]Cpu.Feature = undefined;
	21	result[@enumToInt(Feature.@"64bit")] = .{
	22	.llvm_name = "64bit",
	23	.description = "Implements RV64",
	24	.dependencies = featureSet(&[_]Feature{}),
	25	};
	26	result[@enumToInt(Feature.a)] = .{
	27	.llvm_name = "a",
	28	.description = "'A' (Atomic Instructions)",
	29	.dependencies = featureSet(&[_]Feature{}),
	30	};
	31	result[@enumToInt(Feature.c)] = .{
	32	.llvm_name = "c",
	33	.description = "'C' (Compressed Instructions)",
	34	.dependencies = featureSet(&[_]Feature{}),
	35	};
	36	result[@enumToInt(Feature.d)] = .{
	37	.llvm_name = "d",
	38	.description = "'D' (Double-Precision Floating-Point)",
	39	.dependencies = featureSet(&[_]Feature{
	40	.f,
	41	}),
	42	};
	43	result[@enumToInt(Feature.e)] = .{
	44	.llvm_name = "e",
	45	.description = "Implements RV32E (provides 16 rather than 32 GPRs)",
	46	.dependencies = featureSet(&[_]Feature{}),
	47	};
	48	result[@enumToInt(Feature.f)] = .{
	49	.llvm_name = "f",
	50	.description = "'F' (Single-Precision Floating-Point)",
	51	.dependencies = featureSet(&[_]Feature{}),
	52	};
	53	result[@enumToInt(Feature.m)] = .{
	54	.llvm_name = "m",
	55	.description = "'M' (Integer Multiplication and Division)",
	56	.dependencies = featureSet(&[_]Feature{}),
	57	};
	58	result[@enumToInt(Feature.relax)] = .{
	59	.llvm_name = "relax",
	60	.description = "Enable Linker relaxation.",
	61	.dependencies = featureSet(&[_]Feature{}),
	62	};
	63	const ti = @typeInfo(Feature);
	64	for (result) \|*elem, i\| {
	65	elem.index = i;
	66	elem.name = ti.Enum.fields[i].name;
	67	}
	68	break :blk result;
	69	};
	70
	71	pub const cpu = struct {
	72	pub const baseline_rv32 = Cpu{
	73	.name = "baseline_rv32",
	74	.llvm_name = "generic-rv32",
	75	.features = featureSet(&[_]Feature{
	76	.a,
	77	.c,
	78	.d,
	79	.f,
	80	.m,
	81	.relax,
	82	}),
	83	};
	84
	85	pub const baseline_rv64 = Cpu{
	86	.name = "baseline_rv64",
	87	.llvm_name = "generic-rv64",
	88	.features = featureSet(&[_]Feature{
	89	.@"64bit",
	90	.a,
	91	.c,
	92	.d,
	93	.f,
	94	.m,
	95	.relax,
	96	}),
	97	};
	98
	99	pub const generic_rv32 = Cpu{
	100	.name = "generic_rv32",
	101	.llvm_name = "generic-rv32",
	102	.features = featureSet(&[_]Feature{}),
	103	};
	104
	105	pub const generic_rv64 = Cpu{
	106	.name = "generic_rv64",
	107	.llvm_name = "generic-rv64",
	108	.features = featureSet(&[_]Feature{
	109	.@"64bit",
	110	}),
	111	};
	112	};
	113
	114	/// All riscv CPUs, sorted alphabetically by name.
	115	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	116	/// compiler has inefficient memory and CPU usage, affecting build times.
	117	pub const all_cpus = &[_]*const Cpu{
	118	&cpu.baseline_rv32,
	119	&cpu.baseline_rv64,
	120	&cpu.generic_rv32,
	121	&cpu.generic_rv64,
	122	};

lib/std/target/sparc.zig created+495

...	...	@@ -0,0 +1,495 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	deprecated_v8,
	6	detectroundchange,
	7	fixallfdivsqrt,
	8	hard_quad_float,
	9	hasleoncasa,
	10	hasumacsmac,
	11	insertnopload,
	12	leon,
	13	leoncyclecounter,
	14	leonpwrpsr,
	15	no_fmuls,
	16	no_fsmuld,
	17	popc,
	18	soft_float,
	19	soft_mul_div,
	20	v9,
	21	vis,
	22	vis2,
	23	vis3,
	24	};
	25
	26	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	27
	28	pub const all_features = blk: {
	29	const len = @typeInfo(Feature).Enum.fields.len;
	30	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	31	var result: [len]Cpu.Feature = undefined;
	32	result[@enumToInt(Feature.deprecated_v8)] = .{
	33	.llvm_name = "deprecated-v8",
	34	.description = "Enable deprecated V8 instructions in V9 mode",
	35	.dependencies = featureSet(&[_]Feature{}),
	36	};
	37	result[@enumToInt(Feature.detectroundchange)] = .{
	38	.llvm_name = "detectroundchange",
	39	.description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
	40	.dependencies = featureSet(&[_]Feature{}),
	41	};
	42	result[@enumToInt(Feature.fixallfdivsqrt)] = .{
	43	.llvm_name = "fixallfdivsqrt",
	44	.description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
	45	.dependencies = featureSet(&[_]Feature{}),
	46	};
	47	result[@enumToInt(Feature.hard_quad_float)] = .{
	48	.llvm_name = "hard-quad-float",
	49	.description = "Enable quad-word floating point instructions",
	50	.dependencies = featureSet(&[_]Feature{}),
	51	};
	52	result[@enumToInt(Feature.hasleoncasa)] = .{
	53	.llvm_name = "hasleoncasa",
	54	.description = "Enable CASA instruction for LEON3 and LEON4 processors",
	55	.dependencies = featureSet(&[_]Feature{}),
	56	};
	57	result[@enumToInt(Feature.hasumacsmac)] = .{
	58	.llvm_name = "hasumacsmac",
	59	.description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
	60	.dependencies = featureSet(&[_]Feature{}),
	61	};
	62	result[@enumToInt(Feature.insertnopload)] = .{
	63	.llvm_name = "insertnopload",
	64	.description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
	65	.dependencies = featureSet(&[_]Feature{}),
	66	};
	67	result[@enumToInt(Feature.leon)] = .{
	68	.llvm_name = "leon",
	69	.description = "Enable LEON extensions",
	70	.dependencies = featureSet(&[_]Feature{}),
	71	};
	72	result[@enumToInt(Feature.leoncyclecounter)] = .{
	73	.llvm_name = "leoncyclecounter",
	74	.description = "Use the Leon cycle counter register",
	75	.dependencies = featureSet(&[_]Feature{}),
	76	};
	77	result[@enumToInt(Feature.leonpwrpsr)] = .{
	78	.llvm_name = "leonpwrpsr",
	79	.description = "Enable the PWRPSR instruction",
	80	.dependencies = featureSet(&[_]Feature{}),
	81	};
	82	result[@enumToInt(Feature.no_fmuls)] = .{
	83	.llvm_name = "no-fmuls",
	84	.description = "Disable the fmuls instruction.",
	85	.dependencies = featureSet(&[_]Feature{}),
	86	};
	87	result[@enumToInt(Feature.no_fsmuld)] = .{
	88	.llvm_name = "no-fsmuld",
	89	.description = "Disable the fsmuld instruction.",
	90	.dependencies = featureSet(&[_]Feature{}),
	91	};
	92	result[@enumToInt(Feature.popc)] = .{
	93	.llvm_name = "popc",
	94	.description = "Use the popc (population count) instruction",
	95	.dependencies = featureSet(&[_]Feature{}),
	96	};
	97	result[@enumToInt(Feature.soft_float)] = .{
	98	.llvm_name = "soft-float",
	99	.description = "Use software emulation for floating point",
	100	.dependencies = featureSet(&[_]Feature{}),
	101	};
	102	result[@enumToInt(Feature.soft_mul_div)] = .{
	103	.llvm_name = "soft-mul-div",
	104	.description = "Use software emulation for integer multiply and divide",
	105	.dependencies = featureSet(&[_]Feature{}),
	106	};
	107	result[@enumToInt(Feature.v9)] = .{
	108	.llvm_name = "v9",
	109	.description = "Enable SPARC-V9 instructions",
	110	.dependencies = featureSet(&[_]Feature{}),
	111	};
	112	result[@enumToInt(Feature.vis)] = .{
	113	.llvm_name = "vis",
	114	.description = "Enable UltraSPARC Visual Instruction Set extensions",
	115	.dependencies = featureSet(&[_]Feature{}),
	116	};
	117	result[@enumToInt(Feature.vis2)] = .{
	118	.llvm_name = "vis2",
	119	.description = "Enable Visual Instruction Set extensions II",
	120	.dependencies = featureSet(&[_]Feature{}),
	121	};
	122	result[@enumToInt(Feature.vis3)] = .{
	123	.llvm_name = "vis3",
	124	.description = "Enable Visual Instruction Set extensions III",
	125	.dependencies = featureSet(&[_]Feature{}),
	126	};
	127	const ti = @typeInfo(Feature);
	128	for (result) \|*elem, i\| {
	129	elem.index = i;
	130	elem.name = ti.Enum.fields[i].name;
	131	}
	132	break :blk result;
	133	};
	134
	135	pub const cpu = struct {
	136	pub const at697e = Cpu{
	137	.name = "at697e",
	138	.llvm_name = "at697e",
	139	.features = featureSet(&[_]Feature{
	140	.insertnopload,
	141	.leon,
	142	}),
	143	};
	144	pub const at697f = Cpu{
	145	.name = "at697f",
	146	.llvm_name = "at697f",
	147	.features = featureSet(&[_]Feature{
	148	.insertnopload,
	149	.leon,
	150	}),
	151	};
	152	pub const f934 = Cpu{
	153	.name = "f934",
	154	.llvm_name = "f934",
	155	.features = featureSet(&[_]Feature{}),
	156	};
	157	pub const generic = Cpu{
	158	.name = "generic",
	159	.llvm_name = "generic",
	160	.features = featureSet(&[_]Feature{}),
	161	};
	162	pub const gr712rc = Cpu{
	163	.name = "gr712rc",
	164	.llvm_name = "gr712rc",
	165	.features = featureSet(&[_]Feature{
	166	.hasleoncasa,
	167	.leon,
	168	}),
	169	};
	170	pub const gr740 = Cpu{
	171	.name = "gr740",
	172	.llvm_name = "gr740",
	173	.features = featureSet(&[_]Feature{
	174	.hasleoncasa,
	175	.hasumacsmac,
	176	.leon,
	177	.leoncyclecounter,
	178	.leonpwrpsr,
	179	}),
	180	};
	181	pub const hypersparc = Cpu{
	182	.name = "hypersparc",
	183	.llvm_name = "hypersparc",
	184	.features = featureSet(&[_]Feature{}),
	185	};
	186	pub const leon2 = Cpu{
	187	.name = "leon2",
	188	.llvm_name = "leon2",
	189	.features = featureSet(&[_]Feature{
	190	.leon,
	191	}),
	192	};
	193	pub const leon3 = Cpu{
	194	.name = "leon3",
	195	.llvm_name = "leon3",
	196	.features = featureSet(&[_]Feature{
	197	.hasumacsmac,
	198	.leon,
	199	}),
	200	};
	201	pub const leon4 = Cpu{
	202	.name = "leon4",
	203	.llvm_name = "leon4",
	204	.features = featureSet(&[_]Feature{
	205	.hasleoncasa,
	206	.hasumacsmac,
	207	.leon,
	208	}),
	209	};
	210	pub const ma2080 = Cpu{
	211	.name = "ma2080",
	212	.llvm_name = "ma2080",
	213	.features = featureSet(&[_]Feature{
	214	.hasleoncasa,
	215	.leon,
	216	}),
	217	};
	218	pub const ma2085 = Cpu{
	219	.name = "ma2085",
	220	.llvm_name = "ma2085",
	221	.features = featureSet(&[_]Feature{
	222	.hasleoncasa,
	223	.leon,
	224	}),
	225	};
	226	pub const ma2100 = Cpu{
	227	.name = "ma2100",
	228	.llvm_name = "ma2100",
	229	.features = featureSet(&[_]Feature{
	230	.hasleoncasa,
	231	.leon,
	232	}),
	233	};
	234	pub const ma2150 = Cpu{
	235	.name = "ma2150",
	236	.llvm_name = "ma2150",
	237	.features = featureSet(&[_]Feature{
	238	.hasleoncasa,
	239	.leon,
	240	}),
	241	};
	242	pub const ma2155 = Cpu{
	243	.name = "ma2155",
	244	.llvm_name = "ma2155",
	245	.features = featureSet(&[_]Feature{
	246	.hasleoncasa,
	247	.leon,
	248	}),
	249	};
	250	pub const ma2450 = Cpu{
	251	.name = "ma2450",
	252	.llvm_name = "ma2450",
	253	.features = featureSet(&[_]Feature{
	254	.hasleoncasa,
	255	.leon,
	256	}),
	257	};
	258	pub const ma2455 = Cpu{
	259	.name = "ma2455",
	260	.llvm_name = "ma2455",
	261	.features = featureSet(&[_]Feature{
	262	.hasleoncasa,
	263	.leon,
	264	}),
	265	};
	266	pub const ma2480 = Cpu{
	267	.name = "ma2480",
	268	.llvm_name = "ma2480",
	269	.features = featureSet(&[_]Feature{
	270	.hasleoncasa,
	271	.leon,
	272	}),
	273	};
	274	pub const ma2485 = Cpu{
	275	.name = "ma2485",
	276	.llvm_name = "ma2485",
	277	.features = featureSet(&[_]Feature{
	278	.hasleoncasa,
	279	.leon,
	280	}),
	281	};
	282	pub const ma2x5x = Cpu{
	283	.name = "ma2x5x",
	284	.llvm_name = "ma2x5x",
	285	.features = featureSet(&[_]Feature{
	286	.hasleoncasa,
	287	.leon,
	288	}),
	289	};
	290	pub const ma2x8x = Cpu{
	291	.name = "ma2x8x",
	292	.llvm_name = "ma2x8x",
	293	.features = featureSet(&[_]Feature{
	294	.hasleoncasa,
	295	.leon,
	296	}),
	297	};
	298	pub const myriad2 = Cpu{
	299	.name = "myriad2",
	300	.llvm_name = "myriad2",
	301	.features = featureSet(&[_]Feature{
	302	.hasleoncasa,
	303	.leon,
	304	}),
	305	};
	306	pub const myriad2_1 = Cpu{
	307	.name = "myriad2_1",
	308	.llvm_name = "myriad2.1",
	309	.features = featureSet(&[_]Feature{
	310	.hasleoncasa,
	311	.leon,
	312	}),
	313	};
	314	pub const myriad2_2 = Cpu{
	315	.name = "myriad2_2",
	316	.llvm_name = "myriad2.2",
	317	.features = featureSet(&[_]Feature{
	318	.hasleoncasa,
	319	.leon,
	320	}),
	321	};
	322	pub const myriad2_3 = Cpu{
	323	.name = "myriad2_3",
	324	.llvm_name = "myriad2.3",
	325	.features = featureSet(&[_]Feature{
	326	.hasleoncasa,
	327	.leon,
	328	}),
	329	};
	330	pub const niagara = Cpu{
	331	.name = "niagara",
	332	.llvm_name = "niagara",
	333	.features = featureSet(&[_]Feature{
	334	.deprecated_v8,
	335	.v9,
	336	.vis,
	337	.vis2,
	338	}),
	339	};
	340	pub const niagara2 = Cpu{
	341	.name = "niagara2",
	342	.llvm_name = "niagara2",
	343	.features = featureSet(&[_]Feature{
	344	.deprecated_v8,
	345	.popc,
	346	.v9,
	347	.vis,
	348	.vis2,
	349	}),
	350	};
	351	pub const niagara3 = Cpu{
	352	.name = "niagara3",
	353	.llvm_name = "niagara3",
	354	.features = featureSet(&[_]Feature{
	355	.deprecated_v8,
	356	.popc,
	357	.v9,
	358	.vis,
	359	.vis2,
	360	}),
	361	};
	362	pub const niagara4 = Cpu{
	363	.name = "niagara4",
	364	.llvm_name = "niagara4",
	365	.features = featureSet(&[_]Feature{
	366	.deprecated_v8,
	367	.popc,
	368	.v9,
	369	.vis,
	370	.vis2,
	371	.vis3,
	372	}),
	373	};
	374	pub const sparclet = Cpu{
	375	.name = "sparclet",
	376	.llvm_name = "sparclet",
	377	.features = featureSet(&[_]Feature{}),
	378	};
	379	pub const sparclite = Cpu{
	380	.name = "sparclite",
	381	.llvm_name = "sparclite",
	382	.features = featureSet(&[_]Feature{}),
	383	};
	384	pub const sparclite86x = Cpu{
	385	.name = "sparclite86x",
	386	.llvm_name = "sparclite86x",
	387	.features = featureSet(&[_]Feature{}),
	388	};
	389	pub const supersparc = Cpu{
	390	.name = "supersparc",
	391	.llvm_name = "supersparc",
	392	.features = featureSet(&[_]Feature{}),
	393	};
	394	pub const tsc701 = Cpu{
	395	.name = "tsc701",
	396	.llvm_name = "tsc701",
	397	.features = featureSet(&[_]Feature{}),
	398	};
	399	pub const ultrasparc = Cpu{
	400	.name = "ultrasparc",
	401	.llvm_name = "ultrasparc",
	402	.features = featureSet(&[_]Feature{
	403	.deprecated_v8,
	404	.v9,
	405	.vis,
	406	}),
	407	};
	408	pub const ultrasparc3 = Cpu{
	409	.name = "ultrasparc3",
	410	.llvm_name = "ultrasparc3",
	411	.features = featureSet(&[_]Feature{
	412	.deprecated_v8,
	413	.v9,
	414	.vis,
	415	.vis2,
	416	}),
	417	};
	418	pub const ut699 = Cpu{
	419	.name = "ut699",
	420	.llvm_name = "ut699",
	421	.features = featureSet(&[_]Feature{
	422	.fixallfdivsqrt,
	423	.insertnopload,
	424	.leon,
	425	.no_fmuls,
	426	.no_fsmuld,
	427	}),
	428	};
	429	pub const v7 = Cpu{
	430	.name = "v7",
	431	.llvm_name = "v7",
	432	.features = featureSet(&[_]Feature{
	433	.no_fsmuld,
	434	.soft_mul_div,
	435	}),
	436	};
	437	pub const v8 = Cpu{
	438	.name = "v8",
	439	.llvm_name = "v8",
	440	.features = featureSet(&[_]Feature{}),
	441	};
	442	pub const v9 = Cpu{
	443	.name = "v9",
	444	.llvm_name = "v9",
	445	.features = featureSet(&[_]Feature{
	446	.v9,
	447	}),
	448	};
	449	};
	450
	451	/// All sparc CPUs, sorted alphabetically by name.
	452	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	453	/// compiler has inefficient memory and CPU usage, affecting build times.
	454	pub const all_cpus = &[_]*const Cpu{
	455	&cpu.at697e,
	456	&cpu.at697f,
	457	&cpu.f934,
	458	&cpu.generic,
	459	&cpu.gr712rc,
	460	&cpu.gr740,
	461	&cpu.hypersparc,
	462	&cpu.leon2,
	463	&cpu.leon3,
	464	&cpu.leon4,
	465	&cpu.ma2080,
	466	&cpu.ma2085,
	467	&cpu.ma2100,
	468	&cpu.ma2150,
	469	&cpu.ma2155,
	470	&cpu.ma2450,
	471	&cpu.ma2455,
	472	&cpu.ma2480,
	473	&cpu.ma2485,
	474	&cpu.ma2x5x,
	475	&cpu.ma2x8x,
	476	&cpu.myriad2,
	477	&cpu.myriad2_1,
	478	&cpu.myriad2_2,
	479	&cpu.myriad2_3,
	480	&cpu.niagara,
	481	&cpu.niagara2,
	482	&cpu.niagara3,
	483	&cpu.niagara4,
	484	&cpu.sparclet,
	485	&cpu.sparclite,
	486	&cpu.sparclite86x,
	487	&cpu.supersparc,
	488	&cpu.tsc701,
	489	&cpu.ultrasparc,
	490	&cpu.ultrasparc3,
	491	&cpu.ut699,
	492	&cpu.v7,
	493	&cpu.v8,
	494	&cpu.v9,
	495	};

lib/std/target/systemz.zig created+510

...	...	@@ -0,0 +1,510 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	deflate_conversion,
	6	dfp_packed_conversion,
	7	dfp_zoned_conversion,
	8	distinct_ops,
	9	enhanced_dat_2,
	10	enhanced_sort,
	11	execution_hint,
	12	fast_serialization,
	13	fp_extension,
	14	guarded_storage,
	15	high_word,
	16	insert_reference_bits_multiple,
	17	interlocked_access1,
	18	load_and_trap,
	19	load_and_zero_rightmost_byte,
	20	load_store_on_cond,
	21	load_store_on_cond_2,
	22	message_security_assist_extension3,
	23	message_security_assist_extension4,
	24	message_security_assist_extension5,
	25	message_security_assist_extension7,
	26	message_security_assist_extension8,
	27	message_security_assist_extension9,
	28	miscellaneous_extensions,
	29	miscellaneous_extensions_2,
	30	miscellaneous_extensions_3,
	31	population_count,
	32	processor_assist,
	33	reset_reference_bits_multiple,
	34	transactional_execution,
	35	vector,
	36	vector_enhancements_1,
	37	vector_enhancements_2,
	38	vector_packed_decimal,
	39	vector_packed_decimal_enhancement,
	40	};
	41
	42	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	43
	44	pub const all_features = blk: {
	45	const len = @typeInfo(Feature).Enum.fields.len;
	46	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	47	var result: [len]Cpu.Feature = undefined;
	48	result[@enumToInt(Feature.deflate_conversion)] = .{
	49	.llvm_name = "deflate-conversion",
	50	.description = "Assume that the deflate-conversion facility is installed",
	51	.dependencies = featureSet(&[_]Feature{}),
	52	};
	53	result[@enumToInt(Feature.dfp_packed_conversion)] = .{
	54	.llvm_name = "dfp-packed-conversion",
	55	.description = "Assume that the DFP packed-conversion facility is installed",
	56	.dependencies = featureSet(&[_]Feature{}),
	57	};
	58	result[@enumToInt(Feature.dfp_zoned_conversion)] = .{
	59	.llvm_name = "dfp-zoned-conversion",
	60	.description = "Assume that the DFP zoned-conversion facility is installed",
	61	.dependencies = featureSet(&[_]Feature{}),
	62	};
	63	result[@enumToInt(Feature.distinct_ops)] = .{
	64	.llvm_name = "distinct-ops",
	65	.description = "Assume that the distinct-operands facility is installed",
	66	.dependencies = featureSet(&[_]Feature{}),
	67	};
	68	result[@enumToInt(Feature.enhanced_dat_2)] = .{
	69	.llvm_name = "enhanced-dat-2",
	70	.description = "Assume that the enhanced-DAT facility 2 is installed",
	71	.dependencies = featureSet(&[_]Feature{}),
	72	};
	73	result[@enumToInt(Feature.enhanced_sort)] = .{
	74	.llvm_name = "enhanced-sort",
	75	.description = "Assume that the enhanced-sort facility is installed",
	76	.dependencies = featureSet(&[_]Feature{}),
	77	};
	78	result[@enumToInt(Feature.execution_hint)] = .{
	79	.llvm_name = "execution-hint",
	80	.description = "Assume that the execution-hint facility is installed",
	81	.dependencies = featureSet(&[_]Feature{}),
	82	};
	83	result[@enumToInt(Feature.fast_serialization)] = .{
	84	.llvm_name = "fast-serialization",
	85	.description = "Assume that the fast-serialization facility is installed",
	86	.dependencies = featureSet(&[_]Feature{}),
	87	};
	88	result[@enumToInt(Feature.fp_extension)] = .{
	89	.llvm_name = "fp-extension",
	90	.description = "Assume that the floating-point extension facility is installed",
	91	.dependencies = featureSet(&[_]Feature{}),
	92	};
	93	result[@enumToInt(Feature.guarded_storage)] = .{
	94	.llvm_name = "guarded-storage",
	95	.description = "Assume that the guarded-storage facility is installed",
	96	.dependencies = featureSet(&[_]Feature{}),
	97	};
	98	result[@enumToInt(Feature.high_word)] = .{
	99	.llvm_name = "high-word",
	100	.description = "Assume that the high-word facility is installed",
	101	.dependencies = featureSet(&[_]Feature{}),
	102	};
	103	result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{
	104	.llvm_name = "insert-reference-bits-multiple",
	105	.description = "Assume that the insert-reference-bits-multiple facility is installed",
	106	.dependencies = featureSet(&[_]Feature{}),
	107	};
	108	result[@enumToInt(Feature.interlocked_access1)] = .{
	109	.llvm_name = "interlocked-access1",
	110	.description = "Assume that interlocked-access facility 1 is installed",
	111	.dependencies = featureSet(&[_]Feature{}),
	112	};
	113	result[@enumToInt(Feature.load_and_trap)] = .{
	114	.llvm_name = "load-and-trap",
	115	.description = "Assume that the load-and-trap facility is installed",
	116	.dependencies = featureSet(&[_]Feature{}),
	117	};
	118	result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{
	119	.llvm_name = "load-and-zero-rightmost-byte",
	120	.description = "Assume that the load-and-zero-rightmost-byte facility is installed",
	121	.dependencies = featureSet(&[_]Feature{}),
	122	};
	123	result[@enumToInt(Feature.load_store_on_cond)] = .{
	124	.llvm_name = "load-store-on-cond",
	125	.description = "Assume that the load/store-on-condition facility is installed",
	126	.dependencies = featureSet(&[_]Feature{}),
	127	};
	128	result[@enumToInt(Feature.load_store_on_cond_2)] = .{
	129	.llvm_name = "load-store-on-cond-2",
	130	.description = "Assume that the load/store-on-condition facility 2 is installed",
	131	.dependencies = featureSet(&[_]Feature{}),
	132	};
	133	result[@enumToInt(Feature.message_security_assist_extension3)] = .{
	134	.llvm_name = "message-security-assist-extension3",
	135	.description = "Assume that the message-security-assist extension facility 3 is installed",
	136	.dependencies = featureSet(&[_]Feature{}),
	137	};
	138	result[@enumToInt(Feature.message_security_assist_extension4)] = .{
	139	.llvm_name = "message-security-assist-extension4",
	140	.description = "Assume that the message-security-assist extension facility 4 is installed",
	141	.dependencies = featureSet(&[_]Feature{}),
	142	};
	143	result[@enumToInt(Feature.message_security_assist_extension5)] = .{
	144	.llvm_name = "message-security-assist-extension5",
	145	.description = "Assume that the message-security-assist extension facility 5 is installed",
	146	.dependencies = featureSet(&[_]Feature{}),
	147	};
	148	result[@enumToInt(Feature.message_security_assist_extension7)] = .{
	149	.llvm_name = "message-security-assist-extension7",
	150	.description = "Assume that the message-security-assist extension facility 7 is installed",
	151	.dependencies = featureSet(&[_]Feature{}),
	152	};
	153	result[@enumToInt(Feature.message_security_assist_extension8)] = .{
	154	.llvm_name = "message-security-assist-extension8",
	155	.description = "Assume that the message-security-assist extension facility 8 is installed",
	156	.dependencies = featureSet(&[_]Feature{}),
	157	};
	158	result[@enumToInt(Feature.message_security_assist_extension9)] = .{
	159	.llvm_name = "message-security-assist-extension9",
	160	.description = "Assume that the message-security-assist extension facility 9 is installed",
	161	.dependencies = featureSet(&[_]Feature{}),
	162	};
	163	result[@enumToInt(Feature.miscellaneous_extensions)] = .{
	164	.llvm_name = "miscellaneous-extensions",
	165	.description = "Assume that the miscellaneous-extensions facility is installed",
	166	.dependencies = featureSet(&[_]Feature{}),
	167	};
	168	result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{
	169	.llvm_name = "miscellaneous-extensions-2",
	170	.description = "Assume that the miscellaneous-extensions facility 2 is installed",
	171	.dependencies = featureSet(&[_]Feature{}),
	172	};
	173	result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{
	174	.llvm_name = "miscellaneous-extensions-3",
	175	.description = "Assume that the miscellaneous-extensions facility 3 is installed",
	176	.dependencies = featureSet(&[_]Feature{}),
	177	};
	178	result[@enumToInt(Feature.population_count)] = .{
	179	.llvm_name = "population-count",
	180	.description = "Assume that the population-count facility is installed",
	181	.dependencies = featureSet(&[_]Feature{}),
	182	};
	183	result[@enumToInt(Feature.processor_assist)] = .{
	184	.llvm_name = "processor-assist",
	185	.description = "Assume that the processor-assist facility is installed",
	186	.dependencies = featureSet(&[_]Feature{}),
	187	};
	188	result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
	189	.llvm_name = "reset-reference-bits-multiple",
	190	.description = "Assume that the reset-reference-bits-multiple facility is installed",
	191	.dependencies = featureSet(&[_]Feature{}),
	192	};
	193	result[@enumToInt(Feature.transactional_execution)] = .{
	194	.llvm_name = "transactional-execution",
	195	.description = "Assume that the transactional-execution facility is installed",
	196	.dependencies = featureSet(&[_]Feature{}),
	197	};
	198	result[@enumToInt(Feature.vector)] = .{
	199	.llvm_name = "vector",
	200	.description = "Assume that the vectory facility is installed",
	201	.dependencies = featureSet(&[_]Feature{}),
	202	};
	203	result[@enumToInt(Feature.vector_enhancements_1)] = .{
	204	.llvm_name = "vector-enhancements-1",
	205	.description = "Assume that the vector enhancements facility 1 is installed",
	206	.dependencies = featureSet(&[_]Feature{}),
	207	};
	208	result[@enumToInt(Feature.vector_enhancements_2)] = .{
	209	.llvm_name = "vector-enhancements-2",
	210	.description = "Assume that the vector enhancements facility 2 is installed",
	211	.dependencies = featureSet(&[_]Feature{}),
	212	};
	213	result[@enumToInt(Feature.vector_packed_decimal)] = .{
	214	.llvm_name = "vector-packed-decimal",
	215	.description = "Assume that the vector packed decimal facility is installed",
	216	.dependencies = featureSet(&[_]Feature{}),
	217	};
	218	result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{
	219	.llvm_name = "vector-packed-decimal-enhancement",
	220	.description = "Assume that the vector packed decimal enhancement facility is installed",
	221	.dependencies = featureSet(&[_]Feature{}),
	222	};
	223	const ti = @typeInfo(Feature);
	224	for (result) \|*elem, i\| {
	225	elem.index = i;
	226	elem.name = ti.Enum.fields[i].name;
	227	}
	228	break :blk result;
	229	};
	230
	231	pub const cpu = struct {
	232	pub const arch10 = Cpu{
	233	.name = "arch10",
	234	.llvm_name = "arch10",
	235	.features = featureSet(&[_]Feature{
	236	.dfp_zoned_conversion,
	237	.distinct_ops,
	238	.enhanced_dat_2,
	239	.execution_hint,
	240	.fast_serialization,
	241	.fp_extension,
	242	.high_word,
	243	.interlocked_access1,
	244	.load_and_trap,
	245	.load_store_on_cond,
	246	.message_security_assist_extension3,
	247	.message_security_assist_extension4,
	248	.miscellaneous_extensions,
	249	.population_count,
	250	.processor_assist,
	251	.reset_reference_bits_multiple,
	252	.transactional_execution,
	253	}),
	254	};
	255	pub const arch11 = Cpu{
	256	.name = "arch11",
	257	.llvm_name = "arch11",
	258	.features = featureSet(&[_]Feature{
	259	.dfp_packed_conversion,
	260	.dfp_zoned_conversion,
	261	.distinct_ops,
	262	.enhanced_dat_2,
	263	.execution_hint,
	264	.fast_serialization,
	265	.fp_extension,
	266	.high_word,
	267	.interlocked_access1,
	268	.load_and_trap,
	269	.load_and_zero_rightmost_byte,
	270	.load_store_on_cond,
	271	.load_store_on_cond_2,
	272	.message_security_assist_extension3,
	273	.message_security_assist_extension4,
	274	.message_security_assist_extension5,
	275	.miscellaneous_extensions,
	276	.population_count,
	277	.processor_assist,
	278	.reset_reference_bits_multiple,
	279	.transactional_execution,
	280	.vector,
	281	}),
	282	};
	283	pub const arch12 = Cpu{
	284	.name = "arch12",
	285	.llvm_name = "arch12",
	286	.features = featureSet(&[_]Feature{
	287	.dfp_packed_conversion,
	288	.dfp_zoned_conversion,
	289	.distinct_ops,
	290	.enhanced_dat_2,
	291	.execution_hint,
	292	.fast_serialization,
	293	.fp_extension,
	294	.guarded_storage,
	295	.high_word,
	296	.insert_reference_bits_multiple,
	297	.interlocked_access1,
	298	.load_and_trap,
	299	.load_and_zero_rightmost_byte,
	300	.load_store_on_cond,
	301	.load_store_on_cond_2,
	302	.message_security_assist_extension3,
	303	.message_security_assist_extension4,
	304	.message_security_assist_extension5,
	305	.message_security_assist_extension7,
	306	.message_security_assist_extension8,
	307	.miscellaneous_extensions,
	308	.miscellaneous_extensions_2,
	309	.population_count,
	310	.processor_assist,
	311	.reset_reference_bits_multiple,
	312	.transactional_execution,
	313	.vector,
	314	.vector_enhancements_1,
	315	.vector_packed_decimal,
	316	}),
	317	};
	318	pub const arch13 = Cpu{
	319	.name = "arch13",
	320	.llvm_name = "arch13",
	321	.features = featureSet(&[_]Feature{
	322	.deflate_conversion,
	323	.dfp_packed_conversion,
	324	.dfp_zoned_conversion,
	325	.distinct_ops,
	326	.enhanced_dat_2,
	327	.enhanced_sort,
	328	.execution_hint,
	329	.fast_serialization,
	330	.fp_extension,
	331	.guarded_storage,
	332	.high_word,
	333	.insert_reference_bits_multiple,
	334	.interlocked_access1,
	335	.load_and_trap,
	336	.load_and_zero_rightmost_byte,
	337	.load_store_on_cond,
	338	.load_store_on_cond_2,
	339	.message_security_assist_extension3,
	340	.message_security_assist_extension4,
	341	.message_security_assist_extension5,
	342	.message_security_assist_extension7,
	343	.message_security_assist_extension8,
	344	.message_security_assist_extension9,
	345	.miscellaneous_extensions,
	346	.miscellaneous_extensions_2,
	347	.miscellaneous_extensions_3,
	348	.population_count,
	349	.processor_assist,
	350	.reset_reference_bits_multiple,
	351	.transactional_execution,
	352	.vector,
	353	.vector_enhancements_1,
	354	.vector_enhancements_2,
	355	.vector_packed_decimal,
	356	.vector_packed_decimal_enhancement,
	357	}),
	358	};
	359	pub const arch8 = Cpu{
	360	.name = "arch8",
	361	.llvm_name = "arch8",
	362	.features = featureSet(&[_]Feature{}),
	363	};
	364	pub const arch9 = Cpu{
	365	.name = "arch9",
	366	.llvm_name = "arch9",
	367	.features = featureSet(&[_]Feature{
	368	.distinct_ops,
	369	.fast_serialization,
	370	.fp_extension,
	371	.high_word,
	372	.interlocked_access1,
	373	.load_store_on_cond,
	374	.message_security_assist_extension3,
	375	.message_security_assist_extension4,
	376	.population_count,
	377	.reset_reference_bits_multiple,
	378	}),
	379	};
	380	pub const generic = Cpu{
	381	.name = "generic",
	382	.llvm_name = "generic",
	383	.features = featureSet(&[_]Feature{}),
	384	};
	385	pub const z10 = Cpu{
	386	.name = "z10",
	387	.llvm_name = "z10",
	388	.features = featureSet(&[_]Feature{}),
	389	};
	390	pub const z13 = Cpu{
	391	.name = "z13",
	392	.llvm_name = "z13",
	393	.features = featureSet(&[_]Feature{
	394	.dfp_packed_conversion,
	395	.dfp_zoned_conversion,
	396	.distinct_ops,
	397	.enhanced_dat_2,
	398	.execution_hint,
	399	.fast_serialization,
	400	.fp_extension,
	401	.high_word,
	402	.interlocked_access1,
	403	.load_and_trap,
	404	.load_and_zero_rightmost_byte,
	405	.load_store_on_cond,
	406	.load_store_on_cond_2,
	407	.message_security_assist_extension3,
	408	.message_security_assist_extension4,
	409	.message_security_assist_extension5,
	410	.miscellaneous_extensions,
	411	.population_count,
	412	.processor_assist,
	413	.reset_reference_bits_multiple,
	414	.transactional_execution,
	415	.vector,
	416	}),
	417	};
	418	pub const z14 = Cpu{
	419	.name = "z14",
	420	.llvm_name = "z14",
	421	.features = featureSet(&[_]Feature{
	422	.dfp_packed_conversion,
	423	.dfp_zoned_conversion,
	424	.distinct_ops,
	425	.enhanced_dat_2,
	426	.execution_hint,
	427	.fast_serialization,
	428	.fp_extension,
	429	.guarded_storage,
	430	.high_word,
	431	.insert_reference_bits_multiple,
	432	.interlocked_access1,
	433	.load_and_trap,
	434	.load_and_zero_rightmost_byte,
	435	.load_store_on_cond,
	436	.load_store_on_cond_2,
	437	.message_security_assist_extension3,
	438	.message_security_assist_extension4,
	439	.message_security_assist_extension5,
	440	.message_security_assist_extension7,
	441	.message_security_assist_extension8,
	442	.miscellaneous_extensions,
	443	.miscellaneous_extensions_2,
	444	.population_count,
	445	.processor_assist,
	446	.reset_reference_bits_multiple,
	447	.transactional_execution,
	448	.vector,
	449	.vector_enhancements_1,
	450	.vector_packed_decimal,
	451	}),
	452	};
	453	pub const z196 = Cpu{
	454	.name = "z196",
	455	.llvm_name = "z196",
	456	.features = featureSet(&[_]Feature{
	457	.distinct_ops,
	458	.fast_serialization,
	459	.fp_extension,
	460	.high_word,
	461	.interlocked_access1,
	462	.load_store_on_cond,
	463	.message_security_assist_extension3,
	464	.message_security_assist_extension4,
	465	.population_count,
	466	.reset_reference_bits_multiple,
	467	}),
	468	};
	469	pub const zEC12 = Cpu{
	470	.name = "zEC12",
	471	.llvm_name = "zEC12",
	472	.features = featureSet(&[_]Feature{
	473	.dfp_zoned_conversion,
	474	.distinct_ops,
	475	.enhanced_dat_2,
	476	.execution_hint,
	477	.fast_serialization,
	478	.fp_extension,
	479	.high_word,
	480	.interlocked_access1,
	481	.load_and_trap,
	482	.load_store_on_cond,
	483	.message_security_assist_extension3,
	484	.message_security_assist_extension4,
	485	.miscellaneous_extensions,
	486	.population_count,
	487	.processor_assist,
	488	.reset_reference_bits_multiple,
	489	.transactional_execution,
	490	}),
	491	};
	492	};
	493
	494	/// All systemz CPUs, sorted alphabetically by name.
	495	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	496	/// compiler has inefficient memory and CPU usage, affecting build times.
	497	pub const all_cpus = &[_]*const Cpu{
	498	&cpu.arch10,
	499	&cpu.arch11,
	500	&cpu.arch12,
	501	&cpu.arch13,
	502	&cpu.arch8,
	503	&cpu.arch9,
	504	&cpu.generic,
	505	&cpu.z10,
	506	&cpu.z13,
	507	&cpu.z14,
	508	&cpu.z196,
	509	&cpu.zEC12,
	510	};

lib/std/target/wasm.zig created+114

...	...	@@ -0,0 +1,114 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	atomics,
	6	bulk_memory,
	7	exception_handling,
	8	multivalue,
	9	mutable_globals,
	10	nontrapping_fptoint,
	11	sign_ext,
	12	simd128,
	13	tail_call,
	14	unimplemented_simd128,
	15	};
	16
	17	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	18
	19	pub const all_features = blk: {
	20	const len = @typeInfo(Feature).Enum.fields.len;
	21	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	22	var result: [len]Cpu.Feature = undefined;
	23	result[@enumToInt(Feature.atomics)] = .{
	24	.llvm_name = "atomics",
	25	.description = "Enable Atomics",
	26	.dependencies = featureSet(&[_]Feature{}),
	27	};
	28	result[@enumToInt(Feature.bulk_memory)] = .{
	29	.llvm_name = "bulk-memory",
	30	.description = "Enable bulk memory operations",
	31	.dependencies = featureSet(&[_]Feature{}),
	32	};
	33	result[@enumToInt(Feature.exception_handling)] = .{
	34	.llvm_name = "exception-handling",
	35	.description = "Enable Wasm exception handling",
	36	.dependencies = featureSet(&[_]Feature{}),
	37	};
	38	result[@enumToInt(Feature.multivalue)] = .{
	39	.llvm_name = "multivalue",
	40	.description = "Enable multivalue blocks, instructions, and functions",
	41	.dependencies = featureSet(&[_]Feature{}),
	42	};
	43	result[@enumToInt(Feature.mutable_globals)] = .{
	44	.llvm_name = "mutable-globals",
	45	.description = "Enable mutable globals",
	46	.dependencies = featureSet(&[_]Feature{}),
	47	};
	48	result[@enumToInt(Feature.nontrapping_fptoint)] = .{
	49	.llvm_name = "nontrapping-fptoint",
	50	.description = "Enable non-trapping float-to-int conversion operators",
	51	.dependencies = featureSet(&[_]Feature{}),
	52	};
	53	result[@enumToInt(Feature.sign_ext)] = .{
	54	.llvm_name = "sign-ext",
	55	.description = "Enable sign extension operators",
	56	.dependencies = featureSet(&[_]Feature{}),
	57	};
	58	result[@enumToInt(Feature.simd128)] = .{
	59	.llvm_name = "simd128",
	60	.description = "Enable 128-bit SIMD",
	61	.dependencies = featureSet(&[_]Feature{}),
	62	};
	63	result[@enumToInt(Feature.tail_call)] = .{
	64	.llvm_name = "tail-call",
	65	.description = "Enable tail call instructions",
	66	.dependencies = featureSet(&[_]Feature{}),
	67	};
	68	result[@enumToInt(Feature.unimplemented_simd128)] = .{
	69	.llvm_name = "unimplemented-simd128",
	70	.description = "Enable 128-bit SIMD not yet implemented in engines",
	71	.dependencies = featureSet(&[_]Feature{
	72	.simd128,
	73	}),
	74	};
	75	const ti = @typeInfo(Feature);
	76	for (result) \|*elem, i\| {
	77	elem.index = i;
	78	elem.name = ti.Enum.fields[i].name;
	79	}
	80	break :blk result;
	81	};
	82
	83	pub const cpu = struct {
	84	pub const bleeding_edge = Cpu{
	85	.name = "bleeding_edge",
	86	.llvm_name = "bleeding-edge",
	87	.features = featureSet(&[_]Feature{
	88	.atomics,
	89	.mutable_globals,
	90	.nontrapping_fptoint,
	91	.sign_ext,
	92	.simd128,
	93	}),
	94	};
	95	pub const generic = Cpu{
	96	.name = "generic",
	97	.llvm_name = "generic",
	98	.features = featureSet(&[_]Feature{}),
	99	};
	100	pub const mvp = Cpu{
	101	.name = "mvp",
	102	.llvm_name = "mvp",
	103	.features = featureSet(&[_]Feature{}),
	104	};
	105	};
	106
	107	/// All wasm CPUs, sorted alphabetically by name.
	108	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	109	/// compiler has inefficient memory and CPU usage, affecting build times.
	110	pub const all_cpus = &[_]*const Cpu{
	111	&cpu.bleeding_edge,
	112	&cpu.generic,
	113	&cpu.mvp,
	114	};

lib/std/target/x86.zig created+2859

...	...	@@ -0,0 +1,2859 @@
	1	const std = @import("../std.zig");
	2	const Cpu = std.Target.Cpu;
	3
	4	pub const Feature = enum {
	5	@"3dnow",
	6	@"3dnowa",
	7	@"64bit",
	8	adx,
	9	aes,
	10	avx,
	11	avx2,
	12	avx512bf16,
	13	avx512bitalg,
	14	avx512bw,
	15	avx512cd,
	16	avx512dq,
	17	avx512er,
	18	avx512f,
	19	avx512ifma,
	20	avx512pf,
	21	avx512vbmi,
	22	avx512vbmi2,
	23	avx512vl,
	24	avx512vnni,
	25	avx512vp2intersect,
	26	avx512vpopcntdq,
	27	bmi,
	28	bmi2,
	29	branchfusion,
	30	cldemote,
	31	clflushopt,
	32	clwb,
	33	clzero,
	34	cmov,
	35	cx16,
	36	cx8,
	37	enqcmd,
	38	ermsb,
	39	f16c,
	40	false_deps_lzcnt_tzcnt,
	41	false_deps_popcnt,
	42	fast_11bytenop,
	43	fast_15bytenop,
	44	fast_bextr,
	45	fast_gather,
	46	fast_hops,
	47	fast_lzcnt,
	48	fast_partial_ymm_or_zmm_write,
	49	fast_scalar_fsqrt,
	50	fast_scalar_shift_masks,
	51	fast_shld_rotate,
	52	fast_variable_shuffle,
	53	fast_vector_fsqrt,
	54	fast_vector_shift_masks,
	55	fma,
	56	fma4,
	57	fsgsbase,
	58	fxsr,
	59	gfni,
	60	idivl_to_divb,
	61	idivq_to_divl,
	62	invpcid,
	63	lea_sp,
	64	lea_uses_ag,
	65	lwp,
	66	lzcnt,
	67	macrofusion,
	68	merge_to_threeway_branch,
	69	mmx,
	70	movbe,
	71	movdir64b,
	72	movdiri,
	73	mpx,
	74	mwaitx,
	75	nopl,
	76	pad_short_functions,
	77	pclmul,
	78	pconfig,
	79	pku,
	80	popcnt,
	81	prefer_256_bit,
	82	prefetchwt1,
	83	prfchw,
	84	ptwrite,
	85	rdpid,
	86	rdrnd,
	87	rdseed,
	88	retpoline,
	89	retpoline_external_thunk,
	90	retpoline_indirect_branches,
	91	retpoline_indirect_calls,
	92	rtm,
	93	sahf,
	94	sgx,
	95	sha,
	96	shstk,
	97	slow_3ops_lea,
	98	slow_incdec,
	99	slow_lea,
	100	slow_pmaddwd,
	101	slow_pmulld,
	102	slow_shld,
	103	slow_two_mem_ops,
	104	slow_unaligned_mem_16,
	105	slow_unaligned_mem_32,
	106	soft_float,
	107	sse,
	108	sse_unaligned_mem,
	109	sse2,
	110	sse3,
	111	sse4_1,
	112	sse4_2,
	113	sse4a,
	114	ssse3,
	115	tbm,
	116	vaes,
	117	vpclmulqdq,
	118	waitpkg,
	119	wbnoinvd,
	120	x87,
	121	xop,
	122	xsave,
	123	xsavec,
	124	xsaveopt,
	125	xsaves,
	126	};
	127
	128	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
	129
	130	pub const all_features = blk: {
	131	const len = @typeInfo(Feature).Enum.fields.len;
	132	std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
	133	var result: [len]Cpu.Feature = undefined;
	134	result[@enumToInt(Feature.@"3dnow")] = .{
	135	.llvm_name = "3dnow",
	136	.description = "Enable 3DNow! instructions",
	137	.dependencies = featureSet(&[_]Feature{
	138	.mmx,
	139	}),
	140	};
	141	result[@enumToInt(Feature.@"3dnowa")] = .{
	142	.llvm_name = "3dnowa",
	143	.description = "Enable 3DNow! Athlon instructions",
	144	.dependencies = featureSet(&[_]Feature{
	145	.@"3dnow",
	146	}),
	147	};
	148	result[@enumToInt(Feature.@"64bit")] = .{
	149	.llvm_name = "64bit",
	150	.description = "Support 64-bit instructions",
	151	.dependencies = featureSet(&[_]Feature{}),
	152	};
	153	result[@enumToInt(Feature.adx)] = .{
	154	.llvm_name = "adx",
	155	.description = "Support ADX instructions",
	156	.dependencies = featureSet(&[_]Feature{}),
	157	};
	158	result[@enumToInt(Feature.aes)] = .{
	159	.llvm_name = "aes",
	160	.description = "Enable AES instructions",
	161	.dependencies = featureSet(&[_]Feature{
	162	.sse2,
	163	}),
	164	};
	165	result[@enumToInt(Feature.avx)] = .{
	166	.llvm_name = "avx",
	167	.description = "Enable AVX instructions",
	168	.dependencies = featureSet(&[_]Feature{
	169	.sse4_2,
	170	}),
	171	};
	172	result[@enumToInt(Feature.avx2)] = .{
	173	.llvm_name = "avx2",
	174	.description = "Enable AVX2 instructions",
	175	.dependencies = featureSet(&[_]Feature{
	176	.avx,
	177	}),
	178	};
	179	result[@enumToInt(Feature.avx512bf16)] = .{
	180	.llvm_name = "avx512bf16",
	181	.description = "Support bfloat16 floating point",
	182	.dependencies = featureSet(&[_]Feature{
	183	.avx512bw,
	184	}),
	185	};
	186	result[@enumToInt(Feature.avx512bitalg)] = .{
	187	.llvm_name = "avx512bitalg",
	188	.description = "Enable AVX-512 Bit Algorithms",
	189	.dependencies = featureSet(&[_]Feature{
	190	.avx512bw,
	191	}),
	192	};
	193	result[@enumToInt(Feature.avx512bw)] = .{
	194	.llvm_name = "avx512bw",
	195	.description = "Enable AVX-512 Byte and Word Instructions",
	196	.dependencies = featureSet(&[_]Feature{
	197	.avx512f,
	198	}),
	199	};
	200	result[@enumToInt(Feature.avx512cd)] = .{
	201	.llvm_name = "avx512cd",
	202	.description = "Enable AVX-512 Conflict Detection Instructions",
	203	.dependencies = featureSet(&[_]Feature{
	204	.avx512f,
	205	}),
	206	};
	207	result[@enumToInt(Feature.avx512dq)] = .{
	208	.llvm_name = "avx512dq",
	209	.description = "Enable AVX-512 Doubleword and Quadword Instructions",
	210	.dependencies = featureSet(&[_]Feature{
	211	.avx512f,
	212	}),
	213	};
	214	result[@enumToInt(Feature.avx512er)] = .{
	215	.llvm_name = "avx512er",
	216	.description = "Enable AVX-512 Exponential and Reciprocal Instructions",
	217	.dependencies = featureSet(&[_]Feature{
	218	.avx512f,
	219	}),
	220	};
	221	result[@enumToInt(Feature.avx512f)] = .{
	222	.llvm_name = "avx512f",
	223	.description = "Enable AVX-512 instructions",
	224	.dependencies = featureSet(&[_]Feature{
	225	.avx2,
	226	.f16c,
	227	.fma,
	228	}),
	229	};
	230	result[@enumToInt(Feature.avx512ifma)] = .{
	231	.llvm_name = "avx512ifma",
	232	.description = "Enable AVX-512 Integer Fused Multiple-Add",
	233	.dependencies = featureSet(&[_]Feature{
	234	.avx512f,
	235	}),
	236	};
	237	result[@enumToInt(Feature.avx512pf)] = .{
	238	.llvm_name = "avx512pf",
	239	.description = "Enable AVX-512 PreFetch Instructions",
	240	.dependencies = featureSet(&[_]Feature{
	241	.avx512f,
	242	}),
	243	};
	244	result[@enumToInt(Feature.avx512vbmi)] = .{
	245	.llvm_name = "avx512vbmi",
	246	.description = "Enable AVX-512 Vector Byte Manipulation Instructions",
	247	.dependencies = featureSet(&[_]Feature{
	248	.avx512bw,
	249	}),
	250	};
	251	result[@enumToInt(Feature.avx512vbmi2)] = .{
	252	.llvm_name = "avx512vbmi2",
	253	.description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
	254	.dependencies = featureSet(&[_]Feature{
	255	.avx512bw,
	256	}),
	257	};
	258	result[@enumToInt(Feature.avx512vl)] = .{
	259	.llvm_name = "avx512vl",
	260	.description = "Enable AVX-512 Vector Length eXtensions",
	261	.dependencies = featureSet(&[_]Feature{
	262	.avx512f,
	263	}),
	264	};
	265	result[@enumToInt(Feature.avx512vnni)] = .{
	266	.llvm_name = "avx512vnni",
	267	.description = "Enable AVX-512 Vector Neural Network Instructions",
	268	.dependencies = featureSet(&[_]Feature{
	269	.avx512f,
	270	}),
	271	};
	272	result[@enumToInt(Feature.avx512vp2intersect)] = .{
	273	.llvm_name = "avx512vp2intersect",
	274	.description = "Enable AVX-512 vp2intersect",
	275	.dependencies = featureSet(&[_]Feature{
	276	.avx512f,
	277	}),
	278	};
	279	result[@enumToInt(Feature.avx512vpopcntdq)] = .{
	280	.llvm_name = "avx512vpopcntdq",
	281	.description = "Enable AVX-512 Population Count Instructions",
	282	.dependencies = featureSet(&[_]Feature{
	283	.avx512f,
	284	}),
	285	};
	286	result[@enumToInt(Feature.bmi)] = .{
	287	.llvm_name = "bmi",
	288	.description = "Support BMI instructions",
	289	.dependencies = featureSet(&[_]Feature{}),
	290	};
	291	result[@enumToInt(Feature.bmi2)] = .{
	292	.llvm_name = "bmi2",
	293	.description = "Support BMI2 instructions",
	294	.dependencies = featureSet(&[_]Feature{}),
	295	};
	296	result[@enumToInt(Feature.branchfusion)] = .{
	297	.llvm_name = "branchfusion",
	298	.description = "CMP/TEST can be fused with conditional branches",
	299	.dependencies = featureSet(&[_]Feature{}),
	300	};
	301	result[@enumToInt(Feature.cldemote)] = .{
	302	.llvm_name = "cldemote",
	303	.description = "Enable Cache Demote",
	304	.dependencies = featureSet(&[_]Feature{}),
	305	};
	306	result[@enumToInt(Feature.clflushopt)] = .{
	307	.llvm_name = "clflushopt",
	308	.description = "Flush A Cache Line Optimized",
	309	.dependencies = featureSet(&[_]Feature{}),
	310	};
	311	result[@enumToInt(Feature.clwb)] = .{
	312	.llvm_name = "clwb",
	313	.description = "Cache Line Write Back",
	314	.dependencies = featureSet(&[_]Feature{}),
	315	};
	316	result[@enumToInt(Feature.clzero)] = .{
	317	.llvm_name = "clzero",
	318	.description = "Enable Cache Line Zero",
	319	.dependencies = featureSet(&[_]Feature{}),
	320	};
	321	result[@enumToInt(Feature.cmov)] = .{
	322	.llvm_name = "cmov",
	323	.description = "Enable conditional move instructions",
	324	.dependencies = featureSet(&[_]Feature{}),
	325	};
	326	result[@enumToInt(Feature.cx16)] = .{
	327	.llvm_name = "cx16",
	328	.description = "64-bit with cmpxchg16b",
	329	.dependencies = featureSet(&[_]Feature{
	330	.cx8,
	331	}),
	332	};
	333	result[@enumToInt(Feature.cx8)] = .{
	334	.llvm_name = "cx8",
	335	.description = "Support CMPXCHG8B instructions",
	336	.dependencies = featureSet(&[_]Feature{}),
	337	};
	338	result[@enumToInt(Feature.enqcmd)] = .{
	339	.llvm_name = "enqcmd",
	340	.description = "Has ENQCMD instructions",
	341	.dependencies = featureSet(&[_]Feature{}),
	342	};
	343	result[@enumToInt(Feature.ermsb)] = .{
	344	.llvm_name = "ermsb",
	345	.description = "REP MOVS/STOS are fast",
	346	.dependencies = featureSet(&[_]Feature{}),
	347	};
	348	result[@enumToInt(Feature.f16c)] = .{
	349	.llvm_name = "f16c",
	350	.description = "Support 16-bit floating point conversion instructions",
	351	.dependencies = featureSet(&[_]Feature{
	352	.avx,
	353	}),
	354	};
	355	result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
	356	.llvm_name = "false-deps-lzcnt-tzcnt",
	357	.description = "LZCNT/TZCNT have a false dependency on dest register",
	358	.dependencies = featureSet(&[_]Feature{}),
	359	};
	360	result[@enumToInt(Feature.false_deps_popcnt)] = .{
	361	.llvm_name = "false-deps-popcnt",
	362	.description = "POPCNT has a false dependency on dest register",
	363	.dependencies = featureSet(&[_]Feature{}),
	364	};
	365	result[@enumToInt(Feature.fast_11bytenop)] = .{
	366	.llvm_name = "fast-11bytenop",
	367	.description = "Target can quickly decode up to 11 byte NOPs",
	368	.dependencies = featureSet(&[_]Feature{}),
	369	};
	370	result[@enumToInt(Feature.fast_15bytenop)] = .{
	371	.llvm_name = "fast-15bytenop",
	372	.description = "Target can quickly decode up to 15 byte NOPs",
	373	.dependencies = featureSet(&[_]Feature{}),
	374	};
	375	result[@enumToInt(Feature.fast_bextr)] = .{
	376	.llvm_name = "fast-bextr",
	377	.description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
	378	.dependencies = featureSet(&[_]Feature{}),
	379	};
	380	result[@enumToInt(Feature.fast_gather)] = .{
	381	.llvm_name = "fast-gather",
	382	.description = "Indicates if gather is reasonably fast",
	383	.dependencies = featureSet(&[_]Feature{}),
	384	};
	385	result[@enumToInt(Feature.fast_hops)] = .{
	386	.llvm_name = "fast-hops",
	387	.description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
	388	.dependencies = featureSet(&[_]Feature{
	389	.sse3,
	390	}),
	391	};
	392	result[@enumToInt(Feature.fast_lzcnt)] = .{
	393	.llvm_name = "fast-lzcnt",
	394	.description = "LZCNT instructions are as fast as most simple integer ops",
	395	.dependencies = featureSet(&[_]Feature{}),
	396	};
	397	result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
	398	.llvm_name = "fast-partial-ymm-or-zmm-write",
	399	.description = "Partial writes to YMM/ZMM registers are fast",
	400	.dependencies = featureSet(&[_]Feature{}),
	401	};
	402	result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
	403	.llvm_name = "fast-scalar-fsqrt",
	404	.description = "Scalar SQRT is fast (disable Newton-Raphson)",
	405	.dependencies = featureSet(&[_]Feature{}),
	406	};
	407	result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
	408	.llvm_name = "fast-scalar-shift-masks",
	409	.description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
	410	.dependencies = featureSet(&[_]Feature{}),
	411	};
	412	result[@enumToInt(Feature.fast_shld_rotate)] = .{
	413	.llvm_name = "fast-shld-rotate",
	414	.description = "SHLD can be used as a faster rotate",
	415	.dependencies = featureSet(&[_]Feature{}),
	416	};
	417	result[@enumToInt(Feature.fast_variable_shuffle)] = .{
	418	.llvm_name = "fast-variable-shuffle",
	419	.description = "Shuffles with variable masks are fast",
	420	.dependencies = featureSet(&[_]Feature{}),
	421	};
	422	result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
	423	.llvm_name = "fast-vector-fsqrt",
	424	.description = "Vector SQRT is fast (disable Newton-Raphson)",
	425	.dependencies = featureSet(&[_]Feature{}),
	426	};
	427	result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
	428	.llvm_name = "fast-vector-shift-masks",
	429	.description = "Prefer a left/right vector logical shift pair over a shift+and pair",
	430	.dependencies = featureSet(&[_]Feature{}),
	431	};
	432	result[@enumToInt(Feature.fma)] = .{
	433	.llvm_name = "fma",
	434	.description = "Enable three-operand fused multiple-add",
	435	.dependencies = featureSet(&[_]Feature{
	436	.avx,
	437	}),
	438	};
	439	result[@enumToInt(Feature.fma4)] = .{
	440	.llvm_name = "fma4",
	441	.description = "Enable four-operand fused multiple-add",
	442	.dependencies = featureSet(&[_]Feature{
	443	.avx,
	444	.sse4a,
	445	}),
	446	};
	447	result[@enumToInt(Feature.fsgsbase)] = .{
	448	.llvm_name = "fsgsbase",
	449	.description = "Support FS/GS Base instructions",
	450	.dependencies = featureSet(&[_]Feature{}),
	451	};
	452	result[@enumToInt(Feature.fxsr)] = .{
	453	.llvm_name = "fxsr",
	454	.description = "Support fxsave/fxrestore instructions",
	455	.dependencies = featureSet(&[_]Feature{}),
	456	};
	457	result[@enumToInt(Feature.gfni)] = .{
	458	.llvm_name = "gfni",
	459	.description = "Enable Galois Field Arithmetic Instructions",
	460	.dependencies = featureSet(&[_]Feature{
	461	.sse2,
	462	}),
	463	};
	464	result[@enumToInt(Feature.idivl_to_divb)] = .{
	465	.llvm_name = "idivl-to-divb",
	466	.description = "Use 8-bit divide for positive values less than 256",
	467	.dependencies = featureSet(&[_]Feature{}),
	468	};
	469	result[@enumToInt(Feature.idivq_to_divl)] = .{
	470	.llvm_name = "idivq-to-divl",
	471	.description = "Use 32-bit divide for positive values less than 2^32",
	472	.dependencies = featureSet(&[_]Feature{}),
	473	};
	474	result[@enumToInt(Feature.invpcid)] = .{
	475	.llvm_name = "invpcid",
	476	.description = "Invalidate Process-Context Identifier",
	477	.dependencies = featureSet(&[_]Feature{}),
	478	};
	479	result[@enumToInt(Feature.lea_sp)] = .{
	480	.llvm_name = "lea-sp",
	481	.description = "Use LEA for adjusting the stack pointer",
	482	.dependencies = featureSet(&[_]Feature{}),
	483	};
	484	result[@enumToInt(Feature.lea_uses_ag)] = .{
	485	.llvm_name = "lea-uses-ag",
	486	.description = "LEA instruction needs inputs at AG stage",
	487	.dependencies = featureSet(&[_]Feature{}),
	488	};
	489	result[@enumToInt(Feature.lwp)] = .{
	490	.llvm_name = "lwp",
	491	.description = "Enable LWP instructions",
	492	.dependencies = featureSet(&[_]Feature{}),
	493	};
	494	result[@enumToInt(Feature.lzcnt)] = .{
	495	.llvm_name = "lzcnt",
	496	.description = "Support LZCNT instruction",
	497	.dependencies = featureSet(&[_]Feature{}),
	498	};
	499	result[@enumToInt(Feature.macrofusion)] = .{
	500	.llvm_name = "macrofusion",
	501	.description = "Various instructions can be fused with conditional branches",
	502	.dependencies = featureSet(&[_]Feature{}),
	503	};
	504	result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
	505	.llvm_name = "merge-to-threeway-branch",
	506	.description = "Merge branches to a three-way conditional branch",
	507	.dependencies = featureSet(&[_]Feature{}),
	508	};
	509	result[@enumToInt(Feature.mmx)] = .{
	510	.llvm_name = "mmx",
	511	.description = "Enable MMX instructions",
	512	.dependencies = featureSet(&[_]Feature{}),
	513	};
	514	result[@enumToInt(Feature.movbe)] = .{
	515	.llvm_name = "movbe",
	516	.description = "Support MOVBE instruction",
	517	.dependencies = featureSet(&[_]Feature{}),
	518	};
	519	result[@enumToInt(Feature.movdir64b)] = .{
	520	.llvm_name = "movdir64b",
	521	.description = "Support movdir64b instruction",
	522	.dependencies = featureSet(&[_]Feature{}),
	523	};
	524	result[@enumToInt(Feature.movdiri)] = .{
	525	.llvm_name = "movdiri",
	526	.description = "Support movdiri instruction",
	527	.dependencies = featureSet(&[_]Feature{}),
	528	};
	529	result[@enumToInt(Feature.mpx)] = .{
	530	.llvm_name = "mpx",
	531	.description = "Support MPX instructions",
	532	.dependencies = featureSet(&[_]Feature{}),
	533	};
	534	result[@enumToInt(Feature.mwaitx)] = .{
	535	.llvm_name = "mwaitx",
	536	.description = "Enable MONITORX/MWAITX timer functionality",
	537	.dependencies = featureSet(&[_]Feature{}),
	538	};
	539	result[@enumToInt(Feature.nopl)] = .{
	540	.llvm_name = "nopl",
	541	.description = "Enable NOPL instruction",
	542	.dependencies = featureSet(&[_]Feature{}),
	543	};
	544	result[@enumToInt(Feature.pad_short_functions)] = .{
	545	.llvm_name = "pad-short-functions",
	546	.description = "Pad short functions",
	547	.dependencies = featureSet(&[_]Feature{}),
	548	};
	549	result[@enumToInt(Feature.pclmul)] = .{
	550	.llvm_name = "pclmul",
	551	.description = "Enable packed carry-less multiplication instructions",
	552	.dependencies = featureSet(&[_]Feature{
	553	.sse2,
	554	}),
	555	};
	556	result[@enumToInt(Feature.pconfig)] = .{
	557	.llvm_name = "pconfig",
	558	.description = "platform configuration instruction",
	559	.dependencies = featureSet(&[_]Feature{}),
	560	};
	561	result[@enumToInt(Feature.pku)] = .{
	562	.llvm_name = "pku",
	563	.description = "Enable protection keys",
	564	.dependencies = featureSet(&[_]Feature{}),
	565	};
	566	result[@enumToInt(Feature.popcnt)] = .{
	567	.llvm_name = "popcnt",
	568	.description = "Support POPCNT instruction",
	569	.dependencies = featureSet(&[_]Feature{}),
	570	};
	571	result[@enumToInt(Feature.prefer_256_bit)] = .{
	572	.llvm_name = "prefer-256-bit",
	573	.description = "Prefer 256-bit AVX instructions",
	574	.dependencies = featureSet(&[_]Feature{}),
	575	};
	576	result[@enumToInt(Feature.prefetchwt1)] = .{
	577	.llvm_name = "prefetchwt1",
	578	.description = "Prefetch with Intent to Write and T1 Hint",
	579	.dependencies = featureSet(&[_]Feature{}),
	580	};
	581	result[@enumToInt(Feature.prfchw)] = .{
	582	.llvm_name = "prfchw",
	583	.description = "Support PRFCHW instructions",
	584	.dependencies = featureSet(&[_]Feature{}),
	585	};
	586	result[@enumToInt(Feature.ptwrite)] = .{
	587	.llvm_name = "ptwrite",
	588	.description = "Support ptwrite instruction",
	589	.dependencies = featureSet(&[_]Feature{}),
	590	};
	591	result[@enumToInt(Feature.rdpid)] = .{
	592	.llvm_name = "rdpid",
	593	.description = "Support RDPID instructions",
	594	.dependencies = featureSet(&[_]Feature{}),
	595	};
	596	result[@enumToInt(Feature.rdrnd)] = .{
	597	.llvm_name = "rdrnd",
	598	.description = "Support RDRAND instruction",
	599	.dependencies = featureSet(&[_]Feature{}),
	600	};
	601	result[@enumToInt(Feature.rdseed)] = .{
	602	.llvm_name = "rdseed",
	603	.description = "Support RDSEED instruction",
	604	.dependencies = featureSet(&[_]Feature{}),
	605	};
	606	result[@enumToInt(Feature.retpoline)] = .{
	607	.llvm_name = "retpoline",
	608	.description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
	609	.dependencies = featureSet(&[_]Feature{
	610	.retpoline_indirect_branches,
	611	.retpoline_indirect_calls,
	612	}),
	613	};
	614	result[@enumToInt(Feature.retpoline_external_thunk)] = .{
	615	.llvm_name = "retpoline-external-thunk",
	616	.description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
	617	.dependencies = featureSet(&[_]Feature{
	618	.retpoline_indirect_calls,
	619	}),
	620	};
	621	result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
	622	.llvm_name = "retpoline-indirect-branches",
	623	.description = "Remove speculation of indirect branches from the generated code",
	624	.dependencies = featureSet(&[_]Feature{}),
	625	};
	626	result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
	627	.llvm_name = "retpoline-indirect-calls",
	628	.description = "Remove speculation of indirect calls from the generated code",
	629	.dependencies = featureSet(&[_]Feature{}),
	630	};
	631	result[@enumToInt(Feature.rtm)] = .{
	632	.llvm_name = "rtm",
	633	.description = "Support RTM instructions",
	634	.dependencies = featureSet(&[_]Feature{}),
	635	};
	636	result[@enumToInt(Feature.sahf)] = .{
	637	.llvm_name = "sahf",
	638	.description = "Support LAHF and SAHF instructions",
	639	.dependencies = featureSet(&[_]Feature{}),
	640	};
	641	result[@enumToInt(Feature.sgx)] = .{
	642	.llvm_name = "sgx",
	643	.description = "Enable Software Guard Extensions",
	644	.dependencies = featureSet(&[_]Feature{}),
	645	};
	646	result[@enumToInt(Feature.sha)] = .{
	647	.llvm_name = "sha",
	648	.description = "Enable SHA instructions",
	649	.dependencies = featureSet(&[_]Feature{
	650	.sse2,
	651	}),
	652	};
	653	result[@enumToInt(Feature.shstk)] = .{
	654	.llvm_name = "shstk",
	655	.description = "Support CET Shadow-Stack instructions",
	656	.dependencies = featureSet(&[_]Feature{}),
	657	};
	658	result[@enumToInt(Feature.slow_3ops_lea)] = .{
	659	.llvm_name = "slow-3ops-lea",
	660	.description = "LEA instruction with 3 ops or certain registers is slow",
	661	.dependencies = featureSet(&[_]Feature{}),
	662	};
	663	result[@enumToInt(Feature.slow_incdec)] = .{
	664	.llvm_name = "slow-incdec",
	665	.description = "INC and DEC instructions are slower than ADD and SUB",
	666	.dependencies = featureSet(&[_]Feature{}),
	667	};
	668	result[@enumToInt(Feature.slow_lea)] = .{
	669	.llvm_name = "slow-lea",
	670	.description = "LEA instruction with certain arguments is slow",
	671	.dependencies = featureSet(&[_]Feature{}),
	672	};
	673	result[@enumToInt(Feature.slow_pmaddwd)] = .{
	674	.llvm_name = "slow-pmaddwd",
	675	.description = "PMADDWD is slower than PMULLD",
	676	.dependencies = featureSet(&[_]Feature{}),
	677	};
	678	result[@enumToInt(Feature.slow_pmulld)] = .{
	679	.llvm_name = "slow-pmulld",
	680	.description = "PMULLD instruction is slow",
	681	.dependencies = featureSet(&[_]Feature{}),
	682	};
	683	result[@enumToInt(Feature.slow_shld)] = .{
	684	.llvm_name = "slow-shld",
	685	.description = "SHLD instruction is slow",
	686	.dependencies = featureSet(&[_]Feature{}),
	687	};
	688	result[@enumToInt(Feature.slow_two_mem_ops)] = .{
	689	.llvm_name = "slow-two-mem-ops",
	690	.description = "Two memory operand instructions are slow",
	691	.dependencies = featureSet(&[_]Feature{}),
	692	};
	693	result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
	694	.llvm_name = "slow-unaligned-mem-16",
	695	.description = "Slow unaligned 16-byte memory access",
	696	.dependencies = featureSet(&[_]Feature{}),
	697	};
	698	result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
	699	.llvm_name = "slow-unaligned-mem-32",
	700	.description = "Slow unaligned 32-byte memory access",
	701	.dependencies = featureSet(&[_]Feature{}),
	702	};
	703	result[@enumToInt(Feature.soft_float)] = .{
	704	.llvm_name = "soft-float",
	705	.description = "Use software floating point features",
	706	.dependencies = featureSet(&[_]Feature{}),
	707	};
	708	result[@enumToInt(Feature.sse)] = .{
	709	.llvm_name = "sse",
	710	.description = "Enable SSE instructions",
	711	.dependencies = featureSet(&[_]Feature{}),
	712	};
	713	result[@enumToInt(Feature.sse_unaligned_mem)] = .{
	714	.llvm_name = "sse-unaligned-mem",
	715	.description = "Allow unaligned memory operands with SSE instructions",
	716	.dependencies = featureSet(&[_]Feature{}),
	717	};
	718	result[@enumToInt(Feature.sse2)] = .{
	719	.llvm_name = "sse2",
	720	.description = "Enable SSE2 instructions",
	721	.dependencies = featureSet(&[_]Feature{
	722	.sse,
	723	}),
	724	};
	725	result[@enumToInt(Feature.sse3)] = .{
	726	.llvm_name = "sse3",
	727	.description = "Enable SSE3 instructions",
	728	.dependencies = featureSet(&[_]Feature{
	729	.sse2,
	730	}),
	731	};
	732	result[@enumToInt(Feature.sse4_1)] = .{
	733	.llvm_name = "sse4.1",
	734	.description = "Enable SSE 4.1 instructions",
	735	.dependencies = featureSet(&[_]Feature{
	736	.ssse3,
	737	}),
	738	};
	739	result[@enumToInt(Feature.sse4_2)] = .{
	740	.llvm_name = "sse4.2",
	741	.description = "Enable SSE 4.2 instructions",
	742	.dependencies = featureSet(&[_]Feature{
	743	.sse4_1,
	744	}),
	745	};
	746	result[@enumToInt(Feature.sse4a)] = .{
	747	.llvm_name = "sse4a",
	748	.description = "Support SSE 4a instructions",
	749	.dependencies = featureSet(&[_]Feature{
	750	.sse3,
	751	}),
	752	};
	753	result[@enumToInt(Feature.ssse3)] = .{
	754	.llvm_name = "ssse3",
	755	.description = "Enable SSSE3 instructions",
	756	.dependencies = featureSet(&[_]Feature{
	757	.sse3,
	758	}),
	759	};
	760	result[@enumToInt(Feature.tbm)] = .{
	761	.llvm_name = "tbm",
	762	.description = "Enable TBM instructions",
	763	.dependencies = featureSet(&[_]Feature{}),
	764	};
	765	result[@enumToInt(Feature.vaes)] = .{
	766	.llvm_name = "vaes",
	767	.description = "Promote selected AES instructions to AVX512/AVX registers",
	768	.dependencies = featureSet(&[_]Feature{
	769	.aes,
	770	.avx,
	771	}),
	772	};
	773	result[@enumToInt(Feature.vpclmulqdq)] = .{
	774	.llvm_name = "vpclmulqdq",
	775	.description = "Enable vpclmulqdq instructions",
	776	.dependencies = featureSet(&[_]Feature{
	777	.avx,
	778	.pclmul,
	779	}),
	780	};
	781	result[@enumToInt(Feature.waitpkg)] = .{
	782	.llvm_name = "waitpkg",
	783	.description = "Wait and pause enhancements",
	784	.dependencies = featureSet(&[_]Feature{}),
	785	};
	786	result[@enumToInt(Feature.wbnoinvd)] = .{
	787	.llvm_name = "wbnoinvd",
	788	.description = "Write Back No Invalidate",
	789	.dependencies = featureSet(&[_]Feature{}),
	790	};
	791	result[@enumToInt(Feature.x87)] = .{
	792	.llvm_name = "x87",
	793	.description = "Enable X87 float instructions",
	794	.dependencies = featureSet(&[_]Feature{}),
	795	};
	796	result[@enumToInt(Feature.xop)] = .{
	797	.llvm_name = "xop",
	798	.description = "Enable XOP instructions",
	799	.dependencies = featureSet(&[_]Feature{
	800	.fma4,
	801	}),
	802	};
	803	result[@enumToInt(Feature.xsave)] = .{
	804	.llvm_name = "xsave",
	805	.description = "Support xsave instructions",
	806	.dependencies = featureSet(&[_]Feature{}),
	807	};
	808	result[@enumToInt(Feature.xsavec)] = .{
	809	.llvm_name = "xsavec",
	810	.description = "Support xsavec instructions",
	811	.dependencies = featureSet(&[_]Feature{}),
	812	};
	813	result[@enumToInt(Feature.xsaveopt)] = .{
	814	.llvm_name = "xsaveopt",
	815	.description = "Support xsaveopt instructions",
	816	.dependencies = featureSet(&[_]Feature{}),
	817	};
	818	result[@enumToInt(Feature.xsaves)] = .{
	819	.llvm_name = "xsaves",
	820	.description = "Support xsaves instructions",
	821	.dependencies = featureSet(&[_]Feature{}),
	822	};
	823	const ti = @typeInfo(Feature);
	824	for (result) \|*elem, i\| {
	825	elem.index = i;
	826	elem.name = ti.Enum.fields[i].name;
	827	}
	828	break :blk result;
	829	};
	830
	831	pub const cpu = struct {
	832	pub const amdfam10 = Cpu{
	833	.name = "amdfam10",
	834	.llvm_name = "amdfam10",
	835	.features = featureSet(&[_]Feature{
	836	.@"3dnowa",
	837	.@"64bit",
	838	.cmov,
	839	.cx16,
	840	.cx8,
	841	.fast_scalar_shift_masks,
	842	.fxsr,
	843	.lzcnt,
	844	.nopl,
	845	.popcnt,
	846	.sahf,
	847	.slow_shld,
	848	.sse4a,
	849	.x87,
	850	}),
	851	};
	852	pub const athlon = Cpu{
	853	.name = "athlon",
	854	.llvm_name = "athlon",
	855	.features = featureSet(&[_]Feature{
	856	.@"3dnowa",
	857	.cmov,
	858	.cx8,
	859	.nopl,
	860	.slow_shld,
	861	.slow_unaligned_mem_16,
	862	.x87,
	863	}),
	864	};
	865	pub const athlon_4 = Cpu{
	866	.name = "athlon_4",
	867	.llvm_name = "athlon-4",
	868	.features = featureSet(&[_]Feature{
	869	.@"3dnowa",
	870	.cmov,
	871	.cx8,
	872	.fxsr,
	873	.nopl,
	874	.slow_shld,
	875	.slow_unaligned_mem_16,
	876	.sse,
	877	.x87,
	878	}),
	879	};
	880	pub const athlon_fx = Cpu{
	881	.name = "athlon_fx",
	882	.llvm_name = "athlon-fx",
	883	.features = featureSet(&[_]Feature{
	884	.@"3dnowa",
	885	.@"64bit",
	886	.cmov,
	887	.cx8,
	888	.fast_scalar_shift_masks,
	889	.fxsr,
	890	.nopl,
	891	.slow_shld,
	892	.slow_unaligned_mem_16,
	893	.sse2,
	894	.x87,
	895	}),
	896	};
	897	pub const athlon_mp = Cpu{
	898	.name = "athlon_mp",
	899	.llvm_name = "athlon-mp",
	900	.features = featureSet(&[_]Feature{
	901	.@"3dnowa",
	902	.cmov,
	903	.cx8,
	904	.fxsr,
	905	.nopl,
	906	.slow_shld,
	907	.slow_unaligned_mem_16,
	908	.sse,
	909	.x87,
	910	}),
	911	};
	912	pub const athlon_tbird = Cpu{
	913	.name = "athlon_tbird",
	914	.llvm_name = "athlon-tbird",
	915	.features = featureSet(&[_]Feature{
	916	.@"3dnowa",
	917	.cmov,
	918	.cx8,
	919	.nopl,
	920	.slow_shld,
	921	.slow_unaligned_mem_16,
	922	.x87,
	923	}),
	924	};
	925	pub const athlon_xp = Cpu{
	926	.name = "athlon_xp",
	927	.llvm_name = "athlon-xp",
	928	.features = featureSet(&[_]Feature{
	929	.@"3dnowa",
	930	.cmov,
	931	.cx8,
	932	.fxsr,
	933	.nopl,
	934	.slow_shld,
	935	.slow_unaligned_mem_16,
	936	.sse,
	937	.x87,
	938	}),
	939	};
	940	pub const athlon64 = Cpu{
	941	.name = "athlon64",
	942	.llvm_name = "athlon64",
	943	.features = featureSet(&[_]Feature{
	944	.@"3dnowa",
	945	.@"64bit",
	946	.cmov,
	947	.cx8,
	948	.fast_scalar_shift_masks,
	949	.fxsr,
	950	.nopl,
	951	.slow_shld,
	952	.slow_unaligned_mem_16,
	953	.sse2,
	954	.x87,
	955	}),
	956	};
	957	pub const athlon64_sse3 = Cpu{
	958	.name = "athlon64_sse3",
	959	.llvm_name = "athlon64-sse3",
	960	.features = featureSet(&[_]Feature{
	961	.@"3dnowa",
	962	.@"64bit",
	963	.cmov,
	964	.cx16,
	965	.cx8,
	966	.fast_scalar_shift_masks,
	967	.fxsr,
	968	.nopl,
	969	.slow_shld,
	970	.slow_unaligned_mem_16,
	971	.sse3,
	972	.x87,
	973	}),
	974	};
	975	pub const atom = Cpu{
	976	.name = "atom",
	977	.llvm_name = "atom",
	978	.features = featureSet(&[_]Feature{
	979	.@"64bit",
	980	.cmov,
	981	.cx16,
	982	.cx8,
	983	.fxsr,
	984	.idivl_to_divb,
	985	.idivq_to_divl,
	986	.lea_sp,
	987	.lea_uses_ag,
	988	.mmx,
	989	.movbe,
	990	.nopl,
	991	.pad_short_functions,
	992	.sahf,
	993	.slow_two_mem_ops,
	994	.slow_unaligned_mem_16,
	995	.ssse3,
	996	.x87,
	997	}),
	998	};
	999	pub const barcelona = Cpu{
	1000	.name = "barcelona",
	1001	.llvm_name = "barcelona",
	1002	.features = featureSet(&[_]Feature{
	1003	.@"3dnowa",
	1004	.@"64bit",
	1005	.cmov,
	1006	.cx16,
	1007	.cx8,
	1008	.fast_scalar_shift_masks,
	1009	.fxsr,
	1010	.lzcnt,
	1011	.nopl,
	1012	.popcnt,
	1013	.sahf,
	1014	.slow_shld,
	1015	.sse4a,
	1016	.x87,
	1017	}),
	1018	};
	1019	pub const bdver1 = Cpu{
	1020	.name = "bdver1",
	1021	.llvm_name = "bdver1",
	1022	.features = featureSet(&[_]Feature{
	1023	.@"64bit",
	1024	.aes,
	1025	.branchfusion,
	1026	.cmov,
	1027	.cx16,
	1028	.cx8,
	1029	.fast_11bytenop,
	1030	.fast_scalar_shift_masks,
	1031	.fxsr,
	1032	.lwp,
	1033	.lzcnt,
	1034	.mmx,
	1035	.nopl,
	1036	.pclmul,
	1037	.popcnt,
	1038	.prfchw,
	1039	.sahf,
	1040	.slow_shld,
	1041	.x87,
	1042	.xop,
	1043	.xsave,
	1044	}),
	1045	};
	1046	pub const bdver2 = Cpu{
	1047	.name = "bdver2",
	1048	.llvm_name = "bdver2",
	1049	.features = featureSet(&[_]Feature{
	1050	.@"64bit",
	1051	.aes,
	1052	.bmi,
	1053	.branchfusion,
	1054	.cmov,
	1055	.cx16,
	1056	.cx8,
	1057	.f16c,
	1058	.fast_11bytenop,
	1059	.fast_bextr,
	1060	.fast_scalar_shift_masks,
	1061	.fma,
	1062	.fxsr,
	1063	.lwp,
	1064	.lzcnt,
	1065	.mmx,
	1066	.nopl,
	1067	.pclmul,
	1068	.popcnt,
	1069	.prfchw,
	1070	.sahf,
	1071	.slow_shld,
	1072	.tbm,
	1073	.x87,
	1074	.xop,
	1075	.xsave,
	1076	}),
	1077	};
	1078	pub const bdver3 = Cpu{
	1079	.name = "bdver3",
	1080	.llvm_name = "bdver3",
	1081	.features = featureSet(&[_]Feature{
	1082	.@"64bit",
	1083	.aes,
	1084	.bmi,
	1085	.branchfusion,
	1086	.cmov,
	1087	.cx16,
	1088	.cx8,
	1089	.f16c,
	1090	.fast_11bytenop,
	1091	.fast_bextr,
	1092	.fast_scalar_shift_masks,
	1093	.fma,
	1094	.fsgsbase,
	1095	.fxsr,
	1096	.lwp,
	1097	.lzcnt,
	1098	.mmx,
	1099	.nopl,
	1100	.pclmul,
	1101	.popcnt,
	1102	.prfchw,
	1103	.sahf,
	1104	.slow_shld,
	1105	.tbm,
	1106	.x87,
	1107	.xop,
	1108	.xsave,
	1109	.xsaveopt,
	1110	}),
	1111	};
	1112	pub const bdver4 = Cpu{
	1113	.name = "bdver4",
	1114	.llvm_name = "bdver4",
	1115	.features = featureSet(&[_]Feature{
	1116	.@"64bit",
	1117	.aes,
	1118	.avx2,
	1119	.bmi,
	1120	.bmi2,
	1121	.branchfusion,
	1122	.cmov,
	1123	.cx16,
	1124	.cx8,
	1125	.f16c,
	1126	.fast_11bytenop,
	1127	.fast_bextr,
	1128	.fast_scalar_shift_masks,
	1129	.fma,
	1130	.fsgsbase,
	1131	.fxsr,
	1132	.lwp,
	1133	.lzcnt,
	1134	.mmx,
	1135	.mwaitx,
	1136	.nopl,
	1137	.pclmul,
	1138	.popcnt,
	1139	.prfchw,
	1140	.sahf,
	1141	.slow_shld,
	1142	.tbm,
	1143	.x87,
	1144	.xop,
	1145	.xsave,
	1146	.xsaveopt,
	1147	}),
	1148	};
	1149	pub const bonnell = Cpu{
	1150	.name = "bonnell",
	1151	.llvm_name = "bonnell",
	1152	.features = featureSet(&[_]Feature{
	1153	.@"64bit",
	1154	.cmov,
	1155	.cx16,
	1156	.cx8,
	1157	.fxsr,
	1158	.idivl_to_divb,
	1159	.idivq_to_divl,
	1160	.lea_sp,
	1161	.lea_uses_ag,
	1162	.mmx,
	1163	.movbe,
	1164	.nopl,
	1165	.pad_short_functions,
	1166	.sahf,
	1167	.slow_two_mem_ops,
	1168	.slow_unaligned_mem_16,
	1169	.ssse3,
	1170	.x87,
	1171	}),
	1172	};
	1173	pub const broadwell = Cpu{
	1174	.name = "broadwell",
	1175	.llvm_name = "broadwell",
	1176	.features = featureSet(&[_]Feature{
	1177	.@"64bit",
	1178	.adx,
	1179	.avx,
	1180	.avx2,
	1181	.bmi,
	1182	.bmi2,
	1183	.cmov,
	1184	.cx16,
	1185	.cx8,
	1186	.ermsb,
	1187	.f16c,
	1188	.false_deps_lzcnt_tzcnt,
	1189	.false_deps_popcnt,
	1190	.fast_scalar_fsqrt,
	1191	.fast_shld_rotate,
	1192	.fast_variable_shuffle,
	1193	.fma,
	1194	.fsgsbase,
	1195	.fxsr,
	1196	.idivq_to_divl,
	1197	.invpcid,
	1198	.lzcnt,
	1199	.macrofusion,
	1200	.merge_to_threeway_branch,
	1201	.mmx,
	1202	.movbe,
	1203	.nopl,
	1204	.pclmul,
	1205	.popcnt,
	1206	.prfchw,
	1207	.rdrnd,
	1208	.rdseed,
	1209	.sahf,
	1210	.slow_3ops_lea,
	1211	.sse4_2,
	1212	.x87,
	1213	.xsave,
	1214	.xsaveopt,
	1215	}),
	1216	};
	1217	pub const btver1 = Cpu{
	1218	.name = "btver1",
	1219	.llvm_name = "btver1",
	1220	.features = featureSet(&[_]Feature{
	1221	.@"64bit",
	1222	.cmov,
	1223	.cx16,
	1224	.cx8,
	1225	.fast_15bytenop,
	1226	.fast_scalar_shift_masks,
	1227	.fast_vector_shift_masks,
	1228	.fxsr,
	1229	.lzcnt,
	1230	.mmx,
	1231	.nopl,
	1232	.popcnt,
	1233	.prfchw,
	1234	.sahf,
	1235	.slow_shld,
	1236	.sse4a,
	1237	.ssse3,
	1238	.x87,
	1239	}),
	1240	};
	1241	pub const btver2 = Cpu{
	1242	.name = "btver2",
	1243	.llvm_name = "btver2",
	1244	.features = featureSet(&[_]Feature{
	1245	.@"64bit",
	1246	.aes,
	1247	.avx,
	1248	.bmi,
	1249	.cmov,
	1250	.cx16,
	1251	.cx8,
	1252	.f16c,
	1253	.fast_15bytenop,
	1254	.fast_bextr,
	1255	.fast_hops,
	1256	.fast_lzcnt,
	1257	.fast_partial_ymm_or_zmm_write,
	1258	.fast_scalar_shift_masks,
	1259	.fast_vector_shift_masks,
	1260	.fxsr,
	1261	.lzcnt,
	1262	.mmx,
	1263	.movbe,
	1264	.nopl,
	1265	.pclmul,
	1266	.popcnt,
	1267	.prfchw,
	1268	.sahf,
	1269	.slow_shld,
	1270	.sse4a,
	1271	.ssse3,
	1272	.x87,
	1273	.xsave,
	1274	.xsaveopt,
	1275	}),
	1276	};
	1277	pub const c3 = Cpu{
	1278	.name = "c3",
	1279	.llvm_name = "c3",
	1280	.features = featureSet(&[_]Feature{
	1281	.@"3dnow",
	1282	.slow_unaligned_mem_16,
	1283	.x87,
	1284	}),
	1285	};
	1286	pub const c3_2 = Cpu{
	1287	.name = "c3_2",
	1288	.llvm_name = "c3-2",
	1289	.features = featureSet(&[_]Feature{
	1290	.cmov,
	1291	.cx8,
	1292	.fxsr,
	1293	.mmx,
	1294	.slow_unaligned_mem_16,
	1295	.sse,
	1296	.x87,
	1297	}),
	1298	};
	1299	pub const cannonlake = Cpu{
	1300	.name = "cannonlake",
	1301	.llvm_name = "cannonlake",
	1302	.features = featureSet(&[_]Feature{
	1303	.@"64bit",
	1304	.adx,
	1305	.aes,
	1306	.avx,
	1307	.avx2,
	1308	.avx512bw,
	1309	.avx512cd,
	1310	.avx512dq,
	1311	.avx512f,
	1312	.avx512ifma,
	1313	.avx512vbmi,
	1314	.avx512vl,
	1315	.bmi,
	1316	.bmi2,
	1317	.clflushopt,
	1318	.cmov,
	1319	.cx16,
	1320	.cx8,
	1321	.ermsb,
	1322	.f16c,
	1323	.fast_gather,
	1324	.fast_scalar_fsqrt,
	1325	.fast_shld_rotate,
	1326	.fast_variable_shuffle,
	1327	.fast_vector_fsqrt,
	1328	.fma,
	1329	.fsgsbase,
	1330	.fxsr,
	1331	.idivq_to_divl,
	1332	.invpcid,
	1333	.lzcnt,
	1334	.macrofusion,
	1335	.merge_to_threeway_branch,
	1336	.mmx,
	1337	.movbe,
	1338	.mpx,
	1339	.nopl,
	1340	.pclmul,
	1341	.pku,
	1342	.popcnt,
	1343	.prfchw,
	1344	.rdrnd,
	1345	.rdseed,
	1346	.sahf,
	1347	.sgx,
	1348	.sha,
	1349	.slow_3ops_lea,
	1350	.sse4_2,
	1351	.x87,
	1352	.xsave,
	1353	.xsavec,
	1354	.xsaveopt,
	1355	.xsaves,
	1356	}),
	1357	};
	1358	pub const cascadelake = Cpu{
	1359	.name = "cascadelake",
	1360	.llvm_name = "cascadelake",
	1361	.features = featureSet(&[_]Feature{
	1362	.@"64bit",
	1363	.adx,
	1364	.aes,
	1365	.avx,
	1366	.avx2,
	1367	.avx512bw,
	1368	.avx512cd,
	1369	.avx512dq,
	1370	.avx512f,
	1371	.avx512vl,
	1372	.avx512vnni,
	1373	.bmi,
	1374	.bmi2,
	1375	.clflushopt,
	1376	.clwb,
	1377	.cmov,
	1378	.cx16,
	1379	.cx8,
	1380	.ermsb,
	1381	.f16c,
	1382	.false_deps_popcnt,
	1383	.fast_gather,
	1384	.fast_scalar_fsqrt,
	1385	.fast_shld_rotate,
	1386	.fast_variable_shuffle,
	1387	.fast_vector_fsqrt,
	1388	.fma,
	1389	.fsgsbase,
	1390	.fxsr,
	1391	.idivq_to_divl,
	1392	.invpcid,
	1393	.lzcnt,
	1394	.macrofusion,
	1395	.merge_to_threeway_branch,
	1396	.mmx,
	1397	.movbe,
	1398	.mpx,
	1399	.nopl,
	1400	.pclmul,
	1401	.pku,
	1402	.popcnt,
	1403	.prfchw,
	1404	.rdrnd,
	1405	.rdseed,
	1406	.sahf,
	1407	.slow_3ops_lea,
	1408	.sse4_2,
	1409	.x87,
	1410	.xsave,
	1411	.xsavec,
	1412	.xsaveopt,
	1413	.xsaves,
	1414	}),
	1415	};
	1416	pub const cooperlake = Cpu{
	1417	.name = "cooperlake",
	1418	.llvm_name = "cooperlake",
	1419	.features = featureSet(&[_]Feature{
	1420	.@"64bit",
	1421	.adx,
	1422	.aes,
	1423	.avx,
	1424	.avx2,
	1425	.avx512bf16,
	1426	.avx512bw,
	1427	.avx512cd,
	1428	.avx512dq,
	1429	.avx512f,
	1430	.avx512vl,
	1431	.avx512vnni,
	1432	.bmi,
	1433	.bmi2,
	1434	.clflushopt,
	1435	.clwb,
	1436	.cmov,
	1437	.cx16,
	1438	.cx8,
	1439	.ermsb,
	1440	.f16c,
	1441	.false_deps_popcnt,
	1442	.fast_gather,
	1443	.fast_scalar_fsqrt,
	1444	.fast_shld_rotate,
	1445	.fast_variable_shuffle,
	1446	.fast_vector_fsqrt,
	1447	.fma,
	1448	.fsgsbase,
	1449	.fxsr,
	1450	.idivq_to_divl,
	1451	.invpcid,
	1452	.lzcnt,
	1453	.macrofusion,
	1454	.merge_to_threeway_branch,
	1455	.mmx,
	1456	.movbe,
	1457	.mpx,
	1458	.nopl,
	1459	.pclmul,
	1460	.pku,
	1461	.popcnt,
	1462	.prfchw,
	1463	.rdrnd,
	1464	.rdseed,
	1465	.sahf,
	1466	.slow_3ops_lea,
	1467	.sse4_2,
	1468	.x87,
	1469	.xsave,
	1470	.xsavec,
	1471	.xsaveopt,
	1472	.xsaves,
	1473	}),
	1474	};
	1475	pub const core_avx_i = Cpu{
	1476	.name = "core_avx_i",
	1477	.llvm_name = "core-avx-i",
	1478	.features = featureSet(&[_]Feature{
	1479	.@"64bit",
	1480	.avx,
	1481	.cmov,
	1482	.cx16,
	1483	.cx8,
	1484	.f16c,
	1485	.false_deps_popcnt,
	1486	.fast_scalar_fsqrt,
	1487	.fast_shld_rotate,
	1488	.fsgsbase,
	1489	.fxsr,
	1490	.idivq_to_divl,
	1491	.macrofusion,
	1492	.merge_to_threeway_branch,
	1493	.mmx,
	1494	.nopl,
	1495	.pclmul,
	1496	.popcnt,
	1497	.rdrnd,
	1498	.sahf,
	1499	.slow_3ops_lea,
	1500	.slow_unaligned_mem_32,
	1501	.sse4_2,
	1502	.x87,
	1503	.xsave,
	1504	.xsaveopt,
	1505	}),
	1506	};
	1507	pub const core_avx2 = Cpu{
	1508	.name = "core_avx2",
	1509	.llvm_name = "core-avx2",
	1510	.features = featureSet(&[_]Feature{
	1511	.@"64bit",
	1512	.avx,
	1513	.avx2,
	1514	.bmi,
	1515	.bmi2,
	1516	.cmov,
	1517	.cx16,
	1518	.cx8,
	1519	.ermsb,
	1520	.f16c,
	1521	.false_deps_lzcnt_tzcnt,
	1522	.false_deps_popcnt,
	1523	.fast_scalar_fsqrt,
	1524	.fast_shld_rotate,
	1525	.fast_variable_shuffle,
	1526	.fma,
	1527	.fsgsbase,
	1528	.fxsr,
	1529	.idivq_to_divl,
	1530	.invpcid,
	1531	.lzcnt,
	1532	.macrofusion,
	1533	.merge_to_threeway_branch,
	1534	.mmx,
	1535	.movbe,
	1536	.nopl,
	1537	.pclmul,
	1538	.popcnt,
	1539	.rdrnd,
	1540	.sahf,
	1541	.slow_3ops_lea,
	1542	.sse4_2,
	1543	.x87,
	1544	.xsave,
	1545	.xsaveopt,
	1546	}),
	1547	};
	1548	pub const core2 = Cpu{
	1549	.name = "core2",
	1550	.llvm_name = "core2",
	1551	.features = featureSet(&[_]Feature{
	1552	.@"64bit",
	1553	.cmov,
	1554	.cx16,
	1555	.cx8,
	1556	.fxsr,
	1557	.macrofusion,
	1558	.mmx,
	1559	.nopl,
	1560	.sahf,
	1561	.slow_unaligned_mem_16,
	1562	.ssse3,
	1563	.x87,
	1564	}),
	1565	};
	1566	pub const corei7 = Cpu{
	1567	.name = "corei7",
	1568	.llvm_name = "corei7",
	1569	.features = featureSet(&[_]Feature{
	1570	.@"64bit",
	1571	.cmov,
	1572	.cx16,
	1573	.cx8,
	1574	.fxsr,
	1575	.macrofusion,
	1576	.mmx,
	1577	.nopl,
	1578	.popcnt,
	1579	.sahf,
	1580	.sse4_2,
	1581	.x87,
	1582	}),
	1583	};
	1584	pub const corei7_avx = Cpu{
	1585	.name = "corei7_avx",
	1586	.llvm_name = "corei7-avx",
	1587	.features = featureSet(&[_]Feature{
	1588	.@"64bit",
	1589	.avx,
	1590	.cmov,
	1591	.cx16,
	1592	.cx8,
	1593	.false_deps_popcnt,
	1594	.fast_scalar_fsqrt,
	1595	.fast_shld_rotate,
	1596	.fxsr,
	1597	.idivq_to_divl,
	1598	.macrofusion,
	1599	.merge_to_threeway_branch,
	1600	.mmx,
	1601	.nopl,
	1602	.pclmul,
	1603	.popcnt,
	1604	.sahf,
	1605	.slow_3ops_lea,
	1606	.slow_unaligned_mem_32,
	1607	.sse4_2,
	1608	.x87,
	1609	.xsave,
	1610	.xsaveopt,
	1611	}),
	1612	};
	1613	pub const generic = Cpu{
	1614	.name = "generic",
	1615	.llvm_name = "generic",
	1616	.features = featureSet(&[_]Feature{
	1617	.cx8,
	1618	.slow_unaligned_mem_16,
	1619	.x87,
	1620	}),
	1621	};
	1622	pub const geode = Cpu{
	1623	.name = "geode",
	1624	.llvm_name = "geode",
	1625	.features = featureSet(&[_]Feature{
	1626	.@"3dnowa",
	1627	.cx8,
	1628	.slow_unaligned_mem_16,
	1629	.x87,
	1630	}),
	1631	};
	1632	pub const goldmont = Cpu{
	1633	.name = "goldmont",
	1634	.llvm_name = "goldmont",
	1635	.features = featureSet(&[_]Feature{
	1636	.@"64bit",
	1637	.aes,
	1638	.clflushopt,
	1639	.cmov,
	1640	.cx16,
	1641	.cx8,
	1642	.false_deps_popcnt,
	1643	.fsgsbase,
	1644	.fxsr,
	1645	.mmx,
	1646	.movbe,
	1647	.mpx,
	1648	.nopl,
	1649	.pclmul,
	1650	.popcnt,
	1651	.prfchw,
	1652	.rdrnd,
	1653	.rdseed,
	1654	.sahf,
	1655	.sha,
	1656	.slow_incdec,
	1657	.slow_lea,
	1658	.slow_two_mem_ops,
	1659	.sse4_2,
	1660	.ssse3,
	1661	.x87,
	1662	.xsave,
	1663	.xsavec,
	1664	.xsaveopt,
	1665	.xsaves,
	1666	}),
	1667	};
	1668	pub const goldmont_plus = Cpu{
	1669	.name = "goldmont_plus",
	1670	.llvm_name = "goldmont-plus",
	1671	.features = featureSet(&[_]Feature{
	1672	.@"64bit",
	1673	.aes,
	1674	.clflushopt,
	1675	.cmov,
	1676	.cx16,
	1677	.cx8,
	1678	.fsgsbase,
	1679	.fxsr,
	1680	.mmx,
	1681	.movbe,
	1682	.mpx,
	1683	.nopl,
	1684	.pclmul,
	1685	.popcnt,
	1686	.prfchw,
	1687	.ptwrite,
	1688	.rdpid,
	1689	.rdrnd,
	1690	.rdseed,
	1691	.sahf,
	1692	.sgx,
	1693	.sha,
	1694	.slow_incdec,
	1695	.slow_lea,
	1696	.slow_two_mem_ops,
	1697	.sse4_2,
	1698	.ssse3,
	1699	.x87,
	1700	.xsave,
	1701	.xsavec,
	1702	.xsaveopt,
	1703	.xsaves,
	1704	}),
	1705	};
	1706	pub const haswell = Cpu{
	1707	.name = "haswell",
	1708	.llvm_name = "haswell",
	1709	.features = featureSet(&[_]Feature{
	1710	.@"64bit",
	1711	.avx,
	1712	.avx2,
	1713	.bmi,
	1714	.bmi2,
	1715	.cmov,
	1716	.cx16,
	1717	.cx8,
	1718	.ermsb,
	1719	.f16c,
	1720	.false_deps_lzcnt_tzcnt,
	1721	.false_deps_popcnt,
	1722	.fast_scalar_fsqrt,
	1723	.fast_shld_rotate,
	1724	.fast_variable_shuffle,
	1725	.fma,
	1726	.fsgsbase,
	1727	.fxsr,
	1728	.idivq_to_divl,
	1729	.invpcid,
	1730	.lzcnt,
	1731	.macrofusion,
	1732	.merge_to_threeway_branch,
	1733	.mmx,
	1734	.movbe,
	1735	.nopl,
	1736	.pclmul,
	1737	.popcnt,
	1738	.rdrnd,
	1739	.sahf,
	1740	.slow_3ops_lea,
	1741	.sse4_2,
	1742	.x87,
	1743	.xsave,
	1744	.xsaveopt,
	1745	}),
	1746	};
	1747	pub const _i386 = Cpu{
	1748	.name = "_i386",
	1749	.llvm_name = "i386",
	1750	.features = featureSet(&[_]Feature{
	1751	.slow_unaligned_mem_16,
	1752	.x87,
	1753	}),
	1754	};
	1755	pub const _i486 = Cpu{
	1756	.name = "_i486",
	1757	.llvm_name = "i486",
	1758	.features = featureSet(&[_]Feature{
	1759	.slow_unaligned_mem_16,
	1760	.x87,
	1761	}),
	1762	};
	1763	pub const _i586 = Cpu{
	1764	.name = "_i586",
	1765	.llvm_name = "i586",
	1766	.features = featureSet(&[_]Feature{
	1767	.cx8,
	1768	.slow_unaligned_mem_16,
	1769	.x87,
	1770	}),
	1771	};
	1772	pub const _i686 = Cpu{
	1773	.name = "_i686",
	1774	.llvm_name = "i686",
	1775	.features = featureSet(&[_]Feature{
	1776	.cmov,
	1777	.cx8,
	1778	.slow_unaligned_mem_16,
	1779	.x87,
	1780	}),
	1781	};
	1782	pub const icelake_client = Cpu{
	1783	.name = "icelake_client",
	1784	.llvm_name = "icelake-client",
	1785	.features = featureSet(&[_]Feature{
	1786	.@"64bit",
	1787	.adx,
	1788	.aes,
	1789	.avx,
	1790	.avx2,
	1791	.avx512bitalg,
	1792	.avx512bw,
	1793	.avx512cd,
	1794	.avx512dq,
	1795	.avx512f,
	1796	.avx512ifma,
	1797	.avx512vbmi,
	1798	.avx512vbmi2,
	1799	.avx512vl,
	1800	.avx512vnni,
	1801	.avx512vpopcntdq,
	1802	.bmi,
	1803	.bmi2,
	1804	.clflushopt,
	1805	.clwb,
	1806	.cmov,
	1807	.cx16,
	1808	.cx8,
	1809	.ermsb,
	1810	.f16c,
	1811	.fast_gather,
	1812	.fast_scalar_fsqrt,
	1813	.fast_shld_rotate,
	1814	.fast_variable_shuffle,
	1815	.fast_vector_fsqrt,
	1816	.fma,
	1817	.fsgsbase,
	1818	.fxsr,
	1819	.gfni,
	1820	.idivq_to_divl,
	1821	.invpcid,
	1822	.lzcnt,
	1823	.macrofusion,
	1824	.merge_to_threeway_branch,
	1825	.mmx,
	1826	.movbe,
	1827	.mpx,
	1828	.nopl,
	1829	.pclmul,
	1830	.pku,
	1831	.popcnt,
	1832	.prfchw,
	1833	.rdpid,
	1834	.rdrnd,
	1835	.rdseed,
	1836	.sahf,
	1837	.sgx,
	1838	.sha,
	1839	.slow_3ops_lea,
	1840	.sse4_2,
	1841	.vaes,
	1842	.vpclmulqdq,
	1843	.x87,
	1844	.xsave,
	1845	.xsavec,
	1846	.xsaveopt,
	1847	.xsaves,
	1848	}),
	1849	};
	1850	pub const icelake_server = Cpu{
	1851	.name = "icelake_server",
	1852	.llvm_name = "icelake-server",
	1853	.features = featureSet(&[_]Feature{
	1854	.@"64bit",
	1855	.adx,
	1856	.aes,
	1857	.avx,
	1858	.avx2,
	1859	.avx512bitalg,
	1860	.avx512bw,
	1861	.avx512cd,
	1862	.avx512dq,
	1863	.avx512f,
	1864	.avx512ifma,
	1865	.avx512vbmi,
	1866	.avx512vbmi2,
	1867	.avx512vl,
	1868	.avx512vnni,
	1869	.avx512vpopcntdq,
	1870	.bmi,
	1871	.bmi2,
	1872	.clflushopt,
	1873	.clwb,
	1874	.cmov,
	1875	.cx16,
	1876	.cx8,
	1877	.ermsb,
	1878	.f16c,
	1879	.fast_gather,
	1880	.fast_scalar_fsqrt,
	1881	.fast_shld_rotate,
	1882	.fast_variable_shuffle,
	1883	.fast_vector_fsqrt,
	1884	.fma,
	1885	.fsgsbase,
	1886	.fxsr,
	1887	.gfni,
	1888	.idivq_to_divl,
	1889	.invpcid,
	1890	.lzcnt,
	1891	.macrofusion,
	1892	.merge_to_threeway_branch,
	1893	.mmx,
	1894	.movbe,
	1895	.mpx,
	1896	.nopl,
	1897	.pclmul,
	1898	.pconfig,
	1899	.pku,
	1900	.popcnt,
	1901	.prfchw,
	1902	.rdpid,
	1903	.rdrnd,
	1904	.rdseed,
	1905	.sahf,
	1906	.sgx,
	1907	.sha,
	1908	.slow_3ops_lea,
	1909	.sse4_2,
	1910	.vaes,
	1911	.vpclmulqdq,
	1912	.wbnoinvd,
	1913	.x87,
	1914	.xsave,
	1915	.xsavec,
	1916	.xsaveopt,
	1917	.xsaves,
	1918	}),
	1919	};
	1920	pub const ivybridge = Cpu{
	1921	.name = "ivybridge",
	1922	.llvm_name = "ivybridge",
	1923	.features = featureSet(&[_]Feature{
	1924	.@"64bit",
	1925	.avx,
	1926	.cmov,
	1927	.cx16,
	1928	.cx8,
	1929	.f16c,
	1930	.false_deps_popcnt,
	1931	.fast_scalar_fsqrt,
	1932	.fast_shld_rotate,
	1933	.fsgsbase,
	1934	.fxsr,
	1935	.idivq_to_divl,
	1936	.macrofusion,
	1937	.merge_to_threeway_branch,
	1938	.mmx,
	1939	.nopl,
	1940	.pclmul,
	1941	.popcnt,
	1942	.rdrnd,
	1943	.sahf,
	1944	.slow_3ops_lea,
	1945	.slow_unaligned_mem_32,
	1946	.sse4_2,
	1947	.x87,
	1948	.xsave,
	1949	.xsaveopt,
	1950	}),
	1951	};
	1952	pub const k6 = Cpu{
	1953	.name = "k6",
	1954	.llvm_name = "k6",
	1955	.features = featureSet(&[_]Feature{
	1956	.cx8,
	1957	.mmx,
	1958	.slow_unaligned_mem_16,
	1959	.x87,
	1960	}),
	1961	};
	1962	pub const k6_2 = Cpu{
	1963	.name = "k6_2",
	1964	.llvm_name = "k6-2",
	1965	.features = featureSet(&[_]Feature{
	1966	.@"3dnow",
	1967	.cx8,
	1968	.slow_unaligned_mem_16,
	1969	.x87,
	1970	}),
	1971	};
	1972	pub const k6_3 = Cpu{
	1973	.name = "k6_3",
	1974	.llvm_name = "k6-3",
	1975	.features = featureSet(&[_]Feature{
	1976	.@"3dnow",
	1977	.cx8,
	1978	.slow_unaligned_mem_16,
	1979	.x87,
	1980	}),
	1981	};
	1982	pub const k8 = Cpu{
	1983	.name = "k8",
	1984	.llvm_name = "k8",
	1985	.features = featureSet(&[_]Feature{
	1986	.@"3dnowa",
	1987	.@"64bit",
	1988	.cmov,
	1989	.cx8,
	1990	.fast_scalar_shift_masks,
	1991	.fxsr,
	1992	.nopl,
	1993	.slow_shld,
	1994	.slow_unaligned_mem_16,
	1995	.sse2,
	1996	.x87,
	1997	}),
	1998	};
	1999	pub const k8_sse3 = Cpu{
	2000	.name = "k8_sse3",
	2001	.llvm_name = "k8-sse3",
	2002	.features = featureSet(&[_]Feature{
	2003	.@"3dnowa",
	2004	.@"64bit",
	2005	.cmov,
	2006	.cx16,
	2007	.cx8,
	2008	.fast_scalar_shift_masks,
	2009	.fxsr,
	2010	.nopl,
	2011	.slow_shld,
	2012	.slow_unaligned_mem_16,
	2013	.sse3,
	2014	.x87,
	2015	}),
	2016	};
	2017	pub const knl = Cpu{
	2018	.name = "knl",
	2019	.llvm_name = "knl",
	2020	.features = featureSet(&[_]Feature{
	2021	.@"64bit",
	2022	.adx,
	2023	.aes,
	2024	.avx512cd,
	2025	.avx512er,
	2026	.avx512f,
	2027	.avx512pf,
	2028	.bmi,
	2029	.bmi2,
	2030	.cmov,
	2031	.cx16,
	2032	.cx8,
	2033	.f16c,
	2034	.fast_gather,
	2035	.fast_partial_ymm_or_zmm_write,
	2036	.fma,
	2037	.fsgsbase,
	2038	.fxsr,
	2039	.idivq_to_divl,
	2040	.lzcnt,
	2041	.mmx,
	2042	.movbe,
	2043	.nopl,
	2044	.pclmul,
	2045	.popcnt,
	2046	.prefetchwt1,
	2047	.prfchw,
	2048	.rdrnd,
	2049	.rdseed,
	2050	.sahf,
	2051	.slow_3ops_lea,
	2052	.slow_incdec,
	2053	.slow_pmaddwd,
	2054	.slow_two_mem_ops,
	2055	.x87,
	2056	.xsave,
	2057	.xsaveopt,
	2058	}),
	2059	};
	2060	pub const knm = Cpu{
	2061	.name = "knm",
	2062	.llvm_name = "knm",
	2063	.features = featureSet(&[_]Feature{
	2064	.@"64bit",
	2065	.adx,
	2066	.aes,
	2067	.avx512cd,
	2068	.avx512er,
	2069	.avx512f,
	2070	.avx512pf,
	2071	.avx512vpopcntdq,
	2072	.bmi,
	2073	.bmi2,
	2074	.cmov,
	2075	.cx16,
	2076	.cx8,
	2077	.f16c,
	2078	.fast_gather,
	2079	.fast_partial_ymm_or_zmm_write,
	2080	.fma,
	2081	.fsgsbase,
	2082	.fxsr,
	2083	.idivq_to_divl,
	2084	.lzcnt,
	2085	.mmx,
	2086	.movbe,
	2087	.nopl,
	2088	.pclmul,
	2089	.popcnt,
	2090	.prefetchwt1,
	2091	.prfchw,
	2092	.rdrnd,
	2093	.rdseed,
	2094	.sahf,
	2095	.slow_3ops_lea,
	2096	.slow_incdec,
	2097	.slow_pmaddwd,
	2098	.slow_two_mem_ops,
	2099	.x87,
	2100	.xsave,
	2101	.xsaveopt,
	2102	}),
	2103	};
	2104	pub const lakemont = Cpu{
	2105	.name = "lakemont",
	2106	.llvm_name = "lakemont",
	2107	.features = featureSet(&[_]Feature{}),
	2108	};
	2109	pub const nehalem = Cpu{
	2110	.name = "nehalem",
	2111	.llvm_name = "nehalem",
	2112	.features = featureSet(&[_]Feature{
	2113	.@"64bit",
	2114	.cmov,
	2115	.cx16,
	2116	.cx8,
	2117	.fxsr,
	2118	.macrofusion,
	2119	.mmx,
	2120	.nopl,
	2121	.popcnt,
	2122	.sahf,
	2123	.sse4_2,
	2124	.x87,
	2125	}),
	2126	};
	2127	pub const nocona = Cpu{
	2128	.name = "nocona",
	2129	.llvm_name = "nocona",
	2130	.features = featureSet(&[_]Feature{
	2131	.@"64bit",
	2132	.cmov,
	2133	.cx16,
	2134	.cx8,
	2135	.fxsr,
	2136	.mmx,
	2137	.nopl,
	2138	.slow_unaligned_mem_16,
	2139	.sse3,
	2140	.x87,
	2141	}),
	2142	};
	2143	pub const opteron = Cpu{
	2144	.name = "opteron",
	2145	.llvm_name = "opteron",
	2146	.features = featureSet(&[_]Feature{
	2147	.@"3dnowa",
	2148	.@"64bit",
	2149	.cmov,
	2150	.cx8,
	2151	.fast_scalar_shift_masks,
	2152	.fxsr,
	2153	.nopl,
	2154	.slow_shld,
	2155	.slow_unaligned_mem_16,
	2156	.sse2,
	2157	.x87,
	2158	}),
	2159	};
	2160	pub const opteron_sse3 = Cpu{
	2161	.name = "opteron_sse3",
	2162	.llvm_name = "opteron-sse3",
	2163	.features = featureSet(&[_]Feature{
	2164	.@"3dnowa",
	2165	.@"64bit",
	2166	.cmov,
	2167	.cx16,
	2168	.cx8,
	2169	.fast_scalar_shift_masks,
	2170	.fxsr,
	2171	.nopl,
	2172	.slow_shld,
	2173	.slow_unaligned_mem_16,
	2174	.sse3,
	2175	.x87,
	2176	}),
	2177	};
	2178	pub const penryn = Cpu{
	2179	.name = "penryn",
	2180	.llvm_name = "penryn",
	2181	.features = featureSet(&[_]Feature{
	2182	.@"64bit",
	2183	.cmov,
	2184	.cx16,
	2185	.cx8,
	2186	.fxsr,
	2187	.macrofusion,
	2188	.mmx,
	2189	.nopl,
	2190	.sahf,
	2191	.slow_unaligned_mem_16,
	2192	.sse4_1,
	2193	.x87,
	2194	}),
	2195	};
	2196	pub const pentium = Cpu{
	2197	.name = "pentium",
	2198	.llvm_name = "pentium",
	2199	.features = featureSet(&[_]Feature{
	2200	.cx8,
	2201	.slow_unaligned_mem_16,
	2202	.x87,
	2203	}),
	2204	};
	2205	pub const pentium_m = Cpu{
	2206	.name = "pentium_m",
	2207	.llvm_name = "pentium-m",
	2208	.features = featureSet(&[_]Feature{
	2209	.cmov,
	2210	.cx8,
	2211	.fxsr,
	2212	.mmx,
	2213	.nopl,
	2214	.slow_unaligned_mem_16,
	2215	.sse2,
	2216	.x87,
	2217	}),
	2218	};
	2219	pub const pentium_mmx = Cpu{
	2220	.name = "pentium_mmx",
	2221	.llvm_name = "pentium-mmx",
	2222	.features = featureSet(&[_]Feature{
	2223	.cx8,
	2224	.mmx,
	2225	.slow_unaligned_mem_16,
	2226	.x87,
	2227	}),
	2228	};
	2229	pub const pentium2 = Cpu{
	2230	.name = "pentium2",
	2231	.llvm_name = "pentium2",
	2232	.features = featureSet(&[_]Feature{
	2233	.cmov,
	2234	.cx8,
	2235	.fxsr,
	2236	.mmx,
	2237	.nopl,
	2238	.slow_unaligned_mem_16,
	2239	.x87,
	2240	}),
	2241	};
	2242	pub const pentium3 = Cpu{
	2243	.name = "pentium3",
	2244	.llvm_name = "pentium3",
	2245	.features = featureSet(&[_]Feature{
	2246	.cmov,
	2247	.cx8,
	2248	.fxsr,
	2249	.mmx,
	2250	.nopl,
	2251	.slow_unaligned_mem_16,
	2252	.sse,
	2253	.x87,
	2254	}),
	2255	};
	2256	pub const pentium3m = Cpu{
	2257	.name = "pentium3m",
	2258	.llvm_name = "pentium3m",
	2259	.features = featureSet(&[_]Feature{
	2260	.cmov,
	2261	.cx8,
	2262	.fxsr,
	2263	.mmx,
	2264	.nopl,
	2265	.slow_unaligned_mem_16,
	2266	.sse,
	2267	.x87,
	2268	}),
	2269	};
	2270	pub const pentium4 = Cpu{
	2271	.name = "pentium4",
	2272	.llvm_name = "pentium4",
	2273	.features = featureSet(&[_]Feature{
	2274	.cmov,
	2275	.cx8,
	2276	.fxsr,
	2277	.mmx,
	2278	.nopl,
	2279	.slow_unaligned_mem_16,
	2280	.sse2,
	2281	.x87,
	2282	}),
	2283	};
	2284	pub const pentium4m = Cpu{
	2285	.name = "pentium4m",
	2286	.llvm_name = "pentium4m",
	2287	.features = featureSet(&[_]Feature{
	2288	.cmov,
	2289	.cx8,
	2290	.fxsr,
	2291	.mmx,
	2292	.nopl,
	2293	.slow_unaligned_mem_16,
	2294	.sse2,
	2295	.x87,
	2296	}),
	2297	};
	2298	pub const pentiumpro = Cpu{
	2299	.name = "pentiumpro",
	2300	.llvm_name = "pentiumpro",
	2301	.features = featureSet(&[_]Feature{
	2302	.cmov,
	2303	.cx8,
	2304	.nopl,
	2305	.slow_unaligned_mem_16,
	2306	.x87,
	2307	}),
	2308	};
	2309	pub const prescott = Cpu{
	2310	.name = "prescott",
	2311	.llvm_name = "prescott",
	2312	.features = featureSet(&[_]Feature{
	2313	.cmov,
	2314	.cx8,
	2315	.fxsr,
	2316	.mmx,
	2317	.nopl,
	2318	.slow_unaligned_mem_16,
	2319	.sse3,
	2320	.x87,
	2321	}),
	2322	};
	2323	pub const sandybridge = Cpu{
	2324	.name = "sandybridge",
	2325	.llvm_name = "sandybridge",
	2326	.features = featureSet(&[_]Feature{
	2327	.@"64bit",
	2328	.avx,
	2329	.cmov,
	2330	.cx16,
	2331	.cx8,
	2332	.false_deps_popcnt,
	2333	.fast_scalar_fsqrt,
	2334	.fast_shld_rotate,
	2335	.fxsr,
	2336	.idivq_to_divl,
	2337	.macrofusion,
	2338	.merge_to_threeway_branch,
	2339	.mmx,
	2340	.nopl,
	2341	.pclmul,
	2342	.popcnt,
	2343	.sahf,
	2344	.slow_3ops_lea,
	2345	.slow_unaligned_mem_32,
	2346	.sse4_2,
	2347	.x87,
	2348	.xsave,
	2349	.xsaveopt,
	2350	}),
	2351	};
	2352	pub const silvermont = Cpu{
	2353	.name = "silvermont",
	2354	.llvm_name = "silvermont",
	2355	.features = featureSet(&[_]Feature{
	2356	.@"64bit",
	2357	.cmov,
	2358	.cx16,
	2359	.cx8,
	2360	.false_deps_popcnt,
	2361	.fxsr,
	2362	.idivq_to_divl,
	2363	.mmx,
	2364	.movbe,
	2365	.nopl,
	2366	.pclmul,
	2367	.popcnt,
	2368	.prfchw,
	2369	.rdrnd,
	2370	.sahf,
	2371	.slow_incdec,
	2372	.slow_lea,
	2373	.slow_pmulld,
	2374	.slow_two_mem_ops,
	2375	.sse4_2,
	2376	.ssse3,
	2377	.x87,
	2378	}),
	2379	};
	2380	pub const skx = Cpu{
	2381	.name = "skx",
	2382	.llvm_name = "skx",
	2383	.features = featureSet(&[_]Feature{
	2384	.@"64bit",
	2385	.adx,
	2386	.aes,
	2387	.avx,
	2388	.avx2,
	2389	.avx512bw,
	2390	.avx512cd,
	2391	.avx512dq,
	2392	.avx512f,
	2393	.avx512vl,
	2394	.bmi,
	2395	.bmi2,
	2396	.clflushopt,
	2397	.clwb,
	2398	.cmov,
	2399	.cx16,
	2400	.cx8,
	2401	.ermsb,
	2402	.f16c,
	2403	.false_deps_popcnt,
	2404	.fast_gather,
	2405	.fast_scalar_fsqrt,
	2406	.fast_shld_rotate,
	2407	.fast_variable_shuffle,
	2408	.fast_vector_fsqrt,
	2409	.fma,
	2410	.fsgsbase,
	2411	.fxsr,
	2412	.idivq_to_divl,
	2413	.invpcid,
	2414	.lzcnt,
	2415	.macrofusion,
	2416	.merge_to_threeway_branch,
	2417	.mmx,
	2418	.movbe,
	2419	.mpx,
	2420	.nopl,
	2421	.pclmul,
	2422	.pku,
	2423	.popcnt,
	2424	.prfchw,
	2425	.rdrnd,
	2426	.rdseed,
	2427	.sahf,
	2428	.slow_3ops_lea,
	2429	.sse4_2,
	2430	.x87,
	2431	.xsave,
	2432	.xsavec,
	2433	.xsaveopt,
	2434	.xsaves,
	2435	}),
	2436	};
	2437	pub const skylake = Cpu{
	2438	.name = "skylake",
	2439	.llvm_name = "skylake",
	2440	.features = featureSet(&[_]Feature{
	2441	.@"64bit",
	2442	.adx,
	2443	.aes,
	2444	.avx,
	2445	.avx2,
	2446	.bmi,
	2447	.bmi2,
	2448	.clflushopt,
	2449	.cmov,
	2450	.cx16,
	2451	.cx8,
	2452	.ermsb,
	2453	.f16c,
	2454	.false_deps_popcnt,
	2455	.fast_gather,
	2456	.fast_scalar_fsqrt,
	2457	.fast_shld_rotate,
	2458	.fast_variable_shuffle,
	2459	.fast_vector_fsqrt,
	2460	.fma,
	2461	.fsgsbase,
	2462	.fxsr,
	2463	.idivq_to_divl,
	2464	.invpcid,
	2465	.lzcnt,
	2466	.macrofusion,
	2467	.merge_to_threeway_branch,
	2468	.mmx,
	2469	.movbe,
	2470	.mpx,
	2471	.nopl,
	2472	.pclmul,
	2473	.popcnt,
	2474	.prfchw,
	2475	.rdrnd,
	2476	.rdseed,
	2477	.sahf,
	2478	.sgx,
	2479	.slow_3ops_lea,
	2480	.sse4_2,
	2481	.x87,
	2482	.xsave,
	2483	.xsavec,
	2484	.xsaveopt,
	2485	.xsaves,
	2486	}),
	2487	};
	2488	pub const skylake_avx512 = Cpu{
	2489	.name = "skylake_avx512",
	2490	.llvm_name = "skylake-avx512",
	2491	.features = featureSet(&[_]Feature{
	2492	.@"64bit",
	2493	.adx,
	2494	.aes,
	2495	.avx,
	2496	.avx2,
	2497	.avx512bw,
	2498	.avx512cd,
	2499	.avx512dq,
	2500	.avx512f,
	2501	.avx512vl,
	2502	.bmi,
	2503	.bmi2,
	2504	.clflushopt,
	2505	.clwb,
	2506	.cmov,
	2507	.cx16,
	2508	.cx8,
	2509	.ermsb,
	2510	.f16c,
	2511	.false_deps_popcnt,
	2512	.fast_gather,
	2513	.fast_scalar_fsqrt,
	2514	.fast_shld_rotate,
	2515	.fast_variable_shuffle,
	2516	.fast_vector_fsqrt,
	2517	.fma,
	2518	.fsgsbase,
	2519	.fxsr,
	2520	.idivq_to_divl,
	2521	.invpcid,
	2522	.lzcnt,
	2523	.macrofusion,
	2524	.merge_to_threeway_branch,
	2525	.mmx,
	2526	.movbe,
	2527	.mpx,
	2528	.nopl,
	2529	.pclmul,
	2530	.pku,
	2531	.popcnt,
	2532	.prfchw,
	2533	.rdrnd,
	2534	.rdseed,
	2535	.sahf,
	2536	.slow_3ops_lea,
	2537	.sse4_2,
	2538	.x87,
	2539	.xsave,
	2540	.xsavec,
	2541	.xsaveopt,
	2542	.xsaves,
	2543	}),
	2544	};
	2545	pub const slm = Cpu{
	2546	.name = "slm",
	2547	.llvm_name = "slm",
	2548	.features = featureSet(&[_]Feature{
	2549	.@"64bit",
	2550	.cmov,
	2551	.cx16,
	2552	.cx8,
	2553	.false_deps_popcnt,
	2554	.fxsr,
	2555	.idivq_to_divl,
	2556	.mmx,
	2557	.movbe,
	2558	.nopl,
	2559	.pclmul,
	2560	.popcnt,
	2561	.prfchw,
	2562	.rdrnd,
	2563	.sahf,
	2564	.slow_incdec,
	2565	.slow_lea,
	2566	.slow_pmulld,
	2567	.slow_two_mem_ops,
	2568	.sse4_2,
	2569	.ssse3,
	2570	.x87,
	2571	}),
	2572	};
	2573	pub const tremont = Cpu{
	2574	.name = "tremont",
	2575	.llvm_name = "tremont",
	2576	.features = featureSet(&[_]Feature{
	2577	.@"64bit",
	2578	.aes,
	2579	.cldemote,
	2580	.clflushopt,
	2581	.cmov,
	2582	.cx16,
	2583	.cx8,
	2584	.fsgsbase,
	2585	.fxsr,
	2586	.gfni,
	2587	.mmx,
	2588	.movbe,
	2589	.movdir64b,
	2590	.movdiri,
	2591	.mpx,
	2592	.nopl,
	2593	.pclmul,
	2594	.popcnt,
	2595	.prfchw,
	2596	.ptwrite,
	2597	.rdpid,
	2598	.rdrnd,
	2599	.rdseed,
	2600	.sahf,
	2601	.sgx,
	2602	.sha,
	2603	.slow_incdec,
	2604	.slow_lea,
	2605	.slow_two_mem_ops,
	2606	.sse4_2,
	2607	.ssse3,
	2608	.waitpkg,
	2609	.x87,
	2610	.xsave,
	2611	.xsavec,
	2612	.xsaveopt,
	2613	.xsaves,
	2614	}),
	2615	};
	2616	pub const westmere = Cpu{
	2617	.name = "westmere",
	2618	.llvm_name = "westmere",
	2619	.features = featureSet(&[_]Feature{
	2620	.@"64bit",
	2621	.cmov,
	2622	.cx16,
	2623	.cx8,
	2624	.fxsr,
	2625	.macrofusion,
	2626	.mmx,
	2627	.nopl,
	2628	.pclmul,
	2629	.popcnt,
	2630	.sahf,
	2631	.sse4_2,
	2632	.x87,
	2633	}),
	2634	};
	2635	pub const winchip_c6 = Cpu{
	2636	.name = "winchip_c6",
	2637	.llvm_name = "winchip-c6",
	2638	.features = featureSet(&[_]Feature{
	2639	.mmx,
	2640	.slow_unaligned_mem_16,
	2641	.x87,
	2642	}),
	2643	};
	2644	pub const winchip2 = Cpu{
	2645	.name = "winchip2",
	2646	.llvm_name = "winchip2",
	2647	.features = featureSet(&[_]Feature{
	2648	.@"3dnow",
	2649	.slow_unaligned_mem_16,
	2650	.x87,
	2651	}),
	2652	};
	2653	pub const x86_64 = Cpu{
	2654	.name = "x86_64",
	2655	.llvm_name = "x86-64",
	2656	.features = featureSet(&[_]Feature{
	2657	.@"64bit",
	2658	.cmov,
	2659	.cx8,
	2660	.fxsr,
	2661	.macrofusion,
	2662	.mmx,
	2663	.nopl,
	2664	.slow_3ops_lea,
	2665	.slow_incdec,
	2666	.sse2,
	2667	.x87,
	2668	}),
	2669	};
	2670	pub const yonah = Cpu{
	2671	.name = "yonah",
	2672	.llvm_name = "yonah",
	2673	.features = featureSet(&[_]Feature{
	2674	.cmov,
	2675	.cx8,
	2676	.fxsr,
	2677	.mmx,
	2678	.nopl,
	2679	.slow_unaligned_mem_16,
	2680	.sse3,
	2681	.x87,
	2682	}),
	2683	};
	2684	pub const znver1 = Cpu{
	2685	.name = "znver1",
	2686	.llvm_name = "znver1",
	2687	.features = featureSet(&[_]Feature{
	2688	.@"64bit",
	2689	.adx,
	2690	.aes,
	2691	.avx2,
	2692	.bmi,
	2693	.bmi2,
	2694	.branchfusion,
	2695	.clflushopt,
	2696	.clzero,
	2697	.cmov,
	2698	.cx16,
	2699	.f16c,
	2700	.fast_15bytenop,
	2701	.fast_bextr,
	2702	.fast_lzcnt,
	2703	.fast_scalar_shift_masks,
	2704	.fma,
	2705	.fsgsbase,
	2706	.fxsr,
	2707	.lzcnt,
	2708	.mmx,
	2709	.movbe,
	2710	.mwaitx,
	2711	.nopl,
	2712	.pclmul,
	2713	.popcnt,
	2714	.prfchw,
	2715	.rdrnd,
	2716	.rdseed,
	2717	.sahf,
	2718	.sha,
	2719	.slow_shld,
	2720	.sse4a,
	2721	.x87,
	2722	.xsave,
	2723	.xsavec,
	2724	.xsaveopt,
	2725	.xsaves,
	2726	}),
	2727	};
	2728	pub const znver2 = Cpu{
	2729	.name = "znver2",
	2730	.llvm_name = "znver2",
	2731	.features = featureSet(&[_]Feature{
	2732	.@"64bit",
	2733	.adx,
	2734	.aes,
	2735	.avx2,
	2736	.bmi,
	2737	.bmi2,
	2738	.branchfusion,
	2739	.clflushopt,
	2740	.clwb,
	2741	.clzero,
	2742	.cmov,
	2743	.cx16,
	2744	.f16c,
	2745	.fast_15bytenop,
	2746	.fast_bextr,
	2747	.fast_lzcnt,
	2748	.fast_scalar_shift_masks,
	2749	.fma,
	2750	.fsgsbase,
	2751	.fxsr,
	2752	.lzcnt,
	2753	.mmx,
	2754	.movbe,
	2755	.mwaitx,
	2756	.nopl,
	2757	.pclmul,
	2758	.popcnt,
	2759	.prfchw,
	2760	.rdpid,
	2761	.rdrnd,
	2762	.rdseed,
	2763	.sahf,
	2764	.sha,
	2765	.slow_shld,
	2766	.sse4a,
	2767	.wbnoinvd,
	2768	.x87,
	2769	.xsave,
	2770	.xsavec,
	2771	.xsaveopt,
	2772	.xsaves,
	2773	}),
	2774	};
	2775	};
	2776
	2777	/// All x86 CPUs, sorted alphabetically by name.
	2778	/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
	2779	/// compiler has inefficient memory and CPU usage, affecting build times.
	2780	pub const all_cpus = &[_]*const Cpu{
	2781	&cpu.amdfam10,
	2782	&cpu.athlon,
	2783	&cpu.athlon_4,
	2784	&cpu.athlon_fx,
	2785	&cpu.athlon_mp,
	2786	&cpu.athlon_tbird,
	2787	&cpu.athlon_xp,
	2788	&cpu.athlon64,
	2789	&cpu.athlon64_sse3,
	2790	&cpu.atom,
	2791	&cpu.barcelona,
	2792	&cpu.bdver1,
	2793	&cpu.bdver2,
	2794	&cpu.bdver3,
	2795	&cpu.bdver4,
	2796	&cpu.bonnell,
	2797	&cpu.broadwell,
	2798	&cpu.btver1,
	2799	&cpu.btver2,
	2800	&cpu.c3,
	2801	&cpu.c3_2,
	2802	&cpu.cannonlake,
	2803	&cpu.cascadelake,
	2804	&cpu.cooperlake,
	2805	&cpu.core_avx_i,
	2806	&cpu.core_avx2,
	2807	&cpu.core2,
	2808	&cpu.corei7,
	2809	&cpu.corei7_avx,
	2810	&cpu.generic,
	2811	&cpu.geode,
	2812	&cpu.goldmont,
	2813	&cpu.goldmont_plus,
	2814	&cpu.haswell,
	2815	&cpu._i386,
	2816	&cpu._i486,
	2817	&cpu._i586,
	2818	&cpu._i686,
	2819	&cpu.icelake_client,
	2820	&cpu.icelake_server,
	2821	&cpu.ivybridge,
	2822	&cpu.k6,
	2823	&cpu.k6_2,
	2824	&cpu.k6_3,
	2825	&cpu.k8,
	2826	&cpu.k8_sse3,
	2827	&cpu.knl,
	2828	&cpu.knm,
	2829	&cpu.lakemont,
	2830	&cpu.nehalem,
	2831	&cpu.nocona,
	2832	&cpu.opteron,
	2833	&cpu.opteron_sse3,
	2834	&cpu.penryn,
	2835	&cpu.pentium,
	2836	&cpu.pentium_m,
	2837	&cpu.pentium_mmx,
	2838	&cpu.pentium2,
	2839	&cpu.pentium3,
	2840	&cpu.pentium3m,
	2841	&cpu.pentium4,
	2842	&cpu.pentium4m,
	2843	&cpu.pentiumpro,
	2844	&cpu.prescott,
	2845	&cpu.sandybridge,
	2846	&cpu.silvermont,
	2847	&cpu.skx,
	2848	&cpu.skylake,
	2849	&cpu.skylake_avx512,
	2850	&cpu.slm,
	2851	&cpu.tremont,
	2852	&cpu.westmere,
	2853	&cpu.winchip_c6,
	2854	&cpu.winchip2,
	2855	&cpu.x86_64,
	2856	&cpu.yonah,
	2857	&cpu.znver1,
	2858	&cpu.znver2,
	2859	};

src-self-hosted/main.zig+3-43

...	...	@@ -79,7 +79,9 @@ pub fn main() !void {
79	79	} else if (mem.eql(u8, cmd, "libc")) {
80	80	return cmdLibC(allocator, cmd_args);
81	81	} else if (mem.eql(u8, cmd, "targets")) {
82		return cmdTargets(allocator, cmd_args);
	82	// TODO figure out the current target rather than using the target that was specified when
	83	// compiling the compiler
	84	return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout, Target.current);
83	85	} else if (mem.eql(u8, cmd, "version")) {
84	86	return cmdVersion(allocator, cmd_args);
85	87	} else if (mem.eql(u8, cmd, "zen")) {
...	...	@@ -789,48 +791,6 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro
789	791	}
790	792	}
791	793
792		// cmd:targets /////////////////////////////////////////////////////////////////////////////////////
793
794		fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
795		try stdout.write("Architectures:\n");
796		{
797		comptime var i: usize = 0;
798		inline while (i < @memberCount(builtin.Arch)) : (i += 1) {
799		comptime const arch_tag = @memberName(builtin.Arch, i);
800		// NOTE: Cannot use empty string, see #918.
801		comptime const native_str = if (comptime mem.eql(u8, arch_tag, @tagName(builtin.arch))) " (native)\n" else "\n";
802
803		try stdout.print(" {}{}", .{ arch_tag, native_str });
804		}
805		}
806		try stdout.write("\n");
807
808		try stdout.write("Operating Systems:\n");
809		{
810		comptime var i: usize = 0;
811		inline while (i < @memberCount(Target.Os)) : (i += 1) {
812		comptime const os_tag = @memberName(Target.Os, i);
813		// NOTE: Cannot use empty string, see #918.
814		comptime const native_str = if (comptime mem.eql(u8, os_tag, @tagName(builtin.os))) " (native)\n" else "\n";
815
816		try stdout.print(" {}{}", .{ os_tag, native_str });
817		}
818		}
819		try stdout.write("\n");
820
821		try stdout.write("C ABIs:\n");
822		{
823		comptime var i: usize = 0;
824		inline while (i < @memberCount(Target.Abi)) : (i += 1) {
825		comptime const abi_tag = @memberName(Target.Abi, i);
826		// NOTE: Cannot use empty string, see #918.
827		comptime const native_str = if (comptime mem.eql(u8, abi_tag, @tagName(builtin.abi))) " (native)\n" else "\n";
828
829		try stdout.print(" {}{}", .{ abi_tag, native_str });
830		}
831		}
832		}
833
834	794	fn cmdVersion(allocator: *Allocator, args: []const []const u8) !void {
835	795	try stdout.print("{}\n", .{std.mem.toSliceConst(u8, c.ZIG_VERSION_STRING)});
836	796	}

src-self-hosted/print_targets.zig created+251

...	...	@@ -0,0 +1,251 @@
	1	const std = @import("std");
	2	const fs = std.fs;
	3	const io = std.io;
	4	const mem = std.mem;
	5	const Allocator = mem.Allocator;
	6	const Target = std.Target;
	7
	8	// TODO this is hard-coded until self-hosted gains this information canonically
	9	const available_libcs = [_][]const u8{
	10	"aarch64_be-linux-gnu",
	11	"aarch64_be-linux-musl",
	12	"aarch64_be-windows-gnu",
	13	"aarch64-linux-gnu",
	14	"aarch64-linux-musl",
	15	"aarch64-windows-gnu",
	16	"armeb-linux-gnueabi",
	17	"armeb-linux-gnueabihf",
	18	"armeb-linux-musleabi",
	19	"armeb-linux-musleabihf",
	20	"armeb-windows-gnu",
	21	"arm-linux-gnueabi",
	22	"arm-linux-gnueabihf",
	23	"arm-linux-musleabi",
	24	"arm-linux-musleabihf",
	25	"arm-windows-gnu",
	26	"i386-linux-gnu",
	27	"i386-linux-musl",
	28	"i386-windows-gnu",
	29	"mips64el-linux-gnuabi64",
	30	"mips64el-linux-gnuabin32",
	31	"mips64el-linux-musl",
	32	"mips64-linux-gnuabi64",
	33	"mips64-linux-gnuabin32",
	34	"mips64-linux-musl",
	35	"mipsel-linux-gnu",
	36	"mipsel-linux-musl",
	37	"mips-linux-gnu",
	38	"mips-linux-musl",
	39	"powerpc64le-linux-gnu",
	40	"powerpc64le-linux-musl",
	41	"powerpc64-linux-gnu",
	42	"powerpc64-linux-musl",
	43	"powerpc-linux-gnu",
	44	"powerpc-linux-musl",
	45	"riscv64-linux-gnu",
	46	"riscv64-linux-musl",
	47	"s390x-linux-gnu",
	48	"s390x-linux-musl",
	49	"sparc-linux-gnu",
	50	"sparcv9-linux-gnu",
	51	"wasm32-freestanding-musl",
	52	"x86_64-linux-gnu (native)",
	53	"x86_64-linux-gnux32",
	54	"x86_64-linux-musl",
	55	"x86_64-windows-gnu",
	56	};
	57
	58	// TODO this is hard-coded until self-hosted gains this information canonically
	59	const available_glibcs = [_][]const u8{
	60	"2.0",
	61	"2.1",
	62	"2.1.1",
	63	"2.1.2",
	64	"2.1.3",
	65	"2.2",
	66	"2.2.1",
	67	"2.2.2",
	68	"2.2.3",
	69	"2.2.4",
	70	"2.2.5",
	71	"2.2.6",
	72	"2.3",
	73	"2.3.2",
	74	"2.3.3",
	75	"2.3.4",
	76	"2.4",
	77	"2.5",
	78	"2.6",
	79	"2.7",
	80	"2.8",
	81	"2.9",
	82	"2.10",
	83	"2.11",
	84	"2.12",
	85	"2.13",
	86	"2.14",
	87	"2.15",
	88	"2.16",
	89	"2.17",
	90	"2.18",
	91	"2.19",
	92	"2.22",
	93	"2.23",
	94	"2.24",
	95	"2.25",
	96	"2.26",
	97	"2.27",
	98	"2.28",
	99	"2.29",
	100	"2.30",
	101	};
	102
	103	pub fn cmdTargets(
	104	allocator: *Allocator,
	105	args: []const []const u8,
	106	stdout: *io.OutStream(fs.File.WriteError),
	107	native_target: Target,
	108	) !void {
	109	const BOS = io.BufferedOutStream(fs.File.WriteError);
	110	var bos = BOS.init(stdout);
	111	var jws = std.json.WriteStream(BOS.Stream, 6).init(&bos.stream);
	112
	113	try jws.beginObject();
	114
	115	try jws.objectField("arch");
	116	try jws.beginObject();
	117	{
	118	inline for (@typeInfo(Target.Arch).Union.fields) \|field\| {
	119	try jws.objectField(field.name);
	120	if (field.field_type == void) {
	121	try jws.emitNull();
	122	} else {
	123	try jws.emitString(@typeName(field.field_type));
	124	}
	125	}
	126	}
	127	try jws.endObject();
	128
	129	try jws.objectField("subArch");
	130	try jws.beginObject();
	131	const sub_arch_list = [_]type{
	132	Target.Arch.Arm32,
	133	Target.Arch.Arm64,
	134	Target.Arch.Kalimba,
	135	Target.Arch.Mips,
	136	};
	137	inline for (sub_arch_list) \|SubArch\| {
	138	try jws.objectField(@typeName(SubArch));
	139	try jws.beginArray();
	140	inline for (@typeInfo(SubArch).Enum.fields) \|field\| {
	141	try jws.arrayElem();
	142	try jws.emitString(field.name);
	143	}
	144	try jws.endArray();
	145	}
	146	try jws.endObject();
	147
	148	try jws.objectField("os");
	149	try jws.beginArray();
	150	inline for (@typeInfo(Target.Os).Enum.fields) \|field\| {
	151	try jws.arrayElem();
	152	try jws.emitString(field.name);
	153	}
	154	try jws.endArray();
	155
	156	try jws.objectField("abi");
	157	try jws.beginArray();
	158	inline for (@typeInfo(Target.Abi).Enum.fields) \|field\| {
	159	try jws.arrayElem();
	160	try jws.emitString(field.name);
	161	}
	162	try jws.endArray();
	163
	164	try jws.objectField("libc");
	165	try jws.beginArray();
	166	for (available_libcs) \|libc\| {
	167	try jws.arrayElem();
	168	try jws.emitString(libc);
	169	}
	170	try jws.endArray();
	171
	172	try jws.objectField("glibc");
	173	try jws.beginArray();
	174	for (available_glibcs) \|glibc\| {
	175	try jws.arrayElem();
	176	try jws.emitString(glibc);
	177	}
	178	try jws.endArray();
	179
	180	try jws.objectField("cpus");
	181	try jws.beginObject();
	182	inline for (@typeInfo(Target.Arch).Union.fields) \|field\| {
	183	try jws.objectField(field.name);
	184	try jws.beginObject();
	185	const arch = @unionInit(Target.Arch, field.name, undefined);
	186	for (arch.allCpus()) \|cpu\| {
	187	try jws.objectField(cpu.name);
	188	try jws.beginArray();
	189	for (arch.allFeaturesList()) \|feature, i\| {
	190	if (cpu.features.isEnabled(@intCast(u8, i))) {
	191	try jws.arrayElem();
	192	try jws.emitString(feature.name);
	193	}
	194	}
	195	try jws.endArray();
	196	}
	197	try jws.endObject();
	198	}
	199	try jws.endObject();
	200
	201	try jws.objectField("cpuFeatures");
	202	try jws.beginObject();
	203	inline for (@typeInfo(Target.Arch).Union.fields) \|field\| {
	204	try jws.objectField(field.name);
	205	try jws.beginArray();
	206	const arch = @unionInit(Target.Arch, field.name, undefined);
	207	for (arch.allFeaturesList()) \|feature\| {
	208	try jws.arrayElem();
	209	try jws.emitString(feature.name);
	210	}
	211	try jws.endArray();
	212	}
	213	try jws.endObject();
	214
	215	try jws.objectField("native");
	216	try jws.beginObject();
	217	{
	218	const triple = try native_target.zigTriple(allocator);
	219	defer allocator.free(triple);
	220	try jws.objectField("triple");
	221	try jws.emitString(triple);
	222	}
	223	try jws.objectField("arch");
	224	try jws.emitString(@tagName(native_target.getArch()));
	225	try jws.objectField("os");
	226	try jws.emitString(@tagName(native_target.getOs()));
	227	try jws.objectField("abi");
	228	try jws.emitString(@tagName(native_target.getAbi()));
	229	try jws.objectField("cpuName");
	230	const cpu_features = native_target.getCpuFeatures();
	231	try jws.emitString(cpu_features.cpu.name);
	232	{
	233	try jws.objectField("cpuFeatures");
	234	try jws.beginArray();
	235	for (native_target.getArch().allFeaturesList()) \|feature, i_usize\| {
	236	const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
	237	if (cpu_features.features.isEnabled(index)) {
	238	try jws.arrayElem();
	239	try jws.emitString(feature.name);
	240	}
	241	}
	242	try jws.endArray();
	243	}
	244	// TODO implement native glibc version detection in self-hosted
	245	try jws.endObject();
	246
	247	try jws.endObject();
	248
	249	try bos.stream.writeByte('\n');
	250	return bos.flush();
	251	}

src-self-hosted/stage1.zig+304-1

...	...	@@ -9,9 +9,11 @@ const process = std.process;
9	9	const Allocator = mem.Allocator;
10	10	const ArrayList = std.ArrayList;
11	11	const Buffer = std.Buffer;
	12	const Target = std.Target;
12	13	const self_hosted_main = @import("main.zig");
13	14	const errmsg = @import("errmsg.zig");
14	15	const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer;
	16	const assert = std.debug.assert;
15	17
16	18	var stderr_file: fs.File = undefined;
17	19	var stderr: *io.OutStream(fs.File.WriteError) = undefined;
...	...	@@ -63,6 +65,7 @@ const Error = extern enum {
63	65	CacheUnavailable,
64	66	PathTooLong,
65	67	CCompilerCannotFindFile,
	68	NoCCompilerInstalled,
66	69	ReadingDepFile,
67	70	InvalidDepFile,
68	71	MissingArchitecture,
...	...	@@ -80,6 +83,15 @@ const Error = extern enum {
80	83	OperationAborted,
81	84	BrokenPipe,
82	85	NoSpaceLeft,
	86	NotLazy,
	87	IsAsync,
	88	ImportOutsidePkgPath,
	89	UnknownCpu,
	90	UnknownSubArchitecture,
	91	UnknownCpuFeature,
	92	InvalidCpuFeatures,
	93	InvalidLlvmCpuFeaturesFormat,
	94	UnknownApplicationBinaryInterface,
83	95	};
84	96
85	97	const FILE = std.c.FILE;
...	...	@@ -149,7 +161,7 @@ fn fmtMain(argc: c_int, argv: []const [:0]const u8) !void {
149	161	const argc_usize = @intCast(usize, argc);
150	162	var arg_i: usize = 0;
151	163	while (arg_i < argc_usize) : (arg_i += 1) {
152		try args_list.append(std.mem.toSliceConst(u8, argv[arg_i]));
	164	try args_list.append(mem.toSliceConst(u8, argv[arg_i]));
153	165	}
154	166
155	167	stdout = &std.io.getStdOut().outStream().stream;
...	...	@@ -527,3 +539,294 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
527	539	node.activate();
528	540	node.context.maybeRefresh();
529	541	}
	542
	543	fn cpuFeaturesFromLLVM(
	544	arch: Target.Arch,
	545	llvm_cpu_name_z: ?[*:0]const u8,
	546	llvm_cpu_features_opt: ?[*:0]const u8,
	547	) !Target.CpuFeatures {
	548	var result = arch.getBaselineCpuFeatures();
	549
	550	if (llvm_cpu_name_z) \|cpu_name_z\| {
	551	const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
	552
	553	for (arch.allCpus()) \|cpu\| {
	554	const this_llvm_name = cpu.llvm_name orelse continue;
	555	if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
	556	// Here we use the non-dependencies-populated set,
	557	// so that subtracting features later in this function
	558	// affect the prepopulated set.
	559	result = Target.CpuFeatures{
	560	.cpu = cpu,
	561	.features = cpu.features,
	562	};
	563	break;
	564	}
	565	}
	566	}
	567
	568	const all_features = arch.allFeaturesList();
	569
	570	if (llvm_cpu_features_opt) \|llvm_cpu_features\| {
	571	var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
	572	while (it.next()) \|decorated_llvm_feat\| {
	573	var op: enum {
	574	add,
	575	sub,
	576	} = undefined;
	577	var llvm_feat: []const u8 = undefined;
	578	if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
	579	op = .add;
	580	llvm_feat = decorated_llvm_feat[1..];
	581	} else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
	582	op = .sub;
	583	llvm_feat = decorated_llvm_feat[1..];
	584	} else {
	585	return error.InvalidLlvmCpuFeaturesFormat;
	586	}
	587	for (all_features) \|feature, index_usize\| {
	588	const this_llvm_name = feature.llvm_name orelse continue;
	589	if (mem.eql(u8, llvm_feat, this_llvm_name)) {
	590	const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
	591	switch (op) {
	592	.add => result.features.addFeature(index),
	593	.sub => result.features.removeFeature(index),
	594	}
	595	break;
	596	}
	597	}
	598	}
	599	}
	600
	601	result.features.populateDependencies(all_features);
	602	return result;
	603	}
	604
	605	// ABI warning
	606	export fn stage2_cmd_targets(zig_triple: [*:0]const u8) c_int {
	607	cmdTargets(zig_triple) catch \|err\| {
	608	std.debug.warn("unable to list targets: {}\n", .{@errorName(err)});
	609	return -1;
	610	};
	611	return 0;
	612	}
	613
	614	fn cmdTargets(zig_triple: [*:0]const u8) !void {
	615	var target = try Target.parse(mem.toSliceConst(u8, zig_triple));
	616	target.Cross.cpu_features = blk: {
	617	const llvm = @import("llvm.zig");
	618	const llvm_cpu_name = llvm.GetHostCPUName();
	619	const llvm_cpu_features = llvm.GetNativeFeatures();
	620	break :blk try cpuFeaturesFromLLVM(target.Cross.arch, llvm_cpu_name, llvm_cpu_features);
	621	};
	622	return @import("print_targets.zig").cmdTargets(
	623	std.heap.c_allocator,
	624	&[0][]u8{},
	625	&std.io.getStdOut().outStream().stream,
	626	target,
	627	);
	628	}
	629
	630	const Stage2CpuFeatures = struct {
	631	allocator: *mem.Allocator,
	632	cpu_features: Target.CpuFeatures,
	633
	634	llvm_features_str: ?[*:0]const u8,
	635
	636	builtin_str: [:0]const u8,
	637	cache_hash: [:0]const u8,
	638
	639	const Self = @This();
	640
	641	fn createFromNative(allocator: mem.Allocator) !Self {
	642	const arch = Target.current.getArch();
	643	const llvm = @import("llvm.zig");
	644	const llvm_cpu_name = llvm.GetHostCPUName();
	645	const llvm_cpu_features = llvm.GetNativeFeatures();
	646	const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name, llvm_cpu_features);
	647	return createFromCpuFeatures(allocator, arch, cpu_features);
	648	}
	649
	650	fn createFromCpuFeatures(
	651	allocator: *mem.Allocator,
	652	arch: Target.Arch,
	653	cpu_features: Target.CpuFeatures,
	654	) !*Self {
	655	const self = try allocator.create(Self);
	656	errdefer allocator.destroy(self);
	657
	658	const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{
	659	cpu_features.cpu.name,
	660	cpu_features.features.asBytes(),
	661	});
	662	errdefer allocator.free(cache_hash);
	663
	664	const generic_arch_name = arch.genericName();
	665	var builtin_str_buffer = try std.Buffer.allocPrint(allocator,
	666	\\CpuFeatures{{
	667	\\ .cpu = &Target.{}.cpu.{},
	668	\\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
	669	\\
	670	, .{
	671	generic_arch_name,
	672	cpu_features.cpu.name,
	673	generic_arch_name,
	674	generic_arch_name,
	675	});
	676	defer builtin_str_buffer.deinit();
	677
	678	var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
	679	defer llvm_features_buffer.deinit();
	680
	681	for (arch.allFeaturesList()) \|feature, index_usize\| {
	682	const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
	683	const is_enabled = cpu_features.features.isEnabled(index);
	684
	685	if (feature.llvm_name) \|llvm_name\| {
	686	const plus_or_minus = "-+"[@boolToInt(is_enabled)];
	687	try llvm_features_buffer.appendByte(plus_or_minus);
	688	try llvm_features_buffer.append(llvm_name);
	689	try llvm_features_buffer.append(",");
	690	}
	691
	692	if (is_enabled) {
	693	// TODO some kind of "zig identifier escape" function rather than
	694	// unconditionally using @"" syntax
	695	try builtin_str_buffer.append(" .@\"");
	696	try builtin_str_buffer.append(feature.name);
	697	try builtin_str_buffer.append("\",\n");
	698	}
	699	}
	700
	701	try builtin_str_buffer.append(
	702	\\ }),
	703	\\};
	704	\\
	705	);
	706
	707	assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
	708	llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
	709
	710	self.* = Self{
	711	.allocator = allocator,
	712	.cpu_features = cpu_features,
	713	.llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
	714	.builtin_str = builtin_str_buffer.toOwnedSlice(),
	715	.cache_hash = cache_hash,
	716	};
	717	return self;
	718	}
	719
	720	fn destroy(self: *Self) void {
	721	self.allocator.free(self.cache_hash);
	722	self.allocator.free(self.builtin_str);
	723	// TODO if (self.llvm_features_str) \|llvm_features_str\| self.allocator.free(llvm_features_str);
	724	self.allocator.destroy(self);
	725	}
	726	};
	727
	728	// ABI warning
	729	export fn stage2_cpu_features_parse(
	730	result: **Stage2CpuFeatures,
	731	zig_triple: ?[*:0]const u8,
	732	cpu_name: ?[*:0]const u8,
	733	cpu_features: ?[*:0]const u8,
	734	) Error {
	735	result.* = stage2ParseCpuFeatures(zig_triple, cpu_name, cpu_features) catch \|err\| switch (err) {
	736	error.OutOfMemory => return .OutOfMemory,
	737	error.UnknownArchitecture => return .UnknownArchitecture,
	738	error.UnknownSubArchitecture => return .UnknownSubArchitecture,
	739	error.UnknownOperatingSystem => return .UnknownOperatingSystem,
	740	error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
	741	error.MissingOperatingSystem => return .MissingOperatingSystem,
	742	error.MissingArchitecture => return .MissingArchitecture,
	743	error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
	744	error.InvalidCpuFeatures => return .InvalidCpuFeatures,
	745	};
	746	return .None;
	747	}
	748
	749	fn stage2ParseCpuFeatures(
	750	zig_triple_oz: ?[*:0]const u8,
	751	cpu_name_oz: ?[*:0]const u8,
	752	cpu_features_oz: ?[*:0]const u8,
	753	) !*Stage2CpuFeatures {
	754	const zig_triple_z = zig_triple_oz orelse return Stage2CpuFeatures.createFromNative(std.heap.c_allocator);
	755	const target = try Target.parse(mem.toSliceConst(u8, zig_triple_z));
	756	const arch = target.Cross.arch;
	757
	758	const cpu = if (cpu_name_oz) \|cpu_name_z\| blk: {
	759	const cpu_name = mem.toSliceConst(u8, cpu_name_z);
	760	break :blk arch.parseCpu(cpu_name) catch \|err\| switch (err) {
	761	error.UnknownCpu => {
	762	std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{
	763	cpu_name,
	764	@tagName(arch),
	765	});
	766	for (arch.allCpus()) \|cpu\| {
	767	std.debug.warn(" {}\n", .{cpu.name});
	768	}
	769	process.exit(1);
	770	},
	771	else => \|e\| return e,
	772	};
	773	} else target.Cross.cpu_features.cpu;
	774
	775	var set = if (cpu_features_oz) \|cpu_features_z\| blk: {
	776	const cpu_features = mem.toSliceConst(u8, cpu_features_z);
	777	break :blk arch.parseCpuFeatureSet(cpu, cpu_features) catch \|err\| switch (err) {
	778	error.UnknownCpuFeature => {
	779	std.debug.warn(
	780	\\Unknown CPU features specified.
	781	\\Available CPU features for architecture '{}':
	782	\\
	783	, .{@tagName(arch)});
	784	for (arch.allFeaturesList()) \|feature\| {
	785	std.debug.warn(" {}\n", .{feature.name});
	786	}
	787	process.exit(1);
	788	},
	789	else => \|e\| return e,
	790	};
	791	} else cpu.features;
	792
	793	if (arch.subArchFeature()) \|index\| {
	794	set.addFeature(index);
	795	}
	796	set.populateDependencies(arch.allFeaturesList());
	797
	798	return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{
	799	.cpu = cpu,
	800	.features = set,
	801	});
	802	}
	803
	804	// ABI warning
	805	export fn stage2_cpu_features_get_cache_hash(
	806	cpu_features: *const Stage2CpuFeatures,
	807	ptr: [:0]const u8,
	808	len: *usize,
	809	) void {
	810	ptr.* = cpu_features.cache_hash.ptr;
	811	len.* = cpu_features.cache_hash.len;
	812	}
	813
	814	// ABI warning
	815	export fn stage2_cpu_features_get_builtin_str(
	816	cpu_features: *const Stage2CpuFeatures,
	817	ptr: [:0]const u8,
	818	len: *usize,
	819	) void {
	820	ptr.* = cpu_features.builtin_str.ptr;
	821	len.* = cpu_features.builtin_str.len;
	822	}
	823
	824	// ABI warning
	825	export fn stage2_cpu_features_get_llvm_cpu(cpu_features: const Stage2CpuFeatures) ?[:0]const u8 {
	826	return if (cpu_features.cpu_features.cpu.llvm_name) \|s\| s.ptr else null;
	827	}
	828
	829	// ABI warning
	830	export fn stage2_cpu_features_get_llvm_features(cpu_features: const Stage2CpuFeatures) ?[:0]const u8 {
	831	return cpu_features.llvm_features_str;
	832	}

src/all_types.hpp+1

...	...	@@ -2174,6 +2174,7 @@ struct CodeGen {
2174	2174	bool verbose_llvm_ir;
2175	2175	bool verbose_cimport;
2176	2176	bool verbose_cc;
	2177	bool verbose_llvm_cpu_features;
2177	2178	bool error_during_imports;
2178	2179	bool generate_error_name_table;
2179	2180	bool enable_cache; // mutually exclusive with output_dir

src/codegen.cpp+49-41

...	...	@@ -30,11 +30,6 @@ enum ResumeId {
30	30	ResumeIdCall,
31	31	};
32	32
33		// TODO https://github.com/ziglang/zig/issues/2883
34		// Until then we have this same default as Clang.
35		// This avoids https://github.com/ziglang/zig/issues/3275
36		static const char *riscv_default_features = "+a,+c,+d,+f,+m,+relax";
37
38	33	static void init_darwin_native(CodeGen *g) {
39	34	char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET");
40	35	char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET");
...	...	@@ -8509,6 +8504,17 @@ Buf codegen_generate_builtin_source(CodeGen g) {
8509	8504	buf_appendf(contents, "pub const os = Os.%s;\n", cur_os);
8510	8505	buf_appendf(contents, "pub const arch = %s;\n", cur_arch);
8511	8506	buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi);
	8507	{
	8508	buf_append_str(contents, "pub const cpu_features: CpuFeatures = ");
	8509	if (g->zig_target->cpu_features != nullptr) {
	8510	const char *ptr;
	8511	size_t len;
	8512	stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len);
	8513	buf_append_mem(contents, ptr, len);
	8514	} else {
	8515	buf_append_str(contents, "arch.getBaselineCpuFeatures();\n");
	8516	}
	8517	}
8512	8518	if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) {
8513	8519	buf_appendf(contents,
8514	8520	"pub const glibc_version: ?Version = Version{.major = %d, .minor = %d, .patch = %d};\n",
...	...	@@ -8576,6 +8582,12 @@ static Error define_builtin_compile_vars(CodeGen *g) {
8576	8582	cache_int(&cache_hash, g->zig_target->vendor);
8577	8583	cache_int(&cache_hash, g->zig_target->os);
8578	8584	cache_int(&cache_hash, g->zig_target->abi);
	8585	if (g->zig_target->cpu_features != nullptr) {
	8586	const char *ptr;
	8587	size_t len;
	8588	stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
	8589	cache_str(&cache_hash, ptr);
	8590	}
8579	8591	if (g->zig_target->glibc_version != nullptr) {
8580	8592	cache_int(&cache_hash, g->zig_target->glibc_version->major);
8581	8593	cache_int(&cache_hash, g->zig_target->glibc_version->minor);
...	...	@@ -8700,37 +8712,25 @@ static void init(CodeGen *g) {
8700	8712	reloc_mode = LLVMRelocStatic;
8701	8713	}
8702	8714
8703		const char *target_specific_cpu_args;
8704		const char *target_specific_features;
	8715	const char *target_specific_cpu_args = "";
	8716	const char *target_specific_features = "";
	8717
8705	8718	if (g->zig_target->is_native) {
8706		// LLVM creates invalid binaries on Windows sometimes.
8707		// See https://github.com/ziglang/zig/issues/508
8708		// As a workaround we do not use target native features on Windows.
8709		if (g->zig_target->os == OsWindows \|\| g->zig_target->os == OsUefi) {
8710		target_specific_cpu_args = "";
8711		target_specific_features = "";
8712		} else {
8713		target_specific_cpu_args = ZigLLVMGetHostCPUName();
8714		target_specific_features = ZigLLVMGetNativeFeatures();
8715		}
8716		} else if (target_is_riscv(g->zig_target)) {
8717		// TODO https://github.com/ziglang/zig/issues/2883
8718		// Be aware of https://github.com/ziglang/zig/issues/3275
8719		target_specific_cpu_args = "";
8720		target_specific_features = riscv_default_features;
8721		} else if (g->zig_target->arch == ZigLLVM_x86) {
8722		// This is because we're really targeting i686 rather than i386.
8723		// It's pretty much impossible to use many of the language features
8724		// such as fp16 if you stick use the x87 only. This is also what clang
8725		// uses as base cpu.
8726		// TODO https://github.com/ziglang/zig/issues/2883
8727		target_specific_cpu_args = "pentium4";
8728		target_specific_features = (g->zig_target->os == OsFreestanding) ? "-sse": "";
8729		} else {
8730		target_specific_cpu_args = "";
8731		target_specific_features = "";
	8719	target_specific_cpu_args = ZigLLVMGetHostCPUName();
	8720	target_specific_features = ZigLLVMGetNativeFeatures();
8732	8721	}
8733	8722
	8723	// Override CPU and features if defined by user.
	8724	if (g->zig_target->cpu_features != nullptr) {
	8725	target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
	8726	target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
	8727	}
	8728	if (g->verbose_llvm_cpu_features) {
	8729	fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str));
	8730	fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
	8731	fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
	8732	}
	8733
8734	8734	g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
8735	8735	target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
8736	8736	LLVMCodeModelDefault, g->function_sections);
...	...	@@ -9061,21 +9061,22 @@ void add_cc_args(CodeGen g, ZigList<const char > &args, const char *out_dep_pa
9061	9061	args.append("-target");
9062	9062	args.append(buf_ptr(&g->llvm_triple_str));
9063	9063
9064		if (target_is_musl(g->zig_target) && target_is_riscv(g->zig_target)) {
9065		// Musl depends on atomic instructions, which are disabled by default in Clang/LLVM's
9066		// cross compilation CPU info for RISCV.
9067		// TODO: https://github.com/ziglang/zig/issues/2883
	9064	const char *llvm_cpu = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
	9065	if (llvm_cpu != nullptr) {
9068	9066	args.append("-Xclang");
9069		args.append("-target-feature");
	9067	args.append("-target-cpu");
9070	9068	args.append("-Xclang");
9071		args.append(riscv_default_features);
9072		} else if (g->zig_target->os == OsFreestanding && g->zig_target->arch == ZigLLVM_x86) {
	9069	args.append(llvm_cpu);
	9070	}
	9071	const char *llvm_target_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
	9072	if (llvm_target_features != nullptr) {
9073	9073	args.append("-Xclang");
9074	9074	args.append("-target-feature");
9075	9075	args.append("-Xclang");
9076		args.append("-sse");
	9076	args.append(llvm_target_features);
9077	9077	}
9078	9078	}
	9079
9079	9080	if (g->zig_target->os == OsFreestanding) {
9080	9081	args.append("-ffreestanding");
9081	9082	}
...	...	@@ -10270,6 +10271,12 @@ static Error check_cache(CodeGen g, Buf manifest_dir, Buf *digest) {
10270	10271	cache_int(ch, g->zig_target->vendor);
10271	10272	cache_int(ch, g->zig_target->os);
10272	10273	cache_int(ch, g->zig_target->abi);
	10274	if (g->zig_target->cpu_features != nullptr) {
	10275	const char *ptr;
	10276	size_t len;
	10277	stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
	10278	cache_str(ch, ptr);
	10279	}
10273	10280	if (g->zig_target->glibc_version != nullptr) {
10274	10281	cache_int(ch, g->zig_target->glibc_version->major);
10275	10282	cache_int(ch, g->zig_target->glibc_version->minor);
...	...	@@ -10610,6 +10617,7 @@ CodeGen create_child_codegen(CodeGen parent_gen, Buf *root_src_path, OutType o
10610	10617	child_gen->verbose_llvm_ir = parent_gen->verbose_llvm_ir;
10611	10618	child_gen->verbose_cimport = parent_gen->verbose_cimport;
10612	10619	child_gen->verbose_cc = parent_gen->verbose_cc;
	10620	child_gen->verbose_llvm_cpu_features = parent_gen->verbose_llvm_cpu_features;
10613	10621	child_gen->llvm_argv = parent_gen->llvm_argv;
10614	10622	child_gen->dynamic_linker_path = parent_gen->dynamic_linker_path;
10615	10623

src/error.cpp+6

...	...	@@ -58,6 +58,12 @@ const char *err_str(Error err) {
58	58	case ErrorNotLazy: return "not lazy";
59	59	case ErrorIsAsync: return "is async";
60	60	case ErrorImportOutsidePkgPath: return "import of file outside package path";
	61	case ErrorUnknownCpu: return "unknown CPU";
	62	case ErrorUnknownSubArchitecture: return "unknown sub-architecture";
	63	case ErrorUnknownCpuFeature: return "unknown CPU feature";
	64	case ErrorInvalidCpuFeatures: return "invalid CPU features";
	65	case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format";
	66	case ErrorUnknownApplicationBinaryInterface: return "unknown application binary interface";
61	67	}
62	68	return "(invalid error)";
63	69	}

src/ir.cpp+5-1

...	...	@@ -23262,7 +23262,11 @@ static IrInstGen ir_analyze_instruction_enum_tag_name(IrAnalyze ira, IrInstSrc
23262	23262	return ira->codegen->invalid_inst_gen;
23263	23263	}
23264	23264
23265		assert(target->value->type->id == ZigTypeIdEnum);
	23265	if (target->value->type->id != ZigTypeIdEnum) {
	23266	ir_add_error(ira, &target->base,
	23267	buf_sprintf("expected enum tag, found '%s'", buf_ptr(&target->value->type->name)));
	23268	return ira->codegen->invalid_inst_gen;
	23269	}
23266	23270
23267	23271	if (target->value->type->data.enumeration.src_field_count == 1 &&
23268	23272	!target->value->type->data.enumeration.non_exhaustive) {

src/main.cpp+25-86

...	...	@@ -93,6 +93,7 @@ static int print_full_usage(const char arg0, FILE file, int return_code) {
93	93	" --verbose-llvm-ir enable compiler debug output for LLVM IR\n"
94	94	" --verbose-cimport enable compiler debug output for C imports\n"
95	95	" --verbose-cc enable compiler debug output for C compilation\n"
	96	" --verbose-llvm-cpu-features enable compiler debug output for LLVM CPU features\n"
96	97	" -dirafter [dir] add directory to AFTER include search path\n"
97	98	" -isystem [dir] add directory to SYSTEM include search path\n"
98	99	" -I[dir] add directory to include search path\n"
...	...	@@ -100,6 +101,8 @@ static int print_full_usage(const char arg0, FILE file, int return_code) {
100	101	" --override-lib-dir [arg] override path to Zig lib directory\n"
101	102	" -ffunction-sections places each function in a separate section\n"
102	103	" -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n"
	104	" -target-cpu [cpu] target one specific CPU by name\n"
	105	" -target-feature [features] specify the set of CPU features to target\n"
103	106	"\n"
104	107	"Link Options:\n"
105	108	" --bundle-compiler-rt for static libraries, include compiler-rt symbols\n"
...	...	@@ -153,88 +156,6 @@ static int print_libc_usage(const char arg0, FILE file, int return_code) {
153	156	return return_code;
154	157	}
155	158
156		static bool arch_available_in_llvm(ZigLLVM_ArchType arch) {
157		LLVMTargetRef target_ref;
158		char *err_msg = nullptr;
159		char triple_string[128];
160		sprintf(triple_string, "%s-unknown-unknown-unknown", ZigLLVMGetArchTypeName(arch));
161		return !LLVMGetTargetFromTriple(triple_string, &target_ref, &err_msg);
162		}
163
164		static int print_target_list(FILE *f) {
165		ZigTarget native;
166		get_native_target(&native);
167
168		fprintf(f, "Architectures:\n");
169		size_t arch_count = target_arch_count();
170		for (size_t arch_i = 0; arch_i < arch_count; arch_i += 1) {
171		ZigLLVM_ArchType arch = target_arch_enum(arch_i);
172		if (!arch_available_in_llvm(arch))
173		continue;
174		const char *arch_name = target_arch_name(arch);
175		SubArchList sub_arch_list = target_subarch_list(arch);
176		size_t sub_count = target_subarch_count(sub_arch_list);
177		const char *arch_native_str = (native.arch == arch) ? " (native)" : "";
178		fprintf(f, " %s%s\n", arch_name, arch_native_str);
179		for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) {
180		ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
181		const char *sub_name = target_subarch_name(sub);
182		const char *sub_native_str = (native.arch == arch && native.sub_arch == sub) ? " (native)" : "";
183		fprintf(f, " %s%s\n", sub_name, sub_native_str);
184		}
185		}
186
187		fprintf(f, "\nOperating Systems:\n");
188		size_t os_count = target_os_count();
189		for (size_t i = 0; i < os_count; i += 1) {
190		Os os_type = target_os_enum(i);
191		const char *native_str = (native.os == os_type) ? " (native)" : "";
192		fprintf(f, " %s%s\n", target_os_name(os_type), native_str);
193		}
194
195		fprintf(f, "\nC ABIs:\n");
196		size_t abi_count = target_abi_count();
197		for (size_t i = 0; i < abi_count; i += 1) {
198		ZigLLVM_EnvironmentType abi = target_abi_enum(i);
199		const char *native_str = (native.abi == abi) ? " (native)" : "";
200		fprintf(f, " %s%s\n", target_abi_name(abi), native_str);
201		}
202
203		fprintf(f, "\nAvailable libcs:\n");
204		size_t libc_count = target_libc_count();
205		for (size_t i = 0; i < libc_count; i += 1) {
206		ZigTarget libc_target;
207		target_libc_enum(i, &libc_target);
208		bool is_native = native.arch == libc_target.arch &&
209		native.os == libc_target.os &&
210		native.abi == libc_target.abi;
211		const char *native_str = is_native ? " (native)" : "";
212		fprintf(f, " %s-%s-%s%s\n", target_arch_name(libc_target.arch),
213		target_os_name(libc_target.os), target_abi_name(libc_target.abi), native_str);
214		}
215
216		fprintf(f, "\nAvailable glibc versions:\n");
217		ZigGLibCAbi *glibc_abi;
218		Error err;
219		if ((err = glibc_load_metadata(&glibc_abi, get_zig_lib_dir(), true))) {
220		return EXIT_FAILURE;
221		}
222		for (size_t i = 0; i < glibc_abi->all_versions.length; i += 1) {
223		ZigGLibCVersion *this_ver = &glibc_abi->all_versions.at(i);
224		bool is_native = native.glibc_version != nullptr &&
225		native.glibc_version->major == this_ver->major &&
226		native.glibc_version->minor == this_ver->minor &&
227		native.glibc_version->patch == this_ver->patch;
228		const char *native_str = is_native ? " (native)" : "";
229		if (this_ver->patch == 0) {
230		fprintf(f, " %d.%d%s\n", this_ver->major, this_ver->minor, native_str);
231		} else {
232		fprintf(f, " %d.%d.%d%s\n", this_ver->major, this_ver->minor, this_ver->patch, native_str);
233		}
234		}
235		return EXIT_SUCCESS;
236		}
237
238	159	enum Cmd {
239	160	CmdNone,
240	161	CmdBuild,
...	...	@@ -478,6 +399,7 @@ int main(int argc, char **argv) {
478	399	bool verbose_llvm_ir = false;
479	400	bool verbose_cimport = false;
480	401	bool verbose_cc = false;
	402	bool verbose_llvm_cpu_features = false;
481	403	bool link_eh_frame_hdr = false;
482	404	ErrColor color = ErrColorAuto;
483	405	CacheOpt enable_cache = CacheOptAuto;
...	...	@@ -528,6 +450,8 @@ int main(int argc, char **argv) {
528	450	WantStackCheck want_stack_check = WantStackCheckAuto;
529	451	WantCSanitize want_sanitize_c = WantCSanitizeAuto;
530	452	bool function_sections = false;
	453	const char *cpu = nullptr;
	454	const char *features = nullptr;
531	455
532	456	ZigList<const char *> llvm_argv = {0};
533	457	llvm_argv.append("zig (LLVM option parsing)");
...	...	@@ -692,6 +616,8 @@ int main(int argc, char **argv) {
692	616	verbose_cimport = true;
693	617	} else if (strcmp(arg, "--verbose-cc") == 0) {
694	618	verbose_cc = true;
	619	} else if (strcmp(arg, "--verbose-llvm-cpu-features") == 0) {
	620	verbose_llvm_cpu_features = true;
695	621	} else if (strcmp(arg, "-rdynamic") == 0) {
696	622	rdynamic = true;
697	623	} else if (strcmp(arg, "--each-lib-rpath") == 0) {
...	...	@@ -936,6 +862,10 @@ int main(int argc, char **argv) {
936	862	, argv[i]);
937	863	return EXIT_FAILURE;
938	864	}
	865	} else if (strcmp(arg, "-target-cpu") == 0) {
	866	cpu = argv[i];
	867	} else if (strcmp(arg, "-target-feature") == 0) {
	868	features = argv[i];
939	869	} else {
940	870	fprintf(stderr, "Invalid argument: %s\n", arg);
941	871	return print_error_usage(arg0);
...	...	@@ -1051,15 +981,22 @@ int main(int argc, char **argv) {
1051	981	}
1052	982	}
1053	983
	984	Buf zig_triple_buf = BUF_INIT;
	985	target_triple_zig(&zig_triple_buf, &target);
	986
	987	const char *stage2_triple_arg = target.is_native ? nullptr : buf_ptr(&zig_triple_buf);
	988	if ((err = stage2_cpu_features_parse(&target.cpu_features, stage2_triple_arg, cpu, features))) {
	989	fprintf(stderr, "unable to initialize CPU features: %s\n", err_str(err));
	990	return main_exit(root_progress_node, EXIT_FAILURE);
	991	}
	992
1054	993	if (output_dir != nullptr && enable_cache == CacheOptOn) {
1055	994	fprintf(stderr, "`--output-dir` is incompatible with --cache on.\n");
1056	995	return print_error_usage(arg0);
1057	996	}
1058	997
1059	998	if (target_requires_pic(&target, have_libc) && want_pic == WantPICDisabled) {
1060		Buf triple_buf = BUF_INIT;
1061		target_triple_zig(&triple_buf, &target);
1062		fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&triple_buf));
	999	fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&zig_triple_buf));
1063	1000	return print_error_usage(arg0);
1064	1001	}
1065	1002
...	...	@@ -1226,6 +1163,7 @@ int main(int argc, char **argv) {
1226	1163	g->verbose_llvm_ir = verbose_llvm_ir;
1227	1164	g->verbose_cimport = verbose_cimport;
1228	1165	g->verbose_cc = verbose_cc;
	1166	g->verbose_llvm_cpu_features = verbose_llvm_cpu_features;
1229	1167	g->output_dir = output_dir;
1230	1168	g->disable_gen_h = disable_gen_h;
1231	1169	g->bundle_compiler_rt = bundle_compiler_rt;
...	...	@@ -1233,6 +1171,7 @@ int main(int argc, char **argv) {
1233	1171	g->system_linker_hack = system_linker_hack;
1234	1172	g->function_sections = function_sections;
1235	1173
	1174
1236	1175	for (size_t i = 0; i < lib_dirs.length; i += 1) {
1237	1176	codegen_add_lib_dir(g, lib_dirs.at(i));
1238	1177	}
...	...	@@ -1413,7 +1352,7 @@ int main(int argc, char **argv) {
1413	1352	return main_exit(root_progress_node, EXIT_SUCCESS);
1414	1353	}
1415	1354	case CmdTargets:
1416		return print_target_list(stdout);
	1355	return stage2_cmd_targets(buf_ptr(&zig_triple_buf));
1417	1356	case CmdNone:
1418	1357	return print_full_usage(arg0, stderr, EXIT_FAILURE);
1419	1358	}

src/target.cpp+6-9

...	...	@@ -57,9 +57,6 @@ static const ZigLLVM_SubArchType subarch_list_arm64[] = {
57	57	ZigLLVM_ARMSubArch_v8_2a,
58	58	ZigLLVM_ARMSubArch_v8_1a,
59	59	ZigLLVM_ARMSubArch_v8,
60		ZigLLVM_ARMSubArch_v8r,
61		ZigLLVM_ARMSubArch_v8m_baseline,
62		ZigLLVM_ARMSubArch_v8m_mainline,
63	60	};
64	61
65	62	static const ZigLLVM_SubArchType subarch_list_kalimba[] = {
...	...	@@ -683,7 +680,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
683	680	case ZigLLVM_ARMSubArch_v8_1a:
684	681	return "v8_1a";
685	682	case ZigLLVM_ARMSubArch_v8:
686		return "v8";
	683	return "v8a";
687	684	case ZigLLVM_ARMSubArch_v8r:
688	685	return "v8r";
689	686	case ZigLLVM_ARMSubArch_v8m_baseline:
...	...	@@ -693,7 +690,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
693	690	case ZigLLVM_ARMSubArch_v8_1m_mainline:
694	691	return "v8_1m_mainline";
695	692	case ZigLLVM_ARMSubArch_v7:
696		return "v7";
	693	return "v7a";
697	694	case ZigLLVM_ARMSubArch_v7em:
698	695	return "v7em";
699	696	case ZigLLVM_ARMSubArch_v7m:
...	...	@@ -832,10 +829,10 @@ void init_all_targets(void) {
832	829	void target_triple_zig(Buf triple, const ZigTarget target) {
833	830	buf_resize(triple, 0);
834	831	buf_appendf(triple, "%s%s-%s-%s",
835		ZigLLVMGetArchTypeName(target->arch),
836		ZigLLVMGetSubArchTypeName(target->sub_arch),
837		ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)),
838		ZigLLVMGetEnvironmentTypeName(target->abi));
	832	target_arch_name(target->arch),
	833	target_subarch_name(target->sub_arch),
	834	target_os_name(target->os),
	835	target_abi_name(target->abi));
839	836	}
840	837
841	838	void target_triple_llvm(Buf triple, const ZigTarget target) {

src/target.hpp+1

...	...	@@ -91,6 +91,7 @@ struct ZigTarget {
91	91	Os os;
92	92	ZigLLVM_EnvironmentType abi;
93	93	ZigGLibCVersion *glibc_version; // null means default
	94	Stage2CpuFeatures *cpu_features;
94	95	bool is_native;
95	96	};
96	97

src/userland.cpp+57-1

...	...	@@ -2,7 +2,8 @@
2	2	// src-self-hosted/stage1.zig
3	3
4	4	#include "userland.h"
5		#include "ast_render.hpp"
	5	#include "util.hpp"
	6	#include "zig_llvm.h"
6	7	#include <stdio.h>
7	8	#include <stdlib.h>
8	9	#include <string.h>
...	...	@@ -88,3 +89,58 @@ void stage2_progress_end(Stage2ProgressNode *node) {}
88	89	void stage2_progress_complete_one(Stage2ProgressNode *node) {}
89	90	void stage2_progress_disable_tty(Stage2Progress *progress) {}
90	91	void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
	92
	93	struct Stage2CpuFeatures {
	94	const char *llvm_cpu_name;
	95	const char *llvm_cpu_features;
	96	const char *builtin_str;
	97	const char *cache_hash;
	98	};
	99
	100	Error stage2_cpu_features_parse(struct Stage2CpuFeatures *out, const char zig_triple,
	101	const char cpu_name, const char cpu_features)
	102	{
	103	if (zig_triple == nullptr) {
	104	Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
	105	result->llvm_cpu_name = ZigLLVMGetHostCPUName();
	106	result->llvm_cpu_features = ZigLLVMGetNativeFeatures();
	107	result->builtin_str = "arch.getBaselineCpuFeatures();\n";
	108	result->cache_hash = "native\n\n";
	109	*out = result;
	110	return ErrorNone;
	111	}
	112	if (cpu_name == nullptr && cpu_features == nullptr) {
	113	Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
	114	result->builtin_str = "arch.getBaselineCpuFeatures();\n";
	115	result->cache_hash = "\n\n";
	116	*out = result;
	117	return ErrorNone;
	118	}
	119
	120	const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features";
	121	stage2_panic(msg, strlen(msg));
	122	}
	123
	124	void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
	125	const char *ptr, size_t len)
	126	{
	127	*ptr = cpu_features->cache_hash;
	128	*len = strlen(cpu_features->cache_hash);
	129	}
	130	const char stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures cpu_features) {
	131	return cpu_features->llvm_cpu_name;
	132	}
	133	const char stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures cpu_features) {
	134	return cpu_features->llvm_cpu_features;
	135	}
	136	void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
	137	const char *ptr, size_t len)
	138	{
	139	*ptr = cpu_features->builtin_str;
	140	*len = strlen(cpu_features->builtin_str);
	141	}
	142
	143	int stage2_cmd_targets(const char *zig_triple) {
	144	const char *msg = "stage0 called stage2_cmd_targets";
	145	stage2_panic(msg, strlen(msg));
	146	}

src/userland.h+31

...	...	@@ -78,6 +78,12 @@ enum Error {
78	78	ErrorNotLazy,
79	79	ErrorIsAsync,
80	80	ErrorImportOutsidePkgPath,
	81	ErrorUnknownCpu,
	82	ErrorUnknownSubArchitecture,
	83	ErrorUnknownCpuFeature,
	84	ErrorInvalidCpuFeatures,
	85	ErrorInvalidLlvmCpuFeaturesFormat,
	86	ErrorUnknownApplicationBinaryInterface,
81	87	};
82	88
83	89	// ABI warning
...	...	@@ -174,4 +180,29 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);
174	180	ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
175	181	size_t completed_count, size_t estimated_total_items);
176	182
	183	// ABI warning
	184	struct Stage2CpuFeatures;
	185
	186	// ABI warning
	187	ZIG_EXTERN_C Error stage2_cpu_features_parse(struct Stage2CpuFeatures **result,
	188	const char zig_triple, const char cpu_name, const char *cpu_features);
	189
	190	// ABI warning
	191	ZIG_EXTERN_C const char stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures cpu_features);
	192
	193	// ABI warning
	194	ZIG_EXTERN_C const char stage2_cpu_features_get_llvm_features(const struct Stage2CpuFeatures cpu_features);
	195
	196	// ABI warning
	197	ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeatures *cpu_features,
	198	const char *ptr, size_t len);
	199
	200	// ABI warning
	201	ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features,
	202	const char *ptr, size_t len);
	203
	204	// ABI warning
	205	ZIG_EXTERN_C int stage2_cmd_targets(const char *zig_triple);
	206
	207
177	208	#endif

src/zig_llvm.cpp+2-2

...	...	@@ -821,7 +821,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
821	821	case ZigLLVM_ARMSubArch_v8_1a:
822	822	return "v8.1a";
823	823	case ZigLLVM_ARMSubArch_v8:
824		return "v8";
	824	return "v8a";
825	825	case ZigLLVM_ARMSubArch_v8r:
826	826	return "v8r";
827	827	case ZigLLVM_ARMSubArch_v8m_baseline:
...	...	@@ -831,7 +831,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
831	831	case ZigLLVM_ARMSubArch_v8_1m_mainline:
832	832	return "v8.1m.main";
833	833	case ZigLLVM_ARMSubArch_v7:
834		return "v7";
	834	return "v7a";
835	835	case ZigLLVM_ARMSubArch_v7em:
836	836	return "v7em";
837	837	case ZigLLVM_ARMSubArch_v7m:

test/compile_errors.zig+7-4

...	...	@@ -1,5 +1,6 @@
1	1	const tests = @import("tests.zig");
2	2	const builtin = @import("builtin");
	3	const Target = @import("std").Target;
3	4
4	5	pub fn addCases(cases: *tests.CompileErrorContext) void {
5	6	cases.addTest("non-exhaustive enums",
...	...	@@ -272,9 +273,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
272	273	, &[_][]const u8{
273	274	"tmp.zig:3:5: error: target arch 'wasm32' does not support calling with a new stack",
274	275	});
275		tc.target = tests.Target{
276		.Cross = tests.CrossTarget{
	276	tc.target = Target{
	277	.Cross = .{
277	278	.arch = .wasm32,
	279	.cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(),
278	280	.os = .wasi,
279	281	.abi = .none,
280	282	},
...	...	@@ -673,9 +675,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
673	675	, &[_][]const u8{
674	676	"tmp.zig:2:14: error: could not find 'foo' in the inputs or outputs",
675	677	});
676		tc.target = tests.Target{
677		.Cross = tests.CrossTarget{
	678	tc.target = Target{
	679	.Cross = .{
678	680	.arch = .x86_64,
	681	.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
679	682	.os = .linux,
680	683	.abi = .gnu,
681	684	},

test/stage1/behavior/math.zig+8

...	...	@@ -529,6 +529,10 @@ test "comptime_int xor" {
529	529	}
530	530
531	531	test "f128" {
	532	if (std.Target.current.isWindows()) {
	533	// TODO https://github.com/ziglang/zig/issues/508
	534	return error.SkipZigTest;
	535	}
532	536	test_f128();
533	537	comptime test_f128();
534	538	}
...	...	@@ -627,6 +631,10 @@ test "NaN comparison" {
627	631	// TODO: https://github.com/ziglang/zig/issues/3338
628	632	return error.SkipZigTest;
629	633	}
	634	if (std.Target.current.isWindows()) {
	635	// TODO https://github.com/ziglang/zig/issues/508
	636	return error.SkipZigTest;
	637	}
630	638	testNanEqNan(f16);
631	639	testNanEqNan(f32);
632	640	testNanEqNan(f64);

test/tests.zig+220-196

...	...	@@ -38,236 +38,260 @@ const TestTarget = struct {
38	38	disable_native: bool = false,
39	39	};
40	40
41		const test_targets = [_]TestTarget{
42		TestTarget{},
43		TestTarget{
44		.link_libc = true,
45		},
46		TestTarget{
47		.single_threaded = true,
48		},
49
50		TestTarget{
51		.target = Target{
52		.Cross = CrossTarget{
53		.os = .linux,
54		.arch = .x86_64,
55		.abi = .none,
	41	const test_targets = blk: {
	42	// getBaselineCpuFeatures calls populateDependencies which has a O(N ^ 2) algorithm
	43	// (where N is roughly 160, which technically makes it O(1), but it adds up to a
	44	// lot of branches)
	45	@setEvalBranchQuota(50000);
	46	break :blk [_]TestTarget{
	47	TestTarget{},
	48	TestTarget{
	49	.link_libc = true,
	50	},
	51	TestTarget{
	52	.single_threaded = true,
	53	},
	54
	55	TestTarget{
	56	.target = Target{
	57	.Cross = CrossTarget{
	58	.os = .linux,
	59	.arch = .x86_64,
	60	.abi = .none,
	61	.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
	62	},
56	63	},
57	64	},
58		},
59		TestTarget{
60		.target = Target{
61		.Cross = CrossTarget{
62		.os = .linux,
63		.arch = .x86_64,
64		.abi = .gnu,
	65	TestTarget{
	66	.target = Target{
	67	.Cross = CrossTarget{
	68	.os = .linux,
	69	.arch = .x86_64,
	70	.abi = .gnu,
	71	.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
	72	},
65	73	},
	74	.link_libc = true,
66	75	},
67		.link_libc = true,
68		},
69		TestTarget{
70		.target = Target{
71		.Cross = CrossTarget{
72		.os = .linux,
73		.arch = .x86_64,
74		.abi = .musl,
	76	TestTarget{
	77	.target = Target{
	78	.Cross = CrossTarget{
	79	.os = .linux,
	80	.arch = .x86_64,
	81	.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
	82	.abi = .musl,
	83	},
75	84	},
	85	.link_libc = true,
76	86	},
77		.link_libc = true,
78		},
79
80		TestTarget{
81		.target = Target{
82		.Cross = CrossTarget{
83		.os = .linux,
84		.arch = .i386,
85		.abi = .none,
	87
	88	TestTarget{
	89	.target = Target{
	90	.Cross = CrossTarget{
	91	.os = .linux,
	92	.arch = .i386,
	93	.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
	94	.abi = .none,
	95	},
86	96	},
87	97	},
88		},
89		TestTarget{
90		.target = Target{
91		.Cross = CrossTarget{
92		.os = .linux,
93		.arch = .i386,
94		.abi = .musl,
	98	TestTarget{
	99	.target = Target{
	100	.Cross = CrossTarget{
	101	.os = .linux,
	102	.arch = .i386,
	103	.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
	104	.abi = .musl,
	105	},
95	106	},
	107	.link_libc = true,
96	108	},
97		.link_libc = true,
98		},
99
100		TestTarget{
101		.target = Target{
102		.Cross = CrossTarget{
103		.os = .linux,
104		.arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
105		.abi = .none,
	109
	110	TestTarget{
	111	.target = Target{
	112	.Cross = CrossTarget{
	113	.os = .linux,
	114	.arch = Target.Arch{ .aarch64 = .v8a },
	115	.cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
	116	.abi = .none,
	117	},
106	118	},
107	119	},
108		},
109		TestTarget{
110		.target = Target{
111		.Cross = CrossTarget{
112		.os = .linux,
113		.arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
114		.abi = .musl,
	120	TestTarget{
	121	.target = Target{
	122	.Cross = CrossTarget{
	123	.os = .linux,
	124	.arch = Target.Arch{ .aarch64 = .v8a },
	125	.cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
	126	.abi = .musl,
	127	},
115	128	},
	129	.link_libc = true,
116	130	},
117		.link_libc = true,
118		},
119		TestTarget{
120		.target = Target{
121		.Cross = CrossTarget{
122		.os = .linux,
123		.arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
124		.abi = .gnu,
	131	TestTarget{
	132	.target = Target{
	133	.Cross = CrossTarget{
	134	.os = .linux,
	135	.arch = Target.Arch{ .aarch64 = .v8a },
	136	.cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
	137	.abi = .gnu,
	138	},
125	139	},
	140	.link_libc = true,
126	141	},
127		.link_libc = true,
128		},
129
130		TestTarget{
131		.target = Target{
132		.Cross = CrossTarget{
133		.os = .linux,
134		.arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
135		.abi = .none,
	142
	143	TestTarget{
	144	.target = Target{
	145	.Cross = CrossTarget{
	146	.os = .linux,
	147	.arch = Target.Arch{ .arm = .v8a },
	148	.cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
	149	.abi = .none,
	150	},
136	151	},
137	152	},
138		},
139		TestTarget{
140		.target = Target{
141		.Cross = CrossTarget{
142		.os = .linux,
143		.arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
144		.abi = .musleabihf,
	153	TestTarget{
	154	.target = Target{
	155	.Cross = CrossTarget{
	156	.os = .linux,
	157	.arch = Target.Arch{ .arm = .v8a },
	158	.cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
	159	.abi = .musleabihf,
	160	},
145	161	},
	162	.link_libc = true,
146	163	},
147		.link_libc = true,
148		},
149		// TODO https://github.com/ziglang/zig/issues/3287
150		//TestTarget{
151		// .target = Target{
152		// .Cross = CrossTarget{
153		// .os = .linux,
154		// .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
155		// .abi = .gnueabihf,
156		// },
157		// },
158		// .link_libc = true,
159		//},
160
161		TestTarget{
162		.target = Target{
163		.Cross = CrossTarget{
164		.os = .linux,
165		.arch = .mipsel,
166		.abi = .none,
	164	// TODO https://github.com/ziglang/zig/issues/3287
	165	//TestTarget{
	166	// .target = Target{
	167	// .Cross = CrossTarget{
	168	// .os = .linux,
	169	// .arch = Target.Arch{ .arm = .v8a },
	170	// .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
	171	// .abi = .gnueabihf,
	172	// },
	173	// },
	174	// .link_libc = true,
	175	//},
	176
	177	TestTarget{
	178	.target = Target{
	179	.Cross = CrossTarget{
	180	.os = .linux,
	181	.arch = .mipsel,
	182	.cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
	183	.abi = .none,
	184	},
167	185	},
168	186	},
169		},
170		TestTarget{
171		.target = Target{
172		.Cross = CrossTarget{
173		.os = .linux,
174		.arch = .mipsel,
175		.abi = .musl,
	187	TestTarget{
	188	.target = Target{
	189	.Cross = CrossTarget{
	190	.os = .linux,
	191	.arch = .mipsel,
	192	.cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
	193	.abi = .musl,
	194	},
176	195	},
	196	.link_libc = true,
177	197	},
178		.link_libc = true,
179		},
180
181		TestTarget{
182		.target = Target{
183		.Cross = CrossTarget{
184		.os = .macosx,
185		.arch = .x86_64,
186		.abi = .gnu,
	198
	199	TestTarget{
	200	.target = Target{
	201	.Cross = CrossTarget{
	202	.os = .macosx,
	203	.arch = .x86_64,
	204	.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
	205	.abi = .gnu,
	206	},
187	207	},
	208	// TODO https://github.com/ziglang/zig/issues/3295
	209	.disable_native = true,
188	210	},
189		// TODO https://github.com/ziglang/zig/issues/3295
190		.disable_native = true,
191		},
192
193		TestTarget{
194		.target = Target{
195		.Cross = CrossTarget{
196		.os = .windows,
197		.arch = .i386,
198		.abi = .msvc,
	211
	212	TestTarget{
	213	.target = Target{
	214	.Cross = CrossTarget{
	215	.os = .windows,
	216	.arch = .i386,
	217	.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
	218	.abi = .msvc,
	219	},
199	220	},
200	221	},
201		},
202
203		TestTarget{
204		.target = Target{
205		.Cross = CrossTarget{
206		.os = .windows,
207		.arch = .x86_64,
208		.abi = .msvc,
	222
	223	TestTarget{
	224	.target = Target{
	225	.Cross = CrossTarget{
	226	.os = .windows,
	227	.arch = .x86_64,
	228	.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
	229	.abi = .msvc,
	230	},
209	231	},
210	232	},
211		},
212
213		TestTarget{
214		.target = Target{
215		.Cross = CrossTarget{
216		.os = .windows,
217		.arch = .i386,
218		.abi = .gnu,
	233
	234	TestTarget{
	235	.target = Target{
	236	.Cross = CrossTarget{
	237	.os = .windows,
	238	.arch = .i386,
	239	.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
	240	.abi = .gnu,
	241	},
219	242	},
	243	.link_libc = true,
220	244	},
221		.link_libc = true,
222		},
223
224		TestTarget{
225		.target = Target{
226		.Cross = CrossTarget{
227		.os = .windows,
228		.arch = .x86_64,
229		.abi = .gnu,
	245
	246	TestTarget{
	247	.target = Target{
	248	.Cross = CrossTarget{
	249	.os = .windows,
	250	.arch = .x86_64,
	251	.cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
	252	.abi = .gnu,
	253	},
230	254	},
	255	.link_libc = true,
	256	},
	257
	258	// Do the release tests last because they take a long time
	259	TestTarget{
	260	.mode = .ReleaseFast,
	261	},
	262	TestTarget{
	263	.link_libc = true,
	264	.mode = .ReleaseFast,
231	265	},
232		.link_libc = true,
233		},
234
235		// Do the release tests last because they take a long time
236		TestTarget{
237		.mode = .ReleaseFast,
238		},
239		TestTarget{
240		.link_libc = true,
241		.mode = .ReleaseFast,
242		},
243		TestTarget{
244		.mode = .ReleaseFast,
245		.single_threaded = true,
246		},
247
248		TestTarget{
249		.mode = .ReleaseSafe,
250		},
251		TestTarget{
252		.link_libc = true,
253		.mode = .ReleaseSafe,
254		},
255		TestTarget{
256		.mode = .ReleaseSafe,
257		.single_threaded = true,
258		},
259
260		TestTarget{
261		.mode = .ReleaseSmall,
262		},
263		TestTarget{
264		.link_libc = true,
265		.mode = .ReleaseSmall,
266		},
267		TestTarget{
268		.mode = .ReleaseSmall,
269		.single_threaded = true,
270		},
	266	TestTarget{
	267	.mode = .ReleaseFast,
	268	.single_threaded = true,
	269	},
	270
	271	TestTarget{
	272	.mode = .ReleaseSafe,
	273	},
	274	TestTarget{
	275	.link_libc = true,
	276	.mode = .ReleaseSafe,
	277	},
	278	TestTarget{
	279	.mode = .ReleaseSafe,
	280	.single_threaded = true,
	281	},
	282
	283	TestTarget{
	284	.mode = .ReleaseSmall,
	285	},
	286	TestTarget{
	287	.link_libc = true,
	288	.mode = .ReleaseSmall,
	289	},
	290	TestTarget{
	291	.mode = .ReleaseSmall,
	292	.single_threaded = true,
	293	},
	294	};
271	295	};
272	296
273	297	const max_stdout_size = 1 * 1024 * 1024; // 1 MB

test/translate_c.zig+19-3

...	...	@@ -1,5 +1,6 @@
1	1	const tests = @import("tests.zig");
2	2	const builtin = @import("builtin");
	3	const Target = @import("std").Target;
3	4
4	5	pub fn addCases(cases: *tests.TranslateCContext) void {
5	6	cases.add("array initializer w/ typedef",
...	...	@@ -1030,7 +1031,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1030	1031	});
1031	1032
1032	1033	cases.addWithTarget("Calling convention", tests.Target{
1033		.Cross = .{ .os = .linux, .arch = .i386, .abi = .none },
	1034	.Cross = .{
	1035	.os = .linux,
	1036	.arch = .i386,
	1037	.abi = .none,
	1038	.cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
	1039	},
1034	1040	},
1035	1041	\\void __attribute__((fastcall)) foo1(float *a);
1036	1042	\\void __attribute__((stdcall)) foo2(float *a);
...	...	@@ -1046,7 +1052,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1046	1052	});
1047	1053
1048	1054	cases.addWithTarget("Calling convention", tests.Target{
1049		.Cross = .{ .os = .linux, .arch = .{ .arm = .v8_5a }, .abi = .none },
	1055	.Cross = .{
	1056	.os = .linux,
	1057	.arch = .{ .arm = .v8_5a },
	1058	.abi = .none,
	1059	.cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
	1060	},
1050	1061	},
1051	1062	\\void __attribute__((pcs("aapcs"))) foo1(float *a);
1052	1063	\\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a);
...	...	@@ -1056,7 +1067,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1056	1067	});
1057	1068
1058	1069	cases.addWithTarget("Calling convention", tests.Target{
1059		.Cross = .{ .os = .linux, .arch = .{ .aarch64 = .v8_5a }, .abi = .none },
	1070	.Cross = .{
	1071	.os = .linux,
	1072	.arch = .{ .aarch64 = .v8_5a },
	1073	.abi = .none,
	1074	.cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
	1075	},
1060	1076	},
1061	1077	\\void __attribute__((aarch64_vector_pcs)) foo1(float *a);
1062	1078	, &[_][]const u8{