authorgravatar for david@vortan.devDavid Rubin <david@vortan.dev> 2024-07-26 08:49:34-07:00
committergravatar for david@vortan.devDavid Rubin <david@vortan.dev> 2024-07-26 08:49:34-07:00
log9752bbfeb3091b5ee812f3892738a8f1731cb4d3
tree9b2f0c7f4a114b5bd120e0b931484840904778fe
parent8da212c11bc54bb78950988f5980c78161af8573
signaturelock-open Commit is signed but in an unrecognized format.

riscv: implement basic tlv loads and stores

6 files changed, 133 insertions(+), 14 deletions(-)

src/arch/riscv64/CodeGen.zig+75-12
......@@ -163,8 +163,12 @@ const MCValue = union(enum) {
163163 immediate: u64,
164164 /// The value doesn't exist in memory yet.
165165 load_symbol: SymbolOffset,
166 /// A TLV value.
167 load_tlv: u32,
166168 /// The address of the memory location not-yet-allocated by the linker.
167169 lea_symbol: SymbolOffset,
170 /// The address of a TLV value.
171 lea_tlv: u32,
168172 /// The value is in a target-specific register.
169173 register: Register,
170174 /// The value is split across two registers
......@@ -221,6 +225,7 @@ const MCValue = union(enum) {
221225 .lea_frame,
222226 .undef,
223227 .lea_symbol,
228 .lea_tlv,
224229 .air_ref,
225230 .reserved_frame,
226231 => false,
......@@ -230,6 +235,7 @@ const MCValue = union(enum) {
230235 .register_offset,
231236 .load_frame,
232237 .load_symbol,
238 .load_tlv,
233239 .indirect,
234240 => true,
235241 };
......@@ -248,10 +254,12 @@ const MCValue = union(enum) {
248254 .undef,
249255 .air_ref,
250256 .lea_symbol,
257 .lea_tlv,
251258 .reserved_frame,
252259 => unreachable, // not in memory
253260
254261 .load_symbol => |sym_off| .{ .lea_symbol = sym_off },
262 .load_tlv => |sym| .{ .lea_tlv = sym },
255263 .memory => |addr| .{ .immediate = addr },
256264 .load_frame => |off| .{ .lea_frame = off },
257265 .indirect => |reg_off| switch (reg_off.off) {
......@@ -270,17 +278,19 @@ const MCValue = union(enum) {
270278 .indirect,
271279 .undef,
272280 .air_ref,
273 .load_frame,
274281 .register_pair,
282 .load_frame,
275283 .load_symbol,
284 .load_tlv,
276285 .reserved_frame,
277286 => unreachable, // not a pointer
278287
279288 .immediate => |addr| .{ .memory = addr },
280 .lea_frame => |off| .{ .load_frame = off },
281289 .register => |reg| .{ .indirect = .{ .reg = reg } },
282290 .register_offset => |reg_off| .{ .indirect = reg_off },
291 .lea_frame => |off| .{ .load_frame = off },
283292 .lea_symbol => |sym_off| .{ .load_symbol = sym_off },
293 .lea_tlv => |sym| .{ .load_tlv = sym },
284294 };
285295 }
286296
......@@ -298,6 +308,8 @@ const MCValue = union(enum) {
298308 .indirect,
299309 .load_symbol,
300310 .lea_symbol,
311 .lea_tlv,
312 .load_tlv,
301313 => switch (off) {
302314 0 => mcv,
303315 else => unreachable,
......@@ -355,6 +367,8 @@ const InstTracking = struct {
355367 .memory,
356368 .load_frame,
357369 .lea_frame,
370 .load_tlv,
371 .lea_tlv,
358372 .load_symbol,
359373 .lea_symbol,
360374 => result,
......@@ -410,6 +424,8 @@ const InstTracking = struct {
410424 .lea_frame,
411425 .load_symbol,
412426 .lea_symbol,
427 .load_tlv,
428 .lea_tlv,
413429 => inst_tracking.long,
414430 .dead,
415431 .register,
......@@ -438,6 +454,8 @@ const InstTracking = struct {
438454 .lea_frame,
439455 .load_symbol,
440456 .lea_symbol,
457 .load_tlv,
458 .lea_tlv,
441459 => assert(std.meta.eql(inst_tracking.long, target.long)),
442460 .load_frame,
443461 .reserved_frame,
......@@ -3510,17 +3528,19 @@ fn airWrapOptional(func: *Func, inst: Air.Inst.Index) !void {
35103528 defer if (pl_lock) |lock| func.register_manager.unlockReg(lock);
35113529
35123530 const opt_mcv = try func.allocRegOrMem(opt_ty, inst, true);
3513 try func.genCopy(pl_ty, opt_mcv, pl_mcv);
35143531
35153532 if (!same_repr) {
35163533 const pl_abi_size: i32 = @intCast(pl_ty.abiSize(pt));
35173534 switch (opt_mcv) {
3518 .load_frame => |frame_addr| try func.genSetMem(
3519 .{ .frame = frame_addr.index },
3520 frame_addr.off + pl_abi_size,
3521 Type.u8,
3522 .{ .immediate = 1 },
3523 ),
3535 .load_frame => |frame_addr| {
3536 try func.genCopy(pl_ty, opt_mcv, pl_mcv);
3537 try func.genSetMem(
3538 .{ .frame = frame_addr.index },
3539 frame_addr.off + pl_abi_size,
3540 Type.u8,
3541 .{ .immediate = 1 },
3542 );
3543 },
35243544
35253545 .register => |opt_reg| {
35263546 try func.genBinOp(
......@@ -3531,6 +3551,7 @@ fn airWrapOptional(func: *Func, inst: Air.Inst.Index) !void {
35313551 Type.u64,
35323552 opt_reg,
35333553 );
3554 try func.genCopy(pl_ty, opt_mcv, pl_mcv);
35343555 },
35353556 else => unreachable,
35363557 }
......@@ -4457,12 +4478,14 @@ fn load(func: *Func, dst_mcv: MCValue, ptr_mcv: MCValue, ptr_ty: Type) InnerErro
44574478 .register_offset,
44584479 .lea_frame,
44594480 .lea_symbol,
4481 .lea_tlv,
44604482 => try func.genCopy(dst_ty, dst_mcv, ptr_mcv.deref()),
44614483
44624484 .memory,
44634485 .indirect,
44644486 .load_symbol,
44654487 .load_frame,
4488 .load_tlv,
44664489 => {
44674490 const addr_reg = try func.copyToTmpRegister(ptr_ty, ptr_mcv);
44684491 const addr_lock = func.register_manager.lockRegAssumeUnused(addr_reg);
......@@ -4509,12 +4532,14 @@ fn store(func: *Func, ptr_mcv: MCValue, src_mcv: MCValue, ptr_ty: Type) !void {
45094532 .register_offset,
45104533 .lea_symbol,
45114534 .lea_frame,
4535 .lea_tlv,
45124536 => try func.genCopy(src_ty, ptr_mcv.deref(), src_mcv),
45134537
45144538 .memory,
45154539 .indirect,
45164540 .load_symbol,
45174541 .load_frame,
4542 .load_tlv,
45184543 => {
45194544 const addr_reg = try func.copyToTmpRegister(ptr_ty, ptr_mcv);
45204545 const addr_lock = func.register_manager.lockRegAssumeUnused(addr_reg);
......@@ -5989,7 +6014,14 @@ fn airAsm(func: *Func, inst: Air.Inst.Index) !void {
59896014 try func.register_manager.getReg(reg, null);
59906015 try func.genSetReg(ty, reg, input_mcv);
59916016 break :arg .{ .register = reg };
5992 } else return func.fail("invalid constraint: '{s}'", .{constraint});
6017 } else if (mem.eql(u8, constraint, "r")) arg: {
6018 switch (input_mcv) {
6019 .register => break :arg input_mcv,
6020 else => {},
6021 }
6022 const temp_reg = try func.copyToTmpRegister(ty, input_mcv);
6023 break :arg .{ .register = temp_reg };
6024 } else return func.fail("invalid input constraint: '{s}'", .{constraint});
59936025 if (arg_mcv.getReg()) |reg| if (RegisterManager.indexOfRegIntoTracked(reg)) |_| {
59946026 _ = func.register_manager.lockReg(reg);
59956027 };
......@@ -6071,6 +6103,10 @@ fn airAsm(func: *Func, inst: Air.Inst.Index) !void {
60716103 assert(sym_off.off == 0);
60726104 break :blk .{ .sym = sym_off };
60736105 } else return func.fail("invalid modifier: '{s}'", .{modifier}),
6106 .register => |reg| if (modifier.len == 0)
6107 .{ .reg = reg }
6108 else
6109 return func.fail("invalid modified '{s}'", .{modifier}),
60746110 else => return func.fail("invalid constraint: '{s}'", .{op_str}),
60756111 };
60766112 } else return func.fail("invalid operand: '{s}'", .{op_str});
......@@ -6253,6 +6289,13 @@ fn genCopy(func: *Func, ty: Type, dst_mcv: MCValue, src_mcv: MCValue) !void {
62536289 ty,
62546290 src_mcv,
62556291 ),
6292 .load_tlv => {
6293 const addr_reg, const addr_lock = try func.allocReg(.int);
6294 defer func.register_manager.unlockReg(addr_lock);
6295
6296 try func.genSetReg(ty, addr_reg, dst_mcv.address());
6297 try func.genCopy(ty, .{ .indirect = .{ .reg = addr_reg } }, src_mcv);
6298 },
62566299 .memory => return func.fail("TODO: genCopy memory", .{}),
62576300 .register_pair => |dst_regs| {
62586301 const src_info: ?struct { addr_reg: Register, addr_lock: ?RegisterLock } = switch (src_mcv) {
......@@ -6774,6 +6817,25 @@ fn genSetReg(func: *Func, ty: Type, reg: Register, src_mcv: MCValue) InnerError!
67746817 try func.genSetReg(ty, addr_reg, src_mcv.address());
67756818 try func.genSetReg(ty, reg, .{ .indirect = .{ .reg = addr_reg } });
67766819 },
6820 .lea_tlv => |sym| {
6821 const atom_index = try func.owner.getSymbolIndex(func);
6822
6823 _ = try func.addInst(.{
6824 .tag = .pseudo_load_tlv,
6825 .data = .{ .reloc = .{
6826 .register = reg,
6827 .atom_index = atom_index,
6828 .sym_index = sym,
6829 } },
6830 });
6831 },
6832 .load_tlv => {
6833 const addr_reg, const addr_lock = try func.allocReg(.int);
6834 defer func.register_manager.unlockReg(addr_lock);
6835
6836 try func.genSetReg(ty, addr_reg, src_mcv.address());
6837 try func.genSetReg(ty, reg, .{ .indirect = .{ .reg = addr_reg } });
6838 },
67776839 .air_ref => |ref| try func.genSetReg(ty, reg, try func.resolveInst(ref)),
67786840 else => return func.fail("TODO: genSetReg {s}", .{@tagName(src_mcv)}),
67796841 }
......@@ -6793,7 +6855,6 @@ fn genSetMem(
67936855 const dst_ptr_mcv: MCValue = switch (base) {
67946856 .reg => |base_reg| .{ .register_offset = .{ .reg = base_reg, .off = disp } },
67956857 .frame => |base_frame_index| .{ .lea_frame = .{ .index = base_frame_index, .off = disp } },
6796 .reloc => |base_symbol| .{ .lea_symbol = .{ .sym = base_symbol.sym_index, .off = disp } },
67976858 };
67986859 switch (src_mcv) {
67996860 .none,
......@@ -6940,6 +7001,7 @@ fn genSetMem(
69407001 return func.genSetMem(base, disp, ty, .{ .register = reg });
69417002 },
69427003 .air_ref => |src_ref| try func.genSetMem(base, disp, ty, try func.resolveInst(src_ref)),
7004 else => return func.fail("TODO: genSetMem {s}", .{@tagName(src_mcv)}),
69437005 }
69447006}
69457007
......@@ -7761,9 +7823,10 @@ fn genTypedValue(func: *Func, val: Value) InnerError!MCValue {
77617823 .none => .none,
77627824 .undef => unreachable,
77637825 .load_symbol => |sym_index| .{ .load_symbol = .{ .sym = sym_index } },
7826 .load_tlv => |sym_index| .{ .lea_tlv = sym_index },
77647827 .immediate => |imm| .{ .immediate = imm },
77657828 .memory => |addr| .{ .memory = addr },
7766 .load_got, .load_direct, .load_tlv => {
7829 .load_got, .load_direct => {
77677830 return func.fail("TODO: genTypedValue {s}", .{@tagName(mcv)});
77687831 },
77697832 },
src/arch/riscv64/Emit.zig+25
......@@ -77,6 +77,31 @@ pub fn emitMir(emit: *Emit) Error!void {
7777 .r_addend = 0,
7878 });
7979 },
80 .load_tlv_reloc => |symbol| {
81 const elf_file = emit.bin_file.cast(link.File.Elf).?;
82
83 const atom_ptr = elf_file.symbol(symbol.atom_index).atom(elf_file).?;
84
85 const R_RISCV = std.elf.R_RISCV;
86
87 try atom_ptr.addReloc(elf_file, .{
88 .r_offset = start_offset,
89 .r_info = (@as(u64, @intCast(symbol.sym_index)) << 32) | @intFromEnum(R_RISCV.TPREL_HI20),
90 .r_addend = 0,
91 });
92
93 try atom_ptr.addReloc(elf_file, .{
94 .r_offset = start_offset + 4,
95 .r_info = (@as(u64, @intCast(symbol.sym_index)) << 32) | @intFromEnum(R_RISCV.TPREL_ADD),
96 .r_addend = 0,
97 });
98
99 try atom_ptr.addReloc(elf_file, .{
100 .r_offset = start_offset + 8,
101 .r_info = (@as(u64, @intCast(symbol.sym_index)) << 32) | @intFromEnum(R_RISCV.TPREL_LO12_I),
102 .r_addend = 0,
103 });
104 },
80105 .call_extern_fn_reloc => |symbol| {
81106 const elf_file = emit.bin_file.cast(link.File.Elf).?;
82107 const atom_ptr = elf_file.symbol(symbol.atom_index).atom(elf_file).?;
src/arch/riscv64/Lower.zig+30
......@@ -34,6 +34,8 @@ pub const Reloc = struct {
3434
3535 /// Relocs the lowered_inst_index and the next instruction.
3636 load_symbol_reloc: bits.Symbol,
37 /// Relocs the lowered_inst_index and the next two instructions.
38 load_tlv_reloc: bits.Symbol,
3739 /// Relocs the lowered_inst_index and the next instruction.
3840 call_extern_fn_reloc: bits.Symbol,
3941 };
......@@ -252,6 +254,34 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index, options: struct {
252254 });
253255 },
254256
257 .pseudo_load_tlv => {
258 const payload = inst.data.reloc;
259 const dst_reg = payload.register;
260 assert(dst_reg.class() == .int);
261
262 try lower.emit(.lui, &.{
263 .{ .reg = dst_reg },
264 .{ .imm = lower.reloc(.{
265 .load_tlv_reloc = .{
266 .atom_index = payload.atom_index,
267 .sym_index = payload.sym_index,
268 },
269 }) },
270 });
271
272 try lower.emit(.add, &.{
273 .{ .reg = dst_reg },
274 .{ .reg = dst_reg },
275 .{ .reg = .tp },
276 });
277
278 try lower.emit(.addi, &.{
279 .{ .reg = dst_reg },
280 .{ .reg = dst_reg },
281 .{ .imm = Immediate.s(0) },
282 });
283 },
284
255285 .pseudo_lea_rm => {
256286 const rm = inst.data.rm;
257287 assert(rm.r.class() == .int);
src/arch/riscv64/bits.zig-2
......@@ -15,7 +15,6 @@ pub const Memory = struct {
1515 pub const Base = union(enum) {
1616 reg: Register,
1717 frame: FrameIndex,
18 reloc: Symbol,
1918 };
2019
2120 pub const Mod = struct {
......@@ -82,7 +81,6 @@ pub const Memory = struct {
8281 .disp = base_loc.disp + offset,
8382 };
8483 },
85 .reloc => unreachable,
8684 }
8785 }
8886};
src/arch/riscv64/encoding.zig+1
......@@ -432,6 +432,7 @@ pub const Lir = struct {
432432 .pseudo_j,
433433 .pseudo_dead,
434434 .pseudo_load_symbol,
435 .pseudo_load_tlv,
435436 .pseudo_mv,
436437 .pseudo_restore_regs,
437438 .pseudo_spill_regs,
src/arch/riscv64/mnem.zig+2
......@@ -234,6 +234,8 @@ pub const Mnemonic = enum(u16) {
234234 pseudo_dead,
235235 /// Loads the address of a value that hasn't yet been allocated in memory.
236236 pseudo_load_symbol,
237 /// Loads the address of a TLV.
238 pseudo_load_tlv,
237239
238240 /// Moves the value of rs1 to rd.
239241 pseudo_mv,