authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-21 14:02:24+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-21 22:38:30+02:00
log9848623e62d75507d94f4e4276c5e5c888d99f5d
tree932b7440c7ec6528da5f79834516390430e38b89
parent08cddaf11c7bac5fba2e696ed6b99d1f7b730543
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: Remove the `renderscript32`/`renderscript64` arch tags.

It's dead: https://developer.android.com/guide/topics/renderscript/migrate

6 files changed, 0 insertions(+), 34 deletions(-)

lib/compiler/aro/aro/target.zig-6
......@@ -488,7 +488,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
488488 .shave,
489489 .lanai,
490490 .wasm32,
491 .renderscript32,
492491 .aarch64_32,
493492 .spirv32,
494493 .loongarch32,
......@@ -504,7 +503,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
504503 .hsail64 => copy.cpu.arch = .hsail,
505504 .spir64 => copy.cpu.arch = .spir,
506505 .spirv64 => copy.cpu.arch = .spirv32,
507 .renderscript64 => copy.cpu.arch = .renderscript32,
508506 .loongarch64 => copy.cpu.arch = .loongarch32,
509507 .mips64 => copy.cpu.arch = .mips,
510508 .mips64el => copy.cpu.arch = .mipsel,
......@@ -550,7 +548,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
550548 .hsail64,
551549 .spir64,
552550 .spirv64,
553 .renderscript64,
554551 .loongarch64,
555552 .mips64,
556553 .mips64el,
......@@ -574,7 +571,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
574571 .nvptx => copy.cpu.arch = .nvptx64,
575572 .powerpc => copy.cpu.arch = .powerpc64,
576573 .powerpcle => copy.cpu.arch = .powerpc64le,
577 .renderscript32 => copy.cpu.arch = .renderscript64,
578574 .riscv32 => copy.cpu.arch = .riscv64,
579575 .sparc => copy.cpu.arch = .sparc64,
580576 .spir => copy.cpu.arch = .spir64,
......@@ -651,8 +647,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
651647 .lanai => "lanai",
652648 .wasm32 => "wasm32",
653649 .wasm64 => "wasm64",
654 .renderscript32 => "renderscript32",
655 .renderscript64 => "renderscript64",
656650 .ve => "ve",
657651 // Note: spu_2 is not supported in LLVM; this is the Zig arch name
658652 .spu_2 => "spu_2",
lib/std/Target.zig-16
......@@ -1026,8 +1026,6 @@ pub const Cpu = struct {
10261026 lanai,
10271027 wasm32,
10281028 wasm64,
1029 renderscript32,
1030 renderscript64,
10311029 ve,
10321030 spu_2,
10331031
......@@ -1167,7 +1165,6 @@ pub const Cpu = struct {
11671165 .shave => .NONE,
11681166 .lanai => .LANAI,
11691167 .wasm32 => .NONE,
1170 .renderscript32 => .NONE,
11711168 .aarch64_32 => .AARCH64,
11721169 .aarch64 => .AARCH64,
11731170 .aarch64_be => .AARCH64,
......@@ -1182,7 +1179,6 @@ pub const Cpu = struct {
11821179 .hsail64 => .NONE,
11831180 .spir64 => .NONE,
11841181 .wasm64 => .NONE,
1185 .renderscript64 => .NONE,
11861182 .amdgcn => .AMDGPU,
11871183 .bpfel => .BPF,
11881184 .bpfeb => .BPF,
......@@ -1231,7 +1227,6 @@ pub const Cpu = struct {
12311227 .shave => .Unknown,
12321228 .lanai => .Unknown,
12331229 .wasm32 => .Unknown,
1234 .renderscript32 => .Unknown,
12351230 .aarch64_32 => .ARM64,
12361231 .aarch64 => .ARM64,
12371232 .aarch64_be => .ARM64,
......@@ -1246,7 +1241,6 @@ pub const Cpu = struct {
12461241 .hsail64 => .Unknown,
12471242 .spir64 => .Unknown,
12481243 .wasm64 => .Unknown,
1249 .renderscript64 => .Unknown,
12501244 .amdgcn => .Unknown,
12511245 .bpfel => .Unknown,
12521246 .bpfeb => .Unknown,
......@@ -1299,8 +1293,6 @@ pub const Cpu = struct {
12991293 .thumb,
13001294 .spir,
13011295 .spir64,
1302 .renderscript32,
1303 .renderscript64,
13041296 .shave,
13051297 .ve,
13061298 .spu_2,
......@@ -1794,8 +1786,6 @@ pub const DynamicLinker = struct {
17941786 .kalimba,
17951787 .shave,
17961788 .lanai,
1797 .renderscript32,
1798 .renderscript64,
17991789 .ve,
18001790 .dxil,
18011791 .loongarch32,
......@@ -1901,7 +1891,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
19011891 .shave,
19021892 .lanai,
19031893 .wasm32,
1904 .renderscript32,
19051894 .aarch64_32,
19061895 .spirv32,
19071896 .loongarch32,
......@@ -1922,7 +1911,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
19221911 .hsail64,
19231912 .spir64,
19241913 .wasm64,
1925 .renderscript64,
19261914 .amdgcn,
19271915 .bpfel,
19281916 .bpfeb,
......@@ -2426,7 +2414,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
24262414 .spirv32,
24272415 .kalimba,
24282416 .shave,
2429 .renderscript32,
24302417 .ve,
24312418 .spu_2,
24322419 .xtensa,
......@@ -2453,7 +2440,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
24532440 .s390x,
24542441 .spir64,
24552442 .spirv64,
2456 .renderscript64,
24572443 => 8,
24582444
24592445 .aarch64,
......@@ -2545,7 +2531,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
25452531 .spirv32,
25462532 .kalimba,
25472533 .shave,
2548 .renderscript32,
25492534 .ve,
25502535 .spu_2,
25512536 .xtensa,
......@@ -2579,7 +2564,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
25792564 .s390x,
25802565 .spir64,
25812566 .spirv64,
2582 .renderscript64,
25832567 => 8,
25842568
25852569 .aarch64,
src/Type.zig-2
......@@ -1655,14 +1655,12 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
16551655 .hsail,
16561656 .spir,
16571657 .kalimba,
1658 .renderscript32,
16591658 .spirv,
16601659 .spirv32,
16611660 .shave,
16621661 .amdil64,
16631662 .hsail64,
16641663 .spir64,
1665 .renderscript64,
16661664 .ve,
16671665 .spirv64,
16681666 .dxil,
src/Zcu.zig-2
......@@ -3263,7 +3263,6 @@ pub fn atomicPtrAlignment(
32633263 .lanai,
32643264 .shave,
32653265 .wasm32,
3266 .renderscript32,
32673266 .csky,
32683267 .spirv32,
32693268 .dxil,
......@@ -3286,7 +3285,6 @@ pub fn atomicPtrAlignment(
32863285 .hsail64,
32873286 .spir64,
32883287 .wasm64,
3289 .renderscript64,
32903288 .ve,
32913289 .spirv64,
32923290 .loongarch64,
src/codegen/llvm.zig-6
......@@ -97,8 +97,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
9797 .lanai => "lanai",
9898 .wasm32 => "wasm32",
9999 .wasm64 => "wasm64",
100 .renderscript32 => "renderscript32",
101 .renderscript64 => "renderscript64",
102100 .ve => "ve",
103101 .spu_2 => return error.@"LLVM backend does not support SPU Mark II",
104102 };
......@@ -321,8 +319,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
321319 .lanai => .lanai,
322320 .wasm32 => .wasm32,
323321 .wasm64 => .wasm64,
324 .renderscript32 => .renderscript32,
325 .renderscript64 => .renderscript64,
326322 .ve => .ve,
327323 .spu_2 => .UnknownArch,
328324 };
......@@ -12106,8 +12102,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
1210612102 .spirv32,
1210712103 .spirv64,
1210812104 .kalimba,
12109 .renderscript32,
12110 .renderscript64,
1211112105 .dxil,
1211212106 => {},
1211312107
src/target.zig-2
......@@ -167,8 +167,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
167167 .lanai,
168168 .wasm32,
169169 .wasm64,
170 .renderscript32,
171 .renderscript64,
172170 .ve,
173171 => true,
174172